OPTIMIZATION CIRCUIT

Abstract: A method of improving the performance of an active semiconductor device with a voltage-controllable channel length, comprises providing a matched reference component having similar operating characteristics to the active semiconductor device, continually monitoring the breakdown voltage of the matched reference component, and maintaining the operating voltage of the active semiconductor device to lie just below the measured breakdown voltage of the matched reference component. In this way, the performance of the active component can be optimized.

Description: OPTIMIZATION CIRCUIT This invention relates to an optimization circuit for use with an active semi-conductor device, such as a MOS or CMOS field effect transistor circuit. A wide range of gate lengths is observed in advanced CMOS and GaAs devices due to process variations over long periods of time. This gives rise to a wide range in electrical parameters, particularly speed and breakdown voltage. Analagous problems occur in bipolar devices, where base width is difficult to ' control. As a result of the spread of breakdown voltages from one device to the next, it is customary to design circuitry to operate well away from the breakdown voltage so that the circuit specifications do not result in a significant wastage of components and reduction in product yield. The unfortunate consequence of this requirement is that the operating frequency of the circuit is reduced. The reduction in operating frequency is compounded by the Early effect, which causes the frequency response to decrease as the supply voltage is moved further away from the breakdown voltage. Previously, guard banding has been employed to distance the circuit operating conditions from the minimum breakdown voltage but inevitably speed performance is adversely affected. There is a trade-off between performance and reject rate. The smaller the guard band, the better the performance but the higher the reject rate. In the production of any semi-conductor device, the objective is to obtain the lowest reject rate, or highest yield, possible. The object of the invention is to alleviate the aforementioned problems. In accordance with the present invention, there- is provided a method of improving the performance of an active semiconductor device with a voltage-controllable channel length, comprising providing a matched reference component having similar operating characteristics to said active semiconductor device, continually monitoring the breakdown voltage of said matched reference component, and maintaining the operating voltage of said active semiconductor device to lie just below the measured breakdown voltage of said matched reference component . The invention can be applied to any electrical circuit which has well matched active components. In the case of discrete components, the operating voltage can be set by a linear voltage control circuit comprising an amplifier and a power transistor forming a pass element. The function of the pass element is to reduce the voltage to a value of V 0 below the reference device breakdown voltage. In the case of a bipolar circuit, the same technique can be used or an operational amplifier can be used to buffer the reference voltage, with the required voltage drop being obtained from a level shifting circuit . The reference device is preferably maintained in close physical proximity on the same circuit to the active device. As a result, the reference component is influenced by the same external factors as the active component and consequently its breakdown voltage varies in a similar fashion. Preferably, a small current is forced through the reference component with a current limiting device to cause it to breakdown, and the breakdown voltage is then presented to an input of an operational amplifier, which at its output provides a control voltage. In a further aspect, the invention provides an optimization circuit comprising an active semiconductor device having a channel with an identifiable breakdown voltage, a voltage regulator for applying a desired output voltage to said device, said output voltage determining the length of said channel, a matched reference component having similar operating characteristics to said active device, means for continually monitoring the breakdown voltage of said matched reference component, and means for adjusting the voltage applied to said device by said voltage regulator to maintain the output voltage of said device at a level just below that at which breakdown occurs. The described circuit has the advantage that each semi-conductor device is operated as close as possible to the optimum breakdown voltage without actually causing breakdown. As a result, regardless of processing variations, the circuit will always operate very close to the maximum possible speed. The invention will now be described in more detail, by way of example only, with reference to the accompanying drawings, in which: - Figure 1 is a generalized block diagram of an optimization circuit in accordance with the invention; and Figure 2 is a circuit detail of a specific implementation of an optimization circuit, in which the reference device is designed to breakdown at a voltage lower than the active circuit devices so as to eliminate the need for a pass element. Referring now to the Figure 1, an unregulated input voltage V is applied to a pass element 1 and current limiter 2. The current limiter 2 forces a small current through matched reference component 3, causing it to break down. The matched reference component 3 is chosen to have operating characteristics as close as possible to an active channel device 4, such as a CMOS FET. The matched component 3 is also placed in close physical proximity to the device 4 so as to be influenced by the same external factors. The matched reference component therefore behaves in the same manner as the active device 4. The breakdown voltage db of the matched reference component 3 is continually presented to a non-inverting input of operational amplifier 5 having an inverting input connected to the mid-point of a potential divider formed by resistors 6, 7. The output of operational amplifier 5 is connected to pass element 1. The operational amplifier 5 is connected as a voltage regulator in which the potential divider can be adjusted to set the voltage Vo' to be close to the matched refer-" e voltage. Level shifter 8 then sets the voltage drop t. a value Vo, which is just below the breakdown voltage of the frequency limiting circuitry. Figure 2 shows a more detailed implementation of the optimization circuit. The reference circuit, generally designated 10, comprising a reference MOS FΞT 11 connected in series with a load 14, which may be a resistor or MOS transistor, for supplying a small current to the reference MOS FET 11. The reference MOS FET 11 has a channel length L = L a - δ, where L a is the critical channel length at which breakdown occurs of the critical transistors in the active circuit, i.e. normally the smallest channel length permitted for the process used and δ is a small increment in the order of 10% L a . For a MOS device, the small reduction in channel length δ ensures that the reference device breaks down at a slightly lower voltage than the active circuit devices. This arrangement eliminates the need for a pass element or level shifting circuit, but the matching characteristics still remain very good. Operational amplifier 5 has transistors with a channel length L > L a . In operation, the active circuit has a first set of non-critical transistors (not shown) that are operated with channel lengths L such that L > L a< and these transistors are supplied by the external supply 13. A second set of critical transistors (not shown) are operated with channel lengths L a , and these are supplied by the output of the operational amplifier 5, which has one input connected to the reference MOSFET 11. The above circuit ensures that regardless of processing variations, the circuitry will always operate very close to the maximum speed possible.

Claims: CLAIMS : 1. A method of improving the performance of an active semiconductor device with a voltage-controllable channel length, characterized in that the breakdown voltage of said matched reference component of a mat~hed reference component having similar operating chara> .eristics to said active semiconductor device is continually monitc .d, and the operating voltage of said active semiconductor device is maintained to lie just below the measured breakdown voltage of said matched reference component. 2. A method as claimed in claim 1, characterized in that said reference device is located in close proximity to said active semiconductor device so as to be influenced by the same factors thereas. 3. A method as claimed in claim 1, characterized in that the measured breakdown voltage is presented to an operational amplifier as a reference voltage, said operational amplifier producing an output voltage that sets an output voltage of the active semiconductor device at the desired level just below the breakdown voltage. 4. A method as claimed in claim 1, characterized in that reference component is designed to breakdown at a voltage slightly lower than the active semiconductor device. 5. An optimization circuit comprising an active semiconductor device having a channel with an identifiable breakdown voltage, a voltage regulator for applying a desired output voltage to said device, said output voltage determining the length of said channel, a matched reference component having similar operating characteristics to said active device, means for continually monitoring the breakdown voltage of said matched reference component, and means for adjusting the voltage applied to said device by said voltage regulator to maintain the output voltage of said device at a level just below that at which breakdown occurs. 6. An optimization circuit as claimed in claim 5, characterized in that said matched component is located in close proximity to said semiconductor device so as to be influenced by the same factors thereas. 7. An optimization circuit as claimed in claim 6, characterized in that said voltage monitoring means comprises an operational amplifier having one input connected to an output of said matched reference component and an output supplying said voltage regulator. 8. An optimization circuit as claimed in any one of claims 4 to 6, characterized in that a second input of said operational amplifier is connected to a potential divider providing a reference voltage. 9. An optimization circuit as claimed in any of claims 4 to 7, characterized in that said semiconductor device is a CMOS device. 10. An optimization circuit as claimed in 5, characterized in that said matched reference device is designed to break down at a voltage slightly lower than said active semiconductor device.

Inventors: ORCHARD-WEBB JONATHAN H, ORCHARD-WEBB, JONATHAN, H.
Applicants: MITEL CORP, ORCHARD WEBB JONATHAN H, MITEL CORPORATION, ORCHARD-WEBB, JONATHAN, H.
Application year: 1994
Main classification: G05F3
IPC codes: G05F1, G05F3, G11C11, H03K17, H03K19