High frequency control circuit for DC motors, particularly for washing machines

Abstract: Control circuit for series dc motors, particularly for domestic washing machines, comprising a rectifier (DB1), a switching cell (S1, D1, Lout, Cout) for controlling the motor speed, a tachometer generator (T) for measuring this speed and producing a corresponding voltage signal which an amplifier means (EA1) compares with a reference signal (VREF) to produce an error signal which is compared in a comparator means (CMP1) with a current signal so as to produce an output signal, said current signal being generated by a current sensor (S) and in which: the amplifier means (EA1) is an error amplifier with proportional-integral regulator (RF1, RF2 and CF1); the switching cell (S1, D1, Lout, Cout) is controlled by a double-drive bistable circuit (FF1), one drive being governed by the output signal of the comparator means (CMP1) and the other by an oscillator (OSC1); a capacitive-inductive π filter (C1, L2, C2) being positioned at the output of the rectifier (DB1) together with a voltage divider (R1, R2) to which a circuit branch (QPFC, CPFC, RPFC, RR2) is connected for ac coupling with the reference voltage (VREF) input of the error amplifier (EA1); a flywheel diode (D1) being positioned to feed the motor with the energy stored in an inductance (Lout) in series with the motor (M) when the switching element (S1) is switched into the open position.

Description: This invention relates to a circuit for controlling the rotational speed of direct current (dc) motors of series type, in particular domestic washing machine motors, by controlling at least one solid-state switch. Its function is to modify the ratio of the rectified line voltage to the voltage effectively applied to the motor by switching the solid-state switch. The circuit of the invention pertains to the category described in the introduction to the accompanying main claim. The topology of so-called voltage reduction switching cells (also known as bucking cells) is well known from the technical literature. The method of controlling a dc electric motor by modulating the duty cycle of the high frequency input voltage to obtain a variable voltage across the motor is well known both in the literature and in the patent field (see for example DE-A-3221092, CH-A-647901 and international patent application WO88/00771). All the methods described therein use a solid-state switch connected directly in series with the dc motor using the motor inductance and the mechanical inertia of the load and motor as main filter of the switching cell configuration. This method has the considerable drawback that the switching frequency is necessarily limited by the interference emitted by the connection cables between the control circuit and the motor. This requires the use of radio frequency filters in order to satisfy existing regulations (principally in Europe), these filters being dimensionally large and costly. The prior publications have considered various methods for controlling or limiting the current through the motor (see for example FR-A-70.21702, which states that the current "read" in a resistor in series with the motor can be used to form a current control loop) consisting of a conventional double loop system in which both the current signal (averaged through a switching period) and a voltage (or speed) signal from the motor are added or subtracted to obtain an overall reaction signal to be fed to a PWM (pulse width modulation) comparator. Again, peak current mode control enables the current through the solid-state power switch to be controlled and limited, cycle by cycle, while at the same time providing a very rapid reaction to possible malfunctions and an effective current control, such as to "shape" the dynamic response of the switching cell. This control mode and its dynamic performance are well known in the literature for application to switching power feeders. Power factor control techniques have also been recently described in the technical literature, sometimes in combination with average current and hysteresis control methods, these techniques however having found application to feeders for providing power factor control preregulators, followed by other conversion stages, and mainly for switching power feeders or continuity groups. An object of the present invention is to jointly apply all the aforesaid techniques in a new and original manner to achieve overall control simultaneously offering the following: excellent dynamic response, very high switching frequency (between 100 and 150 kHz), very small radiofrequency filters, very rapid and reliable action against overloads, and a very good input power factor in the ac feed line. A further object is to provide a new and simple means for measuring the power absorbed by a dc motor in order to sense mechanical load unbalance conditions on the motor, particularly during the spin stage of a washing machine. This derives from the fact that the effective parameter able to influence the mechanical stability of the washing machine is the power which the motor provides to the washing machine drum. These objects are solved by the features of claim 1. These and further objects which will be more apparent from the detailed description given hereinafter are attained by a control circuit in accordance with the accompanying claims. The invention will be more apparent from the detailed description of a preferred embodiment thereof given hereinafter with reference to the accompanying drawing, in which: Figure 1 shows the control circuit; Figure 2 shows the variation in the ripple component of the rectified voltage against motor absorbed power for different constant rpm values; Figure 3 shows the variation in the voltage signals against time at the points indicated in Figure 1. With reference to Figure 1, the line voltage V L is rectified by a rectifier bridge DB1. At the output of the bridge DB1 there is a π filter formed from an inductance L2 and two low capacitance capacitors C1, C2. Downstream of said filter there are a flywheel diode D1, a solid-state switch S1 (which for reasons of simplicity is represented by its equivalent symbol) in series with which there is a current sensors (for example a resistor). Between the diode D1, switch S1 and motor M there is connected an inductance Lout in series with the dc motor M (of series type). In parallel with the motor M there is connected a capacitor Cout the purpose of which is to smooth the voltage applied to the motor M so as to reduce the interference emitted through the cables connecting the circuit to the motor. The motor M drives the conventional drum (not shown) of a washing machine via a conventional belt and pulley transmission. A tachometer generator T is connected to the motor shaft to provide a voltage signal proportional to the motor speed. The signal from the generator T is rectified and filtered by a block DB2 to obtain a smoothed dc signal proportional to the speed of the motor M. This signal is fed via a resistor RF1 to the inverting input of an error amplifier EA1 provided with proportional-integral compensation represented by the said resistor RF1 and the series feedback network consisting of the resistor RF2 and the capacitor CF1. The purpose of the compensation is to achieve good static speed regulation. A reference signal VREF originating from the adder node 1, discussed hereinafter, is applied to the non-inverting input of the error amplifier EA1. The amplified error signal, resulting from the difference between the inputs and output of the error amplifier EA1, defines the maximum peak current level in the solid-state switch S1. The reference signal VREF is the voltage drop across a resistor RR2 connected to earth, and is obtained by adding together at the node 1 the current provided by a microcontroller C via a resistor RR1, and the current I2 reaching said node via a transistor QPFC, a high-capacitance capacitor CPFC and a resistor RPFC. The transistor base is connected to the intermediate point of a resistive voltage divider R1, R2 connected in parallel with the output of the rectifier bridge DB1. The current I1 provided by the microcontroller C is proportional to the reference speed whereas the current I2 is the image of the output voltage (VC1, see Figure 3) of said bridge. As the capacitance of the capacitors C1 and C2 is very low, their reactance is high and the voltage VC1 and hence the current passing through the voltage divider R1, R2 are signals which, although rectified, have a ripple component of double the line frequency and in phase with it. The current I2 therefore represents the ripple component as the function of the capacitor CPFC is to provide only ac coupling. As the capacitance of this capacitor is high it does not introduce a significant phase displacement. Consequently the reference signal VREF obtained across RR2 is modulated at double the line frequency (if the line frequency is 50 Hz, this frequency will be 100 Hz). In addition, with a view to achieving correct depth of modulation, necessary for good power factor correction, the said resistor RPFC is provided, this advantageously being adjustable during the setting-up of the circuit. An access line L to the microcontroller C is connected to the intermediate point of the voltage divider. From the aforegoing it will be noted that the relative output signal of the error amplifier EA1 is also modulated at double the line frequency, as the network formed by the components CF1 and RF2 is sized so as not to substantially filter this frequency component. This output signal is applied to the inverting input of a comparator CMP1, to the non-inverting input of which there is applied a signal representative of the current passing through the solid-state switch S1 and measured by the current sensor S, this current having an approximately sawtooth shape. The output of the comparator CMP1 is applied for reset purposes to one of the inputs of the double-drive flip-flop FF1, the other input of which is driven by the pulse signal (approximating to Dirac delta) on the basis of the setting signal, V q , generated by an oscillator OSC1 of fixed oscillation frequency between 100 and 150 kHz. In this manner the switch S1 is "closed" at fixed frequency, whereas it is "opened" when the current passing through it attains the value present at the output of the error amplifier EA1. Consequently the peak current through the static switch S1 is controlled and limited cycle by cycle. As, as stated, the output of the error amplifier EA1 is modulated at double the line frequency, the peak current through the switch S1 is also likewise modulated. In addition, as the peak current through the switch S1 is strictly proportional to the line current, it can be concluded that this latter is exactly modulated at double the line frequency. However because of the existence of the rectifier bridge DB1, the current absorbed by the line is exactly sinusoidal and in phase with the line voltage, with the result that a very high power factor is obtained. The reduction function of the circuit of the invention derives from the fact that each time the static switch S1 closes, the inductance Lout is charged to then discharge via the flywheel diode D1 when the switch opens. In this manner controlled quantities of energy are supplied to the motor M at each switching cycle. It should be noted that, as stated, the purpose of the capacitor Cout is merely to smooth the voltage applied to the motor, so reducing interference radiated through the connection cables between the circuit and the motor M. The function of "reading" (by means of S) the current passing through the static switch S1 and applying this "reading" to the comparator CMP1 forms an internal peak current control loop. The function of "reading" the tachometer signal, filtering it, subtracting it from the variable reference signal (VREF) and controlling the internal peak current control loop by the obtained signal such that the switching of the static switch provides a controlled voltage across the motor M and hence a certain speed read by the tachometer T, forms an external speed control loop. On this basis, it can be stated that the internal peak current control loop provides another important function, ie to correct the behaviour of the switching cell (S1, D1, Lout, Cout) at low signals so that a first order gain is obtained. The result is that the overall dynamic performance of the control circuit of the invention is very good. An inductance L1 is advantageously positioned in the feed line across the input terminals of the rectifier bridge DB1 in order, together with the components C1, C2 and L2 positioned downstream of the bridge, to reduce radiofrequency emission along the feed line, however the said filtering components are small and of low cost because of the 100-150 kHz frequency operation. It should be noted that at very low loads, ie with the motor M operating with very low torque, the capacitors C1 and C2, even if very small, are sufficient to smooth the output voltage of the rectifier bridge DB1 such that in practice the voltage across their ends (eg. VC1) is a smoothed dc voltage. With increase in the load of the motor M and hence in the average current absorbed by the circuit, the ripple voltage across the capacitors C1 and C2 increases such that at full load this voltage is practically the rectified but unsmoothed voltage. Figure 2 shows how the amplitude of the ripple component is related to the power absorbed by the motor. In this figure the horizontal axis indicates the power applied to the motor M and the vertical axis indicates the voltage ripple (δV) across the capacitor C1. The curves each relate to a given indicated motor rpm. It can be seen that as the applied power and hence the load increases, the δV, ie the ripple voltage, increases for equal motor rpm. It can also be seen that for equal rpm the ripple voltage δV increases with increasing power, ie is related to the motor absorbed power. This behaviour is particularly useful during the washing machine spinning stage when the voltage applied to the motor approximates to the average line voltage (ie the voltage conversion ratio of the described reduction circuit approximates to one), while the current absorbed by the motor is relatively small. If the load of clothes in the drum is unbalanced, the mechanical power required from the motor increases, resulting in an increase in current absorbed by the motor. This produces an increase in ripple voltage across the capacitor C1, this increase being "measured" by the resistive voltage divider R1, R2 and fed to the microcontroller C. The microcontroller C then acts on the output current I1, varying the reference voltage in such a manner as to reduce the motor speed, so limiting the average voltage applied to the motor. In place of the microcontroller C a simple dc energy source, possibly presettable, can be provided if it is not required to make the reference voltage also dependent on controlling the unbalance of the washing machine load.

Claims: A control circuit for series dc motors, particularly for domestic washing machines, in which the motor drives a drum via a mechanical transmission, the circuit comprising an internal wave rectifier (DB1), a switching cell (S1, D1, Lout, Cout) for controlling the motor speed, a tachometer generator (T) for measuring the rotational speed of the motor (M) and producing a voltage signal proportional to this speed, an error amplifier means (EA1) with proportional-integral regulator (RF1, RF2 and CF1) for comparing the voltage signal with a reference signal (VREF) to produce an error signal, a second comparator means (CMP1) receiving the error signal and comparing this error signal with a current signal to produce an output signal, and a current sensor (S) connected in series with the motor and generating said current signal, the output signal of the second comparator means (CMP1) driving the switching cell, characterised in that: a) the switching cell comprises a switching means (S1) in series with the motor (M), an inductance (Lout) connected between the two, and a capacitor (Cout) in parallel with the motor (M), b) the switching cell (S1, D1, Lout, Cout) is controlled by a double-drive bistable circuit (FF1), one drive being governed by the output signal of the comparator means (CMP1) for resetting purposes and the other by an oscillator (OSC1) for setting purposes; c) the comparator means (CPM1) compares the output signal of the error amplifier (EA1) with a signal (VS) proportional to the current through the switch (S1); d) a capacitive-inductive π filter (C1, L2, C2) is positioned at the output of the internal wave rectifier (DB1) in parallel with the motor (M) and with a voltage divider (R1, R2); e) a circuit branch (QPFC, CPFC, RPFC, RR2) is connected to the voltage divider (R1, R2) for ac coupling the rectified voltage of the line with the reference voltage (VREF) input of the error amplifier (EA1) in order to modulate the reference voltage; f) a flywheel diode (D1) is included within the switching cell to feed the motor with the energy stored in the inductance (Lout) when the switching means (S1) is switched to the open position during the operation of the motor (M). A circuit as claimed in claim 1, characterised in that at least one inductance (L1) is connected into the power feed line. A circuit as claimed in claim 1 or in claims 1 and 2, characterised in that the reference voltage (VREF) derives from the voltage drop through a resistor (RR2) connected to earth the sum of two currents (I2, I2), one (I2) derived from the ac coupling circuit branch, the other from a voltage source (C, RR1) for improving the power factor. A circuit as claimed in claim 3, characterised in that the voltage source comprises a microcontroller (C) having an input connected (via L) to the voltage divider (R1, R2), for the purpose of reading the voltage fluctuation across a capacitor (C1) of the π filter (C1, L2, C2) and deriving information from this regarding the power absorbed by the motor (M).

Inventors: BOCCHIOLA CESARE ANTONIO, BOCCHIOLA, CESARE ANTONIO
Applicants: WHIRLPOOL EUROP, WHIRLPOOL EUROPE B.V.
Application year: 1994
Main classification: H02P5
IPC codes: H02P7