Over current protection device for transistor

Abstract: To prevent the oscillation which often occurs in an over current protection device for an insulated gate controlled transistor, an over current protection device is provided which improves the response in current detection to prevent the oscillation and improves protection speed against over current by separating the gates of a main transistor (10) and a current detector transistor (20); setting the time constant for the gate circuit of the detector transistor (20) shorter than that of the gate circuit of the main transistor (10); feeding a detection signal (Vd), obtained with current detecting means (Rd) which detects the current (i) of the detector transistor (20) proportional to the current (l) flowing through the main transistor (10), to control means (50); and controlling the transistors (10, 20) to protect the transistor (10) from the over current by feeding the comparison output Sd from a comparator circuit (30), which compares the voltage of the detection signal (Vd) with a reference voltage (Vr), to the control circuit (40).

Description: The present invention relates to an over current protection device for an insulated gate controlled transistor such as a power MOS transistor, an insulated gate bipolar transistor, etc.. Since the input impedance of insulated gate controlled transistors is very high, since power MOS transistors are applicable in a high frequency range and since insulated gate bipolar transistors, the output impedance of which is very low, are well suited for large current applications, these insulated gate controlled transistors are widely used in a form of a vertical element in a switching power supply, an inverter for controlling a motor, etc.. However, a power transistor requires some protection measures against an over current since the power transistor is damaged or broken down rather easily by an over current caused by an abnormality on the load side. In these days, the protection measures have been incorporated into an integrated circuit together with related circuits. A protection scheme has been known which incorporates a current detector transistor as an over current protection means with a main transistor and executes protection by detecting an over current flowing through the main transistor on the basis of the principle of the Miller's current circuit. This protection scheme is described, for example, in Electro mini/micro Northeast Conf. Rec. E 10.4.1-10.4.4., 1986 by D. L. Zaremba Jr. and in the US Patent No. 4,783,690. Figure 6 schematically shows the protection technique according to this prior art. In Fig. 6, a load power supply 2 supplies voltage of typically several hundreds of volts to a load 1. A main transistor 10 which controls a current flowing through the load 1 is a power MOS transistor, the drain terminal D of which is connected with the load 1 and the source terminal S of which is grounded. The main transistor 10 is usually comprised of many unit structures connected in parallel with each other and incorporated into a semiconductor device. A current detector transistor 20 is comprised of from one to several unit structures, assigned to the current detection purpose, having the same unit structure with the unit structure of the main transistor 10 and being incorporated into the semiconductor device. As Fig. 6 shows, the drain and the gate of the current detector transistor 20 are connected in common to the drain and the gate of the main transistor 10, respectively. The common gate receives a drive command Ss from a drive circuit 3. Usually, a gate resistor Rg is connected as shown in Fig. 6 to the common gate for adjusting the speed of current changes (di/dt) supplied to the load 1. According to the principle of the Miller's current circuit, a small follower current i of one several thousandth of a reference current I of the main transistor 10 flows through the current detector transistor 20. The follower current i is detected as a voltage drop across a current detecting means Rd connected to the source of the current detector transistor 20. An operational amplifier 30 compares a detection signal Vd indicative of the voltage drop with a reference voltage Vr and outputs a comparison signal Sd indicative of the result of the comparison to a gate control circuit 40. The control circuit 40 outputs a control signal Sc to the common gate of the transistors 10 and 20 based on the comparison signal Sd. When an over current flows through the main transistor 10, the detection signal Vd exceeds the reference voltage Vr and the control circuit 40 which receives the comparison signal Sd from the operational amplifier 30 outputs the control signal Sc to the main transistor 10 to limit or shut off the current I flowing through the main transistor 10. When the drive circuit 3 designates ON and OFF of the main transistor 10 by HIGH and LOW of the drive command Ss, the control signal Sc lowers the HIGH signal or changes the HIGH signal to the LOW signal. The over current protection device according to the prior art protects the main transistor from an over current by correctly detecting the current I of the main transistor 10 by means of the current i of the detector transistor 20 based on the principle of the Miller's current circuit. However, oscillation tends to occur in the prior art circuit when the main transistor is of large current capacity and has a large electrostatic capacitance. This is because, though the feedback control system including the operational amplifier 30 which receives the detection signal Vd and the control circuit 40, shows quick response and high gain, the controlled system including the gate capacitance and the gate resistor Rg of the main and current detector transistors 10 and 20 can not quickly follow the control signals Sc. The simplest measure for preventing the oscillation is to lower the responsiveness and the gain of the feedback system, but this preventive measure causes insufficient over current detection sensitivity and too slow protective operation which in turn may cause damage or breakdown of the main transistor 10. Another measure for solving this problem has been known which provides the operational amplifier 30 with a phase compensation function (see for example "Circuit Techniques For Fully Utilizing Operational Amplifiers" by Iwao Sagara, pp14-15, published in 1987 from Nikkan Kougyou). This phase compensation technique will be briefly explained below with reference to Fig. 7. The operational amplifier 30 illustrated in Fig. 7 is comprised of a differential input block 31 which receives the detected voltage Vd and the reference voltage Vr; an amplifying block 32 which receives the output of the differential input block 31; and an output block 33 which is driven by the amplifying block 32 and outputs the comparison signal Sd. A phase compensation capacitor Cp is connected, for example on the input side of a transistor of the amplifying block 32 as shown in the figure. The phase compensation capacitor Cp shifts the phase of change of the comparison signal Sd corresponding to a change of the detected voltage Vd. The oscillation is prevented, without so much deteriorating the protective function, by appropriately adjusting the phase delay to the response delay caused by the gate capacitance of the main transistor 10 of the controlled system. In applying this compensation method to a practical circuit, it is not easy to adjust the capacitance of the phase compensation capacitor Cp to the characteristics of the controlled system, especially when adjustment of the gate resistor Rg is required depending on the load 1. And, the capacitance of the phase compensation capacitor Cp becomes large in correspondence to an increase of the current capacity of the main transistor. The compensation capacitance increase requires such a wide chip area for incorporating the phase compensation capacitor Cp into the integrated circuit that the practical applicability of the phase compensation method is lost and the over current protection function is lowered because of deterioration of the response of the operational amplifier 30. The document US-A-4,893,158 (Fig. 6) discloses an over-current protection device according to the pre-characterizing portion of claim 1. In this prior art the gate of the current detector transistor is connected via a first resistor to a control terminal receiving a control command, and the gate of the main transistor is connected via a second transistor to the gate of the current detector transistor. Gate control means in the form of another transistor is connected between the gate of the main transistor and ground so as to cut-off the main transistor in case of an over-current. The resistance of the second resistor is much higher than that of the first resistor. In view of the foregoing, an object of the present invention is to provide an over current protection device for a transistor which is free from oscillation, well suited for practical use and simply configured. This object is achieved with an overcurrent protection device as claimed in claim 1. Preferred embodiments of the invention are subject matter of the dependent claims. Since the main transistor is a transistor which is controlled through its insulated gate, such as a MOS transistor, insulated gate bipolar transistor, etc., and is very often comprised of many repeated unit structures, it is preferable to assign one of the unit structures to the current detector transistor. It is simple but sufficient to use a resistor as the current detecting means. Accurate proportionality between the current flowing through the current detector transistor and the current flowing through the main transistor is obtained preferably by the over current protection device of the present invention which is comprised of a semiconductor base plate into which the main transistor and the current detector transistor are built in side by side to form a respective channel portion in a surface portion of the base plate; and an insulative film covering surface portions between the main transistor and the current detector transistor, in which the gate of the current detector transistor is extended to cover the insulative film. The insulative film is preferably thick enough like a field oxide film. It is also preferable to extend the gate of the main transistor over to the insulation film and build in a stopper layer, of opposite conductivity type to the conductivity type of the semiconductor base plate, by in-diffusion from the surface of the semiconductor base plate between the edges of the extended portions of the gates of the main and the current detector transistors. According to the prior art, it is impossible to improve the response of the gate control by reducing the time constant of the gate circuit, since the time constant is the product of a capacitance and a resistance, since the electrostatic gate capacitance of the main transistor of a power semiconductor device is very large, and since its gate resistor is selected in relation to the load. The present invention, which is based on the finding that oscillation in gate control is prevented simply by improving response of the gate control on the side of the current detector transistor, has solved the aforementioned problem by separating the gate of the current detector transistor from the gate of the main transistor, by setting the time constant of the detector transistor gate circuit at a shorter value than, preferably at less than one tenth of, the time constant of the main transistor gate circuit, and by feeding the control signal output from the feedback system which includes the current detecting means and the gate control means to the detector transistor gate circuit. The prior art has adopted a common gate, which is disposed commonly to the main and current detector transistors and which provides the gate circuits of the main and current detector transistors with the same time constant. According to the prior art, since the feedback system with quick response and with high gain controls the gates uselessly or forcibly based on the result of current detection of slow response, oscillation in the gate control tends to occur. In contrast to this, according to the present invention, the proportionality between the currents of the main and current detector transistors based on the principle of the Miller's current circuit is maintained with almost no trouble, except during a limited transient period, since, in the present invention, the gate of the current detector transistor is connected to the gate of the main transistor through its gate resistor, since the gates of the current detector and the main transistors receive the same control signal from the feedback system and since the resistance of the gate circuit of the current detector transistor is low. According to the present invention, it is not necessary to connect a phase compensation capacitor when an operational amplifier is used for the comparator circuit. If the phase compensation capacitor is used, a capacitor of small capacitance will be acceptable. Now the present invention will be described in detail hereinafter with reference to the accompanying drawings which illustrate preferred embodiments of the present invention and in which: Fig. 1(a) is a block circuit diagram of an embodiment of the present invention in which a main transistor is a power MOS transistor; Fig. 1(b) is a graph showing response characteristics of the embodiment of Fig. 1 (a); Fig. 2 is a block circuit diagram of an embodiment of the present invention in which a main transistor is comprised of an insulated gate bipolar transistor; Fig. 3 is a block circuit diagram showing another embodiment in which a main transistor is comprised of a power MOS transistor; Fig. 4 is a block circuit diagram showing another embodiment in which a main transistor is comprised of an insulated gate bipolar transistor; Fig. 5 is a sectional view of a semiconductor device into which a main transistor and a current detector transistor are integrated; Fig. 6 is a block circuit diagram of an over current protection device according to the prior art; and Fig. 7 is a circuit diagram of an operational amplifier used in the over current protection device according to the prior art. Figure 1 (a) is a block circuit diagram of an embodiment of the present invention in which a main transistor is a MOS transistor, and Fig. 1 (b) is a graph showing response characteristics of the embodiment of Fig. 1 (a). Figure 2 is a block circuit diagram of an embodiment of the present invention in which a main transistor is an insulated gate bipolar transistor. Figure 3 is a block circuit diagram showing another embodiment modified from Fig. 1(a). Figure 4 is a block circuit diagram showing another embodiment modified from Fig. 2. And Fig. 5 is a sectional view of a semiconductor device into which a main transistor and a current detector transistor are incorporated. Throughout these drawing figures, the parts corresponding to those in Fig. 6 are designated by the same reference numerals or symbols, and their explanations are omitted for simplicity. The main transistor 10 and the current detector transistor 20 shown in Fig. 1 (a) are built in a semiconductor device in almost the same structure and their load side terminals are commonly connected as a drain terminal D, as shown in the figure similarly as in Fig. 6. However, a major difference between the embodiment of Fig. 1 (a) and the prior art of Fig 6 exists in that the gate potential is separated between the main and the current detector transistors 10 and 20 as shown in Fig. 1 (a). The electrostatic capacitance of the gate of the current detector transistor 20 is 1 pF or less, i. e. much smaller than 1 nF or more of the main transistor 10, because the current detector transistor 20 is of small capacitance through which a current i in the order of one several thousandth or less of the main transistor 10 flows. The drive command Ss from the drive circuit 3, which designates ON and OFF for example, is fed to the main transistor 10 as usual through gate resistor Rg and directly, in this embodiment, to the current detector transistor 20. A current detecting means Rd is comprised, for example, of a resistor which receives the current i flowing through the current detector transistor 20 and outputs the detection signal Vd indicative of voltage drop across the resistor. A gate control means 50 which receives the detection signal Vd is comprised, as illustrated by a single dotted chain line, of a comparator circuit 30 and a control circuit 40. The comparator circuit 30 compares the detection signal Vd with the reference voltage Vr and outputs a comparison output Sd. Though a comparator may be used as the comparator circuit 30, it is more preferable to use such an operational amplifier as shown in Fig. 7. In this case, a phase compensation capacitor shown in Fig. 7 is not always necessary. Even when a phase compensation capacitor is incorporated, a capacitor with a small capacitance of from several to several ten pF may be used without any trouble. The same control circuit 40 as that of Fig. 6 may be used which feeds the control signal Sc to the gates of the main transistor 10 and the current detector transistor 20 by superimposing the control signal Sc onto the drive command Ss from the drive circuit 3 as illustrated in Fig. 1 (a). In the protection device described above, since the gates of the main and the current detector transistors 10 and 20 are connected with each other via a low resistance of gate resistor Rg, though the gates are separated, an exact linear proportionality holds between the currents I and i of both transistors based on the principle of the Miller's current circuit. As is easily estimated from the above described electrostatic capacitance of the gates, the time constant of the gate of the current detector transistor 20 is usually much smaller than that of the main transistor, less than one thousandth of the time constant of the main transistor. In practice, the time constant ratio shrinks to less than from one several tenth to one several hundredth because of the equivalent resistance of the gate itself and the gate wiring, the small resistance of a resistor connected for adjusting the response of current detection, and the stray capacitance of the wiring. It is effective to adjust the time constant of the gate circuit of the current detector transistor 20 to less than one tenth of that on the side of the main transistor 10 for fully utilizing the effect of the present invention. Figure 1 (b) is a graph showing response characteristics of the embodiment of Fig. 1 (a), i. e. change Δl of the current I of the main transistor 10 when the control signal Sc is abruptly changed. In the figure, the abscissa represents the time t and the ordinate represents the current I. In Fig. 1 (b), curve A represents the response according to the present invention and curve B the response according to the prior art. As to be seen from the figure, though the current I oscillates in the prior art as indicated by the characteristic curve B, the characteristic curve A of the present invention does not show any oscillation and converges to a constant value in a short time after a small peak has occurred. Since current detection response is quick because of the short time constant of the current detector transistor 20 according to the present invention, it becomes unnecessary to forcibly conduct gate control based on the slow current detection response according to the prior art. In the embodiment of Fig. 2, a main and a current detector transistor 11 and 21 are comprised of insulated gate bipolar transistors. Load side collector terminals C of the transistors 11, 21 are connected in common, and an emitter terminal E of the main transistor 11 is grounded. There are no more differences between Fig. 2 and Fig. 1(a) in connection of the transistor 11 with the transistor 21 except the connections described above. As is well known, the insulated gate bipolar transistor is especially suitable for large current use. Since the main transistor is comprised of many unit structures, similar to the power MOS transistor, the current detector transistor 21 is easily incorporated with the main transistor 11 by assigning one or two of the unit structures to the current detector transistor 21. In the embodiment of Fig. 3, the gate control means 50 is configured more simply than in the embodiments described above. In Fig. 3, a field effect type control transistor 51 is incorporated into the gate control means 50 and the operation threshold of the gate of the control transistor 51 is utilized as the limit value with which the voltage of the detection signal Vd from the current detecting means Rd is compared. For this purpose, the detection signal Vd is fed to the gate of the control transistor 51 to switch on the control transistor 51 when the voltage value of the detection signal Vd exceeds the threshold value of the gate as shown in the figure. In the illustrated embodiment, the gate potential of the main transistor 10 and the gate potential of the current detector transistor 20 are lowered through a resistor 52 when the control transistor 51 is switched on to protect the main transistor from an over current. Since variation of the gate threshold value of the control transistor 51 can be maintained within ± 10%, the gate threshold value can satisfactorily be used as the limit value with which the voltage value of the detection signal Vd is compared for over current protection. The resistance value of the current detecting means Rd is, though different case by case, preferably set within a range between several Ω and 1 kΩ when the gate threshold value of the control transistor 51 is 1 V as usual. The resistor 52 is incorporated into the gate control means 50 in Fig. 3 for limiting a leakage current which flows via the control transistor 51 when the polarity of the drive command Ss from the drive circuit 3 turns to negative and for adjusting the gain of the control transistor 51 at a not too high value. In this embodiment, the time constant of the gate circuit of the current detector transistor 20 is adjusted by connecting a gate resistor rg of small resistance value so as to maintain the proportionality of the ratio of current of the current detector transistor 20 to the current of the main transistor 10 as constant as possible even when the load 1 abruptly changes. Though the main transistor 10 and the current detector transistor 20 are shown as the MOS transistors in Fig. 3, the transistors 10, 20 may be insulated gate bipolar transistors. Further, a gate resistor rg may also be employed in the embodiment of Fig. 2 as indicated in the figure. In the embodiment shown in Fig. 4, the main transistor 11 and the current detector transistor 21 are insulated gate bipolar transistors. In contrast to the embodiments described above in which the main transistor 11 is used for example as a high side switch, in the embodiment of Fig. 4, the main transistor 11 is used as a low side switch connected directly to a power supply 2. The gate resistor rg is connected to the current detector transistor 21 also in this embodiment. In Fig. 4, the control transistor 51 is incorporated into the gate control means 50 as in Fig. 3. In Fig. 4, a Zener diode 53 and a diode 54 are used in place of the resistor 52. The Zener diode 53 is used for preventing oscillation, which often happens in association with an abrupt change of the gate potential, by setting a minimum potential for the gates of the main and the current detector transistors 11, 21. Thus the Zener diode 53 provides a function which corresponds to the above described gain adjustment by the resistor 52. The diode 54 prevents the aforementioned leakage current or a reverse current from flowing to the drive circuit 3 when the drive command Ss turns to negative. In the embodiments shown in Figs. 3 and 4, the electrostatic capacitance of the main power transistor 10 or 11 is typically about 5 nF, the electrostatic capacitance of the small current detector transistor 20 or 21 is less than 1 pF, and the capacitance ratio is from 1000 to 10000 : 1. It has been found by an experiment, in which the gate resistor Rg for the main transistor 10 or 11 was set to 100 Ω and the gate resistor rg for the current detector transistor 20 or 21 was varied, that the oscillation prevention function as shown by the curve A in Fig. 1 (b) is obtained with excellent reproducibility in a wide range of the gate resistor rg of from 1 Ω to 10 kΩ. In place of the MOS transistor for the control transistor 51 of the gate control means 50 of Figs. 3 and 4, a transistor or a switching element which has an operation threshold on the input side such as a junction type field effect transistor, a bipolar transistor, etc., may be used. Though a MOS transistor or an insulated gate bipolar transistor is used for the main transistor 10 or 11 in Figs. from 1 to 4, the present invention is also applicable to all the power semiconductor devices comprised of a semiconductor device having an insulated gate such as a MOS gate type thyristor. A structure which is suitable for incorporating MOS transistors as the main and current detector transistors 10 and 20 into a semiconductor device will be explained with reference to Fig. 5. Figure 5 shows two unit structures for the main transistor 10 on the right hand side of the figure and one unit structure for the current detector transistor 20 on the left hand side. A semiconductor base plate 60 is comprised of an n-type semiconductor substrate 61 and an epitaxial layer 62 grown on the semiconductor substrate 61. The transistors 10 and 20 with vertical structure are built into the epitaxial layer 62 from the surface side. At first, a deep well 63 for each unit structure and a stopper layer 64 between the transistors 10 and 20 with impurity concentration of from 10 17 to 10 18 atoms/cm 3 are simultaneously diffused into the depth of from 4 to 8 µm from the surface of the epitaxial layer 62. Then a so-called field oxide film of about 1 µm in thickness is deposited as insulation film 65 on the entire surface of the epitaxial layer 62. The field oxide film is etched off leaving a portion between both transistors behind. A very thin gate oxide film 66 is then deposited on the surface of the etched-off portion. Then, photo-etching and patterning is applied to polycrystalline silicon grown for a gate 67. The gate 67 is directly formed on the gate oxide film 66 on the side of the main transistor 10. On the side of the current detector transistor 20, an extended portion 67a of the gate 67 is extended from above the gate oxide film 66 over to the insulation film 65. In the embodiment of Fig. 5, the extended portion 67a of the gate 67 is also extended from the edge of the unit structure for the main transistor 10 over to the insulation film 65. After the gate 67 is formed, a p-type well layer 68 and a pair of n-type source layers 69 are built in for each unit structure in a so-called double diffusion structure by ion implantation of p-type and n-type impurities using the gate 67 as a mask and by simultaneous thermal diffusion of the implanted impurities. For example, the p-type well layer 68 with impurity concentration of 10 17 atoms/cm 3 is diffused deeply down to the depth of from 2 to 4 µm and the n-type source layer 69 with impurity concentration of 10 19 atoms/cm 3 is diffused to shallow depth. Then, the surface is covered with interlayer insulation film 70, predetermined portions of which are then opened for windows. An aluminum electrode 71 is then deposited to form a source terminal S1 of the main transistor 10 and a source terminal S2 of the current detector transistor 20. Electrode film 71 is deposited also on the back surface of the base plate 60 to form a common drain terminal D of the transistors 10, 20. Gate terminals 61 and 62 of the transistors 10 and 20 are individually led out from the portions not shown in Fig. 5. The current detector resistor Rd and the gate resistor Rg are built in the semiconductor base plate 60 in the form of, for example, so-called diffused resistors. In each, the main transistor 10 and the current detector transistor 20 thus built in, a channel is formed in the surface portion of the well 68 beneath the gate 67. Electrons as the majority carriers flow from the source layer 69 connected to the source terminals S1, S2 into the epitaxial layer 62 through the channel and then the electrons flow vertically to the drain terminal D through the semiconductor substrate 61. Figure 5 will illustrate a structure of an insulated gate bipolar transistor when the semiconductor substrate 61 is replaced by a p-type one. When the transistors 10 and 20 are arranged side by side as shown in the figure, electric charges are induced on the surface of the epitaxial layer 62 between the transistors 10 and 20, and a leakage current flows from the current detector transistor 20 to the main transistor 10, which tends to cause an error in current detection. However, the embodiment of Fig. 5 prevents the leakage current by reducing an electric field gradient on the epitaxial layer 62 with the relatively thick insulation film 65 covering the surface of the epitaxial layer 62 and the extended portion 67a of the gate 67 disposed on the insulation film 65. Furthermore, the embodiment of Fig. 5 almost completely shuts off the leakage current with the p-type stopper layer 64 in-diffused in the surface portion of the n-type epitaxial layer 62 around the gap between the edges of the extended portions 67 as of the gates of the transistors 10 and 20. The stopper layer 64 is preferably biased to the electric potential of the source terminal S1 or S2, among which the electric potential of the source terminal S2 is especially recommended, though the electric potential of the stopper layer 64 may be floated. The provision of the stopper layer 64 does not increase processing steps, since the stopper layer 64 is in-diffused simultaneously when the deep well 63 is formed in each unit structure for preventing latch-up. In Figs. 1 to 4, the over current protection device is shown for one main transistor 10 or 11. The over current protection device of the present invention may be provided for each of plural main transistors or for one representative transistor and a drive circuit 3 in common to the main transistors, since from 4 to 6 main transistors are used in a three-phase or two-phase bridge circuit for a power inverter or for motor drive. Since the integrated circuits into which the over current protection device is incorporated with several main transistors 10 or 11 have been increasing in these days, the structure of Fig. 5 can be effectively applied to these integrated circuits. The over current protection device of the present invention is best suited for over current protection of large capacity main transistors having a withstand voltage of from 600 to 2000 V and a rated current of from 10 to several hundreds A. The present invention has solved the problem of the prior art based on the finding that oscillation at gate control in over current protections is prevented simply by improving the response of gate control on the side of the current detector transistor. According to the present invention, which protects the main transistor from over current by reducing the electrostatic gate capacitance of the current detector transistor by separating the gate of the current detector transistor from the gate of the main transistor, by setting the time constant of the detector transistor gate circuit at a much shorter value than, preferably at less than one tenth of, the time constant of the main transistor gate circuit, by feeding the detection signal obtained by detecting the current flowing through the detector transistor with a current detecting means to the gate control means, and by controlling the gates of the main and current detector transistors when the detection signal exceeds a predetermined limit value, the following effects are obtained. (a) Since the present invention eliminates the unbalance between the feedback system of quick response and the current detection system of slow response in the prior art, by shortening the time constant of the gate circuit of the current detector transistor and by improving the response speed of the current detection system, the present invention allows to avoid circuit oscillation relating to the over current protection without forcibly conducting gate control on the main and the current detector transistor. (b) The present invention allows to fully utilize the quick response of the feedback system to realize quicker over current protection and incorporating the over current protection device into an integrated circuit, since the present invention makes it unnecessary to provide the gate control means, in which an operational amplifier is used in the comparator circuit, with a phase compensation function, except a light function if needed, by improving the gate control response of the current detector transistor to prevent the circuit oscillation. (c) The embodiment, which provides the gate control means with the control transistor to the gate of which the detection signal from the current detecting means is fed, and drives the control transistor to control the gates of the main and the current detector transistor when the voltage of the detection signal exceeds the threshold of the gate control transistor, simplifies the circuit configuration of the over current protection device with more practical utility. The embodiment, comprised of a circuit element which sets the minimum value of the gate control voltage for controlling the main and the current detector transistors when the control transistor is in operation, further improves the preventive function against circuit oscillation. (d) The embodiment, in which the insulation film covers the surface portions between the main transistor and the current detector transistor and at least one of the gates of the main transistor and the current detector transistor extends over to the insulation film, and the embodiment, in which the stopper layer of opposite conductivity type to the conductivity type of the semiconductor base plate is formed by in-diffusion from the surface of the semiconductor base plate between the channel portions of the main transistor and the current detector transistor, allow to prevent a leakage current from flowing from the current detector transistor caused by induced electric charges on the semiconductor surface and improve over current detection precision by the improvement of the proportionality between the over and detected currents.

Claims: An over current protection device for protecting a main transistor (10; 11) having an insulated gate from an over current, comprising: a current detector transistor (20; 21), connected in parallel with said main transistor (10; 11) for detecting a current proportional to the current of the main transistor, the current detector transistor (20; 21) having substantially the same structure as said main transistor (10; 11) and having its gate separated from the gate of said main transistor (10; 11); a current detecting means (Rd) for detecting the value of a current flowing through said current detector transistor (20; 21) and for outputting a detection signal indicative of said value; a gate control means (50) for controlling the gate potential of said main transistor (10; 11) and that of said current detector transistor (20; 21) when said detection signal exceeds a predetermined limit value such as to protect said main transistor (10; 11) from an over current; a main transistor gate circuit including means (Rg) for connecting said gate control means (50) with the gate of said main transistor (10; 11); and a detector transistor gate circuit including means for connecting said gate control means (50) with the gate of said current detector transistor (20; 21), characterized in that the time constant of said detector transistor gate circuit is set shorter than the time constant of said main transistor gate circuit such that oscillation in gate control of said main transistor is prevented. The device as claimed in claim 1, wherein said time constant of said detector transistor gate circuit is set to less than one tenth of the time constant of said main transistor gate circuit. The device as claimed in claim 1 or 2, wherein said gate control means (50) comprises a comparator circuit (30) for comparing the value of said detection signal with a predetermined reference value and for outputting an output signal when the value of said detection signal exceeds said reference value, and a control circuit (40) for outputting, in response to said output signal, a control signal for controlling the gate potential of said main transistor (10; 11) and the gate potential of said current detector transistor (20; 21) such as to protect said main transistor (10; 11) from an over current. The device as claimed in claim 1 or 2, wherein said gate control means (50) comprises a control transistor (51) having a predetermined operation threshold which is operated when a voltage value of said detection signal exceeds said threshold, thereby to control the gate potential of said main transistor (10; 11) and the gate potential of said current detector transistor (20; 21). The device as claimed in claim 4, further comprising a circuit element (53), incorporated with said control transistor (51), for setting minimum gate control voltage values for said main transistor (10; 11) and said current detector transistor (20; 21) when said control transistor is in operation. The device as claimed in any one of the preceding claims, further comprising: a semiconductor base plate (60) into which said main transistor (10) and said current detector transistor (20) are built in side by side each having a channel portion in a surface portion of said base plate (60); and an insulation film (65) covering surface portions between said main transistor (10) and said current detector transistor (20); wherein at least one of the gates of said main transistor (10) and said current detector transistor (20) is extended to cover said insulation film. The device as claimed in in any one of the preceding claims, further comprising: a semiconductor base plate (60) into which said main transistor (10) and said current detector transistor (20; 21) are built in side by side each having a channel portion in a surface portion of said semiconductor base plate; and a stopper layer (64) of a conductivity type opposite to that of said semiconductor base plate, formed by in-diffusion from the surface of said semiconductor base plate between said channel portions of said main transistor (10; 11) and said current detector transistor (20; 21). The device as claimed in any one of the preceding claims, wherein a drive command (Ss) for controlling ON and OFF of said main transistor (10; 11) is applied to the connection between gate control means (50), said main transistor gate circuit and said detector transistor gate circuit.

Inventors: FUJIHARA TATSUHIKO, FURUHATA SHOICHI, KIUCHI SHIN, MORIMOTO TETSUHIRO, OYABE KAZUNORI, YANO YUKIO, YOSHIDA KAZUHIKO, FUJIHARA, TATSUHIKO, FURUHATA, SHOICHI, KIUCHI, SHIN, MORIMOTO, TETSUHIRO, OYABE, KAZUNORI, YANO, YUKIO, YOSHIDA, KAZUHIKO, FUJIHARA, TATSUHIKO, C/O FUJI ELECTRIC CO., LTD., FURUHATA, SHOICHI, C/O FUJI ELECTRIC CO., LTD., KIUCHI, SHIN, C/O FUJI ELECTRIC CO., LTD., MORIMOTO, TETSUHIRO, C/O FUJI ELECTRIC CO., LTD., OYABE, KAZUNORI, C/O FUJI ELECTRIC CO., LTD., YANO, YUKIO, C/O FUJI ELECTRIC CO., LTD., YOSHIDA, KAZUHIKO, C/O FUJI ELECTRIC CO., LTD.
Applicants: FUJI ELECTRIC CO LTD, FUJI ELECTRIC CO. LTD.
Application year: 1994
Main classification: H03K17
IPC codes: H02M1, H03K17, H01L27, H02H7, G05F1, H01L29