Character display circuit and method for superimposing character code during blanking period of video signal

Abstract: A character display circuit in which a circuit (1, 9, 10, 11, 12, 13, 14, 16; 22) for generating a character display timing signal in synchronism with vertical and horizontal synchronizing signals controls the frequency for dots constituting a character font such that it is integer multiple of the frequency for bits of a caption code, character coded data conforming to a format of the caption code is generated (2, 7, 8; 22) in synchronism with a predetermined horizontal synchronizing signal during the blanking period of a video signal, and coded data is superimposed (11; 23, 29, 30) on the video signal.

Description: BACKGROUND OF THE INVENTION The present invention relates to a character coding arrangement having the function to display a character by superimposing a character code on a video signal, a method for character display and a character signal generator, and more particularly to a character coding arrangement, a method and a character signal generator according to the preambles of claims 1, 7 and 11, respectively. Conventional character display circuit, method and generator are known from US-A-5,097,348. Conventional, a character display circuit for generating a character display timing signal referenced to vertical and horizontal synchronizing signals of a video signal and displaying a character pattern on the television screen and VBI (video blanking interval) character coder used for closed caption are constructed in the form of separate circuits. For example, M35040 manufactured by Mitsubishi Denki is commercially available as the character display circuit. On the other hand, CX-7907A manufactured by Sony is available as a character coding circuit utilizing the vertical blanking period as in the case of a character broadcast signal. A known example of technique utilizing character broadcast is described in JP-A-2-91875. In some of VTR for business VSe, a character display circuit and a VBI character coder are provided separately and a caption signal is superimposed during the blanking period of a video signal when recording is carried out by using the VTR. Through this, when a closed caption decoder (hereinafter simply referred to as CCD) is built in a TV, a caption can be reproduced, on the TV side, from a signal reproduced by the VTR. For example, with a date/time of recording superimposed on a video signal, the date/time of video recording can be confirmed on the TV screen at any time and the caption can be erased as necessary. Accordingly, in contrast to the case where a display character is superimposed directly on image data, the recording picture will not be hindered. Additionally, the VBI character coder provided for the VTR is used for superimposition of digital data generated concomitantly with the recording picture such as absolue addresses on the tape and editing control marks. But, due to the fact that the character display circuit and the VBI character coder are constructed in the form of separate circuits, there arises a problem that the circuit configuration is complicated. SUMMARY OF THE INVENTION An object of the present invention is to provide novel character coding arrangement, a method and a character signal generator which can fulfill the function of the VBI character coder in addition to the function of the conventional character display circuit in order to significantly simplify the circuit configuration. This object is accomplished by a character coding arrangement according to claim 1, a method according to claim 7 and a character signal generator according to claim 11. The principle of the character code generator according to the invention will now be described. The ordinary character display function can be realized by substituting a character display timing signal generated in a character display circuit for an original video signal. Character/caption broadcast can also be realized by substituting a coded character timing signal for a specified horizontal synchronizing signal. Thus, the dot frequency of font ROM data for character pattern generation is so defined as to be integer multiplied by the frequency for clock, data "0 "or data"1 "in the character/caption broadcast. Under this condition, ROM data corresponding to a display character is arrayed on the predetermined horizontal synchronizing signal. The correspondence is shown in Figs. 1 and 2. Fig. 1 shows a coded portion in character broadcast based on the closed caption standard EIA-608 in USA. Character broadcast data is superimposed on the 21 H of the horizontal synchronizing signal and is coded pursuant to an NRZ system of 503KHz. Codes of two characters are inserted in a data portion of 16 bits. Figs. 2A to 2D show an example of a character pattern string for generation of character broadcast data according to the present invention. In this example, one character is composed of a pattern of 8 × 8 dots and the frequency for one dot is set to 503KHz × 8 = 4.024MHz. When the frequency for one character constituting a character pattern is set to be equal to the clock frequency in the character broadcast, one character corresponds to one bit of the character broadcast data and control can be most simplified. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows a code format for character broadcast in USA. Fig. 2A to 2D show an example of character pattern design available when the length of one bit in character broadcast equals a timing for one character in a character display circuit. Fig. 3 shows an example of character pattern design available when the length of 4 bits in the character broadcast equals three characters in the character display circuit. Fig. 4 is a block diagram of a character display circuit according to the present invention. Fig. 5 shows character patterns stored in a character font ROM. Fig. 6 is a flow chart showing the processing procedure for encoding a caption signal. Figs. 7A to 7D show examples of coded characters. Fig. 8 is a block diagram of a VCR using the character display circuit according to the present invention. Fig. 9A is a flow chart showing the procedure for encoding in the VCR of Fig. 8. Fig. 9B is a flow chart showing the procedure for reproduction in the VCR of Fig. 8. Fig. 10A shows an example of a display on the TV screen of data to be encoded. Fig. 10B shows encoded data of Fig. 10A. Fig. 11 shows an example of an OSD (on-screen display) character font string. Fig. 12 shows the correspondence between OSD character font patterns used in Figs. 10A and 10B and encoded data. DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to Figs. 2B, 2C and 2D, there is illustrated an example of character pattern design available when one bit length (D=1/503,488Hz) in character broadcast based on the USA EIA-608 equals the period for one character in a character display circuit. In this case, a font of one character is composed of 8 dots × 8 lines as shown in Figs. 2B to 2D. Namely, in this case, one bit in the character broadcast is composed of 8 dots. Accordingly, the dot frequency in the character display circuit is required to be equal eight multiplied by the clock frequency (1/D) in the character broadcast, i.e., (1/D) × 8 = 4.024MHz. A character pattern of a clock portion is shown in Fig. 2B. Seven of the character patterns are arrayed on the same line, thereby forming a clock signal in the character broadcast shown in Fig. 1. Data "0 "is shown in Fig. 2C and data "1" is shown in Fig. 2D. The data pieces are arrayed on the same line in accordance with a data string in the character broadcast, thereby generating a character broadcast signal. Fig. 3 shows an example of character pattern design available when the length of four bits (4D) in the character broadcast equals three characters in the character display circuit. When one character is composed of 8 dots × 8 lines as in the case of Fig. 2, D is composed of 6 dots and the dot frequency must be (1/D) × 6=3.018MHz. As shown at 1 ○ to in Fig. 3, ten kinds of character patterns must be prepared. By arraying the character patterns on the same line in accordance with a character broadcast data string, a character broadcast signal can be generated. As a circuit for display of the character signal on the display unit, a known circuit can be used. Referring to Figs. 4 to 6, the specific processing procedure for coding a caption signal by using the character display circuit will now be described. The character display circuit is generally designated by reference numeral 1. Prepared in a character font ROM 2 are character patterns as shown in Fig. 5. A hexadecimal code hatted left above indicates a character code stored in a display data memory 3. Codes "2D", "2E" and "2F" designate patterns which are particularly prepared in the present invention for the purpose of coding the caption signal. Since in the present embodiment one character is composed of 12 dots, the dot frequency is 12 multiplied by the bit frequency of the caption signal in USA, that is, (1/D) × 12 = 6.042MHz. Available as a video signal source for superimposition of the caption signal is a video camera 17, a VCR (video cassette recorder) 18 or an LDP (laser disc player) 19 as shown in Fig. 4. In the character display circuit 1, a video signal inputted from the video signal source is processed by a video signal processor 10 and used to cause a display control circuit 7 to deliver a character display timing signal referenced to vertical and horizontal synchronizing signals generated by a synchronous separation circuit 9. A display position control circuit 6 is loaded with a character code to be displayed from the display data memory 3 to set corresponding character font ROM data at a display position determined in relation to a reference point designated by a vertical position register 4 and a horizontal position register 5. The ROM data is delivered, through a shift register 8, in the form of character dot data and superimposed on the video signal by means of a mixing circuit 11. A display character controller 12 adapted to perform generation and communication of data stored in the display data memory 3. A display position controller 13 is adapted to perform generation and communication of data stored in the vertical position register 4 and horizontal position register 5. A character signal coded data generator 15 designates a character to be superimposed during the blanking period of the video signal and generates data indicative of the character. A character display data input unit 16 generates a character display data corresponding to a character display timing signal referenced to vertical and horizontal synchronizing signals of the video signal. The character display timing signal is character data which can be displayed on the TV screen without being decoded so as to be recognized as a character by persons. A display data coder 14 has a conversion table for assigning "2D", "2E" and "2F" to the "clock", data "1" and data "0" of the caption code, and "00" to "2c" to each character display data respectively, as shown in Fig. 5 and converts data generated by the character signal coded data generator 15 and data generated by the character display data input unit 16 into display data codes which conform to the character display circuit 1. Alternatively, the display character controller 12, display position controller 13 and display data coder 14 can be constructed as part of a microcomputer. The procedure for coding control will now be described with reference to Fig. 6. Steps 51 to 54 are carried out in the display data coder 14. Step 51: A character to be coded into a caption signal is converted into a binary number. For example, in the case of "AB", conversion into "01000001 01000010" is effected. (Fig. 7A) Step 52: 2 bits for STOP and 1 bit for START are added. (Fig. 7B) Step 52: 7 bits for CLOCK are added. (Fig. 7C) Step 54: Data is coded into corresponding fonts by using the conversion table. In this example, the clock, "1" and "0" are converted into "2D", "2E" and "2F", respectively. Step 55: Predetermined values are set in the horizontal position register 5 and vertical position register 4 by means of the display position controller 13. In the case of the caption signal in USA, the horizontal position is set to 10.5 µs and the vertical position is set to 21 H line. Step 56: Data coded in step 54 and having 26 bytes in total is transferred to the display data memory 3 by means of the display character controller 12. (Fig. 7D) Step 57: The synchronous separation circuit 9 detects a vertical synchronizing signal separated from a video signal on which the caption signal is to be superimposed. The display position control circuit 6 counts out a horizontal synchronizing signal from the vertical synchronizing signal and delivers an output indicative of the character at 21 H line. Step 58: Coded data delivered out in the form of a character display timing signal is superimposed on the video signal by means of the mixing circuit 11. Step 59: The 21 H line is waited for to pass. When the 21 H line is over, the superimposition of the caption signal ends. As an embodiment of the present invention, an instance will be described in which the date of video recording is recorded as closed caption data on a VCR. This is meritorious in that the date of video recording can be displayed only when needed during reproduction, without interfering in the screen when ordinary video appreciation proceeds. Fig. 8 is a block diagram showing the construction of the VCR. In a video signal processor 31, signal processings related to recording and reproduction of a video signal are carried out. A video signal to be recorded on a magnetic tape is recorded while a caption code being superimposed on a a video output of a tuner 21 at 21 H line. The caption code delivered out of a character display circuit 22 according to the present invention is superimposed on the video signal by means of an adder 29 when a switch circuit 23 is transferred to a contact A. A flow chart during reproduction is shown in Fig. 9B. During reproduction, a synchronizing signal is separated from the VTR output signal in synchronism separation circuit 26, and vertical and horizontal synchronizing signal outputs are counted by a caption code decoder 24 to detect the 21 H line of a reproduced video signal (step 71) and the reproduced video signal is decoded and transferred to a controller 25 (step 72). A result of decoding is converted by a controller 25 into a character code which in turn is delivered to the character display circuit 22 (step 73). The character display circuit 22 responds to the inputted character code to generate a character display timing signal standing for a conventional character pattern (step 74). The generated character display timing signal passes through a contact B of the switch circuit 23, superimposed on the reproduced video signal by means of an adder 30 (step 75) and delivered to a TV through an RF converter 32 (step 76). Encoded data during recording of the caption code, for example, date/time data is prepared by output data of a timer circuit 27. Selection as to whether caption data is displayed during reproduction is effected by an ON/OFF switch 28. In a caption code encode OSD (On-Screen Display) font, one character is composed of 8 dots and in an example to be described below, one bit of caption code is composed of 6 dots. Specifically, the procedure for encoding date/time data into a caption code will be described with reference to Fig. 9A and Figs. 10A and 10B. In step 61, following start of video recording, date/time data standing for an output of the timer circuit 27 is converted into a hexadecimal code of ASCII. For example, a character "0" is indicated by "30" (0011 0000) in terms of hexadecimal code. In step 62, a control code is added by the controller 25. In an example of Fig. 10A, in order to provide a display of white character at 15-th line, a code of "1460" is added. As shown in Fig. 10B, the addition of control code is repeated twice under a promise made for the decoding side. In step 63, the hexadecimal code is converted by the controller 25 into an OSD (on-screen display) character font string shown in Fig. 11. This font string is determined under the standard such as for example EIA-608, according to which 7 bits of clock, 2 bits of stop and 1 bit of start are always added to the front of data of 16 bits per 1 H line. A font pattern of (G)(H)(I) shown in Fig. 10B corresponds to the additional bits. In an example of Fig. 10B, 4-bit data is prepared by 3 characters of OSD font and combinations of the 4-bit data (0) to (F) and 3-character font of CLOCK, STOP and START are shown in Fig. 12. In Fig. 12, a numeral or letter parenthesized indicates a hexadecimal number. Thus, for example, in the case of date/time data as shown in Fig. 10A, the OSD font data shown at the OSD font string in Fig. 10B is prepared. In step 64, the data is delivered at a rate of one line of OSD font string in synchronism with the vertical synchronizing signal (frame) from the character signal generator 22 so as to be recorded on odd fields of 21 H line. In step 65, the end of delivery is checked. In step 66, as long as the video recording continues to proceed, the encoding processing in steps 61 to 65 is carried out while updating date/time data. Through the above procedure, the date and time of video recording can be recorded as a closed caption code. Reference materials of Nikkei Electronics, 1991.9.30 (No. 539), pp 149 - 158 and Motorola Semiconductor TECHNICAL DATA MC144143 describe the operation during reproduction of the closed caption code and reference should be made thereto.

Claims: A character coding arrangement comprising a character display circuit (1, 9-14, 16, 22) for generating a character display timing signal in synchronism with vertical and horizontal synchronizing signals, said arrangement further comprising: means (9, 6, 22) for detecting a predetermined horizontal synchronizing signal within a blanking period of a video signal, characterised in that it comprises : means (2, 7, 8, 22) for generating character coded data, conforming to a signal coding format of a character broadcast signal used for closed captions, by encoding the character data using the dot patterns provided by said character display circuit (22), in synchronism with said detected predetermined horizontal synchronizing signal; and means (11, 23, 29) for selectably superimposing said generated character coded data on said video signal within the blanking period of said video signal. A character coding arrangement according to claim 1, wherein said means for generating character coded data includes means (Figs. 2A to 2D, Figs. 3, 5 and 12) for generating coded data in which the integer multiple of the period for dots constituting one character equals one bit of the character broadcast coded signal. A character coding arrangement according to claim 2, wherein said means for generating coded data includes means (Figs. 2A to 2D) for generating a pattern in which the period for one character equals one bit of the character broadcast coded signal and character fonts correspond to "clock", data "0" and data "1" of the character broadcast coded signal. A character coding arrangement according to claim 2, wherein said means for generating coded data includes a ROM (2). A character coding arrangement according to claim 1, wherein said means for selectably superimposing includes means (23) for performing switching between a superimposition on an input video signal or on an output video signal from a video signal processor (31). A character coding arrangement according to claim 1, further comprising: means (24) for decoding the character broadcast coded signal superimposed on an output video signal; and means (23, 30) for superimposing a character display timing signal delivered out of said means for generating a character display timing signal on said output video signal on the basis of an output of said decoding means. A character coding method comprising the steps of: generating (51 to 56) character coded data conforming, to a signal coding format of a character broadcast signal used for closed captions by encoding the character data using dot patterns provided by a character display circuit for generating a character display timing signal in synchronism with vertical and horizontal synchronizing signals: detecting (57) a predetermined horizontal synchronizing signal within a blanking period of a video signal; and superimposing (58) said coded data on said video signal in synchronism with said detected predetermined horizontal synchronizing signal within the blanking period of said video signal. A character coding method according to claim 7, wherein said step of generating character coded data includes performing control such that the integer multiple of the period for dots constituting one character equals one bit of the character broadcast coded signal. A character coding method according to claim 8, wherein said step of generating character coded data includes performing control such that the period for one character equals one bit of the character broadcast coded signal. A character coding method according to claim 7, further comprising the steps of: decoding (71, 72) a character broadcast coded signal superimposed on an output video signal; generating (73, 74) a character display timing signal on the basis of said decoded data; and superimposing (75) said character display timing signal on said output video signal. A character signal generator comprising means for generating a character display timing signal referenced to vertical and horizontal synchronizing signal of a video signal, which character display timing signal is adapted to provide a signal to be superimposed onto said video signal and to be displayed concomitantly with it, characterized in that it further comprises means for generating a character coded signal, conforming to a signal coding format of a character broadcast signal used for closed captions by encoding character data using the dot patterns provided by said means for generating (22), and adapted to be superimposed onto said video signal during a blanking period, for the purpose of recording the resulting video signal.

Inventors: OHNO SHOJI, OHNO, SHOJI
Applicants: HITACHI LTD, HITACHI, LTD.
Application year: 1994
Main classification: H04N7
IPC codes: H04N5, H04N7