Semiconductor package

Abstract: In a semiconductor package comprising a heat spreader, a heat sink, a wiring board, and a connector, a heat spreader mounted on a remaining region of the upper surface of a substrate. The heat sink is thermally connected to a primary integrated circuit chip through the heat spreader and to a secondary integrated circuit chip. The heat sink has electrical conductivity. The heat sink comprises a base plate and at least one connecting member which perpendicularly extends from the base plate. A wiring board has a plurality of contact holes and a plurality of contact slits. A connector is mounted on the wiring board. The connector has a plurality of contacts. The contacts comprises a plurality of socket portions and a plurality of terminal portions. The contacts are connected to an input/output pins with the input/output pins inserted into the respective socket portions. The terminal portions are inserted into the respective contact holes. The connector has at least one ground contact. The ground contact comprises a ground socket portion and a ground terminal portion. The at least one ground contact is electrically connected to the at least one connecting member with the connecting member inserted into the ground socket portion. The ground terminal portions are inserted into the contact slits.

Description: Background of the Invention: This invention relates to a semiconductor package, having a heat sink, which packages an integrated circuit chip and, more particularly, to a multi-chip package which enables to cool a multi-chip module and to a shielding package which enables to shield a multi-chip module from electromagnetic interference. A conventional multi-chip package has been proposed in a paper contributed to a technical report, Vol. 1985. 7. 15, pages 270-278 under the title of "NIKKEI ELECTRONICS". The conventional multi-chip package comprises a plurality of integrated circuit chips, a ceramic substrate, a heat sink, and a plurality of input/output pads. The integrated circuit chips are mounted on a lower surface of the ceramic substrate. The heat sink is fixed on an upper surface of the ceramic substrate. Each of the integrated circuit chips generates a heat to conduct the heat to the heat sink through the ceramic substrate. The heat conducted from the heat sink dissipates in the air. Another conventional multi-chip package has been proposed in a paper contributed to a technical report, Vol. 1993. 8, pages 61-63 under the title of "NIKKEI MICRODEVICES". Another conventional multi-chip package comprises microprocessor chip, a ceramic substrate having a cavity section at a lower surface thereof, a plurality of surface mount type packages, and a plurality of input/output pins. The surface mount type packages are mounted on an upper surface of the ceramic substrate. Each of the surface mount type packages includes a static RAM. The microprocessor chip is held in the cavity section. The microprocessor chip generates a heat larger than that which is generated from the static RAMs. A conventional shielding package has been disclosed in a European Patent 0 340 959. The conventional shielding package comprises a wiring board, a plurality of large scale integrated (LSI) circuit chips, a heat sink, a screw, and a nut. Both LSI circuit chips and a heat sink are mounted on the wiring board. The heat sink is fixed to the wiring board by the screw and the nut. An electromagnetic wave generated from the LSI circuit chips is shielded by the heat sink. However, the above-mentioned semiconductor package has following problems. In the above-mentioned another conventional multi-chip package, when the heat sink is fixed on the ceramic substrate so that the heat sink is located just above the microprocessor chip, the cooling efficiency of the surface mount type packages is poor, because the surface mount type package is located at the lee of the heat sink. To solve the above-mentioned problem, previously, the potting has been formed around each of the surface mount type packages so that the heat is conducted to the ceramic substrate. However, in the event, it is difficult to detach the surface mount type packages. When each of the surface mount type packages is modified into a bare chip, similarly, it is difficult to detach the bare chip. In the above-mentioned conventional shielding package, since the heat sink is fixed to the wiring board by the screw and the nut, long time is taken to detach the heat sink and to attach the heat sink. Summary of the Invention: It is therefore an object of this invention to provide a semiconductor package according to claim 1. It is another object of this invention to provide a semiconductor package according to claim 2. The invention is defined by the appended claims. Brief Description of the Drawing: Fig. 1 is a front view showing constitution of a conventional multi-chip package; Fig. 2 is a partial sectional view showing constitution of another conventional multi-chip package, with a heat sink excepted; Fig. 3 is a partial cross-sectional view showing constitution of a conventional shielding package; Fig. 4 is a perspective view showing constitution of a multi-chip package according to a first example not forming part of the present invention with a portion cut away; Fig. 5 is a plan view showing constitution of a multi-chip module according to a first example not forming part of this invention; Fig. 6 is a partial sectional view showing constitution of a multi-chip package according to a first example not forming part of this invention, with a heat sink excepted; Fig. 7 is a partial plan view showing constitution of a heat sink according to a first example not forming part of this invention; Fig. 8 is a partial sectional view showing constitution of a multi-chip package according to a first example not forming part of this invention; Fig. 9 is a sectional view showing constitution of a multi-chip package according to a second example not forming part of this invention; Fig. 10 is a sectional view showing constitution of a multi-chip package according to a third example not forming part of this invention; Fig. 11 is a partial sectional view showing constitution of a shielding package according to a first embodiment of this invention; Fig. 12 is a partial sectional view showing constitution of a shielding package according to a second embodiment of this invention; and Fig. 13 is a perspective view showing constitution of a multi-chip shielding package according to a further embodiment of this invention, with a portion cut away. Description of the Preferred Embodiments: Referring to Figs. 1, 2, and 3, both a conventional multi-chip package for cooling a multi-chip module and a shielding package for shielding a multi-chip module from electromagnetic interference will be described at first in order to facilitate an understanding of the present invention. The multi-chip module consists of a wiring board and a plurality of integrated circuit chips mounted on the wiring board. Fig. 1 is a front view showing constitution of a conventional multi-chip package. Fig. 2 is a partial sectional view showing constitution of another conventional multi-chip package, with a heat sink excepted. Fig. 3 is a partial cross-sectional view showing constitution of a conventional shielding package. In Fig. 1, the conventional multi-chip package comprises a plurality of integrated circuit chips 11, a ceramic substrate 12, a heat sink 13, and a plurality of input/output pads 14. The integrated circuit chips 11 are mounted on a lower surface of the ceramic substrate 12. The heat sink 13 is fixed on an upper surface of the ceramic substrate 12. Each of the integrated circuit chips 11 generates a heat to conduct the heat to the heat sink 13 through the ceramic substrate 12. The heat conducted from the heat sink 13 dissipates in the air. In Fig. 2, another conventional multi-chip package comprises a first integrated circuit chip 21, a ceramic substrate 22 having a cavity section at a lower surface thereof, a plurality of secondary integrated circuit chips 23, and a plurality of input/output pins 24. The secondary integrated circuit chips 23 are mounted on an upper surface of the ceramic substrate 12. Each of the secondary integrated circuit chips 23 includes a static RAM. The microprocessor chip 21 is held in the cavity section. The microprocessor 21 generates a heat larger than that which is generated from the static RAMs. In Fig. 3, the conventional shielding package comprises a wiring board 25, a plurality of large scale integrated (LSI) circuit chips 26, a heat sink 27, a screw 28, and a nut 29. Both LSI circuit chips 26 and a heat sink 27 are mounted on the wiring board 25. The heat sink 27 is fixed to the wiring board 25 by the screw 28 and the nut 29. An electromagnetic wave generated from the LSI circuit chips 26 is shielded by the heat sink 27. Referring to Fig. 4, the description will proceed to a multi-chip package for cooling the multi-chip module according to a first example not forming part of the present invention. Fig. 4 is a perspective view showing constitution of a multi-chip package according to a first embodiment, with a portion cut away. As shown in Fig. 4, a multi-chip package comprises a dissipation section 37 and a multi-chip module 38. The dissipation section 37 comprises a heat spreader 33 and a heat sink 35. The multi-chip module 38 comprises a substrate 22, a primary integrated circuit chip 31, and secondary integrated circuit chips (not shown). It is to be noted that the primary integrated circuit chip 31 has heat generation amount which is larger than that of the secondary integrated circuit chip. The substrate 22 has upper and lower surfaces. The substrate 22 has a cavity section 49 at the lower surface. The primary integrated circuit chip 31 is mounted on the lower surface of the substrate 22 with the primary integrated circuit chip 31 held in the cavity section 49. It is desirable that the primary integrated circuit chip 31 is bare chip, because there raises heat-dissipating efficiency. The secondary integrated , circuit chips are mounted on a predetermined region of the upper surface of the substrate 22. As shown in Figs. 5 and 6, each of the secondary integrated circuit chips 23 are received within a surface mount type package. The secondary integrated circuit chips 23 is mounted on the upper surface of the substrate 22 by soldering. The multi-chip module 38 consists of the substrate 22 and the secondary integrated circuit chips 23 mounted on the substrate 22. The heat spreader 33 is mounted on a remaining region of the upper surface of the substrate 22. A heat transfer sheet 41 is coated on the heat spreader 33. The heat sink 35 is mounted on the heat transfer sheet 41. The heat sink 35 is thermally connected to the primary integrated circuit chip 31 through the heat spreader 33. The heat sink 35 has at least one heat sink hole 35a. The heat spreader 33 is a thermal conductive mounting plate in which a threaded hole 32 is threaded. The heat sink 35 is fixed to the thermal conductive mounting plate 33 by screwing a screw 39 into the threaded hole 32. A flexible thermal conductive member 30 is inserted between the secondary integrated circuit chips 23 and the heat sink 35. The heat sink 35 is thermally connected to the secondary integrated circuit chips 23 through the flexible thermal conductive members 30, since both the heat sink 35 and the secondary integrated circuit chips 23 are bonded to the flexible thermal conductive members 30. The heat sink 35 is thermally connected to the primary integrated circuit chip 31 through the heat spreader 33 and the heat transfer sheet 41, since the heat sink 35 and the primary integrated circuit chip 31 are bonded to the heat transfer sheet 41 and the heat spreader 33, respectively. In the event, since the flexible thermal conductive members 30 have excellent thermal conductivity as described in the following, a first thermal conductive path between the heat sink 35 and the secondary integrated circuit chips 23 is low in the heat resistance. Similarly, since the heat spreader 33, the heat transfer sheet 41, and the adhesive 34 have an excellent thermal conductivity as described in the following, a second thermal conductive path between the heat sink 35 and the primary integrated circuit chip 31 is low in the heat resistance. Each of the surface mount packages 23 is a small outline package (SOP), a small outline j-lead package (SOJ), a thin small outline package (TSOP), and the like. It is desirable that the height of each of the secondary integrated circuit chips 23 is same for connecting fixedly to the heat sink 35. Each of the secondary integrated circuit chips is a cash memory and a peripheral circuit in which the heat generation amount is small. The heat generation amount of the secondary integrated circuit chips are one tenth of that of the primary integrated circuit chip 31. The heat spreader 33 is opposed to the primary integrated circuit chip 31 and is located just above that. The height of the heat spreader 33 is higher than that of each of the secondary integrated circuit chips 23. The heat spreader 33 consists of the material having both an excellent thermal conductivity and an excellent mechanical strength. The heat spreader 33 needs the excellent thermal conductivity, since the excellent thermal conductivity is easy to conduct the heat of the primary integrated circuit chip 31 to the heat sink 35. The heat spreader 33 needs the excellent mechanical strength, since the heat sink 35 is fixed to the heat spreader 33 by screwing so as not to get out the shape of the threaded hole 32. Concretely, the material of the heat spreader 33 is an alloy of aluminium, a sintered alloy of copper and molybdenum, a sintered alloy of copper and tungsten, or the like. The heat spreader 33 is fixed to the substrate 22 by an adhesive 34. The adhesive 34 consists of an excellent thermal conductive material. For example, the adhesive 34 is the solder, and the like. As shown in Figs. 7 and 8, the heat sink 35 covers over the multi-chip module 38. The heat sink 35 consists of a plurality of fins and a base plate. The heat sink 35 has two holes 35a to insert the screw 39 at a center thereof. The heat sink 35 consists of an aluminium, or the like which is excellent thermal conductive material. The flexible thermal conductive members 30 consist of an excellent thermal conductive material and an excellent flexible material. The flexible thermal conductive members 30 need the excellent thermal conductivity, since the excellent thermal conductivity is easy to conduct the heat of the secondary integrated circuit chips 23 to the heat sink 35. The flexible thermal conductive members 30 need the excellent flexibility, since there absorb both the variation of height of the secondary integrated circuit chips 23 and the warping of the heat sink 35. Concretely, the material of the flexible thermal conductive members 30 is a silicon rubber sheet consisting of a silicon resin and the fine particles. The material of the fine particles is the metal oxide, the silicon carbide, boron nitride, or the like. The heat transfer sheet consists of the soft material which has the excellent thermal conductive. For example, the heat transfer sheet 41 is a silicon rubber sheet, a lead foil, solder foil, or the like. The description will proceed to thermal conductive according to the first example. The heat generated from the primary integrated circuit chip 31 is conducted in the order as follows, the primary integrated circuit chip 31, the substrate 22, the adhesive 34, the heat spreader 33, the heat transfer sheet 41, and the heat sink 35. The heat reached to the heat sink 35 is dissipated in the air. The heat generated from the secondary integrated circuit chips 23 is conducted in the order as follows, the secondary integrated circuit chips 23, the flexible thermal conductive member 30, and the heat sink 35. The heat reached to the heat sink 35 is dissipated in the air. According to the first example, since both the first thermal conductive path and the second thermal conductive path are formed simultaneously in the multi-chip package, it is possible to cool simultaneously the secondary integrated circuit chips 23 and the primary integrated circuit chip 31. In detail, according to the first embodiment, there can be obtained five advantageous effects as follows. Firstly, since the first thermal conductive path is formed by the heat spreader 33, it is possible to dissipate efficiently the heat of the primary integrated circuit chip 31 in which the heat generation amount is large. Secondly, since the second thermal conductive path is formed by the flexible thermal conductive member 30, it is possible to dissipate efficiently not only the heat of the primary integrated circuit chip 31 but that of the secondary integrated circuit chips 23. Thirdly, since it is possible to dissipate efficiently the heat of the secondary integrated circuit chips 23, it is unnecessary to cover the secondary integrated circuit chips 23 by the potting and to constitute the secondary integrated circuit chips 23 as a bare chip. Therefore it is possible to attach easily the secondary integrated circuit chips 23 and to detach easily that. Fourthly, since it is not necessary to constitute the secondary integrated circuit chips 23 as a bare chip, it is possible to inspect easily the secondary integrated circuit chips. In addition, since it is possible to inspect the secondary integrated circuit chips 23 before mounting that, the yield of the multi-chip module 38 improves. Fifthly, since the heat sink 35 is fixed to the heat spreader 33 by screwing the screw 39 into the threaded hole 32, it is easy to detach the heat sink 35. Therefore, it is easy to change the surface mount packages 23 in the event of a failure. Referring to Fig. 9, the description will proceed to a multi-chip package for cooling the multi-chip module according to a second example not forming part of the present invention. The illustrated multi-chip package is similar to that illustrated in Fig. 4 except that the dissipation section 37 is modified into a dissipation section 47. The similar parts are represented by the same references as in Figs. 1 to 8. As shown in Fig. 9, the dissipation section 47 comprises a heat sink 45, a stud member 43, and a nut 48. The heat sink 45 has a protruding portion 46. The protruding portion 46 is opposed to the primary integrated circuit chip 31. The heat sink 45 is thermally connected to the primary integrated circuit chip 31 through the protruding portion 46. The protruding portion 46 has a hole 45a at a center thereof. The stud member 43 comprises a rod section and a board section for fixing the heat sink 45 to the substrate 22 with the rod section inserted in the hole 45a and with the board section inserted between the heat sink 45 and the substrate 22. The rod section has a threaded end. The stud member 43 is composed of an excellent thermal conductive material. The stud member 43 needs the excellent thermal conductivity, since the excellent thermal conductivity is easy to conduct heat of the primary integrated circuit chip 31 to the heat sink 45. The stud member 43 is fixed to the substrate 22 by an adhesive 34. A heat transfer sheet 41 is coated on the board section. The heat sink 45 is mounted on the heat transfer sheet 41. The heat sink 45 is thermally connected to the secondary integrated circuit chips (not shown) and to the primary integrated circuit chip 31 through the stud member 43. The heat sink 45 is fixed to the substrate 22 by screwing the nut 48 to the threaded end. The flexible thermal conductive members 30 are inserted between the secondary integrated circuit chips 23 and the heat sink 45. The heat sink 45 is thermally connected to the secondary integrated circuit chips 23 through the flexible thermal conductive members 30, since both the heat sink 45 and the secondary integrated circuit chips 23 are bonded to the flexible thermal conductive members 30. The heat sink 45 is thermally connected to the primary integrated circuit chip 31 through the stud member 43 and the heat transfer sheet 41, since the heat sink 45 and the primary integrated circuit chip 31 are bonded to the heat transfer sheet 41 and the stud member 43, respectively. In the event, since the flexible thermal conductive members 30 have excellent thermal conductivity as described as follows, a first thermal conductive path between the heat sink 35 and the secondary integrated circuit chips 13 is low in the heat resistance. Similarly, since the stud member 43, the heat transfer sheet 41, and the adhesive 34 have excellent thermal conductivity as described as follows, a second thermal conductive path between the heat sink 45 and the primary integrated circuit chip 31 is low in the heat resistance. The heat generated from the primary integrated circuit chip 31 is conducted in the order as follows, the primary integrated circuit chip 31, the substrate 22, the adhesive 34, the stud member 43, the heat transfer sheet 41, and the heat sink 45. The heat reached to the heat sink 45 is dissipated in the air. The heat generated from the secondary integrated circuit chips 23 is conducted in the order as follows, the secondary integrated circuit chips 23, the flexible thermal conductive member 30, and the heat sink 45. The heat reached to the heat sink 45 is dissipated in the air. According to the second embodiment, there can be obtained the advantageous effect similar to that of the first embodiment. Referring to Fig. 10, the description will proceed to a multi-chip package for cooling the multi-chip module according to a third example not forming part of the present invention. The illustrated multi-chip package is similar to that illustrated in Fig. 4 except that the flexible thermal conductive member 30 is modified into a thermal conductive spring 54. The similar parts are represented by the same references as in Figs. 1 to 8. In Fig. 10, each of the thermal conductive springs 54 is inserted between the secondary integrated circuit chips 23 and the heat sink 35. The heat sink 35 is thermally connected to the secondary integrated circuit chips 23 through the thermal conductive springs 54, since both the heat sink 35 and the secondary integrated circuit chips 23 are bonded to the thermal conductive springs 54 by the elastic displacement. The heat generated from the secondary integrated circuit chips 23 is conducted in the order as follows, the secondary integrated circuit chips 23, the thermal conductive spring 54, and the heat sink 35. The heat reached to the heat sink 35 is dissipated in the air. The thermal conductive springs 54 is composed of an excellent thermal conductive material. The thermal conductive springs 54 need the excellent thermal conductivity, since the excellent thermal conductivity is easy to conduct the heat of the secondary integrated circuit chips 23 to the heat sink 35. According to the third example, it is possible to detach the thermal conductive springs 54, at the same time that the heat sink 35 is detached. Therefore, it is easy to change the secondary integrated circuit chips 23. In addition, according to the third example, there can be obtained the advantageous effect similar to that of the first example. Referring to Fig. 11, the description will proceed to a shielding package for shielding a semiconductor device from electromagnetic interference according to a first embodiment of the present invention. In Fig. 11, the shielding package comprises a dissipation section 77 and a connecting section 78. The dissipation section 77 comprises the heat spreader 33 and a heat sink 75. The connecting section 78 comprises the semiconductor device 61, a socket . 67, and a wiring board 66. The semiconductor device 61 comprises a substrate 62 having upper and lower surfaces and having a plurality of input/output pins 65. The primary integrated circuit chip 31 is mounted on the lower surface of the substrate 62. The heat spreader 33 is mounted on the upper surface of the substrate 62. The heat sink 75 is thermally connected to the primary integrated circuit chip 31 through the heat spreader 33. The heat sink 75 has electrical conductivity. The heat sink 75 comprises a base plate and two connecting members 64 which perpendicularly extends from the base plate. Two connecting members 64 are plate. A wiring board 66 has a plurality of contact holes 81 and four contact slits 82. The socket 67 is mounted on the wiring board 66. The connector has a plurality of contacts 68 which comprise a plurality of socket portions 83 and a plurality of terminal portions 84. The contacts 68 are connected to the input/output pins 65 with the input/output pins 65 inserted into the respective socket portions. The terminal portions 84 are inserted into the respective contact holes 81. The socket 67 has two ground contacts 69 which comprises two ground socket portions 85 and two ground terminal portions 86. Each of two ground socket portions 85 has two ground socket elements and two ground terminal elements. Two ground contacts 69 are electrically connected to two connecting members 64 with two connecting members 64 inserted into two ground socket elements. Four ground terminal elements are inserted into four contact slits 82. Two ground contacts 69 are connected to electric ground (not shown). Both two ground contacts 69 and the primary integrated circuit chip 31 are insulated each other. The socket 67 has a lever 60 for operating an inserting/drawing mechanism formed in the socket 67. The input/output pins 65 switch by operating the lever 60. The lever 60 is formed on the outside of the heat sink 75. Therefore, it is possible to operate the lever 60 without detaching the heat sink 75. The heat sink 75 is composed of an alloy of aluminium or an alloy of copper. An electrical conductive coating is coated on the surface of the heat sink 75. For example, there is used a nickel plating as the electrical conductive coating. The heat sink 75 has at least one heat sink hole. The heat spreader 33 is a thermal conductive mounting plate in which a threaded hole 32 is threaded. The heat sink 35 is fixed to the thermal conductive mounting plate by screwing a screw 39 into the threaded hole 32. When the substrate 62 is connected to the wiring board 66, the input/output pins 65 are inserted in the contact holes 81. Simultaneously, two connecting members 64 are connected to two ground contact 69. Thereafter, when the lever 60 is operated by the operator, the input/output pins 65 are held by the socket portions 83. In the event, the substrate 62 moves in a direction parallel to the plane of the wiring board 66, at the same time that the heat sink 75 moves in the above-mentioned direction. The substrate 62 is surrounded by two connecting member 64. The heat sink 75 is connected to the electric ground (not shown) through the ground contact 69. Therefore, an electromagnetic wave generated from the primary integrated circuit chip 31 is absorbed into the heat sink 75 and two connecting members 64. When the socket 67 is the connector by which the substrate 62 does not move in the inserting direction of the connecting members, it is possible to form four connecting members so that the primary integrated circuit chip 31 is surrounded by four connecting members. In the event, the electromagnetic wave from outside the connecting members is perfectly shielded. According to the first embodiment, since the heat sink 75 connects to the electric ground through the ground contact 69, it is easy to attach the heat sink 75 and to detach that. In addition, since the substrate 62 is fixed to the heat sink 75, it is possible to attach the heat sink 75 and the substrate 62 simultaneously. Similarly, it is possible to detach the heat sink 75 and the substrate 62 simultaneously. Referring to Fig. 12, the description will proceed to a shielding package for shielding the semiconductor device from electromagnetic interference according to a second embodiment of the present invention. The illustrated shielding package is similar to that illustrated in Fig. 11 except that the dissipation section 77 is modified into a dissipation section 87. The similar parts are represented by the same references as in Fig. 11. As shown in Fig. 12, the dissipation section 87 comprises a heat sink 95, a stud member 43, and a nut 48. The heat sink 95 has a protruding portion 46. The protruding portion is opposed to the primary integrated circuit chip 31. The heat sink 95 is thermally connected to the primary integrated circuit chip 31 through the protruding portion. The protruding portion has a hole 45a at a center thereof. The stud member 43 comprises a rod section and a board section for fixing the heat sink 95 to the substrate 62 with the rod section inserted in the hole 45a and with the board section inserted between the heat sink 95 and the substrate 62. The rod section has a threaded end. The stud member 43 is composed of an excellent thermal conductive material. The stud member 43 needs the excellent thermal conductivity, since the excellent thermal conductivity is easy to conduct heat of the primary integrated circuit chip 31 to the heat sink 95. The stud member 43 is fixed to the substrate 22 by an adhesive 34. A heat transfer sheet 41 is coated on the board section. The heat sink 95 is mounted on the heat transfer sheet 41. The heat sink 95 is thermally connected to the secondary integrated circuit chips (not shown) and to the primary integrated circuit chip 31 through the stud member 43. The heat sink 45 is fixed to the substrate 62 by screwing the nut 48 to the threaded end. According to the second embodiment, there can be obtained the advantageous effect similar to that of the fourth embodiment. Referring to Fig. 13, the description will proceed to a multi-chip shielding package for shielding the semiconductor device from electromagnetic interference and for cooling the multi-chip module according to a further embodiment of the present invention. This embodiment is combination of the first example and the first embodiment. According to this embodiment, there can be obtained the advantageous effect similar to those of the first example and the first embodiment.

Claims: A multi-chip package for shielding a semiconductor device (61) from electromagnetic interference, said semiconductor device (61) comprising a substrate (62) located between a heat sink (95) and a socket (67), said socket being mounted on a wiring board (66), said substrate having upper and lower surfaces and having a plurality of input-output pins (65), a primary integrated circuit chip (31) mounted on the lower surface of said substrate (62), and secondary integrated circuit chips (23) mounted on a predetermined region of the upper surface of said substrate (62), wherein : the heat sink (95) comprise a base plate and at least one connecting member (64) which perpendiculary extends from the base plate to the socket (67), said base plate having a protruding portion (46) which is mounted on a remaining region of the upper surface of the substrate, said protruding portion is opposed to said primary circuit chip (31), said protruding portion having a hole (45a) at a center thereof; the wiring board (66) has a plurality of contact holes (81) and a plurality of contact slits (82); a stud member (43) is provided, comprising a rod section and a board section, for fixing said heat sink (95) to said substrate (62) with the rod section inserted in the hole (45a) and with the board section inserted between said protruding portion of the heat sink (95) and said substrate (62), the rod section having a threaded end, the board section of the stud member (43) being fixed to said substrate (62) by an adhesive (34); and a nut (48) is screwed to said threaded end, thereby fixing said heat sink (95) to said substrate (62); said socket (67) having a plurality of contacts (68) which comprise a plurality of socket portions (83) and a a plurality of terminal portions (84), said contacts (68) being connected to said input/output pins (65) with said input/output pins (65) inserted into the respective socket portions (83), the terminal portions (84) being inserted into the respective contact holes (81), said socket (67) having at least one ground contact (69) which comprises a ground socket portion (85) and a ground terminal portion (86), said at least one ground contact (69) being electrically connected to said at least, one connecting member (64) with the connecting member (64) Inserted into the ground socket portion (85), the ground terminal portions (86) being inserted into the contact slits (82). A multi-chip package for packaging a multi-chip module (38) and for shielding said multi-chip module (38) from electromagnetic interference, said multi-chip module (38) comprising a substrate (62) located between a heat sink (75) and a socket (67), said socket being mounted on a wiring board (66), said substrate having upper and lower surfaces and having a plurality of input/output pins (65), a primary integrated circuit chip (31) mounted on the lower surface of said substrate (62), and secondary integrated circuit chips (23) mounted on a predetermined region of the upper surface of said substrate (62), wherein : a heat spreader (33) is provided in which at least one threaded hole (32) is threaded and which is mounted on a remaining region of the upper surface of said substrate (62); the heat sink (75) comprises a base plate and at least, one connecting member (64) which perpendicularly extends from the base plate to said socket, said base plate having at least one heat sink hole (35a) and being fixed to said heat spreader by screwing a screw into said threaded hole (32), said heat sink (75) being electrically conductive; said wiring board (66) has a plurality of contact holes (81) and a plurality of contact slits (82); and said socket (67) has a plurality of contacts (68) which comprise a plurality of socket portions (83) and a plurality of terminal portions (84), said contacts (68) being connected to said input/output pins (65) with said input/output pins (65) inserted into the respective socket portions (83), the terminal portions (84) being inserted into the respective contact holes (81), said socket (67) having at least one ground contact (69) which comprises a ground socket portion (85) and a ground terminal portion (86), said at least one ground contact (69) being electrically connected to said at least one connecting member (64) with the connecting member (64) inserted into the ground socket portion (85), the ground terminal portions (86) being inserted into the contact slits (82). A multi-chip package as claimed in Claim 1 or 2, characterized in that said connecting members (64) are plates. A multi-chip package as claimed in Claim 2, characterized in that said heat spreader (33) is opposed to said primary integrated circuit chip (31). A multi-chip package as claimed in Claim 1 or 2, characterized in that said substrate has a cavity section (49) at the lower surface, said primary integrated circuit chip (31) being held in the caviry section (49). A multi-chip package as claimed in Claim 1 or 2, characterized in that said primary integrated circuit chip (31) is a bare chip. A multi-chip package as claimed in Claim 1 or 2, characterized in that said secondary integrated circuit chips (23) are received within a surface mount, type package. A multi-chip package as claimed in Claim 1 or 2, characterized in that said primary integrated circuit chip (31) has a heat generation amount which is larger than that of said secondary integrated circuit chip (23). A multi-chip package as claimed in Claim 1 or 2, characterized in that said multi-chip package further comprises a heat transfer sheet (41) between said base plate of the heat sink (75) and said heat spreader (33) or between said protruding portion (46) and said board section of the stud member (43).

Inventors: NATORI AKIRA, OKADA YOSHIKATSU, SANO TOSHIFUMI, UMEZAWA YOSHIAKI, YAMADA MASAHIRO, NATORI, AKIRA, OKADA, YOSHIKATSU, SANO, TOSHIFUMI, UMEZAWA, YOSHIAKI, YAMADA, MASAHIRO, NATORI, AKIRA, JAPAN AVIATION ELECTR. IND., LTD.
Applicants: JAPAN AVIATION ELECTRON, NIPPON ELECTRIC CO, JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED, NEC CORPORATION
Application year: 1994
Main classification: H01L23
IPC codes: H01L23