ELECTRICAL CIRCUIT USING LOW VOLUME MULTILAYER TRANSMISSION LINE DEVICES

Abstract: A transmission line device (200) employs a first ground plane (118) that is disposed on a first dielectric substrate (202). A first conductive layer (210) that encloses a first area (213) is disposed on a second dielectric substrate (206), which substrate is positioned substantially adjacent to the first dielectric substrate (202). A second conductive layer (211) that encloses an area corresponding to the first area (213) is disposed on a third dielectric substrate (207), which substrate is positioned substantially adjacent to the second dielectric substrate (206). A coil structure is thereby provided that can be employed in the fabrication of a transmission line device, according to the invention.

Description: ELECTRICAL CIRCUIT USING LOW VOLUME MULTILAYER TRANSMISSION LINE DEVICES Field of the Invention The present invention relates generally to electrical circuits, and in particular to such circuits that require low volume transmission line devices. Background of the Invention Electrical transmission lines are used to transmit electric energy and signals from one point to another. The basic transmission line connects a source to a load— e.g. a transmitter to an antenna, an antenna to a receiver, or any other application that requires a signal to be passed from one point to another in a controlled manner. Electrical transmission " lines, which can be described by their characteristic impedance and their electrical length, are an important electric component in radio frequency (RF) circuits. In particular, transmission lines can be used for impedance matching— i.e., matching the output impedance of one circuit to the input impedance of another circuit. Further, the electrical length of the transmission line, typically expressed as a function of signal wavelength, represents another important characteristic of the transmission line device. Manipulation of the characteristic impedance and electrical length of the transmission line device is a well known technique to effect a particular electrical result. In particular, an output impedance, Zout, can be matched to an input impedance, Zjn, according to a well known equation, as later described. Similarly, the attenuation and phase shift of the transmission line device can be altered by changing the physical length of the conductor between the input and output ports of the transmission line device. As an example, a resonant circuit results when the physical length of the conductor approximates an even one-quarter wavelength of the signals nominal frequency. Of course, at high frequencies the wavelength is small and transmission line devices can be built using relatively short conductors in small packages. By contrast, as the nominal frequency of the applied signal decreases, the physical length must necessarily increase to effect the desired transmission line characteristic. The physical length must correspondingly increase to accommodate such applications operating at lower frequencies. Prior art techniques, including microstrip and stripline conductors, have been used successfully in the*- past to construct transmission line devices. Unfortunately, at lower frequencies— e.g., below 1 GHz— the substrates upon which these one-dimensional conductive strips are placed require a relatively large area, due to the excessive length requirements. As today's electronic devices shrink in size, the board space allotted for the necessary electrical components is correspondingly reduced. Thus, a substrate carrying a microstrip or a stripline concjuctor that serves as a transmission line device for low frequency signals simply cannot be accommodated by the available board space. Another technique that is employed can be described as a helical structure disposed inside a grounding cylinder. Such helical coils are well known in the art, but these too are often inadequate for today's applications, where low volume and low cost are critical factors in the manufacture of portable electronic devices. Because of the tight length and impedance specifications, the helical structures become very costly to manufacture. That is, the manufacturing variance that is inherent in the construction of such devices— e.g. conductor diameter, symmetry of windings, and effective number of turns— tends to make the helical structure a less desirable solution for tight tolerance transmission line devices. Further, the cylindrical grounding portion, which feature is required when building a transmission line device, results in a circuit having a relatively large volume, or poor form-factor, that is untenable for many of today's applications. Accordingly, a need exists for a transmission line device that is not constrained by the shortcomings of the prior art. In particular, a device having a substantially lower volume— or one having a better form-factor— than its predecessors would be an improvement over the prior art. Such a device that was also cost effective to manufacture, and could be used at lower operating frequencies, would further provide a distinct advantage over prior art transmission line devices. Brief Description of the Drawings FIG. 1 shows a multilayer ceramic transmission device using vertically stacked half-ring conductors, in accordance with one embodiment of the present invention. FIG. 2 shows a multilayer ceramic transmission device using vertically stacked full-ring conductors, in accordance with a second embodiment of the present invention. FIG. 3 shows a multilayer ceramic transmission device using vertically stacked spiral- conductors, in accordance with a third embodiment of the present invention. FIG. 4 shows a multilayer ceramic transmission device using horizontally stacked strip conductors, in accordance with yet another embodiment of the present invention. FIG. 5 shows a multilayer ceramic power splitter/combiner, in accordance with the present invention. FIG. 6 shows a multiple transmission line device that advantageously employs a vertically stacked transmission line device and a horizontally stacked transmission line device. FIG. 7 shows a circuit that employs a plurality of transmission line devices, which circuit might advantageously employ embedded ground planes, in accordance with the present invention. Detailed Description of a Preferred Embodiment A device having transmission line characteristics can be formed using a multilayer ceramic processing technique. The transmission line device includes at least a first ground plane located on a first dielectric substrate. A first and second conductive layer are disposed on additional dielectric substrates that are substantially adjacent to the first dielectric substrate. The first and second conductive layers each at least partially enclose a corresponding area on their respective dielectric substrates. Arranging the conductive layers and the substantially adjacent ground plane in this manner facilitates a design requiring increased electrical length and a more controllable characteristic impedance for the transmission line device. Further, this arrangement advantageously employs relatively inexpensive multilayer techniques, and therefore provides a low cost, low volume solution to the problems of the prior art. The present invention can be more fully described with reference to FIG.s 1-7. FIG. 1 shows a multilayer substrate arrangement 100 that, when assembled, provides a device having transmission line characteristics. That is, a transmission line device is formed between a signal input port 101 disposed on a top substrate 102 and a signal output port 103 disposed on a bottom substrate 104. Further, intermediate substrates 106-108 (three shown, but could be more or less, as necessary) provide support structure for conductive patterns, or layers 110-1 12, which layers at least partially enclose an area on their respective dielectric substrates 106-108. Though not shown, conductive patterns 1 10- 1 12 are connected by conductive vias at alternating ends of each half-ring to form a continuous conductive path. Another conductive layer 1 14 is disposed on a first major surface 1 16 of the bottom substrate 104, and connected to the others using a conductive via, not shown. The top substrate 102 further includes a metallized area 1 18 that serves as a ground plane for the transmission line device. Similarly, the bottom substrate 104 preferably includes a second ground plane, disposed on a second major surface 120 thereof, which second ground plane generally insures a more stable circuit package due to the shielding, symmetry and boundary effects of the second ground plane. Finally, conductive vias 122, 124 are used to carry the input and output signals through the top substrate 102 and the bottom substrate 104, respectively. In this manner, a multiple-turn coil is provided that is substantially adjacent to one, or preferably two, ground plane(s) to effect a low-volume transmission line device. In a preferred embodiment, the dielectric substrates 102, 104, 106-108 are formed using ceramic materials that can be co-fired with a co-fireable metal composition. Further, the conductive layers 1 10-1 12, 1 14 are preferably deposited on the dielectric substrates as provided by, for example, DuPont's Green Tape™, Systems, thereby producing conductive layers having relatively high conductance values. Similarly, the conductive vias 122, 124— as well as the vias formed on the intermediate substrates 106-108, not shown— are made by at least partially filling the volume of spatially arranged, pre-punched holes in the ceramic using the co- fireable metal composition. Lastly, it should be noted that while conductive layers 110-112 are shown in FIG. 1 as being annulus structures in the form of a half-ring, other annulus structures can be readily employed depending on the application requirements, as next described. Further, while input / output terminals are shown here as being on opposite surfaces of the package, it is understood that they could easily be placed on the same surface. It is critical only that the transmission line device is electrically positioned between the input and output terminals. FIG. 2 shows a multilayer substrate arrangement 200 that employs full-ring annulus structures as the conductive layers, in accordance with an alternate embodiment of the invention. That is, annulus 210 comprises a nearly complete circular layer that substantially encloses an area 213 on dielectric substrate 206. Similarly, annuli 21 1 , 212 comprise near complete circular layers that substantially enclose areas on their dielectric substrates 207, 208, respectively, which areas correspond to the substantially enclosed area 213. Employing annulus structures 210-212 in this manner provides for increasing the physical length of the conductive layers— and hence the electrical length of the transmission line- using the same number of ceramic layers. Of course, this allows for reduced volume of dielectric material required and significantly lower manufacturing costs, as compared to transmission line designs of the prior art. FIG. 3 shows yet another multilayer substrate arrangement 300 that employs spiral structures as the conductive layers. In particular, spiral conductors 310-312 and 314 .are disposed on dielectric substrates 306-308 and 304, respectively, to effect a multilayer transmission line device in accordance with the present invention. Like the full-ring annulus structures described with reference to FIG. 2, the spiral structures advantageously provide increased physical— and electrical— length for those applications with such requirements. Generally, such applications include those circuits operating in the 100 MHz - 3 GHz- frequency range, which frequencies require longer conductive lengths than do high frequency applications. Accordingly, the present invention allows for the manufacture of a low-volume transmission line device that can be used at frequencies substantially lower than those frequencies attainable using prior art techniques. While FIG.s 1 -3 illustrate the use of vertically stacked conductive layers on a plurality of vertically adjacent dielectric substrates, the present invention further anticipates the use of conductive layers that are horizontally stacked on two or more substrates. FIG. 4 shows a multilayer substrate arrangement 400 that employs a plurality of conductive strips arranged on adjacent dielectric substrates to effect a device having transmission line characteristics. As with the vertically stacked embodiments earlier described, the horizontally stacked arrangement includes a top substrate 402 and a bottom substrate 404, as well as conductive vias— not shown— for carrying the input/output signals to/from the intermediate dielectric substrate. Dielectric substrate 403 includes the horizontally stacked conductive strips 406-408 (three shown, but could be more or less, as necessary) , and conductive vias— also not shown— for passing the electrical signal between the dielectric layers. Conductive strips 410, 41 1 , are horizontally arranged on a first major surface 412 of dielectric substrate 404 and coordinate with conductive layers 406-408 to form a multiple- turn coil. The multilayer arrangement 400 further includes a metallized area 414 that serves as a ground plane for the transmission line device. Similarly, a second major surface of dielectric substrate 404 preferably includes a metallized area 416 that serves as a second ground plane for the transmission line device. It should be noted that, while FIG. 4 illustrates a coil having only a few turns, it is understood that the dielectric substrates 403, 404 could have many conductive strips, horizontally arranged to provide the required number of turns (i.e., for increased electrical length). By building a multilayer device in this manner, a low- profile transmission line device is produced that is capable of operating at much lower frequencies than its prior art counterpart. FIG. 5 shows an exploded view of a power splitter/combiner 500, in accordance with the present invention. Top substrate 502 includes an input/output terminal 503 for proving an input/output signal to/from a pair of transmission line devices 421 , 423. Similarly, bottom substrate 504 includes output/input terminals for porting signals from/to the devices. As in the single coil embodiments described with reference to FIG.s 1-3, top substrate 502 includes a metallized area 505 that serves as a ground plane for the transmission line devices, while the bottom substrate preferably includes a second ground plane 507. In a preferred embodiment, intermediate dielectric substrate 506 supports primary conductive layers 421-1 , 423-1 and node 425. It should be noted that undesired coupling between conductive layers 421-1 and 423-1 can be minimized by increasing the separation 508 or by minor adjustments in the conductive patterns, or layers 421 -1 , 423- 1 . A first major surface of the bottom substrate 504 supports secondary conductive layers 421 -2, 423-2, which are disposed substantially adjacent to the intermediate substrate 506 (and connected to primary conductive layers 421 -1 , 423-1 using conductive vias, not shown). Manufacturing a power splitter/combiner in this manner allows for increased design flexibility because a broader range of Zfj values can be attained in a smaller volume package. FIG. 6 shows an exploded view of a multiple transmission line device 600, designed in accordance with the present invention. Top substrate 602 and a second major surface of bottom substrate 604 are effectively identical to those embodiments already described. Intermediate substrate 603 is shown to support the primary coil structure for both a horizontally stacked conductor 606 and a vertically stacked conductor 608. The vertically stacked conductor 606 is produced in substantially the same way as earlier described. The horizontally stacked conductor 606 is produced as follows: a plurality of conductive strips 606-1 are disposed on the intermediate dielectric. A second plurality of conductive strips 606-2 are arranged on a first major surface of the bottom substrate 604. Conductive strips 606-2 are arranged- in such a manner as to, when connected to the conductive strips 606-1 by conductive vias (not shown), produce a horizontally oriented coil. Orienting a second of two required transmission line devices in this manner helps to avoid the problems of undesired electromagnetic coupling that would otherwise be present if the coils were substantially parallel to each other, as is common in prior art circuits. FIG. 7 shows a preferred embodiment for a phase inverting, impedance transforming circuit, as it might be constructed according to the invention. Electrical nodes 621-624 are shown on a top substrate 702 as input/output pads electrically coupled to conductive vias. These conductive vias, as well as others that are appropriately placed throughout the nine substrate layers, are used to pass signals from one layer to another, in a well known manner. Generally, the circuit arrangement 700 comprises one, three-quarter wave transmission line device 707 and three, one-quarter wave transmission line devices 715-717. The longer coil structure 707 is embodied using sections 707-1 disposed on substrate 703 and coil section 707-2 disposed on dielectric substrate 704. Further, a metallized area 71 1 is selectively deposited on substrate 712 and serves as an embedded ground plane for coil structure 707, in accordance with the present invention. Conductive via 714 is used to pass the electrical signal from the first coil section 707-1 to the second coil section 707-2. In this manner, a relatively long conductor can be confined to a small area by taking advantage of the available space in the z-direction (i.e., height) available, while not suffering from the inter-coil problems seen in the prior art. The three, one-quarter wave transmission line devices 715- 717 are similarly disposed on layers 6, 7, and 8. In particular, substrate 718 supports first coil sections 715-1 , 716-1 , 717-1 , while substrate 720 supports secondary coil sections 715-2, 716-2 and 717-2. Further, an embedded ground plane 719 is deposited between the first and second coil stages for each of the one-quarter wave transmission line devices, in accordance with the present invention. In a preferred embodiment, an optional ground plane 721 is deposited on a dielectric substrate 722 (i.e., bottom substrate), to provide an improved capacitance rating for each of the transmission line devices disposed between the top substrate 702 and the bottom substrate 722. In the foregoing manner, a complex electrical circuit that requires many transmission line devices can be constructed in a relatively small area, resulting in a package having a substantially reduced volume. Thus, the present invention ensures a low cost, low volume solution for those electrical circuits employing a plurality of transmission line devices, even those required to operate at relatively low frequencies. What is claimed is:

Claims: Claims: 1 . A transmission line device, comprising: a first ground plane disposed on a first dielectric substrate; a first conductive layer that at least partially encloses a first area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent ^ to the first dielectric substrate; and a second conductive layer that at least partially encloses a second area corresponding to the first area on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate. 2. A transmission line device, comprising: a first ground plane disposed on a first dielectric substrate; a first conductive layer that at least partially encloses a first area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second conductive layer that at least partially encloses a second area corresponding to the first area on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; and a second ground plane disposed on a second major surface of the third dielectric substrate. 3. A transmission line device, comprising: a first ground plane disposed on a first dielectric substrate; a first plurality of conductive strips disposed on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second plurality of conductive strips disposed on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; and conductive means for connecting the first plurality of conductive strips to the second plurality of conductive strips, ' wherein a multiple-turn coil is formed using the first plurality of conductive strips and the second plurality of conductive strips. 4. An electrical circuit, comprising: first input means for providing an input signal; first output means for providing an output signal; and a first transmission line device disposed substantially between the first input means and the first output means, wherein the first transmission line device comprises: a first ground plane disposed on a first dielectric substrate; a first conductive layer that at least partially encloses a first area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; and a second conductive layer that at least partially encloses a second area corresponding to the first area on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate. 5. An electrical circuit, comprising: first input means for providing an input signal; first output means for providing an output signal; and a transmission line circuit disposed substantially between the first input means and the first output means, wherein the transmission line circuit comprises: a first ' ground plane disposed on a first dielectric substrate; a first plurality of conductive layers that each at least partially enclose an associated area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second plurality of conductive layers that at least partially enclose areas corresponding to the associated areas on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; and a second ground plane disposed on a second major surface of the third dielectric substrate, thereby producing a transmission line impedance transforming device. 6. An electrical circuit, comprising: a first ground plane disposed on a first dielectric substrate; a first multiple-turn coil, comprising: a first plurality of conductive strips disposed on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second plurality of conductive strips disposed on a first major surface of a third dielectric ^ substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; and conductive means for connecting the first plurality of conductive strips to the second plurality of conductive strips, wherein the first multiple-turn coil is formed using the first plurality of conductive strips and the second plurality of conductive strips; and a second multiple-turn coil, comprising: a first conductive spiral disposed on the second dielectric substrate substantially adjacent to the first plurality of conductive strips; and a second conductive spiral disposed on the third dielectric substrate substantially adjacent to the second plurality of conductive strips. 7. An electrical circuit, comprising: first input means for providing an input signal; first output means for providing an output signal; and a first transmission line device electrically positioned between the first input means and the first output means, wherein the first transmission line device comprises: a first ground plane disposed on a first dielectric substrate; a first conductive layer that at least partially encloses a first area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second conductive layer that at least partially encloses a second area corresponding to the first *βrea on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; and an embedded ground plane disposed on a fourth dielectric substrate that is positioned substantially between the second dielectric substrate and the third dielectric substrate. 8. An electrical circuit, comprising: first input terminal for providing an input signal; first output terminal for providing an output signal; and a transmission line circuit electrically positioned between the first input terminal and the first output terminal, wherein the transmission line circuit comprises: a first ground plane disposed on a first dielectric substrate; a first plurality of conductive layers that each at least partially enclose an associated area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second plurality of conductive layers that at least partially enclose areas corresponding to the associated areas on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; an embedded ground plane disposed on a fourth dielectric substrate that is positioned substantially between the second dielectric substrate and the third dielectric substrate; and a second ground plane disposed on a second major surface of the third dielectric substrate, thereby producing a transmission line impedance transforming device. 9. An electrical circuit, comprising: first input terminal for providing an input signal; first output terminal for providing an output signal; and a transmission line circuit electrically positioned between the first input terminal and the first output terminal, wherein the transmission line circuit comprises: a first ground plane disposed on a first dielectric substrate; a first plurality of conductive layers that each at least partially enclose an associated area on a second dielectric substrate, wherein the second dielectric substrate is positioned substantially adjacent to the first dielectric substrate; a second plurality of conductive layers that at least partially enclose areas corresponding to the associated areas on a first major surface of a third dielectric substrate, wherein the third dielectric substrate is positioned substantially adjacent to the second dielectric substrate; an embedded ground plane disposed on a fourth dielectric substrate that is positioned substantially between the second dielectric substrate and the third dielectric substrate; a second ground plane disposed on a second major surface of the third dielectric substrate, thereby producing a transmission line impedance transforming device; a second transmission line device having an output operably coupled to the first output terminal; and second input terminal, operably coupled to the second transmission line device, for providing an input for the electrical circuit, thereby producing a power combining device. 10. The electrical circuit of claim 9, wherein the second transmission line device is disposed, at least in part, on a sixth dielectric substrate that is positioned on an opposite side of the second ground plane as the first transmission line device.

Inventors: GU WANG-CHANG A, HUANG RONG-FONG, KOMMRUSCH RICHARD S, GU, WANG-CHANG, A., HUANG, RONG-FONG, KOMMRUSCH, RICHARD, S.
Applicants: MOTOROLA INC, MOTOROLA INC.
Application year: 1994
Main classification: H01P1
IPC codes: H01F17, H01P3, H01P5