Method for processing a thin film

Abstract: A thin film (3) on a substrate (1) is patterned so as to include an area in which a thin film transistor is to be formed and an area of another patterned thin film or a semiconductor device (4), and so as to have a size larger than the total size of the areas. Next, the patterned thin film is annealed. After the annealing, a part of the inside area and the periphery (3B) of the patterned thin film (3) is patterned. The part of the thin film (3c) is used for forming a thin film transistor.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention: The present invention relates to a method for processing a thin film. More particularly, the present invention relates to a thin-film processing method which is applied to the fabrication of a thin film transistor for a liquid crystal display, an image sensor, a static random access memory (SRAM), or the like. 2. Description of the Related Art: In recent years, as liquid crystal displays have higher definition and a larger size, an increase in production yield of a thin film transistor (hereinafter referred to as a TFT) used as the driving element is essentially required. This is because a driving section of the liquid crystal display includes a large number of TFTs. The production yield of TFTs largely depends on the uniformity of a semiconductor thin film which constitutes the TFTs, and especially on the uniformity of crystallinity. In order to increase the production yield of TFTs, it is very important to form a thin film with superior uniformity. As a recent trend, the main semiconductor material of a TFT is being shifted from conventional amorphous silicon (a-Si) to polycrystalline silicon (poly-Si). When a thin film of poly-Si is to be formed, the key technique is the annealing (heat treatment) for changing a-Si to poly-Si. As to the annealing, excimer laser annealing which causes no damage to an inexpensive glass substrate having a low deforming point, and low-temperature annealing (at temperatures equal to or lower than about 600°C) such as solid phase crystallization are considered as promising methods. Hereinafter, a thin-film processing method used in a fabrication process of a conventional poly-Si TFT will be described Figures 1A , 1B , 2A , and 2B are plan views of an area in which TFTs are to be formed and the cross-sectional views thereof in the course of the process steps in a prior art example A . Figures 3A , 3B , 4A , and 4B are plan views of an area in which TFTs are to be formed and the cross-sectional views thereof in course of the process steps in a prior art example B . As is shown in Figures 1A , 1B , 2A , and 2B , in the prior art example A , the patterning of a semiconductor thin film on a substrate 1 is first performed, so as to form an area 2b in which a TFT is to be formed. Then, the area 2b is irradiated with an excimer laser beam for heating the area 2b . As a result, the area 2b is crystallized (annealed), as to form so an area 3c . Herein, the area 3c is used as a semiconductor layer for a TFT. In the prior art example B shown in Figures 3A , 3B , 4A and 4B , a semiconductor thin film of a substrate 1 (in this case, the semiconductor thin film is formed over the entire surface of a semiconductor wafer excluding the edge peripheral portion of the wafer) is irradiated with an excimer laser beam, so as to form a crystallized semiconductor thin film 3 . Next, the patterning of the semiconductor thin film 3 is performed, so as to form an area 3c. Figures 5A, 5B, 6A, and 6B show a thin-film processing method in a prior art example C . In the prior art example C as shown in Figures 5A, 5B, 6A, and 6B, on a substrate 1 on which a patterned thin film or a semiconductor device 4 and a semiconductor thin film are formed, the patterning of the semiconductor thin film is performed, so as to form an area 2b in which a TFT is to be formed. Next, the excimer laser irradiation is performed, so as to form a crystallized area 3c. The prior art example a has problems in that the desired device performance cannot be attained for TFTs and there exist large variations in device performance. This is because an inside portion 3e and an edge peripheral portion 3b of the area 3c in which a TFT is to be formed have a difference in crystallinity. In the excimer laser annealing step, the face of the edge peripheral portion of the semiconductor thin film pattern which is parallel to the substrate is in contact with a vacuum, a gas, or the like. Therefore, a difference in heat dissipation occurs between the inside portion and the edge peripheral portion of the semiconductor thin film pattern, and hence the crystallising processes are different. In the experiments conducted by the inventors of this invention, when the crystallization by annealing an a-Si thin film was performed in the excimer laser annealing step, the crystallinity in the peripheral portion having width of about 2 - 3 µm measured from the edge of the thin film pattern was inferior to that of the inside portion of the thin film pattern. Accordingly, as a TFT is made in a smaller size, most of the semiconductor thin film pattern has inferior crystallinity. This causes the device performance of the TFT to be deteriorated. Moreover, it is difficult to regulate the portion with poor crystallinity by annealing conditions. This may cause variations in device performance. The prior art example B can avoid the problem of non-uniformity in crystallinity between the inside portion 3a and the edge peripheral portion 3b of the semiconductor thin film pattern which arises in the prior art example A . However, in the prior art example B , the performance of the TFT may be deteriorated and variations in device performance may occur for other reasons. That is, the annealing is performed over the semiconductor thin film formed or substantially the entire face of the wafer with an excimer laser beam, so that the bow or expansion/shrinkage of the substrate affects the dimensional precision of the TFT. In the prior art example B , it is difficult to adjust the positions of a device fabricating portion and a portion to which the annealing is actually performed, when the annealing is selectively performed to a portion of the semiconductor thin film. This is because there is no thin film pattern which can serve as a positioning reference. In the prior art example C , the annealing step required for the fabrication of the TFT often adversely affects the patterned thin film or the semiconductor device 4 . This is because when the annealing is performed to the semiconductor thin film with an excimer laser beam, the patterned thin film or the semiconductor device 4 is also irradiated with the excimer laser beam, so that the film may be peeled off and the semiconductor device performance may be deteriorated. Examples of such types of method for processing a thin film are disclosed in "SID International Symposium : Digest of Technical Papers, 1985 pages 282-285, A. Ishizu et al." and in the Patent Abstract of Japan : JP-A-62 069 680. SUMMARY OF THE INVENTION The method for processing a thin film comprises : a first patterning step of patterning a thin film to form a first patterned thin film on a substrate; an annealing step of annealing the first patterned thin film; to form an annealed first patterned thin film; a second patterning step of patterning the annealed first patterned thin film to form a second patterned thin film; and a step of forming a thin film device using the second patterned thin film, wherein the annealed first patterned thin film includes at least a first device forming area and a second device forming area, said both device forming areas being spatially separated from each other and having substantially the same size, and the annealed first patterned thin film having a size larger than the total size of the first device forming area and the second device forming area, the second patterning step includes a step of removing an outer edge peripheral portion of the annealed first patterned thin film, said second patterned thin film including at least said first device forming area. In one embodiment of the invention, the second patterning step includes a step of patterning the first device forming area and the second device forming area from said annealed first patterned thin film, and the thin film device is formed using the first device forming area and the second device forming area. In another embodiment of the invention, the method further comprises a step of forming a further patterned thin film on the substrate, wherein, in the first patterning step, the second device forming area is formed so as to cover the further patterned thin film, and the second patterning step includes a step of removing the second device forming area of the annealed first patterned thin film. In still another embodiment of present invention, the outer edge peripheral portion has a width of 1µm or more from the edge thereof. In still another embodiment of the invention, the first patterned thin film is an Si thin film. In still another embodiment of the invention, the Si thin film is crystallized in the annealing step. In still another embodiment of the invention, the Si thin film is an amorphous Si thin film. In still another embodiment of the invention, the Si thin film is a polycrystalline Si thin film. In still another embodiment of the invention, the first patterned thin film is an insulating film. In still another embodiment of the invention, the annealing step utilizes an energy beam. In still another embodiment of the invention, the annealing step utilizes a laser beam as the energy beam. In still another embodiment of the invention, the laser beam is an excimer laser beam. In still another embodiment of the invention, the further patterned thin film is an ITO thin film. In still another embodiment of the invention the thin film device is a MOSFET. Thus, the invention described herein makes possible the advantages of (1) providing a thin-film processing method for suppressing variations in performance of TFTs, (2) providing a thin-film processing method for minimizing damage in a semiconductor thin film which may cause the performance of TFTs to be deteriorated, (3) providing a thin-film processing method for precisely performing partial annealing, and (4) providing a thin-film processing method in which a semiconductor thin film is annealed without causing any damage to a patterned thin film or a semiconductor device due to the annealing. These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures. BRIEF DESCRIPTION OF THE DRAWINGS Figures 1A and 1B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in a prior art example A . Figures 2A and 2B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the prior art example A . Figures 3A and 3B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in a prior art example B . Figures 4A and 4B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the prior art example B . Figures 5A and 5B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in a prior art example C . Figures 6A and 6B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the prior art example C . Figures 7A and 7B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in a first example according to the invention. Figures 8A a and 8B are partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the first example according to the invention. Figures 9A and 9B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the first example according to the invention. Figures 10A and 10B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in a second example according to the invention. Figures 11A and 11B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the second example according to the invention. Figures 12A and 12B are a partial plan view and the cross-sectional view thereof, respectively, for illustrating a step in a thin-film processing method in the second example according to the invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS Example 1 By referring to Figures 7A, 7B, 8A, 8B, 9A, and 9B, a first example of a thin-film processing method according to the invention will be described. In this example, a method for processing a semiconductor thin film used in a TFT, and especially an a-Si thin film is described. First, as shown in Figures 7A and 7B, after a semiconductor thin film (thickness: 10 nm to 1 µm) made of an a-Si thin film or the like is deposited on a substrate 1 , a first patterning step is performed. In this example, a glass substrate is used as the substrate 1 . In the first patterning step, the semiconductor thin film is patterned into a semiconductor thin film pattern 2a . In Figures 7A and 7B , only one thin film pattern 2a is shown. It is appreciated that a plurality of semiconductor thin film patterns may be simultaneously formed on a single substrate 1 . The first patterning step includes known lithography and etching processes. The thin film pattern 2a includes two areas in which TFTs are to be formed (areas indicated by the reference numeral 3c and 3d in Figures 9A and 9B ), and has a size larger than the total size of the two areas. If each of the areas 3c, 3d etc. in Figures 9A and 9B has a size, for example, of 5 µm x 10 µm, it is preferred that the semiconductor thin film pattern 2a is typically designed to have a size larger than 20 µm x 40 µm. However, these sizes and the number of areas 3c etc. included in one semiconductor thin film pattern 2a can be desirably selected. In an annealing step, the semiconductor thin film pattern 2a is irradiated with an excimer laser beam, so as to crystallize the semiconductor thin film pattern 2a . Thus, thin film patterns 3a and 3b in crystalline state are formed from the a-Si semiconductor thin film pattern 2a (Figures 8A and 8B ). Exemplary excimer laser annealing conditions are as follows: the energy density per pulse is 400 mJ/cm 2 , and the irradiation area is 1 cm x 1 cm. At this time, the temperature of the central portion of the semiconductor thin film pattern 2a rises to 1000°C or more. After the areas 3c etc. are formed in the crystallized thin film pattern inside portion 3a through a second patterning step, TFTs are formed using the respective areas 3c etc. The second patterning step also includes the known lithography and etching processes. The respective areas 3c are used as channel regions, and source/drain regions of TFTs. According to this example, the heat generated by the annealing flows through the semiconductor thin film pattern 2a with higher thermal conductivity than the substrate 1 . There arises a difference in heat dissipation between the edge peripheral portion and the central portion of the semiconductor thin film pattern 2a , so that a difference in crystallinity is generated between the inside portion 3a and the edge peripheral portion 3b of the semiconductor thin film pattern after the annealing. However, the areas 3c etc. are formed from the central portion in which the crystallinity is uniform of the thin film pattern inside portion 3a , and the edge peripheral portion 3b is removed. Preferably, the edge peripheral portion 3b has a width of 0.1 µm or more measured from the edge thereof. As a result, TFTs are formed using the areas 3c etc. which have uniform crystallinity, so that TFTs having stable and substantially equal performance can be obtained. As to the bow and expansion/shrinkage of the substrate during the annealing step, the stress is distributed for each semiconductor thin film pattern 2a having a larger size than the area 3c or 3d in which a TFT is to be formed. Accordingly, the influence on the performance of TFT can be reduced. When a portion of the semiconductor thin film is to be selectively annealed, the semiconductor thin film pattern 2a which is formed in the first patterning step or the edge portion thereof can be used as a mark for the mask alignment. Accordingly, it is possible to precisely anneal the portion to be annealed. In this example, the case where an a-Si thin film is used has been described. Alternatively, another semiconductor thin film such as a poly-Si thin film may be used. When a poly-Si thin film is used, it is unnecessary to completely recrystallize the poly-Si film in the annealing step. If only the surface of the poly-Si film is recrystallized, the electric characteristics of the poly-Si film are enhanced. Instead of the semiconductor thin film, an insulator thin film such as an SiN thin film may be used. The insulation property of the insulator film and the property as the passivation film are poor when the insulator film is deposited at a temperature of about 600°C or less, as compared with the case where the insulator film is deposited at a higher temperature. If the processing method of the invention is performed after the deposition at 600°C or less, tho insulation property of the insulator film is improved. The use of such an insulator film in, for example, a TFT improves the device characteristics of the TFT. If the insulator film is deposited at a temperature higher than 600°C, the glass substrate may be deformed. Example 2 By referring to Figures 10A , 10B , 11A , 11B, 12A , and 12B , a second example of a thin-film processing method according to the invention will be described. First, as shown in Figures 10A and 10B , after a patterned thin film or a semiconductor device is formed on a substrate 1 , an insulator thin film 5 is deposited on the substrate 1 . When the thin-film processing method of this example is applied to the production of an active matrix type liquid crystal display, the patterned thin film may be, for example, a transparent pixel electrode formed of ITO. After a semiconductor thin film (thickness: 10 nm to 1 µm) such as an a-Si thin film is deposited on the substrate 1 , the semiconductor thin film is patterned into a semiconductor thin film pattern 2a by a first patterning step. In Figures 10A and 10B, only one thin film pattern 2a is shown. It is appreciated that a plurality of semiconductor thin film patterns may be simultaneously formed on a single substrate 1 . The first patterning process includes known lithography and etching processes. The thin film pattern 2a includes the patterned thin film 4 and an area in which a TFT is to be formed (an area indicated by the reference numeral 3c in Figures 12A and 12B ), and has a size larger than the total size of the thin film 4 and the area 3c . If each of the area 3c and the thin film 4 in Figures 12A and 12B has a size, for example, of 5 µm x 10 µm, it is preferred that the semiconductor thin film pattern 2a is typically designed to have a size larger than 20 µm x 40 µm. However, these sizes and the number of areas 3c included in one semiconductor thin film pattern 2a can be desirably selected. In an annealing step, the semiconductor thin film pattern 2a is irradiated with an excimer laser beam. The annealing conditions are the same as those in the first example. As the result of the annealing, the semiconductor thin film pattern 2a is crystallized (annealed). Thus, thin film patterns 3a and 3b in crystalline state are formed from the a-Si semiconductor thin film pattern 2a (Figures 11A and 11B ). After the area 3c is formed in the crystallized thin film pattern inside portion 3a through a second patterning step, a TFT is formed using the area 3c . The second patterning step also includes known lithography and etching processes. In this example, most of the laser light for irradiation is absorbed by or reflected from the semi-conductor thin film 2a , and does not reach the underlying layer. Accordingly, it is possible to reduce the influence on the underlying patterned thin film or semiconductor device. For example, in an ITO electrode used in a liquid crystal display, it is possible to prevent a film from being peeled off due to the laser irradiation, which is effective in view of the producibility. Moreover, it is possible to attain the effects of both the first and second examples. Thus, transistors of high performance can be stably fabricated. In this example, as the patterned thin film 4 , instead of the ITO pixel electrode, a thin film or a semiconductor device formed of a material which is easily adversely affected by the annealing can be used. For example, the thin film 4 may be a MOSFET for SRAM. In the first and second examples, the annealing is performed using excimer laser. Other types of laser or any energy beam such as an electron beam can attain the same effects. Alternatively, solid phase crystallization using a heater can attain the same effects. Various other modifications will be apparent to and can be readily made by those skilled in the art without departing from the scope of the claims appended hereto.

Claims: A method for processing a thin film comprising : a first patterning step of patterning a thin film to form a first patterned thin film (2a) on a substrate (1); an annealing step of annealing the first patterned thin film (2a); to form an annealed first patterned thin film (3a); a second patterning step of patterning the annealed first patterned thin film (3a) to form a second patterned thin film (3c, 3d); and a step of forming a thin film device using the second patterned thin film (3c, 3d), wherein the annealed first patterned thin film (3a) includes at least a first device forming area (3c) and a second device forming area (3d), said both device forming areas being spatially separated from each other and having substantially the same size, and the annealed first patterned thin film (3a) having a size larger than the total size of the first device forming area (3c) and the second device forming area (3d), the second patterning step includes a step of removing an outer edge peripheral portion (3b) of the annealed first patterned thin film (3a), said second patterned thin film including at least said first device forming area (3c). A method for processing a thin film according to claim 1, wherein the second patterning step includes a step of patterning the first device forming area (3c) and the second device forming area (3d) from said annealed first patterned thin film (3a), and the thin film device is formed using the first device forming area (3c) and the second device forming area (3d). A method for processing a thin film according to claim 1, further comprising a step of forming a further patterned thin film (4) on the substrate (1), wherein, in the first patterning step, the second device forming area (3d) is formed so as to cover the further patterned thin film (4), and the second patterning step includes a step of removing the second device forming area of the annealed first patterned thin film (3a). A method for processing a thin film according to any one of the preceding claims, wherein the outer edge peripheral portion (3b) has a width of 1µm or more from the edge thereof. A method for processing a thin film according to any one of the preceding claims, wherein the first patterned thin film (2a) is an Si thin film. A method for processing a thin film according to claim 5, wherein the Si thin film is crystallized in the annealing step. A method for processing a thin film according to claim 5, wherein the Si thin film is an amorphous Si thin film. A method for processing a thin film according to claim 5, wherein the Si thin film is a polycrystalline Si thin film. A method for processing a thin film according to any one of claims 1 to 4, wherein the first patterned thin film (2a) is an insulating film. A method for processing a thin film according to any one of the preceding claims, wherein the annealing step utilizes an energy beam. A method for processing a thin film according to claim 10, wherein the annealing step utilizes a laser beam as the energy beam. A method for processing a thin film according to claim 11, wherein the laser beam is an excimer laser beam. A method for processing a thin film according to claim 3, wherein the further patterned thin film (4) is an ITO thin film. A method for processing a thin film according to claim 3, wherein the thin film device is a MOSFET.

Inventors: KAWAMURA TETSUYA, MAEGAWA SHIGEKI, MIYATA YUTAKA, YOSHIOKA TATSUO, KAWAMURA, TETSUYA, MAEGAWA, SHIGEKI, MIYATA, YUTAKA, YOSHIOKA, TATSUO
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1994
Main classification: H01L21
IPC codes: H01L21, H01L29