Digital-to-analog converter

Abstract: A digital-to-analog converter (18) having a ladder resistor portion (20) for generating a plurality of quantization signals of predetermined values based on reference signals of predetermined values based on reference signals (V DD , V SS ) and a quantization switch portion (22) for selectively outputting one of the quantization signals in accordance with a digital input value (Y) is provided. The ladder resistor portion is coupled to at lest one resistor (R2, R3) for generating a signal whose value corresponds to a desired signal level of a signal to be added (SYNC). A switch means (23) is further provided for supplying the signal of the value corresponding to the desired signal level to an output of the switch portion (22) in response to a timing signal synchronized with the signal to be added.

Description: FIELD OF THE INVENTION This invention relates to a digital-to-analog (D/A) converter suitable for use in such a case that a video signal digitally processed in a video camera or the like is converted into an analog signal. PRIOR ART In particular this invention relates to a digital-to-analog converter. A digital-to-analog converter is known in the art. For example is a digital-to-analog convener known from JP-A-0137123. Herein a digital-to-analog converter device is described with additional circuitry for inputting a synchronizing signal and outputting a signal which has a level lower than the analog area occupied by a luminance signal output from said converter. In accordance with the recent expansion of the application field of the digital signal processing IC's, a significant progress has been achieved in the digital processing of video signals in consumer-use portable apparatuses such as portable video cameras (or camcorders). The video signal digitally processed in such a camcorder is generally converted into an analog video signal by a D/A convener in order to obtain a standard analog recording signal. A luminance signal, for example, of the video signal in such a digital signal processing IC as described above is usually represented in eight bits and is converted into an analog signal by means of a D/A converter incorporated in the IC. The analog luminance signal thus obtained and outputted from the IC is combined with a synchronization signal by the aid of other circuit components and is thereafter supplied, for example, to a frequency converter. It will be very unpreferable for the miniaturization of a camcorder or the like to provide separate circuit components in addition to the digital processing IC only for the purpose of adding a synchronization signal as described above. On the other hand, for the incorporation of a synchronization-signal addition circuit into a digital video signal processing IC a special measure has to be taken to overcome the restrictions of space in the IC. SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a D/A converter which can add, when convening a digital signal such as a luminance signal of a digital video signal into an analog signal, a further signal to the analog signal with a minimum circuit structure. To achieve the above object, a digital-to-analog converter provided in accordance with the present invention comprises the features as claimed in claim 1. With the above structure, only the resistor to be coupled to the ladder resistor portion and the switch means for supplying a voltage generated by this resistor to the output terminal of the switch portioned to be provided. Therefore, the present invention can be implemented even in such a case where a space is very limited, such as in an integrated circuit, to add a further signal to the analog output signal. When this digital-to-analog converter is incorporated in a digital video signal processing IC provided in a camcorder, the digital input value may correspond to a digital luminance signal while the signal to be added may correspond to a synchronization signal. BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be elucidated in conjunction with the accompanying Figures in which: Fig. 1 shows a part of a camcorder with digital video processing comprising a D/A converter according to the present invention; Fig. 2 shows a D/A converter according to the invention, and Fig. 3 shows a signal waveform occurring in a D/A converter according to the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Fig. 1 shows a part of a camcorder with a digital video signal processing IC to which a D/A converter according to the present invention is applied. This camcorder comprises a CCD image sensor 11 operative in response to a timing signal from a timing circuit 10, a correlated double sampling (CDS) circuit 12 for processing an output from the image sensor 11 to reduce noises contained therein and analog-to-digital (A/D) converter 13 for converting an analog video signal from the CDS circuit 12 into a digital signal at a predetermined time interval. An output from the A/D converter 13, i.e., a digital video signal, is supplied to a digital video signal processing circuit (hereinafter referred to simply as "DSP") 14 in the form of a integrated circuit (IC). The DSP 14 is a circuit for processing the digital video signal in accordance with programs stored in a memory 16 and outputs from a parameter setting circuit (not shown) and has a known structure except for a incorporated D/A converter for a luminance signal which will be described later. The DSP 14 comprises a circuit part for processing the inputted digital video signal to separate the luminance and chrominance signals Y and C from each other and another circuit part for forming a synchronization signal SYNC based on a timing signal fed from the timing circuit 10. However, these circuit parts are not much relevant to the present invention and will not be described herein. The DSP 14 further comprises a first D/A converter 18 for converting the luminance signal Y digitally processed in this DSP into an analog signal and a second D/A converter 19 for converting the chrominance signal C digitally processed in this DSP into an analog signal. The above first D/A converter 18 is provided in accordance with the present invention and has a circuit structure as shown in Fig. 2. This D/A converter is of the voltage and ladder-resistor type and comprises a ladder resistor portion 20, which includes serially connected two hundred and fifty six resistors R1 1 to R1 256 of the same resistance value (only the resistors R1 1 , R1 2 ,R1 255 and R1 256 are shown in Fig. 2) and is supplied with a first reference voltage V DD at one end thereof, an amplifier 21 and a switch portion 22 which selectively connects junction points of the resistors of the ladder resistor portion 20 to an input terminal of an amplifier 21 in accordance with the digital luminance signal Y. The other end of the ladder resistor portion 20 in the D/A converter 18 is connected to a terminal of a second reference voltage V SS through resistors R2 and R3 in this order. A junction point of the two resistors R2 and R3 is connected to the input terminal of the amplifier 21 through an analog switch 23 which is composed, for example, of an NMOS transistor controlled by the synchronization signal SYNC. In this case, values of the reference voltages V DD and V SS and values of the resistors R1 1 to R1 256 , R2 and R3 are selected in such a manner that a voltage at the junction point of the resistors R1 1 ad R1 2 correspond to the upper limit level of the luminance signal, i.e., a peak level of white, a voltage at the junction point of the resistors R1 256 and R2 to the lower limit level of the luminance signal, i.e., a black level, and a voltage at the junction point of the resistors R2 ad R3 to a level at a peak of the synchronization signal SYNC. It should be noted here that the ladder resistor portion 20 and the switch portion 22 are shown only diagrammatically for the purpose of simplifying the description but that the actual circuits of these portions may be slightly different from those shown. It should also be noted that the switching portion 22 may be so constructed that it does not operate during the time when the synchronization signal SYNC is generated. An output from the above D/A converter 18, i.e., an analog luminance signal obtained at an output terminal 24 of the amplifier 21, is supplied through a frequency modulation circuit 30 shown in Fig. 1 to one input terminal of an adder 31. An analog chrominance signal from the second D/A converter 19 in the DSP 14 is supplied to the other input terminal of the adder 31 through a frequency converter 32. A combined signal obtained at an output terminal of the adder 1 is supplied through an output terminal 33 to a not-shown recording portion of this camcorder. The second D/A converter 19 is of the conventional construction and will not therefore be described herein in detail. The operation of the camcorder of the above structure will now be described mainly in relation to the D/A converter 18. During a horizontal scanning period between two adjacent synchronization signals SYNC 1 and SYNC 2 such as those shown in Fig. 3, the analog switch 23 in the D/A converter 18 is in the off state and therefore an output voltage of the ladder resistor portion 20 selected by the switch portion 22 in accordance with the digital luminance signal Y is supplied to the input terminal of the amplifier 21. Thus, the D/A converter 18 outputs an analog signal whose level is situated between the white and black levels L W and L B and corresponds to the value of the luminance signal Y in this case. When the synchronization signal SYNC is generated in the DSP 14, the analog switch 23 in the D/A converter 18 is brought into a conduction state and therefore the voltage at the junction point of the resistors R2 and R3, i.e., a voltage whose value corresponds to the predetermined peak level L S of the synchronization signal, is supplied to the input terminal of the amplifier 21. Thus, a synchronization signal having the peak level L S (SYNC 1 or SYNC 2 in Fig. 3) is outputted from the D/A converter 18 in this case. As will be appreciated from the foregoing, with the above-described structure it is possible to add a synchronization signal to a luminance signal with such a minimum circuit structure that only two resistors are added to the ladder resistor portion 20 in the D/A converter 18 and that an analog switch controlled by the synchronization signal is further provided. In the above embodiment, the present invention has been applied to a voltage and ladder-resistor type D/A converter. However, it will be obvious for those skilled in the art that the present invention can also be applied to D/A converters of other ladder-resistor types such as a current and ladder-resistor type.

Claims: A digital-to-analog converter characterized in that the digital-to-analog converter comprises a ladder resistor portion (20) for generating a plurality of quantization signals of predetermined values based on a reference signal which ladder resistor portion (20) is constructed to generate a plurality of predetermined quantization voltages based on a reference voltage, in that at least two resistors (R2, R3) are connected in series to the Ladder resistor portion (20) for generating a signal whose value corresponds to a desired signal level of a signal to be added and a quantization switch portion (22) for selectively outputting one of the quantization signals in accordance with a digital input value, and in that a switch means (23) is provided for supplying, in response to a timing signal synchronized with said signal to be added, said signal of the value corresponding to the desired signal level to an output of the switch portion, which switch means (23) is an analog switch for supplying a voltage at a junction point between the two resistors to an output terminal of the quantization switch portion. A digital-to-analog converter as claimed in Claim 1, characterized in that the digital input value represents a luminance signal and in that said signal to be added is a synchronization signal.

Inventors: GEERLINGS JURGEN, NEGISHI NOBUJI, PELGROM MARCEL, SPEER RAYMOND, GEERLINGS, JURGEN, NEGISHI, NOBUJI, PELGROM, MARCEL, SPEER, RAYMOND
Applicants: KONINKL PHILIPS ELECTRONICS NV, KONINKLIJKE PHILIPS ELECTRONICS N.V.
Application year: 1994
Main classification: H03M1
IPC codes: H03M1, H04N5