Multiloop control apparatus and method for switching mode power converter with bandpass current control

Abstract: A switched mode power converter includes a periodically switched power switch (103) which is switched under the control of a multiple loop feedback controlling the power switch in order to supply a regulated output (across 120). The output voltage and power switch current are sensed (on 113, and by 124 respectively). An error voltage is generated (by 115) which is representative of the deviation of the output voltage from a regulated value. A voltage (on 124) derived from the power switch current is limited in its low frequency response (by 131,135,132,133) and is then combined with the error voltage. The low frequency response of the current loop gain is used to maintain an advantageously low output impedance for the power supply. This shaped loop gain response advantageously allows accurate adjustment of the current loop gain and reduces the system to a lower order while maintaining adequate loop stability. The low frequency response may be attained by limiting the low frequency response of the sensed current or by inserting an operational amplifier (121) in the feedback path to limit its low frequency response.

Description: This invention relates to switch mode power converters. Multiloop feedback arrangements, including both current and voltage control, are used in switching mode power converters to improve many of its operating characteristics over those of similar power converters with single loop feedback control. Not all the changes in characteristics are improvements however. The closed loop output impedance of a switching mode power converter with a multiloop feedback control is normally greater than that of a converter with single loop feedback control. This increase in output impedance is due mainly to the presence of the current mode feedback loop. At low frequencies, below the resonant frequency of the output filter of the power converter the current loop adds further output impedance and in addition is not effective in significantly enhancing the closed loop performance of the converter. The low frequency output impedance of the converter is significantly increased below the output filter resonant frequency. In addition, at frequencies approaching one half the switching frequency, excessive current loop gain may introduce instability into the feedback loop. Since a voltage source (i.e. the voltage regulated switching mode power converter) should have a relatively low output impedance, it is desirable to reduce the high output impedance introduced by the current feedback loop. US-A-5 177 676 discloses a voltage source (an inverter) for providing AC/DC to AC output voltage conversion and including a current feedback loop which is applied to a voltage source amplifier. It is used in combination with voltage feedback to control the output impedance of the voltage generating means of the voltage source. According to this invention there is provided a switched mode DC to DC power converter as claimed in claim 1. A current feedback loop in a multiloop feedback arrangement has its frequency response shaped at low frequencies so that its loop gain is negligible below the output filter resonant frequency in order to reduce the output impedance of the power converter. Brief Description of the Drawing In the Drawing: FIG. 1 is a schematic of a switching mode power converter embodying the invention; FIG. 2 discloses voltage waveforms to assist in describing the operation of the circuit of FIG. 1; FIG. 3 discloses a graph useful for explaining the operation of the feedback loop of the circuit of FIG. 1; FIG. 4 discloses waveforms for describing another mode of operation of the circuit of FIG. 1. FIG. 5 is a schematic of another version of a switching mode power converter embodying the invention; FIG. 6 discloses voltage waveforms to assist in describing the operation of the circuit of FIG. 5; FIG. 7 is a schematic of yet another version of a switching mode power converter embodying the invention; and FIG. 8 discloses voltage waveforms to assist in describing the operation of the circuit of FIG. 7. Detailed Description A switching mode power converter of the buck type, shown in FIG. 1, has an input lead 101 connected to receive the voltage of the DC voltage source 102. An FET power switch 103 connects the input to an output filter inductor 105 through a current sensing winding 104 of the current sensing transformer 106. A flyback diode 107 is connected to the inductor 105 in order to provide current to the inductor during non conducting intervals of the power switch 103. A filter capacitor 108 is connected to the output lead 110. Inductor 105 and capacitor 108 comprise a low pass filter which has a characteristic resonant frequency. A load resistor 120 to be energized is connected to the output lead 110. A voltage divider including resistors 111 and 112 is connected to the output lead 110. A voltage proportional to the output voltage is sensed on lead 113 and applied to an inverting input of the error amplifier 115. Error amplifier 115 includes a feedback capacitor 118 and is operative as an integrating amplifier. A reference voltage 116 is applied to the non-inverting input of the amplifier 115. The error voltage output of the amplifier 115, on lead 117, is representative of an integral of the voltage difference between the inverting and non-inverting inputs. An integrating capacitor 118 and resistor 119 connects the inverting input to the output lead 117 and sums an integral value with the input differential. The error voltage on lead 117 is applied to the non-inverting input of the amplifier 121. Amplifier 121 has its inverting input connected to accept a voltage representative of the current sensed by the winding 104. Winding 104 is magnetically coupled by the core of the transformer 106 to its secondary winding 124. The voltage of winding 124 is rectified by diode 125 and developed across the resistor 128. The voltage developed across resistor 128 is connected, via lead 127 to the capacitor 131. Capacitor 131 is in turn connected, via the resistor 135, to the inverting input of amplifier 121. Capacitor 131 differentiates the voltage supplied by resistor 128 and with amplifier 121 forms the classic differentiator amplifier configuration. A parallel connected capacitor 132 and resistor 133 in the amplifier's feedback loop clamps the amplifier's mid frequency response. The addition of the resistor 135 and capacitor 132 add the necessary pole values to achieve the desired frequency response of the current feedback loop. The output of amplifier 121 on lead 141 is connected to the non-inverting input of the pulse width modulating (PWM) amplifier 142. The output of a periodic ramp generator 143 is connected to its inverting input. The output of the PWM amplifier 142 is coupled, via lead 144, to the gate electrode 153 of the FET power switch 103. In operation the periodic conduction of the power switch 103 enables discontinuous current flow (as shown by the voltage waveform 201 in FIG. 2) from the voltage source 102 to the filter inductor 105. The low pass output filter comprising the filter inductor 105 and filter capacitor 108 converts the current pulses to a substantially DC voltage which is applied to the load resistor 120. This output voltage is sensed by the voltage divider comprising the resistors 111 and 112 and a voltage proportionate to the output voltage is taken from its midpoint node and applied via lead 113 to the inverting input of the operational amplifier 115 which is connected into an integrating configuration with the feedback capacitor 118. The integration amplifier 115 responds to the proportionate voltage on lead 113 and a reference voltage applied to its non-inverting input to generate an error voltage (voltage level 211 in FIG. 2) on its output lead 117. This error voltage is proportional to the error between the output voltage on output lead 110 and a voltage defined by the reference voltage source 116. This error voltage is applied to the non-inverting input of the amplifier 121. A voltage signal proportional to the current of the power switch is rectified by diode 125 and the voltage 201 (see FIG. 2) is applied to the input capacitor 131 connected to the inverting input of amplifier 121. The input capacitor 131 and input resistor 135 in combination with the feedback capacitor 132 and its parallel connected feedback resistor 133 are selected to cause the amplifier 121 to operate in a band or high pass mode of operation essentially rejecting low frequency signals below the resonant frequency of the output filter. The output of the amplifier 121 (voltage waveform 221 in FIG. 2) is a scaled inverted version of the voltage waveform 201 offset by the error voltage (voltage waveform 211 in FIG. 2) and is connected to the non-inverting input of amplifier 142. The ramp signal (voltage waveform 231 in FIG. 2) connected to the inverting input in combination with the level of the output of amplifier 121 determines the intersection point 241 where the power switch 103 turns off. The frequency of the ramp generator defines the switching frequency of the power switch 103. The resultant conduction intervals of the power switch 103 are shown by the voltage waveform 251 shown in the FIG. 2. By limiting the ability of the current loop to respond to low frequency current variations the low frequency output impedance of the multiloop feedback control is maintained at a desirable low value. The frequency response plot of closed loop output impedance, as shown by the graph of FIG. 3, is down at low frequencies and is substantially flat at and above the resonant frequency of the output filter. A variation of the operation of the circuit of FIG. 1 is shown by the waveforms of FIG. 4. In this particular mode the frequency of the second pole is set at a much lower frequency than the second pole defined by the waveforms of FIG. 2. The frequency at which the second pole occurs is significantly less than and most likely one half of the switching frequency of the converter. This causes a significant modification of the waveform of the output of the differential amplifier 121. This waveform is shown by the voltage waveform 421 in FIG. 4. This arrangement is suitable for applications in which more attenuation of the high frequency signal is required. Adjustment of the frequency of the second pole of the feedback loop is attained by selection of the values of the feedback resistor 133 and feedback capacitor 132 in the feedback path of the amplifier 121. Another feedback arrangement as shown in the schematic shown in FIG. 5. The output of the current sensing transformer 106 includes a series connected resistor 433 and capacitor 432 shunting the resistor 128. This resistor 433 capacitor 432 series circuit is used to determine the second pole of the feedback arrangement in substitution for the feedback capacitor of the amplifier 121. The resulting waveforms are shown in the FIG. 6. The output of the amplifier 121 is shown by the waveform 621. This particular arrangement may be less sensitive to noise than the circuit of FIG. 1. Another version of the feedback arrangement is shown in the circuit of FIG. 7. In this arrangement the voltage ramp of the sensed current is directly added to the input ramp applied to the PWM circuit 142. The values of the capacitor 432 and capacitor 131 define the frequency of the two defining poles in the feedback loop. The resulting ramp signal is shown by the voltage waveform 821 in FIG. 8. While various variations of the feedback arrangement have been shown it is readily apparent that other variations will be suggested to those skilled in the art.

Claims: A switched mode DC to DC power converter, including an input, output having an output filter (105,108), a power switch (103) for controlling current flow between the input and output, and a multiple loop feedback control for controlling the power switch of the switched mode DC to DC power converter, said converter including voltage sensing circuitry (111,112) connected to sense a voltage of the output; current sensing circuitry (106) connected to sense the current flow controlled by the power switch and generate a voltage therefrom; a first amplifier (115) connected to the voltage sensing circuitry for comparing a voltage of the voltage sensing circuitry with a reference voltage (116) and generating an error voltage representative of a difference between the voltage of the voltage sensing circuit and the reference voltage; a second amplifier (121) connected to the current sensing circuitry for adding a voltage generated by the current sensing circuitry to the error voltage; CHARACTERIZED BY: the second amplifier including control components (131,135) for limiting its response to low current frequency variations including a frequency shaping circuit (131,135) for attenuating current loop signals below a resonant frequency of said output filter (105,108); and means responsive to the multiloop feedback control for controlling a conduction interval of the power switch (142,143). A converter as claimed in claim 1 wherein the frequency shaping circuit includes a first capacitance reactance (131) and resistance (135) connected in series, and the series connection connected at an input to the second amplifier to limit the low frequency response of the second amplifier. A converter as claimed in claim 2 wherein the frequency shaping circuit includes a second capacitance reactance (132) and a second resistance (133) connected in parallel as a feedback circuit for the second amplifier and operative for further shaping the response of the second amplifier and controlling a passband gain.

Inventors: BOYLAN JEFFREY JOHN, ROZMAN ALLEN FRANK, BOYLAN, JEFFREY JOHN, ROZMAN, ALLEN FRANK
Applicants: AT & T CORP, AT&T CORP.
Application year: 1994
Main classification: H02M3
IPC codes: H02M3