Ceramic substrate for semiconductor device

Abstract: A ceramic substrate for use with a semiconductor device, includes an electrical conductor (2) composed of Ag, a resistor (4) composed of oxide, and a barrier layer (3) located between the electrical conductor (2) and the resistor (4) and composed of a material selected from a group consisting of AgPd and AgPt. The ceramic substrate prevents a diffusion of Ag atoms between the electrical conductor (2) and the resistor (4), and hence provides a stable internal resistance.

Description: The invention relates to a substrate composed of ceramic, on which a high speed LSI element is to be mounted and which has an internal resistor. These days, with a requirement of the down-sizing, lightening, multi-functioning and highly-densifying of a computer and a communication device, it is also required to highly integrate a semiconductor chip and down-size electronic parts. In particular, it is required to improve a packaging technique for electrically connecting the chip or parts with each other. For instance, a resistor has conventionally been mounted on a substrate, but a new method has recently been developed in which a resistor is formed in a substrate for mounting a larger number of parts such as resistors and electrical conductors in a smaller area. One of such methods includes the steps of forming an electrically conductive layer composed of Ag or AgPd on a green sheet by means of a screen-printing process, and depositing the thus fabricated green sheets, and then firing the deposited green sheets at the temperature in the range of 800 to 900 degrees centigrade. However, Ag atoms have a tendency to easily diffuse. Thus, Ag atoms in electrical conductors diffuse in a resistor at the temperature in the range of 800 to 900 degrees centigrade, and accordingly there is posed a problem that a resistance value presented by a resistor remains quite unstable. To solve this problem, for instance, JP-A-59-75603 has suggested a resistor being shaped to be concave at a longitudinally middle portion to thereby increase a resistance at the longitudinally middle portion which is not affected by a diffusion of Ag atoms. JP-A-60-253107 has suggested forming an intermediate layer composed of an alloy including Pd, Ru, Ni, Au and Co, for preventing a diffusion of Ag atoms. JP-A-1-136302 has suggested a resistive layer disposed between an Ag electrode and an RuO 2 resistor and having no Ag atoms which has a resistivity one-tenth smaller than that of the RuO 2 resistor. According to the Disclosure, the resistive layer can stop a diffusion of Ag atoms. However, the Disclosure does not specify a material of which the resistive layer is to be made. JP-A-4-342101 has suggested to mix non-electrically conductive glass and organic vehicle in an electrically conductive material such as RuO 2 to thereby reduce a diffusion of Ag atoms into a resistor. If a content of Pd in an electrical conductor is increased for reducing a diffusion of Ag atoms, a resistance of the electrical conductor is increased. This is not preferable for achieving a high speed performance of a semiconductor device. In addition, the cost for applying a paste is increased. JP-U-1-158136 has suggested forming a layer composed of AgPd or AgPt between an Au electrode and an Ag electrode for preventing a diffusion of Ag atoms. Though this Disclosure seems to have a similar structure to the present invention, the Disclosure aims at preventing a diffusion of Ag atoms between metal and metal. It is impossible to prevent a diffusion of Ag atoms by merely forming such an alloy layer. The present invention intends to prevent a diffusion of Ag atoms between metal and metallic oxide by utilizing an alloy having the tendency that an alloy is difficult to be oxidized. Thus, the above mentioned Disclosure is quite different from the present invention. The above mentioned prior art has problems as mentioned below, and hence problems which are posed when an Ag conductor and an oxide resistor are used remain not yet resolved. JP-A-59-75603 attempts to stabilize a resistance value only by controlling a width of a resistor, but cannot prevent a diffusion of Ag atoms at all. Thus, there remains unresolved a problem that as times go by, a resistance value varies by gradual diffusion of Ag atoms. The intermediate layer suggested in JP-A-60-253107 tends to increase a resistance of a conductor too much, and hence it is difficult to achieve a high speed performance of a semiconductor device. JP-A-4-342101 mixes a resistor with a glass and so on, and hence it is quite difficult to control a resistance value. JP-A-5-205903 discloses a thick film chip resistor in which the diffusion of Ag from a Ag/Pd conductor film is prevented by an interposed barrier layer of Au. It is an object of the present invention to provide a substrate which reduces the instability of a resistor generated due to a diffusion of Ag atoms, and thereby increases the reliability of the resistor. This object is solved with the features of the claims. The invention is characterized by a barrier layer for preventing a diffusion of Ag atoms, located between an electrical conductor having a high content of Ag which tends to diffuse, and a resistor. The barrier layer is composed of AgPd or AgPt. It should be noted that the content of Ag in the barrier layer is required to be lower than the content of Ag in the electrical conductor. This is because, if the barrier layer has a higher content of Ag than the electrical conductor, Ag atoms present in the barrier layer diffuse into the resistor, and accordingly the barrier layer provides no advantages. In the barrier layer composed of AgPd or AgPt, AgPd or AgPt particles become an alloy while the ceramic substrate is being sintered. Thus, a diffusion of Ag atoms is advantageously prevented relative to a structure wherein an Ag electrode is directly connected to a resistor. This is because Ag atoms are quite difficult to be oxidized if they become an alloy. Furthermore, the barrier layers may be formed by sintering a paste layer including particles of AgPd or AgPt which are coated with ultra-thin SiO 2 film. SiO 2 included in the SiO 2 film extremely decreases a diffusion speed of Ag atoms while maintaining electrical conductivity of the barrier layer composed of AgPd or AgPt. Since a resistance of the barrier layer is lower than that of RuO 2 , it does not adversely affect a high speed performance of the ceramic substrate. It should be noted that the barrier layer may be formed of AgPd or AgPt for each of electrical conductors composed of AgPd and AgPt. The advantage obtained by the aforementioned present invention is as follows. The invention provides a stable internal resistance in a glass ceramic multi-layer substrate including a resistor therein, by forming a layer for preventing a diffusion of Ag atoms between the electrical conductor and the resistor. Fig. 1 is a schematic view illustrating a structure of a ceramic substrate in accordance with the invention. Preferred embodiments in accordance with the present invention will be explained hereinbelow with reference to a drawing. EMBODIMENT 1 A multi-layer substrate in accordance with a first embodiment is formed by means of a green sheet manufacturing process. First, aluminum oxide (alumina) powder is screened to obtain particles having the size ranging from 0.8 to 1.2 micrometers, and similarly borosilicate glass power is screened to obtain particles having the size ranging from 1 to 3 micrometers. Then, the particles of aluminum oxide and borosilicate glass are mixed with each other so that each of them occupy 50% by weight of the mixture. Then, the mixture is further mixed with organic vehicle into a slurry phase. Then, a green sheet 1 having a desired thickness is manufactured by a slip-casting process, and subsequently through holes are formed, the holes are filled with a paste, and a pattern of electrical conductor 2 is printed on the green sheet 1. A paste with which the electrical conductor 2 pattern is printed on the green sheet 1 is composed of Ag, AgPd or AgPt. A specific resistance of a sintered conductor is required to be less than 10 µΩ · cm, because if the specific resistance is larger than 10 µΩ · cm, there can be obtained no merit of alumina multi-layer substrate including electrical conductors composed of tungsten (W) having a specific resistance in the range of approximately10 to 20 µΩ · cm. Accordingly, when an electrical conductor is to be composed of AgPd or AgPt, the electrical conductor is required to include Pd or Pt in the range of 5% or less by weight on the basis of the weight of the electrical conductor. After a pattern of the electrical conductor 2 has been formed, a paste of AgPd or AgPt is screen-printed on the electrical conductor 2 to thereby form a barrier layer 3. As mentioned earlier, the weight percent of Ag in the barrier layer 3 has to be lower than that of the electrical conductor 2. The lower the weight percent of Ag in the barrier layer is, the more effectively a diffusion of Ag atoms is prevented. However, if the content of Pd or Pt is raised, the cost would be increased and also a resistance of the barrier layer 3 could not be disregarded. Hence, the weight percent of Ag in the barrier layer 3 is preferably in the range of 60 to 90%. Then, a resistive paste is applied on the barrier layer 3 to thereby form a resistive layer 4. Further, on the resistive layer 4 is deposited a second barrier layer 3A, and a second electrical conductor pattern 2A is formed on the second barrier layer 3A so that a barrier layer is located between a resistive layer and an electrical conductor. After repeating this step to thereby attain a laminated structure, the resultant structure is sintered at the temperature in the range of 800 to 900 degrees centigrade. The thus manufactured multi-layer substrate is cut by 100 mm × 100mm. Then, seven internal resistors are formed in the 100 mm × 100mm substrate. An experiment, in which actual resistance values of the seven internal resistors were measured, was conducted to confirm the advantageous effects of the invention. The results are shown in Table 1 in which T-1 to T-7 indicates each of the seven resistors. Each of the resistors has a square cross-section of 50mm × 50mm so that all of the resistors have a resistance of 50 Ω. It should be noted that a resistor which can be practically used is one having a resistance of 50 ± 20 Ω. UNIT: RESISTOR Ω CONDUCTOR wt% BARRIER LAYER wt% NO. CONDUCTOR BARRIER LAYER RESISTOR T-1 T-2 T-3 T-4 T-5 T-6 T-7 1 Ag(100) NOTHING RuO 2 115 61 35 42 190 21 84 2 Ag(100) AgPd(90/10) RuO 2 62 53 48 38 66 38 55 3 Ag(100) AgPd(80/20) RuO 2 68 49 32 32 60 44 61 4 Ag(100) AgPd(60/40) RuO 2 53 49 46 51 51 48 52 5 Ag(100) NOTHING IrO 2 183 99 84 65 173 41 21 6 Ag(100) AgPd(90/10) IrO 2 61 70 56 45 65 49 48 7 Ag(100) NOTHING RhO 2 143 74 94 35 91 38 94 8 Ag(100) AgPd(90/10) RhO 2 65 70 51 48 62 49 46 9 AgPd(95/5) NOTHING RuO 2 162 94 95 21 32 26 105 10 AgPd(95/5) AgPd(92/8) RuO 2 142 105 33 101 83 51 22 11 AgPd(95/5) AgPt(90/10) RuO 2 62 53 48 50 49 36 52 12 AgPd(95/5) AgPt(70/30) RuO 2 50 48 49 50 53 48 47 The following can be confirmed from Table 1. 1. If the barrier layer is not formed, a dispersion of a resistance is larger than ± 20 Ω. 2. If the content of Ag in the electrical conductor is larger than the content of Ag in the barrier layer, a dispersion of a resistance is larger than ± 20 Ω. EMBODIMENT 2 In a second embodiment, when a paste of AgPd or AgPt is manufactured, organic silicate is additionally mixed with particles of AgPd or AgPt and organic vehicle, and then the mixture is mixed by means of three rolls. The organic silicate is oxidized while the substrate is being sintered, and thereby forms a ultra-thin SiO 2 oxide layer around the particles of AgPd or AgPt. Then, the same experiment as the first embodiment was conducted. The results are shown in Table 2. UNIT: RESISTOR Ω CONDUCTOR wt% BARRIER LAYER wt% NO. CONDUCTOR BARRIER LAYER RESISTOR T-1 T-2 T-3 T-4 T-5 T-6 T-7 1 Ag(100) AgPd(90/10) RuO2 51 49 47 46 53 48 55 2 Ag(100) AgPd(80/20) RuO 2 46 50 51 49 50 48 52 3 Ag(100) AgPd(60/40) RuO2 51 49 47 52 50 49 51 4 Ag(100) AgPd(90/10) IrO 2 52 50 46 51 48 49 50 5 Ag(100) AgPd(90/10) RhO 2 46 51 51 49 47 49 53 6 AgPd(95/5) AgPt(90/10) RuO 2 49 53 47 50 51 46 52 7 AgPd(95/5) AgPt(70/30) RuO 2 46 49 47 54 51 48 49 It was confirmed from Table 2 that a diffusion of Ag atoms is further prevented than the first embodiment, and that a dispersion of a resistance of the seven resistors can be decreased to less than ± 10 Ω by coating AgPd or AgPt particles present in the barrier layer with SiO 2 .

Claims: A ceramic substrate for use with a semiconductor device, the substrate comprising an electrical conductor (2) comprising Ag, a resistor (4) composed of an oxide, and a barrier layer (3), characterized in that the barrier layer (3) is composed of a material selected from a group consisting of AgPd and AgPt, the barrier layer (3) being located between the electrical conductor (2) and the resistor (4), and that the weight content of Ag in the barrier layer (3) is lower than the weight content of Ag in the electrical conductor. A ceramic substrate according to claim 1 and comprising a repeated structure, characterized by: (a) a second barrier layer (3A) composed of a material selected from a group consisting of AgPd and AgPt, and disposed on the resistive layer (4); and (b) an electrical conductor (2A) comprising Ag and disposed on the second barrier layer (3A). The ceramic substrate as recited in claim 1 or 2, wherein the electrical conductor (2) is composed of a material selected from a group consisting of AgPd and AgPt. The ceramic substrate as recited in any of the preceding claims, wherein the oxide is selected from a group consisting of RuO 2 , IrO 2 and RhO 2 . The ceramic substrate as recited in any of the preceding claims where relevant, wherein the barrier layer (3) and/or the second barrier layer (3A) is formed by sintering a paste layer including particles of AgPd or AgPt being coated with SiO 2 film. The ceramic substrate as recited in claim 5, wherein the SiO 2 film is ultra-thin. The ceramic substrate as recited in any of the preceding claims where relevant, wherein the barrier layer (3) and/or the second barrier layer (3A) are(is) formed by screen-printing a paste of AgPd or AgPt on the electrical conductor (2). The ceramic substrate as recited claim 2 or in any of claims 3 to 7 when dependent on claim 2, wherein the second barrier layer (3A) indudes Ag in the range of 60% to 90% by weight on the basis of the weight of the second barrier layer (3A). The ceramic substrate as recited in any of the preceding claims, wherein the ceramic substrate has a multi-layer structure. The ceramic substrate as recited in any of the claims 3 to 9, wherein the electrical conductor (2) includes Pd or Pt in the range of 5% or less by weight on the basis of the weight of the electrical conductor (2). The ceramic substrate as recited in any of the preceding claims, wherein the barrier layer (3) includes Ag in the range of 60% to 90% by weight on the basis of the weight of the barrier layer (3).

Inventors: IKUINA KAZUHIRO, KIMURA MITSURU, IKUINA, KAZUHIRO, KIMURA, MITSURU
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1994
Main classification: H01L23
IPC codes: H01L27, H05K1, H01C17, H01L23, H05K3