Driving method for a solid state image pickup device

Abstract: Incident light is photoelectrically converted in a one-unit pixel photoelectric converter section (300), while an electronic shuttering time two pixel mixture signal charge (301), a field signal charge 1 (302), and a field signal charge 2 (303), are transferred respectively with a 8-phase clock to HCCD1 (304), HCCD2 (305), and HCCD3 (306). After passing through a CDS & clamp circuit (307), they are subjected to a decision of signal saturation by a signal decision circuit (309). After having their outputs selected by a signal selector circuit (308), they are subjected to calculating processing in a signal processing circuit (310) to execute image signal reproduction.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention: The present invention relates to a method for driving a solid state image pickup device for expanding the management range of the quantity of incident light in the high-luminance side and in particular for expanding the management range of the quantity of incident light for elevated luminances by setting up at least two signal charging periods in a specified period represented by the field or frame of a video signal and reproducing the signal charges in the signal charging period without using any external field memory or any frame memory and a method for driving the same. 2.Related Art of the Invention: According to a conventional technique, at least two mutually-different charging periods are set up in one frame or one field in expanding the management range in quantity of incident light. For example, a first charging period T1 corresponding to the conventional vertical scanning period and a second charging period T2 shorter than the first charging period in the vertical blanking period are set up in one field period T F . Then a signal charge Q1 obtained in the first charging period is reproduced with a gain of 1, and a signal charge Q2 obtained in the second charging period is reproduced with a gain (T1/T2). In this place, when the signal charge Q1 reaches a saturation charge quantity, a management range in quantity of incident light being (T1/T2) times greater than the gain in the conventional case is consequently achieved by using the signal information of the signal charge Q2. In regard to the above-mentioned element drive method for expanding the management range in quantity of incident light, there is a proposal of dispensing with any external frame memory (Japanese Patent Laid-Open Publication No. JP-A-63-250980). The above-mentioned proposal describes a method for continuously transferring signal charges obtained in two charging periods dividedly provided in one field period T F in a vertical CCD (VCCD) by producing three signal packets with four pixels and a total of eight transfer electrodes according to the structure of the current CCD, using signal charges of a mixture of two pixels in the first charging period and two packets, and using signal charges of a mixture of four pixels in the second charging period as one packet. From patent abstracts of Japan, volume 15, No. 383 (E-11 16) of September 27, 1991, & JP-A-3 153 176, a solid state imaging apparatus is known including a solid state imager of an interline charge transfer device type, including a plurality of photoelectric conversion cells arranged in a matrix, and a reading gate provided between each of the photoelectric conversion cells in each one column and one adjacent vertical transfer register and controlled for reading and electric charge stored in one of each photoelectric conversion cell to the adjacent vertical transfer register. A memory is connected to receive an image signal sequentially to put it from the solid state imager and has a capacity corresponding to a double of the number of the photoelectric conversion cells of the solid state imager. From EP-A-0 241 800, a solid state image sensor is known having an arrangement to transfer charges produced in photoelectric cells arranged in a matrix using vertical transfer sections and a horizontal transfer section. The vertical transfer section comprises a plurality of electrodes such that one transfer stage is constituted with successive n electrodes and a drive section for driving these electrodes by n-phase transfer clock. A set of photoelectric cell rows located in an area corresponding to the one transfer stage is divided into p groups thereof, thus to read out charges in photoelectric cells of at least one row belonging to a predetermined group among the p groups into one transfer stage of the vertical transfer section and to effect transfer operation corresponding to m stages, wherein m is an integer of at least one, thereafter to recharges in photoelectric cells of at least one row belonging to the subsequent groups. In the penultimate read operation of the matrix, charges in photoelectric cells per at least one row belonging to the subsequent two groups are read out into one transfer stage of the vertical transfer section. The aim of this structure is to reduce power dissipation and improving the signal to noise ratio of the image. Patent abstracts of Japan, volume 15, no. 295 (E-10 94) of July, 26, 1991, & JP-A-3 104 386 discloses a high quality video camera with increased dynamic range of an incident light intensity by outputting a low level or a high level switching signal depending whether an output of a first or a second level converter is smaller or larger than a reference voltage and selecting an output of the first or second level converter depending on the level of the switching signal. In EP-A-0 487 332, an image pickup device is disclosed having a plurality of rows of light receiving cells, a plurality of vertical transfer registers each located adjacent to respective one row of light receiving cells and a control circuit for controlling said light receiving cells and vertical transfer registers. The control circuit makes the light receiving cells and the vertical transfer registers carry out a short exposure operation and a long exposure operation continuously, and then reads out both signals sequentially or in parallel to synthesize an expanded dynamic range signal. Summary of the Invention If in the aim of attaining an extension of the management range of the quantity of incident light for elevated luminances it is required to read two times at a time interval of ΔT for the purpose of addingly mixing the signal charges of the mixture of four pixels, there exist two different types of signal charges T2 and (T2 + ΔT) in an identical packet. When the signal charges of the mixture of four pixels in the two types of charging periods mutually different in time by ΔT are subjected to calculation processing with the gain of (T1/T2) without distinction, there occurs disadvantages such as misalignment in color and misalignment in luminance in adjusting the second charging period T2 according to the quantity of light of the subject. It is the object of the invention to provide a method for driving a solid state image pickup device having a management range of the quantity of incident light which is expanded for elevated luminances without using any external field memory or any frame memory for a subject having a wide range of luminance distribution. This object is attained by the features of claim 1. Preferred embodiments of the invention are subject-matter of the dependent claims. According to the invention, by proposing a drive method and solid state image pickup device free of the difference ΔT between charging periods in the second charging period T2 that is problematic when signal charges are read from a photoelectric converting element to a vertical CCD at least two times in one field period, the management range of the quantity of incident light can be expanded producing neither misalignment in color nor misalignment in luminance. Further, by managing the quantity of light smaller than a standard quantity of light and the quantity of light about two times greater than the standard quantity of light with the first charging period T1 and managing a region of the subject which has come to have a second duration charge quantity in the first charging period T1 with the second charging period T2 in the vertical blanking period, the management range of the quantity of incident light is considerably expanded. The invention is now further explained by means of embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram showing a solid state image pickup device of the present invention. Fig. 2 is a chart for explaining a first drive method of the present invention. Fig. 3 is a diagram showing an A-field of a first drive embodiment of the present invention. Fig. 4 is a diagram showing a B-field of the first drive embodiment of the present invention. Fig. 5 is a diagram of an exemplified first solid state image pickup device of the present invention. Fig. 6 is a graph for explaining the effect of the first embodiment of the present invention. Fig. 7 is a chart for explaining a second drive method of the present invention. Fig. 8 is a diagram of an A-field of a second drive embodiment of the present invention. Fig. 9 is a diagram of a B-field of the second drive embodiment of the present invention. Fig. 10 is a chart for explaining a third drive method of the present invention. PREFERRED EMBODIMENTS The following describes an embodiment of the present invention with reference to the drawings. Fig. 1 shows an exemplified solid state image pickup device driven by the method of the present invention. Four transfer electrodes of a VCCD 110 correspond to a unit pixel 100, while eight transfer electrodes of  V1 transfer electrode 101,  V2 transfer electrode 102,  V3 transfer electrode 103,  V4 transfer electrode 104,  V5 transfer electrode 105,  V6 transfer electrode 106,  V7 transfer electrode 107, and  V8 transfer electrode 108 are used as totally eight transfer electrodes to correspond to two continuous unit pixels, when an 8-phase transfer clock is applied to them. The  V2 transfer electrode 102 and the  V6 transfer electrode 106 are each provided with a read gate 109. Although two read gates are provided for one read electrode by means of a polysilicon of the first layer, the read electrode may utilize the polysilicon of either the first layer or the second layer. It is also permitted to consider that adjoining two pixels in the direction of VCCD as one pixel in the case where the conventional CCD is used. For the element drive examples in Fig. 2 and subsequent figures, a description is provided based on the structure of Fig. 1. Figs. 2, 3, and 4 show embodiments of the solid state image pickup device shown in Fig. 1. Fig. 2 shows an A-FIELD 201 and a B-FIELD 203 of a normal TV frame. Fig. 2 also shows the timing of charge, read, and transfer of signals in the A-FIELD 201 and B-FIELD 203 in each odd-line pixel and each even-line pixel. The odd-line pixel 232 and the even-line pixel 233 are preliminarily made to have coincided charge period start timing by a known electronic shuttering operation (VOD (vertical overflow drain shuttering operation) sweep). The even-line pixel 233 obtains an even-line first signal charge 205 according to a signal input in a period T11 224. An operation of read to the VCCD is executed with timing T AF1 210. Meanwhile, the odd-line pixel 232 obtains an odd-line first signal charge 206 according to a signal input in a period T12 225, and an operation of read to the VCCD is executed with timing T AF21 211. Further in a V-blank period 202, the even-line pixel 233 obtains an even-line second signal charge 207 according to a signal input in a period T2 227. An operation of read to the VCCD is executed with timing T AS1 212. Meanwhile, the odd-line pixel 232 obtains an odd-line second signal charge 208 according to a signal input in a period T2 228 set up in an identical charging period with the period T2 227, and an operation of read to the VCCD is executed with timing T AS21 213. In this place, control of the charging times in the period T2 227 and the period T2 228 executed for the purpose of picking up a region having a high luminance of the subject in the V-blank period 202 is executed by adjusting a VOD-sweep period 229 provided within the entire field period 226. Although the same operation is executed in the B-FIELD 203, it is permitted to replace the charging period of an odd-line first signal charge 214 with the charging period of an even-line first signal charge 215. Figs. 3 and 4 show the timing of the read and transfer operations. A signal charge 240 read with the timing T AF1 210 is transferred in the VCCD by one pixel. With the timing T AF21 211, a signal charge 241 is read. In Fig. 3, twenty clock pulses are used from the timing T AF1 210 to the timing T AF21 211. Subsequently, by using twenty clock pulses from the timing T AS1 212 to the timing T AS21 213, the charging periods of T2 227 and T2 228 are allowed to have the same duration. Further, a signal charge 242 corresponding to the even-line second signal charge 207 and a signal charge 243 corresponding to the odd-line second signal charge 208 are mixed with each other with the timing T AS21 213 in a manner as shown in Fig. 3. There is an interval of twenty clock pulses from T AS1 212 to T AS21 213 between the periods for reading both the signal charges. Subsequently, the signal charges are transferred in the VCCD according to the 8-phase clock. Although the charging periods T2 227 and T2 228 have a charging period of twenty clock pulses in this example, it is of course permitted to provide no limitation on the number of clock pulses. Meanwhile, as described hereinbefore, the charging periods of T2 227 and T2 228 are controlled by increasing or decreasing the interval from T AF21 211 to T AS1 212, according to which the VOD-sweep period 229 is increased or decreased. Fig. 5 shows another embodiment of the invention. Fig. 6 shows the effect of expanding the management range of the quantity of incident light. Incident light is photo-electrically converted in a one-unit pixel photoelectric converter section 300. Meanwhile, an electronic shuttering time two-pixel mixture signal charge 301, a field signal charge 1 302, and a field signal charge 2 303 are transferred respectively by HCCD1 304, HCCD2 305, and HCCD3 306 (HCCD=horizontal CCD). After passing through a CDS & clamp circuit 307, they are subjected to decision of signal saturation by a signal decision circuit 309 based on the saturation or unsaturation condition of signals output from all or a part of the HCCD1, 2, and 3. After being further subjected to selection of output in a signal selector circuit 308, they are put to calculation processing as described hereinafter in a signal processing circuit 310 to execute image signal reproduction. Then an exemplified image reproducing method is shown. In the following conditional expressions, V T represents a voltage corresponding to the saturation charge quantity of an element. First, when the condition of Equation 1 is true in regard to the signal voltages V (T11) and V (T12) in the charging periods T11 and T12, the signals V (T11) and V (T12) are selected by the signal selector circuit 308. When the condition of Equation 1 is false, the signal selector circuit 308 selects the electronic shuttering time two-pixel mixture signal charge 301, while the signal voltage in the charging period T2 is converted into Vsig (T2) in a signal processing circuit 310 through calculation of Equation 2. Although a is defined by Equation 3 in this place, it is permitted to use another appropriate value, for example, the values in Equation 4. It should be noted that the other signals which have not been selected are abandoned. Equation 1: max (V (T11), V (T12)) < V T Equation 2: Vsig (T2) = a × V (T2) Equation 3: a = T11/T2 Equation 4: a = T12/T2 The expansion of the management range of the quantity of incident light of the present embodiment will be described with reference to Fig.6. An output signal charge quantity obtained by the read and transfer operations through mixture of two pixels in a conventional CCD is shown as a conventional two-pixel mixture type saturation electric charge quantity 302. The saturation charge quantity of signal charges in the charging periods T11 224 and T12 225 shown in Fig. 2 (a) come to have a value corresponding to one transfer electrode in one unit pixel in one unit pixel 100 shown in Fig. 1, and therefore the value is one fourth of the conventional two-pixel mixture type saturation electric charge quantity. In forming a luminance signal, a signal charge 240 and a signal charge 241 are added together in an external circuit, and therefore the value is half of the conventional two-pixel mixture type saturation charge quantity. The value is shown as all pixel independent read time saturation electric charge quantity 321. According to the element and drive method of the present embodiment, a signal charge obtained by mixing the even-line second signal charge 207 in the charging period T2 227 with the odd-line second signal charge 208 in the charging period T2 228 can be independently read simultaneously, and therefore an electronic shuttering two-pixel mixing time saturation electric charge quantity 322 can be obtained. In this place, the periods T2 227 and T2 228 can be varied, for example, from 1/500 second to 1/2000 second to allow an effect as represented by variable 325 in Fig. 6 to be obtained. Therefore, a management incident light quantity expansion range 323 greater than a conventional management incident light quantity upper limit 324 can be achieved. Figs. 7, 8, and 9 show an embodiment in the case where VOD-sweep is not used. Fig. 7 shows an odd-line pixel 432 and an even-line pixel 433 as well as the timing of signal charge, read, and transfer in an A-FIELD 401 and a B-FIELD 403 of a normal TV frame. In this case, the charging period start timings of the odd-line pixel 432 and the even-line pixel 433 differ from each other. The even-line pixel 433 obtains an even-line first signal charge 405 according to a signal input in a period T11 424. An operation of read to the VCCD is executed with timing T AF1 410. Meanwhile, the odd-line pixel 432 obtains an odd-line first signal charge 406 according to a signal input in a period T12 425, and an operation of read to the VCCD is executed with timing T AF21 411. Further in a V-blank period 402, the even-line pixel 433 obtains an even-line second signal charge 407 according to a signal input in a period T2 427. An operation of read to the VCCD is executed with timing T AS1 412. Meanwhile, the odd-line pixel 432 obtains an odd-line second signal charge 408 according to a signal input in a period T2 428 set up in an identical charging period with the period T2 427, and an operation of read to the VCCD is executed with timing T AS21 413. In this place, the periods T11 424 and T12 425 differ from each other and also differ depending on whether they are in the A-FIELD 401 or in the B-FIELD 403. Therefore, when the periods T2 427 and T2 428 having the same charging time are controlled, there is a possibility of generating misalignment in color and misalignment in luminance in the period of four fields. However, the pixel data are read independently in the present invention, a calculation (Equation 6) which takes the ratio in charging period (Equation 5) into account can be allowed. Therefore, by using a value Vsig' (T11) calculated in terms of the charging period T12, neither misalignment in color nor misalignment in luminance takes place. Equation 5: b = T12/T11 Equation 6: Vsig' (T11) = b × V (T11) Figs. 8 and 9 show the timing of the read and transfer operations. A signal charge 440 read with the timing T AF1 410 is transferred in the VCCD by one pixel. With the timing T AF21 411, a signal charge 441 is read. In Fig. 3, twenty clock pulses are used from the timing T AF1 410 to the timing T AF21 411. Subsequently, by aligning the timing from T AS1 412 to the timing T AS21 413 in twenty clock pulses, the charging periods in the period T2 427 and T2 428 are allowed to have an identical duration. Further, after a signal charge 442 corresponding to the even-line second signal charge 407 is transferred by one pixel in the period of twenty clock pulses, a signal charge 443 corresponding to the odd-line second signal charge 408 is read through superimposition with the timing T AS21 412 in a manner as shown in Fig. 3 to be mixed with the signal charge and subsequently transferred in the VCCD according to the 8-phase clock. Although the charging periods T2 427 and T2 428 correspond to twenty clock pulses in this example, it is of course permitted to provide no limitation on the number of clock pulses. Fig. 10 shows a case where the charging period of an odd-line first signal charge 414 and the charging period of an even-line first signal charge 415 as shown in Fig. 7 are replaced with each other. In this place, an even-line first signal charge 505 is a signal charge obtained from a signal input in a period T11 524. An operation of read to the VCCD is executed with timing T AF1 510. An odd-line first signal charge 506 is a signal charge obtained from a signal input in a period T12 525, and an operation of read to the VCCD is executed with timing T AF2 511. An even-line second signal charge 507 is a signal obtained from a signal input in a period T2 527. An operation of read to the VCCD is executed with timing T AS1 512. An odd-line second signal charge 508 is a signal obtained from a signal input in a period T2 528, and an operation of read to the VCCD is executed with timing T AS2 513. In the present invention, the periods T11 524 and T12 525 can be set up at an identical duration, the conversion of Equation 6 is not necessary. As described above, in the present invention, the management range in quantity of incident light can be expanded to the high-luminance side without using any field memory or any frame memory.

Claims: A method for driving a solid state image pickup device having a plurality of unit pixels where each one of the plurality of unit pixels corresponds to a pixel in an image, each one of the plurality of unit pixels having at least one input converting section, and CCD electric charge transfer means, characterized by comprising the steps of: setting a first signal charging period and a second signal charging period during one frame or field of a video signal for each one of the plurality of unit pixels, wherein the second signal charging period is shorter than the first signal charging period; and setting the second signal charging periods during the one frame or field for two unit pixels which are adjacent to each other in the vertical direction so that the second signal charging periods for each of the two unit pixels have different start times and similar time durations. The method for driving a solid state image pickup device according to claim 1, wherein the second signal charging period is controlled using an electronic shuttering operation within the one frame or field of the video signal. The method for driving a solid state image pickup device according to claim 1 or 2, wherein each one of the two unit pixels adjacent to each other in the vertical direction produce first signal charges during the second signal charging period, and wherein the method further comprises the steps of mixing the first signal charges during a transfer operation using the CCD electric charge transfer means to produce a mixed signal charge. The method for driving a solid state image pickup device according to claim 3, wherein each one of the two unit pixels adjacent to each other in the vertical direction respectively produce a second signal charge and a third signal charge during the first signal charging period, and wherein the method further comprises: a) transferring the mixed signal charge to an external signal processing circuit using a first horizontal charge coupled device, HCCD; b) transferring the second signal charge to the external signal processing circuit using a second HCCD; and c) transferring the third signal charge to the external signal processing circuit using a third HCCD; wherein steps a), b), and c) are performed in the same horizontal scanning period. The method for driving a solid state image pickup device according to claim 3, wherein each one of the two unit pixels adjacent to each other in the vertical direction respectively produce a second signal charge and a third signal charge during the first signal charging period, and wherein the method further comprises: a) transferring the mixed signal charge to an external signal processing circuit using a first HCCD; and b) transferring the second and third signal charges to the external signal processing circuit using a second HCCD; wherein steps a) and b) are performed in the same horizontal scanning period. A method for driving a solid state image pickup device according to claim 1, wherein: a) a first signal charge is produced during the first signal charging period and a second signal charge is produced during the second signal charging period; further comprising the steps of: b) judging whether the first signal charge is saturated or not saturated; c) determining an input light amount only using the second signal charge when the first signal charge is saturated; and d) determining the input light amount only using the first signal charge when the first signal charge is not saturated. The method for driving a solid state image pickup device according to claim 6, wherein step c) includes the step of enlarging the second signal charge in proportion to a ratio of the first signal charging period to the second signal charging period. The method for driving a solid state image pickup device according to claim 6 or 7, wherein when an electric charge is transferred using a vertical CCD electric charge transfer means having four electrodes provided for one unit pixel, the first signal charge obtained during the first signal charging period and the second signal charge obtained during the second signal charging period are transferred together in said vertical CCD electric charge transfer means.

Inventors: KOMOBUCHI HIROYOSHI, MATSUDA YUUJI, KOMOBUCHI, HIROYOSHI, MATSUDA, YUUJI
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1994
Main classification: H04N3
IPC codes: H04N5, H04N3, H01L27