Photocathode, phototube, and photodetecting apparatus

Abstract: There is disclosed a photocathode comprising: a photoelectric conversion layer for internally exciting photoelectrons in response to incident photons; a semiconductor layer having a photoelectron emission surface for emitting the photoelectrons generated and accelerated in the photoelectric conversion layer from the photoelectron emission surface; an upper surface electrode formed on the photoelectron emission surface of the semiconductor layer; and a lower surface electrode formed on the semiconductor layer so that the lower surface electrode is opposite to the upper surface electrode through the semiconductor layer, the upper surface electrode being divided so as to provide a plurality of pixel electrodes which are electrically insulated from each other, the plurality of pixel electrodes being respectively connected to a plurarity of bias application wires.

Description: The invention relates to a photocathode, a phototube, and a photodetecting apparatus. To perform photodetection including detection of one- or two-dimensional position information of weak light, an apparatus constituted by an image intensifier combined with a solid-state image sensor is generally used. In this apparatus, photoelectrons are excited by photons which are incident from the input window of a housing on a photocathode. The photoelectrons emitted from the photocathode into a vacuum are focused and accelerated by an electron lens system. Thereafter, the photoelectrons are focused by a phosphor and converted into an optical signal again, thereby performing intensification of the light. Photoelectric conversion of this intensified optical signal is performed by the solid-state image sensor such as a CCD again, and position information is extracted as an electrical signal. A photomultiplier having a position detecting function is also used for photodetection. In this apparatus, the anode of the photomultiplier is divided and multiplied to perform photodetection, thereby obtaining position information. In addition, another example of a photomultiplier having the position detecting function is described in Japanese Patent Laid-Open No. 60-20441. In this photomultiplier, a photocathode is formed on the inner wall of a faceplate. A mesh electrode is provided between the photocathode and a focusing electrode for forming an electric field which guides photoelectrons emitted from the photocathode to a first-stage dynode. This mesh electrode is arranged on only one side at a position away from the photocathode by a 1/10 distance between the photocathode and the focusing electrode. The mesh electrode forms a field distribution for gradually preventing the photoelectrons from reaching the first-stage dynode from one side to the other side. Of the photoelectrons emitted from the entire photoelectron emission surface of the photocathode, photoelectrons on one side are prevented from reaching the first-stage dynode when a bias voltage is applied to the mesh electrode. More specifically, the orbits of the photoelectrons are changed to multiply only photoelectrons emitted from a predetermined portion of the emission surface and output them as an electrical signal. On the basis of the output signal level and the bias voltage level applied to the mesh electrode, photodetection with position resolution is performed by an external determination apparatus. In this manner, only the photoelectrons which are excited by light incident on a specific position and whose orbits are not interrupted are detected to perform position detection. In the conventional apparatus in which an image intensifier and a solid-state image sensor are combined, conversion of optical signal - electrical signal - optical signal - electrical signal cannot be substantially avoided. Therefore, a coupling loss or the like decreases the efficiency, resulting in poor performance. In the multianode photomultiplier, crosstalk between the photocathode and the multiplier section, or between the multiplier section and the anode poses a problem, and the position resolution is not substantially improved. In the photomultiplier having a mesh electrode, only some of photoelectrons emitted from the entire photoelectron emission surface of the photocathode are detected upon measurement to perform position detection. For this reason, a substantial problem on S/N ratio arises. As for the position resolution, the orbits of the photoelectrons are changed to perform position determination, the crosstalk is structurally increased. In addition, position determination is possible at only about two portions for one photomultiplier, and it is substantially difficult to realize a multi-element structure. The invention aims to provide a photocathode having a position detecting function with minimum crosstalk, and a phototube and a photodetecting apparatus using this photocathode. According to one aspect of the invention there is provided a photocathode comprising: a semiconductor layer including a photoelectric conversion layer for generating photoelectrons in response to incident photons, and a photoelectron emission layer for accelerating and emitting the photoelectrons generated by said photoelectric conversion layer from a photoelectron emission surface; an upper surface electrode formed on said photoelectron emission surface of said semiconductor layer; and a lower surface electrode formed on a lower surface of said semiconductor layer opposite said photoelectron emission surface, characterised in that said upper surface electrode is divided so as to provide a plurality of pixel electrodes which are electrically insulated from each other, said plurality of pixel electrodes being respectively connected to a plurality of bias application wires. According to another aspect of the invention there is provided a phototube comprising a photocathode as abovementioned, the phototube further comprising an anode for receiving photoelectrons emitted from said photocathode; and a vacuum vessel, the photocathode and the anode being disposed in said vacuum vessel. According to a further aspect of the invention there is provided a photodetecting apparatus comprising a phototube as abovementioned, the photodetecting apparatus further comprising a power supply for applying a potential to said photocathode and said anode; timing control means; and memory means, and wherein said timing control means is arranged continuously to apply a timing pulse to said switching circuit upon reception of a start signal, and said switching circuit sequentially switching ON/OFF states of said plurality of switching elements in response to the timing pulse, and said memory means is arranged to start a storage operation upon reception of the start signal and to store an output from said anode in correspondence with a position of said pixel electrode which is sequentially set in a photoelectron emission state on the basis of the timing pulse. A photocathode embodying the invention includes a photoelectric conversion layer for internally exciting photoelectrons by incident photons, a semiconductor layer for emitting the photoelectrons generated and accelerated in the photoelectric conversion layer from a photoelectron emission surface, an upper surface electrode formed on the semiconductor layer of the photoelectron emission surface, and a lower surface electrode formed on the semiconductor layer so that said lower surface electrode is opposite to said upper surface electrode through the semiconductor layer the upper surface electrode is divided to form a plurality of pixel electrodes which are electrically insulated from each other, the plurality of pixel electrodes being respectively connected to a plurality of bias application wires. A phototube embodying the invention comprises a vacuum vessel, a photocathode disposed in the vacuum vessel, and an anode, disposed in the vacuum vessel, for receiving photoelectrons emitted from the photocathode, wherein the photocathode includes a photoelectric conversion layer for internally exciting photoelectrons by incident photons and has a semiconductor layer for emitting the photoelectrons generated and accelerated in the photoelectric conversion layer from a photoelectron emission surface, an upper surface electrode formed on the photoelectron emission surface, and a lower surface electrode formed on the semiconductor layer opposing the photoelectron emission surface to oppose the upper surface electrode, the upper surface electrode being divided to form a plurality of pixel electrodes which are electrically insulated from each other, and the plurality of pixel electrodes being connected to a plurality of bias application wires for individually applying a bias potential positive with respect to the lower surface electrode, the vacuum vessel incorporates switching control means having a plurality of switching elements for individually connecting/disconnecting the plurality of bias application wires with the plurality of pixel electrodes to individually switch bias application, a switching circuit for individually turning on/off the plurality of switching elements, and a plurality of switching wires for individually connecting a plurality of output terminals of the switching circuit to control terminals of the plurality of switching elements, and of a plurality of stem pins extending outside from the vacuum vessel, at least one is connected to the lower surface electrode, at least one is connected to the bias application wire, at least two are connected to input terminals of the switching circuit, and at least one is connected to the anode. A photodetector embodying the invention comprises a phototube having a photocathode and an anode in a vacuum vessel, a power supply for applying a potential to the photocathode and the anode, timing control means, and memory means. The photocathode includes a photoelectric conversion layer for internally exciting photoelectrons by incident photons and has a semiconductor layer for emitting the photoelectrons generated and accelerated in the photoelectric conversion layer from a photoelectron emission surface, an upper surface electrode formed on the semiconductor layer of the photoelectron emission surface, and a lower surface electrode formed on the semiconductor layer opposing the photoelectron emission surface to oppose the upper surface electrode. The upper surface electrode is divided to form a plurality of pixel electrodes which are electrically insulated from each other, and the plurality of pixel electrodes are connected to a plurality of bias application wires for individually applying a bias potential positive with respect to the lower surface electrode. A plurality of switching elements for individually connecting/ disconnecting the plurality of bias application wires with the plurality of pixel electrodes to individually switch bias application, a switching circuit for individually turning on/off the plurality of switching elements, and a plurality of switching wires for individually connecting a plurality of output terminals of the switching circuit to control terminals of the plurality of switching elements are provided in the vacuum vessel. The timing control means continuously applies a timing pulse to the switching circuit upon reception of a start signal, and the switching circuit sequentially switches ON/OFF states of the plurality of switching elements in response to the timing pulse, and the memory means starts a storage operation upon reception of the start signal and stores an output from the anode in correspondence with a position of the pixel electrode which is sequentially set in a photoelectron emission state on the basis of the timing pulse. According to the photocathode embodying the invention, since the upper surface electrode is divided to form the plurality of pixel electrodes, and a bias potential is individually applied to these pixel electrodes, only pixels to which the bias potentials are applied can emit the internally generated photoelectrons. For this reason, when the pixel electrodes are arranged in a one-dimensional array, one-dimensional position resolution can be realized, and when the pixel electrodes are arranged in a two-dimensional matrix, two-dimensional position resolution can be realized. According to the phototube embodying the invention, since the above-described photocathode is provided in the vacuum vessel, and at the same time, the switching control means for switching bias application to the plurality of pixel electrodes is provided, a phototube having one- or two-dimensional position resolution can be realized. The photodetector embodying the invention comprises the timing control means and the memory means in addition to the above-described phototube and the power supply. This timing control means can store the one- or two-dimensional image of weak light in the memory means because the memory means stores the output from the anode in correspondence with position information of a pixel electrode in the phototube, which is set in the photoelectron emission state. The invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus are not to be considered as limiting the present invention. Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the scope of the claimed invention will become apparent to those skilled in the art form this detailed description. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a photocathode and a phototube having the photocathode, in which the upper side is a plan view of the photocathode, and the lower side is a longitudinal sectional view of the phototube taken along line X 1 - X 1 of the plan view; Fig. 2 is a view showing the energy band structure of the photocathode in Fig. 1, in which the upper side is a view when no bias voltage is applied, and the lower side is a view when a bias voltage is applied; Fig. 3 is a perspective view showing the assembled body of the photocathode according to the embodiment in Fig. 1; Fig. 4 is a perspective view showing an example of the pattern of a pixel electrode according to the embodiment in Fig. 1; Fig. 5 is a view three-dimensionally showing an equivalent circuit of the photocathode according to the embodiment in Fig. 1; Fig. 6 is a view two-dimensionally showing the equivalent circuit of the photocathode according to the embodiment in Fig. 1; Fig. 7 is a timing chart showing an operation of the embodiment in Fig. 1; Fig. 8 is a view showing a photodetecting apparatus using the photocathode according to the embodiment in Fig. 1; Fig. 9 is a view of another example of the assembled body of the photocathode according to the embodiment in Fig. 1, including a plan view, a side view, and a bottom plan view; Fig. 10 is a plan view showing other examples of the pixel electrode according to the embodiment in Fig. 1; Fig. 11 is a view showing a head-on type photomultiplier using the photocathode according to the embodiment; Fig. 12 is a view showing a head-on type photomultiplier using the photocathode according to the embodiment; Fig. 13 is a view showing a side-on type photomultiplier using the photocathode according to the embodiment; Fig. 14 is a view showing still another embodiment in which pixel electrodes are arranged in a two-dimensional matrix; Fig. 15 is a view showing the embodiment, in which the pixel electrodes are arranged in the two-dimensional matrix; Fig. 16 is a timing chart showing the operation of the embodiment in Fig. 14, in which the pixel electrodes are arranged in the two-dimensional matrix; Fig. 17 is a view showing yet another embodiment in which pixel electrodes are arranged in a two-dimensional matrix; and Fig. 18 is a block diagram showing a photodetector according to the above embodiments. As shown in Fig. 1, a semiconductor layer 100 serving as the main body of a photocathode 1 is constituted by an InGaAs light absorption layer 102 formed on an InP substrate 101, and an InP contact layer 103 formed on the InGaAs light absorption layer 102. An ohmic electrode 104 consisting of, e.g., Au (gold) is formed as a lower surface electrode on the lower surface of the InP substrate 101. A Shottky electrode 105 consisting of, e.g., Al (aluminum) is formed as an upper surface electrode on the upper surface of the InP contact layer 103. The ohmic electrode 104 is formed to be thin or have a large number of openings to transmit incident light. The Shottky electrode 105 is divided to constitute pixel electrodes 105 1 , 105 2 ,..., 105 n , all of which form a one-dimensional array. Each pixel electrode is patterned in a mesh, and photoelectrons can pass through these openings. On the upper surface of the InP contact layer 103, particularly on the opening portions of the mesh-like pixel electrode, Cs (cesium) or the like is thinly coated to decrease the work function on the upper surface, so that the photoelectrons can be easily emitted from the semiconductor layer 100 into a vacuum. As shown in Fig. 1, this photocathode 1 is mounted in a vacuum vessel 21, and an anode 22 is arranged at a position opposing the photocathode 1. Bias application wires 106 1 , 106 2 ,..., 106 n are connected to the pixel electrodes 105 1 , 105 2 ,..., 105 n , respectively, and connected to a power supply terminal 301 through a switch SW. On the other hand, the ohmic electrode 104 is connected to a power supply terminal 302. The terminal 301 has a high potential positive with respect to the terminal 302. For this reason, only the pixel electrodes 105 1 to 105 n to which a bias voltage is applied from the terminal 301 by the switch SW have a high potential positive with respect to the ohmic electrode 104, and photoelectrons can be emitted from the openings of the pixel electrodes or part of the photoelectron emission surface near those openings. The photoelectrons emitted into the vacuum are moved in the direction of the anode 22. This is because the anode 22 is biased at a higher positive potential through a power supply terminal 303. As shown in Fig. 2, when light (hν) to be detected is incident through the ohmic electrode 104, photoelectric conversion is performed in the InGaAs light absorption layer 102 having a narrow band gap to generate photoelectrons (-e). At this time, if a bias voltage is applied between the ohmic electrode 104 and the Schottky electrode 105, the photoelectrons are accelerated in the semiconductor layer 100 toward the photoelectron emission surface to obtain a high energy, and emitted into the vacuum (level VL). Therefore, when the ON/OFF state of a bias applied to the pixel electrodes 105 1 to 105 n formed by dividing the Schottky electrode 105 is individually switched by the switch SW, only the pixel electrodes set in the ON state by the switch SW can emit the photoelectrons generated in the InGaAs light absorption layer 102 from the photoelectron emission surface outside the semiconductor layer 100, i.e., into the vacuum. In the photocathode in Fig. 3, the pixel electrodes are arranged in a one-dimensional array and fixed to a holder. The long semiconductor layer 100 is fixed to a ceramic holder 401 fixed to a metal mold 402 of molybdenum. The semiconductor layer 100 is insulated from the metal mold 402. Terminal pins 403 1 to 403 4 are fixed to the metal mold 402 through insulating members. The pin 403 1 is connected to a positive bias power supply +V B and a bias application line (not shown) on the semiconductor layer 100. The pin 403 2 is connected to ground (earth) and the ohmic electrode 104 on the semiconductor layer 100. The pins 403 3 and 403 4 are connected to input terminals of a shift register 5 on the semiconductor layer 100. The shift register 5 serves as a switching control means for sequentially applying a bias voltage to the pixel electrodes 105 1 to 105 n . A start pulse SP and a.clock pulse CLK (to be described later) are input to the shift register 5 through the terminal pins 403 3 and 403 4 . The upper surface of the semiconductor layer 100, except for the photoelectron emission surface, is coated by an insulating film 120 of, e.g., SiO 2 . Fig. 4 is a perspective view showing the (i-1)th, ith, and (i+1)th pixel electrodes 105 1 to 105 n in Fig. 3. More specifically, a pixel electrode 105 i is patterned in a mesh to have 15 openings and has a switching element S i of a field effect transistor (FET) at a corner portion. The gate electrode of the FET is connected to the ith output terminal of the shift register 5 by an Al wire 501 i . Therefore, when a pulse is input from the shift register 5 through the Al wiring 501 i , the ith switching element S i is turned on, and a bias voltage +V B is applied to the pixel electrode 105 i from the bias application wire 106 1 . This operation is also performed for the 1st to (i-1)th, and (i+1)th to nth pixel electrodes. Fig. 5 is a view three-dimensionally showing an equivalent circuit. As shown in Fig. 5, diodes D 1 to D n using the ohmic electrode 104 as a cathode are equivalently formed between the ohmic electrode 104 and the pixel electrodes 105 1 to 105 n , respectively. When switches S i to S n are turned on in accordance with outputs from the shift register 5, the diodes D 1 to D n of the pixel electrodes are individually reverse-biased. At this time, the photoelectrons are accelerated toward the pixel electrodes 105 by the electric field formed in the semiconductor layer 100 in the reverse-biased state to obtain a high energy, and emitted from the semiconductor layer 100, as shown in Fig. 2. Note that the clock pulse CLK is input to an input terminal 502 of the shift register 5, and the start pulse SP is input to a terminal 503. The operation at this time will be described with reference to Figs. 6 and 7. Reference symbols P 1 to P n denote photodetection outputs in the pixels corresponding to the pixel electrodes 105 1 to 105 n , respectively. The outputs P 1 to P n are extracted as an output A OUT from the anode 22 in the arrangement shown in Fig. 1. As shown in Fig. 7, the start pulse SP is applied to start the shift register 5. When the pulse SP is applied, the shift register 5 outputs a pulse from the output terminals 501 i to 501 n in response to the clock pulse CLK. With this operation, the switching elements S 1 to S n comprising the FETs are sequentially turned on to sequentially apply the bias +V B to the pixel electrodes 105 1 to 105 n . This operation sequentially allows photoelectron emission from the pixels, and the outputs P 1 to P n are sequentially extracted outside as the anode output A OUT . A photodetecting apparatus to which the photocathode according to the above embodiment is applied will be described with reference to Fig. 8. As shown in Fig. 8, the transmission photocathode 1 is mounted in the input window of the vacuum vessel 21. A switching control unit 50, the anode 22, and a dynode 25 for secondary-electron multiplying photoelectrons are arranged in the vacuum vessel 21. A power supply 61 applies, through stem pins extending through the vacuum vessel 21, an anode potential +V A to the anode 22, a dynode potential V D to the dynode 25, and the bias potential +V B to the switching control unit 50. A timing control unit 62 outputs the start pulse SP in accordance with designation of an operator or the like and continuously outputs the clock pulse CLK having a predetermined period. A signal processing circuit 63 amplifies the anode output A OUT , performs a threshold processing to remove noise or analog/digital conversion, and supplies output signals to a storage unit 64 having a controller such as a microprocessor. A display unit 65 is connected to the storage unit 64. In this arrangement, when the start pulse SP is output from the timing control unit 62, the switching control unit 50 and the storage unit 64 are started and operated in response to the clock pulse CLK. More specifically, every time the clock pulse CLK is input, the switching control unit 50 sequentially outputs a pulse from the output terminal corresponding to each pixel electrode, thereby allowing each pixel to emit photoelectrons. The photoelectrons emitted in this manner are multiplied by the dynode 25 and received by the storage unit 64 through the signal processing circuit 63. At this time, the clock pulse CLK from the timing control unit 62 is also applied to the storage unit 64. For this reason, the controller of the storage unit 64 stores, in accordance with count value of the clock pulse CLK, the anode output A OUT in correspondence with the position of the pixel which is set in the photoelectron emission state. For example, the storage unit 64 stores the value of the anode output A OUT (a digital-converted value) as data using the count value of the clock pulse CLK as an address. This processing can be understood from the timing chart in Fig. 7. When the sequential ON/OFF switching operation for each pixel electrode is repeated a plurality of times, and the anode output A OUT is added for each pixel and stored in a storage area of the storage unit 64, which corresponds to the position of the pixel, data of the detected light can be obtained as image data. This image data is displayed on the display unit 65 having a CRT or the like. Fig. 9 is a view showing another example of the photocathode according to the embodiment in Fig. 1, in which the upper side is a plan view, the central portion is a partially cutaway side view, and the lower side is a bottom plan view. The InGaAsP light absorption layer 102 and the InP contact layer 103 are epitaxially grown on the InP substrate 101. The Au ohmic electrode 104 is formed on the lower surface of the InP substrate 101. A plurality of Al Schottky electrodes 105 are formed in a pattern on the InP contact layer 103 to have a Schottky junction with the InP contact layer 103. The semiconductor layer 100 comprising the substrate 101, the light absorption layer 102, and the contact layer 103 may have a heterojunction structure consisting of GaAs, AlAs, or a mixed crystal thereof, or may have a heterojunction structure consisting of Ge (germanium), Si (silicon), or a mixed crystal thereof. The Schottky electrode 105 can be formed of, e.g., Al, Au, Ag (silver), W (tungsten), Ti (titanium), or an alloy thereof. The Schottky electrode 105 may be a mesh-like electrode comprising linear members crossing perpendicular to each other, as shown in Fig. 9, or may have a pattern as shown in Fig. 10. Referring to Fig. 10, the view on the upper side shows a pattern of a mesh-like electrode having a hexagonal opening. The view at the central portion shows a stripe pattern of a grid-like electrode comprising parallel members. The view on the lower side shows a comb-like pattern. In all the patterns, an interval between the openings through which the photoelectrons pass is set to about 10 µm or less. The light may be incident through the lower surface, i.e., the ohmic electrode 104. However, the light may also be incident through the upper surface, i.e., the openings of the Schottky electrode 105. When the light is to be incident from the lower surface, the ohmic electrode 104 is formed of a material having light transmission properties, a sufficiently thin metal film for transmitting the light, or a metal film having a large number of openings for transmitting the light. Referring to Fig. 9, the switches S 1 to S n of the FETs are formed near the corresponding pixel electrodes 105 1 to 105 n , respectively. The ON/OFF operation of a bias voltage to the electrodes 105 1 to 105 n is performed by the switching function of the FETs. A thin Cs (cesium) film is formed on the photoelectron emission surface to decrease the work function. As the coating material, an alkali metal, an alkali metal compound, or an oxide or fluoride thereof is used. K (potassium), Na (sodium), and Rb (rubidium) are included in alkali metals in addition to Cs. The substrate 101 is fixed by the ceramic holder 401. Except for the portion where the Al Schottky electrode 105 is formed, the upper surface of the substrate 101 is coated by the insulating film 120 consisting of SiO 2 or SiN. In the example shown in Fig. 9, the shift register 5 comprising a transistor is formed on the semiconductor layer 100. The gates of the FETs S 1 to S n are connected to n output terminals of the shift register 5, respectively. The shift register 5 generates a scanning pulse in accordance with these externally applied start pulse SP and clock pulse CLK to sequentially turn the FETs S 1 to S n on, thereby addressing the Al Schottky electrodes 105 1 to 105 n . Note that the terminals 403 1 and 403 4 are used to connect the circuits on the substrate 100 to the external circuits. The terminals 403 3 and 403 4 are terminals for inputting a signal to the shift register 5, and the terminal 403 1 is a terminal for externally applying the bias voltage +V B to the Schottky diodes D 1 to D n through the FETs S 1 to S n . Fig. 11 is a view showing a head-on type photomultiplier to which the photocathode according to the embodiment is applied, in which the upper side is a schematic view of a faceplate when viewed from the inside, and the lower side is a sectional view of a housing 21 in an axial direction. Note that n = 6 for illustrative convenience. A ceramic holder 402 for fixing a semiconductor substrate serving as the photocathode is fixed to a fixing fitment 405 of molybdenum by spot welding. An electrode terminal 403 is connected on the outer side of the faceplate. A focusing electrode 26 and eight stages of dynodes 25 1 to 25 8 are arranged in the vacuum vessel, i.e., the housing 21. An anode 22 is provided in front of a reflection dynode 25 9 at the ninth stage. In this photomultiplier, six sets of terminal pins 403 are provided in correspondence with six pixels, respectively, and the pixels for emitting the photoelectrons are switched in accordance with outputs from an external control circuit. In a photomultiplier shown in Fig. 12, a control circuit is realized by the shift register 5 provided on the faceplate 405. An input operation of a start pulse SP and a clock pulse CLK to this shift register 5 is realized by a stem pin 406. Both the application examples in Figs. 12 and 13 use a transmission photocathode, i.e., a photocathode for emitting photoelectrons in the same direction as the photon incident direction (that is, the photon incident surface is opposite to the photoelectron emission surface). An example shown in Fig. 13 uses a reflection photocathode, i.e., a photocathode for emitting photoelectrons in the direction opposite to the photon incident direction (that is, the photon incident surface also serves as the photoelectron emission surface). This photomultiplier is called a side-on type photomultiplier, and Fig. 13 is a cross-sectional view of its structure. Photons incident from the vacuum vessel 21 formed of, e.g., glass pass through the focusing electrode (mesh-like electrode) and are incident on the photocathode 1. The emitted photoelectrons are multiplied by the dynodes 25 1 to 25 8 and incidant on the anode 22. The operation of the photomultipliers in Figs. 12 to 14 can be explained with reference to the timing chart in Fig. 7. Referring to Fig. 7, "S 1 to S n " represent output levels from the shift register to the FET switches. When the output level is at high level, the switch is in an ON state. When the start pulse SP goes to high level, the shift register 5 starts the operation. In accordance with the clock pulse CLK, the FETs are sequentially operated to turn the switches S 1 to S n on. When the switches S 1 to S n are turned on, the pixel electrodes 105 1 to 105 n to which a predetermined bias voltage is applied (i.e., the Schottky diodes to which a bias voltage is applied) are operated as electron emission surfaces. As a matter of course, the Schottky electrodes to which no bias voltage is applied are not operated as the photoelectron emission surfaces. Therefore, no photoelectron is emitted regardless of light incident. "P 1 to P n " in Fig. 7 represent bias voltages on the photoelectron emission surfaces. When the voltage is at high level, the photoelectron emission surface is in an operative state. Assume that light is incident on the portion P 3 of the photoelectron emission surface of the photomultiplier. In this case, photoelectrons are emitted when a bias voltage is applied to this portion P 3 . The photoelectrons emitted from the photoelectron emission surface P 3 are orbit-corrected by the focusing electrode and incident on the first-stage dynode. The first-stage dynode generates and emits secondary electrons several times the incident primary electrons (photoelectrons). These secondary electrons are multiplied by the second-stage dynode, the third-stage dynode,... and finally multiplied by about 10 6 and detected as a photocurrent by the anode 22. The photoelectron emission surfaces P 1 to P n are sequentially operated in accordance with an address signal from the shift register 5, so that the photoelectrons from each photoelectron emission surface are multiplied and detected as a photocurrent. When the clock pulse CLK input to the shift register 5 is synchronized with a signal read by the anode 22, one of the photoelectron emission surfaces P 1 to P 6 which has emitted the photoelectrons as the anode output A OUT is determined. Therefore, one-dimensional position information of the incident light can be obtained from the timing of the anode output A OUT and the clock pulse CLK. In this case, the shift register 5 and the photoelectron emission surface are formed on the same substrate to perform the switching and addressing operations of the FETs. However, as in Fig. 11, the bias voltage to the Schottky electrode 105 can be directly controlled from the terminal for each pixel to perform control without using the shift register 5. Unless the wiring is complicated, the shift register 5 can be formed outside the semiconductor substrate constituting the photocathode. The operation of the photomultiplier in Fig. 12 is the same as that of the above-described photomultiplier in Fig. 11. If light is incident on the portion P 3 of the photoelectron emission surfaces, the photoelectron emission surfaces P 1 to P 6 are sequentially operated in accordance with an address signal from the shift register 5. For this reason, the photoelectrons emitted from the photoelectron emission surface P 3 are orbit-corrected by the focusing electrode and incident on the first-stage dynode. The first-stage dynode generates and emits secondary electrons several times the incident primary electrons. These secondary electrons are multiplied by the second-stage dynode, the third-stage dynode,... and finally multiplied by about 10 6 and detected as a photocurrent by the anode 22. Therefore, when the clock pulse CLK input to the shift register 5 is synchronized with a signal read by the anode 22, one of the photoelectron emission surfaces P 1 to P 6 which has emitted the photoelectrons as the anode output can be determined. The photocathode can also be applied to a side-on type photomultiplier, and an application example is shown in Fig. 13. A reflection photoelectron emission surface having a one-dimensional position detecting function is provided at a position where light hν is incident. As in the above examples, generated photoelectrons are multiplied by the dynodes 25 1 to 25 8 and detected by the anode 22. The photoelectron emission direction is different from that of the above-described transmission photoelectron emission surface. However, the operating method is the same as in the head-on type photomultiplier. Position detection by a reflection photoelectron emission surface, which is conventionally impossible, can be performed according to the present invention. Fig. 14 is a view showing a photoelectron emission surface according to still another embodiment of the present invention, in which the photoelectron emission surface is constituted to have a two-dimensional position detecting function. In this embodiment, a plurality (m rows) of photoelectron emission surfaces having the one-dimensional position detecting function as described above are arranged in the longitudinal direction of Fig. 14. Although not included in Fig. 14, a shift register for addressing the photoelectron emission surfaces along the vertical direction is formed externally (on the left side of Fig. 14). More specifically, m shift registers 5A 1 to 5A m are formed on a substrate 100 constituting a photocathode 1 in correspondence with pixel electrodes 105 11 to 105 1n , 105 21 to 105 2n ,..., 105 m1 to 105 mn . The shift registers externally provided are connected to m rows of bias application wires 106 1 to 106 m through terminal pins, respectively. The first shift registers 5A 1 to 5A m externally input a clock pulse CLK and a start pulse SP through the terminal pins, and have n output terminals in correspondence with the pixel electrodes. A second shift register which is externally provided also inputs the clock pulse CLK and the start pulse SP. The photocathode arranged in a two-dimensional matrix of m rows x n columns of pixel electrodes is realized by an output from the second shift register. Fig. 15 is a view showing an equivalent circuit when the photoelectron emission surface having m x n pixel structure is operated, in which a portion enclosed by a dotted line represents the circuit formed on the substrate in Fig. 14. The first registers 5A 1 to 5A m in the horizontal direction have the same circuit arrangement as in Fig. 2. The first registers are simultaneously operated in parallel in accordance with the start pulse SP and the clock pulse CLK 3 to sequentially turn switches S 11 to S mn on. Switches SB 1 to SB m are connected to the output terminals of the second shift register 5B in the longitudinal direction, addressed by the shift register 5B in accordance with a clock pulse CLK 1 , and sequentially turned on. The switches S 11 to S mn provided to the output terminals of the shift registers 5A 1 to 5A m are connected in series to the switches SB 1 to SB m with respect to a bias power supply +V B . When both the switches connected in series to the power supply are turned on, the bias voltage +V B is externally applied to Schottky diodes D 11 to D mn . A photomultiplier having a two-dimensional position detecting function can be constituted by using the photoelectron emission surface in Figs. 15 and 16, as in the photomultiplier having the one-dimensional position detecting function. Fig. 16 is a timing chart of the operation of this photomultiplier. "S" in Fig. 16 represents an output level from the shift register to the FET switch. When the output level is at high level, the switch is in an ON state. When the start pulse SP goes to high level, all the shift registers simultaneously start the operation. When the clock pulse CLK 1 is input, the shift register 5B sequentially turns the FETs on in the longitudinal direction. First of all, the switch SB 1 is addressed and turned on. In accordance with a clock pulse CLK 2 , the shift registers in the horizontal direction is also simultaneously operated in parallel. If all the outputs from these shift registers are at high level, the bias voltage +V B is applied to cause photoelectron emission surfaces P 11 to P mn to emit photoelectrons. In the timing chart in Fig. 16, when the switch S 11 is in the ON state, the switches S 21 to S 2m in the longitudinal direction are also in the ON state. However, if the switch SB 1 is in the ON state, the bias voltage +V B is applied to only the photoelectron emission surface P 11 and the photoelectron emission surface P 11 is operated. When the switch SB 1 is in the ON state, the switches of the switches S 11 to S mn in the longitudinal direction are sequentially turned on to sequentially operate the photoelectron emission surfaces P 11 to P 1n . This operation is also sequentially performed for the switches SB 2 to SB m . When the clock pulse CLK 1 is synchronized with the clock pulse CLK 2 from shift registers A 11 to A mn , and the width of the clock pulse CLK 1 is set to n times the period of the clock pulse CLK 2 , the switches are turned on to sequentially apply the bias voltage +V B to the Schottky diodes P 11 to P mn from the upper left portion to the lower right portion in Fig. 15. Photoelectrons generated by excitation of the incident light are sequentially emitted from the photoelectron emission surfaces P 11 to P mn from the upper left portion to the lower right portion in Fig. 15, multiplied, and detected. As in the above embodiment, when the clock pulses CLK 1 and CLK 2 are synchronized with a read signal, two-dimensional position information of the incident light can be obtained. Therefore, when the clock pulses CLK 1 and CLK 2 are synchronized with the anode output, two-dimensional position detection can be performed. As a matter of course, as described above, the shift registers or the switching FETs may be formed on the substrate where the photoelectron emission surfaces are formed, or may be formed on a remaining portion. As shown in Fig. 17, all of first and second shift registers may be formed on a substrate 100 constituting the photocathode. With this arrangement, since the terminal pins of the substrate 100 can be largely reduced, a multi-pixel structure can be realized to improve the position resolution. Note that the same reference numerals or symbols as in Figs. 15 and 16 denote the same elements in Fig. 17. Fig. 18 is a view showing an arrangement system of an optical position detecting apparatus using the photomultiplier embodying the invention. This system is constituted by a photomultiplier PMT, a driving circuit for driving the photomultiplier PMT and a read circuit unit 82 for reading a signal, a DC power supply unit 81 for applying a high voltage to the photomultiplier PMT, a pulse generator 83 for generating an input clock pulse (e.g., CLK, CLK 1 , or CLK 2 ) to the photomultiplier PMT, an A-D converting unit 84 for converting a read signal from the photomultiplier PMT, an oscilloscope (display unit such as a CRT or LCD) 85, and a control computer unit 86. Except for the photomultiplier PMT, all the elements are components conventionally used. As described above, when the generation timing of an input clock pulse to the photomultiplier PMT is controlled by the computer 86, and a read signal is received from the photomultiplier PMT, position information of light incident on the photomultiplier PMT can be easily obtained. This information can also be converted into image data to be displayed by the display unit. As described above, although the photoelectron emission surface is formed on one substrate, when a bias voltage is individually applied to a plurality of pixel electrodes, a plurality of photoelectron emission surfaces can be separately operated. For this reason, a photodetector having a structure much simpler than that of a conventional photodetector having a photoelectron emission surface can be provided to perform position detection with minimum crosstalk. With the photoelectron emission surface, secondary-electron multiplication of photoelectrons allows noise-free photodetection with an ultrahigh sensitivity. For this reason, position detection under weak light or detection of image information can be easily performed. In addition, since a portion to which no bias voltage is applied does not emit electrons which are generated by a dark current, no noise is generated from the portion which does not operate as a photoelectron emission surface, and a substantially noise-free photodetector can be realized. Therefore, the photodetector using the photoelectron emission surface of the present invention, and a photodetecting apparatus using this photodetector allow noise-free position detection with an ultrahigh sensitivity. The conventional photoelectron emission surface having a position detecting function of this type must have a so-called transmission structure in which the light incident direction is different from the photoelectron emission direction. However, a so-called reflection structure in which the light incident direction and the photoelectron emission direction are same can also have the position detecting function, thereby largely increasing the degree of freedom of a device structure or design. Photoelectrons emitted from the entire photoelectron emission surface for performing photoelectric conversion of incident light are not selectively multiplied, and part of the photoelectron emission surface is operated upon application of a bias voltage. For this reason, an electron emission surface having a noise-free position detecting function with minimum crosstalk can be easily obtained. By adding a multiplication unit to form a photomultiplier unit, a photodetector having the position detecting function with a higher sensitivity can be realized. The invention is not limited to the above embodiments, and various modifications can be made. For example, although the photoelectron emission surface using InP or InGaAsP as the main material has been exemplified, the material is not limited to this, as a matter of course. In addition, the Schottky electrode, the ohmic electrode, and the alkali metal are not limited to those used in the above embodiments. Furthermore, when an address decoder is used in place of the shift register to add an input address pulse, position detection which allows random access can be performed. U.S. Patent No. 3,958,143 discloses an example of a photoelectron emission surface in which photoelectrons are accelerated by an internal field and emitted into a vacuum. However, the photoelectron emission surface described in this prior art cannot obtain position information. Japanese Patent Laid-Open No. 4-269419 discloses a photoelectron emission surface having a Schottky electrode formed in a pattern. This photoelectron emission surface does not form a plurality of electrodes or individually apply a bias voltage, either, and no position information can be obtained. As has been described above, according to a photomultiplier embodying the invention, a detection output according to a light incident position on a photoelectric surface can be obtained, thereby realizing a compact photomultiplier. The photomultiplier can be constituted using a photoelectron emission surface. In addition, in the photodetecting apparatus using the photomultiplier, even when light incident on the photoelectric surface is very weak, one- or two-dimensional information of the incident light can be obtained. From the embodiment thus described, it will be obvious that the invention may be varied in many ways. Such variations are not to be regarded as a departure from, and all such modifications as would be obvious to one skilled in the art are intended to be included within, the scope of the following claims.

Claims: A photocathode comprising: a semiconductor layer (100) including a photoelectric conversion layer (102) for generating photoelectrons in response to incident photons, and a photoelectron emission layer (103) for accelerating and emitting the photoelectrons generated by said photoelectric conversion layer from a photoelectron emission surface; an upper surface electrode (105) formed on said photoelectron emission surface of said semiconductor layer (100); and a lower surface electrode (104) formed on a lower surface of said semiconductor layer opposite said photoelectron emission surface, characterised in that said upper surface electrode is divided so as to provide a plurality of pixel electrodes (105 1 ... 105 n , 105 11 ...105 mn ) which are electrically insulated from each other, said plurality of pixel electrodes being respectively connected to a plurality of bias application wires (106 1 ...106 n ). A photocathode according to claim 1 wherein said semiconductor layer (100) has a heterojunction structure. A photocathode according to claim 2, wherein said semiconductor layer (100) has a heterojunction structure formed of a material selected from the group consisting of GaAs, AlAs and a mixed crystal thereof. A photocathode according to claim 2, wherein said semiconductor layer (100) has a heterojunction structure formed on a material selected from the group consisting of InP, GaAs, and a mixed crystal thereof. A photocathode according to claim 2, wherein said semiconductor layer (100) has a heterojunction structure formed of a material selected from the group consisting of Si, Ge, and a mixed crystal thereof. A photocathode according to claim 1 or claim 2, wherein a material selected from the group consisting of an alkali metal, an alkali metal compound, an oxide thereof, and a fluoride thereof is coated on said photoelectron emission surface of said semiconductor layer (100). A photocathode according to claim 6, wherein said alkali metal is a material selected from the group consisting of Cs, K, Na, and Rb. A photocathode according to any preceding claim, wherein said semiconductor layer (100) and said upper surface electrode (105) are in Schottky contact with each other. A photocathode according to any preceding claim, wherein said plurality of pixel electrodes (105 1 ...105 n ) are arranged in a one-dimensional array. A photocathode according to any of claims 1 to 8, wherein said plurality of pixel electrodes (105 11 ..,105 mn ) are arranged in a two-dimensional matrix. A photocathode according to any preceding claim, wherein said upper surface electrode (105) is formed of a material selected from the group consisting of Al, Au, Ag, W, Ti, WSi, and an alloy thereof. A photocathode according to any preceding claim, wherein said upper surface electrode (105) has an electron transmission portion for transmitting and emitting the photoelectrons generated in said semiconductor layer. A photocathode according to claim 12, wherein said upper surface electrode (105) has a large number of openings for transmitting the photoelectrons. A photocathode according to claim 13, wherein said upper surface electrode (105) forms any one of stripe-, mesh-, and grid-like patterns at a pitch of not more than 10 µm. A photocathode according to any preceding claim, wherein said lower surface electrode (104) and said semiconductor layer are in ohmic contact with each other. A photocathode according to any preceding claim, wherein said lower surface electrode (104) is a transparent electrode consisting of a material having light transmission properties. A photocathode according to any of claims 1 to 15, wherein said lower surface electrode (104) is a thin metal electrode for transmitting incident photons. A photocathode according to any of claims 1 to 15, wherein said lower surface electrode (104) is a metal electrode having a large number of openings for transmitting incident photons. A photocathode according to any preceding claim, wherein said photoelectric conversion layer (102) is constituted on a semiconductor substrate (101). A photocathode as claimed in claim 19, wherein a plurality of switching elements (S 1 ...S n ) for individually connecting/disconnecting respective ones of said plurality of bias application wires with said plurality of pixel electrodes for individual switching thereof are formed on said semiconductor substrate (101). A photocathode according to claim 20, wherein a switching circuit (5, 5A, 5B) for individually turning on/off said plurality of switching elements, and a plurality of switching wires for individually connecting a plurality of output terminals of said switching circuit to control terminals of said plurality of switching elements are both formed on said semiconductor substrate (101). A photocathode according to claim 20 or 21, wherein said switching element is a transistor (S 1 ...S n ), and said switching circuit is a shift register (5) having an output terminal connected to a gate terminal of said transistor. A photocathode according to claim 21, wherein said plurality of pixel electrodes are arranged in a two-dimensional matrix of m rows by n columns (m and n are integers of not less than two), said plurality of switching elements include m by n first switches provided in correspondence with said pixel electrodes of m rows by n columns and connected in parallel with said rows, and m second switches connected in series with said n first switches of each row, and said switching circuit is provided in correspondence with each row of said pixel electrodes, and includes m first shift registers having n output terminals connected to said control terminals of said n first switches of each row, respectively, and a second shift register having m output terminals connected to said control terminals of said m second switches, respectively. A phototube comprising a photocathode according to any of claims 1 to 19, the phototube further comprising: an anode (22) for receiving photoelectrons emitted from said photocathode; and a vacuum vessel (21), the photocathode and the anode being disposed in said vacuum vessel. A phototube according to claim 24, further comprising a plurality of stem pins extending through said vacuum vessel, and wherein: said plurality of pixel electrodes are respectively connected to a plurality of bias application wires, said vacuum vessel incorporates switching control means having a plurality of switching elements for individually connecting/disconnecting said plurality of bias application wires with said plurality of pixel electrodes for individual switching thereof, a switching circuit for individually turning on/off said plurality of switching elements, and a plurality of switching wires for individually connecting a plurality of output terminals of said switching circuit to control terminals of said plurality of switching elements, at least one of said stem pins is connected to said lower surface electrode, at least one of said stem pins is connected to said bias application wire, at least two of said stem pins is connected to input terminals of said switching circuit, and at least one of said stem pins is connected to said anode. A phototube according to claim 24 or 25, further comprising in said vacuum vessel electron multiplying means for secondary-electron multiplying the photoelectrons emitted from said photocathode. A photodetecting apparatus comprising a phototube according to any of claims 24 to 26, the apparatus further comprising: a power supply for applying a potential to said photocathode and said anode; timing control means; and memory means, and wherein said timing control means is arranged continuously to apply a timing pulse to said switching circuit upon reception of a start signal, and said switching circuit sequentially switching ON/OFF states of said plurality of switching elements in response to the timing pulse, and said memory means is arranged to start a storage operation upon reception of the start signal and to store an output from said anode in correspondence with a position of said pixel electrode which is sequentially set in a photoelectron emission state on the basis of the timing pulse.

Inventors: ASAKURA NORIO, HIROHATA TORU, IHARA TUNEO, KINOSHITA KATSUYUKI, NEGI YASUHARU, NIIGAKI MINORU, SUZUKI TOMOKO, YAMADA MASAMI, ASAKURA, NORIO, HIROHATA, TORU, IHARA, TUNEO, KINOSHITA, KATSUYUKI, NEGI, YASUHARU, NIIGAKI, MINORU, SUZUKI, TOMOKO, YAMADA, MASAMI, ASAKURA, NORIO, C/O HAMAMATSU PHOTONICS K.K., HIROHATA, TORU, C/O HAMAMATSU PHOTONICS K.K., IHARA, TUNEO, C/O HAMAMATSU PHOTONICS K.K., KINOSHITA, KATSUYUKI, C/O HAMAMATSU PHOTONICS K.K., Negi, Yasuharu, c/o Hamamatsu Photonics K.K., NIIGAKI, MINORU, C/O HAMAMATSU PHOTONICS K.K., SUZUKI, TOMOKO, C/O HAMAMATSU PHOTONICS K.K., YAMADA, MASAMI, C/O HAMAMATSU PHOTONICS K.K.
Applicants: HAMAMATSU PHOTONICS KK, HAMAMATSU PHOTONICS K.K.
Application year: 1994
Main classification: H01J1
IPC codes: H01J43, H01J1