SPREAD SPECTRUM SIGNAL RECEIVER

Abstract: A spread spectrum signal receiver which can make signal judgement in an excellent state even when the variation of its transmission line is large. For the judgement, the receiver compresses back the received signals and outputs the compressed signals. The compressed signals are linearly combined, and the signal judgement is performed based on the results of the combination. Alternatively, from the compressed signals, compression estimation signals are subtracted, respectively, to calculate pre-estimated errors before hand. Based on the square sum of the pre-estimated errors, signal judgement is performed. The tap coefficient is estimated by an RLS algorithm for replacing the pre-tap coefficient vector with the product of the pre-tap coefficient vector by a transition matrix.

Description: Technical Field This invention is utilized for digital communications, and relates in particular to techniques for canceling interference signals in the received signal, and receiving under conditions of fast varying fading fluctuation, in spread spectrum communications. Background Technology In recent years, in order to achieve effective utilization of frequency in digital mobile communications, code division multiple access systems which employ spread spectrum techniques have been studied. These spread spectrum techniques can be broadly divided into direct sequence systems and frequency hopping systems. First of all, the configuration of an adaptive RAKE receiver will be explained with reference to Fig.7, said receiver being a prior art example of a direct sequence receiver (see IEEE Journal on Selected Areas in Communications, Vol.11, No.7, September 1993). Fig.7 is a block diagram of a prior art example of a direct sequence receiver. The explanation given here will assume a two-path model in which the propagation path is composed of a first arrival path and a delayed arrival path. The received signal is inputted from inputted terminal 1. This received signal has been spread by a spreading code such as a PN sequence, and in order to demodulate it, it has to be despread by the same spreading code. Multiplier 2 multiplies the received signal by the PN sequence outputted by PN sequence generator 5, and feeds the outputted to integrating circuit 6. This operation is equivalent to despreading. The PN sequence has a sharp autocorrelation, and if the timings of the PN sequences used in the transmitter and receiver do not coincide, despreading will not be successful. In this case, if the timing of the PN sequence outputted by PN sequence generator 5 coincides with that of the PN sequence of the first arrival path, the signal component corresponding to the first arrival path will be extracted from integrating circuit 6 and outputted as a despread signal. Likewise, multiplier 3 multiplies the received signal by the delayed PN sequence that is outputted by delay circuit 4, and feeds the output integrating circuit 7. This operation is equivalent to despreading. If the timing of the PN sequence delayed by delay circuit 4 coincides with that of the PN sequence of the delayed arrival path, the signal component corresponding to the delayed arrival path will be extracted from integrating circuit 7 and outputted as a despread signal. Here, multipliers 2 and 3, delay circuit 4, PN sequence generator 5, and integrating circuits 6 and 7 correspond to a despreading and receiving means. The despread signals are respectively multiplied by tap coefficients in multipliers 8 and 9, and are then added together by adder 10. The added signal that is outputted by adder 10 is fed to decision circuit 11, which corresponds to a signal decision means. Decision circuit 11 performs signal decision and outputs the decision signal from terminal 12. Subtraction circuit 14 calculates and outputs the difference between this decision signal and the added signal, i.e., the a priori estimation error. Note, that when a known training signal is contained in the received signal, the training signal outputted by training signal memory 15 is used instead of the decision signal during the training signal interval. Switch circuit 13 performs this switching operation. Tap coefficient control circuit 16, which corresponds to a tap coefficient estimation means, receives as input the difference outputted by subtraction circuit 14, and the despread signals, and outputs the tap coefficients mentioned above. Tap coefficient control circuit 16 employs a least mean square algorithm - for example; a recursive least mean square (RLS) algorithm -in order to estimate the tap coefficience that minimize the square of the estimation error. This operation will be explained with reference to Fig.8, which is a block diagram of a prior art example of tap coefficient control circuit 16. The despread signals are inputted to gain generator 20 from input terminals 17 and 18. Gain generator 20 forms a gain vector and inputs this to multiplication circuit 21. Multiplication circuit 21 multiplies the gain vector by the aforementioned difference - i.e., the aforementioned a priori estimation error - which is inputted from input terminal 19, and outputs a correction vector. Adding circuit 22 adds together the a priori tap coefficient vector and the correction vector, thereby updating the a posteriori tap coefficient vector. Delay circuit 23 delays the a posteriori tap coefficient vector by a symbol period of the modulation signal, and inputs the delayed vector to adding circuit 22 and vector conversion circuit 24 as the a priori tap coefficient vector. Vector conversion circuit 24 outputs the elements of the a priori tap coefficient vector from output terminals 25 and 26 as tap coefficients. The updating algorithm of the a priori tap coefficient vector will be explained by mathematical expressions. Hereinafter, all signals will be expressed by complex representation in which the real part indicates the in-phase component and the imaginary part indicates the quadrature component. First of all, the despread signal sequence will be expressed by the two-dimensional vector C(i) shown below: C H ( i ) = [ y 1 ( i ) y 2 ( i )] where y1(i) is the despread signal which is the output of integrating circuit 6 at time i, y2(i) is the despread signal which is the output of integrating circuit 7 at time i, and the superscript H denotes complex conjugate transposition. Next, the a posteriori tap coefficient vector X(i) will be expressed by the following two-dimensional vector: X H ( i ) = [ w * 1 ( i ) w * 2 ( i )] where * denotes complex conjugate, w1(i) is the tap coefficient set in multiplier 8, and w2(i) is the tap coefficient set in multiplier 9. The posteriori tap coefficient vector X(i) is estimated by the least mean square method so as to minimize the weighted square sum of the a posteriori estimation error e(i) expressed by: e ( i ) = d ( i )- C H ( i ) X ( i ) where d(i) is the complex signal corresponding to the complex symbol of the modulation. Note that a training signal is used as d(i) in the training signal interval, while the decision signal is used as d(i) in the data signal interval. The a posteriori tap coefficient vector X(i) can be estimated by a variety of methods, including the RLS algorithm which realizes the least squares method successively and strictly; the fast RLS algorithm which performs this processing more efficiently; and Fast Transversal Filter(FTF). In addition, LMS is a well-known way of obtaining an approximate estimation (see Haykin, Adaptive Filter Theory, Prentice-Hall, 1986). Writing Xe(i) for the RLS algorithm-based estimate of the a posteriori tap coefficient vector X(i), the updating algorithm for Xe(i) will be: K ( i ) = [λ -1 · P ( i -1)· C ( i )] [1 + λ -1 · C H ( i )· P ( i -1)· C ( i )] α( i ) = d ( i ) - C H ( i )· X e ( i -1) X e ( i ) = X e ( i -1) + K ( i )·α( i ) P ( i ) = λ -1 · P ( i -1)-λ -1 · K ( i )· C H ( i )· P ( i -1) where P(i) is the inverse matrix of the autocorrelation matrix of C(i), K(i) is the gain vector, X e (i-1) is the estimate of the a priori tap coefficient vector, α(i) is the a priori estimation error, and λ is the forgetting factor (a positive constant equal to or less than 1). Next, a prior art example of a frequency hopping receiver will be explained with reference to Fig.9, which is a block diagram of said receiver (see Technical Report of IEICE, RCS92-109 (1993-01) pp.61-66). It will be assumed here that the carrier frequency of the received signal hops between two frequencies f1 and f2. The received signal is inputted from input terminal 1. The carrier frequency of this received signal hops in a fixed pattern, and therefore in order to demodulate said received signal, it has to be despread using a carrier which is frequency hopped in an identical pattern. Multiplier 28 multiplies the received signal by a carrier with frequency f1 which is intermittently outputted by carrier generator 29, and feeds the output to low-pass filter 30. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f1 which is outputted by carrier generator 29 coincides with that of the modulated carrier with frequency f1 contained in the received signal, the modulation signal which modulates carrier frequency f1 can be extracted from low-pass filter 30 and outputted as a despread signal. Likewise, multiplier 31 multiplies the received signal by a carrier with frequency f2 which is intermittently outputted by carrier generator 32, and feeds the ouput to low-pass filter 33. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f2 which is outputted by carrier generator 32 coincides with that of the modulated carrier with frequency f2 contained in the received signal, the modulation signal which modulates carrier frequency f2 can be extracted from low-pass filter 33 and outputted as a despread signal. Here, multipliers 28 and 31, carrier generators 29 and 32, and low-pass filters 30 and 33 correspond to a despreading and receiving means. After being delayed and having their timing adjusted by timing adjustment circuits 55 and 56, the despread signals are respectively multiplied by tap coefficients in multipliers 34 and 35, and added together by adder 36. The added signal that is outputted by adder 36 is fed to decision circuit 11. Decision circuit 11 is equivalent to a signal decision means, and outputs the decision signal from output terminal 12. Subtraction circuit 14 calculates and outputs the difference between this decision signal and the added signal, i.e., the a priori estimation error. Note, that when a known training signal is contained in the received signal, the training signal outputted by training signal memory 15 is used instead of the decision signal during the training signal interval. Switch circuit 42 performs this switching operation. Tap coefficient control circuit 40, which is equivalent to a tap coefficient estimation means, receives as input the difference outputted by subtraction circuit 14, and the timing-adjusted despread signals, and outputs the aforementioned tap coefficients. The constitution of this tap coefficient control circuit 40 is the same as that depicted in Fig.8. Next, another prior art example of a frequency hopping receiver will be explained with reference to Fig.10 (see Technical Report of IEICE, CS93-54, RCS93-32, SST93-11 (1993-06), pp.7-12). It is assumed here that the carrier frequency of the received signal hops between two frequencies f1 and f2. The received signal is inputted from input terminal 1. In a frequency hopping system, the same frequency band is used by stations that have different hopping patterns. Therefore, a desired signal and interference signals will be superimposed in this received signal. The carrier frequency of the desired signal hops in one fixed pattern while the carrier frequency of the interference signals hop in different patterns. In order to demodulate the desired signal, the received signal has to be down-converted -i.e., despread -by using a carrier with the frequency which is hopped in the same pattern as the desired signal. Multiplier 28 multiplies the received signal by a carrier with frequency f1 which is intermittently outputted by carrier generator 29, and feeds the output to low-pass filter 30. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f1 that is outputted by carrier generator 29 coincides with that of the modulated carrier with frequency f1 contained in the received signal, the modulation signal which modulates carrier with frequency f1 will be extracted from low-pass filter 30 and outputted as a despread signal. Timing adjustment circuit 55 makes this despread signal delayed and adjusts its timing. Likewise, multiplier 31 multiplies the received signal by a carrier with frequency f2 which is intermittently outputted by carrier generator 32, and feed the output to low-pass filter 33. This operation is equivalent to despreading. On the assumption that the timing with the carrier with frequency f2 that is outputted by carrier generator 32 coincides with that of the modulated carrier with frequency f2 contained in the received signal, the modulation signal which modulates carrier frequency f2 will be extracted from low-pass filter 33 and outputted as a despread signal. Timing adjustment circuit 56 makes this despread signal delayed and adjusts its timing. Here, multipliers 28 and 31, carrier generators 29 and 32, low-pass filters 30 and 33, and timing adjustment circuits 55 and 56 are equivalent to a despreading and receiving means. Branch metric computing circuits 201 and 202 receive as input the respective timing-adjusted despread signal, and the signal sequence candidates for the desired signal and the interference signal that are fed by maximum likelihood sequence estimation circuit 210, and output the square of the a priori estimation error. Adder 72 computes the sum of the squares of the a priori estimation errors for all the despread signals and inputs this to maximum likelihood sequence estimation circuit 210. The result of multiplying this square sum of the a priori estimation errors by a negative constant is equivalent to the likelihood information for the signal sequence candidates, or in other words, to a branch metric. Maximum likelihood sequence estimation circuit 210 performs signal decision by means of maximum likelihood estimation based on the sum of the squares of the a priori estimation errors. In other words, it calculates the cumulative sum of the branch metrics as a logarithmic likelihood function, estimates the signal sequence candidate for which said function becomes maximum, and outputs the decision signal corresponding to the desired signal from output terminal 94. Maximum likelihood sequence estimation circuit 210 is equivalent to a signal decision means. Next, branch metric computing circuits 201 and 202 will be explained with reference to Fig.11, which is a block diagram of said circuits. Estimated despread signal generator 300 generates estimated despread signals as linear combinations of signal candidates for the desired signal and the interference signal. Signal sequence candidates for the desired and interference signals are inputted from input terminal 117. Complex multiplier 127 multiplies the desired signal signal candidates contained in the signal sequence candidate by tap coefficients and outputs the results, while complex multiplier 128 multiplies the interference signal candidates contained in the signal sequence candidate by tap coefficients and outputs the results. Adder 73 adds together the results of these multiplications and outputs the sums as estimated despread signals. The despread signal is inputted from input terminal 16, and subtracter 122 subtracts the estimated despread signal estimate from the despread signal and outputs the result as the a priori estimation error. Squaring circuit 123 calculates the square of the a priori estimation error and outputs this from output terminal 95. Tap coefficient control circuit 60 receives as input the a priori estimation error outputted by subtracter 122, and the signal sequence candidates for the desired and interference signals. It estimates and outputs the tap coefficients by using a least mean square method such as the RLS (recursive least mean square) algorithm, so as to minimize the mean squared estimation error. As has been explained above, in a conventional direct sequence spread spectrum system, because there is little correlation between different spreading codes, the signal from another stations - i.e., an interfering signal - can be regarded as low-level noise components in the despreading process if the level of said signals is small. However, when the level of the interference signals is very high, a high level interference signal components will remain in the despread signal corresponding to the desired signal. In the direct sequence spread spectrum receivers described above, the despread signals are linearly combined in order to remove this interference signal components. However, the drawback of linear combination is that if it is carried out to remove a high-level interference signal components, the level of the desired signal component contained in the linearly combined signal will be reduced, and transmission performance will deteriorate. Furthermore, any fading fluctuations cause fluctuations in the optimum a posteriori tap coefficient vector X(i), and so the estimation of the a posteriori tap coefficient vector X(i) has to track the fading fluctuations. The least mean square method assums that the a posteriori tap coefficient vector X(i) remains constant during a time constant determined by the forgetting factor, and so this method estimates the a posteriori tap coefficient vector X(i) by averaging over this time interval. Making the time constant short will result in better tracking of fading fluctuations, but making it too short will give rise to numerical divergence. Therefore, a shortcoming of the least mean square method is that it has limited tracking ability, and that transmission performance will deteriorate if the fading fluctuation exceeds this limit. The present invention has been devised in the light of this situation, and its object is to provide a spread spectrum receiver capable of performing good signal decision even when the level of the interfering signal is high or when fading fluctuation is severe. EP-A-0599500, published on 1 June 1994, discloses a frequency hopping transmitter and receiver. Each symbol to be transmitted is split into a number of chips, each of which is modulated with a different carrier frequency. The symbols are reconstructed at the receiver by demodulating the chips with local frequencies corresponding to the carrier frequencies. Gray and Brady describe, in "The Asymptotic" Multiuser Efficiency of Two-Stage Detection in Mismatched AWGN Channels" published in Proceedings of the Annual Military Communications Conference (MILCOM), IEEE Vol. Conf. 12 on 11 October 1993, the use of a maximum likelihood sequence detector with a two-stage detector when knowledge of the channel is imperfect. In accordance with one aspect of the present invention, there is provided a spread spectrum receiver comprising a despreading and receiving means for producing at least one despread signal from a received spread spectrum signal in which desired and interference signals are superimposed; means to which are fed signal sequence candidates for the desired and interference signals, and which generate estimated despread signals corresponding to these; means which respectively subtract these estimated despread signals from the aforementioned despread signals; means which square the results of these respective subtractions; a means which adds the respective outputs of these squaring means; and a signal decision means which performs signal decision by using the output of the aforementioned adding means, and which outputs the aforementioned decision signal for the desired signal, and also the aforementioned signal sequence candidates for the desired and interference signals; and wherein the aforementioned means which generate estimated despread signals have a means which generates estimated despread signals by respectively multiplying the aforementioned signal sequence candidates for the desired and interference signals by tap coefficients and linearly combining the results of these multiplications; and a tap coefficient control circuit to which are fed these signal sequence candidates and the output of the aforementioned subtracting means, and which estimates the aforementioned tap coefficients; said spread spectrum receiver being characterised in that the aforementioned tap coefficient control circuit has a memory which holds in advance a transition matrix which updates, as the aforementioned tap coefficients, values that include the Nth order differentials of these coefficients (where N is a natural number); and a matrix multiplication circuit which multiplies by this transition matrix in the course of the least mean square computation. Typically, the propagation path of the received spread spectrum signal is composed of at least two arrival paths and the despreading and receiving means despreads the received spread spectrum signal for each arrival path. Alternatively, the despreading and receiving means separates the received spread spectrum signal into modulation signals corresponding to different carriers. The aforementioned transition matrix should be such that: where m is a natural number where K is the row number and L is the column number. The aforementioned despreading and receiving means is also capable of providing a diversity receiver if it has a means which, for each path, despreads signals received from a plurality of antennas and outputs the results as despread signals, and if the aforementioned subtraction means have means which subtract the estimated despread signal from the despread signal corresponding to each of the aforementioned antennas and to each path. The aforementioned despreading and receiving means is also capable of providing a diversity receiver which has a means which separates signals received from a plurality of antennas into modulation signals corresponding to different carriers, and which outputs these as a plurality of despread signals. In accordance with a second aspect of the present invention, there is provided a spread spectrum receiver which has a despreading and receiving means which despreads a received spread spectrum signal; means which respectively multiply the despread signals that are outputted from this means by tap coefficients; a means which adds the respective outputs of these multiplication means; a signal decision means to which is fed the output of this adding means, and which performs signal decision and outputs the decision signal; a subtraction circuit which computes the difference between the output of the aforementioned adding means and this decision signal; and a tap coefficient control circuit to which is fed this difference and the aforementioned despread signals, and which estimates the aforementioned tap coefficients by means of least mean square computation; said spread spectrum receiver being characterised in that: the aforementioned tap coefficient control circuit has a memory which holds in advance a transition matrix which updates, as the aforementioned tap coefficients, values that include the Nth order differentials of these coefficients (where N is a natural number); and a matrix multiplication circuit which multiplies by this transition matrix in the course of the least mean square computation. Typically, the propagation path of the received spread spectrum signal is composed of at least two arrival paths and the despreading and receiving means despreads the received spread spectrum signal for each arrival path. Alternatively, the despreading and receiving means separates the received spread spectrum signal into modulation signals corresponding to different carriers. The aforementioned transition matrix should be such that : where m is a natural number where K is the row number and L is the column number. The aforementioned despreading and receiving means is also capable of providing a diversity receiver which has a means which, for each path, despreads signals received from a plurality of antennas and outputs the results as despread signals. The aforementioned despreading and receiving means is also capable of providing a diversity receiver which has a means which separates signals received from a plurality of antennas into modulation signals corresponding to different carriers, and which outputs these as a plurality of despread signals. The received signal is separated into its respective path components or into modulation signals corresponding to respective carriers, and output as a plurality of despread signals. Subsequent processing can take either of the two following forms. (1) Each despread signal is multiplied by tap coefficients, the results added together, and signal decision performed. The difference between the added signal and the decision signal is the a priori estimation error, and this a priori estimation error and the despread signals are used as input for tap coefficient estimation. (2) Alternatively, for each despread signal, signals sequence candidates for the desired and interference signals are multiplied by tap coefficients, and despread signal estimates are generated. The despread signal estimates are subtracted from the respective despread signals, thereby generating a priori estimation errors, and signal decision is performed on the basis of them. Tap coefficient estimation is performed by using as input the a priori estimation error and the signal sequence candidates for the desired and interference signals. In this invention, the tap coefficients are estimated by employing an RLS algorithm in which the a priori tap coefficient vector is replaced with the result obtained by multiplying the a priori tap coefficient vector by a transition matrix. Use of this algorithm enables estimation to be performed on the basis of regarding the tap coefficient vector as fluctuating as an Nth order function of time in the time width of the time constant. This enables good signal decision to be carried out even when the level of the interference signals is high or when there is severe varrying fading fluctuation. Even better signal decision can be achieved by having a diversity structure. Brief Explanation of the Drawings Fig.1 is a block diagram of a first embodiment of this invention. Fig.2 shows two-branch diversity structure using the structure of the first embodiment. Fig.3 is a block diagram of the tap coefficient control circuits in a second embodiment of this invention. Fig.4 shows two-branch diversity structure using the structure of the second embodiment. Fig.5 shows the structure of two-branch diversity structure in a third embodiment of this invention. Fig.6 is a block diagram of a fourth embodiment of this inven tion. Fig.7 is a block diagram of a prior art example of a direct sequence receiver. Fig.8 is a block diagram of a prior art example of tap coefficient control circuit 16 in Fig.7. Fig.9 is a block diagram of a prior art example of a frequency hopping receiver. Fig.10 shows another prior art example of a frequency hopping receiver. Fig.11 is a block diagram of a branch metric computing circuit. Optimum Configurations for Embodying the Invention First embodiment A first embodiment of this invention will be explained with reference to Fig.1, which is a block diagram of said first embodiment. This invention is a spread spectrum receiver which comprises multipliers 2 and 3, delay circuit 4, PN sequence generator 5 and integrating circuits 6 and 7, which together serve as a despreading and receiving means which, for each path, despreads the received spread spectrum signal in which desired and interference signals are superim posed, and outputs the results as despread signals. Said spread spectrum receiver also comprises maximum likelihood sequence estimation circuit 210 which serves as a means which outputs a decision signal corresponding to the desired signal. A distinguishing feature of this invention is that it has estimated despread signal generators 300 which serve as means which, as shown already in Fig.11, generate estimated despread signals after receiving as input signal sequence candidates for the desired and interference signals; subtracters 122 which serve as means for respectively subtracting these estimated despread signals from the despread signals of each of the aforementioned paths; squaring circuits 123 which serve as means for squaring the results of these respective subtractions; and adder 72 (see Fig.1) which serves as a means for adding the respective outputs of these squaring circuits 123. A further distinguishing feature of this invention is that maximum likelihood sequence estimation circuit 210 has a signal decision means which performs signal decision by using the output of this adder 72, and which outputs the aforementioned decision signal corresponding to the desired signal, and the afore-mentioned signal sequence candidates for the desired and interfering signals. Fig.11 is an example of the structure employed when there is one interference signal, but it is easy to extend this to cases where there are two or more interference signals. Next, the working of this first embodiment of the invention will be explained. The propagation path will be assumed to be composed of first arrival path and a delayed arrival path. The received signal is inputted from input terminal 1. Multiplier 2 multiplies the received signal by the spreading code for the desired signal which is outputted by PN sequence generator 5, and inputs the result to integrating circuit 6. This operation is equivalent to despreading. The PN sequence used as a spreading code has a sharp autocorrelation, and the signal cannot be extracted if the timings of the spreading codes used in transmitting and receiving do not coincide. On the assumption that the timing of the spreading code which is outputted by PN sequence generator 5 coincides with that of the spreading code of the first arrival path, the signal component corresponding to the first arrival path can be extracted from integrating circuit 6 and outputted as a despread signal. Likewise, multiplier 3 multiplies the received signal by the delayed spreading code for the desired signal which is outputted by delay circuit 4, and inputs the result to integrating circuit 7. This operation is equivalent to despreading. On the assumption that the timing of the delayed spreading code coincides with that of the spreading code of the delayed arrival path, the signal component corresponding to the delayed arrival path can be extracted from integrating circuit 7 and outputted as a despread signal. Here, multipliers 2 and 3, delay circuit 4, PN sequence generator 5, and integrating circuits 6 and 7 correspond to the despreading and receiving means. Branch metric computing circuits 201 and 202 receive as input the respective despread signals, and signal sequence candidates for the desired and interfering signals that are outputted by maximum likelihood sequence estimation circuit 210, and output the square of the a priori estimation error. Adder 72 computes the sum of the squares of the a priori estimation errors of the respective despread signals, and inputs this to maximum likelihood sequence estimation circuit 210. The result of multiplying this square sum of the a priori estimation errors by a negative constant is equivalent to the likelihood information for the signal sequence candidates, or in other words, to a branch metric. Maximum likelihood sequence estimation circuit 210 performs signal decision by means of maximum likelihood estimation based on the square sum of the a priori estimation Oerrors. In other words, it calculates the cumulative sum of the branch metrics as a logarithmic likelihood function, estimates the signal sequence candidate for which said function becomes maximum, and outputs the decision signal corresponding to the desired signal from output terminal 12. Maximum likelihood sequence estimation circuit 210 is equivalent to the signal decision means. Although it has been assumed here that there are two propagation paths, the foregoing can easily be extended to cases where there are three or more paths. Next, two-branch diversity using the structure of this first embodiment will be explained with reference to Fig.2, which shows said two-branch diversity. The signal received from the first diversity branch, i.e., from a first antenna, is inputted from input terminal 1. Multiplier 2 multiplies the received signal by the spreading code for the desired signal, said spreading code being outputted by PN sequence generator 5, and feeds the result to integrating circuit 6. This operation is equivalent to despreading. The PN sequence used as the spreading code has a sharp autocorrelation, and the signal cannot be extracted if the timings of the spreading codes used in transmitting and receiving do not coincide. On the assumption that the timing of the spreading code that is outputted by PN sequence generator 5 coincides with that of the spreading code of the first arrival path, the signal component corresponding to the first arrival path will be extracted from integrating circuit 6 and outputted as a despread signal. Likewise, multiplier 3 multiplies the received signal by the delayed spreading code of the desired signal, said delayed spreading code being outputted by delay circuit 4, and feeds the result to integrating circuit 7. This operation is equivalent to despreading. If the timing of the delayed spreading code coincides with that of the spreading code of the delayed path, the signal component corresponding to the delayed arrival path will be extracted from integrating circuit 7 and outputted as a despread signal. Branch metric computing circuits 201 and 202 receive as input the respective despread signals of the first diversity branch and the signal sequence candidates for the desired and interference signals that are outputted by maximum likelihood sequence estimation circuit 210, and output the square of the a priori estimation error. Meanwhile, the signal received from the second diversity branch, i.e., from a second antenna, is inputted from input terminal 1'. Multiplier 2' multiplies the received signal by the spreading code for the desired signal which is outputted by PN sequence generator 5, and feeds the result to integrating circuit 6'. If the timing of the spreading code generated by PN sequence generator 5 coincides with that of the spreading code of the first arrival path, the signal component corresponding to the first arrival path will be extracted from integrating circuit 6' and outputted as a despread signal. Likewise , multiplier 3' multiplies the received signal by the delayed spreading code for the desired signal, said delayed spreading code outputted by delay circuit 4', and feeds the result to integrating circuit 7'. This operation is equivalent to despreading. If the timing of the delayed spreading code coincides with that of the spreading code of the delayed arrival path, the signal component corresponding to the delayed arrival path will be extracted from integrating circuit 7' and outputted as a despread signal. Here, multipliers 2, 3, 2' and 3', delay circuits 4 and 4', and integrating circuits 6, 7, 6' and 7' correspond to the despreading and receiving means. Branch metric computing circuits 201' and 202' receive as input the despread signals in the second diversity branch and the signal sequence candidates for the desired and interference signals which are outputted by maximum likelihood sequence estimation circuit 210, and output the square of the a priori estimation error. Adder 72 computes the sum of the squares of the a priori estimation errors that are outputted by branch metric computing circuits 201, 202, 201' and 202', and inputs this to maximum likelihood sequence estimation circuit 210. The result of multiplying this square sum of the a priori estimation errors by a negative constant is equivalent to the likelihood information for the signal sequence candidates, or in other words, to a branch metric. Maximum likelihood sequence estimation circuit 210 performs signal decision by means of maximum likelihood estimation based on the square sum of the a priori estimation errors. In other words, it calculates the cumulative sum of the branch metrics as a logarithmic likelihood function, estimates the signal sequence candidate for which said function becomes maximum, and outputs the decision signal corresponding to the desired signal from output terminal 12. Maximum likelihood sequence estimation circuit 210 is equivalent to the signal decision means. Because diversity reception is employed, bit error rate performance are better than when diversity reception is not employed. Second embodiment A second embodiment of this invention will be explained with reference to Fig.3, which is a block diagram of the tap coefficient control circuit in this second embodiment. Reference should be made to Fig.7 for the overall constitution of this embodiment. Although the constitution illustrated in Fig.7 is for the case where there are two propagation paths, this can easily be extended to three or more paths. As already shown in Fig.7, this invention is a spread spectrum receiver which has multipliers 2 and 3, delay circuit 4, PN sequence generator 5, and integrating circuits 6 and 7, which together serve as a despreading and receiving means which, for each path, respectively despreads the received spread spectrum signal; multipliers 8 and 9 which serve as means for respectively multiplying the despread signals that are outputted from this means by tap coefficients; adder 10 which serves as a means for adding the outputs of these multipliers 8 and 9; decision circuit 11, which serves as a signal decision means to which is fed the output of this adder 10 and which performs signal decision and outputs the decision signal; subtraction circuit 14 which computes the difference between the output of adder 10 and this decision signal; and tap coefficient control circuit 16 to which is fed this difference and the aforementioned despread signals, and which estimates the aforementioned tap coefficients. The distinguishing feature of this invention is that, as shown in Fig.3, tap coefficient control circuit 16 has transition matrix memory 50 which holds in advance a transition matrix which updates, as the aforementioned tap coefficients, values that include the Nth order differentials of these coefficients (where N is a natural number); and matrix multiplication circuit 51 which multiplies by this transition matrix in the course of the least mean square computation. The explanation to be given here will assume that N=1. The operation of tap coefficient control circuit 16 will now be explained. Despread signals are fed to gain generator 46 from fed terminals 43 and 44. Gain generator 46 generates a gain vector and inputs this to multiplication circuit 47. Multiplication circuit 47 multiplies the gain vector by the aforementioned difference, which is inputted from input terminal 45 - i.e., it multiplies the gain vector by the a priori estimation error - and outputs a corrected vector. Adding circuit 48 adds the a priori tap coefficient vector and the corrected vector, and thereby updates the a posteriori tap coefficient vector. Delay circuit 49 delays the a posteriori tap coefficient vector by a symbol period of the modulation, and matrix multiplication circuit 51 multiplies this delayed a posteriori tap coefficient vector by the transition matrix that is outputted from transition matrix memory 50, and feeds the result to adding circuit 48 and to vector conversion circuit 52 as the a priori tap coefficient vector. Vector conversion circuit 52 outputs the elements of the a priori tap coefficient vector from output terminals 53 and 54 as tap coefficients. The overall operation of tap coefficient control circuit 16 is equivalent to executing an updating algorithm. Letting the delay time of delay circuit 49 be T and the time constant of the updating algorithm be τ, T will be smaller than τ (τ is approximately equal to 5T). In the prior art example shown in Fig.7, the tap coefficient vector is estimated by means of the RLS algorithm on the assumption that it is constant during time g, but in tap coefficient control circuit 16 according to this second embodiment of the invention (see Fig. 3), the tap coefficient vector within time τ is estimated on the assumption that it also contains increases or decreases which are first order functional in nature. This is accomplished by multiplying the delayed a posteriori tap coefficient vector that is outputted from delay circuit 49 by the transition matrix stored in advance in transition matrix memory 50. By this means, tap coefficient control circuit 16 with good tracking ability can be achieved. An explanation will be given of an updating algorithm involving the a priori tap coefficient vector (see IEICE, B-II, Vol.J75-B-II, No.7, pp.415 ~ 423, July 1992). First of all, the despread signal sequence will be represented by the following four-dimensional vector C ext (i): C H ext ( i ) = [0 y 1 ( i ) 0 y 2 ( i )] where y1(i) is the despread signal that is outputted by integrating circuit 6 in Fig.7 and y2(i) is the despread signal that is outputted by integrating circuit 7 in the same figure. Next, the a posteriori tap coefficient vector Xext(i) will be represented by the following four-dimensional vector: X H ext ( i ) = [ w 1 (1)* ( i ) w 1 * ( i ) w 2 (1)* ( i ) w 2 * ( i )] where w1(1)(i) and w2(1)(i) represent first order differentials of the tap coefficients with respect to time. The matrix elements of the 4 ~ 4 transition matrix h are defined as follows: This algorithm performs estimation on the basis of regarding the tap coefficients as fluctuating as first order functions of time in the time width of the time constant. If a Kalman filter is applied to the estimation of the a posteriori tap coefficient vector Xext(i), the updating algorithm for Xext(i) becomes: K ext ( i ) = P ext ( i | i -1)· C ext ( i )·[ C H ext ( i )· P ext ( i | i -1)· C ext ( i ) + 1] -1 α ext ( i ) = d ( i ) - C H ext ( i )·Φ ·X ext ( i -1) X ext ( i ) = Φ· X ext ( i -1) + K ext ( i )·α ext ( i ) P ext ( i ) = P ext ( i | i -1) - K ext ( i )· C H ext ( i )· P ext ( i | i -1) P ext ( i +1| i ) = Φ· P ext ( i )·Φ H + σ -2 n · Q ( i ) where α ext ( i ) is the a priori estimation error, en2 the thermal noise power, and Pext(i) and P ext ( i \ i -1) are the results of normalising the a posteriori covariance matrix and the a priori covariance matrix of the tap coefficient vector by en2. Q( i ) is the autocorrelation matrix of the process noise, and substantially determines the aforementioned time constant τ. By setting: Q ( i ) = q ·σ n 2 ·Φ· P ext ( i )·Φ H the time constant g can be written γ=(1+ q )/ q . Here, q is a positive number. Furthermore, the a priori tap coefficient vector at time i becomes: Φ· X ext ( i -1) This algorithm performs estimation on the basis of regarding the tap coefficient vector as fluctuating as a first order function of time in the time width of the time constant. On the other hand, the conventional least mean square method estimates the tap coefficient vector on the assumption that it does not fluctuate with time in the time width of the time constant. This algorithm is therefore superior to the least mean square method in respect of tracking ability. It follows that this invention operates well even when there is severe fast varying fading fluctuation. An algorithm based on a Kalman filter has been explained above, but it is also possible to apply a simplified algorithm. This simplified algorithm may be expressed mathematically as follows: α ext ( i ) = d ( i ) - C H ext ( i )· Φ · X ext ( i -1) X ext ( i ) = Φ· X ext ( i -1)+µ D ( i )α ext ( i ) where f is a constant which satisfies the condition that 0<f<1, and D(i) is the following four-dimensional vector: D ( i ) = [µ y 1 ( i ) (2-µ) y 1 ( i ) µ y 2 ( i ) (2-µ) y 2 ( i )] The simplified algorithm expressed by Eqs.9a-9c is the result of replacing K ext (i) in Eqs.8a-8e as follows: K ext ( i ) - µ D ( i ) and has the advantage of requiring less computation than the Kalman filter. A simplified algorithm can also be derived by replacing P ext (i) in Eqs.8a-8e with a fixed matrix (see IEICE, B-II, Vol.J75-B-II, No.7, pp.415-423, July 1992). Moreover, the QT-LMS algorithm (see IEICE, A, Vol.J72-A, No.7, pp.1038-1044, July 1989) performs a similar operation to this simplified algorithm, and can be applied instead of the simplified algorithm. The foregoing explanations have assumed that N=1, but analogous explanations can be given when N>1, by changing: C H ext ( i ) = [0 y 1 ( i ) 0 y 2 ( i )] to: and changing: X H ext (i) = [ w 1 (1)* ( i ) w 1 * ( i ) w 2 (1)* ( i ) w 2 * ( i )] to: and changing: to: Next, two-branch diversity using the structure of the second embodiment of this invention will be explained with reference to Fig.4, which shows said two-branch diversity. The signal received from the first diversity branch, i.e., from a first antenna, is inputted from input terminal 1. This received signal has been spread using a PN sequence as the spreading code, and to demodulate it, it has to be despread using the same spreading code. Multiplier 2 multiplies the received signal by the PN sequence that is outputted by PN sequence generator 5, and feeds the result to integrating circuit 6. This operation is equivalent to despreading. The PN sequence has a sharp autocorrelation, and the signal cannot be extracted if the timings of the PN sequences used in transmitting and receiving do not coincide. Now, on the assumption that the timing of the PN sequence that is outputted by PN sequence generator 5 coincides with that of the PN sequence of the first arrival path, the signal component corresponding to the first arrival path will be extracted from integrating circuit 6 and outputted as a despread signal. Likewise, multiplier 3 multiplies the received signal by the delayed PN sequence that is outputted from delay circuit 4, and feeds the result to integrating circuit 7. This operation is equivalent to despreading. On the assumption that the timing of the delayed PN sequence coincides with that of the PN sequence of the delayed arrival path, the signal component of the delayed arrival path will be extracted from integrating circuit 7' and outputted as a despread signal. Meanwhile, the signal received from the second diversity branch, i.e., from a second antenna, is inputted from input terminal 1'. Multiplier 2' multiplies the received signal by the PN sequence that is outputted from PN sequence generator 5 and feeds the result to integrating circuit 6'. This operation is equivalent to despreading. Now, on the assumption that the timing of the PN sequence that is outputted by PN sequence generator 5 coincides with that of the PN sequence of the first arrival path, the signal component of the first arrival path will be extracted from integrating circuit 6' and outputted as a despread signal. Likewise, multiplier 3' multiplies the received signal by the delayed PN sequence that is outputted from delay circuit 4' and feeds the result to integrating circuit 7'. This operation is equivalent to despreading. On the assumption that the timing of the delayed PN sequence coincides with that of the PN sequence of the delayed arrival path, the signal component corresponding to the delayed arrival path will be extracted from integrating circuit 7' and outputted as a despread signal. Here, multipliers 2, 3, 2' and 3', delay circuits 4 and 4', PN sequence generator 5, and integrating circuits 6, 6', 7 and 7' correspond to the despreading and receiving means. The despread signals are respectively multiplied by tap coefficients in multipliers 8, 9, 8' and 9', and the results are added together by adder 72. The added signal outputted by adder 72 is fed to decision circuit 11. Decision circuit 11 is equivalent to the signal decision means, and after performing signal decision, outputs the decision signal corresponding to the desired signal from output terminal 12. Subtraction circuit 14 calculates and outputs the difference between this decision signal and the added signal, i.e., the a priori estimation error. Note, that when a known training signal is contained in the received signal, the training signal outputted from training signal memory 15 is used instead of the decision signal during the training signal interval. Switch circuit 13 performs this switching operation. Tap coefficient control circuit 16, which is equivalent to the tap coefficient estimation means, receives as input the a priori estimation error that is outputted by subtraction circuit 14, and the despread signals, and outputs the aforementioned tap coefficients. Better error rate performance can be obtained than when no diversity reception is employed. Third embodiment A third embodiment of this invention will now be explained. In this third embodiment, the tap coefficient control circuit shown in Fig.3 in connection with the second embodiment of the invention is used in the frequency hopping receiver illustrated in Fig.10. As already shown in Fig.10, this invention is a spread spectrum receiver which has multipliers 28 and 31, low-pass filters 30 and 33, and timing adjustment circuits 55 and 56, which together serve as a despreading and receiving means which separates the received spread spectrum signal, in which desired and interference signals are superimposed, into modulation signals corresponding to the different carriers, and outputs these as a plurality of despread signals; estimated despread signal generators 300, shown in Fig.11, which serve as means to which are fed signal sequence candidates for the desired and interference signals, and which generate estimated despread signals corresponding to these; subtracters 122 which serve as means which respectively subtract these estimated despread signals from the aforementioned despread signals; squaring circuits 123 which serve as means which respectively square the results of these subtractions; adder 72 which serves as a means which adds the respective outputs of these squaring circuits 123; and maximum likelihood sequence estimation circuit 210 which serves as a signal decision means which performs signal decision by using the output of this adder 72, and which outputs the decision signal corresponding to the desired signal, and the aforementioned signal sequence candidates for the desired and interference signals. Furthermore, according to this invention, estimated despread signal generator 300 has complex multipliers 127 and 128 and adder 73 shown in Fig.11, which together serve as a means which generates estimated despread signals by respectively multiplying the aforementioned signal sequence candidates for the desired and interference signals by tap coefficients and linearly combining the results; and tap coefficient control circuit 60 to which are fed these signal sequence candidates and the a priori estimation error which is the output of subtracter 122, and which estimates the aforementioned tap coefficients. The distinguishing feature of this invention is that tap coefficient control circuit 60 has transition matrix memory 50 which holds in advance a transition matrix which updates, as the aforementioned tap coefficients, values that include the Nth order differentials of these coefficients; and matrix multiplication circuit 51 which multiplies by this transition matrix in the course of the least mean square computation. The operation of tap coefficient control circuit 60 is similar to the operation of tap coefficient control circuit 16 which was described in connection with the second embodiment of this invention. Note, however, that in Eqs.5, 9c and 11, y 1 ( i ) has to be replaced by α 1 ( i ), the signal candidate for the desired signal at time i , and y 1 ( i ) has to be replaced by a 1 ( i ), the signal candidate for the interference signal at time i ; and d ( i ) in Eq.8b and 9a has to be replaced by the despread signal. Next, an example of two-branch diversity based on this third embodiment of the invention will be explained with reference to Fig.5, which shows the structure of said two-branch diversity in which the carrier frequency of the received signal is assumed to hop between f1 and f2. The signal received from the first diversity branch, i.e., from a first antenna, is inputted from input terminal 1. In a frequency hopping system, the same frequency band is used by stations with different hopping patterns. This received signal will therefore comprise, in superposition, the desired signal in which the carrier frequency is hopped in a fixed pattern, and an interference signal in which the carrier frequency is hopped in different patterns. In order to demodulate the desired signal, the received signal has to be down-converted, i.e., despread, using a carrier the frequency of which is hopped in the same pattern as the desired signal. Multiplier 28 multiplies the received signal by a carrier with frequency f1 which is intermittently outputted by carrier generator 29, and feeds the result to low-pass filter 30. This operation is equivalent to despreading. Now, on the assumption that the timing of the carrier with frequency f1 which is outputted by carrier generator 29 coincides with that of the modulated carrier with frequency f1 which is contained in the received signal, the modulation signal corresponding to carrier frequency f1 will be extracted from low-pass filter 30 and outputted as a despread signal. Likewise, multiplier 31 multiplies the received signal by a carrier with frequency f2 which is intermittently outputted by carrier generator 32, and feeds the result to low-pass filter 33. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f2 which is outputted by carrier generator 32 coincides with that of the modulated carrier with frequency f2 contained in the received signal, the modulation signal corresponding to carrier frequency f2 will be extracted from low-pass filter 33 and outputted as a despread signal. Branch metric computing circuits 201 and 202 receive as input the respective timing-adjusted despread signals that have been delayed by timing adjustment circuits 55 and 56, and the signal sequence candidates for the desired and the interference signals which are outputted by maximum likelihood sequence estimation circuit 210; and output the square of the a priori estimation error. Meanwhile, the signal received from the second diversity branch, i.e., from a second antenna, is inputted from input terminal 1'. Multiplier 28' multiplies the received signal by a carrier with frequency f1 which is intermittently outputted by carrier generator 29, and feeds the result to low-pass filter 30'. This operation is equivalent to despreading. Now, on the assumption that the timing of the carrier with frequency f1 that is outputted by carrier generator 29 coincides with that of the modulated carrier with frequency f1 contained in the received signal, the modulating signal corresponding to carrier frequency f1 will be extracted from low-pass filter 30' and outputted as a despread signal. Likewise , multiplier 31' multiplies the received signal by a carrier with frequency f2 which is intermittently outputted by carrier generator 32, and feeds the result to low-pass filter 33'. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f2 that is outputted by carrier generator 32 coincides with the modulated carrier with frequency f2 contained in the received signal, the modulation signal corresponding to carrier frequency f2 will be extracted from low-pass filter 33' and outputted as a despread signal. Here, multipliers 28, 28', 31 and 31', carrier generators 29 and 32, and low-pass filters 30, 30', 33 and 33' correspond to the despreading and detection means. Branch metric computing circuits 201' and 202' receive as input the respective timing-adjusted despread signals that have been delayed by timing adjustment circuits 55' and 56', and the signal sequence candidates for the desired and the interference signals which are outputted by maximum likelihood sequence estimation circuit 210; and output the square of the a priori estimation error. Adder 72 computes the sum of the squares of the a priori estimation errors that are outputted by branch metric computing circuits 201, 202, 201' and 202', and feeds the result to maximum likelihood sequence estimation circuit 210. The result of multiplying this sum of the squares of the a priori estimation errors by a negative constant is equivalent to likelihood information for the signal sequence candidates, i.e., to the branch metrics. Maximum likelihood sequence estimation circuit 210 performs signal decision by means of maximum likelihood estimation based on the square sum of the a priori estimation errors. In other words, the cumulative sum of the branch metrics is calculated as a logarithmic likelihood function, the signal sequence candidate for which this logarithmic likelihood function becomes maximum is estimated, and the decision signal for the desired signal is outputted from output terminal 12. Here, maximum likelihood sequence estimation circuit 210 is equivalent to the signal decision means. Because diversity reception is employed, better error rate performance can be achieved than when diversity reception is not employed. Fourth embodiment Next, a fourth embodiment of this invention will be explained. This fourth embodiment is an example of the use of the tap coefficient control circuit illustrated in Fig.3 in connection with the second embodiment, in the spread spectrum receiver shown in Fig.9. An example of two-branch diversity based on this fourth embodiment of the invention will be explained with reference to Fig.6, and it is assumed that the carrier frequency of the received signal hops between f1 and f2. The signal received from the first diversity branch, i.e., from a first antenna, is inputted from inputted terminal 1. The carrier frequency of this received signal is hopped in a fixed pattern, and to demodulate it, it has to be despread by using a carrier the frequency of which is hopped in the same pattern. Multiplier 28 multiplies the received signal by a carrier with frequency f1 which is intermittently outputted by carrier generator 29, and feeds the result to low-pass filter 30. This operation is equivalent to despreading. Now, on the assumption that the timing of the carrier with frequency f1 which is outputted by carrier generator 29 coincides with that of the modulated carrier with frequency f1 which is contained in the received signal, the modulation signal corresponding to carrier with frequency f1 will be extracted from low-pass filter 30 and outputted as a despread signal. Likewise, multiplier 31 multiplies the received signal by a carrier with frequency f2 which is intermittently outputted by carrier generator 32, and feeds the result to low-pass filter 33. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f2 which is outputted by carrier generator 32 coincides with that of the modulated carrier with frequency f2 contained in the received signal, the modulation signal corresponding to carrier frequency f2 will be extracted from low-pass filter 33 and outputted as a despread signal. Meanwhile, the signal received from the second diversity branch, i.e., from a second antenna, is inputted from input terminal 1'. Multiplier 28' multiplies the received signal by a carrier with frequency f1 which is intermittently outputted by carrier generator 29, and feeds the result to low-pass filter 30'. This operation is equivalent to despreading. Now, on the assumption that the timing of the carrier with frequency f1 that is outputted by carrier generator 29 coincides with that of the modulated carrier with frequency f1 contained in the received signal, the modulating signal corresponding to carrier frequency f1 will be extracted from low-pass filter 30' and outputted as a despread signal. Likewise, multiplier 31' multiplies the received signal by a carrier with frequency f2 which is intermittently outputted by carrier generator 32, and feeds the result to low-pass filter 33'. This operation is equivalent to despreading. On the assumption that the timing of the carrier with frequency f2 that is outputted by carrier generator 32 coincides with that of the modulated carrier of frequency f2 contained in the received signal, the modulation signal corresponding to carrier frequency f2 will be extracted from lowpass filter 33' and outputted as a despread signal. Here, multipliers 28, 28', 31 and 31', carrier generators 29 and 32, and low-pass filters 30, 30', 33 and 33' correspond to the despreading and receiving means. The timing-adjusted despread signals which have been delayed by timing adjustment circuits 55, 56, 55' and 56' are multiplied by tap coefficients in respective multipliers 34, 35, 34' and 35', and then added by adder 72. The added signal that is outputted by adder 72 is inputted to decision circuit 11. Decision circuit 11 is equivalent to the signal decision means and performs signal decision, and outputs the decision signal for the desired signal from output terminal 12. Subtraction circuit 14 calculates and outputs the difference between this decision signal and the added signal, i.e., the a priori estimation error. Note, that when a known training signal is contained in the received signal, the training signal outputted from training signal memory 15 is used instead of the decision signal during the training signal interval. Switch circuit 13 perform this switching operation. Tap coefficient control circuit 40, which is equivalent to the tap coefficient estimation means, receives as input the a priori estimation error outputted by subtraction circuit 14, and the despread signals, and outputs the aforementioned tap coefficients. Better bit error rate performance can be obtained than when no diversity reception is employed.

Claims: A spread spectrum receiver comprising a despreading and receiving means (2-7) for producing at least one despread signal from a received spread spectrum signal in which desired and interference signals are superimposed; means (300) to which are fed signal sequence candidates for the desired and interference signals, and which generates estimated despread signals corresponding to these; means (122) which respectively subtract these estimated despread signals from the aforementioned despread signals; means (123) which square the results of these respective subtractions; a means (72) which adds the respective outputs of these squaring means; and a signal decision means (210) which performs signal decision by using the output of the aforementioned adding means, and which outputs the aforementioned decision signal for the desired signal, and also the aforementioned signal sequence candidates for the desired and interference signals; and wherein the aforementioned means (300) which generate estimated despread signals has a means which generates estimated despread signals by respectively multiplying the aforementioned signal sequence candidates for the desired and interference signals by tap coefficients and linearly combining the results of these multiplications; and a tap coefficient control circuit (60) to which are fed these signal sequence candidates and the output of the aforementioned subtracting means (122), and which estimates the aforementioned tap coefficients; said spread spectrum receiver being characterised in that the aforementioned tap coefficient control circuit (60) has a memory (50) which holds in advance a transition matrix which updates, as the aforementioned tap coefficients, values that include the Nth order differentials of these coefficients (where N is a natural number) ; and a matrix multiplication circuit (51) which multiplies by this transition matrix in the course of the least mean square computation. A spread spectrum receiver as set forth in claim 1, wherein the propagation path of the received spread spectrum signal is composed of at least two arrival paths and the despreading and receiving means (2-7) despreads the received spread spectrum signal for each arrival path. A spread spectrum receiver as set forth in claim 1, wherein the despreading and receiving means (2-7) separates the received spread spectrum signal into modulation signals corresponding to different carriers. A spread spectrum receiver as set forth in any of the preceding claims, wherein the aforementioned transition matrix is: where m is a natural number where K is the row number and L is the column number. A spread spectrum receiver as set forth in claim 2, wherein the aforementioned despreading and receiving means (2-7) has a means which, for each arrival path, respectively despreads signals received from a plurality of antennas, and outputs these as despread signals; and the aforementioned subtraction means (72) has means which subtract the estimated despread signal from the despread signal for each of the aforementioned antennas and paths. A spread spectrum receiver as set forth in claim 3, wherein the aforementioned despreading and receiving means (2-7) has a means which separates signals received from a plurality of antennas into modulation signals corresponding to different carriers, and outputs these as a plurality of despread signals. A spread spectrum receiver which has a despreading and receiving means (2-7) which despreads a received spread spectrum signal; means (8,9) which respectively multiply the despread signals that are outputted from this means by tap coefficients; a means (72) which adds the respective outputs of these multiplication means (8,9); a signal decision means (11) to which is fed the output of this adding means, and which performs signal decision and outputs the decision signal; a subtraction circuit (14) which computes the difference between the output of the aforementioned adding means (72) and this decision signal; and a tap coefficient control circuit (16) to which is fed this difference and the aforementioned despread signals, and which estimates the aforementioned tap coefficients by means of least mean square computation; said spread spectrum receiver being characterised in that : the aforementioned tap coefficient control circuit (16) has a memory (50) which holds in advance a transition matrix which updates, as the aforementioned tap coefficients, values that include the Nth order differentials of these coefficients (where N is a natural number); and a matrix multiplication circuit (51) which multiplies by this transition matrix in the course of the least mean square computation. A spread spectrum receiver as set forth in claim 7, wherein the propagation path of the received spread spectrum signal is composed of at least two arrival paths and the despreading and receiving means (2-7) despreads the received spread spectrum signal for each arrival path. A spread spectrum receiver as set forth in claim 7, wherein the despreading and receiving means (2-7) separates the received spread spectrum signal into modulation signals corresponding to different carriers. A spread spectrum receiver as set forth in any of claims 7 to 9, wherein the aforementioned transition matrix is: where m is a natural number where K is the row number and L is the column number. A spread spectrum receiver as set forth in claim 8, wherein the aforementioned despreading and receiving means (2-7) has a means which, for each arrival path, respectively despreads signals received from a plurality of antennas, and outputs these as despread signals. A spread spectrum receiver as set forth in claim 9, wherein the aforementioned despreading and receiving means (2-7) has a means which respectively despreads signals received from a plurality of antennas into modulation signals corresponding to different carriers.

Inventors: FUKAWA K, SUZUKI HIROSHI, FUKAWA, K., SUZUKI, HIROSHI, FUKAWA, K., 4-22-1-ROOM A102,KAMARIYA-HIGASHI, SUZUKI, HIROSHI, 2-28-209,MABORIKAIGAN
Applicants: NIPPON TELEGRAPH & TELEPHONE, NTT MOBILE COMMUNICATIONS NETWORK INC.
Application year: 1994
Main classification: H04B1
IPC codes: H04B1