Digital receiver for variable symbol rate communications

Abstract: A digital receiver (20) includes a tuner (24) and a demodulator (30) that obtains a baseband signal (36) carried in a received analog signal (22). A first sampler (46) operates at a preselected fixed asynchronous sampling rate on the baseband component to produce a first sampler output (48). A controllable digital filter (50) resamples the first sampler output to produce a filter output with a selectable resampling rate. The resampled output is time-position locked to baseband signal epochs. The resampling is processed to ascertain the bit stream of the baseband signal. The controllable filter sampling rate is automatically varied to correspond to the data rate of the baseband signal, so that the sampling rate of the first sampler need not change. Initial signal acquisition is achieved by operating the receiver as a frequency spectrum analyzer. A single signal-carrying band (66) is identified and demodulated, and a menu (72) carried on a transport layer (68) is read. This menu provides the center frequencies and bandwidths for all of the signals within an available frequency range, so that the receiver can be reconfigured for any desired signal. Changes in transmission characteristics of the signal can later be accommodated seamlessly by reading a change notice (74) transmitted in the transport layer and reconfiguring the receiver for the new transmission characteristics.

Description: TECHNICAL FIELD This invention relates generally to the reception and demodulation of communications signals, and more particularly, to the reception of such signals transmitted with arbitrarily selectable data rates. BACKGROUND ART In a communications system, data is formatted onto a carrier signal and transmitted by a transmitter. After the signal travels through some intervening medium, it is received and decoded by the receiver. Ideally, the waveform of the data would remain unchanged during the communications process. In practice, however, the waveform is distorted and corrupted by its passage both through the electronic circuitry of the transmitter and the receiver, and through the medium. An important feature of the receiver is the processing of the received signal to determine the actual content of the data even though the transmitting signal has become distorted and corrupted during the transmission and reception process. For example, in a typical satellite communications system a data signal is created at one location on the earth, encoded onto a radio signal, and transmitted to a satellite in synchronous orbit above the earth. The satellite retransmits the received signal to another location on the earth, where it is received and demodulated. The data-carrying signal passes though several electronic systems, as much as 44,000 miles of free space, and twice through the atmosphere, and in all of these portions of the transmission it is subject to external interference and distortions. Historically, the signal has been transmitted and processed entirely by analog techniques. In a paper entitled "Design Considerations and Design Tricks for Digital Receivers" presented at the 9th Kobe International Symposium on Electronics and Information Sciences held at Kobe on 18-19 June, 1991, Harris pointed out that the availability of high performance, reasonable cost, digital signal processing hardware assured the imminent application of digital signal processing (DSP) techniques to the implementation of radio receivers designed for the commercial AM and FM bands. Harris further pointed out that cost and performance considerations would require that the conversion of these traditional analog systems would entail more than direct replacement of their analog subsystems with digital counterparts. The standard operations of frequency translation, bandpass or lowpass filtering, and demodulation could often be merged or realized with trivial operations when implemented by clever DSP designs. Harris then described a collection of design structures and techniques developed for use in a digital receivers and presented measured performance characteristics from a prototype receiver. More recently, digital signal processing techniques are being adopted because they permit more precise determination of the data content of the signal. In digital signal processing, the receiver has a conventional tuner that receives and down converts the signal. The receiver thereafter samples the received analog signal to form a digital pulse train or signal. The digitized signal is further processed to extract the data content. This known approach works well for the condition that the transmitted signal has a fixed data rate known to the receiver, which permits the receiver to be configured for the characteristics of the known transmitted signal. In other instances, however, it is desirable to vary the data rate of the transmitter in an arbitrary manner. For example, a single satellite channel may be used to carry many different types of data signals, some of which are transmitted at a high data rate and some of which are transmitted at a low data rate. In another example, if the satellite channel carries a compressed video signal, it may be desirable to vary the data rate depending upon the type of programming being carried. A video feed of a conference could be transmitted at a lower data rate than a video feed of a sports event, for example, due to the differences in the speed of action. The lower the data rate of the signal, the more different types of data that could be carried by a single satellite channel. Several problems arise in complex communications systems having multiple channels, where the data rate is arbitrarily variable in each channel. As the data rate of the signal in a channel changes, the sampling rate of the sampler in the receiver must change in order to satisfy the Nyquist sampling criterion. The sampler is normally synchronized to a clock, which changes to permit the sampler to be varied to an arbitrary sampling rate. However, for other reasons it is strongly preferred not to change the clock rate in an arbitrary fashion so as to accommodate changes in the data rate. A second problem is that it is difficult to achieve initial acquisition of the data of the received information, when the channel is first activated. In Comsat Technical Review, vol. 22, no. 1, Spring 1992, at pages 149-195, Poklemba et al. describe theory and hardware emulation results for a digitally implemented modem whose technology is useful over a broad class of satellite communications applications, both terrestrial and in-flight. The modem can be programmed for 2-, 4-, 8-, and 16-PSK (phase shifting key), 16- QAM (quadrature amplitude modulation), MSK (minimum shift keying), and Offset-QPSK (quaternary PSK) modulation schemes over a range of data rates from 2.34 to 300 Mbit/s, with programmable spectral occupancy from 1.2 to 1.8 times the symbol rate. These operational parameters are executable in burst or continuous mode. All critical processing in both the modulator and demodulator is performed at baseband using very-high-speed digital hardware (including application-specific integrated circuits [ASICs]) and memory. Analog front-ends in phase-quadrature are employed for translation between the IF and baseband, where the analog-to-digital conversion takes place. In IEEE Transactions on Communications, vol. 41, no. 3, March 1993, at pages 501 to 507, Gardner describes interpolation in digital modems. Gardner points out that timing adjustment in a digital modem must be performed by interpolation if sampling is not synchronized to the data symbols. Gardner describes the fundamental equation for interpolation, proposes a method for control, and outlines the signal-processing characteristics appropriate to an interpolator. There is a need for a digital receiver system that is operable at variable rates, particularly in a multichannel communications system. The present invention fulfills this need, and further provides related advantages. DISCLOSURE OF THE INVENTION The present invention provides a digital receiver that accommodates variable data rates in digital signal processing while performing primary sampling at a fixed clock rate. The digital receiver automatically achieves initial acquisition of the transmitted signal and remains locked to the data rate frequency of the signal through changes in the data rate of the transmitted signal. The invention accomplishes its purpose by means of a digital receiver for a transmitted analog signal (22) having an arbitrarily variable data rate, the digital receiver including: a source (24, 28, 30, 42) for receiving the transmitted analog signal (22) and processing its components (I,Q) to obtain baseband analog signals (44); first samplers (46) each having as an input one of the baseband analog signals (44) and a digital first sampler output (48), the first samplers operating at a preselected, fixed sampling rate; controllable digital filters (50) each having as a first input a corresponding digital first sampler output and as a second input a time-shifting command signal, and as an output (52) a controllable digital resampled signal; means (56) for determining a timing error signal of a data bit stream at the output of the controllable digital resampled signal; and a timing loop (60) having as an input the timing error signal of the data bit stream and as an output the time-shifting command signal to the controllable digital filters; characterized by: means (65) for controlling the controllable digital filters (50) to operate at a narrow bandwidth; means (30, 34) for sweeping the narrow bandwidth of the controllable digital filters (50) over a frequency range; means (65) for determining a power spectrum of the outputs of the controllable digital filters (50) over the frequency range; and means (65) for selecting a center frequency and bandwidth from the power spectrum at which the digital receiver is then operated, thereby automatically achieving initial acquisition of the received signal. The invention also extends to a method for receiving transmitted analog signals of arbitrarily variable data rate using a digital receiver including: a source (24, 28, 30, 42) for receiving the transmitted analog signal (22) and processing its components (I,Q) to obtain baseband analog signals (44); first samplers (46) each having as an input one of the baseband analog signals (44) and a digital first sampler output (48), the first samplers operating at a preselected, fixed sampling rate; controllable digital filters (50) each having as a first input a corresponding digital first sampler output and as a second input a time-shifting command signal, and as an output (52) a controllable digital resampled signal; means (56) for determining a timing error signal of a data bit stream at the output of the controllable digital resampled signal; and a timing loop (60) having as an input the timing error signal of the data bit stream and as an output the time-shifting command signal to the controllable digital filters; characterized by: operating the controllable digital filters (50) at a narrow bandwidth; sweeping the narrow bandwidth of the controllable digital filters (50) over a range of frequencies; determining a power spectrum over the range of frequencies by using the outputs of the controllable digital filters (50); selecting a center frequency and bandwidth from the power spectrum; and operating the digital receiver at the selected center frequency and bandwidth, thereby automatically achieving initial acquisition of the received signal. A feature of the digital receiver is its ability to acquire the received signal automatically when the receiver is first turned on. To achieve the initial signal acquisition, the receiver is operated as a frequency spectrum analyzer. The controllable digital resampling filter is operated at a narrow bandwidth to determine the signal strength or power at that bandwidth. The center frequency of the resampling filter is incrementally shifted across the transponder bandwidth, to develop a power spectrum of the transponder signal. The power spectrum is analyzed to determine a strong contributor, and the digital receiver is stored and locked onto that contributor. Once a single signal-carrying band has been identified and demodulated, the receiver reads a transport layer or header of information transmitted with the data stream of the baseband signal in that band. The transport layer provides a menu to identify the center frequencies and bandwidths of other signals carried within the available frequency range and the information carried by those signals. The complete header is carried by all signals, so that if one signal is acquired, all signals may be found. If the receiver seeks a signal other than that to which it first locked, it can be readily returned to the desired signal using the information in the header. Subsequent scheduled changes in the center frequency or bandwidth are signalled by information carried in the baseband signal header. The digital receiver recognizes this information, and accordingly reconfigures the receiver to follow the scheduled transmitter changes. A seamless transition is thereby achieved. The present invention provides an important advance in the art of digital receivers. The baseband signal is sampled at a fixed asynchronous rate, and this sampled data is resampled by a controllable digital filter at an optimal sampling rate for the data transmission rate. By a symbol timing loop operating from a timing error signal, the resampling filter is time position locked to the phase of the data transmission of the baseband signal epoch as it changes. Other features and advantages of the present invention will be apparent from the following more detailed description of the preferred embodiment, taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the invention. BRIEF DESCRIPTION OF DRAWING The objects, advantages and features of this invention will be more readily appreciated from the following detailed description, when read in conjunction with the accompanying drawing, in which: Fig. 1 is a block diagram of a receiver; Fig. 2 is a graph of a representation of a baseband signal, with indicated sampling; Fig. 3 is a schematic diagram of a polyphase filter; Fig. 4 is a block flow diagram for the acquisition of a signal upon startup of the system and the continuous monitoring of the signal for transmission changes during operation; Fig. 5 is a graph of a power spectrum of the transmission channel; Fig. 6 is a schematic representation of a header found in the data stream of each signal transmitted within a channel; and Fig. 7 is a block flow diagram of a self-compensation of the receiver for thermal drift of the local oscillator. BEST MODES FOR CARRYING OUT THE INVENTION Fig. 1 is a block diagram of a digital receiver 20. A transmitted analog signal 22 is received by a conventional tuner 24 appropriate for the band of the signal 22. A received analog output signal 26 of the tuner 24 is amplified by a variable-gain amplifier 28 to an amplitude suitable for subsequent signal processing. The I/Q components of the received analog signal 26 are separately processed in parallel, as shown in Fig. 1. The processing is the same in each parallel path, and the following description applies to each of the paths. The amplified received analog signal 26 is provided to a detector/mixer 30 as a first input. A second input is an internally generated local oscillator (mixer) waveform 32 provided by a voltage-controlled oscillator 34. The output of the detector/mixer 30 is a baseband signal 36 that contains the transmitted information, in this case a stream of digital waveforms. The baseband signal strength of one of the I/Q components of the processing path is sampled at this point by an automatic gain control loop 38. The AGC loop 38 provides a feedback amplitude control signal 40 to the variable-gain amplifier 28. The gain of the amplifier 28 is adjusted to provide the required baseband signal strength for further processing. The baseband signal 36, still in analog form, is filtered by a low-pass filter 42 that acts as an anti-aliasing filter for the subsequent digital sampling and processing. The bandwidth and out-of-band attenuation of this filter 42 are selected to avoid spectral aliasing and spectral distortion of the out-of-band and in-band components, respectively, of the maximum bandwidth signal presented to the sampler. In the preferred embodiment, subsequent digital sampling is at a fixed rate of 60 MHz, and the low-pass filter 42 is therefore selected to have a maximum bandpass of 15-30 MHz, preferably 20 MHz. Data transmissions are therefore necessarily at a rate of 30 MHz or less per I/Q channel with this preferred embodiment. A higher sampling rate would permit a higher maximum data transmission rate. These values are presented by way of illustration for a preferred embodiment, but other data rate modes can be selected as desired. The filtered signal 44 is digitally sampled by a first sampler 46, preferably provided in the form of an analog-to-digital converter. The first sampler 46 is operated at a fixed, asynchronous sampling rate determined from a clock 47. The sampling is asynchronous in the sense that the sampling rate is fixed and constant. There is no relation between the sampling rate and the symbol rate or frequency of the baseband signal, except that the sampling rate is sufficiently high that the conditions of the Nyquist sampling criterion are necessarily met for the highest frequency signal available to the receiver. Satisfaction of the sampling criterion is ensured by the selection of the bandpass frequency of the low-pass filter 42 in relation to the operating frequency of the first sampler 46. There may be more than two samples per symbol, when the symbol rate is less than the maximum permitted symbol rate. This approach to the selection of the first sampler 46 is distinct from that of the art. In prior approaches, the digital sampler was operated at a variable rate to exactly satisfy the Nyquist sampling criterion for the symbol rate of the baseband signal. This approach requires multiple clocks for multiple channels, and multiple matched filters. There would be no universal clock, a significant disadvantage for a multichannel communication system. The combination of the low-pass filter 42 and the first sampler 46 defines a maximum frequency for a particular mode of operation of the receiver 20. Different selectable sets of fixed-rate digital samplers 46 and low-pass filters 42 can be used together to achieve various modes of operation, but within any particular mode the operation of the sampler 46 remains at a fixed asynchronous rate. Alternatively, a single reconfigurable fixed rate digital sampler and reconfigurable low-pass filter can be used to achieve various modes of operation. Referring again to Fig. 1, the first sampler produces a digital first sampler output 48. Fig. 2 depicts the analog baseband signal 44 in the time domain with the digital first sampler output 48 also indicated. There are necessarily at least two samples 48 per symbol. However, these samples 48 do not bear any fixed, known relation to the baseband signal 44. Specifically, the asynchronous samples 48 are not taken in a particular time position relation with the symbols transmitted or in any other relation to the symbols that is known a priori. The first sampler output 48 is resampled by a controllable digital filter 50. The filter 50 is preferably a multirate polyphase filter capable of either rational resampling capable of interpolation and decimation according to some ratio of integers A/B, or a variable rate polyphase filter capable of a continuously variable resampling at any continuous interpolation and/or decimation. The filter 50 performs two key functions. It produces an output of a controllable digital resampled signal 52 that has twice the frequency of the symbol data rate of the baseband signal 36, to satisfy the Nyquist sampling criterion. Second, it ensures that the digital resampled signal 52 is time position locked to the baseband signal 36 so that the samples are taken at the symbol locations of the signal 36. The basic structure and operation of polyphase filters is known, see, for example, Ronald E. Crochiere et al., "Multirate Digital Signal Processing", Prentice-Hall Company, pages 59 et seq., 1983. By a combination of decimation and interpolation, such filters can produce a digital sampling of an input signal at any selected rate. In this case, the input is the digital first sampler signal 48 having a frequency at least as high as twice the symbol rate of the baseband signal. The filter 50 therefore functions to produce the same or a lower effective sampling rate, time position locked to the timing of the digital first sampler signal 48. As indicated in Fig. 2, the filter 50 operates by increasing the sampling rate to a higher value than that of the first sampler 46 to interpolate between the digital samples 48, producing a plurality of interpolated samples 54. The larger number of interpolated samples 54 is decimated by selecting the proper number and positions of samples to correspond to the symbol rate of the baseband signal. Fig. 3 schematically illustrates the operation of the polyphase filter 50. The relation of sampled and resampled signals is indicated graphically. The digital first sampler output stream 48 is supplied to each input of a plurality of A interpolators 80 of a polyphase filter bank 82. Each interpolator interpolates between the points of the output stream 48 at the same constant frequency f s , the same rate as the first sampler 46, to produce its own interpolator output 84. Two of the interpolator outputs 84 and 84' are shown, for the first interpolator (INT0) and the second interpolator (INT1). The interpolator outputs 84 and 84' are at the same frequency f s , but time displaced from each other. By the appropriate choice of the time displacements according to the number of interpolators 80 in the filter bank 82, the filter bank 82 produces A upsampled interpolation points between each of the digital first sampler points 48. A commutator 86 operates on the interpolator outputs 84 to downsample or decimate the outputs 84 by a downsampling parameter B. If the downsampling parameter B is made equal to the upsampling parameter A, the filter bank 82 operates as a time-shifting or phasing filter. Time increment quantization is defined by the number of polyphase filter stages, and can be made arbitrarily fine by increasing A. In this mode, the filter bank can align output samples from the asynchronously sampled input stream 48 to arbitrary epochs in the input data. If the frequency of the sampling clock f s used to form uniformly spaced samples and the frequency of periodic epochs f e in the underlying data differ by a small percentage the pointer of output commutator can precess in the appropriate direction to track the epochs. Thus, rather than increment the commutator 86 in equal steps of length A, the output pointer is instead incremented in steps of A for M-1 samples and then in steps of A+/-1 at the Mth sample, according to the relation f s /f e = [(M-1)A + (A+/-1)]/M. When the output incrementing factor B is chosen to be different from the input incrementing factor A, an output sample rate with any rational ratio multiple of the input sample rate (f s A/B) can be obtained. If the desired frequency is near a rational ratio, then it can be approximated with minor phase jitter by the same processing approach just described. For a sufficiently large A, the use of a processing B (e.g., B') permits the formation of time matched samples at any output rate. The digital resampled signal 52 is amplified as necessary by a digital amplifier 53 controlled by a digital automatic gain control 55. The amplified signal is resampled at the minimum permitted Nyquist rate by a resampler 57, whose output is processed by a matched filter 56 referenced to the transmitter waveforms and bandwidth. An output 58 of the matched filter 56, a spectrally shaped bit stream synchronized to the original data stream that generated the baseband signal, is provided to further processing hardware, which is conventional. The phase of the sampling of the controllable digital filter 50 is established in conjunction with the filter bank 82 discussed above, using a timing loop 60. The error between the reference signal of the matched filter 56 and the digital resampled signal is a measure of the time position shift required in the controllable digital filter 50 to recover the timing and align the digital samples with the symbols encoded into the baseband. Referring to Fig. 2, if the matched filter 56 indicates that the digital resampled signal points, indicated by circled pointer 62, is time position shifted from its respective symbol location by an error 64, the timing loop 60 shifts the time position of the resampling of the controllable digital filter 50 by interpolating to the desired positions, thereby reducing the error 64 to zero. The phase error of the output signal I/Q pair 58 is detected by a phase error detector 61. This phase error is provided, via a digital/analog converter 67, to the voltage controlled oscillator 34, which generates the frequency and phase coherent mixer waveform 32. The controllable digital filter 50 and the matched filter 56 together form a controllable signal processor 62. The filters 50 and 56 may be combined into a single polyphase filter. In the preferred approach, the controllable signal processor 62 is controlled in part by the timing loop 60 and in part by a microprocessor 65. The controllable signal processor 62 also provides information to the microprocessor 65. The ability to control and interact with the controllable signal processor 62, which contains the controllable digital filter 50, provides great flexibility and power to the receiver 20. An important function of the microprocessor 65 is to support the initial signal acquisition by the receiver and to aid in making a seamless shift responsive to announced changes in the transmitted signal. Fig. 4 illustrates both of these processes, in the context of system startup and continued monitoring of the symbol bit stream. At system startup, numeral 100, the center frequency and bandwidth must be assumed to be unknown, but within the general specifications of the hardware. By contrast, in most types of signal communications the center frequency and bandwidth of the signal are preselected, so that the receiver can be configured directly to those values upon startup. The present approach permits the greatest extent of flexibility for those using the communications system with the receiver 20 of the invention. To locate the unknown center frequency and bandwidth, the microprocessor 65 causes the controllable signal processor 62 to act as a narrow bandwidth, swept frequency spectrum analyzer. The controllable digital filter 50 is operated as a narrow bandwidth filter, typically at about 2 MHz bandwidth. The center frequency received by the controllable digital filter 50 is shifted by adjusting the voltage of the voltage controlled oscillator 34 to generate the mixer waveform 32 in a series of frequency steps which span the bandwidth available to the system. The entire available bandwidth is swept, numeral 102. The frequency step size is preferably equal to one-half the filter's bandwidth and the dwell time at each frequency position is sufficient to obtain a low variance estimate of the total signal power received at that frequency. At each frequency, the total power in the received baseband signal is measured, numeral 104. To determine the total power transmitted in each frequency band sample, the output of the controllable digital filter 50 is resampled to the appropriate Nyquist rate and converted to a total power estimate by summing the squares of the signal samples. The value of the power received at each frequency is stored in the microprocessor. The spectral sweep 102 and power determination 104 may be repeated as many times as necessary to build a statistical base, with the results of all of the sweeps digitally averaged by a digital integrator. At the completion of the sweeps and power determination, the microprocessor 65 holds a power spectrum of the broadband of the system. This power spectrum contains one or more peaks 66 indicating the transmission of the corresponding signals available to the receiver. Fig. 5 illustrates such a power spectrum. The receiver 20 is tuned to the center frequency of any one of the signal peaks 66, numeral 106, preferably one of strong power indicating a clear signal available for decoding. A symbol bit stream is established by the normal processing discussed previously. As illustrated in Fig. 6, each bit stream contains a transport layer 69 (also termed a "header") of information in addition to the data stream 70. The data stream varies from signal to signal, but the transport layer 68 of each of the signals contains at least a menu 72 of all of the signals, corresponding to each of the spectral peaks in Fig. 5. Each menu 72 of each signal contains a listing of each of the available i signals S i and their respective center frequencies f i and bandwidths b i . Thus, for example, if the receiver happened to select signal S₂ in step 106, the menu of all signals S i is read from the transport layer 68, numeral 108. If the microprocessor 65 determines from the menu that the signal of interest is in fact signal S₃, the frequency f₃ and bandwidth b₃ are read from the menu 72. The tuner and receiver are immediately reconfigured to the frequency f₃ and bandwidth b₃ to complete the startup, numeral 110. In a typical case, it is estimated that the signal acquisition is completed in about 100 milliseconds from startup. After startup, the receiver 20 is operated to respond automatically to changes in the transmission parameters of the signal in the following manner. During receipt of the symbol bit stream of a signal, the transport layer 68 is continuously monitored by the microprocessor 65, numeral 112. In the event that the service supplier that provides the signal being monitored decides to change a transmission parameter such as the center frequency, the bandwidth, the symbol frequency, or other parameter, information indicating the planned change is encoded into a change block 74 of the transport layer 68. The change block 74 typically would include the old parameters, the new parameters, and a countdown timer to the initiation of the new parameters. The microprocessor 65 counts down to the initiation of the new parameters, numeral 114. At the time of the change to the new signal parameters, the microprocessor 65 instantaneously reconfigures the receiver to the new parameters, numeral 116. With this advance warning of the transmitting parameter change, the changeover is made in a seamless manner. Continuous monitoring of the transport layer 68 also provides information on other signals and their transmission changes, for use when the receiver is switched to a different signal. Switches and changeovers could be made instead by repeating the initiation procedures 102-110, but this would necessarily involve some loss of signal until the new signal parameters were determined. The intelligence provided to the receiver 20 by the microprocessor 65 also is used to advantage in performing test and calibration procedures of the receiver. As an example of the calibration function, the receiver 20 can instantaneously self-compensate for temperature changes that alter the frequency of an oscillator. As shown in Fig. 7, the microprocessor 65 monitors the frequency of the local oscillator of the tuner 24, numeral 120. The frequency is determined by counting the oscillator cycles for a fixed period of time, and converting the number of counts per interval into an oscillator actual cycles per second, numeral 122. The actual oscillator cycles per second is compared to a nominal value, numeral 124. The difference, a calibration for thermal drift or other variation of the tuner oscillator, is provided to the time position-locked loop of the tuning control, numeral 126. Although a particular embodiment of the invention has been described in detail for purposes of illustration, various modifications and enhancements may be made without departing from the scope of the claims. Accordingly, the invention is not to be limited except as by the appended claims.

Claims: A digital receiver for a transmitted analog signal (22) having an arbitrarily variable data rate, the digital receiver including: a source (24, 28, 30, 42) for receiving the transmitted analog signal (22) and processing its components (I,Q) to obtain baseband analog signals (44); first samplers (46) each having as an input one of the baseband analog signals (44) and a digital first sampler output (48), the first samplers operating at a preselected, fixed sampling rate; controllable digital filters (50) each having as a first input a corresponding digital first sampler output and as a second input a time-shifting command signal, and as an output (52) a controllable digital resampled signal; means (56) for determining a timing error signal of a data bit stream at the output of the controllable digital resampled signal; and a timing loop (60) having as an input the timing error signal of the data bit stream and as an output the time-shifting command signal to the controllable digital filters; characterized by: means (65) for controlling the controllable digital filters (50) to operate at a narrow bandwidth; means (30, 34) for sweeping the narrow bandwidth of the controllable digital filters (50) over a frequency range; means (65) for determining a power spectrum of the outputs of the controllable digital filters (50) over the frequency range; and means (65) for selecting a center frequency and bandwidth from the power spectrum at which the digital receiver is then operated, thereby automatically achieving initial acquisition of the received signal. The digital receiver of claim 1, wherein the source (24, 28, 30, 42) for receiving the transmitted signal (22) and processing its components to obtain baseband analog signals (44) comprises: a tuner (24) having the transmitted analog signal (22) as an input and a received analog signal (26) as an output, demodulators (30, 32, 34) each having as a first input a component (I,Q) of the received analog signal and as a second input a mixer waveform, and as an output the transmitted signal modulated on the received analog signal, and low pass analog filters (42) each having as an input the modulated transmitted signal and as an output a filtered transmitted signal comprising the transmitted analog signal. The digital receiver of claim 1, wherein the means (34, 62) include a voltage controlled oscillator (34) having as an input the voltage control signal and as an output a mixer waveform. The digital receiver of claim 1, wherein the means (56) for determining a timing error signal includes: a matched filter (56) having as an input the controllable digital resampled signal, and as a first output (58) a spectrally shaped data bit stream and as a second output a timing error signal of the data bit stream. The digital receiver of claim 1, further characterized by: a system clock (47) that provides a clock rate to the first sampler (46). The digital receiver of claim 1, wherein the controllable digital filters (50) are mulitrate polyphase filters. The digital receiver of claim 1, wherein the controllable digital filters (50) are variable rate polyphase filters. The digital receiver of claim 1, wherein the means (65) is further for reading a header data signal of the data bit stream. The digital receiver of claim 8, wherein the means (65) is further for changing the center frequency in response to the header data signal. The digital receiver of claim 8, wherein the means (65) is further for changing the bandwidth of the controllable digital filters (50) in response to the header data signal. The digital receiver of claim 1, wherein the means (30, 34) causes the center frequency of the analog signal to change in a series of frequency steps. The digital receiver of claim 11, wherein the means (65) is further for measuring the power of the analog signal at each step in the series of frequency steps. A method for receiving transmitted analog signals of arbitrarily variable data rate using a digital receiver including: a source (24, 28, 30, 42) for receiving the transmitted analog signal (22) and processing its components (I,Q) to obtain baseband analog signals (44); first samplers (46) each having as an input the analog signals (44) and a digital first sampler output (48), the first samplers operating at a preselected, fixed sampling rate; controllable digital filters (50) each having as a first input a corresponding digital first sampler output and as a second input a time-shifting command signal, and as an output (52) a controllable digital resampled signal; means (56) for determining a timing error signal of a data bit stream at the output of the controllable digital resampled signal; and a timing loop (60) having as an input the timing error signal of the data bit stream and as an output the time-shifting command signal to the controllable digital filters (50); characterized by: operating the controllable digital filters (50) at a narrow bandwidth; sweeping the narrow bandwidth of the controllable digital filters (50) over a range of frequencies; determining a power spectrum over the range of frequencies by using the outputs of the controllable digital filters (50); selecting a center frequency and bandwidth from the power spectrum; and operating the digital receiver at the selected center frequency and bandwidth, thereby automatically achieving initial acquisition of the received signal. The method of claim 13, further characterized by the narrow bandwidth being swept over the range of frequencies by changing the center frequency of the analog signal in a series of frequency steps. The method of claim 14, further characterized by the step of forming the power spectrum being executed by measuring the power of the analog signal at each step in the series of frequency steps. The method of claim 13, further characterized by: receiving a transmitted analog signal (22) having at least two transmitted signals thereon, each of the transmitted signals having a transport layer (69) and a symbol bit stream (70); identifying a center frequency and bandwidth for one of the transmitted signals (66); and reading a menu (72) of center frequencies and bandwidths of each of the transmitted signals from the transport layer of the identified transmitted signal. The method of claim 16, further characterized by: after the step of providing and before the step of identifying, producing a digital signal from the analog signal, the digital signal having the transport layer and the symbol bit stream in digital form. The method of claim 16, further characterized by: after the step of reading, tuning the digital receiver to one of the transmitted signals different from the transmitted signal selected in the step of identifying. The method of claim 13, further characterized by: transmitting the analog signal according to a first set of transmission parameters, the analog signal having a transport layer (68) and symbol bit stream (70), the transport layer having an indication (74) thereon of a subsequent change to a second set of transmission parameters and the time at which the change is to occur; reading the transport layer (68) to determine the time of the subsequent change and the second set of transmission parameters; and tuning the digital receiver according to the second set of transmission parameters responsive to the time at which the change is to occur as read from the transport layer (68).

Inventors: BECKER DONALD W, HARRIS FRED, TIERNAN JAMES C, BECKER, DONALD W., HARRIS, FRED, TIERNAN, JAMES C.
Applicants: TV COM TECH INC, TV/COM TECHNOLOGIES, INC.
Application year: 1994
Main classification: H04L7
IPC codes: H04L27, H04L7