Multilayer epitaxy for a silicon diode

Abstract: An all epitaxial process performed entirely in a CVD reactor is employed to grow heavily doped layer (N+) on lightly doped layer (N-) on heavily doped substrate (P+), eliminating the need for separate diffusion, even for high impurity concentrations. The process starts with a heavily doped silicon substrate (P+) of carrier concentration typically greater than 1 x 10¹⁹ per cm³. To minimize outdiffusion, the substrate is "capped" by growing very thin and heavily doped silicon layers (10) which are depleted by hydroven purges. A first epitaxial layer (N-) is grown over the "capped" substrate. This layer is relatively lightly doped, having a resistivity of more than 200 ohm.cm. A second epitaxial layer (N+) is then grown over the first epitaxial layer (N-). The second epitaxial layer (N+) has a polarity opposite to that of the substrate (P+) and is heavily doped to a resistivity of less than .005 ohm.cm.

Description: The present invention relates to a structure of semiconductor material for use in the fabrication of a semiconductor device having an epitaxial structure and to a method of fabricating same. The method is particularly applicable to the fabrication of a semiconductor material on a substrate in a single continuous operation in the chamber of a chemical vapor deposition reactor. Semiconductors of many types are formed on wafers which are commonly made of silicon crystal material. The material is produced by an epitaxial growth process in accordance with well known chemical vapor deposition principles. The growth of the material takes place in vessels called chemical vapor deposition (CVD) reactors specially designed for this purpose. Such reactors have facility to control growth conditions such as temperature and pressure, as well as impurity concentrations. Certain types of semiconductors such as power diodes and Zener diodes have specific electrical parameter requirements, for example, forward voltage drop, leakage current and breakdown voltages, which are difficult to accurately control by conventional diffusion means. A multilayer epitaxial structure as proposed in this disclosure will provide accurate controls to meet the device electrical parameter requirements. In addition, the need for impurity diffusion is eliminated. The said multilayer structure is epitaxially grown with a top layer having high impurity concentration and middle layer having light impurity concentration deposited on a substrate of high impurity concentration with opposite or same dopant type. However, the formation of heavily doped layers by epitaxial growth usually means slow growth rates and the presence of high impurity concentrations in the material leads to problems with "outdiffusion", where the high dopant concentration layers tend to contaminate low concentration layers, as the material containing the heavily doped layer is heated to high temperature for processing. Another problem associated with heavily doped epitaxially grown layer is "autodoping" in which dopant moves into the gas stream. This autodopant together with highly concentrated dopant gas used, contaminates the reactor chamber and quartz ware and therefore tends to degrade resistivity control on subsequent runs (the so called "memory effect"). Consequently, where high impurity concentrations are required, it has been necessary to form the doped layer by diffusion in a separate vessel called a diffusion tube. There will be described below a multilayer epitaxial structure with a heavily doped layer and a lightly doped layer and a method for fabricating same without diffusion which overcomes the problems normally associated with use of materials with high impurity concentrations in a CVD reactor. The process to be described permits epitaxial technology to replace diffusion entirely. Accordingly, it permits the structure to be formed by a single continuous epitaxial process in a single apparatus. Moreover, the method described produces a superior quality product, improved device performance and higher device yields. In brief, the fabrication of the semiconductor structure starts with a heavily doped substrate of a silicon material, preferably with a resistivity of less than .0035 ohm cm. Very thin "cap" layers are formed in succession on the substrate, rapidly followed by hydrogen purges which deplete the dopant concentration in the reactor chamber. A first epitaxial layer which is relatively lightly doped and has a relatively high resistivity (0.1 to 200 ohm cm.) is grown over the "capped" substrate to a thickness of less than 100 microns. A relatively heavily doped second epitaxial layer is then grown over the first epitaxial layer. The second epitaxial layer preferably has a carrier concentration greater than 1 x 10 19 per cm 3 and hence a very relatively low resistivity. It has a polarity opposite to that of the substrate. The practice of the present invention enables us to provide a multilayer epitaxial structure and method for fabricating same which overcomes the problems associated with dopant memory effect and autodopant effect in a chemical vapor deposition reactor, permitting formation of a multilayer structure by an all epitaxial process which can take place in a single continuous operation in a single vessel. The substrate is capped with two thin sub-layers to minimize outdiffusion to the subsequently grown epitaxial layer and contamination of the vessel. Patent specification GB-A-2 019 644 (Philips) discloses a method of fabricating a semiconductor material for use in the fabrication of a semiconductor device, comprising: providing a silicon substrate that is relatively heavily-doped and of a given polarity; and producing a multiplicity of silicon layers including a cap layer on said substrate by an all epitaxial process performed in a CVD reactor chamber. In GB-A-2 019 644 a mask layer is grown as a thick layer on one major surface of the substrate and subsequently etched to a thin layer (from 1.3 to 0.3µm thickness). The etching step also provides for the growth of another layer on the opposite major surface of the substrate. The method of fabricating a semiconductor material as set forth above is characterized according to the invention in that said multiplicity of layers is produced by: a) growing a first relatively thin cap sub-layer over the substrate and purging said chamber with hydrogen to dopant deplete said first sub-layer; b) growing a second relatively thin cap sub-layer over the first sub-layer and purging said chamber with hydrogen to dopant deplete said second sub-layer; c) growing a relatively lightly-doped epitaxial layer above said second sub-layer; and d) growing a relatively heavily-doped epitaxial layer of the opposite polarity type to said substrate above said relatively lightly-doped epitaxial layer. GB-A-2 019 644 also discloses a structure of semiconductor material for use in the fabrication of a semiconductor device, comprising: a silicon substrate that is relatively heavily-doped to be of a given polarity, and a multiplicity of silicon layers including a cap layer epitaxially grown on said substrate. As already stated above in GB-A-2 019 644, the substrate is provided with a thin mask layer whose thickness has been controlled by etching a thicker layer first grown on the substrate. There is no mention of the thin mask layer being dopant-depleted. According to another aspect of the present invention, the structure of semiconductor material set forth above is characterized in that said multiplicity of layers comprises: said cap layer formed to be dopant depleted and comprising first and second relatively thin sub-layers, each of which is dopant depleted; a relatively lightly-doped layer grown over said cap layer; and a relatively heavily-doped layer grown over said relatively lightly-doped layer and of opposite polarity to said substrate. In one implementation of the invention, the following parameters may be selected. The substrate preferably has a resistivity of less than .0035 ohm cm, and preferably in the range .001 to .002 ohm cm. The lightly doped epitaxial layer preferably has a resistivity in the range of 0.1 to 200 ohm cm. and a thickness of less than 100 microns. The lightly doped epitaxial layer may have the same polarity as the substrate or the opposite polarity. The heavily doped epitaxial layer preferably has a thickness less than 100 microns. The carrier concentration of the substrate is preferably greater than 1 x 10 19 per cm 3 . The carrier concentration of the heavily doped epitaxial layer is also preferably greater than 1 x 10 19 per cm 3 . In one proposed multilayer epitaxial structure embodying the invention, the substrate has a resistivity of less than .002 ohm cm, and preferably in the range of .001 to .002 ohm cm. A first epitaxial layer, situated above the sub-layers of the cap, is grown having a resistivity in the range of less than 50 ohm cm, and a thickness of less than 100 microns, and preferably in the range of 5-100 microns. A second epitaxial layer, situated above said first epitaxial layer, is grown having a resistivity of less than .005 ohm cm. and thickness of less than 100 microns preferably in the range of 5-100 microns. The substrate and the second epitaxial layer are of opposite polarity. Preferably in practising the method of the invention, the step of forming the two sub-layers of the cap layer comprises heating the substrate, introducing silicon gas with or without dopant gas to grow a thin sub-layer and purging the sub-layer with hydrogen to deplete the dopant from the layer. Preferably the silicon is introduced into the chamber through the use of gases selected from a group of compounds consisting of trichlorosilane, chlorosilane or silane. The growing of the first, lightly-doped, epitaxial layer is effected in the chemical vapor deposition reactor in a hydrogen ambient at a temperature between 1000°C and 1200°C. The layer is formed with a resistivity of less than 200 ohm cm, preferably a resistivity of less than 50 ohm cm. and a thickness of 5 to 100 microns. Preferably the growing of the second, highly-doped, epitaxial layer is effected in the chemical vapor deposition reactor in a gas environment which is the source of a dopant selected from the group of arsenic, phosphorus and antimony. The second epitaxial layer is grown with a resistivity of less than .005 ohm cm. and a thickness of less than 100 microns. Preferably, the layer is doped to a concentration of greater than 1 x 10 19 per cm 3 . A multilayer epitaxial structure and method for fabricating same in accordance with this invention will now be described with reference to the accompanying drawings, wherein like numerals refer to like parts and in which: Fig. 1 is an idealized cross-sectional view of the substrate; Fig. 2 is a view similar to Fig. 1 showing the first epitaxial layer on the "capped" substrate; an Fig. 3 is a view similar to Fig. 2 showing the second epitaxial layer. Certain modifications to the gas feed and venting system for the CVD reactor, as described in detail in our copending application 94 301 700.4 (publication number EP-A-0670484), make the process more suitable for use in large scale production. This application discloses a gas flow system which reduces residue dopants which would otherwise remain in the reactor or associated plumbing and may adversely affect subsequent runs by degrading resistivity control. The reader is referred to that application for further information in that regard. The invention is described herein in the context of the processing of material for the fabrication of power diodes. It is particularly useful in this application because this process eliminates the necessity for front and back diffusions normally required when fabricating such devices. However, the invention should not be construed as being limited to this specific application. Other uses of the invention in the fabrication devices of many other configurations will be obvious to those skilled in the art. The process begins with a heavily doped P-type substrate, preferably with an impurity concentration typically greater than 1 x 10 19 per cm 3 and a resistivity of less than .0035 ohm cm, typically in the .001 to .002 ohm cm range. It may have a thickness of 14 to 16 mils (1 mil = 2.54 x 10 -5 m). Conventionally, such a substrate, after being grown in a CVD reactor, would be transferred to a separate vessel, known as a diffusion tube, for formation of the doped regions using well known diffusion techniques. However, with the present proposal , the multilayer structure, including heavily doped layers can be made in the CVD chamber itself, in a single continuous epitaxial process. The susceptor in the CVD chamber is preferably silicon coated. This minimizes autodoping from the backside of the substrate. Silicon capping techniques are used to minimize outdiffusion from the substrate. After heating the substrate in the CVD chamber and cleaning the surface with HCl, the substrate surface is "capped". Capping is accomplished by growing a cap layer 10 of very thin silicon sublayers on the substrate and depleting the dopant level of each sublayer after it is formed. The substrate is heated to a temperature over 1000°C in an H 2 atmosphere containing a silicon source gas to form each sublayer. The growth rate is relatively fast, approximately 2.5 microns per minute, to minimize cycle time. After each thin sub layer is formed, it is subjected to a hydrogen purge which depletes the dopant level dramatically. The cycle is then preferably repeated so that the cap layer 10 is formed of at least two sublayers of depleted silicon. At present, two cap sublayers are preferred, although more may be employed, if desirable. The silicon source for the cap layer 10 is preferably trichlorosilane. It is introduced in the reactor in a hydrogen ambient of one atmospheric pressure and at a temperature between 1000° and 1200°C. However, other sources of silicon, such as chlorosilane or silane, can be used with appropriate temperature and growth rates. The first layer is then epitaxially grown over the capped substrate surface in the CVD reactor. This is a relatively lightly doped, high ohmic region and can be of either polarity. In the example, the layer maybe N- type. An appropriate source gas provides the necessary impurities. This layer has a resistivity in the range of 0.1 to 200 ohm cm; preferably less than 50 ohm cm. It has a thickness of between 0.1 and 100 microns, preferably between 5 an 100 microns. The structure is seen in Fig. 2. A second layer is then epitaxially grown on the first epitaxial layer in the CVD reactor. This layer will be of a low ohmic region, and is relatively heavily doped, like the substrate. It is, however, of opposite polarity to the substrate, in this case, N+. Phosphine may be use as a source of phosphorus ions. Alternatively, arsenic or antimony ions can be employed. An impurity concentration of greater than 1 x 10 19 per cm 3 is preferred, with a resistivity similar to that of the substrate. The structure is seen in Fig. 3 Throughout the process, the growth temperatures are 1000° and 1200°C and pressure in the reactor is kept at 1 atmospheric in a hydrogen ambient. Silicon capping techniques are employed to minimize outdiffusion from the substrate. Silicon-coated susceptors are employed in the CVD reactor to minimize autodoping from the backside of the substrates. Hydrogen purges are employed to deplete the remaining capping sublayers after growth. Fast growth rates of approximately 2.5 microns per minute minimize cycle time. This process permits the entire structure to be achieved in a single continuous production run in a single apparatus. Moreover, the process eliminates the need for front and back diffusions normally required for power semiconductor devices. This structure and method improves the forward voltage drop, leakage current and breakdown voltage distribution characteristics of the semiconductor devices. The heavily doped layers improve ohmic contact during metallization and packaging. It also reduces processing steps by simplifying the process to be all expitaxial and at the same time improves fabrication yields. It should now be appreciated that there has been described a multilayer epitaxial structure and an all epitaxial method for fabricating same. The structure includes a heavily doped, low resistivity substrate of one polarity, a high resistivity, middle layer grown on the capped substrate and a heavily doped, low resistivity top layer of opposite polarity to the substrate grown on the middle layer. The interfaces between one low ohmic region (substrate or top layer) and the high ohmic region (middle layer) form the electronic junctions.

Claims: A structure of semiconductor material for use in the fabrication of a semiconductor device, comprising: a silicon substrate (P+) that is relatively heavily-doped to be of a given polarity, and a multiplicity of silicon layers (10, N+, N-) including a cap layer (10) epitaxially grown on said substrate (P+), characterized in that said multiplicity of layers (10, N+, N-) comprises: said cap layer (10) formed to be dopant depleted and comprising first and second relatively thin sub-layers, each of which is dopant depleted; a relatively lightly-doped layer (N-) grown over said cap layer (10); and a relatively heavily-doped layer (N+) grown over said relatively lightly-doped layer and of opposite polarity to said substrate (P+). The structure of Claim 1 wherein said substrate (P+) has a resistivity of less than .0035 ohm-cm. The structure of Claim 2, wherein said substrate has a resistivity in the range of .001 to .002 ohm-cm. The structure of Claim 1, wherein said substrate has a resistivity less than .002 ohm-cm. The structure of any preceding claim wherein the impurity concentration of said substrate (P+) is greater than 1 x 10 19 per cm 3 . The structure of any preceding claim wherein said lightly-doped epitaxial layer (N-) has a resistivity in the range of 0.1 to 200 ohm-cm. The structure of any one of Claims 1 to 5, wherein said lightly-doped epitaxial layer (N-) has a resistivity of less than 50 ohm-cm. The structure of any preceding claim, wherein said lightly-doped epitaxial layer (N-) has a thickness in the range of 5-100 microns. The structure of any one of Claims 1 to 7, wherein said lightly-doped epitaxial layer (N-) has a thickness of less than 100 microns. The structure of any preceding claim, wherein said lightly-doped epitaxial layer (N-) is of said given polarity. The structure of any one of Claims 1 to 10, wherein said lightly-doped epitaxial layer (N-) is of the opposite polarity to said given polarity. The structure of any preceding claim, wherein said heavily-doped epitaxial layer (N+) has a thickness of less than 100 microns. The structure of any one of Claims 1 to 11, wherein said heavily-doped epitaxial layer (N+) has a thickness in the range of 5 to 100 microns. The structure of any one of Claims 1 to 12 wherein heavily-doped epitaxial layer (N+) has a resistivity of less than .005 ohm-cm. The structure of any preceding claim, wherein the impurity concentration of said heavily-doped layer (N+) is greater than 1 x 10 19 per cm. A method of fabricating a semiconductor material for use in the fabrication of a semiconductor device, comprising: providing a silicon substrate (P+) that is relatively heavily-doped and of a given polarity; and producing a multiplicity of silicon layers (10, N-, N+) including a cap layer (10) on said substrate by an all epitaxial process performed in a CVD reactor chamber, characterized in that said multiplicity of layers (10, N-, N+) is produced by: a. growing a first relatively thin cap sub-layer over the substrate and purging said chamber with hydrogen to dopant deplete said first sub-layer; b. growing a second relatively thin cap sub-layer over the first sub-layer and purging said chamber with hydrogen to dopant deplete said second sub-layer; c. growing a relatively lightly-doped epitaxial layer (N-) above said second sub-layer; and d. growing a relatively heavily-doped epitaxial layer (N+) of the opposite polarity type to said substrate (P+) above said relatively lightly-doped epitaxial layer (N-). The method of Claim 16 wherein the substrate has a resistivity of less than .0035 ohm-cm. The method of Claim 16 wherein the substrate has a resistivity in the range of .001 to .002 ohm-cm. The method of any one of Claims 16 to 18 wherein the growing of said cap sub-layers comprises the step of heating the substrate in an atmosphere containing a source of silicon obtained from a group of compounds consisting of trichlorosilane, chlorosilane and silane. the method of any one of Claims 16 to 19 wherein the growing of said lightly-doped layer is effected in a hydrogen ambient at a temperature between 1000°C and 1200°C. The method of any one of Claims 16 to 20 wherein the said lightly-doped layer has a resistivity of less than 200 ohm-cm. The method of Claim 21 wherein said lightly-doped layer has a resistivity of less than 50 ohm-cm. The method of any one of Claims 16 to 22, wherein said lightly-doped layer has a thickness of 5 to 100 microns. The method of any one of Claims 16 to 23, wherein said heavily-doped layer is grown on said lightly-doped layer in a gas environment which is the source of dopant selected from arsenic, phosphorus and antimony.

Inventors: CHAN JOSEPH, GARBIS DENNIS, HIRTZ REINHOLD, LATERZA LAWRENCE, SALIH ALI, ZAKALUK GREGORY, CHAN, JOSEPH, GARBIS, DENNIS, HIRTZ, REINHOLD, LATERZA, LAWRENCE, SALIH, ALI, ZAKALUK, GREGORY, SALIH, ALI, POWER PRODUCTS DIVISION
Applicants: GEN SEMICONDUCTOR INC, GENERAL SEMICONDUCTOR, INC.
Application year: 1994
Main classification: H01L29
IPC codes: H01L21