Method and apparatus for kelvin current sensing in a multi-phase driver for a polyphase dc motor

Abstract: A kelvin current sensing circuit in an integrated control circuit that controls the current flowing through the driving coils of a polyphase DC motor. The invention provides for adjusting the voltage to the lower driver transistors (23,24,25) of the control circuit by having the kelvin current sensing occur internally within the chip. A ground compatible differential amplifier circuit is used in one embodiment. Each of the lower transistors is connected to the base of respective PNP transistors, the emitters of which being connected together to control one side of the differential amplifier. A control voltage (VIN) is applied to the other side of the differential amplifier. The output of a comparator, that is connected to the differential amplifier, is used to control the operation of the lower driver transistors. Therefore all of the sensing is done internally in the semiconductor chip. The voltages are taken at the source of each of the lower transistors. This eliminates the parasitic resistances associated with the connection between the transistors and the sense resistor attached externally to the device. Since the kelvin current sensing is done internally, the pin which connected the inverting input of the comparator to the sensing resistor has been eliminated.

Description: This invention relates to improvements in circuitry for current sensing. More particularly, the invention is drawn to voltage sensing internally within the semiconductor device to reduce the effects of any parasitic resistances while sensing the voltages. Although the invention pertains to polyphase DC motors, in general, it finds particular application with three-phase DC motors. These motors can be of the brushless, sensorless type that are used for rotating data media, such as the motors in hard disk drives, CD ROM drives, floppy disks and other computer related applications. These motors are typically thought of as having a stator with three coils connected in a "Y" configuration, although in actual systems many stator coils may be used with multiple motor poles. In operation, the coils are selectively energized to set up a current path through two coils of the "Y" configuration and to leave a third coil floating. Another method is to energize sequentially one coil at a time by having a current path through a single coil to a center tap. In either case, a sequence of energized coils is arranged so as the current paths are changed, or commutated, at least one of the coils used to form the current path becomes a floating coil in the next sequence. For a three phase dc motor, there are typically six driver transistors that may be, for example, CMOS transistors, that control the current applied to three stator coils. Three upper driver transistors connect power to selected coils, and three lower driver transistors connect selected coils to ground. Typically, all six driver transistors are contained on a single semiconductor integrated circuit chip. Each of the lower driver transistors are connected to an output connection of the semiconductor device, with each of the output connections being connected to the upstream side of a sense resistor, R SENSE , the downstream side of which being attached to ground. To control the lower driver transistors, a comparator is provided as a part of the circuitry of the integrated circuit chip. The comparator has a noninverting input connected to a bonding pad on the semiconductor chip that is connected to an external connection pin. A reference voltage, V in , is supplied to the external connection pin by an outside source. Alternatively, the reference voltage may be developed internally to the device by other circuitry (not shown). The inverting input of the comparator is connected to a second bonding pad on the semiconductor chip that is connected to a second external connection pin. This second external connection pin is connected to the sense resistor, R SENSE , in the manner described above. A comparison is then made between the voltages appearing on these two external connection pins, this comparison being referred to herein as "kelvin current sensing." Thus, kelvin current sensing monitors the voltage changes across the sense resistor, R SENSE , and controls the transistors that drive the stator windings in response to that voltage change. If the voltage across R SENSE becomes too large, for instance, higher than V in , then the output of the comparator changes to cause all of the lower driver transistors to turn off. In a typical brushless, sensorless DC motor, a sequencer is used to create signals to control the current in the various stator coils. Each coil is connected to a pin of a semiconductor device that contains an integrated circuit chip that contains the driver and control circuitry, and, in some cases, the sequencer circuit. For example, in Figure 1, a schematic diagram of a portion of a prior art driver circuit, the stator coils 11, 12, and 13 of a three phase DC motor are shown, connected respectively to nodes A, B, and C. The sequencer circuit (not shown) supplies six sequencer signals, UA, UB, UC, LA, LB, and LC, each connected to control, directly or indirectly, one of the driver transistors. Thus, upper driver transistors 20, 21, and 22 are directly controlled by UA, UB, and UC, respectively. When any of these sequencing signals are high, the corresponding driver transistor turns on to connect the associated stator coil to V cc . The lower driver transistors 23, 24, and 25 are indirectly controlled by signals LA, LB, and LC. Each of the gates of the lower driver transistors 23, 24, and 25 is connected to a respective switch 26, 27, and 28. Each switch has two states. The first state is ground and the second state is the output of an operational amplifier 29. If desired, a PWM switch could be substituted for these three switches 26, 27, and 28 to control the lower driver transistors. The lower driver transistors 23, 24, and 25 have their sources connected to the pins 30, 31, and 32, respectively. (The various pins shown in Figure 1 represent the bonding pads, bonding wires, and external package pins, and are shown in abbreviated form for simplicity.) The pins 30, 31, and 32 are connected externally from the device, and to the upstream side of a resistor 16 (R SENSE ). The source terminals of the lower driver transistors 23, 24, and 25 are often not internally connected because a major metal interconnection would be necessary. The downstream side of the resistor 16 is connected to ground. At a point near the resistor 16, a connection 35 is made between the resistor 16 and a "sense" pin 33. The pin 33 has an internal connection to the inverting input of operational amplifier 29. The noninverting input of the operational amplifier 29 is connected to a pin 34, to which a voltage signal V in from an external voltage source may be connected. The output of the operational amplifier 29 is used to control the gates of the lower driver transistors 23, 24, and 25 in normal operation. Thus, when one of the lower sequencer signals LA, LB or LC is a logic high, the output of the operational amplifier 29 is connected by the respectively associated switch 26, 27, or 28 to the gate of the corresponding lower driver transistor to turn on that driver transistor. At the same time, the sequencer also sends a signal UA, UB or UC to turn on a corresponding one of the upper driver transistors. Therefore, current flows from V cc through the selected upper driver transistor, through two of the coils in the stator, through the selected lower driver transistor, and then through R SENSE to ground. As the current is flowing through R SENSE , the voltage may change due to fluctuations of current in the various circuit switches. If the voltage becomes larger than the voltage signal V in , then the comparator 29 will change state and reduce conduction or turn off all of the lower driver transistors. These structures and methods have a disadvantage in that an extra pin is needed to connect the R SENSE to the inverting input of the comparator. A prior art document US-A-4712050 discloses a control circuit for operating a brushless d.c. motor having a plurality of stator coils, the control circuit having a plurality of control transistors each having a first electrode coupled to a respective stator coil for sequentially energising the stator coils. A plurality of output nodes for connection to a sense resistor are connected to second electrodes of at least some of the control transistors so that a stator current flows through the sense resistor. A current sensing circuit comprises a differential amplifier connected to the sense resistor and coupled to a comparator. It is an object of the invention to provide an improved apparatus and method for adjusting the voltage to the lower driver transistor in a motor control circuit by providing a kelvin current sensing circuit completely internal to the motor driver integrated circuit chip. According to a first aspect of the present invention there is provided a control circuit for operating a polyphase DC motor having a rotor, and a plurality of stator coils, said control circuit having a plurality of control transistors each having a first electrode coupled to a respective stator coil for energizing sequentially the stator coils, a plurality of output nodes for connection to a sense resistor wherein said output nodes are connected to second electrodes of at least some of the control transistors whereby a current flowing in the stator coils flows through the sense resistor, and a current sensing circuit comprising: a differential amplifier responsive to a voltage across the sense resistor for producing a sense output; a comparator connected to produce an output change when the sense output exceeds a predetermined voltage, characterised in that the current sensing circuit has plural inputs, each of said inputs being connected to the second electrode of a respective control transistor whereby the differential amplifier responds to the lowest sensed voltage of the control transistors. According to a second aspect of the present invention there is provided a method of current sensing in a control circuit for operating a polyphase DC motor having a rotor a plurality of stator coils, said control circuit having a plurality of control transistors to sequentially energize the stator coils, and having a plurality of output nodes for connection to a sense resistor, said output nodes being connected to at least some of the control transistors wherein a current flowing in the stator coils flows through the sense resistor, said method comprising the steps of: sensing voltage at the output of each control transistor connected to said output nodes and determining a lowest said voltage; comparing the lowest said voltage to a reference voltage; applying a signal that is produced in response to the comparing step to the control transistors connected to said output nodes. In the disclosed embodiment, a ground compatibility differential amplifier circuit is used in a motor driver circuit. Each lower driver transistor is connected to the base of a voltage sensing transistor on the integrated circuit chip. One side of these voltage sensing transistors are interconnected to control one side of the differential amplifier. A control voltage is applied to the other side of the differential amplifier. A comparator compares the voltages on each side of the differential amplifier. The output of the comparator is connected to control the operation of the lower driver transistors, and to reduce conduction or turn off the lower driver transistors when the sensed voltage developed by the differential amplifier exceeds a predetermined threshold. Therefore, all the sensing is done internally within the semiconductor chip. Since the sensed voltages are taken at the source of each lower driver-transistor, the voltage drops generated by the parasitic resistance effects associated with the connection between the driver transistors and the sense resistor R SENSE , especially the bonding pad connections and the pin connections, are reduced. Since the kelvin current sensing is done internally in the semiconductor chip, the pin that was previously required to connect the inverting input of the comparator to the resistor R SENSE is not needed. Therefore, an elimination of one pin on the semiconductor is realized. The invention is illustrated in the accompanying drawings, like reference numerals are used to indicate like or similar parts, and wherein: Figure 1 is an electrical schematic diagram of a control circuit used to power a typical "Y" connected stator coil arrangement, according to the prior art. Figure 2 is an electrical schematic diagram of the lower transistor switches connected to the kelvin current sensing circuit of the invention. Figure 3 is another embodiment of an electrical schematic diagram of the kelvin current sensing circuit of the invention. Figure 4 is an electrical schematic diagram that represents a generic embodiment of a kelvin current sensing circuit as shown in Figures 2 and 3. Figure 2 is an electrical schematic diagram of a preferred embodiment of the invention. For simplicity the upper driver transistors 20, 21, and 22 and the stator windings of the DC motor above the nodes A, B, and C are not shown, as they may be similarly constructed to those shown in Figure 1, described above. In a complete system, those elements could be attached to nodes A, B, and C as shown in Figure 1. Kelvin sensing is accomplished in the circuit in Figure 2 by a differential amplifier 37 that has a reference voltage applied to one side, and a sensed voltage applied to the other side. The sensed voltage is developed by a sensing circuit 38 that includes a number of sensing transistors 43 - 45 individually connected to nodes 60 - 62 adjacent respective ones of the lower driver transistors 23 - 25. The differential amplifier 37, the sensing circuit 38 and its connecting leads to the driver transistors, and the comparator 58 are all formed on the integrated circuit chip 97. The differential amplifier includes two current paths in lines 55 and 56 in which differential currents are developed by bipolar transistors 41 and 42, which, in the embodiment shown are PNP transistors. Although bipolar PNP transistors are shown, it will be appreciated that transistors of different construction and conductivity type can be used in appropriate applications. The V in signal provided to pin 34 (although it needs not necessarily be external) is connected directly to the input transistor 40 on one side of the differential amplifier 37, and is referenced to ground. The emitter of the PNP transistor 40 is connected to a first current source 46 and to the base of a second PNP transistor 41. The emitter of the PNP transistor 41 is connected to a second current source 47 and also to the emitter of a PNP transistor 42 to form a differential amplifier. On the other hand, the sensed voltage from the respective lower driver transistors 23 - 25 is applied to the input transistor 42 on the other side of the differential amplifier 37. Thus, the base of the PNP transistor 42 is connected to the emitters of the three PNP sensing transistors 43, 44, and 45 as well as to a third current source 48. As mentioned, the base of the PNP transistor 43 is connected to the source of the lower driver transistor 23 at point 60. Likewise, the base of the PNP transistor 44 is connected to the source of the lower driver transistor 24 at point 61. Finally, the base of the PNP transistor 45 is connected to the source of the lower driver transistor 25 at point 62. The collector of PNP transistor 41 is connected to a first current sink 49 and the non-inverting input of operational amplifier 58. The collector of PNP transistor 42 is connected to a second current sink 50 and to the inverting input of operational amplifier 58. The output of the operational amplifier 58 is connected to the transistor switches 26, 27, and 28. With this configuration, one of the pins on the semiconductor chip has been eliminated. Also, the connection needed between that pin and the sensing resistor 16 has been eliminated. One advantage of this circuit is that each of the signal lines 52, 53, and 54, has its own sensing transistor. Although bipolar PNP sensing transistors are shown, it will be appreciated that transistors of different construction and conductivity type can be used in appropriate applications. Though these signal lines are connected outside the chip, each signal line may have a slightly different voltage on it when measured at the PNP transistor, due to parasitic resistances in the device. For example, the lower driver transistors 23, 24, and 25 are connected to bonding pads 90, 91, and 92, respectively, located at the edge of the integrated circuit chip 97. These bonding pads 90, 91, and 92 are connected by bonding wires 94, 95, and 96 across the cavity 98 to respective package pins 30, 31, and 32. The package pins, in turn, may be connected to external elements. Each of these connections creates parasitic resistances. Thus, since the emitters of the PNP sensing transistors 43, 44, and 45 are connected at the base of the PNP transistor 42, the lowest voltage appearing on the signal lines 52, 53, and 54 is transferred to signal line 51, with only the added voltage of the emitter-base intrinsic diode of transistor 43, 44, or 45. Signal lines 55 and 56 are compared in the comparator 58 and the output signal on signal line 57 is sent to each of the transistor switches 26, 27, and 28. Although sensing is not as precise as true kelvin sensing, the added benefit of eliminating one pin on the semiconductor chip is sometimes very useful. The embodiment shown in Figure 2 is designed to have a compatibility with a ground that acts like an analog ground or a floating reference ground. Accordingly, for ground compatibility, the collectors of transistors 40, 43, 44, and 45 are connected to ground. It should also be noted that the reference ground is the same for the voltage signal, V in , the ground to which R sense is connected, and the ground to which the collectors of the transistors 40, 43, 44, and 45 are connected. Another embodiment of the invention is shown in Figure 3. As in Figure 2, the upper driver transistors, the stator windings of the DC motor, and the bonding pads and their connections are not shown. The comparator 75 in this embodiment may or may not have ground compatibility incorporated into it. Otherwise, the circuit is the same as the circuit of Figure 2. A voltage signal, V in , is applied to the base of a PNP transistor 71, internally to the device, or externally, as shown. The emitter of the transistor 71 is connected to a second current source 76 and to the emitters of the PNP transistors 72, 73, and 74. The base of the PNP transistor 72 is connected to the source of the lower driver transistor 23 at point 60 by line 80. The base of the PNP transistor 73 is connected to the source of the lower driver transistor 24 at point 61 by line 81. The base of the PNP transistor 74 is connected to the source of the lower driver transistor 25 at point 62 by line 82. The collector of the PNP transistor 71 is connected to a first resistive element 78 first current sink, such as a resistor, a transistor, or the like, the downstream side of which being connected to ground. The collectors of the PNP transistors 72, 73, and 74 are connected and also connected to a second resistive element 77 second current sink, such as a resistor, a transistor, or the like, the downstream side of which also being connected to ground. The collector of the PNP transistor 71 is also connected to the non-inverting input of the operational amplifier 75 upstream of the first resistive element 78. Similarly, the collectors of he PNP transistors 72, 73, and 74 are connected to the inverting input of the operational amplifier 75 upstream of the second resistive element 77. The output of the comparator 75 is connected to the transistor switches 26, 27, and 28 line in the previous figures. This embodiment performs kelvin current sensing and eliminates the sensing of voltages across the parasitic resistances, like the previous embodiment, with all the sensing done internally within the semiconductor chip. In both implementations, there is the added benefit of eliminating one pin from the semiconductor chip. To balance the differential amplifier formed by transistors 71-74, the area of transistor 71 should be appropriately changed to be proportionally larger than the other transistors. For instance, in Figure 3, if parasitic voltage drops were significant (eg., greater than 100 mV) and only one control transistor conducts at any given time, then the emitter area of the transistor 71 should be twice that of the separate transistors 72-74 to optimize precision and in dependence of the voltage drops from parasitic resistors. In fact, when the circuit is operating in response to normal sequence signals, only one of the three lower drivers transistors is on. Therefore, two of the three transistors are at a lower potential than the third transistor, that is, the voltage at the output of the third transistor is higher because it is connected to the driver transistor that is on. The basic premise is to have the transistor emitter area equal to the sum of the emitter areas of the input of the floating transistors. Therefore, if there were five driver transistors with four of them off (floating) at a time, then the emitter area of the transistor connected to the reference voltage, V in , should have four times the emitter area of any of the transistors connected to the lower driver transistors that are floating. Though the optimum area will depend on the absolute value of parasitic voltage drops, such ratio would have to be increased if the parasitic drops are small. At the limit, if the parasitic voltage drop is equal to zero, then the transistor connected to the reference voltage should have an emitter area equal to the sum of the emitter areas of all transistors connected to the sense resistor. This change in transistor size applies to all of the embodiments. Figure 4 shows another preferred embodiment of the invention that is analytically similar to the embodiments shown in Figures 2 and 3. Again, for simplicity the upper driver transistors, the stator windings of the DC motor above the nodes A, B, and C, and the bonding pads and their connections are not shown. In the circuit embodiment shown in Figure 4, the transistors 40 - 45 and the operational amplifier 58 have been replaced with a multiple input operational amplifier 59. The inverting inputs of the operational amplifier 59 are connected to line 52, 53, and 54 from the source of the respective lower driver transistors 23, 24, and 25. Again, the output from multiple input operational amplifier 59 on signal line 57 is connected to transistor switches 26, 27, and 28.

Claims: A control circuit for operating a polyphase DC motor having a rotor, and a plurality of stator coils (11,12,13), said control circuit having a plurality of control transistors (23,24,25) each having a first electrode coupled to a respective stator coil for energizing sequentially the stator coils, a plurality of output nodes (90,91,92) for connection to a sense resistor (16) wherein said output nodes (90,91,92) are connected to second electrodes of at least some of the control transistors (23,24,25) whereby a current flowing in the stator coils flows through the sense resistor (16), and a current sensing circuit (38) comprising: a differential amplifier (37) responsive to a voltage across the sense resistor for producing a sense output; a comparator (58;75) connected to produce an output change when the sense output exceeds a predetermined voltage, characterised in that:- the current sensing circuit (38) has plural inputs, each of said inputs being connected to the second electrode of a respective control transistor (23,24,25) whereby the differential amplifier (37) responds to the lowest sensed voltage of the control transistors. A circuit as claimed in claim 1, wherein the control circuit further comprises circuitry (26,27,28) for applying the output of the comparator to control the control transistors connected to said output nodes. A circuit as claimed in claim 1 further comprising a plurality of switches (26,27,28) each connected to one of the control transistors connected to said output nodes, said switches are operated in response to sequence signals (LA,LB,LC) to connect a control element of the respective control transistor to an output of the comparator when the respective control transistor is selected and to connect the control element to a voltage potential to turn off the control transistor when the control transistor is not selected. A circuit as claimed in any preceding claim, wherein the current sensing circuit further comprises a plurality of voltage sensing transistors (43,44,45) connected in parallel, with each voltage sensing transistor having a current path between a third current source (48) and ground, and having a current control element connected to one of said inputs to said current sensing circuit (38). A circuit as claimed in any one of claims 1-3, wherein one side of the differential amplifier (37) comprises a plurality of transistors (72-74) connected in parallel, with each transistor having a current path and a current control element connected to one of said inputs to said current sensing circuit (38). A circuit as claimed in any preceding claim, wherein the differential amplifier (37) has current paths between a current source (47,76) and current sinks (49,50,77,78), and the comparator (58,75) is connected to the differential amplifier on the side of the current sinks. A circuit as claimed in any preceding claim, wherein the differential amplifier (37) comprise at least one of bipolar transistors, MOS transistors, and FET transistors. A circuit as claimed in claim 6, wherein the current sinks (49,50) are resistors. A circuit as claimed in claim 4 wherein the differential amplifier comprises a first transistor (40) having a current path between a first current source (46) and ground, and having a control element connected to a reference voltage; a second transistor (42) having a current path between a second current source (47) and a second current sink (50), and having a current control element receiving currents flowing through the plurality of voltage sensing transistors (43-45), a voltage produced across the second current sink (50) being connected to the inverting input of the comparator; and a third transistor (41) having a current path between the second current source (47) and a first current sink (49), and having a current control element receiving the current flowing through the first transistor (40), a voltage produced across the first current sink (49) being connected to the noninverting input of the comparator (58). A circuit as claimed in claim 9, wherein the plurality of voltage sensing transistors and the first transistor through third transistor are at least one of bipolar transistors, MOS transistors, and FET transistors. A circuit as claimed in claim 9, wherein the first second and third current sources are saturated transistors. A circuit as claimed in claim 5 wherein the differential amplifier comprises a first transistor (71) having a current path between a second current source (76) and a first current sink (78), and having a current control element controlled by a reference voltage, a voltage produced across the first current sink (78) being connected to the noninverting input of the comparator (75); and said plurality of transistors comprises a plurality of voltage sensing transistors (72-74), with each voltage sensing transistor having a current path between the second current source (76) and a second current sink (77), the voltage produced across the second current sink being connected to the inverting input of the comparator (75). A circuit as claimed in claim 12, wherein the first transistor and the plurality of voltage sensing transistors are at least one of bipolar transistors, mos transistors, and FET transistors. A circuit as claimed in claim 7, 10 or 13, wherein the bipolar transistors are PNP transistors. A circuit as claimed in claim 9 or claim 12, wherein the plurality of voltage sensing transistors for a three-phase DC motor comprises three transistors. A circuit as claimed in claim 6 or claim 12, wherein the current source is a saturated transistor. A circuit as claimed in claim 9 or claim 12, wherein the first current sink (78) and the second current sink (77) are resistors. A circuit as claimd in any one of claims 1, 9 and 12, wherein the comparator is an operational amplifier (58,75). A circuit as claimed in any one of claims 1, 9 and 12, wherein the current sensing circuit and the control circuit are contained on a single semiconductor chip, and wherein a sensing of the voltage of the control transistors connected to said output nodes is derived immediately adjacent to the respective control transistors. A method of current sensing in a control circuit for operating a polyphase DC motor having a rotor and a plurality of stator coils, said control circuit having a plurality of control transistors (23,24,25) to sequentially energize the stator coils (11,12,13), and having a plurality of output nodes (90,91,92) for connection to a sense resistor (16), said output nodes being connected to at least some of the control transistors wherein a current flowing in the stator coils flows through the sense resistor, said method comprising the steps of: sensing voltage at the output of each control transistor connected to said output nodes and determining a lowest said voltage; comparing the lowest said voltage to a reference voltage; applying a signal that is produced in response to the comparing step to the control transistors connected to said output nodes.

Inventors: CAROBOLANTE FRANCESCO, CAROBOLANTE, FRANCESCO
Applicants: SGS THOMSON MICROELECTRONICS, SGS-THOMSON MICROELECTRONICS, INC.
Application year: 1994
Main classification: H02P6
IPC codes: G01R31, H02P6, G01R19