A FAULT TOLERANT QUEUE SYSTEM

Abstract: The invention relates to a fault tolerant queue system for buffering data in a packet switch with a common buffer memory (32) for one or more output ports from the switch, said system using a number of pointers identifying storing positions in the buffer memory. Multiple copies of the same pointer are handled in a controlled way by using a multiple pointer list (56) where the number of copies included in the system of respective pointers are recorded. A maintenance function (52) checks that the number of copies of a pointer agrees with the value recorded in the multiple pointer list (56) for the respective pointer. The maintenance function (52) cyclically checks all pointers and appurtenant buffer positions, one at the time. This is preceded by an initiation procedure during which the pointer is taken out of operation by filtering out the pointer from the flow of pointers which from output queue lists (44) for queueing pointers in queue to the output ports of the memory are returned to the idle list (38), until the queue system has been emptied of each copy of the pointer in question. Thereupon the number of returned copies of the pointer is question is compared with the value in the multiple pointer list (56). The maintenance function can thereafter work in accordance with one or more operating modes for performing the cyclical control.

Description: A fault tolerant queue system. Technical Field of the Invention. The present invention according to a first aspect relates to a queue system for selection of storing positions in a memory for performing write operations on these from an on¬ line maintained idle list of addresses to free storing positions in the memory. The queue system also calculates addresses for collecting data earlier stored in the memory. In accordance with second and third aspects the invention relates to a queue system for buffering data in a packet switch with a common buffer memory for one or more ports of the switch. The system uses a number of pointers identifying storing positions in the buffer memory. The pointers are moved between different logical lists for indicating the operation to be performed on the data in the buffer position pointed to. The invention furthermore relates to methods for testing storing positions and pointers, respectively, in connection with queue systems of the kind indicated above. Description of Related Art. When memories are used in computers and other equipment, address calculation decides the physical positions to be used for storing of a certain data. Most simply direct addressing, decision or calculations of which address to be used is performed at compiling of a program, or in connection with hardware design for devices having fixed programs. Indirect addressing and linked lists are examples of more flexible addressing methods. Here the address information is stored in other address positions or in counters, etc. The address calculation is thus not fixed but varies during execution for adaption to amount and format of the stored data. Simple FIFO memories with direct addressing most often are realized with counters for incrementing write and read addresses, or in their most simple form are realized with fixed addresses in shift registers. In connection with dynamic indirect addressing address pointers are used, which are also stored in memories. At system start these pointers are initialized so as to obtain a valid set of pointers for the system to work with. The function of the system is then dependent on this pointer initialization being not corrupted during operation. Bit errors in a pointer value results in a lasting malfunction in the system. For systems being in continous operation with high demands on reliability this is a problem. Great semiconductor memories are traditionally equipped with redundance for improving the yield of the manufacture. By redundancy is here meant rows and columns of spare cir¬ cuits, which may be connected into circuit to replace ordinary circuits. This is obtained by fusing fuses or by other means for permanently reconfiguring the circuit in the factory. Testing is performed for determining circuits requiring reparation. If manufacturing errors occur and are such that they can be repaired by connection into circuit of spare circuits, the type of manufacturing error is determined and the repair is performed. For semiconductor memories without redundancy, mapping between address and physical position in the memory is determined while designing the memory. For semiconductor memories with redundancy this mapping is partly set during the design and is completed during manufacture when erronous memory positions shall be repaired. In the case of disc memories a testing procedure is used before taking the disc into operation, during a formatting operation for determining the sections on the disc which may be used. The aim is to be able to use a disc with bad sections. The error hypothesis used is that certain positions on the disc may be bad due to the manufacture being not perfect. The dividing in good and bad sectors may be performed during the formatting process and is assumed not to need to be changed. The risk for disc addressing errors need not be taken into consideration during the formatting procedure. In certain systems error correcting codes (ECC = Error Correcting Codes) are used for obtaining error tolerance against bit errors during operation. These errors occurring during operation may be soft or hard, i.e. temporary disturbances or fixed errors. The number of bits able to be corrected in each word is delimited. The code most often used may correct single bit errors and detect double bit errors. Quite recently it has been shown that a combination of error correcting codes and spare rows provides an error tolerance system which has a very high degree repairability of manufacturing errors in semiconductor memories, cf. IEEE transactions on computers, vol. 41 #9 Sept. 1992, pp 1078- 1087. Repair of devices before they leave manufacture requires testing apparatus and equipment for fuse programming (a lasting change of connections in an electric circuit for influencing its function - also called fuse or antifuse) , on the manufacturing line in the factory, and a manufacturing process including fuse components. This implies increased costs due to a prolongation of the manufacturing cycle. The degree of success with respect to the repair operations is limited by the fact that they are based on the use of spare rows and columns, and by the inflexibility with respect to the handling of sporadic single errors. Use of error correcting codes takes care of isolated single errors. For full efficiency there is, however, required a combination with some sort of system with redundant rows. According to the state of the art this implies fuse programming and testing before the circuits leave the manufactory. US 4,049,956 provides an example of the state of the art as regards error detection during operation and describes supervision of a memory working in a time multiplexing mode. Incoming data words are stored temporarily in the respective steps of a multiple step memory and are read out for further revision. The testing is performed without taking the memory out of normal operation. The memory consists of a number of n steps which are periodically addressed in a repeated scanning cycle of n time slots in which binary words are written into and read out from the respective steps. Words written into a memory step are read out in the immediately following cycle. Malfunctions are detected by means of parity checks. lists for queued pointers in a queue to output ports, and a blocking list for blocked pointers. The maintenance function cyclically checks all pointers and appurtenant buffer positions, one at the time, preceded by an initiation procedure. During this procedure the pointer is taken out of operation by filtering out the pointer from the flow of pointers, which from the output queue lists are returned to the idle list until the queue system has been emptied of each copy of the pointer in question, whereupon the number of returned copies of the pointer in question is compared with the value in the multiple pointer list. In a first further development of this embodiment the maintenance function has a first operational mode which, after the initiation procedure, and activated by either the fact that more than a determined limit number of pointers have been found as a result of said initiation procedure, the respective number of copies of which does not agree with the value in the multiple pointer list for the pointer in question, or by an external signal, returns the pointers to the idle list, resets the value in the multiple pointer list to no multiple copies, and in the blocking list indicates no blocking of pointers . In a second further development the maintenance function has a first operational mode which, after the initiation procedure, and activated by the fact that either more than a determined limit number of lost or multiple pointers have been found as a result of said initiation procedure, or by an external signal, returns a copy of each pointer to the idle list, and in the blocking list indicates no blocking of poin- ters. The maintenance function may have only one further operational mode, i.e. a second mode, ϊn that case this second operational mode is activated by the first maintenance mode having been run through for all pointers. Thereupon the initiation procedure is again performed on each pointer, one at a time, and a buffer memory test is queued with low priority on non-blocked memory positions identified by the pointer in question. All other non-blocked memory positions are exercised with system data during the test. The result of the memory test is used for returning the pointer to the idle list if the buffer memory test has given a correct result, but it is blocked from use in the system if the buffer memory test indicates malfunction of the area defined by the pointer. The blocked pointers are exposed to a second buffer memory testing of the same type as the first one conditioned by each testing data operation is maintained in the queue as long as system data is stored anywhere in the buffer memory segment including the positions which have been identified by blocked pointers. The result of the second test is used for returning the pointer to the idle list if the test has given a correct result, whereas blocked pointers are returned to the idle list first after having been accepted in a number of consecutive tests exceeding a second limit number. In case the maintenance function has a number of different operational modes, it may have a second operational mode activated by the first mode having been run through for all pointers, whereupon the initiation procedure is again performed on the pointers. A simple write and read test is queued for execution on buffer memory positions identified by pointers the number of copies of which does not agree with the value in the multiple pointer list. The result of the write and read test is used for returning the pointer in question to the idle list if the test has given a correct result, but blocking it out from use in the system if the test indicates malfunction within the area identified by the pointer in question. A third operational mode is activated by the second mode having been run through for all pointers, whereupon the initiation procedure is once again executed on the non- blocked pointers. A buffer memory test for detecting types of malfunctions having not been detected by the simple write and read test in the second operational mode is queued for execution on the buffer memory positions which have been identified by the initiated pointer, said memory positions being exercised with testing data, whereas all other, non- blocked buffer memory positions are exercised with system data during the test for each blocked pointer. The result of the test is used for returning the pointer to the idle list if the buffer memory test has given a correct result, but blocking it out from use in the system if the buffer memory test indicates malfunction in the area identified by the pointer. A fourth operational mode is activated by the third mode having been run through for all pointers, whereupon also the earlier blocked pointers are accepted for testing by performing said initiation procedure cyclically for all pointers, one at a time. A buffer memory test of the same kind as in the third mode is applied on non-blocked pointers whereas earlier blocked pointers are exposed to the same type of buffer memory testing conditioned by each testing data operation being maintained in queue as long as system data is stored anywhere in the buffer memory segment containing the positions having been identified by the earlier blocked pointer in question. The result of the testing is used in the same way as in the third mode for non-blocked pointers and non accepted tests of earlier blocked pointers, whereas earlier blocked pointers are returned to the idle list first after having been accepted in a number of consecutive tests defined by a limit number. The memory handling system according to the invention provides a dynamic tolerance against manufacturing errors when the system is in operation. Testing and repair by reconfiguration in the factory is not required. Testing is performed after completed manufacture for determining whether the memory has storing capacity enough or not for the intended application. Brief Description of the Drawings. The invention will now be described more closely below with reference to an embodiment shown on the attached drawing, in which Fig. 1 very schematically illustrates a queue system according to one of the aspects of the invention, Fig. 2 partly in block form illustrates an embodiment of a packet switch, in which the different aspects of the invention are used, Fig. 3 shows a flow diagram of main operation modes pointer for the packet in question and, on the other hand, after writing, signalled according to arrow 40 from the idle list 38 to the buffer memory 32, of the packet into the buffer memory guided by the pointer, to transfer the pointer to a pointer queue system containing a number of FIFO pointer queues 44, one for each output 36. More particularly, the pointer is thus moved according to arrow 42 from the idle list 38 to a FIFO pointer queue 44.n for a switch output 36.n which has been selected for the packet guided by the analysis of the contents of its head. The selection of pointer queue is performed by a control signal 45 from the analysis function 30 to the pointer queue in question. The head of an arriving packet may contain several destination addresses, i.e. the contents of the packet may be sent to several switch outputs. In this case the pointer is copied to the selected storing position in the buffer memory 32 so as to obtain as many pointers as the number of switch outputs in question. Below also the denomination "multiple pointer" is used for a pointer in such a set of pointers which points to the same storing position in the buffer memory 32. These multiple pointers are guided to each one of the pointer queues for the outputs in question. When a pointer, i.e. a single pointer or a multiple pointer, has appeared as the first one in its FIFO queue 44.n, the data packet pointed to by the pointer is read, according to arrow 46.n and guided by the pointer, from its storing position in the buffer memory 32 to the output 36.n in question. Thereafter the pointer is redirected according to arrows 48 and 50 to the idle list 38 via a maintenance function 52, to be described more closely below, which supervises pointers to be returned to the idle list 38. More particularly, the pointer is moved to the idle list if it is not selected for testing by the maintenance function 52. In the maintenance function 52 copies of the same pointer are handled in a controlled way. More particularly, this is performed by using a multiple pointer list 56 included in the maintenance function 52 in which the number of copies of the respective output queue for the time being. With a signal according to the arrow 79" the maintenance funtion 52 thereafter obtains information from the output queues that the pointers thus indicated have ended first in the respective queue. The maintenance function 52 thus awaits, while continously filtering out pointers x from the flow 48 of returned pointers, that the pointers which were located last in the output queues 44 at the time when the emptying of the idle list 38 had ended, shall end first in the queue. When the slowest queue has fulfilled this criterion, the system is emptied of the pointer x. Thereafter, in step 80 in Figs. 5-7, a check is made with respect to whether the number of returned pointers agrees with the value for the pointer x in the multiple pointer list 56. If this is not the case a pointer error signal is generated. This error signal ends in somewhat different measures dependending on the maintenance mode being executed. In all modes except the mode "Pointer conditioning" the pointer value is blocked and an error counter, not shown, is incremented, step 82 in Figs. 5-7. If more than a number of c. errors are found, step 84 in Figs. 5-7, the current maintenance mode is stopped, the error counter is set to zero and a jump is performed to the mode "Pointer conditioning", arrow 86 in Figs. 5-7. α. is the desired degree of tolerance to the error in the multiple pointer list 56. In the mode "Pointer conditioning" the pointer error signal does not end in any measure, cf . Fig. 4. At start of the system a correct pointer set must be made available to the queue system as soon as possible. Therefore the procedure "Pointer conditioning" is initiated. This can be performed either as a result of a pointer error appearing in accordance with the above, or by activation by means of an external signal. By pointer error is here and further on in¬ tended, as has been described above, that the number of copies of a pointer returned during the initiation procedure does not agree with the number stated in the multiple pointer list for the pointer in question. As soon as a pointer has been checked it is introduced into the idle list 38 and can be used for queueing packets . When all pointers have been conditioned the next maintenance level 72 is executed for all pointers, below also denominated "Quick test". Thereafter the maintenance function 52 passes into the maintenance level 74, below also denominated "Fulltest", whereupon execution is started of the maintenance level 76 "Fulltest with retest" which is the current operational state, which however can be interrupted if a pointer error occurs . If several erroneous pointers (multiple or lost pointers) than o. are detected, the maintenance funtion 52 will always, as has likewise been described above, restart with "Pointer conditioning" , independent of the one of the other maintenance functions that is executed. This is indicated in Fig. 3, as well as in Figs. 5-7, by arrows 86. With refereence to Fig. 4, the mode 70 "Pointer conditioning" returns in step 88 each pointer x to the idle list 38, resets the value in the multiple pointer list 56 to "no multiple copies", and in the blocking list 62 to "no blocking". When the last pointer has been treated, cf. step 90, the pointer error counter is set to zero, step 92. The mode 70 thereupon ends in the mode 72, arrow 94. The mode 72 "Quick test" is thus activated, with reference to Fig. 5, by the first mode 70 having been run through for all pointers. The initiation procedure is thereupon performed for all pointers and a simple write and read test on-line, step 96, is performed for buffer memory positions B(x) which have been identified by the pointer x. If found necessary, this test can be performed after queueing with low or lowest priority amongst the operations which can be performed on the buffer memory. The result of the write and read test is used so as to return the current pointer to the idle list 38 if the test has given a correct result, but to block it from use in the system and introduce it into the blocking list 62 if the test indicates malfunction within the area identified by the pointer in question. After the last pointer the test passes into the mode 74, cf. step 98 and arrow 100. In contrast to the off-line test described earlier above, wherein the test logic 14 in Fig. 1 controls and checks all data and all addresses to the memory, the test logic 58 in Fig. 2 at the on-line test has only write and read rights to the address positions which have been released from system use by the initiation procedure, wherein the system is emptied of a pointer value. With respect to everything described henceforth, the test logic is forced to operate only when no higher priority system operations towards the memory come into question. In the simple write and read test in the mode 72 according to Fig. 5 a first bit pattern is written into the address positions identified by the released pointer. As soon as this has been carried through these positions are read for testing that the memory cells are able to store this first bit pattern. Thereupon the course is repeated a second time, this time with a second bit pattern being the inverse of the first pattern. If read data do not correspond to the write data the signal 60" in Fig. 2 is generated in the form of an error signal . The third operational mode 74 "Full test" is activated, referring to Fig. 6, by the second mode 72 having been gone through for all pointers and starts by performing the initiation procedure anew on the pointers not blocked by the mode 72. Thereupon a buffer memory test is queued for detecting types of malfunctions, which have not been detected by the simple write and read test in the second operational mode, with lowest priority to be performed on the buffer memory positions B(x) . being non-blocked, cf . steps 102 and 104. These memory positions are exercised, i.e. written and read, with test data, whereas all other buffer memory positions being non-blocked are exercised, i.e. written and read, with system data during the test for each blocked pointer. The result of the test is used so as to return the pointer to the idle list 38 if the buffer memory test has given a correct result, but to block it from being used in the system, and introduce it into the blocking list 62 if the buffer memory test indicates malfunction of the area identified by the pointer. After the last pointer the test proceeds to the mode 76, cf . step 106 and arrow 108.

Claims: © T *\ W _5 P υ. en H © in O the pointer is taken out of operation by filtering out the pointer from the flow of pointers, which from the output queue lists (44) are returned to the idle list (38) , until the queue system has been emptied of each copy of the pointer in question, whereupon the number of returned copies of the pointer in question is compared with the value in the multiple pointer list (56) . 10. A queue system according to claim 9, characterized in that the maintenance function has a first operational mode which, after the initiation procedure, and activated by more than a determined limit number of pointers having been found as a result of said initiation procedure, the respective number of copies of which does not agree with the value in the multiple pointer list for the pointer in question, or an external signal, _ __ returns the pointers to the idle list (38) , resets the value in the multiple pointer list (56) to no multiple copies, and in the blocking list (62) indicates no blocking of pointers. 11. A queue system according to claims 6 and 9, characterized in that the maintenance function has a first operational mode which, after the initiation procedure, and activated by the fact that more than a determined limit number of lost or multiple pointers have been found as a result of said initiation procedure, or an outer signal, returns a copy of each pointer to the idle list (38) , and in the blocking list (62) indicates no blocking of pointers. 12. A queue system according to claim 10 or 11, characterized in that, the maintenance function (52) has only one further operational mode. 13. A queue system according to claim 12, characterized in that the maintenance function has a second operational mode activated by the first maintenance mode having been run through for all pointers, whereupon the initiation procedure is again performed on each pointer, one at a time, and a buffer memory test is queued with low priority on non-blocked memory positions identified by the pointer in question, whereas all other non-blocked memory positions are exercised σ. W </_ υ CN CN T O the initiation procedure is once again executed on the non-blocked pointers, a buffer memory test for detecting types of malfunctions having not been detected by the simple write and read test in the second operational mode is queued for execution on the buffer memory positions which have been identified by the initiated pointer, said memory positions being exercised with testing data, whereas all other, non-blocked buffer memory positions are exercised with system data during the test for each blocked pointer, the result of the test is used for returning the pointer to the idle list if the buffer memory test has given a correct result, but blocking it out from use in the system if the buffer memory test indicates malfunction in the area identified by the pointer. 17. A queue system according to claim 16, characterized in that the maintenance function has a fourth operational mode activated by the third mode having been run through for all pointers, whereupon also the earlier blocked pointers are accepted for testing by performing said initiation procedure cyclically for all pointers, one at a time, a buffer memory test of the same kind as in the third mode is applied on non-blocked pointers whereas earlier blocked pointers are exposed to the same type of buffer memory testing conditioned by each testing data operation being maintained in queue as long as system data is stored anywhere in the buffer memory segment containing the positions having been identified by the earlier blocked pointer in question, the result of the testing is used in the same way as in the third mode for non-blocked pointers and non accepted tests of earlier blocked pointers, whereas earlier blocked pointers are returned to the idle list first after having been accepted in a number of consecutive tests defined by a limit number. 18. A queue system according to any of claims 8-9 or 11- 17, characterized in that the lists for multiple used and blocked pointers is combined into one lis . 19. In a queue system for selection of storing positions in a memory for performing write operations on these from an on-line maintained idle list of addresses to free storing positions in the memory, and calculation of addresses for collecting data earlier stored in the memory, a method for testing said storing positions, comprising releasing addresses selected for test from system use as controlled by the system, exposing selected storing positions to a testing procedure periodically on each storing position in idle cycles during operation of the system, and using the result of said testing procedure for maintenance of said idle list. 20. A method according to claim 19, comprising performing the test of a storing position after awaitance of it having been released from use by the system, and returning the storing position to system use only if the storing position stands the test. 21. A method according to claim 19, comprising releasing addresses to storing positions by copying the contents of a storing position to be tested to a free and error free storing position, redirecting the address calculation for use by the new storing position, and returning the tested storing position to system use only if it stands the test. 22. A method according to claim 19, comprising retesting storing positions having not standed a test at occasions when the whole memory block containing the storing position in question is released from use in the system. 23. A method according to claim 19, comprising a) performing testing of a determined storing position by testing in a first operational mode all addresses in an off-line test controlled by the testing logic, counting during said testing the number of storing positions having correctable errors, and indicating not correctable errors, are returned to the idle list, until the queue system has been emptied of every copy of the pointer in question, and comparing the number of returned copies of the pointer in question with the value in the multiple pointer list, and, after said initiation procedure, b) cyclically checking all pointers and appurtenant buffer positions, one at the time. 28. A method according to claim 27, comprising performing after said initiation procedure a first operational mode which activated by either the fact that more than a determined limit number of pointers have been found as a result of said initiation procedure, the respective number of copies of which does not agree with the value in the multiple pointer list for the pointer in question, or an external signal, comprises the steps of returning the pointers to the idle list, resetting the value in the multiple pointer list to no multiple copies, and in the blocking list indicating no blocking of pointers . 29. A method according to claim 24 or 27, comprising performing after said initiation procedure a first operational mode which activated by either the fact that more than a determined limit number of lost or multiple pointers have been found as a result of said initiation procedure, or an external signal, comprises the steps of returning a copy of each pointer to the idle list, and in the blocking list indicating no blocking of pointers . 30. A method according to claim 28 or 29, comprising performing a second operational mode activated by the first maintenance mode having been run through for all pointers, and including the steps of performing the initiation procedure again on each pointer, one at a time, queueing a buffer memory test with low priority on non- non-blocked pointers, queueing a buffer memory test for detecting types of malfunctions having not been detected by the simple write and read test in the second operational mode for execution on the buffer memory positions which have been identified by the initiated pointer, said buffer memory test including the steps of exercising these memory positions with testing data, and exercising all other non-blocked buffer memory positions with system data during the test for each blocked pointer, using the result of the test for returning the pointer to the idle list if the buffer memory test has given a correct result, but blocking it out from use in the system if the buffer memory test indicates malfunction in the area identified by the pointer. 33. A method according to claim 32, comprising performing a fourth operational mode activated by the third mode having been run through for all pointers, and including the steps of accepting also the earlier blocked pointers for testing by performing said initiation procedure cyclically for all pointers, one at a time, applying a buffer memory test of the same kind as in the third mode on non-blocked pointers, and exposing earlier blocked pointers to the same type of buffer memory testing conditioned by each testing data operation being maintained in queue as long as system data is stored anywhere in the buffer memory segment containing the positions having been identified by the earlier blocked pointer in question, using the result of the test in the same way ss in the third mode for non-blocked pointers and non-accepted tests of earlier blocked pointers, and returning earlier blocked pointers to the idle list first after having been accepted in a number of consecutive tests defined by a limit number.

Inventors: HAULIN TORD LENNART, HAULIN, TORD, LENNART
Applicants: ERICSSON TELEFON AB L M, TELEFONAKTIEBOLAGET LM ERICSSON
Application year: 1994
Main classification: G06F11
IPC codes: G06F11, G06F12, G11C29