Pedometer

Abstract: A pace generating device which outputs a desirable pace signal automatically without stopping an exerciser from exercising and which can save consumption power. Walking detect means 103 detects walking and outputs a detected walking signal. The walking pace calculating means 104 calculates a pace from the period of the detect walking signal and stores it in the walking pace storing means 105. A pace comparing means 106 compares a predetermined pace with the detect walking pace, and outputs a pace generating indicate signal when the result of the above comparison between the detect walking pace and the predetermined pace is out of a predetermined range. The pace signal generating means 109 receives the pace generating indicate signal, makes a pace signal corresponding to the predetermined pace, and outputs the pace signal to a pace outputting means 110 so as to output a pace.

Description: The present invention relates to a pace generating device for generating pace signals with predetermined periodicity. Exercise walking, such as jogging, has been popular recently with the public for the purpose of improving their health. A pace generating device which has been put to practical use in order to assist exercise is shown in Fig. 12. The device generates pace sounds with predetermined periodicity. In a conventional pace generating device shown in Fig. 12, a user inputs a desirable pace thereto by pace data inputting means 108 whilst looking at display means 102. This inputted pace data is transformed into a pace signal by a standard clock signal of timing signal generating means 101. Next, an inputting means 100 starts the pace outputting, and a pace is outputted by pace outputting means 103 using electronic sounds in accordance with which a user takes exercise. However, such a conventional pace generating device has a problem in that a user must stop exercising and then operate the inputting means in order to hear the pace sounds to change or check the required pace. When the pace sounds are outputted, the pace sounds keeps on being outputted until a user stops exercise and again operates the inputting means. This increases consumption power and makes it difficult to drive the device by an electric battery, which is another problem of a conventional pace generating device. A known pace generating device is disclosed in British Patent Publication No. 2121219 in which a shoe is described which measures the user's pace and compares this with a preset pace value. If the measured pace is equal to or greater than the preset pace, a first sound sequence is emitted, while if the measured pace is less than the preset pace, a second sound sequence is emitted. The beat frequency at which the sound sequences are emitted is adjusted based on the measured pace value. A further known pace generating device is described in US Patent No. 5164967 which compares the frequency of steps with a preset frequency and emits a sound signal at the preset frequency to guide the user. The device counts a preset number of paces and then visually displays to the user the number of these paces which were made within the predetermined frequency. Another known pace generating device is described in Japanese Patent Publication No. JP 55-134387 which describes a watch which counts the number of steps over a preset time and compares this to a preset number. A sound is then generated indicating to the user whether the number of paces made in the preset time was equal to or higher or lower than the set number. An object of the present invention is to provide a pace generating device which can output a desired pace signal automatically without stopping a user from exercising. Also a pace generating device of which the consumption power is so small as to be installed in a miniature electronic apparatus employing an electrical battery as a driving source. In order to solve the problems described hereinbefore, firstly the present invention is constituted of a pace generating device comprising: means for storing a predetermined pace; detect means for detecting a pace of a mammal; display means for displaying said predetermined pace and/or a detected pace; pace comparing means coupled to said detect means and said store for comparing said predetermined pace with said detected pace, and characterised by; said pace comparing means being adapted for generating an output indicative of said predetermined pace when the difference between the predetermined pace and the detected pace is outside a predetermined range. Secondly, in addition to the first constitution stated above, timer means for conducting timer operation by output from the pace comparing means and pace outputting prohibition means for prohibiting outputting a pace signal to a pace outputting means by time-up output of the timer means, are provided to the present invention. Embodiments of the present invention- will now be described with reference to the accompanying drawings, of which: Fig. 1 is a function block diagram showing a typical constitution of the inventive pace generating device; Fig. 2 is another function block diagram showing a typical constitution of the inventive pace generating device; Fig. 3 is a function block diagram showing a first embodiment of the inventive pace generating device; Fig. 4 is a circuit diagram showing a first embodiment of the inventive pace generating device; Fig. 5 is a function block diagram showing a third embodiment of the inventive pace generating device; Fig. 6 is a circuit diagram showing a third embodiment of the inventive pace generating device; Fig. 7 is a chart showing a signal-waveform of the a third embodiment of the inventive pace generating device; Fig. 8 is another chart showing a signal-waveform of a third embodiment of the inventive pace generating device; Fig. 9 is a flow chart showing an operating procedure of a CPU in a first embodiment of the inventive pace generating device; Fig. 10 is another flow chart showing an operating procedure of a CPU in a first embodiment of the inventive pace generating device; Fig. 11 is a flow chart showing an operating procedure of a CPU in a second embodiment of the inventive pace generating device; and Fig. 12 is a function block diagram showing a conventional pace generating device. Fig. 1 is a function block diagram showing one example of a typical constitution of the present invention. A walking detect means 103 detects walking and then outputs a detected walking signal to a walking pace calculating means 104. A standard clock signal outputted by timing signal generating means 101 is inputted to the walking pace calculating means 104. Then the walking pace calculating means 104 measures the period of the detected walking signal and calculates the pace. A walking pace storing means 105 stores the walking pace calculated by the walking pace calculating means 104. A pace comparing means 106 compares a predetermined pace stored in a pace data storing means 107 with the detected walking pace stored in the walking pace storing means 105. The pace comparing means then outputs a pace making instruction signal to a pace signal generating means 109 if the result of the above comparison is out of the predetermined range. Then the pace signal generating means 109 makes a pace signal from a standard clock signal of the timing signal generating means 101 according to a predetermined pace stored in the pace data storing means 107. The pace signal generating means 109 then outputs a pace signal to a pace outputting means 110. Fig. 2 is another function block diagram showing one example of a typical constitution of the present invention. The pace comparing means 106 compares a predetermined pace stored in the pace data storing means 107 with a detected walking pace stored in the walking pace storing means 105 and outputs a pace making instruction signal to the pace signal generating means 109 if the result of the above comparison is out of the predetermined range. At the same time the pace comparing means 106 outputs a timer start signal to a timer means 209. The timer means 209 receives a timer start signal, then counts a standard clock signal outputted from the timing signal generating means 101, and outputs a time-up signal when the timer operation is finished. A pace outputting prohibition means 211 receives the time-up signal and then prohibits inputting a pace signal outputted from the pace signal generating means 109 to the pace outputting means 110. Hereinafter, embodiments of the present invention will be explained referring to the drawings. (1) First embodiment Fig. 3 is a function block diagram showing a first embodiment of the inventive pace generating device. The walking detect circuit 333 comprises a walking sensor circuit 303 for detecting a walking signal, a hysteresis amplifying circuit 304 for amplifying the detected walking signal detected by the walking sensor circuit 303, and a one-shot multivibrator 305 for receiving the amplified detected walking signal. The amplified detected walking signal acts as trigger input for enabling the multivibrator to output a signal in accordance with walking being detected. An output signal of an oscillating circuit 301 is inputted to a CPU 310 as a standard clock of the CPU 310. The output signal is simultaneously divided into a specified frequency by a dividing circuit 302 and then inputted to the CPU 310. The CPU 310 conducts a program stored in a ROM 313 in accordance with the standard clock outputted by the oscillating circuit 301. An inputting circuit 311 is connected to the CPU 310 and inputs predetermined data, such a pace data, thereto. The inputted data is displayed in a display element 314 and besides stored in a RAM 312. The pace outputting element 330 comprises a pace signal amplifying circuit 307 and a pace outputting device 308, and outputs a pace signal outputted by the CPU 310. Fig. 4 shows a concrete embodiment of a circuit shown in the function block diagram of Fig. 3. In Fig. 4, the walking sensor circuit 303 switches on and off the contacts in accordance with walking, and absorbs chattering of the contacts by means of a resistor R, a condenser C, and a schmitt trigger inverter 304. Next, a detected walking signal is inputted to a one-shot multivibrator 305 and then a one-shot pulse of a fixed pulse width is obtained. The one-shot multivibrator 305 is of non-retriggerable type which outputs a signal of a fixed pulse width when a signal is inputted to trigger input and ignores retrigger input during pulse output. This signal of a fixed pulse width is inputted to an input terminal IN1 of the CPU 310. The CPU 310 outputs a buzzer signal in accordance with a fixed pace signal from OUT1. The buzzer signal is amplified by counter generating voltage of a coil L in the pace signal amplifying circuit 307. The pace outputting element 308 is a piezoelectric buzzer, which is driven by the pace signal amplified by the pace signal amplified by the pace signal amplifying circuit 307. Next, operation of the CPU 310 is shown with reference to the flow charts of Figs. 9 and 10. Fig. 9 is a flow chart showing an operation procedure of Fig. 3. When Figs. 9 and 10. Fig. 9 is a flow chart showing an operation procedure of Fig. 3. When a signal accorded with a walking signal detected by the walking detect circuit 333 is inputted to the input terminal IN1 of the CPU 310, one is added to a walking pace counter in the RAM 312 at either a rising edge or a falling edge of the signal (S100). Then, in this step, the CPU judges whether the input signal is the first input or the second one. When the contents of the walking pace counter in the RAM 312 is one, the CPU waits for a next signal to be inputted because it cannot measure the period of the inputted signal (S101). When the contents of the walking pace counter in the RAM 312 is two, the CPU moves on to period measurement of the input signal and clears the contents of the walking pace counter in the RAM 312 for next measurement (S102). The CPU 310 receives the standard clock signal of the timing signal generating circuit 331 and then counts time. The content of counting time is read from a walking pace measuring counter in the RAM 312 (S103). When the standard clock signal outputted by the dividing circuit 302 is 100 Hz and the contents of the walking pace measuring counter in the RAM 312 is 60, a period T of an input walking signal is calculated as follows: T = 1/100 x 60 = 0.6 (SEC). The pace is the number of steps per minute. Therefore the pace P is calculated as follows: P = 60 ÷ 0.6 = 100 (STEP/MIN). As indicated, a walking pace is calculated (S104). This content is stored in the RAM 312 and displayed at the same time (S106, S107). Next, the above calculated walking pace is compared with a desirable pace inputted in advance and stored in the RAM 312. Here, a permissible range of the difference between the walking pace and the predetermined pace has been determined beforehand. Suppose that the predetermined pace data is 120 (STEP/MIN), the detected and calculated walking pace data is 100 (STEP/MIN), and the permissible range of the difference between both paces is ±5 (STEP/MIN). In this case. the difference between both paces is 20 (STEP/MIN), which is out of the range (S108, S109, S110). If the difference between both paces is within the range, the CPU doesn't prepare for generating a pace signal (S111). If the difference between both paces is out of the range, the CPU moves on to prepare for making a pace signal. The pace signal is made by receiving a standard clock signal of 256 Hz, thereby enabling the CPU 310 to be interrupted at a frequency of 256 Hz (S112). The pace signal is made by counting the standard clock signal of 256 Hz. A counting value CD for outputting a predetermined pace is, when a predetermined pace is designated as PP, expressed as follows: CD = 60/PP x 256. Interrupting signals of 256 Hz are counted, and when they amount to the CD, then they complete a signal period for outputting a desirable predetermined pace (S113, S114). This CD is stored in a pace signal counter in the RAM 312 (S115). The CPU 310 outputs a buzzer signal "H" from an output terminal OUT1 to the pace signal amplifying circuit. A piezoelectric buzzer PZ receives this "H" signal and then outputs sounds (S116). Here, a standard clock signal of 32 Hz is allowed to interrupt the CPU 310 in order to determine the length of the sound. When the clock signal of 32 Hz interrupts, CPU 310 counts 1 clock time of the 32 Hz signal. Then, at the next interruption, a buzzer signal "L" is outputted from an output terminal OUT1 of the CPU 310. In other words, buzzer sound is outputted for 31.25 milli-SEC (S117). Fig. 10 is a flow chart showing a procedure for making a pace signal. The operation is started by the 256 Hz interrupting signal. The counting data CD expressed as the formula (3) is stored in the pace signal counter in the RAM 312 and one is subtracted from the content of the counting data CD every time a 256 Hz signal interrupts (S200). When the contents of the pace signal counter in the RAM 312 becomes zero, the counting value CD is newly calculated from a desirable predetermined pace with a formula (3) and then stored (S201, S202, S203, S204). Here, a buzzer signal "H" is newly outputted from an OUT1 terminal of the CPU 310 to the pace signal amplifying circuit 307. (2) A second embodiment Fig. 11 is a flow chart showing a second embodiment of the inventive pace generating device. In Fig. 11, the operating procedure of a walking pace calculating means 104 shown in Fig. 2 is explained as a modification of the first embodiment's procedural steps (S300 - S310). When, a calculated walking pace is compared with a desirable pace inputted in advance and stored in the RAM 312, if the result of the comparison is out of a predetermined range, a timer starts to operate. If the timer is already operated, data is not set to a prohibition timer (S312). On the other hand, if the timer is not operated yet, time data of the timer is set to the prohibition timer counter. The prohibition timer is subtracted every interruption of a standard clock of 1 Hz. In this embodiment, time of the timer is 30 seconds (S313). Next, preparation is made for making a pace signal. A pace signal is generated using the 256 Hz standard clock, thereby allowing the CPU 310 (S314) to be interrupted. The desirable predetermined pace is read out from the RAM 312 which stores the pace therein (S315). Next, a counting value is calculated for outputting a predetermined pace with the formula (3) shown in the first embodiment. A buzzer signal "H" is then outputted to a pace signal amplifying circuit so as to output a sound (S316 ~ S319). In other words, a desirable pace, which is inputted in advance and stored in the RAM 312, is compared with a detected and calculated walking pace. As a result, when a difference between the above two paces is out of a permissible range, a desirable predetermined pace is outputted only for a fixed time. (3) A third embodiment Fig. 5 is a function block diagram showing a third embodiment of the inventive step pace generating device. In a walking detect circuit 333, a walking sensor circuit 503 detects walking and then inputs a detect signal to a preamplifying circuit 504. The preamplifying circuit 504 amplifies and outputs a detect walking signal to a filter circuit 517. The filter circuit 517 filters all frequency components of the inputted detect walking signal to shield from commercial power-supply noise and so on in order to improve a S/N ratio. The filter circuit outputs the detect walking signal to a main amplifying circuit 519. The main amplifying circuit 519 amplifies the detect walking signal adequately and outputs it to a waveform shaping circuit 515. A second standard voltage generating circuit 518 supplies a voltage which will be a standard to the preamplifying circuit 504, the filter circuit 517, and the main amplifying circuit 519. The waveform shaping circuit 515 receives a standard voltage outputted from a first standard voltage generating circuit 516 and transforms detect walking signals from analog signals to digital signals "H" and "L". Then the transformed signal corresponding to the walking signal is inputted to an IN1 terminal of a CPU 310. Operation of the CPU 310 is the same as that of the first embodiment and the second embodiment. Fig. 6 is a specific circuit embodiment of the walking detect circuit 333 shown in the function block diagram of Fig. 5. In Fig. 6, the walking sensor circuit 503 outputs a signal caused by the vibration corresponding to walking, as an electric charge. The walking sensor circuit includes a sensor having a cantilever structure and piezoelectric elements adhered thereto. Impedance conversion is conducted to an outputted walking signal by way of FET and then the walking signal is outputted to an OP amplifier A1 through an AC coupling condenser C1. The preamplifying circuit 504 amplifies a detect walking signal at an amplifying rate of 1 + R5/R4. The filter circuit 517 shows a filter characteristic that a low cut-off frequency Fc1 is 1/(2πC2R6) and a wide cut-off frequency Fch is 1/(2πC3R7). A detect walking signal amplified adequately by the main amplifying circuit 519 is inputted to a hysteresis comparator A4 of the waveshape forming circuit 515 and then outputted to an OUTPUT terminal. Fig. 7 is a waveform showing a detect walking signal at an input terminal of the hysteresis comparator A4 of the waveform shaping circuit 515 shown in Fig. 6. Fig. 8 is another signal-waveform at the output terminal OUTPUT of the hysteresis comparator A4 of the waveform shaping circuit 515 shown in Fig. 6. This signal is inputted to the IN1 terminal of the CPU 310. In this embodiment, a piezoelectric sensor is used for the walking sensor circuit. However, the walking sensor circuit is not restricted to the piezoelectric sensor as long as it can detect walking. As well, a pace outputting means 110 is illustrated with a piezoelectric buzzer in this embodiment. However it is not restricted to the piezoelectric buzzer. The present invention, as described above, compares a detected walking pace with a desirable predetermined pace and then outputs the predetermined pace only when the difference between the above two paces is out of the predetermined permissible range as a result of the above comparison. Therefore users can automatically achieve a predetermined pace without ceasing his exercise. Moreover, if a timer is provided which is activated depending on the result of the comparison between both paces, makes it possible to stop outputting a desirable predetermined pace after a fixed time elapses. Consequently, consumption of power is reduced. When an exerciser gets exercise at a walking pace which is very unlike a desirable predetermined pace, the inventive device outputs the desirable predetermined pace so as to improve the learning effect from the exercise. The aforegoing description has been given by way of example only and it will be appreciated by a person skilled in the art that modifications can be made without departing from the scope of the present invention as defined by the appended claims.

Claims: A pace generating device comprising: means (107, 312) for storing a predetermined pace; detect means (103, 333) for detecting a pace of a mammal; display means (102, 314) for displaying said predetermined pace and/or a detected pace; pace comparing means (106, 310) coupled to said detect means and said store for comparing said predetermined pace with said detected pace, and characterised by; said pace comparing means being adapted for generating an output indicative of said predetermined pace when the difference between the predetermined pace and the detected pace is outside a predetermined range. A pace generating device as claimed in claim 1, further comprising: pace data inputting means (108) for inputting pace data coupled to said store; timing signal generating means (101) for counting time and generating a standard clock signal coupled to said display means for enabling said display to display the timing signal; pace signal generating means (109) coupled to said comparing means for receiving the signal to generate a pace signal from the predetermined pace data stored in the store and the standard clock signal outputted by the timing signal generating means; pace outputting means (110) coupled to said display for outputting a pace corresponding to the pace signal outputted by the pace signal generating means; pace calculating means (104) for receiving the detected pace outputted by the detect means and the standard clock signal outputted by the timing signal generating means, and calculating said detected pace; and pace storing means (105) for receiving the detected pace signal outputted by the pace calculating means, storing the detected pace signal, and outputting a detect pace display signal to the display means. A pace generating device as claimed in claim 2 further comprising: a timer means (20a) for receiving the standard clock signal outputted by the timing signal generating means and a timer operation start signal outputted by the pace comparing means for starting timer operation; and pace output prohibiting means (211) for receiving the pace signal outputted by the pace signal generating means and a time up signal outputted by the timer means for prohibiting the pace signal generating means from outputting a pace signal to the pace outputting means. A pace generating device according to claim 1, 2 or 3, wherein the detect means comprises a sensor circuit (303) for detecting a pace, a hysteresis amplifying circuit (304) for amplifying a detected walking signal detected by the walking sensor circuit, and a one-shot multivibrator (305) for receiving an amplified detected walking signal. A pace generating device according to claim 4, wherein the sensor circuit comprises a piezoelectric sensor.

Inventors: SAKUMOTO KAZUMI, SAKUMOTO, KAZUMI
Applicants: SEIKO INSTR INC, SEIKO INSTRUMENTS INC.
Application year: 1994
Main classification: G01C22
IPC codes: A63B24, A63B23, G04F5, A63B71, A63B69, G04G99