Color linear image sensor having a reduced distance between photosensor arrays

Abstract: A color linear image sensor apparatus includes a wiring conductor formed of a first level polysilicon film which is provided on a channel stopper in photocell arrays and which is connected to a first transfer gate electrode of a CCD register. The first transfer gate electrode is also connected to a second transfer gate electrode through a contact hole. Thus, even if the wiring conductor is formed on the channel stopper in the photocell array, a dead zone for locating a wiring conductor for the driving clocks becomes unnecessary, and accordingly, the distance between photocell arrays can be shortened to two thirds to a half of the distance in the conventional examples.

Description: Background of the Invention Field of the invention The present invention relates to a color linear image sensor apparatus, and more specifically to a color linear image sensor apparatus comprising three arrays of photosensor cells. Description of related art Referring to Figure 1, there is shown one conventional color linear image sensor apparatus comprising three arrays of photosensor cells. This conventional color linear image sensor apparatus includes three arrays 1R, 1G and 1B of photoelectric conversion cells, namely, photocells, and a CCD register 2R-1, 2R-2, · · · located at each side of each of these photocell arrays 1R, 1G and 1B. In this example, these photocell arrays 1R, 1G and 1B have a peak sensitivity in red, in green and in blue, respectively, so that the apparatus functions as a color linear image sensor. With this arrangement, since the three linear image sensors are located in parallel, a distance "L" between each pair of adjacent photocell arrays is ordinarily required to be on the order of 100 µm to 200 µm. Because of this distance "L" between each pair of adjacent photocell arrays, each of the photocell arrays senses a different position on the same subject copy, as will be apparent from Figure 3 illustrating an optical path diagram in the case of using the color linear image sensor apparatus. Color signal processing needs a color signal for red, a color signal for green and a color signal for blue on the same position. Because of the difference between the positions sensed by the photocell arrays, it was necessary to externally store the color signals of the amount in proportion to the distances "L" between the photocell arrays. For example, assuming that the distance "L" between each pair of adjacent photocell arrays is 140 µm, a size "d" of each photocell is 14 µm, and a signal for each one pixel has information of 10 bits, a memory capacity "M 1 " required for each one pixel is expressed as follows: M 1 = 10 (L+2L) / d = 300 (bits) Furthermore, assuming that one line is composed of, for example 5,000 pixels, a memory capacity "M T " required for processing the color signals for one line is expressed as follows: M T = M 1 × 5000 = 1.5 (megabits) In general, memory for this purpose is required to have a high speed reading operation; therefore an expensive memory such as a static random access memory (SRAM) has been used. Accordingly, there is a demand for a color linear image sensor apparatus having a shortened distance "L" between adjacent photocell arrays, so that a required external memory capacity can be made small. In the above mentioned conventional color linear image sensor apparatus, as will be understood from Figure 1, there is restriction in shortening the distance between adjacent photocell arrays, because there are wiring conductors for clocks  1 and  2 between the CCD register 2R-2 and the CCD register 2G-1. For example, referring to Figure 2, there is shown an enlarged layout pattern diagram of a portion "A" in Figure 1. In Figure 2, the CCD register 2R-2 and the CCD register 2G-1 are located between two photocell arrays 1R and 1G, each of which is formed by arranging a number of photodiodes PD (isolated from each other by a channel stopper 6) in a single line. The CCD register 2R-2 and the CCD register 2G-1 have first transfer gate electrodes 11-1 (formed of a first level polysilicon film) and second transfer gate electrodes 11-2 (formed of a second level polysilicon film), which are common to the CCD register 2R-2 and the CCD register 2G-1. The CCD register 2R-2 and the CCD register 2G-1 are isolated from each other by a channel stopper 6A. Between the photocell array 1R and the CCD register 2R-2, there is formed a transfer gate electrode 12-2 (3R-2) of the second level polysilicon film, and similarly, between the photocell array 1G and the CCD register 2G-1, there is formed a transfer gate electrode 12-1 (3G-1) of the second level polysilicon film. Clock signal wiring conductors 14( 1 ) and 14( 2 ), which also function as a light shield, are connected to the first transfer gate electrode 11-1 and the second transfer gate electrode 11-2 through contact holes C1 and C2, respectively. This arrangement was attributable to an idea of forming the clock signal wiring conductors 14( 1 ) and 14( 2 ) above the CCD registers. Nevertheless, the channel stopper 6A was required to have a sufficient width to form the contact holes C1 and C2 which connect the clock signal wiring conductors to the first and second gate electrodes, respectively. For example, in the case of designing the layout pattern under the 2 µm rule, assuming that the size of the contact holes is 2 µm × 3 µm and the alignment margin is 1 µm, the channel stopper 6A is required to have the width of at least 10 µm, and preferably about 12 µm. In this connection, only for the purpose of electrical isolation of the transfer channels, it is sufficient if this width of the channel stopper is at least 2 µm. Therefore, even if the above mentioned design is adopted, the existence of the clock signal wiring conductors is still hindrance in shortening the distance "L" between the photocell arrays. Furthermore, as one method for shortening the distance "L" between the photocell arrays, it might be possible, as shown in Figure 4, to connect the gate electrodes (11-1A, 11-2A, •••) of the CCD register 2 on the channel stopper 6 of the photocell array 1, as adopted in an area image sensor. However, this method requires four-phase, tri-level, pulses  1 ,  2 ,  3 and  4 for driving the CCD registers, and therefore, the driving condition becomes complicated. EP-A-0 077 003 shows first transfer gate electrodes mutually interconnected by a wiring conductor which is formed on an insulating film. The closest prior art OPTOELECTRONICS - Devices and Technologies, vol. 6, no. 2, pp. 333 - 343, December 1991 shows a linear image sensor with separate photocell arrays for R, G and B. Summary of the invention Accordingly it is an object of the present invention to provide a color linear image sensor apparatus which has overcome the above-mentioned defects of the conventional ones. Another object of the present invention is to provide a color linear image sensor apparatus which has a wiring conductor and on a channel stopper of a photocell array and which can adopt a two-phase driving method which is the simplest driving method for the CCD register. This objects are solved by the features of the main claim. The subclaims show advantageous embodiments of the invention. Brief Description of the Drawings Figure 1 is a view illustrating an overall structure of one example of the conventional color linear image sensor apparatus; Figure 2 is a partial layout pattern diagram showing a detail of the portion "A" in Figure 1; Figure 3 is an optical path diagram used for illustrating the problem in the case of using the color linear image sensor; Figure 4 is a view illustrating another example of the conventional color linear image sensor apparatus; Figure 5 is a view illustrating an overall structure of a first embodiment of the color linear image sensor apparatus in accordance with the present invention; Figure 6 is a partial layout pattern diagram showing a detail of the portion "A" in Figure 5; Figure 7 is a sectional view taken along the line A-A in Figure 6; Figure 8 is a sectional view taken along the line B-B in Figure 6; Figure 9 is a timing chart illustrating one example of the CCD register driving clock pulses 1 and 2 and the transfer gate pulse TG; Figure 10 is a view illustrating an overall structure of a second embodiment of the color linear image sensor apparatus in accordance with the present invention; Figure 11 is a partial layout pattern diagram showing a detail of the portion "A" in Figure 10; and Figure 12 is a layout pattern diagram of the first transfer gate electrodes associated with a pair of adjacent photodiodes shown in Figure 11. Description of the Preferred embodiments Referring to Figure 5, there is diagrammatically shown an overall structure of a first embodiment of the color linear image sensor apparatus in accordance with the present invention. Figure 6 is a partial layout pattern diagram showing a detail of the portion "A" in Figure 5. Figure 7 is a sectional view taken along the line A-A in Figure 6, and Figure 8 is a sectional view taken along the line B-B in Figure 6. On a single semiconductor chip or substrate 104 formed of, for example, an N - silicon substrate, there is formed a linear image sensor for red which is composed of a photocell array 101R and a CCD register 102R-1, 102R-2 located at each side of the photocell array 101R through a transfer gate 103R-1, 103R-2, a linear image sensor for green having a similar arrangement (shown by the same Reference Numerals added with "G" in place of "R"), and a linear image sensor for blue having a similar arrangement (shown by the same Reference Numerals added with "B" in place of "R"). In Figure 6, mutually corresponding elements between the linear image sensor for red, the linear image sensor for green and the linear image sensor for blue are given the same Reference Numerals suffixed with "R", "G" or "B" for distinction among red, green and blue. Reference Symbols VR1, VR2, ••• designate output signals, and Reference Symbols  1 and  2 indicate two-phase driving pulses for the CCD registers. Reference Symbols  TGR , ••• show pulses for driving the transfer gates 103R-1, •••. One example of  1 ,  2 and  TG (which is a representative of  TGR ,  TGG and  TGB ) is shown in the timing chart of Figure 9. As shown in Figure 6, each of the photocell arrays 101R, ••• is constituted of a number of photodiodes "PD" arranged in a single line. As shown in Figure 7, each of the photodiodes "PD" includes an N-type region 107-1 formed at a surface portion of a P-type region 105 formed at a principal surface of the N - silicon substrate 104, and a P + region 108 formed at a surface of the N-type region 107-1. Adjacent photodiodes are isolated from each other by a P + channel stopper 106. As shown in Figure 8, each of the CCD registers 102R-1, ••• comprises a number of first transfer gate electrodes 111-1 (formed of a first level polysilicon film) each formed through a first gate oxide film 110-1 on an N-type region 107-2, and a number of second transfer gate electrodes 111-2 (formed of a second level polysilicon film) each formed through a second gate oxide film 110-2. As will be apparent from Figure 8, the second level polysilicon film is basically formed above the first level polysilicon film, and each of the second transfer gate electrodes 111-2 partially overrides the first transfer gate electrodes 111-1 positioned at each side of the second transfer gate electrodes 111-2. Directly under each of the second transfer gate electrodes 111-2, a P - region 109 is formed at the semiconductor substrate. As shown in Figure 6, each of the first transfer gate electrodes 111-1 and the second transfer gate electrodes 111-2 is formed to extend over both of the second CCD register (for example, 102R-2) of an upper side linear image sensor and the first CCD register (for example, 102G-1) of a lower side linear image sensor. These two CCD registers are isolated from each other by a channel stopper 106A. The photodiodes of each photocell array are configured to alternately transfer their electric charge to an upper side CCD register and a lower side CCD register through an area that is not blocked by the channel stopper 106. Reference Numerals 112-1, 112-2, ••• designate a transfer gate electrode extending along and in parallel with the photocell array and passing above the above mentioned areas not blocked by the channel stopper 106, for the purpose of controlling the transfer of the electric charge from the photocell array to the associated CCD register. These transfer gate electrodes 112-1, 112-2, ••• are formed of the second level polysilicon film. The mutually corresponding first transfer gate electrodes 111-1 of the respective CCD registers are interconnected through a first level polysilicon film 111-1A which is formed on the first gate oxide film 110-1 on the channel stopper of the photocell array. Each of the first transfer gate electrodes 111-1 has a portion 111-1B extending to the outside of the CCD registers 102R-1 and 102B-2. As shown in Figure 6, the extending portions 111-1B are alternately connected to wiring conductors 121 for supplying a driving pulse  1 and wiring conductors 122 for supplying a driving pulse  2 . In addition, each of the first transfer gate electrodes 111-1 is connected through a contact hole "C" to the second transfer gate electrode 111-2 positioned at a right side of the first transfer gate electrode 111-1. A light shield is shown by a thick chain line for convenience and given with Reference Numeral 114. A width of the channel stopper 106A and a width of the channel stopper 106 in each photocell array are each about 2 µm (under the 2 µm rule) and a width of the first level polysilicon film 111-1A is also about 2 µm (the film 111-1A and the channel stopper 106 just below the film 111-1A are depicted to be different in width for convenience of the drawings, but they actually have substantially the same width). Thus, the color linear image sensor apparatus having the two-phase driven CCD registers has been constructed. The contact holes "C" for interconnecting between the second level polysilicon film and the first level polysilicon film are formed within a territory of the CCD registers, but not on the channel stopper 106A. Accordingly, differently from the conventional example shown in Figure 2, it is no longer necessary to ensure a large width for the channel stopper 106A. As a result, the distance "L1" between each pair of adjacent photocell arrays can be made shorter than the distance "L" (=140 µm) of the conventional example, about 10 µm. However, the size of the pixels does not change. Now, explanation will be made about why the contact holes "C1" and "C2" had to be provided on the channel stopper 6A in the conventional example (fig.2), and about why the contact holes "C" can be provided within the territory of the CCD register in the embodiment of the present invention (Figure 6). In Figure 2, the clock signal wiring conductors 14 are connected to the first level polysilicon film and the second level polysilicon film through the contact holes "C1" and "C2". The clock signal wiring conductors 14 are ordinarily formed of a metal film such as an aluminum film in order to reduce a wiring resistance. Generally, in a connection portion between a metal and a polysilicon film, the metal permeates into the polysilicon film. Therefore, the polysilicon film in a contact portion, and in the neighborhood thereof, changes in its film quality. Accordingly, to ensure that an adverse influence does not exert on the charakteristics of the sensor even if the film quality in the contact hole and its neighborhood changes, the P-type channel stopper is provided under the contact holes. In other words, the polysilicon film and the metal have to be contacted to each other on the channel stopper. In the embodiment of the present invention (Figure 6), the first polysilicon film and the second polysilicon film are connected to each other through the contact hole. Because they are the same in nature, no change of film quality occurs. Film quality is constant because there never occurs a situation in which the quality of only the film under the contact holes becomes different. As a result the materials of first and second polysilicon films are connected to each other in the embodiment of the present invention, and there is no film quality problem even though the contact portions are formed within the territory of the CCD registers. Now, a second embodiment of the color linear image sensor apparatus in accordance with the present invention will be explained with reference to Figure 10 showing an overall structure of the second embodiment and Figure 11 illustrating the detail of a portion "A" in Figure 10. In the second embodiment only one side of each of photocell arrays 201R, •••, has a CCD register 202R, ••• and an interposed transfer gate 203R, ••• (single-channel type). In the first embodiment two CCD registers are located between each pair of adjacent photocell arrays. In the second embodiment only one CCD register is provided between each pair of adjacent photocell arrays. This allows the distance between each pair of adjacent photocell arrays to be further shortened. However, this arrangement needs that the pitch of the CCD register must be made half of the pitch of the double-channel type used in the first embodiment. Therefore, supplying of the driving voltage to the CCD registers becomes more difficult than in the first embodiment. However, this difficulty is overcome in the following manner. In the case of the single-channel type, two pairs of transfer gate electrodes (first transfer gates 211-1 and second transfer gates 211-2) are provided for each photocell (photodiode PD) of the photocell arrays. As shown in Figure 11, two first transfer gate electrodes 211-1 cover, through a first gate oxide film (not shown), a coupled portion between the photodiode PD and the CCD register 202R, •••. As will be more clearly understood from Figure 12, one of the two first transfer gate electrodes 211-11 for each pair of photodiodes is coupled to each other so as to form a C-shaped pattern, and is also coupled to a first level polysilicon film 211-1A1 extending over the channel stopper region 206 in the photocell array 201R, so that a driving clock  1 is applied to the first level polysilicon film 211-1A1. Similarly, the other of the two first transfer gate electrodes 211-12 for each of one pair of photodiodes is connected to each other so as to form a C-shaped pattern, and also coupled to a first level polysilicon film 211-A2 extending over a different channel stopper region in the photocell array, so that a driving clock  2 is applied to the first level polysilicon film 211-A2. Thus, the wiring conductors, which are supplied with the driving clocks  1 and  2 , are formed of the first level polysilicon film, and alternately located on the channel stopper regions. Each first transfer gate electrode 211-1 is connected through a contact hole "C" to the second transfer gate electrode 211-2 which is paired with the first transfer gate electrode 211-1. Accordingly, a single wiring conductor of the first level polysilicon film formed on each channel stopper region can be branched into two wiring conductors within the territory of the CCD register. With the above mentioned arrangement, it is possible to realize the structure in which only one CCD register array is provided for one photocell array as shown in Figure 10. Therefore, a distance "L 2 " between each pair of adjacent photocell arrays can be made shorter than in the first embodiment by a width of at least one CCD register array. As mentioned above, in the two-phase driven color linear image sensor apparatus having a plurality of linear image sensors formed in parallel to each other on a semiconductor chip, first transfer gate electrodes of a CCD register associated with each linear image sensor are mutually coupled by a conducting film passing over a channel stopper of a photocell array, and supplied with a corresponding driving clock pulse, and second transfer gate electrodes of the CCD register associated with each linear image sensor are connected to corresponding first transfer gate electrodes through a contact hole formed in a gate oxide film formed under the second transfer gate electrode. With this configuration, the width of the channel stopper between adjacent CCD registers can be reduced to a minimum size required for isolation. Accordingly, it has become possible to shorten the distance between adjacent photocell arrays. Therefore, it is possible to correspondingly decrease the memory capacity of an external memory required to obtain a color image. The invention has thus been shown and described with reference to the specific embodiments. However, it should be noted that the present invention is in no way limited to the details of the illustrated structures but changes and modifications may be made within the scope of the appended claims.

Claims: A color linear image sensor apparatus including three linear image sensors which are integrated in parallel to each other on the same semiconductor chip (104) and which have a color sensitivity different from each other, each of the linear image sensors including a photocell array (101R, 101G, 101B or 201R, 201G, 201B) composed of a plurality of photocells arranged in the form of a single line and a respective CCD register (102R, 102G, 102B or 202R, 202G, 202B) receiving an electric charge from the corresponding photocell array and transferring the received electric charge there-through, each said CCD register being composed of a plurality of alternately located first (111-1 or 211-1) and second (111-2 or 211-2) transfer gate electrodes, characterized in that each said first transfer gate electrode (111-1 or 211-1) is formed of a first level polysilicon film, and each said second transfer gate electrode (111-2 or 211-2) is formed of a second level polysilicon film on a first insulating film (110-2) above said first level polysilicon film, and in that said apparatus comprises a wiring conductor (111-1A or 211-1A) formed on a second insulating film (110-1) on a channel stopper (106 or 206) which isolates adjacent photocells of each of said linear image sensors from each other, said second insulating film (110-1) on said channel stopper (106 or 206) being part of the insulating film provided under said first transfer gate electrodes, said wiring conductor (111-1A or 211-1A) interconnecting the mutually corresponding first transfer gate electrodes (111-1 or 211-1) of said three linear image sensors, said wiring conductor being formed of said first level polysilicon film which is the same as that of said first transfer gate electrodes (111-1 or 211-1), said apparatus further comprising contact holes (C) formed through said first insulating film (110-2) above each said CCD register (102R, 102G, 102B or 202R, 202G, 202B), for directly connecting each of said second transfer gate electrodes (111-2 or 211-2) of each of said linear image sensors to a corresponding first transfer gate electrode that is paired with said each second transfer gate electrode, the conductivity type of the substrate region (109) under that portion of the second transfer gate which does not overlap the first tranfer gate being different from that of the substrate region (107-2) under the first transfer gate, so that a two-phase driving CCD is realized. The color linear image sensor apparatus claimed in Claim 1, wherein said linear image sensors are of the dual channel type in which a first CCD register (102R-1, 102G-1, 102B-1) is arranged at one side of the photocell aray (101R, 101G, 101B) and a second CCD register (102R-2, 102G-2, 102B-2) is arranged at the other side of the same photocell array (101R, 101G, 101B), and in each of the first and second CCD registers, one first transfer gate electrode and one second transfer gate electrode are provided for each one of the photocells, the mutually corresponding first transfer gate electrodes of the first and second CCD registers are connected by said wiring conductor (111-1A) formed on said second insulating film (110-1) on each channel stopper (106) in each photocell array. The color linear image sensor apparatus claimed in Claim 1, wherein said linear image sensors are of the single channel type in which one CCD register (202R, 202G, 202B) is arranged at only one side of the photocell array (201R, 201G, 201B) and in the one CCD register, two pairs of said first and second transfer electrodes are provided for each one of the photocells, wherein one said wiring conductor is connected to two first transfer gate electrodes (211-11) and an adjacent said wiring conductor is connected to another two first transfer gate electrodes (211-12), the said two first transfer gate electrodes (211-11) being for two adjacent corresponding photocells are coupled to each other so that the electrodes with the coupling element form a C-shaped pattern, and the said other two first transfer gate electrodes (211-12) for the said two photocells are coupled to each other so that the electrodes with the coupling element form another C-shaped pattern, so that these two C-shaped patterns are interdigitated, and wherein the mutually corresponding first transfer gate electrodes (211-1 or 211-2) of said three linear image sensors are interconnected by the respective said wiring conductor (211-1A) provided on said second insulating film on said channel stopper (206) which isolates adjacent photocells of each of said linear image sensors from each other.

Inventors: MIWADA KAZUO, MIWADA, KAZUO, MIWADA, KAZUO, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1994
Main classification: H01L27
IPC codes: H01L27