An error correction code decoder and a method thereof

Abstract: The present invention relating to the sum of the number of error data and the possible error data in order to judge whether the data is normal, error or possible error and if the sum is in the range of the error correction of the decoder, all the data are recognized as erasures, and if the sum is not in the range of the error correction of the decoder, only the error data are recognized as erasures. Therefore, the error correction decoder according to the present invention is to classify original data and possible error data at the erasure which occurred with a high error occurrence rate which is not in the range of the error correction of the decoder and effectively decodes by implementing the error correction.

Description: The present invention relates in general to an error correction code decoder and a method thereof, and in particular to an error correction code decoder and a method thereof capable of effectively implementing error correction using a small size decoder with two kinds of ensures in order to maximize features of the product code. Conventionally, designing a stable circuit capable of sending, receiving and storing digital data free of errors is extremely costly. Thus, in general, circuits are designed for permitting some data errors and in compensation for this, the original data is encoded/decoded by a predetermined algorithm for detecting or correcting the aforementioned errors. Here, the code in which the original data is encoded is called an error correction code, and since this error correction code is arranged to be in a certain order between each of the symbols which is consisting of codes, the errors which might happen during sending, receiving, storing, or restoring the data are detected or corrected during decoding. In addition, for detecting/correcting more data errors during decoding, the code length of the error correction code becomes longer, and the size of the encoder/decoder which is used becomes larger. Therefore, during designing the circuit, the error detection/correction capability and the size of the encoder/digital decoder should be considered. To correct the error during decoding, despite what kind of error correction code is used, the possible error location(which symbol has the error?) in the received/restored data and the error size(what is the original value to be obtained?). Therefore, for error correction, each data needs two equations since each error has two kinds of information, error location and size. However, depending on circumstances, there may be cases where at least it is known that the specific symbol of a code is not correct, although the actual value is known. If for instance the value of the received or restored data is completely unexpected or if serious noises are mixed, the corresponding value will be unreliable. This is also a kind of an error, but since the location thereof is known, for computing the size, only one equation is needed. This is an erasure. Therefore, since the capacity of error correction of the error correction code depends on how many equations can be used, in case that the same error correction code is used, if the information of the erasure may be transferred to the decoder, the total sum of errors which can be corrected by the decoder will increase. In addition, the errors which occur during sending, receiving and storing are classified into two kinds: a sporadic error which occurs with a certain probability and a concatenated error i.e. when a number of consequent symbols are in error. The error correction code decoder is strong to sporadic error but weak to concatenated errors, so, in order to correct concatenated errors, a very large size of the decoder is needed. For achieving a higher error detection/correction capability with a small size encoder/decoder, conventionally, there had been introduced the concatenated code to encode the original data more than twice by different methods; one method is a product code which distributes the original data in an array and then encodes/decodes the arrayed data once in each horizontal and vertical directions. The product code, as shown in Fig 1 is strong for concatenated error by adding the parities Pmk and Qln in a horizontal and vertical direction for the original data Smn, here, Rlk is a parity of C1 code and a parity of C2 code. In Fig. 1, if we assume that the code in a horizontal direction is C1 and the code in a vertical direction is C2, the product code which consists of C1 and C2 is designed in order that a concatenated error in one direction may not be a sporadic error in a different direction, so that with a small size of the decoder, the decoding is effectively implemented. The conventional decoder, as shown in Fig. 2, includes a first-in, first-out memory 1 for temporally storing the received or restored data; a syndrome calculator 2 for computing a syndrome value from the received or restored data; an erasure calculator 3 for computing an erasure location equation by counting the number of ensures from a 1 bit flag; an error location/size calculator 4 for computing the error location and size by using the erasure location equation of the erasure calculator 3; and a result output section 5 for outputting the corrected data and the flag after correcting the error in the data inputted from the first-in, first-out memory 1 according to an operation of the output signal of the error location/size calculator 4. The operative description of the conventional decoder will now be explained with reference to Fig.. 3 and Fig. 4. To begin with, when a received/restored 1 bit flag is inputted into the erasure calculator 3, the erasure calculator 3 detects whether an erasure occurred from the inputted flag. Here, if an erasure occurred, whether the total number of occurred erasures is in the range of error correction capacity of the decoder is judged thereby. If the number of erasures is in the range of error correction of the decoder, the erasure calculator 3 computes the erasure location and outputs it to the error location/size calculator 4. Meanwhile, the received/restored data is temporally stored in the first-in, first-out memory 1 and inputted into the syndrome calculator 2. At this time, the syndrome calculator 2 calculates the received/restored data containing mixed errors and outputs a specific result value of the errors, called the syndrome, and outputs the syndrome which is a result value of its inherent error and outputs it to the error location/size calculator 4. Thereafter, the error location/size calculator 4 calculates the syndrome value and outputs an error location equation. At this time, the error location/size calculator 4 includes the erasure location equation computed at the erasure calculator 3 into the error location equation. Thereafter, the error location/size calculator 4 computes the error size equation using the aforementioned error location equation and computes the above error location equation and the error size equation if the two computed equation are in the range of the error correction of the decoder; then the error location/size are outputted therefrom. The result output section 5 corrects the error of the data inputted from the first-in, first-out memory 1 according to the error location/size computed by the error location/size calculator 4, and applies a 1 bit data when the error correction is completed, which implies that the current data is reliable, to each of the data and outputs them. However, in case that the detected errors are judged as not being in the range of error correction of the decoder by checking the number of erasures, or the detected error is judged as not being in the range of error correction capacity of the decoder by checking the error location equation and the error size equation at the error location/size calculator 4, the result output section 5 outputs the output data of the first-in, first-out memory 1 without correction and adds a 1 bit flag, which implies that the current data is not reliable, to each of the data and outputs them. Whether the data indicating whether the outputs of the result output section 5 is reliable or not is indicated as whether 1 bit is added to each of the data or not. If the flag bit of the inputted data is set at 1, the erasure calculator 3 judges the data as not reliable. In addition, if the error location/size calculator 4 judges that the current data is not reliable, the current data flag bit is set at 1. Here, the data whose flag set at 1 indicates an erasure and the data whose flag is set at zero indicates normal data. The erasure which occurs as a result of the decoding, is used at the second decoding in the product code. As these decoding process are repeatedly implemented, the data errors are corrected. If the data shown in Fig. 4A are received/restored, C1 code is decoded as shown in Fig. 4B. Here, since the fourth row shown in Fig. 4B is not in the range of the error correction of the decoder, all are processed as erasures. In addition, when C2 code is decoded, erasures of the fourth row are recognized as individual ensures, and as the decoding is implemented, the errors are corrected sufficiently. As described above, when the product code is decoded in the order "Receiving/restoring -> C1 decoding -> C2 decoding," differences occur between the erasure during the receiving/restoring of the data and the erasure during the decoding of C1 code. The erasure which occurs during receiving/restoring of the data are the actually occurred errors, however, to process each of the data of the fourth row as shown in Fig. 4B as an erasure implies that all the data of the corresponding code are not correct. If the number of ensures occurred during receiving/restoring data is not in the range of the error correction, the number of the erasure increases as shown in Fig. 4A. If the number of the increased erasures are in the range of the error correction, there are no problems. Otherwise, due to the ensures increased during decoding of C1 code, C2 code might fail to correct the errors of the data. That is, according to the conventional decoder, if the number of the errors increase beyond a predetermined limitation due to the characteristics of the products code, decoding of data will not be implemented despite the fact that data might have been be likely decoded. Accordingly, it is an object of the present invention to provide an error correction code decoder and a method for effectively decoding all data as erasure if the sum of error data and possible error data are in a range of error correction of the decoder and decoding only the error data as erasure if the sum of error data and possible data is not in a range of error correction of the decoder. According to the present invention, there is provided an error correction code decoder according to claim 1. There is also provided an error correction code decoding method according to claim 3. The objects and features of the invention may be more readily understood with reference to the following detailed description of an illustrative embodiment of the invention, taken together with the accompanying drawings in which: Fig. 1 is an illustrative view showing a product code; Fig. 2 is a block diagram of a conventional decoder; Fig. 3 is a flow chart showing an error correction process during decoding according to the conventional art; Figs 4a-4C illustrate; conventional error correction decoding; Fig. 5 is a block diagram showing the general arrangement of an error correction decoder according to the present invention; Fig. 6A is a flow chart showing a process of an embodiment of the error correction decoder according to the present invention; Fig. 6B is a block diagram of an error correction decoder implementing the flow chart of Fig. 6A Figs. 7A and 7B, similar to Figs. 6A and 6B, show another embodiment of the error correction decoder according to the present invention; Figs 8A-8B, similar to Figs. 6A-6B still another embodiment and Figs 9A-9C, similar to Figs 4A-4C illustrate an error correction decoding in a decoder of the type shown in Figs 6A-6B. Referring to Fig. 5, an error correction code decoder according to the present invention includes a first first-in, first-out memory 11 for temporally storing the received or restored data; a syndrome calculator 12 for computing a syndrome which is a specific error result value by processing the received/restored data; a first erasure calculator 13 for computing an erasure location equation and for counting the number of "11" among the 2 bit flags; a second erasure calculator 14 for computing the erasure location equation by counting the total number of the "01" and "11" among 2 bit flags; a selector (15 for selecting the output signal of the second erasure calculator 14 if the output signal of the second erasure calculator 14 is in the range of error correction capacity of the decoder by checking the output signal of the first and second erasure calculators 13 and 14 and for selecting the output signal of the first erasure calculator 13 if the output signal of the second erasure calculator 14 is not in the range of error correction capacity of the decoder; an error location/size calculator 16 for computing the error location/size using the output signal of the syndrome calculator 12 and the output signal of the selector 15; a second first-in, first-out memory 17 for temporally storing the 2 bit flag; and a result output section 18 for outputting the corrected data and the flag set as "00" if the all the errors mixed into the data inputted from the first first-in, first-out memory 17 according to the operation of the output signal of the error location/size calculator 16 and outputs the original data which are not corrected and the flags set as "01" and "11" according to the credibility of the original data when the errors are not corrected. With references to the accompanying drawings, there will now be explained the detailed operation and effects of the error correction code decoder and a method thereof according to the present invention. If the error occurrence rate of the data received/restored at the decoder according to the present invention increases, the data in which the flag is "11" are always recognized as errors; however, the data in which the flag is "01" are recognized as either errors or normal data according to the given cases, because the data in which the flag is "01" implies possible errors, and not always errors. A decision is made according to whether the equation related to the erasures which is computed at a time when all the data whose flags are "11" and "01" are recognized as errors are in the range of error correction capacity of the decoder. If the equation related to the erasures which is computed at a time when all the data in which the flags are "11" and "01" are recognized as errors which are in the range of error correction capacity of the decoder, all the data in which the flags are "01" and "11" are recognized as errors. Meanwhile, if the decoding was successfull the flag bits are set as "00," however, if there is no decoding, the flags are set as "01" or "11" according to the credibility of the original data. The flag setting methods according to the credibility of the original data will now be explained. As shown in Fig. 5 the received/restored data are temporally stored into the first-in, first-out memory 11 and the syndrome calculator 12 computes syndromes which are the specific result values of errors. At this time, the first and second erasure calculators 13 and 14 into which the 2 bit flags are inputted count the number N1 of flags at "11," and counts the number N2 of flags at "01" and "11." The flags are temporally stored into the first-in, first-out memory 17. At this time, the first erasure calculator 13 counts only the number N1 in which the flags are "11," and computes the erasure location equation if the number N1 is in the range of error correction capacity of the decoder. In addition, the second erasure calculator 14 computes the erasure location equation if the number N2 is in the range of error correction capacity of the decoder by counting the data in which the flags are "01" and "11." Thereafter, the selector 15 selects the output signal of the second erasure calculator 14 and directs it to the error location/size calculator 16 if the output signals of the second erasure calculator 14 are in the range of error correction capacity of the decoder. In addition, the selector 15 selects the output signal of the first erasure calculator 13 and directs it to the error location/size calculator 16 if the output signals of the second erasure calculator 14 are in the range of error correction capacity of the decoder. At this time, the error location/size calculator 16, operated by the signals inputted from the syndrome calculator 12, computes the error location equation and then computes the error size equation by including the erasure location equation inputted from the selector 15 to the computed error location equation. The error location/size calculator 16 computes the error location/size by operating the error location equation and the error size equation and outputs to the result output section 18. Therefore, the result output section 18 corrects the errors mixed into the data inputted from the first-in, first-out memory 11 according to the output signal of the error location/size calculator 16. If all the errors are corrected, the result output section 18 outputs the corrected data and the flag are set as "00," implying all the data are normal. However, if the error correction is not implemented, the result output section 18 checks each of the data and judges whether the data are considered as erasures. If the data are recognized as erasures, the flags are set as "11," and the then data are recognized as errors. If the data are not recognized as erasures, the flags are set as "01," which implies that the data may be possible errors, in this case, the data are outputted without correction. With reference to Figs. 6A and 6B, the operation of a first embodiment will now be explained in detail. In case that the receiving/restoring, the C1 decoding, and the C2 decoding of the data are carried out, the level of data credibility are recommended to be classified in details when the receiving/restoring apparatus of the data outputs the data, otherwise, when the existing receiving/restoring apparatus of the data are used, the existing flag "0" or "1" should be to output as "00" or "11." The C1 decoder outputs "00" if the decoding is carried out; if decoding is not implemented, the flag will be outputted as "01" or "11" depending on the level of the original data. When decoding fails, the flags which are recognized as original erasures are set as "11," the flags which are not recognized as original erasures are set as "01," so, according to the cases, they are recognized as errors or normal data. If the C2 decoder recognizes the data in which the flags are "01" and "11" as ensures, the C2 decoder recognizes the data in which the flags are "01" as an erasure if the number is in the range of the error correction of the decoder. However, if recognizing the data in which the flags are "01" and "11" as an erasure and if the number is not in the range of the error correction of the decoder, the C2 decoder recognizes the flags as "01" and "0" and implements decoding. If the C2 decoder completes the decoding of the data, the C2 decoder sets the flags of each of the data as "00." However, if the C2 decoder fails to decode and if the original data are recognized as "0," the flags are set as "01," and in case that the original data are not recognized as "0," the flags are set as "11." The embodiment shown in Figs. 7A and 7B, will now be explained. Since only the box enclosed with the dotted line on Fig. 7B is different to that of Fig. 6B, only that box will be described. Through the same procedure as described at Fig. 6A-6B, whether error corrections are carried out is recognized. If error correction was not implemented, the flags of each of the data are recognized to have been "11." In other words, if the flags of each of the data were "11," the output flags are set at "11," which implies that the data are errors. If the flags were not "11," the output flags are set at "01" which implies that the data may be possible errors. In this case, the data are outputted without corrections. During C1 decoding, if the data in which the flags were "01" are decoded by the C2 decoder, the flags of the data are set at "00," and if the decoding is not implemented, the flags of the data are set at "01," respectively. The third embodiment shown in Figs. 8A and 8B, will now be described. Whether the flags in each of the data were "00" is determined If the original flags were "00," the output flags are set at "01" which implies that the data may be possible errors. If the original flags were not "00," the output flags are set at "11" which implies that the data are errors. In this case, the data are outputted without correction. If there is C1 decoding, if the data in which the flags were "01" are decoded by the C2 decoder, the flags of the data are set at "00," and if decoding is not carried out, the flags of the data are set at "11," respectively. Referring to Figs 9A-9C, an example will now be given. Assuming that two ensures of the C1 and C2 code or one error will be corrected, if the data received/restored are C1 decoded as shown in Fig. 9A, the data shown in Fig. 9B will be obtained; the second, third, and fifth rows are outputted without correction during decoding. A box in dotted line indicates that the flags of the data in the box are set at "01." If the data shown in Fig. 9B are C2-decoded, the data shown in Fig. 9C are obtained. In addition, the fifth and the eighth columns assume that errors errors exist while the flag is "01." In this case the decoder will not operate. Referring to Fig. 9B, if error occurrence rate increases and the three rows all become erasures, then in each of the rows, there exists three erasures for the conventional decoder, so that all the data are set as "erasures"; however, the decoder according to the present invention, as shown in Fig. 9C, recognizes the flags set at "01" as normal data and decodes the data. The error correction code decoder and a method thereof according to the present invention effectively decode by recognizing error data and possible error data and correcting the errors wherein the error correction code decoder uses the erasure.

Claims: An error correction decoder, comprising: a first memory (11) for storing a received or restored original data; a syndrome calculator (12) for computing a syndrome value via an operation upon the received or restored data; a first erasure calculator (13) for computing an erasure location equation and for counting the number of flags which indicate normal data; a second erasure calculator (14) for computing an erasure location equation and for counting the number of flags which indicate error data or possible data; a selector (15) for selecting an output signal of the second erasure calculator when an output signal of the second erasure calculator (14) is in a range of error correction capacity of the decoder and for selecting an output signal of the first erasure calculator (13) when the output signal of the second erasure calculator is not in the range of error correction capacity of the decoder; an error location/size calculator (16) for computing an error location equation by operating upon an output signal of the syndrome calculator (12) and upon information received from the selector (15) for computing an error size equation for computing the error location and size from the computed error location equation and error size equation; and result output means (18) responsive to an output signal of the first memory and the error location/size calculator, for correcting errors in the data stored in the first memory responsive to an output from the error location/size calculator, for outputting a flag indicating one of error-corrected data and normal data, and for outputting a flag indicating errors or possible errors to the original data when error correction was not processed. An error correction decoder according to claim 1, comprising a second memory (17) for storing the input flags and delivering said flags to the result output means, responsive to an output of said selector (15). An error correction code decoding method, comprising the steps of: (a) judging whether a total number of flags, which indicate errors or possible errors in original data, is in a range of error correction capacity of the decoding method by counting the number of flags indicating normal data and the number of flags corresponding to error or possible error data; (b) implementing the error correction by erasing all flags corresponding to error data and possible error data when a sun of the flags, which indicate errors or possible errors, is in the range of the error correction capacity of the decoding method, and by erasing flags indicating normal data when the sum of the flags is not in the range; (c) outputting flags which indicate that all data including corrected data are normal when all errors are corrected; and (d) outputting flags, which indicate the error data, and the original data when erasures are recognized but errors associated therewith are not corrected, and outputting flags, which indicate possible errors, and the original data when each of the data is not recognized as erasures. The method of claim 3, wherein step (d) outputs: flags which indicate errors in the original data by judging whether original flags of each of the data are errors, when errors were not corrected; and flags which indicate possible errors when original flags of each of the data are not flags of error. The method of claim 3, wherein step (d) outputs: flags which indicate possible errors in the original data when original flags are normal data, by judging whether the original flags are normal data when errors were not corrected; and flags which indicate errors in the original data when original flags of each of the data are not flags of normal data.

Inventors: IM JIN HYEOCK, IM, JIN HYEOCK
Applicants: LG ELECTRONICS INC, LG ELECTRONICS INC.
Application year: 1994
Main classification: H03M13
IPC codes: H03M13, H04L1, G06F11