ELECTRONIC RADIATION IMAGING SYSTEM

Abstract: An electronic radiation imaging system with a detector unit which comprises a two-dimensional sensor element with mutual orthogonal stripes adapted to an x,y-detection and a receiver unit. A multiplicity generator in the detector unit on detecting an event generates differential signals representing the x,y position address of an event in the sensor element which are converted to analog differential signal and transmitted to receiver converted therein to a digital position address for the event said address being used in generating the radiation image. The multiplicity generator is connected to a multiplicity tester testing the validity of the x,y position address. The receiver unit may comprise a histogram generator for generating a histogram representation based on valid x,y address vectors generated in the course of a detection period.

Description: Electronic Radiation Imaging System The invention concerns an electronic radiation imaging system according to the introduction of claim 1 More specifically the invention concerns an electronic system for imaging by means of X-rays or another type of electromagnetic radiation and its use in certain radiation imaging applications Radiation imaging by means of X-rays has normally used film to record the radiation after, e.g., X-ray exposure of the object of which an image has to be obtained and also in order to provide the imaging directly In recent years elec¬ tronic detectors have been employed in order to record the radiation and display the image graphically on a display unit, e g a cathode ray tube The electronic detectors are, e g , based on photo-conductive or other photo-electric compo¬ nents The latest technique for radiation imaging has adopted charge-coupled devices From US-PS no 3 8 1 2 361 there is known a device for providing radiation imaging by means of gamma rays This device is based on a detector with electrode strips arranged in parallel on the front and back respectively of a sheet of semi-conductor material The strips on the front extend in a direction which forms an angle with the strips on the back This angle may, e g , be 90 degrees, thus making the electrode strips on each of the sides mutually orthogonal A gamma ray, I e a photon, which passes through an electrode on the front and the back respectively will thereby indicate a precise position, viz an x,y position, which is the point of intersection between the electrode concerned at the front and the back respectively The most advanced method for performing electromagnetic radiation imaging electronically is based on charge-coupled components These form a matrix of detection elements which permit a precise determination of the position of a radiation event One disadvantage is that charge-coupled components have a dissipation depth, I e a sensitivitv range, which todays commercial system is only 1 5 μm thick Since X-rays normally have very high energy, they will easily pass through the semi-conductor material, e silicon The sensitivity of the detector, eι , is dependent on the interception of as large a percentage of the X-rays as possible and it will require a much thicker dissipation depth That part of the radiation which passes through the detector cannot be used to form an image and that means that the radiation dose which is necessary in order to provide an image of a given quality can be lower in a detector with higher sensitivity, 1 e thicker dissipation depth Another disadvantage of charge-coupled components is that they e difficulty in detecting the absorption of individual photons, since the recording of such a detection will be masked by noise during the read-out and thereby be dependent on the energy of the photon This disadvantage can be mitigated to some extent by having the radiation integrated over time by a detector based on charge-coupled components However, the integration time is limited, since a charge-coupled component will only be capable of performing such an integration during a limited period of time If the integration time is too long, the charge will leak to earth and it will also be impossible to pei form a reading of a detectoi based on charge-coupled compo¬ nents at random times The object of the present invention is therefoi e to provide an electronic radiation imaging system which eliminates the above-mentioned disadvantages and in addition can provide a very good protection against noise These obiects are achieved with an electronic radiation imaging system according to the invention and characterized by the features presented in the characterizing portion of claim 1 Other features and advantages are described in the dependent claims, while some desirable applications are disclosed in the appended claims of use The invention will now be described in more detail with reference to the drawing Fig 1 is a design of a complete electronic radiation detector according to the present invention Fig 2 shows details of the electronics in the detector unit Fig 3 is a block diagram of the central components of the electronic radiation detector according to the invention Fig 4 shows signal forms formed at different stages of the electronic radiation imaging system din ing approximate coincidence of three events or photons in, e LI an x direction in the detector Fig 1 illustrates an electronic radiation imaging system according to the present invention A detector element 1 is made of semi-conductor material and has parallel strips arranged on the front and back respectively and preferably in such a manner that the parallel strips on each of the sides are mutually orthogonal The semi-conductor material in the detector element may preferably be silicon Each of the strips constitutes a diode which is biased in the reverse direction When, e g a charged particle or electromagnetic ray (photons) is absorbed in the detector, an electrical signal is created in the semi-conductor and recorded by a strip diode on the front and a strip diode on the back respectively This gives an x,y position for the point in the detector where the coincident absorption event takes place Each of the stnp diodes constitutes a detection channel which is connected with electronic front-end cii cuits 2 There can. e g - be such a front-end circuit 2 foi all the strip diodes in the x du ection, I e on the front of the detectoi element 1 and a front-end circuit for all strip diodes in the y direction, i e on the back of the detector element 1 Howevei , as shown in fig 1 , the front-end circuits can also be composed of a number of separate circuits The front-end circuits consist of a number of parallel amplifier channels If, e g , there are M strip diodes in the x direction and N strip diodes in the y direction, the number of parallel amplifier channels is M+N and divided between two or more front-end circuits 2b and 2f respectively in the x direction and the y direction respectively The front-end circuits 2b. 2f ai e provided together with the detector 1 and preferably provided on the same hybrid chip The width of the amplifier channels is adapted, I e equal to the width of the strip diodes The design of the front-end circuits is illustrated in more detail in fig 2 Each front-end circuit is monohthically integrated and comprises as illustrated in fig 2 an amplifier 1 connected to a first input of a discriminator 2 whose second input receives a signal f foi adμistment of the disci lmmator's threshold voltage The output of the discrimmatoi 2 is connected to an input of a monostable flip- flop 3 A monolithic integrated cπ cuit comprises a plurality of amplifier channels 4 The output of the monostable flip-flop 3 is connected to inputs of a multiplex generatoi 5 and inputs of a digital/analog converter 6 respectively Furthermore the digital/analog converter 6 can be connected to a memory, e g in the form of a read-onlv memory which contains a circuit address This will be relevant if the front-end electronics as mentioned consists of several circuits which each then ι es its own addi ess stored in the memorv 7 The discriminator 2 and the flip-flop 3 together form the comparator of an amplifiei channel The output of the flip-flop 3 can be connected to a reset device (not shown) such that the system may be reset after a certain time In each amplifier channel there can also between the amplifier 1 and the comparator 2,3 be provided in fig 2 a not shown pulse amplitude detector which detects the pulse amplitude of the output signal fi om the amplifiei in the form of an analog pulse amplitude signal which is output on a separate pulse amplitude output This pulse amplitude output is illustrated in fig 1 and indicated by P The pulse amplitude signal P is in analog form and thus does not need to be converted in the front-end cn cuit's digital/analog converter, but makes it necessary to use the above-mentioned reset device The signal processing in the front-end circuits l e in each amplifiei channel will now be descnbed in more detail with referen¬ ce to figs 1 and 4 i espectiv eh The amplifiei in each channel produces a signal a as shown in fig 4 The signal a mav. hav e the for m of an approximately hai monic pulse with a steep leading edge and a much moi e slowly falling trailing edge In fig 4 thei e ai e illustrated 3 events, I e an approximately coincident detection in thi ee channels u, v and w in, e g , an x direction The set threshold value of the disci lmmatoi 2 is lllusti ated by a dotted line When the pulse value exceeds the threshold value, the output signal b from the disci iminator causes the monostable flip-flop 3 in fig 2 to produce a square pulse c of a predetei mined duration These tnggei pulses C are similarly shown foi each of the channels u, v , w m, e g , an x du ection in fig 4 and represent the same three approximately coincident ev ents which cause signal a to be pi oduced b\ the detectoi The dui ation of the trigger pulse can be adμisted v ia a not shown input of the monostable flip-flop 3 If there now on the output of the flip-flop 3 a is pi ovided reset device which resets the amplifiei channel at a stipulated time after the output signal C has been ti ansmitted, this t eset dev ice can be pi ogi ammed in such a manner that the l eset signal is given at a pi edetermmed time aftei the amplifier channel was triggered Thus the reset condition is generated automatical and internally after the amplifiei channel is activ ated, thei eby ensuring that there is always sufficient time to iead any analog signal such as, e g . a pulse amplitude value P The pulse signal c on the output from an amplifiei channel is transmitted to a multiplicity genei atoi 5 m fig 2 On the basis of the trigger pulses c as shown in fig 4 this multiplicitv genei ator 5 genei ates so-called multiplicity signals These multiplicitv signals ai e diffei ential signals pi eferabh a differential cui rent which is pi opoi tional to the numbei of tnggei ed amplifiei channels the x and y directions respectively This is clearly illustrated in fig 4 which shows the multiplicity signal's proportionality with approximately coincident trigger signals c This differential signal is transmitted, e g , in the form of the differential current signal e on the output from the multiplicity generator 5 in fig 2 The trigger signals c from each channel are also transmitted to a digital/analog converter 6 in fig 2 This generates a differential signal which represents the position address of a triggered channel 4 The digital/analog converter 6 can work in current mode when it then transmits a differential current signal as position address If the digital/analog converter is connected to a memory for the circuit addresses, the circuit address of the circuit in which the triggered channel is located is led to the convertei and added to the position address, I e the channel address In the case in question, viz with a digital/analog converter working in current mode, the circuit address is added to the channel address as a current contribution (most significant bit) The position addresses or channel addresses can be generated combinatoπcally in the digital/analog converter 6 in fig 2, thus enabling the current address which is thereby found to be stored in the form of data words in a table The data words' bit length m,n will be determined by the numbei of channels, I e M+Ν, so that 2"' = M and 2" = Ν The position address with added circuit address is converted to a differential analog signal d which is provided on the output from the digital/analog converter 6, as illustrated in fig 2 and is transfei red as a data signal on an address bus, the data signal being illustrated in fig 4, to the imaging system's receiver unit This l eceiver unit is indicated by 5 in fig 3 and comprises the components 3, 4, 5 and 6 m fig 1 Thus it can be seen that with the electronic imaging system according to the present invention the comparatoi s 2, 3 in each amplifier channel 4 in fig 2 will continuously detect the amplified and filtered signal a which is produced on the output of the amplifier 1 When the signal strength crosses the externally adjust¬ able threshold voltage of the comparator, the comparator will change In other words the system is self-ti lggeπng Moreover the trigger signal from the flip- flop 3 can also be used to ensure that the information acquired by the detector unit, e g the position oi an analog pulse amplitude value is made available to a data acquisition svstem which is connected to the detectoi A system is concei able vvhei em an amplifier channel or a front-end circuit which is triggered, ti ansmits an inteπ upt signal to the data acquisition unit and thereafter a digital address is produced on the front-end circuit's output which can be read by the data acquisition unit When the data acquisition unit has read the address, it transmits a reset signal to the circuit with the message that the read-out is now over This conception however, presents a number of problems The logical address which is obtained by a logic voltage transfer together with the reset signal which also has a logic voltage transition, generates noise in the environment and this may be recorded by the amplifier inputs which are charge- sensitive This causes problems if the threshold voltage in the comparator is set too low, while a higher threshold voltage will set a limit to the level for those signals which can be detected However, the point of the exercise is to detect as small signals as possible Furthermore a reset via the data acquisition unit might cause a restriction of the speed of the detection rate In the present invention, on the other hand, an analog differential signal is transmitted which uniquely represents a channel address This signal can be an analog voltage or preferably an analog current Instead of the circuit receiving an external reset signal aftei reading the data, a reset position is generated automatically after a certain time internally in the circuit That means that any analog data are kept on the outputs from the amplifier channels during a period which can be controlled externally and is sufficient for reading the data If at the same time a channel I in a front-end circuit is triggered, the cii cuit will also generate an extra analog signal, preferably in the form of a current signal which is proportional to the numbei of channels which are encountered in an x direction or a y direction respectively This signal is generated in the multiplicity generator 5 in fig 2 and is called the multiplicity signal This is particularly important if several amplifiei channels or front-end circuits are connected in parallel In this case the signal from all channels or circuits will be connected in such a way that it is also possible to find out whether there is more than one signal at the same time in all circuits This is illustrated in more detail in fig 4 where it can be seen that the combination of the multiplicity signal with the channel address which is generated on the address bus from the digital/analog converter 6 can be used in order to create a valid data signal in the form of three non-coincident address signals which represent the address of each of the triggered amplifier channels, u. v , w in, e g , an x direction It can be seen that all the signals produced by the detector unit ai e l eceiv ed in the form of analog signals, pi eferabh current signals These are shown in fig 1 as an optional analog pulse amplitude value P, an analog position address A and the analog multiplicity signal MU These signals are transmitted to the radiation imaging system's receiver unit which in fig 1 comprises the components 3, 4, 5, 6 The receiver unit is also partly illustrated in more detail in fig 3 and indicated by 5 As shown in fig 1 the receiver unit comprises an analog/digital converter 3 which receives the analog address signal a and the multiplicity signal M U of an amplifier channel in the x direction and an amplifier channel in the y direction respectively, as illustrated in more detail in fig 3 where the analog address signal is indicated by a and the analog multiplicity signal by b It will be understood that the receiver unit can be provided at a great distance from the detector unit The receiver unit can also comprise an analog/digital converter 6 as shown in fig 1 in order to convert the analog pulse amplitude signals P to digital signals in the form of a k-bits data word which is transferred to the computer interface 5 The channel addresses or position addresses are converted to digital position addresses in the analog/digital converters in the interface 3 in fig 1 and in fig 3 are shown indicated as an m-bits signal and an n-bits signal respectively on the output from the converters The receiver unit 5 in fig 3 also comprises a multiplicity tester which tests the validity of the x position address and the y position address, whereafter the approved addresses are combined to form a two- dimensional address vector M+ which represents the x,y position of an event in the detector, and a multiplicity testei 3 in fig 3 is connected to the output of the multiplicity generatoi 5 in fig 2 and generates the valid addi ess signal as illustrated at the bottom of fig 4, this valid address signal being added to the address vector M+N in a combinator which is shown in fig 3 and comprises the AND circuits 4 connected to the output of the multiplicity testers 3 and the ana¬ log/digital converters 2 which provide the digital address signal respectively The multiplicity testei 3 also transmits a validity signal d to the computer interface 5 (fig 1 ) The valid address vector M+N is generated in the form of the digital signal c on the output from the l eceiver unit 5 in fig 3 and transferred to a computei interface, I e the input of a data processing unit which is used to generate a l adiation imaging as l ecorded by the detectoi unit This can be implemented, e g , by the image being built up directly in the form of a matrix with pictui e elements as indicated bv the two-dimensional address vectoi M+N, this address v ectoi which represents the x,y position in the detectoi unit uniquely indicating the pixels w hich hav e to be used to generate the radiation lmamm The multiplicity signal MU may also be recorded by each channel or front-end circuit, blocking these from transmitting data to the receiver unit if the multiplicity signal is greater than 1 , which indicates that another channel circuit already has claimed the common information bases, thus enabling the attainment of a larger speed/data rate If, however, a very high detection rate is used, the computer which is used to generate the completed image for display may not have the capacity to receive the large quantity of information In this case the problem can be solved by extending the receiver part with a histogram generator 4 as illustrated in fig 1 This histogram generator consists of a memorv with 2'" ", where 2m = M and 2" = N, storage cells and a simple arithmetical counter It receives the address vector M+N from the combinator device in the receiver unit and reads out a numerical value stored in the cell which is assigned to the respectiv e address vector M+N This value corresponds to the number of times a specific address vector M+N is received, I e the number of times in the course of a detection period that an event has occurred in the x,y position in the detectoi" corresponding to the address vector M+N The event count in the storage cell concerned is transferred to the arithmetical counter which increments the number by 1 and returns it to the same cell Thereafter the histogram generator can receive a new address vector M+N and the process is repeated sequentially until all the address vectors generated during a detection period have been received Thus it will be seen that in the course of the detection period the cells in the memory will each be filled with histogram values which represent the number of events which have occurred in a specific x,y position in the detector The image is hence also gradually built up in the course of the detection period When the detection period is over or there is considered to be sufficient data to generate an image of the desired quality, the histogram values, I e the contents of the histogram generator's memory will be transferred to the computer and read into it in order to generate the imaging for display As already mentioned, there are capacity problems with regard to the data rate which can make it desirable to use a histogram generator If the data rate runs into several M Hz, it is virtually necessary to use a histogram generator in preference to direct l eading of the address vectors M+N to the computer In a practical embodiment the actual detector element can be designed with orthogonal strip diodes and a distance of 1 00 μm between each strip One possible arrangement could be, e g . 1 92 strip diodes in the x direction and 256 strip diodes in the y direction, these numbers being integer multiples of 64 and the number of amplifier channels in each front-end circuit can therefore in practice be fixed, e g , at 64, thus facilitating the combinatoπca! generation of channel addresses Thus approximately 48,000 intersection points are also obtained between the orthogonal strip diodes, I e pixels which each correspond to an x,y position All of this will be enable implementation on a detector surface of 1 92 x 2 56 cm A practical application foi a detector of this kind would be in dental radiography, since it is no larger than the films which are normally used for this purpose Further the electi onic radiation imaging system according to the present invention may be advantageously applied to mammography, in a labratory camera for small laboratory animals for, to biomedical tissue imaging for mapping DNA structures, in a measurement apparatus for radiation dosimetry and surveillance, and to X-rav crystallgi aphic imaging An electronic l adiation imaging unit according to the present invention will have a a wide range of applications where X-ray based radiography is required However, its application is not necessarily restricted to X-raying, since it can also be adapted to suit othei types of high energy electromagnetic radiation or possibly also foi image-generation based on the absorption of particles, I e pure particle radiation A number of such variations will be obvious to a person skilled in the art and will be capable of implementation within the scope of the attached claims

Claims: PATENT CLAIM S 1 An electronic radiation imaging system with a detector unit and a receiver unit, wnerein the detectoi" unit comprises a two-dimensional sensor element made of a semi-conductoi material and with a front and a back, wherein these on the front are provided M parallel stripes and on the back N corresponding parallel strips orientated at an angle to the M parallel stripes on the front, preferably at an angle of 90 degrees, the detector element thus forming an orthogonal x,y detector, wherein each of the M+N strips constitutes a diode which is biased in the l everse direction, and M+N parallel amplifier channels connected with each of the M+N diodes respectively, wherein each amplifiei channel comprises an ampl ifiei connected to a self-triggering comparator, the amplifiei channels thus constituting one oi moi e monolithicalh integrated front- end circuits which foi m a read-out dev ice, characterized in that the self-ti iggei ing comparator in each amplifier channel comprises a discriminator and a monostable flip-flop, a first input of the discriminator being connected to the output of the amplifier, a second input of the discriminator to the receiver unit for external adjustment of the discrimin¬ ator's threshold voltage and an input on the monostable flip-flop to the output of the discriminator, that the detector unit comprises a multiplicity generator with M+N inputs connected to each of the M+N amplifier channels respectively via the output of the monostable flip-flop, the multiplicity generator being arranged to generate first differential signals for the x and y directions respectively with values proportional to the numbei of tnggei ed amplifier channels M , N in each direction and provide the first differential signals at its output, that the detector unit comprises a digitahanalog convei ter with M+N inputs which similarly are connected to each of the M-'-N amplifier channels v ia the output of the monostable flip-flop and adapted to generate second differential signals which represent the addi ess of a tnggei ed amplifiei channel and to provide the second differential signals in the foi m of an analog channel address signal at its output, that the receiver unit constitutes an analog/digital interface connected to the output of the multiplicity generator and the digital/analog converter respectively in the detectoi unit, that the analog/digital interface comprises two analog/digital converters which receiv e and conv ert the channel address signals of respectively first and second digital position addresses w hich represent an x position corresponding to a tnggei ed M channel and a v position coπ esponding to a tnggered N channel l espectiv eh . a multiplicitv tester connected to the output of the multiplicitv genei atoi and the outputs of the analog/digital conv erters respectively, the multiplicity tester determining whether the channel addresses m,n are a valid x,y position address, and a combinator device connected with the output of the analog/digital converters and the multiplicity tester in order to combine the x position address and the y position address respectively to form a two-dimensional address v ector m+n which represents the x,y position in the detector unit, and at its output provides a valid address vector m+n to a data processing device for generation of the imaging recorded by the detector unit 2 An electronic imaging system according to claim 1 , characterized in that there is provided in the amplifier channel or in the amplifier and in parallel with the comparator a pulse amplitude detector, the pulse amplitude detector being adapted to detect the pulse amplitude of the amplifier signal in a triggered channel in the form of an analog pulse amplitude signal and ti ansmit the analog pulse amplitude signal to an output for the pulse amplitude detected in one of the M and Ν amplifier channels respectively, and that the detectoi unit's pulse amplitude outputs are connected to the input of corresponding analog/digital conv erters in the receiver unit, the pulse amplitude signals there being converted to digital signals k and transferred to the data processing device 3 An electronic radiation imaging system according to claim 2, wherein the receiver unit comprises a pulse amplitude detector, characterized in that on the output of the monostable flip-flop there is provided a programmable reset device for a reset of the amplifier channel which may take place at a stipulated time after the amplifier channel has been triggered, thus pi oviding a period sufficient for detecting any analog data such as a pulse amplitude signal the receiver unit, said stipulated time being externally adjustable 4 An electronic l adiation imaging system according to claim 1 , wherein the receivei unit compnses two or moi e front-end circuits which form the read-out device, chai acteπzed in that each front-end circuit is assigned a circuit address stored in an internal i ead only memoi v connected to the digital/analog converter for read-out, the circuit addi ess being combined with the differential signal which represents the address of a tnggered amplifier channel in the front-end circuit concerned 5 An electronic radiation imaging system according to claim 1 , characterized in that the multiplicity tester comprises a comparator device 6 An electronic radiation imaging system according to claims 1 -5, characterized in that the receiver unit further comprises a histogram generator whose input is connected to the output of the multiplicity tester and the output of the data processing dev ice, that the histogram generator comprises a memory with 2 n,~n storage cells and an arithmetical counter, since 2"' = M and 2" = N, and each of the 2'" " storage cells is assigned a respective valid address vector m+n for an x,y position and adapted for storing via the counter a numerical value corresponding to the number of times the respective valid address vector is generated in the course of a detection period 7 Use of an electi onic radiation imaging system according to claims 1 -6, in a dental radiography apparatus 8 Use of an electronic radiation imaging system according to claims 1 -6 in a mammographic apparatus 9 Use of an electronic radiation imaging system according to claims 1 -6 in a radiation apparatus for laboratory animals 1 0 Use of an electronic radiation imaging system according to claims 1 -6 in biomedical tissue imaging, paiticularly for the mapping of DNA structures 1 1 Use of an electronic radiation imaging system according to claims 1 -6 in an apparatus for radiation dosimetry and surveillance 1 2 Use of an electronic l adiation imaging system according to claims 1 -6 in an apparatus f r X-ray crystallographic imaging

Inventors: NYGAARD EINAR, NYG ANGSTROM RD, EINAR
Applicants: INTEGRERT DETEKTOR OG ELEKTRON, NYGAARD EINAR, INTEGRERT DETEKTOR OG ELEKTRONIKK AS, NYG ANGSTROM RD, EINAR
Application year: 1994
Main classification: H04N5
IPC codes: H04N3, H04N5