Photonic frequency routing type time division highway switch

Abstract: A photonic frequency routing type time division highway switch which requires no conflict control at the input side, and incorporates no inherent splitting loss of the optical signal power. The switch is formed by a plurality of tunable frequency convertors (3-2-1 to 3-2-M) for allocating frequency channels to the optical signals on the input highways at each timeslot; a frequency router for connecting the optical signals outputted from the frequency convertors to its outputs according to the frequency channels allocated to the optical signals at each timeslot; and a plurality of frequency multiplexed output buffers (3-4-1 to 3-4-M) for outputting the optical signals outputted from the frequency router to the output highways such that a plurality of optical signals with different frequency channels which are in an identical timeslot are outputted at different timeslots.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a time division highway switch in general, and more particularly to a photonic frequency routing type time division highway switch which can be used as a self-routing switch in a photonic ATM switching system. Description of the Background Art . A conventionally known M × M photonic frequency routing type time division highway switch has a typical configuration as shown in Fig. 1, which comprises: M input highways 1-1-1 to 1-1-M connected to an input side of a M × M star coupler 1-3 through M frequency convertors 1-2-1 to 1-2-M, and M output highways 1-5-1 to 1-5-M connected to an output side of the star coupler 1-3 through M fixed filters 1-4-1 to 1-4-M. In this configuration, each frequency convertor assigns a frequency channel corresponding to a desired output highway for time divisional optical signals at each timeslot on each input highway connected with it. The optical signals on the input highways 1-1-1 to 1-1-M are then optically coupled together by the star coupler 1-3, and the coupled optical signals are equally split among the output highways 1-5-1 to 1-5-M. Each fixed filter connected with each output highway takes out only the optical signal of the frequency channel corresponding to each output highway connected with it out of the supplied coupled optical signals and outputs it to the output highway connected with it. In this manner, the switching operation is realized in this conventional photonic frequency routing type time division highway switch by assigning the frequency channel at the frequency convertor. Now, such a conventional photonic frequency routing type time division highway switch has been associated with the following problems. (1) In a case it is necessary to connect two optical signals on different input highways to the same output highway simultaneously, the same frequency channel is going to be assigned to both of these optical signals. Consequently, these two optical signals are going to conflict with each other at the star coupler 1-3, i.e., a routing of more than one optical signals with the same frequency is going to be requested at the same timeslot, so that there is a need to carry out the conflict control at the input side in advance in order to reject such conflicting requests. (2) The optical signals inputted into the star coupler 1-3 are going to be equally split and distributed among all the output highways 1-5-1 to 1-5-M connected to the star coupler 1-3. For this reason, the optical power of each input optical signal is going to be attenuated to 1/M on each output highway, where M is a total number of the output highways 1-5-1 to 1-5-M. In other words, the conventional photonic frequency routing type time division highway switch inherently incorporates the splitting loss of the optical signal power. On the other hand, a conventionally known photonic buffer memory has a typical configuration as shown in Fig. 2, which comprises M opto-electronic convertors 2-1-1 to 2-I-M connected with M input ports I-1 to I-M, an electronic memory 2-2 formed by elements such as shift registers connected with the opto-electronic convertors 2-1-1 to 2-1-M, and an electro-optic convertor 2-3 connected with the electronic memory 2-2 and an output port 0. In this configuration, the optical packet signals inputted from the input ports I-1 to I-M are converted into electrical signals by the opto-electronic convertors 2-1-1 to 2-1-M, and stored in the electronic memory 2-2 in forms of the electrical signals. Then, the stored signals are converted into optical signals by the electro-optic convertor 2-3, and outputted to the output port 0. Now, in such a conventional photonic buffer memory, the optical packet signals must be converted into the electrical signals once, so that the bandwidth of the optical packet signals that can be handled is going to be limited by the characteristics of the convertors and the memory, and it has been difficult to handle the high speed optical signals such as the optical pulses with a pulse width in an order of picoseconds. The article "Photonic Frequency Division Switching Technologies" by K. Habara and K. Sasayama, NTT Review, Vol. 5, No. 1, January 1993, Tokyo, Pages 55 - 61, XP338577 shows a TDM switching system that is a photonic time-division switch using frequency multiplexed links. A frequency conversion takes place that converts signals every time-slot, and a delay circuit controls the delay time of a signal according to its carrier frequency. For every time-slot, the switch exchanges time-slots by converting each signal into another signal that has the carrier frequency corresponding to the desired delay time. The purpose of this arrangement is to avoid so-called traffic block, where a traffic block occurs when two input signals of the same frequency having the same time-slot arrive at an output simultaneously. The traffic block is avoided by distinguishing the same time-slot according to carrier frequency. From "Multiwavelength Networks And New Approaches To Packet Switching" by M. S. Goodman, IEEE Communications Magazine Vol. 27, No. 10, October 1989, Piscataway NJ USA, Pages 27 - 35, XP67215 a variety of multiwavelength networks and associated packet switching methods are known. It is mentioned that multiwavelength switches can be grouped into two broad classes, namely switches based on the broadcast-and-select approach or switches based on active wavelength routing of the packets. It is described that in active routing the packet headers are processed to determine to which output port a given packet is destined, and the packet is accordingly routed. This document also describes a so-called fast optical cross-connect (FOX). The FOX associates a unique wavelength address at both the input and output ports. Packets arriving at an input port have their desired output port address decoded, and are transmitted to the desired output port after tuning their single frequency laser transmitter to the desired output port wavelength address. If more then one packet arrives at a given output port in a transmission time-slot, then a collision occurs. This document furthermore describes a so-called coherent λ switch. In such a switch, a signal is first split, then converted into an electrical signal, and then again multiplexed. A system is shown, which uses inter-stage network demultiplexers and multiplexers that fulfil a switching function. EP-03 133 89 B1 describes an optical packet switching system. The described system has a packet switch with a plurality of incoming lines and a plurality of outgoing lines, which are connected to a switching processor. The switching processor contains two-by-two optical switches. Summary of the invention An object of the present invention is to provide a more efficient photonic frequency routing type time division highway switch that requires no conflict control at the input side, and incorporates no inherent splitting loss of the optical signal power. This object is solved by arrangements as described in the independent claims of the present application. Advantageous embodiments are described in the respective dependent claims. Other features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic block diagram of a conventional M × M photonic frequency routing type time division highway switch. Fig. 2 is a schematic block diagram of a conventional photonic buffer memory. Fig. 3 is a schematic block diagram of one embodiment of a photonic frequency routing type time division highway switch according to the present invention. Fig. 4A is an equivalent circuit diagram of a frequency router in the configuration of Fig. 3. Fig. 4B is a table indicating the frequency channel corresponding to each input and output highway pair in the frequency router of Fig. 4A. Fig. 5 is a schematic diagram of an arrayed waveguide grating multiplexer filter suitable for the frequency router in the configuration of Fig. 3. Fig. 6 is a block diagram of a tunable frequency convertor used in the configuration of Fig. 3. Fig. 7 is a block diagram of a frequency multiplexed output buffer used in the configuration of Fig. 3. Fig. 8 is a block diagram of one input one output FIFO buffer used in the configuration of Fig. 7. Fig. 9 is a schematic block diagram of one modified configuration for the frequency router in the configuration of Fig. 3. Fig. 10 is a schematic block diagram of one modiied configuration for the photonic frequency routing type time division highway switch according to the present invention. Fig. 11 is a schematic block diagram of another modiied configuration for the photonic frequency routing type time division highway switch according to the present invention. Fig. 12 is a block diagram of a frequency selector used in the modified configuration of Fig. 11. Fig. 13 is a block diagram of a photonic buffer memory configuration suitable for a frequency multiplexed output buffer used in the configuration of Fig. 3. Fig. 14 is a block diagram of a modified photonic buffer memory configuration suitable for a frequency multiplexed output buffer used in the configuration of Fig. 3. Fig. 15 is a schematic diagram of a wavelength allocation network used in the configuration of Fig. 13. Fig. 16 is a diagram indicating inputs and outputs of an adder in a running adder network used in the configuration of ig. 15. Fig. 17 is a schematic diagram of an optical routing network used in the configuration of Fig. 13. Fig. 18 is a diagram indicating flows of optical packets within the configuration of Fig. 17. Fig. 19 is a block diagram of a fixed wavelength convertor used in the configuration of Fig. 13. Fig. 20 is a block diagram of a tunable wavelength convertor used in the configuration of Fig. 13. Fig. 21 is a block diagram of an optical loop buffer used in the configuration of Fig. 13. Fig. 22 is a block diagram of a wavelength selective 1 × 2 switch used in the configuration of Fig. 13. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to Fig. 3, one embodiment of a photonic frequency routing type time division highway switch according to the present invention will be described. In this embodiment, the photonic frequency routing type time division highway switch has a configuration as shown in Fig. 3, which comprises: M input highways 3-1-1 to 3-1-M connected to an input side of a M × M frequency router 3-3 through M tunable frequency convertors 3-2-1 to 3-2-M, and M output highways 3-5-1 to 3-5-M connected to an output side of the frequency router 3-3 though M frequency multiplexed output buffers 3-4-1 to 3-4-M. In this configuration of Fig. 3, the optical cells on each of the input highways 3-1-1 to 3-1-M are assigned with prescribed frequency channels at each timeslot by one of the tunable frequency convertors 3-2-1 to 3-2-M provided on each input highway. Here, the prescribed frequency channels to be assigned to the optical cells are those which correspond to the output highways for each input highway as will be more fully described below. Then, the frequency router 3-3 at which the input highways 3-1-1 to 3-1-M are bundled together outputs each incoming optical cell to a prescribed one of the output highways 3-5-1 to 3-5-M according to the frequency channel assigned to each optical cell. For instance, the optical cells "A" and "G" on the 0-th input highway 3-1-1 assigned with the frequency channel f ⊘ are outputted to the 0-th output highway 3-5-1, and the optical cells "E" and "H" on the 1st input highway 3-1-2 assigned with the frequency channel f i are also outputted to the 0-th output highway 3-5-1, and so on. Here, in general, the suffix i of the frequency channel f i entering from the j-th input highway 3-1-j and outputted to the k-th output highway 3-5-k can be expressed as the residue system of base M, i.e.: i = (j + k) modulo M In order to indicate the frequency channels which determine the input and output highway connections at the frequency router 3-3, the equivalent circuit diagram of this frequency router is shown in Fig. 4A while the frequency channel corresponding to each input and output highway pair is tabulated in Fig. 4B. The circuit configuration of Fig. 4A comprises M demultiplexers 4-2-1 to 4-2-M connected with the input highways 4-1-1 to 4-1-M, respectively, M multiplexers 4-4-1 to 4-4-M connected with the output highways 4-5-1 to 4-5-M, respectively, and M 2 internal links 4-3-1 to 4-3-M 2 interconnecting the demultiplexers 4-2-1 to 4-2-M with the multiplexers 4-4-1 to 4-4-M so as to realize the relationship of the above equation (1) which is summarized in the table of Fig. 4B. Here, the optical cells on the input highways which are going to be connected with a particular output highway have mutually different frequency channels, so that they can be distinguished from each other even when they arrive simultaneously. Those optical cells which are arriving at the frequency router 3-3 simultaneously are subsequently outputted to different timeslots by the frequency multiplexed output buffers 3-4-1 to 3-4-M. This frequency router 3-3 can be realized by using an arrayed waveguide grating filter shown in Fig. 5, as disclosed in Japanese Patent Application Laid Open No. 2-2444105 (1990), which comprises: M input optical waveguides 5-1-1 to 5-1-M, M output optical waveguides 5-5-1 to 5-5-M, and an arrayed waveguide grating 5-4 connected with the input optical waveguides 5-1-1 to 5-1-M through a slab shaped optical waveguide 5-2 and with the output optical waveguides 5-5-1 to 5-5-M through a slab shaped optical waveguide 5-3. The frequency multiplexed optical cells entering from each of the input optical waveguides 5-1-1 to 5-1-M are diffracted by the slab shaped optical waveguide 5-2, and entered into the arrayed waveguide grating 5-4. Here, due to the non-interference property of the lights, the optical cells entering from a plurality of input optical waveguides 5-1-1 to 5-1-M at the slab shaped optical waveguide 5-2 are going to be entered into the arrayed waveguide grating 5-4 independently from each other. The arrayed waveguide grating 5-4 comprises a sufficient number of channel waveguides for receiving all the input lights spread out by the diffraction, where the channel waveguides have mutually different lengths so as to function as a diffraction grating. Namely, at this arrayed waveguide grating 5-4, the optical cells in different frequencies are propagated through the arrayed waveguides, and deflected into directions corresponding to the respective frequencies. Then, each optical cell is independently converged onto the output optical waveguides 5-5-1 to 5-5-M by the slab shaped optical waveguide 5-3. Here, due to the angular dispersion of the arrayed waveguide grating, the converging positions are different for different frequencies. In this manner, a filter in which the input and output optical waveguide connections are different for different frequencies can be constructed. Since this filter is the optical passive circuit, the assignment of the frequency channels shown in Fig. 4B can be determined by its reciprocity. In addition, this filter is loss free in principle. Each of the tunable frequency convertors 3-2-1 to 3-2-M has an exemplary configuration shown in Fig. 6, which comprises: an input highway 6-1 before the frequency conversion, a splitter 6-2 connected with the input highway 6-1, photo-detectors 6-3 and 6-4 connected with the splitter 6-2, a header analyzer 6-5 connected with the photo-detector 6-3, a tunable frequency semiconductor laser 6-6 connected with the header analyzer 6-5, an optical intensity modulator 6-7 connected with the photo-detector 6-4 and the tunable frequency semiconductor laser 6-6, and an input highway 6-8 after the frequency conversion which is connected with the optical intensity modulator 6-7. In this configuration of Fig. 6, time division signals entered from the input highway 6-1 are split by the splitter 6-2, and converted into high speed electrical signals by the photo-detectors 6-3 and 6-4. The electrical signals obtained by the photo-detector 6-4 are then used for driving the optical intensity modulator 6-7. On the other hand, the electrical signals obtained by the photo-detector 6-3 are supplied to the header analyzer 6-5, at which the header portion of the signals alone is separated and analyzed, and a control signal corresponding to the frequency channel of the destination is generated according to the analysis of the separated header portion. Then, the obtained control signal is supplied into the tunable frequency semiconductor laser 6-6 so as to generate a laser beam of the prescribed frequency specified by the control signal at each timeslot. Then, the laser beam supplied from the tunable frequency semiconductor laser is modulated at the optical intensity modulator 6-7 according to the electrical signals supplied from the photo-detector 6-4. Here, the entire frequency convertor may be constructed optically, if an optically controllable optical intensity modulator, or a tunable frequency semiconductor laser that can be optically controlled to directly modulate the generated laser beam, is used. Each of the frequency multiplexed output buffers 3-4-1 to 3-4-M has an exemplary configuration as shown in Fig. 7, in which a one input one output FIFO buffer is provided for each frequency channel. More specifically, this configuration of Fig. 7 comprises: an input signal line 7-1, a demultiplexer 7-2 connected with the input signal line 7-1, optical waveguides 7-3-1 to 7-3-M connected with outputs of the demultiplexer 7-2, signal discarding lines 7-4-1 to 7-4-M for discarding signals from the optical waveguides 7-3-1 to 7-3-M, respectively, one input one output FIFO buffers 7-5-1 to 7-5-M connected with the optical waveguides 7-3-1 to 7-3-M, respectively, an M × 1 switch 7-6 connected with outputs of the one input one output FIFO buffers 7-5-1 to 7-5-M, and an output highway 7-7 connected with an output of the M × 1 switch 7-6. In this configuration of Fig. 7, the frequency multiplexed buffer input signals are demultiplexed by the demultiplexer 7-2 and distributed to the optical waveguides 7-3-1 to 7-3-M for respective frequency channels. The time divisional signals of each frequency channel are then buffered by the respective one input one output FIFO buffers 7-5-1 to 7-5-M connected with the optical waveguides 7-3-1 to 7-3-M. The M × 1 switch 7-6 selects only one of the output signals of the one input one output FIFO buffers 7-5-1 to 7-5-M and outputs the selected output signal to the output highway 7-7. Here, each of the one input one output FIFO buffers 7-5-1 to 7-5-M can be constructed in a configuration shown in Fig. 8, as described by R.A. Thompson in "Optimizing Photonic Variable-Integer-Delay Circuits", Topical Meeting on Photonic Switching, March 18-20, 1987, pp. 141-143. More specifically, this configuration of Fig. 8 comprises: an input line 8-1, 1 × 2 switch 8-2 connected with the input line 8-1, a signal discarding line 8-3 connected with the 1 × 2 switch 8-2, a plurality of 2 × 2 switches 8-4-1 to 8-4-R connected in series with the output of the 1 × 2 switch 8-2, loop shaped optical waveguides 8-5-1 to 8-5-R attached to the 2 × 2 switches 8-4-1 to 8-4-R, respectively, and an output line 8-6. In this configuration of Fig. 8, each of the loop shaped optical waveguides 8-5-1 to 8-5-R has a circumferential length equal to a unit length for switching of the signals, such that each loop functions as one buffer. The 2 × 2 switches 8-4-1 to 8-4-R are controlled such that any newly arriving signal is stored in an empty loop closest to the output side, and whenever the signal stored at the last (closest to the output side) loop 8-5-R is outputted, all the other signals stored in the other loops are forwarded to next loops. The signal arriving when all the loops are filled by the signals is going to be discarded by the 1 × 2 switch 8-2 through the signal discarding line 8-3. In the photonic frequency routing type time division highway switch of this embodiment as described above, the frequency router 3-3 is only connecting the optical signals entered from a plurality of input highways 3-1-1 to 3-1-M to the output highways 3-5-1 to 3-5-M in units of the frequency channels, and not distributing the input signals to the output highways 3-5-1 to 3-5-M. Consequently, in principle, the optical signals can be transmitted without any loss. In addition, the signals from the different inputs to the same output always have different frequency channels, so that there is no need for the conflict control at the input side because each of the frequency multiplexed output buffers 3-4-1 to 3-4-M outputs the signals on the same timeslot at the different timeslots. Thus, according to this embodiment, it is possible to provide a photonic frequency routing type time division highway switch which requires no conflict control at the input side, and incorporates no inherent splitting loss of the optical signal power. Now, the modifications of the above embodiment will be described. Fig. 9 shows a modified configuration in which a multi-terminal frequency router is constructed by connecting a plurality of unit frequency routers each of which has a limited number of terminals. More specifically, this configuration of Fig. 9 comprises: MN pieces of input highways 9-1-1 to 9-1-MN, N pieces of M × M frequency routers 9-2-1 to 9-2-N connected with the input highways 9-1-1 to 9-1-MN, M pieces of N × N frequency routers 9-4-1 to 9-4-M cross-connected with the M × M frequency routers 9-2-1 to 9-2-N through internal links 9-3-1 to 9-3-MN, and MN pieces of output highways 9-5-1 to 9-5-MN connected with the N × N frequency routers 9-4-1 to 9-4-M, where M and N are relatively prime natural numbers. When the frequency channel interval is set to be Δf, the M × M frequency routers 9-2-1 to 9-2-N have an FSR (Free Spectral Range) equal to MΔf, while the N × N frequency routers 9-4-1 to 9-4-M have an FSR equal to NΔf. For example, the signals in the frequency channels f ⊘ to f MN-1 entered from the input highway (0, 0) 9-1-1 are demultiplexed into M groups of N channels and lead to the internal links (0,0) 9-3-1 to (M-1, 0). N channels on the internal link (0, 0) 9-3-1 are then demultiplexed in units of channels by the N × N frequency router 9-4-1 in the second stage and lead to the output highways (0, 0) 9-5-1 to (0, N-1). Here, M and N are required to be relatively prime natural numbers as mentioned above, and in general, the suffix i1 of the frequency channel f i1 for connecting the input (j, x) and the input (k, x), where x = 0, 1, -, N-1 is expressed as: i1 = [(j + k) modulo M] + nM where n = 0, 1, -, N-1, while the suffix i2 of the frequency channel f i2 for connecting the input (y, j) and the input (y, k), where y = 0, 1, -, M-1 is expressed as: i2 = [(j + k) modulo N] + mN where m = 0, 1, -, M-1. It is to be noted that although Fig. 9 only shows a simplest case of two stage connections, the multi-stage connection with three or more stages of the frequency routers can be constructed similarly. In such a generalized case of the multi-stage connection, there is a requirement that the number of terminals at each stage must be relatively prime with the number of terminals at every other stage. Fig. 10 shows a modified configuration in which a multi-terminal highway switch is constructed by connecting a plurality of highway switch modules each of which has a single frequency router with a limited number of terminals. More specifically, this configuration of Fig. 10 comprises: MN pieces of input highways 10-1-1 to 10-1-MN, N pieces of M × M highway switch modules 10-2-1 to 10-2-N connected with the input highways 10-1-1 to 10-1-MN, M pieces of N × N highway switch modules 10-4-1 to 10-4-M cross-connected with the M × M highway switch modules 10-2-1 to 10-2-N through internal links 10-3-1 to 10-3-MN, and MN pieces of output highways 10-5-1 to 10-5-MN connected with the N × N highway switch modules 10-4-1 to 10-4-M, where M and N are natural numbers. Here, each one of the M × M highway switch modules 10-2-1 to 10-2-N and the N × N highway switch modules 10-4-1 to 10-4-M has a configuration similar to that shown in Fig. 3 described above. It is to be noted that although Fig. 10 only shows a simplest case of two stage connections, the multi-stage connection with three or more stages of the highway switch modules can be constructed similarly. Fig. 11 shows another modified configuration in which a multi-terminal highway switch is also constructed by connecting a plurality of highway switch modules each of which has a single frequency router with a limited number of terminals. More specifically, this configuration of Fig. 11 comprises: MN pieces of input highways 11-1-1 to 11-1-MN, N pieces of M × M highway switch modules 11-A-1 to 11-A-N connected with the input highways 11-1-1 to 11-1-MN, M pieces of N × N highway switch modules 11-B-1 to 11-B-M cross-connected with the M × M highway switch modules 11-A-1 to 11-A-N through frequency multiplexed internal links 11-4-1 to 11-4-MN, and MN pieces of output highways 11-11-1 to 11-11-MN connected with the N × N highway switch modules 11-B-1 to 11-B-M, where M and N are natural numbers. Here, the M × M highway switch module 11-A-1 comprises: frequency convertors 11-2-1 to 11-2-M connected with the input highways 11-1-1 to 11-1-M; and a frequency router 11-3-1 connected with the frequency convertors 11-1-1 to 11-1-M on its input side and with frequency multiplexed internal links 11-4-1 to 11-4-M on its output side. Each of the other M × M highway switch modules 11-A-2 to 11-A-N also has a similar configuration. On the other hand, the N × N highway switch module 11-B-1 comprises: frequency switches 11-S-1 to 11-S-N connected with the frequency multiplexed internal links from the M × M highway switch modules 11-A-1 to 11-A-N; a frequency router 11-9-1 connected with the frequency switches 11-S-1 to 11-S-N on its input side; frequency multiplexed output buffers 11-10-1 to 11-10-N connected with the output side of the frequency router 11-9-1; and output highway 11-11-1 to 11-11-N connected with the frequency multiplexed output buffers 11-10-1 to 11-10-N. Each of the other N × N highway switch modules 11-B-2 to 11-B-N also has a similar configuration. Here, the frequency switch 11-S-1 comprises: a 1 × k splitter 11-5-1 connected with the internal link 11-4-1; k pairs of frequency selector 11-6-1 and frequency convertor 11-7-1, each of which is connected with each output of the 1 × k splitter 11-5-1; and a k × 1 combiner 11-8-1 connected with the pair of frequency selector 11-6-1 and frequency convertor 11-7-1 on its input side and with the frequency router 11-9-1 on its output side. The frequency switches 11-S-2 to 11-S-MN also has a similar configuration. In this configuration of Fig. 11, each of the M × M highway switch modules 11-A-1 to 11-A-N in the first stage has a frequency multiplexed output buffer missing from the configuration of Fig. 3, so that it has no buffering function, and therefore the frequency multiplexed signals are transmitted as they are to the N × N highway switch modules 11-B-1 to 11-B-M in the second stage. Each of the N × N highway switch modules 11-B-1 to 11-B-M has the frequency switch in place of the tunable frequency convertor in the configuration of Fig. 3. The frequency multiplexed signals entered from the frequency multiplexed internal links are distributed into k groups by the splitter 11-5-1 and supplied into the k frequency selectors 11-6-1, each of which selectively outputs one channel so that at most k channels can be selectively outputted from the frequency selectors 11-6-1 collectively. Here, the splitter 11-5-1 can receive at most M channels of signals, but when k < M, the signals of the channels exceeding k are discarded. The selected signals are then converted into the prescribed frequency channels by the frequency convertor 11-7-1, combined by the combiner 11-8-1, and supplied into the frequency router 11-9-1. The frequency selector 11-6-1 has an exemplary configuration as shown in Fig. 12, which comprises: an input port 12-1 for entering the frequency multiplexed signals; an output port 12-2 for outputting the selected signal; a ring shaped optical resonator 12-3 connected between the input port 12-1 and the output port 12-2; directional couplers 12-4-1 and 12-4-2 for coupling the ring shaped optical resonator 12-3 with the input port 12-1 and the output port 12-2, respectively; a phase shifter 12-5 for shifting the optical carrier phase of the signal on the ring shaped optical resonator 12-3, and a power source 12-6 for the phase shifter 12-5. In this configuration of Fig. 12, among the frequency multiplexed signals entered from the input port 12-1, only the frequency channel which coincides with the resonance frequency of the ring shaped optical resonator 12-3 is outputted to the output port 12-2. Here, the resonance frequency of the ring shaped optical resonator 12-3 can be changed by appropriately adjusting the phase shifter 12-5 to change the optical path length of the ring shaped optical resonator 12-3 in accordance with the desired frequency channel to be selected. When the phase shifter 12-5 is adjusted at each timeslot, it is possible to realize the high speed selection of the frequency channel. Also, there may be a case in which all of these k signals are to be connected to the same output highway, so that in order to prevent the potential conflict at the frequency router 11-9-1, the conversion bandwidth of each frequency converter 11-7-1 is set to be different from the conversion bandwidths of the other frequency converters of the same frequency switch 11-S-1. More specifically, in general f i , f i+N , -, f i+(k-1)N (i = 0, 1, -, N-1) are the frequency channels which are going to be connected to the same output highway. It is to be noted that although Fig. 11 only shows a simplest case of two stage connections, the multi-stage connection with three or more stages of the highway switch modules can be constructed similarly. In such a generalized case of the multi-stage connection, the highway switch modules at the intermediate and last stages are to be in the configuration of the N × N highway switch modules 11-B-1 to 11-B-M described above, while only the highway switch modules at the first stage are to be in the configuration of the M × M highway switch modules 11-A-1 to 11-A-N described above. In this modified configuration of Fig. 11, the throughput characteristic of the switching network as a whole can be improved compared with a modified configuration of Fig. 10 described above, as the internal links are made to be frequency multiplexed in Fig. 11 unlike the case of Fig. 10. Moreover, this modified configuration is advantageous from the viewpoint of the system construction because the buffers can be arranged collectively at the last stage alone, without distributing the buffers at any other stages. Referring now to Fig. 13, another embodiment of a photonic buffer memory configuration suitable for the frequency multiplexed output buffer in the photonic frequency routing type time division highway switch of Fig. 3 will be described in detail. Fig. 13 shows an overall configuration of the photonic buffer memory in this embodiment, which comprises: M × N optical routing network 13-1 connected with M pieces of input ports I-1 to I-M on its input side; N pieces of fixed wavelength convertors 13-2-1 to 13-2-N connected with the output side of the optical routing network 13-1; an optical multiplexer 13-3 connected with the fixed wavelength convertors 13-2-1 to 13-2-N on its input side; an optical loop buffer 13-4 connected between the output side of the optical multiplexer 13-3 and an output port 0; M pieces of optical packet detectors 13-5-1 to 13-5-M connected with the input ports I-1 to I-M; a wavelength allocation network 13-6 connected with the optical packet detectors 13-5-1 to 13-5-M on its input side as well as with the optical loop buffer 13-4 on its output side; and a self-routing control network 13-7 connected with the wavelength allocation network 13-6 on its input side as well as with the optical routing network 13-1 on its output side. With this configuration of Fig. 13, this photonic buffer memory operates as follows. The input optical packets are entered through any of the M input ports I-1 to I-M at the constant timings which are repeatedly synchronized into the optical routing network 13-1. At the same time, the input optical packets entered through any of the input ports I-1 to I-M are converted into electrical signals by the corresponding ones of the optical packet detectors 13-5-1 to 13-5-M, and outputted as the control packets through the wavelength allocation network 13-6. Each of these control packets comprises an active bit AC indicating a presence or absence of a signal and a wavelength allocation field RA. Here, when each optical packet detector 2-5-k (k = 1 to M) detects the optical signal, the active bit AC of the corresponding control packet is set to "1", whereas otherwise the active bit AC of the corresponding control packet is set to "0". Also, in either case, the wavelength allocation field RA is set equal to the value of the active bit AC. Then, the control signal for controlling the optical routing network 13-1 is generated by the wavelength allocation network 13-6 and the self-routing control network 13-7. The wavelength allocation network 13-6 has an exemplary configuration as shown in Fig. 15 in an exemplary case of 16 × 16 configuration, which comprises a running adder network 15-1 formed by regularly arrayed adders, and an encoder group 15-2 connected with the outputs of the running adder network 15-1. The running adder network 15-1 calculates the running sum of the packets arriving simultaneously, and outputs the obtained running sum as the control packet. Namely, as indicated in Fig. 16, each adder 15-1-i constituting the running adder network 15-1 basically receives two input packets A and B, and outputs two output packets C and D. Here, as shown in Fig. 16, the input packet A is a packet which is entered downwards from an upper side node while the input packet B is a packet which is entered to the right from a left side node, and the output packet C is a packet which is outputted to the right to a right side node while the output packet D is a packet which is outputted downwards to the lower node. Each of the input packets A and B and the output packets C and D comprises the AC field and the RA field, which are indicated by the subscripts AC and RA accompanying the packet symbols A to D in Fig. 16. As indicated in Fig. 16, the adder 15-1-i outputs the output packet C which has the AC field C AC having a value equal to that of the AC field B AC of the input packet B and the RA field C RA having a value equal to a sum of the value of the RA field A RA of the input packet A and the value of the RA field B RA of the input packet B. Also, the adder 15-1-i outputs the output packet D which has the AC field D AC having a value equal to that of the AC field A AC of the input packet A and the RA field D RA having a value equal to that of the RA field A RA of the input packet A. Fig. 15 shows an exemplary packets outputted at each node of the running adder network 15-1 when nine packets with the value "1" for both the AC field and the RA field have arrived simultaneously, where the output packet at each node is represented by two digits number formed by a first digit indicating the value of the AC field and a second digit indicating the value of the RA field. At 16 output nodes of the running adder network 15-1 corresponding to 16 input nodes of the encoder group 15-2, the packets indicating the running sums of the input packets calculated by the running adder network 15-1 are outputted. More specifically, the AC field of the output packet at each output node has the value "1" when the input packet was entered through the corresponding input node, or the value "0" otherwise. Also, the RA field of the output packet at each output node has the value indicating an order of the input packet at the corresponding input node among all the input packets entered at the input nodes counted from above, i.e., the running sum. In the exemplary case shown in Fig. 15, the input packets are entered at the input ports Nos. 1, 3, 4, 5, 8, 9, 12, 13, and 14, so that the output packets with the AC field having a value "1" are outputted at the 1st, 3rd, 4th, 5th, 8th, 9th, 12th, 13th, and 14th output nodes corresponding to these input nodes among the 16 output nodes of the running adder network 15-1, and the RA fields of these output packets at the 1st, 3rd, 4th, 5th, 8th, 9th, 12th, 13th, and 14th output nodes have values equal to 1, 2, 3, 4, 5, 6, 7, 8, and 9, respectively. The encoder group 15-2 converts the packet indicating the running sum outputted from the running adder network 15-1 as described above into the control packet for controlling the optical routing network 13-1 according to the following wavelength allocation algorithm, by which the encoder group 15-2 outputs the signal determining which wavelength is to be allocated to which optical packet. Here, in order to explain this wavelength allocation algorithm, the following variables are defined. N: a number of equivalent buffers, i.e., a number of wavelengths to be multiplexed at the optical loop buffer 13-4. Here, the wavelengths to be multiplexed at the optical loop buffer 13-4 are assigned with numbers 0, 1, 2, -, N-1 (N = 8 in the following example). Q: a number of optical packets stored in the buffer when a new optical packet arrives (Q = 0 to N). F: a number assigned to the wavelength of the optical packet outputted at the immediately previous timeslot (F = 0 to N-1, and F = N-1 in the following example). ACi(m)/RAi(m): a value of the AC/RA of the control packet entered in to the encoder corresponding to the m-th input port (m = 1 to M). ACo(m)/RAo(m): a value of the AC/RA outputted from the encoder corresponding to the m-th input port (m = 1 to M). As shown in Fig. 15, the encoder group 15-2 comprises a plurality of encoders connected together in a ring shape. In this encoder group 15-2, the number Q of optical packets stored in this photonic buffer memory is notified to every encoder through a ring shaped connection. Then, each encoder updates the values of the AC and RA fields of the control packet whenever the control packet is received from the running adder network 15-1 as follows. (1) If ACi(m) = 0, then ACo(m) = 0 and RAo(m) = 0 (2) If Aci(m) = 1 and Q + RAi(m) ≤ N, then ACo(m) = 1 and RAo(m) = (F+Q+RAi(m)) mod N (3) If Aci(m) = 1 and Q + RAi(m) > N, then ACo(m) = 0 and RAo(m) = 0 The above (1) is an update rule applied in a case there is no input packet. In this case, ACo(m) = 0 is sent to the self-routing control network 13-7. As a result, the connection structure within the optical routing network 13-1 is switched according to this control packet having ACo(m) = 0 by the self-routing control network 13-7 such that the optical packet from the corresponding m-th input port is going to be blocked within the optical routing network 13-1. The above (2) is an update rule applied in a case a value in which the number Q of the optical packets currently stored in the buffer is added with a running sum RAi(m) of the newly entered optical packet is less than or equal to the buffer capacity. In this case, ACo(m) = 1 is sent to the self-routing control network 13-7. As a result, the connection structure within the optical routing network 13-1 is switched according to this control packet having ACo(m) = 1 by the self-routing control network 13-7 such that the optical packet from the corresponding m-th input port is going to be handled as an active packet in the optical routing network 13-1. As for the RA field, the wavelength at a time of storing in the buffer is determined by taking the residue with respect to N of a sum of Q+RAi(m) and the number F of the wavelength outputted at the immediately previous timeslot. The above (3) is an update rule applied in a case of the buffer overflow. In this case, the corresponding optical packet is discarded within the optical routing network 13-1. In the above, Q and F are variables indicating the next timeslot, and their values are updated as follows. Q new = [([Q old +RAi(m)-1, N]min), 0]max F new = (F old +1) mod N Namely, the variable Q is updated to a value in which the number 1 of the optical packet outputted is subtracted from RAi(m) which is the total sum of a number of the already stored optical packets and a number of newly entered optical packets. Here, however, in a case the updated value is going to exceed the buffer capacity, it is updated to N, and in a case the updated value is going to be a negative value, it is updated to 0. This value is notified to every encoder through the ring shaped connection connecting the encoders of the encoder group 15-2 as already mentioned above. Also, the variable F is updates to a value in which it is increased by one with respect to the buffer capacity N as a base number. This value is sent to the optical loop buffer 13-4 where it is used as the output wavelength selection signal F. The self-routing control network 13-7 then generates the control signal for switching the connection state within the optical routing network 13-1 according to the control packet so obtained by the wavelength allocation network 13-6. The optical routing network 13-1 has a configuration as shown in Fig. 17, which comprises: M pieces of optical gate switches 17-1-1 to 17-1-M; M/N pieces of N × N reverse Banyan optical network 17-2-1 to 17-2-[M/N], each of which is connected with N optical gate switches among the optical gate switches 17-1-1 to 17-1-M; and N pieces of optical combiners 17-3-1 to 17-3-N, each of which is connected with one output of each of the N × N reverse Banyan optical network 17-2-1 to 17-2-[M/N]. Here, [M/N] indicates the minimum integer greater than or equal to M/N, so that when M is not divisible by N, the last optical reverse Banyan network having N input ports would not use M mod N pieces of the input ports among the N input ports. On the other hand, the self-routing control network 13-7 also has a configuration similar to that of the optical routing network 13-1 of Fig. 17, which comprises the reverse Banyan networks along with electrical switches instead of the optical gate switches, where the electrical switches of the self-routing control network 13-7 makes one -to-one correspondence with the optical gate switches of the optical routing network 13-1 such that the control logic of the self-routing control network 13-7 is exactly the same as the control logic of the optical routing network 13-1. Here, the reverse Banyan network has a characteristic of being non-blocking as long as the input control packet signals have the addresses to be distributed to the outputs in an order. Therefore, in the optical routing network 13-1, the optical packets are distributed to the outputs specified the RA fields of the control packets without any blocking, For example, in a case of M = 16 and N = 8, the flows of the optical packets within the optical routing network 13-1 appears as shown in Fig. 18. In this Fig. 18, the optical routing network 13-1 comprises the optical gate switch portion 17-1, the reverse Banyan network portion 17-2, and the optical combiner portion 17-3, just as in the configuration of Fig. 17. The flows of the optical packets shown in Fig. 18 are as follows. First, the selections of the packets are made at the optical gate switch portion 17-1 according to the AC fields of the entered optical packets, where the packet with the AC field having a value "1" is passed while the packet with the AC field having a value "0" is blocked. Then, the optical switches at the optical gate switch portion 17-1 and the reverse Banyan network portion 17-2 are switched according to the signals obtained by the self-routing control network 13-7 according to the RA fields of the entering packets. Then, the optical packets arriving at the optical routing network 13-1 flow through the optical switches in the connection state set up as described above, along the routes indicated by thick solid lines in Fig. 18, and reach to the optical combiner portion 17-3. The optical packets combined at the optical combiner portion 17-3 are then supplied to the fixed wavelength convertors 13-2-1 to 13-2-N connected with the optical combiners 17-3-1 to 17-3-N, respectively. The optical packets entered into the fixed wavelength convertors 13-2-1 to 13-2-N are then converted into the optical packets with the wavelengths specific to the respective fixed wavelength convertors 13-2-1 to 13-2-N, and supplied into the optical multiplexer 13-3. Then, the optical packets multiplexed by the multiplexer 13-3 are outputted to the optical loop buffer 13-4, which outputs one optical packet at one timeslot according to the wavelength selection signal F supplied from the wavelength allocation network 13-6. Each of the fixed wavelength convertors 13-2-1 to 13-2-N has an exemplary configuration shown in Fig. 19, in which the entered optical packets are used as the modulation signals for directly modulating the fixed wavelength semiconductor laser 19-1. Namely, the modulation is made as the carriers are generated within the semiconductor of the semiconductor laser due to the optical signal power of each optical packet entered into the semiconductor laser such that the index of refraction is changed. Here, the semiconductor laser has the fixed predetermined oscillation wavelength so that the value of the input optical packet signal is carried by the carrier of that predetermined oscillation wavelength. The optical loop buffer 13-4 has an exemplary configuration as shown in Fig. 21, in which the wavelength multiplexed input optical packets are entered through an optical combiner 21-1 into an optical loop delay line 21-2 and stored therein in the multiplexed state. On the other hand, a wavelength selective 1 × 2 switch 21-3 selectively outputs the optical packet having a specific wavelength alone among the optical packets stored in the optical loop delay line 21-2 according to the control (wavelength selection) signal F supplied from the wavelength allocation network 13-6. More specifically, the wavelength selective 1 × 2 switch 21-3 outputs the optical packets circulating in the optical loop delay line 21-2 in an order of their wavelength numbers. The wavelength selective 1 × 2 switch has an exemplary configuration as shown in Fig. 22 which comprises a ring shaped optical resonator 22-4 having optical couplers 22-5-1 and 22-5-2 and a phase shifter 22-6 provided thereon, and a phase shifter setting power source 22-7 for controlling a phase shifting amount by the phase shifter 22-6. In this configuration of Fig. 22, the ring shaped optical resonator 22-4 is connected with the optical loop delay line 21-2 through the optical coupler 22-5-1, and among the wavelength multiplexed signals entering from the optical loop delay line 21-2 through the optical coupler 22-5-1, only the signal having a wavelength which coincides with a wavelength corresponding to the resonance frequency of the ring shaped optical resonator 22-4 is outputted to the output highway through the output port, while all the other signals are returned to the optical loop delay line 21-2. Here, the resonance frequency is determined by the optical path length of the ring shaped optical resonator 22-4, and can be adjusted to a value corresponding to any desired wavelength by changing the optical path length of the ring shaped optical resonator 22-4 by the phase shifter 22-6. Here, the phase shifting amount of the phase shifter 22-6 is adjusted at each timeslot by the phase shifter setting power source 22-7, such that the optical packet of the wavelength predetermined for each timeslot alone can be selectively outputted to the output port at high speed. According to this photonic buffer memory configuration of Fig. 13, even when the wavelength multiplexed optical packets addressed to the same destination arrive simultaneously in a large capacity optical packet switch with the switch throughput in an order of Tbit/s in which the time series signals in an order of 100 Gbit/s are wavelength multiplexed for over 10 wavelengths, these arriving optical packets can be converted into the predetermined wavelengths without converting them into the electrical signals and without causing any conflict, so that these optical packets can be inputted into the loop buffer in the wavelength multiplexed state and the optical packets can be outputted from the loop buffer, selectively, one by one. Moreover, by increasing a number of the reverse Banyan networks used for the optical routing network 13-1 and the self-routing control network 13-7, it is possible to construct the very large scale switch in which the hundreds of wavelengths can be multiplexed. In addition, as the processing speed of the electrical control circuits is several tens of times slower than the optical packet signal speed, so that the photonic buffer memory with little electrical bandwidth limitation can be realized. It is to be noted that the photonic buffer memory configuration of Fig. 13 can be modified into a modified configuration shown in Fig. 14, which comprises: M pieces of tunable wavelength convertors 14-1-1 to 14-1-M connected with M pieces of input ports I-1 to I-M on its input side; an optical combiner 14-2 connected with the tunable wavelength convertors 14-1-1 to 14-1-M on its input side; an optical loop buffer 14-3 connected with the optical combiner 14-2 on its input side; M pieces of optical packet detectors 14-4-1 to 14-4-M connected with the input ports I-1 to I-M; and a wavelength allocation network 14-6 connected with the optical packet detectors 14-4-1 to 14-4-M on its input side, and with each the tunable wavelength converter 14-1-1 to 14-1-M and the optical loop buffer 14-3 on its output side. In other words, in this modified configuration of Fig. 14, the optical routing network 13-1 and the self-routing control network 13-7 in the configuration of Fig. 13 are omitted while the fixed wavelength convertors 13-2-1 to 13-2-N in the configuration of Fig. 13 is replaced by the tunable wavelength convertors 14-1-1 to 14-1-M which are directly connected with the input ports I-1 to I-M and directly controlled by the control packets from the wavelength allocation network 14-6. In addition, the optical multiplexer 13-3 in the configuration of Fig. 13 is replaced by the optical combiner 14-2 as the wavelengths of the output optical signals of the tunable wavelength convertors 14-1-1 to 14-1-M are tunable. When the input optical packets arrive from the input ports I-1 to I-M, each of the tunable wavelength convertors 14-1-1 and 14-1-M is controlled to pass or block the entering optical packet by the control signal (AC, RA) from the wavelength allocation network 14-6 so as to control the output wavelength, and to carry out an appropriate wavelength conversion to make an appropriate wavelength allocation. In this case, each of the tunable wavelength convertors 14-1-1 to 14-1-M has an exemplary configuration as shown in Fig. 20, which comprises: a tunable wavelength semiconductor laser 20-1 having a photo-current injection unit 20-1-1 at which the modulation is made directly by the optical signal power of the input optical packet entered into the photo-current injection unit 20-1-1, and an oscillation wavelength setting unit 20-1-2 connected with the photo-current injection unit 20-1-1 which changes the oscillation wavelength setting of the tunable wavelength semiconductor laser 20-1 at each timeslot according to the RA field of the control signal so as to make the oscillation at the predetermined wavelength at each timeslot; and an optical gate switch 20-2 for selectively passing or blocking the optical packet according to the AC field of the control signal. In this modified configuration of Fig. 14, the optical packet detectors 14-4-1 t 14-4-M, the wavelength allocation network 14-6, and the optical loop buffer 14-3 are substantially equivalent to the corresponding elements in the configuration of Fig. 13 as described above. Thus, this modified configuration of Fig. 14 has an advantage of realizing a compact photonic buffer memory configuration compared with the configuration of Fig. 13. It is also possible to adapt the configuration of Fig. 13 or Fig. 14 to multi-input multi-output configuration in an obvious manner. It is further to be noted that, besides those already mentioned above, many modifications and variations of the above embodiments may be made without departing from the present invention. Accordingly, all such modifications and variations are intended to be included within the scope of the appended claims.

Claims: A photonic frequency routing type time division highway switch for switching optical signals on a plurality of time division input highways (3-1-1, 3-1-2, 3-1-M) to output highways (3-5-1, 3-5-2, 3-5-M) at each timeslot, comprising: a plurality of tunable frequency convertor means (3-2-1, 3-2-2, 3-2-M) for assigning frequency channels to the optical signals on the input highways (3-1-1, 3-1-2, 3-1-M) at each timeslot, each tunable frequency convertor means on each input highway being configured such that mutually different frequency channels are assigned to the optical signals on each input highway, which are destined to different output highways, and different ones of the plurality of tunable frequency convertor means being configured such that mutually different frequency channels are assigned to the optical signals on different input highways which are destined to an identical output highway; frequency router means (3-3) for connecting the optical signals outputted from the frequency convertor means (3-2-1, 3-2-2, 3-2-M) to its outputs according to the frequency channels assigned to the optical signals at each timeslot; and a plurality of frequency multiplexed output buffer means (3-4-1, 3-4-2, 3-4-M) for outputting the optical signals outputted from the frequency router means (3-3) to the output highways (3-5-1, 3-5-2, 3-5-M) such that a plurality of optical signals with different frequency channels which are in an identical timeslot are outputted at different timeslots. The photonic frequency routing type time division highway switch of claim 1, wherein the frequency router means (3-3) includes: a plurality of input lines (4-1-1, 4-1-M) for entering the optical signals; a plurality of frequency demultiplexers (4-2-1, 4-2-M) connected with the input lines (4-1-1, 4-1-M) for demultiplexing the optical signals from the input lines (4-1-1, 4-1-M); a plurality of output lines (4-5-1, 4-5-M) for outputting the optical signals; a plurality of frequency multiplexers (4-4-1, 4-4-M) connected with the output lines (4-5-1, 4-5-M) for multiplexing the optical signals from the demultiplexers (4-2-1, 4-2-M); and a plurality of internal links (4-3-1, 4-3-M) for cross-connecting the frequency demultiplexers (4-2-1, 4-2-M) and the frequency multiplexers (4-4-1, 4-4-M). The photonic frequency routing type time division highway switch of claim 1, wherein the frequency router means (3-3) is an arrayed waveguide grating filter including: a plurality of input optical waveguides (5-1-1, 5-1-M) for entering the optical signals; a first slab shaped optical waveguide (5-2) for receiving the optical signals from the input optical waveguides (5-1-1, 5-1-M); an arrayed waveguide grating (5-4) formed by a plurality of channel waveguides having mutually different lengths, for receiving the optical signals from the first slab shaped optical waveguide (5-2) ; a second slab shaped optical waveguide (5-3) for receiving the optical signals from the arrayed waveguide grating (5-4); and a plurality of output optical waveguides (5-5-1, 5-5-M) for outputting the optical signals from the second slab shaped optical waveguide (5-3). The photonic frequency routing type time division highway switch of claim 1, wherein the frequency router means (3-3) includes: a plurality of frequency routers (9-2-1, 9-2-N, 9-4-1, 9-4-M); and a plurality of internal links (9-3-1, 9-3-MN) cross connecting the frequency routers (9-2-1, 9-2-N, 9-4-1, 9-4-N) in multi-stages. The photonic frequency routing type time division highway switch of claim 1, wherein the frequency router means (3-3) having M inputs and M outputs connects each optical signal with a frequency channel f i from its j-th input to its k-th output such that i = (j + k) modulo M where M is an integer. The photonic frequency routing type time division highway switch of claim 1, wherein each of the frequency multiplexed output buffer means (3-4-1, 3-4-2, 3-4-M) is a photonic buffer memory for storing optical signals randomly arriving from a plurality of input ports (I-1, I-M) and outputting one of stored optical signals to an output port (0), including: an optical routing network (13-1) for routing the optical signals from the input ports (I-1, I-M) to different output lines according to orders of arrivals of the optical signals periodically; a plurality of fixed wavelength converter means (13-2-1, 13-2-2, 13-2-N) connected with the output lines of the optical routing network (13-1), for converting wavelengths of the optical signals outputted from respective output lines of the optical routing network (13-1) to respectively prescribed new wavelengths; an optical multiplexer (13-3) for wavelength multiplexing the optical signals outputted from the fixed wavelength converter means (13-2-1, 13-2-2, 13-2-N); an optical loop buffer (13-4) for buffering the wavelength multiplexed optical signals outputted from the optical multiplexer (13-3); a plurality of optical signal detectors (13-5-1, 13-5-2, 13-5-M) for detecting optical signals from the input ports (I-1, I-M) and generating electrical signals indicating a presence/absence of an optical signal from each input port (I-1, I-M) ; a wavelength allocation network (13-6) for generating control signals indicating the output lines of the optical routing network (13-1) to which the optical signals from the input ports (I-1, I-M) are to be routed according to the electrical signals generated by the optical signal detectors (13-5-1, 13-5-2, 13-5-M); and a self-routing control network (13-7) for specifying optical signal paths in the optical routing network (13-1) according to the control signals generated by the wavelength allocation network (13-6). The photonic frequency routing type time division highway switch of claim 1, wherein each of the frequency multiplexed output buffer means (3-4-1, 3-4-2, 3-4-M) is a photonic buffer memory for storing optical signals randomly arriving from a plurality of input ports (I-1, I-M), and outputting one of stored optical signals to an output port, including: a plurality of tunable wavelength convertor means (14-1-1, 14-1-2, 14-1-M) connected with the input ports (I-1, -I-M), for converting wavelengths of the optical signals entered from the respective input ports (I-1, I-M) to new wavelengths according to orders of arrivals of the optical signals periodically; an optical combiner (14-2) for combining the optical signals outputted from the tunable wavelength converter means (14-1-1, 14-1-2, 14-1-M) to obtain wavelength multiplexed optical signals; an optical loop buffer (14-3) for buffering the wavelength multiplexed optical signals outputted from the optical combiner (14-2); a plurality of optical signal detectors (14-4-1, 14-4-2, 14-4-M) for detecting optical signals from the input ports (I-1, I-M) and generating electrical signals indicating a presence/absence of an optical signal from each input port (I-1, I-M); a wavelength allocation network (14-6) for generating control signals for controlling the tunable wavelength convertor means (14-1-1, 14-1-2, 14-1-M) by indicating the new wavelengths to which the wavelengths of the optical signals from the input ports (I-1, I-M) are to be converted according to the electrical signals generated by the optical signal detectors (14-4-1, 14-4-2, 14-4-M). A photonic frequency routing type time division highway switch for switching optical signals on a plurality of time division input highways (10-1-1, 10-1-MN) to output highways (10-5-1, 10-5-MN) at each timeslot, comprising: a plurality of photonic frequency routing type time deivision highway switch modules (10-2-1, 10-2-N, 10-4-1, 10-4-M), each module being constituted by a photonic frequency routing type time division highway switch as claimed in Claim 1, and a plurality of internal links (10-3-1, 10-3-MN) for cross-connecting the photonic frequency routing type time division highway switch modules (10-2-1, 10-2-N, 10-4-1, 10-4-M)in multi-stages. A photonic frequency routing type time division highway switch for switching optical signals on a plurality of time division input highways (11-1-1, 11-1-M, 11-1-MN) to output highways (11-11-1, 11-11-N, 11-11-MN) at each timeslot, comprising: a first stage photonic frequency routing type time division highway switch module arrangement, comprising a number of first stage photonic frequency routing type time division highway switch modules (11-A-1, 11-A-N) each including: a plurality of first-stage tunable frequency convertor means (11-2-1, 11-2-M, 11-2-MN) for assigning frequency channels to the optical signals on the input highways at each timeslot, each tunable frequency convertor means on each input highway being configured such that mutually different frequency channels are assigned to the optical signals on each input highway which are destined to different output highways and different ones of the plurality of tunable frequency convertor means being configured such that mutually different frequency channels are assigned to the optical signals on different input highways which are destined to an identical output highway; and a first stage frequency router means (11-3-N) for connecting the optical signals outputted from the first stage frequency convertor means (11-2-1, 11-2-M, 11-2-MN) to its outputs according to the frequency channels assigned to the optical signals at each timeslot; a last stage photonic frequency routing type time division highway switch module arrangement, comprising a number of last stage photonic frequency routing type time division highway switch modules (11-B-1, 11-B-M), each including: a plurality of last stage frequency switch means (11-S-1, 11-S-N, 11-S-MN) for selectively switching the frequency channels of the optical signals on its inputs at each timeslot; and a last stage frequency router (11-9-1, 11-9-M) for connecting the optical signals outputted from the last stage frequency switch means (11-S-1, 11-S-N, 11-S-MN) to its outputs according to the frequency channels assigned to the optical signals at each timeslot; and a plurality of last stage frequency multiplexed output buffer means (11-10-1, 11-10-N, 11-10-MN) for outputting the optical signals outputted from the last stage frequency router (11-9-1, 11-9-M) to the output highways (11-11-1, 11-11-N, 11-11-MN) such that the plurality of optical signals with different frequency channels which are in an identical timeslot are outputted at different timeslots; and a plurality of frequency multiplexed internal links (11-4-MN) for cross-connecting the first and last stage photonic frequency routing type time division highway switch modules. The photonic frequency routing type time division highway switch of Claim 9 comprising an intermediate stage photonic frequency routing type time division highway switch module arrangement, comprising a number of intermediate stage photonic frequency routing type time division highway switch modules, each including: a plurality of intermediate stage frequency switch means for selectively switching the frequency channels of the optical signals on its inputs at each timeslot; and an intermediate stage frequency router for connecting the optical signals outputted from the intermediate stage frequency switch means to its ouptputs according to the frequency channels allocated to the optical signals at each timeslot, and wherein the plurality of frequency multiplexed internal links cross-connect the first, last and intermediate stage photonic frequency routing type time division highway switch modules in multi-stages. The photonic frequency routing type time division highway switch of Claim 10, wherein each of the last and intermediate stage frequency switch means (11-B-1, 11-B-M) includes: a splitter (11-5-1, 11-5-MN) for distributing the optical signals on its inputs; a plurality of frequency selector means (11-6-1, 11-6-kMN) for selecting the optical signals from the splitter (11-5-1, 11-5-man) ; a plurality of tunable frequency convertor means (11-7-1, 11-7-kMN) connected with the frequency selector means (11-6-1, 11-6-kMN) for allocating frequency channels to the optical signals on its inputs at each timeslot; and a combiner (11-8-1, 11-8-MN) for combining the optical signals from the frequency convertor means (11-7-1, 11-7-kMN).

Inventors: HABARA KEISHI, SASAYAMA KOJI, TSUKADA MASATO, YUKIMATSU KENICHI, ZHONG WENDE, HABARA, KEISHI, SASAYAMA, KOJI, TSUKADA, MASATO, YUKIMATSU, KENICHI, ZHONG, WENDE
Applicants: NIPPON TELEGRAPH & TELEPHONE, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Application year: 1994
Main classification: H04L12
IPC codes: H04L12, H04Q11