Process for producing a semiconductor substrate

Abstract: A bonded substrate and a process for its production is provided to solve the problem involved in the heat treatment which tends to cause troubles such as break, separation and warpage of the substrates bonded. A single-crystal semiconductor epitaxially grown on a porous semiconductor substrate is bonded to an insulator substrate, and the semiconductor substrate is removed by etching, grinding, or a combination of the both, where no heat treatment is carried out or, even if carried out, only once.

Description: This invention relates to a process for producing a silicon-on-insulator (SOI) substrate, and particularly to a process for producing a SOI substrate comprising a light-transmitting insulator substrate having thereon a single-crystal silicon semiconductor layer. More particularly, this invention is concerned with a process for producing a SOI substrate comprising a light-transmitting insulator substrate, for example one made of glass, on which is formed a single-crystal silicon semiconductor layer for fabricating a device thereon by steps including epitaxy or ion implantation. Formation of single-crystal silicon semiconductor layers on insulating materials are widely known as silicon-on-insulator (SOI) techniques, and much research has been performed since substrates thereby obtained have a number of advantages that cannot be achieved by bulk silicon substrates for preparing usual silicon integrated circuits. If single-crystal films grown on insulating films can be used as substrate materials of devices, this is very well favorable for device structure. Devices with a high performance (a high speed) and a high reliability can be attained because 1) any parasitic (or floating) capacitance caused by substrate components can be made smaller, 2) devices can be tough to radiations and 3) latchup-free CMOS can be achieved. Hence, SOI devices have attracted notice. Among SOI formation techniques recently reported, a technique especially superior in view of quality is what is called "bonding SOI". This is a technique in which mirror-finished surfaces of two wafers on at least one of which an insulating film has been formed by oxidation or the like are closely brought into face-to-face contact, followed by heating to strengthen the bond at the interface of close contact, and then the substrate is polished or etched on either side thereof so as to leave on the insulating film a single-crystal silicon thin film having any desired thickness. What is most important in this technique is the step of making the silicon layer into a thin film. This is because the above advantages of SOI cannot be brought out unless silicon layers are made into thin films. However, in order to make silicon layers into thin films, usually a silicon substrate of as large as several hundred µm must be uniformly polished or etched to have a thickness of several µm or 1 µm or less. It is technically very difficult to control such polishing or etching or to make the substrate thickness uniform. Because of such a difficulty in film thickness control, this "bonding SOI" has not been put into practical use irrespective of its possibility of providing best-quality single-crystal thin films among SOI techniques. The bonding SOI has another important problem. It is a difference in coefficient of thermal expansion between insulator substrates and silicon substrates. This difference in coefficient of thermal expansion little comes into question when the silicon substrate is used on the side of the substrate serving as a support (i.e., when silicon substrates are bonded to each other). When, however, substrates having coefficients of thermal expansion greatly different from each other are bonded and any temperature changes occur, the difference in coefficient of thermal expansion between the both substrates causes a stress. In practice, when an insulator substrate made of glass, is used on the side of the substrate serving as a support, the substrates may warp in the state of being bonded or the substrates may break or separate, because of such a difference in coefficient of thermal expansion between both substrates, at the step of heating them at about 1,000°C in order to strengthen the bond at their interface. There are examples in which materials having a coefficient of thermal expansion close to that of silicon are synthesized and used as the supporting substrate. Such materials, however, have a poor thermal resistance as far as known in the art, and cannot withstand process temperatures for the heat treatment applied to strengthen the bond or for the fabrication of devices. Abe et al. report an example in which a "bonded SOI substrates" that can solve such problems is produced (Extended Abstract of the 1992 International Conference on SOLID-STATE DEVICES AND MATERIALS, 1992 Tsukuba, pp. 437-439, or European Patent Application EP-A-0504714). In the process reported therein, a relatively thin (300 µm) silicon substrate and a quartz substrate are bonded, and thereafter first heating is carried out at about 300°C that may cause no separation or break of the bonded substrate, followed by etching only by which the silicon substrate is made thinner to have a thickness of about 150 µm. Next, as second heating, annealing is carried out at about 450°C, to attain a bond strength high enough to withstand the shear stress during surface grinding, and the silicon substrate is then ground down to a thickness of several µm by means of a grinder. Thereafter, precision polishing is further carried out to make the silicon substrate into a thin film. According to this process, however, since the heating is essential, a thin silicon substrate of about 300 µm thick must be used taking account of thermal stress. Hence, substrates may accidentally break during operations for bonding or transportation of substrates, and hence the operations must be carefully made. Moreover, in order to carry out heating at higher temperatures, it is necessary to repeat a cycle of the grinding to make substrates thinner and the heating thereafter carried out. For these reasons, bonding SOI substrates are disadvantageous in that their production speed cannot be increased. Stated specifically, the substrate thickness of the semiconductor substrate to be bonded must usually be about 500 µm in the case of a silicon substrate of 10 cm (4 inches) diameter and about 600 µm in the case of that of 12 to 15cm (5 to 6 inches) diameter so that their mechanical strength can be maintained. In the case of a larger substrate of 20 cm (8 inches) diameter, a thick silicon substrate of about 800 µm thick must be used. When a thin substrate of about 300 µm thick is used, it becomes very difficult to handle the step of initial bonding. There is still another disadvantage. It is a problem of separation caused by the shear stress applied between the insulator substrate and the semiconductor substrate. Every time silicon substrates are ground down to be made thinner, a great shear stress is applied to the bonding interface between the supporting substrate and the silicon substrate. In practice, silicon substrates are ground down or polished until they are made into thin films of several µm thick and hence a quite large shear stress is applied to the bonding interface. Moreover, at the joining surfaces of the both substrates, the bond at the bonding interface may become weaker with the repetition of grinding. To solve this problem, there is a method in which the step of making substrates thinner by grinding and the high-temperature heating are repeated so that the bond strength at the interface may not become poor. This method, however, takes a long time for the processing and is not suited for mass production. A still another disadvantage is that, since single-crystal silicon thin films are produced by polishing, a special apparatus and a very precise control are required to achieve the uniformity of film thickness. As another process for producing SOI substrates, there is a means of direct deposition of semiconductor films on insulator substrates. However, the semiconductor film cannot be well crystallized on the insulator substrate, and it is impossible to form single-crystal semiconductor thin films. As discussed above, conventional "bonding SOI substrates" can achieve no sufficient bond strength between the insulator substrate and the silicon substrate without heat treatment. On the other hand, as previously noted, the direct bonding of a silicon substrate and a transparent substrate having different coefficients of thermal expansion and the subsequent heating of the bonding cause the break or warpage of the substrates as previously stated. To solve such problems, up to now the heating has been delicately controlled under conditions such that a bond strength high enough to withstand the shear stress can be maintained and also no problems of break or warpage may be caused. Such control, however, is difficult since a very delicate control is required. Also, in practice, complicated steps must be taken such that the heating is carried out multi-stepwise from lower temperatures to high temperatures. Hence, this process cannot produce SOI substrates feasible for mass production. In other processes also, no techniques that can provide, in a good productivity, SOI substrates satisfactory for the fabrication of high-performance electronic devices has been still accomplished. As an additional problem, when single-crystal silicon SOI substrates are produced by conventional deposited films forming processes, not a few stacking faults may occur in single-crystal deposited films. In such a case, the layer defects become larger as the deposited film grow. This is diagrammatically illustrated in Fig. 8. Reference numeral 100 denotes a semiconductor substrate made of silicon or the like; 102, an epitaxial growth layer; and 109, layer defects. On the surface of the substrate 100, point defects, dust, oxide residues and so forth may remain, and they cause stacking faults. As the single-crystal silicon semiconductor layer (102) is epitaxially grown, the stacking faults grow to an extent increasing toward the end in the epitaxial layer because of the point defects, dust, oxide residues and so forth. Hence, the layer deposition defects may greatly extend on the surface of the epitaxial layer 102. The present inventors have made extensive studies taking account of the problems and disadvantages as discussed above. As a result, they have reached the following findings. That is, a method of producing an SOI substrate that can solve the above problems can be performed when a single-crystal silicon layer is epitaxially grown on a porous silicon surface of a silicon substrate having been made porous on its surface, subsequently an insulator, different type substrate, serving as a supporting substrate, is brought into close contact with the surface of the epitaxially grown layer and bonded by only van der Waals force, without heating to thereby minimise the influence of stress, the silicon substrate portion is removed by wet etching using an etching solution, followed by selective etching of the porous portion to form a single-crystal silicon thin film on the insulator substrate. This possible solution does not form part of the present invention. Another method of producing an SOI substrate that can solve the above problems can also be performed when, since it takes time for the wet etching of the monocrystalline semiconductor layer portion, the etching is replaced with grinding to remove part of the silicon substrate while the silicon substrate portion is still thick enough to make it unnecessary to take account of the shear stress at the interface between the substrates, then heating to strengthen the bond between the substrates is carried out over the whole only once, and thereafter the silicon substrate portion, remaining after grinding, is removed by further grinding or by wet etching using an etching solution. This solution is the subject-matter of the present invention. Employment of this process also makes it possible that any stacking faults, having grown to a great extent on the surface of a semiconductor deposited film as the thickness of the deposited film increases when conventional single-crystal semiconductor deposited films are epitaxially grown, are transferred to the side of the opposing bonding substrate. Hence, only stacking faults in small areas at the initial stage of the growth of stacking faults come to appear on the surfaces of semiconductor substrates important for fabricating devices thereon afterwards. The same effect can be obtained not only in the production of SOI substrates but also in the case of semiconductor substrates comprising a semiconductor substrate having thereon an epitaxial growth layer. The process of the present invention has the following steps in common with the process disclosed in European Patent Application EP-A-0553859: anodising a surface layer on one side of a single crystal silicon substrate to make the surface layer porous, thereby to form a porous single-crystal silicon layer on a non-porous single-crystal semiconductor region; epitaxially growing a non-porous single-crystal silicon layer on the porous single-crystal silicon layer; bringing the surface of the non-porous single-crystal silicon layer into close contact with the surface of an insulator substrate thereby bonding both to each other; removing the non-porous single-crystal silicon region; and selectively etching the porous single-crystal silicon layer to remove the porous single-crystal silicon layer. In accordance with the present invention, as defined in claim 1 appended the step of bringing together the non-porous single-crystal silicon layer and the insulator substrate is performed at room temperature and thus initial bonding is performed without heating; and the step of removing the non-porous single-crystal silicon layer is performed in stages by: grinding down the non-porous single-crystal silicon region to remove part of the non-porous single-crystal silicon region, the remaining part of the non-porous silicon region being at least 80 µm thick; heating the substrate in order to strengthen the bonding between the non-porous single-crystal silicon layer and the insulator substrate; and entirely removing the remaining part of the non-porous single-crystal silicon region to expose the porous single-crystal silicon layer, selectively etching said porous single-crystal silicon layer. In this process the remaining part of the non-porous single-crystal silicon region may be removed by a step of further grinding or by a step of etching. In the latter case the step of etching the remaining part of the non-porous single-crystal silicon region may preferably be carried out in any of an alkali solution, an organic alkali solution and an acid solution containing hydrofluoric acid and nitric acid, kept at 100°C or below. In the process of the present invention, a step of pressing the substrates brought into close contact may be included before the non-porous single-crystal silicon region is removed. Also, the surface of the non-porous single-crystal silicon layer may be oxidised so that a surface oxide layer is brought into close contact with the insulator substrate. Still also, the selective etching of the porous single-crystal silicon layer preferably may be carried out in a mixed etching solution of hydrofluoric acid and aqueous hydrogen peroxide and using as the insulator substrate a light-transmitting insulator substrate mainly composed of SiO 2 . In the present invention, it is preferable that after the single-crystal silicon portion is partly removed by grinding, the remaining single-crystal portion is entirely removed by etching. The reason why the grinding is first carried out is that it takes a quite long time when substrates usually having a thickness of from 500 to 600 µm or a thickness larger than that are made thin to a thickness of several ten µm or several µm only by wet etching. The substrate portion is not entirely removed only by grinding but only part thereof is ground down, because the grinding exerts a quite large shear stress to the bonding interface and a great force is applied to the interface to cause separation or break if the substrate is ground down to a certain excessive extent. Hence, the minimum remaining thickness of the substrate after grinding should, in the case of silicon, be about 80 µm which, however, depending on the flatness of substrates and the manner of cleaning them. So far as the remaining thickness is 80 µm at least, the substrate can withstand the grinding only by van der Waals force without heating after bonding. Thus, once the substrate has come to have a remaining thickness of 80 µm, then the grinding is changed for the etching with a solution so that the stress is no longer applied. Heating is carried out once at the time the remaining thickness comes to be 80 µm, so that in the final step, selective wet etching of the porous single-crystal silicon layer can be carried out stably and with a high yield. Besides, in working the present invention, using silicon, two important physical effects attributable to porous silicon are utilised. One is the etching properties of porous silicon. Silicon is usually little wet-etched with a hydrofluoric acid solution. However, silicon can be greatly wet-etched with a hydrofluoric acid solution when the silicon is made porous. When the hydrofluoric acid solution, in particular, a mixed etching solution of hydrofluoric acid and aqueous hydrogen peroxide is used, the porous silicon can be etched at a rate as high as about 10 5 times non-porous silicon. Hence, even thin silicon layers of about 1 µm thick can be selectively left uniformly and in a good controllability. The other effect is the epitaxial growth properties. As crystal structure, porous silicon keeps a single-crystal structure, where pores of about several to several ten nm (several ten to several hundred Angstroms) diameter are present throughout the surface and the inside. An epitaxial layer made to grow on such a surface is characteristic of a crystallinity which is substantially the same as that of epitaxial layers formed on non-porous single-crystal substrates. In some instances, however, as a feature of epitaxial growth on porous materials, stacking faults, though in a very low density, may occur from the growth interface. On account of the above physical properties, it becomes possible to use as an active layer a single-crystal thin film equivalent to the highly reliable epitaxial layer on the single-crystal silicon substrate, so that an SOI substrate having a crystallinity superior to conventional SOI substrates can be provided. Incidentally, stacking faults caused during epitaxial growth are transferred to the other substrate upon bonding, and hence the stacking fault observed in the silicon layer of the resulting SOI substrate are seen in reverse. Moreover, in the preferred embodiments of the present invention, the two substrates are bonded at room temperature while pressure is applied to the substrates that are brought into close contact. This makes it possible to greatly decrease the probability of causing "separation" during etching or grinding. In the accompanying drawings: Figs. 1A to 1E are schematic cross sectional views to illustrate the process of the present invention and, in particular, Example 1 of the present invention; Figs. 2A and 2B illustrate respective alternative apparatus that can be used when the surface of a silicon substrate is made porous; Figs. 3A to 3F illustrate Example 2 of the present invention; Figs. 4A to 4E illustrate Example 3 of the present invention; Figs. 5A to 5E illustrate Example 4 of the present invention; Figs. 6A to 6E illustrate Example 5 of the present invention; Figs. 7A to 7D illustrate Example 6 of the present invention; and Fig. 8 illustrates the growth of a stacking fault. A preferred embodiment of the present invention will be described below with reference to Figs. 1A to 1E and Figs. 2A and 2B. Figs. 1A: A single-crystal silicon substrate 100 is anodised to form a porous silicon layer 101. Here, the portion made porous may be in a thickness of from several µm to several ten µm as a surface layer on one side of the substrate. How to form the porous silicon layer will be described with reference to Figs. 2A and 2B. First, as a substrate, a p-type single-crystal silicon substrate 100 is prepared. Even an n-type one is not infeasible, but in such a case the substrate must be limited to those having a low resistance or the anodisation must be carried out in the state where the formation of holes are accelerated by irradiation of the substrate surface with light. The substrate 100 is set in the apparatus as shown in Fig. 2A. More specifically, one side of the substrate comes in contact with a hydrofluoric acid type solution 104, a negative electrode 106 is taken up on the solution side, and the other side of the substrate comes in contact with a positive metal electrode 105. As shown in Fig. 2B, the positive electrode side 105' may be made to have potential through a solution 104'. In either case, the action to make the substrate porous takes place from the negative electrode side being in contact with the hydrofluoric acid type solution. As the hydrofluoric acid type solution 104, it is common to use concentrated hydrofluoric acid (49% HF). If it is diluted with pure water (H 2 O) to a lower concentration, etching begins to take place at a certain concentration, depending on the density of current flowed, and hence it is not preferable to do so. Bubbles may also occur from the surface of the substrate 100 during anodization. For the purpose of removing such bubbles, an alcohol is added as a surface active agent as occasion calls. As the alcohol, methanol, ethanol, propanol, isopropanol or the like is used. In place of the use of a surface active agent, an agitator may be used to carry out anodization while agitating the solution. With regard to the negative electrode 106, a material that can not be corroded by the hydrofluoric acid solution is used, as exemplified by gold (Au) or platinum (Pt). The positive electrode 105 may be made of any of metal materials commonly used. Since, however, the hydrofluoric acid type solution 104 reaches the positive electrode 105 at the time the anodization has completed over the whole substrate surface, the surface of the positive electrode 105 also may preferably be covered with a metal film resistant to hydrofluoric acid solutions. The anodization may be carried out at a current density of several hundred mA/cm 2 at maximum. Its minimum value may take any values other than zero. This value depends on the range within which a good-quality film can be epitaxially grown on the surface of the silicon layer having been made porous. In usual cases, the rate of anodization increases with an increase in current density, and at the same time the density of the porous silicon layer decreases. In other words, the volume held by holes becomes larger. In accordance with this, the conditions for epitaxial growth change. Fig. 1B: On the porous layer 101 thus formed, a non-porous single-crystal silicon layer 102 is epitaxially grown. Epitaxial growth may be carried out by commonly available thermal CVD, low pressure CVD, plasma-assisted CVD, molecular beam epitaxy or sputtering. The layer may be grown in a thickness equal to the designed value for the SOI layer, and may preferably be in a thickness not larger than 2 µm. This is because, if a single-crystal silicon layer with a thickness larger than 2 µm is in close contact with the insulator substrate mainly composed of SiO 2 , its heating in a device fabrication process may cause a great stress at the bonding interface, due to the difference in coefficient of thermal expansion between the both materials, so that break of the silicon film, warping of the substrate, or separation at the interface may occur. So long as the layer thickness is not larger than 2 µm, the stress is relatively so small that the film break and substrate separation or warping may occur with difficulty. The layer thickness may more preferably be not larger than 0.5 µm. This is because, if the layer thickness is larger than 0.5 µm, while no separation or break can occur during post-annealing, slip lines tend to occur in crystals in minute regions. The surface of the epitaxial layer 102 may preferably have been subjected to thermal oxidation, because dangling bonds of atoms at the interface may increase if an epitaxial layer of single-crystal silicon is deposited to remain as it is. Hence, impurities tend to segregate at the bonding interface when it is directly bonded to the supporting substrate in the next step carried out in the atmosphere. Such segregation of impurities can be a factor to make thin-film device characteristics unstable. In the epitaxial layer 102, a stacking fault 109 may sometimes occur from growth interface. Fig. 1C: The epitaxial layer thus grown or epitaxial layer thus surface-oxidized are face-to-face bonded to a supporting substrate, an insulator substrate 110, mainly composed of SiO 2 . This bonding is carried out after both substrates have been cleaned with a mixed solution of hydrochloric acid and aqueous hydrogen peroxide or a mixed solution of sulfuric acid and aqueous hydrogen peroxide water. More specifically, this cleaning can make both substrate surfaces hydrophilic, so that the bond strength attributable to van der Waals force increases through water at the bonding interface. Substrates subjected to hydrophobic cleaning with a hydrofluoric acid solution or the like can also be well bonded if they have good flatness at the bonding interface. Here, the insulator substrate 110 is available from almost all commonly available ceramics. Especially when importance is attached to its optical transparency, it is selected from molten quartz, synthetic quartz, high-melting glass and so forth. In a process commonly used, heating at about 1,000°C is next carried out. In the present invention, however, this is not carried out. In order to strengthen the bond between the substrates, the substrates may be pressed together at this stage. The pressure may be selected quite arbitrarily. For example, when a pressure of several tons (1 ton = 1000kg) to several ten tons is applied to the whole surface of the 12cm (5 inch) substrates, the probability of separation of the substrates during the etching or grinding step greatly decreases. The time for pressure application may be several minutes to about 1 hour. Figs. 1D & 1E: Next, leaving the epitaxially grown layer 102, the silicon substrate portion 100 and the porous silicon portion 101 are selectively removed. First, the silicon substrate portion is removed in two stages of grinding and etching. The first grinding may preferably be completed at a position where the silicon substrate have a remaining thickness of at least 100 µm, and preferably about 150 µm. Next, the remaining silicon substrate is etched with an alkali solution such as potassium hydroxide (KOH) solution or aqueous ammonia, or an organic alkali solution such as trimethyl ammonium solution. This etching is effective when carried out in a hot solution. The alkali type solution little etches SiO 2 components widely used in the supporting substrate, and hence can selectively etch away only the silicon portion. The silicon substrate can also be etched away with a mixed solution of hydrofluoric acid and nitric acid to which acetic acid or the like has been optionally added. However, the hydrofluoric acid-nitric acid type etchant may also more or less etch the supporting substrate, and hence its use for a long time may preferably be avoided. After the grinding and before the etching, heating at about 300°C is carried out. This can make the occurrence of defects less likely, which otherwise would be caused by film separation in subsequent steps. Heating temperature depends on the material of the insulator substrate, the diameter and thickness of the substrates, the surface properties thereof and the thickness of the remaining silicon substrate. For example, when a standard type 12cm (5 inch) quartz substrate 625 µm thick,and a silicon substrate having the same diameter as the former are bonded, the substrates withstand heating at about 300°C in the case of a silicon remaining thickness of 150 µm. In the case of a silicon remaining thickness of 100 µm, the substrates withstand heating at about 350 to 400°C. At temperatures higher than these temperatures, separation or break may occur because of thermal stress. At the time the silicon substrate portion 100 has been entirely etched away and the porous portion 101 has been exposed, the etching is stopped, and the remaining porous portion 101 is selectively etched in a hydrofluoric acid type solution. The non-porous, single-crystal epitaxially grown portion 102 little reacts with hydrofluoric acid, and hence remains as a thin film. The supporting substrate 110 tends, as a matter of course, to react with the hydrofluoric acid type solution since it is mainly composed of SiO 2 , and hence it is not preferable for the substrate 110 to be immersed in the hydrofluoric acid type solution for a long time. However, when the porous silicon layer is thin, it does not take so much time for the etching, it is therefore unnecessary to care about the time. If the supporting substrate 110 should not be etched at all, a silicon nitride film or other substance that may react with hydrofluoric acid with difficulty may preferably be beforehand deposited by CVD or the like on the surface opposite to the bonding surface . Alternatively, before the substrates are immersed in the etching solution, the porous portion 101 may also be made thin to a certain extent using an alkali solution, an organic alkali solution or a hydrofluoric acid/nitric acid solution, whereby the time taken for the selective etching of the epitaxial layer and porous layer can be made shorter and hence the supporting substrate may also not react so much. The hydrofluoric acid type solution used in the selective etching of the epitaxial layer 102 and porous layer 101 is comprised of a mixture of hydrofluoric acid and aqueous hydrogen peroxide (H 2 O 2 ). The porous silicon can be selectively etched also using a mixed solution of hydrofluoric acid and nitric acid to which acetic acid or the like has been optionally added. In such a case, however, higher selection ratio cannot be assured so much and also the single-crystal silicon thin film to be left is more less etched. Accordingly, the etching time must be precisely controlled. Through the foregoing steps, a single-crystal silicon thin film can be obtained on the insulator substrate. In the case when any stacking faults 109 have occurred in the layer epitaxially grown on the porous silicon layer, such stacking faults come to be on the insulating film 110 in reverse to usual cases upon bonding. Thereafter, when the resulting substrate is sent to a device fabrication process, heating at about 800°C or above may preferably be carried out in order to increase the bond strength between the thin film and the substrate, or there is no problem if this heating is replaced by a heating step (for oxidation or the like) in the device fabrication process. High temperature heating has been applied when conventional "bonded SOI substrates" are produced. However, in the working of the present invention, low-temperature heating is carried out once, so that it has become possible to form SOI substrates without causing break or separation of thin films or great warpage of substrates as in the conventional bonding of substrates having coefficients of thermal expansion different from each other. At the same time, since the epitaxial growth layer enables easy control of the layer thickness distribution, the distribution of silicon layer thickness present invention becomes very good. Also, as may be desired, light-transmitting SOI substrates can be produced with ease. Hence, it is possible to design functional devices utilising such properties, and also it has become possible to provide semiconductor substrates that can substitute expensive SOS or SIMOX even for the purpose of fabricating large-scale integrated circuits of SOI structure. Example 1 A first example of the present invention will be described in detail with reference to Figs. 1A to 1E. Fig. 1A: A 12 cm (5 inch) p-type (100) single-crystal silicon substrate 400 with a resistivity of 0.01 Ω · cm, having a thickness of 600 µm was prepared. This substrate was anodised to form a porous layer 101 thereon by a thickness of 20 µm from its surface. Fig. 1B: On the surface of the porous layer on the substrate thus obtained, an epitaxial layer 102 was formed by CVD to a thickness of 0.5 µm, under the following conditions: Gas used SiH 4 /H 2 Gas flow rate 0.42/140 (lit/min) Temperature 750°C Pressure 1.1 x 10 4 Pa (80 Torr) Growth rate 0.08 µm/min. Fig. 1C: The substrate obtained in the manner described above was cleaned with a mixed solution of hydrochloric acid, aqueous hydrogen peroxide and water, and then rinsed with pure water, followed by drying. Thereafter, at room temperature this substrate was brought into close contact with a 12 cm (5 inch) molten quartz substrate 110 having been cleaned in the same way. Fig. 1D: Using a surface grinder, the bonded substrate portion 100, 101 was ground down so as to have a remaining thickness of 150 µm (non-porous portion : 130 µm; porous portion: 20 µm) . The substrate thus obtained was heated at 300°C for 24 hours. Fig. 1E: Subsequently, the resulting substrate was immersed in an undiluted solution of a commercially available developer SD-1 (produced by Tokuyama Soda Co., Ltd.; an aqueous tetramethylammonium hydroxide solution), and kept immersed for about 140 minutes at a temperature of 85 to 90°C. As a result, the quartz substrate 110 was little etched but the silicon substrate 100 of about 130 µm thick was entirely etched away, and the porous silicon layer 101 was exposed while being etched to a depth of about 10 µm. The porous portion 101 was then selectively etched with an aqueous hydrofluoric acid/hydrogen peroxide solution. Through the foregoing steps, an SOI substrate comprising the quartz substrate 110 having thereon a single-crystal silicon thin film 102 was obtained. Example 2 A second example of the present invention will be described in detail with reference to Figs. 3A to 3F. Fig. 3A: A 12 cm (5 inch) p-type (100) single-crystal silicon substrate 500 with a resistivity of 0.01 Ω · cm, having a thickness of 600 µm was prepared. This substrate was anodised to form a porous layer 101 thereon to a thickness of 20 µm from its surface. Fig. 3B: On the surface of the porous layer on the substrate thus obtained, an epitaxial layer 102 was formed to a thickness of 0.5 µm in the same manner as in Example 1. Fig. 3C: The surface of the epitaxial layer 102 was oxidised to form a 0.1 µm thick SiO 2 layer 103. Fig. 3D: The substrate thus obtained was cleaned with a mixed solution of hydrochloric acid, aqueous hydrogen peroxide and water, and then rinsed with pure water, followed by drying. Thereafter, at room temperature this substrate was brought into close contact with a 12 cm (5 inch) molten quartz substrate 110 having been cleaned in the same way. The substrates brought into close contact were further pressed at a pressure of 20 tons(1 ton ≡ 1000 kg) for 5 minutes. Figs. 3E: Using a surface grinder, the bonded substrate portion 100,102 was ground down so as to have a remaining thickness of 150 µm (non-porous portion: 130 µm; porous portion 20 µm). Fig. 3F: Here, heating was carried out at 300°C for 10 hours, and then the remaining silicon substrate portion 100 was etched with SD-1 in the same manner as in Example 1 to entirely remove the silicon substrate portion 100. Thereafter, the porous portion 101 was selectively etched with an aqueous hydrofluoric acid/aqueous hydrogen peroxide solution. In this etching, the composition of the selective etching solution and the etching rate of the porous silicon was respectively as follows: HF:H 2 O 2 = 1:5; 1.6 µm/min. Thus, the porous portion of 10 µm thick was entirely etched away in about 7 minutes. By the way, during this etching, the single-crystal silicon layer 102 was only etched at a rate of 0.0006 µm/hour, and remained little etched. As for the quartz substrate 110, its etching rate in the above etching solution was about 0.5 µm/min, and it follows that the quartz substrate was etched to a depth of about 4 µm during the etching. Through the foregoing steps, a semiconductor substrate comprising the quartz substrate 110 having thereon a single-crystal silicon thin film 102 was obtained through only one-time heating. Example 3 A third example of the present invention will be described in detail with reference to Fig. 2A and Figs. 4A to 4E. Fig. 4A: A 12 cm (5 inch) p-type (100) single-crystal silicon substrate (0.1 to 0.2 Ω·cm) having a thickness of 625 µm was prepared. This substrate was set in the apparatus as shown in fig. 2A, and was anodized to make the surface of the silicon substrate 100 into porous silicon 101 by a thickness of 20 µm. In this step, the solution 604 used was a 49% HF solution and the current density was 100 mA/cm 2 . Also, in this step the substrate surface was made porous at a rate of 8.4 µm/min and the porous layer of 20 µm thick was obtained in about 2.5 minutes. Fig. 4B: On the porous silicon 101, the single-crystal silicon layer 102 was epitaxially grown by CVD in a thickness of 0.5 µm. The CVD was carried out under the following conditions. Gas used SiH 4 /H 2 Gas flow rate 0.42/140 (lit/min) Temperature 750°C Pressure 1.1 x 10 4 Pa (80 Torr) Growth rate 0.08 µm/min In this step, a stacking fault 109 occurred. Fig. 4C: The substrate produced in the manner as described above was cleaned with a mixed solution of hydrochloric acid, aqueous hydrogen peroxide and water, and then rinsed with pure water, followed by drying. Thereafter, at room temperature this substrate was brought into close contact with a 5 inch (1 inch = 2.5 cm) molten quartz substrate 110 having been cleaned in the same way. Fig. 4D: Using a surface grinder, the bonded substrate thus obtained was ground down on its side of the silicon substrate by 475 µm so as for the silicon substrate to have a remaining thickness of about 150 µm (single-crystal substrate portion: 130 µm; porous silicon portion: 20 µm; epitaxial layer portion: 0.5 µm). At this stage, the above substrate was heated at 300°C for 24 hours, and subsequently, the remaining silicon portion of 130 µm was removed by grinding. Fig. 4E: The resulting substrate on which the porous layer 101 was exposed was successively immersed in a selective etching solution to selectively etch only the porous portion 101 in its entirety. In this etching, the composition of the selective etching solution and the etching rate on the porous silicon was respectively as follows: HF:H 2 O 2 = 1:5; 1.6 µm/min. Thus, the porous portion of 20 µm thick was entirely etched away in about 13 minutes. By the way, during this etching, the single-crystal silicon layer 102 was only etched at a rate of 0.0006 µm/hour, and remained little etched. As for the quartz substrate 110, its etching rate in the above etching solution was about 0.5 µm/min, and it follows that the quartz substrate was etched in a depth of about 7 µm during the etching. Since the original thickness of the quartz substrate was 625 µm, it follows that the thickness decreased to about 618 µm. As a result, an SOI substrate comprising a transparent substrate having thereon a 0.5 µm thick single-crystal silicon thin film was obtained. The stacking fault 109 came into being in reverse on the transparent substrate. This SOI substrate was annealed in an atmosphere of nitrogen at 1,000°C for 1 hour to carry out heating to enhance the bond strength at the bonding interface. The annealing caused none of cracks, slip lines and so forth in the single-crystal silicon film. Example 4 A fourth example of the present invention will be described in detail with reference to Figs. 5A to 5E. Fig. 5A: A 10 cm (4 inch) p-type (100) single-crystal silicon substrate 100 with a resistivity of 0.01 Ω·cm, having a thickness of 300 µm was prepared. This substrate was set in the apparatus as shown in Fig. 2a and was anodized to make its surface into porous silicon 101 by a thickness of 20 µm. In this step, the solution 604 used was a 49% HF solution and the current density was 100 mA/cm 2 . Also, in this step the substrate surface was made porous at a rate of 8.4 µm/min and the porous layer of 20 µm thick was obtained in about 2.5 minutes. Fig. 5B: On the surface of the porous layer thus formed, an epitaxial layer 102 was formed in a thickness of 0.5 µm in the same manner as in Example 1. Fig. 5C: The substrate obtained in the manner described above was cleaned with a 1:40 mixed solution of hydrofluoric acid and water, and then rinsed with pure water, followed by drying. Thereafter, at room temperature this substrate was brought into close contact with a 10 cm (4 inch) molten quartz substrate 110 having been cleaned in the same way. Then, using a pressing machine, a pressure of 60 tons (1 ton ≡ 1000 kg) was applied to the whole surface of the 10 cm (4 inch) substrate, and kept pressed for 10 minutes. Fig. 5D: Using a surface grinder, the silicon substrate portion 800 having a thickness of 280 µm was first ground down by 180 µm to have a remaining thickness of about 100 µm (single-crystal silicon portion: 80 µm; porous silicon portion: 20 µm; epitaxial layer portion; 0.5 µm). Subsequently, this substrate was heated at 300°C for 10 hours, and grinding was again carried out to remove the remaining silicon substrate portion of 80 µm. Fig. 5E: At the time the porous silicon layer 801 was exposed to the surface, the substrate was immersed in a 1:5 mixed solution of hydrofluoric acid and aqueous hydrogen peroxide to carry out selective etching. The etching rate of the hydrofluoric acid/aqueous hydrogen peroxide was about 1.6 µm/min on the porous silicon. Hence, it was possible to entirely etch away the porous silicon in about 13 minutes. The quartz substrate 110 was only etched in a depth of several µm and remained unetched any longer. The single-crystal silicon thin film 102 on the quartz substrate 110, obtained through the foregoing steps, was patterned in an island form in accordance with the area, shape and arrangement of designed devices. For example, at the position where an MOS transistor with a channel length and a channel width of 2 µm and 4 µm, respectively, an island of 4 x 10 µm 2 including source and drain regions was patterned at the designed position. After the patterning, the substrate was heated at 1,000°C for 2 hours. Thus, an SOI substrate comprising a transparent substrate having thereon a 0.5 µm thick single-crystal silicon thin film was obtained. Example 5 A fifth example of the present invention will be described in detail with reference to Figs. 6A to 6E. Fig. 6A: A 12 cm (5 inch) p-type (100 single-crystal silicon substrate 100 with a resistivity of 0.01 Ω · cm, having a thickness of 400 µm was prepared. This substrate was anodized to form a porous layer 101 thereon by a thickness of 20 µm from its surface. Fig. 6B: On the surface of the porous layer on the substrate thus obtained, an epitaxial layer 102 was formed in a thickness of 0.5 µm in the same manner as in Example 1. The surface of the epitaxial layer 102 on the same substrate was then oxidized in a depth of 0.2 µm in water vapour at 1,000°C to form an SiO 2 layer 103. As a result, the epitaxial layer had a single-crystal silicon portion and an oxide film portion in layer thicknesses of 0.4 µm and 0.2 µm, respectively. Fig. 6C: The substrate obtained in the manner described above was cleaned with a mixed solution of hydrochloric acid, aqueous hydrogen peroxide and water, and then rinsed with pure water, followed by drying. Thereafter, at room temperature this substrate was brought into close contact with a 12 cm (5 inch) molten quartz substrate 310 having been cleaned in the same way. Fig. 6D: Using a surface grinder, the silicon substrate portion was first ground down by 230 µm so as to have a remaining thickness of 150 µm, and thereafter heated at 300°C for 24 hours. Subsequently, the remaining silicon substrate portion 100 was entirely removed by grinding to expose the porous portion 101. Subsequently, the porous portion 101 thus exposed was selectively etched with an aqueous hydrofluoric acid/aqueous hydrogen peroxide solution. Fig. 6E: The single-crystal silicon thin film 102 on the quartz substrate 110, obtained through the foregoing steps, was patterned in an island form in accordance with the area, form and arrangement of designed devices. For example, at the position where an MOS transistor with a channel length and a channel width of 2 µm and 4 µm, respectively, is to be produced, an island of 4 x 10 µm 2 including source and drain regions was patterned. After the patterning, as a first step of device fabrication, the respective island regions were oxidized in a depth of 0.05 µm in an atmosphere of oxygen at 1,000°C. Thus, this oxidizing step was used also as the heating step of the substrate at the same time. As a result, an SOI substrate comprising a transparent substrate having thereon about 0.4 µm thick single-crystal silicon thin film was obtained. Example 6 A sixth example of the present invention will be described in detail with reference to Figs. 7A to 7D. Fig. 7A: A 5 inch p-type (100) single-crystal silicon substrate with a resistivity of 0.01 Ω·cm, having a thickness of 600 µm was prepared. This substrate was anodized to form a porous layer 101 thereon by a thickness of 20 µm from its surface. Fig. 7B: On the surface of the porous layer on the substrate thus obtained, an epitaxial layer 102 was formed in a thickness of 0.5 µm in the same manner as in Example 1. Subsequently, the surface of the epitaxial layer 102 was oxidized to form an SiO 2 layer 103 of 0.1 µm thick. Fig. 7C: The substrate thus obtained was cleaned with a mixed solution of hydrochloric acid, aqueous hydrogen peroxide and water, and then rinsed with pure water, followed by drying. Thereafter, at room temperature this substrate was brought into close contact with a 12 cm (5 inch) molten quartz substrate 110 having been cleaned in the same way. The substrates brought into close contact were further pressed at a pressure of 20 tons (1 ton ≡ 1000 kg) for 5 minutes. Fig. 7D: Using a surface grinder, the silicon substrate portion 100 was ground down so as to have a remaining thickness of about 150 µm. Fig. 7E: Here, the resulting substrate was heated at 300°C for 10 hours, and subsequently the remaining silicon substrate portion was ground down to entirely remove the silicon substrate portion. Thereafter, the porous portion 101 was selectively etched with an aqueous hydrofluoric acid/aqueous hydrogen peroxide solution in the same manner as in Example 2. Through the foregoing steps, a semiconductor substrate comprising the quartz substrate 110 having thereon a single-crystal silicon thin film was obtained through only one-time heating.

Claims: A process for producing a silicon-on-insulator substrate comprising the steps of: a) anodizing a surface layer on one side of a single-crystal silicon substrate to make the surface layer porous to form a porous single-crystal silicon layer (101) on a non-porous single-crystal silicon region (100); b) epitaxially growing a non-porous single-crystal silicon layer (102) on said porous single-crystal silicon layer; c) bringing at room temperature the surface of said non-porous single-crystal silicon layer (102) into close contact with the surface of an insulator substrate (110) thereby bonding both to each other without heating; d) after step c), grinding down said non-porous single-crystal silicon region (100) to remove part of said non-porous single-crystal silicon region (100), the remaining part of said non-porous silicon region being at least 80 µm thick; e) heating the substrate obtained in step d) above in order to strengthen the bonding between said non-porous single-crystal silicon layer (102) and said insulator substrate (110); f) entirely removing said non-porous single-crystal silicon region (100) having remained after the grinding step d), to expose said porous single-crystal silicon layer (101); and g) selectively etching said porous single-crystal silicon layer (101) exposed in step f) to remove said porous single-crystal silicon layer (101), thereby leaving the epitaxial silicon layer (102) bonded to said insulating substrate (110). A process according to claim 1 wherein the surface of said non-porous single-crystal silicon layer (102) grown in step (b) is oxidized to form an insulator film before being brought into contact with the surface of said insulator substrate (110) in said step (c), and in step (c) the insulator film is brought into contact with, and bonded to, said insulator substrate (110). A process according to either of claims 1 or 2, wherein the thickness of said non-porous single-crystal silicon region (100) remaining after performing step (d) is 150 µm. A process according to either of claims 1 or 2, wherein said step (f) comprises etching said non-porous single-crystal silicon region (100) remaining after said grinding step (d), to entirely remove said non-porous single-crystal silicon region (100) to expose said porous single-crystal silicon layer (101). A process according to claim 4 wherein said etching in step (f) is carried out in any of an alkali solution, an organic alkali solution or an acid solution containing hydrofluoric acid and nitric acid, maintained at a temperature of 100°C or below. A process according to claim 5, wherein said etching in step (f) is continued to thin, but not remove, said porous single-crystal semiconductor layer (101). A process according to either of claims 1 to 3, wherein said step (f) comprises grinding further said non-porous single-crystal silicon region (100) remaining after said grinding step (d). A process according to any preceding claim, wherein in step (c) pressure is applied to said silicon substrate (100) and said insulator substrate (110) to press them together to increase bonding. A process according to any preceding claim wherein said insulator substrate (110) is of SiO 2 . A process according to claim 9 wherein, following step (g), heating is applied at a temperature of 800°C or above to increase the bonding of said non-porous single-crystal silicon layer (102) to said insulator substrate (110). A process of producing a semiconductor device including steps of: producing a silicon on insulator substrate by the process according to any preceding claim; and completing fabrication of the semiconductor device by steps including epitaxy or implantation.

Inventors: YAMAGATA KENJI, YONEHARA TAKAO, YAMAGATA, KENJI, YONEHARA, TAKAO, YAMAGATA, KENJI, C/O CANON KABUSHIKI KAISHA, YONEHARA, TAKAO, C/O CANON KABUSHIKI KAISHA
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1994
Main classification: H01L21
IPC codes: H01L21