Digital video signal processing apparatus and method

Abstract: Video data and audio data are recorded in units of a pack onto a disk. A pack is constituted from a plurality of packets. When a packet of video data is present, if the picture at the top of the video packet is an I-picture, then an entry packet is disposed immediately prior to the video packet. In the entry packet, the positions of three prior and following packets are recorded. The position of the I-picture is detected from the data of the entry packet. The present invention makes it possible to locate the access point rapidly to achieve rapid searching.

Description: TECHNICAL FIELD This invention relates to an apparatus and method for processing a variable-rate coded signal prior to recording so that high-speed searching can be carried out on a recording medium on which the processed signal is recorded. The invention also relates to an apparatus and method for performing a high-speed search on a medium on which a processed variable-rate coded signal is recorded. Finally, the invention relates to a recording of the processed variable-rate coded signal. BACKGROUND ART Examples of a conventional recording apparatus and a conventional reproducing apparatus are shown in Figures 1 and 2. Referring to Figure 1, a digital video signal to be recorded is compressed and coded by the video encoder 1, and then fed into the video signal buffer 4 in the multiplexing circuit 3. The digital audio signal to be recorded is compressed and coded by the audio encoder 2, and then fed into to the audio signal buffer 5 in the multiplexing circuit 3. The output terminals of the signal buffers 4 and 5 are connected to the input terminals E1 and E2 of the switching circuit 6, respectively. The output terminal F of the switching circuit 6 is connected to the input terminal of the header addition circuit 7. The output of the header addition circuit 7 is supplied to the digital storage medium (DSM) 10, which includes, for example, a magneto-optical disk or a magnetic disk, e.g., a hard disk. The control circuit 8 receives system clock signals from the multiplexing system clock generation circuit 9, and causes the switching circuit 6 to connect the output terminal F to the input terminals E1 and E2 successively at a predetermined time interval. This successively fetches video signal bytes from the video signal buffer 4 and audio signal bytes from the audio signal buffer 5, thereby time division multiplexing the audio and video signals. The control circuit 8 causes the switching circuit 6 and the header addition circuit 7 to produce a multiplexed signal having the format multiplexing system set forth in the ISO 11172 (MPEG) standard, the multiplexed signal includes one or more packs (PACK) and one ISO_11172_end_code. The ISO_11172_end_code is a code of 32 bits and is, when represented in the hexadecimal notation, 0x000001B9. The prefix 0x indicates hexadecimal notation, where x is indeterminate. Each pack includes a header, which includes a Pack_Start_Code, an System Clock Reference (SCR), a MUX_Rate, and one or more packets (Packet). The Pack_Start_Code of the header is a code of 32 bits and is 0x000001B4, the prefix 0x once again indicating hexadecimal notation. A pack has a variable length up to a maximum of 2,048 bytes. Each packet includes a header, which includes a Packet_Start_Code_Prefix, a stream_ID, a Packet_length, a Presentation Time Stamp (PTS), and a Decoding Time Stamp (DTS), and a packet data portion. The Packet_Start_Code_Prefix is a code of 24 bits and is 0x000001. The Stream_ID is a code of 8 bits and indicates the type of the packet, as shown in Figure 4. The Packet_length (16 bits) indicates the length of the packet following it. In the packet data portion of each packet, a portion of the digital audio signal (when the stream type indicates an audio stream) of a portion of the video signal (when the stream type indicates a video stream) is recorded. Further, since each audio stream can have one of 32 different stream_IDs and the each video stream can have one of up to 16 different stream_IDs, up to 32 different audio signals and up to 16 different video signals can be multiplexed. Subtitle data, for example, is located in a reserved stream. Private_stream_1 and private_stream_2 do not have defined applications. A padding_stream is used to increase the amount of data. The control circuit 8 controls adding headers and reading signal bytes using an algorithm such as that shown, for example, in Figure 5 so that a total of 2,048 bytes are included in each pack in accordance with the format described above. Referring to Figure 1 and 5, at step S1, the control circuit 8 instructs the header addition circuit 7 to generate a pack header. Then, at step S2, the control circuit 8 waits until the sum of M4 and M5 is equal to or greater than the number of signal bytes D included in one pack. In other words, the control circuit 8 waits until the total number of signal bytes accumulated in the signal buffers 4 and 5 is equal to the number of bytes of video signal written in the video signal buffer 4, and M5 represents the number of bytes of audio signal written in the audio signal buffer 5. D represents a total number of signal bytes that can be accommodated in one pack. To simplify the description, it will be assumed that D is a constant obtained by subtracting the number of bytes in the pack headers, the number of bytes in the video packet headers, and the number of bytes in the audio packet headers, from the number of bytes (2,048) in a pack. In step S3, the number of bytes P1 of video signal that will be accommodated in the pack and the number of bytes P2 of audio signal that will be accommodated in the pack are calculated using the following equations: P1 = D * M4/(M4 + M5) P2 = D - P1 Thus, P1 and P2 are values obtained by distributing the total number of signal bytes D accommodated by the pack according to the ratio of numbers of bytes M4 and M5 accumulated in the signal buffers 4 and 5. At step S4, after the numbers of signal bytes are determined, the control circuit 8 instructs the header addition circuit 7 to generate a video packet header, and to feed the video packet header to the DSM 10. Then, at step S5, the control circuit 8 transfers P1 bytes of video signal from the video signal buffer 4 to the DSM 10. At step S6, the control circuit 8 causes the header addition circuit to generate an audio packet header, and to feed it to the DSM 10. At step 7, the control circuit 8 transfers P2 bytes of audio signal from the signal buffer 5 to the DSM 10. The DSM 10 records the multiplexed signal received from the multiplexing circuit 3. The multiplexed signal recorded on the DSM 10 in this manner is reproduced and decoded by the reproducing apparatus shown in Figure 2. The header separation circuit 22 in the separation circuit 21 separates pack headers and packet headers from the multiplexed signal read out from the DSM 10. The header separation circuit 22 supplies the headers to the control circuit 24, and supplies the multiplexed audio signal and the video signal to the input terminal G of the switching circuit 23. The output terminals H1 and H2 of the switching circuit 23 are connected to the input terminals of the video decoder 25 and the audio decoder 26, respectively. The control circuit 24 in the separation circuit 21 successively connects the input terminal G of the switching circuit 23 to the output terminals H1 and H2 in accordance with the stream_ID of the packet header received from the header separation circuit 22. In this way, the audio signal and the video signal are demultiplexed from the time-division multiplexed signal, and are supplied to the corresponding decoder. When the video signal fed into the multiplexing circuit 3 is compressed in accordance with the MPEG coding standard, this imposes limitations on performing random access or searching operations. A video signal that is compressed according to the MPEG standard includes intra-picture coded pictures, I (intra) pictures, and two types of inter-picture coded pictures: P (forward predictive) pictures and B (bidirectional predictive) pictures. Of the three types of pictures, only I-pictures are compressed independently of other pictures, and can therefore be said to be intrinsically expandable. To decode the video signal of an I-picture requires only the video signal of the I-picture itself, and does not require the video signals of other pictures. However, because of this, the coding efficiency of I-pictures is low. Since P-pictures and B-pictures are obtained by decoding difference signals from preceding and/or following pictures, the compression efficiency of such pictures is high. However, decoding a P-picture or a B-picture requires the video signal of a reference picture preceding or following the picture being decoded in addition to the video signal of the picture being decoded. Consequently, two I-pictures or so are normally reproduced each one second so as to provide a random access ability while retaining an acceptable average compression efficiency. Figure 6 shows a diagram of a digital video signal including I-pictures, P-pictures and B-pictures as it is recorded on the DSM 10. The digital video signal is divided into more than one Groups of Pictures (GOPs). Each GOP begins with an I-picture. When the video signal is compressed at a fixed rate, since an I-picture periodically appears at a predetermined location, the location can be determined by calculation and the I-picture accessed. However, when the video signal is compressed at a variable rate, the location of the I-pictures is indeterminate, and it is thus difficult to access the I-pictures. When a search command is received by the reproducing apparatus shown in Figure 2, a main control apparatus (not shown) delivers to the control circuit 24, the video decoder 25, and the audio decoder 26, an instruction to transition to search mode. In search mode, the video decoder 25 decodes only I-pictures in the video signal received from the switching circuit 23. Alternatively, only video signals representing I-pictures are selected by the separation circuit 21 and fed into the video decoder 25. The video decoder 25 then decodes the video signals that it receives. In search mode, the control circuit 24 delivers to the DSM 10 a command to move the read position on the disk forwards or backwards. While the amount of movement of the read position depends upon the search rate, the compression ratio, etc. Thus, generally, the amount of movement increases as the rate of the search increases and as the compression ratio increases. When the read position has moved to the selected location, the multiplexed signal is read from the DSM 10 and fed into the separation circuit 21. The header separation circuit 22 separates the video decoder 65 decodes the I-picture that appears first, and feeds it to the video output. The audio decoder 66 is muted in search mode. In the manner just described, a search operation that successively repeated random access. Thus, when, for example, the user commands a high-speed forward search, the video decoder 25 searches for an I-picture by skipping a predetermined number of frames of the video signal it receives, and then decodes and feeds out each resulting I-picture. Alternatively, the DSM 10 can search for I-pictures, and only reproduce video signals of I-pictures for decoding by the video decoder 25. A search operation involving a successive reproduction of I-pictures is carried out by repeating such operations. A different example of a conventional recording apparatus and a different example of conventional reproducing apparatus are shown in Figures 7 and 8, respectively. Referring to Figure 7, the digital video signal to be recorded is fed into the video encoder 1, and the digital audio signal to be recorded is fed into the audio encoder 2. The outputs of the video encoder 1 and the audio encoder 2 are fed into the multiplexing circuit 3. The output terminal of the multiplexing circuit 3 is connected to the DSM 10, where the resulting multiplexed signal is stored for a first time. The multiplexed signal read out of the DSM 10 is fed to the table of Contents (TOC) addition circuit 50, which adds a TOC to the beginning of the multiplexed signal. Generation of the TOC will be described in detail bellow. The output of the TOC addition circuit 50 is fed to the input terminal of the sector header addition circuit 51. The output of the sector header addition circuit 51 is fed to the Error Correction Coding (ECC) encoder 52. The output of the ECC encoder 52 is fed via the modulation circuit 53 to the cutting machine 54, which cuts the optical disk master 60 in response to the digital signal generated as just described. Plural optical disks for distribution to consumer or professional users, such as the optical disk 60A shown in Figure 8, are manufactured using the optical disk master 60. The input terminal of the entry point storage device 33A is connected to the output terminal of the video encoder 1, or to the video entry point detection circuit 31, so that it receives and stores entry point information from either one of them. The output of the entry point storage device 33A is fed to the TOC generation circuit 56, which arranges the format of the TOC. The TOC is fed to the TOC addition circuit 50, which adds the TOC to the beginning of the multiplexed signal, as described above. The video signal to be recorded is compressed and coded by the video encoder 1, and then fed to the multiplexing circuit 3. The audio signal to be recorded is compressed and coded by the audio encoder 2, and then fed to the multiplexing circuit 3. The multiplexing circuit 3 multiplexes the coded video signal and the coded audio signal it receives using time-division multiplexing. The time-division multiplexed signal is fed into the DSM 10, which stores it. This process is continued until all of the video signal and all of the audio signal have been recorded on the DSM 10. An output of the video encoder 1 is connected to the entry point storage device 33A. When the video encoder 1 is capable of providing an entry point generation signal, it provides an entry point generation signal when it generates an I-picture. The entry point storage device 33A receives from the video decoder 1, and stores, the entry point generation signal generated each time the video encoder generates an I-picture. An output of the video encoder 1 is also connected to the input terminal of the video entry point detection circuit 31. When the video encoder 1 is incapable providing an entry point generation signal, or when the digital video signal to be recorded is already in encoded, the video entry point detection circuit 31 either generates an entry point generation signal each time an I-picture is generated, or detects the entry points in the video signal it receives from the video encoder 1, and provides an entry point generation signal in response. The entry point storage device 33A receives from the video entry point detection circuit 31, and stores, an entry point generation signal each time an entry point is detected. After the video signal and the audio signal have been coded and multiplexed, the resulting multiplexed signal is written in the DSM. Simultaneously, the entry point required to construct a TOC are all stored in the entry point data storage device 33A. Then processing for adding the TOC is started. First, the required entry points are fed from the entry point storage device 33A to the TOC generation circuit 56. A selection is then made by the user or controller (not shown). The entry points fed to the TOC generation circuit 56 are arranged in the format shown in Figure 9. In this example, the TOC includes the positions of N entry points. Each entry point is indicated by a sector address of 4 bytes. Returning to figure 7, the TOC generated by the TOC generation circuit 50 is delivered to the TOC addition circuit 50, whence it is fed to the sector header addition circuit 51 ahead of the multiplexed signal stored in the DSM 10. Then, following the TOC data, the multiplexed signal passes from the DSM 10, through the TOC addition circuit 50, to the sector header addition circuit 51. As shown in Figure 10, each sector accommodates 2,048 bytes in addition to the sector header of 16 bytes. The sector header includes the sector number of the sector. The sector header addition circuit 51 divides multiplexed signal received from the TOC addition circuit 50 into blocks of 2,048 bytes, and adds a sector header of 16 bytes that includes the sector number. The output of the sector header addition circuit 51 is fed into the error correction coding (ECC) encoder 52. The ECC encoder 52 adds a prescribed amount of parity data to multiplexed signal received from the sector header addition circuit 51, and feeds the resulting signal to the modulation circuit 53. The signal from the modulation circuit 53 is fed to the cutting machine 54, which writes the signal onto the optical disk master 60. In the reproducing apparatus shown in Figure 8, the signal recorded on the optical disk 60A is reproduced by the pickup 61. The output signal from the pickup 61 is fed into the demodulation circuit 62, which demodulates the signal from the pickup 61, and feeds the demodulated signal into the ECC circuit 63. The ECC circuit 63 detects and corrects errors in the demodulated signal, and feeds the resulting multiplexed signal into the demultiplexer circuit 64. The video signal 66 demultiplexed by the demultiplexer circuit 64 is fed into the video decoder 65, while the audio signal is fed from the demultiplexer circuit to the audio decoder 66. The video decoder 65 and the audio decoder 66 individually reverse the compression of the compressed signals to provide uncompressed output signals. In response to an instruction from the user (not shown) to reproduce the signal recorded on the disc, the controller 67 sends a command to the video decoder 65 and the audio decoder 66, and provides an access command to the drive control circuit 69. The drive control circuit 69 drives the pickup 61 using the tracking servo circuit 70 in accordance with the command from the controller 67 to effect reproduction from the disc. The TOC positioned at the beginning of the signal recorded on the disk is separated by the demultiplexer circuit 64, fed to the controller 67, and is stored into the TOC storage device 68. The TOC is read out from the TOC storage device 68 when necessary, and is used by the controller 67. Operation of the conventional disk reproducing apparatus shown in Figure 8 will now be described. When the optical disc 60A is inserted, the controller 67 delivers a first sector reading command to the drive control circuit 69. The drive control circuit 69 drivers the pickup 61 by way of the tracking servo circuit 70 to start reproduction from the disc at the position of the top sector on the disk 60A. The pickup 61 illuminates the optical disk 60A with a laser beam, and reproduces the signal recorded on the optical disk 60A using reflected light from the disk. The signal from the pickup 61 is fed to, and is demodulated by, the demodulation circuit 62. The demodulated signal is fed to the ECC circuit 63, where error detection and correction are performed. The resulting multiplexed signal from the ECC circuit is fed to the demultiplexer circuit 64. The TOC is recorded in first sector of the disk. The TOC is demultiplexed by the demultiplexer circuit 64 and is fed to the controller 67. The controller 67 stores the TOC in the TOC storage device 68, and displays the TOC to the user (not shown) on a display (not shown). In response to an instruction from the user (not shown) to reproduce an item selected from the TOC, the controller 67 delivers a command to the drive control circuit 69 to start operation. The drive control circuit 69 drives the pickup 61 by way of the tracking circuit 70 to start reproduction from the read position on the disk 61A indicated by the user's selection from the TOC. The drive control circuit 69 also simultaneously delivers a command to the video decoder 65 and to the audio decoder 66 to prepare to the signals reproduced from the disk. Simultaneously with the reading the TOC, the pickup 61 illuminates the optical disk 60A with a laser beam, and reproduces the signal recorded on the disk using reflected light from the disk. The signal from the pickup 61 is fed to, and is demodulated by, the demodulation circuit 62. The demodulated signal is fed to the ECC circuit 63, where error detection and correction are performed. The resulting multiplexed signal is fed into the demultiplexer circuit 64. The video signal demultiplexed by the demultiplexer circuit 64 is fed to the video decoder 65, while the audio signal demultiplexed by the demultiplexer circuit is fed to the audio decoder 66. The video signal and the audio signal, which are compressed, are expanded by the video decoder 65 and the audio decoder 66, respectively, to provide an uncompressed digital video signal and an uncompressed digital audio signal. When the multiplexed video signal is compressed in accordance with the MPEG coding standard, this imposes a limitation on performing random access or searching operations. In particular, as described above, a video signal compressed according to the MPEG standard includes intra-picture coded pictures, I (intra) pictures, and two types of inter-picture coded pictures: P (forward predictive) pictures and B (bidirectional predictive) pictures. Of the three types of pictures, only I-pictures are coded independently of other pictures. To decode the video signal of an I-picture requires only the video signal of the I-picture itself, and does not require video signals relating to other pictures. Hence, an I-picture can be decoded by itself. However, because of this, the compression efficiency of I-pictures is low. Since P-pictures and B-pictures are obtained by decoding difference signals from preceding and/or following pictures, the compression efficiency of such pictures is high. To decode a P-picture or a B-picture requires the video signal of a reference picture preceding or following the picture being decoded in addition to the video signal of the picture being decoded. Consequently, two I-pictures or so are normally reproduced each second to provide a random access ability while retaining an acceptable average compression efficiency. The digital video signal including I-pictures, P-pictures and B-pictures recorded on the optical disk 60A is divided into more than one Groups of Pictures (GOPs) as described above with reference to Figure 6. As described above, each GOP begins with an I-picture. When the video signal is compressed at a fixed rate, since an I-picture periodically appears at a predetermined location, the location can be determined by calculation and the I-picture accessed. However, when the video signal is compressed at a variable rate, the location of the I-pictures is indeterminate, and it is thus difficult to access the I-picture. In particular, when a search command is received by the disk reproducing apparatus shown in Figure 8, the controller 67 delivers to the drive control circuit 69, the video decoder 65, and the audio decoder 66, and instruction to transition to search mode. In search mode, the video decoder 66 decodes only the I-pictures in the video signal it receives. Alternatively, only video signals representing I-pictures are selected and fed by the demultiplexer circuit 64 to the video decoder 65. The video decoder 65 then decodes the video signals that it receives. In search mode, the drive control circuit 69 delivers to the tracking servo 70 a command to move the read position on the disk forwards or backwards. While the amount of movement of the read position then depends upon the search rate, the compression ratio, etc. Thus, generally, the amount of movement increases as the rate of the search increases, and as the compression ratio increases. When the read position has moved to the selected location, the signal from the pickup 21 is fed to the demultiplexer circuit 64 via the demodulation circuit 62, and the ECC circuit 63. The demultiplexer circuit 64 demultiplexes the video signal and supplies it to the I-picture that appears first, and feeds it to the video output. The audio decoder 66 is muted in search mode. In the manner just described, a search operation that successively reproduces I-picture is performed by carrying out repeated random accesses. Thus, when, for example, the user commands a high-speed forward search, the video decoder 25 searches for an I-picture by skipping a predetermined number of frames of the video signal it receives, and then decodes and feeds to the output each resulting I-picture. Alternatively, in response to an instruction from the controller 67, the drive control circuit 69 drives the tracking servo circuit 70 to search for an I-picture, and only the video signals of I-pictures are supplied to, and decoded by, the video decoder 65. A search operation involving a successive reproduction of I-picture is carried out by repeating such operations. Subsequently, the time required for decoding of an I picture upon searching will be estimated. When the DSM 10 is regarded as a CD-ROM drive, the time is a sum of the following parameters. Head seek time: M (depending upon the mechanical structure) Servo settling time: N (depending upon a servo circuit) Maximum rotation waiting time: about 300 milliseconds or so at an outer circumference of a compact disk Data read time: 150 milliseconds or so for an I-picture Since the time relates to a searching operation for an adjacent I-picture, it is forecast that, of the parameters given above, the head seek time M and the servo settling time N are very short comparing with the rotation waiting time, and accordingly, they are ignored. As a result, it is considered that the period of the variation in picture is about 450 milliseconds in the maximum. The maximum rotation waiting time is a time required when an outermost circumference (diameter 116 mm) of a compact disk is waited at the linear velocity of 1.2 m/s. Meanwhile, the data read time can be calculated in the following manner. In the case of the MPEG, the amounts of data allocated to an I-picture, a P-picture and a B-picture are different from one another so that compression is performed efficiently. For example, 150 Kbits are allocated to an I-picture since compression only in the picture is involved; 75 Kbits are allocated to a P-picture since also this is comparatively important; and 5 Kbits are allocated to a B-picture since it can be interpolated bidirectionally. In particular, a GOP which is constituted from 15 pictures involves a total of 500 Kbits since it includes one I-picture, four P-pictures and ten B-pictures, and 1 Mbits require one second, which coincides with the data rate of a CD-ROM. In this instance, reading of one I-picture requires 150/1,000 = 150 milliseconds. From the foregoing calculation, the picture changes one by on for each 450 milliseconds in the maximum. In the conventional apparatus, because the position of an I-picture (i.e., an access point) is not known, the search process must wait for an access point to appear after the read position has been moved by some amount. Consequently, the search operation can have a cycle time that is so long that rapid searching is difficult. Further, in the conventional apparatus, since the rotation waiting time and the data read time for an I-picture are very long as described above, the period of the variation in picture upon searching is very long. Consequently, there is a subject in that a searching operation achieves a variation only of two or so pictures for on second and the operation is poor. The present invention has been made in view of the situation just described, and makes it possible to locate the access point rapidly to achieve rapid searching. It is another object of the present invention to realize a variation in picture which is higher than ever upon searching. DISCLOSURE OF INVENTION The invention is as set out in the claims. Accordingly, a first aspect of the invention provides an apparatus for preparing a variable-rate coded signal using a variable compression ratio and including a signal portion of a predetermined type, for recording on a recording medium. The apparatus comprises a circuit that generates a flag signal indicating the signal portion of the a predetermined type in the variable-rate coded signal. A signal-type marker generating circuit generates a signal-type marker in response to the flag signal. Finally, the apparatus includes a circuit that multiplexes the signal-type marker with the variable-rate coded signal to produce a multiplexed signal. The signal-type marker is located adjacent to the signal portion of the predetermined type in the multiplexed signal. Where the multiplexed signal is divided into packs of plural packets, the signal marker is included in an entry packet located immediately preceding a packet that includes the signal portion of the predetermined type. Where the multiplexed signal is divided into sectors and each sector includes a sector header, the signal marker is included as subcode in the sector header of a sector that includes the signal portion of a predetermined type. Each signal marker may include location information showing the location on the recording medium of an additional signal-type marker and its accompanying signal portion of the predetermined type. Each signal marker may include location information showing the locations on the recording medium of plural additional signal-type markers successively preceding and following the signal-type marker. When the digital input signal is a video signal comprising plural pictures compressed either in an intra-picture mode or an inter-picture mode, a signal-type marker is generated when the picture is compressed in the intra-picture mode. The invention also provides a method for preparing a variable-rate coded signal, generated by compressing a digital input signal using a variable compression ratio and including a signal portion of a predetermined type, for recording on a recording medium. According to the method of the invention, a flag signal is generated indicating the signal portion of the predetermined type in the variable-rate coded signal. A signal-type marker is generated in response to the flag signal. Finally, the signal-type marker is multiplexed with the variable-rate coded signal to produce a multiplexed signal. The signal-type marker is located adjacent to the signal portion of the predetermined type in the multiplexed signal. Where the multiplexed signal is divided into packs of plural packets, the signal marker is included in an entry pack, and the multiplexing step locates the entry packet immediately preceding a packet that includes the signal portion of the predetermined type, Where the multiplexed signal is divided into sectors and each sector includes a sector header, the multiplexing step includes the signal marker as subcode in the sector header of a sector that includes the signal portion of a predetermined type. The step of generating a signal marker may generate a signal marker including location information showing the location on the recording medium of an additional signal-type marker and its accompanying signal portion of the predetermined type. Signal markers may also be generated that include location information showing the locations on the recording medium of plural additional signal-type markers successively preceding and following the signal-type marker. When the digital input signal is a video signal comprising plural pictures compressed either in an intra-picture mode or an inter-picture mode, the step of generating a signal-type marker generates a signal marker when the picture is compressed in the intra-picture mode. The invention further provides an apparatus for successively reproducing portions of a multiplexed signal recorded on a recording medium to effect a high-speed search. The multiplexed signal includes a variable-rate coded signal and signal-type markers identifying signal portions of a predetermined type in the variable-rate coded signal. The apparatus comprises a system that reproduces a portion of the multiplexed signal from a read position on the recording medium. A demultiplexing circuit demultiplexes the variable-rate coded signal and a signal-type marker from the portion of the multiplexed signal. The apparatus also includes a control circuit that changes the read position in response to the signal-type marker. The signal-type marker may include location information indicating a location on the recording medium of an additional signal-type marker, in which case, the control circuit changes the read position in response to the location information in the signal-type marker. The control circuit may include a circuit for extracting the location information from the signal-type marker, and may change the read position to a new read position indicated by the location information. Then, the reproducing system reproduces the multiplexed signal including the additional signal-type marker from the new read position. The signal portion of the predetermined type may be an expandable portion of the variable-rate coded signal, and an expandable portion of the variable-rate coded signal may immediately follow each signal-type marker in the multiplexed signal. At each read position, the portion of the multiplexed signal reproduced by the reproducing system includes a signal-type marker and an expandable portion of the variable-rate coded signal. The apparatus may additionally include a circuit for expanding the expandable portion of the variable-rate coded signal extracted from the reproduces multiplexed signal by the demultiplexer, and for providing the expanded expandable portion as an output signal. The invention also provides a method of successively reproducing portions of a multiplexed signal recorded on a recording medium to effect a high-speed search. The multiplexed signal includes a variable-rate coded signal and signal-type markers identifying signal portions of a predetermined type in the variable-rate coded signal. The method according to the invention repeats the following steps: portion of the multiplexed signal is reproduced from a read position on the recording medium; the variable-rate coded signal and a signal-type marker are demultiplexed from the reproduced portion of the multiplexed signal; and the read position is changed in response to the signal-type marker. The signal-type marker may include location information indicating a location on the recording medium of an additional signal-type marker, in which case, the read position is changed in response to the location information in the signal-type marker. The location information may be extracted from the signal-type marker, and the read position changed to a new read position indicated by the location information. Then, the multiplexed signal including the additional signal-type marker is reproduced from the new read position. The signal portion of the predetermined type may be an intrinsically expandable portion of the variable-rate coded signal, and an intrinsically expandable portion of the variable-rate coded signal may immediately follow each signal-type marker in the multiplexed signal. At each read position, the portion of the multiplexed signal reproduces by the reproducing system includes a signal-type marker and an expandable portion of the variable-rate coded signal. The intrinsically expandable portion of the variable-rate coded signal extracted from the reproduced multiplexed signal by the demultiplexer may be expanded, and the expanded intrinsically expandable portion may be provided as an output signal. The invention also provides a method of reproducing pictures from a recording medium in a fast search mode. Each picture is stored in the recording medium in the form of a video signal compressed in one of an intra-picture compression mode and an inter-picture compression mode. The video signal of a picture compressed in the intra-picture compression mode is an I-picture, The video signal of a picture compressed in the inter-picture compression mode with only forward prediction is a P-picture. The video signal of a picture compressed in the inter-picture compression mode with both forward and backward prediction is a B-picture. The method according to the invention repeats the following steps: a read position is jumped on the recording medium; an I-picture is immediately reproduced from the read position; and the I-picture and the at least one of a B-picture and a P-picture are expanded to provide an uncompressed output signal. Finally, the invention provides a recording, comprising a recording medium and a multiplexed signal recorded in the recording medium. The multiplexed signal includes a variable-rate coded signal including signal portions of a predetermined type, and a signal-type marker adjacent each signal portion of the predetermined type. The signal-type marker identifies the signal portion of the predetermined type. The signal-type marker may include location information indicating a location information indicating a location on the recording medium of an additional signal-type marker, or location information indicating location on the recording medium of plural adjacent signal-type markers successively disposed about the signal-type marker in the recording medium. BRIEF DESCRIPTION OF DRAWINGS Figure 1 is a block diagram showing the construction of an example of a conventional apparatus for recording multiplexed compressed audio and compressed video signals. Figure 2 is a block diagram showing the construction of an example of a conventional apparatus for reproducing multiplexed compressed audio and compressed video signals. Figure 3 shows the format of the multiplexed signal in the examples shown in Figures 1 and 2. Figure 4 shows the stream_ID portion of the packet shown in Figure 3. Figure 5 is a flow chart illustrating part of the operation of the example shown in Figure 1. Figure 6 shows part of the compressed video signal recording on the disk of the DSM shown in Figures 1 and 2. Figure 7 is a block diagram showing the construction of another example of a conventional apparatus in which the multiplexed signal is recorded on an optical disk. Figure 8 is a block diagram showing a construction of another of a conventional apparatus in which the multiplexed signal is reproduced from an optical disk. Figure 9 shows the structure of the Table of Contents (TOC) in the examples shown in Figures 7 and 8. Figure 10 shows the sector structure in the conventional examples shown in Figures in the conventional examples shown in Figures 7 and 8. Figure 11 is a block diagram showing the construction of an embodiment of a recording apparatus according to of the present invention. Figure 12 is a block diagram showing the construction of an embodiment of reproducing apparatus according to the present invention. Figure 13 shows the pack format on the disk of the DSM of the embodiment shown in Figures 11 and 12. Figure 14 shows the format of the entry packet shown in Figure 13. Figure 15 is a flow chart illustrating part of the operation of the embodiment shown in Figure 11. Figure 16 is a block diagram showing the construction of another embodiment of a recording apparatus according to the present invention. Figure 17 is a block diagram showing the construction of another embodiment of a reproducing apparatus according to the present invention. Figure 18 shows the sector structure of the disk in the embodiments shown in Figures 16 and 17. Figure 19 shows the subcode data on the disk in the embodiments shown in Figures 16 and 17. Figure 20 shows the bit stream which is used to explain a data decoding method of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION Figures 11 and 12 are block diagrams showing the construction of a first embodiment of a recording apparatus and a reproducing apparatus according to the present invention. Components corresponding to those in the conventional apparatus shown in Figures 1 and 2 are indicated by the same reference characters. In the recording apparatus shown in Figure 11, the output terminal of the video encoder 1 is connected to the input terminal of the video entry point detection circuit 31, an output terminal of which is connected to the input terminal of the video signal buffer 4. The entry packet generation circuit 32 receives a control input from the control circuit 8, and supplies entry packets to the input terminal E3 in the switching circuit 6. The control circuit 8 also receives system clock signals from the multiplexing system clock generation circuit 9, and causes the switching circuit 6 to connect the output terminal F to the input terminals E1, E2, and E3 successively at a predetermined time interval. This successively fetches, and multiplexes by time-division multiplexing, the video signal from the video signal buffer 4, the audio signal from the audio signal buffer 5, and entry packets from the entry packet generation circuit 32. The time-division multiplexed signal is fed to the header addition circuit 7. The control circuit 8 also causes the header addition circuit 7 to add a video packet header to the video signal read out from the video signal buffer 4, and to add an audio packet header to the audio signal read out from the audio signal buffer 5. The control circuit 8 also receives as an input the entry point generation signal generated in response to an I-picture supplied by the video encoder 1 or the video entry point detection circuit 31, and causes the entry packet generation 32 to insert an entry packet at a predetermined position in the video signal. When the video encoder 1 is capable of providing an entry point generation signal, it provides an entry other hand, when the video encoder 1 is incapable of providing an entry point generation signal, or when the video signal to be recorded is already coded, the video entry point detection circuit 31 generates the entry point generation signal. The video entry point detection circuit generates an entry detection signal when an I-picture is generated, or when it detects an entry point in the video signal it receives from the video encoder 1. The entry point storage device 33 is a memory that can be read and written by the control circuit 8, and which stores the position of each detected entry point. The construction of the rest of the apparatus is similar to that shown in Figure 1. In the embodiment shown in Figure 11, the multiplexed signal includes at least one pack, and an ISO_11172_end_code. Each pack has the pack format shown in Figure 3. The pack begins with a Pack_Header consisting of a Pack_Start_Code, an SCR, and a MUX_Rate. Following the Pack_Header is a video packet consisting of a Video_Packet_Header followed by a portion of the video signal that includes no I-picture. Following the video packet is an entry packet, followed by another video packet consisting of a Video_Packet_Header and a portion of the video signal that includes an I-picture. Thus, an entry packet is located immediately prior to the Video_Packet_Header of a video packet that includes an I-picture, i.e., an entry point. Also, an audio packet, consisting of an Audio_Packet_Header followed by a portion of the audio signal follows the video packet. The entry packet has the format illustrated in Figure 14. The format corresponds to the packet format of the private_ stream_2 packet defined by the MPEG standard. The entry packet begins with a Packet_Start_Code_Prefix, followed by a stream_ID of 0xBF in hexadecimal notation, and the length of the packet. This arrangement is similar to that to that of the packet header shown in Figure 3. In entry packet according to the present embodiment, a **** _ id follows the packet length. The **** _id indicates that the private_stream_2 packet has a format peculiar to the party identified by **** . Following the **** _id, the **** _packet_type is disposed, which identifies the packet type from among the private packet types belonging to the identified party, and is 0xFF for an entry packet. There then follows current_#_data_ streams, current_#_video_streams indicating the number of data streams, the number of video stream, and the number of audio streams multiplexed immediately prior to the current entry point. Following current_#_audio_streams are entry_packet_-3, entry_packet_-2, entry_packet_-1, entry_packet_+1, entry_packet_ +2, and entry_packet_+3. These indicate the relative distances between the potion of the current entry point and the position of the three previous entry points and the three following entry points in terms of the number of sectors of the disk in DSM 10. Alternatively, the positions of the preceding and following entry points can be indicated in terms of absolute location on the DSM 10. Operation of the embodiment shown in Figure 11 will now be described. The control circuit 8 receives an entry point generation signal from the video encoder 1 or from the entry point detection circuit 31, and inserts an entry packet immediately prior to the entry point (Figure 13). In particular, when the control circuit 8 receives an entry point generation signal,the control circuit 8 causes the entry packet generation circuit 32 to generate an entry packet. The control circuit also causes the switching circuit 6 to switch to the input terminal E3 so that the entry packet can be multiplexed with the video signal and the audio signal from the signal buffers 4 and 5, respectively, and supplied to the header addition circuit 7. As shown in Figure 14, in each entry packet, the distances between the current entry point and the positions of the three previous entry points and the three following entry points are recorded in entry_packet_-3, entry_packet_-2, entry packet_-1, entry_packet_+1, entry_packet_+2, and entry_packet_+3, respectively. By storing the positions of the three prior entry points in the entry packet storage device 33, this information is known and can be recorded on the DSM 10 of the following entry points are not known when the current entry packet is recorded on the DSM 10. Therefore, the control circuit 8 stores the positions of all the entry points in the entry point storage device 33. Then, after all of the signals to be recorded have been recorded on the DSM 10, the control circuit 8 reads out from the entry point storage device 33 the positions of the three previous entry points and the three following entry points. The control circuit 8 supplies the read out positions to the DSM 10, which inserts them into each entry packet recorded on the DSM 10. Alternatively, the distances from the current entry point to the three previous and three following entry points can be calculated from the positions of the entry points and inserted into the entry packet. Since the video encoder 1 and the audio encoder 2 encode the video signal and the audio signal, respectively, at a variable rate, the control circuit 8 causes the multiplexer 6 to include a total of 2,048 bytes in each pack. To achieve this, the control circuit 8 controls header addition, signal reading from the signal buffers 4 and 5, and entry packet insertion using an algorithm such as that shown, for example, in Figure 15. Similar to the processing shown in Figure 5, M4 represents the number of bytes of video signal accumulated in the video signal buffer 4, and M5 represents the number of bytes of audio signal accumulated in the audio signal buffer 5. Further, D represents the total number of signal bytes in one pack. For simplicity, it will be assumed that D is a constant obtained by subtracting the number of bytes in the pack header, the number of bytes in the video packet header, and the number of bytes in the audio packet header from the number of bytes (2,048) in the pack. D2 represents the total number of signal bytes in a pack that includes an entry packet. D2 is obtained by subtracting the number of bytes in the entry packet and the number of bytes in the video packet header from D. In the algorithm shown in Figure 15, in step S11, the control circuit 8 first instructs the header addition circuit 7 to generate a pack header. Then, at step S12, the control circuit 8 waits until the sum of M4 and M5 is equal to or greater than the number of signal bytes D included in one pack. In other words, the control circuit 8 waits until after the total number of signal bytes accumulated in the signal buffers 4 and 5 is equal to the number of signal bytes accommodated in one pack. At step S13, the number of bytes P1 of video signal that will be accommodated in the pack and the number of bytes P2 of audio signal that will be accommodated in the pack are calculated in accordance with the equations set forth below. P1 and P2 are values obtained by distributing the total number of signal bytes D accommodated by the pack according to the ratio of numbers of signal bytes M4 and M5 accumulated in the respective signal buffers 4 and 5. P1 = D * M4/(M4 + M5) P2 = D - P1 At step S14, the control circuit 8 determines whether or not a video entry point is included in the first P1 bytes of the M4 bytes of video signal. If there is no video entry point in the video signal to be accommodated in the pack, at step S15, the control circuit 8 instructs the header addition circuit 7 to provide a video packet header. Then, at step S16, P1 bytes of video signal are transferred from the video signal buffer 4 to the DSM 10. Similarly, at step S17, the control circuit 8 instructs the header addition circuit 7 to provide an audio header, and, at step S18, P2 bytes of audio signal are transferred from the audio signal buffer 5 to the DSM 10. If there is no video entry point in the video signal accommodated in the pack, the processing described above is then repeated. This processing is similar to the processing described above with reference to Figure 5. If it is determined at step S14 that there is a video entry point in the video signal to be accommodated in the pack, the control circuit 8 first stores the position of the current pack in the entry point storage device 33, and execution branches to step S19. There, the number of bytes P1' of video signal and the number of bytes P2' of audio signal to be accommodated in the pack are calculated in accordance with the equations: P1' = D2 * M4/(M4 + M5) P2' = D2 - P1 The reason why a calculation is performed at step S19 after a similar calculation has been performed at step S13 is that the at number of signal bytes that can be accommodated by the pack is reduced because an entry packet is included in the pack. P1' and P2' are values obtained by distributing the total number or signal bytes D2 accommodated by the pack according to the ratio of numbers of signal bytes M4 and M5 accumulated in the signal buffers 4 and 5. At step S20, the header addition circuit 7 generates a video packet header and feeds it to the DSM 10. Then, at step S21, the control circuit 8 transfers the video signal up to immediately before the video entry point from the video signal buffer 4 to the DSM 10. At step S21, the entry packet generation circuit 32 generates the entry packet and feeds it to the DSM 10. However, the relative position information included in the entry packet is not written onto the DSM 10 at this step. At step S23, the header addition circuit 7 generates a second video packet header and feeds it to the DSM 10. At step S24, the remaining video signal bytes are transferred to the DSM 10. Then, execution returns to steps S17 and S18, where the audio packet header and P2' bytes of audio signal are transferred from the audio signal buffer 5 to the DSM 10. The DSM 10 records the resulting multiplexed signal. The algorithm shown in Figure 15 is repeated, and, when all of the signals to be recorded have been recorded, the relative position information is written into the entry packets already recorded on the DSM 10. The control circuit 8 reads out the position of each entry packet from the entry point storage device 33, and causes the positions of the three preceding entry packets and the three following entry packets to be written into each entry packet recorded on the DSM 10. The apparatus for reproducing signals recorded by the embodiment of Figure 11 will now be described with reference to Figure 12. The header separation circuit 22 in the separation circuit 21 separates pack headers, packet headers and entry packets from the signal read out from the DSM 10 and supplies them to the control circuit 24. The remaining time-division multiplexed signal is supplied to the input terminal G of the switching circuit 23. The output terminals H1 and H2 of the switching circuit 23 are connected to the input terminals of the video decoder 25 and the audio decoder 26, respectively. The control circuit 24 supplies each entry point it receives from the header separation circuit 22 to the entry point storage device 41, where it is stored. Since the current read position is supplied from the drive apparatus 10 to the control circuit 24, the control circuit 24 can store the position of the entry point and contents of same in a corresponding relationship to each other. The control circuit 24 of the separation circuit 21 causes the switching circuit 23 to connect the input terminal G successively to the output terminals H1 and H2 in accordance with the stream_ID of the packet header received from the header separation circuit 22. This demultiplexes the time-division multiplexed signal received from the header separation circuit 22 and supplies the video signal to the video decoder 25 and the audio signal to the audio decoder 26. Operation of the multiplexed signal reproducing apparatus shown in Figure 12 during a search operation will now be described. In response to a search command, the main control apparatus (not shown) instructs the control circuit 24, the video decoder 25, and the audio decoder 26 to transition into search mode. The control circuit 24 reads the current read position from the DSM 10, and extracts entry points around the current read position from the entry point storage device 41. The entry point information in the entry packets reproduced in reproduction mode are continuously stored in the entry point storage device 41. Alternatively, the entry point information in all entry packets recorded on DSM 10, or the entry point information in a predetermined range of entry packets may be read out and stored in the entry point storage device 41 at predetermined times, such as when the apparatus is first switched on, when a disk is mounted in the DSM 10, or in response to a reproduce instruction. When the control circuit 24 determines an entry point location, it sends a search instruction to the DSM 10 to move the read position at high speed to the DSM 10 to move the read position at high speed to the position of the entry point. When the movement is completed, the DSM 10 begins reproducing at the entry point, and supplies the reproduced signal to the separation circuit 21. As described above with reference to Figure 13, an entry packet is disposed immediately before the video signal of an I-picture. Accordingly, if the video signal following the entry packet is separated by the header separation circuit 22 and supplied to the video decoder 25, then the first picture of the video signal is an I-picture. The video decoder 25 immediately decodes the I-picture and feeds it to the video outputs. The audio decoder 26 is muted in search mode. Since the positions of the three preceding entry points and three following entry points are recorded in each entry packet, the control circuit 24 uses the position information of the next entry packet written in the present entry packet to move the read position to the next entry packet, which it then reproduces. By repeating this process, a rapid succession of I-pictures is reproduced. The control circuit 24 causes the read position to jump to a more distant entry point when the rate of search is high, but causes the read position to jump to a closer entry point when the rate of search is low. Since the positions of three entry points are recorded in each of the forward direction and the reverse direction, three or more variations in the search rate are available depending upon combinations of entry point positions selected. Figures 16 and 17 are block diagrams showing the construction of another embodiment of the multiplexed signal recording apparatus and the multiplexed signal recording apparatus of the present invention. Components corresponding to those in the conventional apparatus shown in figure 7 and 8 are indicated by the same reference characters. In the recording apparatus shown in Figure 16, entry points stored in the entry point storage device 33A are fed to the TOC generation circuit 56 and to the subcode generation circuit 80. The output of the subcode generation circuit 80 is fed to the CRC encoder 81. The output of the CRC encoder 81 is fed to the subcode synchronization pattern addition circuit 82, the output of which is fed to the subcode buffer 83. The subcode addition circuit 84 multiplexes the signal received from the sector header addition circuit 51 with data received from the subcode buffer 83, and feeds the multiplexed signal to the ECC encoder 52. The construction of the rest of the circuit is similar to the conventional apparatus shown in Figure 7. Operation of the recording apparatus shown in Figure 16 will now be described. The video signal to be recorded and the audio signal to be recorded are compressed and multiplexed, the multiplexed signal is recorded on the DSM 10, and the entry points of the video signal are stored in the entry point storage device 33A in a manner similar to that in corresponding operations in the conventional recording apparatus entry point storage device 33A and fed to the TOC generation circuit 56 to generate a TOC, and the TOC is added to the beginning of the multiplexed signal by the TOC addition circuit 50 in a manner similar to that in corresponding operations in the conventional recording apparatus shown in Figure 7. The recording apparatus according to the invention shown in Figure 16 differs from the conventional example shown in Figure 7 in that entry points are additionally fed from the entry point storage device 33A to the subcode generation circuit 80. In the present embodiment, the subcode has the format shown in Figure 19. A subcode synchronization pattern (2 bytes) is located at the beginning of the subcode. This is used so that the beginning of the subcode may be identified even if reading is started at an arbitrary sector. Following the subcode synchronization pattern is located the ****_subcode_type. This indicates the type of subcode peculiar to the parity identified by **** . A ****_subcode_type of 0xFF indicates that the subcode is entry point data. Next follows current_#_data_streams, current Q_#_ video_streams, and current_#_audio_streams, which indicate the number of data streams, the number of video streams, and the number of audio streams multiplexed in the sector in which the subcode is included. Following the current_#_audio stream are successively located entry_point_-3, entry_point_-2, entry_point_-1, entry_ point_+1, entry_point_+2 and entry_point_+3. These indicate the positions of the three following entry points, in terms of the distance between the sector in which the current entry point appears on the disk 60, which will be recorded by the cutting machine 54 in a subsequent operation. Alternatively, the entry point positions may be defined in terms of absolute sector addresses on the disk 60. In the following description, it will be assumed that effective capacity of one sector is 2,048 bytes, and that the sector header requires an additional 16 bytes, as shown in Figure 18. The sector header includes the sector number of the sector. The sector header addition circuit 51 divides the multiplexed signal it receives from the TOC addition circuit 51 into blocks of 2,048 bytes each, and adds a sector header that are not used in the conventional apparatus are used to represent subcode in the apparatus according to the invention. The positions of the sectors in which the three previous entry points and the three following entry points appear are read out from the entry point storage device 33A and are delivered to the subcode generation circuit 80. The subcode generation circuit 80 generates the subcode shown in Figure 19 using the entry points received from the entry point storage device 33A, and information from the controller and the user (not shown). The subcode is fed to the CRC encoder 81, which calculates a CRC code, adds the CRC code to the end of the subcode, and feeds the result to the subcode synchronization pattern addition circuit 82. The subcode synchronization pattern addition circuit 82 adds a synchronization pattern to the beginning of the subcode received form the CRC encoder 81, and feeds the resulting subcode to the subcode buffer 83. The multiplexed signal read out from the DSM 10 via the TOC addition circuit 50 passes into the sector header addition circuit 51, which divides the multiplexed signal into blocks of 2,48 bytes and adds a sector header of 16 bytes. The sector header addition circuit 51 also writes the sector number in the sector header. The output of the sector header addition circuit 51 is fed to the subcode addition circuit 84, which reads 8 bytes of the subcode out of the subcode buffer 83, and writes them into the sector header in the subcode location therein. Since the subcode includes a total of 32 bytes and the subcode location accommodates 8 bytes, each subcode is distributed among four sectors. The output of the subcode addition circuit 84 is fed via the ECC encoder 52 and the modulation circuit 53 to the cutting machine 54, which records the resulting modulated signal onto the optical disk master 60. As shown in Figure 19, the positions of the three previous entry points and the three following entry points are written in the locations entry_point_-3, entry_point_-2, entry_point_-1, entry_point_+1, entry_point_+2, entry_point_+3, respectively in the subcode. Finally, the apparatus for reproducing a disk recorded by the embodiment show in Figure 16 will be described with reference to Figure 17. The signal demodulated by the demodulation circuit 62 is fed to the ECC circuit 63, and also to the subcode detection circuit 90. The output of the subcode detection circuit 90 is fed to the subcode CRC circuit 91, which performs error detection. A Subcode for which no error has been detected is fed to the subcode buffer 92 in preparation of reading by the controller 67. The controller 67 includes an entry point storage device 93 which stores entry points received from the subcode buffer 92 in readiness for when a search instruction is received from the user (not shown). The construction of the rest of the circuit is similar to that of the conventional embodiment shown in Figure 8. Operation of the disk reproducing apparatus shown in Figure 17 will now be described. When the optical disk 60A is inserted into the apparatus, the controller 67 delivers a read first sector command to the drive control circuit 69. The drive control circuit 69 drives the pickup 61 via the tracking servo circuit 70 to the position of the first sector on the optical disk 60A and starts reproduction from the beginning of the first sector. The pickup 61 illuminates the surface of the optical disk 60A with a laser beam, and reproduces the signal recorded on the disk using reflected light from the disk. The signal from the pickup 61 is fed into the demodulation circuit 62, which demodulates it. The demodulated signal is fed to the ECC circuit 63, Which performs error detection and correction. The resulting error-corrected signal is fed to the demultiplexer circuit 64. The TOC, which is recorded in the first sector of the optical disk 60A, is separated by the demultiplexer circuit 64 and fed to the controller 67. The controller 67 causes the TOC storage device 68 to store the TOC and causes the TOC to be displayed to the user (not shown) on a display (not shown). The controller 67, after receiving a reproduce command from the user (not shown) delivers a command to the drive control circuit 69 to start operation. The drive control circuit 69 drives the pickup 61 via the tracking servo circuit 70 to start reproduction from the position on the disk 60 indicated by the user. At the same time, the drive control circuit 69 delivers a command to the video decoder 65 and the audio decoder 66 to prepare to decode input signals. After reading the TOC, the pickup 61 illuminates the surface of the optical disk 60A with a laser beam, and reproduces the signal recorded on the disk using reflected light from the disk. The signal from the pickup 61 is fed to the demodulation circuit 62, which performs demodulation. The demodulated signal is fed to the ECC circuit 63, which performs error detection and correction. The resulting error corrected signal is fed to the demultiplexer circuit 64. The video signal separated by the demultiplexer 64 is fed to the video decoder 65, and the audio signal is fed to the audio decoder 66. The video signal and the audio signal, which are compressed, are expanded by the video decoder 65 and the audio decoder 66, respectively, to provide a decompressed digital video signal and a decompressed digital audio signal, respectively. The signal from the demodulation circuit 62 is also fed to the subcode detection circuit 90. The subcode detection circuit 90 extracts the portions of subcode from the sector headers. In this example, 8 bytes of subcode are extracted from each sector header. The subcode synchronization pattern is detected in the subcode extracted from plural sector headers, and the subcode is fed into the subcode CRC circuit 91 starting with the beginning of the subcode. The CRC circuit 91 determines from the subcode it receives and CRC data therein whether there is an error in the subcode. When no error is found, the subcode is fed to the subcode buffer 92. The controller 67 reads the entry points from the subcode buffer 92 and supplies them to the entry point storage device 93, which stores them. Since the drive control circuit supplies the current read position to the controller 92, the controller 67 can cause the positions of the entry points and contents of the entry points to be stored in a corresponding relationship to each other. Operation of multiplexed signal reproduction apparatus shown in Figure 17 during a search now be described. When the user (not shown) enters a search command, the controller 67 instructs the video decoder 65 and the audio decoder 66 to enter into search mode. The controller 67 also reads the current read position from the output of the drive control circuit 69, and reads the positions of entry points near the current read position from the entry point storage device 93. After the controller determined the position of the entry point from the entry points from the entry storage device, it sends a search instruction to the drive control circuit 69. The drive control circuit 69 drives the tracking servo circuit 70 to move the pickup 61 at high speed to the position of the entry point determined by the controller. After the movement is completed, the pickup 61 starts reproducing from the entry point and feeds the reproduced signal to the demodulation circuit 62. The demodulated signal is supplied to the video decoder 65, via the ECC circuit 63 and the demultiplexer circuit 64, and the subcode portion is separated from the demodulated signal by the subcode detection circuit 90, the subcode CRC circuit 91, and the subcode buffer 92. The resulting subcode is fed to the controller 67 for use. Since pickup 61 starts reproduction at an entry point, the first picture of the video signal supplied to the video decoder 65 is an I-picture. The video decoder 65 immediately decode the I-picture, and feeds it to the video output. The audio decoder 66 is muted in search mode. Since the positions of the previous three entry points and the following three entry points relative to the current position of the pickup are recorded in the subcode reproduced from the current position, the controller 67 uses the reproduced position information to cause the pickup to jump to next entry point, and repeats the sequence of jumping to the next entry point and reproducing the I-picture from the disk starting at the next entry point. This results in a rapid succession of I-picture being reproduced from the disk. The controller 67 causes the pickup 61 to jump to a more distant entry point when the rate of search in high, and causes the pickup 61 to jump to a closer entry point when the rate of search is low. Since three entry points are stored for each of the forward direction and the reverse direction, three or more variations in search rate can be obtained by selecting different combinations of entry points. Subsequently, another embodiment of data decoding method of the present invention will be described. The apparatus used in the present embodiment is the multiplexed data decoding apparatus of Fig. 12. When an instruction of a searching operation is developed, the main control apparatus not shown instructs the control apparatus 24, the video decoder 25 and the audio decoder 26 to enter into a search mode. (In the search mode, the audio decoder 26 is kept in a mute condition.) In the search mode, the control apparatus 24 instructs the DSM 10 of a command to move the read position of data on the disk forwardly (or rearwardly). While the amount of movement of the read position then depends upon the searching rate, the coding rate and so forth, generally the amount of movement increases as the coding rate increases. When the read position moves to a predetermined position, data outputted from the DSM 10 are inputted to the separation apparatus 21. The header separation circuit 22 separates video data and supplies them to the video decoder 25. Here, if it is assumed that the constitution of pictures in one GOP is |BBIBBPBBPBBPBBP |, then the order is changed for decoding on a bit stream to |IBBPBBPBBPBBPBB | as shown in Fig. 20. This conforms to the allocation of bit number for individual pictures described in the conventional example described hereinabove. In the embodiment of the present invention, the video decoder 25 reads an I-picture which appears first and two B-pictures, one P-picture and further two B-pictures succeeding to the I-picture, and decodes, that is, decodes, and outputs them. Consequently, since decoding of the I, B, B and P-pictures except the first two B-pictures is possible, four moving pictures can be outputted by one access. When the position of an I-picture is known from the information of the subcode/ the private packet or the like, searching for an I-picture is performed by the DSM 10 using the information, and six successive pictures are read in similarly as described above. In such embodiment of the present invention as described above, the time required for one searching operation will be estimated. When the DSM 10 is regarded as a CD-ROM drive, the time is a sum of the following parameters. Head seek time: M (depending upon the mechanical structure) Servo settling time: N (depending upon a servo circuit) Maximum rotation waiting time: about 300 milliseconds or so at an outer circumference of compact disk Data read time: 245 milliseconds or so for 6 pictures Since the time relates to searching operation for an adjacent I-picture, it is forecast that, of the parameters given above, the head seek time M and the servo settling time N are very short comparing with the rotation waiting time, and accordingly, they are ignored. As a result, it is considered that the period of the variation in picture is about 545 milliseconds in the maximum. Reading of the six I, B, B, P, B and B-pictures then requires (150 + 75 + 4 * 5)/ 1,000 = 245 milliseconds. According to the present embodiment, the variation of about 8 pictures or so can be obtained for one second. Consequently, the psychological waiting time of the user can be reduced. It is to be noted that, while, in the present embodiment, the data to be read out upon searching are described being 6 successive pictures beginning with an I-picture, a similar effect can be obtained by reading out two or more pictures including an I-picture. Also the algorithm wherein a predetermined amount of data are read into the video code buffer may be available. Although illustrative embodiments of the invention have been described herein in detail, it is to be understood that the invention is not limited to the precise embodiments described, and that various modifications may be practiced within the scope of the invention defined by the appended claims.

Claims: An apparatus for preparing a variable-rate coded signal, generated by compressing a digital input signal using a variable compression ratio and including a signal portion of a predetermined type, for recording on a recording medium, the apparatus comprising: means for generating a flag signal indicating the signal portion of the predetermined type in the variable-rate coded signal; signal-type marker generating means for generating a signal-type marker in response to the flag signal; and multiplexing means for multiplexing the signal-type marker with the variable-rate coded signal to produce a multiplexed signal, the signal-type marker being located adjacent to the signal portion of the predetermined type to indicate the signal portion of the predetermined type in the multiplexed signal. The apparatus of claim 01, wherein the multiplexing means multiplexes the signal-type marker with the variable-rate coded signal to locate the signal-type marker immediately ahead of the signal portion of the predetermined type in the multiplexed signal. The apparatus of claim 02, wherein: the digital input signal is a digital video signal including plural pictures, each picture being compressed in one of an intra-picture mode and an inter-picture mode; and the means for generating a flag signal receives the variable-rate coded signal, and generates the flag signal when the variable-rate coded signal includes a signal portion resulting from compressing a picture in the intra-picture mode. The apparatus of claim 02, wherein: the apparatus additionally comprises means for recording the multiplexed signal on a recording medium; and the signal-type marker generating means is for generating a signal-type marker including information indicating a location on the recording medium of an additional signal-type marker, the additional signal-type marker being proximate to the signal-type marker in the multiplexed signal. The apparatus of claim 02, wherein: the apparatus additionally comprises means for recording the multiplexed signal on a recording medium; and the signal-type marker generating means is for generating a signal-type marker including information indicating locations on the recording medium of plural additional signal-type markers successively disposed about the signal-type marker in the multiplexed signal. The apparatus of claim 01, wherein: the apparatus receives an uncompressed digital video signal comprising plural pictures; the flag generating means comprises compressing means for compressing the uncompressed digital video signal using a variable compression ratio to provide the variable-rate coded signal, the compressing means generating the flag signal when the variable-rate coded signal includes a signal portion resulting from compressing a picture in an intra-picture compression mode. The apparatus of claim 01, wherein the signal-type marker generating means is for generating a packet of a predetermined type as the signal-type marker. The apparatus of claim 07, wherein the multiplexing means multiplexes the packet with the variable-rate coded signal to locate the packet immediately ahead of the signal portion of the predetermined type in the multiplexed signal. The apparatus of claim 08, wherein: the variable-rate coded signal includes plural signal portions of the predetermined type, and the multiplexed signal includes a packet preceding each signal portion of the predetermined type; the apparatus additionally comprises: recording means for recording the multiplexed signal on a recording medium; and storage means for storing a location on the recording medium of each packet; and the recording means is additionally for recording locations read from the storage means into each packet recorded on the recording medium, the recording means recording the locations after recording the multiplexed signal. The apparatus of claim 09, wherein: when the recording means records the multiplexed signal, the recording means records in each packet the locations of a predetermined number of packets preceding the packet in the multiplexed signal, and after recording the multiplexed signal, the recording means records in each packet the locations of a predetermined number of packets following the packet in the multiplexed signal. The apparatus of claim 08, wherein: the signal-type marker generating means comprises: accumulating means for accumulating a predetermined quantity of the variable-rate coded signal, and determining means, responsive to the flag signal, for generating a control signal when the predetermined quantity of the variable-rate coded signal accumulated in the accumulating means includes a signal portion of the predetermined type; and the signal-type marker generating means generates the packet of the predetermined type in response to the control signal. The apparatus of claim 02, wherein the signal-type marker generating means is for generating subcode as the signal-type marker. The apparatus of claim 12, wherein: the variable-rate coded signal is divided into sectors, each sector beginning with a sector header; and the multiplexing means multiplexes the signal-type marker and the variable-rate coded signal by inserting the subcode into the sector header of a sector accommodating the signal portion of the predetermined type. The apparatus of claim 13, wherein the subcode is distributed among the sector headers of plural consecutive sectors accommodating the signal portion of the predetermined type. The apparatus of claim 13, wherein: the apparatus additionally comprises means for recording the multiplexed signal on a recording medium; and the signal-type marker generating means is for generating subcode including information indicating a location on the recording medium of an additional signal-type marker, the additional signal-type marker being proximate to the signal-type marker in the multiplexed signal. A method for preparing a variable-rate coded signal, generated by compressing a digital input signal using a variable compression ratio and including a signal portion of a predetermined type, for recording on a recording medium, the method comprising the steps of: generating a flag signal indicating the signal portion of the predetermined type in the variable-rate coded signal; generating a signal-type marker in response to the flag signal; and multiplexing the signal-type marker with the variable-rate coded signal to produce a multiplexed signal, the signal-type marker being located adjacent to the signal portion of the predetermined type to indicate the signal portion of the predetermined type in the multiplexed signal. The method of claim 16, wherein, in the multiplexing step, the signal-type marker is multiplexed with the variable-rate coded signal with the signal-type marker located immediately ahead of the signal portion of the predetermined type. The method of claim 17, wherein: the digital input signal is a digital video signal including plural pictures, each picture being compressed in one of an intra-picture mode and an inter-picture mode; and the step of generating a flag signal includes the steps of: receiving the variable-rate coded signal, and generating the flag signal identifying a signal portion resulting from compressing a picture in the intra-picture mode in the variable-rate coded signal. The method of claim 17, wherein: the method additionally comprises the step of recording the multiplexed signal on a recording medium; and the step of generating a signal-type marker generates a signal-type marker including information indicating a location on the recording medium of an additional signal-type marker, the additional signal-type marker being proximate to the signal-type marker in the multiplexed signal. The method of claim 17, wherein: the method additionally comprises the step of recording the multiplexed signal on a recording medium; and the step of generating a signal-type marker generates a signal-type marker including information indicating locations on the recording medium of plural additional signal-type markers successively disposed about the signal-type marker in the multiplexed signal. The method of claim 16, wherein: the method additionally comprises the step of receiving for compressing an uncompressed digital video signal comprising plural pictures; the flag generating means comprises compressing means for compressing the uncompressed digital video signal using a variable compression ratio to provide the variable-rate coded signal, the compressing means generating the flag signal when the variable-rate coded signal includes a signal portion resulting from compressing a picture in an intra-picture compression mode. The method of claim 16, wherein the step of generating the signal-type marker generates a packet of a predetermined type as the signal-type marker. The method of claim 22, wherein the multiplexing step multiplexes the packet with the variable-rate coded signal with the packet located immediately ahead of the signal portion of the predetermined type. The method of claim 23, wherein: the variable-rate coded signal includes plural signal portions of the predetermined type, and, in the multiplexing step, packets are multiplexed with the variable-rate coded signal with a packet preceding each signal portion of the predetermined type; the method additionally comprises the steps of: recording the multiplexed signal on a recording medium, storing a location on the recording medium of each packet, and additionally recording locations read from the storage means into each packet recorded on the recording medium after recording the multiplexed signal. The method of claim 24, wherein: the step of recording the multiplexed signal records in each packet the locations of a predetermined number of packets preceding the packet in the multiplexed signal; and the additional recording step records in each packet the locations of a predetermined number of packets following the packet in the multiplexed signal. The method of claim 23, wherein: the step of generating a signal-type marker comprises the steps of: accumulating a predetermined quantity of the variable-rate coded signal, and generating, in response to the flag signal, a control signal when the predetermined quantity of the variable-rate coded signal accumulated in the accumulating means includes a signal portion of the predetermined type; and in the step of generating a signal-type marker, the packet of the predetermined type is generated in response to the control signal. The method of claim 17, wherein the step of generating the signal-type marker generates subcode as the signal-type marker. The method of claim 27, wherein: the variable-rate coded signal is divided into sectors, each sector beginning with a sector header; and the multiplexing step multiplexes the signal-type marker and the variable-rate coded signal by inserting the subcode into the sector header of a sector accommodating the signal portion of the predetermined type. The method of claim 28, wherein, in the multiplexing step, the subcode is distributed among the sector headers of plural consecutive sectors accommodating the signal portion of the predetermined type. The method of claim 28, wherein: the variable-rate coded signal includes plural signal portions of the predetermined type; the method additionally comprises the step of recording the multiplexed signal on a recording medium; and the step of generating the signal-type marker generates subcode including information indicating a location on the recording medium of an additional signal-type marker, the additional signal-type marker being proximate to the signal-type marker in the multiplexed signal.

Inventors: FUJINAMI YASUSHI, VELTMAN MARK, FUJINAMI, YASUSHI, VELTMAN, MARK, Fujinami, Yasushi, c/o Sony Corp. Int. Prop. Dept., Veltman, Mark, c/o Sony Corp. Int. Prop. Dept.
Applicants: SONY CORP, SONY CORPORATION
Application year: 1993
Main classification: H04N5
IPC codes: H04N7, G11B27, H04N5, G06T9