Filter architecture, particularly for video applications

Abstract: A filter architecture, particularly for video applications, comprises: at least one filtering block (2) having at least a first input terminal connected to at least one input terminal (1INT) of said architecture (1), and at least a second input terminal connected to a first output terminal of a timing block (3), at least one image portion brilliance estimating block (6) having a first input terminal connected to the input terminal (1INT) of the architecture (1), and second, third and fourth input terminals respectively connected to the first and second and third output terminals of the timing block (3), at least a first image characteristic adjusting block (4) operated in a manner based on a logic of the Fuzzy type and having a first input terminal connected to the input terminal (1INT) of the architecture (1), a second input terminal connected to a first output terminal of the filtering block (2), and a third input terminal coupled to an output terminal of the brilliance estimating block (6), and at least a second image characteristic adjusting block (5) operated in a manner based on a logic of the Fuzzy type and having a first input terminal connected to a second output terminal of the filtering block (2), and a second input terminal coupled to a second output terminal of the brilliance estimating block (6).

Description: This invention relates to devices for use in video applications, and particularly, to video signal filters. In video applications, it is often desirable to change the contrast and luminance associated with an imaged picture because, due to increased variation in the brilliance of the picture relative to the sensitivity of the means provided to pick up or store it, details in highly brilliant or very dark areas (of the picture) may fail to be adequately brought out. It should not be overlooked that contrast is related to the details of an image, while luminance contains brilliance information associated with the image itself. To modify the contrast and luminance associated with an image, and accordingly solve this problem, two main directions can be followed which are both known from literature. In a first of these directions, the image is defined as the product of an illumination component i(y,x) from the light impinging on a picture being imaged and a reflectance component r(y,x) from the light being reflected by objects within said picture, namely: f(y,x) = i(y,x) r(y,x) where, f(y,x) is the image to be processed, identified as a function of two variables y and x representing the spatial co-ordinates of each of the punctual elements or pixels which make up the image. In the above definition of an image, the illumination component i(y,x) is responsible for most of the change in brilliance, whilst the reflectance component contains detail information. The illumination component i(y,x), being tied to the image brilliance, represents the luminance in the above definition of an image, while the reflectance component, being tied to the image details, represents the contrast. Thus, the luminance and contrast associated with an image can be modified by acting on the components i(y,x) and r(y,x). The aim is to reduce the illumination component i(y,x) and amplify the reflectance component r(y,x). To accomplish this, linear filters are employed which are usually of the high-pass type and operate in the density domain. It should be considered that illumination i(y,x) varies slowly in space, and therefore, mostly contains low spatial frequencies present in an image, whereas reflectance, being a process of the high-pass type, mostly contains high spatial frequencies. In order to work with linear filters of the high-pass type, a logarithmic transform of the illumination and reflectance components is to be used whereby the filtering operation can be made linear, that is: f'(y,x) = log[f(y,x)] = ì(y,x) + r'(y,x) where: ì(y,x)=log[i(y,x)] and r'(y,x)=log[r(y,x)]. The kind of filtering to which the illumination and reflectance components are subjected is called homomorphic. The homomorphic filtering concept as applied to bi-dimensional images, and embodiments of linear filters of the high-pass type are described by H. J. Kaufmann and M. A. Sid-Ahmed in an article "Hardware Realization of a 2-D IIR Semisystolic Filter with Application to Real-Time Homomorphic Filtering", IEEE Transactions on Circuits and Systems for Video Technology, Vol. 3, No. 1, February 1993. After filtering, to obtain the processed image, the reverse from the logarithmic transform should be carried out. A disadvantage of using a filtering method of the homomorphic type to modify the contrast and luminance associated with an image comes from the setting of the filter mask to be used for making such modifications. That setting is made specially difficult to achieve by the frequency characteristics of the image to be processed being not known "a priori". Known from the pertinent literature are ways of setting said mask which are based on a) a trial-and-error procedure for the frequency response of a filter; b) a statistical model for the illumination and reflectance processes and attendant construction of a Wiener filter. The second direction followed to modify the luminance and contrast associated with an image is based on the consideration that contrast may be obtained as the difference between the image itself and the mean value of the illumination component. The mean value that the illumination component exhibits locally in an image is tied to the variation in the brilliance of said image, and hence, to the luminance thereof. Thus, by acting on the mean value of the illumination component, the luminance associated with an image can be modified. An image to be treated is processed through a two-channel filter wherein one channel is reserved for processing the mean value of the illumination component which represents the low spatial frequency component of said image, and the other channel is reserved for processing the contrast which represents the high spatial frequency component. Specifically, that two-channel filter acts, through non-linear characteristics, on grey levels of pixels associated with the image being processed which represent the low and high spatial frequency components. The low spatial frequency component of the image being processed is obtained by determining the mean value of grey values of pixels present in a bi-dimensional window of appropriate size. On the other hand, the high spatial frequency component is obtained as the difference between the image itself and the low frequency component. The low frequency component is then altered through a non-linearity which is dependent on the brilliance characteristics of the image. To modify the high frequency component, that is the contrast signal, and accordingly regain dim details of the image, a second non-linearity is used whereby a contrast amplification factor is determined according to the brilliance characteristics of the image being processed. It is mandatory that both non-linearities should act such that the contrast enhancement would be high where the reduction in brilliance variation is large. In fact, where the image is prevailingly a brilliant one, that is if a possible saturation toward the white occurs, the reduction in brilliance should be applied by compressing the levels of grey approaching the white, and for given levels, a high contrast amplification should be applied to bring to full view details of the image which are only dimly visible. The reverse holds where the image to be processed is a dark one. A two-channel filter operated in the manner described above is disclosed, for example, by Tamar Peli and Jae S. Lim in an article "Adaptative Filtering for Image Enhancement", Optical Engineering, Vol. 21, pages 108-112 (January/February, 1982). However, the applicability of that two-channel filter to image processing is limited. In fact, the patterns of the curves which provide the non-linearities present in the filter, once they are set for one class of images, e.g. very dark images, the aforesaid filter cannot be used to process very bright images because no improvement would be obtained on them. The underlying technical problem of this invention is to provide a filter architecture which, through the use of a logic known in the pertinent literature as Fuzzy Logic, can be made adaptive, i.e. able to process images affected by conflicting problems (e.g. very bright or very dark images), and is easily implemented. This technical problem is solved by a filter architecture as defined in Claim 1, in particular the characterizing part of it. The features and advantages of the filter architecture of this invention will become apparent from the following description of an embodiment thereof, given by way of example and not of limitation with reference to the accompanying drawings. In the drawings: Figure 1 is a diagramatic view of a filter architecture embodying this invention; Figure 2 is a diagramatic detail view of the filter architecture shown in Figure 1; Figure 3 is a diagramatic view of the same detail as shown in Figure 2; Figure 4 shows an image as split into blocks with a first line thereof brought out; Figure 5 is a detail view showing in diagram form a detail of the filter architecture in Figure 1; Figure 6 is a detail view showing diagramatically a filter block included in the filter architecture of Figure 1; Figure 7 is a diagram illustrating a detail of the filter architecture shown in Figure 1; Figure 8 is a diagram illustrating a detail of the diagram shown in Figure 7; and Figure 9 is a diagram illustrating a detail of the filter architecture shown in Figure 1. The filter architecture (1) which forms the subject matter of the present Application acts individually on the image pixels. Specifically, this architecture processes the luminance component which is associated with an image, that is the grey hue portion of the image. The digitalized luminance component associated with an image to be processed forms the input to the filter architecture (1). With reference to the diagram shown in Figure 1, this filter architecture (1) comprises a timing block (3) having an input terminal arranged to receive, for each luminance component Y associated with an image to be processed, a frequency reference signal fp for pixel synchronization. That timing block (3) outputs the aforesaid signal fp; a signal rfr obtained from a signal fp of an image line scan rate multiplied r times; and a signal rft, also obtained from the signal fp of an image scan rate multiplied r times. The signal fp allows the filter architecture (1) to determine each time which image pixel is being processed, and the signals rfr and rft allow the filter architecture (1) to split the image being processed into portions. Connected to the timing block (3) is an image portion brilliance estimating block (6), shown in Figure 2, which has first, second and third input terminals adapted to receive the signals fp, rfr and rft, respectively, from the block (3) and a fourth input terminal adapted to receive the signal Y representing the luminance component associated with the image to be processed. The image portion brilliance estimating block (6) splits the image to be processed into blocks or portions, and determines the mean brilliance value of said blocks using the formula: bi = 1/Num Σ Σ f(y,x) where, bi is the mean brilliance value for the i-th block, Num is the number of pixels contained in said block, and f(y,x) is the image to be processed, expressed as a function of two variables y and x representing the spatial co-ordinates of the pixels which make up the image. In particular, the image portion brilliance estimating block (6) will resolve an image to be processed into r 2 blocks (where r=1,...,n), and calculate the mean value of grey for each of them. To explain the operation of the block (6) in greater detail, the particular case will be considered of r=2, that is of the image being split into four blocks. With reference to Figure 3, the block (6) comprises a first summing block (8) which adds together the grey values present in the first half of the first of the image lines. Said summing block (8) has a first input terminal which receives the signal Y, representing the luminance component of the image to be processed, and a second input terminal which receives the signal fp from the timing block (3). The summing block (8) is connected to a dividing block (9) which is to divide the sum value from the block (8) by the number of the pixels present in the first half of the first of the image lines. The result of this division is, through a first multiplexer (10) connected to the dividing block (9), stored into a second accumulating block (11). The multiplexer (10) has a first input terminal connected to the block (9) and a second input terminal adapted to receive the signal rfr from the timing block (3). The summing block (8) also has a third input terminal which is supplied a reset pulse to enable the adder to perform a sum of the grey values present in the second half of the first of the image lines. Through the block (9), the value of this sum is divided by the number of the pixels present in the second half of the first of the image lines. The result of this division is stored into a third accumulating block (12) through the multiplexer (10). With reference now to Figure 4, after processing the first of the image lines, the mean value of grey associated with the first half of the first image line is stored into the accumulating block (11), while the mean value of grey associated with the second half of the first image line is stored into the accumulating block (12). Since in the instance under consideration the image to be processed has been split into four blocks, the mean value of grey stored into the accumulating block (11) will also be the mean value of grey associated with the first of the lines in a first block (13) of the image so split, and the mean value of grey stored into the accumulating block (12) will also be the mean value of grey associated with the first of the lines in a second block (14) of the split image. The above-described operations are then repeated for each of the lines in the blocks (13) and (14). The blocks (13) and (14) correspond to the first half of the image to be processed. Considering now the block (13), at the end of the last line in said block -- which corresponds to the first half of the line located at the image middle -- the value of the sum of the mean grey values for the lines of the block (13) is stored into the accumulating block (11). This value is then supplied to a dividing block (16) through a demultiplexer (15) connected to the accumulating block (11). The demultiplexer (15) has a first input terminal connected to the accumulating block (11), a second input terminal connected to the accumulating block (12), and a third input terminal to receive the signal rft from the timing block (3). The dividing block (16) performs the division of the sum value from the accumulating block (11) by the number of the lines present in the block (13) to yield the mean value of grey of the block (13) as a result. This result is stored, through a second multiplexer (17) connected to the dividing block (16), into a first memory block (18). Considering the block (14), at the end of the last of the lines in said block -- which corresponds to the second half of the lines located at the middle of the image -- the sum of the mean values of grey for the block (14) lines is stored into the accumulating block (12). The value of that sum is then supplied to the dividing block (16) through the demultiplexer (15). The dividing block (16) will divide the value of the sum from the accumulating block (12) by the number of the lines present in the block (14) to yield the mean value of grey for the block (14) as a result. This result is stored into a second memory block (19) through the multiplexer (17). The accumulating blocks (11) and (12) have each an input terminal which is supplied a reset pulse to have its contents cleared. In this way, such adders are used to calculate the mean values of grey associated with a third (19) and a fourth (20) of the blocks into which the image to be processed has been split. To calculate said mean values, the same operations as previously described in connection with the calculation of the mean grey values for the blocks (13) and (14) are repeated. In general, the number of the summing blocks and number of the memory blocks included in the image brilliance estimating block (6) will be dependent on the value of r. The filter architecture (1) includes a synchronization block (7), as shown in Figure 5, which comprises a delay block (21) having at least r2 input terminals connected to the image brilliance estimating block (6), and a multiplexer (22) having at least r2 input terminals connected to the delay block (21) and at least two input terminals adapted to receive the signals rfr and rft from the timing block (3). The block (21) is formed of a delay line providing a delay which is n times (with n=0.1) the scan time of the whole image to be processed. The multiplexer (22) provides synchronization of the mean brilliance value of each of the blocks into which the image to be processed has been split with the pixels being processed. It should not be overlooked that if r=1, no synchronization block (7) would be provided in the filter architecture (1). The filter architecture (1) includes a filtering block (2), as shown in Figure 6, which serves the function of calculating the high-pass Yhp and low-pass Ylp (spatial frequency) components of the image to be processed. Specifically, the low-pass component Ylp is calculated by determining the mean value of grey of the pixels present in an image window centered on a pixel to be processed. To carry out this calculation, the filtering block (2) is provided with a block (23) which has a first input terminal adapted to receive the signal Y representing the luminance component of the image to be processed and a second input terminal adapted to receive the signal fp from the timing block (3); a summing block (24) having an input terminal connected to the block (23); and a dividing block (25) having an input terminal connected to the summing block (24). The dividing block (25) will output the low-pass component Ylp of the image to be processed. The block (23) identifies an image window centered on a pixel to be processed, whose size is H*W, where H is the line memories which make up the window, and W is the number of the columns therein. Said window comprises, moreover, an address circuit which-- with the co-ordinates that identify the location of the pixel on which the window is centered being denoted by m and n -- supplies the summing block (24) with the values m±i, n±j, where i≤H/2 and j≤W/2 pixels, that is the co-ordinates associated with the pixels present in the window. The block (24) carries out a sum of the grey values for the pixels present within the window under consideration. The value of this sum is then supplied to the dividing block (25), which will divide said value by the number of pixels present in the window considered to yield the mean value of grey for said pixels. This mean value identifies the low-pass component Ylp of the image to be processed. The high-pass component Yhp of that image, which identifies the image contrast, is obtained by calculating the difference between said image and its low-pass component Ylp, through a subtractor node (26) provided in the filtering block (2). The filtering block (2) further comprises a delay block (27) having an input terminal adapted to receive the signal Y representing the luminance component of the image to be processed, and an output terminal connected to the subtractor node (26). That block (27) has been introduced to take account of the delays in calculating the low-pass component Ylp, tied to the blocks (23), (24) and (25). Also provided in the filter architecture (1) are first and second image characteristic adjusting blocks (4) and (5) as shown in Figures 7 and 9, respectively. Such blocks operate on a type of logic known as Fuzzy Logic in the pertinent literature. By using that logic, so-called inference operations are performed in said blocks (4) and (5) which are basically configured as rules of the IF-THEN type with at least one fore-preposition and at least one after-implication. More particularly, within the block (4) shown in Figure 7, inference operations are carried out which determine a factor k of image contrast amplification from brilliance levels of image portions and grey levels of pixels. The block (4) comprises a block (28) having a first input terminal adapted to receive the signal Y representing the luminance component of the image to be processed and a second input terminal connected to the synchronization block (7); a comparator block (29) having an input terminal connected to the filtering block (2); and a logic block (30) having a first input terminal coupled to the block (28) via a multiplier node (31), a second input terminal connected to the comparator block (29), and a third input terminal connected to the filtering block (2). Furthermore, the block (4) is provided with an additional input terminal connected to the filtering block (2). The block (28) is implemented as a look-up table, shown in Figure 8. The comparator block (29) and logic block (30) prevent small amplitude noise admitted to the filter architecture (1) from becoming amplified along with the image contrast. Thus, when the modulo of the high-pass component Yhp of the image to be processed -- which modulo identifies an image contrast value -- is lower than a threshold value determined by the comparator block (29), the high-pass component will be kept unaltered while being amplified, on condition that its modulo is above said threshold value. The logic block (30) is implemented as a combinatorial circuit which functions as a switch to either pass the amplified high-pass component Y'hp being output by the block (28) or the unaltered high-pass component Yhp from the filtering block (2). The image characteristic adjusting block (5), shown in Figure 9, performs by inference operations a reduction in the image brilliance variation, from brilliance levels of image portions to which a pixel to be processed belongs and from the low-pass component Ylp of the black/white image to be processed as output from the filtering block (2). That block (5) is implemented as a look-up table. The blocks (4) and (5) have each an output terminal that is led to a summing node (36), which node functions to re-construct, from the high-pass and low-pass components as suitably modified that are supplied from said blocks (4) and (5), respectively, the signal Y' representing the luminance component as suitably modified which appears at the output of the filter architecture (1).

Claims: A filter architecture (1), particularly for video applications, comprising: at least one filtering block (2) having at least a first input terminal connected to at least one input terminal (INT) of the filter architecture (1), and at least a second input terminal connected to at least a first output terminal of at least one timing block (3), characterized in that it further comprises: at least one image portion brilliance estimating block (6) having at least a first input terminal connected to the input terminal (INT) of the filter architecture (1), and at least second, third and fourth input terminals respectively connected to at least first, second and third output terminals of the timing block (3); at least a first image characteristic adjusting block (4) operated in a manner based on a logic of the Fuzzy type and having at least a first input terminal connected to the input terminal (INT) of the filter architecture (1), at least a second input terminal connected to at least a first output terminal of the filtering block (2), at least a third input terminal coupled to at least one output terminal of the image portion brilliance estimating block (6), and at least an output terminal coupled to at least one output terminal (OUT) of the filter architecture (1); and at least a second image characteristic adjusting block (5) operated in a manner based on a logic of the Fuzzy type and having at least a first input terminal connected to at least a second output terminal of the filtering block (2), at least a second input terminal coupled to at least one output terminal of the image portion brilliance estimating block (6), and at least an output terminal coupled to at least the output terminal (OUT) of the filter architecture (1). A filter architecture according to Claim 1, characterized in that a synchronization block (7) is connected between the third input terminal of the first adjusting block (4) and said at least one output terminal of the brilliance estimating block (6), and between the second input terminal of the second adjusting block (5) and a second output terminal of the brilliance estimating block (6). A filter architecture according to Claim 2, characterized in that said brilliance estimating block (6) has a plurality of output terminals (bi) equal in number to said portions into which the image is split, said terminals being connected to the input side of said synchronization block (7). A filter architecture according to Claim 1, characterized in that the first image characteristic adjusting block (4) comprises: at least one block (28) implemented as a look-up table and having at least a first input terminal connected to said input terminal of the filter architecture (1) and at least a second input terminal coupled to at least one output terminal of the image portion brilliance estimating block (6); at least one comparator block (29) having at least one input terminal connected to said output terminal of the filtering block (2); at least one logic block (30) having at least a first input terminal coupled to at least one output terminal of the block (28), at least a second input terminal connected to at least one output terminal of the comparator block (29), and at least a third input terminal connected to said output terminal of the filtering block (2). A filter architecture according to Claim 1, characterized in that the second image characteristic adjusting block (5) is implemented as a look-up table. A filter architecture according to Claim 1, characterized in that the image portion brilliance estimating block (6) comprises a plurality of summing blocks and a plurality of memory blocks having at least first and second multiplexers, at least one demodulator and at least first and second dividing blocks connected therebetween.

Inventors: MANCUSO MASSIMO, POLUZZI RINALDO, RIZZOTTO GIANGUIDO, MANCUSO, MASSIMO, POLUZZI, RINALDO, RIZZOTTO, GIANGUIDO, MANCUSO, MASSIMO, C/O SGS-THOMSON MICROELECT. SRL
Applicants: CONS RIC MICROELETTRONICA, ST MICROELECTRONICS SRL, CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO - CORIMME, STMICROELECTRONICS S.R.L.
Application year: 1993
Main classification: H04N5
IPC codes: H04N5, H03H17