Communication system

Abstract: A communication system includes an interrogator for transmitting an interrogation signal generated on the basis of a communication reference time length. A responder is operative for decoding the interrogation signal from the interrogator at a given reception timing. The interrogator transmits a communication reference signal before a transmission of a communication signal. The communication reference signal represents the communication reference time length. The responder measures the communication reference time length represented by the communication reference signal transmitted from the interrogator. The responder sets the reception timing in accordance with the measured communication reference time length.

Description: This invention relates to a communication system including an interrogator and a responder (a transponder). There are movable-object identification systems in which a responder (a transponder) mounted on a movable object can communicate with a fixed interrogator by radio. When the responder receives an interrogation signal (a challenge signal) from the interrogator, the responder automatically transmits a reply signal including identification information related to the movable object. The movable-object identification systems can be used as noncontact card systems in which a reader communicates with an information card by radio to read out information therefrom. Responders in the movable-object identification systems are of two types having and lacking a data writing function respectively. The responder lacking the data writing function merely transmits internal data in response to an interrogation signal from an interrogator. The responder having the data writing function includes a device for decoding data transmitted from an interrogator, and a device for storing the decoded data. Typical data transmission between an interrogator and a responder is of a serial communication format. According to such serial communication, data is modulated with a transmission clock signal before being transmitted from the interrogator. In the responder, the data transmitted from the interrogator is recovered by a demodulating process responsive to a reception clock signal. For accurate and reliable data transmission, it is necessary to equalize the periods of the transmission clock signal and the reception clock signal. When the period of the reception clock signal differs from the period of the transmission clock signal, the timing of the demodulating process goes out of order and the recovery of the data is unstabilized so that errors tend to occur in the communication. A general way of generating the reception clock signal is as follows. The transmission speed in serial communication is preset. A reception clock signal is generated on the basis of the frequency of oscillation of an oscillator provided in the responder, and the period of the reception clock signal is accorded with the period of the transmission clock signal. When the frequency of oscillation of the oscillator in the responder has an error, the period of the reception clock signal goes out of order so that a reception error tends to occur. Accordingly, the oscillator in the responder is required to be highly accurate in oscillation frequency. It is known to use a crystal or ceramic oscillator as an oscillator in a responder. In this case, the oscillator tends to be expensive and large in size. Another type of the oscillator in the responder includes a CR oscillator and a circuit for stabilizing the frequency of oscillation of the CR oscillator. This type of the oscillator tends to be sensitive to a temperature variation. In addition, stabilizing the frequency of oscillation of the CR oscillator tends to be troublesome. US-A-4 327 441 describes a communication system in which a reference pulse is transmitted to a receiver. In the receiver, the received reference pulse is compared to a timing pulse. Depending on whether the reference pulse is shorter or longer than the timing pulse, a counter is incremented or decremented once. The count value is used to set the length of the timing pulse which serves as a time base for decoding the received data. Thus, the data can be decoded even if the transmitter and the receiver are not calibrated with respect to each other as regards the length of the data pulses. EP-A-0 068 977 describes a transmission method which is similar to the aforementioned document in that pulse width modulation is used. The length of the reference pulse is determined by counting the number of processor cycles during the reference pulse length. The established count is stored and used for generating timing signals in order to determine the length of the data signals and thus their values. It is a object of the present invention to provide a improved communication system. This object is solved by the subject matter of claim 1. Further advantageous modifications of the present invention are subject-matters of the sub-claims. In the drawings: Fig. 1 is a diagram of an interrogator and a responder in a first embodiment of this invention. Fig. 2 is a block diagram of a communication clock signal generator in the first embodiment. Fig. 3 is a flow diagram of operation of the responder in the first embodiment. Fig. 4 is a flow diagram of operation of the responder in the first embodiment. Fig. 5 is a flow diagram of operation of the communication clock signal generator in the first embodiment. Fig. 6 is a time-domain diagram of the states of various signals in the first embodiment. Fig. 7 is a time-domain diagram of the states of various signals in a modification of the first embodiment. Fig. 8 is a time-domain diagram of the states of various signals in a second embodiment of this invention. In the following a first embodiment of the invention will be described. With reference to Fig. 1, an interrogator 6011 includes antennas 6012 and 6013, and a processor 6014. The antenna 6012 is used in radiating an interrogation radio wave signal S1. The antenna 6013 catches a reply radio wave signal S2. The processor 6014 generates the interrogation signal S1 and feeds it to the antenna 6012. In addition, the processor 6014 analyzes and processes the reply signal S2 caught by the antenna 6013. The interrogator 6011 has an input/output terminal 6015 via which a signal for the recognition of an interrogation signal S1 is transmitted to the processor 6014. A responder 6016 includes antennas 6017 and 6018. The antenna 6017 catches an interrogation radio wave signal S1. The antenna 6018 also catches the interrogation radio wave signal S1. The antenna 6018 is used in modulating the carrier of the received interrogation signal S1 and simultaneously reflecting the modulated carrier as a reply radio wave signal S2. In the responder 6016, a demodulator 6019 extracts a received waveform (baseband components) from the interrogation signal S1 caught by the antenna S1. A switch 6021 disposed in a power supply line selectively connects and disconnects a power supply to major portions of the responder 6016. A power supply controller 6020 turns on and off (that is, closes and opens) the switch 6021 and thereby controls the connection of an internal power supply in response to the output signal of the demodulator 6019 which represents the received waveform. A clock oscillator 6022 of the CR type generates a basic clock signal having a predetermined frequency. A communication clock signal generator 6023 receives the output signal of the demodulator 6019 which represents the received waveform. The communication clock signal generator 6023 receives the basic clock signal from the clock oscillator 6022. The communication clock signal generator 6023 produces a communication clock signal at a given timing on the basis of the output signal of the demodulator 6019 and the basic clock signal. A reception buffer 6024 receives the output signal of the demodulator 6019 which represents the received waveform. The reception buffer 6024 receives the communication clock signal from the communication clock signal generator 6023. The reception buffer 6024 extracts data from the received waveform by using the communication clock signal. The reception buffer 6024 temporarily stores the extracted data. In the responder 6016, a processor 6025 decodes the data stored in the reception buffer, 6024. A memory 6026 connected to the processor 6025 stores internal information. The processor 6025 transfers a signal of the internal information from the memory 6026 to a modulator 6027. The modulator 6027 generates a reply radio wave signal S2 on the basis of the signal of the internal information, and feeds the generated signal S2 to the antenna 6018. A power on reset circuit 6028 outputs a reset signal to the processor 6025 when a main power supply circuit 6029 is turned on. The main power supply circuit 6029, which is connected to a battery 6030, is turned on and off to enable and inhibit the feed of electric power to all the portions of the responder 6016. As shown in Fig. 2, the communication clock signal generator 6023 includes an up counter 6231 and a down counter 6234. The up counter 6231 receives electric power via a main power supply terminal 6232. In the case where the up counter 6231 receives the electric power and its enable terminal receives an active signal, the up counter 6231 counts pulses of the basic clock signal fed via a clock input terminal 6233. The up counter 6231 outputs a count value signal representing the number of the counted pulses. The down counter 6234 receives electric power via an operation power supply terminal 6235. In the case where the down counter 6234 receives the electric power and its enable terminal receives an active signal, when a signal applied to its load terminal changes to an active state, the down counter 6234 samples and holds the count value signal outputted from the up counter 6231. Then, the down counter 6234 counts pulses of the basic clock signal fed via the clock,input terminal 6233. When the number of the counted pulses reaches the number represented by the held count value signal, the down counter 6234 outputs a pulse of a communication clock signal to a communication clock output terminal 6236. A counter controller 6237 including a pulse counter 6237a initializes the up counter 6231 and the down counter 6234, and controls timings at which the up counter 6231 and the down counter 6234 start to count pulses. The counter controller 6237 receives the received waveform signal from the demodulator 6019 via a received data input terminal 6238. The counter controller 6237 receives the basic clock signal from the clock oscillator 6022 via the clock input terminal 6233. The communication clock signal outputted from the down counter 6234 is fed via the communication clock output terminal 6236 to portions of the responder 6016. The counter controller 6237 notifies, via a condition notification output terminal 6239, the processor 6025 of conditions of signal processing by the communication clock signal generator 6023. The counter controller 6237 receives control information from the processor 6025 via a control terminal 6240. When the main power supply circuit 6029 is turned on, the up counter 6231 is connected to the battery 6030 via the main power supply terminal 6232. When the switch 6021 is turned on by the power supply controller 6020, the down counter 6234 is connected to the battery 6030 via the operation power supply terminal 6235. The responder 6016 operates as follows. When the responder 6016 remains unused, the main power supply circuit 6029 continues to be in an OFF state. Thus, the consumption of electric power of the battery 6030 is suppressed. With reference to Fig. 3, when the main power supply circuit 6029 is turned on at a stage S301, the battery 6030 is connected to the demodulator 6019, the power supply controller 6020, the processor 6025, the power on reset circuit 6028, and others. As a result, the power on reset circuit 6028 outputs a reset signal to the processor 6025 at a stage S302. Then, at a stage S303, the processor 6025 provides the communication clock signal generator 6023 with setting for the reception of a communication reference pulse in response to the reset signal. As a result, the responder 6016 falls into a stand-by state at a stage S304. The operation of the responder 6016 which occurs at the stages S302 and S303 is completed during an interval for which the power supply controller 6020 remains in an OFF state after the main power supply circuit 6029 is turned on. After this interval terminates, the responder 6016 moves into the stand-by state. The interrogator 6011 transmits an interrogation signal S1 containing a communication reference pulse and ID number information. The antenna 6017 of the responder 6016 catches the interrogation signal S1, and feeds the received interrogation signal to the demodulator 6019. As a result, the received waveform signal outputted from the demodulator 6019 changes to a high level. With reference to Fig. 4, at a stage S401, the power supply controller 6020 moves the responding circuit 6016 from the stand-by state in response to the high-level signal from the demodulator 6019. Specifically, the power supply controller 6020 turns on the switch 6021 so that the battery 6030 is connected to the clock oscillator 6022, the reception buffer 6024, and others. When the processor 6025 is connected to the battery 6030, the processor 6025 starts to operate. The processor 6025 operates in accordance with a program stored in a ROM. After the processor 6025 starts to operate, the processor 6025 determines whether or not the setting for the reception of a communication reference pulse is provided at a stage S402. In this case, since the setting for the reception of a communication reference pulse is provided, the processor 6025 enables the communication clock signal generator 6023 to receive a communication reference pulse, that is, a communication reference signal, which is contained in a head of the interrogation signal S1 at a stage S403. Thereby, the communication clock signal generator 6023 measures the time length of the communication reference pulse (the time length determined by the communication reference pulse), which is a communication reference time width, by counting pulses of the basic clock signal outputted from the clock oscillator 6022. The number of the counted pulses, that is, the measured time length of the communication reference pulse, is stored at a stage S404. Subsequently, the communication clock signal generator 6023 produces a communication clock signal on the basis of the stored counted pulse number. The communication clock signal is synchronous with the received waveform represented by the output signal of the demodulator 6019. At a stage S405, the communication clock signal generator 6023 outputs the communication clock signal to the reception buffer 6024, the processor 6025, and others. Thereby, the processor 6025 detects and recovers data and check code contained in the interrogation signal S1 at a stage S406. At stages S407 and S408, the processor 6025 determines whether or not the received data is correct by referring to the check code. When the received data is correct, the processor 6025 stores the received data into the memory 6026 as an ID number at a stage S409. Then, the processor 6025 removes the setting for the reception of a communication reference pulse at a stage S410. An interrogation signal S1 for registering an ID number into a responder 6016 is generated as follows. A host device for controlling an interrogator 6011 judges states of responders 6016 within a communication area around the interrogator 6011, and examines and determines ID numbers to be written into the responders 6016. The host device informs the interrogator 6011 of an ID transmission command and a determined ID number via the input/output terminal 6015 thereof. The processor 6014 in the interrogator 6011 generates an interrogation signal S1 in response to the ID transmission command and the ID number fed from the host device. The interrogation signal S1 has a communication reference pulse at its head. In the interrogation signal S1, the communication reference pulse is followed by a waveform which results from the encoding of the ID number (see the part (a) of Fig. 78). In the case where the setting for the reception of a communication reference pulse is absent when the responder 6016 receives an interrogation signal S1 from the interrogator 6011, the processor 6025 reads out data of an ID number (ID code) from the memory 6026 and feeds the ID number data to the modulator 6027 as serial data according to the communication clock signal outputted by the communication clock signal generator 6023 (see a stage S411 of Fig. 4). The modulator 6027 modulates the carrier of the interrogation signal caught by the antenna 6018 in accordance with the ID number serial data. Thus, the carrier of the interrogation signal is converted into a reply radio wave signal S2 which represents the ID number. The reply signal S2 is radiated from the antenna 6018. Subsequently, the responder 6016 determines whether or not an interrogation signal S1 is received, that is, whether or not the responder 6016 is in a communication area around an interrogator 6011, at a stage S412. When the responder 6016 is outside a communication area, the responder 6016 falls into the stand-by state. On the other hand, when the responder 6016 is in a communication area, a command and data extracted from the received interrogation signal S1 are stored into the reception buffer 6024 at a stage S413. Then, the processor 6025 decodes the command in the reception buffer 6024 at a stage S414. When the decoded command is "reading", the responder 6016 transmits the stored ID code and data as a reply radio wave signal S2 at the stage S411. When the decoded command is "writing", the processor 6025 transfers the data from the reception buffer 6024 to the memory 6026 at a stage S415. Then, the responder 6016 determines again whether or not the responder 6016 is in a communication area around an interrogator 6011 at the stage S412. The operation of the communication clock signal generator 6023 will be described in detail hereinafter. The communication clock signal generator 6023 outputs the communication clock signal to the reception buffer 6024, the processor 6025, and the memory 6026. The communication clock signal is used in decoding the received waveform into data. The communication clock signal generator 6023 includes the counter controller 6237 which controls the up counter 6231 and the down counter 6234 in response to controls signals fed via the control terminal 6240. Even when the responder 6016 is in the stand-by state, a signal or data in the up counter 6231 is backed up by electric power fed via the main power supply terminal 6232. When the down counter 6234 receives electric power via the operation power supply terminal 6235, the down counter 6234 starts to operate so that the communication clock signal generator 6023 commences effective signal processing. With reference to Fig. 5, the communication clock signal generator 6023 starts to operate at a stage S501. The counter controller 6237 includes a signal processor which operates in accordance with a program stored in a ROM. At the operation start, the counter controller 6237 receives information of a reference pulse reception mode via the control terminal 6240. The counter controller 6237 determines whether or not the reception mode is in an ON state at a stage S502. In the case where the reception mode is in the ON state, a waiting process is executed until a falling edge occurs in the received data fed via the data input terminal 6238 (a stage S503). When the counter controller 6237 receives a falling edge in the received data (see the part (d) and the part (e) of Fig. 6), the counter controller 6237 sets the up counter 6231 into an enabled state so that the up counter 6231 executes a counting-up process at a stage S504. When the counter controller 6237 receives a next falling edge in the received data (see the part (d) and the part (e) of Fig. 6), the counter controller 6237 moves the up counter 6231 out of the enabled state so that the up counter 6231 suspends the counting-up process at a stage S506. In addition, the reference pulse reception mode is changed to an OFF state. Thereby, the up counter 6231 counts pulses in the basic clock signal during an interval from the timing of a first falling edge to the timing of a second falling edge in the received data (see the part (f) of Fig. 6). In the case where the reception mode is in the OFF state at the operation start, the counter controller 6237 sets data of a communication pulse number in the pulse counter 6237a at a stage S507. Then, the counter controller 6237 determines whether a communication clock signal to be generated is used for transmission or reception at a stage S508. When the communication clock signal is used for reception, the counter controller 6237 waits a falling edge in the received data to provide synchronization of the communication clock signal (a stage S509). When the counter controller 6237 receives a falling edge in the received data (see the part (g) of Fig. 6), the counter controller 6237 outputs a loading command to the down counter 6234 at a stage S510 so that the down counter 6234 is loaded with the counted pulse number data held in the up counter 6231. Then, the number represented by the data in the down counter 6234 is decremented by one each time the down counter 6234 receives a pulse of the basic clock signal. When the number represented by the data in the down counter 6234 reaches zero (a stage S512), the down counter 6234 outputs a pulse of a communication clock signal (see the part (h) of Fig. 6) which is transmitted via the communication clock output terminal 6236 at a stage S513. Then, the number represented by the data in the pulse counter 6237a is decremented by one at a stage S514, and a determination is given at a stage S515 as to whether or not the number represented by the data in the pulse counter 6237a is equal to zero. In the case where the number represented by the data in the pulse counter 6237a is not equal to zero, the down counter 6234 is again loaded with the counted pulse number data held in the up counter 6231. Then, the counting-down process is started again. In the case where the number represented by the data in the pulse counter 6237a decreases to zero, the operation of the communication clock signal generator 6023 terminates at a stage S516. Fig. 6 shows examples of the time-domain conditions (waveforms) of various signals in the responder 6016 which occur when the operation of the responder 6016 is set in the reference pulse reception mode. As shown in Fig. 6, a communication reference pulse is provided in a head of transmission data. The transmission data includes 4-bit serial data which follows the communication reference pulse. Four pulses of the communication clock signal are outputted in correspondence with the 4-bit serial data. An allowable error range of the period TRXC of the communication clock signal is expressed as: 3.5Tcom < 4TRXC < 4.5Tcom where Tcom denotes a 1-bit data length. Thus, the allowable error range is within ±12.5%. The period TRXC of the communication clock signal has the following relation with the period Tclk of the basic clock signal. TRXC = n•Tckl where "n" denotes a natural number. An error which occurs during the reception of a communication reference pulse is determined by the following relation. (n - 1)Tclk < Tcom < (n + 1)Tclk Thus, the maximum error corresponds to l/n. When the maximum error is smaller than allowable error range limits of ±12.5%, the natural number "n" is given as: n > 8 Accordingly, stable and reliable communication is ensured provided that the following relation is satisfied. 8Tclk < Tcom In other words, when the oscillation frequency of the clock oscillator 6022 is set equal to or higher than eight times the communication frequency (communication bit rate), an error or a fluctuation in the frequency of the basic clock signal is prevented from adversely affecting communication. Thus, the frequency of the basic clock signal is preferably 153.6 kHz or higher when the communication frequency is 19.2 kbps. In the case where a design frequency of the basic clock signal is 400 kHz, an error of 0.614 (=1-(153.6 kHz/400 kHz)) is allowed. Accordingly, it is easy to design and make a clock oscillator 6022. In the case where data is of a 1-bit asynchronous communication format as shown in Fig. 7, the frequency of the basic clock signal is preferably equal to or higher than four times the communication frequency. As previously described, the time length of the communication reference pulse in the received data is measured by counting pulses of the basic clock signal. The counted pulse number which represents the measured time length of the communication reference pulse is referred to as a reference pulse number. During a subsequent period, pulses of the basic clock signal are counted. Each time the counted pulse number reaches the reference pulse number, a timing signal (a pulse of the communication clock signal) is outputted and the counted pulse number is reset. The timing signal determines a timing at which the received data is decoded. Thus, a fluctuation in the frequency of the basic clock signal is prevented from adversely affecting the decoding of the received data, and the decoding of the received data can be accurate and reliable. As previously described, in the interrogation signal S1 transmitted from the interrogator 6011, the communication reference pulse is followed by the data and the check code. The check code is used in determining whether or not the data is correct. When the data is determined to be correct, it is known that the time length of the communication reference pulse has been accurately measured. Accordingly, during a subsequent period, the interrogation signal S1 can be accurately decoded at a timing determined by the measured time length of the communication reference pulse. In the first interrogation signal S1 transmitted from the interrogator 6011, the communication reference pulse is followed by the data of the ID number. Thus, the ID number can be surely registered in the responder 6016. The main power supply circuit 6029 may be omitted, and electric power for driving the portions of the responder 6016 may be derived from a received interrogation signal S1. In the communication clock signal generator 6023, the down counter 6234 may be replaced by an up counter. While the responder 6016 transmits the stored ID information and data after the communication reference pulse is received in this embodiment, the responder 6016 may transmit the stored ID information and data before the reception of the communication reference pulse. The interrogator 6011 may add a communication reference pulse to the head of each interrogation signal S1. In this case, backing up the data in the up counter 6231 in the responder 6016 is unnecessary. This is advantageous in reducing consumed electric power and in preventing a fluctuation of the frequency of the basic clock signal from adversely affecting communication. While the reference time length of the generation of data is set equal to the time length of the communication reference pulse in this embodiment, the reference time length of the generation of data may be set equal to, for example, twice the time length of the communication reference pulse. In the following a second embodiment of the invention will be described. A second embodiment of this invention is similar to the embodiment of Figs. 1 to 6 except for design changed indicated hereinafter. In the second embodiment, an interrogator subjects a carrier to frequency modulation (FM) responsive to data to be transmitted, and thereby converts the carrier into an interrogation radio wave signal S1 representing the data. The frequency modulation is accorded with the "FM0(F2F)" standards. With reference to Fig. 8, in the "FM0" standards, a short pulse and a long pulse are transmitted when data is "0" and "1" respectively. The interrogator adds "0" to the head of transmitted data as a communication reference pulse. The period of the transmission of "0" as a communication reference pulse determines a communication reference time length Tcom. A responder extracts falling edges in a received waveform (see the part (d) and the part (e) of Fig. 8). During the interval between the occurrence of a first falling edge to the occurrence of a second falling edge in the received waveform, clocks of a basic clock signal are counted by an up counter to measure the time length of the communication reference pulse (see the part (c) and the part (f) of Fig. 8). The resultant counted pulse number "n" indicates the communication reference time length Tcom. In the responder, as shown in the part (h) of Fig. 8, an edge hold output signal is set to a high level and a down counter is loaded with a count data from the up counter in synchronism with the falling edge in the received waveform which occurs when the setting of the communication reference time length is finished. Thus, the down counter starts to count pulses of the basis clock signal (see the part (i) of Fig. 8). The count data loaded into the down counter represents a value equal to the previously-mentioned counted pulse number "n" (the communication reference time length Tcom) multiplied by 3/4. Generally, the down counter continues to count pulses of the basic clock signal until the counted pulse number reaches the value represented by the loaded count data. In the case where an edge is extracted from the received waveform before the counted pulse number reaches the value represented by the loaded count data in the down counter, the edge hold output signal is reset to a low level. Otherwise, the edge hold output signal remains in the high level. Each time the counted pulse number reaches the value represented by the loaded count data in the down counter, a pulse of a communication clock signal is generated as shown in the part (j) of Fig. 8. The recovery of data from the received waveform is performed by referring to the level of the edge hold output signal at the output timing of each pulse of the communication clock signal. Transmitted data of "1" corresponds to the fact that the received waveform does not contain any edge during the communication reference time length from the edge extraction timing. On the other hand, transmitted data of "0" corresponds to the fact that the received waveform contains an edge during the communication reference time length from the edge extraction timing. Accordingly, in the case where the level of the edge hold output signal is high at the output timing of a pulse of the communication clock signal, the recovered data is determined to be "1". In the case where the level of the edge hold output signal is low at the output timing of a pulse of the communication clock signal, the recovered data is determined to be "0". These processes are reiterated to complete the data recovery.

Claims: Communication system comprising: [a] an interrogator (6011) for transmitting an interrogation signal containing a communication reference pulse signal and communication serial data, the communication reference pulse signal having a time length representing a communication reference time length, the communication serial data being generated based on the communication reference time length; and [b] a responder (6016) for receiving the interrogation signal from the interrogator (6011) and for responding to the interrogation signal, said responder (6016) including: [b1] a clock oscillator (6022) for outputting clock pulses; [b2] measuring means (6023) for measuring the communication reference time length represented by the time length of the communication reference pulse signal in the interrogation signal, said measuring means (6023) comprising first counting means (6231) for counting the clock pulses output from said clock oscillator (6022) during the communication reference time length represented by the time length of the communication reference pulse signal in the received interrogation signal; [b3] setting means (6237) for setting a time length based on the communication reference time length measured by the measuring means (6023), the setting means (6237) comprising pulse number setting means for setting a pulse number based on a number of clock pulses counted by said first counting means (6231); [b4] generating means (6234, 6236) for generating a timing signal a plurality of times based on the time length set by said setting means (6237), said generating means comprising second counting means (6234) for counting clock pulses output by said clock oscillator (6022), and for generating said timing signal each time when a number of clock pulses counted by said second counting means (6234) is reaching the pulse number set by the pulse number setting means (6237); and [b5] demodulating means (6019) for receiving the interrogation signal from said interrogator (6011) and for demodulating the communication serial data represented by the received interrogation signal on the basis of a condition of the interrogation signal or a change in condition of the interrogation signal when the timing signal is generated by the generating means (6234, 6236). Communication system according to claim 1, characterized in that the responder (6016) further comprises: [b6] data producing means (6027) for producing transmission serial data to be sent to the interrogator (6011) when said responder (6016) implements responding action as a response to the communication serial data demodulated by the demodulating means (6019); [b7] holding means (6024) for holding the communication reference time length measured by said measuring means (6023) until the transmission serial data is produced; and [b8] feeding means (6025) for feeding the communication reference time length from said holding means (6024) to said data producing means (6027) when the transmission serial data is produced, the communication reference time length being used by the data producing means (6027) as a transmission reference for generating the transmission serial data when the responder (6016) responds to the interrogation signal. Communication system according to claim 2, characterized in that the communication serial data transmitted by said interrogator (6011) contains communication data and a check code, said holding means (6024) holding the communication reference time length measured by the measuring means (6023) only when it is decided on the basis of the check code that the communication data is correct. Communication system according to one of the claims 1 to 3, characterized in that said clock oscillator (6022) comprises a CR oscillator having a capacitor and a resistor. Communication system according to of one of the claims 1 to 4, characterized in that said generating means (6234, 6236) further comprises count control means for detecting an occurrence of a specified change in the communication serial data represented by the received interrogation signal, and for starting the counting by said second counting means (6234) in response to the detected occurrence. Communication system of one of the claims 2 to 5, characterized in that said interrogator (6011) transmits an identification number for identifying each responder (6016) in the interrogation signal, said responder (6016) registering the identification number in a memory (6026) and storing the communication reference time length into said holding means (6024) when it is decided on the basis of the check code that the communication data is correct. Communication system of claim 2, characterized in that the responder (6016) further comprises: [b9] encoding means for encoding the transmission serial data produced by the data producing means (6027) in response to the timing signals generated by the generating means (6234, 6236).

Inventors: HIRATA TATSUYA, HIRATA, TATSUYA
Applicants: DENSO CORP, DENSO CORPORATION
Application year: 1993
Main classification: G06K7
IPC codes: G06K19, G07C1, G06K7