A circuit device for preventing saturation of the transformer in a DC/AC converter having a feedback-regulated inverter

Abstract: A DC/AC converter is disclosed which has an inverter (10) coupled to a load (13) via a transformer (11). A control signal generator (25) causes the inverter to switch according to a predetermined procedure, and a feedback loop (15-25) is responsive to at least one state quantity (v c ,i c ) of the circuit to act on the control signal generator (25) and modify the state quantities (v c ,i c ) so as to ensure a predetermined stable pattern for the output AC voltage (v c ). To prevent the transformer (11) from becoming saturated, a circuit device is provided which includes correcting means (30-32,33-35) effective to sense in the inverter (10) output voltage (u) an unbalance causing the appearance of a DC component at the primary of the transformer (11) and to apply a correction signal to the control signal generator (25) for so modifying the switch signals as to cancel the unbalance.

Description: This invention relates to circuitry for converting a DC voltage to a sinusoidal AC voltage, wherein a feedback-regulated switching inverter is coupled to a load through a transformer, and in particular, to a circuit device for preventing saturation of the transformer. In general, DC/AC converter circuits, i.e. DC to AC voltage converters, are devices operative to output a sinusoidal voltage having predetermined, but variable amplitude and frequency according to necessity. Their operation is based on the controlled switching of a DC voltage input to an inverter incorporating controlled electronic switches. Converters have been known which are operative to supply systems wherein the load may significantly affect the converter output quantities, and which are feedback regulated to avoid altering the sinusoidal output waveform. An embodiment of a feedback regulated converter operated in the so-called sliding mode is disclosed in Patent Application No. MI92A001290 filed by this Applicant on May 25, 1992, which corresponds to EP-A-573 088, published on 8/12/93. In this prior art, the inverter output voltage and current are compared with a sinusoidal reference voltage and a sinusoidal reference current, respectively, and the result of the comparison, i.e. the error signal, is used to automatically set that sequence and those switching times for the inverter switches which are most effective to keep the output quantities at the desired values. In many practical applications of the converters, a transformer must be used to both output a voltage with an amplitude other than that of the inverter own output voltage, usually a larger one, and to ensure galvanic isolation of the DC voltage source from the load. In transformer-type converters which are feedback regulated by measuring output quantities from the transformer secondary, there may arise problems from saturation of the transformer core. In fact, due to asymmetric or uneven operation of the inverter --such as may be brought about by slight physical differences in the electronic switches -- or to intentional or unintentional time lags in the make and break commands to the various switches, a DC voltage component may appear at the transformer primary. Since the feedback system cannot sense this component due to the measurements being taken at the secondary circuit, the DC component will result in increased magnetization current, and attendant likelihood of the core becoming saturated. To attenuate this effect, expedients have been proposed circuit-wise for raising the DC voltage input to the inverter in a gradual fashion. However, this prior approach, while avoiding core saturation from turn-on phenomena by virtue of the core magnetization occurring therein at a slowed rate, falls short of solving the problem which is primarily tied, as mentioned, to structural asymmetries of the inverter. It is the object of this invention to prevent saturation of the transformer in a converter of the type outlined above, with enhanced effectiveness. An antisaturation-circuit comprising the features of the preamble of claim 1 is known from US-A-4 939 633. This object is achieved by the provision of a circuit device as indicated and characterized in the claim appended to this specification. The invention can be more clearly understood from the following detailed description of an embodiment thereof, to be taken by way of example and not of limitation in conjunction with the accompanying drawing. Figure 1 shows a converter equipped with a circuit for preventing generation of a direct current component and an unbalance component in a current as known from JP-A-58 015 492 and figure 2 of the drawing shows, substantially in block diagram form, a like converter equipped with a version of an anti-saturation device according to the invention. The converter shown in the drawing figures comprises an inverter which is controlled to switch by pulse width modulation and is feedback regulated using a sliding mode technique, similar to that described in detail in the aforementioned patent application. In particular, with reference to Figure 1, a single-phase inverter in a bridge configuration, generally shown at 10, is connected with its input to a DC voltage source U, not shown, and with its output to the primary of a transformer 11 via a coil 12 having an inductance L. The secondary of the transformer 11 is connected to a load 13 in parallel with a capacitor 14 having a capacitance C. The voltage v c across the capacitor 14 and the capacitor charge current i c , representing the output state x of the circuit, are sensed by specially provided sensors 15, 16 and respectively compared, at a voltage comparator 17 and a circuit node 18, with a reference voltage v r and a reference current i r generated by purposely arranged sinusoidal voltage and current sources 19 and 20. The outputs of the comparator 17 and the node 18, whereat the comparison resultant signals -- i.e. the state error signals v e and i e , briefly x e -- would appear, are respectively connected to an amplifier 21 having a gain K 1 , and an amplifier 22 having a gain K 2 . The outputs of the amplifiers 21, 22 are connected to a summing circuit 23 operative to combine the amplifier output signals together so as to output a signal representing a weighted mean of the state errors s(x e ). The output of the summing circuit 23 is connected to the input of a hysteresis comparator 24 whose output is connected to a logic control circuit 25, in turn connected to a control input of the inverter 10 to control it to change over, that is to drive its switches to break and make. The logic circuit 25 also has an input connected to the output of the reference voltage source 19. In operation, the output signal s(x e ) from the summing circuit 23 controls the hysteresis comparator 24 to supply the logic circuit 25 with a logic signal at a first level, if s(x e ) is greater than zero, and at a second level if s(x e ) is smaller than zero. The logic circuit is implemented, in accordance with well-known conventional techniques, through a sequential network whereby the inverter switches are controlled in combination and succession to have the output u of the inverter satisfy the following conditions: u = U max if s(x e ) > 0 and v r > 0 u = 0 if s(x e ) < 0 and v r > 0 u = 0 if s(x e ) > 0 and v r < 0 u = U min if s(x e ) < 0 and v r < 0 where, U max and U min are voltage values substantially equal in absolute value to the DC voltage U at the inverter 10 input and carrying a positive and negative sign, respectively. In addition, the logic circuit 25 is such as to optimize the switching sequence by also utilizing the two different states which enable a null voltage to be output. The output voltage u from the inverter 10, as modulated in the manner just described, is filtered by the inductance of the coil 12 and the transformer primary, as well as the capacitor C on the secondary, and outputs, therefore, a voltage v c from the converter which has a substantially sinusoidal waveform and an amplitude which will depend on the transformation ratio of the transformer. The pattern of the output voltage v c is kept stable by the feedback circuit, irrespective of any variations in the load 13. However, any symmetry defects of the inverter 10 may produce unbalance in its output voltage u resulting in the appearance of a DC voltage component at the primary of the transformer 11. Since the state of the circuit is sensed at the secondary circuit, the above-described feedback action cannot compensate for said unbalance, and accordingly, the transformer core may become saturated. In the embodiment, shown in Figure 1, this drawback is removed through the use of a circuit device which forms a second regulating feedback loop for the converter. Specifically, the anti-saturation circuit device comprises a current sensor 30 connected in the primary circuit of the transformer 11, an integrator 31 which outputs a proportional signal to any DC component sensed by the sensor 30, and a regulator 32 which is input that signal and applies, to the summing circuit 23, an error signal effective to correct the signal representing the weighted mean, as produced by the adder, of the state errors, thereby modifying the switch signals of the inverter 10 through the logic circuit 25. Understandably, the amplitude and sign of the error signal are such that the ultimate effect will tend to cancel out the error, that is to cancel the DC component in the primary current of the transformer. In Figure 2, an embodiment of the invention is shown applied to a converter which is quite similar to the converter in Figure 1. The anti-saturation circuit device is based here on a processing circuit 33 which simulates the structure and operation of the inverter 10. It is input the inverter 10 switch control signals generated by the logic control circuit 25 and computes a quantity u s corresponding to the output voltage u from the inverter. This quantity u s is applied to an integrator 34 which will output a signal correlated to the DC current component at the tranformer primary; in practice, a proportional signal thereto to be obtained by calculating the mean value of the quantity u s . This signal is then applied to the summing circuit 23 via a regulator 35, at an amplitude and with a sign such as to compensate for the unbalance that originated the DC component. Notice that this feedback regulation effect is indirect, in this instance. In fact, the simulation on the processing circuit 33 cannot take into account the structural and functional asymmetries of the inverter 10 directly. Due to the main feedback loop, these reflect, however, on the form of the modulated voltage that appears at the inverter output and, therefore, on the control signals generated by the logic circuit 25 to switch the inverter. Thus, the information about the inverter unbalance will reach the processing circuit 33 over those control signals. This explains why the anti-saturation device compensates for the symmetry error with some approximation, but does not represent a problem because the regulating loop is very slow (3-4 periods) and only aimed at preventing the magnetization current from "drifting" with time and bringing the transformer to saturation. While only an embodiment of the invention have been described and illustrated, it is understood that many changes and modifications may be made thereunto within the scope of the same inventive concept as claimed. Thus, for example, the anti-saturation device of the invention may be readily adapted for operation with converters having multi-phase inverters, rather than single-phase like the one described, provided that such converters incorporate a feedback regulation system.

Claims: An anti-saturation circuit device for a transformer (11) connected with its primary winding to the output of an inverter (10) of a circuit for converting a DC voltage (U) to a sinusoidal AC voltage (v C ), said converting circuit including control signal generating means (23-25) connected to the inverter (10) and generating switching signals for controlling the inverter (10) to switch according to a predetermined switching procedure, and feedback means (15-25) responsive to at least one state quantity (v C , i C ) of the circuit by so acting on the control signal generating means (23-25) as to modify said at least one state quantity (v C , i C ) and ensure a predetermined stable pattern for the output sinusoidal AC voltage (v C ), said anti-saturation device comprising correcting means (33-35) effective to sense a quantity indicative of an unbalance in the voltage (u) output from the inverter (10) causing the appearance of a DC voltage component at the primary winding of the transformer (11), and to apply a correction signal to the control signal generating means (23-25) for modifying the switching signals such as to cancel said DC voltage component, characterized in that the correcting means (33-35) comprise processing means (33) connected to the switch control signal generating means (25) and responsive to said switching signals to simulate the inverter (10) operation by computing a quantity (u S ) corresponding to the inverter (10) output voltage (u), an integrator (34) for generating an output quantity correlated to the DC component of said computed quantity (u S ), and means (35) for obtaining said correction signal from said integrator (34) output quantity.

Inventors: CARPITA MAURO, CARPITA, MAURO
Applicants: FINMECCANICA SPA, FINMECCANICA S.P.A. AZIENDA ANSALDO
Application year: 1993
Main classification: H02M7
IPC codes: H02M7, H02M1