Solid state electro-luminescent device and process for fabrication thereof

Abstract: An electro-luminescent material and solid state electro-luminescent device comprising a mixed material layer (3) formed of a mixture of silicon and silicon oxide doped with rare earth ions so as to show intense room-temperature photo- and electro-luminescence. The luminescence is due to internal transitions of the rare earth ions. The mixed material layer has an oxygen content ranging from 1 to 65 atomic % and is produced by vapor deposition and rare earth ions implant. A separated implant with elements of the V or III column of the periodic table of elements gives rise to a PN junction (3,4). The so obtained structure is then subjected to thermal treatment in the range 400-1100°C.

Description: The present invention relates to a solid state electro-luminescent device and to the process for fabrication thereof. As known, the use of silicon for manufacturing opto-electronic devices is limited since the indirect band gap of silicon does not allow efficient photon emission. The doping of silicon with erbium ions can result in intense luminescence only at low temperatures, near the liquid nitrogen boiling point (77°K). Moreover, it is known that the doping of silicon dioxide with erbium allows room temperature photo-luminescence. However, with erbium-doped silicon dioxide, it is not possible to observe luminescence produced by carrier transport (electro-luminescence) because of the insulating nature of silicon oxide. Finally, a detailed analysis of the luminescence effects in erbium doped single crystal silicon indicates that opto-electronic application of this material is severely limited by the small solid solubility of erbium in silicon grown either by Czochralski or by float zone techniques. Nowadays, photon emitting devices are usually fabricated using compound semiconductors, such as GaAs or similar. However, technological processing of these materials is severely limited by the outdiffusion of one of the constituents, which determines the loss of stoichiometry for thermal processes at intermediate temperatures. These materials, moreover, are not well suited for typical planar technology processes which are based on the properties of silicon dioxide. Diffusion barriers, insulating layers and all the other functions of silicon dioxide are replaced by deposited layers, characterized by physical-chemical performances which are worse than those of thermal silicon oxide. Furthermore, the cost of compound semiconductor substrates is much higher than the cost of silicon wafers and the present production is unable to supply wafers whose size reaches the diameter of silicon wafers, currently of 200 mm. Such a limitation implies a smaller number of devices being fabricated in a single set of processes and thus still higher costs for each device. A composite material having photo-luminescent properties is disclosed in the article "Room-temperature luminescent from Er-implanted semi-insulating polycrystalline silicon" S. Lombardo et al, Applied Physics Letters, vol. 63, no. 14 (4.10.93). According to this article, an SIPOS film doped with erbium shows luminescence when illuminated with a laser pump. The potentiality of the use of such a material for electrically activated light emission is mentioned. The aim of the present invention is to provide a silicon based solid state device solving the problems encountered in the prior art. According to the present invention, there is provided a solid state electro-luminescent device as defined in claim 1. The present device is made of a material formed by a mixture of silicon and silicon oxide which has an electrical conductivity large enough to get carrier transport, can be doped with rare earth ions and can be treated with thermal processes which allow luminescence. This material combines the advantages of silicon, as a semiconductor, and of silicon oxide as a host for rare earth ions, showing room-temperature luminescence. Preferred non-limiting embodiments of the present invention will be described by way of an example with reference to the accompanying drawings, wherein: Figs. 1 to 4 are cross-sections of different embodiments of the present electro-luminescent device; Fig. 5 is a cross-section of a sample formed by the electro-luminescent material of the present device and used for carrying out tests on photo- and electro-luminescence; and Figs. 6 to 9 are diagrams resulting from the photo- and electro-luminescence tests. Fig. 1 shows a cross section of a solid state electro-luminescent device 1 integrated in a chip. The device 1 comprises a stack formed by an N-type silicon substrate 2, an N-type region 3 (doped with erbium), and a P-type region 4 (doped with boron). Contacts 5 and 6 are deposited on surfaces 7 and 8 formed by substrate 2 and P-type region 4, respectively. Regions 3 and 4 are obtained from a single mixed material layer formed of a mixture of silicon and silicon oxide, whose oxygen content may be varied between 1 to 65 atomic %. Such a mixed material, also called SIPOS (Semi Insulating POlycrystalline Silicon), has already been used for passivation processes, for example for fabricating field plates of power devices, but has never been proposed for opto-electronic applications when doped with rare earth ions. Regions 3 and 4 are thus obtained by suitable doping such SIPOS material; in particular, region 3 is obtained by doping such mixed material with erbium and region 4 is obtained by doping it with boron. A possible sequence of steps for fabricating the structure of fig. 1 is the following. Initially, a silicon wafer, of N-type and any orientation, is introduced in a Chemical Vapor deposition system (not shown). The wafer temperature is raised to a value suitable to obtain deposition, i.e. 550-700°C; then the wafer is exposed to a flow of gases that allow the deposition of silicon and silicon oxide (typically SiH 4 and N 2 O). The gas flow ratio is controlled by a mass flow controller and preferably adjusted in such a way as to obtain layers whose oxygen content may be varied from 1 to 65 atomic %. After deposition, the wafer may be thermally processed at intermediate temperatures in order to stabilize the structure of the layer. The wafer is then introduced in an ion accelerator and implanted with erbium ions to doses in the range 1x10 14 to 1x10 16 ions/cm 2 . The implant energy used in the tests was 500KeV, but may be varied in order to obtain predetermined concentration profiles. Other erbium doses may also be used. The wafer is further implanted with low energy boron ions (about 30KeV) in order to form a PN junction. Thereafter, the wafer is introduced in a furnace at a suitable temperature (e.g. in the range 400-1100°C) in order to reduce radiation damage and to activate the introduced dopants. Thereby, regions 3 and 4 are formed, and have the dopant concentration profiles schematically shown in fig. 1 with dash-and-dot lines. Then the wafer is subjected to other fabrication processes, such as contact deposition for obtaining contacts 5, 6, etc. Fig. 2 shows a different embodiment of the present device, indicated at 11, including a P-type silicon substrate 12, a P-type region 13, an N-type region 14 and contacts 15, 16 on surfaces 17, 18. The fabrication process of device 11 is similar to the above described one, with the following differences. The substrate 12 is of P-type; the boron implant is made at higher energy, in order to locate boron near the substrate, the erbium implant is made at low energy in order to form the N-type region 14 close to the surface 18. In fig 3, the device 21 includes a silicon substrate 22; a silicon oxide layer 23 on substrate 22; an N-type region 24 on oxide layer 23; a P-type region 25 embedded in region 24, except for its upper face forming, together with upper face of region 24, surface 26 of the device; and contacts 27, 28 to region 23 and region 24, respectively. The fabrication process of device 21 differs from the process for fabricating device 1 in that the SIPOS material is deposited onto an insulated substrate (including layer 23 or other layers of insulating material), boron implant is carried out through a mask which limits the area of region 25, and both contacts are formed on the same device surface (surface 26) so as to contact region 24 and region 25, respectively. In fig. 4, the mixed material region is different from that of figs. 1 to 3; in particular, device 31 comprises a silicon substrate 32 and multilayer region 33 formed by a stack of very thin layers, including oxide or SIPOS layers 34 and silicon layers 35, laid one on the other, in turns. As an example, layers 34, 35 may have a thickness of about 10 nm. Multilayer region 33 is equivalent to the starting mixed material region of devices 1, 11 or 21 and thus may be doped as above described for such devices, and have contacts 36, 37 on top and bottom surfaces 38, 39 of the device, as shown, or only on top surface 38. Of course, the above described fabrication processes may also vary from what has been described in that the implantation processes may be made before the thermal process required to stabilize the material, instead of after that process; the implantation processes may be done on wafers which have been previously processed and the deposited mixed material region may have an oxygen content ranging from 1 to 65 atomic %. Photo-luminescence of the SIPOS material doped with erbium has been detected at temperatures up to 300 K in samples whose structure (indicated at 41) is shown in fig. 5 and includes a single crystal silicon substrate 42 and a SIPOS layer 43 doped with erbium so as to obtain a layer having the erbium concentration profile shown by dash-and-dotted line. In the tests, samples 41 have been illuminated with green light emitted by a 2 W argon laser and the luminescence has been revealed through a monochromator and an IR detector. The emitted radiation spectrum is shown in fig. 6 for different average oxygen contents. In particular, curve A is relative to a reference sample obtained by doping with erbium a single crystal silicon sample (that is without layer 43); curve B has been obtained by a sample having the structure of fig. 5, wherein the oxygen content of layer 43 was 4 atomic %; curve C is relative to a sample having an oxygen content of 11 atomic %; curve D is relative to a sample having an oxygen content of 27 atomic %; and curve E is relative to a sample wherein layer 43 was formed only by silicon oxide. It is evident that erbium doping of a single crystal silicon layer (curve A) does not produce any appreciable room temperature photo-luminescence, while the peak intensity at 1.535 µm grows more than linearly with the oxygen content in SIPOS films. Luminescence L has been also measured as a function of laser pump wavelength and the results are reported in fig. 7 for two different anneal temperatures. The weak dependence of luminescence on the pump laser wavelength is a clear indication that luminescence is produced by electrical carriers injected by the pump laser. Electro-luminescence measurements were made using device 1 shown in fig. 1. The thickness of the SIPOS layer (equal to the sum of the thickness of regions 3 and 4) was about 0.25 µm. The current/voltage characteristics resulting from the test are reported in fig. 8 for two different temperatures; as can be seen, the measured characteristics show the typical diode behavior, indicating the bipolar conduction mechanism. Similar diode characteristics have been obtained by doping the SIPOS material with As/B and P/B. In the electro-luminescence test, the device was introduced in an electro-luminescence measuring apparatus similar to that previously described for photo-luminescence tests, with the addition of a heat sink, in order to remove the energy produced by Joule heating, and of a power supply for biasing the diode. Fig. 9 shows the spectrum of the emitted infrared radiation obtained at room temperature and for a measured current of 8.6 mA (curve F). The revealed photo/electro-luminescence may be explained as follows: electron/hole pairs are injected in silicon by either the incident light (photo-luminescence) or charge injection in the biased diode (electro-luminescence). The electron/hole pairs recombine producing an intra-4f transition of Er 3+ and thus luminescence at about 1.54 µm wavelength. It has thus been demonstrated that by using a mixed material of silicon/silicon oxide doped with erbium and/or other dopants (rare earth ions) suitable to modulate the conductivity of the material it is possible to obtain intense room-temperature photo- and electro-luminescence in the infrared. The described material or the junction device obtained therewith can thus be used as opto-electronic component either in a hybrid or in an integrated circuit. To those skilled in the art it will be clear that changes may be made to the device and to the fabrication process within the scope of the appended claims. In particular, it is underlined that instead of doping the mixed material with erbium, it is possible to dope it with other rare earth elements, to obtain luminescence at different wavelengths. The sequence of the doping steps required to obtain the PN junction may be inverted with respect to the above description. As already indicated, the mixed material may be formed as a casual mixture of silicon and silicon oxide or as an orderly stack of thin films of silicon and silicon oxide or silicon and SIPOS. The content of oxygen may vary, as well as the technique for depositing the mixed material (e.g. by physical or chemical deposition, by ion implantation or other similar techniques).

Claims: A solid state electro-luminescent device (1; 11, 21), which comprises a PN junction formed by a first region (3; 14; 24) of a mixed material (43) formed of a mixture of silicon and silicon oxide doped with rare earth ions, and at least one second region (4; 13; 25) of said mixed material with dopant elements of the V or III column of the periodic table of elements. A device according to claim 1, wherein said rare earth ions are erbium ions. A device according to claim 1 or 2, wherein said dopant elements are boron ions. A device according to any of claims 1-3, wherein the oxygen content of said mixed material is in the range 1-65 atomic %. A device according to any of the preceding claims, characterized in that said mixture of silicon and silicon oxide comprises mutually stacked thin layers (34, 35) of silicon and silicon oxide. A device according to any of claims 1-4, characterized in that said mixed material comprises mutually stacked thin layers (34, 35) of silicon and said mixture of silicon and silicon oxide. A device (1) according to any of claims 1-6 , wherein said first region (3) has a first conductivity type and is arranged on a silicon substrate (2) having said first conductivity type, and said second region (4) has a second conductivity type and arranged on said first region; said device further including contact elements (5, 6) with said substrate and said second region. A device (11) according to any of claims 1-6, wherein said second region (13) has a first conductivity type and is arranged on a silicon substrate (12) having said first conductivity type, and said first region (14) has a second conductivity type and is arranged on said second region; said device further including contact elements (15, 16) with said substrate and said first region. A device (21) according to any of claims 1 -6, wherein said first and second regions (24, 25) are arranged on an insulating layer (23) in turn arranged on a silicon substrate (22), one (25) of said first and second regions being laterally and downwardly surrounded by the other (24) of said first and second regions and both first and second regions forming a device main surface (26); contact elements (27, 28) being formed on said device main surface in electrical contact with said first and second regions. A process for fabricating a solid state electro-luminescent device (1; 11; 21) according to one or more of claims 1-9, comprising the steps of: forming a mixed material layer (33; 43) including a mixture of silicon and silicon oxide on a substrate (32; 42); forming a PN junction in said mixed material layer (33; 43) by doping said mixed material layer with rare earth ions and dopant elements of the V or III column of the periodic table of elements. A process according to claim 10, wherein said rare earth ions are erbium ions. A process according to claim 10 or 11, further comprising the step of thermally processing said mixed material layer for stabilization. A process according to any of claims 10-12, wherein said step of forming a mixed material layer comprises chemical or physical vapour deposition or ion implantation of silicon and silicon oxide. A process according to any of claims 10-12, wherein said step of forming a mixed material layer comprises the step of depositing a stack of thin silicon layers (35) and thin silicon oxide layers (34) overlaid in turns. A process according to any of claims 10-12, characterized in that said step of forming a mixed material layer comprises the steps of depositing, on a substrate (32; 42), a stack of thin silicon layers (35) and thin layers (34) of said mixture of silicon and silicon oxide. A process according to any of claims 10-15, wherein said step of forming a PN junction comprises a first and a second ion implantation doping steps, said first ion implantation doping step being carried out at a higher energy than said second ion implantation doping step. A process according to claim 16, wherein said first doping step comprises doping said mixed material layer with rare earth ions and said second doping step comprises doping said mixed material with dopant elements of the V or III column of the periodic table of elements. A process according to claim 16, wherein said first doping step comprises doping said mixed material layer with dopant elements of the V or III column of the periodic table of elements and said second doping step comprises doping said mixed material with rare earth ions. A process according to any of claims 10-18, wherein said substrate (2; 12) has a first conductivity type and wherein said step of forming a PN junction comprises the step of forming a first region (3; 13) of said first conductivity type on said substrate and a second region (4; 14) of a second conductivity type on said first region; said process further comprising the step of forming contact elements (5, 6; 15, 16) on opposite surfaces (7, 8; 17, 18) of said device (1; 11) in direct electrical contact with said substrate and said second region. A process according to any of claims 10-18, comprising the step of forming an insulating layer (23) between said substrate (22) and said mixed material layer (24, 25), wherein said step of forming a PN junction comprises the steps of forming a first region (24) on said insulating layer and forming a second region (25) in said first region with a surface of said second region aligned with a surface of said first region to define a device main surface (26); said process further comprising the step of forming contact elements (27, 28) on said device major surface (26) in electrical contact with said first and second regions.

Inventors: ALBERT POLMAN, GERARD NICOLAAS VAN DEN HOVEN, GIUSEPPE FERLA, SALVATORE LOMBARDO, SALVATORE UGO CAMPISANO, ALBERT, POLMAN, GERARD NICOLAAS, VAN DEN HOVEN, GIUSEPPE, FERLA, SALVATORE UGO, CAMPISANO, SALVATORE, LOMBARDO
Applicants: CONS RIC MICROELETTRONICA, CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
Application year: 1993
Main classification: H01L33
IPC codes: H05B33, H01L21, H01L33