Harmonic distortion compensation circuit

Abstract: A digital signal is converted into an analog signal by each of a plurality of digital-to-analog converters (16, 17). One of signals output by the digital-to-analog converters (16, 17) is selected by a change-over switch (20) for feeding to a circuit at the following stage (4). A timing generator (18) generates timing pulses. An inverter (19) inverts the timing pulses. Latch circuits (14, 15) operate in opposite phases to each other. The timing pulses are used to control the change-over switch (20) for removing harmonic distortion caused by settling from the output signals of the digital-to-analog converters (16, 17).

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to an amplitude modulation method and a broadcasting apparatus to which the method is applicable, and more particularly to technologies for simplifying the power amplifier and power supply circuit configuration. 2. Description of the Related Art A digital modulation system that can be used with a fully solid state radio broadcasting apparatus is described in "Digitally Implemented Medium Frequency Transmitter And Its Application" written by Shinya HIRANO on pages 119-125 of the April 1991 issue of Hoso Gijutsu (Broadcasting Technologies). In the modulation system, analog-to-digital (A/D) conversion of audio signals of modulation signals is first made by a 12-bit A/D converter to provide 12-bit digital audio signals. The high-order six bits of the digital audio signal are used to control the on or off states of 42 big step modules and the low-order six bits to control the on or off states of six binary modules. The big step modules and binary modules are power amplifiers which amplify RF carriers. The gains of the six binary modules are 1/2, 1/4, 1/8, 1/16, 1/32, and 1/64 those of the big step modules respectively. RF outputs of the big step modules and binary modules are added together, and the resultant RF signals are transmitted. Therefore, the amplitude of the resultant RF signal can be changed in big steps by selectively turning on and off the big step modules; it can be changed in finer steps by selectively turning on and off the binary modules. This shows that amplitude-modulated waves can be obtained as the resultant RF signals after combining by controlling the on or off states of the big step modules and binary modules. Thus, hitherto, a large number of power amplifiers whose on or off states can be controlled have been used to digitally generate amplitude-modulated waves. In the example given above, 42 big step modules and six binary modules, namely, 48 power amplifiers are used in total. The configuration of a broadcasting apparatus is enlarged by using a large number of power amplifiers. Therefore, it is not economical to adopt such a configuration for a transmitter having a comparatively small output capability of about 1 kW. Further, generally the power supply voltages of power amplifiers must be made different according the output specifications of the power amplifiers. In the example given above, the supply voltage of each big step module is 230 V; the supply voltages of the four binary modules having outputs of 1/2, 1/4, 1/8, and 1/16 that of the big step module are each 115 V; and the supply voltages of the two binary modules having outputs 1/32 and 1/64 that of the big step module are each 30 V. Thus, in the conventional apparatus, a number of voltages must be provided as power amplifier supply voltages and complication of the power circuit configuration is inevitable. Further, since the modulation system described above adopts uniform quantization as the quantization method, quantizing noise increases rapidly as the amplitude of an audio signal input as a modulation signal becomes small. This causes the S/N ratio to lower and the distortion factor to increase. As shown in Figure 1, the distortion factor when the degree of modulation is 10% (that is, when the input audio signal amplitude is comparatively small) is about 10 times higher than when the degree of modulation is 100 % (that is, when the input audio signal amplitude is comparatively large). To overcome these disadvantages, for example, the art described in Japanese Patent Laid-Open No.Hei 5-63458, which has been published after the priority date of the present patent, may be used. Figure 2 shows the configuration of a medium frequency radio broadcasting apparatus described in the Japanese Laid-Open Patent Publication. The broadcasting apparatus comprises an A/D converter 1 which converts program audio signals into 12-bit digital audio signals, followed by a 12-bit latch circuit 2 which latches the digital audio signal output from the A/D converter 1. The low-order (LSB side) 8 bits of the digital audio signal latched by the latch circuit 2 are fed into a digital-to-analog (D/A) converter 3 and the high-order (MSB side) four bits are fed into a gate circuit 9. The D/A converter converts the low-order 8 bits of the digital audio signal into analog form. A driver 4 following the D/A converter 3 amplifies the analog signal output from the D/A converter 3 and feeds the amplified analog signal into a modulator 5. The modulator 5 uses the analog signal fed from the driver 4 to amplitude-modulate a supply voltage fed from a power supply 6. An analog controlled power amplifier 7 is an amplifier whose gain can be controlled by an analog control signal fed from an external device or system. In Figure 2, the gain of the analog controlled power amplifier 7 is controlled by the output signal of the modulator 5. The analog controlled power amplifier 7 amplifies carriers supplied from an oscillator 8. Therefore, the output amplitude of the analog controlled power amplifier 7 is controlled by the low-order 8 bits of the digital audio signal. The low-order 8 bits provide information on a comparatively fine amplitude in the digital audio signal. Thus, comparatively fine amplitude constituents of large amplitude-modulated waves to be output by the broadcasting apparatus are obtained from the analog controlled power amplifier 7. Output of the analog controlled power amplifier 7 is combined with output of a digitally controlled power amplifying section 10 by a combiner 11. The digitally controlled power amplifying section 10 consists of 16 digitally controlled power amplifiers 101 to 116. Each of the digitally controlled power amplifiers 101 to 106 is an amplifier whose on or off states can be controlled by an analog control signal fed from an external device or system. In Figure 2, the digital control signal is supplied from the gate circuit 9. The digitally controlled power amplifiers 101 to 116 amplify carriers supplied from the oscillator 8. The high-order four bits of the digital audio signal latched by the latch circuit 2 are fed into the gate circuit 9, as described above. The gate circuit 9 consists of, for example, a ROM, a latch circuit, etc., (not shown), and generates a 16-bit signal corresponding to the 4-bit digital signal supplied from the latch circuit 2. The bits of the signal output from the gate circuit 9 correspond to the digitally controlled power amplifiers 101 to 116. Therefore, which or what combination of the digitally controlled power amplifiers 101 to 116 are to be turned on is determined by the value of the high-order four bits of the digital audio signal. The high-order four bits of the digital audio signal provide information on comparatively rough amplitude constituents of the digital audio signal. Therefore, comparatively rough amplitude constituents as shown by the stepped waveform in Figure 3(a) are obtained by combining outputs of the digitally controlled power amplifiers 101 to 116. The combiner 11 combines the outputs of the analog controlled power amplifier 7 and the digitally controlled power amplifiers 101 to 116. The combiner 11 combines the outputs of the digitally controlled power amplifiers 101 to 116 for generating the amplitude constituents shown as the stepped waveform in Figure 3(a) and further combines the amplitude constituents with the output of the analog controlled power amplifier 7 (the hatched portions in Figure 3(b)) for generating large amplitude-modulated waves to be output from the broadcasting apparatus. The generated large amplitude-modulated waves are fed to an antenna system (not shown) as broadcasting apparatus output. Therefore, according to the configuration, the number of power amplifiers used to digitally generate amplitude-modulated waves can be reduced. Specifically, only 17 power amplifiers are used as one analog controlled power amplifier 7 and 16 digitally controlled power amplifiers 101 to 116. It is clear that the number of power amplifiers is remarkably reduced compared with the conventional art mentioned above in which 48 power amplifiers are used. Therefore, a broadcasting apparatus having a comparatively small output capability such as 1 kW can be formed economically. The example circuitry also eliminates the need for using a plurality of power supplies with different specifications in order to drive a plurality of power amplifiers. Compared with the conventional art which requires a plurality of power supplies with different specifications because a plurality of small-output binary modules are used, the circuitry in Figure 2 enables a remarkably simple configuration of the power supply 6, thus providing a more economical broadcasting apparatus. Hitherto, a method of increasing the number of quantization bits has been used to prevent quantizing noise from causing characteristic degradation. In the conventional modulation system, an increase in the number of quantization bits leads to an increase in the number of power amplifiers and complication of the power circuit configuration. In contrast, in Figure 2, an increase in the number of quantization bits requires only an increase in the number of bits fed from the latch circuit 2 to the D/A converter 3. Therefore, in the example in Figure 2, an increase in the number of quantization bits does not lead to an increase in the number of power amplifiers or complication of the power supply configuration. Thus, quantization noise can be prevented from causing characteristic degradation without increasing the number of power amplifiers or complicating the power supply configuration. The broadcasting apparatus shown in Figure 2 has an advantage of simplifying the apparatus configuration without causing characteristic degradation even compared with fully solid state radio transmitters of the PWM (pulse width modulation) system widely applied at present, and thus can be popularized worldwide. However, if a commercially available D/A converter is used as the D/A converter 3 mentioned in the configuration, settling introduces a problem. For example, to provide an amplitude-modulated waveform with no harmonic distortion as shown in Figure 3(a), the analog controlled power amplifier 7 in the first configuration must output a waveform as shown in Figure 3(b). Since the gain of the analog controlled power amplifier 7 is controlled by output of the modulator 5, in its turn output of the D/A converter 3, the D/A converter 3 must also output a waveform as shown in Figure 3(c) to provide an amplitude-modulated waveform with no harmonic distortion. However, the commercially available D/A converter has a characteristic that its output is not rapidly settled. This characteristic is called settling and the settling occurring period is called the settling time. If the settling is remarkable, the D/A converter 3 outputs a waveform containing a slant caused by the settling time as shown in Figure 3(d). This slant results in harmonic distortion in the output waveform of the analog controlled power amplifier 7. A known digital-to-analog (D/A) conversion circuit for high speed D/A conversion (JP-A-62 281 521) uses low speed D/A converters to realize high speed conversion. In particular, a digital input signal is supplied to first and second latch circuits which are controlled by a timing generator. The output signals of the latch circuits are supplied to D /A converters the outputs of which are alternately fed to an output amplifier via switching means. The switching means are controlled by complementary outputs of a flip-flop which is clocked via an inverter by a clock signal CK. An AM transmitter known from US-A-4, 403, 197 comprises first amplifying means having an analog-to-digital converter and a number of amplifier cells controlled by the output of the analog-to-digital converter. Here, the number of amplifier cells corresponds to the number of bits provided by the A/D converter. To increase the resolution of the amplifier a PWM amplifier stage is provided and controlled by a differential amplifier one input of which receives the same audio signal as the A/D converter of the first amplifier means. Thus, the first amplifier means and the PWM amplifier stage are controlled by the same audio input signal. SUMMARY OF THE INVENTION The object of the present invention is to provide a new radio broadcasting apparatus that generates an improved amplitude-modulated wave by means of a reduced number of amplifiers and an amplitude-modulation method applicable to such an apparatus. This object is achieved by the radio broadcasting apparatus according to claim 1 and by the method according to claim 9. In the invention, since the digital-to-analog converters are operated alternately and switch output is executed in synchronization with the alternate operation, even if the digital-to-analog converter output contains harmonic distortion caused by settling, the distortion can be removed, thereby remarkably improving the amplitude-modulated wave quality. BRIEF DESCRIPTION OF THE DRAWINGS In the accompanying drawings: Figure 1 is a graph showing the relationship between degree of modulation and distortion factor and S/N ratio; Figure 2 is a block diagram showing the configuration of a fully solid state medium frequency radio broadcasting apparatus according to a conventional embodiment; Figure 3 is a chart for illustrating problems in the conventional embodiment: Figure 3(a) shows a modulation waveform corrected by an analog controlled power amplifier; Figure 3(b) shows an output waveform of an analog controlled power amplifier required to provide such a waveform; Figure 3(c) shows an output waveform of a D/A converter required for this purpose; and Figure 3(d) shows an actual D/A converter output waveform, particularly waveform distortion caused by its settling time; Figure 4 is a block diagram showing the configuration of a harmonic distortion compensation circuit used in one embodiment of the invention; Figure 5 is a block diagram showing the configuration of a fully solid state medium frequency radio broadcasting apparatus according to the embodiment of the invention; and Figure 6 is a chart showing waveforms in the embodiment of the invention: Figure 6(a) shows an output waveform of D/A converter 16; Figure 6(b) shows an output waveform of D/A converter 17; Figure 6(c) shows a D/A switch signal waveform output from timing generator 18; and Figure 6(d) shows a waveform output from change-over switch 20. DESCRIPTION OF THE PREFERRED EMBODIMENTS OF THE INVENTION Referring now to the accompanying drawings, there are shown preferred embodiments of the invention. Circuit parts identical with or similar to those previously described in the conventional embodiment are denoted by the same reference numerals in the embodiment of the invention, and description is omitted. Figure 4 shows the configuration of a harmonic distortion compensation circuit that can be used to eliminate such harmonic distortion as is caused by settling involved in D/A conversion. Figure 5 shows the circuit configuration where the circuit shown in Figure 4 is applied to a fully solid state medium frequency radio broadcasting apparatus. The harmonic distortion compensation circuit 12 in the embodiment of the invention is located at the stage following a latch circuit 2, as shown in Figure 5. The harmonic distortion compensation circuit 12 converts a 12-bit signal supplied from the latch circuit 2, namely, the low-order 12 bits of a digital audio signal into analog form. The resultant analog signal, like the output of the D/A converter 3 in the conventional embodiment, is fed via a driver 4 into a modulator 5 to control the gain of an analog controlled power amplifier 7. Unlike the D/A converter 3 in the conventional embodiment, the harmonic distortion compensation circuit 12 has a function which suppresses waveform distortion caused by settling or reduces it remarkably. This function is provided by the configuration shown in Figure 4. As shown in Figure 4, the harmonic distortion compensation circuit 12 is provided with latch circuits 14 and 15 which latch 8-bit signals fed via a data bus 13. The latch circuits 14 and 15 are followed by D/A converters 16 and 17 respectively. Therefore, the low-order 8 bits latched by the latch circuit 14 are converted into analog form by the D/A converter 16; the low-order 8 bits latched by the latch circuit 15 are converted into analog form by the D/A converter 17. The latch timings of the latch circuits 14 and 15 are given by a timing generator 18 which generates timing pulses synchronized with sampling clocks of the latch circuits 14 and 15. The timing pulses are fed via an inverter 19 into the latch circuit 14 and directly into the latch circuit 15. The latch circuits 14 and 15 latch the low-order 12 bits of the digital signal in response to the supplied timing pulse and its inverted pulse. Therefore, the latch timings of the latch circuits 14 and 15 become opposite in phase to each other. The latch circuits 14 and 15 operate in opposite phases to each other. Therefore, the D/A converters 16 and 17 output analog values into which the low-order 12 bits of digital signals received at different timings are converted. The timing generator 18 also gives a switch timing to a change-over switch 20 following the D/A converters 16 and 17. The change-over switch 20 is switched in response to the timing pulse generated by the timing generator 18. Output of the change-over switch 20 is sent to the driver 4. Figure 6 shows how switching the change-over switch 20 is controlled. First, assume that each of the latch circuits 14 and 15 latches data (low-order 8 bits) at the timing when a latch pulse which is high is supplied. In this case, the latch circuits 14 and 15 latch the low-order 12 bits at the timings when the timing pulse (D/A switch signal) shown in Figure 6(c) goes high and low respectively. The D/A converters 16 and 17 convert the low-order 8 bits of the digital signal latched by the latch circuits 14 and 15, respectively, into analog form. Therefore, the waveform resulting from converting the low-order 8 bits of the digital signal into analog form appears at the output of the D/A converter 16 in the period during which the timing pulse is high and at the output of the D/A converter 17 in the period during which the timing pulse is low. If D/A converters which can suppress settling can be used as the D/A converters 16 and 17, then the D/A converters 16 and 17 output the waveforms denoted by the broken lines in Figures 6(a) and 6(b) respectively. In fact, the actual D/A converters output waveforms containing harmonic distortion caused by settling. As a result of settling, the D/A converters 16 and 17 output the waveforms denoted by the solid lines in Figures 6(a) and 6(b) respectively. In the embodiment of the invention, waveform distortion is caused by settling as shown in Figure 6, but is not output to the driver 4 because the change-over switch 20 is switched so as to send, to the following circuit, the output of the D/A converter 17 while the settling distortion appears at the output of the D/A converter 16 or the output of the D/A converter 16 while the settling distortion appears at the output of the D/A converter 17. In more detail, the D/A converters 16 and 17 output D/A conversion waveforms and settling waveforms at alternate timings because the corresponding timing pulses are opposite in phase to each other. Therefore, if the change-over switch 20 is switched in synchronization with the alternation, only the D/A conversion waveforms with the settling waveforms eliminated can be output to the following stage. Since the alternate timings of outputs of the D/A converters 16 and 17 are determined by the timing pulses generated by the timing generator 18, if the timing pulses are used to control the switch timing of the change-over switch, analog signals containing no settling waveforms, as shown in Figure 6(d), are provided. Therefore, the embodiment offers the advantage of providing high-grade amplitude-modulated waveforms with no harmonic distortion in addition to the advantage offered by the conventional embodiment. The invention does not limit the number of digitally controlled power amplifiers and does not limit the output capabilities of broadcasting apparatuses either. For example, the invention is applicable to a wide range of broadcasting apparatuses having output capabilities of 100 W to 100 kW or more.

Claims: A radio broadcasting apparatus comprising: a predetermined number of digital power amplifiers (101, 102,...116) for amplifying an oscillated carrier in response to high-order bits of the digital signal, representing comparatively rough amplitude constituents in a program signal; digital-to-analog converting means (12) for converting low-order bits of a digital signal, representing comparatively fine amplitude constituents in the program signal, to an analog signal; said digital-to-analog converting means (12) including: a plurality of digital-to-analog converters (16,17); switch means (20) for combining outputs from said respective digital-to-analog converters (16, 17); and timing control means (18,19) for causing said plurality of digital-to-analog converters (16, 17) to operate alternately on the digital signal and for causing said switch means (20) to operate in synchronization therewith so that a slant due to settling is removed from a thus obtained combined output said switch means (20); an analog power amplifier (7) for amplifying the oscillated carrier by means of a gain in accordance with the combined output from said digital-to-analog converting means (12); and a combining circuit (11) for combining outputs from said digital-to-analog power amplifiers (101, 102, ... 116; 7) wherein a stepped waveform derived through combination of outputs from the digital power amplifiers (101, 102, ... 116) is smoothed as a result of being combined with the output of the analog power amplifier (7) by the combining circuit (11). The apparatus as claimed in claim 1, characterized in that said means for combining outputs from said respective digital-to-analog converters (16, 17) comprises switch means (20) for alternately selecting one of said analog signals output by said digital-to-analog converters (16, 17) to obtain the combined output.. The apparatus as claimed in claim 1 or 2, characterized in that said means for causing said digital-to-analog converters (16, 17) to operate alternately on the digital signal comprises timing control means (18, 19) for operating said digital-to-analog converters (16, 17) and said switch means (20) in synchronization. The apparatus as claimed in claim 1, 2 or 3, characterized by further including analog-to-digital conversion means (1) for converting an input analog signal into said digital signal. The apparatus as claimed in claim 1, 2, 3, or 4, characterized by further including means (9) for converting high-order bits of the input digital signal into a digital signal for on/off control and further feeding said on/off control digital signal to said digitally controlled amplifier (101, 102,..116) for controlling operation thereof. The apparatus as claimed in claim 5 characterized by providing a plurality of digitally controlled amplifier (101, 102, 116) and by that each of said digitally controlled amplifier (101, 102, 116), when on, amplifies the oscillated carrier to a predetermined amplitude for output and when off, does not amplify or output it and wherein bits of said on/off control digital signal are related to said digitally controlled amplifier (101, 102, 116). The apparatus as claimed in any one of the preceding claims, characterized by further including oscillator means (8) for generating the carrier. The apparatus as claimed in any one of the preceding claims, characterized by further including power supply means (6) for supplying a supply voltage at least to said analog power amplifier (7) and said digital power amplifier (101, 102,..116). A method for modulating an amplitude of an oscillated carrier with a program signal; said method comprises the steps of: converting low-order bits of an input digital signal, representing comparatively fine amplitude constituents in the program signal, into analog signals by means of a plurality of digital-to-analog converters (16, 17) which are alternately operated, wherein said analog signals contain a slant caused by settling; alternately selecting one of said analog signals in synchronization with the alternate operation of said digital-to-analog converters (16, 17) so that a slant due to settling is removed from a thus obtained analog signal output as an analog gain control signal; amplifying an oscillated carrier by means of an analog power amplifier (7) controlled in accordance with said analog gain control signal; amplifying the oscillated carrier by means of a predetermined number of digital power amplifiers (101, 102, ... 116) controlled in accordance with high-order bits of the input digital signal, representing comparatively rough amplitude constituents in the program signal; combining the outputs of said analog power amplifier (7) and said digital power amplifiers (101, 102, ... 116) for generating an amplitude-modulated wave. The method as claimed in claim 9, characterized by converting said analog program signal into said digital input signal. The method as claimed in claim 9 or 10, characterized by converting the high-order bits of the input digital signal into a digital signal for on/off control of said digital power amplifiers (101, 102, ... 116), which, when on, amplifies said oscillated carrier to a predetermined amplitude and, when off, does not amplify or output said oscillated carrier.

Inventors: HAYEIWA KAZUHISA, KOJIMA YUTAKA, MINAMI MICHITOSI, NAKA HISASHI, HAYEIWA, KAZUHISA, KOJIMA, YUTAKA, MINAMI, MICHITOSI, NAKA, HISASHI, HAYEIWA, KAZUHISA C/O NIPPON HOSO KYOKAI, Kojima, Yutaka, c/o Japan Radio Co., Ltd., Minami, Michitosi, c/o Japan Radio Co., Ltd., Naka, Hisashi, c/o Nippon Hoso Kyokai
Applicants: JAPAN BROADCASTING CORP, JAPAN RADIO CO LTD, JAPAN RADIO CO., LTD, NIPPON HOSO KYOKAI
Application year: 1993
Main classification: H03F3
IPC codes: H03C1, H03F3, H03M1