Multiple error correcting method

Abstract: A method for correcting multiple erroneous symbols included in data produces a demodulation flag indicating whether demodulation based on a modulation code such as EFM or ETM is possible. The demodulation flag is used in decoding the data based on the error correcting code. Producing the error locations during decoding in accordance with a Reed-Solomon code comprises the steps of producing an index using: ϑ = k₂ k₁ 3/2 (where σ₁, σ₂ and σ₃ represent coefficients of an error location polynomial and k₁ represents σ₁² + σ₂ and k₂ represents σ₁σ₂ + σ₃); reading out virtual roots from a specified memory related to the index, and transforming the virtual roots (Z₁, Z₂ and Z₃) into error locations (x j1 , x j2 and x j3 ) in accordance with the following equations: x j1 = Z₁ 1/2 k₁ +σ₁ x j2 = Z₂ 1/2 k₁ +σ₁ x j3 = Z₃ 1/2 k₁ +σ₁

Description: The present invention relates to an error correcting method and, more particularly, to a multiple error correcting method for correcting erroneous symbols included in data which is encoded in accordance with an error correcting code, and then modulated based on a modulation code such as eight-to-fourteen modulation (EFM), eight-to-ten modulation (ETM), etc. In the conventional digital audio apparatus, such as a digital audio tape recorder (DAT) or compact disk (CD), audio data is encoded in accordance with the C1/C2 cross interleave product code. In more detail, audio data with a plurality symbols is first encoded in accordance with a second Reed-Solomon code (C2 code) capable of correcting triple errors, interleaved according to a predetermined order, and then encoded in accordance with a first Reed-Solomon code (C I code) capable of correcting double errors. In the conventional decoding system, a double-error correcting method or a quadruple-erasure correcting method is performed for decoding the data encoded based on the first Reed-Solomon code, a double-error correcting method or a sixfold-erasure correcting method are performed for decoding the data encoded based on the second Reed-Solomon code, under the constraint of real-time processing. Here, an erasure is an erroneous symbol whose location is known. A symbol is a sequence of adjacent binary digits operated upon as a unit, and is the constitutional element of a word. Conventional technologies related to this are disclosed in U.S.P. No. 4,476,562 by Sony, and U.S.P. No. 4,875,211 by Matsushida. Referring to the Matsushida patent, the positions of two or more multiple-errors can be detected by a chain search algorithm. Here, however, the calculation for the chain search algorithm must be repeatedly performed as many times as the number of symbols included in a word. On the other hand, in the Sony patent, a double-error correction and a quadruple-erasure correction can be easily performed, but a triple (or more) error correction cannot be performed. EP-A-0,185,425 discloses a method of decoding a repeatedly accessible information stream which is protected by a symbol-correction code. EP-A-0,136,604 discloses an error correcting method using a product code and a flag scheme. The article "Errors-and-Erasures Decoding of Reed-Solomon Codes Using the Decoding Algorithm Beyond the BCH Bound" in The Transactions of the IEICE, Vol. E 73, No. 11, November 1990 discloses a Reed-Solomon decoder which is concerned with improving the correction capability for an odd number of erasures. US 4 675 869 discloses a Reed-Solomon encoder and decoder including a modulation and demodulation stage. During demodulation a flag bit is generated which acts as an indication of whether a symbol satisfies the modulation rules and therefore whether the symbol should be treated as reliable or unreliable. Syndrome symbols are formed subsequently, and these syndrome symbols are used by an erasure locator which provides a signal indicating the number of erasure symbols, as well as a flag indicating whether the permissible number of erasure symbols has been exceeded. A first set of syndrome symbols are used to determine the error positions, whereas the error or erasure values are determined from a second set of syndrome symbols. An object of the present invention is to provide a multiple error correcting method for correcting multiple erroneous symbols. Another object of the present invention is to provide a multiple error correcting method which can produce the error locations of three or more erroneous symbols and is easily performed in a Galois Field calculator in real time. According to the present invention, there is provided a multiple error correcting method for correcting erroneous symbols included in data encoded in accordance with an error correcting code and then modulated in accordance with a modulation code, comprising the steps of: demodulating the data in accordance with the modulation code and producing demodulated data with a demodulation flag indicating whether demodulation is possible; producing syndromes using a receiving word constituted by a plurality of said demodulated data based on said error correcting code; and generating the number of erroneous symbols included in said receiving word based on said syndromes, wherein the number of erasures included in said receiving. word is generated based on said demodulation flag; and wherein the method further comprises: determining the error form of the receiving word based on the number of erroneous symbols and the number of erasures wherein the error form may comprise one of a pure error form, a pure erasure form and a composite error form; and correcting the receiving word based on said error correcting code and said error form. In a preferred example of the multiple error correcting method, data is sequentially encoded by means of a second error correcting code and a first error correcting code, and the method comprises the steps of: producing first syndromes using a first receiving word constituted by a plurality of said demodulated symbols in accordance with said first error correcting code; determining the first error form of the first receiving word based on said first syndromes and demodulation flags therein; first error-correcting for correcting the first receiving word based on said first error correcting code and the first error form, and then producing a decoded data including a plurality of error corrected symbols and error flags thereof indicating whether the symbol is correct; producing second syndromes using a second receiving word including a plurality of said error corrected symbols in accordance with said second error correcting code; determining the second error form of the second receiving word based on said second syndromes and said error flags therein; and second-error-correcting for correcting the second receiving word based on said second error correcting code and the second error form. In another preferred example data is encoded based on a Reed-Solomon code capable of correcting t -multiple erroneous symbols, and the method comprises the steps of: producing syndromes (S 0 , S 1 ,...S 2 t -1 ) in accordance with the equation S k = r(α k+1 ) wherein k is a whole number less than or equal to 2 t - 1, (r(x) represents a receiving polynomial constituted by said data, and α represents the primitive polynomial of said Reed-Solomon code; generating the number of erroneous symbols included in the data based on said syndrome; producing coefficients (σ 1 , σ 2 ..., σ v ) of an error location polynomial (σ v + σ v-1 x+σ v-2 x 2 + ... +x v ) in accordance with the following equation provided the number of said erroneous symbols (v) is less than or equal to t ; producing an index in based on said coefficients (σ 1 , σ 2 ..., σ v ); reading out virtual roots from a specified memory using said index; transforming said virtual roots into error locations (x j1 , x j2 ..., x jv ) based on a specified relationship; producing error values in accordance with the following equation wherein j is a natural number less than or equal to v, the value of Ω(x) satisfies the equation Ω(x) = σ v + (σ v S 0 +σ v-1 )x + (σ v S 1 +σ v-1 S 0 +σ v-2 )x 2 + ... + (σ v S v-1 +σ v-1 S v-2 + ... +1)x v and e 1 through e v represent error values: and transforming said data into an error corrected data based on said error locations and error values. Examples of the present invention will now be described in detail with reference to the accompanying drawings, in which: Fig. 1 is a schematic diagram of the digital audio recording system. Fig. 2 is a flowchart which illustrates the operation of the error-correcting encoder shown in Fig. 1. Fig. 3 illustrates memory map of the C1/C2 cross interleave product code. Fig. 4 is a flow chart illustrating the multiple error correcting method according to an embodiment of the present invention. Fig.5 is a flowchart for explaining step 403 shown in Fig.4, under the constraint of the error correcting code being a Reed-Solomon code. Fig.6 is for explaining the step 502 shown in Fig.5. Fig.7 is for explaining the step 503 shown in Fig.5, provided that the error form is pure error form in which the receiving polynomial includes only erroneous symbols whose locations are not known. Fig.8 is for explaining step 503 shown in Fig.5, provided that the error form is that for a pure erasure in which the receiving polynomial includes only erroneous symbols whose locations are known. Fig.9 is for explaining step 503 shown in Fig.5, provided that the error form is that for a composite error in which the receiving polynomial includes both pure errors and erasures; Fig.10 is a flowchart for illustrating the multiple error correcting method according to another embodiment of the present invention; Fig. 11 is for explaining the method of producing error locations according to an embodiment of the present invention, and Fig.12 is for explaining the method of producing error locations of a third-order error location polynomial. Fig.1 is a schematic diagram of the digital audio recording system. The digital audio recording system includes an analog-to-digital converter 101, a source encoder 102, an error-correcting encoder 103, a modulator 104, a signal encoder 105 and a recording medium 106. An audio signal is converted into digital data through analog-to-digital converter 101. This digital data is applied to source encoder 102, to be compressed in accordance with a specified algorithm. The compressed data is applied to error-correcting encoder 103, whereby it is encoded in accordance with an error code scheme such as C1/C2 cross interleave product code. Modulator 104 receives the output of error-correcting encoder 103 and then modulates the output based on a modulation code such as an EFM or ETM code. Modulation code is also called run-length limited code, which constrains a run-length of 1 and/or 0 in binary sequence to a predetermined number. The EFM transforms 8-bit data into 14-bit data with run-length constraints, and the ETM transforms 8-bit data into 10-bit data with run-length constraints. Binary information supplied from modulator 104 is recorded on recording medium 106 such as magnetic tape and magnetic disk in the form of a coded binary waveform. This coded binary waveform includes a non-return-to-zero (NRZ) coded waveform and a modified non-return-to-zero (NRZI) coded waveform. In the NRZ coding, a logic "1" and a logic "0" of the binary data can be identified by the positive-going and negative-going transitions of the waveform, respectively. In NRZI coding, a logic "1" and a logic "0" of the binary data may be represented by the presence and absence of transition in the binary waveform, respectively. Signal encoder 105 performs such signal encoding as NRZ coding or NRZI coding. Fig.2 is a flowchart which illustrates the operation of the error-correcting encoder shown in Fig.1. In step 201, C2 coding is performed, which is for encoding the data supplied from source encoder 102 in accordance with a second Reed-Solomon code capable of correcting double errors to produce C2 code words which include a plurality of symbols. The plurality of symbols included in the C2 code words are then interleaved in predetermined order in step 202. In step 203, C1 encoding is performed, which is for encoding the interleaved data in accordance with a first Reed-Solomon code capable of correcting triple errors. Fig.3 illustrates memory map of the C1/C2 cross interleave product code, wherein the symbols arranged horizontally constitute a second code word concerning the C2 code and the symbols arranged vertically constitute a first code word concerning the C1 code. The C2 code is a Reed-Solomon code as denoted by RS(32,26,7) which is capable of correcting triple erroneous symbols and the C1 code is a Reed-Solomon code as denoted by RS(24,20,5) which is capable of correcting double erroneous symbols. As shown in Fig.3, each C1 code word includes 24 symbols and each C2 code word includes 32 symbols. In more detail, each C1 code words include 20 information symbols and four parity symbols (called P parity symbols), and each C2 code word includes 26 information symbols and six parity symbols (called Q parity symbols). Here, C2 coding generates the Q parity symbols which, together with the information symbols for the C2 code words, constitute the information symbols for a C1 code word. Meanwhile, the P parity symbols are generated in C1 coding. Each symbol is comprised of 8-bits. In the memory map, D #,# denotes the symbols included in the data supplied from source encoder 102, P #,# denotes P parity symbols, and Q #,# denotes Q parity symbols. Fig.4 is a flowchart illustrating the multiple error correcting method according to an embodiment of the present invention. Referring to Fig.4, in step 401, the data made by encoding based on an error correcting code and then modulating in accordance with a modulation code, is first demodulated based on the modulation code. For example, 14-bit data is demodulated into 8-bit data in accordance with EFM demodulation, while 10-bit data is demodulated into 8-bit data accordance with ETM demodulation. Here, if the 14-bit data (to be demodulated via EFM) or the 10-bit data (to be demodulated via ETM) includes an unallowable pattern, the demodulated 8-bit data (i.e., a demodulated symbol) can be set as a special bit pattern (e.g., "00000000" or "11111111"). In step 402, demodulation flags are produced, which signify whether or not the demodulation of each symbol is possible. Accordingly, after step 402, each symbol has one bit beyond the basic eight, which acts as a demodulation flag. The demodulation flag bit may be set to "1" in the case of demodulation being impossible and to "0" in the case of demodulation being possible. In step 403, the demodulated data is decoded using the demodulation flag of each symbol in accordance with the error correcting code. The demodulation flag plays an important role in producing the error location of an error location polynomial. Fig.5 is a flowchart for explaining step 403 shown in Fig.4, under the constraint of the error correcting code being a Reed-Solomon code. Referring to Fig.5, syndromes are produced based on the error correcting code and the demodulated 8-bit data. In more detail, syndromes (S k ) are produced in accordance with the formula S k = r(α k+1 ) wherein k is a whole number, α is a primitive polynomial of the Reed-Solomon code in Galois Field GF(2 8 ), and r(x) represents a receiving polynomial made of a plurality of demodulated symbols. For example, the receiving polynomial is 24 symbols if the Reed-Solomon code is a RS(24,20,5), and the receiving polynomial is 32 symbols if the Reed-Solomon code is a RS(32.26,7). The number of syndromes is 4 t or more, provided that the Reed-Solomon code is for correcting t errors, because the total number of erroneous symbols is 2 t . Here, the erroneous symbols includes errors and erasures. In step 502, the error form of the receiving polynomial is determined based on the numbers of syndromes and erasures, erasure being representative of symbols having a demodulation flag of "1." Step 503 is for producing error locations of the error location polynomial, using the demodulation flag. Error locations represent the location of the erroneous symbols in the receiving polynomial. Accordingly, if the nth symbol in the receiving polynomial has the demodulation flag set to "1," the error location is "n." Step 504 is for producing error values using the error locations based on the Reed-Solomon code, and step 505 is for correcting the receiving polynomial in accordance with the error locations and the error values. That is, by letting the error values be e 1 , e 2 ..., e v , and the error presumption polynomial Ω(x) be σ v + (σ v S 0 +σ v-1 )x + (σ v S 1 +σ v-1 S 0 +σ v-2 )x 2 + ... + (σ v S v-1 +σ v-1 S v-2 +...+1)x v , the error values are produced in accordance with the following: Then, the correcting of the receiving polynomial is performed based on the following: c(x) = r(x) + e(x) wherein e(x) satisfies the equation e(x) = e 1 x j1 + e 2 x j2 + ... + e v x jv c(x) represents the corrected polynomial or the corrected word, and r(x) represents the receiving polynomial or the receiving word. Fig.6 is for explaining the step 502 shown in Fig.5. Referring to Fig.6, step 601 is for producing the number of erasures by counting the number of symbols having their corresponding demodulation flags set to "1" in a receiving polynomial. In step 602, the number of erroneous symbols included in the receiving polynomial is produced in accordance with the syndromes. To determine the number of erroneous symbols, a matrix M is used, and is expressed where v is a variable of 2 t +1, 2 t , 2 t -1..., 1. Among values of the variable v, the maximum value which causes the determinant value of matrix M not to equal "0" (i.e., det[M]≠0), is the number of erroneous symbols in the receiving polynomial. Here, if the maximum value or the number of erroneous symbols is 2 t +1, error correction is not possible. Step 603 is for determining whether or not the number of erroneous symbols N is more than 2 t , provided that the Reed-Solomon code is capable of correcting t multiple errors. If the number of erroneous symbols N is more than 2 t , the error form is determined to be an "uncorrectable" error form in step 609. In step 604, the number of pure errors N error is produced by subtracting the number of erasures (N erasure ) from the number of erroneous symbols N. Here, the pure error is an erroneous symbol whose location is not known. Step 605 is for determining whether or not the number of pure errors (N error ) is more than t , provided that the Reed-Solomon code is capable of correcting t multiple errors. If the number of pure errors N error is greater than t , the error form is determined to be the uncorrectable error form in step 609. Step 606 is for determining whether or not the number of erroneous symbols N is zero. If the number of erroneous symbols is zero, the error form is determined to be a "no error" form in step 610. In step 607, it is determined whether or not the number of pure errors N error is zero, and if so, the error form is determined to be a pure erasure form in step 611. In step 608, it is determined whether the number of erasures N erasure is zero. If the number of erasures N erasure is zero, the error form is determined to be a "pure error" form in step 612, if not, the error form is determined to be a "composite" error form in step 613. The composite error form is for the receiving polynomial including at least one pure error and at least one erasure. Fig.7 is for explaining the step 503 shown in Fig.5, provided that the error form is pure error form in which the receiving polynomial includes only erroneous symbols whose locations are not known. Referring to Fig.7, step 701 is for producing the coefficients of a vth- order error location polynomial σ(x). Here, the order value v is equal to the number of erroneous symbols and, in more detail, equals the number of pure errors. The error location polynomial of the vth order can be represented σ(x) = x v + σ1x v-1 + ... + σ v-1 x + σ v where σ1 through σ v are coefficients. The coefficients of error location polynomial are produced as follows: For example, if v is two (2nd order), the error location polynomial can be represented by σ(x)=x 2 +σ 1 x+σ 2 . The coefficients σ 1 and σ 2 of this error location polynomial are produced by using the following equations. σ 1 = S 3 S 0 +S 1 S 2 S 2 1 +S 2 S 0 σ 2 = S 2 2 +S 1 S 3 S 2 1 +S 2 S 0 Step 702 is for producing the error locations which are the roots of the error location polynomial of vth order. With regard to obtaining the roots of an equation such as error location polynomial, the higher the order of the equation is, the more difficult producing the roots thereof is. Ordinarily, fifth- order equations and higher are, in many cases, unsolvable. However, in the Galois Field for Reed-Solomon code, the roots can be theoretically obtained, because the roots are the elements included in the Galois Field which includes a finite number of elements. That is, the roots are produced by substituting all elements included in the Galois Field for x in the error location polynomial and then seeking the element which satisfies the equation. However, the roots of an equation have to be obtained in more efficient manner, when under the constraints of real-time processing and considering hardware realization. The algorithms related thereto are disclosed in the embodiments of the prior art, but are insufficient for triple error correction and higher. The present invention aims to provide a method for efficiently producing the error locations of the error location polynomial, particularly for triple-error-corrections. This method will be explained in reference with Fig.11. Fig.8 is for explaining step 503 shown in Fig.5, provided that the error form is that for a pure erasure in which the receiving polynomial includes only erroneous symbols whose locations are known, Referring to Fig.8, in step 801, the error locations are produced by the position of erasures being substituted for the error locations x j1 , x j2 ..., x jv , where "v" is the number of erroneous symbols or erasures. Step 802 is for producing the coefficients of the error location polynomial σ(x), that is, σ v + σ v-1 x + σ v-2 x 2 + ... + x v . Here, "x" of the error location polynomial is substituted by the error locations x j1 -x jv , thereby v simultaneous equations are composed. The solutions of v simultaneous equations are coefficients of the error location polynomial. Accordingly, coefficients are produced in accordance with the error locations. Fig.9 is for explaining step 503 shown in Fig.5, provided that the error form is that for a composite error in which the receiving polynomial includes both pure errors and erasures. Referring to Fig.9, Step 901 is for producing coefficients of error location polynomial σ(x), that is, x v + σ 1 x v-1 + ... σ v-1 x + σ v where "v" is the number of erroneous symbols or the sum of N error and N erasure . The coefficients σ 1 through σ v are produced in accordance with the above Equation 2. In step 902, N erasure error locations are substituted by the positions of erasures in the receiving polynomial. Step 903 is for producing N error error locations in accordance with the relationship of the error locations and the coefficients, or the relationship of the roots and the coefficients of an equation. A more detailed description related to step 903 is referenced in U.S.P 4,476,562 by Sony. Fig.10 is a flowchart for illustrating the multiple error correcting method according to another embodiment of the present invention. Referring to Fig.10, in step 1001, the data made by sequentially encoding based on a second error correcting code and a first error correcting code and then modulating in accordance with a modulation code, is first demodulated based on the modulation code. (This step is the same as step 401 of Fig.4.) In step 1002, the demodulation flags are produced, which signifies whether or not the demodulation of each symbol is possible. Step 1003 is for decoding a first receiving polynomial based on the first error correcting code such as Reed-Solomon code RS(24,20,5) which is capable of correcting double errors. Here, the first receiving polynomial includes a plurality of demodulated symbols (e.g., 24 symbols), provided that the first Reed-Solomon code is RS(24,20,5). Also, step 1003 is for producing error flags indicating whether or not each symbol has been corrected. (Decoding the first receiving polynomial in step 1003 can be explained by Fig.5 through Fig.9.) In step 1004. the decoded symbols is deinterleaved in accordance with a predetermined order which is the inverse of the interleaving order. Step 1005 is for decoding a second receiving polynomial based on the second error correcting code such as Reed-Solomon code RS(32,26,7) which is capable of correcting triple errors. The second receiving polynomial is composed of a plurality of decoded symbols (e.g., 32 symbols) of step 1003, provided that the second error correcting code is RS(32,26,7). (Step 1005 can be also explained by Figs.5-9.) Fig. 11 is for explaining the method of producing error locations according to an embodiment of the present invention. Referring to Fig.11, step 1101 is for producing an index  using coefficients of the error location polynomial. In step 1102, virtual roots are read out from a specified memory related to the index . The specified memory is also called a look-up table (LUT) which includes a plurality of roots with regard to a predetermined equation such as Z 3 +Z+=0. Step 1103 is for transforming the virtual roots into error locations in accordance with a predetermined relationship. Hereinafter, characteristics of a higher-order equation and the solutions thereof will described. The general forms of third-order (or higher) equations are expressed as follows: 3rd order: f(x) = x 3 + cx 2 + bx + a 4th order: f(x) = x 4 + dx 3 + cx 2 + bx + a 5th order: f(x) = x 5 + ex 4 + dx 3 + cx 2 + bx + a and so on. In the above equations, once the coefficients are determined, the roots thereof can be obtained because the roots are the elements of a finite field such as GF(2 8 ). That is, all elements included in the finite field are sequentially substituted for the x value, and thus the element satisfying the equation is detected. This method, however, requires too much time, so as to make it impractical. Another method for producing the roots is performed by a large LUT which stores the roots themselves. The roots included in the large LUT are calculated in a preprocessing state, and addresses of the large LUT have a one-to-one correspondence with the coefficients of the equation. Accordingly, the large LUT uses up too much memory, thereby rendering it also impractical. Here, let us consider the third order equation. The above third order equation can be rewritten as f(Z) = Z 3 + Z +  = 0. First, substituting the term mZ+n for the variable x in the equation x 3 +cx 2 +bx+a=0, gives us the equation (mZ+n) 3 + c(Z+m) 2 + b(mZ+n) + a = 0 which develops into (m 3 Z 3 +3m 2 Z 2 n+3mZn 2 +n 3 ) + c(m 2 Z 2 +2mZn+n 2 ) +b(mZ+n) + a = 0 By grouping similar terms of the above equation, the resulting equation can be expressed Z 3 (m 3 ) + Z 2 (3m 2 n+cm 2 ) + Z(3mn 2 +2cmn+bm) + (n 3 +cn 2 +bn+a) = 0 Then, dividing the equation by m 3 , in order to make the coefficient of the highest term (Z 3 ) equal unity, results in the equation Here, comparing the coefficients of the equation with those of equation Z 3 +Z+=0 shows that 3m 2 n+cm 2 =0 and 3mn 2 +2cmn+bm=m 3 . At this moment, the above step of calculating the solution of the aforementioned polynomial is executed on the finite field, that is GF(q), so that the above equations can be equivalently transformed into m 2 n + cm 2 = m 2 (n+c) = 0 and mn 2 + bm = m 3 Therefore, in terms of a, b and c, the above variable m is equal to (c 2 +b) ½ and the above variable n is equal to c. Likewise,  can be expressed as follows:  = n 3 +cn 2 +bn+a m 3 = bc+a c 2 +b 3/2 The roots Z 1 , Z 2 and Z 3 satisfying the equation f(Z)=Z 3 +Z+=0, according to possible values of , are obtained by the preprocessing step, to be stored in the ROM table (or LUT). Thereafter, only the address or index  are designated by the processing step. Fig.12 is for explaining the method of producing error locations of a third-order error location polynomial. Referring to Fig.12, step 1201 is for producing an index  in accordance with the following:  = k 2 k 1 3/2 wherein k 1 =(σ 1 2 +σ 2 ) 3/2 , k 2 =σ 1 σ 2 +σ 3 , and σ 1 , σ 2 and σ 3 represent coefficients of the error location polynomial with 3 order. Step 1202 is for reading out virtual roots Z 1 , Z 2 and Z 3 from the specified memory which stores the roots of the equation f(Z)=Z 3 +Z+=0. In step 1203, virtual roots Z 1 , Z 2 and Z 3 are transformed into error locations X j1 , X j2 and X j3 in accordance with the following: x j1 = Z 1 k 1 1/2 +σ 1 x j2 = Z 2 k 1 1/2 +σ 1 x j3 = Z 3 k 1 1/2 +σ 1 The triple error correcting method above described will be explained with reference to a detailed example. Assume that the code word c(x)=0 from encoding by means of RS(36,26,7) is recorded onto, and then reproduced from, a predetermined recording medium. Thus, the receiving polynomial becomes r(x) = α 3 x 5 + α 15 x 12 + α 21 x 17 Here, since the error polynomial e(x) becomes c(x)+r(x), then e(x) = α 3 x 5 + α 15 x 12 + α 21 x 17 wherein α 3 , α 15 and α 21 conform to the error values e 1 , e 2 , and e 3 , respectively, and x 5 , x 12 and x 17 conform to the error locations x j1 , x j2 and x j3 , respectively. In an RS decoder which receives the receiving polynomial, six syndromes S 0 -S5 are produced based on the receiving polynomial. These are: Then, three coefficients σ 1 , σ 2 and σ 3 are produced in accordance with the above syndromes, with the following results. σ 1 = α 21 σ 2 = α 139 σ 3 = α 34 After obtaining the coefficients of the error location polynomial, an index  is produced for accessing the specified memory (ROM table or LUT) according to the following:  = k 2 k 3/2 1 = σ 1 σ 2 +σ 3 σ 2 1 +σ 2 3/2 = α 51 and k 1 = σ 2 1 +σ 2 = α 232 k 2 = σ 1 σ 2 +σ 3 = α 144 The virtual roots are read out from a specified memory with reference to index  (α 51 ). The virtual roots are Z 1 = α 1 Z 2 = α 16 Z 3 = α 34 These virtual roots are transformed into error locations, with following results. x j1 = α 1 α 232 1/2 + α 21 = α 17 x j2 = α 16 α 232 1/2 + α 21 = α 12 x j3 = α 34 α 232 1/2 + α 21 = α 5 Then, the error values are produced in accordance with the thus produced error locations, whereby the error polynomial is composed and the receiving polynomial is corrected. Table 1, which follows, shows the ROM table used in the triple error correcting, where the index  corresponds to an address of the ROM and Z 1 ,Z 2 and Z 3 are the roots of the equation f(Z)=Z 3 +Z+ stored in the ROM. Moreover, in each element, the superscripted alpha value (α ### ) on the left is an exponential presentation thereof, and the hexadecimal data on the right is an binary presentation thereof. index root1 root2 root3 α 000 =01 α 001 =02 α 002 =04 α 003 =08 α 125 =33 α 004 =10 α 005 =20 α 184 =95 α 006 =40 α 250 =6c α 007 =80 α 008 =1d α 009 =3a α 010 =74 α 113 =1f α 011 =e8 α 012 =cd α 012 =cd α 245 =e9 α 013 =87 α 130 =2e α 014 =13 α 015 =26 α 149 =a4 α 016 =4c α 017 =98 α 051 =0a α 058 =69 α 163 =63 α 018 =2d α 019 =5a α 020 =b4 α 226 =48 α 021 =75 α 240 =2c α 022 =ea α 024 =8f α 023 =c9 α 077 =3c α 024 =8f α 235 =eb α 025 =03 α 074 =89 α 026 =06 α 005 =20 α 027 =0c α 025 =03 α 028 =18 α 029 =30 α 030 =60 α 043 =77 α 031 =c0 α 032 =9d α 033 =27 α 034 =4e α 071 =bc α 102 =44 α 116 =f8 α 035 =9c α 073 =ca α 036 =25 α 037 =4a α 162 =bf α 038 =94 α 039 =35 α 040 =6a α 197 =8d α 041 =d4 α 021 =75 α 042 =b5 α 225 =24 α 043 =77 α 211 =b2 α 044 =ee α 048 =46 α 045 =c1 α 046 =9f α 154 =39 α 047 =23 α 076 =1e α 227 =90 α 254 =8e α 048 =46 α 215 =ef α 049 =8c α 050 =05 α 148 =52 α 051 =0a α 001 =02 α 016 =4c α 034 =4e α 052 =14 α 010 =74 α 053 =28 α 186 =6e α 054 =50 α 050 =05 α 055 =a0 α 056 =5d α 057 =ba α 058 =69 α 059 =d2 α 060 =b9 α 086 =b1 α 061 =6f α 208 =51 α 062 =de α 063 =a1 α 033 =27 α 056 =5d α 229 =7a α 064 =5f α 065 =be α 046 =9f α 066 =61 α 067 =c2 α 160 =e6 α 068 =99 α 142 =2a α 204 =dd α 232 =f7 α 069 =2f α 060 =b9 α 070 =5e α 146 =9a α 071 =bc α 072 =65 α 073 =ca α 168 =fc α 074 =89 α 069 =2f α 075 =0f α 076 =1e α 077 =3c α 174 =f1 α 078 =78 α 079 =f0 α 052 =14 α 080 =fd α 139 =42 α 081 =e7 α 015 =26 α 082 =d3 α 042 =b5 α 083 =bb α 171 =b3 α 084 =6b α 195 =64 α 085 =d6 α 170 =d7 α 187 =dc α 238 =0b α 086 =b1 α 167 =7e α 087 =7f α 219 =56 α 088 =fe α 096 =d9 α 089 =e1 α 158 =b7 α 090 =df α 091 =a3 α 105 =1a α 115 =7c α 126 =66 α 092 =5b α 053 =28 α 093 =b6 α 111 =ce α 094 =71 α 152 =49 α 199 =0e α 253 =47 α 095 =e2 α 216 =c3 α 096 =d9 α 175 =ff α 097 =af α 129 =17 α 098 =43 α 099 =86 α 035 =9c α 100 =11 α 041 =d4 α 101 =22 α 122 =ec α 102 =44 α 002 =04 α 032 =9d α 068 =99 α 103 =88 α 104 =0d α 020 =b4 α 105 =1a α 106 =34 α 117 =ed α 107 =68 α 045 =c1 α 110 =67 α 207 =a6 α 108 =d0 α 100 =11 α 109 =bd α 165 =91 α 205 =a7 α 249 =36 α 110 =67 α 111 =ce α 176 =e3 α 112 =81 α 113 =1f α 212 =79 α 114 =3e α 115 =7c α 116 =f8 α 117 =ed α 189 =57 α 118 =c7 α 119 =93 α 120 =3b α 172 =7b α 121 =76 α 031 =c0 α 098 =43 α 247 =83 α 122 =ec α 161 =d1 α 123 =c5 α 133 =6d α 124 =97 α 125 =33 α 099 =86 α 126 =66 α 066 =61 α 112 =81 α 203 =e0 α 127 =cc α 173 =f6 α 228 =3d α 236 =cb α 128 =85 α 129 =17 α 190 =ae α 130 =2e α 092 =5b α 131 =5c α 132 =b8 α 133 =6d α 006 =40 α 134 =da α 065 =be α 135 =a9 α 202 =70 α 136 =4f α 029 =30 α 153 =92 α 209 =a2 α 137 =9e α 138 =21 α 120 =3b α 139 =42 α 166 =3f α 140 =84 α 037 =4a α 141 =15 α 140 =84 α 142 =2a α 143 =54 α 144 =a8 α 145 =4d α 164 =c6 α 146 =9a α 081 =e7 α 147 =29 α 148 =52 α 138 =21 α 149 =a4 α 233 =f3 α 150 =55 α 151 =aa α 038 =94 α 127 =cc α 241 =58 α 152 =49 α 153 =92 α 008 =1d α 017 =98 α 128 =85 α 154 =39 α 093 =b6 α 155 =72 α 156 =e4 α 157 =d5 α 158 =b7 α 104 =0d α 159 =73 α 028 =18 α 144 =a8 α 242 =b0 α 160 =e6 α 023 =c9 α 161 =d1 α 080 =fd α 162 =bf α 030 =60 α 163 =63 α 164 =c6 α 084 =6b α 165 =91 α 166 =3f α 087 =7f α 167 =7e α 026 =06 α 168 =fc α 135 =a9 α 169 =e5 α 213 =f2 α 170 =d7 α 085 =d6 α 119 =93 α 221 =45 α 171 =b3 α 237 =8b α 172 =7b α 079 =f0 α 173 =f6 α 063 =a1 α 180 =96 α 185 =37 α 174 =f1 α 184 =c4 α 175 =ff α 108 =d0 α 176 =e3 α 192 =82 α 177 =db α 145 =4d α 178 =ab α 161 =6f α 179 =4b α 180 =96 α 181 =31 α 055 =a0 α 150 =55 α 231 =f5 α 182 =62 α 210 =59 α 230 =f4 α 252 =ad α 183 =c4 α 088 =fe α 184 =95 α 106 =34 α 185 =37 α 186 =6e α 222 =8a α 187 =dc α 188 =a5 α 049 =8c α 143 =54 α 251 =d8 α 189 =57 α 194 =32 α 190 =ae α 177 =db α 191 =41 α 114 =3e α 118 =c7 α 214 =f9 α 192 =82 α 095 =e2 α 193 =19 α 194 =32 α 003 =08 α 195 =64 α 101 =22 α 196 =c8 α 197 =8d α 083 =bb α 198 =07 α 070 =5e α 199 =0e α 200 =1c α 082 =d3 α 201 =38 α 202 =70 α 244 =fa α 203 =e0 α 019 =5a α 191 =41 α 248 =1b α 204 =dd α 004 =10 α 064 =5f α 136 =4f α 205 =a7 α 206 =53 α 207 =a6 α 014 =13 α 072 =65 α 121 =76 α 208 =51 α 040 =6a α 209 =a2 α 210 =59 α 211 =b2 α 013 =87 α 212 =79 α 234 =fb α 213 =f2 α 246 =cf α 214 =f9 α 090 =df α 159 =73 α 220 =ac α 215 =ef α 054 =50 α 216 =c3 α 200 =1c α 217 =9b α 218 =2b α 075 =0f α 155 =72 α 243 =7d α 219 =56 α 044 =ee α 220 =ac α 221 =45 α 222 =8a α 097 =af α 223 =09 α 057 =ba α 059 =d2 α 107 =68 α 224 =12 α 225 =24 α 178 =ab α 226 =48 α 169 =e5 α 227 =90 α 228 =3d α 229 =7a α 124 =97 α 137 =9e α 223 =09 α 230 =f4 α 231 =f5 α 007 =80 α 036 =25 α 188 =a5 α 232 =f7 α 233 =f3 α 134 =da α 234 =fb α 123 =c5 α 235 =eb α 027 =0c α 236 =cb α 237 =8b α 022 =ea α 238 =0b α 239 =16 α 156 =e4 α 157 =d5 α 181 =31 a 240 =2c α 089 =e1 α 241 =58 α 242 =b0 α 062 =de α 196 =c8 α 239 =16 α 243 =7d α 018 =2d α 094 =71 α 131 =5c α 244 =fa α 067 =c2 α 245 =e9 α 141 =15 α 246 =cf α 011 =e8 α 247 =83 α 078 =78 α 206 =53 α 218 =2b α 248 =1b α 249 =36 α 009 =3a α 047 =23 α 193 =19 α 250 =6c α 198 =07 α 251 =d8 α 039 =35 α 103 =88 α 109 =bd α 252 =ad α 132 =b8 α 151 =aa α 224 =12 α 253 =47 α 147 =29 α 179 =4b α 182 =62 α 254 =8e α 091 =a3 α 201 =38 α 217 =9b As mentioned above, the present invention enables multiple erroneous symbols to be corrected and enables the realization of real-time processing of triple error correction with a memory of practical size. While the present invention has been particularly shown and described with reference to particular embodiments thereof. it will be understood by those skilled in the art that various changes in form and details may be effected therein without departing from the scope of the invention.

Claims: A multiple error correcting method for correcting erroneous symbols included in data encoded by means of an error correcting code and then modulated in accordance with a modulation code, comprising the steps of: demodulating the data in accordance with the modulation code and producing demodulated data with a demodulation flag indicating whether demodulation is possible; producing syndromes using a receiving word constituted by a plurality of said demodulated data based on said error correcting code; and generating the number of erroneous symbols included in said receiving word based on said syndromes, characterised in that the number of erasures included in said receiving word is generated based on said demodulation flag, and wherein the method further comprises: determining the error form of the receiving word based on the number of erroneous symbols and the number of erasures wherein the error form may comprise one of a pure error form, a pure erasure form and a composite error form; and correcting the receiving word based on said error correcting code and said error form. A multiple error correcting method as claimed in claim 1, wherein said error correcting code is a Reed-Solomon code capable of correcting t -multiple erroneous symbols. A multiple error correcting method as claimed in claim 2, wherein said step for producing syndromes is for producing the syndromes (S k ) using the equation S k = r(α k+1 ) wherein k is a whole number less than or equal to 4 t -1, r(x) corresponds to the receiving word, and α is a primitive polynomial based on said Reed-Solomon code. A multiple error correcting method as claimed in claim 2 or 3 wherein said step for determining the error form comprises the steps of: classifying into an uncorrectable error form when N error is greater than t or when N error plus N erasure is greater than 2 t : classifying into a pure error form when N erasure is equal to zero and N error is not equal to zero, the pure error form having at least one erroneous symbol whose location is not known; classifying into a pure erasure form when N erasure is not equal to zero and N error is equal to zero, the pure erasure form having at least one erasure; and classifying into a composite error form when N erasure is not equal to zero and N error is not equal to zero, the composite error form having at least one erroneous symbol whose location is not known and at least one erasure, wherein N error denotes the number of erroneous symbols whose locations are not known, and N erasure denotes the number of erasures. A multiple error correcting method as claimed in any of claims 2 to 4 wherein said step for correcting the receiving word comprises the steps of: producing coefficients of an error location polynomial using said syndromes, the degree of the error location polynomial being the number of said erroneous symbols; producing the roots of said error location polynomial using the syndromes and/or the locations of said erasures in accordance with the error form in order to produce error-locations; producing error values related to said error locations using the syndromes and said error locations based on said Reed-Solomon code; and converting said receiving word based on said error locations and error values. A multiple error correcting method as claimed in claim 5, wherein said step of producing the roots of error location polynomial comprises the steps of: producing an index using said coefficients of the error location polynomial; reading out virtual roots of the error location polynomial from a specified memory using said index; and transforming said virtual roots into real roots of the error location polynomial in accordance with a predetermined relationship. A multiple error correcting method as claimed in any preceding claim, wherein said modulation code is an eight-to-fourteen modulation code. A multiple error correcting method as claimed in any of claims 1 to 6 wherein said modulation code is an eight-to-ten modulation code. A multiple error correcting method as claimed in claim 1 in which the data is sequentially encoded by means of a second error correcting code and a first error correcting code, comprising the steps of: producing first syndromes using a first receiving word constituted by a plurality of said demodulated symbols in accordance with said first error correcting code; determining the first error form of the first receiving word based on said first syndromes and demodulation flags therein; first error-correcting for correcting the first receiving word based on said first error correcting code and the first error form, and then producing a decoded data including a plurality of error corrected symbols and error flags thereof indicating whether the symbol is correct; producing second syndromes using a second receiving word including a plurality of said error corrected symbols in accordance with said second error correcting code; determining the second error form of the second receiving word based on said second syndromes and said error flags therein: and second-error-correcting for correcting the second receiving word based on said second error correcting code and the second error form. A multiple error correcting method as claimed in claim 9, wherein said demodulation code is an eight-to-fourteen modulation code. A multiple error correcting method as claimed in claim 9, wherein said demodulation code is an eight-to-ten modulation code. A multiple error correcting method as claimed in any of claims 9 to 11 wherein said first error correcting code is a first Reed-Solomon code capable of correcting t 1 -multiple erroneous symbols and said second error correcting code is a second Reed-Solomon code capable of correcting t 2 -multiple erroneous symbols. A multiple error correcting method as claimed in claim 12, wherein said step of producing said first syndromes is for producing the syndromes (S k ) using the equation S k = r(α k+1 ) wherein k is a whole number less than or equal to 4 t 1 -1. r(x) corresponds to the first receiving word, and α is a primitive polynomial based on said first Reed-Solomon code. A multiple error correcting method as claimed in claim 12 or 13 wherein said step of producing said second syndromes is for producing the syndromes (S k ) using the equation S k = r(α k+1 ) wherein k is a whole number less than or equal to 4 t 2 -1, r(x) corresponds to the second receiving word, and α is a primitive polynomial based on said second Reed-Solomon code. A multiple error correcting method as claimed in any of claims 12 to 14 wherein said step for determining the first error form comprises the steps of: classifying into an uncorrectable error form when Nerror_1 is greater than t 1 or when N error_1 plus N erasure_1 is greater than 2 t 1 : classifying into a pure error form when N erasure_1 is equal to zero and N error_1 is not equal to zero, the pure error form having at least one erroneous symbol whose location is not known; classifying into a pure erasure form when N erasure_1 is not equal to zero and N error_1 is equal to zero, the pure erasure form having at least one erasure; and classifying into a composite error form when N erasure_1 is not equal to zero and N error_1 is not equal to zero, the composite error form having at least one erroneous symbol whose location is not known and at least one erasure, wherein N error_1 denotes the number of erroneous symbols whose locations are not known and is included in the first receiving word, and N erasure_1 denotes the number of erasures included in the first receiving word. A multiple error correcting method as claimed in any of claims 12 to 15 wherein said step for correcting the first receiving word comprises the steps of: producing coefficients of a first error location polynomial using said first syndromes, the degree of the first error location polynomial being the number of said erroneous symbols included in the first receiving word; producing first error locations using the first syndromes and/or the locations of said erasures included in the first receiving word in accordance with the first error form; producing the first error values using the first syndromes and said first error locations in accordance with said first Reed-Solomon code; and converting said first receiving word based on said first error locations and said first error values. A multiple error correcting method as claimed in claim 16, wherein said step of producing first error locations comprises the steps of: producing a first index using said coefficients of the first error location polynomial; reading out virtual roots of the first error location polynomial from a specified memory using said first index; and transforming said virtual roots into first error locations in accordance with a predetermined relationship. A multiple error correcting method as claimed in any of claims 12 to 17 wherein said step for determining the second error form comprises the steps of: classifying into an uncorrectable error form when N error_2 is greater than t 1 or when N error_2 plus N erasure_2 is greater than 2 t 2 ; classifying into a pure error form when N erasure_2 is equal to zero and N error_2 is not equal to zero, the pure error form having at least one erroneous symbol whose location is not known; classifying into a pure erasure form when N erasure_2 is not equal to zero and N error_2 is equal to zero, the pure erasure form having at least one erasure; and classifying into a composite error form when N erasure_2 is not equal to zero and N error_2 is not equal to zero, the composite error form having at least one erroneous symbol whose location is not known and at least one erasure, wherein N error_2 denotes the number of erroneous symbols whose locations are not known and included in the second receiving word, and N erasure_2 denotes the number of erasures included in the second receiving word. A multiple error correcting method as claimed in any of claims 12 to 18, wherein said step for correcting the second receiving word comprises the steps of: producing coefficients of a second error location polynomial using said second syndromes, the degree of the second error location polynomial being the number of said erroneous symbols included in the second receiving word; producing said second error locations using the second syndromes and/or the locations of said erasures included in the second receiving word in accordance with the second error form: producing second error values using the second syndromes and said second error location based on said second Reed-Solomon code; and converting said second receiving word based on said second error locations and second error values. A multiple error correcting method as claimed in claim 19, wherein said step of producing second error locations comprises the steps of: producing a second index using said coefficients of the second error location polynomial: reading out virtual roots of the second error location polynomial from a specified memory using said second index: and transforming said virtual roots into second error locations in accordance with a predetermined relationship. A multiple error correcting method as claimed in claim 1, in which data is encoded based on a Reed-Solomon code capable of correcting t -multiple erroneous symbols, comprising the steps of: producing syndromes (S 0 , S 1 ,..., S 2 t -1 ) in accordance with the equation S k = r(α k+1 ) wherein k is a whole number less than or equal to 2 t -1, r(x) represents a receiving polynomial constituted by said data, and α represents the primitive polynomial of said Reed-Solomon code: generating the number of erroneous symbols included in the data based on said syndrome: producing coefficients (σ 1 , σ 2 ..., σ v ) of an error location polynomial (σ v +σ v-1 x+σ v-2 x 2 + ... +x v ) in accordance with the following equation provided the number of said erroneous symbols (v) is less than or equal to t ; producing an index in based on said coefficients (σ 1 , σ 2 ,..., σ v ); reading out virtual roots from a specified memory using said index; transforming said virtual roots into error locations (x j1 , x j2 ..., x jv ) based on a specified relationship; producing error values in accordance with the following equation wherein j is a natural number less than or equal to v, the value of Ω(x) satisfies the equation Ω(x) = σ v + (σ v S 0 +σ v-1 )x + (σ v S 1 +σ v-1 S 0 +σ v-2 )x 2 + ... + (σ v S v-1 +σ v-1 S v-2 + ... +1)x v and e 1 through e v represent error values: and transforming said data into an error corrected data based on said error locations and error values. A multiple error correcting method as claimed in claim 21, wherein said value t is three. A multiple error corecting method as claimed in claim 22, wherein said step of producing an index is for producing the index  = k 2 k 1 3/2 provided that σ 1 , σ 2 and σ 3 represent said error locations, k 1 represents σ 1 2 +σ 2 and k 2 represents σ 1 σ 2 +σ 3 . A multiple error correcting method as claimed in any of claims 21 to 23, wherein said step of transforming said virtual roots (Z 1 , Z 2 and Z 3 ) into error locations (x j1 , x j2 and x j3 ) is accomplished according to x j1 = Z 1 (k 1 ) ½ +σ 1 x j2 = Z 2 (k 1 ) ½ +σ 1 x j3 = Z 3 (k 1 ) ½ +σ 1 wherein k 1 represents σ 1 2 +σ 2 and k 2 represents σ 1 σ 2 +σ 3 . A multiple error corecting method as claimed in any of claims 21 to 24, wherein said virtual roots stored in said specified memory are the root values of f(Z) = Z 3 +Z+ wherein  represents said index.

Inventors: JOO TAE-SHIK, LEE SEOK-JEONG, JOO, TAE-SHIK, LEE, SEOK-JEONG
Applicants: SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO., LTD.
Application year: 1993
Main classification: H03M13
IPC codes: G11B20, H03M13