Power calculation circuit

Abstract: A power multiplication circuit including a Hall element for generating between voltage output terminals thereof a first output voltage corresponding to a power of a system under measurement. The circuit further includes a voltage polarity detection circuit for detecting a polarity of a power source voltage of the system and an operating circuit connected to receive the first output voltage and the polarity for amplifying the first output voltage and for changing over between amplified first output voltage and an inverted voltage of the amplified first output voltage to generate a second output voltage in accordance with the polarity. The circuit also includes an integrating amplifier circuit for integrating the second output voltage to generate an integrated signal and a variable resistance element connected between one of the voltage output terminals of the Hall element and ground, and connected to receive the integrated signal. The resistance thereof is changed by the integrated signal so that an offset voltage of the Hall element is reduced to zero.

Description: BACKGROUND OF THE INVENTION Field of the Invention This invention relates to a power calculation circuit using a Hall element (hereafter referred to as a "power multiplication circuit") and more particularly to a power multiplication circuit used in, such as a power meter or a watt hour meter, wherein the offset compensation means of the Hall element is improved. Detailed Description of the Related Art In general, power multiplication circuits of this type are widely used as power multiplication circuits of power meters and/or watt hour meters on account of their uncomplicated construction and small size. Such a conventional power multiplication circuit will now be described with reference to Fig. 4. The power source voltage of a system under measurement is input at input terminals P1, P2, passes through a voltage conversion circuit 1 comprising a voltage divider circuit with resistors R A and R B , and is input to a voltage-current conversion circuit 2. Voltage-current conversion circuit 2 outputs a current proportional to the input voltage to control current terminal T1 of Hall element 3. Meanwhile, the current from the system under measurement is input to terminals 1S,1L of current coil 105 wound on magnetic material core 104 shown in Fig. 5, so that a magnetic field proportional to the input current is generated in gap 106. As a result, a Hall electromotive force Ey given by expression (1) is generated at voltage output terminals T3, T4 of Hall element 3, which is positioned so as to be at right angles to the magnetic field of gap 106 and to the direction of flow of the control current of Hall element 3 which is from terminal T1 to terminal T2. Ey = Rh · Bz · Jx where Rh is the Hall coefficient, Bz is the magnetic field intensity, and Jx is the current density. In Fig. 4, the direction of the magnetic field is shown as an arrow x. Variable resistor VR1 is connected between voltage output terminals T3, T4 and serves to compensate for the offset voltage generated by the asymmetry of the characteristic of Hall element 3. Its moving contact is connected to ground together with control current terminal T2. Output terminals OUT1 and OUT2 of the power multiplication circuit are connected to voltage output terminals T3 and T4, respectively. Next, the mechanism of offset voltage generation will be described with reference to the internal equivalent circuit of Hall element 3 shown in Fig. 6. The equivalent circuit is expressed by a resistance bridge circuit, as shown. The output voltage is given by expression (2), if the respective voltages at the nodes are taken as E1, E2, E3, and E4 when the voltage E0 is applied to terminal T1 and the bridge resistances are respectively R1, R2, R3 and R4. E 3 - E 4 = R 2 R 1 + R 2 ( E 1- E 2) - R 4 R 3 + R 4 ( E 1 - E 2) = R 2. R 3 - R 1. R 4 ( R 1 + R 2) ( R 3 + R 4) ( E 1- E 2) If the magnetic field is 0, R1/R2 = R3/R4 So, E3 - E4 = 0. Though, in the above expressions (2) and (3), the voltage E0 and resistances R5, T6, R7 and R8 are not expressed positively, they are included in the voltages E1, E2, E3 and E4, and when Hall element 3 is connected to a following circuit having a very high input impedance, the output voltage between terminals T3 and T4 of Hall element 3 is nearly equal to the voltage (E3 - E4) expressed in the expression (2). However, if for example resistance R1 fluctuates in the direction such that it is decreased by an amount r1, E 3 - E 4 = R 2. R 3 - ( R 1 - r 1) ( R 1 - r 1 + R 2) R 4 ( R 3 + R 4) ( E 1 - E 2) ≠ 0 So, an offset voltage is generated between terminals T3 and T4 by the residual voltage even if the magnetic field is 0. Next, the effect of the offset voltage when a magnetic field is present will be described. We assume that a magnetic field as shown in the Figure is applied to Hall element 3 of Fig. 6, and that the resistances of resistors R1, R4 decrease while the resistances of resistors R2, R3 increase. The result of expressing graphically the potential difference between output voltage terminals T3, T4 is shown in Fig. 7 when a half-wave AC current flows between terminals T1, T2 for the four combinations of "positive"/"negative" direction of the magnetic field and "0 degrees/"180 degrees" of the phase of the control current. The upper row of diagrams in Fig. 7 indicates the waveform of the magnetic field intensity. The middle row indicates the waveform of the power source voltage of the system under measurement. The lower row indicates the waveform of the output voltage which is shown by broken lines in the case where there is no offset. If now we assume that the offset of resistor R1 is generated in the direction of decreasing resistance, the output voltage is decreased or increased by the amount of the offset voltage, as shown by the continuous line in the bottom row of Fig. 7. Accordingly, the output voltage is adjusted to zero in the condition where magnetic field is not applied by providing a variable resistor VR1 as shown in Fig. 4 to cancel the deviation of the output voltage produced by this offset voltage. In the conventional power calculation circuit described above, adjustment of the variable resistance in order to compensate the offset for fluctuations in the offset resistance produced by temperature change or occurring over a period of years was indispensable. However, for watt hour meters used by ordinary users this type of continuous adjustment operation is impracticable and occurrence of errors was therefore inevitable. Due to the need for a component having a mechanical contact part such as a variable resistor, there was also a reliability problem, and the power multiplication circuit was difficult to implement as an LSI. Other prior art wattmeters are disclosed in FR-A-2 594 230, DE-A-3 723 268 and Patent Abstracts of Japan, vol. 7, no. 113(P-197) 1983, the latter of which discloses a compensating method for rectified error voltage of Hall element of clamp type wattmeter. The purpose of the method is to prevent variation in zero point, and to improve voltage linearity, by adding a voltage, generated by rectifying an AC voltage generated by an AC control current and a Hall element input resistance, to a Hall element output voltage. The density of the magnetic flux at the gap part of a magnetic core C having opening and closing structure is proportional to a current (i) to be measured which flows through an electric path. By an electric path voltage (e) to be measured, on the other hand, a voltage-current converter supplies a control current proportional to the voltage (e) to a Hall element, and at the input terminal of the Hall element, an AC input voltage equal to the product lc.Ri=ei of the control current Ic and the input resistance Ri of the Hall element is developed. This voltage is inputted to an operational amplifier through a diode and a variable resistor and added to the Hall element output voltage. Consequently, a DC component generated in the Hall element output is cancelled to perform complete compensation over the wide range of the control current of the Hall element. SUMMARY OF THE INVENTION Accordingly, one objection of this invention is to provide a power calculation circuit wherein fluctuation in the offset voltage due to temperature change or change over a period of years etc. can be automatically corrected. These and other objects of this invention may be achieved by providing a power calculation circuit, in accordance with one aspect of the invention, comprising: a Hall element member having control current input terminals, said Hall element member being arranged to generate between voltage output terminals thereof a first output voltage corresponding to a power of a system under measurement, operating means, including a variable resistance member connected to one of said control current input terminals for compensating an offset voltage of the Hall element member and connected to receive said first output voltage for amplifying said first output voltage and to produce at an output terminal of the power calculation circuit a circuit output voltage corresponding to a power of a system under measurement, and to produce a second output voltage, characterised by: voltage polarity detection means and for detecting the polarity of a power source voltage of said system under measurement; the operating means also being connected to receive an output from said voltage polarity detection means, and operating to generate the second output voltage by inverting the amplified first output voltage when said polarity is positive and not inverting the amplified first output voltage when said polarity is negative in alternate half cycles of said system under measurement, and including integrating amplifier means for integrating said second output voltage to generate an integrated signal said variable resistance member being connected between one of said voltage output terminals of said Hall element member and said one of the control current input terminals connected to ground, and connected to receive said integrated signal, so that the resistance thereof is changed by said integrated signal, whereby an offset voltage of said Hall element member is reduced to zero. In another aspect the invention provides a power calculation circuit, comprising: a Hall element member having control current input terminals, said Hall element member being arranged to generate between voltage output terminals thereof a first output voltage corresponding to a power of a system under measurement, operating means, having a variable resistance member connected to one of the control current input terminals of said Hall element member for compensating an offset voltage of the Hall element member, the operating means being connected to receive the first output voltage for amplifying said first output voltage and to produce at an output terminal of the power calculation circuit a circuit output voltage corresponding to a power of a system under measurement, and to produce a second output voltage; said operating means including first amplifier means connected to a first voltage output terminal of said Hall element member for amplifying said first output voltage to generate the amplified first output voltage; characterised by; voltage polarity detection means for detecting either of the two states of the polarity of a power source voltage of said system under measurement; the operating means being also connected to receive an output from said voltage polarity detection means, and being arranged to generate the second output voltage by inverting the amplified first output voltage when said polarity is positive and not inverting the amplified first output voltage when said polarity is negative, in alternate half cycles of said system under measurement, and including integrating amplifier means for integrating said second output voltage to generate an integrated signal; the variable resistance member being connected between said one of the control current input terminals of said Hall element member and one of said voltage output terminals of said Hall element member, and connected to receive said integrated signal, so that the resistance thereof is changed by said integrated signal, whereby an offset voltage of said Hall element member is reduced to zero, wherein said operating means further includes: second amplifier means connected to the one of the voltage output terminals of said Hall element member for amplifying said first output voltage and for generating said inverted amplified first output voltage, and switch means connected to receive said amplified first output voltage, said inverted amplified first output voltage and an output of said voltage polarity detection means, for changing over between said amplified first output voltage and said inverted amplified first output voltage to generate said second output voltage in accordance with said state of polarity. The invention also extends to a power meter for measuring a power of a system, comprising: a voltage-current conversion circuit connected to receive a power source voltage of said system under measurement for converting said power source voltage to a control current proportional to said power source voltage, a Hall element having control current input terminals and voltage output terminals, and positioned in a magnetic field such that a plane thereof created by said control current input terminals and said voltage output terminals is substantially perpendicular to said magnetic field, intensity of said magnetic field being proportional to a current of said system under measurement, said Hall element being connected to said voltage-current conversion circuit such that said control current flows through said control current input terminals and generating a first output voltage between said voltage output terminals, corresponding to said power of said system under measurement; an amplifier circuit connected to receive said first output voltage and for amplifying said first output voltage to generate an amplified first output voltage, and a variable resistance member connected to one of the control input terminals , to compensate offset voltage of said Hall element, characterised by: a voltage or current polarity detection circuit for detecting the polarity of said power source voltage or current of said system under measurement; said amplifier circuit being arranged also to generate an inverted amplified first output voltage; an output terminal connected to said amplifier circuit for outputting said amplified first output voltage as a measurement of said power of said system under measurement; a switch circuit connected to receive said amplified first output voltage, said inverted amplified first output voltage and an output of said polarity detection circuit, for changing over said amplified first output voltage and said inverted amplified first output voltage to generate a second output voltage in accordance with said detected polarity; an integrating amplifier for integrating said second output voltage to generate an integrated signal, and; said variable resistance member being connected between one of said voltage output terminals of said Hall element and said one of the control current input terminals which is connected to ground, and connected to receive said integrated signal, so that the resistance thereof is changed by said integrated signal so as to compensate offset voltage of said Hall element. In this invention, by adopting the above means, the integrated value of the offset voltage is increased or decreased, with directionality, by arranging for the input to the integration circuit to be changed over in response to the polarity of the power source voltage of the system under measurement. The resistance of the variable resistor is thereby increased or decreased in response to the magnitude of the integrated value that is output by the integration circuit. This enables fluctuation of the offset resistance to be compensated such that the power can be calculated without offset. BRIEF DESCRIPTION OF THE DRAWINGS A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings, wherein: Fig. 1 is a circuit diagram of a power calculation circuit according to an embodiment of this invention; Fig. 2 is a waveform diagram of the various sub-units of the power calculation circuit shown in Fig. 1; Fig. 3 is a circuit diagram of a power calculation circuit according to another embodiment of this invention; Fig. 4 is a circuit diagram of a conventional power calculation circuit; Fig. 5 is a layout diagram of a magnetic field generating unit; Fig. 6 is an equivalent circuit diagram of a Hall element; and Fig. 7 is a diagram given in explanation of the relationship between the Hall electromotive force and offset voltage. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to the drawings, wherein like reference numerals designate identical or corresponding parts throughout the several views, embodiments of this invention will be described below. Fig. 1 is a circuit diagram of a power calculation circuit according to an embodiment of this invention. In Fig. 1, P1 and P2 are power source voltage input terminals that input the power source voltage, such as a a.c. 100 volts of the system under measurement. A voltage conversion circuit 1 converts the power source voltage input to input terminals P1 and P2 to a voltage suitable for matching the voltage in the power calculation circuit by stepping up or stepping down. This voltage conversion circuit 1 can be constituted using a voltage division circuit based on resistors RA, RB as shown in Fig. 1, or a transformer etc. A voltage-current conversion circuit 2 outputs a current proportional to the output voltage of voltage conversion circuit 1 at output terminal la. A Hall element 3 is provided with control current input terminals T1, T2 that input the current output from voltage-current conversion circuit 2, and with voltage output terminals T3, T4 that output the voltage obtained by the Hall effect. The construction is such that Hall element 3 is held in gap 106 of magnetic material core 104 around which current coil 105 is wound as shown in Fig. 5, and the plane containing control current input terminals T1, T2 and voltage output terminals T3, T4 is perpendicular to the magnetic field generated in the gap 106. The direction of the magnetic field is shown as an arrow x in Fig. 1. A subtracting amplifier 4 receives the AC voltages that are output at voltage output terminals T3, T4 of Hall element 3, and outputs the difference of the AC voltage to output terminal OUT1 of the power calculation circuit. Output terminal OUT2 thereof is connected to ground. A sign inverting amplifier 5 inverts the polarity of the voltage applied from subtracting amplifier 4. A voltage polarity detection circuit 6 is connected between input terminal P2 and output terminal la of voltage conversion circuit 1 that ascertains the polarity of the power source voltage of the system that is the subject of measurement. The output of voltage polarity detection circuit 6 is used such that if the ascertained polarity is positive a switch SW1 is closed and a switch SW2 is opened through an inverter 8, and if the ascertained polarity is negative switch SW1 is opened and switch SW2 is closed through inverter 8. Switches SW1 and SW2 in a switch circuit 7 are respectively switches that are put in the closed condition by an input signal of level "1" and put in the open condition by an input signal of level "0". The primary side of switch SW1 is connected to the output of sign inverting amplifier 5, while the primary side of switch SW2 is connected to the output of subtracting amplifier 4. An integrating amplifier 9 integrates the voltage output from the secondary side of switches SW1, SW2. A variable resistance element 10 is connected between ground and voltage output terminal T3, so that its resistance value is controlled by the output of integrating amplifier 9. It may be implemented using an FET or Cds photocoupler etc. Rc is a resistor connected between voltage output terminal T4 and ground and is provided to take account of the case where the offset resistance r1 is negative. Subtracting amplifier 4 is constructed, for example, by an operational amplifier OP1 and resistors Rd, Re, Rf and Rg. Integrating amplifier 9 is constructed, for example, by an operational amplifier OP2, a resistor Rh and a capacitor Ca. Next, the operation of the circuit constructed as above will be described. The power source voltage of the system under measurement that is input to power source voltage input terminals P1, P2 is converted to the suitable voltage by voltage conversion circuit 1, which is input to voltage-current conversion circuit 2. The current obtained by converting the input voltage to a current proportional to it in voltage-current conversion circuit 2 flows into Hall element 3 from the control current input terminal T1 to terminal T2 of Hall element 3. Meanwhile, the current of the system under measurement is made to flow to current coil 105 of magnetic material core 104, producing a magnetic field in gap 106 the intensity of which is proportional to the current of the system under measurement. This therefore results in the generation of a Hall electromotive force given by expression (1) at voltage output terminals T3, T4 of Hall element 3. The output voltage difference across voltage output terminals T3, T4 is therefore proportional to the product of the voltage and the current of the system under measurement. In other words, it is proportional to the power of the system under measurement. Subtracting amplifier 4 differentially amplifies its two inputs from voltage output terminals T3, T4 so that the output voltage difference across these voltage output terminals T3, T4 is output to the outside from output terminals OUT1 and OUT2 as the power value of the system under measurement. In general, the switch circuit 7 is used to changing the input to integrating amplifier 9, between the output of amplifier 4 and the inverted output of amplifier 4 provided by inverter 5, in alternate time periods corresponding to the length of a half cycle of the power supply. In the embodiment illustrated, the polarity of the power source voltage of the system under measurement, which has been subjected to voltage conversion in voltage conversion circuit 1, is ascertained by voltage polarity detection circuit 6. The ascertained polarity is used by switch circuit 7 to change over the phase of the output voltage of subtracting amplifier 4 which is input to integrating amplifier 9. The operation is such that, for example, if the polarity of the power source voltage of the system under measurement is positive, switch SW1 is closed and switch SW2 is opened, so that an output voltage of sign inverting amplifier 5 in which the polarity of output voltage of subtracting amplifier 4 is inverted is input to integrating amplifier 9. In the opposite situation, if the polarity of the power source voltage of the system under measurement is negative, switch SW1 is opened and switch SW2 is closed, with the result that the output voltage of subtracting amplifier 4 is directly input to integrating amplifier 9 without inversion of polarity. Integrating amplifier 9 integrates the output voltage of switch circuit 7 and outputs the results to variable resistance element 10. Variable resistance element 10 changes its resistance in the direction such as to compensate for the offset voltage, this change being made in accordance with the sign and the magnitude of the input voltage. In other embodiments the polarity of the current may be used to change between the inverted and non-inverted outputs of amplifier 4. Next, typical waveforms at various locations of the power calculation circuit on input of a sign wave will be described with reference to Fig. 2. The magnetic field intensity in gap 106 of magnetic material core 104 is shown at (a). The current waveform of the output from voltage-current conversion circuit 2 that is input to Hall element 3 is shown at (b). The waveform of the output of subtracting amplifier 4 is shown at (c). In (c), (d) and (e) of Fig. 2, the waveform when there is no offset is shown by a broken line, while the waveform when offset is present is shown by a continuous line. All of these waveforms are generated in accordance with the rules of combination of direction of magnetic field and polarity of the current shown in Fig. 7. The output waveform of sign inverting amplifier 5 is shown at (d) and is arrived at by inverting the waveform of (c). The waveform of the output of switch circuit 7 is shown at (e) and is obtained by operating switch circuit 7 by means of voltage polarity detection circuit 6 in response to the power source voltage of the system under measurement; it is also the waveform of the input to integrating amplifier 9. During the period indicated by (I) in the Figure, the output voltage of sign inverting amplifier 5 shown in (d) is input to integrating amplifier 9 by the closure of switch SW1. Also, in the period indicated by (II) in the Figure, the output voltage of subtracting amplifier 4 shown in (c) is input to integrating amplifier 9 by the closure of switch SW2. When there is no offset, the waveform expressed by a broken line in (e) in period (I) has the opposite polarity but equal magnitude to the waveform expressed by a broken line in (e) in period (II), so the output of integrating amplifier 9 is zero when integrated over one period including the period (I) and the period (II). When the offset resistance r1 (r1 > 0) is present in Hall element 3, since the waveform, shown by the continuous line in (e), is offset in the negative direction, the output integrated by integrating amplifier 9, as shown in (f), is not zero. Variable resistance element 10 is controlled based on the output of the integrating amplifier 9 as follows. The resistance of variable resistance element 10 decreases as the output voltage of integrating amplifier 9 increases, until it reaches a resistance that compensates the offset resistance r1 of Hall element 3. The input voltage waveform of integrating amplifier 9 then has a waveform as shown by the broken line in (e). The output of integrating amplifier 9, does not further change, and the resistance of variable resistance element 10 is then maintained unaltered in this condition, in the state of period (III). Resistor Rc is required to effect compensation in the case where offset resistance r1 is negative. With the embodiment described above, the offset voltage generated by change in the characteristic of Hall element 3 can be automatically corrected, so that the power can be calculated accurately. Fig. 3 is a circuit diagram showing a power calculation circuit according to another embodiment of this invention. The same benefits as in the first embodiment can be obtained by employing two amplifiers 12, 13 differing in phase by 180 degrees but of mutually equal gain in place of subtracting amplifier 4, by connecting operational amplifier 11 to voltage output terminal T4 of Hall element 3, and holding voltage output terminal T4 at ground level. In the embodiments shown in Fig. 1 and Fig. 3, inverter 8 is used for controlling switch SW2. But this invention is not limited to these embodiments. In the case that switch SW2 is a switch that is put in the open condition by an input signal of level "1" and put in the closed condition by an input signal of level "0", inverter 8 can be omitted and switch SW2 is controlled directly by the output of voltage polarity detection circuit 6. Also, although in order to facilitate understanding of the operation in Fig. 1 and Fig. 3, switch circuit 7 is expressed by a circuit having a mechanical contact, a contact-less switch, such as a semiconductor switch, could of course be used. As described above, with this invention, a power calculation circuit can be provided which is of high accuracy and wherein fluctuations of the offset voltage produced by temperature change and change over a period of years can be automatically corrected. Furthermore, since mechanical parts may be eliminated, it may easily be implemented as an LSI, enabling high reliability to be attained. Additionally, operation is simplified in that there is no need for initial adjustment. Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.

Claims: A power calculation circuit, comprising: a Hall element member (3) having control current input terminals (T1, T2), said Hall element member (3) being arranged to generate between voltage output terminals (T3, T4) thereof a first output voltage corresponding to a power of a system under measurement, operating means (4,5,7,8,9,10), including a variable resistance member (10) connected to one (T2) of said control current input terminals (T1, T2) for compensating an offset voltage of the Hall element member and connected to receive said first output voltage for amplifying said first output voltage and to produce at an output terminal of the power calculation circuit a circuit output voltage corresponding to a power of a system under measurement, and to produce a second output voltage, characterised by : voltage polarity detection means (6) for detecting the polarity of a power source voltage of said system under measurement; the operating means (4,5,7,8,9,10) also being connected to receive an output from said voltage polarity detection means, and operating to generate the second output voltage by inverting the amplified first output voltage when said polarity is positive and not inverting the amplified first output voltage when said polarity is negative in alternate half cycles of said system under measurement, and including integrating amplifier means (9) for integrating said second output voltage to generate an integrated signal, said variable resistance member (10) being connected between one (T3) of said voltage output terminals (T3,T4) of said Hall element member (3) and said one (T2) of the control current input terminals (T1, T2) connected to ground, and connected to receive said integrated signal, so that the resistance thereof is changed by said integrated signal, whereby an offset voltage of said Hall element member (3) is reduced to zero. A power calculation circuit according to claim 1, wherein said operating means (4,5,7,8,9,10) includes: subtracting amplifier means (4) connected to said Hall element member (3) for amplifying said first output voltage to generate said amplified first output voltage; inverting amplifier means (5) connected to said subtracting amplifier means for inverting said amplified first output voltage to generate an inverted amplified first output voltage; switch means (7,8) connected to receive said amplified first output voltage, said inverted amplified first output voltage and said output of the voltage polarity detection means for changing over between said amplified first output voltage and said inverted amplified first output voltage to generate said second output voltage in accordance with said polarity. A power calculation circuit according to claim 2, wherein said switch means (7,8) includes, a first switch (SW1) having a first terminal and a second terminal, said first terminal being connected to an output terminal of said inverting amplifier means (5), said second terminal being connected to an input terminal of said integrating amplifier means (9), a second switch (SW2) having a third terminal and a fourth terminal, said third terminal being connected to an output terminal of said subtracting amplifier means (4), said fourth terminal being connected to said input terminal of said integrating amplifier means (9), and inverter means (8) for inverting the output of the polarity detection means; and wherein when said polarity is detected positive said first switch (SW1) is closed and said second switch (SW2) is opened via said inverter means and said switch means (7,8) outputs said inverted amplified first output voltage as said second output voltage, and when said polarity is detected negative said first switch (SW1) is opened and said second switch (SW2) is closed via said inverter means (8) and said switch means (7,8) outputs said amplified first output voltage as said second output voltage. A power calculation circuit according to claim 3, wherein each of said first and second switches (SW1, SW2) includes a mechanical switch. A power calculation circuit according to claim 3, wherein each of said first and scond switches (SW1,SW2) includes a semiconductor switch. A power calculation circuit, comprising: a Hall element member (3) having control current input terminals (T1, T2), said Hall element member (3) being arranged to generate between voltage output terminals (T3, T4) thereof a first output voltage corresponding to a power of a system under measurement, operating means (7,8,9,10,12,13), having a variable resistance member (10) connected to one (T2) of the control current input terminals (T1, T2) of said Hall element member (3) for compensating an offset voltage of the Hall element member, the operating means (7,8,9,10,12,13) being connected to receive the first output voltage for amplifying said first output voltage and to produce at an output terminal of the power calculation circuit a circuit output voltage corresponding to a power of a system under measurement, and to produce a second output voltage; said operating means including first amplifier means (12) connected to a first voltage output terminal (T3) of said Hall element member (3) for amplifying said first output voltage to generate the amplified first output voltage; characterised by : voltage polarity detection means (6) for detecting either of the two states of the polarity of a power source voltage of said system under measurement; the operating means (7,8,9,10,12,13) being also connected to receive an output from said voltage polarity detection means, and being arranged to generate the second output voltage by inverting the amplified first output voltage when said polarity is positive and not inverting the amplified first output voltage when said polarity is negative, in alternate half cycles of said system under measurement, and including integrating amplifier means (9) for integrating said second output voltage to generate an integrated signal; the variable resistance member (10) being connected between said one (T2) of the control current input terminals (T1, T2) of said Hall element member (3) and one (T3) of said voltage output terminals (T3,T4) of said Hall element member (3), and connected to receive said integrated signal, so that the resistance thereof is changed by said integrated signal, whereby an offset voltage of said Hall element member is reduced to zero; wherein said operating means (7,8,9,10,12,13) further includes; second amplifier means (13) connected to the one (T3) of the voltage output terminals (T3, T4) of said Hall element member for amplifying said first output voltage and for generating said inverted amplified first output voltage, and switch means (7,8) connected to receive said amplified first output voltage, said inverted amplified first output voltage and an output of said voltage polarity detection means, for changing over between said amplified first output voltage and said inverted amplified first outputs voltage to generate said second output voltage in accordance with said state of polarity. A power calculation circuit according to claim 6, wherein said switch means (7,8) includes, a first switch (SW1) having a first terminal and a second terminal, said first terminal being connected to an output terminal of said second amplifier means (13), said second terminal being connected to an input terminal of said integrating amplifier means (9), a second switch (SW2) having a third terminal and a fourth terminal, said third terminal being connected to an output terminal of said first amplifier means (12), said fourth terminal being connected to said input terminal of said integrating amplifier means (9), and inverter means (8) for inverting the output of the voltage polarity detecting means (6), and wherein when said polarity is in one state said first switch (SW1) is closed and said second switch (SW2) is opened via said inverter means (8) and said switch means (7,8) outputs said inverted amplified first output voltage and when said polarity is in the other state said first switch (SW1) is opened and said second switch (SW2) is closed via said inverter means (8) and said switch means (7,8) outputs said amplified first output voltage. A power calculation circuit according to claim 7, wherein each of said first and second switches (SW1, SW2) includes a mechanical switch. A power calculating circuit according to claim 7, wherein each of said first and second switches (SW1,SW2) includes a semiconductor switch. A power meter for measuring a power of a system, comprising: a voltage-current conversion circuit (2) connected to receive a power source voltage of said system under measurement for converting said power source voltage to a control current proportional to said power source voltage; a Hall element (3) having control current input terminals (T1, T2) and voltage output terminals (T3, T4), and positioned in a magnetic field such that a plane thereof created by said control current input terminals and said voltage output terminals is substantially perpendicular to said magnetic field; intensity of said magnetic field being proportional to a current of said system under measurement; said Hall element (3) being connected to said voltage-current conversion circuit (2) such that said control current flows through said control current input terminals (T1, T2), and generating a first output voltage between said voltage output terminals, corresponding to said power of said system under measurement; an amplifier circuit (4,5) connected to receive said first output voltage and for amplifying said first output voltage to generate an amplified first output voltage, and a variable resistance member (10) connected to one (T2) of the control current input terminals (T1, T2), to compensate offset voltage of said Hall element, characterised by : a voltage or current polarity detection circuit (6) for detecting the polarity of said power source voltage or current of said system under measurement; said amplifier circuit (4,5) being arranged also to generate an inverted amplified first output voltage; an output terminal (OUT 1) connected to said amplifier circuit (4,5) for outputting said amplified first output voltage as a measurement of said power of said system under measurement; a switch circuit (7,8) connected to receive said amplified first output voltage, said inverted amplified first output voltage and an output of said polarity detection circuit (6), for changing over said amplified first output voltage and said inverted amplified first output voltage to generate a second output voltage in accordance with said detected polarity; an integrating amplifier (9) for integrating said second output voltage to generate an integrated signal; and said variable resistance member (10) being connected between one (T3) of said voltage output terminals (T3, T4) of said Hall element and said one (T2) of the control current input terminals (T1, T2) which is connected to ground, and connected to receive said integrated signal, so that the resistance thereof is changed by said integrated signal so as to compensate offset voltage of said Hall element.

Inventors: MARUYAMA RYOJI, MARUYAMA, RYOJI, MARUYAMA, RYOJI, C/O INTELLECTUAL PROPERTY DIV.
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1993
Main classification: G01R21
IPC codes: G01R21