Generation of a diagnostic signal when the current through a power transistor reaches a level close to a limit current

Abstract: A diagnostic signal, indicative of the reaching of a predefined level, lower than a fixed maximum limit value, by the current flowing through a power transistor, is generated while employing a single comparator of a reference voltage with the voltage present across a sensing resistance, thus preventing problems arising from different offset characteristics of distinct comparators. By the use of current mirrors, the generation of a diagnostic signal when the current reaches a level that can be fixed very close to the limiting value, may be reliably triggered, irrespectively of the offset characteristic of the single comparator employed.

Description: BACKGROUND OF THE INVENTION The invention relates to a circuit of the kind stated in the preamble of claim 1. Such a circuit is for example used for controlling the energy stored in an inductive load, where it is important to make available a diagnostic signal when the current in the inductor reaches a preset level. A driving system for an inductor is depicted in Fig. 1. The inductor L is connected between a supply node Vs and a transistor T 1 that acts as a switch, driven by a drive circuit (DRIVE) to an input of which a signal V IN is applied. As shown in Fig. 2, when V IN goes high, T 1 turns-on and a current I c starts to flow through the inductor, increasing as a linear function of time. For any value I reached bv the current, the corresponding energy that is stored in the inductance is given by: E = 1 2 LI 2 The power stage normally comprises a circuit for limiting the maximum current in order to avoid destruction of the transistor, therefore in the diagram of Fig. 2, the current is limited to a maximum value I max . Moreover, if the transistor T 1 must be turned-off always at the same level of energy stored in the inductor, it is necessary to produce a signal when the current I reaches a preset level I D , in order to maximize the energy stored in the inductor at the end of each charging phase, that is when T 1 turns off. This is often required, for example, in electronic sparkplug driving, where it is also necessary that the level I D at which the turning off occurs be very close to the maximum limit current I max . In conventional systems, this is achieved in the manner depicted in Fig. 3. A maximum current limiting circuit A1 (LIMITATOR) intervenes on the drive circuit (DRIVE) when the voltage drop on the sensing resistance R s , due to I c , equals the reference voltage E 1 , that is when R s *I max =E 1 . Similarly, a diagnostic signal V D of Fig. 2, is produced when R s *I D =E 2 , considering that, for the above reported reasons, I D may have a value very close to I max . To this purpose, a second diagnostic comparator (DIAGNOSTIC) A2 is employed. Given that I D must be lower than I max , though close thereto, E 1 must also be greater than E 2 but must have a value very close thereto. The absolute values of E 1 as well as of E 2 should on the other hand be as low as possible, because to them corresponds a voltage drop on R s due to the current I c . Such a voltage drop is in series with the saturation voltage of the transistor and causes power dissipation, therefore the voltage on R s and therefore also E 1 and E 2 should not be greater than few 10mV. This means that if a diagnostic signal, for example for a value greater than 90% of the limit current I max , is required; E 2 >0.9*E 1 must be verified. As a numeric example, by assuming: I max =5A and R s =10mΩ; E 1 =50mV and therefore E 2 >0.9*50mV=45mV. This means that E 1 -E 2 <5mV. Occasionally, E 2 >0.95*E 1 may be required and the difference between E 1 and E 2 must be even smaller than few mV. The known arrangement of Fig. 3 is critical, because the voltage difference on R s at which the operational amplifiers A 1 and A 2 must react is very small (in the order of millivolts) and is comparable in terms of order of magnitude with the voltage offset of the comparators that are employed. This may determine a non-negligeable imprecision in the signalling of the reaching by the current I c of the diagnostic level I D . Eventually, if the offset of the differential amplifier A 2 become greater in absolute value than the voltage difference E 1 - E 2 , the system will not produce the required diagnostic signal, with serious consequence on the functioning of the system. In other words, in all the applications where for obvious reasons of optimization, the current level I D must be fixed very close to the limit level I max , the known circuits may be operating in extremely critical conditions and therefore losing in reliability and precision in ensuring a correct ratio between I D and I max . OBJECTIVE AND SUMMARY OF THE INVENTION A main objective of the present invention is to provide a system for generating a diagnostic signal, indicative of the reaching by the current flowing through a power transistor of a preset level, the precision of which be substantially insensitive to the input offset of the respective detecting circuits. A further aim of the invention is to simplify the known circuit by employing a single monitoring comparator in order to eliminate the imprecision deriving from different characteristics of equivalent input offset of distinct monitoring comparators. These objectives are achieved by a circuit as stated in claim 1. The circuit employs a single detecting differential amplifier, capable of producing a signal the level of which is a function of the difference between a reference voltage and a voltage present across a sensing resistance of the current flowing through the power transistor. The signal produced by the differential amplifier (comparator) is conventionally employed for driving a transistor that is functionally connected so as to subtract part of a driving current that is delivered toward the power transistor by a conventional drive circuit. In this way, a negative reaction is implemented that determines a maximum limit of the current through the power transistor and, according to the invention, the same signal produced by the comparator is used for driving a second transistor through which a current that is lower than said current subtracted by the first transistor is forced. The signal present across said second transistor is employed for producing the desired diagnostic signal by employing a threshold circuit. The second transistor, driven in a current mirror relationship with the first current limiting transistor, reaches a state of saturation before the first transistor and therefore determines the triggering of a threshold circuit that generates the diagnostic signal upon the reaching of a current level I D, positively lower by a pre-established quantity than the limit current value I max . The current forced through the second transistor Is a mirrored current that may have a given ratio with a driving current that is delivered toward the power transistor. The ratio between I D and I max no longer depends on the input equivalent offset of the comparator, as in the circuits of the prior art, because the respective circuits that determine: one, the limit value of the current through the output power transistor, and the other, the generation of a diagnostic signal upon the reaching of a certain level I D by the current, are both driven by the same signal produced by the comparator. Therefore, the circuit permits to fix said ratio even very close to unity, though ensuring a correct operation of the circuit also in presence of disturbances. In practice, the invention allows to maximize the energy handled by the power transistor, while retaining a high degree of safety and realiability. BRIEF DESCRIPTION OF THE DRAWINGS The different features and advantages of the invention will become even clearer through the following description of an important embodiment and by referring to the attached drawings, wherein: Figure 1 is a functional diagram of an output stage for driving a load L; Figure 2 shows a series of diagrams of operation of a power stage, according to certain recurrent requisites for this type of circuit, as described above; Figure 3 is a block diagram of a prior art control system for a power stage according to the requisites set forth in the diagrams of FIg. 2, as described above; Figure 4 is a functional block diagram of a control circuit for a power stage according to the present invention; Figure 5 is a circuit diagram of an embodiment of the circuit of the invention. GENERAL DESCRIPTION OF THE INVENTION The functional block diagrams of Figures 3 and 4 place in evidence the distinction between the known method for generating a diagnostic signal V D , depicted in Fig. 3, and the method of the invention depicted in Fig. 4. As may be observed, the invention contemplates the use of a single comparator, which may be constituted by a differential amplifier A (comparator) capable of generating a signal in function of the difference between a reference voltage E 1 and the voltage present across a sensing resistance R s , through which the current I c flowing in the power transistor T 1 (and in the load L) flows. The signal produced by the comparator A drives two circuits. The first circuit (LIMITATOR) produces a limiting signal of the maximum current that may flow through the power transistor T 1 , which acts on the drive circuit (DRIVE) that delivers a driving current to the power transistor T 1 . The second circuit (DIAGNOSTIC) is a circuit capable of producing a diagnostic signal V D upon the reaching by part of the current I c of a value I D that is lower by a pre-established amount than the limiting value I max of the current I c , as established by the LIMITATOR circuit. PREFERRED EMBODIMENT OF THE INVENTION A preferred embodiment of the circuit of the invention is shown in Fig. 5. The circuit operates in the following manner. When V IN is commanded high, the control circuit DRIVE closes the switch M and a current I G flows in T 2 . Also T 4 and T 5 , both connected in a current mirror configuration with the transistor T 2 , are turned-on and generate currents, the value of which will depend on the respective ratio of emitter area with T 2 . T 5 provides a driving current: I 5 = I F , to the base of T 9 , which activates the power transistor T 1 with a base current I 9 = I B . Of course, the equalities: I B = I 9 = I F * h FE (T9) will be verified and the current I c will start to flow in the inductor L through the transistor T 1 . When I c reaches the value: I max = E 1 /R S , the differential amplifier A is activated and through its output starts to deliver current to the bases of the transistors T 6 and T 7 . T 7 starts to absorb a current I 7 , by subtracting it from the driving current I 5 , so that, being I F = I 5 - I 7 and being I 5 constant, upon an increase of I 7 , I F will decrease and therefore I 9 = I B will decrease. Finally, when I B has dropped down to the value given by: I B = I c /h FE (T 1 ), the current through the load would stabilize at a maximum level I max , which cannot be exceeded in view of the fact that the feedback loop of the amplifier A tends to maintain the condition E 1 = I max *R S . According to the invention, to obtain a diagnostic signal V D , a transistor T 6 , functionally connected in a current mirror configuration with the transistor T 7 , is employed. Therefore, the two transistors T 6 and T 7 will reach a state of conduction simultaneously and with a current ratio that directly depends on the ratio between their emitter areas. As an example, it may be assumed that I 6 = I 7 . A diagnostic signal: V D = R 1 * I 3 is generated by the threshold circuit composed of the stage comprising T 3 and R 1 . The signal V D is generated upon the turning-on of T 3 , which is determined by the signal present substantially across the transistor T 6 . The turning-on of T 3 will occur only if: I 6 > I 4 ; but I 6 = I 7 = I 5 - I F , I F being equal to I max /[h FE (T 1 )*h FE (T 9 )]. Therefore, by imposing the condition: I 4 <I 5 -I F , the transistor T 6 , once it has absorbed all the current I 4 , saturates and activates T 3 , thus determining the generation of the diagnostic signal V D . The diagnostic signal V D is always produced positively before the reaching of the maximum limit current, because, as already mentioned, I 4 < I 5 - I F , and being I 6 = I 7 , the collector voltage of the transistor T 6 tends to fall positively before the collector voltage of T 7 . By suitably adjusting the emitter area ratio between T 6 and T 7 and between T 4 and T 5 , it is possible to precisely determine a certain ratio I D /I max , which may also be very close to unity. The only parameter of the circuit described above, which may still determine an imprecision in the definition of the level of current in the inductor at which the diagnostic signal is generated, may be derived from the expression already reported above: I F = I max /[h FE (T 1 )*h FE (T 9 )]. In fact, I F depends on the current gains of T 1 and T 9 , which may vary with the temperature and/or be subject to a process "spread". This cause of possible imprecision may be better understood by considering the expressions: I 7 = I 5 - I F , I 6 > I 4 and I 6 = I 7 . The first equality denounces a strong dependence on temperature due to the term I F , while the second disequality is independent of temperature. As a consequence the third equality above could be incoherent with the first two relationships. In order to prevent the effects of this possible problem, an additional circuit composed of the transistors T 8 and T 10 , may be introduced, as shown in the embodiment of Fig. 5. The function of the additional circuit is the following. T 8 and T 10 are connected in current mirror configuration with T 9 , therefore the following conditions hold: I F = I 10 ; I 9 = {A 9 /A 10 } * I 10 ; I 8 = {A 8 /A 10 } * I 10 where A 8 , A 9 and A 10 are the respective emitter areas of the transistors. Moreover, with the addition of the circuit composed by T 8 and T 10 , it may be shown that in order for a diagnostic signal V D to be generated, the following conditions must hold: I 6 > I 4 - I 8 ; while I 7 = I 5 = I F ; but I F = I 10 and I 8 = {A 8 /A 10 } * I 10 from where, by assuming for example A 8 = A 10 , the following relationships are derived: I 6 > I 4 - I 8 I 7 = I 5 - I 8 by having set: I 6 = I 7 Dependence on the current gain of transistors is exibited only by the current I 8 , which (from Fig. 5) is given by: I 8 = I c h FE (T 1 ) * (1 + A 10 /A 8 + A 9 /A 8 ) However, the term I 8 is present both in the expression (1) and in the expression (2) which, if combined with the equation (3), show that the condition of generation of a diagnostic signal is practically independent on the current gain of the power transistor T 1 .

Claims: A circuit for limiting the maximum current (I max ) through a power transistor (T 1 ) and for generating a diagnostic signal (V D ), indicative of the reaching by the current (I c ) through said power transistor T 1 of a preset level (I D ), lower than a maximum current level (Imax), comprising a differential amplifier (A) having an output on which is generated a signal whose amplitude is a function of the difference between a reference voltage (E 1 ) and a voltage present across a sensing resistance (R s ) through which said current (I c ) flows functionally coupled to respective inputs of said amplifier and at least a first transistor (T 7 ) having a control terminal coupled to the output of said amplifier (A) and functionally connected to subtract by sinking it to a common ground node of the circuit a portion (I 7 ) of a driving current (I 5 ) of said power transistor (T 1 ) produced by a driving circuit for limiting said current (I c ), characterized by comprising at least a second transistor (T 6 ) having a control terminal coupled to the output of said amplifier (A); current operating means (T 4 ) forcing through said second transistor (T 6 ) a current (I 4 ) lower than said current (I 7 ) subtracted by said first transistor (T7); a threshold circuit (T 3 , R 1 ), sensing the voltage present across said second transistor (T 6 ), and producing said diagnostic signal (V D ). The circuit as defined in claim 1, characterized in that said current operating means are in the form of a current mirror circuit (T 2 , T 4 , T 5 ), a first output branch thereof (T 4 ) forcing said current (I 4 ) through said second transistor (T 6 ), and a second output branch thereof (T 5 ) forcing said drive current (I 5 ) to a control node of said power transistor (T 1 ). A circuit according to claim 2, wherein the transistor (T 4 ) of said first branch of the current mirror that forces said current (I 4 ) through said second transistor (T 6 ) has a smaller emitter area than the transistor (T 5 ) of said second branch of the current mirror that forces said drive current (I 5 ). A circuit according to claim 3, wherein said power transistor (T 1 ) is driven through a stage composed of a fifth transistor (T 9 ), driven by a current equivalent to the drive current (I 5 ) forced by said transistor of said second branch of the current mirror (T 2 ,T 4 ,T 5 ) less said current portion (I 7 ), subtracted by said first transistor (T 7 ). The circuit according to claim 4, characterized by comprising a sixth transistor (T 8 ), that forms together with said fifth transistor (T 9 ), and a seventh, diode-configured, transistor (T 10 ), a second current mirror with said sixth transistor (T 8 ) absorbing current from a driving node of said threshold circuit (T 3 , R 1 ); the ratio among the respective emitter areas of said fifth, sixth and seventh transistors (T 9 , T 8 , T 10 ) being such as to render the triggering condition of said threshold circuit (T 3 , R 1 ) independent from variation of the current gain of the power transistor (T 1 ).

Inventors: PALARA SERGIO, SUERI STEFANO, PALARA, SERGIO, SUERI, STEFANO
Applicants: CONS RIC MICROELETTRONICA, ST MICROELECTRONICS SRL, CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO - CORIMME, STMICROELECTRONICS S.R.L.
Application year: 1993
Main classification: F02P3
IPC codes: G01R31, G01R19, F02P3, H03K17