Pixel compensating circuit for an image sensor

Abstract: The present invention is directed to a carrier level balancing circuit in which a color aliasing signal occurred when a cameraman takes a picture of an object of an achromatic (black and white) color can be canceled completely. In a carrier level balancing circuit for a color camera formed of a CCD solid state image pickup device (9) of an all pixel separately read out system, two-channel color signals (Gr/Ye, Cy/Gb) output from the CCD solid state image pickup device (9) are multiplied with independent balance coefficients (a/b, c/d) at every line by multipliers (15), (16) while the balance coefficients (a/b, c/d) are switched in a dot-sequential fashion. Also, values of these balance coefficients (a/b, c/d) are set by a coefficient setting circuit (17) in response to a color temperature information. Thus, the carrier levels can be balanced at all sorts of color temperatures.

Description: BACKGROUND OF THE INVENTION Field of the Invention: The present invention generally relates to carrier level balancing circuits in a color camera signal processing circuit and, more particularly, to a carrier level balancing circuit for use in a signal processing circuit of a color camera formed of a CCD (charge-coupled device) solid state image pickup device of a so-called all pixel separately read out type in which signal charges of all pixels are separately read out during one field period. Description of the Prior Art: In a conventional signal processing circuit of a color camera, a color camera formed of a CCD solid state image pickup device of a so-called two-pixel mixing type in which signal charges of two pixels adjacent in the vertical direction are mixed and read out is disclosed in FIG. 12 of Japanese laid-open patent publication No. 63-301687, for example. In this kind of CCD solid state image pickup device, output signals read out by mixing two pixels at every field are respectively multiplied with proper different coefficients thereby to balance carrier levels of the respective output signals. Then, the occurrence of a color aliasing signal in a luminance signal is suppressed by generating a luminance signal from the output signal whose carrier level was balanced. Further, a CCD solid state image pickup device of an all pixel separately read out type is known to improve a vertical resolution as is disclosed in Japanese laid-open patent publication JP-A- 63301687. When the carrier levels are balanced according to the aforesaid method, a color aliasing signal occurred when a cameraman takes a picture of an object of an achromatic (black and white) color can be canceled to a certain level. However, since the CCD solid state image pickup device is formed of the two-pixel mixing type, carrier levels are not always balanced due to a difference of sensitivity between pixels of a color filter. Therefore, a color aliasing signal in a luminance signal could not be canceled completely in the vertical and horizontal directions. On the other hand, in the CCD solid state image pickup device of all pixel separately read out system, if carrier levels are not balanced by any method, then a color aliasing signal will occur in a luminance signal or the like. EP-A-0 138 074 discloses a known moire correction circuit having the features of the precharacterizing parts of the independent claims 1 and 4. A variable gain amplifier is provided for each color component or for each adjacent color components and the gain of the variable gain amplifiers is changed depending on some color temperature information. These gain controlled color components are then summed within a basic unit (which is constituted of W, Cy, Ye, G components) in order to compose a moire corrected luminance signal. OBJECT AND SUMMARY OF THE INVENTION It is an object of the present invention to provide a carrier level balancing circuit in which a color aliasing signal occurred when a cameraman takes a picture of an object of an achromatic (black and white) color can be canceled completely. According to a first aspect of the present invention, there is provided a carrier level balancing circuit for a color camera formed of a solid state image pickup device in which signal charges of all pixels are separately read out at every two lines during one field period and dot-sequential two-channel color signals are output in the basic unit, and summing means are provided for summing color components within said basic unit in order to compose a luminance signal, said carrier level balancing circuit being characterized by further comprising: a first multiplier for alternately multiplying in a dot-sequential fashion one of said dot-sequential two-channel color signals with first and second coefficients set in association with respective said color signals in response to a color temperature information at the unit of pixel; a second multiplier for alternately multiplying in a dot-sequential the other of said dot-sequential two-channel color signals with third and fourth coefficients set in association with respective said color signals in response to a color temperature information at the unit of pixel; and said summing means comprises first and second adding circuits for adding said two-channel color signals from said first and second multipliers first by two adjacent pixels in vertical direction and then by four adjacent pixels in vertical and horizontal directions to compose a level-balanced signal. According to a second aspect of the present invention, there is provided a carrier level balancing circuit for a color camera formed of a solid state image pickup device in which signal charges of all pixels are separately read out at every two lines during one field period and dot-sequential two-channel color signals are output in the basic unit, and summing means are provided for summing color components within said basic unit in order to compose a luminance signal, said carrier level balancing circuit being characterized by further comprising: switching means for converting said dot-sequential two-channel color signals into a first dot-sequential color signal formed of a combination of pixels of the same color and a second dot-sequential color signal formed of a combination of pixels of different colors; a first multiplier for multiplying said first dot-sequential color signal with a first coefficient in response to a color temperature information; a second multiplier for multiplying said second dot-sequential color signal with independent second and third coefficients in a dot-sequential fashion in response to a color temperature information at the unit of pixel; and said summing means comprises first and second adding circuits for adding outputs of said first and second multipliers first by two adjacent pixels in vertical direction and then by four adjacent pixels in vertical and horizontal directions to compose a level-balanced signal. In the carrier level balancing circuit for a color camera formed of a solid state image pickup device of an all pixel separately read out type, the coefficients that are separately set at every line in response to the color temperature information are multiplied to the two-channel color signals output from the solid state image pickup device while the respective coefficients are being switched in a dot-sequential fashion thereby to balance carrier levels. Thus, if a luminance signal and an aperture control signal, etc., are generated from these signals whose carrier levels were balanced, a color aliasing signal occurred in these luminance and aperture control signals can be completely canceled in the vertical and horizontal directions. Furthermore, the two-channel color signals output from the solid state image pickup device are converted into the color signal formed by a combination of pixels of the same color and the color signal formed by a combination of pixels of different colors. Then, the same coefficient is constantly multiplied to these color signals with respect to the line formed by a combination of the pixels of the same color and the independent coefficients are multiplied to these color signals with respect to the line formed by a combination of the pixels of different colors in a dot-sequential fashion thereby to balance carrier levels. The above and other objects, features, and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof to be read in conjunction with the accompanying drawings, in which like reference numerals are used to identify the same or similar parts in the several views. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a carrier level balancing circuit according to an embodiment of the present invention which is applied to the processing of a luminance signal; FIG. 2 is a diagram showing a color filter array of an example of a color filter; FIG. 3 is a diagram illustrative of a carrier level balanced condition in the color filter array shown in FIG. 2; and FIG. 4 is a block diagram showing a carrier level balancing circuit according to another embodiment of the present invention which is applied to the processing of a luminance signal. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 of the accompanying drawings is a block diagram illustrative of a carrier level balancing circuit for a color camera formed of a CCD solid state image pickup device of an all pixel separately read out type which is applied to the processing of a luminance signal. As shown in FIG. 1, an image pickup area 3 comprises a plurality of photo-sensors 1 that are arranged at the unit of pixels in a two-dimensional fashion to accumulate a signal charge corresponding to an incident light thereon and vertical CCDs 2 for transferring signal charges read out from the photo-sensors 1 at every vertical column in the vertical direction. A color filter array (not shown) is formed on the image pickup area 3, The color filter arrangement may be of the line sequential type formed of a G (green) checkered Ye (yellow)/ Cy (cyan) as shown in FIG. 2 and four pixels are employed as a basic unit. In FIG. 2, reference symbol Px designates a pixel pitch in the horizontal direction and Py designates a pixel pitch in the vertical direction, respectively. The vertical CCD 2 effects the operation corresponding to the vertical scanning and is driven by four-phase vertical transfer clocks V1 to V4. Two horizontal CCDs 4, 5 for transferring signal charges, transferred from the vertical CCD 2, in the horizontal direction are disposed in parallel to the output side of the vertical CCD 2. The horizontal CCDs 4, 5 effect the operation corresponding to the horizontal scanning and are driven by two-phase horizontal transfer clocks H1 and H2. Signal charges of two lines each are transferred to the horizontal CCDs 4, 5 from the vertical CCD 2 and the distribution of signal charges to the two horizontal CCDs 4, 5 is effected at the unit of line by a distribution transfer gate 6 disposed between the horizontal CCDs 4, 5. At the output sides of the horizontal CCDs 4 and 5, there are provided output sections 7, 8 that are formed of floating diffusion amplifiers to detect and convert transferred signal charges into signal voltages. These output sections 7, 8 derive two-channel pixel signals simultaneously. Thus, the CCD solid state image pickup device 9 of all pixel separately read out type is constructed to separately read out signal charges of all pixels at every two lines during one field period and to output the same as dot-sequential two-channel pixel signals (color signals). The two-channel output signals from the CCD solid state image pickup device 9 are supplied through a CDS (correlated double sampling) circuit (not shown) and a sample and hold circuit (not shown) to a carrier level balancing circuit 10 according to the present invention. In the carrier level balancing circuit 10, the two-channel signals are converted into digital signals by A/D (analog-to-digital) converters 11, 12, latched by latch circuits 13, 14 which latch data of one pixel and then input to multipliers 15, 16. The multipliers 15, 16 are supplied with carrier balance coefficients a/b and c/d which are set by a coefficient setting circuit 17 and which are alternately output from the coefficient setting circuit 17 under the control of a change-over switch 18. Thus, the carrier balance coefficients a/b and c/d are respectively multiplied to the two-channel pixel signals by the multipliers 15 and 16. The change-over switch 18 is changed in position in response to a switching frequency of 2fsc when a sampling frequency of the two-channel pixel signals is set to 4fsc where fsc is the color sub-carrier frequency of the color signal. The coefficient setting circuit 17 sets carrier balance coefficients a, b, c, and d corresponding to color signals Gr, Ye, Cy and Gb in response to a color temperature information calculated on the basis of the output signal from the CCD solid state image pickup device 9, for example. By way of example, the coefficient setting circuit 17 sets the respective carrier balance coefficients a, b, c and d such that, when a color temperature is 3200°K, a relation expressed as G : Ye : Cy = 1.0 : 1.5 : 2.5 (G = Gr = Gb) is established and that, when the color temperature is 5300°K, a relation expressed as G : Ye : Cy = 1.0 : 2.0 : 2.0 (G = Gr = Gb) is established. The two-channel pixel signals (a*Gr/b*Ye, c*Cy/d*Gb) that were multiplied with the carrier balance coefficients a/b and c/d are latched by one-bit latch circuits 19, 20 and then added with each other by an adder 21. By this adding processing in the adder 21, pixel signals of two pixels adjacent in the vertical direction are added. An added output from the adder 21 is added with an added output of one pixel before latched in a latch circuit 23 by an adder 22. By this adding processing in the adder 22, the pixel signals of adjacent four pixels in the vertical and horizontal directions are added with one another while the color filter array shown in FIG. 2 is taken as a basic unit, and thereby being output as a luminance signal Y. The luminance signal Y at that time is constructed by the following equation: Y = a*Gr + b*Ye + c*Cy + d*Gb As described above, in the carrier level balancing circuit for a color camera formed of the CCD solid state image pickup device 9 of all pixel separately read out type, the independent carrier balance coefficients a, b, c, d are multiplied to the respective color signals from the CCD solid state image pickup device 9 at every lines (Gr/Ye/ and Cy/Gb lines) while these coefficients a, b, c, d are being switched in a dot-sequential fashion in response to the switching clock having the frequency of 2fsc and the values of these coefficients a, b, c, d are set in response to the color temperature information, whereby carrier levels can be balanced at all sorts of color temperatures. Accordingly, the carrier levels of the respective pixel signals are balanced so that the levels of all carriers of the color signals Gr, Ye, Cy and Gb become the same as shown in FIG. 3. Thus, in the luminance signal Y formed of the four pixels, the color aliasing signals can be canceled completely in the vertical, horizontal and oblique directions. FIG. 4 is a block diagram showing another embodiment of the present invention. In FIG. 4, like parts corresponding to those of FIG. 1 are marked with the same references and therefore need not be described in detail. As shown in FIG. 4, in a carrier level balancing circuit 40 according to this embodiment, the two-channel pixel signals Gr/Ye and Cy/Gb output from the CCD solid state image pickup device 9 are switched by change-over circuits 24, 25 in response to the switching clock having the frequency 2fsc and thereby converted into respective color signals of Gr/Gb lines and Cy/Ye lines. These color signals are constantly multiplied with the same carrier balance coefficient a by the multiplier 15 with respect to the Gr/Gb lines because the signals Gr and Gb are considered to be the G signals of the same level. On the other hand, these color signals are respectively multiplied with independent carrier balance coefficients b and c by the multiplier 16 with respect to the Cy/Ye lines in a dot-sequential fashion. These carrier balance coefficients a, b and c are set by a coefficient setting circuit (not shown) in response to the color temperature information. The multiplied results are added by the adder 21 and the added output from the adder 21 is added with an added output of one pixel before latched by the latch circuit 23 by the adder 22 which thus derives the luminance signal Y. The luminance signal Y at that time is constructed by the following equation: Y = a*(Gr + Gb) + b*Ye + c*Cy According to the circuit arrangement shown in FIG. 4, it is sufficient to provide three carrier balance coefficients a, b and c that are set in response to the color temperature information. According to the second embodiment of the present invention, the carrier levels of respective color signals can be balanced at all sorts of color temperatures similarly to the first embodiment. Therefore, the color aliasing signals can be completely canceled in the vertical, horizontal and oblique directions. While the carrier level balancing circuit of the present invention is applied to the luminance signal processing as described above, the present invention is not limited thereto and the same circuit arrangement of this carrier level balancing circuit can be applied to an aperture control signal that controls an aperture correcting circuit for correcting a high frequency component signal from a circuit standpoint or the like. Therefore, the processing of the aperture control signal in which the color aliasing signal can be prevented from occurring becomes possible. As described above, according to the present invention, in the carrier level balancing circuit for a color camera formed of the solid state image pickup device of all pixel separately read out type, the coefficients that are independently set in response to the color temperature information are multiplied to the two-channel color signals output from the solid state image pickup device while the respective coefficients are being switched in a dot-sequential fashion thereby to balance carrier levels. Thus, if a luminance signal and an aperture control signal, etc., are generated from these signals whose carrier levels were balanced, there is then the effect that the color aliasing signals of these luminance and aperture control signals can be completely canceled in the vertical and horizontal directions. Furthermore, the two-channel color signals output from the solid state image pickup device are converted into the color signal formed by a combination of pixels of the same color and the color signal formed by a combination of pixels of different colors. Then, the same coefficient is constantly multiplied to these color signals with respect to the line formed of a combination of the pixels of the same color and the independent coefficients are multiplied to these color signals with respect to the line formed of a combination of the pixels of different colors in a dot-sequential fashion thereby to balance carrier levels. Therefore, in addition to the above-mentioned effect, there can be achieved the effect such that only three carrier balance coefficients are set.

Claims: A carrier level balancing circuit for a color camera formed of a solid state image pickup device in which signal charges of all pixels are separately read out at every two lines during one field period and dot-sequential two-channel color signals are output in the basic unit, and summing means are provided for summing color components within said basic unit in order to compose a luminance signal, said carrier level balancing circuit being characterized by further comprising: a first multiplier (15) for alternately multiplying in a dot-sequential fashion one of said dot-sequential two-channel color signals with first and second coefficients (a, b) set in association with respective said color signals (Gr, Ye) in response to a color temperature information at the unit of pixel; a second multiplier (16) for alternately multiplying in a dot-sequential the other of said dot-sequential two-channel color signals with third and fourth coefficients (c, d) set in association with respective said color signals (Cy, Gb) in response to a color temperature information at the unit of pixel; and said summing means comprises first and second adding circuits (21, 22) for adding said two-channel color signals from said first and second multipliers (15, 16) first by two adjacent pixels in vertical direction and then by four adjacent pixels in vertical and horizontal directions to compose a level-balanced signal. The carrier level balancing circuits for a color camera according to claim 1, wherein one of said two-channel color signals is formed of a dot-sequential color signal of green and yellow. The carrier level balancing circuit for a color camera according to claim 1, wherein the other of said two-channel color signals is formed of a dot-sequential color signal of cyan and green. A carrier level balancing circuit for a color camera formed of a solid state image pickup device in which signal charges of all pixels are separately read out at every two lines during one field period and dot-sequential two-channel color signals are output in the basic unit, and summing means are provided for summing color components within said basic unit in order to compose a luminance signal, said carrier level balancing circuit being characterized by further comprising: switching means (24,25) for converting said dot-sequential two-channel color signals into a first dot-sequential color signal (Gr, Gb) formed of a combination of pixels of the same color and a second dot-sequential color signal (Cy, Ye) formed of a combination of pixels of different colors; a first multiplier (15) for multiplying said first dot-sequential color signal (Gr, Gb) with a first coefficient (a) in response to a color temperature information; a second multiplier (16) for multiplying said second dot-sequential color signal (Cy, Ye) with independent second and third coefficients (b,c) in a dot-sequential fashion in response to a color temperature information at the unit of pixel; and said summing means comprises first and second adding circuits (21, 22) for adding outputs of said first and second multipliers (15, 16) first by two adjacent pixels in vertical direction and then by four adjacent pixels in vertical and horizontal directions to compose a level-balanced signal. A carrier level balancing circuit according to claim 4, wherein said first dot-sequential color signal is formed of green signals (Gr, Gb) of lines different from each other. The carrier level balancing circuit for a color camera according to claim 4, wherein said second dot-sequential color signal is formed of cyan and yellow signals (Cy, Ye) of lines different from each other.

Inventors: WAKAGI TORU, YAGI OSAMU, WAKAGI, TORU, YAGI, OSAMU
Applicants: SONY CORP, SONY CORPORATION
Application year: 1993
Main classification: H04N9
IPC codes: H04N9, H04N5