A digital mobile radio receiver

Abstract: A digital mobile radio receiver comprising a limiter amplifier (22), an orthogonal detector (23), a low pass filter (24,25), an A/D converter (26,27) and a digital signal processing unit (30), additionally having a head amplifier (31,32) able to vary a gain between said low pass filter (24,25) and said A/D converter (26,27) and a gain control unit (33) controlling a gain of said head amplifier (31,32) according to a command from said digital signal processing unit (30).

Description: The present invention relates to a digital mobile radio receiver, especially a receiver using a limiter amplifier. A receiving unit of a conventional digital mobile receiver, as shown in Fig.6 (or WO-A-92/02 991 Fig.7), comprises the intermediate frequency filter 1 to restrict a band, the limiter amplifier 2 to amplify and restrict an amplitude for the output of the intermediate frequency filter 1, the orthogonal detector 3 orthogonally detecting and outputting I and Q components, the low pass filters 4 and 5 removing useless waves from I and Q components, the A/D converters 6 and 7 converting an output of the low pass filters to a digital value, and the digital signal processing unit 8 regenerating a received signal. In the above-mentioned composition, the intermediate frequency filter 1 restricts a band for the intermediate frequency signal IF 0 and outputs the output IF 1 as the intermediate frequency filter 1. Next the limiter amplifier 2 amplifies the output IF 1 and restricts the amplitude thereof, and outputs the output IF 2 as the limiter amplifier 2. Then the orthogonal detector 3 orthogonally detects the output IF 2 and outputs I 0 as the I component and Q 0 as the Q component. Continuously these outputs I 0 and Q 0 come to be the outputs I 1 and Q 1 of the low pass filters 4 and 5 after useless waves thereof are respectively removed by the low pass filters 4 and 5. And the A/D converters 6 and 7 convert these outputs I 1 and Q 1 to the digital values from the analog values and output the outputs I 2 and Q 2 as the outputs of the respective A/D converters, and the outputs I 2 and Q 2 are given the digital signal process by the digital signal processing unit 8 to be regenerated In this composition, however, if an interfering wave is involved in the output IF 1 of said intermediate frequency filter, said limiter amplifier 2 is saturated and the amplitude is restricted by the bigger amplitude between the interfering wave and the desired wave, so that the output IF 2 of said limiter amplifier is always kept at a fixed amplitude. Consequently, if the amplitude of the interfering wave is bigger than that of the desired one, the limiter amplifier 2 is saturated by the interfering wave and outputs IF 2 without amplifying sufficiently the amplitude of the desired wave. And when the output IF 2 of the limiter amplifier 2 is inputted to the detector 3 with this state, if the detector 3 is of a linear type, the desired wave component of the outputs I 0 and Q 0 of the detector 3 receives more deterioration for the insertion loss. As the result, there has been a problem that if the interfering wave component is removed from the outputs I 0 and Q 0 of the detector 3 by the low pass filters 4 and 5, the input level of the outputs I 1 and Q 1 of the low pass filters 4 and 5, of which desired wave component inputted to the A/D converters 6 and 7, absolutely degrades. So that, the effective resolution of the received wave goes down, and the degradation of the receiving characteristic of the receiver occurs. US-A-5 001 776 discloses a communication system with adaptive transceivers to control intermodulation distortion. The object of this invention is to offer a digital mobile radio receiver with improved a deterioration of a receiving characteristic. The object is accomplished with the features of the claims. The digital mobile radio receiver according to the invention has a head amplifier able to vary a gain installed between a low pass filter and an A/D converter, and by controlling the gain for this head amplifier according to the command from the digital signal processing unit, the input level of the A/D converter can be always made steady, and the deterioration of the effective resolution of the receiving can be improved. FIG.1 is a block diagram with necessary parts of an embodiment of the digital mobile radio receiver of the present invention. FIG.2 is a circuit diagram showing a circuit comprising a head amplifier able to vary a gain and a gain control unit. FIG.3 is a figure to describe an operation of the embodiment in FIG.1. FIG.4 is a flowchart diagram showing an operation of the digital signal processing unit in FIG.1. FIG.5 is a figure showing an example of a maximum value of an input level into an A/D converter. FIG.6 is a block diagram with necessary parts of a conventional digital mobile radio receiver. Figs.1 to 5 show an embodiment of a digital mobile radio receiver by the present invention. Fig.1 shows a block diagram with necessary parts of an embodiment of a digital mobile radio receiver of the present invention, Fig.2 shows a circuit diagram showing a circuit comprising a head amplifier able to vary a gain and a gain control unit, Fig.3 is a diagram to definitely describe an operation of the embodiment in Fig.1, Fig.4 is a flowchart showing an operation of a digital signal processing unit, and Fig.5 is a figure showing an example of a maximum value of an input level to an A/D converter. In each of the figures, 21 is an intermediate frequency filter, 22 is a limiter amplifier, 23 is an orthogonal detector, 24 and 25 are low pass filters, and 26 and 27 are A/D converters. Now the components of these parts are the same as the conventional one as described in Fig.6, so that the detailed description is omitted. 30 is a digital signal processing unit, 31 and 32 are head amplifiers, and 33 is a gain control unit. The characteristic of this embodiment is that the head amplifier 31 able to vary a gain is installed between the low pass filter 24 and the A/D converter 26, and also the head amplifier 32 able to vary a gain is installed between the low pass filter 25 and the A/D converter 27, respectively. And the digital signal processing unit 30 commanding the gain control unit 33 to provide the gain information of the head amplifiers 31 and 32 and the gain control unit 33 controlling the gain of the head amplifiers 31 and 32 according to the command from the digital signal processing unit 30 are installed. And as shown in Fig.2 the circuit A comprising the head amplifiers 31 and 32 and the gain control unit 33 is comprised of the operational amplifier 41 and the variable resistor 42, to be able to restrict a gain of the operational amplifier by the variable resistor 42. More, the digital signal processing unit 30 is comprised of a digital signal processor memorizing in the memory a program to estimate a maximum value of the input to the A/D converters 26 and 27 based on the output level of the A/D converters 26 and 27, decide whether the input level to the A/D converters 26 and 27 is adequate or not based on the maximum value of the input, and command the gain control unit 33 to provide the adequate gain information according to the decision information. The digital signal processor has the excellent high speed performance, and the advantage to be able to easily change the count number and so on of the digital signal processing unit 30 by modifying the program as described as below. Now, if comprising as above, the outputs I 2 and Q 2 of the A/D converters 26 and 27 are respectively read by the digital signal processing unit 30. The digital signal processing unit 30 estimates a maximum value of the input to the A/D converter by the outputs I 2 and Q 2 of the A/D converters 26 and 27, decides, based on the maximum value of the input, whether the levels of the inputs I 1 ' and Q 1 ' to the A/D converters 26 and 27 are adequate or not. If the levels are not adequate the digital signal processing unit 30 commands the gain control unit 33 to provide the adequate information about the gain. Next, the gain control unit 33 controls the gain of the head amplifiers 31 and 32 based on the command from the digital signal processing unit 30. And the outputs I 1 and Q 1 of the low pass filters 24 and 25 are inputted to the head amplifiers 31 and 32, amplified at an adequate level, and outputted as the outputs I 1 ' and Q 2 ', so that the level of the inputs I 1 ' and Q 2 ' to the A/D converters 26 and 27 are always and adequately kept. The definite operation of the embodiment is described as follows. Fig.3A shows a case to input the output IF 1 of the intermediate frequency filter with only the desired wave to the limiter amplifier 22, and Fig.3B shows another case to input the output IF 1 of the intermediate frequency filter with the interfering wave of which amplitude is bigger than the desired wave to the limiter amplifier 22. Now in Fig.3, only the I component is shown after orthogonally detection, and D shows the desired wave spectrum and U shows the interfering wave spectrum, respectively. For Fig.3A only the desired wave exists in the output IF 1 of the intermediate frequency filter, so that the limiter amplifier 22 is saturated by the desired wave. Therefore the output IF 2 of the limiter amplifier 22 is outputted with the state that the desired wave is amplified up to the amplitude restriction. After that the output IF 2 of the limiter amplifier 22 is inputted to the orthogonal detector 23 and comes to be the output I 0 of the orthogonal detector 23, and further the output I 0 of the orthogonal detector 23 is inputted to the low pass filter 24 and comes to be the output I 1 of the low pass filter 24. Then the interfering wave component is not involved in the output I 0 of the orthogonal detector 23, so that the output I 1 comes to be same in wave form as the output I 0 of the orthogonal detector 23, and also receives the amplitude attenuation only for the insertion loss of the low pass filter 24. Accordingly the output I 1 of the low pass filter 24 is an ideal signal and also not necessarily amplified by the head amplifier 31, so that this state is made as a standard and the gain of the head amplifier 31 is made 1. On the other hand, as like in Fig.3B, if inputting the output IF 1 of the intermediate frequency filter containing an interfering wave of which amplitude is bigger than the desired wave, the limiter amplifier 22 is saturated by the interfering wave. Therefore the output IF 2 of the limiter amplifier 22 is outputted without amplified sufficiently for the desired wave. The desired wave spectrum D and interfering wave spectrum U in the output IF 2 of the limiter amplifier in Fig.3B show a figure of said state (one unable to amplify sufficiently for the desired wave). Then the output IF 2 of the limiter amplifier 22 is inputted to the orthogonal detector 23 with this state and comes to be the output I 0 of the orthogonal detector 23, the interfering wave component is removed by the low pass filter 24, and the output I 1 of the low pass filter 24 with only the desired wave component is obtained. However, in the case of Fig.3B, as the limiter amplifier 22 can not amplify sufficiently the amplitude for the desired wave, the level of the output I 1 of the low pass filter 24 is more attenuated than the insertion loss of the low pass filter 24 compared with the level of the output I 0 of the orthogonal detector 23. Therefore the amplitude of the output I 1 of the low pass filter 24 gets smaller compared with the case of Fig.3A. Then, in the present invention, the gain of the head amplifier 31 is made bigger than 1 by the indication cf the gain control unit 33, and the output I 1 ' having an amplified amplitude of the output I 1 of the low pass filter 24 is outputted from the head amplifier. Next, an operation of the digital signal processing unit is described from the estimation of the input I 1 ' level to the A/D converter 26 to the setting gain of the head amplifier 31. Hereupon, in Fig.4, N is a variable counting the number of data reading the outputs I 2 and Q 2 of the A/D converter inputted to the digital signal processing unit 30, No is a number of the reading data that has been predetermined, n is integer, A is the input range of the A/D converter, and a and b are real numbers. First of all, the digital signal processing unit 30 reads the outputs I 2 and Q 2 of the A/D converters 26 and 27, calculates I 2 2 +Q 2 2 based on the outputs I 2 and Q 2 of the A/D converters 26 and 27, and stores the result in the memory. This operation is repeated No times. Then the maximum value X of I 2 2 +Q 2 2 is calculated from the result stored in the memory, and also √X is calculated, and this value √X is to be I 1 ' MAX . Next, the digital signal processing unit 30 starts counting from n=0 until the value of I 1 ' MAX reaches the range of A-na≧I 1 ' MAX >A-(n+1)a. Then it determines n that I 1 ' MAX is in said range and gives the indication to the gain control unit based on this n, so that the gain of the head amplifier becomes 1+nb. As like in Fig.5, for example, assuming that I 1 ' MAX is A-2.5a (a is a proper real number), the digital signal processing unit 30 starts counting from n=0 until I 1 ' MAX reaches the range as A-na≧I 1 ' MAX >A-(n+1)a. In this case, when n=2, the expression A-2a≧I 1 ' MAX (A-2.5a) >A-3a is met. Therefore the digital signal processing unit 30 sends the information to the gain control unit 33 so that the gain of the head amplifier 31 becomes 1+2b. Here b is the constant approximated by A/A-2a ≒ 1+2a/A=1+2b. Thus, in the present invention, a head amplifier able to vary a gain is installed between a low pass filter and an A/D converter, further more by installing a gain control unit to control a gain of the head amplifier according to a command from a digital signal processing unit, an input level of the A/D converter can be kept steady. Accordingly, by the present invention, even if a limiter amplifier is saturated by an interfering wave the received signal can be detected and regenerated by the same resolution as the case without any interfering waves.

Claims: A digital mobile radio receiver comprising a limiter amplifier (22) amplifying an intermediate frequency signal, an orthogonal detector (23) orthogonally detecting an output of the limiter amplifier (22) to output I and Q components, a low pass filter (24, 25) removing useless waves from said I and Q components, an A/D converter (26, 27) converting an output of the low pass filter (24, 25) to a digital value, and a digital signal processing unit (30) receiving an output of the A/D converter (26, 27) comprising: a head amplifier (31, 32) able to vary a gain installed between said low pass filter (24, 25) and said A/D converter (26, 27); and a gain control unit (33) controlling a gain of said head amplifier (31, 32) according to a command from said digital signal processing unit (30). The digital mobile radio receiver of claim 1, having a circuit comprised of the head amplifier able to vary a gain and the gain control unit comprising: an operational amplifier (41); and a variable resistor (42). The digital mobile radio receiver of claim 1 or 2, wherein the digital signal processing unit (30) comprises: a digital signal processor memorizing in a memory a program to estimate a maximum value of an input to an A/D converter based on an output level of the A/D converter, decide whether the input level to the A/D converter is adequate or not based on the maximum value of the input, and command the gain control unit to provide an adequate gain information according to the decision information.

Inventors: HASHIMOTO KAZUYA, HASHIMOTO, KAZUYA, HASHIMOTO, KAZUYA C/O NEC CORP.
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1993
Main classification: H04B1
IPC codes: H04B7, H04B1, H03D3, H03G3