Job execution method in multi-CPU system

Abstract: Each CPU registers jobs of its own in the form of nodes in a normal node queue, executes the registered jobs in a registration order, has a queue (remote node queue) for registering a job requested by another CPU in the form of a node, and executes the remote nodes in a registration order as in the normal nodes. When the first CPU causes the second CPU to execute a job, the first CPU transmits the job in the form of a node processed by the second CPU. The second CPU registers the received node in the remote node queue and executes it as in the normal node. The second CPU sends back, to the first CPU, the processing result of the received node in the form of a node processed by the first CPU, as needed.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a job execution method in which one CPU causes another CPU to execute a job in a multi-CPU system. Related Background Art In a conventional system of this type, when the first CPU causes the second CPU to execute a processing step, also referred to as a job, the first CPU converts a job to be executed into a program in accordance with a predetermined format and transmits the program to the second CPU. The second CPU which has received this program decodes and executes the transmitted job in accordance with a predetermined format. The execution result is processed into a form in accordance with a predetermined format, if necessary. The result is sent back to the first CPU as the job transmission source. That is, on the transmission side in this conventional method, the job must be processed into a transmission format. On the reception side, the information received in the transmission format must be decoded. In addition, when the first CPU causes the second CPU to execute the job, a necessary transmission statement must be contained in the program. Such a system is described in WO-A-92/01990. Since a programmer must write a necessary communication statement in the program, the load of the programmer is undesirably increased. The present invention eliminates a necessary complicated inter-CPU communication statement in a program prepared by a programmer in a system in which one CPU can cause another CPU to execute the job. The present invention is also concerned with reducing the program size of each CPU in a system in which one CPU can cause another CPU to execute the job. An embodiment of the present invention reduces the program size of each CPU and increase the program execution speed in a system in which one CPU can cause another CPU to execute the job. According to one aspect, the present invention comprises a processing method in a multi-CPU system as set out in claim 1. According to a second aspect of the present invention there is provided a multi-CPU system as set out in claim 8. Other features and advantages of the present invention shall be apparent to those skilled in the art from the description of a preferred embodiment of the invention which follows. In the description, reference is made to the accompanying drawings, which form a part thereof, and which illustrate an example of the invention. Such example, however, is not exhaustive of the various embodiments of the invention, and therefore reference is made to the claims which follow the description for determining the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view for explaining communication processing between CPUs in an embodiment; Fig. 2 is a block diagram showing the arrangement of a multi-CPU system; Fig. 3 is a block diagram showing the arrangement of each CPU; Fig. 4 is a view showing states of node and remote queues; and Fig. 5 is a flow chart of processing when one CPU causes another CPU to execute a job. DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 1 is a view for explaining communication processing, between CPUs according to an embodiment of the invention. Referring to Fig. 1, a CPU A 11 is a single-CPU system. In this embodiment, the CPU A 11 serves as a job transmission source CPU for transmitting a job to another CPU. A CPU B 16 is a single-CPU system and serves as a CPU for executing a remote node transmitted from the CPU A 11 and sending back the execution result to the CPU A 11. A job 12 is set in the CPU A 11 and is to be executed by the CPU B 16. A job 13 is a job sent back from the CPU B 16 and is executed by the CPU A 11. Remote node data 14 is sent back from the CPU A 11 to the CPU B 16. "Remote node data" is intended to cover instructions for a step or set of steps as described hereinafter. Remote node data 15 is sent back from the CPU B 16 to the CPU A 11. A remote node 17 is transmitted from the CPU A 11 so as to be executed by the CPU B 16. A job 18 represents a result obtained by executing the remote node 17 in the CPU B 16 and is to be transmitted to the CPU A 11. In the information processing apparatus having the above arrangement, when the CPU A 11 detects a step to be executed by the CPU B 16 during execution of a step registered in a normal node queue, a remote node transmission unit (formed by the function of the CPU A 11) generates remote node data 14 to be executed by the CPU B 16 and transmits the generated remote node data 14 to the designated CPU B 16. Upon reception of the transmitted remote node 14, the CPU B 16 holds the received remote node in a remote node queue. During sequential execution of steps registered in the normal node queue, the step held in the remote node queue is executed. A remote node response unit sends back an execution result 18 as remote node data 15 to the CPU A 11 as the transmission source. Fig. 2 is a block diagram for explaining the arrangement of a CPU system in which single-CPU systems shown in Fig. 1 are networked. Referring to Fig. 2, a network 21 connects a plurality of CPUs. A CPU C 22 is a single-CPU system and is connected to communicate with the CPU A 11 and the CPU B 16 as other single-CPU systems through the network 21. Fig. 3 is a block diagram for explaining the arrangement of each single-CPU system shown in Fig. 2. Referring to Fig. 3, a register or store 32 temporarily stores data or a calculation result. A memory 33 stores a program or data. Programs include a user program and a monitor program. Programs such as a processing sequence (Fig. 5) stored in the memory is sent to a command decoder 34 through a bus 31 and is decoded in the command decoder 34. The decoding result is sent to and executed by a command execution unit 35. Fig. 4 is a view showing states of normal and remote node queues in the CPU B 16 shown in Fig. 1. As shown in Fig. 4, the CPU B 16 sequentially executes steps (nodes) corresponding to step numbers stored in a normal node queue 41. When a remote node is sent from another CPU, this remote node is stored in a remote node registration or store area (not shown), and the corresponding step number is registered in a remote node queue 42. If any step number is registered in the remote node queue 42, the CPU B 16 executes the remote node more preferentially than nodes stored in the normal node queue 41. In this manner, each single-CPU system comprises the remote node queue 42 for storing the step number of a step sent from another single-CPU system. If a step (remote node) is present in the remote node queue 42, the step number of the remote node is read out, and the readout step from another single-CPU system is executed in the same processing sequence as in the steps in the program of its own. Fig. 5 is a flow chart showing the processing sequence of a remote node in the multi-CPU system according to the present invention. Referring to Fig. 5, steps S1, S2, S7, and S8 are executed by the CPU A 11, and steps S3 to S6 are executed by the CPU B 16. In step S1, as shown in Fig. 1, during execution of a normal node, the CPU A 11 detects the job 12 "a=B:b" (a variable b of the CPU B 16 is substituted into a variable a ) and recognizes that a remote node is to be transmitted to the CPU B 16 in order to know the contents of the variable b in the CPU B 16. In step S2, the CPU A 11 transmits the remote node 14 "A:a=b" (the variable b is substituted into the variable a of the CPU A 11) to the CPU B 16. On the other hand, in step S3, the CPU B 16 stores the remote node 14 as the remote node 17 in a node registration area (not shown) and stores the step number corresponding to this node in the remote node queue 42. In step S4, when the CPU B 16 recognizes that the step number is stored in the remote node queue 42, the CPU B 16 executes a node (i.e., the remote node 17) corresponding to the step number stored in the remote node queue 42 more preferentially than the normal node corresponding to the step number stored in the normal node queue 41. In this case, since b = 3, then the CPU B 16 obtains the job 18 "A:a=3" (3 is substituted into the variable a of the CPU A 11). In step S5, the CPU B 16 recognizes necessity of sending a remote node to the CPU A 11 in accordance with the contents of the job 18. In step S6, the CPU B 16 transmits the remote node 15 "a=3" (substitution of 3 into the variable a ) to the CPU A 11. In step 57, the CPU A 11 stores the remote node 15 as the remote node 13 in a node registration area (not shown) and stores a step number corresponding to this node in the remote node queue 42. In step S8, when the CPU A 11 recognizes that the step number is stored in the remote node queue 42, the CPU A 11 executes a node (i.e., the remote node 13) corresponding to the step number stored in the remote node queue 42 more preferentially than the normal node corresponding to the step number registered in the normal node queue 41. As a result, the value "3" as the value of the variable of the CPU B 16 is substituted into the variable a . The job 12 of the CPU A 11 "a=B:b" (substitution of the variable b of the CPU B 16 into the variable a ) is completed. In the above embodiment, a plurality of step numbers of the steps to be executed next are stored in the form of queues. In this case, step numbers associated with a plurality of processing operations are stored in a single queue in one CPU, and steps corresponding to the step numbers are executed in a registration order, thereby realizing pseudo parallel processing. However, if one processing operation is to be performed in one CPU, only the next step number need be stored. In the above embodiment, when a remote node is stored, it is executed more preferentially than a normal node. However, the processing of the present invention is not limited to this. For example, a normal node may be executed more preferentially than a remote node, or the priority order of nodes may be predetermined, and execution may be performed in accordance with this priority order. In the above embodiment, a remote node is executed as a step because the step is the minimum unit of processing in a program. However, in a program having a hierarchidal structure in which a set of steps constitute a subprogram, and a set of subprograms constitute a program, a remote node may be executed for each subprogram or program. In the above embodiment, as indicated by the job 12, the remote node 17, and the job 18, the name of another CPU system to which a given variable belongs is assigned to the given variable. However, this assignment is not essential in the present invention. A table representing a correspondence between variable names and CPU names to which the variables belong may be prepared in advance, and a monitor program for executing and managing a program automatically determines whether a variable in question is a variable in another CPU. In this manner, a program format in which a programmer does not feel the presence of another CPU can be achieved.

Claims: A method for executing a processing step in a multi-CPU system including a first CPU (11) and at least a second CPU (16) connected to said first CPU, said method characterised by comprising the steps of: causing said first CPU to detect during the execution of a process a first processing step (12) containing a variable which belongs to said second CPU; causing said first CPU to transmit a second processing step (14,17) to said second CPU, requesting said second CPU to substitute a value for the variable in the first processing step, the second processing step being directly executable by said second CPU (S2); causing said second CPU to store in a first queue (42) the second processing step received from said first CPU (S3); and causing said second CPU to execute the second processing step stored in the queue (S4). A method according to claim 1 and including causing said second CPU to return the result of the second processing step to said first CPU. A method according to claim 2, wherein said second CPU stores a plurality of received processing steps in the queue and executes the plurality of processing steps in the reception order. A method according to claim 3, further comprising the steps of: causing said second CPU to store a plurality of processing steps corresponding to another program under execution into a second queue different from the first queue storing the plurality of received processing steps; and causing said second CPU to execute the plurality of processing steps stored in the second queue in the storage order. A method according to claim 4, wherein the processing steps stored in the first queue are preferentially executed when both the first queue and the second queue have processing steps stored in them. A method according to any preceding claim, wherein said first CPU determines whether a variable in a processing step has the name of said second CPU attached so as to detect the first processing step containing the variable which belongs to said second CPU. A method according to any preceding claim, wherein said first CPU comprises a table representing the correspondence between variables and the CPU's to which the variables belong, and said first CPU refers to the table to detect a variable which belongs to said second CPU. A multi-CPU system comprising a first CPU (11) and at least a second CPU (16) connected to said first CPU characterised in that said first CPU adapted to detect during the execution of a process a first processing step (12) containing a variable which belongs to said second CPU and to transmit a second processing step (14,17) for requesting said second CPU to substitute a value for the variable in the first processing step to said second CPU, the second processing step is directly executable by said second CPU, said second CPU being adapted to store in a queue (42) the second processing step received from said first CPU and execute the second processing step stored in the queue. A system according to claim 8, wherein said second CPU is adapted to return the result of said second processing step to said first CPU. A system according to claim 8 or claim 9, wherein said second CPU is adapted to store a plurality of received processing steps in the queue and to execute the plurality of processing steps in the reception order. A system according to any one of claims 8 to 10, wherein said second CPU is adapted to store a plurality of processing steps corresponding to another program under execution in a second queue different from the stored first queue; and said second CPU being adapted to execute the plurality of processing steps stored in the second queue in the storage order. A system according to claim 11, wherein said second CPU preferentially executes the processing steps stored in the first queue when both the first queue and the second queue have processing steps stored in them. A system according to any one of claims 8 to 12, wherein said first CPU is adapted to determine whether a variable in a processing step has the name of said second CPU attached so as to detect the first processing step containing the variable which belongs to said second CPU. A system according to any one of claims 8 to 13, wherein said first CPU comprises a table representing the correspondence between variables and the CPU to which the variables belong, and said first CPU refers to the table to detect a variable which belongs to said second CPU.

Inventors: ASADA SATOSHI, KADOSAWA TSUNEAKI, KOGA EIJI, NAKAMURA TAKASHI, WATANABE HITOSHI, ASADA, SATOSHI, KADOSAWA, TSUNEAKI, KOGA, EIJI, NAKAMURA, TAKASHI, WATANABE, HITOSHI, Asada, Satoshi, c/o Canon Kabushiki Kaisha, Kadosawa, Tsuneaki, c/o Canon Kabushiki Kaisha, Koga, Eiji, c/o Canon Kabushiki Kaisha, Nakamura, Takashi, c/o Canon Kabushiki Kaisha, Watanabe, Hitoshi, c/o Canon Kabushiki Kaisha
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1993
Main classification: G06F9
IPC codes: G06F9, G06F13, G06F15