Motor speed control apparatus

Abstract: A motor control apparatus controls a motor speed according to a detected period of a frequency signal whose frequency is in proportion to the motor speed and drives the motor so as to keep its speed fixed according to a drive signal. The motor control apparatus includes a disturbance torque observer receptive to the drive signal and the detected period which produces a estimated disturbance signal corresponding to a conversion of a disturbance torque into an electrical signal. A comparator produces a period error signal which is a difference between the detected period and a desired period. An arithmetic unit produces the control signal in accordance with the period error signal. A torque correcting unit produces the drive signal by adding the estimated disturbance signal to the control signal.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a motor control apparatus for controlling the speed of a motor. More particularly, the invention relates to a motor control apparatus capable of eliminating the influence of a disturbance torque. 2. Description of the Prior Art A control apparatus of a capstan motor or a drum motor used in a VCR must keep the speed of the motor fixed. FIG. 11 is a schematic block diagram of a conventional speed control loop of such a motor. In FIG. 11, element 100 is a capstan motor or a drum motor used in a VCR; element 110 is a frequency generator for generating a frequency signal FG, whose frequency is in proportion to the speed of the motor 100; element 120 is a period detector for detecting the period of the frequency signal FG; element 130 is a comparator for calculating a period error ΔT FG , which is the difference between an inputted desired period T r and the detected period T FG from the period detector 120; element 140 is an arithmetic unit for calculating a control signal c which is, for example, equal to ( K p + K i / s )· ΔT FG , wherein K p is a proportional gain, K i is an integral gain and s is a Laplacian; element 150 is a motor drive circuit for supplying the motor 100 with a drive current I a according to the control signal c . In the control loop of FIG. 11, a disturbance torque, which is caused by tape transportation, motor torque ripple, external vibration and so on, is applied to the motor 100. The influence of the disturbance torque appears as a fluctuation in the motor speed. Even though a fluctuation in speed is produced by the disturbance, the overall control loop acts in a direction to reduce the fluctuation in speed. The higher the gain of the control loop, the greater the degree to which the disturbance is suppressed. However, there is a limit to the gain, for the overall system will fall into an oscillatory state if the control loop gain is made too high. In other words, if the disturbance torque is large, the fluctuation in motor speed cannot be suppressed sufficiently because the degree of suppression cannot be raised. Recently, various motor control apparatus, which are capable of suppressing the influence of the disturbance torque by using a disturbance torque observer, have been proposed. For example, one of such apparatus is described in "A Robust Decentralized Joint Control Based on Interference Estimation," Proc. IEEE Int. Conference, Robotics and Automation, vol.1, 326-331 (1987). In such apparatus, a disturbance torque observer estimates the disturbance torque applied to a motor according to the speed of the motor and the drive command fed to the motor. The drive command is corrected in accordance with the estimated disturbance torque from the disturbance torque observer. As the result of the correction, the influence of the disturbance torque is cancelled and a fluctuation in the motor speed is eliminated. However, as shown in FIG. 11, a motor control apparatus used in a VCR keeps the speed of the motor fixed by reducing to zero the difference between the desired period T r and the detected period T FG . Therefore, the conversion of the detected period into a speed is necessary for applying the conventional disturbance torque observer to a motor control apparatus used in a VCR. This conversion makes the hardware or an operation sequence of a software program used for the motor control complicated. Furthermore, it is difficult to realize a process of estimating the disturbance torque according to the conventional disturbance torque observer with such a processor as used in a VCR for home-use, whose performance characteristics are not very high, because the constitution of the conventional torque observer is complex. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a motor control apparatus having a simpler disturbance torque observer, which is suitable for a VCR and which makes it possible to sufficiently suppress a fluctuation in motor speed due to a disturbance torque. To attain the foregoing object, a motor control apparatus in accordance with the present invention is provided with the features of Claims 1 and 9. Consequently, a motor control apparatus provided by the present invention can be easily applied to a conventional motor control apparatus which keeps a motor speed fixed by reducing to zero the difference between a detected period of the frequency signal and a desired period. Furthermore, since the torque correcting unit acts to cancel the influence of the disturbance torque, a motor control apparatus in accordance with the present invention makes it possible to sufficiently suppress a fluctuation in motor speed due to a disturbance torque. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic block diagram of a first embodiment of a motor control apparatus according to the present invention; FIG. 1B is a block diagram of a disturbance torque observer according to the first embodiment; FIG. 2A is a schematic block diagram of a second embodiment of a motor control apparatus according to the present invention; FIG. 2B is a block diagram of a disturbance torque observer according to the second embodiment; FIG. 3 is a block diagram of a disturbance torque observer according to a third or a fourth embodiment of the present invention; FIG. 4A is a flowchart illustrating the operation sequence of the third embodiment; FIG. 4B is a detailed flowchart illustrating the operation sequence of the disturbance torque observer according to the third embodiment; FIG. 5A is a flowchart illustrating the operation sequence of the fourth embodiment; FIG. 5B is a detailed flowchart illustrating part of the operation sequence of the disturbance torque observer according to the fourth embodiment; FIG. 5C is a flowchart illustrating the remaining part of the operation sequence of the disturbance torque observer according to the fourth embodiment; FIG. 6 is a block diagram of a disturbance torque observer according to a fifth embodiment of the present invention; FIG. 7A is a flowchart illustrating the operation sequence of the fifth embodiment; FIG. 7B is a detailed flowchart illustrating part of the operation sequence of the disturbance torque observer according to the fifth embodiment; FIG. 7C is a flowchart illustrating the remaining part of the operation sequence of the disturbance torque observer according to the fifth embodiment; FIG. 8 is a flowchart illustrating the operation sequence of a sixth embodiment of the present invention; FIG. 9 is a schematic block diagram of a seventh embodiment of a motor control apparatus according to the present invention; FIG. 10A is a flowchart illustrating the operation sequence of the seventh embodiment; FIG. 10B is a flowchart illustrating the operation sequence of the disturbance torque observer according to the seventh embodiment when a period error is out of fixed bounds; and FIG. 11 is a block diagram of a prior art motor control apparatus used in a VCR. DESCRIPTION OF THE PREFERRED EMBODIMENTS The following is a description of the first embodiment of this invention. In FIG. 1A, element 100 is a motor; element 110 is a frequency generator for generating a frequency signal FG, whose frequency is proportional to the speed of the motor 100; element 120 is a period detector, which detects the period of the frequency signal FG; element 130 is a comparator for calculating a period error ΔT FG , which is the difference between a desired period T r and the detected period T FG outputted by the period detector 120; element 140 is an arithmetic unit for calculating the control signal c in accordance with the period error ΔT FG ; element 150 is a motor drive circuit for supplying the motor 100 with a drive current I a according to the drive signal D ; element 1 is a disturbance torque observer for calculating a estimated disturbance torque signal d 1 ; element 10 is a torque correcting unit for correcting the control signal c according to the estimated disturbance torque d 1 and for outputting the result as the drive signal D . The first embodiment of this invention shown in FIG. 1A operates as follows: A disturbance torque τ d is applied to the motor 100. The period detector 120 detects the period of the frequency signal FG generated by the frequency generator 110. The comparator 130 subtracts the detected period signal T FG from a desired period T r (constant value) and outputs the result of the subtraction as the period error ΔT FG . The arithmetic unit 140 calculates the control signal c , which is, for example, calculated so as to be equal to ( K p + K i / s )· ΔT FG , wherein K p is a proportional gain, K i is an integral gain and s is a Laplacian. The torque correcting unit 10 adds the control signal c to the estimated disturbance signal d 1 outputted by the disturbance torque observer 1 and outputs the result of the addition as the drive signal D . The operation of the disturbance torque observer 1 in calculating the estimated disturbance signal will be explained later. The drive circuit 150 supplies the drive current I a to the motor 100 according to the drive signal D . According to these processes, the speed of the motor 100 is controlled so as to reduce the period error to zero. In other words, the speed of the motor 100 is kept fixed. If the estimated disturbance signal is zero, these processes are substantially same as those of the conventional motor control apparatus shown in FIG. 11. In FIG. 1B, element 11 is a gain setting unit for setting the gain to a constant K ; element 12 is a first adder; element 13 is a second adder and element 14 is a first-order low-pass filter, whose transfer function is: ω o /( s + ω o ) , wherein ω o is a cut-off angular frequency. The constant K is represented as follows: K = ω o · J K t · 1 K amp · 2π Z · 1 T 2 r wherein J represents the inertia of the motor 100, K t is a torque constant, K amp is the gain of the drive circuit 150, and Z is the number of the pulses per revolution generated by the frequency generator 110. The disturbance torque observer 1 shown in FIG. 1B acts as follows: The detected period T FG from the period detector 120 is multiplied by the constant K . The result of the multiplication is subtracted from the drive signal D by the first adder 12. The output of the first adder is supplied the low-pass filter 14. The second adder 13 adds the output of the low-pass filter 14 to the output of the multiplication and outputs the result of the addition as the estimated disturbance signal d 1 . As mentioned above, the estimated disturbance signal d 1 is added to the control signal c by the torque correcting unit 10. By this torque correction, the influence of the disturbance torque τ d is cancelled and a fluctuation in the speed of the motor 100 is eliminated. The following is an explanation of the effect of suppressing the influence of the disturbance torque. One can obtain the following equation indicating the relationship between the estimated disturbance d 1 , the detected period T FG and the drive signal D from the block diagram shown in FIG. 1B: where d 1 , D and T FG are s -domain functions. One can then assume that x ( t ) represents the time-domain function of the detected period and that y ( t ) represents the time-domain function of the angular speed of the motor 100. Namely, One assumes as follows: T FG = £{ x ( t )} ω = £{ y ( t )} where £ represents a Laplace transform and ω represents the s -domain function of the speed of the motor 100. The relationship between x ( t ) and y ( t ) is as follows: y ( t ) = 2π Z · 1 x ( t ) Now, as the motor 100 is controlled so as to keep its speed fixed, the detected period x ( t ) is changing in the neighborhood of the desired period T r (constant value). Therefore, the time-differential of Eq. (4) when x ( t ) = T r is as follows: dy dt = - 2π Z · 1 T 2 r · dx dt Taking the Laplace transform of both sides of Eq. (5) results in the following equation using Eq. (3): s ω = - 2π Z · 1 T 2 r · s T FG Therefore, Eq. (2) becomes as follows using Eq. (6): On the other hand, the relationship between the disturbance torque τ d , the drive signal D and the speed ω of the motor 100 is as follows: τ d = K t K amp D - Js ω where τ d is an s -domain function. Consequently, Eq. (7) becomes as follows using Eq. (8): d 1 = ω o s + ω o · 1 K t · 1 K amp ·τ d Eq. (9) means that the estimated disturbance signal d 1 is equal to the disturbance torque τ d multiplied by the reciprocal of the torque constant K t , the reciprocal of the gain of the drive circuit 150 and the transfer function of the low-pass filter 14. In other words, the estimated disturbance signal d 1 consists of low-frequency components of the conversion signal of the disturbance torque τ d in a dimension of the control signal c . Accordingly, the transfer function G ( s ) from the disturbance torque τ d to the speed ω of the motor 100 in FIG. 1A becomes as follows using Eq. (9): where G c ( s ) represents the transfer function from the disturbance torque τ d to the speed ω in FIG. 11, which is a conventional motor control apparatus. Consequently, the first term of the right side of Eq. (10), namely s /( s + ω o ) , represents the effect obtained by the disturbance torque observer 1. This term represents the transfer function of the first-order high-pass filter, whose cut-off angular frequency is ω o . This means that the disturbance torque observer 1 makes it possible to eliminate a fluctuation in the speed of the motor 100 due to a disturbance torque τ d , which has a frequency which is lower than ω o /(2π). According to a first embodiment of this invention, it is not necessary for the disturbance torque observer to convert the detected period into the motor speed, because the disturbance torque observer can utilize the detected period T FG directly as its input signal. In addition, the disturbance torque observer according to this invention has a simpler configuration than a conventional disturbance torque observer, because this observer is constituted so as to convert the disturbance torque τ d into an electrical signal c directly without the determination of the actual disturbance torque τ d itself. Therefore, it can be easily applied to a motor control apparatus to keep the speed of the motor fixed with respect to the period of the frequency signal. As the result, fluctuations in the motor speed can be eliminated without making the hardware or a software program for the motor control complicated. A second embodiment of this invention is described below. In FIG. 2A, element 2 is a disturbance torque observer according to the second embodiment. Since the other elements are same as those shown in FIG. 1A, a description thereof has been omitted. In FIG. 2B, element 11 is a gain setting unit for setting a gain to a constant K ; element 12 is a first adder; element 13 is a second adder and element 14 is a first-order low-pass filter, whose transfer function is: ω o /( s + ω o ) . As shown in FIG. 2B, the configuration of the disturbance torque observer 2 is the same as that of the disturbance torque observer 1 shown in FIG. 1B. However, the disturbance torque observer 2 is different from the disturbance torque observer 1 in that it uses the period error ΔT FG in place of the detected period T FG . In other words, the disturbance torque observer 2 calculates the estimated disturbance signal d 2 according to the error signal ΔT FG and the drive signal D . The disturbance torque observer 2 shown in FIG. 2B operates as follows: The period error ΔT FG outputted by the comparator 130 is multiplied by the constant K . The result of the multiplication is added to the drive signal D by the first adder 12. The output of the first adder is supplied the low-pass filter 14. The second adder 13 subtracts the output of the low-pass filter 14 from the result of the multiplication and outputs the result of the subtraction as the estimated disturbance signal d 2 . The estimated disturbance signal d 2 is added to the control signal c by the torque correcting unit 10. By this torque correction, the influence of the disturbance torque τ d is cancelled and the fluctuation in the speed of the motor 100 is eliminated. The following is an explanation of the effect of suppressing the influence of the disturbance torque. One can obtain the following equation indicating the relationship between the estimated disturbance signal d 2 , the error signal Δ T FG and the drive signal D from the block diagram of FIG. 2B. where d 2 and Δ T FG are s -domain functions. One can assume that w ( t ) represent the time-domain function of the period error. Namely, one can assume as follows: Δ T FG = £{ w ( t )} and the relationship between x ( t ) and w ( t ) is as follows: w ( t ) = T r - x ( t ) In Eq. (13), since the desired period T r is a constant value, the time differential of the both sides of Eq. (13) results in the following: dw dt = - dx dt On the other hand, as mentioned above, the relationship between the time differential of x and that of y is given by Eq. (5). Therefore, Eq. (14) becomes as follows using Eq. (5): dw dt = 2π Z · 1 T 2 r · dy dt Taking the Laplace transform of both sides of Eq. (15) results in the following equation using Eqs. (3) and (12): s ω = 2π Z · 1 T 2 r · s Δ T FG Therefore, Eq. (11) becomes as follows using Eq. (16): By making a comparison between Eqs. (2) and (11), it is obvious that the estimated disturbance signal d 2 is equal to the estimated disturbance signal d 1 outputted by the disturbance torque observer 1. Accordingly, the relationship between the estimated disturbance signal d 2 and the disturbance torque τ d is represented by the same equation as Eq. (9). From this, according to the second embodiment of this invention, one can obtain the same effect as that of the first embodiment. Furthermore, since the magnitude of the period error Δ T FG is smaller than that of the detected period T FG , the dynamic range of the disturbance torque observer 2 can be narrower than that of the disturbance torque observer 1. The following is a description of the third embodiment of this invention, which is a modification of the second embodiment using a software servo arrangement. The configuration of the third embodiment is same as that of the second one shown in FIG. 2A. In using a software servo arrangement, the operations performed by the period detector 120, the comparator 130, the arithmetic unit 140, the correcting unit 10 and the disturbance torque observer 2 are realized by using a processor which operates according to a software program stored in memory. FIG. 3 shows a block diagram of the disturbance torque observer 2 modified for use with a software servo, namely in which the low-pass filter 14 is digitally emulated. In FIG. 3, element 41 is a gain setting unit for setting a gain to a constant α 1 ; element 45 is a gain setting unit for setting a gain to a constant α 2 ; elements 43 and 46 are delay units for effecting a delay of one sampling time T s , and elements 42 and 44 are adders. The transfer function Q 1 ( z ) of the low-pass filter 14 is given by the following equation: Q 1 ( z ) = α 2 1 + z -1 1 - α 1 z -1 where constants α 1 and α 2 are as follows using the sampling time T s : α 1 = 2 - ω o T s 2 + ω o T s α 2 = ω o T s 2 + ω o T s This transfer function Q 1 ( z ) is obtained by transforming the continuous transfer function of the first-order low-pass filter Q ( s ) = ω o /( s + ω o ) with an s - z transform as follows: s = 2 T s · 1 - z -1 1 + z -1 As this transform is well-known, a description thereof has been omitted. FIG. 4A is a flowchart illustrating the operation sequence of the third embodiment, and FIG. 4B is a detailed flowchart illustrating the operation sequence of the disturbance torque observer 2 shown in FIG. 3. The block 50 determines whether or not the edge of the frequency signal FG has been inputted to the processor. If the edge has been inputted, the operation moves to the next block 51, and if not, the operation returns to the block 50. Namely, the operation of the block 50 is carried out repeatedly until the edge is inputted. The block 51 stores the time when the edge was inputted and calculates the detected period T FG from the difference between this input time and the last input time. This block 51 corresponds to the operation performed by the period detector 120 shown in FIG. 2A. The block 52 calculates the period error Δ T FG by subtracting the detected period T FG from the desired period T r . This block 52 corresponds to the operation performed by the comparator 130 shown in FIG. 2A. The block 53 calculates the estimated disturbance signal d 2 from both the period error Δ T FG and the previously stored memory data M 1 . This block 53 corresponds to the operation performed by the disturbance torque observer 2 shown in FIG. 3. The details of the operation of this block will be described later. The block 54 calculates the control signal c which is the result of servo compensation, for example, both proportional and integral compensation. This block 54 corresponds to the operation performed by the arithmetic unit 140 shown in FIG. 2A. Because how this compensation is realized using a software servo is well-known, the details thereof have been omitted. The block 55 calculates the drive signal D , which is obtained by adding the estimated disturbance signal d 2 to the control signal c . This block 55 corresponds to the operation performed by the correcting unit 140 shown in FIG. 2A. The block 56 stores the drive signal D in memory as the memory data M 1 which is used in the block 53 when the next edge of the frequency signal FG is inputted. This block 56 corresponds to the operation performed by the delay unit 46 shown in FIG. 3. At last, the block 57 provide a D/A (digital to analog) converter with the drive signal D . After the block 57, the operation returns to the block 50. The above operations are carried out repeatedly while being synchronized with the frequency signal FG. On the other hand, the D/A converter provide the drive circuit 150 with a voltage according to the drive signal D . The drive circuit 150 supplies the drive current I a to the motor 100 according to this voltage. As the result, the speed of the motor 100 is controlled so as to reduce the period error to zero and is kept fixed. The following is a description of the operation performed by the block 53. As shown in FIG. 4B, the block 53 consists of the blocks 530-537. The block 530 calculates the digital data a which is the period error Δ T FG multiplied by the constant K . This block 530 corresponds to the operation performed by the gain setting unit 11. The block 531 calculates the digital data b by adding the above mentioned memory data M 1 to the digital data a . This block 531 corresponds to the operation performed by the first adder 12. The block 532 calculates the digital data p which is the memory data M 2 multiplied by the constant α 2 , where M 2 has been previously stored in memory. This block 532 corresponds to the operation performed by the gain setting unit 41. The block 533 calculates the digital data q by adding the digital data b to the digital data p . This block 533 corresponds to the operation performed by the adder 42. The block 534 calculates the digital data v 1 by adding the above mentioned memory data M 2 to the digital data q . This block 534 corresponds to the operation performed by the adder 44. The block 535 stores the digital data v 1 in memory as the memory data M 2 for the blocks 532 and 534 when the next edge of the frequency signal is inputted. This block 535 corresponds to the operation performed by the delay unit 43 shown in FIG. 3. The block 536 calculates the digital data v 2 which is the digital data v 1 multiplied by the constant α 2 . This block 536 corresponds to the operation performed by the gain setting unit 45. At last, the block 537 calculates the estimated disturbance signal d 2 by subtracting the digital data a from the digital data v 2 . This block 537 corresponds to the operation performed by the second adder 13. According to the third embodiment of this invention, one can obtain the same effect as that of the second embodiment, because the disturbance torque observer 2 shown in FIG. 3 is configured so as to act in the same manner as that shown in FIG. 2A. A fourth embodiment of this invention, which is a modification of the third embodiment so as to shorten the time lag due to the operation of the processor, is described below. FIG. 5A is a flowchart illustrating the operation sequence of the fourth embodiment, and FIG. 5B and FIG. 5C are detailed flowcharts illustrating the operation sequence of the disturbance torque observer 2 shown in FIG. 3. Since the configuration of the fourth embodiment is same as that of the third embodiment, a description of the configuration of the fourth embodiment has been omitted and only the operation sequence according to the fourth embodiment is described below. In FIG. 5A, only the block 58 and the block 59 corresponding to the operation performed by the disturbance torque observer 2 shown in FIG. 3 are different from the blocks in FIG. 4A. Therefore, only these blocks are described below. The block 58 calculates the estimated disturbance signal d 2 from both the period error Δ T FG and the previously stored memory data M 1 . The block 59 carries out the operation performed by the disturbance torque observer 2 which isn't carried out by the block 58. The block 58 consists of six blocks as shown in FIG. 5B. Though each block is as mentioned above, the order of the operation sequence is different. At first, the block 530 calculates the digital data a which is the period error Δ T FG multiplied by the constant K . This block 530 corresponds to the operation performed by the gain setting unit 11. The block 531 calculates the digital data b by adding the above mentioned memory data M 1 to the digital data a . This block 531 corresponds to the operation performed by the first adder 12. The block 533 calculates the digital data q by adding the digital data b to the digital data p which has been previously calculated. This block 533 corresponds to the operation performed by the adder 42. The block 534 calculates the digital data v 1 by adding the memory data M 2 , which has been previously stored in memory, to the digital data q . This block 534 corresponds to the operation performed by the adder 44. The block 536 calculates the digital data v 2 which is the digital data v 1 multiplied by the constant α 2 . This block 536 corresponds to the operation performed by the gain setting unit 45. Lastly, the block 537 calculates the estimated disturbance signal d 2 by subtracting the digital data a from the digital data v 2 . This block 537 corresponds to the operation performed by the second adder 13. The block 59 consists of two blocks, namely the blocks 535 and 532. The block 535 stores the digital data q , which is calculated at the block 533, in the memory as the memory data M 2 . This memory data M 2 is used at the block 534 when the next edge of the frequency signal FG is inputted. This block 535 corresponds to the operation performed by the delay unit 43 shown in FIG. 3. The block 532 calculates the digital data p by multiplying the memory data M 2 , which is stored in memory at the previous block 535, by the constant α 2 . This block 532 corresponds to the operation performed by the gain setting unit 41. In a software servo, the time lag due to the operation of the processor causes an inferior servo performance. Therefore, it is necessary to shorten this time lag as much as possible. This problem doesn't occur when using a high-performance processor. However, it becomes serious in using a processor whose operation speed isn't very fast, for example, a servo processor used in a home-use VCR. In the operation sequence illustrated in FIG. 4A or FIG. 5A, this time lag is approximately equal to the time period from the time when the edge of the frequency signal is inputted until the time when the drive signal D is outputted to the D/A converter. On the other hand, in the arithmetic operation of a processor, multiplication generally takes much longer than addition or subtraction. Accordingly, in order to shorten the time lag due to the operation of the processor, it is important to reduce the number of multiplications carried out prior to the drive signal D being outputted. The operation sequence according to the third embodiment shown in FIG. 4A needs three multiplications, which are carried out at the blocks 530, 532 and 536, before the drive signal D is outputted. Among these multiplications, the multiplication at the block 532 can be carried out after the output of the drive signal D . The operation sequence according to the fourth embodiment is so modified. Therefore, according to the fourth embodiment, the inferiority of the servo performance due to the time lag is reduced, because the time lag becomes shorter. It goes without saying that the same effect that is obtained by the third embodiment can be obtained with respect to the suppression of the influence of the disturbance torque. A fifth embodiment of this invention, which is another modification of the second embodiment for use with a software servo, is described below. The configuration of the fifth embodiment is same as that of the second embodiment shown in FIG. 2A. As mentioned before, in using a software servo, the operations performed by the period detector 120, the comparator 130, the arithmetic unit 140, the correcting unit 10 and the disturbance torque observer 2 are realized by using a processor which operates according to a software program stored in memory. FIG. 6 is another block diagram of the disturbance torque observer 2 modified for use with a software servo, namely, in which the low-pass filter 14 is digitally emulated. In FIG. 6, element 61 is a gain setting unit for setting a gain to a constant β 1 ; element 64 is a gain setting unit for setting a gain to a constant β 2 ; element 63 is a delay unit for providing a delay of one sampling time T s . The transfer function Q 2 ( z ) of the low-pass filter 14 is given by the following equation: Q 2 ( z ) = β 2 (1 + z -1 ) 1 - β 1 z -1 where constants β 1 and β 2 are as follows using the sampling time T s : β 1 = 1 - ω o T s β 2 = ω o T s This transfer function Q 2 ( z ) is obtained by transforming the continuous transfer function of the first-order low-pass filter Q ( s ) = ω o /( s + ω o ) with an s - z transform as follows: s = 1 T s · 1 - z -1 z -1 Since this transform is well-known, a description thereof has been omitted. FIG. 7A is a flowchart illustrating the operation sequence of the fifth embodiment. FIG. 7B and FIG. 7C are detailed flowcharts illustrating the operation sequence of the disturbance torque observer 2 shown in FIG. 6. In FIG. 7A, only the block 70 and the block 71 corresponding to the operation performed by the disturbance torque observer 2 shown in FIG. 6 are different from the blocks in FIG. 4A. Therefore, only these blocks are described below. The block 70 calculates the estimated disturbance signal d 2 from both the period error Δ T FG and the previously stored memory data M 1 . The block 71 carries out the operation performed by the disturbance torque observer 2 shown in FIG. 6 which isn't carried out at the block 70. The block 70 consists of two blocks, namely the blocks 700-701, as shown in FIG. 7B. Firstly, the block 700 calculates the digital data a by multiplying the period error Δ T FG by the constant K . This block 700 corresponds to the operation performed by the gain setting unit 11. Then, the block 701 calculates the estimated disturbance signal d 2 by subtracting the digital data a from the previously calculated digital data v 3 . This block 701 corresponds to the operation performed by the second adder 13. The block 71 consists of four blocks, namely the blocks 710-713, as shown in FIG. 7C. Firstly, the block 710 calculates the digital data b by adding the memory data M 1 , which is previously stored in memory, to the digital data a . This block 710 corresponds to the operation performed by the first adder 12. The block 711 calculates the digital data p 1 by multiplying the memory data M 3 , which has been previously stored in the memory, by the constant β 1 . This block 711 corresponds to the operation performed by the gain setting unit 61. The block 712 calculates the digital data v 3 by multiplying the above mentioned memory data M 3 by the constant β 2 . This block 712 corresponds to the operation performed by the gain setting unit 64 and this digital data v 3 is utilized by the block 701 when the next edge of the frequency signal FG is inputted. The block 713 adds the digital data b , which has been already calculated at the block 710, to the digital data p 1 and stores the result of this addition in memory as the memory data M 3 . This memory data M 3 is used at the blocks 711-712 when the next edge of the frequency signal FG is inputted. This block 713 corresponds to the operation performed by the delay unit 63 shown in FIG. 6. According to this operation sequence of the disturbance torque observer of the fifth embodiment, the process of calculating the estimated disturbance signal d 2 becomes much simpler in comparison with that of the fourth embodiment. Although two multiplications are necessary prior to the outputting of the estimated disturbance signal d 2 in the operation sequence of the fourth embodiment, only one multiplication is needed in the operation sequence of this fifth embodiment. According to the fifth embodiment, since the time lag due to the operation of the processor is shortened, the inferior servo performance caused by the time lag is reduced. The following is a description of a sixth embodiment of this invention, which is a modification of the fifth embodiment for reducing the inferiority of the servo performance caused by the operation time lag to a greater degree. FIG. 8 is a flowchart illustrating the operation sequence of the sixth embodiment. The configuration of the sixth embodiment is same as that of the fifth embodiment. In FIG. 8, the blocks 80-81 are added to the operation sequence shown in FIG. 7A. and the other blocks are same as the blocks shown in FIG. 7A, FIG. 7B and FIG. 7C. At first, the estimated disturbance signal d 2 is calculated through the blocks 50, 51, 52 and 70. The operation of these blocks has been already described. Next, at the block 80, the first torque correction is carried out by adding the estimated disturbance signal d 2 to the control signal c , which has been previously calculated and called c n -1 below, and the result is outputted as the drive signal D . This block 80 corresponds to the operation performed by the torque correcting unit 10. At the block 81, the drive signal D is provided to the D/A converter. The D/A converter immediately supplies the drive circuit 150 with a voltage according to this drive signal D . Then, at the block 54, the control signal c , which is called c n below, is calculated. At the block 55, the second torque correction is carried out by adding the estimated disturbance signal d 2 to the control signal c n and the result is outputted as the drive signal D . This block 55 also corresponds to the torque correcting unit 10. At the block 56, the drive signal D calculated at the block 55 and the control signal c n calculated at the block 54 are respectively stored in memory as the memory data M 1 and the control signal c n -1 . Lastly, at the block 57, the drive signal D calculated at the block 55 is again provided to the D/A converter. The D/A converter immediately supplies the drive circuit 150 with a voltage according to this drive signal D . After the operation of the block 57, the operation returns to the block 50. The above operations are carried out repeatedly while being synchronized with the frequency signal FG. On the other hand. The drive circuit 150 supplies the drive current I a to the motor 100 according to the voltage input thereto. As the result, the speed of the motor 100 is controlled so as to reduce the period error to zero and is kept fixed. According to the above-mentioned operation sequence of the third, the fourth and the fifth embodiment, there is a time lag between the time when the calculation of the estimated disturbance signal d 2 has finished and the time when the torque correction of the control signal c is carried out. In other words, the operation time for the calculation of the control signal c at the block 54 becomes the time lag. This time lag causes an inferior servo performance, if it cannot be neglected in comparison with the sampling period. However, the operation sequence of the sixth embodiment of this invention is contrived so as not cause this time lag. In other words, in the operation sequence of the sixth embodiment, the first torque correction is carried out at the block 80 immediately after the calculation of the estimated disturbance d 2 and the drive signal D is outputted. Then, the second torque correction is carried out at the block 55 after the calculation of the control signal c n and the drive signal D is outputted again. As the result, according to the sixth embodiment of this invention, there is no inferiority of the servo performance due to the said time lag even though the operation time for the calculation of the control signal c isn't negligible. A seventh embodiment of this invention, which is a modification of the third embodiment, is described below. In this embodiment, the servo performance when the motor is started up is also considered. FIG. 9 shows the seventh embodiment of this invention. In FIG. 9, the judging unit 20 is added to the configuration shown in FIG. 2A. The judging unit 20 judges the magnitude of the period error Δ T FG and provide the disturbance torque observer 2 with the reset signal Re according to the result of the judgement. Furthermore, the disturbance torque observer 2 shown in FIG. 9 has the same configuration as that shown in FIG. 3, and the other elements are same as those shown in FIG. 2A. FIG. 10A is a flowchart illustrating the operation sequence of the seventh embodiment, and FIG. 10B is a flowchart illustrating the operation sequence for initializing the process of the disturbance torque observer 2 shown in FIG. 3. Consider first the case when the motor 100 is stopped and then will be started up. In this case, at first, the voltage corresponding to the start-up torque required for starting up the motor 100 is outputted by the processor through the D/A converter. The voltage is provided to the drive circuit 150. The drive circuit 150 supplies the motor 100 with the drive current I a according to said voltage, and then the motor 100 starts rotating. After the motor 100 is started up, the frequency generator 110 generates the frequency signal FG whose frequency is in proportion to the speed of the motor. The frequency signal FG is inputted to the processor and the operation sequence shown in FIG. 10A is carried out. In the operation sequence shown in FIG. 10A, the blocks 90-93 have been added to the operation sequence shown in FIG. 4A. Since the other blocks have already been described, a description thereof has been omitted. At the block 90, a determination is made as to whether or not the magnitude of the period error Δ T FG is within fixed bounds. If the magnitude is within fixed bounds, the reset signal Re is set to a low level at the block 91, and if not, the reset signal Re is set to a high level at the block 92. Generally, the fixed bounds are set to about 5% of the desired period T r . These bounds are satisfied immediately after the motor is started up even in a conventional motor control apparatus such as that shown in FIG. 11. When the reset signal Re is set to a low level, the operation sequence shown in FIG. 10A is the same as that shown in FIG. 4. Therefore, the operation sequence, which is carried out when the reset signal Re is set to a high level, is described as follows. When the reset signal Re is set to a high level, the speed of the motor 100 isn't in a static condition. Accordingly, the disturbance torque observer 2 cannot estimate the disturbance torque accurately, because the differential equation between the time-domain function y ( t ) of the speed ω of the motor 100 and the time-domain function x ( t ) of the period T FG of the frequency signal FG, which is given by Eq. (5), isn't satisfied. For this reason, at the block 93, the process of the disturbance torque observer 2 is initialized. As shown in FIG. 10B, the block 93 consists of two blocks 930 and 931. At the block 930, the memory data M 1 , which has been previously stored in memory, is set to zero. At the block 931, the estimated disturbance signal d 2 is also set to zero. After these operations for the initialization, the operations of the blocks 54-57 are carried out. However, at the block 55, the torque correction isn't carried out substantially, because the estimated disturbance signal d 2 has been set to zero at the block 931. As mentioned above, in the seventh embodiment of this invention, the torque correction isn't carried out substantially, when the period error Δ T FG is beyond the fixed bounds. Therefore, according to this embodiment, the motor is started up smoothly, because the torque correction in accordance with an inaccurate estimated disturbance signal can be prevented. After the motor has been started up and its speed reaches a static condition the effect of the disturbance suppression, which is represented by Eq. (10), can be obtained. In the description of each embodiment of this invention, only the speed control has been described. However, it is easy to add means for controlling the rotational phase of the motor to each embodiment with conventional technology. In the description of the second. the third, the fourth, the fifth, the sixth and the seventh embodiments of this invention, the period error ΔT FG is inputted to the disturbance torque observer 2. However, the detected period T FG , which is outputted by the period detector 120, can be used as a substitute for the period error Δ T FG . Moreover, instead of the detected period T FG , any signal can be used so long as it substantially corresponds to the period of the frequency signal FG. The third, the fourth, the fifth, the sixth and the seventh embodiments of this invention are described with respect to the case of using a software servo. But of course, these embodiments can also be realized with hardware.

Claims: A motor control apparatus for keeping the speed of a motor (100) fixed in the presence of a disturbance torque (τ d ) according to a period (T FG ) of a frequency signal (FG), comprising: a frequency generator (110) for generating a frequency signal (FG) whose frequency is in proportion to the speed of the motor; a period detector (120) for detecting the period (T FG ) of said frequency signal; a comparator (130) for producing a period error signal (ΔT FG ) corresponding to a difference between a desired period and a detected period signal from said period detector; an arithmetic unit (140) for calculating a control signal (c) in accordance with said period error signal; a motor drive circuit (150) for supplying the motor with electrical power according to a drive signal (D); a disturbance torque observer (1) for producing an estimated disturbance signal (d 1 ), which is a conversion of the disturbance torque applied to the motor into an electrical signal, in the absence of an estimation of the disturbance torque itself, from said detected period signal (T FG ) and said drive signal (D); and a torque correcting unit (10) for producing said drive signal (D) by adding said control signal (c) to said estimated disturbance signal (d 1 ). A motor control apparatus according to claim 1, wherein said disturbance torque observer comprises: a means (11) for multiplying said detected period signal by a fixed coefficient (K); a means (12) for subtracting an output of said means for multiplying from said drive signal: a low-pass filter (14) for low-pass filtering an output of said means for subtracting; and a means (13) for calculating said estimated disturbance signal (d 1 ) by adding an output of said means (11) for multiplying to an output of said low-pass filter (14). A motor control apparatus according to claim 2, wherein said disturbance torque observer operates according to a software program which is synchronized with said frequency signal. A motor control apparatus according to claim 2, wherein said low-pass filter has a transfer function of α 2 (1 + z -1 )/(1 - α 1 z -1 ) where z -1 is a delay unit of one sampling time and α 1 and α 2 represent constants for determining a cut-off frequency of said low-pass filter. A motor control apparatus according to claim 4, wherein a portion of said low-pass filter operation is carried out after said disturbance torque observer has outputted said estimated disturbance signal. A motor control apparatus according to claim 2, wherein said low-pass filter has a transfer function of β 2 z -1 /(1 - β 1 z -1 ) where z -1 is a delay unit of one sampling time and β 1 and β 2 represent constants for determining a cut-off frequency of said low-pass filter. A motor control apparatus according to claim 6, wherein a portion of said low-pass filter operation and said means for subtracting operation are carried out after said disturbance torque observer has outputted said estimated disturbance signal. A motor control apparatus according to claim 2, wherein said arithmetic unit and said torque correcting unit operate according to a software program which is synchronized with said frequency signal, and said torque correcting unit carries out a first torque correction immediately after said disturbance torque observer has outputted said estimated disturbance signal, and carries out a second torque correction immediately after said arithmetic metic unit has outputted said control signal. A motor control apparatus for keeping the speed of a motor (100) fixed in the presence of a disturbance torque (τ d ) according to a period (T FG ) of a frequency signal (FG) comprising: a frequency generator (110) for generating a frequency signal whose frequency is in proportion to the speed of the motor; a period detector (120) for detecting the period of said frequency signal; a comparator (130) for producing a period error signal (ΔT FG ) which is the difference between a desired period and a detected period signal from said period detector; an arithmetic unit (140) for calculating a control signal (c) in accordance with said period error signal; a motor drive circuit (150) for supplying the motor with electrical power according to a drive signal (D); a disturbance torque observer (2) for producing an estimated disturbance signal (d 2 ), which is a conversion of the disturbance torque applied to the motor into an electrical signal, in the absence of an estimation of the disturbance torque itself, from said period error signal (ΔT FG ) and said drive signal (D); and a torque correcting unit (10) for producing said drive signal (D) by adding said control signal (c) to said estimated disturbance signal (d 2 ). A motor control apparatus according to claim 9, wherein said disturbance torque observer comprises: a means (11) for multiplying said period error signal by a fixed coefficient (K); a means (12) adding an output of said means for multiplying to said drive signal: a low-pass filter (14) for low-pass filtering an output of said means for adding; and a means (13) for calculating said estimated disturbance signal by subtracting an output of said means for multiplying from an output of said low-pass filter. A motor control apparatus according to claim 10, wherein said disturbance torque observer operates according to a software program which is synchronized with said frequency signal. A motor control apparatus according to claim 10, wherein said low-pass filter has a transfer function of α 2 (1 + z -1 )/(1 - α 1 z -1 ) where z -1 is a delay unit of one sampling time and α 1 and α 2 represent constants for determining a cut-off frequency of said low-pass filter. A motor control apparatus according to claim 12, wherein a portion of said low-pass filter operation is carried out after said disturbance torque observer has outputted said estimated disturbance signal. A motor control apparatus according to claim 10, wherein said low-pass filter has a transfer function of β 2 z -1 /(1 - β 1 z -1 ) where z -1 is a delay unit of one sampling time and β 1 and β 2 represent constants for determining a cut-off frequency of said low-pass filter. A motor control apparatus according to claim 14, wherein a portion of said low-pass filter operation and said means for adding operation are carried out after said disturbance torque observer has outputted said estimated disturbance signal. A motor control apparatus according to claim 10, wherein said arithmetic unit and said torque correcting unit operate according to a software program which is synchronized with said frequency signal, and said torque correcting unit carries out a first torque correction immediately after said disturbance torque observer has outputted said estimated disturbance signal, and carries out a second torque correction immediately after said arithmetic unit has outputted said control signal. A motor control apparatus according to any one of claims 1-16, further comprising a judging unit (20) for determining whether or not a magnitude of said period error signal is within fixed bounds, wherein said torque correcting unit is inhibited from adding said estimated disturbance signal to said control signal when said judging unit has determined that the magnitude of said period error signal is out of said fixed bounds.

Inventors: INAJI TOSHIO, MATSUO KEISUKE, INAJI, TOSHIO, MATSUO, KEISUKE
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1993
Main classification: H02P5
IPC codes: G11B15, H02P23