Bias circuit for photodiode

Abstract: In order to reduce a change in reverse bias to a photodiode due to drift of a power supply caused by, e.g., noise, and to suppress generation of a wrong photoelectric current detection signal, a bias circuit includes a load element (4), a transistor (Q1) for receiving a current from the load element (4) at its collector, a transistor (Q2) constituting a current mirror circuit together with the transistor (Q1), a level shift circuit connected between the base of an output transistor (Q3) of the current mirror circuit and the collector of the transistor (Q1), and constituted by transistors (Q4 - Q7) and load elements (R1 - R4), and a photodiode (1) connected to a desired potential node of the level shift circuit.

Description: The present invention relates to a bias circuit for a photodiode and, more particularly, to a bias circuit for a photdiode, which applies a reverse voltage to the photodiode. From US 3 828 241 is known a voltage supply circuit which compensates four temperature and input voltage variations including first, second and third transistors of one conductivity type and a fourth transistor of the opposite conductivity type connected in a specific configuration. In a device for detecting a photoelectric current according to a radiation light amount using a photodiode, as shown in Fig. 1, a photodiode 1 is used in a state wherein a potential across an anode-cathode path of the photodiode 1 is set in a zero or reverse bias state by a power supply 5 (power supply voltage v R ). More specifically, when the linearity of a photoelectric current output in a low-illuminance range based on a photovoltaic effect is to be assured, V R = 0 is set to use the photodiode 1 in a zero bias state, thereby eliminating dark current components and improving the S/N ratio. On the other hand, when high-speed response characteristics are required, V R > 0 is set to apply a reverse bias across the anode-cathode path of the photodiode 1. In this manner, the response characteristics are improved by widening the depletion layer, decreasing the junction capacitance, and strengthening the depletion layer electric field. As a means for current-voltage converting a photoelectric current, the following method is popular. That is, as shown in Fig. 2, the photodiode 1 is connected to one input terminal (inverting input terminal in Fig. 2) of an operational amplifier 8, and the output from the operational amplifier 8 is fed back to the input terminal (inverting input terminal) of the operational amplifier 8 via a current-voltage conversion negative feedback element 9. At this time, one of the anode and cathode terminals of the photodiode 1 is connected to a power supply 6 having a predetermined potential (V K ), and the other is fixed to a power supply 7 having a potential (V A ) applied to the other input terminal (non-inverting input terminal in Fig. 2) of the operational amplifier 8 by virtual grounding across the two input terminals of the operational amplifier 8. Based on the potential relationship between the anode and cathode, the photodiode 1 is biased by a reverse voltage given by V R = V K - V A . As a means for applying a reverse voltage across the anode-cathode path of the photodiode 1, a means using an external power supply is also available. However, in general, as shown in Fig. 3 or 4, a means for stacking a potential at one main voltage terminal upon combination of constant voltage elements such as diodes and a load element such as a resistor is adopted. More specifically, in Figs. 3 and 4, the cathode potential V K of the photodiode 1 is clamped at a potential of a total of five diodes as follows: V K = 5 × V BE ≃ 3.5 V In this case, since the anode potential is grounded, a reverse voltage given by the following equation is consequently applied to the photodiode 1: V R = V K However, in the prior arts shown in Figs. 3 and 4, since the potential across the anode-cathode path of the photodiode 1 is determined by the constant voltage elements and the load element inserted between main voltage terminals, if the main voltage terminal defining the potential drifts in an AC manner due to the influence of, e.g., noise, a current flowing through the main voltage terminal changes. For this reason, a reverse bias amount across the anode-cathode path of the photodiode 1 varies, and an AC current corresponding to this variation flows through a junction capacitance 3 of the photodiode 1, thus erroneously operating the circuit. More specifically, in, e.g., Fig. 3, when the light amount is 0 (photoelectric current ≃ 0), a current i 1 flowing through the diodes D5 to D9 is given by: When V CC drifts, i 1 changes to satisfy: i = V CC - 5V BE R11 = I S ·exp qV BE kT The potential of each diode is changed by: dV BE dt = dV CC dt / (5 + i 1 R q kT ) As a result, the reverse bias amount V R of the photodiode 1 drifts to satisfy: dV R dt = 5· dV BE dt With this drift, a current given by the following equation flows through the junction capacitance 3 of the photodiode 1: i = c j dV R dt Thus, a wrong signal is detected by a current detector 2. This problem can be solved by determining the potential across the anode-cathode path of the photodiode 1 using a constant voltage circuit having a good PSRR (power supply reduction ratio). However, the circuit itself then becomes a complicated and high-grade one, and the number of elements is increased, resulting in an increase in cost. SUMMARY OF THE INVENTION The present invention has been made in consideration of the conventional problems, and has as its object to suppress detection of a wrong signal and to improve signal detection precision by minimizing a change in reverse bias amount of a photodiode due to a drift of a power supply caused by, e.g., noise. It is another object of the present invention to provide a bias circuit for a photodiode, which can prevent a drift in reverse bias amount by a very simple circuit arrangement at low cost. This objects are achieved by a bias circuit for a photodiode having the features of claim 1. The invention is further developed by the features indicated in the subclaims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows a circuit for detecting a photoelectric current of a photodiode; Fig. 2 shows an example of a photoelectric conversion circuit with a photodiode; Figs. 3 and 4 respectively show examples of a conventional bias circuit for a photodiode; and Figs. 5 to 7 show embodiments of a bias circuit for a photodiode according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A bias circuit for a photodiode according to the present invention, which circuit can achieve the above-mentioned objects of the present invention, will be briefly described below. The bias circuit is constituted by combining a current mirror circuit or a transistor, and a level shift circuit. Basically, a desired bias amount is set using the level shift circuit, and a drift of the bias amount is suppressed by the current mirror circuit or the transistor. More specifically, according to the present invention, a level shift circuit constituted by transistors or a combination of constant voltage elements such as diodes with a transistor, and load elements is connected to the base-collector path of a first transistor for receiving a current generated by a load element at its collector, or a second transistor, the base of which is commonly connected to the first transistor to constitute a current mirror circuit, is prepared, and the level shift circuit is connected between the base of an output transistor of the current mirror circuit and the collector of the first transistor. The anode or cathode of the photodiode is connected to a desired potential point of the level shift circuit to reversely bias the photodiode. Thus, even when a main voltage terminal suffers from a potential drift caused by, e.g., noise, a change in reverse bias amount of the photodiode can be suppressed, and generation of a wrong photoelectric current detection signal caused by an AC current flowing through a junction capacitance of the photodiode can also be suppressed. The preferred embodiments of the present invention will be described in detail hereinafter with reference to the accompanying drawings. (First Embodiment) Fig. 5 is a circuit diagram for explaining the first embodiment of the present invention. A circuit shown in Fig. 5 includes a photodiode 1, a current detector 2, a junction capacitance 3 of the photodiode 1, a current source 4 as a load element, a transistor Q1 (first transistor) for receiving a current supplied from the current source 4 at its collector, a transistor Q2 (second transistor), the base of which is commonly connected to the base of the transistor Q1 to constitute a current mirror circuit, and an output transistor Q3 of the current mirror circuit. The output transistor Q3 performs current feedback operations. The circuit shown in Fig. 5 also includes level shift transistors Q4 to Q7, connected between the base of the output transistor Q3 of the current mirror circuit and the collector of the input transistor Q1 of the current mirror circuit, and load elements R1 to R4 for the level shift transistors Q4 to Q7. The transistor Q7 constitutes an emitter follower circuit, and is capable of cutting off a current. Note that the load element 4 is an element for, e.g., generating a base voltage of the transistor Q7, and more specifically, it comprises a resistor and/or an electrical circuit. Also, the load elements R1 to R4 normally comprise resistor elements. If a current i 1 is input to the transistor Q1, the same current i 1 flows through the transistors Q2 and Q3 by the current mirror circuit. Therefore, the transistors Q1 to Q3 have equal base-emitter voltages V BE1 . On the other hand, since the level shift transistors Q4 to Q7 are driven by the predetermined load elements R1 to R4, if the load values (resistances) are set so that currents flowing through these transistors are equal to each other, these transistors can have equal base-emitter voltages V BE2 . Therefore, a cathode potential V K of the photodiode 1 is expressed by: V K = V R = 2V BE1 + 3V BE2 = 2V BE1 + 3 kT q ℓn 2V BE1 I S ·R4 If a power supply V CC drifts, and consequently, the current i 1 changes to change the voltages V BE1 of the transistors Q1 to Q3, a change in reverse bias amount of the photodiode 1 is given by: dV R dt = 2 dV BE1 dt + 3· kT q · 1 V BE1 · dV BE1 dt In this equation, since the second term is sufficiently smaller than the first term, we have: dV R dt ≃ 2· dV BE dt Therefore, as compared to the prior arts shown in Figs. 3 and 4, the reverse voltage drift of the photodiode 1 can be reduced. For the sake of simplicity, currents generated by the loads of the transistors Q4 to Q7 are set to be equal to each other, so that these transistors have equal base-emitter voltages. However, the base-emitter voltages may be arbitrarily determined. As shown in Fig. 7 to be described later, the level shift circuit may be constituted by a transistor, constant voltage elements such as diodes, and load elements. (Second Embodiment) Fig. 6 is a circuit diagram showing the second embodiment of the present invention. The same reference numerals in Fig. 6 denote the same parts as in Fig. 5, and a detailed description thereof will be omitted. In Fig. 6, level shift transistors Q10 to Q14 are connected between the base and collector of a transistor Q8 for receiving a current I 1 generated by the load element 4 at its collector, and are respectively driven by load elements R5 to R9. In this embodiment, the cathode current V K of the photodiode 1 is similarly expressed by: V K = V R = V BE1 + 4V BE2 = V BE1 + 4 kT q ℓn V BE1 I S ·R9 Therefore, a change in reverse bias amount of the photodiode 1 upon drift of the power supply V CC is given by: dV R dt = dV BE1 dt + 4 kT q · 1 V BE1 · dV BE1 dt ≃ dV BE1 dt Thus, the reverse bias amount drift of the photodiode 1 can be further suppressed as compared to the first embodiment. (Third Embodiment) Fig. 7 is a circuit diagram showing the third embodiment of the present invention. The same reference numerals in Fig. 7 denote the same parts as in Fig. 5, and a detailed description thereof will be omitted. In Fig. 7, the level shift circuit is constituted by constant voltage elements D1 to D4, a transistor Q17, and a load element R10, and is connected between the base and collector of a transistor Q15 for receiving a current generated by the load element 4 at its collector. The cathode potential V K of the photodiode 1 is similarly expressed by: V K = V R = V BE1 + 4·V BE2 = V BE1 + 4 kT q ℓn V BE1 I S ·R10 Therefore, the reverse bias amount drift of the photodiode 1 upon drift of the power supply V CC is given by: dV R dt = dV BE1 dt + 4· kT q · 1 V BE1 · dV BE1 dt ≃ dV BE1 dt In this manner, the drift amount can be suppressed to be equal to that in the second embodiment. The level shift circuits shown in the first to third embodiments described above are not limited to the corresponding illustrated circuits, and may be appropriately modified within the scope of the appended claims. Therefore, for example, the level shift circuit of the first embodiment may be constituted by diodes. Of course, a bias circuit for a photodiode according to the present invention may be modified within the spirit and scope of the appended claims. As described above, according to the bias circuit for the photodiode of the present invention, a circuit which can reduce a change in reverse bias amount of the photodiode due to a drift of a power supply caused by, e.g., noise, and can suppress generation of a wrong photoelectric current detection or signal detection signal, and/or can improve signal detection precision, can be provided with a simple circuit arrangement at low cost. In order to reduce a change in reverse bias to a photodiode due to drift of a power supply caused by, e.g., noise, and to suppress generation of a wrong photoelectric current detection signal, a bias circuit includes a load element (4), a transistor (Q1) for receiving a current from the load element (4) at its collector, a transistor (Q2) constituting a current mirror circuit together with the transistor (Q1), a level shift circuit connected between the base of an output transistor (Q3) of the current mirror circuit and the collector of the transistor (Q1), and constituted by transistors (Q4 - Q7) and load elements (R1 - R4), and a photodiode (1) connected to a desired potential node of the level shift circuit.

Claims: A bias circuit for a photodiode, comprising a first load element (4), a first transistor (Q 1 , Q 8 , Q 15 ) for receiving a current generated by said first load element at a collector thereof, a second transistor (Q 2 , Q 9 , Q 16 ), a base of which is commonly connected to a base of said first transistor, and an emitter of which is commonly connected to an emitter of said first transistor, to constitute a current mirror circuit, and a level shift circuit connected between the collector and the base of said first transistor of said current mirror circuit, and constituted by at least one transistor (Q 4 - Q 7 , Q 10 - Q 14 ) or a combination of a transistor (Q 17 ) with a constant voltage element (D 1 - D 4 ), and a second load element (R 1 - R 4 , R 5 - R 9, R 10 ) different from said first load element (4), wherein at least one of the transistors of said level shift circuit has a base connected to a collector of said first transistor, and has an emitter which is in electrical connection to said second load element, and an anode or cathode of said photodiode is connected to a desired potential node of said level shift circuit. A circuit according to claim 1, further comprising an output transistor (Q 3 ) of said current mirror circuit, wherein an emitter of said output transistor is connected to a collector of said second transistor. A circuit according to claim 1 or 2, wherein the collector and the base of said second transistor are electrically connected. A circuit according to claims 1 - 3 , wherein said first load element comprises a resistor element or a circuit. A circuit according to claims 1 - 4, wherein said level shift circuit includes a plurality of transistors. A circuit according to claim 5, wherein a collector of each of said plurality of transistors is connected to a reference voltage source, and an emitter thereof is connected to a base of another of said plurality of transistors and said second load element. A circuit according to one of the preceding claims, wherein said second load element is connected to the emitters of said first and second transistors. A circuit according to claim 2, wherein a collector of said output transistor is connected to a reference voltage source. A circuit according to claim 8, wherein a collector of said transistor of said level shift circuit, and one electrode of said first load element are connected to a reference voltage source. A circuit according to one of the preceding claims, wherein said constant voltage element comprises at least one diode. A circuit according to one of the preceding claims, wherein said second load element comprises at least one resistor element. A circuit according to one of the preceding claims, wherein a collector of said second transistor is connected to a reference voltage source. A circuit according to one of the preceding claims, wherein an emitter of said at least one transistor of said level shift circuit is connected to said constant voltage element.

Inventors: SATO TOSHIAKI, SATO, TOSHIAKI, Sato, Toshiaki, c/o Canon K.K.
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1993
Main classification: G05F3
IPC codes: H01L31, G05F3, H04B10, G01J1