Process for improving the adhesion between dielectric layers at their interface in semiconductor devices manufacture

Abstract: A method for improved adhesion between dielectric material layers at their interface during the manufacture of a semiconductor device, comprising operations for forming a first layer (1) of a dielectric material on a circuit structure (7) defined on a substrate of a semiconductor material (6) and subsequently forming a second layer (3) of dielectric material overlying the first layer (1). Between the first dielectric material layer and the second, a thin oxide layer (2) is formed in contact therewith. This interposed oxide (2) serves an adhesion layer function between two superimposed layers (1,3).

Description: This invention relates to processes for manufacturing monolithic integrated circuits which include overlaid layers of dielectric materials, in particular layers of silicon oxi-nitride and silicon nitride, as disclosed for example in EP-A-327412. The adjacency of dielectric material layers having the same or different compositions is a common occurrence in today's technology at several manufacturing stages of integrated circuits. In such processes, a second layer is subsequently formed over a first layer of dielectric material. That second layer may overlap the first at a next stage so as to completely cover it, as is the case with certain passivating steps, for example. However, before forming the second layer, operations are often carried out such as the formation of a sacrificial layer which is then etched away, either fully or partially, or such as the partial removal of the first layer itself without using a sacrificial layer. Anyway, the second dielectric layer will have surface portions in direct contact with the first. Dielectric material layers usually function to provide electric insulation between conductive layers and to protect underlying structures of the integrated circuit against contaminants (impurities, moisture) or shocks. Additionally, the provision of successive layers ensures protection for the device even when any one of the layers becomes damaged with the formation, for example, of crossline cracks. Therefore it's important that no regions be allowed to have less than perfect adhesion of the overlaid layers in the areas of contact. Nonetheless, some of these materials develop peculiar adhesion problems at the interface which are not fully understood by the skilled ones in the art. These problems already exist on account of certain inherent properties of the materials. In fact, when these are placed in layer form over another material, they develop by inherent stresses a more or less marked tendency to deform the underlying structure into a more or less curved shape which shows up as a sagging or hogging thereof, according to whether the stress is a tensile or a compressive one. Where the adjacent underlying structure is also formed of another layer of dielectric material, the magnitude of the force acting on the two layers may, even when the stress is of the same type and perhaps of equal value, be different due to fact that the thickness dimensions are generally different. At high values of that stress, the layers tend to separate and possibly "delaminate". In general, delamination occurs where the stress at the interface exceeds the molecular adhesion forces acting between the two layers. This problem is then aggravated by the application of external mechanical loads which add to the stress, as is the case, for example, while cutting the chip on which the circuit is formed for mounting to the holder. Also not to be overlooked are changes in temperature undergone during the circuit manufacturing cycle and from environmental chemical attack; these effects are apt to deteriorate the interlayer bonds. The difficulty to achieve adhesion of the layers is further enhanced by the following methods, as are usually applied during the manufacture of an integrated circuit. In the first place, current forming techniques generate layers with uneven regions especially in the proximities of the interfaces. As the skilled ones are well aware, the dielectric material layers are customarily formed (excepting the first, which may be grown thermally) by deposition within a reactor, using a chemical vapor deposition (CVD) technique. The chemical precursors of the elements to be deposited are reacted while in a gaseous state. The chemico-physical properties of the layer and the reaction rate are controlled by process parameters such as pressure and temperature, and by the possible ignition of plasma induced by an RF. However, a dielectric deposited by a CVD technique is never truly uniform throughout its thickness; the first tens of nanometers have different composition characteristics from the remainder of the layer because the surface electron states of the underlying layer, where the reaction takes place, affect its properties. Especially where the plasma-assisted CVD technique is used, from plasma ignition to the moment that the reactor enters a steady state of operation, a short settling and stabilizing period is allowed before the deposition rate itself attains steady state and becomes uniform. This may introduce increased uneveness in the characteristics of the deposited layer. On the other hand, it is possible for a break in the deposition of a layer to cause saturation of the surface bonds, making the adhesion of the next layer still more difficult. In addition, where the layer on which the deposition is carried out has been subjected to a previous processing step, the surface to be deposited will in general be altered. For example, in the event of a previous plasma etching step by ion bombardment (a process used for removing a sacrificial layer, for example), damage is inflicted to the surface under the mechanical and physical aspects, possibly resulting in a change of density. Further, a surface alteration under the chemical aspect may occur due to the incorporation of residual spurious chemical elements from an etching process (etching chemical elements or residues from an attached layer). The problem is of special importance because the trend in the art is nowadays toward assembling integrated circuits into inexpensive plastics packages. A characteristic feature of plastics materials is that they are pervious and, therefore, provide no barrier against moisture, while in addition, the circuit encapsulating operation -- including resin heating and subsequent cooling, with attendant release of moisture from the resin -- may easily admit water into the package. This water can eventually lead to corrosion of the conductive layers, or in any event, make the integrated circuit unstable, impairing its performance. Thus, the technology for making such devices provides for the use of silicon oxi-nitrides and nitrides as the dielectrics. These materials do provide, in fact, a barrier against migrating water; additionally, they can effectively prevent contamination from sodium. But on the other hand, contacting silicon nitride and oxi-nitride layers -- whether in the nitride/nitride or oxi-nitride/oxi-nitride or nitride/oxi-nitride combination -- have a marked tendency to separate after deposition because they are highly rigid materials inherently likely to build up internal stresses. In order to improve adhesion between dielectric materials, some techniques have been developed which provide treatments of the surface of an underlying layer prior to forming the next. One prior solution consists of bombarding the surface of a layer to be deposited with ions of an inert gas, such as argon or nitrogen, under plasma (sputtering process). In this way, the roughness of the surface is enhanced mechanically to provide increased gripping area for the reactants to be deposited, which improves adhesion. That technique applies to the instance of oxide layers deposited using tetraethylorthosilicate as the precursor (known as TEOS). Another solution which can be adopted where the surface of the underlying layer includes spurious chemical elements is the provision of a cleaning step by plasma etching, using an oxygen or mixed N2 and NH3 plasma, or solution etching (dry etch or wet etch). In this way, it becomes possible to provide improved chemical uniformity at the interface. All these prior approaches may also be used in succession or simultaneously for improved efficiency, and have proved adequate with certain materials. But particularly with silicon oxi-nitride and silicon nitride layers, they are ineffective to prevent separation of two successive layers, a not infrequent occurrence some time after deposition, as can be verified experimentally. It is the object of this invention to provide a method for improving adhesion at the interface between layers of dielectric materials during the manufacture of integrated circuits having multilayered structures. Specifically, the method according to claim 1 is aimed to be effective with layers of silicon nitride and oxi-nitride in the nitride/nitride or oxi-nitiride/oxi-nitride or nitride/oxi-nitride combination, thereby improving the reliability of integrated circuit devices encapsulated in plastics packages. The invention and its advantages can be better understood by having reference to the following description of a specific process based on the inventive principle, given by way of non-limitative example, and to the accompanying single Figure 1 showing a sectional view, not drawn to scale, of a circuit structure implementing the method of this invention. In accordance with the invention, a thin layer of silicon dioxide is formed at the interface between a first layer of a dielectric material and a successive layer of dielectric material, specifically silicon oxi-nitride and/or silicon nitride. This intermediate oxide acts as an adhesion layer between the two superimposed layers. The method can be applied to the construction of semiconductor devices during discrete steps, e.g. passivation steps as are generally carried out in all processes. As shown in Figure 1, a method according to the invention comprises conventional initial operations in the manufacture of integrated circuits, such as the formation of a substrate 6 of a semiconductor material, e.g. monocrystalline silicon, of the circuit structure 7 sought. Then, a protective dielectric material layer 1 is usually formed over that structure, which may have conductive material layers at the top, the layer 1 conforming with the underlying structure. Thereafter, one or more dielectric material layers are formed in succession. Shown at 3 in Figure 1 is just one of these layers. The dielectric layers 1 and 3 usually comprise silicon oxi-nitride or silicon nitride. The top surface of the layer 1 may be treated, according to prior art methods and as previously noted, to promote adhesion of the layers 1 and 3. In the method according to this invention a thin doped or non-doped silicon dioxide (SiO2) layer 2, is interposed before the second dielectric layer 3 is formed. The deposition of the dielectric layer 3 is followed by optional steps, not shown in the drawing, to complete the formation of the device, in accordance with conventional methods. The layer 2 provides an adhesive layer between the layers 1 and 3, and serves no specific passivation function. It should be thin, its thickness dimension being preferably on the order of a few tensnanometers, specifically within the range of 5 to 50 nm. The decision to have the silicon dioxide doped, usually with boron or phosphorous, or left undoped will depend on the particular process that includes this adhesion step. Doping with boron to yield BSG (BoroSilicate Glass) improves the reflow capability of the layer by application of heat; silicon dioxide doped with phosphorous (PSG or PhosphoSilicate Glass) serves a barrier function against contaminants (by gettering). In any event, the amount of dopant used is normally kept fairly low. The formation of silicon dioxide is preferably obtained by deposition using a CVD technique, either under a low pressure (LPCVD) or atmospheric pressure (APCVD) or a subatmospheric pressure (SACVD), or alternatively by plasma activation (PECVD = Plasma-Enhanced CVD). The chemical precursors used may also be varied: tetraethylorthosilicate (TEOS) and silane (SiH4) are the silicon sources most widely in use; molecular oxygen (O2), optionally together with ozone (O3) and occasionally with nitrogen oxides (NO2, NO), are instead used for oxygen. The chemio-physical characteristics of the resultant layer depend on the deposition conditions, which should take the process into account to which it is subjected, and which dictate the precursors to be used. A major advantage, well recognized by the skilled ones, of deposition from silane is the low temperature that can be used during the process (below 500°C). The silicon dioxide deposited from TEOS has better layer properties than that from silane (excellent uniformity, close conformation with the underlying structure). Doped (with boron, phosphorous, or both) silicon dioxide is commonly obtained directly upon CVD deposition of the layer, by also loading dopant-supplying molecules as reactants into the reactor. Specifically, diborane (B2H6) or trimethylborate (TMB) are used for borosilicates, and phosphin (PH3) or trimethylphosphite (TMPi) or triethylphosphite (TEP) or trimethylphosphate (TMPa) for phosphorsilicates. The adhesive properties of the oxide layer, which is interposed between two dielectric layers in accordance with this invention, have been verified experimentally. Using electron scan or transmission system microscopy (SEM, TEM), it is found that especially the presence of the layer of silicon dioxide is effective to prevent the two dielectric layers from separating. The effectiveness of the material has been verified both for doped dioxide and undoped dioxide. The exact reason why that thin layer improves the adhesion of dielectrics is yet not understood from the physical standpoint. The adhesion function can be generally served by a thin layer of a not strictly stoichiometric silicon oxide (i.e., not SiO2), that is one containing proportions of other elements. Thus, the method of this invention leads to an advantageous improvement of the adhesion between layers of dielectric materials, as is observed experimentally. It may be used to seal together layers in succession, thereby indirectly improving their insulative and protective effect on devices. This effect is specially noticeable with silicon oxi-nitrides and silicon nitrides, which were at the root of the major problems encountered with other techniques. It will be appreciated that the above embodiment has been described by way of illustration and not of limitation, and that many changes may be made without departing from the scope of the claims. In fact, the embodiment of the invention described may be applied to all those processes wherein portions of dielectric material layers are to be superimposed. Additionally, the dissimilar characters of the CVD techniques used to form the adhesion oxide layer bear no significant influence on the adhesive property of the thin oxide layer.

Claims: A method for improving adhesion between dielectric material layers for passivation at the interface thereof, during the manufacture of a semiconductor device, comprising operations for forming a first layer of a dielectric material (1) with a first thickness over at least a portion of an uneven circuit structure (7) defined on a substrate of a semiconductor material (6) and subsequently forming a second layer (3) of dielectric material with a second thickness overlying at least a portion of said first layer (1) each of said first and second layers of dielectric material consisting of a nitride or an oxinitride of silicon, and forming a thin silicon dioxide adhesion layer (2) using a chemical vapor deposition technique at least in one region between the first layer of dielectric material and the second, in contact with both, and having a thickness smaller that said first and second thicknesses, the thickness of the adhesion layer (2) being within the 5 to 50nm range. A method according to Claim 1, characterized in that the silicon dioxide layer is doped with phosphorus. A method according to Claim 1, characterized in that the silicon dioxide layer is doped with boron. A method according to any of Claims 2, 3 characterized in that the silicon dioxide layer is formed by chemical vapor deposition using as chemical precursors of silicon one compound chosen in the group comprising tetraethylorthosilicate (TEOS) and silane (SiH4), and as oxygen sources either molecular oxygen (O2), molecular oxygen (O2) mixed with ozone (O3), nitrogen oxide (NO) or protoxide (NO2). A method according to Claim 4, characterized in that as dopant sources for the silicon dioxide either phosphin (PH3) or trimethylphosphite (TMPi) or triethylphosphate (TEP) or trimethylphosphate (TMPa) is used for phosphorus doping, and either diborane (B2H6) or trimethylborate (TMB) is used for boron doping.

Inventors: BACCHETTA MAURIZIO, BACCI LAURA, ZANOTTI LUCA, BACCHETTA,MAURIZIO, BACCI,LAURA, ZANOTTI,LUCA
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1993
Main classification: H01L21
IPC codes: H01L23, H01L29, H01L21