Disc shaped recording medium and address discrimination circuit for disc-shaped recording medium

Abstract: A recording medium in the form of a disc (D) in which locations on said disc (D) other than a predetermined location set as a zero- address are represented by (+) side addresses and (-) side addresses with respect to the zero address, and in which the information concerning these addresses are at least recorded as address data constituted by N bits. With the disc-shaped recording medium the fact that the number of addresses necessary for the radially inner region (AR in ) of the disc is lesser than the number of addresses necessary for the radially outer region (AR out ) of the disc is utilized in such a manner that the upper four bits of 16 bits are used in the manner of sign bits for representing the addresses on the radially inner side (AR in ) of the disc, with the remaining bits being used for representing the addresses, with the 16 bits inclusive of the upper four bits being used for representing the addresses for the radially outer region (AR out ) of the disc (D). In this manner, the totality of the tracks may be represented while maintaining interchangeability with the conventional discs even although the track pitch is lesser than in the case of conventional discs. Besides, the address discrimination may also be facilitated.

Description: BACKGROUND OF THE INVENTION This invention relates to a disc-shaped recording medium, such as an optical disc, and an address data discriminating circuit for discriminating addresses, such as track addresses, on the disc-shaped recording medium. Such disc-shaped recording medium includes an optical disc and a magneto-optical disc. An example of the disc-shaped recording medium is a magneto-optical disc having a format as proposed in ISO/IEC 10089:1991(E). On the above optical disc, there are formed concentric tracks, or there is formed a spiral track. With the optical disc of the above format, a track at a radial distance of 30 mm from the disc center bears a zero- track address, and tracks at a radially outer side of the zero track address or within a range of from 30 mm to 60 mm in terms of a disc radius are indicated by (+) side track addresses, while those at a radially inner side of the zero track address are indicated by (-) side track addresses. The radially outer side region of the disc, having the plus (+) side tracks, is a user area, while the tracks on the radially inner side of the zero track address at the radius of 30 mm are used as test tracks or control data tracks. The above-mentioned track addresses are recorded by embossed bits on the optical disc by 2 bytes or 16 bits. With the above format disc, the current track pitch is 1.6 µm. It has recently been envisaged to narrow the track pitch for increasing the disc capacity. For example, it is contemplated to use a track pitch of 1.4 µm. However, if the track pitch of, for example, 1.4 µm is used in place of the currently employed track pith of 1.6 µm, the number of tracks and that of sectors is increased progressively towards the outer periphery of the disc if the disc is to be rotated with modified constant angular velocity (MCAV), such that, if the above-mentioned format is to be maintained, it becomes impossible to represent all of the tracks at the radially outer side or (+) side of the disc. Meanwhile, the radially inner side or (-) side tracks need to be formated at least to a radius of 29.52 mm. This can be done without any inconvenience because there are about 300 tracks in this region for the track pitch of 1.6 µm. With the above format, tracks of the (+) side up to the +32767th track and tracks of the (-) side up to the -32768th track are represented by 2's complement representation of 2 bytes or 16 bits, so that, if the track pitch of 1.6 µm, the totality of the tracks can be represented by the 2's complement representation of the 16 bits. However, if the track pitch of 1.4 µm is used, there is a possibility that the number of tracks on one side of the zero address track exceed 32768, such that it becomes impossible to indicate the totality of tracks by 2's complement representation of 16 bits. OBJECT AND SUMMARY OF THE INVENTION In view of the above-described status of the art, it is an object of the present invention to provide a disc-shaped recording medium and an address discriminating circuit therefor in which, even when the track pitch is reduced in comparison with the conventional system, the tracks can be indicated in their entirety while maintaining interchangeability with the conventional system. In accordance with the present invention, there is provided a recording medium according to claim 1. In accordance with the present invention, there is also provided an address discriminating circuit according to claim 3 That is, with the above described disc-shaped recording medium, the polarity or sign of the track addresses, pre-recorded as embossed bits on the disc, is represented by using particular upper order bits (upper n bits) in the manner of sign bits, without using the most significant bit (MSB) as a sign bit, as in customary 2's complement representation. Besides, as means for discriminating the polarity or sign of the track addresses in the above-mentioned address discriminating circuit, the polarity or sign is discriminated by ANDing the upper n bits. The disc-shaped recording medium and the address discriminating circuit, according to the present invention, are so arranged and constructed that, by taking advantage of the fact that the number of addresses required for one of the (+) side and the (-) side according to the conventional format, such as the (-) side, is less than that required for the other side, for example, the (+) side, the upper n bits of the N bits are used in the manner of sign bits for representing the addresses for the above-mentioned one side for indicating that the address is for the one side, and for representing the address by the remaining bits, while the addresses for the other side are represented by the N bits inclusive of the upper n bits, with the upper n bits not being all in the aforementioned one of the binary states indicating that the addresses are those for the above-mentioned other side. The above-described arrangement renders it possible to cope with increase in the number of track addresses on the other side of the disc. Other objects and advantages of the present invention will become more apparent from the following description of the preferred embodiment and the claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig.1 is a plan view showing a disc-shaped recording medium embodying the present invention, and various regions thereof. Fig.2 shows 16-bit address data employed in the present invention. Fig.3 shows a sector format employed in the present invention. Fig.4 is a circuit diagram showing a schematic arrangement of an address discriminating circuit for the disc-shaped recording medium embodying the present invention. Fig.5 is a flow chart for illustrating sign discrimination and data summation according to the present invention. Fig.6 is a block circuit diagram showing the schematic arrangement of the disc-shaped recording medium and a recording and/or reproducing apparatus employing the disc-shaped recording medium. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The disc-shaped recording medium according to the present invention is such a disc in which, as shown in Fig.1, a predetermined position on the disc D, such as a track at a radius of 30 mm, is a zero-address track, with the remaining positions on the disc D being represented by addresses on the plus (+) side and those on the minus(-) side, with respect to the zero address, and with data of the addresses being at least recorded as address data constituted by N bits, such as by 16 bits. Address data of one of the (+) or radially outer region and the (-) or radially inner region of the disc, for example, address data of the radially inner region of the disc, are recorded in the form of N-bit data in which upper order n bits of the N bits, where N > n, for example, N = 16 and n = 4, are all set to one of the states of the binary number system, such as all "1", and in which the addresses are indicated by the remaining bits of the N (= 16) bits. On the other hand, address data of the remaining region, herein the radially outer region of the disc, are recorded in the form of 16 bit data exclusive of those data in which the upper order four bits of the 16 bits are all in the above-mentioned one state of the binary number system, herein all "1", in other words, are recorded in the form of the 16 bit data in which at least one "0" is present in the upper order four bits. That is, for indicating the addresses of the radially inner region, that is the (-) region, the upper four bits b 15 , b 14 , b 13 and b 12 of the 16 bits b 15 , b 14 , ··· b 0 of the address data are all set to, for example, "1", with the remaining bits b 11 , ··· b 0 indicating the addresses, whereas, for indicating the addresses of the radially outer region, that is the (+) region, the addresses are indicated by the 16 bits b 15 , b 14 , ··· b 0 , exclusive of those 16 bit data in which the upper four bits b 15 , b 14 , b 13 and b 12 are all "1", as shown in Fig.2. It is such address data that are recorded in an inner extension region AR IN of the disc D, as hereinafter explained. In the embodiment illustrated, by utilizing the upper four bits of the 16 bits in the manner of sign bits, up to the -4096th address may be represented for the (-) or radially inner region, whereas up to the +61439th address may be represented for the (+) or radially outer region, in other words, it becomes possible to represent the number of tracks such that -4096 ≤ number of tracks ≤ +61439. In this manner, when the track pitch is set to 1.4 µm, all of the track numbers may be indicated while interchangeability with the above-mentioned conventional format is maintained. It should be noticed that the tracks for the (-) region or the radially inner region of the disc are test tacks or control data tracks etc, as stated hereinbefore, and it suffices to represent about 1000 or less tracks, specifically, 400 to 800 tracks, so that the track pitch may be set to 1.4 µm without raising any particular problems. Although the upper n bits are four bits in the above embodiment, these n bits may also be two or three bits. If the upper n (= 2) bits are used in the manner of the sign bits, it becomes possible to indicate the track number such that -16384 ≤ number of tracks ≤ +49151. If the upper n (= 3) bits are used in the manner of the sign bits, it becomes possible to represent the track number within a range of -8192 ≤ number of tracks ≤ +57343. For reference sake, with the conventional 2's complement representation, in which the upper one bit is used as the sign bit, the track number that may be represented is such that -32768 ≤ number of tracks ≤ +32767, such that the number of tracks for the (+) region cannot be represented for the above format. The format for the disc D shown in Fig.1 is explained. The disc D has a format according to ISO/IEC 10089:1991 (E) and has a spirally extending track. The radially inner expansion region AR IN is formed in a region from radius 27 mm to radius 30 mm, a user area (user recordable area) AR USE is formed in a region from radius 30 mm to radius 60 mm, and a radially outer extension region AR OUT is formed in a region from radius 60 mm to radius 61 mm, from the center of the disc D, as shown at A in Fig.1. As to the inner extension area AR IN , a reflective mirror area RZ is formed in an area from radius 27.00 mm to radius 29.00 mm, and a PEP control track area CTZ is formed in the adjacent area from radius 29.00 mm to radius 29.50 mm, as shown at B in Fig.1. The PEP data are rotation control data, of data for modulation system, disc type etc. of the optical disc, recorded by embossed bits. A transition area TZ is formed in a zone of from radius 29.50 mm to radius 29.52 mm radially outwardly of the PEP control track area CTZ, and a radially inner SFP control track area ICTZ, bearing SFP data, is formed in an adjacent zone of from radius 29.52 mm to radius 29.70 mm. The SFP data is system data including PEP data and representing optical disc medium data, power or pulse width etc. of the recording/reproducing laser power, and is recorded in the form of embossing pits. An area of radius 29.70 mm to radius 30.00 mm, radially outside the radially inner SFP control track area ICTZ, is defined as a radially inner area for producer use IMZ, whereas an area of radius 29.80 mm to radius 29.90 mm, sandwiched between a first guard band GB1 of radius 29.70 mm to radius 29.80 mm and a second guard band GB2 of radius 29.80 mm to 29.90 mm, is used as a producer test area MTZ. As for the radially outer extension area AR OUT , an area of from radius 60.00 mm to radius 60.15 mm is defined as a radially outer area for producer use OMZ, a radially outer SFP control track area OCTZ is formed in an adjacent area of from radius 60.15 mm to radius 61.50 mm, and an adjacent area of from radius 60.50 mm to radius 61.00 mm is used as a leadout area LOZ. Meanwhile, a value indicating the write-once type optical disc, such as "00010000" or a value indicating an overwrite type magneto-optical disc, such as "00100000", is usually set as disc type indicating one-byte data of PEP data of the PEP control track data CTZ. A recording track with a track pitch of, for example, 1.4 µm, is formed in the user recordable area AR USE between radius 30 mm and radius 60 mm. Fig.3 shows a sector format of the above-mentioned disc D. The sector consists of 1360 bytes and is made up of a 5-byte sector mark SM, 12-byte VFO 21 and VFO 3 , two 8-byte VFO 2 , three 1-byte address mark AM, ID 1 to ID 3 , each having 8 bytes, a 1-byte postamble PA, ODF, flags and gaps, each being of 14 bytes, a 3-byte sync, a 1259 byte data field, and a 20-byte buffer. The ID 1 to ID 3 each consist in 2-byte track number, a 1-byte sector number and a 2-byte CRC. The ODF, flags and gaps consist in 1-byte ODF, two 3-byte gaps, a 5-byte flag and a 2-byte ALPC. The address discrimination circuit for the disc-shaped recording medium according to the present invention is an address discrimination circuit for discriminating addresses on the disc D of the present embodiment, and includes an AND gate (logical product gate) 22 and exclusive OR gates (EX-OR gates) 15, 14 ,13 and 12, as shown in Fig.4. The AND gate 22 acts as state discriminating means for discriminating the states in the binary number of the upper n bits, such as upper four bits, of the N bits, such as 16 bits, of the address data read from disc D. On the other hand, the exclusive OR gates act as discriminating means for deciding that the address data are those for one of the (+) side and the (-) side address data, for example, the (-) side address data when the states of the upper four bits in the binary number as found at the AND gate 22 are the above-mentioned one of the two states, such as all "1", and discriminating the addresses based on the remaining 12 bits, while deciding that the address data are those for the other of the (+) side and the (-) side address data, for example, the (+) side address data when the states of the upper four bits in the binary number as found at the AND gate 22 are the states excluding the states in which the upper four bits are all in the above-mentioned one of the states, that is the states in which at least one "0" is present in the upper four bits, and discriminating the addresses by the 16 bit data excluding those data in which the upper four bits are all in the above-mentioned one of the states, that is in which the upper four bits are all "1". Referring to Fig.4, the 16-bit address data, read out from disc D, are supplied to terminal 20. The 16-bit address data are outputted after being once held in the 16-bit register 21. Of the address data (b 15 , b 14 , ··· b 0 ) outputted at the register 21, data indicating the upper four bits b 15 , b 14 , b 13 and b 12 are transmitted to AND gate 22. The AND gate 22 is a four-input AND gate, so that its output becomes "1" and "0" when all of the data supplied to the four input terminals are "1" and when otherwise, respectively. Stated differently, the output of the AND gate 22 becomes "0" when at least one "0" is present in the data supplied to the four input terminals. On the other hand, the upper four bit data b 15 , b 14 , b 13 and b 12 . of the data supplied from register 21 are transmitted to one of the four input terminals of the associated exclusive OR gates 15, 14, 13 and 12, the other inputs of which are supplied with the output of the AND gate 22. Therefore, if the upper four bit data b 15 , b 14 , b 13 and b 12 are all "1", output data d 15 , d 14 , d 13 and d 12 of the exclusive OR gate are "0000". On the other hand, if at least one "0" is present in the data b 15 , b 14 , b 13 and b 12 of the upper four bits, for example, if the data of the upper four bits b 15 , b 14 , b 13 and b 12 are "1011", the output data d 15 , d 14 , d 13 and d 12 of the exclusive OR gate are "1011" and, if the data of the upper four bits b 15 , b 14 , b 13 and b 12 are "0000", the output data d 15 , d 14 , d 13 and d 12 of the exclusive OR gate are "0000". That is, when the upper four bit data b 15 , b 14 , b 13 and b 12 are all "1",. the output data d 15 , d 14 , d 13 and d 12 of the exclusive OR gate 15, 14, 13 and 12 are complemented and become "0000". Conversely, if at least one "0" is present in the upper four bit data b 15 , b 14 , b 13 and b 12 , the upper four bit data b 15 , b 14 , b 13 and b 12 are directly outputted as the output data d 15 , d 14 , d 13 and d 12 of the exclusive OR gate 15, 14, 13 and 12. In this manner, if the upper four bit data b 15 , b 14 , b 13 and b 12 are all "1", the upper four bits of the 16-bit data outputted from register 21 are "0", so that the binary number is represented by the 16 bits less the upper four bits, or by the lower 12 bits. Conversely, if at least one "0" is present in the upper four bits b 15 , b 14 , b 13 and b 12 , the binary number is represented by the 16-bit data outputted from register 21, that is by the 16 bit data excluding those 16 bit data in which the upper four bits are all "1". Outputs of the exclusive OR gates 15, 14, 13 and 12 and data of the lower 12 bit data b 11 , ··· b 0 are transmitted to a storage area of a 17-bit register 23 exclusive of a most significant bit (MSB). An output of AND gate 22 is supplied to a storage location corresponding to the MSB of the 17-bit register 23. In the embodiment illustrated, the output of the AND gate 22 supplied to the storage location corresponding to the MSB of the register 23 is used as a sign bit in 2's complement representation. That is, the address is negative (-) and positive (+) when the MSB is "1" and "0", respectively. The 17-bit data stored in register 23 are outputted a address data from output terminal 24 of the address discrimination circuit of the present embodiment. With the address discrimination circuit of the present embodiment, if the above-mentioned 16-bit address data supplied to the terminal 20 are "1111000011111111", for example, output data from output terminal 24 are "10000000011111111", so that the address represented by the output data becomes -3841. On the other hand, if the above-mentioned 16-bit address data supplied to the terminal 20 are "1011000000000010", for example, output data from output terminal 24 are "01011000000000010", so that the address represented by the output data becomes +45062. With the above-described address discriminating circuit, in which the upper four bits of the 16-bit address data, read out from disc D, and having the same format as the conventional format, are used in the manner of sign bits, it becomes possible to discriminate addresses up to the -4096th address and up to the (+)61439th address on the radially inner side or (-) side and on the radially outer side or (+) side, respectively, so that the range of addresses that can be discriminated is (-4096 ≤ number of tracks ≤ +61439). Besides, with the embodiment illustrated, the number of tracks not less than 32678 may be represented by 2-byte track addresses according to the conventional format, so that interchangeability with the current format may be realized with the 2-byte track addresses. Besides, address discrimination may be achieved by simplified circuitry. If address data should be summed using outputs of the address discrimination circuit shown in Fig.4, address data from output terminal 24 of the above-described address discrimination circuit are added by an addition circuit 33 to data from a terminal 31 which is supplied with 17-bit address data from another address discriminating circuit similarly to terminal 24. The results of addition are supplied via terminal 32 to downstream side circuit, not shown. Although Fig.4 shows a schematic arrangement of the address discriminating circuit of the present embodiment and the manner of output addition, address discrimination and addition (or subtraction) of address data are achieved in effect by a software technique, as indicated by a flow chart shown in Fig.5. That is, with the flow chart of Fig.5, address discrimination and addition or substraction of address data are achieved with so-called double-precision processing operation. At step S1, it is first checked if the address data are positive (+) or negative (-). If the address data are determined to be positive at step S1, control proceeds to step S2. The number of bits is doubled at step S2, that is, the 16-bit address data are converted at step S2 to 32-bit data, at the same time that the MSB (bit b 31 ) of the 32 bit data is set to "0" and the bits b 30 to bit b 16 are also set to "0", before control proceeds to step S4. The 32-bit data produced at step S2 are algebraically summed to another 32 bit data in an additive or subtractive mode. If the address data are found at step S1 to be negative, control proceeds to step S3, where the 16-bit data are similarly converted into 32-bit data, the MSB (bit b 31 ) is set to "1", bits b 30 to bit b 16 are set to "0" and bits b 15 , b 14 , b 13 and b 12 are also set to "0", before control passes to step S4. The 32-bit data obtained at step S3 are algebraically summed at step S4 to another 32-bit data in an additive or subtractive mode. The address discriminating circuit of the present embodiment may be applied to, for example, a playback circuit 9 or a magneto-optical disc controlling circuit 3 of a disc recording and/or reproducing apparatus shown in Fig.6. The arrangement shown in Fig.6 renders it possible to record and/or reproduce signals using the disc D of the present embodiment which, as an example, is a magneto-optical disc. That is, information data corresponding to write data DT WT entered from a host computer, not shown, along with write commands are written on the disc D, while information data read out from disc D responsive to read-out commands entered from host computer are transmitted as read-out data DT RD to host computer. That is, when information data are to be written on the disc D, the write command and the data to be written are first written in a memory circuit 4 via a magneto-optical disc controlling circuit 3 arranged in a micro-computer configuration. The magneto-optical disc controlling circuit 3 converts the write data DT WT , written in memory circuit 4, into block data at an interval of the above-mentioned sector as a recording unit, while appending predetermined additional information to the block data. The resulting data are read out as recording information data DT REC which are transmitted to a recording processing circuit 5. The recording processing circuit 5 modulates the input recording information data DT REC to generate magnetic recording driving signals S MREC and optical recording driving signals S LREC which are transmitted to a magnetic head 6 and to an optical head 7, respectively. This causes the magnetic head 6 to apply a recording magnetic field H R , corresponding to the magnetic recording driving signal S MREC , on the front side of the disc D, run into rotation about shaft 8 as a center of rotation, while causing the optical head 7 to radiate the recording laser light L REC corresponding to the optical recording driving signal S LREC from the back side of the disc D, for writing the information data corresponding to the write data DT WT on the disc D. When the information data are to be read from disc D, a readout command is entered into the magneto-optical disc controlling circuit 3 which causes the optical head 7 to emit the light to radiate a playback light L PB at an arbitrary position on the disc D responsive to the readout command. As a result thereof, the optical head 7 receives the light reflected from disc D to transmit the resulting playback signals S PB to playback processing circuit 9. The playback processing circuit 9 converts the playback signals into corresponding two-valued signals to demodulate the two-valued signals to generate playback information data DT PB which are transmitted to the magneto-optical disc controlling circuit 3 so as to be written in memory circuit 4. The magneto-optical disc controlling circuit 3 performs error detection and correction and de-blocking on the playback information data DT PB thus written in memory circuit 4 and reads out the error-corrected and de-blocked data as playback data DT RD which are supplied to the host computer. In this manner, the information data may be read out from disc D responsive to the readout command. The disc-shaped recording medium and the address discriminating circuit, according to the present invention, are so arranged and constructed that, by taking advantage of the fact that the number of addresses required for one of the (+) side and the (-) side according to the conventional format, such as the (-) side, is lesser than that required for the other side, for example, the (+) side, the upper n bits of the N bits are used in the manner of sign bits for representing the addresses for the above-mentioned one side for indicating that the address is for the one side, and for representing the address by the remaining bits, while the addresses for the other side are represented by the N bits inclusive of the upper n bits, with the upper n bits not being in the state of indicating the above-mentioned one side showing that the addresses are those for the above-mentioned other side. Since the arrangement renders it possible to cope with the increased number of addresses required for the other side, it becomes possible to represent the tracks in their entirety, while maintaining interchangeability with the conventional system, even although the track pitch of the disc-shaped recording medium is increased as compared with the conventional system, thereby rendering it possible to discriminate easily the track addresses of the disc-shaped recording medium.

Claims: A recording medium in the form of a disc (D) in which locations on said disc other than a predetermined location set as a zero- address are represented by positive side addresses and negative side addresses with respect to said zero address, and in which the information concerning these addresses are at least recorded as address data constituted by N bits, characterised in that one of said positive side address data and said negative side address data are recorded in the form of said N bit data of which upper n bits, where N > n > 1, are all set to one of the binary states, with the remaining bits of said N bits representing the addresses, and wherein the other of said positive side address data and said negative side address data are recorded as data by said N bits exclusive of those data in which the upper n bits are all in said one of said binary states. The recording medium as defined in claim 1 wherein said (+) side and said (-) side are the radially outer (AR out ) and radially inner sides (AR in ) with respect to said predetermined location on said disc (D), said N bits are 16 bits, said upper n bits are 4 bits, address data on said radially inner side are recorded as data in which the upper four bits are all set to the binary state "1", with the remaining lower 12 bits representing the addresses, and wherein address data on said radially outer side (AR out ) are recorded as data by said 16 bits exclusive of those data in which the upper four bits are all in the binary state "1". An address discriminating circuit (12, 13, 14, 15, 22) for a recording medium according to claim 1, said address discriminating circuit (12, 13, 14, 15, 22) comprising binary state discriminating means (22) for discriminating the binary states of said upper n bits of said N bit address data read from said recording medium, and discriminating means (12, 13, 14, 15) for deciding the address data to be one of said positive side address data and said negative side address data if the binary state of all of said upper n bits as found by said binary state discriminating means (22) is said one of the binary states, and calculating the addresses based on remaining bits of the N bits, said discriminating means (12, 13, 14, 15) deciding the address data to be the other of said positive side address data and said negative side address data if the binary state of the upper n bits as found by said binary state discriminating means (22) is not a binary state in which the n bits are all in said one of the binary states, and calculating the addresses based on said N-bit data exclusive of the N-bit data in which the upper n bits of said N bits are all in said one of the binary states. An address discriminating circuit (12, 13, 14, 15, 22) according to claim 3 for a recording medium according to claim 2, wherein N is equal to 16 and n is equal to 4.

Inventors: OTSUKI TADASHI, OTSUKI, TADASHI, Otsuki, Tadashi, c/o SONY CORPORATION
Applicants: SONY CORP, SONY CORPORATION
Application year: 1993
Main classification: G11B27
IPC codes: G11B27, G11B11, G11B7, G11B20