A quantum effect device

Abstract: A quantum effect device including a plate-like conductor part having a necking portion is disclosed. Such a quantum device comprises: a conductor substrate having a main face; and a plate-like conductor part having two side faces, said side faces being perpendicular to said main face of said conductor substrate, said side faces being parallel to each other, wherein said plate-like conductor part includes a necking portion having a width smaller than a distance between said two side faces, and energy states of electrons in said necking portion are quantized in a direction perpendicular to said two side faces.

Description: The present invention relates to a device for which a quantum effect is utilized. Owing to the recent progress of the semiconductor technique, high integration of devices and miniaturization of device size have been progressing. Due to the miniaturization, it is necessary to develop a new device which has a structure different from that of the conventional transistor. For such a new device, a device for which a quantum effect is utilized has been studied (see THE JOURNAL OF THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS, Vol. 72, No. 12, pp. 1387-1391, December 1989). In order to cause the quantum effect, developments of a technique for forming dots or strip wires each having the size of the order of an electron wavelength, and a technique for constituting a circuit by coupling the dots and the strip wires are required. For a quantum device whose operation is based on the quantum effect, various devices are now being developed. Especially, a device for controlling the electron transfer by utilizing the resonant tunneling effect has been developed. The quantum device for which the resonant tunneling effect is utilized includes a minute conductor region in which the energy states which can be taken by electrons are quantized, and a pair of conductor regions (electrodes) adjacent to the minute conductor region via a thin barrier film through which electrons can tunnel. Such a quantum device is disclosed, for example, in U.S. patent No. 4,912,531 (Reed et al.) In order to realize the above quantum device, a technique for forming a microstructure with good reproducibility is required. A conventional quantum device is produced by laminating a plurality of different kinds of thin compound semiconductor films on a semiconductor substrate. As a result, in the quantum device, electrons move freely in a direction parallel to the main plane of the substrate, and electrons are confined in the quantized region in another direction perpendicular to the main plane of the substrate. However, in the above prior art, it is difficult to form a region which has a very small thickness which is measured along a direction parallel to the main plane of the substrate. EP-A-464 834 discloses a quantum effect device according to the preamble of claim 1. The inventive quantum effect device is defined by the features of claim 1. Suitable embodiments are described by the features of the subclaims. Thus, the invention described herein makes possible the advantages of providing a device for which a quantum effect is utilized including a necking portion having a very small thickness which is measured along a direction parallel to the main plane of a substrate. These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures. In the enclosed drawings: Figures 1A to 1C are perspective views illustrating a flow for producing a quantum effect device according to a first example. Figures 2A to 2F are perspective and cross-sectional views illustrating the flow for producing the quantum effect device according to the first example. Figures 3A to 3C are perspective views illustrating a flow for producing a quantum effect device according to a second example. Figures 4A to 4C are diagrams showing the operation principle of the quantum effect device according to the second example. Figure 4D is a graph schematically illustrating the relationship between the amount of current and the potential difference between the first and the second electrode. Figures 5A to 5D are perspective views illustrating a flow for producing a quantum effect device according to a first embodiment of the invention. Figures 6A to 6C are perspective views illustrating a flow for producing a quantum effect device according to a second embodiment of the invention. Figures 7A to 7C are perspective views illustrating the flow for producing the quantum effect device according to the second embodiment of the invention. Figures 8A to 8E are cross-sectional and perspective views illustrating the flow for producing the quantum effect device according to the second embodiment of the invention. Hereinafter, a method of producing a quantum effect device according to a first example will be described with reference to the relevant figures. Both terms "quantum device" and "quantum effect device" will be used. Figures 1A to 1C and Figures 2A to 2F show the method of producing a quantum device according to the first example. The production flow will be described below. In the step shown in Figure 1A , a nitride film (thickness: 100 nm) 2 like a strip wire (width: 500 nm) is formed on a silicon substrate 1 . An oxide film (thickness: 100 nm) 3 like a strip wire (width: 500 nm) is also formed on the silicon substrate 1 . The nitride film 2 and the oxide film 3 are formed substantially perpendicular to each other. In the step shown in Figure 1B , using the nitride film 2 and the oxide film 3 as a mask, the silicon substrate 1 is etched by a dry etching technique, so as to form a first recess portion (depth: 300 nm) 4 . For the etchant, SF 6 is used. In the step shown in Figure 1C , a nitride film (thickness: 100 nm) is first deposited over the entire surface. Then, the nitride film is etched back by anisotropic etching, so as to form a side wall structure 5 of the nitride film on the side walls of the nitride film 2 , the oxide film 3 , and the first recess portion 4 . Thereafter, the oxide film 3 is removed away by an etching method. In the step shown in Figure 2A , by using the nitride film 2 and the side wall structure 5 as a mask, the exposed portion of the silicon substrate 1 is etched by the dry etching technique, so as to form a second recess portion (depth: 250 nm) 6 . By this etching step, a silicon stripe S is formed. At the step of Figure 2A , the cross-sectional view taken along line B-B' is shown in Figure 2B , and the cross-sectional view taken along line C-C' is shown in Figure 2C . As is shown in Figure 2B , in the portion where the oxide film 3 has been formed at the step of Figure 1A , the nitride film 2 exists on the silicon stripe S , and nothing exists on the side walls of the silicon stripe S . As is shown in Figure 2C , in the portion where the oxide film 3 has not been formed at the step of Figure 1A , the nitride film 2 exists on the silicon stripe S , and the side wall structure 5 is positioned on the side walls of the silicon stripe S . Thereafter, a thermal oxidation process is performed, so as to form a thermal oxide film (thickness: 220 nm) 7 . The thermal oxidation process is performed in a pyrogenic atmosphere, at a temperature of 1000°C for about 50 minutes. After the thermal oxidation process, the resulting cross-sectional view taken along line B-B' is shown in Figure 2D , and the resulting cross-sectional view taken along line C-C' is shown in Figure 2E . Specifically, since the side wall structure 5 does not exist on the side walls of the silicon stripe S in the B-B' cross section, the oxide film formation progresses from the side wall portions of the silicon stripe S . As a result, an extremely thin thin width 8 of the silicon stripe S in the B-B' cross section is obtained, as is shown in Figure 2D . In the C-C' cross section, since the side wall structure 5 exists on the side walls of the silicon stripe S , the oxidation progresses from a portion of the silicon stripe S lower than the side wall structure 5 . As a result, a relatively thick width 9 in the C-C' cross section is obtained. Figure 2F shows the resulting silicon surface structure excluding the oxide films and the nitride films. As is shown in Figure 2F , a silicon strip wire 10 having a necking portion (the thickness thereof which is measured along a lateral direction: 60 nm) 11 is obtained. Even in a case where the strip sizes (widths) of the nitride film 2 and the oxide film 3 are those not capable of attaining the quantum effect, a small size capable of attaining the quantum effect can be realized in the necking portion 11 according to this example. In another case where the strip sizes of the nitride film 2 and the oxide film 3 are those capable of attaining the quantum effect, quantum strip wires having various widths can be produced according to this example. As described above, according to this example, a method for easily producing a quantum device having a lateral size capable of attaining the quantum effect can be obtained. In this example, the thermal oxidation is performed so as to form the thermal oxide film 7 for obtaining the extremely thin width 8 in the B-B' cross section. Alternatively, silicon may be etched by wet etching by using a mixture of hydrofluoric acid and nitrate as the etchant so as to reduce the width 8 in the B-B' cross section. In this example, thermal oxidation is performed for forming the thermal oxide film 7 so as to obtain the width 8 in the B-B' cross section. Alternatively, the width 8 may be reduced by the combination of the wet etching and the thermal oxidation. Hereinafter, a method of producing a quantum device according to a second example will be described with reference to the relevant figures. Figures 3A to 3C illustrate the method of producing a quantum device according to the second example. Figures 4A to 4D illustrate the principle of the operation of the quantum device in the second example. The production flow is described below. In the step shown in Figure 3A , a plate-like silicon 60 including a necking portion (thickness: 60 nm) 61 is formed on a silicon substrate 1 by the method described in the above first example. In the step shown in Figure 3B , a thermal oxidation is performed, so as to form a thin thermal oxide film (thickness: 2 nm) 62 around the plate-like silicon 60 and the necking portion 61 , and on the silicon substrate 1 . In the step shown in Figure 3C , a single crystal silicon 63 is formed and then a planarization is performed. The left portion of the single crystal silicon 63 functions as a first electrode 63a . The right portion of the single crystal silicon 63 functions as a second electrode 63b . As seen from Figure 3C , a structure including, along the x direction, the single crystal silicon 63 , the 2-nm tunnel oxide film 62 , the necking portion (substrate 1 ) 61 , the 2-nm tunnel oxide film 62 , and the single crystal silicon 63 is formed. The energy states of electrons in the necking portion 61 are quantized in the thickness direction x, so that it has a two-dimensional structure. A thickness of 2 nm of the oxide film 62 is sufficient for electrons to tunnel through the oxide film 62 . Figures 4A to 4C are potential diagrams in the cross section along the x direction in the region including the necking portion in Figure 3C . The operation of the quantum device as shown in Figure 3C is described with reference to Figures 4A to 4D . Figure 4A shows a state where the potential difference between the first electrode 63a and the second electrode 63b is 0. Figure 4B shows a state where a first potential difference 108 is applied between the first electrode 63a and the second electrode 63b . Figure 4C shows a state where a second potential difference 109 is applied between the first electrode 63a and the second electrode 63b . In Figure 4A , the first electrode 63a and the second electrode 63b are conductive regions of the single crystal silicon 63 in Figure 3C , and each have a three-dimensional structure, and have a continuous band structure. The Fermi level in the first electrode 63a is defined as a Fermi level 107 in the first electrode 63a . In the necking portion (resonant layer) 61 , the width thereof in the x direction is sufficiently small, so that it is regarded as having a two-dimensional structure on the basis of the quantum theory. The band structure in the necking portions 61 is different from that of the first and second electrodes 63a and 63b . For simplicity, it is presumed herein that values of the Fermi level 107 at which a probability that carriers (electrons) transmit from the first electrode 63a to the second electrode 63b due to the resonant tunneling effect is 1 are represented by quantized levels 106 in the necking portion 61 . In the state shown in Figure 4A , since the Fermi level in the first electrode 63a is not equal to the quantized levels 106 in the necking portion 61 , the resonant tunneling effect does not take place. Thus, the tunneling of the carriers from the first electrode 63a to the second electrode 63b does not occur. Next, in the state of Figure 4B where the first potential difference 108 between the first and the second electrodes 63a and 63b is applied so that the Fermi level 107 in the first electrode 63a is equal to either one of the quantized levels 106 in the necking portion 61 , the tunneling of carriers from the first electrode 63a to the second electrode 63b due to the resonant tunneling effect occurs, thereby causing a current to flow. In the state shown in Figure 4C , the potential difference between the first and the second electrodes 63a and 63b is increased, but has not reached the potential difference between the first and the second electrodes 63a and 63b at which the Fermi level 107 in the first electrode 63a is equal to the other one of the quantized levels 106 in the necking portion 61 . Specifically, when the second potential difference 109 between the first and the second electrodes 63a and 63b is applied as is shown in Figure 4C , the current does not flow. Figure 4D schematically shows the amount of current while the potential difference between the first and the second electrodes 63a and 63b is continuously increased from zero. In Figure 4D , the negative resistance is exhibited. By utilizing the negative resistance, a device having a new function in addition to the conventional ON/OFF function of a MOSFET can be produced. In this example, only the necking portion 61 is sufficiently thin for the quantization in the thickness direction, and the other portions of the plate-like silicon 60 are formed to be sufficiently thick not for the quantization. As a result, as is shown in Figure 3C , even when the single crystal silicon 63 is formed entirely around the plate-like silicon 60 , the region where the resonant tunneling takes place can be limited to the necking portion 61 . Therefore, during the formation of the single crystal silicon 63 , the restrictions for production are reduced. In addition, when a quantum well is produced into a zero dimension in the resonant tunneling effect, the quantum well can be produced only by giving attention to the width in the y direction and the depth in the z direction of the necking portion 61 . As described above, according to this example, a method of producing a quantum device by which a quantum device having a size sufficient for attaining the resonant tunneling effect can readily be produced. Next, a method of producing a quantum device according to a first embodiment of the invention will be described with reference to the relevant figures. Figures 5A to 5D illustrate the method for producing a quantum device in the first embodiment of the invention. The production flow will be described below. In the step shown in Figure 5A , a silicon strip wire 30 having a necking portion (thickness: 60 nm) 31 is formed on a silicon substrate 1 by the method described in the first example. In the step shown in Figure 5B , an insulator is formed, and patterned to expose the surface of the silicon strip wire 30 . Thus, an insulating film (thickness: 500 nm) 32 is obtained. In the step shown in Figure 5C , a thermal oxidation is performed to form an oxide film (thickness: 10 nm) 33 . In the step shown in Figure 5D , polycrystalline silicon is deposited, and patterned into an electrode shape. Thus, a control electrode 34 is formed. In this embodiment, by controlling the potentials of the control electrode 34 and the silicon substrate 1 which are connected via the silicon strip wire 30 and the oxide film 33 , a depletion region, a reversed region, or a storage region can be formed in the silicon strip wire 30 . Therefore, electrodes are formed at both ends of the strip wire, and a potential is applied, so that a current can be caused to flow. The amount of current can be controlled by changing the electrical potential of the control electrode 34 . As described above, according to this embodiment, a method by which a quantum device can readily be produced can be obtained. Next, a method of producing a quantum device according to a second embodiment of the invention will be described with reference to the relevant figures. Figures 6A to 6C , 7A to 7C , and 8A to 8E illustrate the method of producing a quantum device according to the second embodiment of the invention. The production flow will be described. In the step shown in Figure 6A , after a gate oxide film (thickness: 10 nm) 12 is formed on a silicon substrate 1 , polycrystalline silicon (thickness: 250 nm) 13 and a nitride film (thickness: 100 nm) 14 are formed and patterned into predetermined shapes. The patterned polycrystalline silicon 13 will serve as a gate electrode. In the step shown in Figure 6B , a nitride film is first deposited over the silicon substrate 1 , and then etched back by anisotropic etching, so as to form a first side wall structure 15 of the nitride film at the side walls of the polycrystalline silicon 13 and the nitride film 14 . In the step shown in Figure 6C , an oxide film is first deposited over the silicon substrate 1 and then patterned by anisotropic etching, so as to form an oxide stripe (thickness: 100 nm) 16 . In the step shown in Figure 7A , the silicon substrate 1 is etched by using the nitride film 14 , the oxide stripe 16 , and the first side wall structure 15 as a mask, so as to form first recess portions 17 . In the step shown in Figure 7B , a nitride film is first deposited and then etched back by anisotropic etching, so as to form a second side wall structure 18 of the nitride film at the side walls of the nitride film 14 , the oxide stripe 16 , the first side wall structure 15 , and the first recess portion 17 . In the step shown in Figure 7C , the oxide stripe 16 is removed, and silicon etching is performed by using the nitride film 14 , the first side wall structure 15 and the second side wall structure 18 as a mask, so as to form second recess portions 19 . Figure 8A shows a cross-sectional view taken along line A-A' in Figure 7C . Figure 8B shows a cross-sectional view taken along line B-B' in Figure 7C . Specifically, in the A-A' cross section, the silicon side wall portions are exposed. In the B-B' cross section, the silicon side wall portions are covered with the second side wall structure 18 . In steps shown in Figures 8C and 8D , a thermal oxidation is performed, so as to form a thermal oxide film (thickness: 220 nm) 20 . Figure 8C shows the A-A' cross section after the thermal oxidation. In the A-A' cross section, the oxidation progresses from the silicon side wall portions, whereby a necking portion 23 having a width 21 is obtained. Figure 8D shows the B-B' cross section after the thermal oxidation. In the B-B' cross section, a silicon strip wire 24 having a width 22 which is larger than the width 21 is obtained. Figure 8E shows the perspective view of the structure after the formation of the thermal oxide film 20 in the steps of Figures 8C and 8D . Note that in Figure 8E , for simplicity, the structure is shown without the nitride films and the thermal oxide film 20 . In this embodiment, the gate electrode (polycrystalline silicon 13) is formed in a self-alignment with the necking portion 23 and the silicon strip wire 24 . This means that it is unnecessary to performing any additional step for forming an electrode after the formation steps of the necking portion and the silicon strip wire. Thus, this embodiment is superior to the first example. As described above, according to this embodiment, a method by which a quantum device having a size capable of attaining the quantum effect can easily be produced is obtained.

Claims: A quantum effect device comprising: a semiconductor substrate (1) having a main surface ; and a plate-like semiconductor part (10, 24, 30, 60) formed on said main surface of said semiconductor substrate (1) as a portion of said semiconductor substrate (1), said plate-like semiconductor part (10, 24, 30, 60) having two side faces which are perpendicular to said main surface of said semiconductor substrate (1), said side faces being parallel to each other, wherein said plate-like semiconductor part (10, 24, 30, 60) includes a necking portion (11, 23, 31, 61) having a lateral width (8, 21) smaller than the distance (9, 22) between said two side faces, said lateral width (8, 21) of said necking-portion (11, 23, 31, 61) being sufficiently thin to attain the quantization of energy states of electrons in said necking portion (11, 23, 31, 61) in the direction perpendicular to said two side faces, characterized in that: a gate insulating film (12, 33) is formed at least on an upper face of said necking portion; and a gate electrode (13, 34) is formed on said gate insulation film (12, 33). A quantum effect device according to claim 1, further comprising a pair of insulating layers (32) formed at least on side faces of said necking portion. A quantum effect device according to one of claims 1 or 2, wherein said gate electrode is self-aligned with an upper surface of said plate-like semiconductor part. A quantum effect device according to one of claims 1 to 3, wherein said semiconductor substrate (1) and said plate-like semiconductor part (10, 23, 30, 60) are made of silicon.

Inventors: HIRAI YOSHIHIKO, MORIMOTO KIYOSHI, NIWA MASAAKI, OKADA KENJI, UDAGAWA MASAHARU, YASUI JURO, YUKI KOICHIRO, HIRAI, YOSHIHIKO, MORIMOTO, KIYOSHI, NIWA, MASAAKI, OKADA, KENJI, UDAGAWA, MASAHARU, YASUI, JURO, YUKI, KOICHIRO
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1993
Main classification: H01L29
IPC codes: H01L29