Information processing system

Abstract: An information processing system, which can realize an I/O process with high processing efficiency regardless of the time required for the I/O process, is provided. For this purpose, a time required for an I/O process is calculated prior to the I/O process, and an optimal control system is selected from a plurality of selectable I/O control systems in accordance with the calculated time, thereby controlling the I/O process.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to an information processing system comprising a computer system having a CPU for performing a normal arithmetic process and a memory, and an input/output (I/O) device having a function of performing an I/O process in response to an I/O request received from the computer system, and of informing the end of the I/O process to the computer system. Related Background Art Conventionally, in a system of this type, an I/O device receives an I/O request from a program operating on a computer system. When the I/O process ends, the I/O device issues an interruption signal to the computer system or changes the value of a register, which can be read out by the computer system, thereby informing the computer system that the I/O process has ended. Therefore, the program operating on the computer system either issues an I/O request following the entry of a program to be executed after the end of an I/O process is registered in advance in a corresponding interruption vector, or senses a register in the I/O device and waits for the end of a previous I/0 process and thereafter starts a program to be executed after the end of the I/O process. In this case, the first I/O processing svstem is called an interruption system, and the second I/O processing system is called a polling system. However, in the prior art, control of the I/O device must be programmed by permanently selecting either the interruption system or the polling system. When the interruption system is selected, a CPU can execute another job until the end of I/O. However, when an interruption process is started, the CPU status (register contents) must be saved and returned. For this reason, when the I/O processing time (from an I/O request to I/O end) executed by the I/O device is short, the processing efficiency is undesirably lowered. On the other hand, when the polling system is selected, if the I/O processing time is short, the processing efficiency is better than that of the interruption system since the polling system requires neither of the CPU status save and return processes. However, if the I/O processing time is long, since the CPU must keep polling during this time, the throughput of the entire system is lowered. That is, when an I/O device such as a hard disk device for which the processing time changes depending on, e.g., the current head position is to be controlled, an optimal process cannot always be performed even if such control is programmed using either system. The present invention is concerned with providing an information processing system which can realize an I/O process with high processing efficiency by dynamically switching an I/O process control method in accordance with the time required for the I/O process. European Patent Specification No. EP-A-0,473,279 discloses a communication control apparatus for computing systems in which a computing device is connected to a plurality of peripheral devices. The apparatus can operate in a plurality of different modes and selects an appropriate mode in response to an indicator from an addressed peripheral device which indicates the mode appropriate to that device. An article in the IBM Technical Disclosure Bulletin, vol. 25, no. 10, March 1983, pages 5012-13 discloses a microcontroller having a core CPU and associated smart peripherals so as to reduce interruptions to the operation of the core CPU. According to one aspect, the present invention comprises an information processing system as set out in claim 1. In order that the present invention may be more readily understood, an embodiment thereof will now be described by way of example and with reference to the accompanying drawings, in which: Fig. 1 is a block diagram showing a block arrangement of an information processing system according to an embodiment of the present invention; and Fig. 2 is a chart showing the throughput of an I/O process. DESCRIPTION OF THE PREFERRED EMBODIMENTS The preferred embodiment of the present invention will be described hereinafter with reference to the accompanying drawings. Fig. 1 is a block diagram showing a block arrangement of an information processing system according to an embodiment of the present invention. In Fig. 1, the information processing system is constituted by a computer system 1 including a memory and a CPU, and an I/O device 2 including an I/O request reception unit 3 for receiving an I/O request issued by the computer system 1, an I/O processing time calculation unit 4 for calculating an expected I/O processing time, an I/O processing time information unit 5 for informing the calculated I/O processing time to the computer system 1, an I/O processing unit 6 for executing an actual I/O process, an I/O end information unit 7 for forming the end of an I/O process to the computer system 1, and the like. Note that a plurality of I/O devices 2 may be provided to the computer system 1. The computer system 1 includes an I/O request issue unit 10 for issuing an I/O request to the I/O device 2, an I/O processing time read out unit 11 for reading out the processing time value informed by the I/O processing time information unit 5, an I/O control switching unit 12 for dynamically switching an I/O control system in accordance with the value read out by the I/O processing time read out unit 11, an interruption system I/O control unit 13 realized in a switchable format, and a polling system I/O control unit 14 realized in a switchable format. The operations of the respective units will be described below. When the computer system 1 controls the I/O device 2, the I/O request issue unit 10 issues an I/O request to the I/O device 2. In general, the I/O request is issued in such a manner that a register (for receiving an I/O request) for the I/O device 2 is mapped on a memory space or an I/O space of the computer system 1, and the I/O request issue unit 10 writes information necessary for issuing the I/O request in the mapped space. In the I/O device 2, the I/O request reception unit 3 receives the I/O request issued by the I/O request issue unit 10, and interprets the content of the request. The I/O processing time calculation unit 4 calculates an expected processing time required for the requested I/O process, and the I/O processing time information unit 5 informs the calculated I/O processing time to the computer system 1. In the case of, e.g., a hard disk device, the I/O processing time is calculated on the basis of the distance from the current head position to a track position corresponding to the I/O request, the size of data to be transferred, the time required for a read or write access to the hard disk, and the like. Information to the computer system 1 is performed in such a manner that a register (for informing an I/O processing time) for the I/O device 2 is mapped on the memory space or the I/O space of the computer system 1, and the computer system 1 reads out the mapped area. Upon completion of the information of the I/O processing time, the I/O device 2 causes the I/O processing unit 6 to execute an actual I/O process. Parallel to this process, the computer system 1 causes the I/O processing time read out unit 11 to read out the I/O processing time, and determines based on the readout value whether the I/O control switching unit 12 selects the interruption system I/O control unit 13 or the polling system I/O control unit 14. In this determination, a threshold value is set in advance, and when the I/O processing time exceeds the threshold value, the interruption system I/O control unit 13 is selected; otherwise, the polling system I/O control unit 14 is selected. As the threshold value, the time required for save and return processes of the CPU status may be used. Because, if the interruption system is executed when the I/O processing time is shorter than the time required for save and return processes of the CPU status, the throughput may be lowered as compared to the polling system, as shown in Fig. 2. In the information processing system with the above-mentioned arrangement, when an I/O request is issued from the computer system 1, and is received by the I/O device, the I/O processing time calculation unit 4 calculates an I/O processing time expected for the received I/O request. When the calculated I/O processing time is informed to the computer system by the I/O processing time information unit 5, the I/O control switching unit 12 switches an I/O control system for the I/O device 2 to one of the interruption system and the polling system on the basis of the informed I/O processing time, thereby improving the throughput of the entire information processing system. Fig. 2 is a chart showing the throughput of an I/O process in the information processing system shown in Fig. 1. In Fig. 2, T1 represents the I/O processing time, Ta represents the CPU status save processing time, Tb represents the return processing time, and T2 represents the processing time to be executed after the end of I/O. Assuming that the above-mentioned times satisfy T1 < Ta + Tb, if the interruption system is selected, the CPU executes another executable processing (process P1 in Fig. 2) for the I/O processing time T1, and the total time including the processing time of the process P1 is T1 + Ta + T2 + Tb. On the other hand, if the polling system is selected, a polling process is executed for the I/O processing time T1, and thereafter, the process to be executed after the end of I/O is executed for the time T2. Thereafter, if a process P1 is executed for the purpose of comparison with the interruption system, the total time is T1 + T2 + T1. Therefore, the processing time difference between the polling and interruption systems corresponds to a difference between (Ta + Tb) and T1. When T1 < Ta + Tb, the total processing execution time of the polling system is shorter by Tx = (Ta + Tb) - T1 than the interruption system. Therefore, in the case of a system placing an importance on the throughput, the threshold value is set to be Ta + Tb. However, a system placing an importance on turn around is not always limited to this value. In this case, when the time Tx assumes a small value, the interruption system should often be selected rather than the polling system. In such a case, the threshold value is smaller than Ta + Tb. In this manner, the threshold value may be arbitrarily determined by a system designer in accordance with requirements for a system to be realized. When the I/O control switching unit 12 selects the interruption system I/O control unit 13, the entry of a program to be executed after the end of the I/O process is registered in a corresponding interruption vector. This registration may be statically made in advance as long as the entry of the program is not dynamically changed. The computer system 1 then executes another executable process. When the polling system I/O control unit 14 is selected, the register (for informing end of the I/O process) for the I/O device 2 mapped on the memory or I/O space of the computer system 1 is sensed to wait for the end of the I/O processing. During the polling process, interruption is masked to hold interruption from the I/O device 2. On the other hand, when the I/O process ends, the I/O device 2, which has been executing the actual I/O process using the I/O processing unit 6, causes the I/O end information unit 7 to inform the end of the I/O process to the computer system 1. This information is made either by interrupting the computer system 1 or by changing the value of the register for informing the end of the I/O process in correspondence with the interruption system I/O control unit 13 or the polling system I/O control unit 14. In the computer system 1, when the interruption system I/O control unit 13 is selected, the end of the I/O processing is informed by interruption. When an interruption signal is generated, the control enters a program registered in the corresponding interruption vector, and the program to be executed after the end of the I/O process is executed. When the polling system I/O control unit 14 is selected, the end of the I/O process is informed by changing the value of the register for informing the end of the I/O process. When the computer system 1, which has been executing the polling process, reads a change in register value, it ends the polling process, and executes a program to be executed after the end of the I/O process. As described above, according to this embodiment, when an I/O request is issued from the computer system, and is received by the I/O device, an expected I/O processing time required for the received I/O request is calculated. When the calculated I/O processing time is informed to the computer system, the I/O control system for the I/O device is switched to the interruption system or the polling system on the basis of the informed I/O processing time. Therefore, the I/O processing efficiency of the entire system can be remarkably improved as compared to a system in which the I/O control system is limited to either the interruption system or the polling system.

Claims: An information processing system comprising a computer system (1) and an input/output device (2), said input/output device (2) comprising: reception means (3) for receiving an input/output request from said computer system (1); processing means (6) for processing the input/output request by said reception means (3); and information means (5) for informing a parameter to said computer system (1), said computer system (1) comprising: issue means (10) for issuing an input/output request to said input/output device (2); selection means (12) for selecting an input/output processing control system on the basis of the parameter received from said input/output device: and control means (13, 14) for controlling an input/output process on the basis of the control system selected by said selection means (12), characterized in that said input/output device (2) further comprises calculation means (4) for calculating prior to the processing by said processing means (6) the processing time required for processing the input/output request on the basis of the contents thereof, said information means (5) being adapted to provide the processing time calculated by said calculation means (4) to said computer system (1) as the parameter, and said selection means (12) being adapted to select the input/output processing control systems on the basis of said processing time. A system according to claim 1, wherein said selection means can select an interruption system. A system according to claim 1 or claim 2, wherein said selection means can select a polling system. A system according to any preceding claim, wherein when the processing time is shorter than a predetermined time, said selection means selects a polling system, and when the processing time is equal to or longer than the predetermined time, said selection means selects an interruption system. A system according to claim 4, wherein the predetermined time is the time required for saving and returning the CPU status.

Inventors: SUZUKI SHIGEO, SUZUKI, SHIGEO
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1993
Main classification: G06F13
IPC codes: G06F13