Low-power-consumption monitor standby system

Abstract: A cathode ray tube monitor comprises a detector (551) for detecting absence of one of colour, HSYNC, or VSYNC signals sent by a host computer; and a power manager circuit (553) coupled to the detector (551) for reducing power consumption by power-using circuits in the cathode ray tube monitor. The power manager circuit reduces power to one or more of the power-using circuits in response to the detector (551) detecting absence of one of the colour, HSYNC, or VSYNC signals.

Description: The present invention is in the field of automatic power saving devices and pertains in particular to reduction of power consumption by computer video monitors. A typical color video monitor may consume as much as 50 to 80 percent of the total electrical energy consumed by a personal computer (PC). A video monitor dissipates this energy as visible light emissions from screen phosphors, thermal waste, electromagnetic radiation, high-energy radiation and acoustic energy Only the phosphor emissions are normally considered useful and then only when actively being watched by an observer. The radiation emissions have been a hotly debated source of concem regarding possible health risks from long-term exposure. Manufacturers incur considerable extra expense to reduce radiation emissions from video monitors. Some people are annoyed by the acoustic emissions produced by some monitors. Thermal losses from video monitors contribute an additional load on air conditioning equipment. The energy efficiency of video monitors has historically improved mostly as a result of advances in the electronic circuit components such as the increased use of integrated circuit (IC) devices. Cathode ray tube (CRT) technology has improved rather little in terms of energy efficiency. The number of PC's in regular use is growing rapidly and has reached a point where they have become major consumers of electric power. The United States Environmental Protection Agency has issued power efficiency targets for computer manufacturers to design for in new systems. Low-voltage IC's use less energy, and microprocessor power management techniques allow a computer to reduce energy consumption when idling. Until a suitable replacement for the CRT or a more efficient CRT is developed it will be difficult to substantially improve personal computer energy efficiency. What is needed is a way to shut down high-energy-consuming circuits in the video monitor when the computer determines that the display may be of no interest to anyone. This might be determined by a period of inactivity on input devices such a modem, mouse and keyboard. Many computers and video terminals use such a technique to activate a screen blanking circuit or a program that displays moving images (or no image) to avoid burning the screen phosphors. Activating an input device such as pressing a key or moving a mouse causes the previous screen image to be restored. This technique can be extended to reduce video monitor power consumption by signaling the microcontroller found in many recent design monitors, or an add-on device for 'dumb' monitors, to shut down or restore some or all of the monitor's electrical power circuits. One key to accomplishing this end is a means of signaling a monitor to shut down to some selected level without adding to the signals presently provided to a monitor. A screen blanker for the monitor of a computer system is disclosed in US-A-5059961, the system automatically clears the data image on the display screen if the computer has not been used for a predetermined length of time and re-displays the cleared data once the computer is operated again. JP-A-1257893 discloses a system for powering down a display, including a control circuit which detects when a sync signal is or is not received by the display device, when there is no sync signal the power to the display is removed by means ofa switch. In IBM Technical Disclosure Bulletin vol. 34, No. 9 is disclosed a cathode ray tube monitor comprising a detector for detecting absence of HSYNC, or VSYNC signals sent by a host computer; and a power manager circuit coupled to the detector for reducing power consumption by power-using circuits in the cathode ray tube monitor; wherein the power manager circuit reduces power to power-using circuits in response to the detector detecting absence of said HSYNC, or VSYNC signals. The present invention provides a video monitor and a method for directing assumption of alternative power using-states in a video monitor according to claims 1 and 9 respectively. The invention will now be described in more detail with reference to the accompanying drawings, in which: Fig. 1 is a largely schematic representation of a PC according to an embodiment of the present invention. Fig. 2A is a largely schematic representation of a PC enhanced by an add-on device according to an alternative embodiment of the present invention. Fig. 2B is a largely schematic representation of a PC enhanced by an add-in device according to another alternative embodiment. Fig. 3 is a largely schematic representation of a microcontroller-based video monitor according to an embodiment of the present invention. Fig. 4 is a largely schematic representation of a "dumb" monitor equipped with an add-in device according to an alternative embodiment of the present invention. Fig. 5 is a largely schematic representation of an add-on device for controlling AC primary power to a monitor according to another alternative embodiment of the present invention. Fig. 1 shows the functional elements of a preferred embodiment of the present invention capable of providing 3 distinct signals to a monitor to signal the monitor to adjust to as many as three states. In an embodiment of the invention, the states are selected levels of monitor power management (MPM). The signal to the monitor is based on interrupting one or the other or both HSYNC and VSYNC signals. In the embodiment shown in Fig. 1 a PC 111 comprises a Basic Input Output System (BIOS) 113 and a Video Graphics Adapter (VGA) 117. The invention will work equally well with other video adapters, as virtually all such adapters employ HSYNC and VSYNC signals. In some other adapters, equivalent means of interrupting the HSYNC and VSYNC signals would be used. BIOS 113 includes instructions for MPM, which can cause a central processing unit (CPU) 115 to change the state of sync-enable controls in VGA 117. In alternative embodiments instructions for implementing MPM might be embedded in operating system (OS) device driver routines or Terminate and Stay Resident (TSR) programs. The MPM instructions monitor CPU 115 interrupts for input devices (not shown) such as the timer, keyboard and serial communication ports. MPM instructions advance a time-out counter on each timer interrupt and reset the count to an initial value on each monitored interrupt. The initial value of the MPM time-out counter may be fixed or adjustable. When the MPM time-out counter reaches a pre-set overflow value, due to cessation of monitored interrupts, instructions are executed that change the state of HSYNC Enable 124 and VSYNC Enable 126 control to disable output of horizontal synchronization signals (HSYNC) 123, produced by horizontal sync generator 122, and/or vertical synchronization signals (VSYNC) 125, produced by vertical sync generator 120, or both. A subsequent monitored interrupt causes execution of instructions that change the state of HSYNC Enable 124 and VSYNC Enable 126 control circuits to enable output of HSYNC 123 and VSYNC 125 signals from VGA 117. In the case of a VGA controller, the enable/disable capability is through writing by the CPU into register 3C2 of the controller, wherein bits six and 7 are reserved for horizontal retrace polarity and vertical retrace polarity respectfully. HSYNC and VSYNC signals 123 and 125 are brought to interface 121 along with other signals, such as R, G, and B signals from D/A/converter 119. The signals are transmitted to a monitor on VGA cable 127 as is known in the art. In an alternative embodiment, shown in Fig. 2A, useful for refitting existing computers, a current art PC 211 having a CPU 215 is enhanced by installation of a switch 231, which connects between a VGA 217 VSYNC output 225 and VSYNC input 226 to a video interface 221. In a color computer, R,G, and B signals are brought to interface 221 from DAC 219. An add-in time-out controller 229 comprising MPM instructions monitors input device activity as described above for Fig. 1. Time-out of all input devices causes instructions to be executed which change the state of program-controlled switch 231, blocking VSYNC input 225 to video interface 221. Resumption of monitored interrupts causes switch 231 to close, returning the VSYNC signals to line 226. A second switch 232 may be used in the HSYNC line to interrupt the HSYNC signals to line 224, and, in this embodiment, the add-in time-out controller controls both switches. In yet another alternative, one switch may be used to interrupt both HSYNC and VSYNC signals. The functional blocks presented in Fig. 2A are an internal solution to an add-in hardware/software embodiment, and the blocks are not intended to be taken literally as hardware devices and interfaces. It will be apparent to one with skill in the art that there are many equivalent ways the functional blocks might be accomplished. The keyboard, mouse, and modem inputs are monitored by the add-in controller, and are made available as well to the CPU in the typical manner. Fig. 2B shows an external solution for a hardware/software embodiment. In this solution an add-on time-out controller 259 is external to computer system 233, and each port that supports an input device and the video output port is fitted with an interface device connected to the add-on time-out controller. For example, interface 243 at COM port 241 used for a modem 245 monitors modem activity and reports to controller 259 on line 244. Interface 249 at keyboard port 247 monitors keyboard 251 activity and reports to controller 259 on line 250. Interface 255 at pointer port 253 monitors pointer 257 activity (mouse, joystick, trackball), and reports to controller 259 on line 256. In this embodiment controller 259 accomplishes the timer functions and outputs signals on line 238 to interface device 237 at video port 235. Line 239 goes to the monitor. Device 237 interrupts HSYNC and VSYNC signals according to the overflow states of add-on controller 259. A color video monitor 347 according to an embodiment of the present invention is shown in Fig. 3. Monitor 347 comprises an interface 333, a microcontroller 339 having MPM instructions according to the present invention and a video circuit (VC) 345 having voltage control circuitry. From interface 333 HSYNC pulses 335 and VSYNC pulses 337 go to microcontroller 339. Microcontroller 339 monitors the HSYNC signal 335 and VSYNC signal 337. The MPM instructions described above count the number of HSYNC pulses occurring between each pair of VSYNC pulses. Zero HSYNC pulses counted causes the MPM instructions in microcontroller 339 to change the voltage on Level-2 signal line 343. Similarly, an interval count of HSYNC 335 pulses greatly in excess of the maximum video scan rate for monitor 347, indicating a loss of VSYNC 337, causes microcontroller 339 to change the voltage on Level-1 signal line 341. Resumption of HSYNC 335 to VSYNC 337 pulse interval counts to a range from the minimum to the maximum scan rate causes MPM instructions in microcontroller 339 to restore quiescent voltage levels to Level-1 signal line 341 and Level-2 signal line 343. When video circuit 345 senses an active voltage level on Level-1 signal line 341, it cuts off power to all circuits in monitor 347 except microcontroller 339, any power necessary to interface 333, and video circuit it 345 power-control circuits (not shown). In this level 1 standby mode, power consumption of monitor 347 is reduced by more than 90 percent. If monitor 347 remains in level 1 standby for more than a few seconds, full warm-up time is required to reactivate it. An active voltage level on Level-2 signal line 343 causes video circuit 345 to cut off power to all circuits except those described above plus the CRT cathode heater. In level 2 standby mode monitor 347 power consumption is reduced by 80 to 90 percent. Because the CRT is kept hot, reactivating monitor 347 from level 2 standby requires about 5 seconds or less. Reactivation of monitor 347 occurs when voltage on Level-1 signal line 341 and Level-2 signal line 343 returns to the quiescent state allowing video circuit 345 to activate power to all circuits of monitor 347. Fig. 4 shows an alternative embodiment of the present invention in a monitor 447 with video circuits functionally similar to those described for the monitor shown in Fig. 3, including an interface 433 and a video circuit 445, but without a microcontroller. A sync detect circuit 451 compares pulse intervals for HSYNC 435 and VSYNC 437 against time-constants of adequate duration to allow for brief interruptions of sync pulses. Loss of HSYNC 435 pulses or VSYNC 437 pulses for periods longer than the associated time-constants causes sync detector circuit 451 to change Level-1 signal line 441 or Level-2 signal line 443 voltage to its active state as described for Fig. 3 and with the same results. Similarly, resumption of HSYNC 435 and VSYNC 437 pulses reactivates monitor 447 as described for Fig. 3 above. Fig. 5 shows another alternative embodiment of the present invention suitable for add-on use with a monitor 547 having an interface 533. A sync detect circuit 551, in an external enclosure having pass-through connections, inserts into VGA cable 127. Sync detect circuit 551 monitors video signals on VGA cable 127 and compares the SYNC interval for one or the other of VSYNC and HSYNC to a time-constant in a manner similar to that described for Fig. 4 above. Loss of the monitored SYNC signal in VGA cable 127 for an interval longer than the time-constant causes sync detect circuit 551 to change the voltage on power-control line 561 to its active level, which in turn causes an electronically-controlled switch 553 to open. Electronically-controlled switch 553 controls AC primary power from an electrical cord 559 to a receptacle for monitor 547 power supply cord 557. When electronically-controlled switch 553 opens, AC power to a DC power supply 555 is lost, thus causing total shutdown of monitor 547. Resumption of SYNC signals in VGA cable 127 video signal causes sync detect circuit 551 to change power-control line 561 to its quiescent state, thus causing electronically-controlled switch 553 to close, which restores AC power input to DC power supply 555 reactivating monitor 547. Whilst particular embodiments of the invention have been described, alternatives will suggest themselves to those skilled in the art without departing from the scope of the invention as defined in the appended claims. Some of these alternatives have already been described, such as MPM instructions implemented in an OS device driver or TSR routines instead of the BIOS, single-level MPM instead of two-level MPM and an external video monitor power control device. Other methods of signaling MPM state changes to a monitor might include time-based coded sequences of frequency changes in HSYNC or VSYNC, coded values in the color signals, or no color signal for an extended period. Alternative embodiments of MPM routines might allow an operator to control MPM operation through command steps, such as menus, dialog boxes or command lines. Such controls might include shutting down monitor power at will by pressing a "hot key", typing a command line or other program interface step. Other features might allow the operator to change the idle time required to trigger MPM and toggle MPM monitoring on or off. Alternative MPM routines might also require an operator to type a password before enabling the transmission of normal video signals to the video monitor. Alternative devices for both built-in and post-manufacture modification to implement monitor power control might be devised. Embodiments of the present invention for monochromatic and grey-scale video adapters and monitors are also contemplated.

Claims: A video monitor (347; 447; 547) including means for receiving video signals, including colour, VSYNC and HSYNC signals, from a host computer, the video monitor comprising: detector means (339; 451; 551) for detecting power management signals sent by the host computer; and power level control means coupled to the detector means (339; 451; 551) for removing power from power-using circuits in the video monitor (347; 447; 547) in response to the detector means detecting a power management signal; characterized in that the detector means (339; 451; 551) is configured for selectively detecting any one of at least first and second power management signals provided by interrupting at least one of the HSYNC and VSYNC signals or by generating time-based coded sequences of frequency changes in HSYNC or VSYNC, or coded values in the colour signals, and the power level control means is adapted to selectively remove power from said power using circuits of the monitor to reduce power usage of the video monitor (347; 447; 547) to at least first and second reduced power levels in response to detection of said first and second power management signals. A video monitor (347;447;547) as claimed in claim 1, wherein the detector means is adapted to detect interruption of at least one of said colour, HSYNC and VSYNC signals. A video monitor (347;447;547) as claimed in claim 1, wherein the detector means is adapted to detect at least one of, time-based coded sequences of frequency changes in said HSYNC or VSYNC signals, coded values in the colour signals, or no colour signal for an extended period. A video monitor (347;447;547) as claimed in claim 1, wherein the power level control means provides power at different power levels, including a full power level, a full power off level, and at least one intermediate level. A video monitor (347;447;547) as claimed in claim 1, wherein the power-using circuits include a filament heater. A video monitor (347;447;547) as claimed in claim 1, wherein the detector means (339;451;551) comprises a micro-controller (339) executing power management control routines. A video monitor (347;447;547) as claimed in claim 1 operable in a first power mode providing full power to all of the power-using circuits, a second power mode imposing power off to all power-using circuits in the video monitor (347;447;547) other than the detector means (339;451 ;551), the power management means, and a filament heater, and third mode imposing power off to all power-using circuits in the monitor (347;447;547) other than the detector means (339;451;551) and the power management means. A video monitor (347;447;547) as claimed in claim 1, wherein the detector means (339;451;551) comprises circuitry (551) imposed in line with a connecting cable (127), the connecting cable carrying colour, HSYNC, and VSYNC signals from a host computer system, and the power management means comprises a switch (553) in line with a primary power line (557) to the monitor (347;447;547), the switch responsive to a signal from the power management means to turn primary power off and on to the monitor (347;447;547). A method for directing assumption of alternative power-using states in a video monitor (347; 447; 547) having means for receiving video signals, including colour, VSYNC and HSYNC signals, from a host computer, the method comprising: detecting a power management signal sent to the video monitor (347; 447; 547) by a host computer; and directing one or more power-using circuits in the video monitor (347; 447; 547) to assume a reduced-power state in response to detection of a power management signal; characterized in that said detecting step comprises selectively detecting any one of at least first and second power management signals provided by interrupting at least one of the HSYNC and VSYNC signals or by generating time-based coded sequences of frequency changes in HSYNC or VSYNC, or coded values in the colour signals, and the directing step comprises selectively removing power from said power using circuits of the monitor to reduce power usage of the video monitor (347; 447; 547) to at least first and second reduced power levels in response to detection of said first and second power management signals. A method as claimed in claim 9, wherein the detecting step comprises detecting in first and second configurations, interruption of said colour, HSYNC or VSYNC signals, or time based coded signals in said HSYNC or VSYNC signals, or coded values in said colour signal, and the directing step comprises directing the power-using circuits to assume a first reduced-power state in response to detecting said first power management signal, and directing the power-using circuits to assume a second reduced-power state in response to detecting said second power management signal. A method as claimed in claim 9, wherein the directing step comprises directing power-using circuits in the monitor (347;447;547) to provide full power in response to no power management signal, to suspend power to power-using circuits except a filament heater in response to detection of said first power management signal, and to suspend power to power-using circuits including the filament heater in response to detection of said second power management signal.

Inventors: KIKINIS DAN, KIKINIS, DAN
Applicants: ELONEX TECHNOLOGIES INC, ELONEX I.P. HOLDINGS LIMITED
Application year: 1993
Main classification: G06F1
IPC codes: G09G1, G03G15, G06F1, G06K15, G09G5