Method of manufacturing substrate having semiconductor on insulator

Abstract: A polysilicon layer (8) is formed on a surface of a silicon substrate (1). Oxygen ions (2) are implanted into the silicon substrate through the polysilicon layer, and an SiO 2 film (3) is formed in the silicon substrate at a position in a prescribed depth from the surface of silicon substrate. A heat treatment is performed to a silicon layer (4) between the polysilicon layer and the SiO 2 film, thereby providing an SOI layer (5) with improved crystal quality.

Description: The present invention relates to a method of manufacturing a SOI substrate according to the preamble of claim 1. A wafer formed of an insulating substrate and a monocrystalline silicon thin film formed thereon is called SOI (Silicon On Insulator). When a semiconductor device such as an MOS (Metal Oxide Semiconductor) field effect transistor is formed on such a monocrystalline silicon thin film, high speed operation of the device can be achieved by the decrease of parasitic capacitance and the increase of current driving capability, and a short channel effect can effectively be reduced. Conventionally, many approaches have been proposed to form an SOI structure, and the SIMOX (Separation by Implanted Oxygen) method for forming an SOI structure by implanting oxygen ions of a high concentration into a silicon substrate is one of such approaches. Hereinafter, the SIMOX method will be described. The SIMOX method is a method of forming a buried film (SiO 2 film) directly inside a silicon substrate by implanting oxygen ions into the silicon substrate with an accelerating energy of 200keV, in a dose amount of 2.0 x 10 18 /cm 2 , and then performing an enough thermal treatment at a temperature of 1300°C or higher in a mixed gas of Ar/O 2 or N 2 /O 2 . Now, a method of manufacturing an SOI substrate by a conventional SIMOX method will be described in detail in conjunction with the drawings. Figs. 5A-5C are views showing steps in a manufacturing method of an SOI substrate by a conventional SIMOX method. Referring to Fig. 5A, a silicon substrate 1 is prepared. Referring to Fig. 5B, oxygen ions 2 are implanted from an upper surface of silicon substrate 1 with silicon substrate 1 being heated at a temperature from 500°C to-600°C. The implantation condition is, for example, with an accelerating energy of 200keV in a dose amount of 2.0 x 10 18 /cm 2 . The implantation of oxygen ions 2 causes a reaction of silicon substrate 1 and oxygen ions 2, and a buried insulating film (hereinafter referred to as SiO 2 film) 3 is formed. SiO 2 film 3 is formed at a position in a prescribed depth from the upper surface of silicon substrate 1, and therefore a silicon layer 4 is present on SiO 2 film 3. Referring to Fig. 5C, a heat treatment at a temperature of 1300°C or higher is performed in an atmosphere of Ar/O 2 for about five hours. Thus, defects produced by the implantation of oxygen ions 2 disappear, crystal quality is recovered, and a monocrystalline silicon layer (hereinafter referred to as SOI layer) 5 is formed as a result. However, since the oxygen ions 2 are implanted in a large amount into silicon substrate 1, various defects result and these defects do not disappear by a heat treatment at a temperature of 1000°C or higher. Conversely, by a high temperature heat treatment, these fine defects grow to form defects in a line shape which reach from the surface of silicon layer 4 to the boundary surface of silicon layer 4 and SiO 2 film 3. This is called a threading dislocation 6. Further in order to prevent a reaction with the atmosphere of Ar/O 2 at the time of the above-stated heat treatment, a protecting film (SiO 2 ) 7 is formed on the surface of silicon substrate 1 as illustrated in Fig. 5D in some cases. Now, conditions for implanting ions employed in manufacturing an SOI substrate will be described in the following. Fig. 6 is a representation showing the oxygen concentration in silicon substrate 1 relative to the amount of oxygen ions 2 implanted. Assume that the accelerating energy is 200keV. In Fig. 6, if the amount of oxygen ions 2 implanted is small, oxygen gives a Gauss distribution in silicon substrate 1 and SiO 2 film 3 is not formed in silicon substrate 1. If, however, the amount of oxygen ions 2 implanted is more than a critical implanting amount (1.35 x 10 18 /cm 2 ) necessary for forming SiO 2 film 3 in silicon substrate 1, the oxygen concentration near the peak of implantation goes beyond the number of oxygen atoms per 1cm 3 contained in SiO 2 , in other words the stoichiometric concentration for SiO 2 (4.4 x 10 22 /cm 3 ). Therefore, excessive oxygen diffuses toward the leading and trading edges of the distribution and reacts with silicon substrate 1 to form SiO 2 , thus providing SiO 2 film 3 having a sharp interface in silicon substrate 1. The reaction at that time is represented as follows: xSi+ 2Oi - SiO 2 + (x - 1) Si i (O i : interstitial oxygen, Si i : interstitial silicon) Herein, the interstitial oxygen means oxygen atoms which come between interstices and are not coupled to other atoms, and the interstitial silicon means silicon atoms which come between interstices and are not coupled to other atoms. SiO 2 is formed by implanting oxygen ions 2 in an amount more than the critical implantation amount, but the interstitial silicon is discharged in order to restrain the increase in volume which takes place in accordance with the implantation. The interstitial silicon is absorbed into the surface of silicon substrate 1 to be a sink. However, with the increase in the amount of oxygen ion 2 implanted, the number of silicon atoms between interstices produced is increased, and in the meantime excessive silicon atoms between interstices get together to remain as a defect in silicon layer 4. The defect is stabilized as a threading dislocation 6 fixed between the surface of silicon substrate 1 and SiO 2 film 3 in the following heat treatment step, resulting in the degradation of the crystal quality of silicon substrate 1. The mechanism of such dislocation formation is described, for example by J. Stoemenos et al., in J. Appl. Phys., Vol. 69, No. 2, 15 January 1991 pp. 793-802. The density of threading dislocation 6 depends on ion implantation conditions. Fig. 7 is a representation showing the dependence of the dislocation density in an SOI layer on the amount of oxygen ion implanted and the accelerating voltage. As illustrated in Fig. 7, as the amount of oxygen ion implanted increases and the accelerating-voltage is reduced, the dislocation density tends to increase. There exists a method of multi-ion implantation (multi-stages implantation) method which takes advantage of the relativity between the amount of implantation and the density of defects in order to form a high quality SiO 2 film 3 without producing threading dislocation 6. Such a multi-ion implantation (multi-stage implantation) method is reported by D. Hill et al., in J. Appl. Phys., Vol. 63, No. 10, 15 May 1988 pp. 4933-4936. By this method implantation of oxygen ions is performed in a smaller amount (in the range from 0.5 to 1.0 x 10 18 /cm 2 ) than a conventional method in order to reduce dislocation density, then crystal quality is recovered, SiO 2 is precipitated by a heat treatment, and this implantation and heat treatment steps are repeated a number of times in order to obtain a prescribed amount of implantation. According to this method, an SOI substrate having a quite good quality SiO 2 film with its Si/SiO 2 interface being very sharp and the dislocation density in the SOI layer being 10 3 /cm 2 or smaller is produced. This method however includes a complicated process and is not suitable for commercial mass production. Another method of reducing dislocation density is proposed by M. K. EL-Ghor et al., in Appl. Phys., Lett., Vol. 57, No. 2, 9 July 1990 pp. 156-158. According to this method, a cavity (hollow space) of a high density is formed in an SOI layer at the time of implanting oxygen ions, and this cavity functions as a sink for interstitial silicon, thus reducing the dislocation density. In order to use an SOI substrate as a substrate for producing a thin film SOI/MOS field effect transistor, the thickness of the SOI layer should be 100nm (1000Å) or smaller. Fig. 8 shows the relation between the thickness of the SOI layer (expressed in Angstroms, with 1nm = 10 Angstroms), the amount of implanted oxygen ions, and accelerating voltage. The thickness of SOI layer, as illustrated in Fig. 8, can be reduced as the amount of implanted oxygen ions increases as well as the accelerating voltage is reduced. Any of these conditions however increase the dislocation density, and therefore a method of satisfying the conditions for the thickness of the SOI layer and the dislocation density has not been developed. Furthermore, in steps of ion implantation and heat treatment in an SIMOX method, silicon substrate 1 is contaminated by an impurity from the apparatus. As described above, in the method of manufacturing the SOI substrate according to the conventional SIMOX method, threading dislocation 6 remains in the SOI substrate or silicon substrate 1 is contaminated with the impurity. Therefore, the crystal quality degrades, and when an MOS field effect transistor is formed on the SOI substrate, the defects or the impurity are taken by a gate oxide film at the time of forming the film. This results in breakdown voltage deficiency and increase in power consumption by current generated by the defects present in the depletion layer, thus deteriorating the characteristic of the device. Furthermore, since a thin film SOI layer of 100nm (1000Å) or smaller cannot be provided without letting threading dislocation 6 remain, this method of manufacturing the SOI substrate is not suitable for manufacturing a substrate for producing a thin film SOI/MOS field effect transistor. The FR-A-2 581 795 discloses a method of manufacturing a SOI substrate according to the preamble of claim 1. In Journal of Applied Physics, October 15, 1991, USA, vol. 70, no. 8, pages 4584 - 4592, Bussmann U. et al., "Silicon-on-insulator device islands formed by oxygen implantation through patterned masking layers", a method of manufacturing a SOI substrate comprising the following steps is disclosed: forming a patterned mask on SOI substrate, forming a non-planar silicon oxide insulating layer by implanting oxygen ions and annealing the silicon substrate to obtain a buried oxide layer which is non-planar and which isolates the silicon device island vertically and laterally. In Materials Science and Engineering, B12 (1992), pages 47-51, a method of manufacturing a SOI substrate by forming a covering layer of amorphous silicon on a main surface of a silicon substrate, forming a silicon oxide insulating layer in the silicon substrate at a position in a prescribed depth from the main surface below a silicon layer by implanting oxygen ions into the silicon substrate through the covering layer and performing a heat treatment to the silicon layer between the covering layer and the insulating layer is disclosed. It is an object of the invention to provide a method of manufacturing a SOI substrate which can prevent a threading dislocation from being produced in a semiconductor on an insulator. Another object of the invention is to provide a method of manufacturing a SOI substrate permitting reduction of the thickness of a semiconductor on an insulator. Yet another object of the invention is to provide a method of manufacturing a SOI substrate free from contamination of a semiconductor on insulator by an impurity. The object is solved by the method of manufacturing a SOI substrate according to claims 1, 2 or by the method of manufacturing a semiconductor device having an SOI structure. Further developments of the invention are given in the subclaims. In the manufacturing method according to claim 1, after the covering layer (polycrystalline silicon layer, for example) is formed on the main surface of the silicon substrate, a silicon oxide layer is formed by ion implantation of oxygen ions, and a heat treatment is performed. Therefore, grain boundaries or the like in the polycrystalline silicon layer absorb a large amount of interstitial silicon produced in the silicon layer on the silicon oxide layer in accordance with the formation of, for example, silicon oxide layer. Thus, generation of threading dislocations in the silicon layer on the silicon oxide layer can be prevented. Controlling the thickness of the covering layer formed of, for example, a polycrystalline layer permits reducing the depth to which oxygen ions to be implanted, so that the thickness of the silicon layer on the silicon oxide layer can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1A-1D are views showing steps in a manufacturing method of an SOI substrate in accordance with a prior art method; Fig. 2 is a view showing steps in a manufacturing method of an SOI substrate in accordance with the invention; Figs. 3A shows the SOI substrate after completion of the method. Figs. 4A to 4H are views showing steps in a manufacturing method of an SOI substrate in accordance with an Embodiment which is not included in the present invention; Figs. 5A to 5D are views showing steps in a manufacturing step of a conventional SOI substrate by an SIMOX method; Fig. 6 is a representation showing oxygen concentration in a silicon substrate relative to the amount of implanted oxygen ions; Fig. 7 is a representation showing the relation between dislocation density and the amount of oxygen ions implanted in an SOI layer at each accelerating voltage; Fig. 8 is a representation showing the thickness of an SOI layer, the amount of oxygen ions implanted and accelerating voltage dependency. DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the steps of manufacturing an SOI substrate in accordance with a prior art method will be described in conjunction with Figs. 1A to 1D. Since the basic manufacturing steps are substantially identical to those described in conjunction with the conventional technology, only the points different from the conventional technology will be described in the following. Referring to Fig. 1A, a silicon substrate 1 is prepared. A polysilicon layer 8 is formed on a surface of silicon substrate 1. Referring to Fig. 1B, oxygen ions 2 are implanted into silicon substrate 1 through polysilicon layer 8. By this implantation, an SiO 2 film 3 is formed at a position in a prescribed depth in silicon substrate 1. Since SiO 2 film 3 is formed in the position in the prescribed depth from the surface of silicon substrate 1, a silicon layer 4 is present on SiO 2 film 3. Referring to Fig. 1C, a heat treatment is performed at a temperature of about 1300°C. Thus, the crystal quality of silicon layer 4 is improved, and an SOI layer 5 is provided. Referring to Fig. 1D, after the above-described heat treatment, a polysilicon layer 8 on a surface of silicon layer 4 is etched away and an SOI substrate of a good quality having SOI layer 5 with an improved crystal quality is provided. Many grain boundaries which can be a sink for interstitial silicon are present in polysilicon layer 8. A large amount of interstitial silicon produced in accordance with the formation of SiO 2 at the time of ion implantation and heat treatment can be absorbed, thereby greatly restraining the formation and growth of defects. The dislocation density of SOI layer 5 formed, for example, by implanting oxygen ions at an accelerating energy of 200keV, in a dose amount 2.0 x 10 18 /cm 2 can greatly be reduced from a conventional level of 1.0 x 10 8 cm 2 to 1.0 x 10 3 /cm 2 , thereby greatly improving the crystal quality. Now, reduction of the thickness of SOI layer 5 will be described. As illustrated in Fig. 1B, since oxygen ions are implanted through polysilicon layer 8, the depth to which oxygen ions 2 enter is smaller than what would be if not for polysilicon layer 8 by the amount of the thickness of polysilicon layer 8. If, for example, oxygen ions are implanted at an accelerating energy of 200keV, in a dose amount of 2.0 x 10 18 /cm 2 , as illustrated in Fig. 7, SOI layer 5 having a thickness of about 200nm (2000Å) is formed, and according to the invention the thickness of polysilicon layer 8 can be so set that SOI layer 5 of a prescribed thickness can be provided, whereby an SOI layer having a thickness of 100nm (1000Å) or smaller can readily be formed. For example, setting the thickness of polysilicon layer 8 to be 150nm (1500Å), a thin film SOI layer 5 having a thickness of 50nm (500Å) can be provided. Furthermore, providing stacking polysilicon layer 8 on silicon substrate 1 provides a function of gettering impurities in the silicon. Accordingly, the polysilicon layer 8 provides gettering of impurity mixed into at the time of ion implantation and heat treatment, thereby greatly reducing impurities in SOI layer 5. The manufacturing method in accordance with the above method does not include complicated steps as opposed to the method of multi-ion implantation described in conjunction with the conventional technology and is therefore suitable for mass production. When an MOS field effect transistor is formed on SOI substrate 5, the breakdown voltage deficiency of a gate oxide film can be reduced, current produced by dislocations which is one cause for leakage current is reduced, and therefore junction leakage current between source/drain regions can be reduced, thereby reducing power consumption. Description of the invention; Embodiment 1 In the above-described method, the same polysilicon layer is utilized from the step of oxygen ion implantation to the step of heat treatment, but as illustrated in Fig. 2, after oxygen ion implantation, the same effect can be provided if an additional polysilicon layer 8b is placed on a polysilicon layer 8a. Fig. 3A shows the substrate after removal of the polysilicon layers 8a and 8b. Embodiment 2 In Embodiment 1, the case has been described in which polysilicon layer 8 is stacked for the purpose of controlling sinks for interstitial silicon and the depth to which oxygen ions enter, the same effect as Embodiment 1 can be provided by using a polycrystalline layer of another material, an amorphous layer (including an amorphous silicon layer), or a silicon surface provided with a damage treatment provided that it can function as a sink for interstitial silicon. Embodiment not forming part of the invention. Now, manufacturing steps of an SOI substrate in accordance with another embodiment which is not part of the invention will be described in conjunction with Figs. 4A to 4H. Basic manufacturing steps are substantially identical to those described in conjunction with the conventional technology, the points different from the conventional technology will be described. Referring to Fig. 4A, oxygen ions 2 are implanted at an accelerating energy of 150keV in a dose amount of 2.0 x 10 18 /cm 2 , and an SiO 2 film 3 is formed in silicon substrate 1 as a result. By formation of SiO 2 film 3, a silicon layer 4 is present on SiO 2 film 3. Referring to Figs. 4B and 4C, an SiO 2 thin film 9 of 30nm (300Å) is formed in an element isolation region 10b utilizing a usual patterning technique and a surface of silicon layer 4 is exposed in an element formation region 10a. Referring to Fig. 4D, a polysilicon layer 8 of 500nm (5000Å) is formed on the entire surface of silicon substrate 1. With polysilicon layer 8 being formed, a heat treatment is performed to silicon layer 4 in an atmosphere of Ar+1%O 2 at a temperature 1300°C for six hours. Referring to Fig. 4E, the crystal quality of silicon layer 4 is improved by the above-described heat treatment, and an SOI layer 5 of 100nm (1000Å) is provided as a result. Referring to Fig. 4F, polysilicon layer 8 is ground away utilizing SiO 2 thin film 9 as a stopper layer. Thus, SiO 2 thin film 9 and polysilicon layer 8 have substantially identical film thicknesses. Thereafter, SiO 2 thin film 9 is removed away by selective etching. Referring to Fig. 4G, the surface of SOI layer 5 is exposed in the element isolation region 10b by this etching process, and polysilicon layer 8 is left behind only on the element isolation region 10a. Thereafter, polysilicon layer 8 is removed away by selective etching. Referring to Fig. 4H, an SOI substrate of a good quality having an SOI layer 5 with an improved crystal quality is formed. In the manufacturing method in accordance with the embodiment, if oxygen ion implantation conditions for SOI layer 5 to have a thickness of 10nm (1000Å) are employed, the formation of threading dislocations in SOI layer 5 can be restrained by the function of polysilicon layer 8 stacked on silicon layer 4 (described in detail in conjunction with Embodiment 1), and SOI layer 5 with the improved crystal quality can be provided. Furthermore, by the effect of SIO 2 thin film 9 as a stopper layer, the thickness of polysilicon layer 8 can be as thin as 30nm (300Å), thus reducing time required for etching polysilicon layer 8, and therefore SOI layer can be prevented from being overetched in accordance with the etching of polysilicon layer 8. Thus, an SOI substrate having SOI layer 5 with a better film thickness evenness than Embodiment 1 is provided. The dislocation density of SOI substrate according to the conventional manufacturing method is 1.0 x 10 8 /cm 2 , while the dislocation density of SOI substrate produced by employing the embodiment is 1.0 x 10 3 /cm 2 . More specifically, compared to the conventional example, the dislocation density of SOI substrate is tremendously reduced, and the crystal quality is greatly improved. Furthermore, as to the evenness of film thickness, by employing the embodiment, a film thickness evenness of 0.1±0.01µm as in the same level as the SOI substrate according to the conventional manufacturing method which does not use polysilicon layer 8 can be successfully achieved. Although polysilicon layer 8 is selectively etched away after SiO 2 thin film 9 is selectively etched away, an SOI substrate of a good quality with an improved crystal quality can be formed by selectively etching SiO 2 thin film 9 after selectively etching polysilicon layer 8. As in the foregoing, in the manufacturing method according to the invention, a silicon oxide layer is formed by ion implantation and heat treatment after a polycrystalline silicon layer is formed on a main surface of a silicon substrate. Accordingly, generation of threading dislocations in the silicon layer can be prevented. Furthermore, the depth to which oxygen ions are implanted can be reduced by the thickness of polycrystalline silicon layer, and therefore the thickness of silicon layer can be reduced.

Claims: A method of manufacturing a SOI substrate , comprising the steps of: forming a covering layer (8) on a main surface of a silicon substrate (1); forming a silicon oxide insulating layer (3) in said silicon substrate (1) at a position in a prescribed depth from said main surface below a silicon layer (4) by implanting oxygen ions (2) into said silicon substrate (1) through said covering layer (8); and performing a heat treatment to said silicon layer (4) between said covering layer (8) and said insulating layer (3), characterized in that said covering layer (8) is a polycrystalline silicon covering layer or an amorphous silicon covering layer, and the method further comprising a step of forming a second polycrystalline silicon covering layer (8b) on said covering layer (8a) after forming said insulating layer (3), said heat treatment being performed to said silicon layer (4) with said covering layer (8a) and said second covering layer (8b) being stacked. The method as recited in claim 1, comprising the step of the removing the covering layers (8a,8b) after the heat treatment.

Inventors: NAKAI TETSUYA, NISHIMURA TADASHI, YAMAGUCHI YASUO, NAKAI, TETSUYA, NISHIMURA, TADASHI, YAMAGUCHI, YASUO, Nakai, Tetsuya, c/o Chuo-Kenkyusho, Nishimura, Tadashi, c/o Mitsubishi Denki K. K. LSI, Yamaguchi, Yasuo, c/o Mitsubishi Denki K. K. LSI
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1993
Main classification: H01L21
IPC codes: H01L21