Motor control system

Abstract: A motor control system includes a microcomputer for executing a so-called software servo-control, and the microcomputer receives a speed signal and a phase signal from the motor. In the microcomputer, speed error data is evaluated on the basis of the speed signal, and phase error data is evaluated on the basis of the phase data and a first reference signal, and acceleration is detected. The speed error data and the phase error data are synthesized, so as to obtain motor control data. Additionally, filter means are provided for filtering an output of said synthesizing means with different synthesizing ratios of filter outputs of different degrees in response to the acceleration.

Description: BACKGROUND OF THE INVENTION Field of the invention The present invention relates to a motor control system. More specifically, the present invention relates to a motor control system which is utilized for controlling a drum motor and a capstan motor of a VTR, for example. Description of the prior art With referring to Figure 9, in a conventional motor control system 1, speed error data is outputted by a speed detection portion 3 on the basis of a speed signal (FG signal) from a motor 2, and phase error data is outputted by a phase detection portion 4 on the basis of a phase signal (PG signal) from the motor 2 and a vertical synchronization signal (Vsync). Then, the speed error data and the phase error data are synthesized with each other, and a synthesized result is inputted to a driver 6 via a filter 5, such that the motor 2 is driven by the driver 6. With referring to Figure 10, in another conventional motor control system 1', the speed error data is outputted by the speed detection portion 3 on the basis of the FG signal, and speed integration data is outputted by a speed integration portion 7 by sequentially adding differences between the speed error data and a theoretical FG period data that is applied from an outside. In a reproducing (play) mode, the speed integration data is synthesized with the speed error data, and a synthesized result is given to the driver 6 through the filter 5. In a recording mode, the above described theoretical FG period data and phase difference data between the PG signal that is applied via a switch 8 and the vertical synchronization signal Vsync are synthesized with each other, whereby the phase lock between the vertical synchronization signal Vsync and the PG signal can be established by changing the theoretical FG period data. In the conventional motor control system 1 shown in Figure 9, it is impossible to secure a sufficient pull-in range for the phase. In contrast, in the motor control system 1' shown in Figure 10, the pull-in range can be made broader enough because an integration type phase servo-control is performed; however, in the both prior arts, there was a problem that a sufficient gain can not be secured in a case of a miniaturized motor which is utilized in an 8 mm VTR, for example, as shown by a line B in Figure 4. In addition, a line C in Figure 4 is representative of a transfer function of a case where only a speed servo-control is performed. SUMMARY OF THE INVENTION Therefore, a principal object of the present invention is to provide a motor control system in which it is possible to make a pull-in range for a phase broader and a servo-gain larger. Another object of the present invention is to provide a motor control system in which a stable operation can be expected. This object is achieved according to the invention by a motor control system for controlling a motor which outputs speed signal and a phase signal, comprising: speed detecting means for outputting, on the basis of said speed signal, a quantity representative of the speed of rotation of the motor; phase detection means for outputting, on the basis of said phase signal, a quantity representative of the phase of the rotating motor; acceleration detecting means for detecting and outputting a quantity representative of the acceleration of the rotating motor; synthesising means for synthesising said quantity representative of speed and said quantity representative of phase, and outputting resultant synthesised data; filter means for filtering said synthesised data and outputting resultant filtered data for controlling said motor, herein the filtering process comprises synthesising a plurality of filter outputsin dependence upon said quantity representative of acceleration. In one aspect of the present invention, a synthesizing ratio of different degrees of the filter means, a primary filter output and a secondary filter output, for example, is continuously changed according to the acceleration. Therefore, the larger acceleration, the larger ratio of the primary filter output. Accordingly, in transient state, a transient response becomes stable because the ratio of the primary filter output becomes larger, and in a normal state, a gain of a low-frequency region becomes larger because the ratio of the secondary filter output is made larger. The above described objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram showing one embodiment according to the present invention; Figure 2 is a timing chart showing relationship between an FG signal and speed error data (not belonging to the invention); Figure 3A and 3B are flowcharts showing an operation of a first motor control system (not belonging to the invention); Figure 4 is a graph showing a transfer function of the first motor control system in comparison with the prior art; Figure 5 is a flowchart showing an operation of an embodiment according to the present invention; Figure 6 is a graph showing a transient response characteristic of the number of rotations of a motor; Figure 7 is a graph showing a frequency characteristic of the servo-gain of the embodiment; Figure 8A and 8B are flowcharts showing an operation of another motor control system; Figure 9 is a block diagram showing a prior art; and Figure 10 is a block diagram showing another prior art. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to Figure 1, a motor control system 10 of this embodiment shown is a so-called software servo-control system for a drum motor 12. A PG signal and an FG signal are outputted from the drum motor 12, and then, inputted to a microcomputer 16 via amplifiers 14a and 14b. Furthermore, theoretical FG period data T that is an ideal value of an FG period, a vertical synchronization signal Vsync, and theoretical phase error data T that is an ideal value of a phase difference between the vertical synchronization signal Vsync and the PG signal are inputted to the microcomputer 16. The microcomputer 16 executes a so-called software servo-control on the basis of these signals and data so as to apply a driving signal to a driver 18. In operation, in the first motor control system (not belonging to the invention) in a step S1 shown in Figure 3A, the microcomputer 16 fetches or captures a count value of a free-running counter (hereinafter, called as "FRC": Figure 1) at every timing of the FG signal shown in Figure 2(A), and a difference between the present FG capture data (R1) and the last FG capture data (R2) shown in Figure 2(B) is evaluated, whereby FG period data (R3) is calculated. Next, in a step S3, it is determined whether or not the FG period data (R3) is larger than the speed error data (R4), that is, "T D + T S " shown in Figure 2(C). In addition, T D denotes a delay time, and T S denotes a lock range, that is, the pull-in range. In a case of R3 ≧ T D + T S , the speed error data (R4) is set as "2 m - 1" in a step S5. In addition, "m" denotes an arbitrary integer. Thereafter, in a step S7, the present FG capture data (R1) is set as the last FG capture data (R2). On the other hand, in a case of R3 < T D + T S , it is determined whether or not the FG period data (R3) is smaller than the delay time T D in a step S9. When R3 < T D , the speed error data (R4) is set as "0" (R4 = 0) in a step S11. When R3 ≧ T D , "R3 - T D " is set as the speed error data (R4) in a step S13. Thereafter, in the step S7, the present FG capture data (R1) is set as the last FG capture data (R2). In a step S15 following to the step S7, a difference between the FG period data (R3) and the theoretical FG period data (T) is calculated by an accumulator (not shown), and a result thereof is held by the accumulator (A). Then, in a step S17, a held value (A) and speed integration data (R5) are sequentially added to each other, whereby succeeding speed integration data (R5) can be calculated. In a succeeding step S19 shown in Figure 3B, a difference between PG timer data (R6) and Vsync timer data (R7) is calculated by an accumulator (not shown), and a result thereof is held in the accumulator (A). In addition, the PG timer data (R6) and the Vsync timer data (R7) are data of the FRC 20 at a timing that the PG signal is inputted and data of the FRC 20 at a timing that the vertical synchronization signal Vsync is inputted, respectively. In a next step S21, a difference between the value (A) of accumulator and the theoretical phase data T is evaluated, and the difference is held in an accumulator (8). Then, sequential phase integration data (R8) can be evaluated by sequentially adding the value (A) to the phase integration data (R8) in a step S23. The speed error data (R4), the speed integration data (R5) and the phase integration data (R8) thus calculated in the above described manner are synthesized with each other with a predetermined synthesizing ratio that is represented by R9 = R4 + 1/a·R5 + 1/b·R8(a: a synthesizing ratio of the speed and the phase, and b: a synthesizing ratio of the speed and the phase integration), whereby synthesized data (R9) can be calculated. Thereafter, the synthesized data (R9) is subjected to a filtering process so as to evaluate output data (R10) in a step S27, and the output data (R10) is subjected to a D/A conversion in a step S29. Therefore, a motor control signal obtained through the D/A conversion is outputted from the microcomputer 16, and the same is applied to the driver 18, and accordingly, the drum motor 12 is driven by a motor driving voltage from the driver 18. In the above described motor control system, the speed error data (R4) and the speed integration data (R5) are synthesized with each other in the step S25, the phase servo-control for suppressing a so-called drift is executed. At this time, such the phase servo-control is an integration type phase servo-control, and therefore, it is possible to cbtain a pull-in range broader enough. Furthermore, the degree cf the phase integration data (R8) becomes higher than the degree of the speed integration data (R5) by one degree, and therefore, by synthesizing the phase integration data (R8) with the above described data in the step S25, the servo-gain for the phase becomes high as shown by a line A in Figure 4. Therefore, the phase of the drum motor 12 is locked, and thus, a locked point is not changed at a winding start and a winding end of a video tape, and there occurs no change of a lock point according to a rotation period of a reel base. In an embodiment according to the present invention shown in Figure 5, the structure of Figure 1 block diagram is utilized. Figure 5 embodiment is an embodiment capable of solving another problem in the prior art. More specifically, in the conventional motor control system, since a synthesizing ratio of the speed and the phase is constant, the pull-in time in a transient state becomes long when the ratio of the speed is larger than the ratio of the phase, and when the ratio of the phase is larger than the ratio of the speed, a stability of the rotation of the motor becomes bad. Furthermore, if the degree of the filter (lag filter) is made constant, the rotation of the motor becomes unstable in the transient state or in a normal state. Even when the degree of the lag filter is changed in the transient state or the normal state, an output signal of the lag filter is suddenly changed at a timing that the degree is changed, the rotation of the motor also becomes unstable. Figure 5 embodiment is able to solve such the problems. More specifically, in a first step S31, a rotation speed (S) of the motor 12 is detected on the basis of the FG signal. Next, in a step S33, a period of the FG signal between the last inputted FG signal and the present inputted FG signal is detected, and an acceleration (K) of the rotation of the motor 12 is evaluated on the basis of the FG signal period. Furthermore, in a step S35, a rotation phase (P) of the motor 12 is detected on the basis of the PG signal. The rotation speed (S), the acceleration (K) and the phase (P) are substituted in the following equation (1) in a step S7, and therefore, the rotation speed (S) and the rotation phase (P) are synthesized with each other according to the synthesizing ratio that is determined by the acceleration (K). In addition, in the following equation (1), a maximum value of the acceleration (K) is set as "7" and a minimum value of the same is set as "1" (1 ≦ K ≦ 7). G = (8 - K)S/8 + KP/8 The synthesized data (G) is succeedingly subjected to a filtering process in a step S39. More specifically, a primary lag filter output (F1) and a secondary lag filter output (F2) can be obtained on the basis of the synthesized data (G), and the same are substituted in the following equation (2). Therefore, the primary lag filter output (F1) and the secondary lag filter output (F2) are synthesized with each other according to a synthesizing ratio that is determined by a value K' (0≦ K'≦ 1) that is obtained through normalization of the acceleration (K). A = F1 x K' + (1 - K') x F2 The synthesized data (A) is converted into a motor control signal in a step S11 to be outputted from the microcomputer 16. Then, the motor 12 is driven by the driver 18 in accordance with the motor control signal. The synthesized data (G) at a state where the acceleration (K) is maximum (transient state) becomes to be given by the following equation (3), and the synthesized data (G) at a state where the acceleration (K) is minimum (normal state) becomes to be given by the following equation (4). G = S/8 + 7P/8 G = 7S/8 + P/8 That is, the larger acceleration, the larger ratio of the phase. Therefore, in the transient state where the acceleration is large, the ratio of the phase becomes large, and therefore, the pull-in time becomes short. Furthermore, the smaller acceleration, the larger ratio of the speed. Therefore, in the normal state where the acceleration is small, the unevenness of the rotation of the motor becomes small, and therefore, the motor is rotated stably. Furthermore, according to the equation (2), the ratio of the primary lag filter output (F1) becomes large at a state where the acceleration (K') is large (transient state), and the ratio of the secondary lag filter output (F2) becomes large at a state where the acceleration (K') is small (normal state). Thus, by changing the ratio of the degrees of the filter, the motor is operated stably, and the reason will be described with referring to Figure 6 and Figure 7. Figure 6 shows a transient response characteristic of the number of rotations of the motor, and as seen from Figure 6, the transient response is stable when the ratio of the primary lag filter output is large, and the transient response becomes unstable when the ratio of the secondary lag filter output is large. Furthermore, Figure 7 shows a frequency characteristic of the servo-gain, and as seen from Figure 7, the servo-gain in a low frequency region is small when the ratio of the primary lag filter output is larger, but the servo-gain in the low frequency region becomes large as the ratio of the secondary lag filter output becomes larger. Then, in this embodiment shown in Figure 5, since the ratio of the primary lag filter output and the secondary lag filter output is continuously changed in response to a change of the acceleration, no phenomenon that the rotation of the motor 12 becomes unstable due to occurring of discontinuous points. In addition, in Figure 5 embodiment, the synthesization of the speed and the phase, and the synthesization of the degrees of the lag filter are simultaneously performed, it is needless to say that any one of the synthesization may be effectively utilized. In another motor control system show in Figure 8A and Figure 8B, a first motor control system shown by Figure 3A and Figure 3B and the embodiment shown by Figure 5 are combined with each other. More specifically, a software servo-control routine shown in Figure 8A and Figure 83 is an interrupt routine that is executed at every timing of the FG signal from the drum motor 12, as similar to the first motor control system or the embodiment of Fig. 5. In steps S101 - S113 shown in Figure 8A are executed for detecting the speed (R4: S) as similar to the steps S1 - S13 of the first embodiment. However, since the steps S101 - S113 are similar to the steps S1 - S13 of the first motor control system, a duplicate description will be omitted here. Then, in a step S114 of Figure 8A, the acceleration (K) is detected through a method similar to that of the step S33 of the embodiment of Fig. 5. Thereafter, in steps S115 - S123 shown in Figure 8A and Figure 8B, an operation for detecting the phase is executed. More specifically, in the steps S115 - S123, the phase (R5: P) is detected as similar to the steps S15 - S23 of the first motor control system. However, since the steps S115 - S123 are similar to the steps S15 - S23, a duplicate description will be omitted here. In a step S125 shown in Figure 83, that is the same as the step S25 of the first motor control system, the speed error data and the phase error data are synthesized according to the synthesizing ratios a and b to obtain the synthesized result (R9). Then, in a step S127', the synthesized result (R9) is subjected to the filtering process. More specifically, as similar to the step S127 of the second embodiment, the primary filter output (F1) and the secondary filter output (F2) are synthesized with each other in response to the acceleration (K) evaluated in the previous step S114. In the motor control system shown in Figure 8A and Figure 8B, since the speed error signal component, the speed integration signal component, and the phase integration signal component are synthesized with each other as similar to the first motor control system of Fig 3A and 3B, not only the pull-in range becomes broader enough but also the servo-gain becomes large. Furthermore, as similar to the embodiment of Fig 5, the acceleration is detected and the synthesizing ratio of the primary filter output and the secondary filter output is changed according to the acceleration. Accordingly, in the transient state, the transient response becomes stable because the ratio of the primary filter output is large, and in the normal state, the servo-gain in the low frequency region becomes large because the ratio of the secondary filter output becomes large. In addition, in the above described embodiment, the present invention is described in connection to a servo-control system of the drum motor 12; however, it is needless to say that the present invention can be applied an arbitrary rotor control system in which the phase control is required. Furthermore, the present invention can be applied to not only the software servo-control system utilizing the microcomputer but also a motor control system constructed by a hardware. Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the scope of the present invention being limited only by the terms of the appended claims.

Claims: A motor control system for controlling a motor (12) which outputs a speed signal (FG) and a phase signal (PG), comprising: speed detecting means (16, S31) for outputting, on the basis of said speed signal (FG), a quantity (S) representative of the speed of rotation of the motor (12); phase detection means (16, S35) for outputting, on the basis of said phase signal (PG), a quantity (P) representative of the phase of the rotating motor (12) ; acceleration detecting means (16, S33) for detecting and outputting a quantity (K) representative of the acceleration of the rotating motor (12); synthesising means (16, S37) for synthesising said quantity (S) representative of speed and said quantity (P) representative of phase, and outputting resultant synthesised data (G); filter means (16, S39) for filtering said synthesised data (G) and outputting resultant filtered data (A) for controlling said motor (12), wherein the filtering process comprises synthesising a plurality of filter outputs (F1, F2) in dependence upon said quantity (K) representative of acceleration.

Inventors: TABUCHI JUNICHIRO, TABUCHI, JUNICHIRO
Applicants: SANYO ELECTRIC CO, SANYO ELECTRIC CO., LTD.
Application year: 1993
Main classification: H02P5
IPC codes: H02P23