Method of diffusing impurities into sidewalls of semiconductor structures from a doped SOG layer

Abstract: A substrate (12) is processed to form raised portions or pedestals (18-24), having sidewalls (26-38), and trenches. A first layer (14,62) either a doped spin on glass (SOG) layer (62) or undoped oxide (14) layer, may be deposited onto the substrate adjacent the sidewalls. The first layer (14,62) is densified. A second layer (16) may be deposited on the first layer (14,62). The second layer is a doped SOG layer (16). The second layer (16) is densified and the substrate (12) is heated to drive dopant into the sidewalls (26-38).

Description: This invention relates to a method of processing a semiconductor substrate. A known method for diffusing impurities into planar semiconductor materials involves a masking operation followed by an implant operation in which n-type and p-type impurities are implanted into a planar substrate, typically silicon. However, difficulties arise if it is attempted to implant into the sidewalls of depressions or raised portions of semiconductor materials. Implanting does not work well for sidewall doping because the implanting process is highly directional. The surface to be implanted must be oriented perpendicular to the direction from which the implanting is performed. During the implanting process, it is not feasible to rotate the semiconductor material in many directions to expose the various surfaces of the material to implanting. Surrounding surface structures may shadow adjacent structures, making sidewall implantation impossible. Furthermore, if a high energy implant is used to introduce the same dopant species to the same depth in the silicon, two detrimental effects will occur. First, the dopant would be introduced into the surface region of the silicon. Second, the implant would cause crystal lattice defects in the silicon. In Abstract of JP-A-62106645, sidewalls of a trench are doped by diffusion out of a doped SOG layer located in the trench. It is an object of the present invention to provide a method of processing a semiconductor substrate wherein sidewall doping may be effected. Therefore, according to the present invention there is provided a method of processing a semiconductor substrate according to claim 1. One embodiment of the present invention will now be described by way of example, with reference to the accompanying drawings, in which:- Fig. 1 is a cross-sectional view of a semiconductor device containing depressions and raised portions whose sidewalls have received diffused impurities under the method of the present invention; and Fig. 2 relates to the technical field of the present invention and is a cross-sectional view of a second semiconductor device containing depressions and raised portions whose sidewalls have received diffused impurities under method not related to the subject-matter of the present invention; Referring now to Fig. 1, a semiconductor device 10 manufactured using the method of the present invention is shown. Device 10 includes underlying semiconductor substrate 12, followed by a layer 14 of undoped SOG, and a layer 16 of doped SOG. Substrate 12 includes raised portions or pedestals 18-24, which have sidewalls 26-38, and trenches 40-44. Pedestals 18-24 may be formed by a plasma etch process, wet etch process, or by a selected epitaxial growth (SEG) process, all known in the art. Trenches 40-44 may be formed using a plasma etch process or a wet etch process. Pedestals 20 and 22 are rectangular pedestals which are preferably no wider than about 1.5 microns. The distance between pedestals 20 and 22 is preferably less than about 2 microns. Trench 44 is rectangular is shape. Pedestal 18 is triangular in shape. While rectangular and triangular pedestal and trench geometries have been disclosed, other geometries are also equally envisioned for use with the present invention. Undoped SOG layer 14 is spun onto the surface to a thickness of preferably 1000 to 5000 angstroms. If single sidewall diffusion is desired, layer 14 may be applied so as to mask the sidewall to be protected from diffusion. Layer 14 is densified to cross-link the polymers within layer 14 and drive out low temperature boiling point solvents by heating layer 14 in a furnace containing a nitrogen atmosphere at about 600 to 1200 degrees Celsius. Heating time is preferably about 30 minutes to 3 hours. Alternatively, a rapid thermal process (RTP) may also be employed to heat layer 14 for about 10 to 70 seconds. Substrate 12 may be any semiconductor material, including silicon. Diffusion areas 46-58 contain dopants diffused from layer 16. Single sidewall diffusion, as well as double-sidewall diffusion, is envisioned by the present invention. Doped SOG layer 16 is spun onto layer 14 at a thickness of preferably about 500 to 5000 angstroms. Undoped SOG layer 14 is employed to prevent diffusion of the dopants or other impurities into substrate 12. The choice of dopants may vary and depends upon the semiconductor material of substrate 12. When silicon is used to form wafer 12, the dopants may be boron, phosphorus, arsenic, or antimony. Layer 16 is densified, and the dopant is driven out of layer 16 and into pedestals 18-24 by heating, using another furnace cycle or RTP cycle at preferably about 1000 to 1150 degrees Celsius. If layer 14 is doped, the dopants from layer 14 are also driven into pedestals 18-24. If a furnace cycle is employed, the heating time is preferably about 30 minutes to 3 hours. If an RTP cycle is employed, heating time is preferably about 20 to 900 seconds. So long as the widths of pedestals 20 and 22 do not exceed about 1.5 microns and layer 16 does not exceed about 5000 angstroms, layer 16 will not coat out on top of pedestals 20 and 22. A layer of undoped SOG on top of pedestals 20 and 22 is undesirable because it prevents diffusion of impurities into the underlying pedestal. If the width of pedestals 20 and 22 exceeds 1.5 microns, then the SOG on top of pedestals 20 and 22 may be removed by a plasma etch process, leaving most of the SOG in trenches 40-44. Referring now to Fig. 2, device 60 similar to device 10 is shown. Device 60 includes a doped SOG layer 62 instead of undoped SOG layer 14 to provide double dopant diffusion. Dopants from layer 62 diffuse into underlying substrate 12 to produce diffusion areas 64-70. Layer 62 should be spun at a thickness of about 3000 to 7000 angstroms and cured at a temperature of about 300 to 700 degrees Celsius in an oxygen atmosphere for about five minutes to several hours in a furnace. Alternatively, an RTP cycle may be employed over the same temperature range, but for about 10 to 300 seconds. The cure step is performed to remove carbon so that it will not be driven into silicon substrate 12.

Claims: A method of processing a semiconductor substrate (12) wherein a portion of said substrate (12) has a trench or a depression (40, 42, 44) having at least one sidewall (26-38) formed therein, including the steps of depositing a layer of doped spin on glass (SOG) (16) on substrate portions adjacent said at least one sidewall (26-38) and heating said substrate (12) to drive dopant from said doped SOG layer (16) into said at least one sidewall (26-38) at an appropriate height, characterized in that , prior to depositing the doped SOG layer (16) a step of depositing an undoped insulating layer (14) on said substrate (12), to be adjacent to and in contact with said at least one sidewall, is carried out; and said doped SOG layer (16) is deposited on said undoped insulating layer (14) and is in contact with portions of said at least one sidewall (26-38); and the undoped insulating layer (14) being deposited to be adjacent to and in contact with said at least one sidewall (26-38) up to said appropriate height and serves to locate said doped SOG layer (16) at said appropriate height adjacent to and in contact with the said at least one sidewall. A method according to Claim 1, characterized by the step of densifying the doped SOG layer (16) prior to said heating step. A method according to Claim 1, characterized by the step of densifying said undoped insulating layer (14). A method according to Claim 3, characterized in that said insulating layer is an undoped SOG layer (14). A method according to any one of the preceding claims, characterized in that said step of heating includes heating the substrate (12) to a temperature in the range of about 1000 degrees Celsius to about 1150 degrees Celsius for about 30 minutes to three hours. A method according to any one of Claims 1 to 5, characterized in that said step of heating includes heating the substrate to a temperature within the range of about 1000 degrees Celsius to about 1150 degrees Celsius in a rapid thermal process (RTP) cycle. A method according to any one of the preceding claims, wherein said sidewalls form part of a raised portion (18, 20, 22) of said substrate (12), characterized by the step of removing (SOG) material from the top of the raised portion prior to the step of heating the substrate.

Inventors: ALLMAN DERRYL DWAYNE JOHN, MILLER GAYLE WILBURN, ALLMAN, DERRYL DWAYNE JOHN, MILLER, GAYLE WILBURN
Applicants: HYUNDAI ELECTRONICS AMERICA, NCR INT INC, SYMBIOS INC, NCR INTERNATIONAL, INC., SYMBIOS, INC.
Application year: 1993
Main classification: H01L21
IPC codes: H01L21