Preamplifier for optical communication having a gain control circuit

Abstract: A phase-inverting amplifier includes an input-stage FET, a load (Q₂) thereof and a gain control circuit (Q ZL ). The gain control circuit (Q ZL ) is provided in parallel with the load, and reduces an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a predetermined value. The gain control circuit is typically a FET whose gate is biased at a constant voltage. A feedback resistor (V γ ) is provided in a negative feedback path of the phase-inverting amplifier. A bypass circuit (Q DS ) is provided in parallel with the feedback resistor, and reduces an effective feedback resistance when a feedback quantity exceeds a predetermined value.

Description: BACKGROUND OF THE INVENTION The present invention relates to a preamplifier for use in optical communication receivers. In general, a transimpedance-type preamplifier (Fig. 10(a)) and a high-impedance-type preamplifier (Fig. 10(b)) are employed in optical communication receivers. For example, these circuits are described, for instance, in K. Ogawa, "Considerations for Optical Receiver Design," IEEE Journal on Selected Areas in Communications, Vol. SAC-1, No. 3, 1983, pp. 524-532. Conventionally, repeaters used in a trunk system of a telephone network, which is the main application field of the optical communication, are required to be highly sensitive to amplify weak signals that have been subjected to attenuation through long-distance transmission while maintaining their waveforms. On the other hand, in recent years, the application fields of the optical communication have expanded, for instance, to the data communication and subscriber systems. To be applicable to such a variety of communication systems, i.e., to accommodate various light sources, wide-range transmission distance, signal attenuation in optical fibers and communication network topology, etc., the development of an optical communication receiver is now desired which, in addition to being highly sensitive, can deal with optical signals having a wide dynamic range. In the above circumstances, the present inventor proposed a preamplifier as shown in Fig. 11 (see, for instance, "Wide Dynamic Range GaAs Preamplifier IC for Lightwave Transmission," Autumn National Conference of the Institute of Electronics, Information and Communication Engineers, Presentation No. B-743, 1990). As shown in Fig. 11, a preamplifier A has the transimpedance-type basic constitution, and is incorporated in an optical receiver B that corresponds to the front-end portion of a repeater. The preamplifier A produces an output signal V OUT by amplifying an input signal V IN produced by impedance-conversion of a photocurrent that is an output of a photodetector PD receiving an optical signal hν from a light transmission line. A bypass circuit C is provided to improve the dynamic range. That is, a cascade connection of a transimpedance-type phase-inverting amplifier 1 having a feedback resistor r f and an output buffer circuit 2 is provided between the input and output terminals of the preamplifier A. The source and drain of a field-effect transistor 3 of the bypass circuit C are connected to the respective terminals of the feedback resistor r f . A voltage in proportion to an output level of the output buffer circuit 2 is applied to the gate of the transistor 3 via a level shift circuit 4. When the input signal V IN having an excessively large amplitude input signal is input to the preamplifier A, the field effect transistor 3 turns on in response to a variation of the output signal V OUT . Therefore, an effective feedback resistance R F (parallel resistance of the feedback resistance r f and the transistor 3) decreases to improve the dynamic range. Referring to Fig. 12, a specific example of the transimpedance-type preamplifier A of Fig. 11 is described in detail. The preamplifier of Fig. 12 consists of compound semiconductor field-effect transistors (hereinafter referred to as FETs) T 1 -T 8 such as GaAs MESFETs, level-shift diode groups d 1 and d 2 , resistors r 1 and r 2 and a feedback resistor r f , and operates on a single supply voltage V DD . The phase-inverting preamplifier 1 is formed by the FETs T 1 -T 4 and the diode groups d 1 and d 2 , the output buffer circuit 2 is formed by the FETs T 5 and T 6 , and the level shift circuit 4 is formed by the FET T 7 and the resistors r 1 and r 2 . The feedback resistor r f and the FET T 8 in Fig. 12 correspond to the resistor r f and the FET 3 in Fig. 11, respectively. The threshold voltage V T8 of the FET T 8 is -0.5 V, and the bias setting is so made that the gate-source voltage V GS of the FET T 8 is lower than -0.5 V and no current flows between the source and drain when no signal or a very small signal (e.g., smaller than -20 dBm) is input. As the amplitude of the input signal V IN increases in response to the rise of the input optical signal intensity, the voltage level of the output signal V OUT decreases as a result of the phase-inverting amplification and both of the gate voltage V G and the source voltage V S of the FET T 8 decrease. Since the source voltage V S drops more than the gate voltage V G , the gate-source voltage V GS increases. As a result, when the input optical signal intensity exceeds a certain value (e.g., -10 dBm), the FET T 8 turns on to reduce the transimpedance. Even if the amplitude of the input signal V IN is further increased, the reduction of the transimpedance causes clipping of voltage variations within the preamplifier. Therefore, the respective FETs T 1 -T 7 are not so biased as to work in the non-saturation region, which means the increase of the maximum allowable input level (maximum allowable amplitude of the input signal V IN ). That is, the preamplifier of Figs. 11 and 12 can increase the dynamic range by raising the maximum allowable input level. On the other hand, in the preamplifier described above, the feedback resistor r f needs to have a large value to lower the minimum sensible light intensity within the dynamic range. That is, since the thermal noise <i RF 2 > decreases as the feedback resistance r f increases (see equation (1) below), the minimum sensible light intensity can be lowered. < i RF 2 > = 4 kTW R F where R F is the effective feedback resistance between the input and output of the amplifier 1, W is a frequency bandwidth of the preamplifier, T is the temperature and k is the Boltzmann constant. However, as is seen from equation (2) below, simply increasing the effective feedback resistance R F causes a problem that a frequency bandwidth ω C of the optical receiver B is reduced. ω C = 1+ G R F C T where G is an open-loop gain of the amplifier 1, C T is an input capacitance, and R F is the effective feedback resistance. Therefore, as is understood from equation (2), the open-loop gain G of the amplifier 1 needs to be increased or the input capacitance needs to be decreased to provide the large effective resistance R F (for the improvement of the minimum sensible light intensity) and secure the sufficiently wide bandwidth ω C of the optical receiver B. The present inventor proposed a preamplifier shown in Fig. 13 which can increase the open-loop gain G (see, for instance, "High Gain and Broadband GaAs Preamplifier IC's for High Speed Optical Receivers," Autumn National Conference of the Institute of Electronics, Information and Communication Engineers, Presentation No. B-744, 1990). The open-loop gain is increased by employing a current-injection-type circuit using FETs having two different threshold voltages. The preamplifier of Fig. 13 has the basic constitution in which a FET T IN for current injection is provided between the drain of the input-stage FET T 1 and the supply voltage V DD of the preamplifier of Fig. 12, and a FET T IS is added to isolate the FET T IN from the FET T 2 serving as a load. The feedback resistor r f is provided between the input and output terminals. In the preamplifier of Fig. 13, the open-loop gain G is increased by current injection from the current injection FET T IN to the input-stage FET T 1 , to a large value of about 33 dB. However, according to the general principle of constant gain-bandwidth product, the bandwidth ω C decreases, to about 600 MHz, compared to the case of not incorporating the measure for increasing the gain G (e.g., the preamplifier of Fig. 12). To cope with this problem, a preamplifier of Fig. 14 was developed by combining the advantages of the first conventional preamplifier of Figs. 11 and 12 which can increase the maximum allowable input level by incorporation of the bypass circuit C and the second conventional preamplifier of Fig. 13 which can lower the minimum sensible light intensity. However, this simple combination could not provide an optimum preamplifier because the following problems actually occurred. In the preamplifier of Fig. 14, the bypass circuit is formed by adding a switching diode d S (corresponding to the FET T 8 in Fig. 12) to the preamplifier of Fig. 13 having the current injection FET T IN . If the frequency characteristic of the preamplifier has a first-order pole, a transimpedance transfer function Z T (s) of an optical receiver including it has a second-order pole and is therefore expressed by equation (3) where ω C is an angular frequency bandwidth of the optical receiver, G 0 is a d.c. open-loop gain of the preamplifier, ω h is an angular frequency bandwidth of the preamplifier, R F is an effective feedback resistance (i.e., a parallel resistance of the feedback resistor r f and the switching diode d S ), and C T is an input capacitance of the preamplifier. Z T ( s ) = Z Tdc 1 + 2ζ s ω cC + s 2 ω cC 2 where G ( s ) = G 0 1+ s ω h Z Tdc = R F G 0 1+ G 0 ω C = (1+ G 0 )ω h C T R F ζ = (1+ C T R F ω h ) (1+ G 0 )ω h 4 C T R F The problems occur in the following manner. When an excessively large input signal V IN comes in, the bypass circuit operates to reduce the effective feedback resistance R F , which means decrease of ζ in equation (3). Since the decrease of ζ means increase of the feedback quantity, the bandwidth ω C of the optical receiver increases to become close to the upper limit of the bandwidth ω h of the preamplifier as the input signal V IN further increases to further reduce ζ, as seen from equation (2). In this situation, a condition ω C ≥ ω h is more likely to be established than in the first conventional case, because, as described above, the bandwidth ω h of the preamplifier whose gain is increased by the current injection is narrower than the first conventional preamplifier of Fig. 12. As a result, as is understood from equation (3), the optical receiver exhibits a peaking-type transimpedance characteristic as shown in Fig. 15(a) and its operation becomes unstable. With the peaking-type characteristic, a rectangular NRZ (non-return-to-zero) optical signal will cause ringing or oscillation, so that the output signal V OUT will not assume a waveform faithful to the input signal waveform. In an actual measurement (see Fig. 16), an output signal V OUT having a waveform distortion associated with an oscillation phenomenon was observed in response to a NRZ input optical signal having an average light intensity of -10 dBm and a pulse rate of 622 Mbit/sec. In summary, when the input signal V IN is not too large, the bandwidth ω h of the preamplifier is sufficiently larger than the bandwidth ω C of the optical receiver (ω h > ω C ) and the stable operation is obtained. However, when the amplitude of the input signal V IN becomes too large, ω C increases to become close to ω h or to exceed it, in which case the optical receiver becomes unstable and exhibits, for instance, an oscillation. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems in the art, and has an object of providing a preamplifier for optical communication which can increase the frequency bandwidth and the dynamic range at the same time. According to the invention as defined in the appended claims, a preamplifier for optical communication that amplifies an input signal produced by a photodetector, comprises: a phase-inverting amplifier including an input-stage FET and a load thereof, for amplifying the input signal; gain control means for reducing an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value; a feedback resistor provided in a negative feedback path of the phase-inverting amplifier; and bypass means for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value. With the above constitution, when the input signal is small, the open-loop gain of the phase-inverting amplifier is large and the effective feedback resistance is large, so that the preamplifier exhibits a higher light-receiving sensitivity. On the other hand, when the input signal exceeds a predetermined amplitude, the effective feedback resistance is reduced to increase the maximum allowable input level. Although the effective load resistance is reduced and the open-loop gain of the phase-inverting amplifier is thereby lowered, the bandwidth of the phase-inverting amplifier is increased to always assure a condition that the bandwidth of the phase-inverting amplifier is larger than the bandwidth of the optical receiver. As a result, undesired phenomena such as oscillation and ringing can be prevented. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram showing a general concept of a preamplifier according to the present invention; Fig. 2 is a graph showing operation of the preamplifier of Fig. 1; Fig. 3 is a circuit diagram showing a preamplifier according to a first embodiment of the invention; Fig. 4 is a circuit diagram showing a preamplifier according to a second embodiment of the invention; Fig. 5 is a circuit diagram showing a preamplifier according to a third embodiment of the invention; Fig. 6 is a circuit diagram showing a preamplifier according to a fourth embodiment of the invention; Fig. 7 is a circuit diagram showing a preamplifier according to a fifth embodiment of the invention; Fig. 8 is a partial circuit diagram showing a preamplifier according to a sixth embodiment of the invention; Fig. 9 is a partial circuit diagram showing a preamplifier according to a modification of the preamplifier of Fig. 1; Figs. 10(a) and 10(b) are circuit diagrams showing two general types of preamplifiers; Fig. 11 is a circuit diagram showing general constitution of a first conventional preamplifier; Fig. 12 is a circuit diagram showing specific constitution of the preamplifier of Fig. 11; Fig. 13 is a circuit diagram showing a second conventional preamplifier; Fig. 14 is a circuit diagram showing a third conventional preamplifier; Figs. 15(a) and 15(b) are graphs showing problems of the preamplifier of Fig. 14; Fig. 16 is a waveform showing a problem of the preamplifier of Fig. 14; and Fig. 17 is a waveform of an output signal of the preamplifier of Fig. 1. DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 1 is a circuit diagram showing the general constitution of a preamplifier according to the invention. An optical signal hν transmitted through an optical transmission line is detected by a photodetector PD such as a photodiode, and a resultant photocurrent is impedance-converted to an input signal V IN , which is applied to the gate of a FET Q 1 . The source of the FET Q 1 is connected to a low supply voltage V SS and its drain is connected to a high supply voltage V DD via a load resistor Z L having a fixed value. A gain control means is provided in parallel with the load resistor Z L . More specifically, the gain control means consists of a FET Q ZL whose source and drain are connected to the respective terminals of the load resistor Z L , and a d.c. voltage V BB for biasing the gate of the FET Q ZL . A first-stage amplifier 100 is constituted of the FETs Q 1 and Q ZL , load resistor Z L and d.c. voltage V BB . A signal S X appearing at the drain X of the FET Q 1 is shifted to a proper bias level by a level shift circuit 101, and fed back to the gate of the FET Q 1 via a feedback resistor r f . A bypass circuit 103 is provided in parallel with the feedback resistor r f . An output buffer circuit 102 power-amplifies the output of the level shift circuit 101 to produce an output signal V OUT . The resistance of the bypass circuit 103 changes in accordance with the output level of the level shift circuit 101 to automatically adjust an effective feedback resistance R F (parallel resistance of the feedback resistor r f and the bypass circuit 103). With additional reference to Fig. 2, the operation of the preamplifier of Fig. 1 is described below. Since the first-stage amplifier 100 is a phase-inverting amplifier, the input signal V IN is amplified, with phase inversion, to produce the signal S X at the drain of the FET Q 1 . When the input signal V IN has a small amplitude, a d.c. variation of the output S R of the level shift circuit 101 is small. Therefore, the bypass circuit 103 is kept open, and the effective feedback resistance R F is equal to the feedback resistance r f . With the large feedback resistance r f , a sufficiently high light-receiving sensitivity is obtained when the input signal V IN is very small or has a small amplitude. When the input signal V IN exceeds a predetermined amplitude V INC and the output S R of the level shift circuit 101 thereby exceeds a preset threshold of the bypass circuit 103, the internal resistance of the bypass circuit 103 decreases, so that the effective feedback resistance R F becomes smaller than the feedback resistance r f . Therefore, even when a large input signal V IN comes in, voltage variations in the preamplifier are clipped to prevent the internal active devices from being biased to operate in the non-saturation region. As a result, the maximum allowable input level can be increased. As the amplitude of the input signal V IN increases, the voltage at the drain X of the FET Q 1 decreases. The source voltage of the FET Q ZL decreases accordingly and its gate-source voltage V GS increases. Therefore, when the input signal V IN exceeds the predetermined amplitude and the gate-source voltage V GS of the FET Q ZL exceeds a threshold voltage V TZL , the FET Q ZL turns on to gradually reduce an effective load resistance R ZL (parallel resistance of the load resistance Z L and the FET Q ZL ). As a result, when a large amplitude input signal V IN comes in, the open-loop gain of the first-stage amplifier 100 decreases but its bandwidth ω h increases, so that undesired phenomena such as oscillation and ringing can be prevented. That is, in equation (4), the parameter ζ does not decrease because the increase of the bandwidth ω h of the amplifier 100 compensates for the decrease of the effective feedback resistance R F . Even if the bandwidth ω C of the optical receiver increases according to equation (2), the bandwidth ω h of the preamplifier increases to always satisfy the relationship ω C > ω h to thereby assure stable operation of the optical receiver. In summary, when the input signal V IN has an amplitude smaller than the predetermined value, the effective feedback resistance R F is kept large to lower the minimum sensible light intensity. When the input signal V IN takes a large amplitude, the effective feedback resistance R F decreases to increase the maximum allowable input level, and the bandwidth ω h of the amplifier 100 increases to prevent unstable operation such as oscillation. A measurement was performed by applying, to the preamplifier of Fig. 1, the same NRZ rectangular input signal V IN as applied to the conventional preamplifier of Fig. 12. As shown in Fig. 17, a waveform of the output signal V OUT has no oscillation and is faithful to the input signal V IN , and is clearly improved from the waveform of Fig. 16. Referring to Fig. 3, a first specific embodiment is described below. A preamplifier of this embodiment consists of a first-stage amplifier formed by FETs Q 1 , Q IS , Q IN , Q 2 and Q ZL and bias-setting diodes D 1 and D 2 , a level shift circuit formed by FETs Q 3 and Q 4 and diodes D 3 and D 4 , an output buffer circuit formed by FETs Q 5 and Q 6 , a diode D S as a bypass circuit, and a feedback resistor r f having a high resistance. The input signal V IN is applied to the gate of the FET Q 1 . The bias-setting diodes D 1 and D 2 are connected to the source of the FET Q 1 , and the FET Q 2 serving as a load is connected to the drain of the FET Q 1 via the FET Q IS . Further, the FET Q IN for current injection is connected to the drain of the FET Q 1 , and the FET Q ZL , whose gate is biased at a predetermined voltage V BB , is connected to the load FET Q 2 . The source terminal X of the FET Q 2 is connected to the gate of the FET Q 3 . A signal S R after the level shifting by the diodes D 3 and D 4 is power-amplified by the FET Q 5 having the source-follower connection to become an output signal V OUT . The signal S R is also fed back to the gate of the FET Q 1 via the feedback resistor r f and the diode D S . In this embodiment, when the input signal V IN has a small amplitude, the FET Q ZL is in an off-state, because it is so biased that its gate-source voltage V GS is lower than the threshold voltage V TZL . Therefore, the effective load resistance R ZL for the FET Q 1 takes a large value determined by the FET Q 2 . A resultant large open-loop gain contributes to the improvement of the minimum sensible light intensity. Since the cathode-anode voltage of the diode D S does not reach its on-voltage, the effective feedback resistance R F is equal to the feedback resistance r f , which also contributes to the improvement of the minimum sensible light intensity. On the other hand, when the input signal V IN is large, the voltage at the source terminal X of the FET Q 2 take a low value and the gate-source voltage V GS of the FET Q ZL is higher than its threshold voltage V TZL . Therefore, the FET Q ZL is in an on-state, and the effective load resistance R ZL for the FET Q 1 takes a smaller value. Further, since the diode D 5 is in an on-state, the effective feedback resistance R F is smaller than the feedback resistance r f . Therefore, as in the case of Fig. 1, while the open-loop gain of the preamplifier decreases, its bandwidth ω h increases. As a result, the maximum allowable input level is increased without causing an unstable operation such as an oscillation. Referring to Fig. 4, a second specific embodiment is described below. The parts in Fig. 4 that are the same as or equivalent to those in Fig. 3 are given the same reference symbols. The second embodiment is different from the first embodiment in that instead of the diode D S as the bypass circuit, the drain and source of an enhancement-type FET Q DS whose gate and drain are short-circuited are connected to the respective terminals of the feedback resistor r f . The FET Q DS has the same functions as the diode D S in Fig. 3. That is, the FET Q DS is off when the input signal V IN is small, and is on and serves to reduce the effective feedback resistance R F when the input signal V IN is larger than the predetermined value. Therefore, like the first embodiment, the second embodiment can provide a preamplifier that has a wide dynamic range and operates stably. Referring to Fig. 5, a third specific embodiment is described below. The parts in Fig. 5 that are the same as or equivalent to those in Fig. 3 are given the same reference symbols. The third embodiment is different from the first embodiment in that instead of the diode D 5 serving as the bypass circuit, a depletion-type FET Q F is provided in parallel with the feedback resistor r f . That is, the drain of the FET Q F is connected to the gate of the input-side FET Q 1 , its source is connected to the drain of the FET Q 4 of the level shift circuit, and its gate is grounded. When the input signal V IN is small, the FET Q F is in an off state, because its gate-source voltage is lower than the threshold voltage. When the V IN exceeds the predetermined value and the gate-source voltage exceeds the threshold voltage, the FET Q F is turned on. Therefore, as in the case of the first embodiment, the minimum sensible light intensity is lowered and the maximum allowable input level is increased. That is, the third embodiment can also provide a preamplifier that has a wide dynamic range and operates stably. Referring to Fig. 6, a fourth specific embodiment is described below. The parts in Fig. 6 that are the same as or equivalent to those in Fig. 5 are given the same reference symbols. The fourth embodiment is different from the third embodiment in that a voltage divider formed by a FET Q 7 and resistors R 1 and R 2 is connected to the output terminal where the output signal V OUT appears. The gate bias of the depletion-type FET Q F is set by a divided voltage V G of the output signal V OUT . That is, the gate of the FET Q 7 is connected to the output terminal, its drain is connected to the supply voltage V DD , and its source is grounded via the resistors R 1 and R 2 . The divided voltage V G produced by the resistors R 1 and R 2 is applied to the gate of the FET Q F . The resistances of the resistors R 1 and R 2 are so set that the gate bias voltage of the FET Q F is always lower than its source bias voltage. Since, as in the case of the third embodiment, the FET Q F is automatically switched between the on-state and off-state in accordance with the amplitude of the input signal V IN , the minimum sensible light intensity is lowered and the maximum allowable input level is increased. Thus, the preamplifier has a wide dynamic range and operates stably. In general, due to variations in their manufacturing process, semiconductor devices have variations in their characteristics. Therefore, in the third embodiment of Fig. 5 where the gate of the FET Q F is grounded, the condition of its switching between the on-state and off-state varies with its threshold voltage. In contrast, in the fourth embodiment of Fig. 6 where the divided voltage V G by the resistors R 1 and R 2 is applied to the gate of the FET Q F , variations in the related devices originating from their manufacturing process cancel out each other, so that the switching condition of the FET Q F can be stabilized. Referring to Fig. 7, a fifth specific embodiment is described below. The parts is Fig. 7 that are the same as or equivalent to those in Fig. 6 are given the same reference symbols. The fifth embodiment is different from the fourth embodiment in the following points. The gate of a FET Q 9 is connected to the output terminal where the output voltage V OUT appears, and the drain of a FET Q 10 is connected to the source of the FET Q 9 . The gate and source of the FET Q 10 are short-circuited and grounded. A voltage appearing at the drain of the FET Q 10 serves as a gate bias for the FET Q F . Since the FET Q 10 operates merely as a resistor, the same function as the fourth embodiment can be obtained with smaller devices than the case of the voltage division by resistors. Fig. 8 is a partial circuit diagram showing a sixth specific embodiment. This embodiment is different from the fourth embodiment (Fig. 6) only in that an FET Q 11 is added in parallel with the resistor R 2 . By employing the FET Q 11 that is of the same type as the bypass FET Q F , characteristics variations of the FETs Q 11 and Q F due to a temperature change or variations in their manufacturing process cancel out each other. Fig. 9 is a partial circuit diagram showing a modification of the general circuit diagram of Fig. 1. In this modification, the gain control means is a series connection of diodes D 5 -D 7 . This simplified gain control means has the function similar to that in Fig. 1. The number of diodes may be set suitably to provide a desired gain control function. Further, in the general circuit diagram of Fig. 1, the supply voltage V BB may be changed in accordance with the input signal V IN . As described above, according to the invention, the increase of the frequency bandwidth of the internal amplifier enables the provision of the preamplifier that has a wide dynamic range and operates stably. As a result, it becomes possible to provide optical communication receivers which are highly sensitive and capable of receiving wide-dynamic-range optical signals, and which therefore can accommodate various light sources, wide-range transmission distance, signal attenuation in optical fibers and communication network topology, etc. The invention can suitably applied to preamplifiers using GaAs MESFETs, whereby high-speed optical communication receivers can be realized.

Claims: A preamplifier for optical communication that amplifies an input signal produced by a photodetector (PD), comprising: a phase-inverting amplifier (100) including an input-stage FET (Q 1 ) and a load (Z L ) thereof, for amplifying the input signal (V IN ); a feedback resistor (r f ) provided in a negative feedback path of the phase-inverting amplifier; and bypass means (103) for reducing an effective feedback resistance when a feedback quantity exceeds a second predetermined value; and characterised by comprising gain control means (Q ZL ) for reducing an effective load resistance to lower an open-loop gain of the phase-inverting amplifier when a current flowing through the load exceeds a first predetermined value. The preamplifier of claim 1, wherein the gain control means comprises a gain-control FET, a source and a drain of the gain-control FET being connected to respective terminals of the load, and a gate of the gain-control FET being biased at a constant voltage (V BB ). The preamplifier of claim 1, wherein the gain control means comprises a diode (D 5 -D 7 ) provided in parallel with the load (Z L ). The preamplifier of claim 1, wherein the bypass means comprises a diode (Q DS , D S ) provided in parallel with the feedback resistor. The preamplifier of claim 1, wherein the bypass means comprises an enhancement-type FET (Q DS ), a drain and a gate of the enhancement-type FET being connected to one terminal of the feedback resistor and a source of the enhancement-type FET being connected to the other terminal of the feedback resistor. The preamplifier of claim 1, wherein the bypass means comprises a depletion-type FET (Q F ), a drain and a source of the depletion-type FET being connected to respective terminals of the feedback resistor, and a gate of the depletion-type FET being biased at a constant voltage. The preamplifier of claim 1, wherein the bypass means comprises a depletion-type FET (Q F ), a drain and a source of the depletion-type FET being connected to respective terminals of the feedback resistor, and a gate of the depletion-type FET being controlled by an output signal (V G ) of the phase-inverting amplifier. The preamplifier of claim 1, further comprising voltage dividing means (Q 7 , Q 9 , Q 10 , Q 11 , R 1 , R 2 ) for dividing an output signal of the phase-inverting amplifier, wherein the bypass means comprises a depletion-type FET, a drain and a source of the depletion-type FET being connected to respective terminals of the feedback resistor, and a gate of the depletion-type FET being controlled by the divided output signal (V G ) of the voltage dividing means. The preamplifier of claim 8, wherein the voltage dividing means comprises a FET (Q 7 , Q 9 ) for source-following the output signal, and resistors for dividing the source-followered output signal. The preamplifier of claim 8, wherein the voltage dividing means comprises a FET (Q 9 ) for source-following the output signal, and a second depletion-type FET (Q 10 ), a gate and a source of the second depletion-type FET being connected to each other and a drain of the second depletion-type FET being connected to a source of the source-following FET. The preamplifier of claim 9, wherein the voltage dividing means comprises a second depletion-type FET (Q 11 ) provided in parallel with one of the resistors (R 1 ), a gate and a source of the second depletion-type FET (V G ) being connected to each other, and the divided output signal appearing at a drain of the second depletion-type FET. The preamplifier of claim 1, wherein FETs used in the phase-inverting amplifier and the bypass means are GaAs MESFETs.

Inventors: MIKAMURA YASUKI, MIKAMURA, YASUKI, Mikamura, Yasuki, c/o Yokohama Works of Sumitomo
Applicants: SUMITOMO ELECTRIC INDUSTRIES, SUMITOMO ELECTRIC INDUSTRIES, LTD
Application year: 1993
Main classification: H03F3
IPC codes: H03F3, H03G3