CRT display unit and power supply control method therefor

Abstract: When a "screen saver" operates to display a homogeneous black picture image after the same image is continuously displayed on a CRT (10) for a constant period of time, a power supply (3) for a CRT display unit is controlled to be turned off, thereby preventing the CRT display unit from being left for a long time in a power-on state. Namely, a waiting time for 3 minutes, for example, is provided when the "screen saver" so operates that the CRT displays a homogeneous black picture image to turn off a power circuit (9) for the CRT, and then a heater (14) for the CRT is turned off after a lapse of a prescribed period of time within 5 to 60 minutes, for example. A function for enabling such an operation of the "screen saver" may be provided in an extension graphics board (51) which is inserted in an open slot (53) provided in a computer of an open architecture type. In this case, the graphics board (51) is provided with an input detection part (68) including a keyboard access detection part (78) for detecting an address signal which is supplied to an address bus (66) in response to manipulation of a keyboard (57), and an interruption request detection part (77) for detecting an interruption signal which is outputted in response to manipulation of a mouse (58) respectively. A timer (69) is reset when the input detection part (68) detects presence of an input signal from the keyboard (57) or the mouse (58). When no reset signal is supplied from the input detection part (78) again before a lapse of a period of time which is previously set in the timer (69), a blank signal is supplied to the CRT display unit.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a CRT display unit and a power supply control method therefor, and more particularly, it relates to power supply control for increasing the life of a CRT. Description of the Background Art A CRT display unit is connected to a central unit, such as a host computer, which generates a synchronizing signal and a video signal, to display an image of the video signal. In this case, it is recommended that power is applied to the CRT display unit independently of a power supply for the computer. If the power supply for the computer is also employed for applying power to the CRT display unit, this may lead to excessive capacity of a power supply switch for the computer. Further, the CRT display unit is often installed in a position separated from the computer. Under such circumstances, there have been proposed some CRT display units, whose power supplies are on-off controlled on the basis of signals from computers. In a publication titled "Energy efficiency in office equipment, A Swedish View" of O. Molinder, presented at the conference "Energy Efficient Office Technologies - The Outlook and Market" in San Jose (USA) on the 17 and 18 June 1992, a CRT display is described which can be powered down to a Stand-by and Power-off state. The Stand-by state may be entered through a significant, completely black signal over the video cable or no signal at all after a time period of 3 minutes. The Power-off state may be entered after 5 minutes. Japanese Patent Application Laying-Open No. 64-33586 (1989) describes a technique of detecting presence/absence of a video signal from a computer for on-off controlling a power supply for a CRT display unit on the basis of the result of the detection. In such a power supply control method, however, no video signal is present when a CRT intentionally displays a homogeneous black picture image, and hence the power supply for the CRT display unit is disadvantageously erroneously turned off in this case. On the other hand, each of Japanese Patent Application Laying-Open Nos. 60-1982 (1985) and 1-257893 (1989) describes a technique of detecting presence/absence of a synchronizing signal from a computer for on-off controlling a power supply for a CRT display unit on the basis of the result of the detection. In this power supply control method, however, the computer regularly transmits a synchronizing signal and hence the power supply for the CRT display unit cannot be turned off unless a power supply for the computer is turned off or the CRT display unit is disconnected from the computer. Further, there has been developed a technique of switching the screen of a CRT to display of a homogeneous black image when the same display image continuously appears on the CRT for a constant period, in order to prevent burning of a fluorescent material which is applied to the screen of the CRT. This technique is described in the European Patent Application 0099655. Such switching of the display to a black picture image is often carried out by application software called "screen saver", for example. When the "screen saver" operates in such a manner, however, it is difficult to distinguish the screen of the CRT from that in a cutoff state of the CRT display unit. On the other hand, the power supply for the CRT display unit is not turned off upon such operation of the "screen saver". Consequently, the CRT display unit maybe left intact in an ON state of the power supply therefor. This leads to wasteful power consumption, as well as to reduction in life of the CRT due to a continuous ON state of a heater provided therein. Accordingly, it would be beneficial to eliminate the aforementioned disadvantages in a CRT display unit provided with a "screen saver". However, the aforementioned "screen saver", which has been developed in order to prevent a CRT screen from burning, may be adapted to display various patterns of animations for the purpose of amusement, in addition to display of a homogeneous black picture image. A typical system of such a "screen saver" is provided with tens of types of patterns, for example, while the user can produce such patterns himself in response to his liking. In such circumstances, an applicable range of such a power supply control method is inevitably narrowed if the factor for starting the control for turning off the power supply for the CRT display is restricted to only the display of a homogeneous black picture image. Further, the software of the "screen saver", which has dependence on an operating system, requires dedicated programs for various systems such as DOS, Windows, OS/2, UNIX and the like, for example. When the same image is displayed on the CRT for a constant period of time and it is necessary to drive the "screen saver", on the other hand, all input operations for the computer which are made by an operator are interrupted in general. There have been proposed some means for detecting such an interrupted state of the input operations in a hardware manner and displaying a homogeneous black picture image, for example, in order to prevent the CRT screen from burning. According to Japanese Utility Model Publication No. 2-6467 (1990), for example, a CRT display unit comprises a timer so that a video signal is converted to a blank signal if no input operation is carried out for a period of time which is previously set in the timer. In order to implement the "screen saver" in the aforementioned hardware manner, however, it is necessary to remarkably modify the interior of the computer in general. Thus, a relatively high cost is required for such a modification. Further, such a modification is not easy for dealers other than a computer manufacturer. Accordingly, it would be beneficial to implement a "screen saver" in a hardware manner, with no introduction of a remarkable modification to a computer body. SUMMARY OF THE INVENTION The present invention is set out in the appended claims. Embodiments of the present invention are directed to a CRT display unit which is connected to a central unit generating a synchronizing signal and a video signal, for displaying an image of the video signal. This CRT display unit comprises a power supply circuit which includes a main power supply and an auxiliary power supply, a power circuit, which is driven by the main power supply, including a high voltage circuit, a deflection circuit and a video circuit, a synchronous processing circuit for processing a synchronizing signal received from the central unit and supplying the processed synchronizing signal to the high voltage circuit and the deflection circuit, a video input processing circuit, which includes video signal detection means for detecting presence/absence of a video signal from the central unit, for processing the video signal and supplying the processed video signal to the video circuit, and a CRT. The CRT display unit further comprises means for controlling the power supply circuit to turn off the power circuit and the heater after the detection of presence of no synchronizing signal from the central unit. Thus, it is possible to turn off the power circuit and the heater also when a power supply for the central unit such as a host computer is turned off. Preferably, the CRT display unit further comprises timer means for clocking a period when input signals are absent and wherein the switching means are operable to activate a power saving state after a predetermined delay time following said determination. In this case, the power circuit is not immediately turned off even if the "screen saver" so operates that no video signal is present, whereby it is possible to prevent the power circuit from erroneous turnoff when application software intentionally displays a homogeneous black picture image, for example. Consequently, it is possible to carry out delicate power supply control. The present invention is further directed to a power supply control method for the aforementioned CRT display unit. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing an electrical structure provided in a CRT display unit according to an embodiment of the present invention; Fig. 2 is a block diagram showing a video signal detection circuit 20 included in a video input processing circuit 17 shown in Fig. 1; Fig. 3 is a flow chart showing a power supply control procedure executed by a CPU 15 shown in Fig. 1; Fig. 4 illustrates some typical state transitions implemented in a power save mode which is obtained along the power supply control procedure shown in Fig. 3 in relation to power consumption; Fig. 5 is a flow chart corresponding to Fig. 3, showing a power supply control procedure executed in another embodiment of the present invention; Fig. 6 is a block diagram showing a graphics board 51 and electrical elements on a computer side related to the present invention; and Fig. 7 schematically illustrates a mother board 52 provided in a computer body holding the graphics board 51 shown in Fig. 6 and some external input/output units. DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 1 is a block diagram showing an electrical structure provided in a CRT display unit according to an embodiment of the present invention. This CRT display unit is connected to a central unit such as a host computer, for example, generating a synchronizing signal and a video signal, to display an image of the video signal. The CRT display unit comprises a power supply circuit 3 which is connected to a commercial ac power supply 1 through a main power supply switch 2. This power supply circuit 3 includes a main power supply 4 and an auxiliary power supply 5. The CRT display unit further comprises a power circuit 9 including a high voltage circuit 6, a deflection circuit 7 and a video circuit 8, which are driven by the main power supply 4. A CRT 10 comprises an anode 11 which is supplied with a high dc voltage from the high voltage circuit 6, a deflection yoke 12 which is supplied with a deflecting current from the deflection circuit 7, a cathode 13 which is supplied with a cathode drive signal from the video circuit 8, and a heater 14 which is supplied with a current from the auxiliary power supply 5. The CRT display unit further comprises a CPU 15, a synchronous processing circuit 16 and a video input processing circuit 17, which are driven by the auxiliary power supply 5. A synchronizing signal from the host computer (not shown) is supplied to the synchronous processing circuit 16 through a synchronizing signal input terminal 18, while a composite video signal superposed with such a synchronizing signal is supplied to the synchronous processing circuit 16 through a video signal input terminal 19. The synchronous processing circuit 16 performs processing such as waveform shaping, polarity decision and/or synchronization separation of the synchronizing signal or automatic switching of the composite video signal, so that the as-processed desired synchronizing signal is supplied to the high voltage circuit 6 and the deflection circuit 7 as well as to the CPU 15. A video signal from the host computer is supplied to the video input processing circuit 17 through the video signal input terminal 19. The video input processing circuit 17 performs processing such as amplification of the video signal, so that the as-processed video signal is supplied to the video circuit 8. The video input processing circuit 17 includes video signal detection means for detecting presence/absence of the video signal from the host computer. This video signal detection means is illustrated in Fig. 2 in detail. As shown in Fig. 2, a video signal detection circuit 20 is adapted to detect presence/absence of a blue color signal, so that an analog signal serving as such a blue color signal is applied as an input to a voltage amplifier 21 to be amplified therein. An output of the voltage amplifier 21 is supplied to a base of a transistor 22. When the voltage supplied to the base is reduced below a prescribed value, the transistor 22 is so switched that a prescribed voltage is applied as an input to a monostable multivibrator 23. The monostable multivibrator 23 generates a signal having a pulse width of 38 msec. exceeding a vertical scanning period as a video signal detection signal, which in turn is supplied to the CPU 15. Referring again to Fig. 1, the CPU 15 comprises main power supply control means which controls the main power supply 4 to turn on/off the power circuit 9 when the video signal detection circuit 20 detects presence/absence of a blue color signal, first timer means which clocks an OFF state of the power circuit 9, and auxiliary power supply control means which controls the auxiliary power supply 5 to turn off the heater 14 after a lapse of a period of time previously set in the first timer means, as clearly described later with reference to a power supply control procedure. The main power supply control means comprises second timer means for clocking a state with presence of no video signal, power circuit turnoff means for turning off the power circuit 9 after a lapse of a period of time previously set in the second timer means, and blanking signal generation means which supplies a picture blanking signal to the video circuit 8 for a prescribed period of time when the video signal detection circuit 20 detects presence of a video signal. The CPU 15 further comprises means for controlling the power supply circuit 3 to turn off the power circuit 9 and the heater 14 after a lapse of a prescribed period of time upon detection of presence of no synchronizing signal from the host computer. In relation to the CPU 15, further provided are a forced on/off switch 24, a power save on/off switch 25 and a time setting switch 26. The forced on/off switch 24 supplies the CPU 15 with a signal for controlling the power supply circuit 3, in order to forcibly turn on/off the power circuit 9 and the heater 14 with no regard to a power supply control state by the CPU 15. The power save on/off switch 25 supplies the CPU 15 with a signal for switching the device between the so-called "power save mode" for turning off the power circuit 9 and the heater 14 along a prescribed procedure upon operation of the aforementioned "screen saver" and another mode. The time setting switch 26 is so driven as to change the time which is set in the first timer means. According to this embodiment, the first timer means is adapted to restart clocking when the video signal detection circuit 20 detects presence of no video signal. A period of time for 63 minutes is previously set in the first timer means, and this period of time can be varied in a range of 8 to 63 minutes through the time setting switch 26. On the other hand, a period of time for 3 minutes is previously set in the second timer means, and this period of time is fixed. However, the period of time which set in the second timer means may also be rendered variable, as a matter of course. Fig. 3 is a flow chart showing a power supply control procedure which is executed by the CPU 15. Fig. 4 illustrates transition of some typical states implemented in a power save mode obtained along the power supply control procedure shown in Fig. 3 in relation to power consumption. Mainly with reference to Fig. 3, the main power supply switch 2 (Fig. 1) is turned on at a step 101, to start the procedure shown in Fig. 3. Upon such operation of the main power supply switch 2, the auxiliary power supply 5 first rises as shown in Fig. 1, thereby driving the CPU 15, the synchronous processing circuit 16 and the video input processing circuit 17. Then, initialization is carried out at a step 102 to set a period of time for 63 minutes in the first timer means (shown as "timer F" in Fig. 3) and a period of time for 3 minutes in the second timer means (shown as "timer S" in Fig. 3). The first and second timer means start clocking simultaneously with such setting. Then, a determination is made at a step 103 as to whether or not the forced on/off switch 24 (Fig. 1) generates an ON request. If the determination is of yes, the process is led to steps 117, 118, 119 and 120, so that the CPU 15 generates a main power supply control signal and a heater control signal at the step 119 for controlling the main power supply 4 and the auxiliary power supply 5 to turn on the power circuit 9 and the heater 14 respectively. Thus, the CRT 10 makes display. If the determination at the step 103 is of no, on the other hand, the process is led to a step 104, so that a determination is made as to whether or not the forced on/off switch 24 generates an OFF request. If the determination is of yes, the process is led to a step 108, so that the main power supply 4 and the auxiliary power supply 5 are controlled to turn off the power circuit 9 and the heater 14. If the determination at the step 104 is of no, on the other hand, the process is led to a step 105, so that a determination is made as to whether or not a synchronizing signal is received from the host computer through the synchronizing signal input terminal 18. If the determination is of no, a determination is made at a step 107 as to whether or not such a state with presence of no synchronizing signal is continuous in excess of 3 seconds. If the determination is of yes, the power circuit 9 and the heater 14 are turned off at a step 108. Such a state with presence of no synchronizing signal in excess of 3 seconds corresponds to an OFF state of a power supply for the host computer or a state of disconnection between the host computer and the CRT display unit. When the determination at the step 107 is of no, on the other hand, the power circuit 9 and the heater 14 are not turned off and the process is returned to the step 103. Such a waiting time for 3 seconds is provided before turning off the power circuit 9 and the heater 14 in consideration of a possibility of mode switching in the host computer, so that the power circuit 9 and the heater 14 are not erroneously turned off by absence of the synchronizing signal caused by such mode switching. If a synchronizing signal is detected at the aforementioned step 105, on the other hand, the process is led to a step 106. At the step 106, a determination is made as to whether or not the device is switched to a power save mode by the power save on/off switch 25 shown in Fig. 1. If the determination is of yes, the device enters a power save mode at a step 109. When the device thus enters a power save mode, a determination is made at a step 110 as to whether or not it is necessary to change the setup time in the first timer means (timer F), i.e., a period of time from turnoff of the power circuit 9 to turnoff of the heater 14. While the setup time of the timer F is variable within the range of 8 to 63 minutes from a state with presence of no video signal (5 to 60 minutes from turnoff of the power circuit 9), this time is previously set at 63 minutes at the step 102. In order to set a shorter period of time, the operator keys data therefor, for example. Therefore, the determination at the step 110 is made as to whether or not such data is keyed. When it is necessary to change the setup time in the timer F, the time setting switch 26 shown in Fig. 1 is manipulated to change the same at a step 111. Simultaneously with such change of the setup time, the timer F restarts clocking. When the determination at the step 110 is of no or the change of the setup time is finished at the step 111, on the other hand, the process is led to a step 112. At the step 112, a determination is made as to whether or not a video signal is transmitted from the host computer to the video signal input terminal 19 shown in Fig. 1 and a blue color signal, for example, is detected by the video signal detection circuit 20 (Fig. 2) included in the video input processing circuit 17. If the determination is of yes, the process is led to the aforementioned step 117. If the determination is of no, on the other hand, the process is led to a step 113. At the step 113, a determination is made as to whether or not a state with presence of no video signal is continuous in excess of 3 minutes, i.e., a setup time in the second timer means (timer S). When the determination is of yes, the power circuit 9 is turned off at a step 114. If the determination is of no, on the other hand, the process is returned to the step 103. Such a waiting time for 3 minutes is provided before turning off the power circuit 9 so that the power circuit 9 is not erroneously turned off if application software intentionally displays a homogeneous black image or the like for a prescribed period of time. Then, a determination is made at a step 115 as to whether or not the state with presence of no video signal is continuous in excess of the setup time in the timer F. If the determination is of yes, the heater 14 is turned off at a step 116. Such a prescribed period of time is provided before turnoff of the heater 14 after the power circuit 9 is turned off so that image display can be quickly restored without waiting for a heating time for the heater 14 when the video signal is again detected (step 112) during this time. At the aforementioned step 117, the first and second timer means (timers F and S) are restarted. This step is carried out when a forced ON request is detected at the step 103, no power save mode is detected at the step 106, or the video signal is detected at the step 112. After the timers F and S are restarted at the step 117, a determination is made at a step 118 as to whether or not the power circuit 9 or the heater 14 has been turned off. If this CRT display unit has been already used and the power circuit 9 and the heater 14 have been turned on, the process is returned to the step 103. If employment of the CRT display unit is started, the power circuit 9 is turned off at the step 114 or the heater 14 is turned off at the step 116 following the power circuit 9, on the other hand, the process is led to a step 119 so that the power circuit 9 and the heater 14 are turned on. Thus, image display is started in the CRT 10. When the image display is started at the step 119, a picture blanking signal is supplied to the video circuit 8 for 2 seconds at a step 120. This picture blanking signal is supplied to prevent display of an irregular image, which appears on the CRT 10 upon turnon of the power circuit 9 at the step 119 after the video signal is detected at the step 112 when the power circuit 9 is in an OFF state but the heater 14 is in an ON state. When the high voltage circuit 5, the deflection circuit 7 and the video circuit 8 are simultaneously turned on, the high voltage circuit 6 and the deflection circuit 7 cause instable states in rising, such that an irregular image is displayed on the CRT 10 if a video signal is applied to the video circuit 8 in this stage. When a picture blanking signal is supplied for 2 seconds, for example, until the high voltage circuit 6 and the deflection circuit 7 are stabilized, therefore, the CRT 10 displays a homogeneous black picture image, to prevent the display of an irregular image. The video signal is applied to the video circuit 8 after a lapse of such 2 seconds, so that the CRT 10 displays an ordinary image. The aforementioned power supply control procedure is now described in relation to transition of typical states in a power save mode shown in Fig. 4. In a state A shown in Fig. 4, the CRT 10 displays an ordinary image. If the device is in a power save mode in this state, the procedure shown in Fig. 3 is executed along a loop of returning the process to the step 103 through the steps 103, 104, 105, 106, 109, 110, 112, 117 and 118. When no power save mode is employed, on the other hand, the procedure shown in Fig. 3 is executed along a loop of returning the process to the step 103 through the steps 103, 104, 105, 106, 117 and 118. When absence of the video signal from the host computer occurs in the aforementioned state A in employment of the power save mode, transition to a state B in Fig. 4 takes place. When the CRT 10 continuously displays the same image for a constant period of time in an operating state of the "screen saver", the video signal from the host computer is interrupted so that the CRT 10 displays a homogeneous black picture image in order to prevent burning of a fluorescent material provided therein, as hereinabove described. In response to such interruption of the video signal, transition from the state A to the state B takes place. In the state B, the procedure shown in Fig. 3 is executed along a loop of returning the process to the step 103 through the steps 103, 104, 105, 106, 109, 110, 112 (or 111, 112) and 113. When a period of time for 3 minutes elapses in the aforementioned state B, the power circuit 9 is turned off, whereby transition to a state C shown in Fig. 4 takes place. In the state C, the procedure shown in Fig. 3 is executed along a loop of returning the process to the step 103 through the steps 103, 104, 105, 106, 109, 110, 112, 113, 114 and 115. When the prescribed period of time which is set in the first timer means (timer F), i.e., 8 to 63 minutes from interruption of the video signal (5 to 60 minutes from transition from the state B to the state C) elapses in the state C, the heater 14 is turned off, whereby transition to a state D takes place. In the state D, the procedure shown in Fig. 3 is executed along a loop of returning the process to the step 103 through the steps 103, 104, 105, 106, 109, 110, 112, 113, 114, 115 and 116. The process passes through the step 112 in every one of the states B, C and D, while the process is led from the step 112 to the step 117 when a video signal is again supplied from the host computer in each state. Thereafter a determination of no is made at the step 118 following the step 117 in the state B since both of the power circuit 9 and the heater 14 are in ON states, so that the process is returned to the step 103 for restoration to a state of making ordinary image display in the CRT 10, i.e., the state A. In the state C or D, on the other hand, a determination of yes is made at the step 118 following the step 117, so that the process is returned to the step 103 through the steps 119 and 120. Consequently, the device is restored to a state of making ordinary image display in the CRT 10, i.e., the state A. From the state B, the device is instantaneously restored to the state A. From the state C, on the other hand, the device is restored to the state A after a lapse of 2 seconds due to the picture blanking signal which is supplied for 2 seconds at the step 120. When the device is restored from the state D to the state A, further, a recovery time of 10 to 15 seconds is experimentally required since it is necessary to raise up the temperature of the heater 14. Fig. 4 shows exemplary levels of power consumed by the CRT display device in the states A, B, C and D respectively. Assuming that power of 100 % is consumed in the state A, power of 86 %, power of 11 % and power of 5.7 % are consumed in the states B, C and D respectively. However, such concrete percentages are mere examples. Power which is consumed in the state A is varied with the content of the image displayed on the CRT 10, as well as with the dimensions of the CRT 10. While the present invention has been described with reference to a preferred embodiment, the following modifications are also available in the power control method according to the present invention: As to the state transition shown in Fig. 4, the state B may be omitted so that the power supply is controlled to cause transition from the state A to the states C and D. In this case, the step 113 shown in Fig. 3 is omitted. Referring to Fig. 4, further, the state C may be omitted so that the power supply is controlled to cause transition to the state D through the states A and B. In this case, the steps 110, 111 and 115 are omitted from Fig. 3. In the power supply control procedure shown in Fig. 3, the first timer means (timer F) is adapted to start clocking from a point of time when no video signal is present at the step 115, in order to obtain timing for off-controlling the heater 14 at the step 116. However, this timer means may be replaced by that which is adapted to start clocking from a point of time when the power circuit 9 is turned off, in order to obtain timing for off-controlling the heater 15. Such a control procedure is now described with reference to Fig. 5. Fig. 5 is a flow chart showing a power control procedure executed in another embodiment of the present invention. Referring to Fig. 5, steps corresponding to those shown in Fig. 3 are denoted by similar reference numerals, to omit redundant description. In the control procedure shown in Fig. 5, a single timer is so employed as to provide timing for off-controlling the power circuit 9 and that for off-controlling the heater 14. Namely, a setup time for 3 minutes for off-controlling the power circuit 9 is first set in this timer, which in turn starts clocking. After completion of such clocking for 3 minutes, a setup time for 5 to 60 minutes is set in this timer, which in turn starts clocking. At a step 102a shown in Fig. 5, the setup time for 3 minutes is set in this timer, which simultaneously starts clocking. Further, the CPU 15 stores a setup time for 60 minutes to be subsequently set in the timer. When a determination is made at a step 110 shown in Fig. 5 that it is necessary to change a period of time from turnoff of the power circuit 9 to that of the heater 14, this period of time is changed at a step 111a within a range of 5 to 60 minutes, so that the as-changed period of time is stored in the CPU 15. When no video signal is detected at a step 112, the process is led to a step 200. At the step 200, a determination is made as to whether or not the power circuit 9 is turned off. If the determination is of no, a determination is made at a step 113 as to whether or not a state with presence of no video signal is continuous in excess of 3 minutes. If the determination is of yes, the power circuit 9 is turned off at a step 114. Then, data related to the period of time within the range of 5 to 60, which is stored in the CPU 15, is set at a step 210, so that the timer starts clocking. Then, a determination is made at a step 115a as to whether or not the setup time of 5 to 60 minutes elapses from turnoff of the power circuit 9. If the power circuit 9 is continuously in an OFF state in excess of the setup time, the heater 14 is turned off at a step 116, similarly to the aforementioned embodiment. If the determination is of yes at the step 200, on the other hand, the process is directly led to the step 115a. If the determinations are of no at the steps 113 and 115a respectively, the process is returned to a step 103. When a video signal is detected at the step 112, on the other hand, the process is led to a step 117a. At this step 117a, the timer is set at 3 minutes, to restart clocking along the setup time of 3 minutes. The remaining part of the control procedure shown in Fig. 5 is substantially similar to that shown in Fig. 3. As hereinabove described, the operation for off-controlling the power supply for the CRT display unit is started by display of a homogeneous black picture image on the CRT 10 according to the present invention. When the computer employs an operating system or application software in which no homogeneous black picture image is displayed but proper animation display is carried out on the CRT upon operation of the "screen saver", therefore, it is impossible to apply the inventive power supply control. According to the following description, however, it is possible to drive the "screen saver" regardless of the operating system or application software employed in the computer as well as to display a homogeneous black picture image on the CRT at this time, whereby the inventive power supply control method can be regularly applied. Thus, it is possible to widen the available range of the power supply control method. Fig. 6 is a block diagram showing a graphics board 51 and electrical elements which are included in a computer related thereto. Fig. 7 schematically illustrates a mother board 52 provided in the body of the computer holding the graphics board 51 shown in Fig. 6 and some external input/output units. Referring to Fig. 7, the mother board 52 which is provided with some option slots 53, 54, 55, ... is arranged in the body of a computer of an open architecture type. The graphics board 51 is inserted in an arbitrary one, such as the option slot 53, for example, selected from the option slots 53, 54, 55, ... The mother board 52 further carries a CPU 56 thereon. The mother board 52 is connected with a keyboard 57 serving as external input means. The mother board 52 is further connected with a mouse 58 and a network 59, serving as other external input means, respectively at need. The graphics board 51 is connected with a CRT display unit 60. Some buses (not shown in Fig. 7) extend in relation to the option slots 53, 54, 55, ..., so that an option board such as the graphics board 51 is connected to these buses in common whichever option slot receives this option board. Fig. 6 shows elements corresponding to some of those shown in Fig. 7 with similar reference numerals. Referring to Fig. 6, the graphics board 51 comprises a graphic control part 61. This graphic control part 61 supplies an image signal to a frame memory 62, so that pixel data for one screen which is stored in the frame memory 62 is inputted in a pixel data terminal of a D-A converter (RAMDAC) 63. On the other hand, a blank signal from the graphic control part 61 is applied to a blank terminal of the D-A converter 63 through a gate 64. Thus, the D-A converter 63 generates a video signal which is supplied to the CRT display unit 60 (Fig. 7). Further, a synchronizing signal which is supplied as an output from the graphic control part 61 is supplied to the CRT display unit 60 through a buffer 65. The graphic control part 61 is connected with an address bus 66 and a data bus 67 extending from the CPU 56. The aforementioned structure which is related to the graphics board 51 is substantially similar to that provided in a conventional graphics board. The graphics board 51 further comprises an input detection part 68 and a timer 69. The input detection part 68 is adapted to monitor presence/absence of an interruption request which is generated upon receiving of an input signal from external input means such as the keyboard 57 or the mouse 58, thereby detecting presence of the input signal from the external input means. This input detection part 68 is now described in detail. Data from the keyboard 57 is received by a keyboard controller 70, which in turn write the data in an output buffer (not shown) and presents an interruption request to the CPU 56 through an interruption signal line 71. The keyboard controller 70 is also connected with the address bus 66 and the data bus 67 respectively. Further, data from the mouse 58 is received by a mouse controller 72, which in turn presents an interruption request to the CPU 56 through an interruption signal line 73. The mouse controller 72 is also connected with the address bus 66 and the data bus 67 respectively. Similarly, an external input controller 74 is provided for receiving data, i.e., an input signal from external input means such as a network, a facsimile, a digitizer or a track ball, to present an interruption request to the CPU 56 through an interruption signal line 75 upon receiving of the input signal. The external input controller 74 is also connected to the address bus 66 and the data bus 67 respectively. External input controllers corresponding to such an external input controller 74 are provided in correspondence to the number of external input means as employed, so that interruption requests from the external input controllers as added are supplied to the CPU 56 through other interruption signal lines 76, ... In order to monitor presence/absence of the aforementioned interruption request, the input detection part 68 of the graphics board 51 comprises an interruption request detection part 77 and a keyboard access detection part 78. The interruption request detection part 77 is connected to the interruption signal lines 73, 75, 76, ..., to monitor presence/absence of an interruption request which is presented from the mouse controller 72, the external input controller 74 or the like to the CPU 56. The aforementioned interruption signal lines 73, 75, 76, ... extend along the address bus 66 and the data bus 67, whereby the graphics board 51 can be easily connected with the interruption signal lines 73, 75, 76, ... when the same is inserted in the option slot 53, for example. However, the interruption signal line 71 from the keyboard controller 70 is generally directly introduced into the CPU 56, without extending along the address bus 66 and the data bus 67. Therefore, it is impossible to directly monitor an interruption request on the interruption signal line 71, in order to detect manipulation of the keyboard 57. To this end, the keyboard access detection part 78 is provided independently of the interruption request detection part 77 in order to detect manipulation of the keyboard 57, thereby detecting an address signal which is supplied as an output to the address bus 66 in response to manipulation of the keyboard 57. When the keyboard 57 is manipulated and an interruption request is supplied from the keyboard controller 70 to the CPU 56 through the interruption signal line 71, the CPU 56 determines such manipulation of the keyboard 57 to output an address signal onto the address bus 66. Each of signals from the interruption request detection part 77 and the keyboard access detection part 78 is supplied to a gate 80 through switching means 79, so that an output signal from the gate 80 is applied to a reset terminal of the timer 69. The aforementioned switching means 79 is driven to select the external input means generating the signal whose presence is to be detected, so that it is possible to monitor only manipulation of the keyboard 57, only manipulation of the keyboard 57 or the mouse 58, or supply of an input signal from any one of the external input means to the CPU 56, for example, by driving the switching means 79. The switching means 79 is generally driven previously by a manufacturer of the graphics board 51, or in an initial stage of employment of the graphics board 51. The timer 69 starts a clocking operation upon input of a signal from the gate 80, i.e., upon detection of presence of an input signal from any one of the external input means including the keyboard 57 and the mouse 58. More specifically, the timer 69 is adapted to set a prescribed timer value which is subtract therein with a lapse of time, and is reset when the same receives a signal in the aforementioned reset terminal. When the input detection part 68 detects no presence of an input signal from the external input means again before a lapse of a period of time previously set in the timer 69, an output signal is derived. This output signal is supplied to the aforementioned gate 64 to supply a blank signal from the D-A converter 63 to the CRT display unit 60 (Fig. 7). Thus, a CRT provided in the CRT display unit 60 displays a homogeneous black picture image, to attain a state of operation of a "screen saver". If the input detection part 68 detects presence of an input signal from the external input means before a lapse of the period of time previously set in the timer 69 or in an operating state of the "screen saver", the timer 69 is reset to restart a clocking operation. At the same time, the CRT display unit 60 is restored to an ordinary image display state. The period of time previously set in the timer 69 is preferably rendered variable in response to a request by the operator. When a nonvolatile memory storing the period of time set in the timer 69 is provided on the graphics board 51, further, it is possible to drive a desired "screen saver" without setting the timer 69 when the power supply for the computer is turned off and thereafter again turned on to start the computer. Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the scope of the present invention being limited only by the terms of the appended claims.

Claims: A control circuit for controlling the power supply of a CRT display unit coupled to a central unit generating input signals in the form of synchronizing signals and video signals, the CRT display unit comprising a heater (14) and a power circuit (9) including a high voltage circuit (6), a deflection circuit (7) and a video circuit (8), wherein the control circuit includes means (15) for monitoring the input signals supplied by the central unit to determine the occurrence of absent signals therein, and switching means (15) operable to activate one of two power saving states selectively in response to said determination, said two power saving states comprising: (i) a first state in which the power circuit (9) is off and the heater (14) is on; and (ii) a second state in which the power circuit (9) is off and the heater (14) is off, and wherein the switching means (15) selects said first state or said second state in dependence on the nature of the absent input signals. A control circuit according to claim 1, further comprising timer means for clocking a period when input signals are absent, said switching means being operable to activate a power saving state after a predetermined delay time following said determination. A control circuit according to claim 1 or 2, wherein said first power saving state is selected in response to detection of the absence of video signals from the input signals. A control unit according to claim 1, 2 or 3, wherein said second power saving state is selected in response to detection of the absence of synchronizing signals from the input signals. A method of controlling the power supply of a CRT display unit coupled to a central unit generating input signals in the form of synchronizing signals and video signals, the CRT display unit comprising a heater (14) and a power circuit (9) including a high voltage circuit (6), a deflection circuit (7) and a video circuit (8), the method comprising monitoring the input signals supplied by the central unit to determine the occurrence of absent signals therein, and activating one of two power saving states selectively in response to said determination, said two power saving states comprising: (i) a first state in which the power circuit (9) is off and the heater (14) is on; and (ii) a second state in which the power circuit (9) is off and the heater (14) is off, and the selection of said first state or said second state being made in dependence on the nature of the absent input signals. A method according to claim 5, comprising activating a power saving state a predetermined delay time following said determination. A method according to claim 5 or 6, wherein said first power saving state is selected in response to detection of the absence of video signals from the input signals. A method according to claim 5, 6 or 7, wherein said second power saving state is selected in response to detection of the absence of synchronizing signals from the input signals.

Inventors: KATADA HIDEO, KOMATSU YUICHI, KONISHI KAZUHIRO, TAKASE KATSUHISA, TANABE TOSHIHISA, TORII HAJIME, KATADA, HIDEO, KOMATSU, YUICHI, KONISHI, KAZUHIRO, TAKASE, KATSUHISA, TANABE, TOSHIHISA, TORII, HAJIME
Applicants: EIZO NANAO CORP, EIZO NANAO CORPORATION
Application year: 1993
Main classification: H04N5
IPC codes: H04N5, G06F1