Voltage detection circuit with common-base configured transistor

Abstract: A detection circuit comprises a voltage-current conversion circuit (R) supplied with a first voltage signal indicative of the state of an object circuit (13) for producing an output current (I) in response thereto, a detection circuit (11) supplied with a second voltage signal (V C ) for detecting the state of the object circuit, and a clamping circuit (12) supplied with the output current of the voltage-current conversion circuit for clamping an output voltage (V B ) of the voltage-current conversion circuit and further for producing the second voltage signal in response to the output current of the voltage-current conversion circuit such that the second voltage has a magnitude proportional to the first voltage signal.

Description: BACKGROUND OF THE INVENTION The present invention generally relates to control systems, and more particularly to a detection circuit used in a control system for detecting a state of an object that is under control. Microcomputers are used in various control systems for detecting the state of an object that is under control and for controlling the same based upon the information about the state thus detected. In the driver circuits of actuation devices such as electric motors or magnetic relays, for example, the state of the actuation device is detected by a detection circuit, and the output of the detection circuit indicative of the state of the actuation device is sent to a microcomputer for subsequent control. Generally, the detection circuit is driven by a supply voltage that is different from the supply voltage that powers the actuation devices. For example, the actuation devices are powered by a supply voltage of 12 volts or 24 volts in the automotive applications, while the detection circuit is usually powered by a supply voltage of 5 volts. Thereby, there frequently occurs a case wherein the detection circuit has to detect a voltage that exceeds the supply voltage. In order to guarantee a normal operation of the detection circuit, the detection circuit usually uses a voltage divider for reducing the voltage that is to be detected. On the other hand, the use of the voltage divider raises a problem of sensitivity of the detection circuit, as the variation of the voltage to be detected is demagnified by the use of the voltage divider. Thereby, the detection circuit tends to be vulnerable to noises and the risk of an erroneous operation of the detection circuit increases. FIG.1 shows an example of a control system that controls an actuation device by a microcomputer. Referring to FIG.1, the actuation device includes a solenoid L powered by a supply voltage V DD at a power supply line and a drive circuit 1 A that drives the solenoid L via a MOS transistor Tr, which in turn is connected in series to the solenoid L between the power supply line and the ground. The solenoid L may be used for actuating a mechanical device such as a brake of an automobile. Thereby, the solenoid L, the MOS transistor Tr, and the drive circuit 1 A form a system 1 that is subjected to a control, and there is provided a microcomputer 2 for controlling the system 1. There, the microcomputer 2 monitors the state of the system 1 such as the state of the solenoid L and controls the same in response to the monitored state of the system 1, based upon an external control signal supplied to the microcomputer 2. In order to monitor the state, a detection circuit to be described below is used. FIG.2 shows the construction of a most fundamental detection circuit 10 that is used in the system 1 of FIG.1. Referring to FIG.2, the detection circuit includes a comparator 3 B having an inverting input terminal connected to a node A where the solenoid L and the transistor Tr are connected in series and a non-inverting input terminal connected to a reference voltage source 3 A . There, the comparator 3 B is activated by a supply voltage V CC and produces an output voltage S when the voltage level at the node A has decreased below the reference voltage. This output voltage S is supplied to the microprocessor 2 of FIG.1. The microprocessor 2, in turn, supplies a control voltage to a gate of the MOS transistor Tr that forms the drive circuit 1 A . It should be noted that the detection circuit of FIG.2 operates only when the supply voltage V DD is approximately equal to or lower than the supply voltage V CC . When the voltage V DD exceeds the voltage V CC , there occurs a case wherein a voltage at the node A exceeds the supply voltage V CC . In such a case, the comparator 3 B and hence the detection circuit 10 no longer operates properly. In order to overcome this problem and to provide a detection circuit that can operate in a wide voltage range, a detection circuit shown in FIG.3 is proposed, wherein the circuit includes a voltage divider 4 that in turn includes a first resistor R 11 and a second resistor R 12 that are connected in series. Thereby, the voltage at the node A is voltage-divided by the resistors R 11 and R 12 to a level that does not exceed the supply voltage V CC of the comparator 3 B . Thereby, the circuit of FIG.3 can operate properly even when the voltage level of the supply voltage V DD exceeds the voltage level of the supply voltage V CC . FIG.4 shows another conventional example of the detection circuit for use in the control system of FIG.1, wherein there is provided another voltage divider 5 for producing a reference voltage for the comparator 3 B from the supply voltage V DD . Referring to FIG.4, the voltage divider 5 includes first and second resistors R 13 and R 14 that are connected in series between the voltage supply line carrying the supply voltage V DD and the ground. Thereby, a reference voltage V REF is produced across the resistor R 14 by the voltage-dividing of the supply voltage V DD , and the comparator 3 B becomes immune to any voltage variation in the supply voltage V DD . In any of the circuits of FIG.3 and FIG.4, the operation of the comparator 3 B is held normal even when the supply voltage V DD exceeds the supply voltage V CC . Thereby, the circuit is suitable for use in the carborne or other vehicle-loaded control systems. In the detection circuit of FIG.3 or FIG.4, it should be noted that the variation of the voltage at the node A is demagnified as a result of the voltage-dividing. In other words, the extent of variation of the voltage at the node A is reduced when the voltage variation is detected by the comparator 3 B . On the other hand, the sensitivity of the comparator 3 B remains the same. Thereby, there occurs a problem in that the S/N ratio of the detection circuit is poor and the control system 1 is vulnerable to the noises that are superposed on the supply voltage V DD . It should be noted that the detection circuit should be able to detect any deviation of the voltage at the node A from a predetermined, designed level. This is particularly important when detecting the anomaly that may be caused by a leak of the current in the solenoid. When such an anomaly is overlooked for example in the brake control system or other essential control systems of vehicles, a disastrous event may be caused. There is also known from patent document US-A-4 244 050 a voltage regulator circuit, e.g. for an engine control system, comprising a series pass transistor for achieving a low input to output offset, an adjustable input device for establishing a predetermined threshold level of supply line voltage below which the regulator shuts down, and a circuit for automatically, shutting down the regulator when the supply line voltage drops below the predetermined threshold level for preventing erroneous operation of the engine control system at low supply voltages. There is known from document US-A-4 754 644 a variable reluctance accelerometer in which a detection signal from the acceleration sensor is delivered to an amplifying circuit consisting of a single transistor, the emitter of which receives the sensor signal. The amplifier is configured so as to amplify all positive peaks of the sensor signal and to deliver a corresponding output voltage which is fed to comparators. Each of the comparators reacts to a set threshold level to activate a signalling device, such as a light emitting diode, reflecting the magnitude of the detected acceleration. SUMMARY OF THE INVENTION Accordingly, it is a general object of the present invention to provide a novel and useful detection circuit wherein the foregoing problems are eliminated. Another and more specific object of the present invention is to provide a detection circuit for use in a control system for detecting the state of an actuation device with an increased operational range and an improved accuracy. Another object of the present invention is to provide a detection circuit for detecting a state of an object circuit, said detection circuit being defined in independent claims 1 and 2. According to the present invention, the state of the actuation device, which is driven by the first supply voltage, can be detected by the comparator that is driven by the second supply voltage that may be lower than the first supply voltage, without sacrificing the accuracy of detection. It should be noted that the detection circuit of the present invention does not use the voltage divider that inevitably causes a reduction in the accuracy of detection. Thereby, the state of the control system is detected by a controller or a computer with improved accuracy and simultaneously with an improved reliability. Thus, the detection circuit of the present invention is suitable for use in the control systems of which malfunctioning may cause a disastrous effect such as the vehicle control systems. Other objects and further features of the present invention will become apparent from the following detailed description when read in conjunction with the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG.1 is a circuit diagram showing the construction of a conventional control system that includes a solenoid and a microcomputer for controlling the solenoid via a drive circuit; FIG.2 is a circuit diagram showing the construction of a conventional detection circuit applicable to the control system of FIG.1 for monitoring the state of the solenoid; FIG.3 is a circuit diagram showing the construction of another conventional detection circuit applicable to the control system of FIG.1 for monitoring the state of the solenoid; FIG.4 is a circuit diagram showing the construction of still other conventional detection circuit that is applicable to the control system of FIG.1 for monitoring the state of the solenoid; FIG.5(A) is a block diagram showing the principle of the present invention; FIG.5(B) is a circuit diagram showing an essential part of the detection circuit of FIG.5(A); FIGS.6(A) - 6(D) are diagrams for explaining the principle of operation of the detection circuit according to the first embodiment of the present invention; FIG.7 is a circuit diagram showing the construction of the detection circuit according to a first embodiment of the present invention; FIG.8 is a circuit diagram showing the construction of a detection circuit useful for understanding a second embodiment of the present invention; FIG.9 is a circuit diagram showing the construction of the detection circuit according to a second embodiment of the present invention; FIG.10 is a circuit diagram showing the construction of the detection circuit according to a third embodiment of the present invention; FIG.11 is a circuit diagram showing the construction of the detection circuit according to a fourth embodiment of the present invention; FIG.12 is a circuit diagram showing the construction of the detection circuit according to a fifth embodiment of the present invention; FIG.13 is a circuit diagram showing the construction of the detection circuit according to a sixth embodiment of the present invention; and FIG.14 is a circuit diagram showing the construction of the detection circuit according to a seventh embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the principle of the present invention will be explained with reference to FIGS.5(A) and 5(B) as well as FIGS.6(A) - 6(D). Referring to FIG.5(A) showing the fundamental construction of the control system that is controlled by a microcomputer MPU, the system includes an actuation circuit 13 that in turn includes an actuation device 13a such as a solenoid and a driver circuit 13b that drives the actuation device 13a. There, the driver circuit 13b is supplied with a control signal from the microcomputer MPU and activates the solenoid 13a. In response to the activation of the solenoid 13a, the voltage level at a node A inside the circuit 13 changes. Thus, the voltage level of the node A, represented as V A , indicates the operational state of the actuation device. Further, by monitoring the deviation of the voltage level at the -node A, one can detect any anomaly of the actuation device. It should be noted that the actuation circuit 13 and hence the actuation device 13a is driven by a first supply voltage V DD . To the node A, an end of a resistor R is connected such that a current I flows through the resistor R in response to the voltage V A . The resistor R has another end connected to a voltage clamp circuit 12 that clamps the voltage at a node B, which corresponds to the aforementioned another end, at a voltage level V B . Thereby, the clamp circuit 12 produces an output voltage corresponding to the current I and supplies the same to a comparator 11 that is driven by a second supply voltage V CC . There, the comparator 11 compares the output voltage of the circuit 12 with a predetermined, reference voltage V REF and produces an output signal S indicative of the result of the comparison. The comparator 11 supplies the output signal S to the microcomputer MPU. FIG.5(B) shows the construction of the clamp circuit 12. Referring to FIG.5(B), the clamp circuit 12 includes a bipolar transistor Q 1 having an emitter connected to the node B. Further, the transistor Q 1 has a base supplied with a predetermined bias voltage V Bias , and a collector that is connected to the ground via a resistor r. Thereby, a voltage V C appearing across the resistor r is supplied to the comparator 11 via an output terminal 11 a . Next, the operation of the circuit of FIG.5(A) will be described in detail. Referring to FIG.6(A) showing a part of the circuit of FIG.5(A) excluding the comparator 11, it will be seen that the actuation circui 13a comprises a solenoid L while the drive circuit 13b comprises a MOS transistor Tr that is connected in series to the solenoid L. The transistor Tr is supplied with a control signal at a gate thereof, and a current flows from the supply voltage line carrying the first supply voltage V DD to the ground upon the turning-on of the transistor Tr. In response to the turning-on of the transistor Tr, the level of the voltage at the node A decreases, while when the transistor Tr is turned off, the node A assumes a high voltage level substantially equal to the supply voltage V DD . On the other hand, when the transistor Tr is defective and a leak current flows through the transistor Tr, the voltage level of the node A deviates from the designed voltage level. In the circuit of FIG.6(A), the voltage V A at the node A is converted to the current I that flows through the resistor R, and the current I is supplied to the emitter of the transistor Q 1 that forms the clamp circuit 12. As the base of the transistor Q 1 is biased at the fixed voltage V Bias , the voltage level V B at the node B corresponding to the emitter voltage of the transistor Q 1 increases linearly with the voltage V A as shown in FIG.6(B) as long as the transistor Tr is not turned on and the current I is zero. When the voltage V A exceeds the sum of the bias voltage V Bias and the base-emitter voltage V BE , on the other hand, the transistor Q 1 turns on and the current I starts to flow through the transistor Q 1 from the emitter to the collector with a magnitude given as I = (V A - V B )/R. Thereby, the voltage V B at the node B is clamped at the foregoing level of V Bias + V BE . See FIG.6(B). Once the transistor Q 1 is turned on, on the other hand, the current I that flows through the transistor Q 1 increases with increasing voltage V A as shown in FIG.6(C). Thereby, there is formed the voltage V C across the resistor r in correspondence to a collector current I C such that the voltage V C changes in a one-to-one relationship with the voltage V A . As is well known, the collector current I C is given as I C = (1 - 1/H FE )·I, wherein H FE represents the common emitter current gain as usual. When the common emitter current gain H FE is sufficiently large, one can approximate the current I as I ≈ I C . It should be noted that the voltage V C is substantially smaller than the voltage V A . By suitably choosing the value of the resistor r at the collector of the transistor Q 1 , it is possible to set the voltage V C below the supply voltage V CC that activates the comparator 11. It should be noted that the voltage V C is given as V C = I C X r = [V A - (V BE + V Bias )]/R X r = (r/R) X V A - K, where K is a constant and given as K = (r/R) X (V BE + V Bias ). As the input voltage V C does not exceed the supply voltage V CC of the comparator 11 when the parameter K is set appropriately, the normal operation of the comparator 11 is guaranteed. Further, the conversion of the voltage from the first voltage V A to the second voltage V C is achieved without using a voltage divider. In other words, there is no sacrifice in the accuracy of the voltage detection during the conversion of the voltage V A to the voltage V C . FIG.7 shows a first embodiment of the present invention. Referring to FIG.7, the circuit 13 includes, in addition to the solenoid L and the MOS transistor Tr, a control circuit 1 A for controlling the transistor Tr in response to the output from a microcomputer 2. Thereby, the circuit 1 A forms a part of the driver circuit 13b together with the MOS transistor Tr. The clamp circuit 12 has a construction substantially as described with reference to FIG.6(A) and produces the output voltage V C at the collector of the transistor Q 1 . The output of the clamp circuit 12 is supplied to the comparator 11 that produces the output signal S in response to the result of comparison, and the comparator 11 supplies the output signal S to the microcomputer 2. In the embodiment of FIG.7, the supply voltage V DD for driving the solenoid L may be set to 30 volts, while the supply voltage V CC for driving the comparator 11 is set to 5 volts. Further, the resistors R and r are set such that the voltage V B does not exceed the supply voltage V CC as already mentioned. Thereby, the comparator 11 operates without problem in spite of the use of the supply voltage V DD that substantially exceeds the supply voltage V CC . Thereby, the state of the actuation device such as the solenoid L used for the motor, relay or actuator can be monitored by the microcomputer 2 with an improved precision that is given by the coefficient r/R. FIG.8 shows a detection circuit of the present invention has a construction substantially identical with the circuit of FIG.7, except that the voltage V B at the node B is supplied directly to a comparator 21 that is driven by the second supply voltage V CC . There, the comparator 21 is supplied with a reference voltage V REF from a reference voltage source 24 A and produces an output signal S' in response to the result of the comparison. The output signal S' is supplied further to the microcomputer 2. In the circuit according to this figure, it is possible to monitor the voltage V A even when the voltage V A is in the range below the voltage V B (= V Bias + V BE ). It should be noted that, in the circuit of FIG.7, the transistor Q 1 is turned off in this range of the voltage V A and no output voltage V C appears. See FIG.6(D). On the other hand, when the voltage V A has exceeded the voltage V B , the operation of the comparator 21 becomes no longer val-id, and the circuit of FIG.8 does not provide a correct result to the microcomputer 2. FIG.9 is a circuit diagram that combines the feature of the circuit of FIG.7 and the feature of the circuit of FIG.8. Referring to FIG.9, the circuit employs both the comparator 11 and the comparator 21 for detecting the voltage V C appearing at the node C and the voltage V B at the node B. Thereby, the comparator 11 is supplied with the voltage V C and further with the reference voltage from the voltage source 14 A for producing the an output signal S 2 in correspondence to the output signal S. Further, the -comparator 21 is supplied with the voltage V B and further with the reference voltage from the voltage source 24 A for producing an output signal S 1 in correspondence to the output signal S'. Both the output signals S 1 and S 2 are supplied to the microcomputer 2. Thereby, the detection circuit of the present embodiment is operational for the entire range of the voltage V A . Next, a third embodiment of the present invention will be described with reference to FIG.10. Referring to FIG.10, the detection circuit includes the driver circuit 13, the resistor R, the clamp circuit 12, and the comparator 11, similarly to the first embodiment, wherein there is provided a reference circuit 14 B that produces the reference voltage V REF based upon the supply voltage V DD . The reference circuit 14 B includes a bipolar transistor Q 2 having an emitter that is supplied with the supply voltage V DD via a resistor R 1 and a collector that is grounded via a resistor R 2 . Further, the transistor Q 2 has a base that is supplied with the bias voltage V Bias commonly with the transistor Q 1 . Thereby, the transistor Q 2 produces the reference voltage V REF across the resistor R 2 in response to the supply voltage V DD . As the reference voltage V REF is produced in response to the supply voltage V DD , any erroneous operation of the comparator 11 that may occur in the comparators that use a fixed voltage source for the reference voltage V REF , is effectively eliminated. The transistor Q 2 generally has a common emitter current gain that is substantially identical with the same common emitter current gain H FE of the transistor Q 1 . Even when there is a variation in the common emitter current gain between the transistor Q 1 and the transistor Q 2 , such a variation tends to be canceled out in the construction of FIG.10, and the operation of the comparator 11 is stabilized. In the circuit of FIG.10, a constant current source 15 powered by the supply voltage V CC is provided for setting the threshold condition that is detected by the comparator 11. Here, the threshold condition means the condition in which both the input voltages to the comparator 11 assume the same voltage level. The constant current source 15 is powered by the supply voltage V CC and supplies a constant current I T to the node C. In the circuit of FIG.10, it should be noted that there holds the following relationship at the threshold condition: [{V A - (V BE + V Bias )}/R + I t ] X r = [{V DD - (V BE + V Bias )}/R 1 } X R 2 . From this equation, one obtains V A = V DD - I T X R, where the relationships R = R 1 and r = R 2 are assumed for the resistors R, R 1 , r and R 2 . The above equation indicates that the voltage level V A that is lower than the supply voltage V DD by I T X R becomes the threshold level that is detected by the comparator 11. It should be noted that the above equation does not contain the term of V REF . Thus, the threshold operation of the comparator 11 becomes immune to the variation of the supply voltage V DD even when the reference voltage V REF is produced from the supply voltage V DD . It should also be noted that the threshold level V A becomes equal to the supply voltage V DD when the constant current Source 15 is omitted, assuming that the transistors Q 1 and Q 2 have the same common emitter current gain H FE . FIG.11 shows a fourth embodiment of the present invention. The circuit of FIG.11 has a construction substantially identical with the circuit of FIG.10 except that the constant current source 15 supplies the current I T to the emitter of the transistor Q 1 and that the circuit 12 includes a diode D 1 between the resistor R and the emitter of the transistor Q 1 for blocking a reverse flow of the current from the emitter of the transistor Q 1 to the solenoid L. Further, another diode D 2 is provided in the reference circuit 14 B between the resistor R 1 and the emitter of the transistor Q 2 for compensating a voltage drop cause across the diode D 1 in the clamp circuit 12. As a result of the use of the diode D 1 , the circuit of FIG.ll provides a stable operation. FIG.12 shows a fifth embodiment of the present invention. Referring to FIG.12, the circuit is a modification of the circuit of FIG.11 and includes a current mirror 17 at the collector of the transistors Q 1 and Q 2 . The current mirror 17 includes a first transistor Q 3 having respective bases connected with each other. There, the base and the collector of the transistor Q 3 are connected with each other and further connected to the collector of the transistor Q 1 while the emitter of the transistor Q 3 is connected to the ground as usual in the current mirror circuit. Further, the transistor Q 4 has a collector connected to the collector of the transistor Q 2 and an emitter connected to the ground. As usual in the current mirror circuit, the current flowing through the transistor Q 4 becomes equal to the current flowing through the transistor Q 3 . In other words, the current flowing through the transistor Q 4 represents the current that flows through the resistor R, which in turn reflects the voltage level of the node A. Further, the voltage level at the collector of the transistor Q 2 changes in response to the current flowing through the transistor Q 4 , and the circuit of FIG.12 detects the state of the solenoid L by detecting the voltage level of the collector of the transistor Q 2 by an ordinary amplifier circuit 31 that includes a transistor Q 5 . There, the transistor Q 5 has a collector supplied with the second supply voltage V CC via a resistor R 3 and an emitter connected to the ground. Further, the transistor Q 5 has a base connected to the collector of the transistor Q 2 . Thereby, an output signal S 3 indicative of the result of detection is obtained at the collector of the transistor Q 5 . According to the present embodiment, the comparator circuit can be eliminated and the circuit construction can be significantly simplified. FIG.13 shows a sixth embodiment of the present invention, wherein the embodiwent of FIG.11 is applied for detecting the state of two, different solenoids L 1 and L 2 that form actuation circuits 13 A and 13 B respectively. Each of the circuits 13 A and 13 B has a construction identical with the circuit 13. There, a first resistor R 101 is provided in correspondence to the resistor R for converting a voltage appearing at a node A 1 in the circuit 13 A to a current, and a clamp circuit 22 A is provided in correspondence to the clamp circuit 12. There, the clamp circuit 22 A includes a transistor Q 11 corresponding to the transistor Q 1 and a resistor r 1 corresponding to the resistor r. Further, a diode D 11 is provided between the resistor R 101 and the circuit 22 A in correspondence to the diode D 1 . Similarly, there is provided a second resistor R 102 also in correspondence to the resistor R for converting a voltage appearing at a node A 2 of the circuit 13 B to a current, and a clamp circuit 22 B is provided in correspondence to the clamp circuit 12. The clamp circuit 22 B , on the other hand, includes a transistor Q 12 corresponding to the transistor Q 1 and a resistor r 2 also corresponding to the resistor r. Further, a diode D 12 is provided between the resistor R 102 and the circuit 22 B in correspondence to the diode D 1 . As the operation of the circuits 22 A and 22 B is obvious from the description of the previous embodiments, further description will be omitted. Further, there are provided constant current sources 15a and 15b in correspondence to the constant current source 15. The output voltages produced by the clamp circuits 22 A and 22 B are supplied to comparators 21 A and 21 B respectively, wherein the respective comparators 21 A and 21 B are supplied with the reference voltage V REF from the reference circuit 14 B and produce output signals S 1 and S 2 respectively. FIG.14 shows a seventh embodiment of the present invention for detecting the state of the solenoid in the actuation circuit 13 A and the actuation circuit 13 B . Thereby, the circuit of FIG.14 operates similarly to the circuit of FIG.13. In FIG.14, the parts that are identical with the circuit of FIG.13 are designated by the same reference numerals. In the circuit of FIG.14, it should be noted that the diodes D 11 , D 12 and D 2 are eliminated. Associated therewith, the current sources 15a and 15b are also eliminated. Instead, another current source 15c is provided in connection with the transistor Q 2 of the reference circuit 24 B for diverting a part of the current that is supplied to the transistor Q 2 to the ground. By setting the current I T suitably, one can set the reference voltage V REF and hence the threshold level of the operation of the comparators 21 A and 21 B . According to the circuit of FIG.14, one can simplify the circuit construction as compared with the circuit of FIG.13.

Claims: A detection circuit for detecting a state of an object circuit (13), comprising: voltage-current conversion means (R) supplied with a first voltage signal (V A ) indicative of the state of said object circuit, for producing an output current (I) having a magnitude indicative of said state in response to said first voltage signal; detection means (11) activated by a supply voltage (V CC ), said detection means being supplied with a second voltage signal (V C ) for detecting said state of said object circuit in response thereto; characterized in that it further comprises : clamping means (12) having an input terminal to which said output current of said voltage-current conversion means (R) is supplied, said clamping means clamping a voltage of said input terminal at a predetermined level, said clamping means producing said second voltage signal in response to said output current such that said second voltage has a magnitude proportional to said first voltage signal and such that said magnitude of said second voltage signal is smaller than said supply voltage (V CC ), said clamping means supplying said second voltage (V C) signal to said detection means (11), wherein said clamping means comprises a first bipolar transistor (Q 1 ) having said output current (I) passing through the emitter-collector junction thereof, a base supplied with a predetermined, fixed bias voltage and a collector connected to the ground via a second resistor (r), and a bias voltage source (V Bias ) for supplying said predetermined bias voltage to said base of said first bipolar transistor, said clamping means producing said second voltage signal as a voltage formed across said second resistor, said first bipolar transistor (Q 1 ) further producing a third voltage signal (V B ) as a voltage produced at said emitter, said detection circuit further comprising a second detection means (21) supplied with said third voltage signal for detecting said state of said object circuit based upon said third voltage signal. A detection circuit for detecting a state of an object circuit (13), voltage-current conversion means (R) supplied with a first voltage signal (V A ) indicative of the state of said object circuit for producing an output current (I) having a magnitude indicative of said state in response to said first voltage signal; detection means (11) activated by a supply voltage (V CC ), said detection means being supplied with a second voltage signal (V C ) for detecting said state of said object circuit in response thereto; characterized in that it further comprises : clamping means (12) having an input terminal to which said output current of said voltage-current conversion means is supplied, said clamping means clamping a voltage of said input terminal at a predetermined level, said clamping means producing said second voltage signal in response to said output current such that said second voltage has a magnitude proportional to said first voltage signal and such that said magnitude of said second voltage signal is smaller than said supply voltage, said clamping means supplying said second voltage signal to said detection means, wherein said clamping means comprises a first bipolar transistor (Q 1 ) having said output current (I) passing through the emitter-collector junction thereof, a base supplied with a predetermined, fixed bias voltage and a collector connected to the ground via a second resistor (r), and a bias voltage source (V Bias ) for supplying said predetermined bias voltage to said base of said first bipolar transistor, said clamping means producing said second voltage signal as a voltage formed across said second resistor; and wherein said detection means comprises a comparator circuit (11) supplied with said second voltage signal (V C ) and further with a reference voltage signal (V REF ) for producing an output voltage signal (S) as a result of comparison of said second voltage signal with said reference voltage, and a reference circuit (14 A ) for producing said reference voltage; said reference circuit comprises a second bipolar transistor (Q 2 ) having an emitter supplied with said supply voltage (V CC ) via a third resistor (R 1 ), a base supplied with said predetermined, fixed bias voltage (V Bias ) commonly with said first bipolar transistor (Q 1 ), and a collector connected to the ground via a fourth resistor (R 2 ). A detection circuit as claimed in claim 1 or 2, characterized in that said voltage-current conversion means comprises a resistor (R). A detection circuit as claimed in claim 2 or 3, characterized in that said reference circuit comprises a voltage source (14 A ) that produces a fixed voltage as said reference voltage. A detection circuit as claimed in any one of claims 2 to 4, characterized in that said clamping means (12) further comprises a constant current source (15) for producing a predetermined current (I T ), said constant current source supplying said predetermined current such that said predetermined current is added to a current that flows through said second resistor (r). A detection circuit as claimed in any one of claims 2 to 5, characterized in that said reference circuit comprises a constant current source (15 c ) that diverts a predetermined part of a current that is supplied to said emitter of said second bipolar transistor (Q 2 ) via said third resistor (R 1 ), to the ground. A detection circuit as claimed in claim 5, characterized in that said constant current source (15) supplies said predetermined current to said collector of said first bipolar transistor (Q 1 ). A detection circuit as claimed in claim 5, characterized in that said constant current source (15) supplies said predetermined current to said emitter of said first bipolar transistor (Q 1 ). A detection circuit as claimed in claim 8, characterized in that said clamping means (12) further comprises a diode (D 1 ) provided between said emitter of said first bipolar transistor (Q 1 ) and said voltage-current conversion means (R) such that a flow of current from said emitter of said first bipolar transistor to said object circuit (13) is blocked. A detection circuit as claimed in claim 9, characterized in that said reference circuit (14 B ) further comprises a second diode (D 2 ) between said emitter of said second bipolar transistor (Q 2 ) and said third resistor (R 1 ) such that a current flowing from said second bipolar transistor to said third resistor is blocked. A detection circuit as claimed in any one of claims 1 to 10, characterized in that said supply voltage (V CC ) that activates said detection means (12) has a level smaller than a level of a supply voltage (V DD ) that activates said object circuit (13). A detection circuit as claimed in any one of claims 2 to 11, characterized in that said clamping means further comprises a current mirror circuit (17) connected to said collector of said first bipolar transistor and further to said collector of said second bipolar transistor for causing to flow a same collector current through said first and second bipolar transistors; and a constant current source for supplying a predetermined current to said first bipolar transistor. A detection circuit as claimed in any one of claims 1 to 12, characterized in that said object circuit includes a plurality of circuit members (13A, 13B) each producing an output signal as said first voltage signal, each output signal (VA 1 , VA 2 ) of said circuit member indicating the state of said circuit member that is pertinent thereto; said voltage-current conversion means comprising a plurality of resistors (R 101 , R 102 ) provided in correspondence to said plurality of circuit members (13A, 13B), each resistor being supplied with said output signal of said circuit member as said first voltage signal for converting the same to a current to produce said output current; said clamping means comprising a plurality of clamping circuits (22A, 22B) provided in correspondence to said plurality of resistors, each clamping circuit including a bipolar transistor (Q 11 , Q 12 ) having an emitter to which said output current of said resistor that corresponds to said clamping circuit is supplied, a base biased at a predetermined base bias voltage (V Bias ) that is set in common for said plurality of clamping circuits, and a collector connected to the ground via a collector resistor (r 1 , r 2 ), each of said clamping circuits producing an output voltage across said collector resistor as said second voltage signal; said detection means comprising a plurality of comparator circuits (21A, 21B) provided in correspondence to said plurality of clamping circuits, said comparator circuit being supplied with said output voltage from said clamping means as said second voltage signal for performing a comparison operation comparing said output voltage of said clamping means with a reference voltage (V REF ), said reference voltage being set in common for said plurality of clamping circuits, said clamping means producing an output signal (S 1 , S 2 ) indicative of the result of said comparison operation.

Inventors: MIZUTA SATORU, SHIMIZU KATSUYA, MIZUTA, SATORU, SHIMIZU, KATSUYA
Applicants: FUJITSU LTD, FUJITSU VLSI LTD, FUJITSU LIMITED, FUJITSU VLSI LIMITED
Application year: 1992
Main classification: G05B23
IPC codes: G05B9, G01R19, B60T8, B62D5, G01R31