Apparatus for concealing error of moving pictures transform coding

Abstract: An apparatus for concealing an error of a moving pictures transform coding includes the first concealment circuit (19) for analyzing data according to a type of the data, the data being error-detected but not corrected by an error correction decoding by the decoder (12), for replacing the data with a specific data according to the analyzed result by using a predetermined method, and for outputting a specific signal therefrom, and the second concealment circuit (22) connected to the first concealment circuit (12) for replacing reproduced pixel values of an error-occurred block with reproduced pixel values of a previous frame according to the signal output from the first concealment circuit (12) in case that the data being error-detected but not corrected is data of a predetermined frequency component or data of an additional information.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for concealing an error of an orthogonal transform coding which is adapted to conceal an error of an image data read out when the coded image data is decoded. 2. Description of the Related Art In general, for efficiently recording a digital moving pictures on a magnetic tape or a disk or transmitting it on a line, the moving pictures data is efficiently coded for reducing the quantity of information to be recorded or transmitted. The inventors of the present application know a method, which has been proposed in the JP-A-4 345 369 (Japanese Patent Application No.3-118825) by some of the inventors of the present application, in order to efficiently code the moving pictures data. The above-mentioned method is arranged to divide one-screen data, that is, one-frame data into several blocks, each block consisting of 8-by-8 pixels, orthogonally transform each of those blocks, and quantize each transform coefficient in the light of the statistical quality of the block. After quantizing the transform coefficients, the quantized data and the additional information accompanied with it are error-correcting coded if any. The data which is error-correcting coded data is recorded on a recording medium. In order to read the data recorded by the foregoing method, there may be a value to be erroneously read out. For the error-corrected code, when it is read out, it is decoded in an error-correcting manner. Then the location of some erroneous data is detected. Further, some of error detected data is corrected. However, there may be left some pieces of data error-detected but non-corrected. That is, those pieces of data are found to be erroneous but the correct values about those pieces of data are not found out. If the moving pictures data is decoded with the erroneous data included therein, the reproduced image is made inferior in quality. Against the data whose error is found but not corrected, the error modification is performed so as to suppress the erroneous values by using the correlation in the frame. As a first known method for concealing an error on the reproduced image, the actual pixel values about an erroneous pixel is measured from the pixels around the erroneous pixel and the measured pixel values replace the erroneous pixel. For example, as shown in Fig. 1, the reference alphabets a to f denote pixel values, respectively. If a value of e is found to be erroneous after the error detection is done, as indicated in the following expression (1), a value of e is measured from the pixels around the erroneous value of e. The erroneous value of e is replaced with the measured value of e'. e' = (b + d)/2 As a second known method for concealing an error, as disclosed in the Japanese Patent Laying Open No. 61-147690, at first, the image is broken into several blocks. For each block, an additional code and a coded data are derived. The additional code consists of a minimum value of the pixel values of the block and a dynamic range about all the pixel values within the block. The coded data is formed by quantizing the difference between each pixel values and a minimum value of the pixel values of the block. If the additional code is found to be erroneous, the average value of the additional coded values around the erroneous coded data is derived as a measured value and the erroneous coded data is replaced with the measured value. In the case of using the transform coding method, an error takes place not in a specific pixel values but a transform coefficient. If the inverse transformation is performed with respect to the block data including the erroneous transform coefficient, the error gives an adverse effect on the overall block. Hence, all the pixel values included in the block are all made erroneous on the reproduced image. In the first known method for concealing an error, a real value is measured from the pixel values around the erroneous pixel. Therefore, if the pixel values around the erroneous pixel is properly reproduced, this first known method is effective. However, if the pixels around the erroneous pixel include one or more erroneous ones, this method is not properly effective. For example, consider that the pixels of a to f shown in Fig. 1 are all erroneous. If a value of e is measured from the pixels around the pixel of e by means of the expression (1) for concealing the value of e, the measuring accuracy is degraded because the values of b and d used for measuring the value of e are erroneous. That is, the first known concealing method is not effective if some or all the pixels on the block are erroneous. The foregoing second known concealing method is arranged to measure the additional information greatly influencing the overall block such as a minimum value of the pixel values of one block and a dynamic range about all the pixels of one block by using the correlation among the block and its adjacent blocks. If the correlation among the error-included block and its adjacent blocks is large, the second known concealing method is effective. However, if the correlation is small, the modified pixel values on the overall block may be far away from the real pixel values. As another disadvantage, if the erroneous pixel values(s) greatly influence(s) the overall block, a slight difference between the measured value(s) and the real value(s) brings about a visually large defect on the reproduced image. Further, since the average value is used as the measured value, the overall image become disadvantageously dull. JP-A-3 022 735 describes a transmission system for digital video data which divides the data into a first group of components which would cause the image quality to be damaged if discarded and a second group of components which would cause little damage if discarded. US-A-4,807,033 describes a method of correcting television signals transmitted in blocks by calculating substitute information for a block determined to be defective from an environment of the defective block. SUMMARY OF INVENTION It is desirable to provide an apparatus for concealing an error of a moving pictures transform coding which may properly consider the quality of a transform coefficient and the correlation on time. The present invention provides an apparatus as set out in claim 1. Preferably, the apparatus comprises a second concealment means adapted to replace the reproduced pixel values of the error-occured block with the reproduced pixel values of the previous frame in case that the data being error-detected but not corrected is data of an additional information. More preferably, the first concealment means is adapted to output a specific signal, and the second concealment means is adapted to replace the reproduced pixel values of the error-occurred block with the reproduced pixel values of the previous frame according to the signal output from the first concealment means. Preferably, in operation, the first concealment means serves to perform an error-correcting decode operation and analyze the error-detected but non-corrected data according to the type of data, feed a specific signal when the analyzed data corresponds tn the data of the first frequency component or the additional information, replace the data with zero when the data corresponds to the data of the second frequency component, replace the data with the data of the third frequency component in the horizontally adjacent block when the data corresponds to the data of the third frequency component, and replace the data with the data of the fourth frequency component in the vertically adjacent block when the data corresponds to the data of the fourth frequency component. Preferably, the second concealment means is connected to the first concealment means and serves to replace the reproduced pixel values of the error-occurred block with the reproduced pixel values of the previous frame when the error-detected but non-corrected data corresponds to the data of a predetermined frequency component or additional information, based on the signal fed from the first concealment means. Hence, if the input data is found to be erroneous, the most approximate concealing method is selected in the light of temporal and spatial at each frequency component of the data. This makes it possible to obtain an excellent reproduced image if an error is included in the input data. Further advantages of the present invention will be apparent from the following description of the preferred embodiments of the invention as illustrated in the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is an explanatory view showing the first known method of concealing an error; Fig. 2 is a block diagram showing an apparatus for concealing an error of a moving pictures transform coding according to an embodiment of the present invention; Fig. 3 is an explanatory view showing a correlation among DCT (Discrete Cosine Transformation) coefficients in the embodiment shown in Fig. 2; Fig. 4 is a flowchart showing an operation of an inverse quantizer shown in Fig. 2; Fig. 5 is a view showing a data format to be input to the inverse quantizer shown in Fig. 2; Fig. 6 is a flowchart showing operations of steps S2 and S7 shown in Fig. 4; Fig. 7 is a flowchart showing an operation of a step S13 shown in Fig. 4; Fig. 8 is a flowchart showing an operation of a first concealment circuit shown in Fig. 2; Fig. 9 is a flowchart showing an operation of a second concealment circuit shown in Fig. 2; Fig. 10 is a flowchart showing an operation of the second concealment circuit provided with a motion-detecting function; Fig. 11 is a block diagram showing an apparatus for concealing an error of a moving pictures transform coding according to a second embodiment of the invention; Fig. 12 is a flowchart showing an operation of the concealment apparatus shown in Fig. 11; Fig. 13 is a flowchart showing operations of steps S93 and S96 shown in Fig. 12; Fig. 14 is an explanatory view showing frequency components of 8-by-8 DCT coefficients used in the concealment apparatus shown in Fig. 11; Fig. 15 is an explanatory view showing DCT coefficients contain high correlation shown in Fig. 14; Fig. 16 is an explanatory view showing DCT coefficients contain low correlation shown in Fig. 14; Fig. 17 is an explanatory view showing an image having horizontally serial edges; Fig. 18 is an explanatory view showing a correlation among DCT coefficients used in the concealment apparatus shown in Fig. 11; Fig. 19 is an explanatory view showing an image having vertically serial edges; and Fig. 20 is an explanatory view showing a correlation among DCT coefficients used in the concealment apparatus shown in Fig. 11. DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the accompanying drawings, an embodiment of an apparatus for concealing an error of a moving pictures transform coding according to the present invention is described below. Fig. 2 is a block diagram showing the apparatus for concealing an error of a moving pictures transform coding (referred to as an error concealment apparatus, hereinafter) according to this embodiment. The error concealment apparatus shown in Fig. 2 is arranged to perform a discrete cosine transformation with respect to the input digital data about a moving pictures, quantize the resulting transform coefficient, code the quantized index and the information standing for the number of quantizing bits as error-correcting them, record the error-correcting coded data on a recording medium, read the recorded data, perform an error-correcting decoding operation about the read data, and apply the error correcting method to the error-detected piece of data when the data is decoded. The error concealment apparatus of Fig. 2 includes a coder 10, a recording medium 11, a decoder 12 connected to the coder 10 through the recording medium 11. The coder 10 is arranged to have a blocking circuit 13, a discrete cosine transforming (DCT) circuit 14, a quantizer 15, recording medium 11 and operates to receive the data read from the recording medium 11 and perform an error-correcting decoding operation with respect to the data word by word. The inverse-quantizer 18 is connected to the error-correcting decoder 17 and operates to separate the input data into the additional information and the quantized index, output the inverse-quantized value (DCT coefficient) obtained from the additional information and the quantized index to an output line c, set an error flag d on if an error is detected on the additional information, and set an error flag e on if an erroneous DCT coefficient is output. The first concealment circuit 19 is connected to the inverse-quantizer 18 and operates to set an error flag g on if the erroneous DCT coefficient is input thereto and belongs to the area A having the data of the first frequency component, replace the erroneous component with zero if the erroneous coefficient belongs to the area B having the data of the second frequency component, replace the erroneous component with a coefficient of the same frequency component of the horizontally adjacent block if the erroneous coefficient belongs to the area C having the data of the third frequency component, replace the erroneous coefficient with a coefficient of the same frequency coefficient of the vertically adjacent block if the erroneous coefficient belongs to the area D having the data of the fourth frequency component, and if the additional information is erroneous, perform the similar processing done if the and an error-correcting coder 16. The blocking circuit 13 operates to rearrange the input digital moving pictures data into the blocks, each consisting of 8-by-8 pixels. The DCT circuit 14 is connected to the blocking circuit 13 and operates to perform the discrete cosine transformation with respect to the rearranged moving pictures data and supply transformed 8-by-8 coefficients according to the regular rules. The quantizer 15 is connected to the DCT circuit 14 and operates to applicably quantize the transform coefficients as referring to the additional information and supply the quantized indexes. The error-correcting coder 16 is connected to the quantizer 15 and operates to receive the quantized indexes and perform an error-correcting coding operation with respect to the quantized indexes. The error-correcting coded data is sent from the coder 10 to the recording medium 11 for recording the data thereon. As shown in Fig. 2, the decoder 12 is connected to the recording medium 11. The decoder 12 is arranged to have an error-correcting decoder 17, an inverse-quantizer 18, a first concealment circuit 19, an inverse DCT circuit 20, a delay circuit 21, a second concealment circuit 22, and a block decomposing circuit 23. The error-correcting decoder 17 is connected to the coefficient of the area A is erroneous because the erroneous additional information means all the coefficients are made erroneous so that the excellent reproduced image can't be obtained by the error correcting method. The inverse DCT circuit 20 is connected to the first concealment circuit 19 and operates to perform the inverse DCT operation of each data block according to the input values f output from the first concealment circuit 19 and supplies reproduced pixel values h of each block. The delay circuit 21 is connected to the first concealment circuit 19 and operates to delay the input signal by a time lag of the output data f processed in the inverse DCT circuit 20. The second concealment circuit 22 is connected to both the inverse DCT circuit 20 and the delay circuit 21 and operates to write reproduced pixel values on a line h into a memory if the error flag g' is set off and outputs the input values as the reproduced pixel values to the block decomposing circuit 23 or outputs the reproduced pixel values at the same location on the previous frame (screen) without using the reproduced pixel values on the line h to the block decomposing circuit 23 if the error flag is set on. The block decomposing circuit 23 is connected to the second concealment circuit 22 and operates to output the input values from the second concealment circuit 22 in the same format as the digital moving pictures data input into the blocking circuit 13 of the coder 10. The areas A to D used in the description about the first concealment circuit 19 are illustrated in Fig. 3. In addition, the first concealment circuit 19 stores the coefficients corresponding to the frequency components of the areas C and D, because they need to replace the erroneous coefficients corresponding to the area C or D with the coefficient values of the previous adjacent block. The inverse DCT circuit 20 is connected to the first concealment circuit 19 and operates to perform an inverse DCT about each block according to the type of the input values f and output the reproduced pixel values h for each block. The delay circuit 21 is connected to the first concealment circuit 19 and operates to delay the input signal by a delayed length of time of the output data is processed in the inverse DCT circuit 20. The second concealment circuit 22 receives an error flag g' and reproduced pixel values h of each block from the inverse DCT circuit 20 and provides a memory for recording reproduced pixel values for one frame. The error flag g' is a signal formed by delaying the error flag g output from the first concealment circuit 19 in the delay circuit 21. If the error flag g' is off, the second concealment circuit 22 writes the reproduced pixel values input on a line h into a memory and outputs the input values to the block decomposing circuit 23 without processing the value. If the error flag is on, without using the reproduced pixel values from the input h, the reproduced pixel values at the same location on the previous frame is output from the memory to the block decomposing circuit 23. The block decomposing circuit 23 is connected to the second concealment circuit 22 so that the circuit 23 may output the input values from the second concealment circuit 22 in the same format as the digital moving pictures data input to the blocking circuit 13. Fig. 4 is a flowchart for describing the routine for inverse-quantizing one-block data in the inverse quantizer 18. The 8-bit data is input on an input line a of the inverse quantizer 18. The input line b is set on only when the data is input from the input line a. On the output line c, the additional information and the quantized index separated from the input data are transmitted. Fig. 5 shows the data input to the inverse quantizer 18. The shown data is divided into several bits. In Fig. 5, k denotes the number of bits composing classifying information, p denotes the number of bits composing bit pattern information, and b(m) denotes the number of quantized bits about an m-th coefficient. The value of the quantized bits b(m) about the m-th coefficient is defined by the classifying information and the bit pattern information. The flow of the data shown in Fig. 4 is configured to denote the 8-bit data input on the input line a as D(0) to D(7) ranged in sequence from the most significant bit (MSB), separate the input values into the additional information and the quantized index of each coefficient, and output the additional information and the inverse-quantized value of the coefficient on the output line c. Like the flow shown in Fig. 5, in Fig. 4, k denotes the number of bits composing the classifying information. p denotes the locational number of bits composing the bit pattern information. b(m) denotes the locational number of quantized bits of an m-th coefficient. m denotes the location of a bit among 64 quantized values. At first, the output error flags d and e are set off and m and j are given to m=0 and j=0 (step S1). The 8-bit data is input from the input line a so as to set the output error flag d (step S2). The detailed operation of the step S2 will be illustrated in Fig. 6. Next, the input data obtained at the step S2 is separated into the classifying information and the bit pattern information, which are input to K and P, respectively. K and P are represented by the following expressions. K=2^(k-1) *K (0) +2^(k-2) *K (1) +..... +2^0*K (k-1) P=2^(p-1) *P (0) +2^(p-2) *P(1) +..... +2^0*P (p-1) where 2^ denotes a power law of 2 and * denotes a normal multiplication. If more bits than 8 are necessary (steps S3 and S8), at the steps S2 and S7 (to be described later), the information is obtained every 8 bits from the input line a so as to set the error flag d on or off. In succession, the input data is stored in K one bit by one bit (step S4). If j<k becomes negative, the input of k-bit classifying information is terminated (step S5). K is output to c (step S6). The operation at the step S7 is similar to that at the step S2. The input bit is stored in P one bit by one bit (step S9). If j<p becomes negative, the input of p-bit pattern information is terminated (step S10) and P is output to c (step S11). At this time, the additional information is obtained. It indicates the number of bits used for quantizing coefficients. Next, 64 quantized indexes are sequentially read and stored in Q. At steps S12 to S18, one coefficient is processed. If b(m)=0 becomes affirmative, that is, if the coefficient is quantized by 0 bit (step S15) or j<b(m) becomes negative, the input of the m-th quantized value is terminated (step S17). Then, Q is inverse-quantized and is output onto the output line c, then incrementing m and clearing Q (step S18). When m<64 becomes negative, the output of 64 inverse-quantized values for one block is terminated (step S19). The data input is sequentially carried out from the step S13. The detailed operation of the step S13 will be shown in the flowchart of Fig. 7. The operations of the steps S2 and S7 shown in Fig. 4 are illustrated in the flowchart of Fig. 6. The 8-bit data is input from the input line a. The error flag b is set on only when the data input from the input line a includes one or more error bits. The 8-bit data decoded in an error-correcting manner is input from the input line a so that the 8-bit data may be denoted by D(0) to D(7) ranged in sequence from the MSB (step S21). If the input data contains an error bit, the input error flag b is set on (step S22). If so, the output error flag d is set on (step S23). If not, the output error flag d is set off (step S24). And, i becomes zero (0) (step S25) where i denotes the bit number of D. The operation of the step S13 shown in Fig. 4 will be illustrated in the flowchart of Fig. 7. Like the flow of Fig. 6, the data is input from the input line a every 8 bits. The error flag b is set on only when the data input from the input line a contains one or more error bits. The 8-bit data decoded in an error-correcting manner is input from the input line a and is denotes as D(0) to D(7) ranged in sequence from the MSB (step S31). If the input data contains one or more error bits, the input error flag b is set on (step S32). If so, the output error flag e is set on (step S33). If not, the output error flag e is set off (step S34), and i becomes zero (0) where i denotes a bit number of D. Fig. 8 is a flowchart showing an operation of the first concealment circuit 19 for concealing the DCT coefficient value for one block. At first, the output error flag g is set off so that the classifying information may be input from the output line c (step S41). Next, the state of the input error flag d is determined. If the error flag d is set on, it indicates that the input classifying information contains an error (step S42). Hence, the error flag g is set on (step S43). In succession, the bit pattern information is input from the output line c (step S44), and the state of the error flag d is determined (step S45). If the error flag d is set on, it indicates that the input bit pattern information contains an error. Hence, the error flag g is set on (step s46). At the steps S41 to S46, if the additional information contains an error, the error flag g is kept on. Next, m is made zero (0) where m denotes a number of the DCT coefficient to be treated (step S47). Until m reaches 64, the operation from the steps S48 to S60 is repeated. At first, an m-th DCT coefficient is input from the output line c (step S48) and the state of the input error flag e is determined (step S49). If the error flag e is set off, it indicates that the input coefficient is correct. If the error flag e is set off and the coefficient belongs to the C or D area, the input coefficient is stored in memory so that the coefficient may be replaced if an error takes place in future. If the coefficient belongs to the A or B area, it is not stored in memory because it is not replaced. At the step S49, if the error flag e is set on, it indicates that the input coefficient is not correct. It is determined which area the input coefficient belongs to. If the coefficient belongs to the area A, the error flag g is set on (step S53). If the coefficient belongs to the area B, the coefficient is made zero (step S55). If the coefficient belongs to the area C, the coefficient is replaced with the coefficient of the same frequency component of the horizontally adjacent block (step S57). If the coefficient belongs to the area D, the coefficient is replaced with the coefficient of the same frequency component of the vertically adjacent block (step S58). Next, the concealment coefficient is output onto the output line f and m is incremented (step S59). When m reaches 64, that is, all the coefficients in one block are modified, the operation exits out of the loop (step S60). Fig. 9 is a flowchart showing an operation of the second concealment circuit 22 for concealing reproduced pixel values of one block. Each reproduced pixel value in one block is input from the output line h. g' denotes whether or not the pixel of the block is replaced with the reproduced pixel of the previous frame. At first, n is made zero (0) where n denotes a number of a pixel to be treated (step S61). Next, the state of the flag g' is checked (step S62). If the flag g' is set off, that is, the coefficient contained in the A area or the additional information has no error, the input reproduced pixel values are output without being processed. Hence, the operations of steps S63 to 65 (to be described later) are repeated. The n-th data is input from the input line h (step S63). The input data is stored in memory and output to the block decomposing circuit 23. Then, n is incremented (step S64). When n reaches 64, that is, all the data of one block is processed, the operation exits out of the loop (step S65). At the step S62, if the flag g' is set on, that is, the coefficient contained in the A area or the additional information has an error, the operations of steps S66 to S68 (to be described later) are repeated for reading the reproduced pixel values at the same location of the previous frame stored in memory. At first, the n-th data of the previous frame is read from the memory (step S66). Then, the read data is output to the block decomposing circuit 23 and n is incremented (step S67). When n reaches 64, that is, all the data for one block is processed, the operation exits out of the loop (step S68). Fig. 10 is a flowchart showing an operation of another embodiment of the second concealment circuit 22 for providing an excellent reproduced image by detecting the motion of an image when concealing all the reproduced pixel values included in one block. Like the flow of Fig. 9, each reproduced pixel value included in the block is input from the output line h. g' denotes a flag indicating whether or not the pixel value of the block is to be replaced with the reproduced pixel value of the previous frame. The steps S71 to S75 of Fig. 10 are identical to the steps S61 to S65 of Fig. 9. If the flag g' is set on, that is, the coefficient belonging to the area A or the additional information has an error (step S72), the motion is detected from the previous reproduced block and the motion vector is assumed as (i, j) (step S79). Next, to read the reproduced pixel values of the previous frame stored in memory, the steps S76 to S78 are repeated. At first, there is the data read from the memory at the location shifted from the n-th data of the previous frame by the motion vector (i, j) (step S76). Then, the read data is output to the block decomposing circuit 23 and n is incremented (step S77). At the step 76, if the n-th data is stored at an address (k, l) of the memory, the data of the address (k+i, l+j) is read out of the memory. When n reaches 64, that is, all the data of one block is processed, the operation exits out of the loop (steps S78). Fig. 11 is a block diagram showing an apparatus for concealing an error of a moving pictures transform coding according to another embodiment of the present invention. The difference between the apparatus shown in Fig. 11 and the apparatus shown in Fig. 2 resides in a method for concealing an error. The apparatus shown in Fig. 2 is arranged to select one of the two cases according to the error-occurring coefficient, one case for concealing an error-occurring DCT coefficient by using the first concealment circuit 19 and the other case for concealing each pixel value of the error-occurring block with the corresponding pixel value of the previous frame by using the second concealment circuit 22. The apparatus shown in Fig. 11 is arranged to conceal all the error-occurring DCT coefficients. In Fig. 11, the blocking circuit 31 to the inverse quantizer 37 ranged along the data flow are equivalent to the blocking circuit 13 to the inverse quantizer 18 shown in Fig. 2 ranged along the data flow. An inverse DCT circuit 39 shown in Fig. 11 is the same as the inverse DCT circuit 20 shown in Fig. 2 and the block decomposing circuit 40 shown in Fig. 11 is the same as the block decomposing circuit 23 shown in Fig. 2. In Fig. 11, the blocking circuit 31 to the error correcting coder 34 compose a coder 41 and the error correcting decoder 36 to the block decomposing circuit 40 compose a decoder 42. Later, the difference of this arrangement from that shown in Fig. 2, that is, the operation of the concealment circuit 38 will be discussed in detail. Like the first concealment circuit 19 shown in Fig. 2, the input sixty-four (64) coefficients are divided into the areas A to D as shown in Fig. 3 to which each proper concealing method applies. The data to be input is the same as that of the first concealment circuit 19 shown in Fig. 2. That is, from a line c', the additional information and the DCT coefficient value are input. d' denotes an error flag to be set on if the additional information input from the line c' has an error. e' denotes an error flag to be set on if the DCT coefficient input from the line c' has an error. In addition, the concealment circuit 38 stores the DCT coefficients in the areas A, C and D in its memory in order to use them for modification. At first, if an error takes place in the coefficient belonging to the area A, that is, the data of the fifth frequency component, the error-occurring coefficient is replaced with the coefficient of the same frequency component in the block resting at the same location of the previous frame. If an error takes place in the coefficient of the sixth frequency component belonging to the area B, the coefficient of the seventh frequency component belonging to the area C and the coefficient of the eighth frequency component belonging to the area D, the concealment circuit 38 operates in the similar manner to the first concealment circuit 19 shown in Fig. 2. That is, if an error takes place in the coefficient belonging to the area B, the error-occurring coefficient is made zero. If an error takes place in the coefficient belonging to the area C, the error-occurring coefficient is replaced with the coefficient of the same frequency component of the horizontally adjacent block. If an error takes place in the coefficient belonging to the area D, the error-occurring coefficient is replaced with the coefficient of the same frequency component in the vertically adjacent block. If an error takes place in the additional information, it is regarded that all the pixels are made erroneous. Hence, the foregoing processing is carried out with respect to all the coefficients. Fig. 12 is a flowchart showing an operation of processing one-block data by using the concealment circuit 38. From the line c' the additional information and 64 DCT coefficients are input. d' is an error flag indicating whether or not the additional information to be input is erroneous. e' denotes an error flag indicating whether or not the DCT coefficient is erroneous. The concealed DCT coefficient is output from the line f'. At first, the classifying information is input from the line c' (step S81). Then, the state of the input error flag d' is determined (step S82). If d' is set on, that is, the input classifying information is erroneous, the operation is branched to a step 83 in which the bit pattern information is input from the line c'. If d' is set off, the bit pattern information is input from the line c' (step S84) and the state of d' is determined (step S85). If d' is set on, it indicates that the input bit pattern information is erroneous. Hence, the operation is branched into a step S94. If the additional information is not erroneous, the operations at the steps S86 to S92 are executed. If it is erroneous, the operations at the steps S94 to S98 are executed. If the additional information is not erroneous, m is made zero (0), where m denotes a locational number of the DCT coefficient (step S86). Until m reaches 64, the operations at the steps S87 to S92 are repeated with respect to each coefficient. At first, the m-th DCT coefficient is input from the line c' (step S87). Then, the state of the input error flag e' is determined (step S88). If e' is set on, it indicates that the input coefficient is erroneous. Hence, the erroneous coefficient is concealed (step S93). Fig. 13 is a flowchart showing the detailed operation of the step S93. If the input error flag e' is set off, that is, the input DCT coefficient is not erroneous, it is determined which area the coefficient is located (step S89). If it belongs to the areas A, C or D, the coefficient is stored in memory (step S90). If not, the operation jumps to a step S91 at which the input concealed coefficient is output to the line f' (step S91). And, until m<64 becomes negative, the operations at the steps S87 to S91 are repeated (S92). If the determined result at the step S92 becomes negative, the operation exits out of the loop. If the additional information is erroneous, m is made zero (0), where m denotes a locational number of the DCT coefficient to be processed (step S94). Until m reaches 64, the operations at the steps S95 to S98 are repeated with respect to each coefficient. At first, the m-th DCT coefficient is input from the line c' (step S95). Then, the coefficient is concealed(step S96). The operation goes to the steps S94 to S98 only if the additional information is found to have an error. If so, all the DCT coefficients are erroneous. Hence, all the DCT coefficients input at the step S95 are concealed at the step S96. The operation of the step S96 is the same as that of the step S93. Then, the concealed coefficient is output to the line f' (step S97). Then, until m<64 becomes negative, the operations of the steps S95 to S97 are repeated (step S98). If the determined result at the step S98 becomes negative, the operation exits out of the loop. The flowchart of Fig. 13 illustrates the detailed operation of the steps S93 and S96 of Fig. 12. In this operation, an error-occurring DCT coefficient is entered and the coefficient is applicably processed according to the area to which the coefficient belongs. At first, it is determined whether or not the input coefficient belongs to the area A (step S101). If yes, the erroneous coefficient is replaced with the DCT coefficient at the same location of the previous frame (step S102). If no, it is determined whether or not the input coefficient belongs to the area B (step S103). If yes, the erroneous coefficient is made zero (0) (step S104). If no, it is determined whether or not the input coefficient belongs to the area C (step S105). If yes, the erroneous coefficient is replaced with the coefficient of the same frequency component at the horizontally adjacent block (step S106). If no, it means that the input coefficient belongs to the area D. Hence, it is replaced with the coefficient of the same frequency component at the vertically adjacent block (step S107). As described above, the error concealment apparatus according to the present invention is arranged to divide one frame or one field into some blocks, perform a transformation about each block for efficiently coding the block into a code train. The transformation is not limited to the discrete cosine transformation done in this embodiment, but may be any transformation such as a KL transformation or a wavelet transformation. The quantizing method used in the above embodiment is merely an example. In actual, any quantization may be employed. According to this invention, if an error takes place in the fetched data, the concealing method is selected according to the type of the transform coefficient. Hereafter, as an example, the description will be directed to a way of how the DCT (discrete cosine transformation) is performed for coding a block consisting of 8 by 8 pixels. When the DCT is performed with respect to the 8-by-8 pixel block, as shown in Fig. 14, the resulting transform coefficients are 64, each of which stands for a spatial frequency component of each pixel included in the block. As shown in Fig. 14, assuming that an u-axis extends horizontally and a v-axis extends vertically, the values of u=0 and v=0 stand for a d.c. component. A value of u=1 stands for the horizontally lowest frequency component and as a value of u goes higher, it stands for a horizontally higher frequency component. When a value of u reaches 7, that is, u=7, it stands for the highest frequency component. A value of v=1 stands for the vertically lowest frequency component and as a value of v goes higher, it stands for a vertically higher frequency component. When a value of v reaches 7, that is, v=7, it stands for the vertically highest frequency component. At first, assume that the d.c. component or the low frequency component is made erroneous. In Fig. 15, a part indicated by oblique lines indicate the locations of the d.c. components and the low frequency components on the 8-by-8 matrix. The d.c. components and the low frequency components have relatively large values from a statistical point of view. A frequency component on one block has a large correlation with the same frequency component on the adjacent block. Normally, when the prediction is performed by using the correlation, a disadvantage may take place as discussed in "Technical Bulletin of Television Engineers of Japan", Vol. 12, No. 10, pp. 19-24, Feb. 1988. This disadvantage is overcome by this invention. When treating the moving pictures data, the temporal correlation is made very large. In a case that a reproduced image at the same location of the previous frame is used as a predicative value, the excellent reproduced image for only one block can be obtained. That is, if an error takes place in the d.c. component or the low frequency component, after decoding the image, the reproduced image is replaced with that at the same location of the previous frame for overcoming the foregoing disadvantage. As another means, it is possible to sense the motion of an image in the light of the adjacent blocks and replace the reproduced image with that of the previous frame shifted by the sensed motion vector. In place of replacing the overall one block, before performing the inverse DCT, only the error-occurring coefficient is replaced with the DCT coefficient of the block at the same location of the previous frame for obtaining an excellent reproduced image. Next, consider that an error takes place in the high frequency component. The part indicated by the oblique lines shown in Fig. 16 indicates the locations of the high frequency components on the 8-by-8 matrix. The high frequency components have so low a correlation in the light of space and time that the prediction is disallowed. However, from a statistical point of view, the value is so small as compared to the low frequency component. If an error takes place, only the fine change of an image takes place, so that the error may not have a visually substantial influence on the image. For example, when a high frequency component has a value of 0, no fine change of the image takes place. Hence, the image looks like being slightly blurred. In actual, however, no substantial change of the image takes place. If an error takes place in the high frequency component, therefore, the coefficient is replaced with 0. Further, the image data often has continuous edges. For example, as shown in Fig. 17, in the case of performing an orthogonal transformation with respect to the image data having horizontally continuous edges, like the blocks 1 and 2 shown in Fig. 17, the vertical frequency components among the transform coefficients of the horizontally adjacent blocks such as the blocks 1 and 2 shown in Fig. 17 have a large correlation between them. A part indicated by the oblique lines of Fig. 18 shows the location of a coefficient having a large correlation with the transform coefficient of the horizontally adjacent block on the 8-by-8 matrix. In the image data having vertically continuous edges as shown in Fig. 19, the horizontal frequency components among the transform coefficients of the vertically adjacent blocks such as blocks 3 and 4 shown in Fig. 19 have a large correlation among them. A part indicated by oblique lines of Fig. 20 shows the locations of the coefficients having a large correlation with the transform coefficients of the vertically adjacent blocks on the 8-by-8 matrix. To process such coefficients as having a large correlation between the adjacent blocks, it is effective to replace an erroneous coefficient with the coefficient at the same location of the adjacent block. As such, assuming that an area A denotes an area for d.c. components and low-frequency components, an area B denotes an area for only high-frequency components, and an area C denotes an area for such coefficients as having a large correlation with the corresponding ones in the horizontally adjacent block, and an area D denotes an area for such coefficients as having a large correlation with the corresponding ones in the vertically adjacent block, if an error takes place in the coefficient belonging to the area A, after the inverse DCT is performed, the reproduced pixel values in the error-occurring block is replaced with the corresponding pixel values at the same block or the pixel values shifted by the motion vector obtained by detecting the motion of a picture on the reproduced screen without modifying the erroneous pixel by correcting the frequency component. In place, the erroneous coefficient may be replaced with the DCT coefficient at the same location of the previous frame. If an error takes place in the coefficient belonging to the area B, the erroneous coefficient is made zero. If an error takes place in the coefficient belonging to the area C, the erroneous coefficient value is replaced with the coefficient of the same frequency component at the horizontally adjacent block. If an error takes place in the coefficient belonging to the area D, the erroneous coefficient is replaced with the coefficient of the same frequency at the vertically adjacent block. Those areas on the 8-by-8 matrix are illustrated in Fig. 3, for example. As such, by selecting the concealing method according to the frequency component of an erroneous coefficient, it is possible to obtain a more excellent reproduced image than the known concealment system. Those grouped areas are merely examples. The most approximate area grouping depends on the type of input data and whether or not the data is sub-sampled and the data is stored in an interlaced manner. If an error is detected in the fetched data, the concealing method is selective according to the erroneous portion of data. If an error takes place in such data as visually impairing the reproduced image, the reproduced pixels of the error-occurring block are replaced with the reproduced pixels of the previous frame. In place, the erroneous coefficient is replaced with the coefficient at the same location of the previous frame. If an error takes place in such data as not so impairing the reproduced image, the erroneous coefficient is made zero (0). If an error takes place in such coefficients as giving a relatively large influence on the reproduced image and having a strong correlation with the peripheral blocks, the erroneous coefficient is replaced with the corresponding coefficient of the adjacent block. Hence, the concealment system according to this invention is capable of processing the error occurring in any type of data so that an excellent image can be reproduced with a small error and no blur. Many widely different embodiments of the present invention may be constructed. It should be understood that the present invention is not limited to the specific embodiments described in the specification, except as defined in the appended claims.

Claims: An apparatus for concealing an error arising in data created by transform coding of a moving picture, said apparatus comprising coding means (10, 41) for error-correcting coding of image data, and decoding means (12, 42) for decoding an error-correcting code created by said coding means (10, 41), wherein said coding means transforms the image data into a plurality of coefficients, associated with corresponding frequency components, and said decoding means (12, 42) includes first concealment means (19, 38) for concealing errors detected in the coefficients characterised in that the first concealment means conceals an error in a coefficient according to the corresponding frequency component, and replaces the coefficient with: (a) zero, when the corresponding frequency component falls within a first set of predetermined frequency components; (b) the coefficient of the same frequency component from a horizontally adjacent block when the corresponding frequency component falls within a second set of predetermined frequency components; and (c) the coefficient of the same frequency component from a vertically adjacent block when the corresponding frequency component falls within a third set of predetermined frequency components. An apparatus as claimed in claim 1, wherein the decoding means (12) further comprises a second concealment means (22), connected to the first concealment means, for replacing reproduced pixel values of a block in which an error has occurred with reproduced pixel values of a previous frame when an error is detected in a coefficient corresponding to a frequency component within a fourth set of predetermined frequency components, or in additional information. An apparatus as claimed in claim 2, wherein the first concealment means (19) outputs a signal indicating that the error is in a coefficient corresponding to a frequency component within a fourth set of predetermined frequency components, or in additional information, and the second concealment means replaces the reproduced pixel values of the block in which an error has occurred with said reproduced pixel values of said previous frame according to the signal output from the first concealment means (19). An apparatus as claimed in claim 1, wherein the first concealment means (38) replaces an error in a coefficient with the coefficient of the same frequency component from a block at the same location in a previous frame when the corresponding frequency component falls within the fourth set of frequency components. An apparatus as claimed in any one of claims 2 to 4, wherein the fourth set of frequency components comprises direct current components or low frequency components, said first set of frequency components comprises higher frequency components in comparison with said fourth set of frequency components, the coefficients of said second set of frequency components comprises coefficients having a correlation with corresponding coefficients in a horizontally adjacent block and the coefficients of said third set of frequency components comprises coefficients having a correlation with corresponding data in a vertically adjacent block.

Inventors: HYODO MASAAKI, KATATA HIROYUKI, NOGUCHI YOJI, HYODO, MASAAKI, KATATA, HIROYUKI, NOGUCHI, YOJI
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1992
Main classification: H04N7
IPC codes: H04N5, H04N7, H03M13