Method for driving active matrix type liquid crystal display device

Abstract: In a method for driving an active matrix type liquid crystal display device having a liquid crystal panel having the structure that a set of liquid crystal layers and two-terminal active layers are connected in series between a set of column electrodes and a set of row electrodes, a display operation being carried out by applying a difference signal between each column electrode and each row electrode, the difference signal is set so as to have a voltage having an inverse characteristic to the I-V characteristic of the two-terminal active element and is applied between the column and row electrodes to thereby depress occurrence of flicker. In addition, within a period except for a selection period for which an actual display operation is carried out in the liquid crystal panel, the difference signal having amplitude voltage equal to or above the maximum amplitude voltage set for the display operation is applied between the column and row electrode sets for a predetermined period to thereby prevent degradation of display quality due to the shift characteristic of the two-terminal active element which has been driven, and due to the asymmetry of the voltage-current characteristic of the two-terminal active element between the positive and negative polarity regions thereof.

Description: Background of the Invention (Filed of the Invention) This invention relates to an active matrix type of liquid crystal display device for performing a display operation using a two-terminal type active element such as an MIM (Metal-Insulator-Metal) element, an MIS (Metal-Insulator-Semiconductor) element, a ring diode, a varistor or the like, and particularly to a driving method for a liquid crystal display device to compensate for degradation of display quality due to a characteristic of the two-terminal type of active element. (Related Background Art) In comparison with a conventional passive type liquid crystal display device, an active matrix type liquid crystal device performs a high contrast display operation, and thus it is widely used in various display fields such as a liquid crystal television, a display terminal of a computer, etc. As this active matrix type of liquid crystal device has been known a display device in which a two-terminal type active element such as an MIM element, an MIS element, a ring diode, a varistor or the like is installed to perform a switch-driving operation of each picture element, and another type display device in which a three-terminal active element such as a thin film transistor (TFT) is installed to perform the switch-driving operation of each picture element. In comparison with the latter, that is, the display device having the three-terminal type active element, the former, that is, the display device having the two-terminal type active element is more excellent in productivity because of a smaller number of manufacturing steps than the latter, and thus it has been expected to be more remarkably developed in the future. The conventional types of liquid crystal display devices as described above are disclosed in USP 4,560,982, in SID International Symposium Digest of Technical Papers 91, P 226 by NEC Corp., Kawasaki, Japan, in SID International Symposium Digest of Technical Papers 87, P 304 by Seiko Epson Corporation, Nagano, Japan, and in SID International Symposium Digest of Technical Papers 84, P 54 by Suwa Seikosha Co., Ltd., Nagano, Japan. Such conventional liquid crystal display devices are not equipped with a driving method according to this invention which will be described together with embodiments as described later. Through an earnest study, the inventor has found the cause of degradation of display quality by a conventional driving method of the liquid crystal display device, and has proposed a countermeasure thereto. The degradation of display quality which is caused by the conventional driving method will be first described in detail using an active matrix type liquid crystal display device of an embodiment (Fig. 1) of this invention as described later. As shown in Fig. 1, the active matrix type liquid crystal display device comprises a liquid crystal panel 100, an X-drive circuit 200 and a Y-drive circuit 300. The picture elements of the liquid crystal panel 100 are line-sequentially scanned by the X-drive circuit 200 and the Y-drive circuit 300 to perform a display operation. The liquid crystal panel 100 includes a set of plural column electrodes X 1 to X M (in figure, an m-th column electrode X m is representatively represented) which are connected to the X-drive circuit 200, another set of plural row electrodes Y 1 to Y N (in figure, n-th row electrode Y n is representatively represented) which are connected to the Y-drive circuit 300, the set of column electrodes (column electrode set) and the set of row electrodes (row electrode set) being provided on respective facing substrates so as to intersect each other, liquid crystal filled in a space between the set of the column electrodes X 1 to X M and the set of the row electrodes Y 1 to Y N , and two-terminal active elements each provided to each intersecting portion (picture element portion) between the column electrode and the row electrode). That is, describing representatively using the column electrode X m and the row electrode Y n , a liquid crystal layer 102 serving as a picture element and a two-terminal type active element 103 are connected in series between the column electrode X m and the row electrode Y n , and the liquid crystal layer 102 and the two-terminal type active element 103 are supplied with a voltage V L and a voltage V D through a difference voltage between a column electrode signal VX m supplied to the column electrode X m and a row electrode signal HY n supplied to the row electrode Y n . The X-drive circuit 200 is equipped with an a.c. video generating circuit 201 and an X shift register 202. The a.c. video generating circuit 201 receives a video signal P from an external device, and outputs an a.c. video signal Ps which is synchronized with an a.c. inversion signal FR. The X shift register serves to shift a shift start signal DX in synchronism with a shift clock signal X SCL having predetermined frequency f X to thereby successively generate sampling signals S 1 to S M from respective output contact points corresponding to the column electrodes X 1 to X M . In addition, a set of latch circuits and a set of column electrodes driving circuits are provided between the output contact points of the X shift register 202 and the column electrodes X 1 to X M . Detailing representatively a latch circuit and a column electrode driving circuit which are assigned to the m-th column electrode X m , a transmission line 203 through which the a.c. video signal Ps is transmitted is connected to the input contact point of a first analog switch 204 whose conducting and non-conducting states are switched in synchronism with the sampling signal S m , the output contact point of the first analog switch 204 is connected to a first sample-and-hold capacitor 207 and the input contact point of a buffer amplifier 208, and the output contact point of the buffer amplifier 208 is connected to the column electrode X m . The first analog switch 204 is switched to a conducting state in synchronism with the switching of the sampling signal S m to a logical value "H", and the a.c. video signal Ps at that time is held in the sample-and-hold capacitor 205. Thereafter, when the second analog switch 206 is switched to a conducting state in response to the switching of the latch pulse signal LP to a logical value "H", charges which have been accumulatively held in the first sample-and-hold capacitor 205 are transferred to and held in the second sample-and-hold capacitor 207, and the column electrode X m is supplied with a voltage corresponding to the charges held in the second sample-and-hold capacitor 207 through the buffer amplifier 208. The Y-drive circuit 300 is equipped with a liquid crystal power generating circuit 301 and a Y shift register 302. The liquid crystal power generating circuit 301 receives four kinds of voltages V p , -V p , V a and -V a which satisfy the following inequality: |V p | > |V a |, where |V a | represents an absolute value of V a , and carries out a multiplexing operation in synchronism with the a.c. inversion signal FR to output two kinds of liquid crystal voltages V S and V N to the transmission lines 303 and 305, respectively. That is, when the a.c. inversion signal FR has a logical value "H", the liquid crystal voltage V S is equal to the voltage V p , while when the a.c. inversion signal FR has a logical value "L", the liquid crystal voltage V S is equal to the voltage -V P and the liquid crystal voltage V N becomes the voltage V a or -V a as described later. The a.c. inversion signal FR is a rectangular signal whose logical value is inverted every horizontal scanning period, and in other words it is a signal whose period corresponds to two horizontal scanning periods. The Y shift register 302 serves to shift a shift start signal DY in synchronism with a shift clock signal Y SCL having a predetermined frequency f Y to successively generate selection signals C 1 to C N from respective output contact points for the row electrodes Y 1 to Y N . In addition, a set of selection circuits are provided between the respective contact points of the Y shift register 302 and the respective row electrodes Y 1 to Y N . Detailing representatively the switching circuit for the n-th row electrode Y n , a transmission line 303 is connected to the input contact point of a first analog switch 304 whose conducting and non-conducting states are switched in synchronism with a selection signal C n , the output contact point of the first analog switch 304 is connected to the row electrode Y n , a transmission line 305 is connected to the input contact point of a second analog switch 306 whose conducting and non-conducting states are switched in the opposite manner to that of the first analog switch 304 in synchronism with the selection signal C n , and the output contact point of the second analog switch 306 is connected to the row electrode Y n . When the selection signal C n has a logical value "H", the first analog switch 304 and the second analog switch 306 are switched to the conducting state and the non-conducting state respectively, so that the liquid crystal voltage V S is supplied to the row electrode Y n . Inversely, when the selection signal C n has a logical value "L", the first analog switch 304 and the second analog switch 306 are switched to the non-conducting state and the conducting state respectively, so that the liquid crystal voltage V N is supplied to the row electrode Y n . In figures, signals to be supplied to the respective row electrodes Y 1 to Y N are represented by row electrode signals HY 1 to HY N . Each two-terminal active element has a voltage-current characteristic (I-V characteristic) as shown in Fig. 2, which varies in accordance with voltage variation of the signals VX 1 to VX M and HY 1 to HY N which are supplied to the column electrodes X 1 to X M and the row electrodes Y 1 to Y N , respectively. Apparently from Fig. 2, the two-terminal active element has a non-linear characteristic in which a remarkable small amount of current flows through the two-terminal active element when a low voltage is supplied between both ends of the element, but the current is rapidly increased when a high voltage is supplied between both ends of the element. On the basis of the non-linearity of the characteristic of the two-terminal active element as described above, the two-terminal active element is supplied with a high voltage to perform a display operation (at a selection time), and with a low voltage to perform a non-display operation (at a non-selection time), whereby the driving of the liquid crystal is carried out. The operation of the active matrix type liquid crystal display device thus constructed will be next described with reference to timing charts of Figs. 3 and 4. For example, assuming that a video signal P as shown in Fig. 3 is input to the a.c. video generating circuit 201, the phase of the video signal P remains invariable when the a.c. inversion signal FR has the logical value "H" while the phase is inverted to an opposite phase when the a.c. inversion signal FR has the logical value "L", and then the video signal P is outputted to the transmission line 203. A period for the former case is referred to as a non-inversion period, and a period for the latter case is referred to as an inversion period. Therefore, the a.c. video signal Ps is varied as shown in Fig. 3. Here, the voltage V S of the a.c. video signal Ps has a 100% level for white at the non-inversion phase period and a 0% level (corresponding to a pedestal level) for white for the inversion phase period. Further, the voltage (-V a ) is a 0% level (corresponding to the pedestal level) for white for the non-inversion period and a 100% level for white for the inversion phase period. The Y shift register 302 serves to shift a shift start signal DY in synchronism with a shift clock signal Y SCL having a period corresponding to a horizontal scanning period to successively generate selection signals C 1 to C N . Each of the latch pulse signal LP and the shift start signal DX which are applied to the X-drive circuit 200 is a rectangular signal which has a logical value "H" in matching with the one-horizontal scanning period. Next, an operation every one-horizontal scanning period will be described in detail with reference to an enlarged time chart at the lower side of Fig. 3. The latch pulse signal LP is switched to a state of a logical value "H" substantially in synchronism with the time when the a.c. video signal Ps is phase-inverted, and the shift start signal DX is switched to a state of a logical value "H" at the start time within each one-horizontal scanning period for which the a.c. video signal Ps exists. Further, the shift clock signal X SCL is provided with a sufficiently high frequency to enable the X shift register 202 to perform an M-stage shift operation within a period from the time when the shift start signal DX takes "H" until the time when the latch pulse signal LP takes "H". Therefore, the X shift register 202 shifts the shift start signal DX in synchronism with the shift clock signal X SCL , thereby generating the sampling signals S 1 through S m to S M in synchronism with the shift clock signal X SCL . The sampling signals S 1 to S M and the latch pulse signal LP are generated every one-horizontal scanning period for which a set of the row electrodes Y 1 to Y N are successively scanned by the Y-drive circuit 300, so that the liquid crystal layer corresponding to picture element portions of the liquid crystal panel 100 are line-sequentially scanned by the signals VH 1 to VX M and VX 1 to HY N . The timing at which the a.c. video signal Ps is held in the set of the first sample-and-hold capacitors of the X-drive circuit 200 is shifted by one horizontal period from the timing at which the charges held in the set of the first sample-and-hold capacitors are transferred to the set of the second sample-and-hold capacitors in synchronism with the latch pulse signal LP to simultaneously supply the column electrode signals VX 1 to VX M to the column electrodes X 1 to X M . For example, an n-th a.c. video signal Ps which has been sampled with a sampling signal S m as shown in Fig. 3 (in figure, a sampling position is represented by a circle) is transferred to the column electrode X m in synchronism with the sampling timing of an (n+1)-th a.c. video signal Ps after one horizontal scanning period elapses from the sampling time of the n-th a.c. video signal Ps. Fig. 4 shows timing charts representatively for a difference signal (VX m - HY n ) applied between the column electrode X m and the row electrode Y n of difference signals (VX 1 - HY 1 ) to (VX m - HY n ) which are applied at the intersecting portions between the set of column electrodes X 1 to X M and the set of row electrodes Y 1 to Y N . The a.c. video signal Ps as shown in Fig. 4 corresponds to the a.c. video signal Ps as shown in Fig. 3, and the voltage levels V a and -V a correspond to 100% and 0% levels for white respectively for the non-inversion phase period, and 0% and 100% for white respectively for the inversion-phase period. The row electrode signal HY n is equal to the liquid crystal voltage V S for a selection period (a period for which the selection signal C n is in a state of logical value "H") Ts, and is equal to the liquid crystal voltage V N for a non-selection period (a period for which the selection signal C n is in a state of logical value "L") T N . Within the non-inversion phase period as described above, after the potential of the row electrode Y n is a positive potential V P for the selection period T S , it is changed to a potential V a for the non-selection period T N , while after the potential of the row electrode Y n is a negative potential -V P for the selection period T S , it is changed to a potential -V a for the non-selection period T N . Further, the column electrode signal VX m is formed by sampling and holding the a.c. video signal Ps as described with reference to Fig. 3. On the basis of the relationship of the potentials of the electrodes as described above, the difference signal (VX m - HY n ) has a waveform as shown by a solid line at the lower side of Fig. 4. A chain line of Fig. 4 shows a trace of potential variation at a contact portion of the liquid crystal layer 102 and the non-linear element 103. For the selection period T S , the two-terminal active element 103 is supplied with a large voltage, and thus apparently from the I-V characteristic of Fig. 2, a current flowing through the two-terminal active element is increased, so that the liquid crystal layer 102 is charged. The charge amount of the liquid crystal layer 102 corresponds to the amplitude of the difference signal (VX m - HY n ) for the selection period T S . In other words, the charge amount is controlled by the level of the electrode signal VX m , and thus the sampling level of the a.c. video signal P S . As described above, a non-selection potential (a potential for the non-selection period) is variable in accordance with the polarity of a selection potential (a potential for the selection period) prior to the non-selection potential, so that the difference signal (VX m - HY n ) has a positive level for a non-selection period T N after a selection period T S of positive polarity, but has a negative level for a non-selection period after a selection period T S of a negative polarity. Therefore, the voltage to be supplied to the two-terminal active element 103 for the non-selection period T N in both of the above cases is small, and thus the charges which have been charged into the liquid crystal layer 102 for the selection period T S are hardly discharged through the two-terminal active element. An effective voltage to be supplied to the liquid crystal layer 102 is proportional to the area of an oblique portion of Fig. 4, and is consequently dependent on the level of the sampled a.c. video signal Ps. The liquid crystal layer 102 serves to control light-transmission in accordance with an effective voltage supplied thereto, and displays an image on the liquid crystal panel 100. If the driving method as shown by the timing chart of Figs. 3 and 4 is used in place of the driving method of this invention in the active matrix type liquid crystal display device having two-terminal active elements, the following problem such as the degradation of display quality would occur due to the electrical characteristics of the two-terminal active element. The MIM elements, the MIS elements and the other two-terminal active elements do not have necessarily an invariable single I-V characteristic as shown in Fig. 2, but have a characteristic which varies in accordance with a continually-applied voltage V as shown in Figs. 5 and 6. Fig. 5 shows variation of the I-V characteristic with an applied voltage, in which an initial I-V characteristic as indicated by a solid line c is changed to that as indicated by a dotted line d due to a continually-applied voltage V, and Fig. 6 shows a variation amount (hereinafter referred to as "shift amount") of the I-V characteristic with variation of a voltage-applying time for each applied voltage. As shown in Fig. 5, even if the two-terminal active element has the I-V characteristic as indicated by the solid line c of Fig. 5 at the initial stage of the voltage application, the initial I-V characteristic is varied to that as indicated by the dotted line d of Fig. 6 after a time elapses, and stabilized to the I-V characteristic after the variation. When the two-terminal active element is left for several hours while the applied voltage to the element is set to 0 volt, the I-V characteristic after variation is returned to the initial I-V characteristic as indicated by the solid line c. However, applying the voltage V to the two-terminal active element at the same condition again, the I-V characteristic as indicated by the solid line c is varied to that as indicated by the dotted line d. This variable characteristic (hereinafter referred to as "shift characteristic") differs in accordance with difference in applied voltage V (for example, in Fig. 6, the voltage V satisfies the following inequality: p>r>n>f, and the shift characteristics of the respective I-V characteristics are different from each other). A time required for the I-V characteristic varied due to the continually-applied voltage to return to the initial I-V characteristic is longer as the shift amount (the variation amount as indicated by an arrow of Fig. 5) is increased. The shift characteristic is described in more detail in "E. Mizobatta, et al: SID 91 Digest, p.226 (1991)" or other papers. In addition, there is a problem that the shift characteristic causes the occurrence of an afterimage on the liquid crystal panel. For example, it is assumed that a window pattern having a white portion at the center portion thereof and a black portion surrounding the white portion is first displayed on the liquid crystal panel as shown in Fig. 7(a), and then is changed to an overall white pattern (white raster). In this case, the first displayed window pattern is not completely erased, and it is left behind as an afterimage on the liquid crystal panel as shown in Fig. 7(b), so that the overall white pattern is not obtained on the liquid crystal panel. This so-called afterimage phenomenon is gradually extinguished as a long time elapses, but the display quality is remarkably degraded. The principle of occurrence of the afterimage phenomenon will be further described hereunder. In a case where the window pattern as shown in Fig. 7(a) is displayed in a normally black mode (it is black when a sufficient voltage is not applied to the liquid crystal layer, and white when a sufficient voltage is applied to the liquid crystal layer), the white display portion is supplied with a difference signal of applied voltage n as show in Fig. 7(c) for the selection period T S , while the black display portion is supplied with a difference signal of applied voltage f (f<n) for the selection period T S . Therefore, the two-terminal active element located at the white display portion is supplied with a higher voltage than that located at the black display portion, so that apparently from Figs. 5 and 6, the shift amount of the I-V characteristic of the two-terminal active element at the white display portion is larger than that of the two-terminal active element at the black display portion. Here, assuming that the whole screen of the liquid crystal panel is changed to the white pattern, the afterimage as shown in Fig. 7(b) occurs due to the difference of the shift amounts of the two-terminal active elements at the white and black display portions. The afterimage phenomenon also occurs in a case where a window pattern having a white portion at the center portion of the liquid crystal panel and a black portion surrounding the white portion is first displayed on the liquid crystal panel, and then the whole screen of the liquid crystal panel is changed from the above display pattern to a display pattern having a half tone, and also in a case where a pattern having a half tone is first displayed on the liquid crystal panel, and then the display pattern is changed from the above pattern to a pattern having different half tone which is set with a lower voltage that the former pattern. The afterimage phenomenon due to such an display pattern changing operation to a half tone pattern will be described in more detail. For example, the following assumption is introduced. As shown in Fig. 8, white and black are first displayed at the center portion and the surrounding portion of the liquid crystal panel, respectively, in which the black portion P1 is formed by a difference signal (VX m1 - HY n ) which is applied through the column electrode X m1 and the row electrode Y n and the white portion P2 is formed by a difference signal (VX m2 - HV n ) which is applied through the column electrode X m2 and the row electrode Y n , and thereafter the display pattern changing operation to a half tone pattern is carried out by applying difference signals (VX m1 - HY n ) and (VX m2 - HV n ) which are equal to each other, so that an afterimage occurs in which the central portion P2 is darker than the surrounding portion P1 as shown in Fig. 9. In such a case, the difference signals (VX m1 - HY n ) and (VX m2 - HY n ) are applied in accordance with timing charts as shown in Fig. 10. That is, for each selection period T S (in a case of_normally black display) within a period for which black and white are displayed, the voltage V mSB of the difference signal (VX m1 - HY n ) which is applied to the two-terminal active elements for the black portion P1 is lower than the voltage V msW of the difference signal (VX m2 - HY n ) which is applied to the two-terminal active elements for the white portion P2. Therefore, apparently from Figs. 5 and 6, the shift amount of the two-terminal active element for the portion P2 is larger than that of the two-terminal active element for the portion P1. In other words, the internal impedance of the two-terminal active element for the portion P2 is increased while the internal impedance of the two-terminal active element for the portion P1 is lower than the former, and this characteristic is maintained. When the display pattern is changed from this state to a half tone display pattern, the amount of charges Q2 flowing into the liquid crystal layer through the two-terminal active element for the portion P2 is smaller that the amount of charges Q1 flowing into the liquid crystal layer through the two-terminal active element for the portion P1 within a half tone display period although the voltage V ms1 of the difference signal (VX m1 - HY n ) and the voltage V ms2 of the difference signal (VX m2 - HY n ) which are supplied for the selection period T S are voltages for the same half tone. Therefore, the effective voltage (which is proportional to the charge amount Q2) applied to the liquid crystal layer for the portion P2 for a non-selection period T N within the half tone display period is represented by an oblique portion S2 in Fig. 10 while the effective voltage (which is proportional to the charge amount Q1) applied to the liquid crystal layer for the portion P1 is represented by an oblique portion in Fig. 10, and thus the following inequality is apparently satisfied: S1 > S2. Therefore, a dark afterimage is formed at the portion P2 while a predetermined half tone image is formed at the portion P1. Such an afterimage phenomenon is called a "sticking phenomenon". Summary of the Invention It is an object of the present invention to remedy problems of the prior art explained above and to provide a method of driving an active matrix type liquid crystal display which does not suffer from a degradation of display quality due to the occurrence of flicker and an afterimage phenomenon. This object is achieved with a method as claimed in claim 1. Preferred embodiments of the invention are subject-matter of the dependent claims. The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus are not to be considered as limiting the present invention. Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art form this detailed description. Brief Description of the Drawings Fig. 1 is a block diagram showing the construction of an active matrix type liquid crystal display device to which an embodiment of a driving method according to this invention is applied; Fig. 2 is a graph showing an I-V characteristic of a two-terminal active element for driving a liquid crystal layer; Fig. 3 is a timing chart for explaining a problem of a conventional driving method; Fig. 4 is a timing chart for further explaining the problem of the conventional driving method; Fig. 5 is a graph showing another problem caused by the I-V characteristic of the two-terminal active element for driving the liquid crystal layer; Fig. 6 is a graph showing another problem caused by the I-V characteristic of the two-terminal active element for driving the liquid crystal layer; Fig. 7 is a schematic view showing the principle of occurrence of an afterimage due to the I-V characteristic of the two-terminal active element for driving the liquid crystal layer; Fig. 8 is a schematic view further showing the principle of occurrence of the afterimage due to the I-V characteristic of the two-terminal active element for driving the liquid crystal layer; Fig. 9 is a schematic view further showing the principle of occurrence of the afterimage; Fig. 10 is a timing chart further showing the principle of occurrence of the afterimage; Fig. 11 is a circuit diagram showing the construction of the active matrix type liquid crystal display device to which a first embodiment of the driving method according to this invention is applied; Fig. 12 is a waveform diagram showing the principle of a pulse width modulation in the active matrix type liquid crystal display device to which the first embodiment is applied; Fig. 13 is an explanatory diagram showing the principle of forming a row electrode signal in the active matrix type liquid crystal display device to which the first embodiment is applied; Fig. 14 is a timing chart showing the driving method of the first embodiment; Fig. 15 is a timing chart further showing the driving method of the first embodiment; Fig. 16 is a timing chart further showing the driving method of the first embodiment; Fig. 17 is a block diagram showing the active matrix type liquid crystal display device to which a second embodiment of this invention is applied; Fig. 18 is a timing chart showing the driving method of the second embodiment; Fig. 19 is a timing chart further showing the driving method of the second embodiment; Fig. 20 is a timing chart further showing the driving method of the second embodiment; Fig. 21 is a timing chart further showing the driving method of a third embodiment; Fig. 22 is a timing chart further showing the driving method of the third embodiment; Fig. 23 is a timing chart further showing the driving method of the third embodiment; Fig. 24 is a timing chart showing a fourth embodiment of the driving method according to this invention; and Fig. 25 is a timing chart showing a fifth embodiment of the driving method according to this invention. Description of the Preferred Embodiment A first embodiment of the driving method according to this invention will be next described with reference to Figs. 11 through 16. The first embodiment has been implemented in view of the degradation of display quality due to the shift characteristic in which the I-V characteristic of the two-terminal active element is shifted in accordance with a voltage applied to the two-terminal active element and can prevent occurrence of the afterimage phenomenon by compensating the shift characteristic of the two-terminal active element in a display operation of the liquid crystal panel of the liquid crystal display device. The construction of the active matrix type liquid crystal display device to which the first embodiment of this invention is applied will be described with reference to Fig. 11. The liquid crystal display device is equipped with a liquid crystal panel 400, an X-drive circuit 500 and a Y-drive circuit 600, and performs a display operation through a line-sequential scanning of the picture elements of the liquid crystal panel 400 by the X-drive circuit 500 and the Y-drive circuit 600. The liquid crystal panel 400 includes a set of plural column electrodes X 1 through X m to X M (in figure, a m-th column electrode X m is representatively represented) which are connected to the X-drive circuit 500, another set of plural row electrodes Y 1 through Y n to Y N (in figure, n-th row electrode Y n is representatively represented) which are connected to the Y-drive circuit 600, the set of column electrodes and the set of row electrodes being provided on respective facing substrates so as to intersect each other, liquid crystal filled in a space between the column electrodes X 1 through X m to X M and the row electrodes Y 1 through Y n to Y N , and two-terminal active elements each provided at each intersecting portion (picture element portion) between the column electrode and the row electrode). That is, representatively giving attention to the column electrode X m and the row electrode Y n , a liquid crystal layer 401 serving as a picture element and a two-terminal type active element 402 are connected in series between the column electrode X m and the row electrode Y n , and both of a voltage V 1 to be applied to the liquid crystal layer 401 and a voltage V m to be applied to the two-terminal active element 402 are determined in accordance with a difference signal (VX m - HY n ) to be applied between the electrodes X m and Y n . The X-drive circuit 500 is equipped with an X shift register 501 having output contact points of M for the column electrodes X 1 through X m to X M , a set of latch circuits (in figure, the latch circuit 502 for the m-th column electrode X m is representatively shown), and a set of column electrode driving circuits (in figure, the column electrode driving circuit 503 for the m-th column electrode X m is representatively shown), these sets being provided between these output contact points and the set of the column electrodes X 1 through X m to X M . An A/D converter 700 receives the video signal P, and converts it to N-bit digital video data in which the maximum gradation is represented by (2 N -1). The converted digital video data is supplied to the X shift register 501. The X shift register 501 is supplied with the digital video data in synchronism with the shift clock signal X SCL of predetermined frequency f x , and is equipped with an M-stage shift register for performing a parallel shifting operation every N bits, thereby successively outputting digital video data D 1 through D m to D M from the output contact points in synchronism with the shift clock signal X SCL . A set of latch circuits and a set of driving circuits are provided between the column electrodes X 1 through X m to X M and the output contacts of the X shift register 501. The following description is made representatively for a latch circuit 502 and a driving circuit 503 for the m-th column electrode X m . The latch circuit 502 latches a digital video data D m outputted from the X shift register 501 in synchronism with an output timing. Thereafter, the driving circuit 503 carries out a pulse-width modulation processing to output to the column electrode X m a column electrode signal VX m having a time width which is proportional to a gradation set or represented by the digital video data D m . The relationship between the voltage amplitude and the time width of the column electrode signal VX m for the digital video data D m will be described in more detail with reference to Fig. 12. The a.c. inversion signal FR is formed of a rectangular waveform having 50% duty factor and each half period thereof corresponds to one horizontal scanning period, so that the a.c. inversion signal FR serves to set the selection period T S for which the row electrodes Y 1 to Y N are successively selected at the timing of the line-sequential scanning operation. A selection period for negative polarity (negative-polarity selection period) T S is set up when the a.c. inversion signal FR has the logical value "H", while a selection period for positive polarity (positive-polarity selection period) T S is set up when the a.c. inversion signal FR has the logical value "L". In addition, the maximum gradation (2 N - 1) of the digital video data D m is set to be equal to the time width of the half period (i.e., T S ) of the a.c. inversion signal FR, and the pulse width modulation (PWM modulation) is carried out within this time width. Further, when the a.c. inversion signal FR has the logical value "H", the column electrode signal VX m is set to V a for the time width T on which is proportional to the digital video data D m , and is set to - V a for the residual time width T off . When the a.c. inversion signal FR has the logical value "L", the column electrode signal VX m is set to -V a for a selection time width T on corresponding to the digital video data D m and is set to V a for the residual time width T off . When the column electrode signal VX m which has been subjected to the pulse width modulation is applied to the column electrode X m in the manner as described above, an effective voltage to be applied to the liquid crystal layer located at an intersecting position between the column electrode X m and the row electrode corresponds to the product of the time width and a constant amplitude |V a |. This is equivalent to an operation of applying to the column electrode X m a column electrode signal whose voltage corresponds to the digital video data D m . A liquid crystal power generating circuit 601 in the Y-drive circuit 600 is supplied with six kinds of voltages V r , V p , V a , -V r , -V p , -V a whose absolute values satisfy the following inequality: |V r | ≥ |V p | ≥ |V a |, and it carries out a multiplexing operation in synchronism with the a.c. inversion signal FR to output three kinds of liquid crystal voltages V R , V S and V N to transmission lines 602, 603 and 604. The Y shift register 605 shifts the Y shift start signal DY in synchronism with the shift clock signal Y SCL of predetermined frequency f Y to successively output the selection signals C 1 through C n to C N from the output contact points of N. A set of switching circuits are provided between the respective output contact points of the Y shift register 605 and the row electrodes Y 1 through Y n to Y N . The following description is made representatively for a switching circuit for an n-th row electrode Y n . The switching circuit includes an AND gate 606 for obtaining a logical product between a selection signal C n outputted from an n-th output contact point of the Y shift register 605 and a selection signal C n-1 outputted from an (n-1)-th output contact point which is located just prior to the n-th output contact point, an AND gate 607 for obtaining a logical product between the selection signal C n outputted from the n-th output contact point and a logically-inverted signal of the selection signal C n-1 outputted from the (n-1)-th output contact point which is located just prior to the n-th output contact point, an analog switch 608 which is provided between the transmission line 602 and the row electrode Y n and switched between conducting and non-conducting states in accordance with the logical output of the AND gate 606, an analog switch 609 which is provided between the transmission line 603 and the row electrode Y n and switched between conducting and non-conducting states in accordance with the logical output of the AND gate 607, and an analog switch 610 which is provided between the transmission line 604 and the row electrode Y n and switched between the conducting and non-conducting states in accordance with the inverted logical signal of the selection signal C n . Therefore, when both of the selection signals C n-1 and C n have logical values "H", the liquid crystal voltage V R is applied to the row electrode Y n , and when the selection signals C n-1 and C n have logical values "L" and "H", respectively, the liquid crystal voltage V S is applied to the row electrode Y n . Further, when the selection signal C n has a logical value "L", the liquid crystal voltage V N is applied to the row electrode Y n irrespective of the logical value of the selection signal C n-1 . Further, in consideration of the relation to the logical value of the a.c. inversion signal FR, when all of the a.c. inversion signal FR and the selection signals C n-1 and C n have the logical value "H", a selection voltage +V r is applied to the row electrode Y n , and when the a.c. inversion signal Fr has the logical value "L", and both of the selection signals C n- 1 and C n have the logical value "H", the selection voltage -V r is applied to the row electrode Y n . Further, when the a.c. inversion signal FR has the logical value "H", the selection signal C n-1 has the logical value "L", and the selection signal C n has the logical value "H", the selection voltage +V P is applied to the row electrode Y n , and when the a.c. inversion signal FR has the logical value "L", the selection signal C n-1 has the logical value "L", and the selection signal C n has the logical value "H", the selection voltage -V P is applied to the row electrode Y n . The operation of the active matrix type liquid crystal display device thus constructed will be described with reference to Figs. 14 to 16. In this embodiment, as shown in Fig. 14, the time width of the shift start signal DY is set to a period corresponding to four periods of the shift clock signal Y SCL . the shift start signal DY is successively shifted in synchronism with the trailing edge of the shift clock signal Y SCL in the Y shift register 605 to thereby generate selection signals C 1 to C N which have the same time width as the shift start signal DY and are deviated from one another by one period of the shift clock signal Y SCL . In association with the generation of these selection signals C 1 to C N , a difference signal to be applied to each of m1-th and m2-th column electrodes X m1 and X m2 for an n-th row electrode Y n has a waveform as shown in Fig. 15. The timing chart as shown in Fig. 15 will be further described. The generation timing of the selection signals C n-1 and C n are deviated from each other by one horizontal period as described above, a period T r for which the logical values of both of the selection signals C n-1 and C n are "H" is three times of the horizontal scanning period (3H). Within the period T r (hereinafter referred to as "reset period"), as shown in Fig. 15, the electrodes are supplied with a larger voltage than the maximum-amplitude voltage used for an ordinary display operation (the maximum amplitude voltage is equal to V p + V a for black at the positive polarity, and is equal to - (V p + V a ) for black at the negative polarity. A next one-horizontal period subsequent to the reset period T r corresponds to an ordinary selection period T s , and the column electrode signal VX m outputted from the X-drive circuit 500 is supplied to the column electrode X m . When the selection period T s is completed, a next scanning operation of the row electrode is started, and thus this period is a non-selection period T N for the row electrode Y n . This non-selection period T N is continued until one-field scanning period or one-frame scanning period elapses. Thereafter, upon completion of the one-field or one-frame scanning period, the non-selection period T N is transferred to the reset period T r and the selection period T S , and these processings are repeated. The same processings are conducted on the other scanning operations of the other column electrodes C 1 to C n+1 and C n+1 to C N . Further, the polarity of the voltage to be applied to each of the column electrodes c 1 to C N is inverted every one-field or one-frame scanning period. As shown in Fig. 15, a picture element at an intersecting portion (ml, n) between the ml-th column electrode X m1 and the n-th row electrode Y n is supplied with a difference signal (VX m1 - HY n ) having an absolute value |V p - V a | for each selection period T S within a black display period, whereby the liquid crystal panel is displayed black. On the other hand, a picture element at an intersecting portion (m2, n) between the m2-th column electrode X m2 and the n-th row electrode Y n is supplied with a difference signal (VX m2 - HY n ) having an absolute value |V p + V a | for each selection period T S within a white display period (having the same period as the black display period), whereby the liquid crystal panel is displayed white. The picture elements (m1,n) and (m2,n) are switched from the above display states to a half tone display state for a half tone display period. If the driving method of this embodiment is not applied, as described above, through the switching operation to the half tone display state, the difference signal (VX m1 - HY n ) applied to the picture element at the intersecting portion between the column electrode X m1 and the row electrode Y n is equal to the difference signal (VX m2 - HY n ) applied to the picture element at the intersecting portion between the column electrode X m2 and the row electrode Y n , however, the effective voltages V ms1 and V ms2 applied to the liquid crystal layer, and the effective values S1 and S2 are respectively different from each other as shown in Fig. 15 due to the difference in shift characteristic which is caused by the white and black display operations. This difference in shift characteristic causes an afterimage. The following description is the principle of greatly depressing the afterimage phenomenon by applying a difference signal of large voltage in the reset period T r just before the ordinary selection period T S . The cause of occurrence of the afterimage resides in that there is a difference in shift amount of electrical characteristic between two-terminal active elements used for the picture elements which are carrying out white and black display operations, respectively, and thus the effective voltages to be applied to the liquid crystal layer are different between these two-terminal active elements due to the difference of the characteristics thereof even when both of the two-terminal active elements are driven to carry out the same half tone display operation. On the other hand, in this embodiment, a difference signal having high voltage is applied to a two-terminal active element for the reset period T r to thereby saturate the I-V shift characteristic of the two-terminal active element with the high voltage and hold the I-V shift characteristic, so that the I-V characteristic of the two-terminal active element is not fluctuated since then. As a result, even when a display operation which provides a difference between shift amounts (for example, a window having white and black portions as described above) is carried out and then is switched to a half tone display operation, the two-terminal active element carries out a display operation on the basis of the stabilized I-V shift characteristic which has been subjected to the above saturation treatment with the high voltage, so that the occurrence of the afterimage phenomenon which has been conventionally caused due to the shift characteristic can be greatly depressed. The depression of the afterimage phenomenon will be further described with reference to Fig. 16, which is an enlarged view of the timing chart within the half tone display period as shown in Fig. 15. Fig. 16 shows representatively the column electrode signal VX m and the row electrode signal HY n which are applied to the m-th column electrode X m and the n-th row electrode Y n respectively, and the difference signal (VX m - HY n ). In Fig. 16, a waveform indicated by a solid line represents an actually-applied voltage, and a waveform indicated by a dotted line represents an effective voltage. Further, the voltage V ms1 of the difference signal (VX m - HY n ) and the effective voltage V mn1 are voltages before one-field or one-frame period, and the voltage V ms2 of the difference signal (VX m - HY n ) and the effective voltage V mn2 are voltages after one-field or one-frame period. Further, the voltages V ms1 , V 1s1 , V mn1 and S1 represent voltages which are applied to the liquid crystal layer and the two-terminal active element for the half tone display state after the black display period, and the voltages V ms2 , V 1s2 , V mn2 and S2 are voltages which are applied to the liquid crystal layer and the two-terminal active element for the half tone display state after the white display period, these voltages being superposedly shown on the same time axis Apparently from Fig. 16, when a black or white pattern is first displayed and then the display is switched to the same half tone level, the difference signal applied for the selection period T S is equal between both cases, and thus V ms1 = V ms2 , so that the effective voltages also satisfy the following equation: V 1s1 = V 1s2 . Further, the effective voltages applied for the non-selection period T N satisfy the following equations: V mn1 = V mn2 , and S1 = S2. Therefore, as described above, the occurrence of the afterimage phenomenon due to the shift characteristic of the two-terminal active element can be depressed. In addition, the reset period T r is circulatingly provided to each of the row electrodes Y 1 to Y N every one-field or one-frame period, and thus the reset period T r every three horizontal scanning periods (3H) merely corresponds to a period of several % of the one-field or one-frame period. Accordingly, the fluctuation of the voltage applied to the liquid crystal layer is remarkably slight even when the high voltage is applied to the liquid crystal layer for the reset period T r according to the driving method of this embodiment, and thus the application of the high voltage to the liquid crystal layer never causes the degradation of display quality. In this embodiment, the reset period T r is set to three-horizontal scanning periods. However, the reset period T r is not necessarily limited to this value, and may be set to a period longer than the above period insofar as the degradation of display quality due to the voltage fluctuation is not induced. Further, the reset period T r may be shorter than that of this embodiment by increasing the applied voltage in the reset period T r . In this case, it is needless to say that the maximum value of the voltage must be set to such a value that the liquid crystal layer and the two-terminal active element are not damaged. A second embodiment of this invention will be next described with reference to Figs. 17 through 20. Like the first embodiment, this embodiment has been implemented in view of the problem of the degradation of the display quality due to the shift characteristic that the I-V characteristic is shifted in accordance with the voltage applied to the two-terminal active element, and can prevent the occurrence of the afterimage phenomenon by compensating for the shift characteristic of the two-terminal active element in the display operation of the liquid crystal panel of the liquid crystal display device. First, the construction of the active matrix type liquid crystal display device will be described with reference to Fig. 17. In Fig. 17, the same or substantially same portions as those of Fig. 11 are represented by the same reference numerals. That is, the liquid crystal display device of this embodiment is equipped with the liquid crystal panel 400, the X-drive circuit 500 and the Y-drive circuit 600, and the display operation is carried out through the line-sequential scanning operation of the respective picture element portions of the liquid crystal panel 400 using the X-drive circuit 500 and the Y-drive circuit 600. The liquid crystal panel 400 includes a set of plural column electrodes X 1 through X m to X M (in figure, a m-th column electrode X m is representatively represented) which are connected to the X-drive circuit 500, another set of plural row electrodes Y 1 through Y n to Y N (in figure, n-th row electrode Y n is representatively represented) which are connected to the Y-drive circuit 600, the set of column electrodes and the set of row electrodes being provided on respective facing substrates so as to be intersected to each other, liquid crystal filled in a space between the column electrodes X 1 through X m to X M and the row electrodes Y 1 through Y n to Y N , and two-terminal active elements each provided at each intersecting portion (picture element portion) between the column electrode and the row electrode). That is, representatively giving attention to the column electrode X m and the row electrode Y n , a liquid crystal layer 401 serving as a picture element and a two-terminal type active element 402 are connected in series between the column electrode X m and the row electrode Y n . The X-drive circuit 500 is equipped with an X shift register 501 having output contact points of M for the column electrodes X 1 through X m to X M , a set of latch circuits (in figure, the latch circuit 502 for the m-th column electrode X m is representatively shown), and a set of column electrode driving circuits (in figure, the column electrode driving circuit 503 for the m-th column electrode X m is representatively shown), these sets being provided between these output contact points and the set of the column electrodes X 1 through X m to X M . An A/D converter 700 receives the video signal P, and converts it to an N-bit digital video data in which the maximum gradation is represented by (2 N -1). The converted digital video data is supplied to the X shift register 501. The X shift register 501 is supplied with the digital video data in synchronism with shift clock signal X SCL of predetermined frequency f X , and is equipped with an M-stage shift register for performing a parallel shifting operation every N bits, thereby successively outputting digital video data D 1 through D m to D M from the output contact points in synchronism with the shift clock signal X SCL . A set of latch circuits and a set of driving circuits are provided between the column electrodes X 1 through X m to X M and the output contacts of the X shift register 501. The following description is made representatively for a latch circuit 502 and a driving circuit 503 for the m-th column electrode X m . The latch circuit 502 latches a digital video data D m outputted from the X shift register 501 in synchronism with an output timing. Thereafter, the driving circuit 503 carries out a pulse-width modulation processing to output to the column electrode X m a column electrode signal VX m having a time width which is proportional to a gradation set by the digital video data D m . The pulse-width modulation processing is carried out in accordance with the same principle as in the first embodiment. The liquid crystal power generating circuit 601 in the Y-drive circuit 600 is supplied with four kinds of voltages V p , V a , -V p , -V a whose absolute values satisfy the following inequality: |V p | ≥ |V a |, and it carries out a multiplexing operation in synchronism with the a.c. inversion signal FR to output two kinds of liquid crystal voltages V S and V N to the transmission lines 612 and 614. That is, when the a.c. inversion signal FR has a logical value "H", the liquid crystal voltages V S and V N become voltages V p and V a , respectively, and when the a.c. inversion signal FR has a logical value "L", the liquid crystal voltages V S and V N become -V p and -V a . The Y shift register 605 shifts a Y shift start signal DY in synchronism with a shift clock signal Y SCL of predetermined frequency f Y to successively output selection signals C 1 through C n to C N from the output contact points of N. A set of switching circuits are provided between the output contact points and the row electrodes Y 1 through Y n to Y N . Describing representatively the switching circuit for the n-th row electrode Y n as shown in Fig. 17, the switching circuit includes a first analog switch 613 whose conducting and non-conducting states are switched in accordance with the selection signal C n outputted from the n-th output contact point of the Y shift register 605, and which is connected between the transmission line 611 and the row electrode Y n , and a second switch whose conducting and non-conducting states are switched in accordance with an inversion signal of the selection signal C n and which is connected between the transmission line 612 and the row electrode Y n . When the selection signal C n has a logical value "H", the liquid crystal voltage V n is supplied to the row electrode Y n , and when the selection signal C n has a logical value "L", the liquid crystal voltage V N is supplied to the row electrode Y n . The operation of the active matrix type liquid crystal display device thus constructed will be described with reference to Figs. 18 through 20. First, in this embodiment, the time width of the shift start signal DY is set to a value corresponding to four periods of the shift clock signal Y SCL . The shift start signal DY is successively shifted in synchronism with the trailing edge of the shift clock signal Y SCL , thereby generating the selection signals C 1 to C N which have the same time width as the shift start signal DY and are deviated from one another by one period of the shift clock signal Y SCL . Upon generation of these selection signals C 1 to C N , for example, difference signals (VX m1 - HY n ) and (VX m2 - HY n ) which are applied to the ml-th and m2-th column electrodes X m1 and X m2 for the n-th row electrode, respectively, have waveforms as shown in Fig. 19. Detailing the timing chart as shown in Fig. 19, since the generation timing of the selection signal C n is deviated by one horizontal scanning period as described above, a period T S ' for which the selection signal C n has the logical value "H" (hereinafter referred to as "reset period") is equal to three times of the horizontal scanning period (3H). A period subsequent to the reset period T S ' corresponds to an ordinary selection period T S , and the column electrode signal VX m outputted from the X-drive circuit 500 is supplied to the column electrode X m . Further, when the selection period T S is completed, the scanning operation of the next row electrode is started, and this period is a non-selection period for the row electrode Y n . The non-selection period T N is continued until one-field or one-frame scanning period elapses. Thereafter, the reset period T S ' and the selection period T S are returned again, and these processings are repeated. The same processings are repeated for the scanning operation of the other column electrodes C 1 to C n-1 and C n+1 to C N . In addition, the polarity of the voltage applied to each of the column electrodes C 1 to C N is inverted every one-field or one-frame scanning period. Fig. 19 shows a situation where a picture element (m1,n) at the intersecting portion between the m1-th column electrode X m1 and the n-th row electrode Y n is supplied with the difference signal (VX m1 - HY n ) having the voltage |V p - V a | for each selection period T S within a black display period to be displayed black while a picture element (m2,n) at the intersecting portion between the m2-th column electrode X m2 and the n-th row electrode Y n is supplied with the difference signal (VX m2 - HY n ) having the voltage |V p + V a | for each selection period T S within a white display period (the same period as the black display period) to be displayed white, and then the display state is switched from the above display state to a half tone display state for a half tone display period. As shown in Fig. 19, the effective voltages of the difference signals (VX m1 - HY n ) and (VX m2 - HY n ) are equal to V ms1 and V ms2 respectively for the selection period T S within the half tone display period, and the effective voltages in the non-selection period T N are equal to S1 and S2. If the driving method of this embodiment is not applied, as described above, through the switching operation to the half tone display state, the difference signal (VX m1 - HY n ) applied to the picture element at the intersecting portion between the column electrode X m1 and the row electrode Y n is equal to the difference signal (VX m2 - HY n ) applied to the picture element at the intersecting portion between the column electrode X m2 and the row electrode Y n , however, the effective voltages V ms1 and V ms2 applied to the liquid crystal layer, and the effective values S1 and S2 are respectively different from each other as shown in Fig. 19 due to the difference in shift characteristic which is caused by the white and black display operations. This difference in shift characteristic causes an afterimage phenomenon. The following description is the principle of greatly depressing the afterimage phenomenon by applying a difference signal of large voltage in the reset period T S ' just before the ordinary selection period T S . The cause of occurrence of the afterimage resides in that there is a difference in shift amount of electrical characteristic between two-terminal active elements used for the picture elements which are carrying out white and black display operations, respectively, and thus the effective voltages to be applied to the liquid crystal layer are different between these two-terminal active elements due to the difference of the characteristics thereof even when both of the two-terminal active elements are driven to carry out the same half tone display operation. On the other hand, in this embodiment, a difference signal having high voltage is applied to a two-terminal active element for the reset period T S ' to thereby saturate the I-V shift characteristic of the two-terminal active element with the high voltage and hold the I-V shift characteristic, so that the I-V characteristic of the two-terminal active element is not fluctuated since then. As a result, even when a display operation which provides a difference between shift amounts (for example, a window having white and black portions as described above) is carried out and then is switched to a half tone display operation, the two-terminal active element carries out a display operation on the basis of the stabilized I-V characteristic, so that the occurrence of the afterimage phenomenon which has been conventionally caused due to the shift characteristic can be greatly depressed. The depression of the afterimage phenomenon will be further described with reference to Fig. 20 which is an enlarged view of the timing chart within the half tone display period as shown in Fig. 19. Fig. 20 shows representatively the column electrode signal VX m and the row electrode signal HY n which are applied to the m-th column electrode X m and the n-th row electrode Y n respectively, and the difference signal (VX m - HY n ). In Fig. 20, a waveform indicated by a solid line represents an actually-applied voltage, and a waveform indicated by a dotted line represents an effective voltage. Further, the voltage V ms1 of the difference signal (VX m - HY n ) and the effective voltage V mn1 are voltages before one-field or one-frame period, and the voltage V ms2 of the difference signal (VX m - HY n ) and the effective voltage V mn2 are voltages after one-field or one-frame period. Further, the voltages V ms1 , V 1s1 , V mn1 and S1 represent voltages which are applied to the liquid crystal layer and the two-terminal active element for the half tone display state after the black display period, and the voltages V ms2 , V 1s2 , V mn2 and S2 are voltages which are applied to the liquid crystal layer and the two-terminal active element for the half tone display state after the white display period, these voltages being superposedly shown on the same time axis. Apparently from Fig. 20, when a black or white pattern is first displayed and then the display is switched to the same half tone level, the difference signal applied for the selection period T S is equal between both cases, and V ms1 = V ms2 , so that the effective voltages also satisfy the following equation: V 1s1 = V 1s2 . Further, the effective voltages applied for the non-selection period T N satisfy the following equations: V mn1 = V mn2 , and S1 = S2. Therefore, as described above, the accumulation of the d.c. offset component due to the characteristic of the two-terminal active element can be prevented, and the occurrence of the afterimage phenomenon can be depressed. In addition, the reset period T S ' is circulatingly provided to each of the row electrodes Y 1 to Y N every one-field or one-frame period, and thus the reset period T S ' every three horizontal scanning periods (3H) merely corresponds to a period of several % of the one-field or one-frame period. Accordingly, the fluctuation of the voltage applied to the liquid crystal layer is remarkably slight even when the high voltage is applied to the liquid crystal layer for the reset period T S ' according to the driving method of this embodiment, and thus the application of the high voltage to the liquid crystal layer never causes the degradation of display quality. In this embodiment, the reset period T S ' is set to three-horizontal scanning period. However, the reset period T S ' is not necessarily limited to this value, and may be set to a period above the above period or any value insofar as the degradation of display quality due to the voltage fluctuation is not induced. Further, the reset period T S ' may be shorter than that of this embodiment by increasing the applied voltage in the reset period T S '. Further, the high voltage as used in the first embodiment is not applied for the reset period in the second embodiment, and thus it is not required to apply an excessive voltage to the liquid crystal layer and the two-terminal active element, so that the deterioration of the liquid crystal panel with time lapse can be prevented. In addition, a power generator for independently generating a high voltage for a reset operation is not required, so that the switching circuit provided between the Y shift register 605 and the row electrodes Y 1 to Y N can be simplified in construction. A third embodiment of this invention will be next described with reference to Figs. 21 through 23. like the second and first embodiments, this embodiment has been implemented in view of the problem of the degradation of display quality due to the shift characteristic that the I-V characteristic is shifted in accordance with the voltage applied to the two-terminal active element. However, the occurrence of the afterimage phenomenon is prevented by compensating for the shift characteristic of the two-terminal active element for a period except for an actual displaying operation period. The construction of the active matrix type liquid crystal display device has the same construction as that of Fig. 11. However, the set of driving circuits (in figure, a driving circuit 503 is representatively shown) provided in the X-drive circuit 500 is supplied with six kinds of voltages V r /2, V p /2, V a /2, -V r /2,-V p /2, -V a /2, in place of the voltages V a and -V a . In addition, the liquid crystal power generating circuit 601 is supplied with V r /2, V p /2, V a /2, -V r /2, -V p /2,-V a /2, in place of the voltages V r , V p , V a , -V r , -V p , -V a . These voltages satisfy the following inequality: |V r | > |V p | > |V a |. The operation of this embodiment will be next described with reference to timing charts of Figs. 21 through 23. As shown in Fig. 21, in this embodiment a period from the time when a power of the liquid crystal display device is switched on by an user or the like until the time when an actual displaying operation starts is defined as a refresh period T R , and a period for which the actual display operation is carried out after the refresh period T R is defined as a display period T D . First, for the display period T D as shown in Fig. 25(a), a video signal is subjected to the pulse width modulation to be converted to rectangular column electrode signals VX 1 to VX M , and these converted column electrode signals are supplied to the column electrodes X 1 to X n in synchronism with the timing of the linesequential scan. Simultaneously, rectangular row electrode signals HY 1 to HY N as shown in Fig. 22(b) are supplied to the row electrodes Y 1 to Y N in synchronism with the timing of the line-sequential scan. From the potential difference between these column electrode signals and row electrode signals, a difference signal as shown in Fig. 21 is formed for the display period T D . In Fig. 21, one-frame period, one-field period and one-horizontal period are represented by 1F, 1V and 1H. As shown in Fig. 23(a), for the refresh period T R which is set before the display period T D , the row electrode signals HY 1 to HY N applied to the row electrodes Y 1 to Y N are deviated in phase from the row electrode signals as shown in Fig. 22(b) by 180°, and thus voltages of (V r + V a )/2 and -(V r + V a ) are outputted in place of (V p + V a )/2 and -(V p + V a ). Simultaneously with the application of the row electrode signals HY 1 to HY N as shown in Fig. 23(a) to the row electrodes Y 1 to Y N , the column electrode signals VX 1 to VX M which have rectangular forms as shown in Fig. 22(a) and output voltages of (V r + V a )/2, (V r - V a )/2, -(V r - V a )/2, -(V r - V a )/2 (in place of (V r + V a )/2, (V p - V a )/2, -(V p - V a )/2, -(V r - V a )/2) are applied, thereby obtaining difference signals having waveforms as shown in Fig. 23(b). The difference signal as shown in Fig. 23(b) corresponds to the signal in the refresh period T R as shown in Fig. 21. In this embodiment, a high voltage is also beforehand applied between the set of column electrodes and the set of row electrodes for the refresh period T R to shift the I-V characteristic of the two-terminal active element to the I-V characteristic at the high voltage region, so that the I-V characteristic is fixed for a next normal display period T D . Therefore, the accumulation of the d.c. offset component is prevented, and thus the occurrence of the afterimage phenomenon can be depressed. A fourth embodiment will be next described with reference to Fig. 24. The active matrix type liquid crystal display device to which this embodiment is applied has the same construction as the third embodiment (see Fig. 11). The feature of this embodiment resides in that the waveform of a difference signal having high amplitude voltage applied for the refresh period T R is designed so as to have a completely rectangular waveform as shown in Fig. 24(c). In order to obtain the difference signal having the completely rectangular waveform, a waveform as shown in Fig. 24(a) is assigned to the column electrode signals VX 1 to VX M while a waveform as shown in Fig. 24(b) is assigned to the row electrode signals HY 1 to HY N . In figures, one-frame period, one-field period and one-horizontal period are represented by 1F, 1V and 1H, respectively. According to this embodiment, a high voltage can be easily obtained, and the compensation of the electrical characteristic of the two-terminal active element can be easily performed. A fifth embodiment of this invention will be next described hereunder with reference to Fig. 25. The active matrix type liquid crystal display device of this embodiment has the same construction as the third embodiment (see Fig. 11). However, in this embodiment, the refresh period T R is suitably inserted in the display period T D to periodically compensate for the shift characteristic of the two-terminal active element. According to this method, the compensating operation is periodically carried out and thus the shift characteristic of the two-terminal active element can be surely compensated. However, if the refresh period T R is set to an excessively long time, then the normal display period T D would be damaged, and thus the refresh period T r is preferably inserted every several seconds, one-horizontal scanning period or one-vertical scanning period.

Claims: A method of driving an active matrix type liquid crystal display comprising a plurality of column electrodes (X 1 -X M ) and a plurality of row electrodes (Y 1 -Y N ) said column electrodes and row electrodes defining a plurality of picture elements, each picture element comprising a liquid crystal layer (401) and a two-terminal type element (402) serially connected between a respective one of said row electrodes and a respective one of said column electrodes said respective row and column electrodes intersecting each other, said two-terminal type element having a predetermined non-linear current-voltage characteristic whose inclination is subject to a shift depending on the magnitude of voltages applied, said method comprising: applying a row electrode signal (HY 1 -HY N ) to said row electrodes and a data signal (VX 1 -VX M ) to said column electrodes such that the difference signal between said row electrode signal and said data signal across the terminals of each picture element is periodic at a scanning period including a selection interval (Ts) during which the difference signal assumes a value at which the two-terminal type element allows the liquid crystal layer of the picture element to be charged, and a non-selection interval (T N , Tn) during which the difference signal assumes a value lower than that during said selection interval, wherein said difference signal additionally has a refresh interval (Tr, Ts') in which it assumes a voltage such that the shift of the inclination of said current-voltage characteristic is saturated. The method of claim 1 wherein said refresh interval precedes each selection interval. The method of claim 1 wherein said refresh interval is provided once prior to the selection interval of a first scanning period. The method of claim 1 wherein said refresh interval is provided once every several scanning periods. The method as claimed in any one of claims 1 through 4, wherein the difference signal is an alternating signal. The method as claimed in any one of claims 1 through 5, wherein the two-terminal type element comprises a metal-insulator-metal (MIM) element. The method as claimed in any one of claims 1 through 5, wherein the two-terminal type element comprises a metal-insulator-semiconductor (MIS) element. The method as claimed in any one of the preceding claims, wherein said data signal is a pulse width modulated signal. The method of claim 2, wherein said difference signal has a first voltage in said refresh interval and a second voltage in the selection interval immediately following said refresh interval. The method of claim 9, wherein said first voltage is higher than the second voltage. The method of claim 9, wherein said first and second voltages are the same.

Inventors: KONISHI MASANORI, ONO NAGAMASA, WAKAI YOICHI, KONISHI, MASANORI, ONO, NAGAMASA, WAKAI, YOICHI, KONISHI, MASANORI, C/O SEIKO EPSON CORPORATION, Ono, Nagamasa, c/o SEIKO EPSON CORPORATION, WAKAI, YOICHI, C/O SEIKO EPSON CORPORATION
Applicants: SEIKO EPSON CORP, SEIKO EPSON CORPORATION
Application year: 1992
Main classification: G09G3
IPC codes: G09G3