Method of and apparatus for identifying unknown system using adaptive filter

Abstract: A method of and an apparatus for identifying an unknown system using an adaptive filter wherein the step size is subsequently supplied to the adaptive filter so that the identification error may be decreased. Value of the step size is calculated by using a gradient of power of error signal according to the LMS or LIM (learning identification method) algorithm, and limited by the previous value of step size. Further, when a sudden change in the error signal is detected, the step size can be re-setted or the limitation to the step size can be released.

Description: This invention relates to a method of and an apparatus for identifying an unknown system using an adaptive filter. Identification of an unknown system using an adaptive filter proceeds such that the same signal is inputted both to an unknown system to be identified and to an adaptive filter, and coefficients of the adaptive filter are updated using the identification error obtained by subtracting an output of the adaptive filter from the output of the unknown system. The identification error will hereinafter be referred to as an error signal. This identification of an unknown system using an adaptive filter can be applied, for example, to an echo canceler for removing echoes which may be produced at a two-line to four-line converting portion on a transmission line, an equalizer for removing intersymbol interference between codes which may take place in transmission lines, a noise canceler for removing noise which may leak into a sound inputting microphone, a howling canceler for removing howling which may be caused by acoustic coupling from a loudspeaker to a microphone, and various other apparatus. An exemplary common document regarding an adaptive filter is B. Widrow et al., "Adaptive Signal Processing", (Prentice-Hall, NJ, 1985) (hereinafter referred to as reference 1.) Here, operation of an adaptive filter is described taking a noise canceler as an example. A noise canceler generally operates such that, using an adaptive filter having a transfer function approximated to an impulse response of a path from a noise source to a main input terminal, a noise replica corresponding to a noise component mixed into the main input terminal is produced to suppress the noise which is admitted into the main input terminal and gives a disturbance to a signal. In this instance, coefficients at taps of the adaptive filter are successively modified by taking the correlation between a difference signal obtained by subtraction of the noise replica from a mixed signal in which noise and an original signal are mixed and a reference noise available at a reference input terminal. As an exemplary algorithm for this coefficient modification of an adapive filter, that is, for convergence of a noise canceler, the LMS algorithm disclosed in reference 1 above and the learning identification method (LIM) disclosed in J. Nagumo et al., IEEE Transactions on Automatic Control, Vol. AC-12, No. 3, pp. 282-287 (1967) (hereinafter referred to as reference 2) are known. Fig. 1 is a block diagram showing the construction of an example of a conventional noise canceler. Referring to Fig. 1, a mixed signal in which a signal detected at main input terminal 1 and noise are mixed is supplied to subtracter 4. A reference noise signal detected at reference input terminal 2 is supplied to adaptive filter 3. A noise replica generated by adaptive filter 3 is subtracted from the mixed signal at subtracter 4. Consequently, the noise components in the mixed signal are cancelled and a signal wherein the noise is removed is supplied to output terminal 6. Output of subtracter 4 is supplied also to multiplier 5, at which it is multiplied by 2α. Output of multiplier 5 is used for updating of the coefficients of adaptive filter 3. Here, α is a constant and called a step size. Now, if a signal is represented by s k (k is an index representative of time), reference noise by n k , noise to be erased by v k , and additional noise that signal s k undergoes by δ k , then signal w k to be supplied from input terminal 1 to subtracter 4 is given by: w k = s k + v k + δ k The object of the noise canceler is to produce replica u k of noise component v k defined by equation (1) to cancel noise. By producing noise replica u k adaptively using a closed loop circuit consisting of adaptive filter 3, subtracter 4 and multiplier 5 shown in Fig. 1, difference signal d k given by the following equation can be obtained as an output signal of subtracter 4: d k = s k + v k - u k Since it is considered that generally δ k is small enough compared with s k , δ k is ignored here. (v k - u k ) in equation (2) above is called residual noise, and from the point of view of system identification, this residual noise is equal to an error signal. If the LMS algorithm is assumed, then m-th coefficient c m,k+1 of adaptive filter 3 is updated in accordance with the following equation: c m,k+1 = c m,k + 2α·d k ·n m,k If equation (3) is represented in a matrix form for all N coefficients, then c k+1 = c k + 2α·d k ·n k where c k and n k are given by the following equations, respectively: C k = [c ⊘,k c 1,k ........ c N-1,k ] T n k = [n k n k-1 ........ n k-N+1 ] T where [·] T represents transposition of the matrix. On the other hand, according to LIM, updating of coefficients are performed in accordance with following equation (7) in place of equation (4): c k+1 = c k + (2µ/Nδ n 2 )·d k ·n k where µ is a step size in LIM, and σ n 2 is an average power inputted to adaptive filter 3. Parameter σ n 2 is used so that the value of step size µ may increase in inverse proportion to the average power in order to assure stabilized convergence. Various methods are available to calculate σ n 2 , and σ n 2 can be calculated, for example, in accordance with following equation (8): Step sizes α and µ in equations (4) and (7) define the rate of convergence of the adaptive filter and the level of residual noise after convergence. In the case of LMS, as the value of a increases, the convergence occurs more rapidly, but the residual noise level increases. On the contrary, in order to attain a sufficiently low residual noise level, α having a corresponding low value must necessarily be adopted, which results in deterioration in convergence rate. This similarly applies to step size µ in LIM. In order to satisfy the contradictory requirements for the step sizes and the residual noise, an algorithm wherein the step size is variable has been proposed and is disclosed in Proceeding of International Conference on Acoustics, Speech and Signal Processing, pp. 1385-1388, 1990 (hereinafter referred to as reference 3.) The algorithm will be hereinafter referred to as SGA-GAS (Stochastic Gradient Adaptive Filters with Gradient Adaptive Step Size). SGA-GAS uses α k in place of step size a of the LMS algorithm of equation (4). Parameter α k is defined by equation (9) below as a value which increases in proportion to the negative gradient of power d k 2 of difference signal α k : α k = α k-1 + ρ 2 . ∂d k 2 ∂α k-1 where ρ is a positive constant and normally a very small value is used therefor. Equation (9) can be rewritten, using noise n k , as: α k = α k-1 + ρ d k d k-1 n k-1 T n k Further, α k must satisfy the following condition: 0 < α k < 2 3·tr{R} T where {· } T is transposition of the matrix, tr{· } a trace of the matrix, and R an autocorrelation matrix of noise n k . Fig. 2 is a block diagram showing an example of construction of a noise canceler which employs the SGA-GAS algorithm. While the step size is fixed in the noise canceler shown in Fig. 1, it is variable in the noise canceler shown in Fig. 2. In particular, step size α k represented by equation (10) is calculated by step size controller 8 and then limited by limiter 9, whereafter it is supplied to adaptive filter 3 via multiplier 5. An example of construction of step size controller 8 is shown in a block diagram of Fig. 3. Referring to Fig. 3, step size controller 8 has two input terminals 90 and 93 and single output terminal 100 and includes correlation calculating circuit 94, three multipliers 92, 96 and 97, two delay elements 91 and 99 and adder 98. Difference signal d k is supplied to first input terminal 90 while reference noise n k is supplied to second input terminal 93. Step size α k which is an output of step size controller 8 is supplied from output terminal 100 to limiter 9 of Fig. 2. Signal d k supplied to first input terminal 90 is delayed by one sample period by first delay element 91 to make d k-1 and is supplied to first multiplier 92. Signal d k is also supplied to first multiplier 92, and d k ·d k-1 which is an output of first multiplier 92 is transmitted to second multiplier 96: Reference noise n k supplied to second input terminal 93 is transmitted to correlation calculating circuit 94. Correlation C k , which is defined by the following equation, is calculated by correlation calculating circuit 94 and transmitted to second multiplier 96. C k = n k-1 T n k Correlation C k is multiplied by d k ·d k-1 by second multiplier 96 and is further multiplied-by ρ by third multiplier 97, whereafter it is transmitted as ρ·d k ·d k-1 · n k-1 T · n k to adder 98. At adder 98, the signal from third multiplier 97 is added to the signal which is an output of second delay element 99 and was obtained one sample period earlier, and the sum signal is transmitted to output terminal 100. Accordingly, signal α k transmitted to output terminal 100 is given by α k-1 +ρ d k d k-1 n k-1 T n k , which coincides with equation (10) above. Fig. 4 is a block diagram showing construction of correlation calculating circuit 94. Correlation calculating circuit 94 includes N-input adder 123, N delay elements 121 1 to 121 N and N multipliers 122 1 to 122 N . Delay elements 121 1 to 121 N are connected in series and form a tapped delay line with, to which multipliers 122 1 to 121 N are connected, respectively. Input terminal 120 of correlation calculating circuit 94 corresponds to second input terminal 93 in Fig. 3 and receives n k thereat. Signal n k is supplied to the delay line with taps and first multiplier 122 1 . For 2 ≤ i ≤ N, outputs of (i-1)-th and i-th delay elements 121 i-1 and 121 i are supplied to i-th multiplier 122 i . Accordingly, (n k , n k-1 ), (n k-1 , n k-2 ), ..., (n k-N+1 , n k-N ) are inputted to multipliers 122 1 , 122 2 , ..., 122 N , respectively, and outputs of the multipliers are given by n k n k-1 , n k-1 n k-2 , ..., n k-N+1 n k-N . Outputs of multipliers 122 1 to 122 N are all supplied to adder 123, and a value given by is outputted from adder 123. Output n k-1 T · n k is transmitted as correlation C k to output terminal 124 of correlation calculating circuit 94. Referring now to Fig. 5, limiter 9 includes 2-input minimum value circuit 22 and 2-input maximum value circuit 21. Step size α k is supplied to minimum value circuit 22 from step size controller 8 by way of input terminal 23. Th H , which is a threshold value for a maximum value, is supplied to the other input terminal of minimum value circuit 22, and a smaller value of α k and Th H is supplied as a minimum value from minimum value circuit 22 to maximum value circuit 21. Th L , which is a threshold value for a minimum value, is supplied to the other input terminal of maximum value circuit 21, and a greater value of the output of minimum value circuit 22 and Th L is supplied as a maximum value from maximum value circuit 21 to output terminal 20. In other words, step size α k supplied to input terminal 23 is limited, at upper and lower limits thereof, with minimum value Th L and maximum value Th H , respectively, so that it is outputted as α k given by the following equation: Here, if Th L = 0 and Th H = 2/(3·tr{R}) , then a value equivalent to a value obtained by execution of equation (11) is outputted from limiter 9. Maximum value circuit 21 and minimum value circuit 22 can each be realized by a combination of selector 31 and comparator 32 as shown in Fig. 6. Minimum value circuit 21 will be described first. The two input terminals of minimum value circuit 22 in Fig. 5 correspond to two input terminals 33 and 34, respectively, of Fig. 6. Signals supplied to input terminals 33 and 34 are transmitted simultaneously to both selector 31 and comparator 32. Comparator 32 compares the two input signals with each other and generates a controlling signal such that a smaller signal is selected by selector 31. The controlling signal is transmitted to selector 31, and the signal from input terminal 33 or 34 selected by selector 31 is transmitted as a minimum value to output terminal 30. On the other hand, in the case of maximum value circuit 21, comparator 32 generates a controlling signal such that selector 31 selects the greater signal of the two input signals supplied thereto. Selector 31 then supplies the signal selected in accordance with the controlling signal as a maximum value to output terminal 30. Identification of an unknown system based upon the SGA-GAS algorithm has been described so far by way of an example of a noise canceler. Here, in an ideal case wherein d k = v k - u k is met with difference signal dk, the negative gradient of power d k 2 of difference signal dk coincides with a system identification error, and consequently, d k 2 can be used for step size control. However, in an actual noise canceler, d k is given by d k = s k + v k - u k as represented in equation (2) and accordingly is influenced by signal s k . Therefore, a correct gradient of d k 2 cannot be obtained, and the step size cannot be controlled correctly. In some other apparatus described above other than a noise canceler, even when s k = 0, when additional noise δ k in equation (1) cannot be ignored, difference signal d k is given by d k = v k - u k + δ k and consequently, δ k makes an obstruction to error signal v k - u k similar to s k . The presence of parameter δ k or s k will result in elongation in converging time or an increase in final misadjustment after convergence. Although an ordinary adaptive filter uses a step size value commonly defined against a set of filter coefficients, US-A-4,791,390 discloses an adaptive filter which achieves a rapid convergence characteristic by providing a plurality of step size values (variable scale factors). In such an adaptive filter, the step size values correspond to the respective filter coefficients of the adaptive filter. The number of step size value is equal to the number of the filter coefficients, i.e. the number of taps. In the filter shown in US-A-4,791,390, sign of a product between the misadjustment (the difference signal) and the reference input signal is detected and the magnitude of each of the step sizes is controlled by using continuity of the sign. When the number of repetition of the sign is greater than a predetermined first value, the step size is replaced by a value obtained by multiplying the present step size value by a predetermined second value, and when the step size is smaller than a predetermined third value, the step size is replaced by a value obtained by dividing the present step size by a predetermined fourth value. That is, the step size is updated based on multiplication and division. ICASSP 89, 23-25 May 1989, Glasgow, GB; AKIHIKO SUGIYAMA et al.: "A FAST CONVERGENCE ALGORITHM FOR ADAPTIVE FIR FILTER", pages 892-895 discloses a fast convergence algorithm for adaptive FIR filters. The algorithm is a family of the LMS algorithm and controls the step size based on the moving average of misadjustment level (difference signal). I.e., the step size is calculated by multiplying a predetermined value to a difference between a long-time average and a short-time average of an absolute value or squared value of the difference signal. It is an object of the present invention to provide a method of identifying an unknown system using an adaptive filter which is robust even with an obstruction signal to an error signal v k - u k and short in converging time and can minimize the final misadjustment after convergence. It is another object of the present invention to provide an apparatus for identifying an unknown system using an adaptive filter which is robust even with an obstruction signal to an error signal v k - u k and short in converging time and can minimize the final misadjustment after convergence. These objects are solved by the invention defined by the appended claims. In particular it is described a method of identifying an unknown system using an adaptive filter, which delays an input signal successively by one sample period to form a plurality of samples, calculates products between the samples and corresponding samples of a plurality of multiplicands provided correspondingly to the plurality of samples, and outputs the sum total of the products, wherein the unknown system is identified by adding to each of the multiplicands a product among a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, the sample corresponding to the multiplicand and a parameter as an updated amount for unit updating to update the multiplicands so that the difference signal may be decreased, characterized in that a value which increases in proportion to a gradient of the difference signal with respect to the parameter is added to the parameter to obtain a sum and the parameter is modified using a limited sum obtained by applying a limit to the sum, and a threshold value for applying the limit is determined using a previous limited sum or sums. Furthermore, it is described a method of identifying an unknown system using an adaptive filter, which delays an input signal successively by one sample period to form a plurality of samples, calculates products between the samples and corresponding samples of a plurality of multiplicands provided correspondingly to the plurality of samples, and outputs the sum total of the products, wherein the unknown system is identified by adding to each of the multiplicands a product among a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, the sample corresponding to the multiplicand and a parameter as an updated amount for unit updating to update the multiplicands so that the difference signal may be decreased, characterized in that a value which increases in proportion to a gradient of the difference signal with respect to the parameter is added to the parameter to obtain a sum and a limit is applied to the sum to obtain a limited sum, and when it is detected that there is a sudden change in the difference signal, the sum is regarded as the limited sum only for a period of time of a number of clocks equal to a predetermined first constant, and then the parameter is modified using the limited sum, and a threshold value for applying the limit is determined using a previous limited sum or sums. Furthermore, it is described a method of identifying an unknown system using an adaptive filter, which delays an input signal successively by one sample period to form a plurality of samples, calculates products between the samples and corresponding samples of a plurality of multiplicands provided correspondingly to the plurality of samples, and outputs the sum total of the products, wherein the unknown system is identified by adding to each of the multiplicands a product among a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, the sample corresponding to the multiplicand and a parameter as an updated amount for unit updating to update the multiplicands so that the difference signal may be decreased, characterized in that a value which increases in proportion to a gradient of the difference signal with respect to the parameter is added to the parameter to obtain a sum and a limit is applied to the sum to obtain a limited sum, and then, an average value of these limited sums is calculated and is determined as the parameter for calculation of the updated amount. The first object of the present invention can also be achieved by a method of identifying an unknown system using an adaptive filter, which delays an input signal successively by one sample period to form a plurality of samples, calculates products between the samples and corresponding samples of a plurality of multiplicands provided correspondingly to the plurality of samples, and outputs the sum total of the products, wherein the unknown system is identified by adding to each of the multiplicands a normalized value of a product among a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, the sample corresponding to the multiplicand and a parameter as an updated amount for unit updating to update the multiplicands so that the difference signal may be decreased, said normalized value being obtained by normalization of the product with a value of input power to said adaptive filter, characterized in that a value which increases in proportion to a gradient of the difference signal normalized with the value of input power to said filter with respect to the parameter is added to the parameter to obtain a sum, and the parameter is modified using the sum. Furthermore, it is described a method of identifying an unknown system using an adaptive filter, which delays an input signal successively by one sample period to form a plurality of samples, calculates products between the samples and corresponding samples of a plurality of multiplicands provided correspondingly to the plurality of samples, and outputs the sum total of the products, wherein the unknown system is identified by adding to each of the multiplicands a normalized value of a product among a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, the sample corresponding to the multiplicand and a parameter as an updated amount for unit updating to update the multiplicands so that the difference signal may be decreased, said normalized value being obtained by normalization of the product with a value of input power to said adaptive filter, characterized in that a value which increases in proportion to a gradient of the difference signal normalized with the value of input power to said filter with respect to the parameter is added to the parameter to obtain a sum and the parameter is modified using a limited sum obtained by applying a limit to the sum, and a threshold value for applying the limit is calculated using a previous limited sum or sums. It is also described an identifying apparatus for identifying a characteristic of an unknown system using an adaptive filter, characterized in that it comprises: a subtracter for subtracting an output of said adaptive filter from an output signal of the unknown system to obtain a difference signal; a step size controller for receiving the difference signal and an input signal to said adaptive filter and successively calculating a step size for use for the updating of coefficients of said adaptive filter; a limiter for receiving an output of said step size controller and limiting the received output; a first delay element for feeding back an output of said limiter to said limiter and said step size controller; and a first multiplier for multiplying the output of said limiter by the difference signal; and in that an output of said first multiplier is used as the step size for the updating of coefficients of said adaptive filter. Furthermore, it is described an identifying apparatus for identifying a characteristic of an unknown system using an adaptive filter, characterized in that it comprises: a subtracter for subtracting an output of said adaptive filter from an output signal of the unknown system to obtain a difference signal; a first delay element; an error change detecting circuit for receiving the difference signal and detecting a sudden change of the received difference signal; a counter for receiving an output of said error change detecting circuit and counting clocks; a first selector for receiving an output of said error change detecting circuit and an output of said first delay element and selectively outputting one of the two received outputs in response to an output of said counter; a step size controller for receiving the difference signal and an input signal to said adaptive filter and successively calculating a step size for use for the updating of coefficients of said adaptive filter; a limiter for receiving an output of said step size controller and limiting the received output; a second selector for receiving an output of said limiter and the output of said step size controller and selectively outputting one of the two received outputs in response to an output of said first selector; a second delay element for feeding back an output of said second selector to said limiter; and a first multiplier for multiplying the output of said second selector by the difference signal; and in that said first delay element delays the output of said first selector and feeds back the delayed output to an input of said first selector; and an output of said first multiplier is used as a step size for the updating of coefficients of said adaptive filter. It is further described an identifying apparatus for identifying a characteristic of an unknown system using an adaptive filter, characterized in that it comprises: a subtracter for subtracting an output of said adaptive filter from an output signal of the unknown system to obtain a difference signal; a step size controller for receiving the difference signal and an input signal to said adaptive filter and successively calculating a step size for use for the updating of coefficients of said adaptive filter; a limiter for receiving an output of said step size controller and limiting the received output; and an averaging circuit for receiving an output of said limiter and calculating an average value from the received output; and in that an output of said averaging circuit is used as a step size for the updating of coefficients of said adaptive filter. Furthermore, an identifying apparatus for identifying a characteristic of an unknown system as described uses an adaptive filter and comprises: a subtracter for subtracting an output of said adaptive filter from an output signal of the unknown system to obtain a difference signal; a correlation calculating circuit for receiving an input signal to said adaptive filter and calculating and outputting a power value and a correlation of the input signal; a first delay element for receiving the power value and delaying the received power value by one sample period; a second delay element; a step size controller for receiving the difference signal, the correlation value, an output of said first delay element and an output of said second delay element and successively calculating a step size for use for the updating of coefficients of said adaptive filter; a limiter for receiving an output of said step size controller and limiting the received output; a first multiplier for multiplying an output of said limiter by the difference signal; and a first normalizing circuit for normalizing an output of said first multiplier with the power value; and in that said second delay element delays the output of said limiter by one sample period and feeds back the thus delayed output to said step size controller; and an output of said first normalizing circuit is used as a step size for updating of coefficients of said adaptive filter. The above and other objects, features and advantages of the present invention will be apparent from the following description referring to the accompanying drawings which illustrate an example of a preferred embodiment of the present invention. Fig. 1 is a block diagram showing an example of construction of a conventional exemplary noise canceler; Fig. 2 is a block diagram showing an example of construction of a conventional noise canceler based on the SGA-GAS algorithm; Fig. 3 is a block diagram showing construction of the step size controller in the apparatus shown in Fig. 2; Fig. 4 is a block diagram showing construction of the correlation calculating circuit in the step size controller shown in Fig. 3; Fig. 5 is a block diagram showing an example of construction of the limiter in the apparatus shown in Fig. 2; Fig. 6 is a block diagram showing construction of the maximum value circuit and the minimum value circuit in the limiter shown in Fig. 5; Fig. 7 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a first preferred embodiment of the present invention; Fig. 8 is a block diagram showing a first example of construction of a step size controller; Fig. 9 is a block diagram showing a first example of construction of a limiter; Fig. 10 is a block diagram showing a second example of construction of a step size controller; Fig. 11 is a block diagram showing an example of construction of a sudden change detecting circuit for error signal; Fig. 12 is a block diagram showing another example of construction of a sudden change detecting circuit for error signals Fig. 13 is a block diagram showing a second example of construction of a limiter; Fig. 14 is a block diagram showing a third example of construction of a limiter; Fig. 15 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a second preferred embodiment of the present invention; Fig. 16 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a third preferred embodiment of the present invention; Fig. 17 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a fourth preferred embodiment of the present invention; Fig. 18 is a block diagram showing an example of construction of an averaging circuit in the apparatus shown in Fig. 17; Fig. 19 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a fifth preferred embodiment of the present invention; Fig. 20 is a block diagram showing construction of an averaging circuit in the apparatus shown in Fig. 19; Fig. 21 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a sixth preferred embodiment of the present invention; Fig. 22 is a block diagram showing an example of construction of a correlation calculating circuit; Fig. 23 is a block diagram showing a third example of construction of a step size controller; Fig. 24 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a seventh preferred embodiment of the present invention; Fig. 25 is a block diagram showing a further example of construction of the limiter; Fig. 26 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to an eighth preferred embodiment of the present invention; Fig. 27 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to a ninth preferred embodiment of the present invention; and Fig. 28 is a block diagram showing construction of a holding circuit in the apparatus shown in Fig. 27. An apparatus for identifying an unknown system using an adaptive filter according to a first preferred embodiment of the present invention is shown in Figs. 7 to 14. Referring first to Fig. 7, the identifying apparatus is generally constructed such that it removes, from a mixed signal s k + v k of a signal s k and noise v k , which is inputted to main input terminal 1, the noise and outputs a resultant signal from output terminal 6. The identifying apparatus includes adaptive filter 3, subtracter 4, multiplier 5, step size controller 18, limiter 17 and delay element 10. The apparatus is different from the conventional apparatus shown in Fig. 2 in construction of the limiter, step size controller and further in that output of limiter 17 is fed back to limiter 17 and step size controller 18 by way of delay element 10. The function blocks in Fig. 7 which are denoted by the same reference numerals to those of Fig. 2 have the same functions. Limited step size α k is supplied from limiter 17 to delay element 10. Fig. 8 shows a first example of construction of step size controller 18, and function blocks in Fig. 8 which are denoted by same reference numerals as those of Fig. 3 have same functions. Comparing with above-mentioned step size controller 8 (Fig. 3), the delay element for delaying the output of adder 98 and feeding back the delayed output to adder 98 is not provided in step size controller 18. Instead of this delay element, input terminal 89 which is connected to adder 98 and transmits output of outer delay element 10 (Fig. 7) to adder 98 is provided. Fig. 9 shows a first example of construction of limiter 17. Referring to Fig. 9, limiter 17 is composed of a pair of multipliers 25 and 26, 3-input maximum value circuit 27 and 3-input minimum value circuit 28. Output of delay element 10 (Fig. 7), i.e., α k-1 , is transmitted to multipliers 25 and 26 by way of input terminal 24. At multipliers 25 and 26, α k-1 is multiplied by coefficients a and b and is outputted as a α k-1 and b α k-1 , respectively. a α k-1 and b α k-1 are supplied to maximum value circuit 27 and minimum value circuit 28, respectively. Step size α k is supplied from step size controller 18 (Fig. 7) to minimum value circuit 28 by way of input terminal 23. Th H , which is a threshold value for a maximum value, is supplied to the remaining input terminal of minimum value circuit 28. The three inputs, i.e., α k , Th H and b α k-1 , are compared with one another, and the minimum input is transmitted as an output of minimum value circuit 28 to maximum value circuit 27. Supplied to the other two input terminals of maximum value circuit 27 are Th L which is a threshold value for a minimum value and output a α k-1 of second multiplier 25, and the maximum input of the three inputs is supplied to output terminal 20. In other words, step size ak supplied to input terminal 23 is limited at the lower limit thereof with Th L and a α k-1 and at the upper limit thereof with Th H and b α k-1 and is outputted as α k given by the following equation: Amplitude distributions of s k and v k - u k are generally independent of each other. Accordingly, E[ s k ] · E[ v k - u k ] = 0 stands. Here, E[·] is the mathematical expectation of [·]. By using α k in place of αk, even if s k makes an obstacle to v k - u k , an instantaneous influence of s k upon v k - u k can be suppressed by means of limiter 17 to obtain a stabilized step size. While stabilization of the step size is achieved in Fig. 9 by limitation for both a maximum value and a minimum value, even limitation for only one maximum value or one minimum value is effective. If the maximum value and the minimum value of the step size are limited using a previous value or values of the step size as described above with reference to Fig. 9, then some defect may take place in the case that a characteristic of the unknown system to be identified presents a sudden change so that the error signal is increased suddenly. In this instance, the step size must necessarily be increased suddenly so that the adaptive filter may follow up the change of the characteristic of the unknown system. However, when the value of the step size is limited by a previous value or values thereof, it can present only a moderate change; accordingly, the speed of following up a sudden change of the system is slow. An example of step size controller 18 which can cope with this defect is shown in Fig. 10. Function blocks in Fig. 10 which are denoted by the same reference numerals as those of Fig. 8 have the same functions. Step size controller 18 shown in Fig. 10 is different from that of Fig. 8 in that it includes sudden change detecting circuit 42 for error signals to which error signal d k is inputted, and selector 43 is interposed between adder 98 and input terminal 100. An output of adder 98 is inputted to an input terminal of selector 43, and α 0 is inputted to the other input terminal of selector 43. Parameter α 0 is used for re-setting of the step size. Selector 43 selects α 0 or an output of adder 98 in response to a controlling signal from sudden change detecting circuit 42 and transmits the same as an output signal, i.e., as a step size, to output terminal 100. Accordingly, when selector 43 selects a signal from adder 98 and transmits it to output terminal 100, step size controller 18 operates quite similarly to the conventional controller shown in Fig. 8. Thus, the step size is calculated adding a variation to a previous value. On the other hand, when selector 43 supplies α 0 to output terminal 100, the step size is equal to α 0 irrespective of a previous value, which corresponds to re-setting of the step size. Sudden change detecting circuit 42 receives as an input thereto an error signal supplied to input terminal 90 and detects a sudden change of the error signal. When a sudden change is detected, sudden change detecting circuit 42 produces "1", but it produces "0" in all other cases. Selector 43 selects α 0 when "1" is supplied thereto from sudden change detecting circuit 42, but selects an output signal of adder 98 when "0" is supplied thereto. Subsequently, an example of construction of sudden change detecting circuit 42 will be described with reference to Fig. 11. The sudden change detecting circuit is provided to detect a sudden change of an error signal inputted to input terminal 50 thereof, and is composed of two multipliers 51 and 56, selector 52, counter 53, 2-input maximum value circuit 54, delay element 55 and comparator 57. The error signal supplied to input terminal 50 is squared by multiplier 51 and transmitted to selector 52 and comparator 57. Constant "0" is supplied to the other input terminal of selector 52. Selector 52 is controlled by an output of counter 53 and transmits either the output of multiplier 51 or "0" to an input terminal of maximum value circuit 54. The output of maximum value circuit 54 is fed back to the other input terminal of maximum value circuit 54 by way of delay element 55. Counter 53 continues its counting up to predetermined integral number N c and forwards to selector 52, during counting up, a controlling signal in accordance with which selector 52 selects a signal supplied from multiplier 51. After completion of counting up to N c , counter 53 forwards to selector 52 another controlling signal in accordance with which selector 52 selects "0". Since an output of maximum value circuit 54 which was obtained one sample interval prior to the present output is fed back to maximum value circuit 54, the maximum value of values of the first to N c -th samples is detected by and held in the feedback loop. A sample here is the output of multiplier 51 to the second power, i.e., an error signal to the second power. When a sample following the N c -th sample is inputted, selector 52 selects "0" and transmits it to maximum value circuit 54; accordingly, the output of maximum value circuit 54 is a maximum value of the signals supplied from delay element 55, i.e., the maximum value of values of the first to N c -th samples. This signal is transmitted to multiplier 56. At multiplier 56, the maximum value supplied from maximum value circuit 54 is multiplied by constant e th , and the result of the multiplication is transmitted to comparator 57. Meanwhile, the squared value of the error signal, which is the output of multiplier 51, is supplied to the other input terminal of comparator 57. Comparator 57 outputs "1" when the squared value of the error signal is higher in magnitude than the output of maximum value circuit 54, but outputs "0" in all other cases, and transmits it to output terminal 58. Selector 43 (Fig. 10) is controlled by the signal supplied to output terminal 58, and α 0 or α k is outputted as the step size from selector 43. If the error signal is represented by e k , inputs to comparator 57 are given by e k 2 and e th .max{e k 2 | 1≤k≤N c }. Accordingly, step size α k supplied to output terminal 100 in Fig. 10 is represented by the following equation: Step size α k obtained from equation (18) is transmitted as an output of step size controller 18 to limiter 17. In the sudden change detecting circuit for error signals, it is possible to utilize an absolute value of an error signal in place of the squared value of an error signal. Fig. 12 shows an example of an error fluctuation detecting circuit which utilizes the absolute value of an error signal. The sudden change detecting circuit differs from the one shown in Fig. 11 only in that absolute value calculating circuit 59 is provided in place of multiplier 51 connected to input terminal 50. Absolute value calculating circuit 59 calculates the absolute value of an error signal inputted to input terminal 50 and transmits it to selector 52 and comparator 57. Accordingly, when the sudden change detecting circuit shown in Fig. 12 is employed, step size α k supplied to output terminal 100 shown in Fig. 10 is represented by the following equation: Step size α k obtained from equation (19) is transmitted as an output of step size controller 18 to limiter 17. While the first preferred embodiment of the present invention is described so far, various forms of limiters can be used for limiter 17 in the present embodiment. Fig. 13 is a block diagram showing a second example of construction of limiter 17. Referring to Fig. 13, the limiter shown includes 3-input maximum value circuit 27, 3-input minimum value circuit 28 and a pair of multipliers 200 and 201. It is to be noted that function blocks in Fig. 13 which are denoted by the same reference numerals to those of Fig. 9 have the same functions. The output of delay element 10 (Fig. 7), i.e., α k-1 , is transmitted to multipliers 200 and 201 by way of input terminal 24. α k-1 is multiplied by positive constant η at multiplier 201 and is then multiplied further by α k-1 by the other multiplier 200, so that it is supplied as η α k-1 2 to maximum value circuit 27 and minimum value circuit 28. Step size α k is supplied from step size controller 18 (Fig. 7) to minimum value circuit 28 by way of input terminal 33. The threshold value for the maximum value, i.e., Th H , is supplied to the remaining input terminal of minimum value circuit 28. The three inputs, i.e., α k , Th H and η α k-1 2 , are compared with one another, and the minimum of the three inputs is transmitted as the output of minimum value circuit 28 to maximum value circuit 27. η α k-1 2 and Th L , which is the threshold value for the minimum value, are supplied to the other two input terminals of maximum value circuit 27. The maximum of the three inputs is outputted as the maximum value from maximum value circuit 27 and is supplied to output terminal 20. In other words, step size α k supplied to input terminal 23 is limited for the minimum value thereof by threshold value Th L and η α k-1 2 and for the maximum value thereof by threshold value Th H and η α k-1 2 , so that it is outputted as α k given by the following equation: Amplitude distributions of s k and v k - u k are generally independent of each other. Accordingly, E[ s k ] · E[ v k - u k ] = 0 stands. By using α k in place of α k , even if s k makes an obstacle to v k - u k , an instantaneous influence of s k upon v k - u k can be suppressed by means of limiter 17 to obtain a stabilized step size. Subsequently, a third example of construction of limiter 17 will be described with reference to Fig. 14. The limiter is generally constructed such that third multiplier 202 for squaring α k-1 inputted to input terminal 24 is additionally provided to the construction of the limiter shown in Fig. 9 (first example of construction.) The output of delay element 10 (Fig. 7), i.e., α k-1 , is transmitted to multiplier 202 by way of input terminal 24. α k-1 is squared by multiplier 202 and is then multiplied by positive constants a and b at first and second multipliers 25 and 26, respectively. Outputs a α k-1 2 and b α k-1 2 thus obtained are supplied to maximum value circuit 27 and minimum value circuit 28, respectively. Thereafter, the limiter operates in a similar manner as in the first example of construction shown in Fig. 9. In particular, step size α k supplied to input terminal 23 is limited for the minimum value thereof by threshold value Th L and a α k-1 2 and for the maximum value thereof by threshold value Th H and b α k-1 2 , so that it is outputted as α k given by the following expression from output terminal 20: While stabilization of the step size is achieved in the third example of construction by limitation of both the maximum value and the minimum value, even limitation of only one of the maximum value and the minimum value is effective. Also in the second and third examples of construction of the limiter described above with reference to Figs. 13 and 14, the maximum value and the minimum value of the step size are limited using a previous value of the step size, and some defect may take place in the case that a characteristic of the unknown system to be identified presents a sudden change so that the error signal is increased suddenly. In this instance, the step size must necessarily be increased suddenly so that the adaptive filter may follow up the change of the characteristic of the unknown system. However, when the value of the step size is limited by a previous value thereof, it can present only a moderate change; accordingly, the speed of following up a sudden change of the system is slow. Therefore, it is very effective to employ a step size controller which includes sudden change detecting circuit 42 described above with reference to Fig. 10. The first preferred embodiment of the present invention has been described so far. In the embodiment, when a step size which is used for the updating of coefficients is calculated using a gradient of power of an error signal, a limit which relies upon the earlier step size is provided for a variation of the step size obtained so that the step size may be prevented from being made excessively different from the correct value due to noise obstruction or other factors. Further, the power of the identification error signal is monitored so that, when it is detected that a characteristic of the unknown system of an object for identification has presented a sudden change, the step size is reset in order to achieve both quick convergence and low identification error. Subsequently, a second preferred embodiment of the present invention will be described. Fig. 15 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter in the present embodiment. The present apparatus is different from the apparatus of the first embodiment described above in the manner of re-setting the step size. In particular, while the step size is first re-set and then limitation of the step size is performed by means of a limiter in the first embodiment, in the present embodiment, re-setting is performed for the step size limited by means of a limiter. The present apparatus is generally constructed such that sudden change detecting circuit 48 for error signals and selector 41 are added to the apparatus of the first embodiment shown in Fig. 7. Sudden change detecting circuit 48 is provided independently of step size controller 18, and receives an error signal as an input thereto and outputs "1" when the error signal presents a sudden change, but outputs "0" when the error signal presents no significant change. Sudden change detecting circuit 42 in the first embodiment described hereinabove with reference to Fig. 11 or 12 can be employed as it is as sudden change detecting circuit 48. Selector 41 is provided on the output side of limiter 17 and receives an output of limiter 17 and step size α 0 for re-setting. An output of selector 41 is supplied to multiplier 5 and delay element 11. An output of delay element 11 is fed back to limiter 17 and step size controller 18 similarly to delay element 10 (Fig. 7) in the first embodiment. Selector 41 selectively outputs α 0 when "1" is supplied thereto as a controlling signal from sudden change detecting circuit 48, but outputs α k which is an output of limiter 17 when "0" is supplied thereto. Further, any of the limiters described above in connection with the first embodiment (Figs. 9, 13 and 14) can be used as limiter 17. A step size controller which does not include a sudden change detecting circuit therein, such as, for example, one described hereinabove with reference to Fig. 8 can be employed as step size controller 18. Accordingly, in the present apparatus, when a sudden change is detected from an error signal by sudden change detecting circuit 48, re-set step size α 0 is transmitted to multiplier 5 by means of selector 41. The second embodiment of the present invention has been described so far. In the present embodiment, when a step size which is used for the updating of coefficients is calculated using a gradient of power of an error signal, a limit which relies upon the squared value of a step size in advance is provided for a variation of the step size obtained so that the step size may be prevented from being made excessively different from the correct value due to noise obstruction or other factors. Further, the power of the identification error signal is monitored so that, when it is detected that a characteristic of the unknown system of an object for identification has presented a sudden change, the step size is reset in order to achieve both quick convergence and low identification error. Subsequently, a third preferred embodiment of the present invention will be described. Fig. 16 shows construction of an apparatus for identifying an unknown system using an adaptive filter in the present embodiment. The present apparatus is generally constructed such that counter 44, selector 45 and delay element 46 are further added to the apparatus of the second embodiment shown in Fig. 15. Selector 41 is provided on the output side of limiter 17, and output α k of step size controller 8 is directly inputted to selector 41 in place of step size α 0 for re-setting. Function blocks in Fig. 16 which are denoted by the same reference numerals to those of Fig. 15 have the same functions. Output of sudden change detecting circuit 48 for error signals is connected to counter 44 and an input terminal of selector 45 newly added. An output of selector 45 is fed back to the other input terminal of selector 45 by way of delay element 46. Counter 44 starts counting after the output of sudden change detecting circuit 48 changes from "0" to "1", and controls selector 45 such that selector 45 selectively outputs the output of sudden change detecting circuit 48 when the count value of counter 44 is equal to 1, but selectively outputs a signal supplied from delay element 46 while the count value of counter 44 counts from "2" to a threshold value k th supplied from the outside. Accordingly, selector 45 continues to output "1" for a period of time of k th clocks at counter 44 after the output of sudden change detecting circuit 48 changes from "0" to "1". The output of selector 45 controls selector 41. Selector 41 selectively outputs a signal from limiter 17 when "0" is supplied thereto as a controlling signal, but selectively outputs a signal from step size controller 18 when "1" is supplied thereto as the controlling signal. Accordingly, step size α k , which does not undergo any limitation, is supplied to multiplier 5 for a period of time of k th clocks after a sudden change is detected from the error signal, but limited step size α k obtained from limiter 17 is supplied to multiplier 5 in all other cases. The limiter described above with reference to Fig. 14 can be used as it is as limiter 17. The sudden change detecting circuit for error described hereinabove with reference to Fig. 11 can be used as it is as sudden change detecting circuit 48. The third embodiment of the present invention has been described so far. In the present embodiment, when a step size which is used for the updating of coefficients is calculated using a gradient of power of an error signal, a limit which relies upon a step size in advance is provided for a variation of the step size obtained so that the step size may be prevented from being made excessively different from a correct value due to noise obstruction or other factors. Further, the power of an identification error signal is monitored so that, when it is detected that a characteristic of the unknown system of an object for identification has presented a sudden change, the limitation to the step size is cancelled for a fixed period of time in order to achieve both quick convergence and low identification error. Next, a fourth preferred embodiment of the present invention will be described. Fig. 17 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter in the present embodiment. Function blocks in Fig. 17 which are denoted by the same reference numerals to those of Fig. 2 have the same functions. The present apparatus is different from the conventional apparatus shown in Fig. 2 in that averaging circuit 47 is interposed between limiter 9 and multiplier 5. Accordingly, a step size obtained from limiter 9 is supplied to multiplier 5 after it is averaged by averaging circuit 47. The step size obtained from limiter 9 is obstructed by noise sk since noise s k is included in output s k + v k - u k of subtracter 4, and is varied from the original step size by an amount which relies on noise amplitude. Noise amplitude s k is a stochastic process, and the amplitude distribution thereof has no correlation with the amplitude distribution of error signal v k - u k . In other words, since the equation E[s k (v k - u k )] = 0 stands and since E[s k ] = 0 also stands, averaging of the output of limiter 9 will average a variation of the step size caused by the influence of noise. The original step size can be obtained approximately at an output of averaging circuit 47, and the bad influence of step size variation caused by noise can be suppressed. Fig. 18 shows an example of construction of averaging circuit 47. The averaging circuit is composed of two coefficient multipliers 75 and 79, adder 76 and delay element 78. Step size α k is supplied from limiter 9 to input terminal 74. Step size α k is multiplied by β into βα k by coefficient multiplier 75 and transmitted to adder 76. An output of coefficient multiplier 75 and an output of the other coefficient multiplier 79 are added at adder 76 to obtain averaged step size α k , which is transmitted to output terminal 77. Meanwhile, the output of adder 76 is fed back to adder 76 by way of delay element 78 and the other coefficient multiplier 79. Output α k-1 of delay element 78 is multiplied by (1-β) at multiplier 79 into (1-β) α k-1 , which makes a feedback signal to adder 76. Accordingly, output signal α k of averaging circuit 47 is given, using input signal α k , by α k = βα k + (1 - β) α k-1 The convergence characteristic and the final error of the present apparatus rely upon parameter β. When β is great, the convergence is slow, but the final error is small. When β is small, the convergence is fast, but the final error is great. In order to solve the problem, parameter β may be made variable using the output of limiter 9. The fourth embodiment of the present invention has been described so far. In the present embodiment, when a step size which is used for the updating of coefficients is calculated using a gradient of power of an error signal, the step size obtained is averaged so that it may be prevented from being made excessively different from the correct value due to noise obstruction or other factors. Subsequently, a fifth preferred embodiment of the present invention will be described. The present apparatus is different from the apparatus of the fourth embodiment described above in that parameter β which is provided to an averaging circuit is varied in response to an averaged step size which is an output of the averaging circuit and in that an sudden change detecting circuit for error signals is provided to detect a sudden change or fluctuation of the unknown system to change over the step size to β 0 . Fig. 19 shows construction of an apparatus for identifying an unknown system using an adaptive filter in the present embodiment. The present apparatus is different from the apparatus shown in Fig. 17 in that it additionally includes sudden change detecting circuit 48, counter 44, two selectors 45 and 61 and multiplier 62. Further, averaging circuit 60 is connected to receive variable parameter β. Function blocks in Fig. 19 which are denoted by the same reference numerals as those of Fig. 16 or 17 have the same functions. Output of averaging circuit 60 is transmitted to multiplier 5 and newly added multiplier 62. Latter multiplier 62 multiplies an output signal of averaging circuit 60 by positive constant δ and transmits the product to selector 61. Another positive constant β 0 is supplied to the other input terminal of selector 61. Selector 61 thus selectively outputs the output of multiplier 62 or β 0 as a parameter to averaging circuit 60 in response to a controlling signal from other selector 45. When the output of multiplier 62 is supplied to averaging circuit 60, the value obtained by multiplication of the averaged step size by positive constant δ is fed back to averaging circuit 60. Fig. 20 shows an example of the detailed construction of averaging circuit 60. Averaging circuit 60 is a modification of averaging circuit 47 shown in Fig. 18 in that multipliers 301 and 302 replace coefficient multipliers 75 and 79, respectively, for determining a time constant for averaging. Common parameter β i is supplied to multipliers 301 and 302 by way of parameter input terminal 300. Multiplier 301 multiplies a signal from input terminal 74 by β i and transmits the product to adder 76. Multiplier 302 multiplies the output of delay element 78 by (1-β i ) and transmits the product to adder 76. If the step size is averaged using a circuit having a time constant which varies in response to a step size in advance, then some defect takes place in such a case wherein a characteristic of an unknown system to be identified presents a sudden change so that an error signal is suddenly increased. In this instance, step size must necessarily be increased suddenly so that the adaptive filter may follow up the change of the characteristic of the unknown system. However, when the value of step size is averaged with a great time constant, it can present only a moderate change; accordingly, the speed of following up sudden changes of the system is slow. In the present embodiment, sudden change detecting circuit 48 is provided so that, when a sudden change of an error signal is detected, the time constant for averaging is decreased. The sudden change detecting circuit for error signals described hereinabove with reference to Fig. 11 can be used as sudden change detecting circuit 48. Referring back to Fig. 19, an output of sudden change detecting circuit 48 is supplied to counter 44 and selector 45. A feedback signal from delay element 46 is also supplied to selector 45. Counter 44 starts its counting up after the output of sudden change detecting circuit 48 changes from "0" to "1", and controls selector 45 such that selector 45 selectively outputs an output of sudden change detecting circuit 48 when the count value of counter 44 is equal to 1, but selectively outputs a signal supplied from delay element 46 while the count value of counter 44 counts from 2 to threshold value k th supplied from the outside. Accordingly, selector 45 continues to output "1" for a period of time of k th clocks after the output of sudden change detecting circuit 48 changes from "0" to "1". The output of selector 45 controls selector 61. Selector 61 selectively outputs a signal from multiplier 62 when "0" is supplied thereto as a controlling signal, but selectively outputs positive constant β 0 when "1" is supplied thereto as the controlling signal. Accordingly, β 0 is supplied as a parameter to averaging circuit 60 for a period of time of k th clocks after a sudden change is detected from an error signal; consequently, the time constant for step size averaging at averaging circuit 60 is decreased. On the other hand, at any time other than for a period of time of k th clocks after a sudden change is detected from an error signal, the step size averaged by averaging circuit 60 and multiplied by δ is supplied as a parameter to averaging circuit 60. In this instance, the time constant of averaging circuit 60 increases as step size decreases. Accordingly, the time constant is maximum in the converged condition. The fifth embodiment of the present invention has been described so far. In the present embodiment, when the step size which is used for the updating of coefficients is calculated using a gradient of power of an error signal, the step size obtained is averaged so that the step size may be prevented from being made excessively different from a correct value due to noise obstruction or other factors. Further, power of the identification error signal is monitored, and when it is detected that a characteristic of the unknown system for an object of identification has changed suddenly, the time constant for averaging is held decreased for a fixed period of time, thereby achieving both quick convergence and low identification error. In the first to fifth embodiments described above, adaptive filter 3 is controlled using parameter α k ( α k ), which is a variable value of step size α, based on the LMS algorithm. As is apparent from equations (4) and (7) given above, the difference between the LMS algorithm and the LIM algorithm resides in whether α or µ which is obtained by division of α by an average power σ n 2 inputted to the filter is used as the step size. Accordingly, the methods of varying the step size described so far can be applied as they are to the LIM algorithm. Next, a sixth preferred embodiment of the present invention will be described. Fig. 21 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to the present embodiment. Function blocks in Fig. 21 which are denoted by the same reference numerals as those of Fig. 2 have the same functions. The significant difference of the present apparatus from the apparatus shown in Fig. 2 resides in that an output of limiter 17 is fed back to step size controller 108 by way of delay element 101 and normalizing circuit 114 is interposed between multiplier 5 and adaptive filter 3. Further, construction of step size controller 108 is different from that of step size controller 8 shown in Fig. 2 and correlation calculating circuit 107 is externally provided for step size controller 108. Correlation calculating circuit 107 has a pair of outputs, one of which is connected directly to step size controller 108. The other output of correlation calculating circuit 107 is connected to normalizing circuit 114 and also to step size controller 108 by way of delay element 102. Normalizing circuit 114 is provided to normalize the output of multiplier 5 with input power to adaptive filter 3. First, construction of correlation calculating circuit 107 will be described with reference to Fig. 22. Correlation calculating circuit 107 is composed of N delay elements 131 1 to 131 N , 2N multipliers 132 1 to 132 N and 135 1 to 135 N first N-input adder 133 and second N-input adder 136. Delay elements 131 1 to 131 N are connected in series and form a delay line with taps. Reference signal n k is supplied to first delay element 131 1 by way of input terminal 130. Multipliers 132 1 to 132 N calculate products of inputs to and outputs of corresponding delay elements 131 1 to 131 N , respectively, and output the products to first adder 133. In other words, the product of input n k-i+1 and output n k-i of i-th (1 ≤ i ≤ N) delay element 131 i is calculated by i-th multiplier 132 i . First adder 133 calculates the sum total of outputs of multipliers 132 1 to 132 N and outputs the sum total by way of output terminal 134. As a result, the value given by is outputted from first adder 133, and this n k-1 T · n k is outputted as correlation C k from output terminal 134. Multipliers 135 1 to 135 N calculate squares of inputs to corresponding delay elements 131 1 to 131 N , respectively, and output the results to second adder 136. For example, at i-th multiplier 135 i , square n k-i+1 2 of input n k-i+1 to i-th delay element 131 i is calculated. Second adder 136 calculates the sum total of outputs of multipliers 135 1 to 135 N and outputs the sum total to the outside by way of output terminal 137. Accordingly, the value given by is outputted from output terminal 137. Here, P k is an input power to adaptive filter 3. Correlation C k is supplied to step size controller 108, and filter input power P k is supplied to delay element 102 and normalizing circuit 114. Construction of step size controller 108 will be described with reference to Fig. 23. Step size controller 108 is composed of delay element 141, three multipliers 142, 143 and 145, normalizing circuit 147 and adder 148. Normalizing circuit 147 can be constituted from a dividing circuit. Difference signal d k inputted to input terminal 140 is delayed by one sample period by delay element 141 to make d k-1 , which is supplied to multiplier 142. Signal d k is also supplied to multiplier 142, and d k d k-1 which is an output of multiplier 142 is supplied to second multiplier 143. Correlation C k (= n k-1 T n k ) is also supplied to second multiplier 143 from correlation calculating circuit 107 by way of input terminal 144. An output of multiplier 143 is multiplied by ρ by multiplier 145 and supplied to normalizing circuit 147. An output of delay element 102 (Fig. 21), i.e., filter input power P k-1 , is supplied to normalizing circuit 147 by way of input terminal 146. Normalizing circuit 147 normalizes output ρ·d k ·d k-1 · n k-1 T · n k of multiplier 145 with filter input power P k-1 and outputs the result to adder 148. The result of normalization is ρ·d k ·d k-1 · n k-1 T · n k /P k-1 . An output of delay circuit 101 is also supplied to adder 148 by way of input terminal 146. Since an input to delay circuit 101 is an output of limiter 17, the output of delay circuit 101 makes output α k-1 of limiter 17 one sample period earlier. An output of adder 148 is connected to output terminal 150 of step size controller 108. Accordingly, the value given by α k = α k-1 + ρ·d k ·d k-1 ·n k-1 T ·n k /P k-1 is obtained at output terminal 150. Equation (28) has a normalized form of the second term of the right side of equation (10) with P k-1 . By normalization, stabilized control of step size can be achieved even with an unsteady signal. The limiter of conventional construction described above with reference to Fig. 5 can be used as it is as limiter 17. Output α k of limiter 17 is transmitted to delay element 101 and multiplier 5. At multiplier 5, multiplication of the output of limiter 17 and signal dk is performed, and product α k ·d k thereof is supplied to normalizing circuit 114. Also filter input power P k is supplied to normalizing circuit 114 from correlation calculating circuit 107. Normalizing circuit 107 normalizes α k ·d k with P k and transmits thus normalized value α k ·d k /P k to adaptive filter 3. At adaptive filter 3, updating of coefficients is performed using this value α k ·d k /P k . Accordingly, the coefficient updating equation at adaptive filter 3 is given by c k = c k-1 + α k ·d k ·n k-1 /P k Considering that P k is defined by equation (27), equation (29) is equivalent to that of the LIM algorithm given by equation (7), except that step size is controlled adaptively. In particular, in the present embodiment, quick and stabilized convergence can be realized for an unsteady signal compared with the conventional SGA-GAS algorithm. The relation of convergence by the present embodiment to that by the conventional SGA-GAS algorithm is contrasted to the relation of the LIM algorithm to the LMS algorithm. The sixth embodiment of the present invention is described so far, and in the present embodiment, when the step size to be used for the updating of coefficients is calculated using a gradient of power of an error signal, the step size is normalized with a filter input power so that stabilized quick convergence is realized for a nonstationary signal. Subsequently, a seventh preferred embodiment of the present invention will be described. Fig. 24 shows construction of an apparatus for identifying an unknown system using an adaptive filter according to the present embodiment. The present apparatus is different from the apparatus of the sixth embodiment described above in construction of limiter 17 and also in that the output of delay element 101 is also fed back to limiter 17. The limiter in the first embodiment described above with reference to Fig. 9 can be used as it is as limiter 17 in the present embodiment. In this instance, α k is supplied from step size controller 108 to input terminal 23 of Fig. 9. Limited step size α k-1 obtained at output terminal 20 is fed back to input terminal 24 by way of delay element 101. Accordingly, as described above in connection with the first embodiment, step size α supplied to input terminal 23 of limiter 17 is defined for the lower limit thereof by threshold value Th L and a α k-1 and for the upper limit thereof by threshold value Th H and b α k-1 so that the following limited step size α k given by the following equation is obtained: where max{A, B} and min{A, B} represent the maximum value and the minimum value of A and B, respectively. Limited step size α k is transmitted as an output of limiter 17 to multiplier 5 and delay element 101. Since the output of multiplier 5 is applied to adaptive filter 3 by way of normalizing circuit 114, calculation similar to that of the sixth embodiment described above will lead to the following coefficient updating equation at adaptive filter 3: c k = c k-1 + ( α k /P k )·d k ·n k-1 Amplitude distributions of s k and v k - u k are generally independent of each other. Accordingly, E[ s k ] · E[ v k - u k ] = 0 stands. By using α k in place of α k , even if s k causes an obstacle to v k - u k , the instantaneous influence of s k upon v k - u k can be suppressed by means of limiter 17 to obtain a stabilized step size. While stabilization of a step size is achieved by limitation of both the maximum value and the minimum value in the limiter, it is also effective to provide a limitation only for either the maximum value or the minimum value. Further, it is also possible to set a limiting value for an increase of step size and a limiting value for a decrease of step size equal to each other. An example of a limiter which limits the step size with an equal limiting value whether step size is increasing or decreasing is shown in Fig. 25. In the limiter shown in Fig. 25, a feedback signal supplied from delay element 101 to input terminal 24 is multiplied by a at multiplier 25 and is transmitted as a α k-1 to maximum value circuit 27 and minimum value circuit 28. Thereafter, the identifying apparatus which employs the limiter shown in Fig. 25 operates in the same manner as the identifying apparatus which employs the limiter shown in Fig. 9 except that the maximum step size value is limited using min{Th H , a α k-1 } in place of min{Th H , b α k-1 } in equation (30). Further, the limiter in the first embodiment described above with reference to Fig. 14 can be used as limiter 17 in the present embodiment. In case the limiter shown in Fig. 14 is used, considering that step size is normally smaller than 1, limiting values max{Th L , η α k-1 2 } and min{Th H ,  α k-1 2 } for increase and decrease of step size increase in proportion to the squared value of limited step sizes α k-1 occur one sample period earlier. Accordingly, the smaller the step size, the stronger the limitation. As the influence of sk increases, that is, as step size decreases, it becomes more stable. Further, the limiter in the first embodiment described above with reference to Fig. 13 can be used as limiter 17 in the present embodiment. In the limiter 17 shown in Fig. 13, as in the limiter shown in Fig. 25, the limiting value for increase of the step size and the limiting value for decrease of the step size are set equal to each other. In this instance, limited step size α k is given by the following equation: The seventh embodiment of the present invention is described so far. In the present embodiment, when the step size to be used for the updating of coefficients is calculated using a gradient of power of an error signal, step size is normalized with a filter input power so that stabilized quick convergence is realized for an unsteady signal. Further, since a limit which depends upon the earlier step size is provided for the variation of a step size thus obtained, step size can be prevented from being made excessively different from a correct value due to noise obstruction or other factors. Subsequently, an eighth preferred embodiment of the present invention will be described. Fig. 26 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to the present embodiment. If the maximum value and the minimum value for step size are limited using a previous value or values of the step size as in the seventh embodiment described above, then in the case that a characteristic of an unknown system to be identified presents a sudden change so that an error signal is increased suddenly, the identifying apparatus cannot cope with such a sudden change. In this instance, step size must necessarily be increased suddenly so that the adaptive filter may follow up the change of the characteristic of the unknown system. However, when the step size value is limited by a previous value or values thereof, it can present only a moderate change; accordingly, the speed of following up a sudden change of the system is slow. Thus, in the present embodiment, a sudden change in an unknown system to be identified is detected by means of a sudden change detecting circuit for error signals and re-setting of a step size is performed in accordance with the detected result. The apparatus shown in Fig. 26 is generally constructed such that sudden change detecting circuit 111 for error signals and selector 112 are added to the construction of the apparatus shown in Fig. 24. Sudden change detecting circuit 111 receives error signal dk as an input thereto and outputs a controlling signal to selector 112. Selector 112 is interposed between limiter 17 and multiplier 5. Limited step size α k , which is an output of limiter 17, is inputted to an input terminal of selector 112, and predetermined step size α s is inputted to the other input terminal of selector 112. Selector 112 selectively transmits a signal from limiter 17 to multiplier 5 when the controlling signal from sudden change detecting circuit 111 is "0", but selectively transmits predetermined step size α 0 to multiplier 5 when the controlling signal is "1". Sudden change detecting circuit 42 described above in connection with the first embodiment can be used as it is as sudden change detecting circuit 111 of the present embodiment. In particular, any of sudden change detecting circuits 42 shown in Figs. 11 and 12 can be used as sudden change detecting circuit 111. In the sudden change detecting circuit for error signals shown in Fig. 11, a sudden change in error signal d k is detected based on squared value d k 2 of error signal d k . In the sudden change detecting circuit shown in Fig. 12, a sudden change in error signal d k is detected based on absolute value |d k | of error signal d k . Whichever two sudden change detecting circuits for error is used, when a sudden change in error signal d k is detected, a controlling signal of "1" is outputted, and in any other case, another controlling signal of "0" is outputted, from sudden change detecting circuit 111. When a sudden change in error signal dk is detected, predetermined step size α 0 is outputted from selector 112 to multiplier 5. But when no significant change of error signal d k is detected, limited step size α k from limiter 17 is supplied to multiplier 5. That predetermined step size α 0 . is inputted in place of limited step size α k to multiplier 5 means that step size re-setting has been performed. Since predetermined step size α 0 does not rely on a previous step size, even if error signal d k presents a sudden change, the identifying apparatus can cope with the sudden change. The eighth embodiment of the present invention is described so far, and in the present embodiment, when step size to be used for the updating of coefficients is calculated using a gradient of power of an error signal, step size is normalized with a filter input power so that stabilized quick convergence is realized for an unsteady signal. Further, since a limit or limits which depend on previous value of step size are provided for variation of the step size thus obtained, the step size can be prevented from being made excessively different from the correct value due to noise obstruction or other factors. Still further, an identification error signal is monitored, and when it is detected that a characteristic of the unknown system for an object of identification has changed suddenly, the step size is re-set to achieve both quick convergence and small identification error. Subsequently, a ninth preferred embodiment of the present invention will be described. Fig. 27 is a block diagram showing construction of an apparatus for identifying an unknown system using an adaptive filter according to the present embodiment. While, in the eighth embodiment described above, re-setting of a step size is performed when a sudden change in error signal dk is detected, in the present embodiment, the step size limitation is cancelled for a fixed period of time. The apparatus of the present embodiment is different from the apparatus of the eighth embodiment described above in that holding circuit 103 is interposed between sudden change detecting circuit 111 and selector 112 and output ak of step size controller 108 is inputted to selector 112 in place of predetermined step size α 0 . The sudden change detecting circuit for error signals described above with reference to Fig. 11 or 12 can be used as it is as sudden change detecting circuit 111, as in the eighth embodiment described above. When a sudden change of error signal dk is detected by sudden change detecting circuit 111, holding circuit 103 outputs "1" to selector 112 for a fixed period of time beginning with the moment of detection of the change. An example of the construction of holding circuit 103 is shown in Fig. 28. Holding circuit 103 is composed of selector 152, counter 153 and delay element 154. A signal from sudden change detecting circuit 111 is supplied to input terminal 151 and is transmitted to selector 152 and counter 153. An output of selector 152 is supplied to output terminal 155 and is fed back simultaneously to selector 152 by way of delay element 154. Counter 153 resets its counting when "1" is supplied to input terminal 151. When counter 153 has a value between "0" and K th inclusive, it controls selector 152 so as to select a feedback signal from delay element 154 and transmit the same to output terminal 155 so that selector 152 may normally select a signal supplied thereto from input terminal 151. Accordingly, when a sudden change of error signal dk is detected by sudden change detecting circuit 111, the value "1" is inputted to input terminal 151 of holding circuit 103; consequently, value "1" will continue to be supplied to output terminal 155 for a K th +1 sample period after the change is detected. Selector 112 selectively transmits output α k of limiter 17 to multiplier 5 when "0" is outputted from holding circuit 103, but selectively transmits output α k of step size controller 108 to multiplier 5 when "1" is outputted from holding circuit 103. Consequently, when a sudden change in error signal dk is detected, the limitation of the step size is cancelled for a period of time defined by parameter K th at holding circuit 103. The identifying apparatus can cope with a sudden change in error signal d k . The ninth embodiment of the present invention is described so far. In the present embodiment, when the step size to be used for the updating of coefficients is calculated using a gradient of power of an error signal, step size is normalized with a filter input power so that stabilized quick convergence is realized for an unsteady signal. Further, since a limit or limits which depend on a previous value of step size are provided for variation of the step size thus obtained, step size can be prevented from being made excessively different from the correct value due to noise obstruction or other factors. Still further, an identification error signal is monitored, and when it is detected that a characteristic of the unknown system for an object of identification has changed suddenly, the step size limitation is cancelled for a fixed period of time; consequently, both quick convergence and low identification error can be achieved. In the sixth to ninth embodiments described above, the normalized value of step size α k ( α k ) with filter input power P k-1 (P k ) is inputted to adaptive filter 3. The difference between the LMS algorithm and the LIM algorithm resides in whether α is used or a value (µ) obtained by division of α by a filter average input power is used as the step size. The sixth to ninth embodiments can each be considered to be equivalent to the LIM algorithm in which step size µ is made variable. It is to be understood that variations and modifications of the method of and the apparatus for identifying an unknown system using an adaptive filter disclosed herein will be evident to those skilled in the art. It is intended that all such modifications and variations be included within the scope of the invention as defined by the appended claims.

Claims: A method of identifying an unknown system, said method using an adaptive filter (3), which delays a digital input signal successively by one sample period to form a plurality of input signal samples, calculates products between the samples and a plurality of variables provided correspondingly to the plurality of input signal samples, and outputs the sum total of the products, the digital input signal being obtained by sampling a corresponding analog input signal; wherein the unknown system is identified by adding to said variables corresponding differences each of which is a product of (a) a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, (b) the input signal sample corresponding to the variable corresponding to said difference, and (c) a parameter controlling speed and precision of identification to calculate new values of the variables, so that the difference signal may be decreased, characterized in that a value which increases in proportion to the gradient of the difference signal with respect to the parameter is added to the parameter to obtain a sum and the parameter is modified using a limited sum obtained by applying a limit to the sum, wherein the threshold value of the limit is initially given as a constant and continuously modified based on at least one previous value of the limited sum. A method according to claim 1, wherein when it is detected that there is a sudden change in the difference signal, the sum is replaced with a predetermined second constant, and the limited sum is obtained by applying the limit to the thus replaced sum. A method according to claim 1, wherein when it is detected that there is a sudden change in the difference signal, the limited sum is replaced with a predetermined second constant, and then the parameter is modified using the thus replaced limited sum. A method as set forth in claim 2 or 3, characterized in that a sudden change of the difference signal is detected such that a squared value of the difference signal is calculated, and then a maximum value among all the squared values after starting of identification of the unknown system until the number of clocks reaches a predetermined third constant is found, whereafter the maximum value is multiplied by a predetermined fourth constant to obtain a product and then the product is successively compared with the squared values. A method as set forth in claim 2 or 3, characterized in that a sudden change of the difference signal is detected such that an absolute value of the difference signal is calculated, and then a maximum value among all the absolute values after starting of identification of the unknown system until the number of clocks reaches a predetermined third constant is found, whereafter the maximum value is multiplied by a predetermined fourth constant to obtain a product and then the product is successively compared with the absolute values. A method as set forth in any one of claims 1 to 5, characterized in that a value obtained by multiplying the previous limited sum by a predetermined fifth constant, a predetermined sixth constant and the sum are compared with one another and a minimum value among them is found, and the minimum value, a value obtained by multiplying the pervious limited sum by a predetermined seventh constant and a predetermined eighth constant are compared with one another and a maximum of the three is determined as the limited sum. A method as set forth in any one of claims 1 to 6, characterized in that the threshold value is calculated using a squared value of the previous limited sum or sums. A method as set forth in any one of claims 1 to 7, wherein the product among the difference signal, the sample and the parameter is normalized with an input power value of the adaptive filter, the thus normalized product is added as an update amount to the variable to update the variable, and then, a value which increases in proportion to a gradient of the difference signal with respect to the parameter is normalized with the input power value, the value is added to the parameter to obtain a sum and the parameter is modified using a limited sum obtained by applying a limit to the sum. A method of identifying an unknown system, the method using an adaptive filter (3), which delays a digital input signal successively by one sample period to form a plurality of input signal samples, calculates products between the samples and a plurality of variables provided correspondingly to the plurality of input signal samples, and outputs the sum total of the products, the digital input signal being obtained by sampling a corresponding analog input signal; wherein the unknown system is identified by adding to said variables corresponding differences each of which is a product of (a) a difference signal obtained by subtraction of an output of said adaptive filter from an output of the unknown system, (b) the input signal sample corresponding to the variable corresponding to said difference, and (c) a parameter controlling speed and precision of identification to calculate new values of the variables so that the difference signal may be decreased, characterized in that a value which increases in proportion to a gradient of the difference signal with respect to the parameter is added to the parameter to obtain a sum and a limit is applied to the sum to obtain a limited sum, and an average value of the limited sum is calculated and is used for changing the parameter. A method as set forth in claim 9, characterized in that the time constant for calculating the average value is successively calculated using the average value, when it is detected that there is a sudden change in the difference signal, wherein the time constant is replaced by an initial value of the parameter. A method as set forth in claim 10, characterized in that a sudden change of the difference signal is detected such that a squared value of the difference signal is calculated, and then a maximum value among all squared values after starting of identification of the unknown system until the number of clocks reaches a predetermined second constant is found, whereafter the maximum value is multiplied by a predetermined third constant to obtain a product and then the product is successively compared with the squared values. A method as set forth in claim 10, characterized in that a sudden change of the difference signal is detected such that an absolute value of the difference signal is calculated, and then a maximum value among all absolute values after starting of identification of the unknown system until the number of clocks reaches a predetermined second constant is found, whereafter the maximum value is multiplied by a predetermined third constant to obtain a product and then the product is successively compared with the absolute values. An identifying apparatus for identifying a characteristic of an unknown system using an adaptive filter (3), characterized by: a subtracter (4) for subtracting an output of said adaptive filter (3) from an output signal of the unknown system to obtain a difference signal; a step size controller (18) for receiving the difference signal and an input signal to said adaptive filter (3) and successively calculating a step size for use for the updating of coefficients of said adaptive filter (3); a limiter (17) for receiving an output of said step size controller (18) and limiting the received output; a first delay element (10, 11) for feeding back an output of said limiter (17) to said limiter and said step size controller (18); and a first multiplier (5) for multiplying the output of said limiter (17) by the difference signal; and wherein an output of said first multiplier (5) is used as the step size for the updating of coefficients of said adaptive filter (3). An identifying apparatus for identifying a characteristic of an unknown system using an adaptive filter (3), characterized by: a subtracter (4) for subtracting an output of said adaptive filter (3) from an output signal of the unknown system to obtain a difference signal; a correlation calculating circuit (107) for receiving an input signal to said adaptive filter (3) and calculating and outputting a power value and a correlation value of the input signal; a first delay element (110); a second delay element (102) for receiving the power value and delaying the received power value by one sample period to output as a delayed power value; a step size controller (108) for receiving the difference signal, the correlation value supplied from said correlation calculating circuit (107), the delayed power value and an output of said first delay element (110) and successively calculating a step size for use for the updating of coefficients of said adaptive filter (3); a limiter (17) for receiving an output of said step size controller (108) and limiting the received output; a first multiplier (5) for multiplying an output of said limiter (17) by the difference signal; and a first normalizing circuit (114) for normalizing an output of said first multiplier (5) with the power value supplied from said correlation calculating circuit (107); wherein said first delay element (110) delays the output of said limiter (17) by one sample period and feeds back the thus delayed output to said step size controller (108) and said limiter (17); and an output of said first normalizing circuit (114) is used as a step size for the updating of coefficients of said adaptive filter (3). An apparatus as set forth in claim 14, characterized in that said second delay element (102) delays the output of said limiter (17) by one sample period and also feeds back the thus delayed output to said limiter (17). An apparatus as set forth in claim 13, 14, or 15, comprising: an error change detecting circuit (48, 111) for receiving the difference signal and detecting a sudden change of the received difference signal; a first selector (41, 112) for receiving the output of said limiter (17) and a predetermined constant and selectively outputting one of the two received signals in response to an output of said error change detecting circuit (48, 111); wherein said first delay element (11, 110) delays the output of said first selector (41, 112) and feeds back the delayed output of said limiter (17) and said step size controller (18, 108). An apparatus as set forth in any one of claims 13 to 16, characterized in that said step size controller (18) comprises a third delay element (91) for receiving the difference signal and delaying the received difference signal by one sample period, a second multiplier (92) for multiplying an output of said third delay element (91) by the difference signal, a correlation calculating circuit (94) for receiving the input signal to said adaptive filter (3) and calculating a correlation of the input signal, a third multiplier (96) for multiplying an output of said correlation calculating circuit (94) by an output of said second multiplier (92), a fourth multiplier (97) for multiplying an output of said third multiplier (96) by a fixed value, and an adder (98) for adding an output of said fourth multiplier (97) and a previous value of limited step size. An apparatus as set forth in any one of claims 13 to 16, characterized in that said step size controller (18) comprises an error change detecting circuit (42) for receiving the difference signal and detecting a sudden change of the received difference signal, a third delay element (91) for receiving the difference signal and delaying the received difference signal by one sample period, a second multiplier (92) for multiplying an output of said third delay element (91) by the difference signal, a correlation calculating circuit (94) for receiving the input signal to said adaptive filter (3) and calculating a correlation of the input signal, a third multiplier (96) for multiplying an output of said correlation calculating circuit (94) by an output of said second multiplier (92), a fourth multiplier (97) for multiplying an output of said third multiplier (96) by a fixed value, an adder (98) for adding an output of said fourth multiplier (97) and a previous value of limited step size, and a second selector (43) for receiving an output of said adder (98) and a predetermined constant and selectively outputting one of the two received signals in response to an output of said error change detecting circuit (42). An apparatus as set forth in either claim 16 or 18, characterized in that said error change detecting circuit (42, 48) comprises a fifth multiplier (51) for receiving the difference signal and squaring the received difference signal, a counter (53), a third selector (52) for receiving an output of said fifth multiplier (51) and the constant "0" and selecting one of the two received signals in response to an output of said counter (53), a fifth delay element (55), a maximum value circuit (54) for receiving an output of said third selector (52) and an output of said fifth delay element (55) and outputting a maximum value of the two received outputs, a sixth multiplier (56) for multiplying an output of said maximum value circuit (54) by a predetermined fourth constant, and a comparator circuit (57) for comparing an output of said sixth multiplier (56) and the output of said fifth multiplier (51) and outputting information of which of them is greater; and in that said fifth delay element (55) receives the output of said maximum value circuit (54), delays the received output by one sample clock period and feeds back the delayed output to said maximum value circuit (54). An apparatus as set forth in either claim 16 or 18, characterized in that said error change detecting circuit (42, 48) comprises an absolute value circuit (59) for calculating an absolute value of the difference signal, a counter (53), a third selector (52) for receiving an output of said absolute value circuit (59) and the constant "0" and selecting one of the two received signals in response to an output of said counter (53), a fifth delay element (55), a maximum value circuit (54) for receiving an output of said third selector (52) and an output of said fifth delay element (55) and outputting a maximum value of the two received outputs, a sixth multiplier (56) for multiplying an output of said maximum value circuit (54) by a predetermined fourth constant, and a comparator circuit (57) for comparing an output of said sixth multiplier (56) and an output of said absolute value circuit (59) and outputting information of which of them is greater; and in that said fifth delay element (55) receives the output of said first maximum value circuit (54), delays the received output by one sample clock period and feeds back the delayed output to said maximum value circuit (54). An apparatus as set forth in any one of claims 13 to 20, characterized in that said limiter (17) comprises a seventh multiplier for receiving the feedback signal and multiplying the received feedback signal by a predetermined third constant, and a minimum value circuit for receiving an output of said seventh multiplier, the input signal to said limiter and a predetermined fourth constant and detecting a minimum value of the three received signals. An apparatus as set forth in any one of claims 13 to 20, characterized in that said limiter (17) comprises an eighth multiplier for receiving the feedback signal and multiplying the received feedback signal by a predetermined fifth constant, and a second maximum value circuit for receiving an output of said eighth multiplier, the input signal to said limiter and a predetermined sixth constant and outputting a maximum value of the three received signals. An apparatus as set forth in any one of claim 13 to 20, characterized in that said limiter comprises a seventh multiplier for receiving the feedback signal and multiplying the received feedback signal by a predetermined third constant, a minimum value circuit for receiving an output of said seventh multiplier, the input signal to said limiter and a predetermined fourth constant and detecting a minimum value of the three received signals, an eighth multiplier for receiving the feedback signal and multiplying the received feedback signal by a predetermined fifth constant, and a second maximum value circuit for receiving an output of said eighth multiplier, an output of said minimum value circuit and a predetermined sixth constant and detecting a maximum value of the three received signals. An apparatus as set forth in any one of claims 13 to 20, characterized in that said limiter (17) comprises a ninth multiplier for receiving the feedback signal and squaring the received feedback signal, a tenth multiplier for multiplying an output of said ninth multiplier by a predetermined seventh constant, and a minimum value circuit for receiving an output of said tenth multiplier, the input signal to said limiter and a predetermined eighth constant and detecting a minimum value of the three received signals. An apparatus as set forth in any one of claims 13 to 20, characterized in that said limiter (17) comprises a ninth multiplier for receiving the feedback signal and squaring the received feedback signal, an eleventh multiplier for multiplying an output of said ninth multiplier by a predetermined ninth constant, and a third maximum value circuit for receiving an output of said eleventh multiplier, the input signal to said limiter and a predetermined tenth constant and detecting a maximum value of the three received signals. An apparatus as set forth in any one of claims 13 to 20, characterized in that said limiter (17) comprises a ninth multiplier (206) for receiving the feedback signal and squaring the received feedback signal, a tenth multiplier (26) for multiplying an output of said ninth multiplier (206) by a predetermined seventh constant, a minimum value circuit (28) for receiving an output of said tenth multiplier (26), the input signal to said limiter (17) and a predetermined eighth constant and detecting a minimum value of the three received signals, an eleventh multiplier (25) for multiplying an output of said ninth multiplier (206) by a predetermined ninth constant, and a maximum value circuit (27) for receiving an output of said eleventh multiplier (25), an output of said minimum value circuit (28) and a predetermined tenth constant and outputting a maximum value of the three received signals. An apparatus as set forth in any one of claims 13 to 16, characterized in that said limiter (17) comprises a twelfth multiplier for receiving the feedback signal and multiplying the received feedback signal by a predetermined seventh constant, a thirteenth multiplier for multiplying an output of said twelfth multiplier by the feedback signal, a minimum value circuit for receiving an output of said thirteenth multiplier, the input signal to said limiter and a predetermined eighth constant and detecting a minimum value of the three received signals, and a third maximum value circuit for receiving an output of said thirteenth multiplier, an output of said minimum value circuit and a predetermined tenth constant and outputting a maximum value of the three received signals. An apparatus as set forth in any one of claims 13 to 27, characterized in that said step size controller (108) comprises a third delay element (141) for receiving the difference signal and delaying the received difference signal by one sample period, a second multiplier (124) for multiplying an output of said third delay element (141) by the difference signal, a third multiplier (143) for multiplying the correlation value by an output of said second multiplier (142), a fourth multiplier (145) for multiplying an output of said third multiplier (143) by a fixed value, a second normalizing circuit (147) for normalizing an output of said fourth multiplier (145) with the power value supplied from said correlation calculating circuit (107), and an adder (148) for adding an output of said second normalizing circuit (147) and the output of said first delay element (101, 110). An identifying apparatus for identifying a characteristic of an unknown system using an adaptive filter (3), characterized by: a subtracter (4) for subtracting an output of said adaptive filter (3) from an output signal of the unknown system to obtain a difference signal; a step size controller (8) for receiving the difference signal and an input signal to said adaptive filter (3) and successively calculating a step size for use for the updating of coefficients of said adaptive filter (3); a limiter (9) for receiving an output of said step size controller (8) and limiting the received output; an averaging circuit (47, 60) for receiving an output of said limiter (9) and calculating an average value from the received output; and a multiplier (5) for multiplying an output of said averaging circuit (47,60) by the difference signal; wherein an output of said multiplier (5) is used as a step size for the updating of coefficients of said adaptive filter (3). An apparatus as set forth in claim 29, comprising an error change detecting circuit (48) for receiving the difference signal and detecting a sudden change of the received difference signal; a counter (44) for receiving an output of said error change detecting circuit (48) and counting clocks; a delay element (46); a first selector (44) for receiving an output of said error change detecting circuit (48) and an output of said delay element (46) and selectively outputting one of the two received outputs in response to an output of said counter (44); and a second selector (61) for receiving an output of said averaging circuit (60) and a predetermined constant and selectively outputting one of the two received signals in response to an output of said first selector (45); wherein said first delay element (46) delays the output of said first selector (45) and feeds back the delayed output to an input of said first selector (45).

Inventors: SUGIYAMA AKIHIKO, SUGIYAMA, AKIHIKO, SUGIYAMA, AKIHIKO, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1992
Main classification: H03H21
IPC codes: H03H21