Fabrication of GaAs devices with doped regions and devices so produced

Abstract: High carrier concentration, as well as abrupt change in such concentration in GaAs-based devices, is the consequence of selection of tin dopant-containing precursor compounds as used during layer growth. Alkyl tin compounds, as used during MetalOrganic Molecular Beam Epitaxy, are of particular value in the growth of pnp heterojunction bipolar transistors, likely in conjunction with other devices in large scale integrated circuits.

Description: Background of the Invention 1. Technical Field The invention relates to a process for making gallium arsenide based devices - devices including one or more regions of GaAs, AlGaAs, InGaAs. Primary use is in integrated circuits with function dependent upon electronic, photonic or hybrid properties. A significant category of electronic circuits incorporates heterojunction bipolar transistors having n-doped base regions. 2. Description of the Prior Art It has been decades since the first confident prediction that silicon would yield to compound semiconductors, III-Vs, II-VIs, as well as ternaries and quaternaries, resulting in activity often provoked by the particularly favorable properties of GaAs and variants, e.g. AlGaAs, InGaAs as well as higher order compositions containing sufficient retained Ga and As to be equivalent to the approximately 45 mol % GaAs as required for assurance of direct bandgap and related device properties.) The prediction largely concerned fundamental characteristics, in large measure due to direct bandgap - ≈1.4 electron volts for the binary material; a value which can be altered to suit device needs by incorporation of other elements in group III or V sites. Operational advantages relative to silicon were correctly appreciated as offering significantly increased speed of operation as well as versatility in operating wavelength extending to photonic. Failure for such GaAs-based devices to broadly supplant silicon is to large extent based on a now-familiar economic pattern. Significant cost entailed switching to the new material - in equipment design/replacement and in retraining of workers provoked effort to stay with silicon. Intensive worldwide effort has yielded ever-improving silicon devices with realization of properties previously expected to require substitution by GaAs. With respect to most prevalent LSI/VLSI structures, as exemplified by e.g. megabit and larger capacity chips, the likely correct view is to continued dominance of silicon. Fundamental properties of GaAs, however, suggest substitution for silicon in specialized device classes. Present use in radiation detectors, e.g. in radar detectors, is based on speed - on response time which in present GaAs devices may be of the order of 60 GHz as compared with speeds of 2-4 GHz as offered by similar structures made of silicon. Of course, GaAs offers photonic properties not available by use of silicon. Related promise of high density integrated laser structures - at this time particularly of S urface E mitting L asers - increases significance of this aspect. While GaAs has, to some minor extent, fulfilled such promise, use has been limited by a number of processing and composition limitations. Summary of the Invention Increased flexibility in design of devices, dependent upon one or more regions of GaAs-based material, results from fabrication/growth techniques entailing introduction of n-dopant, tin from any of a specified class of precursor compounds represented e.g. by tetraethyl tin. As introduced in MetalOrganic Molecular Beam Epitaxy (MOMBE), decreased segregation of tin at compositional interfaces permits attainment of abrupt junctions as desired for contemplated devices as disclosed by Y.KAWAGUCHI et al in Journal of Crystal Growth, vol 95, N°1-4, February 1989, pp. 181-184. As compared with use of elemental tin source material with its generally unacceptable segregation, the new process permits well-controlled n-type carrier concentration into the 10 19 cm -3 range without segregation. A similar advantage is realized relative to more common silicon n-doping in which inability to attain such high n-type carrier concentration is due to the fact that silicon becomes amphoteric above ≈ 3 x 10 18 cm -3 . An experimentally realized carrier concentration of 1.5 x 10 19 cm -3 may translate into a speed advantage of at least twice relative to Si doping. The layers formed by the process of the invention can be used in circuit elements which, gain from the higher n-type carrier concentrations now available. An important category is the HBT Pnp's which gain functional advantage as a consequence of such permitted increased concentration. Higher n-type doping capability permits reduction of thickness of n-type base regions (increased from the 3-5x 10 18 cm -3 of earlier work, to the 1.5x 10 19 cm -3 permitted in accordance with an embodiment of the invention, translates into a thickness reduction of about 4x). Carrier transit time through the base region dominates the total transit time of a now-possible Pnp HBT with a resulting device speed improvement of twice. A practical advantage, facilitating fabrication of small design rule integrated circuits, results from lowered contact resistance - an advantage realizable in complementary HBT Npn structures. Integrated circuits containing such complementary Pnp and Npn structures as well as a variety of other devices, are included in the invention. Included circuits may be all-electronic, all-optical, or hybrid. Brief Description of the Drawing FIG. 1 is a schematic view of a device illustrating a device class of particular relevance in terms of the invention. FIG. 2 on coordinates of concentration on the ordinate and depth on the abscissa is referred to in a discussion of relationship as between these two parameters in a finally fabricated junction, with values as yielded by "secondary ion mass spectrometry" during sputter-removal of the GaAs-based material. FIG. 3 on the same coordinates of concentration and depth compares junction characteristics as yielded by use of a source of the invention compared with use of elemental tin. Detailed Description Composition Most intense activity in compound semiconductors has concerned GaAs-based material, to which the invention is directed. The inventive teaching is with a view to lattice matching - generally for epitaxial growth on substrates of the prototypical compound GaAs. Device-relevant materials are accordingly generally described as pseudomorphic with the binary material, GaAs. Emphasis on such materials, while largely owing to acknowledged device properties, is in part due to the advanced state of development of GaAs relative to other III-V's. From a practical standpoint, and in terms of promising device categories involving epitaxial layer growth, contemplated materials are those having lattice constants to permit growth of device-functional crystalline perfection. This consideration must take a number of factors into account. For example, requisite perfection, which in any event depends upon intended device function, varies with grown layer thickness-greater mismatch is permitted or sometimes even desired as enhancing device operation due to strain accompanying lattice mismatch. Mismatch is more easily accommodated for thinner layers. Compositional variation, as permitted by such considerations, is dictated by desired device properties. Contemplated materials generally contain at least 45 at.% gallium, in many instances at least 60 at.%, in the III site. Aluminum is, at this time, the most significant added element. AlGaAs compositions are of larger bandgap than that of the binary composition, with the gap increasing in magnitude with increasing aluminum but going from direct to indirect (with the crossover for otherwise substituted AlGaAs compositions, at about 45 at.% unsubstituted Ga). Indium, the second most probable substitution, itself forms a direct bandgap composition when combined with arsenic, so that its inclusion may permit larger substitution for gallium - e.g. leaving less than the 45 at.% retained gallium noted above. Consistent with lattice and composition limitations set forth, other substitutions may serve device needs. Indium is a prominent candidate, with amounts of 5-20 at.% (as above, based on total site III occupation) resulting in higher carrier mobility, associated with lowered bandgap - resulting gap value of from ≈ 1.37 to ≈ 1.2 ev. Indium substitution is illustrative of likely compromise with a view to device operation. An advantage of GaAs-based devices is the high power capability due to increased bandgap. Specific composition involving choice/amount of indium/aluminum should be with a view to the importance to be placed on the two device properties, carrier mobility as increased by indium (speed/frequency) relative to power capability as increased by aluminum. Device-significant properties owing to processes of the invention, including attainability of high n-type carrier doping concentration, and ability for abrupt change both in concentration and in net carrier type, have been measured in binary, ternary and quaternary combinations of (Ga,Al,In) (As,P). Important use of the invention is dependent upon AlGaAs compositions. Attention to this GaAs-based class of compositions is largely due to increased bandgap with its various device implications. Our concurrently filed European Patent Application claiming priority from US application no. 662,549 describes and claims fabrication of aluminum-containing compositions, e.g. AlGaAs compositions that enjoy a number of advantages. That related application depends on a particular category of aluminum-source materials - coordinatively saturated compositions of sufficient vapor pressure to satisfy MOMBE and other requirements. Examples are trimethylamine alane and ethyl and butyl homologs. Absence of Al-C bonding in the source avoids introduction of elemental carbon with the aluminum. Carbon is a p-type dopant, and its avoidance facilities production of controllable conductivity-particularly in n-type and intrinsic conductivity material. Since such precursor compositions, specified in the co-filed application, do not form volatile Al-O species, unwanted introduction of oxygen is avoided. Oxygen incorporation is of consequence both in electronic and optical devices - in the former it decreases n-carrier concentration to affect gain; in the latter it serves as a non-radiative recombination center, e.g. to reduce brightness. Methods of this co-filed U.S. application are clearly preferred for aluminum-containing species of this invention. Use was made of such methods in the fabrication of aluminum-containing regions of devices described in the Examples. Processing Considerations To a great extent, the invention gains by use of the described processing - particularly with regard to dopant introduction and associated material growth (usually layer growth). Even process-independent device designs were initially an outgrowth of such processing. Processing of the invention invariably entails introduction of n-type dopant (of tin) from the category of gas phase source materials indicated, by use of the process here referred to as MOMBE (considered by some as overlapping or alternatively denoted "Gas Source Molecular Beam Epitaxy" or "Chemical Beam Epitaxy"). MOMBE is adequately described in the literature (see, for example, G. J. Davies et al, Chemtronics , vol. 3, p. 3 (1988)). It is intended that such references serve as basis for determination of general processing parameters, to the extent that the inventive advance does not otherwise specify (e.g. as dependent upon specific source materials). Growth of multi-element compositions regarding host material (e.g. AlGaAs) as well as dopant, may be based on MOMBE alone or in combination with one or more different methods for introduction of different elements. MOMBE is, in accordance with the invention, necessarily employed in the introduction of tin. It may serve, also for introduction of one or more of the other required elements as for the host material elements Ga and As. Alternatively, different methods may be used. For example, MBE may serve for introduction of elements other than tin required in the growth of such a layer. Other portions of the device - layers not dependent for function on tin doping - may be grown by MBE or even by MOCVD (the latter by definition operating at substantially higher pressures, and accordingly, generally requiring removal of the device under fabrication from the high vacuum MOMBE chamber). A survey of such processes is set forth in W. T. Tsang, J. Electron. Mater., p. 235 (1986). While detailed information is to be derived from such references, it is useful to briefly outline the nature of MOMBE. MOMBE combines the gaseous sources of MOCVD with the UHV growth environment of MBE. This combination produces a molecular beam of gaseous molecules which decompose on the heated GaAs substrate surface. In order to maintain molecular flow in the growth chamber, the total pressure in the chamber is maintained at levels < 10 -3 Torr. While MBE, by common definition, uses only elemental sources for the Group III, Group V, and dopant elements, MOMBE can utilize any combination of elemental and gaseous sources, provided that at least one or more of the Group III or dopant elements are supplied via the use of a gaseous source. Devices/Circuits Primary value of the invention is realized in present and future state-of-the-art structures - importantly, integrated circuits, at this time built to design rules of ≈ 2 µm; in the future likely to be of reduced scale - 1 µm and submicron, perhaps to one or a few tenths of a micron. Pronounced advantages of the inventive approach are of increasing importance as applied to such structures in that they include increased speed (a driving force toward reduced scale) as well as the increased power (associated with the increased bandgap of the contemplated GaAs-based materials - a parameter of particular consequence with increased miniaturization). Description of FIG. 1 is first in generalized terms, and thereafter in terms of two Examples, - the first descriptive of a Pnp. (Consistent with general usage the upper case "P" refers to a region of broad band relative to the narrow band suggested by the use of the lower case "p". Also consistent with such use, the designation, e.g. Pnp does not specify position, so that the "P" may be initially or finally grown.) The second Example relates to the complementary structure - to the Npn. As described above, invention-permitted Pnp designs result in speed advantage as due to thinned base regions permitted by increased carrier concentration. Additional operating advantages result from carrier concentration increase. Among these are lowered parasitic resistance, in turn increasing f max (the figure of merit of device frequency as affected by gain - the extrapolation of the maximum available gain v. frequency curve to 0 gain). Low parasitic resistance derives from lowered contact resistance and lowered sheet resistance in the base region. Complementary Npn structures benefit in the same manner from reduced parasitic resistance associated with reduced contact resistance there permitted in emitter and/or collector regions as tin-doped in accordance with the invention. FIG. 1 is used in description of the "emitter-up" as well as the inverted structure, the "collector-up" device. Description is initially in terms of the former. The device 10 depicted in FIG. 1 consists of substrate 11 supporting successively grown layers 12, serving as sub-collector, collector 13, and base region 14, in turn consisting of layers 15, 16 and 17. It is convenient to describe layer 16 as the functional base layer with embracing layers 15 and 17 (generally compositionally graded) serving as spacer regions (some writers refer to the entirety of region 14 as the base region). Next, the emitter layer 18 is followed by optional layer 19 and finally by layers 20 and 21, the three constituting the emitter contact region in usual nomenclature. The collector-up device in similar terms consists of substrate 11 followed by emitter contact 12, optional emitter contact layer 12a (layer 12a, if included, is compositionally/conductively graded), emitter layer 13, base layer 14 in turn consisting of the functional base layer 16 sandwiched between spacer/graded layers 15 and 17, followed by collector layer 18, and finally by the collector contact region made up of layers 20 and 21. The optional graded layer 12a, serving the function of graded layer 19 in the emitter-up structure, is useful as between embracing layers to assure a smooth transition (where, as in preferred embodiments, the embracing layers are of different compositions - e.g. of an AlGaAs composition (layer 18) and of the binary GaAs composition (layer 20)). Description of this figure is largely in terms of device-function advantage uniquely gained by use of inventive processing - advantage importantly in terms of response time, or more generally in terms of increased operating speed. While certainly of consequence with attention to specific device elements, there is far greater consequence in terms of realizable gain in terms of circuitry, e.g. integrated circuits, entailing other devices. A graphic example entails the HBT Npn structure previously described by the inventors (see vol. 55, no. 17, App. Phys. Let ., pp. 1750-2 (Oct. 23, 1989)). This earlier reported work concerns device advantages for p-base Npn structures which derive from facility for increased and controlled p-type doping resulting from carbon doping, again from gaseous source material, e.g. trimethylgallium, in the course of MOMBE growth. As significant as this earlier work is, the overall value is multiplied by combination with complementary devices in accordance with the process of the invention. Operation of circuits, importantly Integrated Circuits, containing both Npn's and Pnp's of improved response time is properly described as synergistic. Stated differently, the invention permits fabrication of integrated circuits of overall performance advantage exceeding the arithmetic sum of that of the two types of devices. The complementary HBT-containing IC is expected to receive early commercial attention. There are, in addition, well-established functions which are well-satisfied by unipolar device elements (MOS, MESFET, HEMT). Gains are realizable from the invention in terms of such elements themselves (based on lowered contact resistance, or simply on fabrication convenience). Operational advantages are again realized in IC's containing two or more types of elements - in IC's including unipolar devices as well as highly-doped HBT's with layers of the invention. FIG. 2 is a plot of dopant level - of tin level - as produced under conditions used in the fabrication of an emitter-up structure discussed in terms of FIG. 1. The abscissa layer depth of 1 µm, made up in turn of high tin doped region 30 embraced between relatively low n-type conductivity regions 31 and 32 is of dimensions appropriate to present state-of-the-art integrated circuits. Broken curve 33, representing aluminum content, in arbitrary units, is included as showing substantial independence of attained tin doping level as between AlGaAs and GaAs regions. The SIMS Profile shown as solid line 34 is of particular consequence in illustrating the abruptness of n-carrier concentration change (1.5 - 2 orders of magnitude within a layer depth of 500 Å). Other experimental work reveals similar abruptness over a carrier concentration change of about the same size from a maximum of 1.5 x 10 19 cm -3 Sn. FIG. 3 contains two curves 40 and 41 in terms of tin concentration on the ordinate and layer depth on the abscissa. The purpose of the plot is to illustrate the abruptness of doping level attainable by means of the inventive processes. Experiments corresponding with both curves were designed to yield three levels of concentration of n-type carrier concentration - sublayers 42, 43 and 44 each approximately 1/3 of the total layer depth and each of a uniform carrier density. The objective is substantially achieved for the present processing approach (curve 40) which is representative of tin concentrations of ≈ 5 x 10 17 ,4 x 10 18 and 2 x 10 19 for sublayers 42, 43 and 44 in that order. Variation in furnace temperature to yield three corresponding flux levels in the use of a prior art elemental tin source resulted in the sloping regions shown (curve 41). The form of curve 41 is consistent with earlier experience based on use of elemental tin. Unlike e.g. the interface between layers 42 and 43 as exhibited by the abrupt change on curve 40, increasing tin concentration as yielded from an elemental tin source was not instantaneous with flux change but required some substantial buildup time, so resulting in the sloped regions shown. Examples comprising Sn-doped III-V layers: Example 1 Reference is made to FIG. 1 in detailed description of conditions used in the fabrication of an emitter-up Pnp device. Much of the data is set forth in the form of a table (number designations in column 1 correspond with the reference numbers in the figure). Pnp: Growth Temperature = 500°C Layer (Time:Thickness) Composition Source Source Temp (°C) Carrier Gas Flow Rate (SCCM) Bubbler Pressure (Torr) 20 Emitter GaAs:C TMG -9.4 5 60 Contact (441 sec:2000 Å) As H 3 - 5 - 19 Graded Al x Ga 1-x As:C TMG -9.4 0.7 to 5 60 to 70 Layer TMAA1 9.2 10 to 0 6 to 1.5 (70 sec: 200 Å) AsH 3 - 25 to 5 - 18 Emitter Al .35 Ga .65 As:C TMG -9.4 0.7 70 (400 sec:800 Å) TMAA1 9.2 10 6 AsH 3 - 25 - 17 Base Al .35 Ga .65 As TEG 11.9 1.1 6 (109 sec:100 Å) TMAA1 AsH 3 9.2 - 10 5 6 - 16 Base GaAs TEG 11.9 4 6 (13 sec:35 Å) AsH 3 - 10 15 Base GaAs:Sn TEG 11.9 4 6 (150 sec:700 Å) TESn -6.7 7 6 AsH 3 - 10 - 13 Collector GaAs:C TEG 11.9 1.1 6 (2000 sec:4000 Å) TMG -9.4 0.7 70 AsH 3 - 25 - 12 Sub-collector GaAs:C TMG -9.4 5 60 (882 sec:4000 Å) AsH 3 - 5 - Carrier concentration in base region 15, in this instance essentially constant, was about 1.5x 10 19 cm -3 . Example 2 The device fabricated in accordance with this example, again of the configuration shown as FIG. 1 was of Npn configuration and, accordingly, was constituted of the layers identified in discussion of that variation. Fabrication data is again set forth in tabular form. Npn: Growth Temperature = 500°C Layer (Time:Thickness) Composition Source Source Temp (°C) Carrier Gas Flow Rate (SCCM) Bubbler Pressure (Torr) 21 Emitter In x Ga 1-x As:Sn TMI 15 0.8 to 8.0 4.2 Contact TEG 11.9 4.0 to 0.4 6 (80 sec:300 Å) TESn -6.8 6.0 to 13.1 6 AsH 3 - 10 - 20 Emitter Cap o GaAs:Sn TEG 11.9 4.0 6 (533 sec:2000 A) TESn -6.8 6 6 AsH 3 - 10 - 19 Emitter Graded Al x Ga 1-x As:Sn TEG 11.9 2.4 to 4 6 Layer TMAAl 9.2 10 to 1 7 (60 sec:200 Å) AsH 3 - 7.5 to 10 - TESn 6.8 3.4 to 6 6 18 Emitter Al .3 Ga .7 As:Sn TEG 11.9 2.4 6 (240 sec:800 Å) TMAA1 9.2 10 7 TESn -6.8 3.4 6 AsH 3 - 7.5 - 14 Base GaAs:C TMG -9.4 4 60 (200 sec:700 Å) AsH 3 - 5.5 - 13 Collector GaAs:Sn TEG 11.9 4 6 (1333 sec:5000 Å) TESn -6.8 0.3 95 AsH 3 - 10 - 12 Sub-collector GaAs:Sn TEG 11.9 4 6 (1333 sec:5000 Å) TESn -6.8 15 95 AsH 3 - 10 - Experimental evidence set forth in this example served as basis for FIG. 2. As noted, this and other experimental information is representative of both high available n-carrier concentration and abrupt transition as between such high concentration level and lower level n-type, or alternatively, as between n-type and p-type material. Data is set forth in tabular form of the general format of the preceding examples. Growth Temperature = 500°C Time Layer Composition Source Source Temp (°C) Carrier Gas Flow Rate (SCCM) Bubbler Pressure (Torr) 15 min. GaAs TEG 11.9 3.0 6.0 AsH 3 - 5.0 - 15 min. GaAs:Sn TEG 11.9 3.0 6.0 TESn -6.8 2.0 6.0 AsH 3 - 5.0 - 15 min. A1 .28 Ga .72 As:Sn TEG 11.9 1.8 6.0 TMAA1 9.2 10.0 6.0 TESn -6.8 2.0 6.0 AsH 3 - 5.0 - 15 min. A1 .28 Ga .72 As TEG 11.9 1.8 6.0 TMAA1 9.2 10.0 6.0 AsH 3 - 5.0 - 30 sec. GaAs TEG 11.9 4.0 6.0 AsH 3 - 5.0 - The table here set forth represents salient conditions responsible for FIG. 3. Growth Temperature = 600°C Time Layer Composition Source Source Temp (°C) Carrier Gas Flow Rate (SCCM) Bubbler Pressure (Torr) 15 min. GaAs:Sn TEG 11.9 4.0 6.0 TESn -6.8 14.0 6.0 AsH 3 - 10.0 - 15 min. GaAs:Sn TEG 11.9 4.0 6.0 TESn -6.8 8.0 24.0 AsH 3 - 10.0 - 15 min. GaAs:Sn TEG 11.9 4.0 6.0 TESn -6.8 4.0 72.0 AsH 3 - 10.0 -

Claims: Process for making an integrated circuit including at least one device comprising an n-type conductivity GaAs-based crystalline region of composition consisting essentially of ternary compounds selected from the group consisting of GaAlAs and GaInAs, said process comprising epitaxially growing a layer of said composition on a substrate, said n-type conductivity being at least in part due to tin-doping, in which tin-doping is achieved during Metal Organic Molecular Beam Epitaxy, herein designated "MOMBE", entailing decomposition of gaseous source material consisting essentially of alkyl tin, and in which the rate of introduction and/or decomposition of such source material is varied during growth of the region. thereby producing a corresponding carrier variation in n-carrier concentration, CHARACTERIZED IN THAT the substrate is a GaAs-based substrate material having the lattice dimensions of GaAs. Process of claim 1 in which at least 45 at. % of Ga is retained, in which such n-type conductivity is essentially due to said decomposition, in which the said tin-doping is carried out during MOMBE growth of the said GaAs-based material of the said region, in which variation in rate of introduction is primarily responsible for said carrier variation in n-carrier concentration and in which said alkyl tin consists essentially of tetra-alkyl tin. Process of claim 2 in which rate of introduction of such source material is varied over such limits during such time as to result in the said carrier variation in n-carrier concentration the said carrier variation being a minimum of an order of magnitude within a thickness distance of 0.5 micrometer. Process of claim 3 in which the said thickness distance is of a maximum of 0.1 micrometer. Process of claim 4 in which the carrier concentration attains a maximum concentration of greater than 3x10 18 cm -3 at least at some location within the said region. Process of claim 5 in which the said maximum concentration is greater than 7x10 18 cm -3 . Process of claim 6 in which the said maximum concentration is greater than 1 x 10 19 cm -3 . Process of claim 7 in which the said device is a bipolar transistor. Process of claim 8 in which the said device is a heterojunction bipolar transistor, and in which the said region constitutes at least a portion of the base region. Process of claim 9 in which the said integrated circuit includes at least one additional device differing from that recited. Process of claim 10 in which the additional device is a bipolar transistor having a p-type doped base region. Process of claim 7 in which the said region constitutes a contact region.

Inventors: ABERNATHY CAMMY RENEE, REN FAN, ABERNATHY, CAMMY RENEE, REN, FAN, Abernathy, Cammy Renée
Applicants: AT & T CORP, AT&T CORP.
Application year: 1992
Main classification: H01L21
IPC codes: H01L29, H01L21