Active matrix electro-optic display with close-packed arrangement of diamond-shaped pixels

Abstract: An active matrix liquid crystal display device has diamond-shaped pixels (42) arrayed in a close-packed arrangement, and interconnected by row and column electrodes (44,46) which zigzag between the pixels, each column electrode (46) extending between and being common to two columns of pixels and their associated thin film switches (66, 68), and the column electrode-switch connections alternating sequentially between pixel columns.

Description: This invention relates to an active matrix electro-optic display device comprising an array of parallelogram or approximately parallelogram shaped pixel electrodes arranged in rows and columns, a switch associated with each pixel electrode, and an array of row and column electrodes, the column electrodes extending between two directly adjacent columns of pixel electrodes, the row electrodes extending between two directly adjacent rows of pixel electrodes, the switches interconnecting the column electrodes to the pixel electrodes via column electrode-switch connections. Examples of such electro-optic display devices are liquid crystal devices currently being developed for television applications; these generally are of the active matrix type in which an array of display cells is defined by an array of pixel electrodes on one wall of the device, and in which the display cells are controlled by a matrix of row and column electrodes connected to the pixel electrodes through switches, e.g., thin film transistors. One consideration in designing the pixel array is the amount of brightness which is desired for the display. Since the brightness is related to the amount of light transmitted by the device, it is important to minimize the area covered by non-transmissive features such as the switches and the row and column electrodes. The usual practice is to render the entire inter-pixel area non-transmissive in order to enhance the contrast of the display. The brightness of such displays is thus directly related to the percentage of the display area which is occupied by pixels. Another consideration in designing the pixel array is the resolution desired for the display. Pixels in current displays are arranged in an orthogonal pattern ("manhattan layout") with the row address lines parallel to the x axis of the display and the column address lines parallel to the y axis (Figure 1). In some displays, the rows may be staggered to produce a higher effective horizontal resolution (Figure 2). In Japanese patent application 63-142330, an active matrix liquid crystal display device is described which has a close-packed array of hexagonal-shaped pixels, said to have increased display area due to the smaller periphery per surface area of the hexagonal pixels over square or rectangular pixels, leading to shorter row and column lengths on the periphery of the pixels, as well as the elimination of longitudinal and transverse stripe-shaped artifacts which occur with square and rectangular pixels. However, the row and column lines are actually longer in this hexagonal design since they zigzag. Also, the increased area-to-periphery ratio advantage of this design is largely nullified because the row and column lines are parallel to each other over 1/3 of the periphery of each pixel. It is an object of the invention to provide a display device of the kind described in the opening paragraph in which the effective resolution is increased. Such a display device may be particularly advantageous in projection applications. It is another object of the invention to simultaneously increase (maximize) the effective resolution and the light transmission of the display device. It is another object of the invention to provide such a device in which edge effects such as stripe-shaped artifacts are reduced or eliminated. It is another object of the invention to provide a compact arrangement of row and column electrodes for interconnecting such an array. It is another object of the invention to provide such a compact arrangement which includes storage capacitors. The electro-optic display device may comprise an electro-optic material such as a liquid crystal sandwiched between opposing walls, at least one of which is transparent. An active matrix electro-optic device according to the invention is characterized in that the switches interconnect each column electrode to the pixel electrodes of both its directly adjacent columns of pixel electrodes, the column electrode-switch connections alternating sequentially between said two columns of pixel electrodes and said pixel electrodes are oriented to have their opposing corners aligned along said row and column directions respectively. In the corners and along the edges of the pixel electrodes variations in the prallelogram-shape may exist due to the presence of e.g. metallization, contacts etc. USP 4,965,565 shows a device in which switches interconnect row electrodes to column electrodes, the column electrode-switch connections alternating between two columns of pixel electrodes. These columns however are not directly adjacent; moreover the pixel electrodes are not oriented to have their opposing corners aligned along the row and column directions, which leads to longer column lines. In accordance with a preferred embodiment of the invention, the row electrodes comprise legs extending between adjacent sides of the pixel electrodes and join (at approximately 90 degrees, for example) near the corners of the pixel electrodes, thereby following a zigzag pattern between the rows of pixel electrodes. In accordance with another preferred embodiment of the invention, the column electrodes also follow a zigzag pattern between the columns of pixel electrodes. In accordance with yet another preferred embodiment of the invention, the row and column electrodes cross over along adjacent sides of the pixel electrodes, most preferably at substantially the mid-points of the adjacent sides. In accordance with still another preferred embodiment, the switches are dual gate thin film transistors. Figure 1 is a diagrammatic plan view of one arrangement of pixels in a matrix LCD of the prior art; Figure 2 is a diagrammatic plan view of another arrangement of pixels in a matrix LCD of the prior art; Figure 3 is a diagrammatic cross section of a matrix LCD of the prior art; Figure 4 is a diagrammatic plan view of one embodiment of a pixel arrangement for an active matrix LCD of the invention; and Figure 5 is an enlargement of a portion of the arrangement of Figure 4, showing one pixel and portions of the surrounding structure. A cross section of a twisted nematic LCD of the prior art for operation in the transmissive mode is shown in Figure 3 of two glass supporting plates 1 and 2, supporting plate 1 carries on its inner surface a pattern of row and column electrodes, and an array of pixel electrodes and associated TFTs, illustrated schematically as layer 3. Supporting plate 2 carries a transparent counterelectrode 4. Orienting layers 5 and 6 are present on the inner surfaces of the layer 3 and the counter electrode 4. A nematic liquid crystal material 7, containing a chiral addition is present between the supporting plates. The spacing between the plates is typically in the range of about 6-8 microns, and is maintained by spacer beads (not shown) which are distributed randomly over the surfaces of the pates. A sealing gasket 8 joins the plates together. The outer surfaces of the supporting plates 1 and 2 furthermore each carry a linear polarizer. Polarizer 9 intercepts the incident light, indicated by the arrow in the drawing, and analyzer 10 intercepts the light transmitted by the device. With a mutually orthogonal orientation of polarizer and analyzer, linearly polarized incident light is rotated 90 degrees by the molecules of the LC cell which present in this example a rotation of approximately 90 degrees and is transmitted by the analyzer. Upon application of a voltage, the LC molecules untwist, and light is blocked the amount dependent on degree of twist, which is in turn dependent on the magnitude of the voltage applied. Referring now to Figure 4, a diagrammatic plan view of one embodiment of a pixel arrangement 40 for an active matrix LCD of the invention, there is shown a close-packed array of parallelogram (diamond-shaped) pixel areas 42, defined by zigzag-shaped row and column electrodes, 44 and 46, respectively. The row electrodes have legs 48 and 50, which extend parallel to adjacent sides of the pixel electrodes, and join at their end to form corners having an angle of approximately 90 degrees. The exact angle depends on the aspect ratio of the pixels, which is selected to give the required vertical and horizontal resolution. At the upper corners 52, additional electrode material may be present, which together with another electrode and an intervening dielectric layer (not shown) forms additional area for a storage capacitor. The area may be chosen to achieve sufficient capacitance to substantially offset leakage currents. In this embodiment, the column electrodes 46 are also formed from legs extending parallel to adjacent sides of the pixel electrodes, but unlike the legs 48 and 50 of the row electrodes 44, which extend along the entire side of the pixel electrode, the legs 54 and 56, and 60 and 62, are each connected by cross-overs 58 and 64, respectively, at about the mid-point of the sides of the pixels. Each column electrode 46 is common to two adjacent columns of pixel electrodes, for example, columns A and B. For each column electrode 46, connections via thin film switches to the pixel electrodes are made alternately to the pixels of adjacent columns. For example, switches 66 interconnect column electrode 46a with pixels in column A, and switches 68 interconnect the same column electrode 46a with pixels in column B. Referring now to Figure 5, a more detailed view of a pixel 42 of Figure 4 is shown, together with its surrounding structure. Thin film transistor 66 is a dual gate structure, in which one of the gates 70 is defined by that portion of leg 48 of row electrode 44 which overlies the polysilicon island 74 that forms the source, channel and drain regions of the thin film transistor. The other gate 72 is an extension of leg 50 of row electrode 44, extending parallel to leg 48. Source electrode 76 is electrically connected to column electrode 46 at 78, while drain electrode 78 is electrically connected to the pixel electrode 42 at 80. A fight shield 86 overlies the light sensitive areas of the thin film transistor. A portion of row electrode 44, including the expanded region at the corner 52, together designated as region 82, overlies another electrode approximately coextensive with area 82, and an intervening dielectric layer (not shown), to form a storage capacitor, which is connected to pixel electrode 42 at 84. As perhaps best seen from Figure 4, the thin film transistors as well as the display cells as a whole have mirror symmetry about the vertical axis. Thus, if switches 66 were rotated clockwise by 90 degrees, and turned over, they would have the same orientation as switches 68. The invention has been described in terms of a limited number of embodiments. Other embodiments and variations of embodiments within the scope of the invention will become apparent to those skilled in the art. For example, the switches may be in form of two terminal devices, such as diodes or MIMs, as well as three terminal devices, such as thin film transistors. The liquid crystal device may operate in the reflective mode as well as the transmissive mode. Other liquid crystal materials may be used, such as supertwist and ferroelectric liquid crystal materials, as well as other electro-optic materials, such as electroluminescent and plasma discharge layers.

Claims: An active matrix electro-optic display device comprising an array of parallelogram or approximately parallelogram shaped pixel electrodes arranged in rows and columns, a switch (66, 68) associated with each pixel electrode, and an array of row (44) and column electrodes (46), the column electrodes (46) extending between two directly adjacent columns of pixel electrodes, the row electrodes (44) extending between two directly adjacent rows of pixel electrodes, the switches (66, 68) interconnecting the column electrodes (48) to the pixel electrodes via column electrode-switch connections characterized in that the switches (66, 68) interconnect each column electrode (46) to the pixel electrodes of both its directly adjacent columns of pixel electrodes, the column electrode-switch connections alternating sequentially between said two columns of pixel electrodes and said pixel electrodes are oriented to have their opposing corners aligned along said row and column directions respectively. The device of Claim 1 in which the row electrodes (44) comprise legs (48, 50) extending between adjacent sides of the pixel electrodes and in close proximity near the corners of the pixel electrodes, thereby following a zigzag pattern between the rows of pixel electrodes. The device of Claim 2 in which the column electrodes (16) follow a zigzag pattern between the columns of pixel electrodes. The device of Claim 3 in which the row (44) and column electrodes (46) cross over long adjacent sides of the pixel electrodes. The device of Claim 4 in which cross-over occurs substantially at the mid-points of the adjacent sides. The device of Claim 1 in which the switches comprise thin film transistors (66) having source, drain and channel regions, and source (76), drain (78) and gate electrodes (70, 72). The device of Claim 6 in which the source electrode of each switch is connected to a column electrode, the gate electrode is a portion of a row electrode, and the drain electrode is connected to a pixel electrode. The device of Claim 6 in which the source, drain and channel regions of the thin film transistor switch comprise polycrystalline silicon. The device of Claim 8 in which each switch also comprises a second gate electrode extending from the row electrode. The device of Claim 8 in which at least a portion of the row electrode adjacent the top sides of a pixel comprise one electrode of a storage capacitor for the pixel.

Inventors: CARLSON ALLAN, CARLSON, ALLAN
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1992
Main classification: G02F1
IPC codes: G02F1