Balanced line driver for local area networks or the like

Abstract: A differential line driver, with small common mode shift when going inactive, includes two pairs of serially coupled switches (10,11),(12,13) which are arranged to switch diagonally when sending data. All switches are closed when the driver is disabled, the common mode output voltage being established by resistors (14,15) serially disposed between the pairs of switches and the power source (V cc ) therefor.

Description: This invention relates to differential line drivers having two outputs. Transmission on a wire pair is usually differential in nature to maximize the signal-to-noise ratio at the far end of the pair. What shape the signals "look like" when transmitted is usually contained by a template which is part of a local area network standard. The transmitted pulse template sets the performance limitations on a transmitted pulse. Because the test load may be reactive and resistive, significant transmitted pulse over/undershoot and ringing can occur with prior art transmitters. The over/undershoot and ringing are usually considered undesirable and the standard places limits on them. Further, an undesirable common mode (DC) shift may occur with prior art transmitters. Thus, it is desirable to provide a differential driver with less ringing and common mode shift than prior art drivers. Further, it is desirable to provide such a driver that more closely meets system standards without requiring costly, and potentially unreliable, transformers or other compensation techniques. US-A-4,121,118 discloses a bipolar signal generator for generating bipolar signals. The generator includes a converter circuit which is composed of four AND gates and four transistors. One of input terminal of all of the AND gates is connected in common to a control signal supply line. The other input terminals of two of the AND gates are connected to a line and the other input terminals of the other two AND gates are connected to another line. Output terminals of the AND gates are connected to respective bases of the transistors. Collectors of the transistors are connected through a resistor to a direct current source. Emitters of the transistors are connected to ground. An emitter of a first transistor and a collector of a second transistor are connected to one terminal of a primary winding of a transformer and an emitter of a third transistor and a collector of a fourth transistor are connected to the other terminal of the primary winding. According to this invention there is provided a differential line driver as claimed in claim 1. A differential line driver embodying the invention has two outputs, first and second pairs of serially coupled switches, and first and second resistors. Each of the first and second pairs of serially coupled switches have first and second outputs, a common output, and two corresponding inputs, the common outputs coupling to the two outputs of the driver. The first resistor has two terminals, one terminal coupling to a first power source and the other terminal coupling to the first outputs of the pairs of switches. The second resistor has two terminals, one terminal coupling to a second power source and the other terminal coupling to the second outputs of the pairs of switches. The arrangement of the switches allows for differential transmission of data when the driver is enabled. When disabled, the switches are all closed, coupling the outputs of the driver together with small common mode shift. Brief Description of the Drawing The foregoing features of this invention, as well as the invention itself, may be more fully understood from the following detailed description of the drawings, in which: FIG. 1 is a simplified schematic diagram of a differential line driver as one embodiment of the invention; FIG. 2 is a simplified schematic diagram of switch used in the driver of FIG. 1. Detailed Description An exemplary embodiment of the invention is shown in FIG. 1. Here, switches 10, 11 and 12, 13 each make a pair of serially coupled switches with a common output coupled to the output of a differential driver 1. The pairs of switches 10, 11 and 12, 13 have outputs connected together and to corresponding resistors 14, 15. The resistor 15 couples to a first power source (V CC ) and resistor couples to a second power source (ground). It is understood that the second power source may be another voltage other than ground (zero volts). Resistors 14, 15 may be on-chip or off-chip depending on the application and power dissipation considerations. As shown, the input 13 to switches 10 and 13 are the same () as well as for switches 11 and 12 (  ). This allows for the switches to be switched diagonally to send data differentially to load 20 through DC blocking capacitors 18. Differential switching involves switches 10, 13 open and close together while switches 11, 12 open and close together in complement to switches 10, 13. When driver 1 is disabled (idle), it is desirable to close all the switches 10, 11, 12, 13, thus coupling the outputs together without significant common mode shift. Control of switches 10, 11, 12 and 13 is accomplished by exemplary means of gates 16 and 17. When the IDLE/ ACTIVE input (enable) signal is "low", (active), signals on input D passes through gate 16 to control switches 10, 13 while the signals on input D are inverted by gate 17 to control switches 11, 12. Thus, when the driver is active, the switches 10-13 are diagonally switched, sending data on input D differentially. If, however, the IDLE/ ACTIVE input is "high" (idle), then both outputs from gates 16, 17 are " "high", causing switches 10- 13 to be closed, as described above. An exemplary switch 10 is shown in FIG. 2. As shown, switch 10 (as well as switches 11-13) is a CMOS transmission gate with transistors suitably sized to handle the current necessary to drive load 20 (FIG. 1) or any other predetermined load. It is noted that, depending on the application, single transistors may be used as a switch. An integrated circuit version of the driver 1 (FIG. 1) has been fabricated for application driving an AUI network. Resistance values for resistors 14, 15 are approximately 90 ohms. Such a driver 1, without a transformer, more closely met the 802.3 standards for AUI transmission than a prior art driver with or without the transformer 19. Having described the preferred embodiment of this invention, it will now be apparent to one of skill in the art that other embodiments incorporating its concept may be used.

Claims: A differential line driver having two outputs, first and second pairs of serially coupled switches (10,11), 12,13), each pair having first and second outputs, a common output, and two corresponding inputs, the common outputs coupling to the two outputs of the driver; a first resistor (14) with two terminals, one terminal coupling to a power source and the other terminal coupling to the first outputs of the pairs of switches (10, 11; 12,13); a second resistor (15) with two terminals, one terminal coupling to a second power source and the other terminal coupling to the second outputs of the pairs of switches (10,11; 12,13), and CHARACTERIZED BY: control circuitry (16,17) coupled to the inputs of the switches and having a data input and an enable input, the control circuitry serving to switch the switches (10,11; 12,13) in response to the data input when the enable input is active and turning on all of the switches (10,11; 12,13) when the enable input is inactive. A differential line driver as claimed in claim 1, wherein the inputs to the first and second pairs of switches (10,11; 12,13) are coupled together such that the switches may be diagonally switched. A differential line driver as claimed in claim 2, wherein the resistors (14,15) have substantially the same value. A differential line driver as claimed in claim 3, wherein the control circuitry (16,17) serves to diagonally switch the switches when the enable input is active. A differential line driver as claimed in claim 3, wherein the switches are transmission gates.

Inventors: LEONOWICH ROBERT HENRY, LEONOWICH, ROBERT HENRY
Applicants: AT & T CORP, AT&T CORP.
Application year: 1992
Main classification: H04L12
IPC codes: H04L12, H03K17, H04L25