Furnace structure of semiconductor manufacturing apparatus

Abstract: A furnace structure of a semiconductor manufacturing apparatus includes a process chamber (11), a pair of preliminary chambers (10,12), and shutters (18,19,20,23). The process chamber has a pair of openings in the loading and unloading directions of semiconductor substrates (22) and is designed to perform a predetermined semiconductor manufacturing process. Each of preliminary chambers has a pair of openings and communicates with the process chamber, with one of each pair of openings opposing a corresponding one of the openings of the process chamber. The shutters are respectively arranged between the two openings of the process chamber and the opposing openings of the pair of preliminary chambers and designed to separate the process chamber from the preliminary chambers so as to be opened and closed.

Description: Background of the Invention The present invention relates to a semiconductor manufacturing apparatus and, more particularly, to a diffusion furnace or a vapor phase growth furnace. Figs. 2A to 2D illustrate a sequence of operations of a conventional diffusion furnace or vapor phase growth furnace. This furnace comprises a cap-like core tube 1, a heater 2 arranged around the outer surface of the core tube 1, a shutter 3 which is formed at the lower end opening of the core tube 1 and is opened/closed when semiconductor substrates 6 are loaded/unloaded, a gas introduction portion 4 which is connected to the upper central portion of the core tube 1, and an exhaust portion 5 which is connected to the lower inner side wall of the core tube 1 and designed to exhaust gas after reaction (Fig. 2A). When the semiconductor substrates 6 are to be subjected to annealing or a thin-film formation process, the shutter 3 is opened, and a boat 7 having the semiconductor substrates 6 mounted thereon is loaded into the core tube 1 (Fig. 2B). If necessary, a reaction gas is then introduced through the gas introduction portion 4 for annealing the substrates 6 (Fig. 2C). Thereafter, the shutter 3 is opened (Fig. 2D) to unload the semiconductor substrates 6 from the core tube 1. In the conventional diffusion furnace or vapor phase growth furnace, semiconductor wafers located at upper and lower portions X and Y on the boat 7 in the core tube 1 can have different thermal hysteresis, since the semiconductor substrates 6 are loaded and unloaded through the same opening by means of the shutter 3. In addition, since atmospheric air flows. into the furnace when the shutter 3 is opened, uniformity in film thickness among the respective semiconductor substrates can be degraded. A similar furnace is described in US patent no. 4962726, on which the claims of this application are based. This document describes a furnace structure having a CVD reaction chamber positioned above a buffer chamber and separated therefrom by an openable shutter. Loading and unloading chambers are provided an opposite sides of the buffer chamber. In operation, a boat positioned in the buffer chamber is loaded with semiconductor wafers from a stack in the loading chamber by a transfer arm. The boat is raised and lowered in the buffer chamber by a boat elevator to allow loading. When the boat is loaded, it is raised into the reaction chamber and, after processing, it is lowered back into the buffer chamber and the wafers unloaded by a second transfer arm into the unloading chamber. The furnace of US 4962726 suffers the same disadvantage as the conventional furnace described above: because the boat enters and exits the reaction chamber at its lower end, wafers located at upper and lower ends of the boat experience different thermal hysteresis. A further known furnace is described in European patent application No. 85115144.9, published as EP 0 187249 A. This describes an apparatus in which semiconductor wafers are transported horizontally on a conveyor belt through a series of processing chambers for executing a series of manufacturing steps. One processing chamber is a furnace, which is preceded by a transfer chamber and followed by a rinsing chamber. This enables continuous wafer transfer rather than the batch processing of the known furnaces described above. Summary of the Invention The invention provides a vertical-type furnace structure for a semiconductor manufacturing apparatus, and a method of operating such a furnace structure, as defined in the appendant independent claims, to which reference should now be made. Preferred features of the invention are defined in dependent subclaims. Brief Description of the Drawings Figs. 1A to 1E are views showing a sequence of operations of an embodiment of the present invention; and Figs. 2A to 2D are views showing a sequence of operations of a conventional semiconductor manufacturing apparatus. Description of the Preferred Embodiment The present invention will be described below with reference to the accompanying drawings. Figs. 1A to 1E illustrate a sequence of operations of an embodiment of the present invention, which is applied to a vertical type diffusion furnace. The furnace structure of a semiconductor manufacturing apparatus of this embodiment is constituted by a process chamber 11 and preliminary, or outer chambers 10 and 12, as shown in Fig. 1A. The process chamber 11 includes a cylindrical core tube 30, a gas introduction portion 16 and an exhaust portion 17 respectively open to the inner surface of the core tube 30, and a heater 13 arranged around the outer surface of the core tube 30. The preliminary, or second and first outer chambers 10 and 12 respectively communicate with the upper and lower openings of the process chamber 11. Each preliminary chamber includes a core tube 31 having the same shape as that of the process chamber 11 and a gas introduction portion 14 and an exhaust portion 15 respectively open to the inner surface of the core tube 31. The preliminary chamber 10 and the process chamber 11, and the process chamber 11 and the preliminary chamber 12 are respectively separated from each other by second and first inner shutters 18 and 19 at the openings. A first outer shutter 20 serving as an entrance is formed at the lower opening of the preliminary chamber 12, whereas a second outer shutter 23 serving as an exit is formed at the upper opening of the preliminary chamber 10. A gas such as nitrogen is introduced into the preliminary chambers 10 and 12 and the process chamber 11 through the gas introduction portions 14 and 16. The shutter 20 is then opened, as shown in Fig. 1B, and a rod 25 is moved upward by a boat movement control unit 24 upon interlocking with the operation of the shutter 20. As a result, semiconductor substrates 22 mounted on a boat 21 fixed to the distal end of the rod 25 are loaded in the preliminary chamber 12. Subsequently, the shutter 20 is closed. After this state is maintained for 1 to 10 minutes, the shutter 19 is opened, and the semiconductor substrates 22 are moved into the process chamber 11 by the rod 25, as shown in Fig. 1C. The rod 25 is retracted and the shutter 19 is closed. An annealing or a thin-film formation process as a semiconductor manufacturing process is performed with respect to the semiconductor substrates 22 by using a predetermined reaction gas (if necessary) introduced through the gas introduction portion 16 and the heater 13. As shown in Fig. 1D, when the annealing or the thin-film formation process is completed, the shutter 18 is opened, and the semiconductor substrates 22 are moved by the rod 25 into the preliminary chamber 10 in which a gas such as nitrogen is introduced. The rod 25 is retracted and the shutter 19 is closed. After the semiconductor substrates 22 are cooled in the preliminary chamber 10, the shutter 23 is opened, and the substrates 22 are unloaded to the outer atmosphere (Fig. 1E). As has been described above, according to the semiconductor manufacturing apparatus illustrated having a diffusion furnace or a vapor phase growth furnace, since semiconductor substrates are loaded through one opening of the process chamber and unloaded through the other opening, a uniform thermal hysteresis can be realized among the semiconductor substrates located at different mounting positions on a boat (in a batch). In addition, since the preliminary chambers are respectively arranged on the loading and unloading sides of the process chamber, entrance of atmospheric air into the process chamber can be prevented at the time of loading. These can improve uniformity in film thickness among semiconductor substrates so that the variation in thickness is 1/5 or less than that obtained by the conventional apparatus.

Claims: A vertical-type furnace structure for a semiconductor manufacturing apparatus, comprising; a process chamber (11) for performing a predetermined semiconductor manufacturing process; a first outer chamber (12) positioned below the process chamber and communicating therewith by means of an opening in a lower wall of the process chamber, a first inner shutter (19) being positioned to open and close the opening; and a boat (21) for carrying semiconductor substrates in the furnace structure, characterised by; a second outer chamber (10) positioned above the process chamber and communicating therewith by means of an opening in an upper wall of the process chamber, a second inner shutter (18) being positioned to open and close the opening; first and second outer shutters (20), (23) positioned to open and close loading and unloading openings formed in a lower wall of the first outer chamber and an upper wall of the second outer chamber respectively; and, a boat movement control means (25) which moves the boat sequentially through the first outer chamber, the process chamber and the second outer chamber; the first outer chamber, the process chamber and the second outer chamber each comprising a cylindrical core tube (30, 31), the tubes being arranged in series. A structure according to claim 1, wherein the process chamber core tube (30) has a gas introduction portion (16) and a gas exhaust portion (17) formed in a circumferential surface thereof, and a heater (13) is arranged around an outer surface of the process chamber core tube. A structure according to claim 1 or 2, wherein each outer chamber core tube (31) comprises a gas introduction portion (14) and a gas exhaust portion (15) formed in a circumferential surface thereof. A method of performing a predetermined semiconductor manufacturing process in a vertical-type furnace structure according to claim 1, the method comprising the steps of; controlling the boat movement control means to hold the boat and substrates in the first outer chamber after the substrates enter the furnace structure through the entrance opening; controlling the boat movement control means to load the boat into the process chamber and carrying out the manufacturing process on the semiconductor substrates in the process chamber; and controlling the boat movement control means to unload the boat into the second outer chamber and hold it there prior to removing the substrates from the furnace structure through the exit opening; the shutters being opened and closed as required to allow passage of the boat. A method according to claim 4, in which the manufacturing process is a heat treatment. A method according to claim 4, in which the manufacturing process is a thin-film formation process.

Inventors: KAWASE YASUYOSHI C O NEC CORPO, KAWASE, YASUYOSHI, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1992
Main classification: H01L21
IPC codes: F27D19, C30B35, H01L21, F27B17, F27B9