A solid-state imaging device and a method for driving same

Abstract: A solid-state imaging device comprising a full frame transfer vertical shift register. Signal charges stored in two sections, originally stored in two vertically adjacent pixels, are consecutively transferred to a horizontal shift register while the horizontal shift register is inoperative so as to be mixed together therein. Alternatively, a storage register is provided between the bottom section of the vertical shift register and the horizontal shift register so as to accept signal charges stored in two sections and mix them therein before transferring them to the horizontal shift register. In either case, the mixed signal charges are output as data corresponding to a moving image display. A still image display is possible using the same device by changing the timing for driving the vertical shift register or the storage register.

Description: 1. Field of the Invention: The present invention relates to a solid-state imaging device such as an area CCD (charge coupled device) image sensor, and in particular, a method for driving such a solid-state imaging device. 2. Description of the Prior Art: One type of known solid-state imaging devices comprises full frame transfer vertical shift registers, in which signal charges stored in all light-receiving portions two-dimensionally arranged can be read individually at one time in a vertical direction. This type of solid-state imaging device is advantageous in that the resolution in the vertical direction is improved compared with a general type solid-state imaging device having the same number of light-receiving portions. The vertical direction as referred to in this specification means one of the two dimensional directions, while the other is referred to as the horizontal direction. In a general type solid-state imaging device applied to a video camera of a standard TV system in which interlaced scanning is normally adopted, signals of two vertically adjacent pixels of different combinations are mixed so as to correspond to the interlaced scanning of the standard TV system. Therefore, the number of pixels in the vertical direction required for the general solid-state imaging device is equal to the total number of scannings in the standard TV system. On the other hand, in a solid-state imaging device provided with the full frame transfer vertical shift registers, signals of all pixels are read individually in the vertical direction. Therefore, when this type of device is applied to the video camera of the standard TV system, the number of pixels in the vertical direction should be one half of the total number of scannings. As a result, the resolution in the vertical direction is deteriorated compared with a general type solid-state imaging device. When the solid-state imaging device provided with the full frame transfer vertical shift registers has the same number of pixels in the vertical direction as the general type device, the image information read therefrom can not be directly reproduced on a TV screen. In this case, the image information must be first recorded on a recording medium such as a magnetic disk, and then converted into data for TV display so as to be reproduced on a TV screen. Because of the above-described limitation, the solid-state imaging device provided with the full frame transfer vertical shift registers has been mainly used for a camera for a still image display, for example, and has not been applied to a device such as a video camera for a moving image display. The objective of the present invention is to provide a solid-state imaging device provided with full frame transfer vertical shift registers, which is capable of effecting a moving image display, in addition to a still image display, when applied to the standard TV system, and a method for driving such a device. IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 36, no. 11, pages 2466-2474, November 1989, New York, US, J. Hynecek: "A New High Resolution 11-mm Diagonal Image Sensor for Still-Picture Photography" discloses a CCD image sensor which operates based on the frame-transfer principle. Instead of operating in an interlace mode, the device captures both TV fields at the same time by using two independently addressable field memories for storing the image data. In one mode of operation, the signals from two consecutive lines, stored in the respective field memories, are summed together. SUMMARY OF THE INVENTION In accordance with the present invention, there is provided a method of driving a solid-state imaging device including light-receiving portions arranged two-dimensionally, full frame transfer vertical shift registers each disposed adjacent to the light-receiving portions so that a signal charge stored in each light-receiving portion is individually transferred to the corresponding section of the vertical shift register at one time, the vertical shift register transferring the signal charges from section to section in a vertical direction, a horizontal shift register for transferring the vertically-transferred signal charges in a horizontal direction, and an output portion for converting the horizontally-transferred signal charges into voltage signals, the method comprising, when the signal charges represent data for a moving image, transferring signal charges stored in two sections of the vertical shift register to the horizontal shift register while the horizontal shift register is inoperative so that the signal charges stored in two vertically adjacent light-receiving portions are mixed in the horizontal shift register. In an embodiment of the present invention, when the signal charges represent data for a still image, the method comprises transferring a signal charge stored in one section of the vertical shift register to the horizontal shift register while the horizontal shift register is inoperative. According to the present invention, the vertical shift register is driven at such a timing that signal charges stored in two sections of the vertical shift register, originally stored in two vertically adjacent light-receiving portions, can be consecutively transferred to the horizontal shift register so as to be mixed therein. The mixed signal charges are transmitted through the horizontal shift register to the output portion. According to this method, the number of scannings per image is equal to that of the standard TV system adopting the interlaced scanning. Therefore, according to the method of the present invention, the image information read from the solid-state imaging device can be directly reproduced on a TV screen so as to effect a moving image display. In this case, signals of two vertically adjacent pixels of one combination, and then those of a different combination, should be mixed so as to correspond to the interlaced scanning of the standard TV system. On the other hand, when a signal charge stored in one section of the vertical shift register is transferred to the horizontal shift register while the horizontal register is inoperative, signal charges are output as in the conventional method so as to effect a still image display. Further, according to the present invention, it is not necessary to develop and manufacture solid-state imaging devices for the still image display and the moving image display separately, thereby widely reducing production cost as well as improving flexibility. Moreover, a high-density still image display can be obtained when reproduced by the same solid-state imaging device by switching the display mode during the moving image display. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a partial sectional view of a solid-state imaging device to which a method of the present invention is applied, mainly showing the bottom part of a vertical shift register of the device; Figure 2 is a potential distribution for the structure of Figure 1 ; and Figures 3A , 3B and 3C are timing charts showing the charge transfer operations of the solid-state imaging device of Figure 1 . DESCRIPTION OF THE PREFERRED EMBODIMENT Figure 1 shows the bottom part of a vertical shift register for a solid-state imagining device to which the driving method of an embodiment of the present invention is applied. The vertical shift register adopting an interline transfer system comprises a plurality of sections each including a pair of transfer electrodes 4 and 5 forming a potential difference therebetween, so that signal charges stored in all of the receiving portions can be read at one time and transferred individually in the vertical direction (the direction in which the vertical shift register is disposed). The structure and the driving method of the vertical shift register will be described. A buried channel layer 2 made of an n-type semiconductor is formed on an area of a p-type semiconductor substrate 1 corresponding to the whole area of the CCD transfer channel. The first-layer and second-layer transfer electrodes 4 and 5 are disposed alternately in the transfer direction (the vertical direction) on the p-type semiconductor substrate 1 through a thin insulating film 3 made of, for example, SiO 2 . A transfer pulse V 1 is applied to the first-layer transfer electrode 4 from a driving circuit (not shown). Likewise, a transfer pulse V 2 is applied to the second-layer transfer electrode 5 . When the transfer pulses V 1 and V 2 are applied, a signal charge read from each of the light-receiving portions is transferred to the corresponding section of the vertical shift register through a shift gate connecting the light-receiving portions and the vertical shift register, and the signal charges are sequentially transferred through the vertical shift register at a predetermined timing until they reach the bottom section, where they are transferred to a horizontal shift register disposed perpendicular to the vertical shift register. A transfer pulse H 1 as shown in Figure 3A is applied to a transfer electrode 8 of the horizontal shift register. Thus, the horizontal shift register accepts the signal charges sent from the vertical shift register and transfers them to an output portion (not shown) at the timing of the pulse H 1 . The transfer direction of the vertical shift register is established as described below. N-type impurities are implanted into a portion of the surface of the p-type semiconductor substrate 1 underlying a part of the transfer electrode 4 and the entire area of the transfer electrode 5 , so as to form a first region 6 . Then, a second region 7 is formed by implanting p-type impurities into a portion of the region 6 underlying a part of the transfer electrode 5 . A potential distribution of the above-described structure is shown in Figure 2 . The n-type impurities and the p-type impurities effect to increase the potentials by +Va and -Ve , respectively. In this way, a potential difference Va is formed under the transfer electrode 4 by the first region 6 , and a potential difference Ve is formed under the transfer electrode 5 by the second region 7 , thus establishing the transfer direction for signal charges. In this figure, Vc denotes a potential difference corresponding to a clock amplitude. In the above-described structure, the amounts of the n-type and p-type impurities implanted to the regions 6 and 7 can be determined so that the potential differences +Va and -Ve are equal in their absolute values so as to compensate each other, thereby ensuring that the potential differences between the transfer electrodes 4 and 5 for establishing a direction are equalized. Thus, when the p-type impurities are implanted to the very place shown as the second region 7 in Figure 1 under the above condition, the direction established by the potential differences formed under the transfer electrodes 4 and 5 can be the direction in which signal charges should be transferred. As a result, as shown in Figure 3B , it is possible to effect a two-phase drive of the transfer pulses V 1 and V 2 under the same voltage application. In Figure 2 , the solid line shows a potential when the transfer pulse V 1 is low and the transfer pulse V 2 is high, while the dash line shows a potential when the transfer pulse V 1 is high and the transfer pulse V 2 is low. The transfer direction is from left to right in the figure. Next, referring to the timing charts of Figures 3A to 3C , a method for driving the solid-state imaging device of the above structure will be described. Figure 3A shows the transfer pulse  H 1 applied to the transfer electrode 8 of the horizontal shift register. In the figure, T denotes an inoperative period of time of the horizontal shift register. Figure 3B shows the transfer pulses  V 1 and  V 2 applied to the transfer electrodes 4 and 5 , respectively. As is apparent from Figures 3A and 3B , a signal charge stored in one section of the vertical shift register is transferred to the horizontal shift register while the horizontal shift register is inoperative. The transfer operation shown in Figure 3B is adopted when the signal charges obtained from the solid-state imaging device are transferred as data for a still image display. On the other hand, in accordance with the present invention, for a moving image display, the transfer pulses V 1 and V 2 of Figure 3C are applied to the transfer electrodes 4 and 5 from a driving circuit. In this case, the signal charges stored in two sections of the vertical shift register are consecutively transferred to the horizontal shift register while the horizontal shift register is inoperative. These signal charges are mixed in the horizontal shift register, and the mixed signal charges are then transferred to the output portion. In the above-described transfer operation where the signal charges stored in two sections are mixed, the resultant output data has the same number of scannings in the vertical direction as the standard TV system adopting the interlaced scanning, so that the information transmitted from the solid-state imaging device can be directly reproduced on a TV screen. In this case, different combinations of two vertically adjacent pixels should be mixed so as to correspond to the interlaced scanning. Accordingly, the timings of the transfer pulses  V 1 and  V 2 applied to the electrodes 4 and 5 as shown in Figures 3B and 3C can be selected corresponding to an output device, so as to obtain both a still image display and a moving image display. In other words, according to the driving method of the embodiment, both the still image display and the moving image display are possible by one solid-state image device. The vertical shift register of the two-phase drive system was used for applying the method of the present invention, but a three-phase or four-phase drive system is also applicable for this invention.

Claims: A method of driving a solid-state imaging device including light-receiving portions arranged two-dimensionally, full frame transfer vertical shift registers each disposed adjacent to the light-receiving portions so that a signal charge stored in each light-receiving portion is individually transferred to the corresponding section of the vertical shift register at one time, the vertical shift register transferring the signal charges from section to section in a vertical direction, a horizontal shift register for transferring the vertically-transferred signal charges in a horizontal direction, and an output portion for converting the horizontally-transferred signal charges into voltage signals, the method comprising, when the signal charges represent data for a moving image, transferring signal charges stored in two sections of the vertical shift register to the horizontal shift register while the horizontal shift register is inoperative so that the signal charges stored in two vertically adjacent light-receiving portions are mixed in the horizontal shift register. A method of driving a solid-state imaging device according to claim 1, the method comprising, when the signal charges represent data for a still image, transferring a signal charge stored in one section of the vertical shift register to the horizontal shift register while the horizontal shift register is inoperative.

Inventors: FUKUBA NOBUYUKI, FUKUBA, NOBUYUKI
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1992
Main classification: H04N3
IPC codes: H01L21, H01L29, H04N3, H04N5