Method of etching and/or leveling the surface of a laminated semiconductor substrate

Abstract: Disclosed is an improved method of leveling the laminated surface of a semiconductor substrate, which method permits the exact controlling of the eating-out of the lamination on the semiconductor substrate by detecting the sudden change of the amount of the gas resulting from the chemical reaction of the materials of the different layers with particular selected elements of surrounding plasma gas, thus assuring the reproducibility of leveled semiconductor substrate surface.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention: The present invention relates to a method of etching laminated semiconductor devices, and more particularly to a method of leveling the laminated surface of a semiconductor substrate, thereby providing a leveled surface on which wiring conductors are to be attached. 2. Description of the Prior Art: One example of such leveling method is described with reference to Fig.2a and 2b. As seen from Fig.2a, a silicon substrate 1 has aluminum wiring conductors 2 of different widths attached to its top surface. A relatively thick insulating film 10 is formed on the surface of the semiconductor substrate 1. Finally, a coating layer 11 is formed on the insulating film 10. The lamination on the silicon substrate 1 is subjected to ion etching, which is carefully conditioned so as to permit the eating-out of the different materials of the insulating and coating layers at a same rate. Fig.2b shows a section of the insulating film 10 thus labeled. This leveling method has following defects: first, the insulating film must be very thick, and thick enough to prevent undesired exposure of aluminum wiring conductors 2 when the insulating film is eaten out deeply at selected areas because the eating rate is liable to vary from place to place; second, the overlying coating layer must be very thick because otherwise, its contour would be similar to the underlying irregular contour of the insulating film 10, thus allowing uneven eating-out of the lamination on the substrate; third, the insulating film 10 remains so thick over aluminum conductors 2 that contact or through holes when made deep enough to reach such aluminum conductors 2 will he inevitably deep and large in size, thus sometimes preventing lead wires from reaching underlying conductors, and causing underside space between lead wires and surrounding hole to allow invasion of moisture in contact regions; fourth, the eating-out of the two different materials at same rate is very difficult; and fifth, the critical point at which the eating-out of the lamination must be stopped cannot be determined with accuracy, and therefore, it is most likely that the eating-out is stopped at a premature stage with the result that the leveling is far from satisfactory. Further examples of known levelling methods are illustrated in Fig.3a and 3b. As seen from Fig.3a, a silicon substrate 1 has aluminum wiring conductors 2 attached to its surface and a relatively thick coating layer 11 formed on the surface of the semiconductor substrate 1 and the aluminum wiring conductors 2 thereon. Lest the coating layer 11 should be influenced by the underlying irregularity, the coating layer 11 must be thick enough for its upper surface to become substantially flat. The coating layer 11 is used as insulating layer to which other aluminum wiring conductors are to be attached. This insulating layer 11, however, is porous, allowing invasion of moisture to deteriorate the quality of insulation. In an attempt to avoid this the porous layer 11 is sandwiched between lower and upper insulation films 12A and 12B. This, however, makes it difficult to make through holes, and the porous inner surface of the through hole surrounding the lead wire is exposed to the atmosphere, releasing the remaining volatile substance or moisture from the porous inner surface with the result that the quality of wiring connection is lowered. EP-A-0 335 459 discloses a method for providing insulating material on an electrically conductive level of a substructure forming part of an electronic device. The electrically conductive level has at least two spaced-apart electrically conductive regions. Insulating material is provided over the level to a thickness insufficient for insulating material on adjacent conductive levels to meet, thereby leaving a recess in the insulating material between the conductive regions. A planarising medium is applied onto the insulating material and etched so as to expose a top surface of the insulating material, thereby leaving planarising medium in the recess. The insulating material is then etched anisotropically using the remaining planarising medium as a mask so that the surface of the electrically conductive level is exposed. It is, therefore, an object of the present invention to provide an etching method which can be used for levelling and a levelling method which permits the accurate controlling of etching of the lamination on a semiconductor substrate to provide a levelled surface on which wiring conductors may be fixed. The invention provides a method of etching a laminated semiconductor substrate to expose part of an interface between a silicon oxide film and a second film of another material comprising effecting ion etching in a plasma gas atmosphere to expose said part of the interface and detecting said exposure by sensing a sudden change in the amount of carbon monoxide reaction product in the plasma gas atmosphere and controlling the etching in response thereto, characterised in that the second film is boron phosphorus silica glass, the plasma gas atmosphere comprises CF 4 + CHF 3 + Ar, and the sudden change in the amount of carbon monoxide is sensed by the spectral monitoring of the plasma gas atmosphere at a wavelength of 451nm. The invention also provides a method of levelling a surface of a laminated semiconductor substrate employing the method set forth above and comprising the steps of: preparing a semiconductor substrate having a plurality of wiring conductors attached thereto; forming said silicon oxide film on the surface of the semiconductor substrate and said wiring conductors; forming said second film of boron phosphorus silica glass on said silicon oxide film; forming a coating layer on said second film; subjecting said coating layer to a first ion etching in a first plasma gas atmosphere; detecting the exposure of part of said second film at its highest level from a sudden change in the amount of carbon monoxide reaction product in the first plasma gas atmosphere to stop said first ion etching, said sudden change being sensed by spectral monitoring of the first plasma gas atmosphere at a wavelength of 451nm; and subjecting the etched surface including the exposed part of the second film to a second ion etching as set forth above. Other preferred but optional features are as set out in the dependent claims. The invention will now be described by way of example, only by reference to the accompanying drawings, wherein: Figs.1a to 1d show how the laminated surface of a semiconductor substrate is leveled according to the present invention; Figs.2a and 2b show how the top laminated surface of a semiconductor substrate is leveled according to a conventional leveling method; and Fig.3a shows, in section, a semiconductor substrate whose upper surface is leveled according to another conventional leveling method, and Fig.3b shows, in section, a semiconductor substrate whose upper surface is leveled according to still another conventional leveling method. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS Referring to Fig.1a, a semiconductor substrate 1 has a composite lamination on its upper surface. Specifically, aluminum wiring conductors of different widths 2 are attached to the upper surface of the semiconductor substrate 1; a first insulating film 3A of impurity-free silicon oxide is formed on the upper surface of the semiconductor substrate 1 and the aluminum wiring conductors 2; a second insulating film 4 of silicon oxide doped with phosphorus and boron (called "boron phosphrous silica glass, and abbreviated "BPSG") is formed on the first insulating film 3A; and finally a coating layer 5 of novolak is formed on the second insulating film 4. The first and second insulating films 3A and 4 may be formed one after another according to the plasma chemical vapor deposition process. Assume that the minimum space between adjacent conductors 2 is 800 nm and that conductors 2 are 500 nm thick. Then, the thickness of the first silicon oxide film 3A ranges from 100 to 300 nm, and the thickness of the second BPSG film 4 ranges from 300 to 800 nm. The individual thicknesses are so selected that the total thickness of these films may range from 500 to 700 nm. The surface of the second BPSG film 4 may be coated with a relatively low-viscous novolak resin such as commonly used as photoresist on the condition that a 500 nm-thick coating would result if it were a flat surface. Referring to Fig. 1b, the whole area of the resin coating layer 5 is subjected to an ion etching within oxygen plasma. The amount of the light of 451 nm wave length which is characteristic of carbon monoxide is monitored with the aid of a spectrometer to determine when the amount of the characteristic light decreases drastically; the ion etching is then stopped. At this time, the part or parts of the second insulating film 4 at its highest level have been exposed.. The sudden decrease of the amount of reaction product, in this case a gas, in particular carbon monoxide, resulting from the chemical reaction of carbon in the resin of the coating layer 5 with the surrounding oxygen is attributable to removal of the coating resin from the peaks of the second insulating layer 4 and exposure of the peaks of the BPSG layer 4, which contains no carbon. Thus, the critical controling of the ion etching can be effected with ease and accuracy. Referring to Fig.lc, the whole area of the remaining lamination is subjected to another ion etching within a mixture plasma of CF4+ CHF3 + Ar. The rate at which the material of the BPSG film 4 is eaten out is selected to be about two times larger than the rate at which the resin of the coating layer 5 is eaten out. As is the case with the first ion etching, the amount of the light of 451 nm wave length which is characteristic of carbon monoxide is monitored with the aid of a spectrometer to determine when the amount of the characteristic light increases drastically; the ion etching is then stopped, since there is now a substantially leveled surface with the peak or peaks of the first insulating film 3A exposed. The sudden increase of the amount of reaction product, in this case a gas, in particular carbon monoxide resulting from the chemical reaction of carbon in the surrounding gas with the silicon oxide of the first insulating film 3A indicates removal of the BPSG film from the peaks of the first insulating layer 3A and exposure of the peaks of the silicon oxide film 3A, which contains no carbon. Thus, the critical controlling of the second ion etching can be effected with ease and accuracy, too. Preferably the remaining coating material 5 may be removed from the upper surface of the second film 4, and another silicon oxide film 3B may be formed on the second film 4 and the exposed peaks of the first insulating film 3A according to the plasma chemical vapor deposition process until the resulting insulating film 3B has been thick enough to provide good insulation between underlying and overlying wiring conductors 2 and 2'. In the illustrated example the second ion etching is anisotropic, and therefore, the rising parts 6 of BPSG appear between the remaining coating material 5 and the second insulating film 4. Such rising parts 6 are minute and almost negligible from the point of leveling view. However, such rising parts 6 can be removed if the second ion etching is isotropic. As may be understood from the above, the leveling method according to the present invention permits the critical controlling of the eating-out of selected materials in the composite lamination on a semiconductor substrate, thus assuring the reproducibility of leveled semiconductor substrate surface. The faster eating of the second film material has the effect of preventing appearance of the overlying coating irregularity on the leveled surface even if the coating layer is not thick. Also, the eating amount is reduced compared with the conventional leveling methods, and accordingly the eating rate may remain constant over the whole area to be etched.

Claims: A method of etching a laminated semiconductor substrate to expose part of an interface between a silicon oxide film (3A) and a second film (4) of another material comprising effecting ion etching in a plasma gas atmosphere to expose said part of the interface and detecting said exposure by sensing a sudden change in the amount of carbon monoxide reaction product in the plasma gas atmosphere and controlling the etching in response thereto, characterised in that the second film (4) is boron phosphorus silica glass, the plasma gas atmosphere comprises CF 4 + CHF 3 + Ar, and the sudden change in the amount of carbon monoxide is sensed by the spectral monitoring of the plasma gas atmosphere at a wavelength of 451nm. A method of levelling a surface of a laminated semiconductor substrate employing the method of claim 1 and comprising the steps of: preparing a semiconductor substrate (1) having a plurality of wiring conductors (2) attached thereto; forming said silicon oxide film (3A) on the surface of the semiconductor substrate and said wiring conductors; forming said second film (4) of boron phosphorus silica glass on said silicon oxide film; forming a coating layer (5) on said second film (4); subjecting said coating layer (5) to a first ion etching in a first plasma gas atmosphere; detecting the exposure of part of said second film (4) at its highest level from a sudden change in the amount of carbon monoxide reaction product in the first plasma gas atmosphere to stop said first ion etching, said sudden change being sensed by spectral monitoring of the first plasma gas atmosphere at a wavelength of 451nm; and subjecting the etched surface including the exposed part of the second film (4) to a second ion etching in accordance with claim 1. A method according to claim 2 wherein the rate at which the material of the second film (4) is etched in the second ion etching is greater than the rate at which the coating layer (5) is etched in the first ion etching. A method according to claim 2 or claim 3, further comprising the steps of: removing the remaining coating material (5) from the upper surface of said second film (4); and forming an insulating film (3B) on said second film (4) and the exposed part of said silicon oxide film (3A). A method according to any of claims 2 to 4, wherein said second ion etching is anisotropic. A method according to any of claims 2 to 4, wherein said second ion etching is isotropic. A method according to any of claims 2 to 6 wherein the coating layer (5) is of novolak, and the first plasma gas is oxygen.

Inventors: SATO FUMIHIDE, SATO, FUMIHIDE
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1992
Main classification: H01L21
IPC codes: H01L21