Image recording apparatus

Abstract: In an image recording apparatus, an imaging surface of an image device is formed so as to store and read out an image by arranging two-dimensionally a plurality of photoelectric transfer elements, the imaging surface is divided along lines into a plurality of blocks, scanning lines are formed in accordance with the photoelectric transfer elements arranged in a horizontal direction of the respective divided blocks, and the plurality of scanning lines of the respective blocks are parallelly linearly scanned to output a multichannel video signals. The image recording apparatus comprises a first scanning circuit for setting a plurality of linear scanning direction start positions along the scanning line direction of the blocks and selecting a block to be read out, a second scanning circuit for selecting the linear scanning start positions and numbers of picture elements to be linearly scanned and a drive circuit for transmitting drive signals to the first and second scanning circuit, wherein the first and second scanning circuits are controlled by the drive signals to select image areas having different linear scanning start positions from each other and then to output multichannel video signals from the image areas.

Description: BACKGROUND OF THE INVENTION The present invention relates to an image recording apparatus to be incorporated in a high speed video-system and more particularly is concerned with an image recording apparatus provided with an image device capable of selecting an imaging area and reading out the area with very fast frame feed speed. An image device such as CCD or MOS-type image device for transducing an optical image elements into electric signals is generally utilized for a high speed camera or a high speed system for photographing images and reproducing records. For example, there are provided Japanese Patent Application National Publication Nos. 56-501704 and 57-501309, showing conventional image devices in which an imaging surface is formed by a plurality of two-dimensional arrangments of photoelectric transfer elements such as photodiodes, the imaging surface is divided into a plurality of rectangular blocks along the vertical row direction of the imaging surface for reading out with high speed the images formed on the imaging surface, and quick read-out of frame feed speed can be performed by scanning simultaneously parallelly a plurality of lines of the photoelectric transfer elements respectively arranged in the divided rectangular blocks. However, the imaging surface of the image device of such prior art to be incorporated in the high speed video-system is divided into a plurality of rectangular blocks along the vertical row direction to thereby realizing high speed read-out of the image, but the division of the imaging surface into the rectangular blocks provides a problem of limiting objects as shown as imaging areas. Furthermore, in the prior art image device, since the imaging surface is divided along the vertical row direction, skipping operation in the vertical direction can be relatively easily performed by a simple circuit structure without adversely affecting on number of the frame. However, skipping operation in the horizontal direction requires a high speed circuit structure because of a lot of the photoelectric transfer elements and application of high speed pulses, which results in a complicated control thereof, and moreover, a degree of freedom for the selection of the imaging areas is limited and, for this reason, every one of the imaging areas of the respective rectangular blocks can only be selected and it is hence difficult to select other imaging areas. US-A-4339775 describes a fast frame recorder apparatus in which an entire frame is divided into a number of horizontal blocks, each block comprising a number of full rows of pixels. Circuitry is provided which enables all of the rows in a single block to be scanned in parallel, the circuitry thereby providing a parallel output of dimension corresponding to the number of rows in the block. For a frame of n blocks, the full frame scan rate is thereby reduced by a factor of n, by scanning a number of rows in parallel. GB-A-2113949 describes a full serial output device which includes a first plurality of shift registers, each of which is preloaded to determine a scan start position in each row, and a second plurality of shift registers in that row which determine a number of shift impulses required to complete a scan. These shift registers control switching rows to serially read out elements in a detector row. Further shift registers may be provided for controlling vertical scanning of rows to provide a full serial output. SUMMARY OF THE INVENTION An object of the present invention is to substantially eliminate defects or drawbacks encountered in the prior art and to provide an image recording apparatus capable of improving degree of freedom for selecting image areas of an imaging surface of an image device of the image recording apparatus and of reading out a picture image on the imaging surface with super-high frame feed speed. This and other objects can be achieved according to the present invention by providing an image recording apparatus in accordance with claim 1. According to the image recording apparatus of the character described above, the imaging surface of the image device of two-dimensional arrangement is divided into a plurality of blocks along line direction of the imaging surface and a plurality of scanning lines are formed in accordance with the photoelectric transfer elements arranged in the longitudinal direction of the respective blocks. A plurality of line scanning start positions are set along the scanning direction of the blocks. The first scanning circuit selects the block to be read out and the second scanning circuit selects and controls, as specified in claim 1, the linear scanning start position and the number of linear scanning picture elements to thereby select predetermined imaging areas having different linear scanning start positions and then to output the multichannel video signals from the selected areas, whereby the selection freedom of the imaging areas can be improved and the super-high speed frame feed speed read-out can be realized. BRIEF DESCRIPTION OF THE DRAWINGS For a better understanding of the present invention and to show how the same is carried out, reference is made to, by way of preferred embodiments, to the accompanying drawings, in which: Fig. 1 is a block diagram of an image recording apparatus of a first embodiment according to the present invention; Fig. 2 shows a block of a part of the image recording apparatus of Fig. 1 representing functional layout of the first embodiment; Figs. 3A and 3B are timing charts at a time of selecting a specific block from divided blocks of an imaging surface of an image device of the image recording apparatus; Figs. 4A, 4B and 4C are views in which image area read-out start positions are changed with respect to one image surface; Fig. 5 is a block similar to that of Fig. 2 but related to a second embodiment according to the present invention; Fig. 6 is a table showing selection examples of vertical blocks of an image device of Fig. 5; and Fig. 7 is a table showing selection examples of horizontal read-out start positions of the image device of Fig. 5. DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the image recording apparatus according to the present invention will be described hereunder with reference to Figs. 1 to 4. Fig. 1 shows a block diagram of an image recording apparatus 10 to be incorporated in a high speed video-camera or high speed video-system. The image recording apparatus 10 is provided with an image device or sensor 11 such as CCD or MOS-type image device for transducing optical image elements into electric signals in two-dimensional arrangement capable of storing and reading out images, and the image device 11 is driven by a drive signal from a drive circuit 12 to thereby start the read-out operation. The drive circuit 12 is driven by a clock pulse of 25MHz, for example, from a clock 13. As shown in Fig. 2, the image device 11 is provided with an imaging surface (light receiving surface) 15 composed of a plurality of photoelectric transfer elements, in two-dimensional arrangement, such as photodiodes composed of MOS-type semiconductor elements, a vertical scanning circuit 16 as a first scanning circuit constituting a block selection shift register, a horizontal scanning circuit 17 as a second scanning circuit constituting a line shift register, and an output unit 18 for outputting a multichannel analog video signal in response to the scanning of the imaging surface. The multichannel analog video signals S1-S16 outputted from the image device 11 are amplified by an amplifier circuit 20, and thereafter, are inputted into an AD (analog-to-digital) converter 21 in which the analog video signals are converted into digital video-signals. The digital video signals are then recorded continuously in a memory 22 having a large capacity as data, and the data thus stored in the memory 22 is read out in time series by a read-out memory, not shown, to thereby reproduce the images at a speed lower than the imaging speed. As shown in Fig. 2, the image device 11 forms the imaging surface 15 in the form of format of the photoelectric transfer elements as imaging elements having two-dimensional arrangement of, for example, two hundred and sixty-six (266) columns R1, R2, --- R266 and two hundred and fifty-six (256) rows C1, C2, --- C256, and the imaging surface 15 is also divided into sixteen blocks B1, B2, --- B16 of rows. Each block comprises sixteen photoelectric transfer element rows of the imaging surface 15 and thereby sixteen scanning lines are also constituted by the respective sixteen photoelectric transfer element rows. The sixteen scanning lines of the respective blocks B1, B2, --- B16 are parallelly scanned in order by the vertical and horizontal scanning circuits 16 and 17, and the analog video signals S1, S2, --- S16 are then outputted through the output unit 18. The reason why the number of the photoelectric transfer elements in a row is larger than the number of photoelectric transfer elements in a column by about 10 is a countermeasure for a margin with respect to noise. The imaging surface 15 has a plurality of, five, for example, horizontal scan start positions, H1 (first image element), H2 (sixty-fifth image element), H3 (ninety-seventh image element), H4 (one hundred and twenty-ninth image element) and H5 (one hundred and ninety-third image element). In Fig. 2, reference numeral 24 denotes an optical black BOB for setting a reference point (D point) of the AD converter 21. Horizontal clock pulses HC1 and HC2 outputted from the drive circuit 12 and inputted into the horizontal scanning circuit 17 are utilized as timings for reading out every picture element in a row of photoelectric transfer elements (266 in total). When the horizontal read-out is started with any one of the horizontal shift register synchronizing pulses H1, H2, --- H5, the picture element read-out is performed from this starting time with these horizontal clock pulses HC1 and HC2. These horizontal clock pulses HC1 and HC2 have 12.5 MHz, respectively, but have phases different from each other by 180° and have the horizontal scanning speed of 25 MHz. The reading-out of the images recorded on the imaging surface 15 of the image device 11 by the image recording apparatus 10 will be described hereunder. First, when the imaging surface 15 of the image device 11 is fully scanned, the drive circuit 12 is driven by the clock 13 and generates, as drive signals, a vertical reset pulse VR and a vertical shift register clock pulse VC, which are transmitted to the vertical scanning circuit 16 as shown in Fig. 3 to thereby enable and drive the vertical scanning circuit 16. This vertical scanning circuit 16 is reset by the vertical reset pulse VR and selects the first block B1 by the vertical shift register clock pulse VC, enabling the image scanning operation of the first block B1. Simultaneously, a horizontal reset pulse HR and a horizontal shift register synchronizing pulse H1 are transmitted from the drive circuit 12 to the horizontal scanning circuit 17 to start the scanning of the first picture element, thus driving the horizontal scanning circuit 17. The horizontal scanning circuit 17 is reset by the horizontal reset pulse HR and the scanning is started sequentially from the first picture element R1 by the horizontal shift register synchronizing pulse H1. According to these operations, the picture image recorded on the imaging surface 15 of the image device 11 is scanned parallelly simultaneously along all sixteen scanning lines of the selected first block B1, starting from the first picture element R1. The analog video signals S1, S2, --- S16 obtained by this scanning operation are outputted from the output unit 18. The drive circuit 12 is provided with a horizontal counter for the horizontal scanning operation so that the horizontal scanning has once been completed by transmitting the horizontal reset pulse HR to the horizontal scanning circuit 17 at a time of the completion of the horizontal scanning of all the picture elements (256 numbers), the vertical shift register clock pulse VC is then transferred to the vertical scanning circuit 16 to finish the enabling of the operation of the first block B1, and then the scanning is skipped in the vertical direction to thereby selec't the second block B2 and to enable the operation of the second block B2. Thereafter, the horizontal shift register synchronizing pulse H1 for the first picture element read-out start is transferred to the horizontal scanning circuit 17 from the drive circuit 12 to thereby start the read-out of the second block B2. Subsequently, substantially the same operation as that described above is repeated with respect to the respective blocks B3 to B16, and the read-out operations of these blocks can be performed. After the read-out of the final block B16, the vertical reset pulse VR and the vertical shift register clock pulse VC are transferred to the vertical scanning circuit 16 for the treatment of the next picture image on the imaging surface 15. In the next operation, the first block B1 is again selected and the operation of this first block B1 is enabled. The output unit of the image device 11 outputs, to the AD converter 21, the analog video signals S1, S2, --- S16 corresponding to the sixteen scanning lines respectively corresponding to the enabled selected blocks B1, B2, --- B16. The not-enabled and not-selected blocks are affected by the image scanning operation, and electric charges are accumulated in accordance with incident light. Image treatment operation for selecting and then scanning imaging areas from the imaging surface 15 of the image device 11 will be described hereunder. The description is made with reference to a case that a central square section of sixty-four (64) horizontal picture elements by sixty-four (64) vertical picture elements is read out. The drive circuit 12 is driven by the clock 13 and generates, as a drive signal, the vertical reset pulse VR to the vertical scanning circuit 16, which is reset by this vertical reset pulse VR. Next, as shown in Fig. 3B, the drive circuit 12 generates vertical shift register clock pulses sequentially by seven (7) clocks to the vertical scanning circuit 16 to thereby select the seventh block B7, enabling the operation of the selected seventh block B7. Under the operation enabled condition of the seventh block B7, the drive circuit 12 generates drive signals, as address signals, to the vertical scanning circuit 17, the horizontal reset pulse HR and the horizontal shift register synchronizing pulse H3 for start the scanning of the ninety-seventh (97) picture element. The horizontal scanning circuit 17 is thus reset by the horizontal reset pulse HR and the scanning is started from the ninety-seventh picture element in response to the horizontal shift register synchronizing pulse H3. The horizontal scanning operation by means of the horizontal scanning circuit 17 is counted by the horizontal counter for the horizontal scanning in association with the drive circuit 12, and the drive circuit 12 generates the horizontal reset pulse HR to the horizontal scanning circuit 17 to stop and then reset the horizontal scanning by taking the timing at a time of the completion of the horizontal scanning by the amount of the sixty-four picture elements. While, the vertical shift register clock pulse VC is transferred to the vertical scanning circuit 16 from the drive circuit 12 to thereby finish the enabling of the operation of the block B7, and the operation is then skipped to select the eighth block B8, enabling the operation of the eighth block B8. Thereafter, the horizontal shift register synchronizing pulse H3 for starting the scanning of the ninety-seventh picture element is transferred to the vertical scanning circuit 17 to read out the selected eighth block B8. These operations are repeated for the succeeding operations, and at the time of the completion of the read-out of the block B10 by a vertical counter for the vertical scanning provided for the drive circuit 12, the vertical reset pulse VR and the subsequent vertical shift register clock pulses VC (by seven clocks) are transferred to the vertical scanning circuit 17 for the read-out of the next imaging area A, and the scanning of the next block is started. The imaging areas can be selected in accordance with the sequential manner for transferring vertical shift register clock pulses VC from the drive circuit 12 and the numbers of combination of the horizontal shift register synchronizing pulses H1, H2, H3, H4 and H5. The imaging areas can be selected from various areas other than the areas A and B shown in Fig. 2, thus improving the selection freedom of the imaging areas. As described above, the drive circuit 12 is provided with the horizontal and vertical counters respectively for the horizontal and vertical scannings, whereby the setting of the whole imaging surface, the starting positions and the numbers of the picture elements of the horizontal picture element of the imaging area (divided picture), the starting positions of the vertical blocks B1 to B16, and the setting of the numbers of the blocks, can be performed. Further, in the scanning time of the whole picture surface, the time lag from the picture image dividing time on the scanning can be neglected by giving a margin by the time amount corresponding to the maximum pulse as shown in Fig. 3A to the vertical shift register clock pulse VC which is transferred from the drive circuit 12 to the vertical scanning circuit 16. The read-out data speed of the image recording apparatus 10 is for example of about 25 MHz, by which frame feed speed is obtained as shown in the following table 1. Scanning Mode Horizontal Picture Elements *Vertical Picture Elements Frame Feed Speed (N/sec) Whole Surface 256 * 256 4500 Divided Surface (1) 256 * 128 9000 Divided Surface (2) 256 * 64 18000 Divided Surface (3) 128 * 128 13000 Divided Surface (4) 128 * 64 27000 Divided Surface (5) 64 * 64 40500 The imaging area read-out area can be changed in its read-out starting position by every completion of the treatment of one image picture. Figs. 4A, 4B and 4C show examples of cases in which the read-out starting positions are changed to one picture image of 64 * 64 picture elements. In these cases, the frame feed speed becomes high speed of 1/40500 sec., thus making enable the super-high speed treatment. As described above, one portion of the whole image surface can be read out by changing the read-out starting positions every completion of the treatment of each image while following the movement of an object to be imaged. Another embodiment of the image recording apparatus according to the present invention will be described hereunder with reference to Figs. 5 to 7. An image recording apparatus 10A of this embodiment is basically different from the image recording apparatus 10 of Fig. 2 with reference to the drive signal from the drive circuit 12 to the vertical scanning circuit 16 and the horizontal scanning circuit 17, but other construction is not different from that of the first embodiment, and accordingly, in Figs. 5 to 7, like reference numerals are added to elements or portions corresponding to those of the first embodiment of Figs. 1 to 4. In this embodiment of Fig. 5, vertical shift register signals VC1 to VC4, as shown in Fig. 6, are transferred as drive signals from the drive circuit 12 to the vertical scanning circuit 16 to thereby select the blocks B1 to B16. Simultaneously, horizontal shift register synchronizing signals HC1 to HC3, as shown in Fig. 7, are transferred from the drive circuit 12 to the horizontal scanning circuit 17 to thereby select the horizontal read-out start position from H1 (first picture element), H2 (sixty-fifth picture element), H3 (ninety-seventh picture element), H4 (one hundred and twenty-ninth picture element) and H5 (one hundred ninety-third picture element). In the described embodiments, the imaging surface of the image device is divided into sixteen blocks and five horizontal read-out start positions (i.e. linear scanning start positions) are set to the horizontal scanning circuit, but the numbers of the blocks and start positions are not limited to those numbers and may be optionally selected as occasion demands.

Claims: An image recording apparatus (10) adapted to store and read out an image, comprising: an image device (11) having an imaging surface (15) in which a plurality of photoelectric transfer elements are arranged in a plurality of rows (C1...C256) with the plurality of rows of the imaging surface being divided between a plurality of adjacent blocks (B1...B16); a first scanning circuit (16) adapted to select at least one of the blocks to be scanned; a second scanning circuit (17) adapted to select a scan start position from a plurality of possible predetermined scan start positions (H1...H5) along a row of the selected at least one of the blocks, said plurality of possible scan start positions being substantially fewer in number than the number of transfer elements in said row, and adapted to select a number of elements in said row to be sequentially scanned along said row from said selected scan start position; a drive circuit (12) for transmitting one or more vertical drive pulses (VC) to the first scanning circuit (16) to control the selection of the at least one of the blocks and for transmitting drive signals including horizontal shift register synchronizing pulses (H1...H5, HC1, HC2) to the second scanning circuit (17) in order to control the selection of the scan start position from the plurality of possible predetermined scan start positions on the basis of the horizontal shift register synchronizing pulses (H1...H5) and to control the sequential scanning of elements in said selected row; said apparatus further adapted to scan simultaneously all rows in said selected at least one of the blocks from said selected scan start position; and including means (18,S1...S16) to simultaneously output video signals corresponding to all said simultaneously scanned rows. A image recording apparatus according to claim 1 wherein said first scanning circuit (16) comprises a vertical scanning circuit for carrying out vertical scanning of successive blocks (B1...B16) and said second scanning circuit (17) comprises a horizontal scanning circuit for carrying out horizontal scanning of successive columns of elements (R1...R266). An image recording apparatus according to claim 1 further comprising a clock (13) for transmitting a signal for driving the drive circuit (12). An image recording apparatus according to claim 3 further comprising: an amplifying circuit (20), operatively connected to the image device (11) and adapted to amplify video signals received therefrom; an analog to digital converter (21) connected to the amplifying circuit (20) and adapted to convert amplified analog video signals received from the amplifying circuit to digital video signals; and a memory (22) coupled to the analog to digital converter adapted to store digital video signals therefrom. An image recording apparatus according to claim 2 further comprising: a first counter adapted to generate a horizontal reset signal (HR) to reset the horizontal scanning circuit (17) upon completion of scanning of all said selected number of elements in said selected row; and a second counter adapted to generate a vertical reset signal (VR) to reset the vertical scanning unit (16) upon completion of scanning of a predetermined number of successive blocks.

Inventors: MITSUI KENJI, TSUJI MASATAKA, MITSUI, KENJI, TSUJI, MASATAKA
Applicants: PHOTRON KK, KABUSHIKI KAISHA PHOTRON
Application year: 1992
Main classification: H04N3
IPC codes: H04N5, H04N3