A system for designing a placement of a placement element

Abstract: A system for designing the placement of a placement element comprises a placement element storage unit (22) for storing placement element data on placement elements, a placement set unit (21) for setting the placement of the placement element and a placement output unit (47) for outputting the result of setting the placement. The placement set unit (21) comprises a unit area data storage unit (31), a plurality of intra-virtual-placement-area placement element position storage units (38, 39), a pointer storage unit (33) and a placement control unit (29), the unit area data storage unit (31) stores unit area data on unit areas each for placing a placement element in. The intra-virtual-placement-area placement element position storage unit (38, 39) stores placement element data on placement elements in virtual placement areas. The pointer storage unit (33) specifies placement element data stored in the intra-virtual-placement-area placement element position storage unit (38, 39) to which the unit areas split from the placement area correspond. The placement control unit (29) sets the placement of the placement elements in the placement area such that the placement elements whose placement element area are stored in the virtual placement areas are placed in respective unit areas stored in the unit area data storage unit.

Description: This invention pertains to a system for designing a placement of a part in general, and more particularly to a system for designing a placement of a placement element e.g. a cell, a terminal or a wire, in an integrated circuit, a printed circuit board or the like. Placement elements, such as cells, terminals and wires in an integrated circuit, a printed circuit board or the like need to be placed, such that cells are integrated as highly as possible with the lowest possible routing cost. A placement of placement elements has been determined by a comparison of the probability of a current placement with that of a new placement, in which routing costs based on the wire lengths or energies calculated by a simulated annealing method determine the probabilities. Because a placement designing system such as this takes an increasing amount of time when placement elements increase in number, a faster system has been sought, as an integrated circuit or a printed circuit board is more densely packaged. The following are definitions of terms used in a forthcoming description. A placement element: A placement element is an object to be placed in an integrated circuit, a printed circuit board or the like. Placement elements such as cells, terminals connected to a cell and wires are placed in an integrated circuit. Placement elements such as a placed cell and a via hole, which actually take up a part of a placement area, are placed in a printed circuit. A cell is defined as a single placement unit such as a single processor or a logic gate unit. A placement area: A placement area is an area for placing placement elements in, and is structured by placement element data on an placement element placed in an area, which are stored in a storage unit. A placement area is outputted e.g. to a display as a printed circuit board or an integrated circuit board for placing placement elements in. A unit area: A unit area is obtained by splitting a placement area through an assignment of data (e.g. a unit area number) for specifying the unit area. For example, a unit area for a cell is ordinarily a basic cell (hereafter abbreviated as a BC), which is a form unit of a cell in a gate array, and a unit area for a wire is ordinarily a grid unit, where a grid is defined as the smallest unit of a VLSI (very large scale integrated circuit). One [1] cell may comprise a plurality of unit cells. A virtual placement area: A virtual placement area for virtually placing a placement element in is assigned to each type of a placement element in correspondence with data (e.g. a unit area number) for specifying a unit area for placing a placement element in. It is structured by a storage unit for storing e.g. attributes of a placement element, a proper name and a unit area number for making a placement. When a placement element is a cell, a terminal, a wire, or a via hole, a virtual placement area is called a cell area, a terminal area, a wire area or a via hole area. A conventional placement designing system is such that a cell has data e.g. on the position of a placement area when the placement of a circuit element of an integrated circuit is designed and that a terminal and a wire respectively have terminal data on connecting cells and wire data, thereby obtaining a placement of a cell and a wire connected to a cell. Figure 1 shows a conventional placement designing system. In Figure 1: 1 is a pointer storage unit for storing a pointer to placement element data (e.g. cell data, terminal data or wire data) on each type of placement element; 2 is a placement storage unit for storing placement element data (e.g. cell data, terminal data or wire data) on each type of placement clement; and 3 is a placement area storage unit. 3' is a unit area split from a placement area in BC units, where each RC has a coordinate position expressed e.g. in an x-y coordinate value; 4 is cell data on a cell having a cell number 1, which represents a placement element such as a logic gate in an integrated circuit; 5 is cell data on a cell having a cell number 2, which represents a placement element such as a logic gate in an integrated circuit; 6 is terminal data on a terminal having a terminal number A1, which connects the cell having cell number 1 to a wire having a wire number 1; 7 is terminal data on a terminal having a terminal number A2, which connects the cell having cell number 1 to a wire having a wire number 2; 8 is terminal data on a terminal having a terminal number A3, which connects the cell having cell number 2 to the wire having wire number 2 and a wire having a wire number 3; 9 is terminal data on a terminal having a terminal number A4, which connects the cell having cell number 2 to the wire having a wire number 3; 10 is wire data on the wire having wire number 1; 11 is wire data on the wire having wire number 2; and 12 is wire data on the wire having wire number 3. Conventionally, the placement storage unit 2 has data storage areas respectively for cell data 4 (on the cell having cell number 1), cell data 5 (on the cell having cell number 2), terminal data 6 (on the cell having terminal number A1), terminal data 7 (on the terminal having terminal number A2), terminal data 8 (on the terminal having terminal number A3), terminal data 9 (on the terminal having terminal number A4), wire data 10 (on the wire having wire number 1), wire data 11 (on the wire having wire number 2) and wire data 12 (on the wire having wire number 3). Pointer storage unit 1 comprises pointers to data of respective placement elements. The contents of the placement storage unit 2 and the placement area storage unit 3 are explained more concretely below. The placement area storage unit 3 stores coordinate positions of respective unit areas split from a placement area and characteristics of the unit areas, for example, a prohibition on a cell placement in a unit area. The placement storage unit 2, on the other hand, stores concrete data e.g. on a cell and a terminal. For instance, the placement storage unit 2 stores the coordinate position of a unit area for placing a cell in and the cell number of a cell connected to a terminal. Figure 2 shows a data structure of a conventional placement designing system. More specifically, Figure 2 shows an example of a placement and routing of a gate array. In Figure 2: 13 is data representing a process of a gate array; 14 is a pointer to a placement element; 15 is what stores global data such as a temperature and dimensions of a placement area in an integrated circuit; 16 (corresponding to 1 shown in Figure 1) is a pointer storage unit for storing pointers to data on respective placement elements, such as a pointer to cell data, a pointer to terminal data and a pointer to wire data; 17 is a cell area for storing in a sequence of cell numbers cell data such as coordinate positions of the unit areas at which cells (e.g. cell 4 (having cell number 1) and cell 5 (having cell number 2) shown in Figure 1) are placed; 18 is a terminal area for storing in a sequence of terminal numbers terminal data such as cell numbers of cells to which terminals (e.g. terminal 6 (having terminal number A1), terminal 7 (having terminal number A2), terminal 8 (having terminal number A3), and terminal 9 (having terminal number A4) shown in Figure 1) are connected and coordinate positions of unit areas at which the terminals are placed; and 19 is a wire area for storing in a sequence of wire numbers wire data such as terminal numbers of terminals to which wires (e.g. wire 10 (having wire number 1), wire 11 (having wire number 2) and wire 12 (having wire number 3)) are connected and coordinate positions of the unit areas at which wires are placed. The temperature and dimensions of a placement area in an integrated circuit referred to here as global data are parameters for use in calculating routing costs based on the wire lengths or energies according to a simulated annealing method, which will be described later. Figure 1 looks as if the pointer to cell data points to cell 4 (having cell number 1) only and the pointer to terminal data points to terminal 6 (having terminal number A1) only. However, a pointer to cell data actually points to the head end of a cell area (e.g. a cell area 17 shown in Figure 2) for storing cell data sequentially. That is, the placement storage unit 2 shown in Figure 1 is equivalent to a combination of the cell area 17, the terminal area 18 and the wire area 19 shown in Figure 2. Conventionally, a pointer to cell data specifies storage areas of data on respective cells and a pointer to terminal data specifies storage areas of data on respective terminals according to the data structure shown in Figure 2. Based on the data in the storage areas specified by these pointers, a placement has been designed by placing cells at specified coordinate positions, by obtaining a cell connected to a terminal and by connecting a terminal to a specified cell. A conventional placement designing system is explained below by using the coordinate positions of respective unit areas shown in Figure 1. Firstly, the pointer storage unit 1 specifies the pointer to cell data or the pointer to terminal data. Secondly, according to the pointer to cell data, the pointer storage unit 1 sequentially specifies cell numbers 1, 2, etc., and writes into the cell area 17 cell data such as the coordinate positions (i.e. (1, 3) for cell 4 (having cell number 1) and (1, 4) for cell 5 (having cell number 2)) of the unit areas in the placement area at which cells 4 and 5 are placed. Thirdly, according to the pointer to terminal data, the pointer storage unit 1 sequentially specifies cell numbers A1, A2, A3, A4, etc., and writes into the terminal area 18 terminal data such as the cell numbers (i.e. 1 for terminal 6 (having terminal number A1), 1 for terminal 7 (having terminal number A2), 2 for terminal 8 (having terminal number A3) and 2 for terminal 9 (having terminal number A4)) of the cells to which the terminals 6 through 9 are connected. Fourthly, according to the pointer to wire data, the pointer storage unit 1 sequentially specifies wire numbers 1, 2, 3, etc., and writes into the wire area 19 wire data such as the terminal numbers (i.e. A1 for wire 10 (having wire number 1), A2 and A3 for wire 11 (having wire number 2) and A3 and A4 for wire 12 (having wire number 3)) of the terminals to which the wires 10, 11 and 12 are connected. As well, although a placement area of an integrated circuit and a wire area of a printed circuit board may carry placement element data, the placement element data are limited e.g. to data on cell dimensions, which do not include concrete data on a terminal or a wire between terminals. More specifically, the placement element data were limited only to such data as on the number of cells classified by their dimensions placed in respective split areas. Figure 3 shows a method for changing a placement based on a conventional simulated annealing method. A conventional placement change method is explained below according to the numbers shown in Figure 3. (1) New coordinate positions are created stochastically for placement elements such as a cell and a terminal. A random number, for example, is used for determining the new coordinate positions with a creation probability being uniform throughout a placement area. (2) An energy difference before and after a placement change is calculated, where an energy is determined e.g. by a wire length. (3) By comparing the energy difference, an index as a benchmark for determining whether or not to move to a new coordinate position is created. (4) An arbitrary number is generated as a random number, which is compared with the index calculated in (3), for determining whether or not to move to a new coordinate position. On positively determining a move to a new coordinate position, a placement is made at the new coordinate position. On negatively determining a move to a new coordinate position, a placement at a current coordinate position is maintained. (1) through (4) are repeated until an optimal placement is obtained in (5) through a satisfaction of a terminating condition, thereby obtaining an optimal placement. (5) The terminating condition is, for example, any one of (a) repetition a predetermined number of times, (b) a repetition until reaching less than a predetermined energy, and (c) a repetition until an energy reduction volume is less than a predetermined energy E at the end of N times where N is a predetermined number. A conventional placement designing system stores placement elements in a sequence of cell numbers and in a sequence of terminal numbers, in which a cell has a coordinate position of a placement area (a position for placing a unit area in), a terminal has a cell number of a cell for placing the terminal in, and a wire has a terminal number to which the wire is connected. When a cell undergoes a placement change, after all cells are sequentially accessed for changing connection data (e.g. on a change of a cell coordinate value, a terminal connected to a cell and a wire connection), the cells and terminals are sequentially accessed for obtaining new placement data. Hence, a conventional placement designing system takes a large amount of time for processing a placement change. Also, because of the data structure, since the coordinate positions must be searched in the sequence of cell numbers and in the sequence of terminal numbers for a conversion to a new coordinate position in a placement change, the conventional method for designing a placement and a routing is not fit for a parallel computer incorporating a multiprocessor system. Problems in changing a cell placement are explained in further detail below. When a cell placement is changed, a critical point is that the changed cell has an overlap with another cell. To examine a cell overlap, there is a need to check, for each cell, whether a coordinate position after a cell movement is the same as a coordinate position before a cell movement. When a cell is moved, terminal data need to be updated because the position of a terminal connected to the cell may be changed. When a cell does not have terminal data but instead a terminal has cell data as shown in Figures 1 and 2, all terminal data must be accessed for searching for a terminal connected to a cell. When, for example, a position of the cell having cell number 1 is changed, a new coordinate position must be given to the cell having cell number 1. To examine whether a cell already exists at the new coordinate position, it must be checked whether the new coordinate position of the cell having cell number 1 is equal to the coordinate position of the cell having cell number 2 by accessing cell data on the cell having cell number 2. To search for all the terminals connected to the cell having cell number 1, it needs to be checked whether or not respective terminals (having terminal numbers A1, A2, A3 and A4) are connected to the cell having cell number 1 by accessing terminal data on these terminals (having terminal numbers A1, A2, A3 and A4). Accordingly, the processing for a change in a cell placement tends to require a greater amount of time. When a placement element such as a cell corresponds with a placement area, a cell can have few data, which makes it difficult, if not impossible, to determine a placement satisfying a strict constraint (e.g. that a single cell is placed over a plurality of unit areas) dependent on a cell shape necessary in an actual placement or to evaluate the obtained placement under a strict constraint. Also, conventionally, because the probability of creating a new coordinate value for changing a placement is uniform throughout a placement area, a movement destination is created unconditionally irrespective of cell characteristics. Hence, not only is an efficiency low, but also processing takes too much time. Software Engineering Journal, Vol. 5, No. 6, November 1990, London, GB includes at pages 339-349 a paper by H.S. Facanha entitled "Data structures for physical representation of VLSI". This paper discloses a system according to the preamble of accompanying claim 1, and employs an "imaginary square grid" comprising a plurality of rectangles greater in size than a basic cell. This invention pertains to a system for designing a placement/routing of a placement element for expediting design processes. According to the present invention, there is provided a system for designing a placement of a placement element, for use in a placement designing system comprising: a placement element storage means for storing placement element data representing placement elements; a placement set means for setting an actual placement of said placement element in a placement area; and a placement output means for outputting the result of setting said placement; said placement set means comprising: a unit area data storage means for storing unit area data representing unit areas, said unit areas being obtained by splitting said placement area, said unit area being a minimum unit in which to place said placement element; a plurality of intra-virtual-placement-area placement element position storage means, provided for each type of placement element, for storing placement element data representing placement elements placed virtually in virtual placement areas, wherein the virtual placement areas have a multilayer structure which allows overlap of a placement element during an intermediate state of design; a pointer storage means for specifying placement element data stored in said intra-virtual-placement-area placement element position storage means to which said unit areas correspond; and a placement control means for setting the placement of placement elements in said placement area such that said placement elements whose placement element data are stored in said virtual placement areas are placed in respective unit areas in said unit area data storage means, according to the placement element data specified by said pointer storage means. For a better understanding of the present invention and as to how the same may be carried into effect, reference will now be made by way of example to the accompanying figures in which: Figure 1 shows a conventional placement/routing designing system; Figure 2 shows a data structure of a conventional placement/routing designing system; Figure 3 shows a placement change method based on a conventional simulated annealing method; Figure 4 is a block diagram of an example of this invention; Figure 5 is a conceptual view of a placement area and a virtual placement area of an example of this invention; Figure 6 is a block diagram showing a structure of an embodiment of this invention; Figure 7 is a conceptual view of an embodiment of a placement designing system of this invention; Figure 8 is a conceptual view of a cell area and a unit area in an embodiment of this invention; Figure 9 is an explanatory chart illustrating a degree of redundancy in this invention; Figure 10 is a diagram illustrating a data structure in an embodiment of this invention; Figure 11 is an explanatory chart of the contents of data whose structure is shown in Figure 10; Figure 12 shows an algorithm for placing a cell by a cell area creation unit; Figure 13 shows an embodiment of an algorithm for changing a placement when there is no redundancy; Figure 14 shows an embodiment of an algorithm for changing a placement when there is a redundancy; Figure 15A shows an algorithm for checking the possibility of placing an element pursuant to an example of this invention; Figure 15B shows an algorithm for checking the possibility of placing an element pursuant to a prior art; Figure 16 shows an example of a probability distribution for creating a coordinate value; Figure 17 shows in detail the structure of a coordinate position creation unit of an example of this invention; Figure 18 shows an algorithm for a coordinate position creation unit of an example of this invention; and Figure 19 shows an algorithm of a simulated annealing method with an example of this invention applied. This invention aims at providing a placement designing system expediting the design process with easy application to a parallel computer. According to this invention, virtual placement areas for virtually placing in placement elements such as a cell and a terminal are set on a storage unit for respective types of placement elements. Pointers specify virtual areas of placement elements placed in respective unit areas of a placement area, for obtaining placement elements placed in respective unit areas based on placement element data on respective placement elements in virtual placement areas, thereby obtaining placement element data on a placement area. Here, the word "virtual" used in a phrase "virtual placement area" should be construed first as meaning a check of an optimal placement of placement elements placed virtually and second as meaning an allowance of a cell overlap by a multilayer structure of virtual areas (described later) during an intermediate state of design even though cells cannot be stacked up for a placement in a printed circuit board. Figure 4 is a block diagram of this invention. In Figure 4: 21 is a placement/routing unit, structured by a central processing unit of a computer and a main memory, an external memory device or the like, for placing placement elements;. 22 is a placement element storage unit; structured by a memory device inside of a computer or an external memory device such as a disk file apparatus, for storing placement elements (a cell, a wire, etc.); 22' is data on a placement element A; 22" is data on a placement element B; 23 is a placement data input unit for inputting placement data defining a wire placement condition such as wire data of a circuit, which may comprise what inputs placement data stored in a magnetic medium such as a magnetic tape and a disk apparatus, or an input unit such as a keyboard; 24 is placement data inputted by the placement data input unit 23; 25 is a parameter inputted by the placement data input unit 23, expressing a parameter (such as a temperature when a placement is performed by a simulated annealing method (to be described later)) necessary for creating a coordinate position by a coordinate position creation unit 44 (described later); 29 is a placement control unit, structured by an operations program for executing respective processes developed on a central processing unit and a main memory, for controlling a creation of placement data. 29' is a storage unit, such as a main memory and an external memory, for storing placement element data on placement elements in virtual placement areas and on unit areas; 30 is a unit area data creation unit for creating a placement area, for dividing the placement area into unit areas, for assigning coordinate positions and for setting the unit areas in a unit area data storage unit 31; 31 is a unit area data storage unit for storing unit areas created by the unit area data creation unit 30; 32 is a pointer creation unit for creating pointers for specifying placement elements in virtual placement areas for respective unit areas; 33 is a pointer storage unit for storing pointers specifying placement elements in respective unit areas; 34 and 35 are a placement element A creation unit and a placement element B creation unit respectively for creating in respective virtual storage areas, data (e.g. on a position in placement areas in which placement element A and placement element R are placed) according to the placement data 24, data on respective placement elements and coordinate positions created by the coordinate position creation unit 44 (described later); 38 and 39 are intra-virtual-placement-area placement element A position storage unit and intra-virtual-placement-area placement element B position storage unit respectively for storing e.g. position data on placement in placement areas of placement elements A and B created respectively by the placement element A creation unit 34 and the placement element B creation unit 35. (The reason why the two [2] types (i.e. A and B) of placement elements are distinguished is because different types of placement elements, such as a cell, a terminal, a wire and a via hole, need to be distinguished. Of these placement elements, B represents those that must account for their degrees of redundancy.) 42 is a placement data creation unit for outputting placement data on respective placement elements in a placement area, based on virtual placement data of respective placement elements stored in intra-virtual-placement-area placement element A position storage unit 38 and intra-virtual-placement-area placement element B position storage unit 39 and placement area data stored in the unit area data storage unit 31; 43 is a degree-of-redundancy determination unit for determining a degree of redundancy e.g. when same wires are redundantly placed in a same unit area, and for recording the degree of redundancy in a wire area of a corresponding virtual placement area; 44 is a coordinate creation unit for creating a coordinate position for placing a placement element in; 45 is a probability distribution creation unit for the coordinate position creation unit 44 for creating a probability distribution such that a coordinate position after a creation is made in accordance with a probability distribution from a coordinate position before a creation; 46 is a degree-of-redundancy storage area for storing the degree of redundancy determined by the degree-of-redundancy determination unit 43; 47 is a placement output unit for outputting to a display or a printer placement data created by placement data creation unit 42 or an actual placement image; and 48 is a placement change necessity determination unit for determining whether to change a placement according to the placement created by the placement data creation unit 42 or to keep a placement at a current coordinate position. Figure 5 is a conceptual view of a placement area and a virtual placement area of this invention. Before describing the operations of the basic configuration shown in Figure 4, the concepts of a placement area and a virtual placement area of this invention are explained by Figure 5. 51 and 52 are groups of unit areas stored in the unit area data storage unit 31 respectively expressing coordinate positions of unit areas 51-1 through 51-4 and 52-1 through 52-4. The intra-virtual-placement-area placement element A position storage unit 38 is for storing, for example, position data on placement of placement element A in a placement area. The intra-virtual-placement-area placement element A position storage unit 38 has one [1] or more layers of virtual placement areas. 38' is a virtual placement area of placement element A. 38'-1 is a storage area in a first layer corresponding to unit area 51-1. 3B'-2 is a storage area in a second layer corresponding to unit area 51-1. The intra-virtual-placement-area placement element B position storage unit 39 has one [1] or more layers of virtual placement areas. 39' is a virtual placement area of placement element B. 39'-1 is a storage area in a first layer corresponding to unit area 51-1. 39'-2 is a storage area in a second layer corresponding to unit area 51-1. 39'-3 is a storage area in a third layer corresponding to unit area 51-1. The pointer storage unit 33 stores pointers to placement element data, stored in the virtual placement areas 38' and 39', on placement elements placed in respective unit areas. The unit area data storage unit 31 stores unit area data for specifying a pointer to data in a virtual placement area regarding a placement element currently placed in each unit area. More specifically, the unit area data storage unit 31 has the pointer storage unit 33 store in unit area 51-1 data on pointers to placement element A and placement element B. The pointer to placement element A specifies storage area 38'-1 (in the virtual placement area of placement element A 38') for storing data for specifying data on placement element A to be placed in unit area 51-1, e.g. a cell number when placement element A is a cell. The virtual placement area of placement element A 38' and the virtual placement area of placement element B 39' have multilayer structures. For instance, the reason why the virtual placement area of placement element A 38' comprises two [2] storage areas 38'-1 and 38'-2 is because two [2] cells may be stacked up in unit area 51-1 during a course of designing. More specifically, unless the virtual placement area of placement element A 38' has the plural storage areas 38'-1 and 38'-2, a cell may be moved only to a unit area currently placing no cell in. Especially, when a cell is large, it becomes impossible to change its position once being fixed. Having a plurality of virtual placement areas, other cells may be moved to a unit area for placing another cell in. Also, it becomes possible to move the cell originally placed in the unit area to a different unit area. Operations under the basic structure shown in Figure 5 are explained by referring to Figure 5 (and Figure 4). The placement/routing unit 21 reads and receives data on placement element A and placement element B from the placement element storage unit 22, and receives placement data and a parameter from the placement data input unit 23. This invention aims at obtaining a more desirable placement by changing placements a number of times. Hence, an initial placement is necessary for initiating a placement change, which must be generated one way or another e.g. randomly. The unit area data creation unit 30 splits the groups of unit areas 51 and 52 in a placement area into unit areas 51-1 through 51-4 and 52-1 through 52-4 by assigning coordinate positions to them. The placement element A creation unit 34 and the placement element B creation unit 35 respectively create data on placement element A and placement element B in correspondence with respective virtual placement areas, based on placement data 24. For example, when both placement element A and placement element B are placed in unit area 51-1, placement element A is placed virtually in storage area 38'-1 of virtual placement area 38' in the intra-virtual-placement-area placement element A position storage unit 38 in unit area 51-1. Likewise, placement element B is placed virtually in storage area 39'-1 of virtual placement area 39' in the intra-virtual-placement-area placement element B position storage unit 39 in unit area 51-1. Concurrently, in correspondence with the number expressing a position of a unit area, the pointer creation unit 32 creates a pointer to data on a placement element placed in the unit area for a storage in a pointer unit 33. The placement data creation unit 42 obtains, from virtual placements of respective placement elements specified by pointer storage unit 33 in respective unit areas, the types and numbers of placement elements placed in respective unit areas for creating placement data in the unit area data storage unit 30. For instance, according to the pointer of pointer storage unit 33 to placement element A in unit area 51-1, the placement data creation unit 22 obtains virtual placement data on placement element A in storage area 38'-1 of unit area 51-1. As well, according to the pointer of pointer storage unit 33 to placement element B in unit area 51-1, the placement data creation unit 42 obtains virtual placement data on placement element B in storage area 39'-1 of unit area 51-1. Then, the placement data creation unit 22 creates placement data on placement element A and placement element B placed in unit area 51-1. The placement data creation unit 42 thus creates placement data for all unit areas for an output to the placement output unit 47. The placement output unit 47 comprises a display, for instance, for displaying a unit area in correspondence with data stored in the unit area data storage unit 31 in a grid image on a screen and for outputting images of placement element A and placement element B placed in unit area 51-1. The placement change necessity determination unit 48 receives the placement data created by the placement data creation unit 42 and stochastically determines whether to change the placement of a placement element based on a newly created placement or to keep the current placement. The placement change necessity determination unit 48 calculates a routing cost or a routing energy (described later) for the wire length based on the new placement. The placement change necessity determination unit 48 creates an index for stochastically determining the necessity for a placement change based on the routing cost or the routing energy. Then, a random number is generated for determining the placement change through a comparison with the index. (For instance, placement elements are placed differently if a generated number is less than the index, and are kept "as is" otherwise.) On positively determining an execution of a placement change, the placement change necessity determination unit 48 changes the placement of a placement element according to the new placement. On negatively determining an execution of a placement change, the placement change necessity determination unit 48 keeps the old placement. Then, the placement change necessity determination unit 48 instructs to the coordinate position creation unit 44 to create a next coordinate position. On receiving an instruction from the placement change necessity determination unit 48, the coordinate position creation unit 44 generates a different coordinate position. Respective data creation units (the placement element A creation unit 34, the placement element B creation unit 35, the unit area data creation unit 30 and the pointer creation unit 32) create placement data for placement element A and placement element B for a storage in the intra-virtual-placement-area placement element A position storage unit 38, the intra-virtual-placement-area placement element B position storage unit 39, the unit area data storage unit 31 and pointer storage unit 33. Thereafter, according to the earlier described process, the new placement data are created. This invention is such that a coordinate position creation by the coordinate position creation unit 44 is not without regard to the coordinate position before the coordinate position creation, but instead such that a coordinate position correlated to the coordinate position before the coordinate position creation is generated according to the probability distribution created by the probability distribution creation unit 45, thereby minimizing meaningless placement changes. Also, when placement element B is a wire, for instance, same wires may be placed redundantly in a same unit area of a placement area. This invention is such that the degree-of-redundancy determination unit 43 determines such a degree of redundancy and expresses the placement/routing by recording the degree-of-redundancy. Therefore, multiple layers of same wires cannot be placed in a virtual placement area in correspondence with a same coordinate position. An input to the degree-of-redundancy determination unit 43 is an output from a placement element creation unit (e.g. the placement element B creation means 35 shown in Figure 4) requiring a a determination of a degree of redundancy. The degree-of-redundancy storage area 46 stores an output from the degree-of-redundancy determination unit 43. The intra-virtual-placement-area placement element B position storage unit 39 contains data stored in the degree-of-redundancy storage area 46, which becomes an input to the placement data creation unit 42. As described above, this invention is such that the unit area data storage unit 31 stores a pointer to a virtual placement area storing in placement element data on a placement element to be placed in each unit area. For instance, when a cell in unit area 51-1 is to be moved, to examine whether or not unit area 51-1 has already another cell placed in, storage areas 38'-1 and 38'-2 in placement element A area 38' of the virtual placement area in intra-virtual-placement-area placement element (A) storage unit 38 need only be accessed in correspondence with the cell. Because this sheds the necessity for accessing all cell data as in a prior art, the processing time can be reduced significantly. Although Figure 4 shows a structure in which the unit area data storage unit 31, the intra-virtual-placement-area placement element A position storage unit 38 and the intra-virtual-placement-area placement element B position storage unit 39 are all different, these may be realized in different storage areas of the same storage unit in an actual computer. Figure 6 is a block diagram showing a structure of an embodiment of this invention. More specifically, Figure 6 shows a structure when a placement of circuit elements in an integrated circuit board or a printed circuit board is designed. In Figure 6: 56 is a placement/routing unit; 57 is a placement element file for storing cell data, terminal data, wire data and via hole data; 58 is a placement data input unit e.g. for inputting placement data and a parameter, e.g. comprising a magnetic tape device, a magnetic disk device or a keyboard; 60 is a placement control unit; 61 is a storage unit; 70 is a unit area data creation unit; 71 is a unit area data storage unit; 72 is a pointer creation unit; 72' is a pointer unit; 73 is a virtual placement storage unit; 74 is a cell placement creation unit for creating data on placing a cell placed on an integrated circuit board or a printed circuit board; 75 is a terminal placement creation unit for creating data on placing a terminal; 76 is a via hole placement creation unit for creating data on placing a via hole; 77 is a wire placement creation unit for creating data on placing a wire; 78 (equivalent to one of the intra-virtual-placement-area placement element A position storage unit 38 and the intra-virtual-placement-area placement element B position storage unit 39 shown in Figure 4) is a cell placement storage unit for storing cell placement data created in the cell placement creation unit 74: 79 (equivalent to one of the intra-virtual-placement-area placement element A position storage unit 38 and the intra-virtual-placement-area placement element B position storage unit 39 shown in Figure 4) is a terminal placement storage unit for storing terminal placement data created by the terminal placement data creation unit 75; 80 (equivalent to one of the intra-virtual-placement-area placement element A position storage unit 38 and the intra-virtual-placement-area placement element B position storage unit 39 shown in Figure 4) is a via hole placement storage unit for storing via hole data created by the via hole creation unit 76: 81 (equivalent to one of the intra-virtual-placement-area placement element A position storage unit 38 and the intra-virtual-placement-area placement element B position storage unit 39 shown in Figure 4) is a wire placement storage unit for storing wire placement data created by the wire placement creation unit 77; 83 is a degree-of-redundancy determination unit, 84 is a coordinate position creation unit; 85 is a probability distribution creation unit; 87 is a placement change necessity determination unit; and 88 is a placement output unit. Figure 7 is a conceptual view of an embodiment of a placement designing system of this invention. Figure 7 illustrates the operations of an embodiment shown in Figure 6. In Figure 7: 81A and 81B (equivalent to the intra-virtual-placement-area placement element A position storage unit 38 and the intra-virtual-placement-area placement element B position storage unit 39 shown in Figure 4) are wire placement storage units for storing wire placement data created by the wire placement creation unit 77; 91 and 93 are unit areas in a placement area for placing a cell or a wire in; 92 is a unit area for placing a wire, a terminal, or a via hole in; 96-1 through 96-6, 96'-1 and 96'-2 are virtual wire areas for virtually placing wires in, of which 96-1 and 96'-1 are in a first layer, 96-2 and 96'-2 are in a second layer, 96-3, 96-4, 96-5 and 96-6 are respectively in third, fourth, fifth and sixth layers; 96-1 through 96-6 are virtual wire areas for virtually placing in wires, which correspond to unit area 91; 96'-1 and 96'-2 are virtual wire areas for virtually placing in wires, which correspond to unit area 92; 97-1, 97-2 and 97-3 are virtual cell areas for virtually placing in cells respectively in first, second and third layers, each expressing a virtual placement of a cell, which correspond to unit area 91; 98 is a virtual via hole area for virtually placing in a via hole, which corresponds to unit area 92; 99-1 and 99-2 are virtual terminal areas for virtually placing in terminals, which correspond to unit area 92 respectively in first and second layers. The wire placement storage units 81A and 81B are provided separately in association with the actual designing of an integrated circuit. Because only a designated area in a board is available for placing a cell in, the rest (wire placement storage unit 81B) is available for placing a wire in (i.e. routing a wire) but not available for placing a cell in. Of the designated area in the board, a part not used for placing a cell in (wire placement storage unit 81A) is available for placing a wire in (i.e. routing a wire). The operations of this embodiment having the structure shown in Figure 6 are explained by referring to Figure 7. The placement/routing unit 56 reads from the placement element file 57 cell data such as on cell names and cell dimensions, terminal data such as on terminal names and terminal dimensions, wire data such as on wire names and wire widths, and via hole data. The placement/routing unit 56 also receives circuit wire data from the placement data input unit 58. Here, wire data in the placement element file 57 are data on wire attributes, such as the width of a single wire, whereas wire data in the placement data input unit 58 are concrete data on individual routing paths, such as the wire number in a particular unit area. The unit area data creation unit 70 creates a placement area, which it splits into unit areas (91, 92 and 93 shown in Figure 7) by assigning unit area numbers, and the unit area data storage unit 71 stores the coordinate positions of respective unit areas. The coordinate position creation unit 84 receives from the placement data input unit 58 placement data and a parameter. The probability distribution creation unit 85 creates placement data for virtually placing in placement elements based on placement data and a cell coordinate position, and sets a coordinate position for placing a cell in, based on the probability distribution (number of the unit area for placing a cell in). For instance, when a coordinate position of a cell is changed, the coordinate position creation unit 84 receives, as placement data, the original coordinate position of the cell. The cell placement creation unit 74 creates placement data, for virtually placing in a cell based on tho created coordinate position, for a storage in the cell placement storage unit 78. The terminal placement creation unit 75, the via hole placement creation unit 76 and the wire placement creation unit 77 create placement data, for virtually placing in respective placement elements based on the placement data and the cell coordinate positions, for a storage respectively in the terminal placement storage unit 79, the via hole placement storage unit 80 and the wire placement storage unit 81. The pointer creation unit 72 creates pointers, for specifying virtual placement areas of placement elements placed in respective unit areas, for a storage in pointer storage unit 72'. The placement data creation unit 82 creates placement data by obtaining a placement element placed in respective unit areas from placement data on the placement element in a virtual placement area, which is specified by a pointer according to pointer storage unit 72'. That is, the placement data creation unit 82 obtains placement element data to be placed in each unit area, and converts them into a format acceptable to the placement output unit 88. The placement output unit 88 receives placement data outputted from the placement data creation unit 82, and displays an obtained placement (a cell placement, a terminal connected with a cell, a wire connecting between terminals and between via holes) in an actual placement image on a display. Further, the placement change necessity determination unit 87 inputs placement data created by the placement data creation unit 82 for determining whether to set the obtained placement as a new placement or to keep the current placement. The method for determining the necessity of a placement change will be described later. Degree-of-redundancy determination unit 83 counts the degrees of redundancy when same wires are placed in a same unit area, and records the degrees of redundancy in the virtual wire areas for virtually placing wires (e.g. 96-1 through 96-6, 96'-1 and 96'-2 shown in Figure 7) in, which correspond to the unit area. This is for preventing same wires from being stacked up in multiple layers in a virtual placement area. Figure 8 is a conceptual view of a cell area and a unit area in an embodiment of this invention. The cell area corresponds to the virtual cell areas 97-1, 97-2 and 97-3 shown in Figure 7. Section (a) shows a placement area when a gate array is placed. 130 is a placement area, 131, 132 and 133 are placement areas of gate arrays, and 134 is a unit area (BC). Section (a) shows a case in which a unit area is a basic cell, which is a cell unit of a gate array. 135 is a channel area, which is between placement area 131 of a gate array and placement area 132 of a gate array and between placement area 132 of a gate array and placement area 133 of a gate array. The channel area 135 corresponds to unit area 92 shown in Figure 7. (Although this is not shown, a channel area is also split into unit areas.) Section (b) shows a case in which a single cell placed over a plurality of unit areas is placed in cell areas of a single layer. In section (b), 140 is cell C positioned on three [3] unit areas. Parts [1], [2] and [3] placed in unit areas indicate the relative positions. 141, 142 and 143 are cell area 1, cell area 2 and cell area 3, respectively. Because the coordinate positions for virtually placing cell C (140) in are not free in cell area 1 and cell area 2, a case is shown in which cell C (140) is virtually placed in cell area 3. As shown in section (b), cell C (140) is placed in unit areas by a split into [1], [2] and [3] indicating the relative positions. Section (c) shows a case in which a single cell placed over a plurality of unit areas is placed over cell areas in different layers. In section (c), 145 is cell C placed over three [3] unit areas. Parts [1], [2] and [3] placed in unit areas indicate the relative positions. 146, 147 and 148 are cell area 1, cell area 2 and cell area 3, respectively. Because the coordinate positions for virtually placing parts [1] and [2] of cell C (145) in are not free in cell area 1 and cell area 2, parts [1] and [2] of cell C (145) are virtually placed in cell area 3, as shown in section (c). Also, since cell area 1 is not free, but cell area 2 (147) is free, as a position for placing [3] of cell C (145) in, part [3] of cell C (145) is virtually placed in cell area 2 (147). Figure 9 is an explanatory chart illustrating a degree of redundancy of this invention. In section (a), 151 is a unit wire area (corresponding to one of the unit areas 91, 92 and 93 shown in Figure 7) whose coordinate position is (1, 1). 152 is a unit wire area whose coordinate position is (1, 3). 153, 154 and 155 are wires, having wire numbers 105, 105 and 297. In section (b), 156 is the degree of redundancy in a unit wire area (1, 1). In section (c), 157 is a degree of redundancy in a unit wire area (1, 3). In placing a wire, there is a case in which wires of a same type (wires having a same wire number) are placed in a same unit area. When such wires are placed virtually in virtual placement areas, a virtual placement area in a single layer records a degree of redundancy in wires, instead of placing the wires in multiple layers. As shown in section (b), when a wire number 105 and a wire number 297 are wired, because two [2] of wire number 105 are placed in a virtual placement area corresponding to unit wire area (1, 1), a layer number 1 records wire number 105 and a degree of redundancy 2. Then, because a wire number 297 is placed in unit wire area 1 of coordinate position (1, 1), layer number 2 records wire number 297 in degree of redundancy 1. Similarly, since a unit wire area of coordinate position (1, 3) has one [1] wire each of wire number 105 and wire number 297, as shown in section (c), layer number 1 records wire number 105 in degree of redundancy 1, and layer number 2 records wire number 297 in degree of redundancy 2. Figure 10 is a diagram illustrating a data structure in an embodiment of this invention. It shows a case in which a gate array is placed in a data structure where a conventional placement method and a placement method of this invention are mixed. Since the data structure of the conventional placement method is the same as that shown in Figure 2, their structure is not shown here. In Figure 10: 71 is a unit area data storage unit; 73 is a virtual placement storage unit (intra-virtual-placement-area placement element position storage unit); 170 is data indicating placement wire data of a gate array; 171 is a pointer to data (such as cell data in the placement element file 57 shown in Figure 6) according to a conventional placement/routing method 172 is pointers to data according to a placement/routing method of this invention; 173 is pointers to storage areas of respective placement elements having correspondences with unit areas; 72' is a pointer storage unit for expressing a pointer to a storage area (a cell area, a wire area, etc.) of virtual placement data on a placement element; 175 is data on a cell area, which is for storing a unit area number (coordinate position) for placing in a cell in correspondence with each cell number; and 176 is data on a wire area for storing a degree of redundancy and a coordinate position in correspondence with the number of a wire area. A data structure of this invention is such that the unit area data storage unit 71 has a pointer to each placement element specified by a pointer in each unit area specify a placement element placed in each unit area. As such, the pointer storage unit 72' has a content for specifying combinations between virtual placements of a cell, a terminal and a wire each placed in unit areas and unit areas respectively for placing a cell in, for placing a terminal connected to a cell in, and for placing a wire connecting terminals in. The data structure shown in Figure 10 is explained in further detail. First, pointers 173 in the unit area data storage unit 71 comprise, for all unit areas, a pointer to a unit area number (e.g. 1), a pointer to unit area data (e.g. data on whether unit area 1 can be placed, and a pointer to a placement element area. The unit area to which a pointer to a cell area points has data on the cell number of a cell placed in unit area 1. Then, the unit area to which a pointer to a wire area points has data on the wire number of a wire placed in unit area 1. Figure 11 is an explanatory chart of the contents of data whose structure is shown in Figure 10. According to this invention, in correspondence with respective unit areas in the unit area data storage unit 71, the virtual placement storage unit 73 stores concrete data on a placement element (e.g. a cell) to be placed in the unit areas. The coordinate values indicate the positions of the unit areas. For instance, the intra-virtual-placement-area data for the unit area whose coordinate value is (1, 1) indicate "placing in a first BC (basic cell) in the cell whose cell number is 37". Also, because the intra-virtual-placement-area data for the unit area whose coordinate value is (15, 27) indicate allowance for placing plural cells in temporarily, the corresponding virtual area has a plurality of layers. On the other hand, according to the conventional system shown in Figure 2, because, for instance, the cell area 17 for a cell stores a coordinate position for placing in a cell in correspondence with a cell number as described earlier, when a cell is placed in a particular position, the placement positions of all cells need to be examined for checking the possibility of placing a new cell in. Figure 12 shows an algorithm for placing a cell in. The cell placement creation unit 74 shown in Figure 6 executes this algorithm. (1) Determine whether all parts (e.g. three [3] parts [1], [2] and [3] of cell C shown in Figure 8) of a cell have been treated completely. upon completion, processes end. Otherwise, proceed to (2). (2) Select a part of the cell not having been treated. (3) Obtain a unit area corresponding to a cell position and a relative position (relative positions of respective parts in a cell when the cell is placed over a plurality of unit areas) of the selected part in the cell. (4) In case of a placement, place a selected part in a unit area. More specifically, the cell placement memory unit 78 shown in Figure 7 has its cell area store data on the selected part, and the pointer storage unit 72' sets a pointer thereto. In case of an elimination, eliminate a selected part from a unit area in a cell. (5) Determine whether processes have been successful. If the processes have been successful, revert to (1), thereby repeating processes after (1). If the processes are not successful, output the result to the outside. If a position desired for placing a cell in prohibits a placement of a cell, the processing is determined to be a failure. Figure 13 shows an embodiment of an algorithm for a placement change when there is no redundancy. The cell placement creation unit 74, the terminal placement creation unit 75 and the via hole placement creation unit 76 execute this algorithm. The algorithm is explained below according to numbers shown in Figure 9. (1) Receive an instruction for placing a placement element in a virtual placement area or an instruction for eliminating a placement element from a virtual placement area. (2) Determine whether an instruction is for placing in or eliminating from a placement element. Proceed to (3) in case of a placement, and proceed to (8) in case of an elimination. (3) In case of a placement, determine whether a unit area desired for placing the placement element in is free. If there is a free area, proceed to (4). If there is no free area, skip to (5). In making a determination in (3), the types of placement elements need to be considered e.g. when unit area 91 shown in Figure 7 can place both a cell and a wire contemporaneously. (4) Record necessary data in a free area, if a unit area or a corresponding virtual storage area is free. (5) Output the result to the outside, if no free area is available. (6) Determine whether a placement element matches one instructed for an elimination from a unit area of the placement element, on determining in (2) that the instruction is for eliminating a placement element. If both match proceed to (7), otherwise skip to (8). (7) Delete data in unit areas of a placement element. (8) Output to the outside a message informing of a mismatch with an instructed placement element. Figure 14 shows an embodiment of an algorithm for a placement change when there is a redundancy. The wire placement creation unit 77 executes this algorithm. The algorithm is explained below according to numbers shown in Figure 14. (1) Receive an instruction for placing a placement element in a virtual placement area or an instruction for eliminating a placement element from a virtual placement area. (2) Determine whether an instruction is for placing or eliminating a placement element. Proceed to (3) in case of an instruction for a placement, and skip to (8) in case of an instruction for an elimination. (3) In case of a placement, determine whether a unit area desired for placing the placement element in has one matching a placement element, according to the contents of the virtual placement areas corresponding to respective unit areas. If there is none matching the placement element, proceed to (4). If there is a one matching the placement element, skip to (7). (4) Determine whether a unit area desired for placing the placement element in has a free area. (5) Record necessary data e.g. in a free unit area, and write 1 as a degree of redundancy in the corresponding virtual area. (6) If none of the unit areas is determined to be free in (4), output the result to the outside. (7) Increment by one [1] the degree of redundancy in the unit area determined in (3). (8) Determine whether a placement element matches one instructed for elimination from a unit area, on determining that the instruction is for eliminating a placement element in (2). If both match proceed to (9), otherwise skip to (12). (9) Determine whether or not the degree of redundancy in the area corresponding to the placement element is one [1]. If it is one [1], proceed to (10). If it is not one [1], proceed to (11). (10) When the degree of redundancy in the area corresponding to the placement element is one [1], set the degree of redundancy to zero [0] and delete associated data in the virtual placement area simultaneously. (11) If the degree of redundancy is not one [1], decrement the degree of redundancy by one [1]. (12) If it is determined in (8) the placement element placed in a unit area does not match a placement element, output the result to the outside. In the algorithm shown in Figures 13 and 14, it is important to be able to examine whether or not a placement element can be placed in a designated unit area. In other words, it is of critical importance to check whether (an identical type of) placement element is placed in a new position to which a placement element is moved. This is due to such constraints as that more than one [1] cell cannot be placed at an identical position in designing an actual integrated circuit and that the volume of wires placed in an area is limited. Figure 15A shows an algorithm for checking the possibility of placing an element pursuant to this invention. (1) A placement of a placement element in a unit area having a coordinate value (x, y) causes a start of the processes. [Assume here for a receipt of an instruction for placing placement element A in unit area 51-1 shown in Figure 5.] (2) A determination of a unit area enables a placement element area in a virtual placement area for storing data on the placement element placed in the unit area having coordinate value (x, y) to be determined. [Pointer storage unit 33 obtains the placement element A area 38' shown in Figure 5.] (3) It is determined whether or not a placement element area in a virtual placement area is free. Because a virtual placement area can store plural data in the placement element areas, it is examined how many data are written (or how many voids there are) in the placement element areas in the virtual placement area. [It is examined whether storage areas 38'-1 and 38'-2 in placement element A area 38' of the virtual placement area in intra-virtual-placement-area placement element (B) storage unit 38 are free, which are shown in Figure 5.] (4) In case of an affirmative determination result (YES) in (3), it is concluded that a placement element can be placed in a placement element area in the virtual placement area. (5) In case of a negative determination result (NO) in (3), it is concluded that a placement element cannot be placed in a placement element area in the virtual placement area. When a placement element is placed over a plurality of unit areas, it is examined whether each part of the placement element can be placed on its corresponding unit area. Only when all parts of the placement element can be placed on their corresponding unit areas, the placement element is allowed to be moved. As described above, a placement element area can store plural data. Here, the number of plural data can be can be larger than the limit number for an actual placement. The reason is explained below by taking a cell movement as an example. A plurality of cells cannot be stacked up at the same position. That is, a cell cannot be placed at a position for placing another cell in. Although a small cell has little difficulty in finding free unit areas as its new position, a large cell has great difficulty in finding free unit areas as its new position, which makes it impractical to move a large cell from an initial position. Yet, if only small cells are moved without attempting to move large cells, the placement and routing obtained as an end product is dependent too much on the initial placement, which is not quite useful. In such a case, a plurality of cells are placed virtually at a same position, which makes it easier for a large cell to move. The reason why this is called virtual is because a state in which cells are stacked up is impossible in an actual designing. However, this problem is solved, because cell overlaps are cleared finally after cells are moved repeatedly. Figure 15B shows an algorithm for checking the possibility of placing an element pursuant to a prior art. Its operations are explained by following the numbers below. (1) A movement of a placement element to a coordinate position (x, y) causes a start of the processes. (Initialize counter value to 0.) (2) Determine whether all placement elements have been processed by extracting data on the coordinate position (x', y') on all placement elements (e.g. cells) except for a placement element to be moved. (3) If a comparison of coordinate position (x, y) with coordinate position (x', y') indicates a match, a next placement element is processed by incrementing the counter value by one [1]. If a comparison of coordinate position (x, y) with coordinate position (x', y') indicates a mismatch, a next placement element is processed without incrementing the counter value by one [1]. (4) Upon completing comparisons with all cells, it is examined whether counter value is less than a limit number for an actual placement. (5) It is concluded that the placement element can be placed in virtual placement area, if the counter value is less than the limit number for an actual placement. (6) It is concluded that the placement clement cannot be placed in virtual placement area, if the counter value is equal to the limit number for an actual placement. As such the prior art takes too much time for processing, because in determining whether or not another placement element is already placed at a new position of a placement element, the positions of all placement elements need to be examined. Figure 16 shows an example of a probability distribution for creating coordinate values. This invention employs a normal distribution as the probability of creating the changed coordinate position in which the mean is the current coordinate value with the variance being parametered, which is supplied e.g. by a user through the placement data input unit 58 shown in Figure 6. For instance, a coordinate position (X, Y) is created using following creation probability distributions, where Ux and Uy represent variances for the current coordinate position (x, y). f(X) = (2π) -1/2 Ux -1 exp.[-(X-x) 2 /2Ux 2 ] f(Y) = (2π) -1/2 Uy -1 exp.[-(Y-y) 2 /2Uy 2 ] In the following description, the coordinate position is in BC units, with an integer ±0.5 being rounded to the integer. Section (a) shows an example of a probability distribution for creating the X coordinate position in changing a placement according to this invention. It shows a normal distribution, where the current coordinate position x is the mean and Ux is the variance. (x=0, variance=1) That is, the above expression is rewritten as f(X) = (2π) -1/2 exp.(-X 2 /2) As a creation probability distribution creation, it is possible to create a probability distribution, for making it harder for a large cell to move, in which the mean of the X coordinate value is the current coordinate position x and the variance of the X coordinate value is Ux/s, and the mean of the Y coordinate value is the current coordinate position y and the variance of the Y coordinate value is Uy/s, where barometer s represents dimensions of a cell. f(X) = (2π) -1/2 (Ux/s) -1 exp.[-(X-x) 2 /2(Ux/s) 2 ] f(Y) = (2π) -1/2 (Uy/s) -1 exp.[-(Y-y) 2 /2(Uy/s) 2 ] Because the larger the cell, the smaller the variances according to the above creation probability distributions, the cell gets more difficult to move, the larger it is. Alternatively, to adjust the ease of a cell movement by dimensions s of a cell, which indicates whether a single cell is placed over a plurality of unit areas such as cell C shown in Figure 8, the variances of the X coordinate value and the Y coordinate value may be Ux/s ½ and Uy/s ½ instead of Ux/s and Uy/s. Also, when a gate array is placed as shown in section (a) of Figure 8, a normal distribution may be created to make it easier to shift to the right when the current coordinate position is left (an odd X coordinate position) and to the left when the current coordinate position is right (an even X coordinate position) in the placement area of a gate array comprising two [2] columns. An advantage of setting these normal distributions is explained in further detail by referring to section (a) of Figure 8. Because a use of these setting methods allows the easier acceptance of a new coordinate position, because the new coordinate position is not likely to stay within the same set of two [2] columns (e.g. in columns 1 and 2) as the original. For instance, when cell X is at (3, 3), if (4, 3) is selected as the new coordinate position, since cell X remains in the same two [2] columns of a gate array, a new placement becomes easy. However, if (2, 3) is selected as the new coordinate position, since cell X is outside of the channel area, generally, the acceptance of the new coordinate position becomes less likely. For instance, parametered by a positive real number a odd and a negative real number a even , in case of being at an odd position as against a current coordinate position (x, y), the mean and variance in creating an X coordinate value are x+a odd and Ux/s ½ respectively, while similarly the mean and variance in creating a Y coordinate value are y+a odd and Uy/s ½ , respectively where a odd >0. Also, in case of being at an even position as against a current coordinate position (x, y), the mean and variance in creating the X coordinate value are x+a even and Ux/s ½ respectively, while similarly the mean and variance in creating the Y coordinate value are y+a even and Uy/s ½ , respectively where a even <0. Section (b) in Figure 16 shows a normal probability distribution asymmetrical to the current position. Other than the above examples, a cell having a larger past average moving distance may have a greater variance for its normal distribution, parametered by a cell history. The probability distribution creation unit 85 shown in Figure 6 creates such a distribution. Parametered by data on a nearby BC to which a placement is prohibited, a newly created coordinate value may be interpreted as a new X coordinate position by eliminating the BC to which a placement is prohibited. For instance, when there are two [2] consecutive BCs to which a placement is prohibited on the right side of the current coordinate position, if a new coordinate position having an X coordinate value greater than the current X coordinate value by 3 is created, then, the new coordinate value is greater than the current X coordinate value by 5. In addition, a creation probability distribution can be altered in various ways by changing a normal distribution and a variance according to the dimensions of an integrated circuit, the number of cells in question, and a temperature and diverse energies for use in a simulated annealing method (to be described later in detail), such as by reducing the variance of a normal distribution. Further, it is effective to stochastically create coordinate values after placements are outlined through a repetition of placement changes by initially creating a coordinate position at random, instead of creating a coordinate position according to the above probability distribution from the beginning. Figure 17 shows in detail the structure of a coordinate position creation unit of this invention. In Figure 17: 182 is a parameter storage unit for storing an inputted parameter; 183 is a control unit; 184 is a random number generation unit; and 185 is a coordinate position calculation unit for creating a coordinate position based on a parameter and a random number. Figure 18 shows an algorithm for the coordinate position creation unit of this invention. More specifically, Figure 18 illustrates the operations under the configuration shown in Figure 17. The algorithm is explained according to the numbers (and by referring to Figure 17 as necessary). (1) A reception of an instruction for creating a coordinate value activates the coordinate value creation unit 84. (2) The probability distribution creation unit 85 takes a parameter necessary for creating a coordinate value from the parameter storage unit 182. (More concretely, the control unit 183 takes from the parameter storage unit 182 a parameter necessary for creating a coordinate value and supplies it to the coordinate position calculation unit 185.) (3) On receiving an instruction from the coordinate position calculation unit 185, the control unit 183 takes a necessary random number from the random number generation unit 184. (4) The control unit 183 receives the necessary random number taken from the random number generation unit 104 and supplies the random number to the coordinate position calculation unit 185. (5) The control unit 183 reads a coordinate value calculated by the coordinate position calculation unit 185. (6) The control unit 183 determines whether the created coordinate value is appropriate or inappropriate. Revert to (3) and repeat processes therefrom, in case of a negative determination result (NO). Proceed to (7) in case of an affirmative determination result (YES). The control unit 183 determines a case in which, for example, a created coordinate position is out of a printed circuit board to be inappropriate. (7) The probability distribution creation unit 85 outputs the created coordinate value to the outside. By repeating the processes from (1), the coordinate values are created for all cells. Figure 19 shows an algorithm of a simulated annealing method with this invention applied. The simulated annealing method is for calculating an energy for a status in which a placement is made in consideration of the degree of redundancy of a cell and wire length. Through a comparison of the energy for the new status with that for the current status, an index, parametered by a temperature and determined by the set temperature and energy difference, is calculated as a benchmark for determining whether or not to change a placement. A randomly generated number for determining whether or not to adopt a new placement through a comparison with the index as the benchmark is selected. A comparison of the index with the selected number enables a selection between the adoption of the new placement and no change to the current placement. By varying the temperature, the processes are repeated, until no cell redundancy exists, or until the optimal placement minimizing energy through a reduction in the wire length is obtained. The cell redundancy concept is explained below, which concept applies to a unit area. More specifically, the cell redundancy refers to a plurality of distinctive cells occupying a same unit area. In the example shown in Figure 7, if three [3] cell areas correspond to a same unit area, of which two [2] record cell numbers 127 and 213, and the remaining one [1] records nothing, the cell redundancy of the unit area is 2. It must be noted here, however, that the cell redundancy used here is different than the degree-of-redundancy for an identical wire. The algorithm is explained according to the numbers shown in Figure 14. (1) Processes start. (2) Set a placement at an initialized placement status. (initialization) As an initialization, a data area as a virtual placement area and various parameters are set. (3) Determine whether to terminate. Unless terminating, proceed to (4). Proceed to (11) in case of a termination after an optimal placement is obtained and the process ends. A condition similar to that explained in (5) of Figure 3 is used as a terminating condition. (4) Update a temperature T. A user determines the updation width (i.e. an incremental change or a decremental change) of the temperature T e.g. in accordance with an expression T = T o α k , where T o is a initial temperature, α is a real number between 0 and 1, and k is the number of updations. (5) Select a placement element as a target of a status change, e.g. sequentially for each type of a placement element. (6) Select a next status (a coordinate value, etc.) for a selected placement element, thereby obtaining a candidate for a new placement. (7) Calculate an energy difference delta-E between a current status and a selected status, similarly to (2) shown in Figure 3. Based on delta-E, calculate a benchmark index exp(-K delta-E/T) for use in determining a change in a coordinate value. (8) Select a numerical value p as a uniform random number between zero [0] and one [1]. (9) Determine whether a condition p<exp(-K delta-E/T) is satisfied. Upon satisfaction of this condition, proceed to (10). Repeat from (3) upon dissatisfaction of this condition. (10) Adopt a new status, which is the candidate for a new placement, as a current status. The condition (9) in the above algorithm represents a relation that when an energy difference delta-E (>0) between a current status and a selected status (a new status) is small at a temperature T, a random number p is more likely to satisfy the condition represented by (9) than when the energy difference delta-E is large. Also, it represents a relation that a new status is more likely to be selected, because a random number p, when the temperature T is high, is more likely to satisfy the condition represented by (9) than when the temperature T is low. A simulated annealing method is for sequentially executing the above processes (one epoch) for respective cells, and repeats epochs until an optimal placement is obtained. Further, this invention is applicable to other placement designs such as a placement design of a telephone exchange office, in addition to a case of obtaining the placement of a circuit element. Additionally, this invention is applicable not only to a simulated annealing method but also to other algorithms such as a GA (genetic algorithm) method derived from a gene-based evolution model. The GA method, for instance, expresses a placement status as an appropriate code (a string of symbols) by initially providing a plurality of codes, which are called genes. By causing a mutation (a random change of a symbol) and a partial exchange of two [2] genes, a new gene set is obtained. A better gene set is selected by applying a suitable objective function to gene members in the gene set. The best gene set is obtained finally by repeating the above procedure a number of times. As described above in detail, because this invention causes data on a placement element such as a wire or a cell necessary for a placement/routing to be placed in a virtual placement area in correspondence with unit areas in a placement area, a placement can be changed more easily. Also, because data can be set in a large volume, this invention makes it possible to evaluate fine constraints dependent on a position and a shape necessary for a placement/routing. Also, this invention can be quite easily applied to a system for designing on a parallel computer by making respective processor elements of a parallel computer system correspond with groups in unit areas. Also, the method for changing a placement according to this invention can reduce the processing time necessary for obtaining an optimal placement, because a probability distribution for creating a coordinate value can be changed. This invention can be used not only by a semiconductor industry designing an LSI but also by various other industries requiring a system for designing optimal placements of placement elements in predetermined areas.

Claims: A system for designing a placement of a placement element, for use in a placement designing system comprising: a placement element storage means (22) for storing placement element data representing placement elements; a placement set means (21) for setting an actual placement of said placement element in a placement area; and comprising a unit area data storage means (31) for storing unit area data representing unit areas, said unit areas being obtained by splitting said placement area, said unit area being a minimum unit in which to place said placement element; and a placement output means (47) for outputting the result of setting said placement; characterised in that said placement set means (21) comprises: a plurality of intra-virtual-placement-area placement element position storage means (38, 39), provided for each type of placement element, for storing placement element data representing placement elements placed virtually in virtual placement areas (38', 39'), wherein the virtual placement areas have a multilayer structure which allows overlap of a placement element during an intermediate state of design; a pointer storage means (33) for specifying placement element data stored in said intra-virtual-placement-area placement element position storage means (38, 39) to which said unit areas correspond; and a placement control means (29) for setting the placement of placement elements in said placement area such that said placement elements whose placement element data are stored in said virtual placement areas (38', 39') are placed in respective unit areas in said unit area data storage means (31), according to the placement element data specified by said pointer storage means (33). The system for designing a placement of a placement element according to claim 1, wherein: said virtual placement areas (38', 39') in said plurality of intra-virtual-placement-area placement element position storage means (38, 39) comprise storage areas (38'-1, 38'-2, 39'-1, 39'-2 and 39'-3), structured in multiple layers, for storing the same kinds of placement element data in numbers in excess of respective limit numbers, in correspondence with said unit areas. The system for designing a placement of a placement element according to claim 1, wherein: said unit areas split from said placement area whose positions are stored in said unit area data storage means (31) comprise a plurality of gate array placement areas and channel areas between said gate array placement areas; said plurality of gate array placement areas comprise unit areas corresponding to the dimensions of basic cells, which are form units of cells in gate arrays. The system for designing a placement of a placement element according to claim 1, wherein: one (39) of said intra-virtual-placement-area placement element position storage means (38, 39) comprises a degree-of-redundancy storage area (46) for storing a degree of redundancy of placement elements placed in the same unit area in said placement area; and said placement control means (29) comprises a unit area data creation means (30) for splitting said placement area into unit areas and for having said unit area data storage means (31) store a result of the split; a pointer creation means (32) for creating pointers corresponding to said unit area and for storing in said pointer storage means (33): a plurality of placement element creation means (34, 35) respectively, in correspondence with said plurality of intra-virtual-placement-area placement element position storage means (38, 39), for creating placement element data including positions of said placement elements in said placement area; a degree-of-redundancy determination means (43) for determining the degrees of redundancy of placement elements whose placement element data are newly created by using an output from one (35) of said plurality of placement element creation means (34, 35) corresponding to said one (39), having said degree-of-redundancy storage area (46), of said plurality of intra-virtual-placement-area placement element position storage means (38, 39) and the storage content of said degree-of-redundancy storage area (46); a placement data creation means (42) for creating placement data on a placement of placement elements in said unit areas in said placement area, by using the storage contents of said unit area data storage means (31) and said plurality of intra-virtual-placement-area placement element position storage means (38, 39), and for outputting said placement data to said placement output means (47); a placement change necessity determination means (48) for determining whether a change in a placement of placement elements in said placement area is necessary or not by using placement data created by said placement data creation means (42); a probability distribution creation means (45) for creating a probability distribution for creating new coordinate values, which become the bases for creating new placement data based on an adopted placement after said placement change necessity determination means (48) has determined the necessity for a placement change; and a coordinate position creation means (44) for creating a new coordinate position for a placement by using said probability distribution created by said probability distribution creation means (45) and for outputting the result of creating said new coordinate position to said unit area data creation means (30), said pointer creation means (32) and said plurality of placement element creation means (34, 35). The system for designing a placement of a placement element according to claim 4, wherein: said placement element storage means (22) comprises a placement element file (57) for storing cell data including the name and dimensions of a cell, terminal data including the name and type of a terminal, wire data including a wire width and via hole data on a via hole; said plurality of intra-virtual-placement-area placement element position storage means (38, 39) corresponding to said plural types of placement elements each comprises a cell placement storage means (78), a terminal placement storage means (79), a via hole placement storage means (80) and a wire placement storage means (81) having a degree-of-redundancy storage area (83'); and said plurality of placement element creation means (34, 35) each comprises a cell placement creation means (74) for outputting cell placement data to said cell placement storage means (78), a terminal placement creation means (75) for outputting terminal placement data to terminal placement storage means (79), a via hole placement creation means (76) for outputting via hole placement data to said via hole placement storage means (80), and a wire placement creation means (77) for outputting wire data to said wire placement storage means (81) and said degree-of-redundancy determination means (43). The system for designing a placement of a placement element according to claim 5, wherein: unit areas whose positions are stored in said unit area data storage means (31) comprise unit areas (91, 93) each for placing a cell or a wire in and a unit area (92) for placing a wire, a terminal or a via hole in; and pointers stored in said pointer storage means (33) comprise a pointer for specifying a first layer (96-1) in plural layers of wire areas (96-1 through 96-6) each for storing wire data on a wire, stored in said wire placement storage means (81), to be placed in said unit area (91), a pointer for specifying a first layer (97-1) in plural layers of cell areas (97-1 through 97-3) for storing data on a cell, stored in said cell placement storage means (78), to be placed in said unit area (91), a pointer for specifying a first layer (96'-1) in plural layers of wire areas (96'-1, 96'-2) for storing wire data on a wire, stored in said wire placement storage means (81), to be placed in said unit area (92), a pointer for specifying a first layer (99-1) in plural layers of terminal areas (99-1, 99-2) for storing terminal data on a terminal, stored in said terminal placement storage means (79), to be placed in said unit area (92), and a pointer for specifying a via hole area (98) for storing via hole data on a via hole, stored in said via hole placement storage means (80), to be placed in said unit area (92). The system for designing a placement of a placement element according to claim 5, wherein: said cell placement storage means (78) stores data on respective parts of a single cell placed over a plurality of unit areas in said placement area, in a single one of plural layers of cell areas corresponding respectively to said unit areas. The system for designing a placement of a placement element according to claim 5, wherein: said cell placement storage means (78) stores data on respective parts of a single cell placed over a plurality of unit areas in said placement area, in different layers of plural layers of cell areas corresponding respectively to said unit areas. The system for designing a placement of a placement element according to claim 5, wherein: said wire placement storage means (81) has said degree-of-redundancy storage area (83') store, as degrees of redundancy, respective numbers of identical wires placed in the same unit areas in correspondence with plural layers of a wire area in said wire placement storage means (81). The system for designing a placement of a placement element according to claim 5, wherein: unit area data stored in said unit area data storage means (31) comprise the unit area numbers of respective unit areas split from said placement area, unit area data including the types of placement elements incapable of being placed in said unit area, and pointers for specifying a pointer storage position to intra-virtual-placement-area data on a placement element to be placed in said unit area in said pointer storage means (33); pointer data stored in said pointer storage means (33) comprise said pointers to a cell area, a wire area, a terminal area and a via hole area, respectively in correspondence with said unit areas; cell placement data stored in said cell placement storage means (78) comprise cell area data including the cell area numbers and unit area positions for placing cells in, for respective cell areas in plural layers; and wire placement data stored in said wire placement storage means (81) comprise wire area data including degrees of redundancies of wires and the cell numbers of cells for placing said wires in, for respective wire areas in plural layers. The system for designing a placement of a placement element according to claim 5, wherein said cell placement creation means (74) comprises: a first means for determining whether or not cell placement processes for all parts of a single cell placed over a plurality of unit areas have been completed; a second means, invoked in case of a negative determination result by said first means, of selecting one [1] of said parts in said single cell not having been processed yet; a third means for obtaining a unit area corresponding to said part selected in said second means from the position for placing said part of said single cell in and the relative position of said selected part in said single cell; a fourth means for placing said selected part in said unit area; a fifth means for determining whether or not the result of said fourth means is successful and returning to said first means in case of an affirmative determination result; a sixth means, invoked in case of a negative determination result by said fifth means, of outputting a result indicating a failure to the outside; a seventh means, invoked in case of an affirmative determination result by said first means, of terminating a cell placement process. The system for designing a placement of a placement element according to claim 5, wherein said cell placement creation means (74), said terminal placement creation means (75), and said via hole placement creation means (76) respectively comprise: a first means for receiving an instruction for changing a placement of a corresponding placement element; a second means for determining whether said instruction is for a placement or an elimination of a placement element; a third means, invoked in case of a determination in said second means for a placement, of determining whether or not a unit area desired for placing said placement element in is free; a fourth means, invoked in case of an affirmative determination result by said third means, of recording necessary data in a free area; a fifth means, invoked in case of a negative determination result by said third means, of outputting the result to the outside, if no free area is available; a sixth means, invoked in case of a determination in said second means for an elimination, of determining whether or not a placement element matches one instructed for an elimination from a unit area of said placement element; a seventh means, invoked in case of an affirmative determination result by said sixth means, of deleting data from unit areas of said placement element; and an eighth means, invoked in case of a negative determination result by said sixth means, of outputting a message informing of a mismatch with an instructed placement element to the outside. The system for designing a placement of a placement element according to claim 5, wherein said wire placement creation means (77) comprise: a first means for receiving an instruction for changing a placement of a wire; a second means for determining whether an instruction is of a placement or an elimination of a wire; a third means, invoked in case of a determination in said second means for a placement, of determining whether a unit area desired for placing said wire in has one matching said wire; a fourth means, invoked in case of a negative determination result by said third means, of determining whether or not a unit area desired for placing the placement element in has a free area; a fifth means, invoked in case of an affirmative determination result by said fourth means, of recording necessary data e.g. in a free unit area, and writing one [1] as a degree of redundancy in the corresponding virtual area. a sixth means, invoked in case of a negative determination result by said fourth means, of outputting the result to the outside; a seventh means, invoked in case of an affirmative determination result by said third means, of incrementing the degree of redundancy of said wire in said unit area by one [1]; an eighth means, invoked in case of a determination in said second means for an elimination, of determining whether or not a wire matches one instructed for elimination from a unit area; a ninth means, invoked in case of an affirmative determination result by said eighth means, of determining whether or not the degree of redundancy in the area corresponding to the placement element is one [1]; a tenth means, invoked in case of affirmative determination in said ninth means, of setting the degree of redundancy to zero [0] and deleting associated data in said virtual placement area simultaneously; an eleventh means, invoked in case of a negative determination result by said ninth means, of decrementing, by one [1], the degrees of redundancy not being one [1]; and a twelfth means, invoked in case of a negative determination result by said eighth means, of outputting to the outside that no wire matches one instructed for elimination from a unit area. The system for designing a placement of a placement element according to claim 5, wherein: said cell placement creation means (74) for checking a cell placement possibility, said terminal placement creation means (75) for checking a terminal placement possibility, said via hole placement creation means (76) for checking a via hole placement possibility and said wire placement creation means (77) for checking a wire placement possibility respectively comprise: a first means for receiving an instruction for placing a placement element in a unit area whose position is specified by a coordinate value (x, y); a second means for obtaining a virtual placement area storing placement element data of a placement element to be placed in said unit area specified by said coordinate value; a third means for determining whether or not said virtual placement area has a void; a fourth means, invoked in case of an affirmative determination result by said third means, of determining that said placement element can be placed; and a fifth means, invoked in case of a negative determination result by said third means, of determining that said placement element cannot be placed. The system for designing a placement of a placement element according to claim 4, further comprising: a placement data input means (23) for inputting placement data (24) including wire data of a circuit to said placement control means (29) and for inputting a parameter (25) including a constant for creating a probability distribution to a probability distribution creation means (45) in said placement control means (29). The system for designing a placement of a placement element according to claim 15, wherein: said probability distribution creation means (45) creates probability distributions for creating a new coordinate value (X, Y) according to normal distributions having means equal to a current coordinate value (x, y) by using variances Ux and Uy supplied as parts of parameters (25) from said placement data input means (23) f(X) = (2π) -1/2 Ux -1 exp.[-(X-x) 2 /2Ux 2 ] f(Y) = (2π) -1/2 Uy -1 exp.[-(Y-y) 2 /2Uy 2 ] and said coordinate value creation means (44) creates a new coordinate position according to said probability distributions. The system for designing a placement of a placement element according to claim 15, wherein: said probability distribution creation means (45) creates probability distributions for creating a new coordinate value (X, Y) according to normal distributions having means equal to a current coordinate value (x, y) by using variances Ux and Uy supplied as parts of parameters (25) from said placement data input means (23) and s as dimensions of a single cell defined by the number of unit areas over which said single cell is placed. f(X) = (2π) -1/2 (Ux/s) -1 exp.[-(X-x) 2 /2(Ux/s) 2 ] f(Y) = (2π) -1/2 (Uy/s) -1 exp.[-(Y-y) 2 /2(Uy/s) 2 ] and said coordinate position creation means (44) creates a new coordinate position according to said probability distributions. The system for designing a placement of a placement element according to claim 15, wherein: said probability distribution creation means (45) creates, by using a current coordinate value (x, y), a positive real number a odd and a negative real number a even , a first set of probability distributions having means x+a odd and y+a odd and a second set of probability distributions having means x+a even and y+a even ; and said coordinate position creation means (44) creates a new coordinate position based on a current coordinate value (x, y) by using either one [1] of said first set of probability distributions and said second set of probability distributions. The system for designing a placement of a placement element according to claim 15, wherein: said probability distribution creation means (45) comprises a random number generation means (184) for generating a random number, a coordinate position calculation means (185) for calculating a coordinate value, a control means (183) for controlling said random number generation means (184) and said coordinate position calculation means (185); and said coordinate position creation means (44) further comprises a parameter storage means (182) for storing a parameter inputted from said parameter data input means (23). The system for designing a placement of a placement element according to claim 19, wherein: said coordinate position creation means (44) receives an instruction for creating a coordinate position in a coordinate position creation process; said control means (183) receives a random number generated by said random number generation means (184); said control means (183) supplies said received random number to said coordinate position calculation means (185); said control means (183) reads the coordinate value calculated by said coordinate position calculation means (185); said control means (183) determines whether said read coordinate value is appropriate or inappropriate; and said control means (183) outputs a coordinate value determined to be appropriate, otherwise repeats its processes by receiving a random number generated by said random number generation means (184).

Inventors: MASUOKA RYUSUKE, MASUOKA, RYUSUKE, Masuoka, Ryusuke, c/o Fujitsu Limited
Applicants: FUJITSU LTD, FUJITSU LIMITED
Application year: 1992
Main classification: G06F17
IPC codes: G06F17, H01L21