A photoelectric transducer switchable to a high-resolution or high sensitive mode

Abstract: In a photocell of the photoelectric transducer having a compound semiconductor substrate (11), a photodiode (12) is doped with an impurity of a conductivity type opposite to that of the substrate (11). An enclosure region (13) is formed by the same doping as the photodiode (12), surrounding but apart from the photodiode (12). A gate electrode (15) is formed, on an insulation layer (14) formed all over the substrate surface (11), over a portion in-between the photodiode (12) and the enclosure region (13). The enclosure region (13) is connected via a contact hole (20) through the insulation layer (14) and a first switch (22) to a ground level. The gate electrode (15) is connected via a second switch (23) to a predetermined voltage having the same polarity as the conductivity type of the substrate (11). On a high-resolution mode, the first switch (22) is closed and the second switch (23) is open, so that the grounded enclosure prevents carrier generated in-between the photodiode (12) and the enclosure region (13) from flowing into an adjacent cell. On a high-sensitivity mode, the first switch (22) is open and the second switch (23) is closed, so that the gate voltage generates a channel to electrically connect the photodiode (12) to the enclosure region (13), thus the carriers generated within the enclosure (13) are all gathered to the photodiode (12). The first and second switches (22, 23) may be fabricated on a second semiconductor substrate (16) arranged over the compound semiconductor substrate (11), which is connected to the second substrate (16) via bumps (18, 18A, 18B).

Description: BACKGROUND OF THE INVENTION Field of the invention This invention relates to a photoelectric transducer switchable to a high-sensitivity or high-resolution mode. Description of the Related Arts In a photovoltaic type photoelectric transducer device which provides a high sensitivity particularly in infrared light detection, a compound semiconductor substrate having a narrow energy band gap, such as HgCdTe (mercury-cadnium-tellurium) is doped with impurity atoms so that photodiodes are formed with a pattern of conductive layer having a conductivity type opposite to that of the substrate. In this type of photoelectric transducer device, the photocells are integrated on a single substrate as dense as possible in order to achieve a high resolution of light detection. Accordingly, the dense integration of the photo cells have caused problem in cross-talks between signals generated in adjacent photocells, resulting in a deterioration of resolution of the image detected thereby. In order to solve the problem, there has been proposed a structure shown in Fig. 1, where a CdTe substrate 2 is provided with ditches 1 at a predetermined pitch, where a crystal layer 3 is formed of, for example, an epitaxial growth of p-type Hg 1-x Cd x Te upon the substrate. A photodiode 5 is formed of a pn junction having an n + layer 4 doped with an impurity atom of a conductivity type opposite to the conductivity type of Hg 1-x Cd x Te crystal layer 3. A plurality of photodiodes 5 are formed over the portion excluding ditches 1 of substrate 2. Carriers generated by an infrared light A' input to ditch 1 are trapped in Hg 1-x Cd x Te crystal layer 3 thick at the ditch on the way to reach a nearby pn junction. Thus trapped carriers prevent a crosstalk between signals detected in the adjacent photodiodes 5. However, trapping of the carriers causes deterioration of detection sensitivity of the photodiodes. SUMMARY OF THE INVENTION It is a general object of the invention to provide an photoelectric transducer which can select a mode of either high resolution or high sensitivity. A photocell of the photoelectric transducer of the present invention as defined in claim 1 comprises a photodiode region doped with an impurity of a conductivity type opposite to that of the compound semiconductor substrate of the photoelectric transducer. An enclosure region is formed by the same doping as the photodiode region, surrounding and apart from the photodiode region. A gate electrode is provided, on an insulation layer formed all over the surface of the photodiode and the enclosure, over a portion in between the photodiode and the enclosure region. The enclosure region is connected via a contact hole through the insulation layer and a first switch to a ground level. The gate electrode is connected via a second switch to a predetermined voltage whose polarity is the same as the conductivity type of the compound semiconductor substrate. On a high-resolution mode, the first switch is closed and the second switch is open, so that the grounded enclosure prevents carrier generated in between the photodiode and the enclosure region from flowing into an adjacent cell. On a high-sensitivity mode, the first switch is open and the second switch is closed, so that the gate voltage generates a channel to electrically connect the photodiode to the enclosure region, so that the carriers generated within the enclosure are all gathered to the photodiode. The first and second switches may be fabricated on a second semiconductor substrate arranged over the compound semiconductor substrate. The second substrate is electrically connected via bumps to the photodiode, the gate electrode and the enclosure region. The above-mentioned features and advantages of the present invention, together with other objects and advantages, which will become apparent, will be more fully described hereinafter, with references being made to the accompanying drawings which form a part hereof, wherein like numerals refer to like parts throughout. A BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 schematically illustrates a prior art photoelectric transducer; Figs. 2 schematically illustrate the principle of the present invention, where Fig. 2(b) is a cross-sectional view cut along A-A' of Fig. 2(a) plan view; Figs. 3A and 3B schematically illustrate the function of the present invention; Figs. 4 illustrate a preferred embodiment of the present invention, where Figs. 4(b) to 4(d) are cross-sectional views cut along B-B' to D-D' of Fig. 4(a), respectively; Fig. 5 schematically illustrates a plan view of a layout of multiple photocells of the present invention, and Fig. 6 is a graph to show the effect of the enclosure. DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to Figs. 2, where a single photocell is representatively illustrated, principle of the present invention is hereinafter described. Into a predetermined island-shape surface portion of a substrate 11 formed of, for example, p-type PbSnTe (lead-tin-tellurium) compound semiconductor, In (indium) atoms, which are of n-type, are doped so as to form a photodiode 12. A predetermined enclosure region 13 surrounding but apart from the island 12 on the substrate surface is also doped with the In atoms. An insulation layer 14 typically of ZnS (zinc sulfide) is formed upon the surface of substrate 11 having thus doped regions 12 and 13. Upon insulation layer 14 a gate electrode 15 is formed so as to cover the portion in between photodiode 12 and enclosure region 13. An infrared light A to be detected is input from the bottom of substrate 11. Wirings to lead out photo diode 12 and to return from substrate 11 are not shown in Figs. 2. Enclosure region 13 is lead out through insulation layer 14 via a first switch 22 to ground 21. Gate electrode 15 is connected via a second switch 23 to a positive DC (direct current) voltage source. Referring to Figs. 3, operation of the Figs. 2 photocell is hereinafter described. When a high resolution mode is required, first switch 22 is closed so as to make enclosure region 13 grounded and second switch 23 is opened so as to make gate electrode 15 floated, as shown in Fig. 3(a). Carriers generated in the vicinity of enclosure region 13 are attracted and absorbed by the junction potential of enclosure region 13. The movements of the carriers are illustrated with small arrows in Figs. 3. Thus, no carriers flow into adjacent photo diode, which is not shown in the figure, causing no crosstalk between the adjacent photo cells. Then, a decrease in the amount of carriers detected by photo diode 12 cannot be helped, due to the fact that some of the carriers generated in between the photodidode and the enclosure are absorbed by the elclosure. When a high sensitivity mode is required, first switch 22 is opened so as to make enclosure 13 floated and second switch 23 is closed so as to apply a positive voltage onto gate electrode 15, as shown in Fig. 3(b). Due to the positive voltage of gate electrode, the surface of substrate 11 beneath gate electrode 15 is inverted to n-type so as to form a channel 24. Channel 24 electrically connects enclosure region 13 to photodiode 12. Accordingly, all the carriers generated within enclosure region 13 are gathered by photo diode 12. Thus, the high sensitivity detection is accomplished. Referring to Figs. 4, a preferred embodiment of the present invention is hereinafter described in detail. Into a surface of a substrate 11 formed of, for example, a p-type PbSnTe (lead-tin-tellurium) compound semiconductor, In (indium) atoms are doped by thermal diffusion or preferably by ion implantation, for example, as much as 10 17 /cm 3 to 10 18 /cm 3 , and 1 µm deep so as to form a photodiode 12 and enclosure region 13. Photodiode 12 is typically 20 µm square. Enclosure region 13 is of almost square walls, for example, 40 µm square, 3 µm width and 1 µm deep, surrounding but apart from photodiode 12. An insulation layer 14 typically of ZnS (zinc sulfide) is sputtered all over the surface of substrate 11 having thus doped portions 12 and 13, typically as thick as 0.5 µm. Upon insulation layer 14 a gate electrode 15 typically of gold is patterned according to conventional sputtering and lithography techniques so as to substantially cover the portion in between photodiode 12 and enclosure 13. Contact holes 20 and 20A are opened, through insulation layer 14, over predetermined portions of photodiode 12 and enclosure region 13, respectively. Bumps 18, 18A and 18B are provided through contact holes 20 and 20A as well as on gate electrode 15. First and second switches 22 and 23, each typically formed of a MOS FET (metal-oxide-semiconductor field-effect-transistor), and an electronic circuit for processing output signals from the photodiodes 12, such as CCD (charge-coupled device) circuit, are fabricated on a silicon substrate 16, according to conventionally known technique. On a surface of silicon substrate 16, an input diode 17 and terminals 19 and 19A are provided. Input diode 17 is formed by typically doping P (phosphorus) into silicon substrate 16, which is of n-type silicon. Terminals 19 and 19A are typically formed of deposition of a metal, such as aluminum. The silicon substrate surface having the terminals are pressed onto the compound semiconductor substrate 11 so that input diode 17 and terminals 19 and 19A are cold-welded to bumps 18, 18A and 18B, respectively, according to a conventionally known technique. Though in the above explanation and figures it is described that gate electrode 15 covers the portion in between photo diodes 12 and enclosure region 13, the width of gate electrode does not strictly require to be equal to the width of the gap between gate electrode and the enclosure. An gate electrode wider than the gap causes no problem. If the gate electrode width is smaller than the gap, an increased electrode voltage can expands the width of the channel generated therebeneath until the channel reaches both the photo diode and the enclosure. Reduction of the crosstalk by the existence of the enclosure is shown in Fig. 6. The abscissa indicates position of a light spot injected onto a sample substrate having a single photoelectric cell of dimensions of the above-described preferred embodiment, drawn at the top of the graph. The ordinate indicates relative sensitivity in arbitrary unit, for example, the output current of the photodiode. It is observed from the graph that the enclosure decreases the amount of carriers caught in the adjacent cell area down to almost one tenth of the amount of the case having no enclosure. Though in the above description the enclosure region is grounded by the first switch, the ground level may be replaced with an arbitrary proper voltage other than the ground level, as long as the enclosure region prevents the carriers from flowing into the adjacent cell. Voltage to be applied to gate electrode 15 is typically + 1 volt for the case of the above-described preferred embodiment. Many of the photocell shown in Figs. 4 are integrated as typically shown in Fig. 5. Each of enclosure region 13 is independently provided with the first switch 22. All of gate electrodes 23 are commonly connected to a single second switch 23. Though in Fig. 5 the photocells are arranged in a two-dimensional layout, it is apparent that the present invention can be applied to an photoelectric transducer having linearly arranged multiple photocells. In the linear arrangement, the sides of enclosure region facing the sides of the linear arrangement may be omitted, while the enclosure regions at the side facing adjacent photocells are remaining as linear fences. Though in Figs. 2 and 3 the shape of the enclosures are essentially square, it is apparent that the shape may be arbitrarily chosen other than square upon design requirement. Though in the above description, the material of compound semiconductor is referred to as p-type PbSnTe, it is apparent that the present invention may be applied to a photoelectric device whose substrate is formed of InSb (indium-antimony), HgCdTe (mercury-cadnium-tellurium) or HgZnTe (mercury-zinc-tellurium).

Claims: An photoelectric transducer having a photodiode cell, said photocell comprising: a compound semiconductor substrate (11) of a first conductivity type; a photodiode region (12) doped with an impurity of a second conductivity type opposite to said first conductivity type on a surface of said compound semiconductor substrate; an enclosure region (13) surrounding and separated from said photo diode region (12), doped with an impurity of said second conductivity type, on said surface of said compound semiconductor substrate (11); an insulation layer (14) formed on said surface; a gate electrode (15) formed on said insulation layer, said gate electrode being located over a portion in between said photo diode region and said enclosure region; a first switch (22) and a second switch (23); said first switch being provided to apply when closed a first predetermined voltage to said enclosure region when a high resolution mode is required and said second switch is opened; and said second switch being provided to apply when closed a second predetermined voltage to said gate electrode (15) when a high sensitivity mode is required and said first switch is opened. An photoelectric transducer as recited in claim 1, wherein said first predetermined voltage is a voltage of said compound semiconductor substrate (11). A photoelectric transducer as recited in claim 1 or 2, wherein polarity of said second predetermined voltage is identical to polarity of said first conductivity type. A photoelectric transducer as recited in anyone of claims 1 to 3, wherein said compound semiconductor (11) is selected from a group of PbSnTe (lead-antimony-tellurium), InSb (indium-antimony), HgCdfe (mercury-cadmium-tellurium) and HgZnfe (mercury-Zinc-tellurium), where the light to be detected is an infrared light. A photoelectric transducer as recited in anyone of claims 1 to 4, wherein said photoelectric transducer comprises a plurality of said photocells. A photoelectric transducer as recited in claim 5, wherein said photocells are linearly arranged. A photoelectric transducer as recited in claim 5, wherein said photocells are two-dimensionally arranged. A photoelectric transducer as recited in anyone of claims 1 to 7, further comprising a second semiconductor substrate (16) which carries said first and second switches (22, 23) and a circuit to process signals from the photodiode (12), said second semiconductor substrate (16) being arranged over said compound semiconductor (11), said second semiconductor substrate (16) is electrically connected to said photodiode (12), said enclosure compound (13) and said gate electrode (15) via bumps (18, 18A, 18B), respectively.

Inventors: ARINAGA KENJI, FUJIWARA KOJI, HIKIDA SOICHIRO, ITO YUICHIRO, KAJIHARA NOBUYUKI, SUDO GEN, ARINAGA, KENJI, FUJIWARA, KOJI, HIKIDA, SOICHIRO, ITO, YUICHIRO, KAJIHARA, NOBUYUKI, SUDO, GEN
Applicants: FUJITSU LTD, FUJITSU LIMITED
Application year: 1992
Main classification: H01L27
IPC codes: H01L27, H01L31