Apparatus for generating a sinusoidal output signal

Abstract: An apparatus is disclosed for generating an output signal in response to an input signal having a variable input level. The output signal has an output frequency which varies to represent variations in the input level. The apparatus comprises a processing circuit for implementing a digital signal processing algorithm to generate control signals in response to the input signal, which control signals are representative of the variable input level, and an oscillator circuit for generating the output signal in response to the control signals. The control signals include a first control signal representing a first output frequency, a second control signal representing a second output frequency, and at least one intermediate control signal representing output frequencies intermediate the first and second output frequencies. The processing circuit generates at least one intermediate control signal whenever the output signal varies between the first and the second output frequencies which serves to "soften" the transition between the first and second output frequencies and reduces noise which usually is generated by such sudden changes in output frequency.

Description: The present invention relates to an apparatus for generating a sinusoidal output signal. Generation of sinusoidal output signals having a variable output frequency responsive to an input signal having a variable input level is a well-known method of effecting digital communications (see, e.g., EP-A-0 135 437). Common applications of such a communications technique are frequency shift keying (FSK), and derivatives of FSK such as minimum shift keying (MSK) and Gaussian miniumum shift keying (GMSK). Thus an apparatus is known for generating a sinusoidal output signal representative of a digital input signal, said output signal having a first frequency when said input signal is at a first level and having a second frequency when said input signal is at a second level. Generation of such FSK signals is sometimes effected by circuitry involving analog devices, and such analog devices are generally bulkier and less stable (especially in temperature-varying environments) than digital devices. In apparatuses generating FSK signals employing digital devices, sudden frequency shifts in response to changes in signal levels of input signals generally involve undesirable noise during frequency transitions. According to the present invention there is provided an apparatus for generating a sinusoidal output signal representative of a digital input signal, said output signal having a first frequency when said input signal is at a first level and having a second frequency when said input signal is at a second level, characterised in that the apparatus includes: a controlled oscillator adapted to generate said sinusoidal output signal x(n) responsive to a control signal δ and in accordance with the algorithmic relationship x(n) = δx(n-1) - x(n-2) where x(n-1) and x(n-2) are samples of said output signal respectively one sampling interval apart and two sampling intervals apart and δ is a constant for a given desired frequency of said output signal; and a control signal generator adapted to provide said control signal δ responsive to said input signal, said control signal δ being such that said output signal x(n) has said first frequency when said input signal is at said first level and such that said output signal x(n) has said second frequency when said input signal is at said second level, said control signal δ furthermore being such that said output signal x(n) has an intermediate frequency intermediate said first frequency and said second frequency when said input signal varies from said first level to said second level or from said second level to said first level, generation of said intermediate frequency output signal thereby reducing noise which may otherwise be generated by said output signal changing directly between said first and second frequencies. The above specified said control signal generator may include a scaling means for scaling said input signal according to at least one scaling factor to produce said control signal. Alternatively said control signal generator may include a logic circuit and an array of digital filters, said logic circuit receiving said input signal and selecting one digital filter of said array of digital filters in response to said input signal as a receiving digital filter, said receiving digital filter receiving said input signal from said logic circuit and filtering said input signal to produce said control signal. Exemplary embodiments of the present invention will now be described with reference to the accompanying drawings. DETAILED DESCRIPTION OF THE DRAWINGS Figure 1 illustrates the relationship between an output signal and an input signal in frequency shift keyed communication systems. Figure 2 illustrates the preferred embodiment of an oscillator employed in the present invention. Figure 3 illustrates a preferred embodiment of the present invention. Figure 4 illustrates an alternative embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION A typical frequency modulation scheme encountered in digital communications, and commonly encountered in frequency shift keyed (FSK) communication systems, is illustrated in Figure 1. In Figure 1, a digital input signal is illustrated varying over time between -V ref and +V ref so that input signal 10 is at a level -V ref from time t o to time t 1 ; shifts to a level +V ref at time t 1 , maintaining the level +V ref until time t 3 ; and shifts to level -V ref at time t 3 , maintaining level -V ref from time t 3 through time t 5 . Output signal 12 is modulated according to the level of input signal 10. Thus, output signal 12 has a frequency f 1 between time t o and time t 1 when input signal 10 is at value -V ref ; output signal 12 has a frequency f 2 during the interval between time t 1 and time t 3 when input signal 10 has value +V ref ; and output signal 12 is transmitted at frequency f 1 during the time interval t 3 through t 5 when input signal 10 again has value -V ref . In such manner, the frequency of output signal 12 represents the signal level of input signal 10. The apparatus is based upon the following trigonometric relations: A frequency function may be defined as: ω ( f,f s ) = 2π f f s ; where f s is a sampling rate and f is a desired frequency. If the expression x(n)=Asin(nω) represents a sinusoidal wave output of the apparatus, then the following delayed sequences of that sinusoidal output signal can be defined: Current t-time output: x(n)=Asin(nω) Output, one time interval later: x(n-1)=Asin(nω-ω) x(n-1)=Asin(nω)cos(ω)-Acos(nω)sin(ω) Output, two time intervals later: x(n-2)=Asin(nω-2ω) x(n-2)=Asin(nω)cos(2ω)-Acos(nω)sin(2ω) Multiplying Eq. [2] by 2cos(ω) yields: [2cos(ω)][x(n-1)]=[Asin(nω)cos(ω)][2cos(ω)]-[Acos(nω)sin(ω)][2cos(ω)] Using the trigonometric identity sin(2ω)=2sin(ω)cos(ω) yields: [2cos(ω)][x(n-1)]=[2Asin(nω)cos 2 (ω)]-[Acos(nω)sin(2ω)] Subtracting Eq. [3] from Eq. [2] yields: [2cos(ω)][(x(n-1)]-x(n-2)=2Asin(nω)cos 2 (ω)-Acos(nω)sin(2ω)] -Asin(nω)cos(2ω)+Acos(nω)sin(2ω) Reducing the above expression yields: 2cos(ω)x(n-1)-x(n-2)=Asin(nω)[2cos 2 (ω)]-cos(2ω)] Recalling that x(n)=Asin(nω), the expression may be rewritten: 2cos(ω)x(n-1)-x(n-2)=x(n)[2cos 2 (ω)-cos(2ω)] Using the trigonometric identity cos 2 (ω)= 1+cos(2ω) / 2 yields: 2cos(ω)x(n-1)-x(n-2)=x(n) This expression may be written in the form: x ( n )=δ x ( n -1)- x ( n -2) where δ=2cos(ω), and δ is a constant for a given frequency, ω. Thus, the current output x(n) is recursively related to outputs one time interval later (x(n-1)) and two time intervals later (x(n-2)), and the recursive nature of output signal x(n) can be used to generate sine waves using a sampling frequency f s that has no specific relationship to the desired frequency (f) to be generated, except that the sampling frequency must satisfy Nyquist's sampling theorem (i.e., f s ≥ 2f). This recursive relationship facilitates simplified sinusoidal output signal generation. Distinct advantages are especially provided in the implementation of such recursive signal generation since prior art apparatuses employing look-up tables (read-only memories; ROM) to store wave-form samples, with the number of samples required to be stored being dependent upon the relationship between the desired frequency and the sampling rate. In contrast, the recursive capability of the present invention requires only two storage locations, regardless of what frequency is desired. Specifically, the recursive capability of the present invention facilitates generation of a sinusoidal output signal using two successive signal samples [x(n-1), and x(n-2)]. Thus, two storage locations are all that are required for employing the recursive relationship: one storage location for x(n-1) and one storage location for x(n-2). Fig. 2 is an illustration of the preferred embodiment of a recursive oscillating circuit apparatus employing the above-described relationships to advantage. In Fig. 2, a first delay circuit 16 receives a first signal at an input 18 and generates a once-delayed output signal at an output 20. The once-delayed output signal is delayed one time period from the first signal received at input 18. The once-delayed output signal from output 20 of first delay circuit 16 is received as an input signal by a second delay circuit 24 at an input 22. Second delay circuit 24 produces a twice-delayed output signal at its output 26, which twice-delayed output signal is delayed one clock period from the once-delayed output signal received at its input 22. The once-delayed output signal from first delay circuit 16 is also provided as an input to a multiplier circuit 28 at an input 30. Multiplier circuit 28 multiplies the once-delayed output signal received from first delay circuit 16 by a multiplier δ received at a multiplier input 32, and provides a multiplier output signal at its output 34. The multiplier output signal is provided to a positive node 36 of a summing unit 38. Summing unit 38 also receives at its negative node 40 the twice-delayed output signal from output 26 of second delay circuit 24. Thus, summing unit 38 provides at its output 42 a difference signal representing the difference between the multiplier output signal received at its input node 36, less the twice-delayed output signal received at its negative node 40. This difference signal is the sinusoidal output signal x(n). Sinusoidal output signal x(n) is provided through a feedback line 44 to first delay circuit 16 and comprises the first signal received by first delay circuit 16 at its input 18. Thus, there is provided a recursive oscillator circuit 15 which provides an output x(n) determined by a multiplier 6 received at multiplier input 32. Initial conditions are established for oscillator circuit 15 by an input x(1) to first delay circuit 16 and by an input x(0) to second delay circuit 24. Preferably, x(1)=Asinω 0 and x(0)=0, where A signifies amplitude of the signal x(1) and ω 0 signifies an initial frequency (ω 0 = 2π f 0 / f s ). The employment of recursive oscillator circuit 15 as illustrated in Fig. 2 in a communications system is illustrated, in its preferred embodiment, in Fig. 3. In Fig. 3, a communications system 50 is illustrated receiving a digital signal input at an input 52 to a low pass filter (or signal synthesizer) 54. Low pass filter 54 employs a sampling frequency f s received at an input 56. A signal "y" is generated from low pass filter 54 at an output 58 and passed to a scaling circuit 60. Scaling circuit 60 comprises a multiplier unit 62 and an adder unit 64 to which output signal "y" is successively applied. Scaling circuit 60 applies scaling factors α and β to signal y to produce an output δ on line 66 such that δ=αy+β. The scaled output δ is applied to recursive oscillator 15 and recursive oscillator 15 generates an output signal at line 70 in a manner as described in connection with Fig. 2. Thus, the output signal at line 70 is a sinusoidal output signal which is defined by control signal δ which is received by recursive oscillator 15 via line 66 from scaling circuit 60. An alternate embodiment of a communications system employing a recursive oscillator 15 of the type illustrated in Fig. 2 is illustrated in Fig. 4. In Fig. 4, a communications system 80 is illustrated comprising a logic circuit 82 which receives a digital input signal at an input 84. Depending upon the signal level of the input signal received at input 84, logic circuit 82 selects and appropriate filter among an array of filters FT1, FT2, ..., FTn for receiving a representation of the input signal on line 86. The selected appropriate filter, for example filter FT1 in Figure 4, filters the representative input signal received on line 86 to produce a control signal δ on a line 88 for provision to a recursive oscillator 15. Selection of the appropriate filter FT1, FT2, ...., FTn by logic circuit 82 is preprogrammed in logic circuit 82 for effecting generation of a control signal δ to facilitate effecting noise-free transition of the frequency of an output signal produced at output 90 to accurately reflect deviations in the signal level of the input signal received at input 84 of logic circuit 82.

Claims: Apparatus for generating a sinusoidal output signal representative of a digital input signal, said output signal having a first frequency when said input signal is at a first level and having a second frequency when said input signal is at a second level, characterised in that the apparatus includes: a controlled oscillator (15) adapted to generate said sinusoidal output signal x(n) responsive to a control signal δ and in accordance with the algorithmic relationship x(n) = δx(n-1) - x(n-2) where x(n-1) and x(n-2) are samples of said output signal respectively one sampling interval apart and two sampling intervals apart and δ is a constant for a given desired frequency of said output signal; and a control signal generator (54, 60, 82, FT1, FT2, FTn) adapted to provide said control signal δ responsive to said input signal, said control signal δ being such that said output signal x(n) has said first frequency when said input signal is at said first level and such that said output signal x(n) has said second frequency when said input signal is at said second level, said control signal δ furthermore being such that said output signal x(n) has an intermediate frequency intermediate said first frequency and said second frequency when said input signal varies from said first level to said second level or from said second level to said first level, generation of said intermediate frequency output signal thereby reducing noise which may otherwise be generated by said output signal changing directly between said first and second frequencies. Apparatus as recited in claim 1 wherein said control signal generator includes a scaling means (60) for scaling said input signal according to at least one scaling factor to produce said control signal. Apparatus as recited in claim 1 wherein said control signal generator includes a logic circuit (82) and an array (FT1, FT2, FTn) of digital filters, said logic circuit receiving said input signal and selecting one digital filter of said array of digital filters in response to said input signal as a receiving digital filter, said receiving digital filter receiving said input signal from said logic circuit and filtering said input signal to produce said control signal.

Inventors: ASGHAR SAFDAR M, LINZ ALFREDO R, ASGHAR, SAFDAR M., LINZ, ALFREDO R.
Applicants: ADVANCED MICRO DEVICES INC, ADVANCED MICRO DEVICES, INC.
Application year: 1992
Main classification: H03K3
IPC codes: H03B28, H03B5, H04L27