Modulator or switch with vertically-coupled anti-resonant reflecting optical waveguides ("arrow") on silicon

Abstract: An optical modulator is disclosed. The modulator (10) is based upon an ARROW waveguide, consisting of a substrate (12), a lower cladding (16), an interference layer (18), and a core layer (20). An electronic element (14) is formed in the structure to control the free-carrier concentration in the interference layer (18). The light is coupled by gratings (22,24) into the interference layer (18), where the free-carrier concentration is controlled by the element (14), which in turn controls the modulation of the light in the interference layer (18) before it is coupled back to the core (20) layer.

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to an optical waveguide modulator of the type defined in the precharacterizing part of claim 1 and to the method of forming such a modulator. 2. Background of the Invention Anti-resonant Reflecting Optical Waveguides (ARROW) have several advantages over other types of waveguides. They can be formed upon silicon, using relatively thin layers compared to other waveguides, for easier compatibility with other electronic integrated circuits. At the same time, they can have a large mode for coupling to optical fibers. Additionally, they are relatively easy to manufacture, as they require no exotic materials. These waveguides typically consist of a layer of silicon oxide built upon a silicon substrate. An interference layer of silicon is then placed upon the first layer of silicon oxide, followed by another layer of silicon oxide. All of these materials can be deposited with relative ease. The silicon layer sandwiched between the two silicon oxide layers functions as a passive interference cladding layer. The thickness of the interference layer is not critical. Vertical coupling has been achieved in such layered structures made of semiconductor materials by the use of periodic gratings in the materials that make up the structure. This technique can be used to couple light between the top core layer and the interference layer. Active optical modulators are normally difficult to produce in or on silicon Silicon exhibits no linear electro-optic effect, although changes in absorption or refractive index may be induced by modulating the density of free carriers. All-silicon waveguides tend to have a high propagation loss due to these same free-carrier effects and are difficult to fabricate to have a high modulation efficiency, because of poor modal overlap. All-dielectric waveguides can have low loss, but are typically passive and not useful for modulation. Using an ARROW structure in conjunction with vertical coupling will make it possible to combine the low-loss propagation of dielectric waveguides with the capability of modulating or switching light using free-carrier effects. An optical waveguide of the above-mentioned type is disclosed in EP-A-0 263 640. However, this modulator is a passive modulator and has only the ability of selecting predetermined wavelengths. Moreover, FR-A-2 647 965 discloses an optical waveguide modulator in which modulation is not done away from the main path of light in the waveguide. SUMMARY OF THE INVENTION Objects and advantages will be obvious, and will in part appear hereinafter; according to the invention, they will be accomplished by providing an optical waveguide modulator of the above-mentioned type with the features of the characterizing part of claim 1. The waveguide is an Anti-Resonant Reflecting Optical Waveguide with one interference layer of a semiconductor material between two layers of dielectric material. Free-carrier effects in the interference layer are controlled by application of a current or field to an active electronic element in the layer to modulate light in the layer. This modulator is formed by the method of claim 12. BRIEF DESCRIPTION OF THE DRAWINGS For a complete understanding of the invention, and the advantages thereof, reference is now made to the following description in conjunction with the accompanying drawings, in which: FIGURE 1A shows a side view of an ARROW waveguide adapted to modulate light using free-carrier effects. FIGURE 1B shows an end view of an ARROW modulator adapted to control free-carrier effects. FIGURE 2A shows a path of light flowing through an ARROW modulator. FIGURE 2B shows a top view of an ARROW modulator with a transistor for controlling free-carrier concentration in a semiconductor interference layer. FIGURE 2C shows an end view of an ARROW modulator with a transistor for controlling free-carrier concentration in a semiconductor interference layer. FIGURE 3A shows a side view of another ARROW waveguide adapted to modulate light using free-carrier effects. FIGURE 3B shows an end view of an alternate embodiment of an ARROW waveguide adapted to modulate light using free-carrier effects. FIGURE 4 shows a manufacturing process that could be used to form an ARROW waveguide device adapted to modulate light using free-carrier effects. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A side view of an ARROW modulator that uses the free-carrier effect in semiconductors is shown in Figure 1A. The modulator 10 consists of a substrate 12, which is usually, but not limited to, silicon. Substrate 12 has a doped or deposited area 14, which forms the gate of a transistor. The placement of the source and the drain of the transistor will be covered in further discussion. Upon the substrate is the lower cladding of the waveguide, 16. This is normally silicon oxide. On top of the lower cladding layer is the interference layer, 18, which, in this example, is silicon. Other semiconductor materials may also be used. The interference layer thickness must be such that constructive interference between the reflections from the top and bottom surfaces of this layer occurs to provide high reflectivity for the mode guided in the core layer. Periodic gratings 22 and 24 have been formed into the top of the interference layer 18. This can be accomplished by many ways, including etching. Although shown as two separate gratings, they could also be the two ends of a long section of grating. These gratings allow vertical coupling between the core and the interference layer. The core layer, 20, is deposited upon the interference layer, and is typically made out of a dielectric material with high optical transparency, such as silicon oxide, or silicon nitride. The lower cladding layer is chosen to be approximately one-half the thickness of the core, to prevent waveguiding in this layer. Figure 1B shows an end view of one embodiment of the modulator 10. Substrate 12 has, in addition to gate 14, source contact 26 and drain contact 28. The lower cladding 16 is deposited and etched, or just deposited, in such a manner as to allow the interference layer 18 to "touch down" and come in contact with the substrate 12, and its source and drain contacts. This contact allows the modulator to be controlled, if desired, by circuitry in the substrate. Alternatively, contact may be made from the top through the core layer. As the core layer 20, has a waveguide rib, or other structure to transversely confine the light 30, the cladding underneath the edges of the core is not really necessary anyway. This allows for more freedom in the process design to manufacture the modulator. Figure 2A shows the path of light through the modulator. The light enters the core layer 20 from the left of the drawing, shown as arrow 32A. The light travels over the grating 22 and is coupled by and through the grating into the interference layer 18, as shown by arrow 32B. Since the interference layer has a higher refractive index than the surrounding core and cladding layers, it acts as a conventional dielectric waveguide for light traveling within it. While the light is in the interference layer, shown by arrow 32C, control circuitry, or a control element, as will be discussed, can be used to control the free-carrier concentration, and thereby modulate the light. One method for achieving this is to dope the interference layer to form source and drain regions, and to then apply voltage to gate 14. Then, if the resulting transistor is turned off, the free-carrier concentration between the source and drain regions will drop drastically in the silicon. The transistor may conceivably be operated in either the depletion or the enhancement mode. In either case, the changes in free-carrier concentration will result in changes in the refractive index experienced by light guided in the interference layer. For example, an increase in the free-carrier concentration will result in a decrease in the refractive index for light at the 1.3 µm wavelength. The control of the carrier concentration between the source and drain allows for control of the light that will eventually couple out of the interference layer. The previously passive layer of silicon has been turned into an active element for modulating light. Lateral confinement for light traveling in this layer is desirable for efficient coupling back into the laterally-confined core layer mode. This may be provided, for example, by doping the interference layer to change its refractive index. For example, germanium could be used for raising the refractive index of a silicon layer. The doping forming the control element may also contribute to lateral confinement. A possible placement of the source and drain regions is shown in Figure 2B, a top view of a modulator. The core layer 20 is seen from above, with rib 30 in the middle. Gratings 22 and 24 are shown in dashed lines. These gratings are shown etched onto the interface between the core and interference layers. The preferred placement for the gratings is on the surface of the interference layer, but they may be formed in the material either of the interference layer, or of the core layer. Source 27 and drain 29 are in the interference layer, and are hatched to show the active area in the silicon between them. Gate 14 is under this region, in or on the substrate below the lower cladding layer. It is hatched differently to highlight its location. Light will be modulated or absorbed depending on the state of the transistor, ON or OFF. Figure 2C shows an end view of this structure. Source 27 and drain 29 are of the same doping, either n-type or p-type, demonstrated by identical hatching. The gate region 14 is typically in the substrate, as in this case, and under the undoped region between the source and drain regions. The gate must be isolated electrically from the source and drain. As discussed previously, the application of voltage to this control element is used to manage the free-carrier concentration. Additionally, contact regions for the source and drain could be placed in the substrate 12, under regions 27 and 29, where these regions contact the substrate 12. Another embodiment for control of the free-carrier effects is shown in Figures 3A and 3B. A top view of such an embodiment is shown in Figure 3A. Instead of the transistor in the interference layer as shown previously, a p-i-n diode could be used. The entire region that comprises the p-i-n diode has been shaded for viewing clarity. P-doped region 34 has a lower boundary at the upper edge of the confinement structure 30, as seen on the drawing. The i region 36 is undoped, and lies under the confinement structure 30. The n-doped region 38 has an upper boundary at the lower edge of confinement structure 30, as seen on the drawing. Note that since p-type and n-type doping both reduce the refractive index, this structure also provides for lateral optical confinement in the intrinsic region of the interference layer. The p-i-n diode structure is actually easier to manufacture and allows for better control of the carrier concentration, than the configurations previously discussed. An end view of this structure is shown in Figure 3B. Layer 20 is shown with the confinement structure 30. Region 34, the p-doped region, is to the left of the confinement structure, in the interference layer. The interference layer is shown making contact with the semiconductor substrate 12. This is only for electrical connection ease, and better integration of the device. There is no optical reason for this, and this should not be considered as such in the design process. The p-i-n diode structure controls the free-carrier concentration in the following way. When the structure is reverse biased, the intrinsic region in the interference layer is depleted of carriers. When the structure is forward biased, carriers are injected into this region continuously, where they recombine, allowing current to flow. Figure 4 shows a process for manufacture for one embodiment of the invention. The first step, 40, is to prepare a silicon, or other semiconductor material, substrate. The substrate could be silicon, gallium arsenide, or other semiconductor material, and may or may not contain electronic control circuitry. The next step, 42, is to form the lower cladding, usually out of silicon oxide, or silicon nitride. There are many ways in which to form this layer, one of which is to use thermal oxidation, in the case of silicon. If the substrate is gallium arsenide, the cladding and core layers could be aluminum gallium arsenide (Al x Ga 1-x A s ). The interference layer may be gallium arsenide, or aluminum gallium arsenide with a lower aluminum concentration. This is a choice for the next step 44, in which the interference layer is formed. Again, there are many ways in which to form this layer, including epitaxy, but the preferred embodiment for the Si-SiO 2 system is normally to use chemical vapor deposition. In step 48 the gratings or grating, in the case of using only one long grating, is formed in the interference layer. This can be done many ways, one of which follows. The interference layer is coated with photoresist, and the resist is exposed to make a grating pattern. The interference layer is then etched to form the grating. Another method is to use electron beam patterning. Step 46 can come at various times in the process, depending on the control element used. In this case, the control element is the lateral p-i-n diode that is formed in the interference layer. The interference layer must be doped to form the p-type and n-type doped regions. Obviously, if an embodiment where the control element is formed in the elsewhere in the structure is used, the control element step 46 would occur at a different point of the process. The core layer is best formed using chemical vapor deposition in step 50, selected from many possibilities. If the use of a confinement structure is determined to be beneficial, this can be formed in step 52. One possible process is as follows. First, the core layer is coated with photoresist. The photoresist is then exposed to form a pattern that defines the confinement structure, and the core layer is etched using either a wet or dry etch. Step 54 is to form the upper cladding. Depending on the environment the device is to operated in, this step may not actually be necessary. In previous discussion, the upper cladding was assumed to be air. But, if a special need arises, the upper cladding would be placed upon the core layer. The above invention turns a previously passive element of an ARROW waveguide into an active source of modulation. This allows for a device with all of the advantages of an ARROW waveguide discussed previously, plus the addition of modulation. The resultant device has thin cladding layers with a thick core layer for more efficient coupling to optical fibers. The dielectric core has a low loss for propagation over long distances. Additionally, the process for manufacture of such a device is compatible with standard integrated circuit processing, which leads to the additional advantage of being able to be integrated with and controlled by underlying circuitry. Thus, although there has been described to this point a particular embodiment for an integrated-optic waveguide modulator, it is not intended that such specific references be considered as limitations upon the scope of this invention except in-so-far as set forth in the following claims.

Claims: An anti-resonant reflecting optical waveguide modulator (10) including a substrate (12), a cladding layer (16) upon said substrate (12), a semiconductor interference layer (18) upon said cladding layer (16), a waveguide core layer (20) upon said semiconductor interference layer (18), gratings (22, 24) to couple light between said waveguide core layer (20) and said semiconductor interference layer (18), said modulator characterized by a control element (14) operable to control the free-carrier concentration in said semiconductor interference layer (18), wherein light coupled through one of said gratings (22) to said interference layer (18) is modulated by said control of said free-carrier concentration in said interference layer (18), then coupled by another of said gratings (24) out of said interference layer back to said waveguide core layer (20). The modulator (10) as claimed in claim 1, wherein said substrate (12) is silicon. The modulator (10) as claimed in claim 1, wherein said substrate (12) is gallium arsenide. The modulator (10) as claimed in any preceding claim, wherein said cladding layer (16) is silicon oxide. The modulator (10) as claimed in any of claims 1 to 3, wherein said cladding layer (16) is aluminum gallium arsenide. The modulator (10) as claimed in any preceding claim, wherein said semiconductor interference layer (18) is silicon. The modulator (10) as claimed in any of claims 1 to 5, wherein said semiconductor interference layer (18) is gallium arsenide. The modulator (10) as claimed in any preceding claim, wherein said waveguide core layer (20) is silicon oxide. The modulator (10) as claimed in any of claims 1 to 7, wherein said waveguide core layer (20) is aluminum gallium arsenide. The modulator (10) as claimed in any preceding claim, wherein said control element (14) is a transistor. The modulator (10) as claimed in any of claims 1 to 9, wherein said control element (14) is a p-i-n diode. A method of forming an anti-resonant reflecting optical waveguide modulator (10) comprising the steps of preparing a semiconductor substrate (12), forming a cladding layer (16) upon said substrate (12), depositing a semiconductor interference layer (18) upon said cladding layer (16), depositing a waveguide core layer (20) upon said semiconductor interference layer (18), forming periodic gratings (22, 24) in said modulator (10) operable to couple light between said waveguide core layer (20) and said semiconductor interference layer (18); and forming a control element (14) in said modulator (10) to control free-carrier effects in said semiconductor interference layer (18) in order to modulate light coupled in said semiconductor interference layer (18) by a first of said gratings (22), wherein said control element (14) is positioned such that said modulation of light in said semiconductor interference layer (18) is performed prior to said light being coupled back to said waveguide core layer (20) by another of said gratings (24). The method as claimed in claim 12, wherein said step of forming a cladding layer (16) comprises thermal oxidation. The method as claimed in claim 12 of claim 13, wherein said step of depositing a semiconductor interference layer (18) comprises vapor deposition. The method as claimed in any of claims 12 to 14, wherein said step of forming periodic gratings (22, 24) comprises patterning and etching said semiconductor interference layer (18). The method as claimed in any of claims 12 to 15, wherein said step of depositing a waveguide core layer (20) comprises chemical vapor deposition. The method as claimed in any of claims 12 to 16, wherein said step of forming a control element (14) comprises doping the semiconductor interference layer (18). The method as claimed in claim 17, wherein said step of forming a control element (14) further comprises doping the substrate (12). The method as claimed in claim 17 or claim 18, wherein said step of forming a control element (14) further comprises depositing an electrode.

Inventors: MAGEL GREGORY A, MAGEL, GREGORY A.
Applicants: TEXAS INSTRUMENTS INC, TEXAS INSTRUMENTS INCORPORATED
Application year: 1992
Main classification: G02F1
IPC codes: G02B6, G02F1