Arrangement comprising a phase-locked loop

Abstract: Arrangement comprising a phase-locked loop whose signal path incorporates a phase detector, a loop filter and a controlled oscillator, and a pilot generator for generating a local auxiliary pilot which is applied to the controlled oscillator, and a pilot detector an input of which is coupled to the signal path of the loop and an output of which is coupled to a level detector via a filter member. In order to render an accurate and unambiguous locking indication possible in a simple manner, the frequency of the local auxiliary pilot is located within the passband of the loop and the pilot detection device comprises a synchronous detector having first and second inputs, the first input of which is coupled to the signal path of the loop between the phase detector and the controlled oscillator and the second input is coupled to the output of the pilot generator, an output of the synchronous detector being coupled to the low-pass filter.

Description: The invention relates to arrangement comprising a phase-locked loop whose signal path incorporates a phase detector, a loop filter and a controlled oscillator, and a pilot generator for generating a local auxiliary pilot which is applied to the controlled oscillator, and a pilot detector input of which is coupled to the signal path of the loop and an output of which is coupled to a level detector via a filter member. An arrangement of this type is known per se from Japanese Patent publication Kokai 63-107304 and supplies a binary output signal which gives an indication about the state of phase lock of the phase-locked loop. In the phase-locked state of the loop the output signal of the controlled oscillator is frequency-modulated with the local auxiliary pilot. In the known arrangement this frequency-modulated oscillator signal is applied to a frequency discriminator operating as a pilot detector. To this end an input of the known pilot detector is coupled to the signal path between the output of the controlled oscillator and an input of the phase detector. The auxiliary pilot demodulated by the frequency discriminator is applied to the level detector via a bandpass selection in the filter member. The level detector supplies the above-mentioned binary output signal which has the value of 0 or 1 with respect to a given threshold value in dependence upon the amplitude of the auxiliary pilot selected by means of the filter member. In the phase-locked state of the loop the oscillator frequency corresponds to the frequency to which the frequency discriminator is tuned, i.e. the zero frequency, and the frequency-modulated oscillator frequency varies within the detection range of the frequency discriminator. The frequency discriminator then supplies the local auxiliary pilot at an amplitude which exceeds said threshold value and thus gives rise to a given output signal value of the level detector, for example 1. Outside the locking range the oscillator frequency deviates from said zero frequency to such an extent that it does not coincide with the detection range of the frequency discriminator and that the auxiliary pilot cannot be detected. Consequently, the frequency discriminator supplies no or substantially no signal component at the frequency of the auxiliary pilot so that the output signal of the bandpass filter member remains below said threshold value and the level detector supplies the output signal value of 0. For a correct locking indication the dimensioning of the frequency discriminator and hence the location, the steepness and the range of the detection curve, as well as said threshold value of the level detector should be accurately set to correct values with respect to the locking range of the phase-locked loop. The circuit settings required for this purpose are complex and time-consuming, hence costly. A solution is known from US patent 4,866,402 in which measures of the first mentioned prior art are extended such that the pilot detector comprises a multiplier circuit for synchronous detection of the auxiliary pilot, a first input of the multiplier circuit being coupled to the signal path of the loop between the phase detector and the controlled oscillator, and a second input of the multiplier circuit being coupled to the pilot generator, an output of the multiplier circuit being coupled to the filter member, comprising a low-pass filter. In this known arrangement the local auxiliary pilot is applied to the loop filter. The auxiliary pilot signal circulates through the loop filter, the voltage controlled oscillator and the phase detector. Under locked conditions, the phase detector supplies a mixing product which has a frequency equal to that of the auxiliary pilot, whereas under non-locked condition the phase detector does not supply such a mixing product. The pilot detector comprising a multiplier circuit is arranged between the phase detector and a comparator for indicating the presence or absence of the local auxiliary pilot. It is an object of the invention to enhance the accuracy of detecting the lock-in state of the phase-locked loop in the arrangement. According to the invention such an arrangement is therefore characterized in that a first phase-shifting circuit precedes one of the two first and second inputs of the multiplier circuit. It is based on the recognition that not only the amplitude of said mixing product, also referred to as return pilot, but also the phase shift with respect to the original auxiliary pilot signal is characteristic of the state of phase lock. Loop parameters such as bandwidth, phase shift and loop gain in the phase-locked state of the loop deviate from those outside the phase-locked state. When the measure according to the invention is used, this recognition is utilized for adjusting the pilot detector at an optimum working point at the desired lock-in state. Consequently, the threshold value of the level detector may vary within a comparatively large tolerance range without influencing the accuracy and uniformity of the locking indication obtained in accordance with the invention. For an effective locking indication the quantity (amplitude or phase) of the return pilot, which varies to the greatest extent at the transition from the phase-locked state to the unlocked state, and conversely, should be detected. A preferred embodiment is therefore characterized in that the frequency of the local auxiliary pilot is located within the passband of the loop, the pilot detector being arranged to effect a substantially synchronous amplitude detection of the local auxiliary pilot supplied to the first input of the multiplier circuit. An optimum synchronous amplitude detection of the return pilot can be realised in a further preferred embodiment, characterized in that the first phase-shifting circuit precedes the first input of the pilot detector and a second phase-shifting circuit is arranged between the signal generator and the second input of the pilot detector for a 90° phase shift of the local auxiliary pilot, the output signal of the first phase-shifting circuit being substantially in phase or in anti-phase at the frequency of the local auxiliary pilot with respect to the local auxiliary pilot at the output of the second phase-shifting circuit. The invention will be described in greater detail with reference to the sole Figure shown in the drawing. The Figure shows an arrangement comprising a phase-locked loop 2 to 6 and a pilot detection device 8 to 10, a low-pass filter member 11, a level detector 12 and a signal generator 7 for generating a local auxiliary pilot. The phase-locked loop 2 to 6 has a signal input 1 to which a modulated or unmodulated RF or IF input signal is applied. The signal input 1 is coupled to a phase detector 2, a loop filter 3, an amplifier 4, an adder stage 5 and a controlled oscillator 6. In the phase-locked state of the loop phase differences deviating from 90° between the oscillator signal from the controlled oscillator 6 applied to the phase detector 2 on the one hand and the carrier of the input signal applied to the input 1 on the other hand are negatively fed back in the loop. This results in a frequency and phase synchronization of said oscillator signal with the carrier of the input signal. If the loop is outside its locking range, the oscillator frequency deviates from the frequency of the input carrier by a value which is larger than the capture range of the loop. The local auxiliary pilot supplied by the signal generator 7, also referred to as the original auxiliary pilot, is injected in the signal path of the loop preceding the controlled oscillator 6 by adding this original auxiliary pilot to the loop signal in the adder stage 5 arranged between the amplifier 4 and the controlled oscillator 6. As a result, the oscillator signal is modulated in frequency or phase with the auxiliary pilot (also referred to as angle modulation). In the phase-locked state of the loop a mixing product is formed in the phase detector 2 at a frequency which is equal to the frequency of the local auxiliary pilot and at an amplitude and phase which are characteristic of the amplitude and phase transfer of the controlled oscillator 6 and the phase detector 2 in this state of phase lock. This mixing product, also referred to as return pilot, is applied to an input of the pilot detection device 8 to 10 via the loop filter 3 and the amplifier 4. The pilot detection device 8 to 10 has first and second phase-shifting circuits 8 and 9 via which the amplifier 4 and the signal generator 7, respectively, are coupled to first and second inputs of a multiplier circuit 10 operating as a pilot detector. The return pilot is applied from the controlled amplifier 4 to the last-mentioned first input of the pilot detector 10 via the first phase-shifting circuit 8 and the original auxiliary pilot is applied to the second input of the pilot detector 10 via the second phase-shifting circuit 9. The second phase-shifting circuit 9 realises a 90° phase shift of the original auxiliary pilot. An output of the multiplier circuit 10 is coupled to a level detector 12 via the low-pass filter member 11. In the phase-locked state of the loop the auxiliary pilot undergoes a phase shift from the input of the adder circuit 5 to the output of the amplifier 4, which phase shift is dependent on the phase transfer of the loop at the frequency of the local auxiliary pilot. In the embodiment shown a synchronous amplitude detection of the return pilot is realised by causing the two pilot signals applied to the multiplier circuit 10 to be mutually in phase or in anti-phase. To this end the original auxiliary pilot is shifted 90° in phase in the second phase-shifting circuit 9 before it is applied to said second input of the pilot detector 10 and the phase shift realised in the first phase-shifting circuit 8 is chosen to be such that, together with the phase shift occurring in the loop at the auxiliary pilot frequency, it is either equal to the phase of the auxiliary pilot applied to the second input of the synchronous detector 10, or differs 180° therefrom. The amplitude of the return pilot becomes available in the form of a dc component at the output of the pilot detector 10 and is applied to the level detector 12 after low-pass selection in the low-pass filter member 11. The level detector 12 has a threshold value which is chosen to be such that it is exceeded by said dc component in the phase-locked state of the loop. In that case the level detector 12 supplies a locking indication signal having a given binary value, for example 1, which can be further used (not shown) for adjusting, for example, the loop gain to a given value or for indicating the state of phase lock. Outside the locking range the amplitude of the return pilot is zero or substantially zero so that no dc component exceeding the last-mentioned threshold value of the level detector 12 is obtained at the output of the pilot detection device 8-10. The level detector then supplies a locking indication signal having the other binary value, i.e. 0 in this case. In a practical embodiment the loop bandwidth was 75 kHz, the auxiliary pilot was 38 kHz and the bandwidth of the low-pass filter was 50 Hz. A Schmitt trigger was used as a level detection circuit. It will be evident that the inventive idea is applicable in an embodiment which differs from the embodiment shown. For example, the amplifier 4 and one of the two said phase-shifting circuits may be dispensed with, the frequency of the local auxiliary pilot may be chosen outside the 3 dB loop passband.

Claims: An arrangement comprising a phase-locked loop (2, 3, 4, 6) whose signal path incorporates a phase detector (2), a loop filter (3) and a controlled oscillator (6), and a pilot generator (7) for generating a local auxiliary pilot which is applied to the controlled oscillator (6), and a pilot detector (8, 9, 10) an input of which is coupled to the signal path of the loop and an output of which is coupled to a level detector (12) via a filter member (11), wherein the pilot detector comprises a multiplier circuit (10) for synchronous detection of the auxiliary pilot, a first input of the multiplier circuit (10) being coupled to the signal path of the loop between the phase detector (2) and the controlled oscillator (6), and a second input of the multiplier circuit (10) being coupled to the pilot generator (7), an output of the multiplier circuit (10) being coupled to the filter member (11), comprising a low-pass filter, characterized in that a first phase-shifting circuit (8) precedes one of the two first and second inputs of the multiplier circuit (10). An arrangement comprising a phase-locked loop (2, 3, 4, 6) as claimed in Claim 1, characterized in that the frequency of the local auxiliary pilot is located within the passband of the loop, the pilot detector (8, 9, 10) being arranged to effect a substantially synchronous amplitude detection of the local auxiliary pilot supplied to the first input of the multiplier circuit (10). An arrangement comprising a phase-locked loop (2, 3, 4, 6) as claimed in Claim 2, characterized in that the first phase-shifting circuit (8) precedes the first input of the multiplier circuit (10) and a second phase-shifting circuit (9) is arranged between the signal generator (7) and the second input of the multiplier circuit (10) for a 90° phase shift of the local auxiliary pilot, the output signal of the first phase-shifting circuit (8) being substantially in phase or in anti-phase at the frequency of the local auxiliary pilot with respect to the local auxiliary pilot at the output of the second phase-shifting circuit (9).

Inventors: DEN BRABER GERARD PAUL, DEN BRABER, GERARD PAUL
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1992
Main classification: H03L7
IPC codes: H03L7