Input buffer circuit

Abstract: An input buffer circuit receives data from a single ended transmission line (56) and provides an output signal (62) in one or two states in response to the state of the signal on the input (56). The circuit has hysteresis with temperature stable upper and lower threshold levels (V th , V t1 ). Temperature stability is achieved by providing first and second temperature dependent reference currents (I ref , I ref2 ), one with a positive temperature coefficient and one with a negative temperature coefficient, and by adjusting the temperature coefficients of the first and second reference currents (I ref , I ref2 ) so that the overall effect of all of the temperature coefficients of the circuit is substantially zero.

Description: This invention pertains to circuitry for receiving data from a single ended transmission line and more particularly to such circuitry having hysteresis and thresholds substantially independent of temperature and negative input voltage protection. When a temperature independent voltage reference is already available in an integrated circuit, temperature independent input switching thresholds are typically provided by a circuit configured as a differential transistor pair. One side of the differential transistor pair serves as the input, while the other side is tied to the temperature independent voltage reference. When a stable voltage reference is not already required for some other integrated circuit function and supply voltage variations preclude using the supply voltage as a temperature stable voltage reference, the addition of a temperature stable voltage reference adds considerable cost to the integrated circuit. This added cost results from both the complexity of temperature independent voltage supplies and the silicon area required to integrate such reference voltage supplies into the circuit. One typical element of temperature stable voltage supplies is a feedback compensation capacitor. This element itself requires a large amount of additional silicon area on the integrated circuit, or may even be an external component. EP-A-0 257 971 describes a signal buffer circuit in which the threshold level of a data signal path is changed, in response to the input signal level, by an adjustable hysteresis feedback loop including a temperature compensation string. The present invention seeks to provide an improved input buffer circuit. According to an aspect of the present invention, there is provided an input buffer circuit as specified in claim 1. This invention can be implemented in an integrated circuit and can provide an input buffer for receiving data from a single ended transmission line. The circuit can make use of only a single positive voltage supply and can provide temperature insensitive high and low thresholds with an adjustable hysteresis without the need for a temperature stable voltage reference. The input of the circuit can withstand negative voltages of tens of volts, the limiting factor being the base to emitter breakdown characteristics of the input PNP transistor. These characteristics make the circuit suitable for implementation into automotive applications. This invention is best used on an integrated circuit where there is no other need for a voltage reference circuit and where supply voltage variations prevent using the supply voltage as a reference for the input thresholds. The negative input voltage protection of this circuit can prevent the loss of low state data integrity and can prevent the circuit from sourcing current onto a transmission line. In the event that the input signal is floated, the circuit can go to a low logic state. This invention uses a reference current generator which produces a first reference current with a positive temperature coefficient. In many cases, such a positive temperature coefficient current generator is already on the integrated circuit for other functions. The positive temperature coefficient reference current, along with another simply generated negative temperature coefficient reference current are combined in a calculated ratio such that the net sum current has a temperature coefficient designed to offset other internal input buffer temperature dependent parameters. Any means of generating the positive and negative temperature coefficient currents is acceptable. The end result of the circuitry is an input buffer with temperature independent high and low input thresholds. According to the invention, there are provided first and second temperature dependent current generators generating first and second temperature dependent currents, the first temperature dependent current generator having a positive temperature coefficient and the second temperature dependent current generator having a negative temperature coefficient. An input circuit includes first and second transistors connected such that when the emitter of the first transistor receives a voltage greater than a high threshold, the second transistor turns off and such that when the emitter of the first transistor receives a voltage less than a low threshold, the second transistor turns on. A threshold circuit selectively channels portions of the first and second temperature dependent currents through a resistor in response to the state of the second transistor, the high and low thresholds being dependent upon the amount of current through the resistor. An output circuit switches between first and second output signal levels. The output circuit switching to the first output signal level when voltage below the low threshold is applied to the emitter of the input transistor and switching to the second output signal level when voltage above the high threshold is applied to the emitter of the input transistor. This embodiment has hysteresis, can maintain substantially constant high and low thresholds independent of temperature and without requiring a temperature stable voltage supply, and can have protection against negative input voltages. An embodiment of the present invention is described below, by way of illustration only, with reference to the accompanying drawings, in which: Figure 1 is a circuit diagram of an embodiment of this invention; Figure 2 is a diagram of a circuit for generating first and second reference currents for use with the circuit of Figure 1; and Figure 3 is a timing diagram showing an input signal in relation to high and low thresholds, and an output signal. Referring to Figure 1, the circuit shown within box 12 is preferably an integrated circuit and has a voltage supply line 14 receiving power through external resistor 10 from voltage supply +V, such as a vehicle battery. Typically, the voltage supply line 14 is attached to a voltage clamp of a type easily implemented by those skilled in the art. The circuit is an input buffer which receives an input signal on line 56 from a serial data line and supplies an output on line 62 in response to the state of the input signal. For the circuit to be temperature stable, two current sources are provided. The first current source provides on line 34 a first temperature dependent current I ref with a positive temperature coefficient while the second current source provides on line 32 a second temperature dependent current I ref2 with a negative temperature coefficient. A more detailed description of two examples of current sources is set forth below with reference to Figure 2, along with a description of the calibration of the current sources so that the input thresholds of the circuit are temperature independent. With resistor 92 equal in impedance to resistor 16 and the emitter area of transistor 90 equal to the emitter area of transistor 24, which has its base connected to transistor 90 through line 85, reference current I ref is mirrored through transistor 24. With the four collectors of transistor 24 being equal, each collector receives one quarter of the current I ref , through transistor 24. Likewise, with resistor 20 having an impedance equal to that of resistor 18, and transistor 30 having an emitter area equal to that of transistor 28, reference current I ref2 is mirrored through transistor 28. With the four collectors of transistor 28 being substantially equal, each collector receives one quarter of the current I ref2 through transistor 28. In operation, the circuit of Figure 1 receives input signals on line 56 to the input circuit formed from transistors 52 and 54. High and low level input threshold voltages are determined by the sum of the voltage across resistor 66 and the base to emitter voltages (V be ) of transistors 52, 54 and 50. Hysteresis is achieved by switching the amount of current forced through resistor 66, and therefore the voltage across resistor 66. When the input on line 56 is high (higher than the high threshold voltage, V th ), transistor 52 is conducting current, switching transistor 54 off, which allows transistor 50 to be biased on by the current coming through line 40 from one of the four collectors of transistor 28. Transistors 50 and 48 form the threshold circuit. When transistor 50 is conducting, transistor 48 is held off. With transistor 48 held off, the current from one of the four collectors of transistor 24, through line 38 combines with the current from one of the four collectors of transistor 28, at line 44, and flows through the emitter of transistor 58. Transistors 58 and 60 form the output circuit. The current flowing through transistor 58 flows through resistor 68, increasing the V be of output transistor 60, turning on transistor 60 and providing a first state output signal on line 62. When the input on line 56 is in a low state (lower than the low threshold voltage, V tl ), the voltage at the base of transistor 54 is low enough that transistor 54 turns on. When transistor 54 is on, it pulls all of the current from line 40 away from the base of transistor 50, shutting off transistor 50. When transistor 50 is off, transistor 48 is forced into a conductive saturated state by the current supplied by three of the four collectors of transistor 24 connected to line 36 and the current from one of the four collectors of transistor 28 connected to line 42. When transistor 48 is saturated, transistor 58 is switched off, in turn switching off output transistor 60 and providing a second state output signal on line 62. In the event the input line 56 is left open, resistor 64 biases transistor 54 conductive, holding the output on line 62 in the second state. Figure 3 shows an example input signal 120. When the output signal 126 (corresponding to the signal on line 62) is in the second state, and the input signal is below V th , or open, the output signal 126 remains in the second state. When the input signal 120 reaches the high threshold, V th , that is at time t₁ (line 122), the output signal 126 switches to the first state. The output signal 126 remains in the first state until the input signal 120 falls below the low threshold, V tl , that is at time t₂ (line 124), or line 56 becomes open, at which point the output signal 126 on line 62 reverts back to the second state. The NP base-emitter junction of transistor 52 serves to protect the circuit against negative input voltages. This protection against negative input voltages prevents adverse effects to the circuit as long as the voltage across the base and emitter of transistor 52 is not greater than the breakdown voltage of that junction. Hysteresis in the input circuit is achieved by toggling the current through resistor 66 as transistor 48 switches on and off. When transistor 48 is off, resistor 66 receives three quarters of the current I ref and one quarter of the current I ref2 , and sets the low threshold, V tl . When transistor 48 is on, resistor 66 receives more current, that is all of the current I ref and half of the current I ref2 , and sets the high threshold, V th . While the base drive current of transistor 50 is also a component of the current through resistor 66 when the input on line 56 is at a high level, most of the current is diverted by transistor 54 at the point where switching occurs and therefore is a negligible factor in determining the actual switching voltage. In this state, the low threshold V tl is set equal to: V tl = V R66 + V be50 - V be54 + V be52 , where V be50 is the V be voltage of transistor 50, V be54 is the V be voltage of transistor 54, V be52 is the V be voltage of transistor 52, and where V R66 is the voltage across resistor 66, equal to: V R66 = R₆₆(0.75I ref + 0.25I ref2 ), where R₆₆ is the resistance of resistor 66. The V be 's of transistors 52, 54 and 50 depend upon the transistor collector currents, the temperature, the transistor size, and the silicon processing. The transistor size and silicon processing are known from the fabrication of the integrated circuit. The temperature dependence can be easily determined by one skilled in the art from simple experimentation. The collector currents are all known: the collector current of transistor 52 is the input current; the collector current of transistor 54 is 0.25I ref2 ; and the collector current of transistor 50 is 0.75I ref + 0.25I ref2 . Since all of these parameters are known, the V be 's of transistors 52, 54 and 50 are also known. When the input is at a low level, the circuitry has toggled to the high level threshold, V th , state. In this state, with transistor 50 off and transistor 48 in a state of saturation, the current through resistor 66 is the sum of all of the collector current of transistor 24, via line 36 through the base of transistor 48 and via line 38, and half of the collector current of transistor 28, via line 42, through the base of transistor 48 and via line 44. At the switching point, transistor 54 is drawing most of the collector current of transistor 28 in line 40, therefore this current does not contribute to the threshold voltage calculation, except in inverse proportion to the beta of transistor 50, which is so large that this portion of the current is negligible. The high level threshold, V th , is defined by: V th = V R66 + V be50 - V be54 + V be52 , where V R66 = R₆₆(I ref + 0.5I ref2 ). The hysteresis shift is determined by the value of resistor 66 multiplied by the difference in current through resistor 66 in each of the two states. This determined hysteresis shift, V hys , is defined by: V hys = 0.25R₆₆(I ref + I ref2 ). Referring now to Figure 2, the preferred current generators for generating current I ref having a positive temperature coefficient and current I ref2 having a negative temperature coefficient are shown. The portion of the circuit shown in box 81 is a standard "delta V be " current generator. The current generated is controlled by transistors 100, 102, 104 and 106 and resistor 108. In the implementation shown, transistors 100 and 106 each have three times the emitter area of transistors 102 and 104, which are identical. Because of the larger emitter areas of transistors 100 and 106, the V be voltage drop of those transistors is smaller than the V be voltage drop of transistors 102 and 104. Using node 101 as a reference, the sum of the V be voltage of transistor 100 with the V be voltage of transistor 106 and the voltage drop across resistor 108 is equal to the sum of the V be voltage drop of transistor 102 and the V be voltage drop of transistor 104. From the above, it can be shown that the positive coefficient temperature dependent current I ref through resistor 108 can be defined as: I ref = (V t ln(9))/R₁₀₈, where V t is the thermal voltage defined by kT/q, where k is the Boltzman's constant, T is the temperature in degrees Kelvin, q is the electronic charge, and R₁₀₈ is the resistance of resistor 108. Since the circuitry is implemented in a manner in which V t increases with temperature more rapidly than the value of resistor 108, I ref has a positive temperature coefficient. With resistors 16, 82, and 92 having substantially equal values and transistors 24, 86 and 90 having substantially equal emitter areas, the circuitry shown mirrors current I ref through transistor 24, to the four quarter collectors of transistor 24. With resistor 92 also being equal to resistor 80 and transistor 90 being equivalent to transistor 84, the current I ref is also mirrored through transistor 84 to the circuit that generates current I ref2 , the temperature dependent current having a negative coefficient. Transistor 88 is a PNP substrate transistor. To generate the negative coefficient temperature dependent current, I ref2 , I ref forward biases transistor 110, which in turn forward biases transistor 112. Resistor 114, connected between the base and emitter of transistor 112, has a current proportional to the V be of transistor 112 and inversely proportional to the value of resistor 114. Since the V be of transistor 112 has a negative temperature coefficient and the value of resistor 114 has a positive temperature coefficient, the current through resistor 114, I ref2 , has a negative temperature coefficient. With resistors 20 and 18 having substantially equal resistances, transistors 30 and 28, also substantially identical to one another, are set up so that current I ref2 is mirrored through transistor 28, with one quarter of I ref2 flowing through each of the four collectors of transistor 28. Transistor 98 is a PNP substrate transistor. To achieve an input buffer that is substantially independent of temperature, the temperature coefficients of I ref and I ref2 must be set up so that they offset other temperature coefficients in the circuit. The transistor V be voltages decrease with increasing temperature, showing a negative temperature coefficient. The resistance of resistor 66 increases with temperature, showing a positive temperature coefficient. When balancing the temperature coefficients, the temperature coefficient of V be of transistor 52 can be assumed to be the same as the temperature coefficient of V be of transistor 54. These temperature coefficients then offset each other resulting in no net change in the thresholds, V tl and V th . This simplification allows the temperature shift calculations to include only the V be of transistor 50, the resistance of resistor 66 and the reference currents I ref and I ref2 . At the high level threshold, assuming V be52 equals V be54 : V th = R₆₆(I ref + 0.5I ref2 ) + V be50 , where I ref is as defined above in equation (6) and where: I ref2 = V be112 /R₁₁₄, where V be112 is the V be of transistor 112 and R₁₁₄ is the resistance of resistor 114. At the low level threshold: V tl = R₆₆(0.75I ref + 0.25I ref2 ) + V be50 . From equations (6), (7), (8), and (9): V th = R₆₆V t ln(9)/R₁₀₈ + R₆₆V be112 /(2R₁₁₄) + V be50 , V tl = 3R₆₆V t ln(9)/(4R₁₀₈) + R₆₆V be112 /(4R₁₁₄) + V be50 , Since transistor 112 and transistor 50 both have the same emitter areas, they have very similar V be temperature coefficients. Thus equations (10) and (11) can be further simplified: V th = R₆₆V t ln(9)/R₁₀₈ + V be (1 + R₆₆/(2R₁₁₄)), where V be = V be112 = V be50 , and V tl = 3R₆₆V t ln(9)/(4R₁₀₈) + V be (1 + R₆₆/(4R₁₁₄)). For V th and V tl to have no variation with temperature, the variations with temperature of the two terms above must be equal and of opposite sign. Since the resistor terms all appear as ratios, their temperature coefficients cancel and are not temperature dependent factors. The resistor ratios are multiplying factors for the temperature coefficients of the other factors. It is known that the thermal voltage V t varies by approximately 87 µV per degree C and the temperature coefficient of V be is approximately -1.8 mV per degree C (note: the temperature coefficient of V be varies with collector current, process parameters and transistor size). To achieve a substantially zero temperature coefficient for V th and Vtl, the following expressions must be solved: 0.86µVR₆₆ln(9)/R₁₀₈ = 1.8mV(1 + R₆₆/(2R₁₁₄)), and 0.86µV3R₆₆ln(9)/(4R₁₀₈) = 1.8mV(1 + R₆₆/(4R₁₁₄)). Equations (14) and (15) must be solved simultaneously and the solution process may be iterative in nature. This solution process can be easily accomplished by one skilled in the art. Although the above solution may be preferred by some due to its simplicity, a more precise solution for the values of resistors 66, 108 and 114 can be found by including the temperature variation of the reference currents in each of the transistor collectors. Transistor beta terms and other second and third order effects known to those skilled in the art may also be included. A solution using all of these factors may be easily accomplished by one skilled in the art through use of a computer simulation program in which all of the above factors are taken into consideration. Since the hysteresis is a result of equal changes in the I ref and the I ref2 components of the threshold equations, the relative ratio of current through R₆₆ between high and low threshold settings does not change. Therefore the relation between V tl and V th does not change with temperature. This provides the substantially temperature insensitive threshold and hysteresis features possible with the invention. A successful implementation of this circuit was achieved using the following component values: resistor 16 = resistor 80 = resistor 82 = resistor 92 = 500 Ω; resistor 20 = resistor 18 = 1.25 kΩ; resistor 108 = 340 Ω; resistor 114 = 3800 Ω; resistor 64 = 10 kΩ; resistor 66 = 5500 Ω; and resistor 68 = 20 kΩ. With the above values, V th equal to 2.00 volts and V tl equal to 1.60 volts were achieved. Over a tested temperature range of -40 degrees C to 165 degrees C, the statistical mean for V th of the above circuit shifted by only 41 mV. Those skilled in the art will easily be able to alter the above component values to achieve the desired input buffer characteristics for a specific design implementation.

Claims: An input buffer circuit for receiving data from a single ended transmission line (56) comprising a plurality of temperature dependent components; a first temperature dependent current generator (81) for generating a first temperature dependent current (I ref ) having a positive temperature coefficient; a second temperature dependent current generator (110,112,114) for generating a second temperature dependent current (I ref2 ) having a negative temperature coefficient, the positive and negative temperature coefficients of the first and second temperature dependent currents (I ref , I ref2 ) being adapted to offset the temperature coefficients of the plurality of temperature dependent components; an input circuit including first and second transistors (52,54) coupled together such that when the emitter of the first transistor (52) is at a voltage greater than a high threshold level (V th ), the second transistor (54) is biased off and when the emitter of the first transistor (52) is at a voltage less than a low threshold level (V tl ), the second transistor (54) is biased on; a threshold circuit (48,50,58) coupled to the input circuit for selectively channelling portions of the first and second temperature dependent currents (I ref , I ref2 ) through a resistor (66) in response to the state of bias of the second transistor (54), the high and low thresholds levels (V th , V tl ) being dependent upon the amount of current flowing through the resistor (66); and an output circuit (60) coupled to the threshold circuit and adapted to switch in response to the threshold circuit to a first output signal level when a voltage above the high threshold level (V th ) is applied to the emitter of the first transistor (52) and to a second output signal level when a voltage below the low threshold level (V tl ) is applied to the emitter of the first transistor (52). An input buffer circuit according to claim 1, wherein the amount of current flowing through the resistor (66) is adapted to be substantially equal to the sum of all of the first temperature dependent current (I ref ) and one half of the second temperature dependent current (I ref2 ) when the second transistor (54) is biased off and to be substantially equal to the sum of three quarters of the first temperature dependent current (I ref ) and one quarter of the second temperature dependent current (I ref2 ) when the second transistor (54) is biased on. The input buffer circuit according to claim 1 or 2, wherein the threshold circuit includes third and fourth transistors (50,58) coupled together and to fifth and sixth transistors (24,28), each of the fifth and sixth transistors comprising four collectors, the fifth transistor (24) being adapted to provide one quarter of the first temperature dependent current (I ref ) in each of its four collectors and the sixth transistor (28) being adapted to provide one quarter of the second temperature dependent current (I ref2 ) in each of its four collectors; the first to sixth transistors being coupled together such that when the second transistor (54) is biased on the fourth transistor (58) transfers to the resistor (66) all of the first temperature dependent current (I ref ) from the fifth transistor (24) and one half of the second temperature dependent current (I ref2 ) from the sixth transistor (28) and when the second transistor (54) is biased off the third transistor (50) transfers to the resistor (66) three quarters of the first temperature dependent current (I ref ) from the fifth transistor (24) and one quarter of the second temperature dependent current (I ref2 ) from the sixth transistor (28).

Inventors: GOSE MARK WENDELL, KESLER SCOTT BIRK, GOSE, MARK WENDELL, KESLER, SCOTT BIRK
Applicants: DELCO ELECTRONICS CORP, DELCO ELECTRONICS CORPORATION
Application year: 1992
Main classification: H03K19
IPC codes: G05F3, H03K3, H03K5