Low-loss power feeding circuit for telephone apparatus

Abstract: A circuit is described which comprises an operational amplifier (A), two resistors (R1 and R2) connected between the telephone line (L) and the inputs of the amplifier, a capacitor (C) which is charged via a first bipolar transistor (P1) controlled by the amplifier via a first FET transistor (M1), a second bipolar transistor (P2) in parallel to the connection of the first transistor (P1) and the capacitor (C), a second FET transistor (M2), identical to the first and having its source and gate terminals connected to the corresponding terminals of the first, and two current generators (CC1, CC2) connected to the drain terminals respectively of the first and the second FET transistor and to the bases, respectively, of the first and second bipolar transistor (P1, P2). The currents (I1, I2) of the two generators and the other parameters of the circuit are such as to hold the first and second bipolar transistors in a conductive and a switched off state respectively, except when the line voltage falls below a minimum predetermined value; in which case the first and second transistors commute to the switched off and conductive states respectively. The circuit has a lower "voltage loss" than known circuits.

Description: The present invention relates to the electrical supply of user's telephone circuits and, more particularly, to a circuit device for deriving a supply voltage from the user's line. As is known, the speech circuit of an electronic telephone apparatus is supplied with electrical energy provided on the user's line from the so-called central battery. A suitable circuit is arranged to extract the necessary electrical energy from the line, to provide it at a stabilised voltage to the speech circuit to be supplied. A known circuit of this type, which is shown in the block diagram of Figure 1 of the drawing accompanying the present specification, comprises a capacitor C which is connected on one side to one wire of the line loop, indicated with the earth symbol, and, on the other, to the other wire L of line loop, via the series connection of a resistor R1, the collector-emitter path of a transistor T and a diode D connected in a forward biased sense. In reality, as is known, both the earth terminal and the wire L are connected to the wires of the line loop by other components, not shown in order not to excessively complicate the drawing. The transistor T is held in conduction in the saturation region by the output of an operational amplifier A the inverting input terminal of which is connected to the connection node between the resistor R1 and the emitter of the transistor T, and the non-inverting input of which is also connected to the line L via a second resistor R2. The connection between the emitter of transistor T and the inverting input of the operational amplifier A constitutes a negative feedback loop which tends to maintain the voltage drops on the resistors R1 and R2 and therefore the voltages on the input terminals of the amplifier equal to one another. Between the non-inverting input of the amplifier and earth there is shown a current generator G to indicate that a control current Ic, proportional to the current flowing in the line and derived from known means, not shown, is applied to the inverting input of the amplifier A. A regulation circuit SR, connecting between the collector of the transistor T and earth, acts to stabilise the voltage VS across the capacitor C. The voltage Vs is applied to the speech circuit, not shown, in order to constitute its supply. A circuit of this kind is known from FR-A-2 549 667. The maximum obtainable value for the stabilised voltage obviously depends primarily on the value of the voltage on the line at the connection point with the user's apparatus, which is given by the voltage of the central battery reduced by the voltage drop on the line due to the resistance of the line itself and by the so-called "voltage loss" that is to say the voltage drop along the path between this connection point and the effective stabilised voltage take-off point. In the design of telephone networks it is necessary to arrange that the user's line does not reach a length such that the voltage at the connection points to the user's telephone apparatus is less than a minimum predetermined value which still allows the electrical energy to be taken from the line at a sufficiently high voltage to supply the speech circuit. The stabilised supply voltage VS is given by the DC voltage VL of the line at the connection point of the user's apparatus reduced by the "voltage loss". For the above described known circuit the "voltage loss" is equal to the sum of the voltage drop VR1 on the resistor R1, the collector-emitter voltage V CEsat of the transistor T in saturation and the voltage VD of the forward biased diode D. The stabilised voltage is, therefore: VS = VL - (VR1 + V CEsat + VD) Since, typically, V CEsat and VD are both about 0.3 V and, at the usually operating currents, VR1 for a resistor of 10 ohms, is about 0.1 V the overall voltage drop is about 0.7V. Now, the stabilised voltage necessary for supplying a normal speech circuit is about 3V, and therefore the voltage at the connection point of the resistors R1 and R2 to the line cannot be less than 3.7V. It is obvious that this puts a limit on the maximum length of the user's line. The general object of the present invention is to move this limit in such a way as to allow the use of longer user lines. More particularly, the object of the present invention is to provide a circuit arrangement for supplying a speech circuit of a user's telephone apparatus which has an extremely low voltage loss. This object is achieved by the circuit arrangement defined and characterised in the claims which conclude the present description. The invention will be better understood from the following detailed description of a simplified embodiment which is therefore in no way limitative, given in relation to the drawing, in which: Figure 1 represents a known circuit described above, and Figure 2 represents a circuit arrangement according to the invention. In Figure 2, where the same symbols as those used in Figure 1 refer to equivalent components or quantities, the wires of the line loop are connected, in this case too, by means of the usual coupling devices, one to the point indicated L and the other to the common terminal represented by the earth symbol. Two resistors R1 and R2 are connected each by one terminal to the point L and by the other to the inverting and non-inverting terminals respectively of an operational amplifier indicated A. The resistor R1 is also connected to a generator G which provides a control current Ic as for the known circuit of Figure 1. The output of the operational amplifier A is connected to the gate terminals of two identical FET transistors, that is to say field-effect transistors, M1 and M2. These have their source terminals connected to earth and their drain terminals indicated D1 and D2 respectively, connected each to a current generator circuit arrangement CC1 and CC2 respectively, and to the base of a bipolar transistor, respectively P1 and P2. The two transistors P1 and P2 have their emitter terminals connected together to the circuit node between the resistor R2 and the non-inverting input of the amplifier A and their collector terminals connected, respectively, to one terminal of a capacitor C and to earth. The other terminal of the capacitor is also connected to earth. It is noted that, advantageously, each of the transistors P1 and P2 can be replaced by a pair of transistors connected in a Darlington configuration and each of the transistors M1 and M2 can be replaced by two transistors connected together in cascode, without changing the circuit or its principle of operation. Across the terminals of the capacitor C, which constitute the output terminals of the circuit arrangement, from which a stabilised voltage VS is taken, is connected a branch voltage stabiliser SR. The circuit arrangements CC1 and CC2 are constituted by two pairs of bipolar transistors connected in a current mirror configuration and having one branch connected to a current generator, respectively G1 and G2, and the other branch to the drain terminal D1, D2 of the respective transistor M1, M2. The operation of the circuit device of Figure 2 is now considered. The transistors M1 and M2, being equal and having their source and gate terminals in common, are always traversed by the same currents. The two current mirrors CC1 and CC2 have a current gain equal to one, that is to say they produce an output current I1 and I2 equal to the reference (G1 and G2 respectively), whilst the respective output transistors are in their linear region that is to say if the voltage at the node D1 and D2 is at least V CEsat lower than the voltage of the emitters of P1 and P2. The current G2 is chosen to be greater than the sum of G1 plus the maximum base current of P1. Since M1 and M2 must carry the same current the node D2 must carry a voltage sufficiently high with respect to earth to bring the output transistor of the mirror CC2 into saturation. In these conditions the transistor P2 is switched off. At the same time the node D1 must carry a sufficiently low voltage to bring P2 into conduction. In particular, the circuit parameters are chosen in such a way that, when the line voltage in the absence of a signal is high, that is to say when the user's line is relatively short, P1 is in a linear zone and, when the line voltage in the absence of a signal is the minimum allowed, that is to say when the line is very long, P1 is polarised in the saturation region. Clearly, in each case, the capacitor C can be charged through the transistor P1 with a current gIc where g indicates the ratio between R1 and R2, typically lying between 60 and 200. While the line voltage or, better, the voltage between the point L and earth, is greater than or equal to the sum of the stabilised voltage VS, the voltage V CEsat of P1 and the drop on R2, VR2, P1 remains in conduction and P2 remains switched off. During a negative half-wave of an alternating current signal the emitter-collector voltage of P1 falls. If the negative half wave is sufficiently great this voltage can fall to zero and then become negative. The reduction in the emitter-collector voltage produces a reduction in the collector current of P1. Consequently, the drop VR2 on the resistor R2 falls, causing a corresponding increase in the output voltage of the operational amplifier A and an increase in the equal drain currents I D of M1 and M2. When the drain current I D of M2 is equal to I2, which is greater than I1, the transistor begins to conduct because the voltage on drain D2 of M2 falls to cause forward conduction of its base-emitter junction, whilst the transistor P1 remains turned off. This situation is maintained for the whole of the time in which the negative half-wave maintains the voltage VL lower than the above mentioned sum. As soon as the voltage VL rises above this value the voltage drop VR2 reduces, P1 commences to conduct, causing an increase in the voltage drop across R2. The greater drop on VR2 also causes a reduction in the output voltage of the operational amplifier A and therefore a reduction in the drain currents I D of M1 and M2. As soon as the current I D becomes less than the current I2 the voltage on D2 returns to be very close to the voltage of the emitter of P2 so that this latter transistor ceases to conduct. The initial conditions are thus resumed. The voltage across the terminals of capacitor C stabilised by the regulator SR is applied to the speech circuit. It is clear how the circuit arrangement described above makes it possible to achieve the object of the invention. In fact, the "voltage loss" is limited to the sum of the voltage drop on the resistor R2 and the voltage V CEsat of the transistor P1, that is to say the "voltage loss" is reduced by a voltage drop on a forward biased diode. With a suitable design of the generators CC1 and CC2, that is to say by causing that the current I2 is very much greater than the current I1, it is possible to set a heavy saturation of P1 and therefore a V CEsat even smaller. In summary, then, in equal conditions there is obtained a lower "voltage loss" with respect to the known art of 300-500mV, which makes it possible to utilise considerably longer user lines. From the single embodiment of the invention which has been illustrated and described it is clear that many variations and modifications are possible within the ambit of the same inventive concept. For example, rather than utilising different transistors M1 and M2 and currents I1 and I2 it would be possible to utilise structurally different transistors M1 and M2 and identical currents I1 and I2 as long as the operating characteristics of the two transistors are such as to control the transistors P1 and P2 in the same way as described above; moreover, in place of the field-effect transistors M1 and M2 it would be possible to utilise transistor devices or equivalent circuit structures formed by bipolar transistors and, similarly, in place of the transistors, or Darlington pairs P1 and P2 it would be possible to utilise transistor arrangements or equivalent circuit structures formed by field-effect transistors.

Claims: A circuit arrangement for drawing a supply voltage from a user's telephone line, particularly for supplying a speech circuit, comprising: an operational amplifier (A) having an output, an inverting input and a non-inverting input, resistive means (R1, R2) between a wire (L) of the telephone line and the inputs of the operational amplifier (A), negative feedback means (P1, M1, P2, M2) between the output of the operational amplifier (A) and a circuit node connected to one of the inputs of the operational amplifier (A) coupling means (G) adapted to apply to the other of the inputs of the operational amplifier (A) a current (Ic) proportional to the line current, a capacitor (C) connected on one side to a common terminal of the circuit arrangement which is connected to the other wire of the telephone line and, on the other side, to an output terminal (VS) of the circuit arrangement, which is connected to the said circuit node by means of first circuit means (P1) controlled by the operational amplifier (A), characterised in that said first circuit means (P1) include a first transistor device (P1) having a conduction path connected in series with the capacitor (C) and a control terminal, and in that it further comprises: a second transistor device (P2) having a respective conduction path connected in parallel to the series connection of the first transistor device (P1) with the capacitor (C), and a respective control terminal, and third and fourth transistor devices (M1, M2) each having a conduction path connected, on one side to the common terminal and, on the other side to the circuit node via first (CC1) and second (CC2) current generators (CC1, CC2) respectively, and a control terminal, the control terminals of the third and fourth transistor devices being connected together to the output of the operational amplifier (A); the node between the third transistor device (M1) and the respective first current generator (CC1) being connected to the control terminal of the first transistor device (P1) and the node between the fourth transistor device (M2) and the respective second current generator (CC2) being connected to the control terminal of the second transistor device (P2), and the circuit parameters being chosen in such a way that the first (P1) and the second (P2) transistor device are, respectively, in a conduction state and a switched-off state except when the line voltage falls below a minimum predetermined value, in which case the first transistor device (P1) is switched off and the second transistor device (P2) is conductive. A circuit device according to Claim 1, characterised in that the first and second transistor devices (P1 and P2) are each constituted by a pair of bipolar transistors in a Darlington configuration. A circuit device according to Claim 1 or Claim 2, characterised in that the third and fourth transistor devices (M1 and M2) are each constituted by a field-effect transistor. A circuit device according to Claim 3, characterised by the fact that the two field-effect transistors (M1, M2) are identical and by the fact that the first current generator (CC1) generates a current (I1) less than the current (I2) of the second current generator (CC2). A circuit arrangement according to any preceding claim, characterised by the fact that the first and second current generators (CC1, CC2) each comprise a pair of bipolar transistors connected in current mirror configuration and a respective current generator (G1, G2).

Inventors: CASTELLO RINALDO, TOMASINI LUCIANO, CASTELLO, RINALDO, TOMASINI, LUCIANO
Applicants: ST MICROELECTRONICS SRL, STMICROELECTRONICS S.R.L.
Application year: 1992
Main classification: H04M19
IPC codes: H04M19, H04M1