Avalanche photodiode

Abstract: An avalanche photodiode includes a multiplication layer and a photoabsorption layer, and the multiplication layer is formed of a semiconductor superlattice structure composed of a number of well layers each of which is formed of a short period superlattice of at least two kinds of semiconductors and which can be equivalently regarded to be a mixed crystal of the at least two kinds of semiconductors. In the short period superlattice, the mini-bands are formed within the superlattice well layers having its effective forbidden band width, which is larger than the forbidden band width in a bulk condition of a semiconductor layer constituting a well in the short period superlattice. Thus, the dark current due to the inter-band tunnel transition within the same well layer is decreased. Therefore, a low noise characteristics and a low noise and high response speed characteristics obtained by a high ionization rate ration can be simultaneously realized.

Description: The present invention relates to semiconductor avalanche photodiodes. Low noise, low dark current, and high speed response are desirable characteristics of photodiodes, and to realize a high-speed, large-capacity optical transmission system, semiconductor photosensors having such characteristics are indispensable. Research has been conducted into increasing the response speed and sensitivity of an InP/InGaAs avalanche photodiode which can be used in a low loss wavelength region of 1.3µm to 1,6µm of a silica optical fiber. In this photodiode, a gain bandwidth product of 75GHz has been realized by decreasing a receiving aperture diameter so as to reduce the capacitance, by optimizing the layer thickness for reducing the carrier transit time, and by introducing an intermediate layer at a heterojunction interface for controlling a carrier trap. In this photodiode, however, since the ionization rate ratio α/β (where a is an electron ionization rate and β is a hole ionization rate) is as small as 2 or less, the excess noise factor "x" can become as large as 0.7 (because, the smaller the ionization rate ratio is, the larger the excess noise factor is). Therefore, there has been a limit in realizing low noise and high sensitivity. This also applies in the case where the avalanche multiplication layer is formed of other bulk III-V group compound semiconductor. Therefore, for realizing low noise and high gain bandwidth product (high speed response), it is necessary to increase the ionization rate ratio α/β artificially. F. Capasso et al have proposed, in Appl. Phys. Lett., Vol. 40(1), pp 38-40, 1982, a structure in which the ionization rate ratio α/β is artificially increased by utilizing a conduction bank energy discontinuity amount ΔEc in the superlattice for impact ionization of electrons. It was actually confirmed that the ionization rate ratio α/β was increased in GaAs/GaAlAs superlattice structure. α/β was increased to 8 at maximum in the superlattice, in comparison to 2 at maximum in bulk GaAs). In addition, Kagawa et al reported, in Appl. Phys. Lett., Vol. 55(10), pp 993-995, 1989, that a similar structure has been formed in an InGaAs/InAlAs superlattice having a light receiving sensitivity in a band of the wavelength 1.3µm to 1.6µm, which is used in a long distance light communication, and an increase of the ionization rate ratio was similarly confirmed. α/β was increased to 10 at maximum in the superlattice, in comparison to 2 at maximum in bulk InGaAS). More specifically, in the Kagawa et al structure, the avalanche multiplication layer is formed of an alternating repetition of n - -In 0.52 Al 0.48 As barrier layers, and n - In 0.53 Ga 0.47 As well layers, which form a superlattice avalanche multiplication layer. A conduction band energy discontinuity amount ΔEc is 0.5eV which is larger than a valence band energy discontinuity amount ΔEv of 0.2eV. Therefore, when the carriers enter in the well, the energy acquired due to the band discontinuity is larger in the electron than in the hole, so that the electron easily reaches an ionization threshold energy. Thus, the electron ionization rate is increased, and the ionization rate ratio α/β is correspondingly increased. However, a tunnel dark current occurring in the well layers (n - In 0.53 Ga 0.47 As well layer) having a short valence band width within the superlattice avalanche multiplication layer, extremely increases to a micro-ampere order, in a practical use region in which the multiplication factor is a few times or more. The present invention relates more specifically to an avalanche photodiode including a photoabsorption layer and a multiplication layer, the multiplication layer comprising a stack of alternating barrier layers and well layers. Such a photodiode is known from patent document EP-A-0,452,927. That document describes a multilayer region which is formed between pairs of the well and barrier layers in the multiplication layer to provide an effect of a graded region so as to avoid carriers from being trapped in the well layers. The avalanche photodiode of the present invention is characterised in that: each well layer is formed by a respective short period superlattice structure comprising a stack of alternating first sub-layers of a first kind of semiconductor and second sub-layers of a second kind of semiconductor together functioning as a mixed crystal of the first and second kinds of semiconductor, each first sub-layer constituting a barrier sub-layer in the respective superlattice structure, and each second sub-layer constituting a well sub-layer in the respective superlattice structure. The present invention enables an avalanche photodiode to be constructed having a receiving sensitivity in a 1.3µm-1.6µm wavelength band and a high ionization rate ratio α/β and also having not only low noise and high speed response characteristics but also a low dark current. Preferred features of the invention are set out in the dependent claims. A specific embodiment of the invention will now be described with reference to the accompanying drawings, in which:- Figure 1 is a diagrammatic sectional view of an embodiment of the avalanche photodiode in accordance with the present invention; Figure 2 is an energy band diagram of the superlattice multiplication layer in the avalanche photodiode shown in Figure 1; and Figure 3 is an energy band diagram of the superlattice multiplication layer in the conventional avalanche photodiode. Referring to Figure 1, the avalanche photodiode includes an n + semiconductor substrate 11, on which an n-type buffer layer 12 and n - superlattice avalanche multiplication layer 13 are formed in the named order. The n - superlattice avalanche multiplication layer 13 is composed of a plurality of semiconductor barrier layers 14, a first kind of semiconductor layers 15 each constituting part of a well layer in the superlattice structure, and a second kind of semiconductor layers 16 each constituting part of a well layer in the superlattice structure. These layers 14, 15 and 16 are stacked in such a manner that a unitary superlattice structure is composed of a few semiconductor layers 15 of the first kind and a few semiconductor layers 16 of the second kind alternately stacked one on another, and a plurality of unitary superlattice structures and the semiconductor barrier layers 14 are alternately stacked one on another. On the n - superlattice avalanche multiplication layer 13, there are formed a p-type wide gap electric field drop layer 17, a p - photoabsorption layer 18, and a p + cap layer 19 in the named order. In addition, an n-side electrode 110 is formed on a rear surface of the substrate 11, and a p-side electrodes 111 are formed on the cap layer 19. An insulating, protection layer 112 is formed to cover a top surface and a side surface of the multilayer stacked structure, and an upper surface of the substrate 11. In Figure 2, the same elements as those shown in Figure 1 are given the same reference numerals. In addition, reference numeral 24 designates a mini-band or sub-band of electrons, and reference numeral 25 designates a mini-band or sub-band of holes. Reference numeral 26 indicates an effective forbidden band width of the well layer, and reference numeral 27 shows a forbidden band width in a bulk condition of the second kind of semiconductor layer 16. Referring to Figure 3, there is shown an energy band diagram when the avalanche multiplication layer is based on the Kagawa et al structure as mentioned hereinbefore. In Figure 3, reference numeral 31 designates an n - In 0.52 Al 0.48 As barrier layer, and reference numeral 32 designates an n - In 0.53 Ga 0.47 As well layer. Alternate repetition of the layers 31 and 32 form a superlattice avalanche multiplication layer. In addition, reference numerals 33 and 34 designate a conduction band energy discontinuity amount ΔEc and a valence band energy discontinuity amount ΔEv, respectively. Furthermore, reference numerals 35 and 36 show electrons and holes, respectively. Reference numeral 37 indicates an inter-band tunnel transition within the same well. In this structure, the conduction band energy discontinuity amount ΔEc is 0.5eV which is larger than the valence band energy discontinuity amount ΔEv of 0.2eV. Therefore, when the carriers enter in the well 32, the energy acquired due to the band discontinuity is larger in the electron 35 than in the hole 36, so that the electron easily reaches an ionization threshold energy. However, the forbidden band width of the well layer in the In 0.52 Al 0.48 As/In 0.53 Ga 0.47 As superlattice multiplication layer is as small as 0.75eV, and therefore, the tunnel dark current caused by the inter-band tunnel transition 37 within the same well extremely increases to a microampere order or more, in a practical use region in which the multiplication factor is a few times or more, namely, an electric field is 350 to 400kV/cm. On the other hand, in the superlattice structure shown in Figure 2, the superlattice well layer is formed of a layer that can be equivalently regarded as being a mixed crystal of the two or more kinds of semiconductors because of a short period superlattice structure of the two or more kinds of semiconductors, and therefore, the mini-bands 24 and 25 are formed by the short period structure. As a result, the effective forbidden band width 26 is larger than the forbidden band width 27 in a bulk condition of the second kind of semiconductor 23 constituting the well layer. In this structure, therefore, the tunnel dark current caused by the inter-band tunnel transition within the well layer can be exponentially decreased with enlargement of the forbidden band width. Therefore, if the decrease amount of the conduction band energy discontinuity amount ΔEc caused due to the mini-band is made not greater than 0.2eV, since the energy value of the electrons acquired at a heterojunction interface (conduction band energy discontinuity amount ΔEc) is not remarkably decreased, deterioration of the ionization rate ratio α/β and the noise factor is not so remarkable. Because of the above mentioned function and effect, the structure of the present invention can realize an avalanche photodiode which suppresses generation of the tunnel dark current within the well layer without decreasing or losing the low noise and high speed response characteristics obtained by improvement of the ionization rate ratio α/β. Preferably, long periods L 1 and L 2 of the superlattice structure are not less than 5nm. The long period L 1 corresponds to the thickness of the barrier layer 14 and the long period L 2 corresponds to the thickness of the well layer (short period superlattice composed of first and second kinds of semiconductor). The thickness L 1 of the barrier layer 14 of not less than 5nm is very effective in ensuring that the barrier layer tunneling of electrons does not remarkably appear. The thickness L 2 of the well layer of not less than 5nm is also very effective in ensuring that the energy shift amount (an increase amount) of quantum level is not greater than 0.leV. Furthermore, as regards short periods L 3 and L 4 of the well layer, the short period L 3 corresponding to the thickness of the barrier layer 15 is preferably not greater than 2nm, in order to ensure a condition in which the holes in the well layer can remarkably tunnel-transit through the short period barriers 15. However, there is not any specific limitation concerning the short period L 4 corresponding to the thickness of the short period well layer 16, other than the requirement that the short period superlattice layer L 2 can be equivalently regarded as being a mixed crystal of the two or more kinds of semiconductors. Now, a manufactured example of the avalanche photodiode in accordance with the present invention will be described. An avalanche photodiode of InAlAs/(InAlAs) m (InGaAs) n in lattice match with InP was manufactured. First, on an n + InP substrate 11, there were formed, by a metal organic chemical vapor deposition process in the named order, (1) an n-type InP buffer layer 12 having a thickness of 1µm, (2) a superlattice multiplication layer 13 having a thickness of 0.5µm and composed of n - In 0.52 Al 0.48 As barrier layers 14 having a carrier concentration of not greater than 1x10 15 cm -3 and (In 0.52 Al 0.48 As) m /(In 0.53 Ga 0.47 As)n short period superlattice well layers 15, 16 (in the named order), (3) a p + InP electric field drop layer 17 having a carrier concentration of not greater than 1x10 17 cm -3 and having a thickness of 0.2µm, (4) a p - In 0.53 Ga 0.47 As photoabsorption layer 18 having a carrier concentration of not greater than 2x10 15 cm -3 and having a thickness of 1.5µm, and (5) a p + InP cap layer 19 having a carrier concentration of not greater than 5x10 18 cm -3 and having a thickness of 1µm. Each of the short period superlattice well layers 15, 16 was formed in a four-period structure composed of three In 0.52 Al 0.48 As layers 15 having a thickness of 1nm and four In 0.53 Ga 0.47 As layers 16 having a thickness of 2nm which are alternately stacked. The superlattice multiplication layer 13 was formed in a twelve-period structure obtained by alternately stocking thirteen n - In0.52Al 0.48 As barrier layers 14 having a thickness of 15nm and twelve short period superlattice well layers 15, 16 as formed above. Furthermore, the substrate thus deposited was shaped into a mesa form having a diameter of 50µm by use of a conventional photolithography and wet etching process, and then, an insulating protection layer 112 was deposited. In addition, the p-side electrode 111 was formed of AuZn, and the rear surface of the substrate was polished, so that the n-side electrode 110 was formed of AuGe. The embodiment thus formed was compared with a conventional example which was formed similarly to the embodiment, other than the fact that the superlattice well layers were formed of a In 0.53 Ga 0.47 As layer having the same thickness as that of the embodiment. In the conventional example, when it was biased to give the multiplication factor of 10 at the time of an initial input light 1µA (wavelength 1.55µm), the dark current was several tens of microamperes. In the structure of the present invention, however, the dark current was not greater than 0.1µA, and therefore, remarkably small. As regards the multiplication noise characteristics, the excess noise factor was 4 to 4.5dB in both of the embodiment and the conventional example when the incident light had a wavelength of 1.55µm and the multiplication factor was 10. Accordingly, a low noise comparable to the effective ionization rate ratio of 10 at maximum was confirmed. In the conventional example, the noise due to the dark current exceeded the multiplication noise when the multiplication factor was a few times or more. In the structure of the present invention, on the other hand, the noise due to the dark current is negligible in comparison with the multiplication noise. Furthermore, as regards the high frequency characteristics, the maximum band width and the gain bandwidth product were not greater than 9GHz and not greater than 80GHz in both of the embodiment and the conventional example. In the above mentioned embodiment, the superlattice layer has been formed of a combination of n - semiconductors, but can be similarly formed of a combination of p - semiconductors or a combination of high-resistive semiconductors. In addition, the layer thickness of the short period superlattice well layer can be modified dependent upon an electric field applied to the superlattice.

Claims: An avalanche photodiode including a photoabsorption layer (18) and a multiplication layer (13), the multiplication layer comprising a stack of alternating barrier layers (14) and well layers (15,16), characterised in that: each well layer is formed by a respective short period superlattice structure comprising a stack of alternating first sub-layers (15) of a first kind of semiconductor and second sub-layers (16) of a second kind of semiconductor together functioning as a mixed crystal of the first and second kinds of semiconductor, each first sub-layer constituting a barrier sub-layer in the respective superlattice structure, and each second sub-layer constituting a well sub-layer in the respective superlattice structure. A photodiode as claimed in Claim 1, wherein the barrier layers and well layers each have a thickness of not less than 5nm. A photodiode as claimed in Claim 1 or 2, wherein each well sub-layer has a thickness of not greater than 2nm. A photodiode as claimed in any preceding claim, wherein each barrier layer and each barrier sub-layer is formed of In 0.52 Al 0.48 As, and each well sub-layer is formed of In 0.53 Ga 0.47 As. A photodiode as claimed in Claim 4, wherein each barrier layer has a thickness of 15nm, and each well layer comprises three of the barrier sub-layers each having a thickness of 1nm and four of the well sub-layers each having a thickness of 2nm.

Inventors: WATANABE ISAO, WATANABE, ISAO,, WATANABE, ISAO, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1992
Main classification: H01L31
IPC codes: H01L31