Monitoring of color developer housing in a tri-level highlight color imaging apparatus

Abstract: In a single pass, tri-level imaging apparatus (2), machine cycle down is initiated when the color developer housing (58) is functioning improperly. The voltage level (V DAD ) of the color image prior to its development is read using an electrostatic voltmeter (ESV) (ESV₁). The voltage level thereof is also read after development by ESV₂. The difference between these two readings is compared to an arbitrary target value and a machine cycle down is initiated if the difference is greater than the target.

Description: This invention relates generally to highlight color imaging and more particularly to the formation of tri-level highlight color images in a single pass. The invention can be utilized in the art of xerography or in the printing arts. In the practice of conventional xerography, it is the general procedure to form electrostatic latent images on a xerographic surface by first uniformly charging a photoreceptor. The photoreceptor comprises a charge retentive surface. The charge is selectively dissipated in accordance with a pattern of activating radiation corresponding to original images. The selective dissipation of the charge leaves a latent charge pattern on the imaging surface corresponding to the areas not exposed by radiation. This charge pattern is made visible by developing it with toner. The toner is generally a colored powder which adheres to the charge pattern by electrostatic attraction. The developed image is then fixed to the imaging surface or is transferred to a receiving substrate such as plain paper to which it is fixed by suitable fusing techniques. The concept of tri-level, highlight color xerography is described in US-A 4,078,929 issued in the name of Gundlach. The patent to Gundlach teaches the use of tri-level xerography as a means to achieve single-pass highlight color imaging. As disclosed therein the charge pattern is developed with toner particles of first and second colors. The toner particles of one of the colors are positively charged and the toner particles of the other color are negatively charged. In one embodiment, the toner particles are supplied by a developer which comprises a mixture of triboelectrically relatively positive and relatively negative carrier beads. The carrier beads support, respectively, the relatively negative and relatively positive toner particles. Such a developer is generally supplied to the charge pattern by cascading it across the imaging surface supporting the charge pattern. In another embodiment, the toner particles are presented to the charge pattern by a pair of magnetic brushes. Each brush supplies a toner of one color and one charge. In yet another embodiment, the development systems are biased to about the background voltage. Such biasing results in a developed image of improved color sharpness. In highlight color xerography as taught by Gundlach, the xerographic contrast on the charge retentive surface or photoreceptor is divided into three levels, rather than two levels as is the case in conventional xerography. The photoreceptor is charged, typically to -900 volts. It is exposed imagewise, such that one image corresponding to charged image areas (which are subsequently developed by charged-area development, i.e. CAD) stays at the full photoreceptor potential (V cad or V ddp ). V ddp is the voltage on the photoreceptor due to the loss of voltage while the P/R remains charged in the absence of light, otherwise known as dark decay. The other image is exposed to discharge the photoreceptor to its residual potential, i.e. V dad or V c (typically -100 volts) which corresponds to discharged area images that are subsequently developed by discharged-area development (DAD) and the background area is exposed such as to reduce the photoreceptor potential to halfway between the V cad and V dad potentials, (typically -500 volts) and is referred to as V white or V w . The CAD developer is typically biased about 100 volts closer to V cad than V white (about -600 volts), and the DAD developer system is biased about -100 volts closer to V dad than V white (about 400 volts). As will be appreciated, the highlight color need not be a different color but may have other distinguishing characteristics. For, example, one toner may be magnetic and the other nonmagnetic. The present invention provides in a method of creating tri-level images on a charge retentive surface during operation of a tri-level imaging apparatus, including the steps of: moving said charge retentive surface past a plurality of process stations including a charging station where said charge retentive surface is uniformly charged, a plurality of developer structures for developing latent images and an illumination station for discharging said charge retentive surface; uniformly charging said charge retentive surface; forming at least one voltage test patch on said charge retentive surface, the or each test patch having a voltage level corresponding to a respective level of said tri-level images; using a first sensor, sensing the voltage level of one of said test patches prior to development; characterised by developing said one test patch; using a second sensor, disposed after one of said developer structures, sensing the voltage level of said one test patch after development; comparing the difference in said voltage levels to a target value; and initiating an apparatus cycle down when the difference between said voltage levels is greater than said target. Preferably, said steps of using first and second sensors comprises using electrostatic voltmeters. The present invention further provides an apparatus for creating tri-level images on a charge retentive surface during operation of a tri-level imaging apparatus, said apparatus comprising: means for moving said charge retentive surface past a plurality of process stations including a charging station where said charge retentive surface is uniformly charged, a plurality of developer structures for developing latent images and an illumination station for discharging said charge retentive surface; means for uniformly charging said charge retentive surface; means forming at least one voltage test patch on said charge retentive surface, the or each test patch having a voltage level corresponding to a respective level of said tri-level images; means for sensing the voltage level of one of said test patches prior to development; characterised by means for developing said one test patch; means, disposed after one of said developer structures, for sensing the voltage level of said one test patch after development; means for comparing the difference in said voltage levels to a target value; and means for initiating an apparatus cycle down when the difference between said voltage levels is greater than said target. Preferably, said means for sensing the voltage level of one of said patches before and after development comprises electrostatic voltmeters. Improper functioning of the color housing of a tri-level imaging apparatus or insufficient toner concentration in the color developer housing will result in inadequate development of color images. In such instances very little of the available development field (i.e. difference between V DAD and V color bias ) of the color images will be neutralized and voltage measurements of color images will be far below the bias voltage applied to the color housing. Machine cycle down is initiated when the color developer housing is functioning improperly or if the toner concentration is insufficient. To this end, the voltage level of the color image prior to its development is read using an electrostatic voltmeter (ESV). The voltage level thereof is also read after development by another ESV. The difference between these two readings is compared to an arbitrary target value and a machine cycle down is initiated if the difference is greater than the target. Figure 1a is a plot of photoreceptor potential versus exposure illustrating a tri-level electrostatic latent image; Figure 1b is a plot of photoreceptor potential illustrating single-pass, highlight color latent image characteristics; Figure 2 is schematic illustration of a printing apparatus incorporating the inventive features of the invention; and Figure 3 a schematic of the xerographic process stations including the active members for image formation as well as the control members operatively associated therewith of the printing apparatus illustrated in Figure 2. Figure 4 is a block diagram illustrating the interaction among active components of the xerographic process module and the control devices utilized to control them. For a better understanding of the concept of tri-level, highlight color imaging, a description thereof will now be made with reference to Figures 1a and 1b. Figure 1a shows a Photolnduced Discharge Curve (PIDC) for a tri-level electrostatic latent image according to the present invention. Here V 0 is the initial charge level, V ddp (V CAD ) the dark discharge potential (unexposed), V w (V Mod ) the. white or background discharge level and V c (V DAD ) the photoreceptor residual potential (full exposure using a three level Raster Output Scanner, ROS). Nominal voltage values for V CAD , V Mod and V DAD are, for example, 788, 423 and 123, respectively. Color discrimination in the development of the electrostatic latent image is achieved when passing the photoreceptor through two developer housings in tandem or in a single pass by electrically biasing the housings to voltages which are offset from the background voltage V Mod , the direction of offset depending on the polarity or sign of toner in the housing. One housing (for the sake of illustration, the second) contains developer with black toner having triboelectric properties (positively charged) such that the toner is driven to the most highly charged (V ddp ) areas of the latent image by the electrostatic field between the photoreceptor and the development rolls biased at V black bias (V bb ) as shown in Figure 1b. Conversely, the triboelectric charge (negative charge) on the colored toner in the first housing is chosen so that the toner is urged towards parts of the latent image at residual potential, V DAD by the electrostatic field existing between the photoreceptor and the development rolls in the first housing which are biased to V color bias, (V cb ). Nominal voltage levels for V bb and V cb are 641 and 294, respectively. As shown in Figures 2 and 3, a highlight color printing apparatus 2 in which the invention may be utilized comprises a xerographic processor module 4, an electronics module 6, a paper handling module 8 and a user interface (IC) 9. A charge retentive member in the form of an Active Matrix (AMAT) photoreceptor belt 10 is mounted for movement in an endless path past a charging station A, an exposure station B, a test patch generator station C, a first Electrostatic Voltmeter (ESV) station D, a developer station E, a second ESV station F within the developer station E, a pretransfer station G, a toner patch reading station H where developed toner patches are sensed, a transfer station J, a preclean station K, cleaning station L and a fusing station M. Belt 10 moves in the direction of arrow 16 to advance successive portions thereof sequentially through the various processing stations disposed about the path of movement thereof. Belt 10 is entrained about a plurality of rollers 18, 20, 22, 24 and 25, the former of which can be used as a drive roller and the latter of which can be used to provide suitable tensioning of the photoreceptor belt 10. Motor 26 rotates roller 18 to advance belt 10 in the direction of arrow 16. Roller 18 is coupled to motor 26 by suitable means such as a belt drive, not shown. The photoreceptor belt may comprise a flexible belt photoreceptor. Typical belt photoreceptors are disclosed in US-A-4 990 955, US-A 4,588,667, US-A 4,654,284 and US-A 4,780,385. As can be seen by further reference to Figures 2 and 3, initially successive portions of belt 10 pass through charging station A. At charging station A, a primary corona discharge device in the form of dicorotron indicated generally by the reference numeral 28, charges the belt 10 to a selectively high uniform negative potential, V 0 . As noted above, the initial charge decays to a dark decay discharge voltage, V ddp (V CAD ). The dicorotron is a corona discharge device including a corona discharge electrode 30 and a conductive shield 32 located adjacent the electrode. The electrode is coated with relatively thick dielectric material. An AC voltage is applied to the dielectrically coated electrode via power source 34 and a DC voltage is applied to the shield 32 via a DC power supply 36. The delivery of charge to the photoconductive surface is accomplished by means of a displacement current or capacitative coupling through the dielectric material. The flow of charge to the P/R 10 is regulated by means of the DC bias applied to the dicorotron shield. In other words, the P/R will be charged to the voltage applied to the shield 32. For further details of the dicorotron construction and operation, reference may be had to US-A 4,086,650 granted to Davis et al on April 25, 1978. A feedback dicorotron 38 comprising a dielectrically coated electrode 40 and a conductive shield 42 operatively interacts with the dicorotron 28 to form an integrated charging device (ICD). An AC power supply 44 is operatively connected to the electrode 40 and a DC power supply 46 is operatively connected to the conductive shield 42. Next, the charged portions of the photoreceptor surface are advanced through exposure station B. At exposure station B, the uniformly charged photoreceptor or charge retentive surface 10 is exposed to a laser based input and/or output scanning device 48 which causes the charge retentive surface to be discharged in accordance with the output from the scanning device. Preferably the scanning device is a three level laser Raster Output Scanner (ROS). Alternatively, the ROS could be replaced by a conventional xerographic exposure device. The ROS comprises optics, sensors, laser tube and resident control or pixel board. The photoreceptor, which is initially charged to a voltage V 0 , undergoes dark decay to a level V ddp or V CAD equal to about -900 volts to form CAD images. When exposed at the exposure station B it is discharged to V c or V DAD equal to about -100 volts to form a DAD image which is near zero or ground potential in the highlight color (i.e. color other than black) parts of the image. See Figure 1a. The photoreceptor is also discharged to V w or V mod equal to approximately minus 500 volts in the background (white) areas. A patch generator 52 (Figures 3 and 4) in the form of a conventional exposure device utilized for such purpose is positioned at the patch generation station C. It serves to create toner test patches in the interdocument zone which are used both in a developed and undeveloped condition for controlling various process functions. An Infra-Red densitometer (IRD) 54 is utilized to sense or measure the reflectance of test patches after they have been developed. After patch generation, the P/R is moved through a first ESV station D where an ESV (ESV 1 ) 55 is positioned for sensing or reading certain electrostatic charge levels (i. e. V DAD , V CAD, V Mod, and V tc ) on the P/R prior to movement of these areas of the P/R moving through the development station E. At development station E, a magnetic brush development system, indicated generally by the reference numeral 56 advances developer materials into contact with the electrostatic latent images on the P/R. The development system 56 comprises first and second developer housing structures 58 and 60. Preferably, each magnetic brush development housing includes a pair of magnetic brush developer rollers. Thus, the housing 58 contains a pair of rollers 62, 64 while the housing 60 contains a pair of magnetic brush rollers 66, 68. Each pair of rollers advances its respective developer material into contact with the latent image. Appropriate developer biasing is accomplished via power supplies 70 and 71 electrically connected to respective developer housings 58 and 60. A pair of toner replenishment devices 72 and 73 (Figure 2) are provided for replacing the toner as it is depleted from the developer housing structures 58 and 60. Color discrimination in the development of the electrostatic latent image is achieved by passing the photoreceptor past the two developer housings 58 and 60 in a single pass with the magnetic brush rolls 62, 64, 66 and 68 electrically biased to voltages which are offset from the background voltage V Mod , the direction of offset depending on the polarity of toner in the housing. One housing eg 58 (for the sake of illustration, the first) contains red conductive magnetic brush (CMB) developer 74 having triboelectric properties (i. e. negative charge) such that it is driven to the least highly charged areas at the potential V DAD of the latent images by the electrostatic development field (V DAD - V color bias ) between the photoreceptor and the development rolls 62, 64. These rolls are biased using a chopped DC bias via power supply 70. The triboelectric charge on conductive black magnetic brush developer 76 in the second housing is chosen so that the black toner is urged towards the parts of the latent images at the most highly charged potential V CAD by the electrostatic development field (V CAD - V black bias ) existing between the photoreceptor and the development rolls 66, 68. These rolls, like the rolls 62, 64, are also biased using a chopped DC bias via power supply 71. By chopped DC (CDC) bias is meant that the housing bias applied to the developer housing is alternated between two potentials, one that represents roughly the normal bias for the DAD developer, and the other that represents a bias that is considerably more negative than the normal bias, the former being identified as V Bias Low and the latter as V Bias High . This alternation of the bias takes place in a periodic fashion at a given frequency, with the period of each cycle divided up between the two bias levels at a duty cycle of from 5-10 % (Percent of cycle at V Bias High ) and 90-95% at V Bias Low . In the case of the CAD image, the amplitude of both V Bias Low and V Bias High are about the same as for the DAD housing case, but the waveform is inverted in the sense that the the bias on the CAD housing is at V Bias High for a duty cycle of 90-95%. Developer bias switching between V Bias High and V Bias Low is effected automatically via the power supplies 70 and 71. For further details regarding CDC biasing, reference may be had to EP-A-0429309, published 29 May 1991, corresponding to U. S. Patent Application Serial No. 440,913 filed November 22, 1989 in the name of Germain et al. In contrast, in conventional tri-level imaging as noted above, the CAD and DAD developer housing biases are set at a single value which is offset from the background voltage by approximately -100 volts. During image development, a single developer bias voltage is continuously applied to each of the developer structures. Expressed differently, the bias for each developer structure has a duty cycle of 100%. Because the composite image developed on the photoreceptor consists of both positive and negative toner, a negative pretransfer dicorotron member 100 at the pretransfer station G is provided to condition the toner for effective transfer to a substrate using positive corona discharge. Subsequent to image development a sheet of support material 102 (Figure 3) is moved into contact with the toner image at transfer station J. The sheet of support material is advanced to transfer station J by conventional sheet feeding apparatus comprising a part of the paper handling module 8. Preferably, the sheet feeding apparatus includes a feed roll contacting the uppermost sheet of a stack copy sheets. The feed rolls rotate so as to advance the uppermost sheet from stack into a chute which directs the advancing sheet of support material into contact with photoconductive surface of belt 10 in a timed sequence so that the toner powder image developed thereon contacts the advancing sheet of support material at transfer station J. Transfer station J includes a transfer dicorotron 104 which sprays positive ions onto the backside of sheet 102. This attracts the negatively charged toner powder images from the belt 10 to sheet 102. A detack dicorotron 106 is also provided for facilitating stripping of the sheets from the belt 10. After transfer, the sheet continues to move, in the direction of arrow 108, onto a conveyor (not shown) which advances the sheet to fusing station M. Fusing station M includes a fuser assembly, indicated generally by the reference numeral 120, which permanently affixes the transferred powder image to sheet 102. Preferably, fuser assembly 120 comprises a heated fuser roller 122 and a backup roller 124. Sheet 102 passes between fuser roller 122 and backup roller 124 with the toner powder image contacting fuser roller 122. In this manner, the toner powder image is permanently affixed to sheet 102 after it is allowed to cool. After fusing, a chute, not shown, guides the advancing sheets 102 to a catch trays 126 and 128 (Figure 2), for subsequent removal from the printing machine by the operator. After the sheet of support material is separated from photoconductive surface of belt 10, the residual toner particles carried by the non-image areas on the photoconductive surface are removed therefrom. These particles are removed at cleaning station L. A cleaning housing 130 supports therewithin two cleaning brushes 132, 134 supported for counter-rotation with respect to the other and each supported in cleaning relationship with photoreceptor belt 10. Each brush 132, 134 is generally cylindrical in shape, with a long axis arranged generally parallel to photoreceptor belt 10, and transverse to photoreceptor movement direction 16. Brushes 132,134 each have a large number of insulative fibers mounted on base, each base respectively journaled for rotation (driving elements not shown). The brushes are typically detoned using a flicker bar and the toner so removed is transported with air moved by a vacuum source (not shown) through the gap between the housing and photoreceptor belt 10, through the insulative fibers and exhausted through a channel, not shown. A typical brush rotation speed is 1300 rpm (136 rads -1 ), and the brush/photoreceptor interference is usually about 2 mm. Brushes 132, 134 beat against flicker bars (not shown) for the release of toner carried by the brushes and for effecting suitable tribo charging of the brush fibers. Subsequent to cleaning, a discharge lamp 140 floods the photoconductive surface 10 with light to dissipate any residual negative electrostatic charges remaining prior to the charging thereof for the successive imaging cycles. To this end, a light pipe 142 is provided. Another light pipe 144 serves to illuminate the backside of the P/R downstream of the pretransfer dicorotron 100. The P/R is also subjected to flood illumination from the lamp 140 via a light channel 146. Figure 4 depicts the the interconnection among active components of the xerographic process module 4 and the sensing or measuring devices utilized to control them. As illustrated therein, ESV 1 , ESV 2 and IRD 54 are operatively connected to a control board 150 through an analog to digital (A/D) converter 152. ESV 1 and ESV 2 produce analog readings in the range of 0 to 10 volts which are converted by Analog to Digital (A/D) converter 152 to digital values in the range 0-255. Each bit corresponds to 0.040 volts (10/255) which is equivalent to photoreceptor voltages in the range 0-1500 where one bit equals 5.88 volts (1500/255). The digital value corresponding to the analog measurements are processed in conjunction with a Non-Volatile Memory (NVM) 156 by firmware forming a part of the control board 150. The digital values arrived at are converted by a digital to analog (D/A) converter 158 for use in controlling the ROS 48, dicorotrons 28, 90, 100 104 and 106. Toner dispensers 160 and 162 are controlled by the digital values. Target values for use in setting and adjusting the operation of the active machine components are stored in NVM. Tri-level xerography requires fairly precise electrostatic control at both the black and color development stations. Therefore, it is desirable to insure that the primary electrostatics (charge, V CAD , discharge, V DAD and background, V Mod ) are sufficiently near their proper values before prints are generated. This process is sometimes used in xerographic machines, particularly when the results of rest recovery algorithms are not sufficiently accurate. The process of insuring that the primary electrostatics are sufficiently near proper values is referred to as electrostatic convergence and takes place during machine cycle up. The color housing 58 must be operating during initial electrostatic convergence due to CAD image voltage losses. During this time, if the cleaning field voltage (difference between the color housing voltage, V cb and the background voltage level, V Mod ) for controlling color background development is improperly set, excessive amounts of toner can be quickly removed from the color developer housing. Moreover, since the use of different color (i.e. red, blue, green) housings is contemplated, the power to drive the developer housing must be properly connected each time a new developer housing is installed in the machine. Failure to drive the developer housing results in failure to develop sufficient toner on the P/R. Improper functioning of the color housing or insufficient toner concentration in the color developer housing will result in inadequate development of color images. In such instances very little of the available development field (i.e. difference between V DAD and V color bias ) of the color images will be neutralized and voltage measurements of color images will be far below the bias voltage applied to the color housing. During cycle up convergence full color patches are written twice in every frame. ESV 1 readings are used to adjust the ROS full exposure level to achieve the proper patch voltage. ESV 2 readings are used to monitor the performance of the color housing based on the difference between the color housing bias and the post-development voltage of the full image patch. Insufficient patch voltage neutralization leads to a fault declaration and a cycle down of the machine. This check is also done during normal runtime control by monitoring the full color image patches written in the interdocument zones. ESV 1 reads the pre-development voltage level of V DAD while ESV 2 reads the voltage level of V DAD after development. Analog signals representative of these voltage level are converted to digital values by the A/D converter 152. The difference between these digital values is compared to a target value on the control board 150. This target value is arbitrarily chosen and may be, for example, 6 bits which is equal to 36 volts. This is a coarse check indicative of whether the DAD housing is functioning properly. If the 6 bit target is not exceeded a signal is generated which is used to initiate a machine cycle down.

Claims: A method of creating tri-level images on a charge retentive surface (10) during operation of a tri-level imaging apparatus (2), including the steps of: moving said charge retentive surface (10) past a plurality of process stations ( A - M ) including a charging station ( A ) where said charge retentive surface (10) is uniformly charged, a plurality of developer structures (58,60) for developing latent images and an illumination station (140-146) for discharging said charge retentive surface (10); uniformly charging said charge retentive surface (10); forming at least one voltage test patch on said charge retentive surface (10), the or each test patch having a voltage level corresponding to a respective level of said tri-level images; using a first sensor (ESV 1 ), sensing the voltage level (V DAD @ESV 1 ) of one of said test patches prior to development; characterised by developing said one test patch; using a second sensor (ESV 2 ), disposed after one (58) of said developer structures, sensing the voltage level (V DAD @ESV 2 ) of said one test patch after development; comparing the difference in said voltage levels (V DAD @ESV 1 ,V DAD @ESV 2 ) to a target value; and initiating an apparatus cycle down when the difference between said voltage levels is greater than said target. The method according to claim 1 wherein said step of forming voltage test patches comprises forming charged and discharged area patches and a background area patch. The method according to claim 1 or 2 wherein said steps of sensing the voltage levels of said one of said patches comprises sensing the voltage level of a discharged area patch. The method according to claim 1, 2 or 3 wherein said steps are performed during cycle up convergence of said apparatus (2) or during cycle up runtime of said apparatus. The method according to any of claims 1 to 4 wherein a discharged area patch is in the document zone of said charge retentive surface (10) during cycle up convergence, or a discharged area patch is in the interdocument zone of said charge retentive surface (10) during runtime. Apparatus for creating tri-level images on a charge retentive surface (10) during operation of a tri-level imaging apparatus (2), said apparatus comprising: means (18-26) for moving said charge retentive surface (10) past a plurality of process stations ( A - M ) including a charging station ( A ) where said charge retentive surface (10) is uniformly charged, a plurality of developer structures (58,60) for developing latent images and an illumination station (140-146) for discharging said charge retentive surface (10); means ( A ) for uniformly charging said charge retentive surface (10); means (48,52) forming at least one voltage test patch on said charge retentive surface (10), the or each test patch having a voltage level corresponding to a respective level of said tri-level images; means (ESV 1 ) for sensing the voltage level (V DAD @ESV 1 ) of one of said test patches prior to development; characterised by means (58,60) for developing said one test patch; means (ESV 2 ), disposed after one (58) of said developer structures, for sensing the voltage level (V DAD @ESV 2 ) of said one test patch after development; means (150-158) for comparing the difference in said voltage levels (V DAD @ESV 1 ,V DAD @ESV 2 ) to a target value; and means (150-158) for initiating an apparatus cycle down when the difference between said voltage levels is greater than said target. Apparatus according to claim 6 wherein said means (48,52) for forming voltage test patches comprises means (48,52) for forming charged and discharged area patches and a background area patch. Apparatus according to claim 6 or 7 wherein said one of said patches comprises a discharged area patch. Apparatus according to claim 6, 7 or 8 wherein said means (ESV 1 ,ESV 2 ) for sensing are utilized during cycle up convergence of said apparatus (2), or during runtime of said apparatus (2). Apparatus according to any of claims 6 to 9 wherein a discharged area patch is in the document zone of said charge retentive surface (10) during cycle up convergence, or a discharged area patch is in the interdocument zone of said charge retentive surface (10) during runti me.

Inventors: BERMAN ROBIN E, HURWITCH CARL B, MACDONALD DANIEL W, SCHEUER MARK A, WILCOX DAVID G, BERMAN, ROBIN E., HURWITCH, CARL B., MACDONALD, DANIEL W., SCHEUER, MARK A., WILCOX, DAVID G.
Applicants: XEROX CORP, XEROX CORPORATION
Application year: 1992
Main classification: G03G15
IPC codes: G03G15, G03G21