Semiconductor electron emission device

Abstract: On a high density p-type semiconductor substrate, a high density p-type semiconductor region and a p-type semiconductor region 104 for supplying carriers to the high density p-type semiconductor region are disposed in contact, further, a p-type semiconductor region and a low density p-type semiconductor region are disposed outwardly around the high density p-type semiconductor region and the p-type semiconductor region, and on a surface of device, a Schottky electrode which is a metallic film for forming the Schottky barrier junction with the high density p-type semiconductor region is disposed. The density relation between carrier densities of the semiconductor regions is such that high density p-type semiconductor region > p-type semiconductor region > p-type semiconductor region > low density p-type semiconductor region.

Description: The present invention relates to a semiconductor electron emission device having an electron emission portion comprised of a Schottky barrier junction between a metal material or metallic compound material and a semiconductor for emitting electrons from a solid surface thereof. Conventional semiconductor electron emission devices using the avalanche breakdown mechanism have been known as described in United States Patent No. 4,259,678 and United States Patent No.4,303,930. Such a semiconductor electron emission device is one in which an electron emission portion is fabricated by forming a p-type semiconductor layer and an n-type semiconductor layer on a semiconductor substrate, and depositing cesium on the surface of the n-type semiconductor layer to have a decreased work function of the surface. And a reverse bias voltage is applied across a pn junction formed of the p-type semiconductor layer and the n-type semiconductor layer to cause the avalanche breakdown to make hot electrons, and emit the electrons from the electron emission portion in a direction perpendicular to the surface of the semiconductor substrate. Besides, there is a semiconductor electron emission device in which a Schottky barrier junction is formed of the p-type semiconductor and a metal material, or the p-type semiconductor and a metallic compound, and a reverse bias voltage is applied across the Schottky barrier junction to cause the avalanche breakdown to make hot electrons and emit the electrons from the electron emission portion in a direction perpendicular to the surface of the semiconductor substrate, as described in Japanese Laid-Open Patent Application No. 1-220328. With the conventional semiconductor electron device as above described, when the reverse bias voltage is applied across the pn junction or Schottky barrier junction, the avalanche breakdown is caused in the high density p-type semiconductor region where the depletion layer width is formed thinnest, so that electrons having high energy produced therein are emitted from a solid surface to the outside. However, the shape of the depletion layer around the pn junction or Schottky barrier junction has a radius of curvature determined by a carrier density of semiconductor and an applied voltage, and the electric field is more concentrated on the depletion layer than in other regions. Accordingly, the breakdown or leakage of the current around the depletion layer may occur at a lower applied voltage than the avalanche breakdown occurs in the high density p-type semiconductor region so that the device characteristics may be deteriorated. Also, with the electron emission device having the pn junction or Schottky barrier junction, it is possible to increase the radius of curvature around the depletion layer with a decreased carrier density of the p-type semiconductor around the high density p-type semiconductor region where the avalanche breakdown occurs, thereby preventing the breakdown at the lower voltage, but the electrical resistance between an electrode for supplying carriers and the high density p-type semiconductor region where the avalanche breakdown occurs may increase, causing the operating voltage of device to rise, and a problem with the deterioration of device may occur due to the Joule heating. Thus, with the conventional device, as it is inconvenient to decrease the carrier density of the p-type semiconductor region around the high density p-type semiconductor region to the extreme, a guard ring structure of high density n-type semiconductor was formed, concentrically with the high density p-type semiconductor region, within the p-type semiconductor region. Thereby, the depletion layer was formed continuously from the high density p-type semiconductor region outward to the p-type semiconductor region and the high density n-type semiconductor layer so as to have a large radius of curvature in the most outside region, thereby preventing the breakdown or the leakage of current around the depletion layer. With the device structure of conventional semiconductor electron emission device as above described, a manufacturing process such as the ion injection or the thermal diffusion for forming the ring-like n-type semiconductor region (guard ring structure) at a high density, or a process for forming the ohmic junction electrode to apply the voltage to the guard ring of the high density n-type semiconductor is necessary, in which there is a problem that the manufacturing process is complex. Also, a wide area for forming the guard ring or its ohmic junction electrode is necessary, and it is difficult to provide a smaller device. Further, with the conventional semiconductor electron emission device, it is required to supply electrons sufficiently to the high density p-type semiconductor region defining the avalanche amplification, when emitting electrons produced by the avalanche amplification mechanism. However, with the conventional electron emission device, the high density p-type semiconductor region is surrounded by the p-type semiconductor region having a high resistivity, and thus spaced away from the semiconductor or metallic electrode having a low resistivity for supplying electrons. Accordingly, there is a high resistance between the low resistivity region for supplying electrons and the high density p-type semiconductor region, so that it was difficult to raise the operating speed of the device which is determined by the product RC of its resistance R and a capacitance C in the Schottky barrier junction immediately before the avalanche break-down occurs or in the depletion layer width of the pn junction. Also, in emitting electrons, the current is concentrated in the high density p-type semiconductor region and the neighborhood thereof, so that the Joule heat is generated in the region having a high resistance, and it was difficult to prevent the breakage or deterioration of device due to the temperature elevation, or the fluctuation in the emission amount of electrons. Furthermore, EP-A-0 331 373 discloses a semiconductor electron emission device having an electron emission portion comprised of a Schottky barrier junction between a metal material or a metallic compound material and a semiconductor for emitting electrons from a solid surface thereof, and implicitly a semiconductor electron emission device having an electron emission portion comprised of a pn-junction. However, the shape of the depletion area around the electron emission area depends strongly from the carrier density, and the electric field is more concentrated on the depletion layer than in other regions. Accordingly, the breakdown or leakage of the current around the depletion layer may occur at a lower applied voltage than if the avalanche breakdown occurs in the high density p-type semiconductor region intrinsically required. Thus, the device characteristics are deteriorated. The present invention was achieved in the light of the problems associated with the conventional arts as above described, and aimed to provide a smaller semiconductor electron emission device in which the device structure and the manufacturing process can be simplified, and a higher speed of device in the operation can be attained, while resolving the above-mentioned conventional problems. This object is achieved by the measures as defined in claims 1, 4, 7 and 10. Fig. 1 is a cross-sectional view showing a first example of a semiconductor electron emission device according to the present invention. Fig. 2 is a view showing one example of an energy band for the semiconductor electron emission device of Schottky barrier junction. Fig. 3 is a diagram showing one example of the current-voltage characteristics for the semiconductor electron emission device according to the present invention. Fig. 4 is a diagram showing another example of the current-voltage characteristics for the semiconductor electron emission device according to the present invention. Fig. 5 is a cross-sectional view showing a second example of a semiconductor electron emission device according to the present invention. Figs. 6A and 6B are cross-sectional views showing a third example of a semiconductor electron emission device according to the present invention. Fig. 7 is a cross-sectional view showing a fourth example of a semiconductor electron emission device according to the present invention. Fig. 8 is a cross-sectional view showing a fifth example of a semiconductor electron emission device according to the present invention. Figs. 9A and 9B are cross-sectional views showing a sixth example of a semiconductor electron emission deivce according to the present invention. In a semiconductor electron emission device of the present invention, a second p-type semiconductor region having a lower carrier density and a third p-type semiconductor region having a further lower carrier density are formed around a first p-type semiconductor region of high density bringing about the avalanche breakdown. Thereby, it is possible to have a depletion layer the shape of which is thinnest in the first p-type semiconductor region so that the electric field is likely to be concentrated thereon. Accordingly, it is possible to bring about the avalanche breakdown efficiently only in the first p-type semiconductor region. The series resistance value of semiconductor electron emission devices can be decreased by using the fourth p-type semiconductor region having a higher carrier density than the second p-type semiconductor region as the passage for the supply of carriers to the first p-type semiconductor region. Next, the examples of the present invention will be described with reference to the drawings. (Example 1) Fig. 1 is a cross-sectional view showing a semiconductor electron emission device of Schottky barrier junction type in the first example of the present invention. The semiconductor electron emission device in this example is a Schottky barrier junction device in which a cylindrical high density p-type semiconductor region 105 which is a first p-type semiconductor region and a p-type semiconductor region 104, which is a fourth p-type semiconductor region, for supplying carriers to the high density p-type semiconductor region 105 are disposed in contact with each other on a substantial central portion of a high density p-type semiconductor substrate 101, a p-type semiconductor region 103 which is a second p-type semiconductor region and a low density p-type semiconductor region 102 which is a third p-type semiconductor region are disposed concentrically outwardly around the high density p-type semiconductor region 105 and the p-type semiconductor region 104, and a Schottky electrode 108 which is a metallic film for forming the Schottky barrier junction with the high density p-type semiconductor region 105 is disposed on the surface of the device. Further, the semiconductor electron emission device in this example is provided with an ohmic junction electrode 106 to the high density p-type semiconductor substrate 101 and an electrode wiring 109 to the Schottky electrode 108 for applying a reverse voltage to the Schottky barrier junction, the reverse voltage being applied from a power source 110. Note that the electrode wiring 109 is in contact with the Schottky electrode 108 on an insulating film 107 formed on the low density p-type semiconductor region 102 in order to prevent the short circuit with each p-type semiconductor region as previously described. In the figure, 111 shows the shape of a depletion layer end in a state where the reverse voltage is applied, and 112 shows a region where the avalanche breakdown occurs with the application of the reverse voltage. Here, the electron emission process in a semiconductor electron emission device using the Schottky barrier junction will be described with reference to Fig. 2. By the application of a reverse bias voltage to a Schottky diode forming the Schottky barrier junction with the p-type semiconductor, the bottom Ec of a conduction band for the p-type semiconductor is at a higher energy level than the vacuum level E VAC for the metal electrode forming the Schottky barrier, so that the avalanche breakdown is brought about. An electron produced by the avalanche breakdown obtains a higher energy than the lattice temperature with the electric field within a depletion layer produced at an interface between semiconductor and metal electrode, and injected from the p-type semiconductor into the metal electrode forming the Schottky barrier junction. The electron having a greater energy than the work function on the surface of metal electrode forming the Schottky barrier junction is discharged into the vacuum. Accordingly, the treatment for the surface of metal electrode to have a lower work function leads to an increase in the emission amount of electrons, as previously described. A manufacturing process of the semiconductor electron emission device as shown in Fig. 1 will be described specifically by way of an example. (1) A low density p-type GaAs semiconductor layer having a beryllium (Be) density of 1x10 15 cm -3 or less was grown, 0.6 µm thick, on the high density p-type semiconductor substrate 101 (GaAs) doped with Zn and having a carrier density of 5x10 18 cm -3 , with the molecular beam epitaxy method (MBE). This low density p-type GaAs semiconductor layer becomes the low density p-type semiconductor region 102 later. (2) Be ions accelerated to 160keV and 40keV were injected in succession into the region corresponding to the p-type semiconductor region 103, with the focused ion beam (FIB) injection method, so that the Be density is 2x10 17 cm -3 substantially uniformly from the surface of the low density p-type GaAs semiconductor layer to the high density p-type semiconductor substrate 101. Also, Be ions were injected into the regions corresponding to the p-type semiconductor region 104 and the high density p-type semiconductor region 105, with the FIB injection method, so that the Be densities are 1x10 18 cm -3 and 2x10 18 cm -3 , respectively. (3) SiO 2 was deposited as the cap material, about 0.1 µm thick, on the surface of the low density p-type GaAs semiconductor layer having Be ions injected as previously described, with the sputtering method, and then the injection portion was activated with the heat treatment at 850°C for 10 seconds. With the injection process (2) and single heat treatment process (3), as above described, it is possible to form the high density p-type semiconductor region 105, the p-type semiconductor regions 103, 104, and the low density p-type semiconductor region 102 which are the first to fourth p-type semiconductor regions, in which the manufacturing process can be simplified as compared with a conventional device having the high density n-type guard ring and the ohmic junction electrode. The density relation between carrier densities in the high density p-type semiconductor region 105, the p-type semiconductor regions 103, 104, and the low density p-type semiconductor region 102 is such that high density p-type semiconductor region 105 (first p-type semiconductor region) > p-type semiconductor region 104 (fourth p-type semiconductor region) > p-type semiconductor region 103 (second p-type semiconductor region) > low density p-type semiconductor region 102 (third p-type semiconductor region). (4) After the SiO 2 film for the heat treatment as previously described was removed, 0.5 µm thick SiO 2 film was formed as the insulating film 107. Also, gold (Au)/chromium (Cr) was vacuum evaporated onto a back surface of the high density p-type semiconductor substrate 101 to form an ohmic junction electrode 106 with the heat treatment at 350°C for 5 minutes. (5) After an opening for the electrode wiring 107 was formed to form the Schottky barrier junction with the normal photolithography, a 8nm thick Schottky electrode 100 was formed within the opening, with the electron beam evaporation and the normal photolithography, by selecting tungsten (W) as the material for forming the Schottky barrier junction to the p-type semiconductor region 103 and the high density p-type semiconductor region 105 composed of p-type GaAs semiconductor. (6) An electrode wiring 109 was formed, with the normal photolithography, by vacuum evaporating aluminum on a junction portion between the insulating film 107 and the Schottky electrode 108. The semiconductor electron emission device thus fabricated was installed within a vacuum chamber within which the degree of vacuum was retained at about 1x10 -7 Torr, and a voltage of 7V was applied between the ohmic junction electrode 106 and the electrode wiring 109 from a power source 110, so that the electron emisson of about 15pA was observed from the surface of the Schottky electrode 108 above the high density p-type semiconductor region 105. If the applied voltage (device voltage) was sequentially increased up to 10V, the electron emission amount (emission current) was sequentially increased up to about 100pA, as shown in Fig. 3. It is conceived that a depletion layer 111 spreads about 0.04 µm beyond a Schottky barrier interface with the Schottky electrode 108 in the high density p-type semiconductor region 105, when this device voltage is applied. The electric field is most concentrated on an avalanche region 112 of the high density p-type semiconductor region 105, in which region the avalanche breakdown occurs most efficiently. Also, the electric characteristics are shown in Fig. 4, in which a semiconductor electron emission device, which was fabricated by changing only the Be density of the p-type semiconductor region 104 which is a fourth p-type semiconductor region for supplying carriers to the high density p-type semiconductor region 105 which is a first p-type semiconductor region to 3x10 18 cm -3 in the fabrication conditions as above described, was installed within the same vacuum chamber. If a device voltage of 5V was applied to the semiconductor electron emission device from the power source 110, the electron emission (emission current) of about 20pA was observed from the surface of the Schottky electrode 108 above the high density p-type semiconductor region 105. If the device voltage was sequentially increased up to 7V, the emission current was also sequentially increased up to about 100pA. In this example, by providing another electrode via the insulating film on the electrode wiring 109, and setting a potential between the electrode and the electrode wiring 109, it is possible to regulate the flying direction and the kinetic energy of electrons emitted from the electron emission portion. In this way, it is possible to define the current/voltage characteristics of the semiconductor emission device by changing the carrier density in the p-type semiconductor region 104. Also, it is possible to decrease the series resistance of device and make the operating speed faster by decreasing the resistance of the p-type semiconductor region 104. In the above examples, GaAs was used as the semiconductor, but other semiconductor materials such as Si, Ge, GaP, AlAs, GaAsP, AlGaAs, SiC, BP, AlN, or diamond are applicable in principle, and particularly, the material of indirect transition type and having a wide band gap is preferable. The semi-insulating region can be fabricated by the use of various endogenic defects or residual impurities within the crystal, and purposely added compensating impurities. When this semi-insulating region is formed, undoped crystal not containing the dopant is also applicable because of its semi-insulating property. The material for the ohmic junction electrode 106 requires to form the Schottky junction with the p-type semiconductor, and may be, for example, Al, Au or LaB 6 , in addition to tungsten (w), as commonly well known. However, since the electron emission efficiency increases with smaller work function of the electrode surface, as previously described, the electron emission efficiency can be increased by coating a material of low work function such as Cs on the surface, when the work function of the material is large. (Example 2) Fig. 5 is a cross-sectional view showing a semiconductor electron emission device of pn junction type in the second example of the present invention. The semiconductor electron emission device in this example is a pn junction device having an electron emission portion in which a cylindrical high density p-type semiconductor region 505 which is a first p-type semiconductor region and a p-type semiconductor region 504, which is a fourth p-type semiconductor region, for supplying carriers to the high density p-type semiconductor region 505 are disposed in contact with each other on a substantial central portion of a high density p-type semiconductor substrate 501, and a p-type semiconductor conductor region 503 which is a second p-type region and a low density p-type semiconductor region 502 which is a third p-type semiconductor region are disposed concentrically outwardly around the high density p-type semiconductor region 505 and the p-type semiconductor region 504, and a high density n-type semiconductor region 506 which is an n-type semiconductor region for forming the pn junction with the high density p-type semiconductor region 505 is disposed thereon. Further, the semiconductor electron emission device in this example is provided with an ohmic junction electrode 507 to the high density p-type semiconductor substrate 501, an ohmic junction electrode 509 to the high density n-type semiconductor region 506, and a low work function coating 510 formed on the high density n-type semiconductor region 506, for applying a reverse voltage to the pn junction, the reverse voltage being applied from a power source 511. Note that the ohmic junction electrode 509 is in contact with the high density n-type semiconductor region 506 via an insulating film 508 formed along an edge portion of the surface on the low density p-type semiconductor region 502 in order to prevent the short circuit with the low density p-type semiconductor region 502. In the figure, 512 shows the shape of a depletion layer end in a state where the reverse voltage is applied, and 513 shows a region where the avalanche breakdown occurs with the application of the reverse voltage. A manufacturing process of the semiconductor electron emission device of pn junction type will be described specifically by way of an example. (1) A low density p-type GaAs semiconductor layer having a Si density of 5 x 10 16 cm -3 or less was grown, 0.6 µm thick, on the high density p-type semiconductor substrate 501 (GaAs) doped with Zn and having a carrier density of 5 x 10 18 cm -3 , with the MBE method. This low density p-type GaAs semiconductor layer becomes the low density p-type semiconductor region 502 later. (2) Be ions accelerated to 160keV and 40keV were injected in succession into the region corresponding to the p-type semiconductor region 503, with the FIB method, so that the Be density is 2x10 17 cm -3 substantially uniformly from the surface of the low density p-type GaAs semiconductor layer to the high density p-type semiconductor substrate 501. Also, Be ions were injected into the regions corresponding to the p-type semiconductor region 104 and the high density p-type semiconductor region 105, with the FIB injection method, so that the Be densities are 1x10 18 cm -3 and 2x10 18 cm -3 , respectively. (3) Ions were injected into the region corresponding to the high density n-type semiconductor region 506, so that the Si density is about 1x10 19 cm -3 . If this high density n-type semiconductor region 506 is formed thick, electron produced with the avalanche breakdown are scattered to lose the energy, causing the electron emission efficiency to decrease. Thus, it is desirable to make the ion injection at a low acceleration voltage, or form the surface with the etching to have a thickness of 20nm or less. The electron emission portion consisting of the pn junction with the high density p-type semiconductor region can be formed by forming this high density n-type semiconductor region 506. (4) SiO 2 was deposited as the cap material, about 0.1 µm thick, on the surface of the low density p-type GaAs semiconductor layer having ions injected as previously described, with the sputtering method, and then the injection portion was activated with the heat treatment at 850°C for 10 seconds. With the injection processes (2) and (3) and single heat treatment process (4), as above described, it is possible to form the high density p-type semiconductor region 505, the p-type semiconductor regions 503, 504, and the low density p-type semiconductor region 502 which are the first to fourth p-type semiconductor conductor regions, and the high dencity n-type region 506 which is the n-type semiconductor region, in which the manufacturing process can be simplified as compared with a conventional device having the high density n-type guard ring. The density relation between carrier densities in the high density p-type semiconductor region 505, the p-type semiconductor regions 503, 504, and the low density p-type semiconductor region 502 is such that high density n-type semiconductor region 506 (n-type semiconductor region) > high density p-type semiconductor region 505 (first p-type semiconductor region) > p-type semiconductor region 504 (fourth p-type semiconductor region) > p-type semiconductor region 503 (second p-type semiconductor region) > low density p-type semiconductor region 502 (third p-type semiconductor region). (5) After the SiO 2 film for the heat treatment as previously described was removed, 0.5 µm thick SiO 2 film was formed as the insulating film 508, for which an opening was formed in a range corresponding to the high density n-type semiconductor region 506, with the normal lithography, so as to expose the high density n-type semiconductor region 506. And Au/Cr as the ohmic junction electrode 507 to the high density p-type semiconductor substrate 501, and Au/Ge as the ohmic junction electrode 509 to the high density n-type semiconductor region 506 were vacuum evaporated, respectively, and then the alloying heat treatment was performed at 350°C for five minutes. (6) Cesium (Cs) which was a material of low work function was vacuum evaporated substantially in a monatomic layer on an exposed portion of the high density n-type semiconductor region 506, in the ultra-high vacuum to obtain the low work function coating 510. The semiconductor electron emission device thus fabricated was installed within a vacuum chamber which was retained at about 1x10 -11 Torr or less, and a device voltage of 6V was applied between the ohmic junction electrodes 507 and 509 from the power source 511, so that the electron emission of about 0.1 µA was observed from the surface of the low work function coating 510 (Cs) above the high density p-type semiconductor region 505. In this way, with this example, it is possible to form the semiconductor electron emission device of pn junction type having the same electron emission characteristics as a conventional semiconductor electron emission device, with the simplified manufacturing process. Also, with this example, like the previous first example, by setting a potential between the ohmic junction electrode 509 and another electrode, it is possible to regulate the flying direction and the kinetic energy of electrons. (Example 3) Fig. 6 is a view showing a multi semiconductor electron emission device of Schottky barrier type provided with a plurality of electron emission portions, in a third example of the present invention, in which Fig. 6A is a plan view thereof, and Fig. 6B is a cross-sectional view taken along the line A-A' of Fig. 6A. The multi semiconductor electron emission device of this example is provided with four electron emission portions 600A, 600B, 600C and 600D, like a matrix, on a high density p-type semiconductor region 602 formed on a semiconductor substrate 601. Since the electron emission portions 600A, 600B, 600C and 600D all have the same constitution, the electron emission portion 600A will be exemplified. The electron emission portion 600A has the same constitution as in the previous first example, comprising a high density p-type semiconductor region 606A which is a first p-type semiconductor region, a p-type semiconductor region semiconductor 605A which is a fourth p-type region disposed in contact with the high density p-type semiconductor region 606A for supplying carriers to the high density p-type semiconductor region 606A, a p-type semiconductor region 604A which is a second p-type semiconductor region located around the high density p-type semiconductor region 606A and the p-type semiconductor region 605A, a low density p-type semiconductor region 603 which is a third p-type semiconductor region located around the p-type semiconductor region 604A, and a Schottky electrode 611A for forming the Schottky barrier junction with the high density p-type semiconductor region 606A. Further, it is provided with an ohmic junction electrode 609 to the high density p-type semiconductor region 602 and an electrode wiring 610A to the Schottky electrode 611A for applying a reverse voltage to the Schottky barrier junction. The electrode wiring 610A is in contact with the Schottky electrode 611A on an insulating film 608 formed on the low density p-type semiconductor region 603 in order to prevent the short circuit with each p-type semiconductor region as previously described. The ohmic junction electrode 609 is connected via the high density p-type semiconductor region 607 to the high density p-type semiconductor region 602, and in this example, provided at two positions as shown in Fig. 6A. This ohmic junction electrode 609 is a common electrode to the four electron emission portions 600A, 600B, 600C and 600D. The Schottky electrode 611A may be connected in common with Schottky electrodes 611B, 611C and 611D (611C, 611D are not shown) of other electron emission portions 600B, 600C and 600D, in which case as the ohmic junction electrode 609 is commonly used, the four electron emission portions 600A, 600B, 600C and 600D are controlled simultaneously for the electron emission operation. On the other hand, when the Schottky electrodes 611A, 611B, 611C and 611D of the electron emission portions 600A, 600B, 600C and 600D are independent of each other, the control for each electron emission portion 600A, 600B, 600C and 600D is allowed. Further, on the device surface formed with the four electron emission portions 600A, 600B, 600C and 600D constituted as previously described, the portion except for the ohmic junction electrode 609 is covered via a supporting member 612 made of insulating material with a gate 613 composed of metallic film provided on the insulating layer 608. This gate 613 is formed with opening portions 614A, 614B, 614C and 614D at positions corresponding to and upward of the electron emission portions 600A, 600B, 600C and 600D, respectively, whereby electrons emitted from each electron emission portion 600A, 600B, 600C and 600D are passed through the opening portions 614A, 614B, 614C and 614D outward. A manufacturing process of the multi semiconductor electron emission device will be described specifically by way of an example. (1) After a reversal pattern was formed on an undoped, semi-insulating semiconductor substrate (GaAs) 601 having a density of impurities of 1x10 14 cm -3 or less, with the normal photolithography, the normal ion injection was made so that the Be density was 3x10 18 cm -3 . And with the heat treatment at 850°C for 10 seconds, the stripe-like high density p-type semiconductor region 602 was formed longitudinally in the X direction. (2) With the MBE method, GaAs was grown, 0.6 µm thick, as the low density p-type semiconductor region 603 having a Be density of 5x10 15 cm -3 . (3) Be ions were injected, with the FIB method, into the regions corresponding to the p-type semiconductor regions 604A, 604B, 604C and 604D to have a Be density of 2x10 17 cm -3 , the regions corresponding to the p-type semiconductor regions 605A, 605B, 605C and 605D to have a Be density of 3x10 18 cm -3 , and the regions corresponding to the high density p-type semiconductor regions 606A, 606B, 606C and 606D to have a Be density of 2x10 18 cm -3 . Also, Be ions were injected into the region correponding to the high density p-type semiconductor region 607 to have a Be density of 3x10 18 cm -3 , with the FIB method. The MBE growth processes of (1) to (3) and the FIB injection process are carried out without exposure to the atmosphere, because respective apparatuses are connected through vacuum tunnel. (4) Further, with the heat treatment at 850°C for 10 seconds, the p-type semiconductor regions 604A, 604B, 604C, 604D, 605A, 605B, 605C, 605D and the high density p-type semiconductor regions 606A, 606B, 606C, 606D, 607 were activated. (5) After SiO 2 was deposited, 0.2 µm thick, as the insulating film 608, on the low density p-type semiconductor region 603 into which the ion injection was made as previously described, with the normal sputtering method, respective openings were formed, with the normal photolithoetching method, to expose partially the high density p-type semiconductor region 607, the p-type semiconductor regions 604A, 604B, 604C, 604D and the high density p-type semiconductor regions 606A, 606B, 606C, 606D, in order to form the Schottky barrier junction. Au/Cr was vacuum evaporated on the high density p-type semiconductor region 607 to form the ohmic junction electrode 609 with the heat treatment at 350°C for 5 minutes. (6) Aluminum (Al) as the electrode wiring 610, and tungsten (W) as the material for forming the Schottky barrier junction to the high density p-type semiconductor regions 606A, 606B, 606C, 606D, were deposited with the electron beam source evaporation 0.5 µm and 8nm thick, respectively, to form the electrode wirings 610A, 610B, 610C, 610D and the Schottky electrodes 611A, 611B, 611C, 611D, with the normal photolithoetching method. (7) For the supporting member 612 and the gate 613 made of insulating material, SiO 2 and tungsten (W) were sequentially deposited with the vacuum evaporation method, respectively, and the opening portions 614A, 614B, 614C, 614D were formed with the normal photolithoetching method. With the above processes (1) to (7), the multi semiconductor electron emission device having the four electron emission portions 600A, 600B, 600C, 600D was completed. In the same way, a multi semiconductor electron emission device having the electron emission portions arranged like a matrix, 20 in the X direction, and 10 in the Y direction, was fabricated, and installed within a vacuum chamber within which the degree of vacuum was at about 1x10 -7 Torr. If a reverse voltage of 7V was applied to the entire area of the electron emission portions, the electron emission of about 20nA in total was observed. Also, by applying a reverse voltage only between arbitrary ohmic junction electrode 609 and arbitrary electrode wiring 610, it was observed that only device located at its intersection emitted electrons. In this way, with this example, it is possible to form an electron emission device having the same electron emission characteristics as a conventional multi semiconductor electron emission device and simply fabricated. In the semiconductor electron emission device of the present invention, the n-type semiconductor region having a low carrier density is formed around a first p-type semiconductor region having a high density bringing about the avalanche breakdown. Thereby, in a state where the operating voltage is applied, the peripheral portion of a depletion layer formed in the first p-type semiconductor region is continuously adjacent to a depletion layer formed therearound with the pn junction and protected, so that the breakdown or the leakage of current will not occur around the first p-type semiconductor region. Accordingly, it is possible to have a device structure not requiring the guard ring structure for the high density n-type semiconductor, which was conventionally inconvenient from the aspects of a simpler manufacturing process and a smaller device. Here, by forming the second p-type semiconductor region as the passage of supplying carriers to the first p-type semiconductor region, it is possible to make the series resistance of device an appropriate value. Accordingly, the operating speed can be increased. (Example 4) Fig. 7 is a cross-sectional view showing a semiconductor electron emission device of Schottky barrier junction type in the fourth example of the present invention. The semiconductor electron emission device in this example is a Schottky barrier junction device in which a cylindrical high density p-type semiconductor region 703 which is a first p-type semiconductor region and a p-type semiconductor region 704, which is a second p-type semiconductor region, for supplying carriers to the high density p-type semiconductor region 703 are disposed in contact with each other on a substantial central portion of a high density p-type semiconductor substrate 701, a low density n-type semiconductor region 702 which is an n-type semiconductor region is disposed concentrically outwardly around the high density p-type semiconductor region 703 and the p-type semiconductor region 704, and a Schottky electrode 708 which is a metallic film for forming the Schottky barrier junction with the high density p-type semiconductor region 703 is disposed on the surface of the device. Further, the semiconductor electron emission device in this example is provided with an ohmic junction electrode 706 to the high density p-type semiconductor substrate 701 and an electrode wiring 707 to the Schottky electrode 708 for applying a reverse voltage to the Schottky barrier junction, the reverse voltage being applied from a power source 709. Note that the electrode wiring 707 is in contact with the Schottky electrode 708 on an insulating film 705 formed on the low density n-type semiconductor region 702 in order to prevent the short circuit with each p-type semiconductor region as previously described. In the figure, 710 shows the shape of a depletion layer end in a state where the reverse voltage is applied. The electron emission process in the semiconductor electron emission device using the Schottky barrier junction of the present invention is the same as described in Fig. 2. A manufacturing process of the semiconductor electron emission device as shown in Fig. 7 will be described specifically by way of an example. (1) A low density n-type GaAs semiconductor layer having a silicone (Si) density of 1x10 15 cm -3 or less was grown, 0.6 µm thick, on the high density p-type semiconductor substrate 701 (GaAs) doped with zinc (Zn) and having a carrier density of 5x10 18 cm -3 , with the molecular beam epitaxy method (MBE). This low density n-type GaAs semiconductor layer becomes the low density n-type semiconductor region 102 later. (2) Be ions accelerated to 40keV were injected into the region corresponding to the p-type semiconductor region 703, with the focused ion beam (FIB) injection method, so that the Be density is 2x10 18 cm -3 substantially uniformly. (3) Be ions accelerated to 160keV were also injected into the region corresponding to the p-type semiconductor region 704, with the FIB injection method, so that the high density p-type semiconductor substrate 701 is reached and the Be density is 1x10 18 cm -3 . (4) SiO 2 was deposited as the insulating material 105, about 0.2 µm thick, with the sputtering method, and then the injection portion was activated with the heat treatment at 850°C for 10 seconds. (5) Gold (Au)/chromium (Cr) was vacuum evaporated onto a back surface of the high density p-type semiconductor substrate 701 to form an ohmic junction electrode 706 with the heat treatment at 350°C for 5 minutes. (6) Aluminum was vacuum evaporated on the insulating film 705, and the opening portion for the electrode wiring 707 and the insulating film 705 was formed, with the normal photolithography method. (7) An 8nm thick Schottky electrode 708 was formed within the opening, with the electron beam evaporation and the normal photolithography, by selecting tungsten (W) as the material for forming the Schottky barrier junction to the p-type semiconductor region 704 and the high density p-type semiconductor region 703 made of p-type GaAs semiconductor. The semiconductor electron emission device thus fabricated was installed within a vacuum chamber within which the degree of vacuum was retained at about 1x10 -7 Torr, and a voltage of 7V was applied between the ohmic junction electrode 706 and the electrode wiring 709 from a power source 709, so that the electron emission of about 15pA was observed from the surface of the Schottky electrode 708 above the high density p-type semiconductor region 703. If the applied voltage (device voltage) was sequentially increased up to 10V, the electron emission amount (emission current) was also sequentially increased up to about 100pA, as shown in Fig. 3. It is conceived that a depletion layer 710 spreads about 0.04 µm beyond a Schottky barrier interface with the Schottky electrode 708 in the high density p-type semiconductor region 703, when this device voltage is applied. As the peripheral portion is protected by thick depletion layer formed by the pn junction, the electric field is most concentrated on a portion of the high density p-type semiconductor region 703, in which region the avalanche breakdown occurs efficiently. Also, the electric characteristics are shown in Fig. 4, in which a semiconductor electron emission device, fabricated by changing only the Be density of the p-type semiconductor region 704 which is a second p-type semiconductor region for supplying carriers to the high density p-type semiconductor region 703 which is a first p-type semiconductor region to 3x10 18 cm -3 in the fabrication conditions as above described, was installed within the same vacuum chamber. If a device voltage of 5V was applied to the semiconductor electron emission device from the power source 709, the electron emission (emission current) of about 20pA was observed from the surface of the Schottky electrode 708 above the high density p-type semiconductor region 703. If the device voltage was sequentially increased up to 7V, the emission current was also sequentially increased up to about 100pA. In this example, by providing another electrode via the insulating film on the electrode wiring 707, and setting a potential between the electrode and the electrode wiring 707, it is possible to regulate the flying direction and the kinetic energy of electrons emitted from the electron emission portion. In this way, it is possible to define the current/voltage characteristics of the semiconductor emission device by changing the carrier density in the p-type semiconductor region 704. Also, it is possible to decrease the series resistance of the device and make the operating speed faster by decreasing the resistance of the p-type semiconductor region 704. In the above examples, GaAs was used as the semiconductor, but other semiconductor materials such as Si, Cc, GaP, AlAs, GaAsP, AlGaAs, SiC, BP, AlN, or diamond are applicable in principle, and particularly, the material of indirect transition type and having a wide band gap is preferable. The material for the ohmic junction electrode 706 requires to form the Schottky barrier junction with the p-type semiconductor, and may be, for example, Al, Au or LaB 6 , in addition to tungsten (W), as commonly well known. However, since the electron emission efficiency increases with smaller work function of the electrode surface, as previously described, the electron emission efficiency can be increased by coating a material of low work function such as Cs on the surface, when the work function of the material is large. (Example 5) Fig. 8 is a cross-sectional view showing a semiconductor electron emission device of pn junction type in the fifth example of the present invention. The semiconductor electron emission device in this example is a pn junction device having an electron emission portion in which a cylindrical high density p-type semiconductor region 803 which is a first p-type semiconductor region and a p-type semiconductor conductor region 804, which is a second p-type region, for supplying carriers to the high density p-type semiconductor region 803 are disposed in contact with each other on a substantial central portion of a high density p-type semiconductor substrate 801, a low density n-type semiconductor region 802 which is a second n-type semiconductor region is disposed concentrically outwardly around the high density p-type semiconductor region 803 and the p-type semiconductor region 004, and a high density n-type semiconductor region 805 which is a first n-type semiconductor region for forming the pn junction with the high density p-type semiconductor region 803 is disposed thereon. Further, the semiconductor electron emission device in this example is provided with an ohmic junction electrode 807 to the high density p-type semiconductor substrate 801, an ohmic junction electrode 808 to the high density n-type semiconductor region 805, and a low work function coating 809 formed on the high density n-type semiconductor region 805, for applying a reverse voltage to the pn junction, the reverse voltage being applied from a power source 810. Note that the ohmic junction electrode 808 is in contact with the high density n-type semiconductor region 805 via an insulating film 806 formed along an edge portion of the surface on the low density p-type semiconductor region 802 in order to prevent the short circuit with the low density n-type semiconductor region 802. In the figure, 811 shows the shape of a depletion layer end in a state where the reverse voltage is applied. A manufacturing process of the semiconductor electron emission device of pn junction type will be described specifically by way of an example. (1) A low density n-type GaAs semiconductor layer having a Si density of 5x10 15 cm -3 or less was grown, 0.6 µm thick, on the high density p-type semiconductor substrate 801 (GaAs) doped with Zn and having a carrier density of 5x10 18 cm -3 , with the MBE method. This low density n-type GaAs semiconductor layer becomes the low density n-type semiconductor region 802 later. (2) Be ions accelerated to 40keV were injected into the region corresponding to the high density p-type semiconductor region 803, with the FIB injection method, so that the Be density is 2x10 18 cm -3 substantially uniformly. (3) Be ions accelerated to 160keV were also injected into the region corresponding to the p-type semiconductor region 804, with the FIB injection method, so that the high density p-type semiconductor substrate 801 is reached and the Be density is 5x10 17 cm -3 . (4) Si ions accelerated to 10keV were injected into the region corresponding to the high density n-type semiconductor region 805, with the normal ion injection method, so that the Si density is about 1x10 19 cm -3 into a depth of 10nm. As this high density n-type semiconductor region 805 is a region through which electrons produced with the avalanche breakdown in the high density p-type semiconductor region 803 beneath it pass, the energy loss due to the scattering increases if it is formed thick, deteriorating the electron emission efficiency. Thus, it is desirable to have the thickness of 10nm or less by making the ion injection at a low acceleration voltage, or etching the surface after the ion injection. The electron emission portion consisting of the pn junction with the high density p-type semiconductor region can be formed by forming this high density n-type semiconductor regoin 805. (5) SiO 2 was deposited as the insulating film 806, about 0.2 µm thick, with the sputtering method, and then the injection portion was activated with the heat treatment at 850°C for 10 seconds. (6) Au/Cr as the ohmic junction electrode 807 to the high density p-type semiconductor substrate 801, and Au/Ge as the ohmic junction electrode 808 to the high density n-type semiconductor region 805 were vacuum evaporated, respectively, on a back surface of the high density p-type semiconductor substrate 801, the normal photolithoetching was made, and then the alloying heat treatment was performed at 350°C for five minutes. (7) Cesium (Cs) which was a material of low work function was vacuum evaporated substantially in a monoatomic layer on an exposed portion of the high density n-type semiconductor region 805 in the ultrahigh vacuum to obtain the low work function coating 809. The semiconductor electron emission device thus fabricated was installed within a vacuum chamber which was retained at about 1x10 -11 Torr or less, and a device voltage of 6V was applied between the ohmic junction electrodes 807 and 808 from the power source 810, so that the electron emission of about 0.1 µA was observed from the surface of the low work function coating 809 (Cs) above the high density n-type semiconductor region 805. In this way, with this example, it is possible to form the semiconductor electron emission device of pn junction type having the same electron emission characteristics as a conventional semiconductor electron emission device, with the simplified manufacturing process. Also, with this example, like the previous fourth example, by setting a potential between the ohmic junction electrode 808 and another electrode, it is possible to regulate the flying direction and the kinetic energy of electrons. (Example 6) Fig. 9 is a view showing a multi semiconductor electron emission device of Schottky barrier type provided with a plurality of electron emission portions, in a sixth example of the present invention, in which (a) is a plan view thereof, and (b) is a cross-sectional view taken along the line A-A' of (a). The multi semiconductor electron emission device of this example is provided with four electron emission portions 900A, 900B, 900C and 900D, like a matrix, on a high density p-type semiconductor region 902 formed on a semiconductor substrate 901. Since the electron emission portions 900A, 900B, 900C and 900D all have the same constitution, the electron emission portion 900A will be exemplified. The electron emission portion 900A has the same constitution as in the previous fourth example, comprising a high density p-type semiconductor region 904A which is a first p-type semiconductor region, a p-type semiconductor region 905A which is a second p-type semiconductor region disposed in contact with the high density p-type semiconductor region 904A for supplying carriers to the high density p-type semiconductor conductor region 904A, a low density n-type semiconductor region 903 which is a n-type semiconductor region located around the high density p-type semiconductor region 904A and the p-type semiconductor region 905A, and a Schottky electrode 910A for forming the Schottky barrier junction with the high density p-type semiconductor region 904A. Further, it is provided with an ohmic junction electrode 908 to the high density p-type semiconductor region 902 and an electrode wiring 909A to the Schottky electrode 910A for applying a reverse voltage to the Schottky barrier junction. The electrode wiring 909A is in contact with the Schottky electrode 910A on an insulating film 907 formed on the low density n-type semiconductor region 903 in order to prevent the short circuit with each p-type semiconductor region as previously described. The ohmic junction electrode 908 is connected via the high density p-type semiconductor region 906 to the high density p-type semiconductor region 902, and in this example, provided at two positions as shown in Fig. 9A. This ohmic junction electrode 908 is a common electrode to the four electron emission portions 900A, 900B, 900C and 900D. The Schottky electrode 910A may be connected in common with Schottky electrodes 910B, 910C and 910D (910C, 910D are not shown) of other electron emission portions 900B, 900C and 900D, in which case as the ohmic junction electrode 908 is commonly used, the four electron emission portions 900A, 900B, 900C and 900D are controlled simultaneously for the electron emission operation. On the other hand, when the Schottky electrodes 910A, 910B, 910C and 910D of the electron emission portions 900A, 900B, 900C and 900D are independent of each other, the control for each electron emission portion 900A, 900B, 900C and 900D is allowed. Further, on the device surface formed with the four electron emission portions 900A, 900B, 900C and 900D constituted as previously described, the portion except for the ohmic junction electrode 908 is covered via a supporting member 911 made of insulating material with a gate 912 composed of metallic film provided on the insulating layer 907. This gate 912 is formed with opening portions 913A, 913B, 913C and 913D at positions corresponding to and upward of the electron emission portions 900A, 900B, 900C and 900D, respectively, whereby electrons emitted from each electron emission portion 900A, 900B, 900C and 900D are passed through the opening portions 913A, 913B, 913C and 913D outward. A manufacturing process of the multi semiconductor electron emission device will be described specifically by way of an example. (1) After a reversal pattern was formed on an undoped, semi-insulating semiconductor substrate (GaAs) 901 having a density of impurities of 1x10 14 cm -3 or less, with the normal photolithography, the normal ion injection was made so that the Be density was 3x10 18 cm -3 . And with the heat treatment at 850°C for 10 seconds, the stripe-like high density p-type semiconductor region 902 was formed longitudinally in the X direction. (2) With the MBE method, GaAs was grown, 0.6 µm thick, as the low density n-type semiconductor region 903 having a Si density of 1x10 15 cm -3 . (3) Be ions accelerated to 40keV and 160keV were injected, with the FIB method, into the regions corresponding to the high density p-type semiconductor regions 904A, 904B, 904C and 904D to have a Be density of 2x10 18 cm -3 the regions corresponding to the p-type semiconductor regions 905A, 905B, 905C and 905D to have a Be density of 5x10 17 cm -3 , respectively. (4) Be ions were injected, with the FIB injection method, into the region corresponding to the high density p-type semiconductor region 906, so that the Be density is 3x10 18 cm -3 substantially uniformly from the low density n-type semiconductor region 903 to the high density p-type semiconductor region 902. The MBE growth processes of (1) to (4) and the FIB injection process are carried out without exposure to the atmosphere, because respective apparatuses are connected through vacuum tunnel. Further, with the heat treatment at 850°C for 10 seconds, the high density p-type semiconductor regions 904A, 904B, 904C and 904D, the p-type semiconductor regions 905A, 905B, 905C and 905D, and high density p-type semiconductor region 906 were activated. (5) After SiO 2 was deposited, 0.2 µm thick, as the insulating film 907, on the low density p-type semiconductor region 903 into which the ion injection was made as previously described, with the normal sputtering method, respective openings were formed, with the normal photolithoetching method. (6) Au/Cr was vacuum evaporated on the high density p-type semiconductor region 906 to form the ohmic junction electrode 608 with the heat treatment at 350°C for 5 minutes. (7) Aluminum (AL) as the electrode wirings 909A, 909B, 909C, 909D, and tungsten (W) as the material for forming the Schottky barrier junction to the high density p-type semiconductor regions 904A, 904B, 904C, 904D, were deposited with the electron beam source evaporation, 0.5 µm and 8nm thick, respectively, to form the electrode wirings 909A, 909B, 909C, 909D and the Schottky electrodes 910A, 910B, 910C, 910D, with the normal photolithoetching method. (7) For the supporting member 911 and the gate 912 made of insulating material, SiO 2 and tungsten (W) were sequentially deposited with the vacuum evaporation method, respectively, and the opening portions 913A, 913B, 913C, 913D were formed with the normal photolithoetching method. With the above processes (1) to (8), the multi semiconductor electron emission device having the four electron emission portions 900A, 900B, 900C, 900D were completed. In the same way, a multi semiconductor electron emission device having the electron emission portions arranged like a matrix, 20 in the X direction, and 10 in the Y direction, was fabricated, and installed within a vacuum chamber within which the degree of vacuum was at about 1x10 -7 Torr. If a reverse voltage of 7V was applied to the entire area of the electron emission portions, the electron emission of about 20nA in total was observed. Also, by applying a reverse voltage only between arbitrary ohmic junction electrode 908 and arbitrary electrode wiring 909, it was observed that only device located at its intersection emitted electrons. In this way, with this example, it is possible to form an electron emission device having the same electron emission characteristics as a conventional multi semiconductor electron emission device and simply fabricated. With the semiconductor electron emission device of the present invention: (1) A region of small resistivity is provided in the vicinity of the high density p-type semiconductor region bringing about the avalanche breakdown to use it for an electrode for the supply of electrons. Thereby, it is possible to reduce the resistance of electron supply passage to the high density p-type semiconductor region. (2) The region of small resistivity is formed of, for example, a p-type semiconductor having a high carrier density. Thereby, all the portion except for the metallic electrode for forming the Schottky barrier junction can be formed of the semiconductor, so that the simplified fabrication process can be accomplished without exerting any bad effect on the fundamental characteristics of the device. That is, according to the present invention, it is possible to make faster the operating speed of the device by providing the region of small resistivity in the vicinity of the high density p-type semiconductor region bringing about the avalanche breakdown. Further, it is possible to avoid the breakage or deterioration of the device due to the Joule heating in the vicinity of the high density p-type semiconductor region bringing about the avalanche breakdown, and reduce the fluctuation in the electron emission amount. The present invention can exhibit the following effects owing to the constitution as above described. (1) Since the second p-type semiconductor region of a low density and the third p-type semiconductor region of a further lower density are formed outside the first p-type semiconductor region having a high carrier density, the shape of depletion layer can be made such that the electric field is most concentrated on the first p-type semiconductor region. Thereby, the avalanche breakdown will occur efficiently only in the first p-type semiconductor region, and the guard ring structure and its ohmic junction electrode which were provided in the conventional arts as previously described are unnecessary, so that the device structure and the manufacturing process can be simplified. (2) Since the series resistance of the device can be smaller by providing a higher carrier density in the fourth p-type semiconductor region for supplying carriers to the first p-type semiconductor region than in the second p-type semiconductor region located around the first p-type semiconductor region, it is possible to provide a semiconductor electron emission device having a faster operating speed. (3) Since the high density p-type semiconductor region defining the avalanche amplification and the high density semiconductor region or metallic electrode for supplying electrons are directly in contact, the product RC between a resistance R of the region leading to the depletion layer bringing about the avalanche amplification and a capacitance C of the depletion layer can be reduced, so that the operating speed of the device determined by the product RC can be increased. Also, as the resistance R can be reduced, it is possible to aviod the heat generation or deterioration of the device due to the Joule heating therein or suppress the fluctuation in the electron emission amount.

Claims: A semiconductor electron emission device having an electron emission portion comprised of a Schottky barrier junction between a metal material or metallic compound material (108) and a semiconductor for emitting electrons (e - ) from a solid surface thereof, characterized in that said electron emission portion comprises: a first p-type semiconductor region (105) bringing about the avalanche breakdown by forming said Schottky barrier junction; a second p-type semiconductor region (103) located around said first p-type semiconductor region (105); a third p-type semiconductor region (102) located around said second p-type semiconductor region (103); and a fourth p-type semiconductor region (104) for supplying carriers to said first p-type semiconductor region (105). A device according to claim 1, characterized in that the density relation between carrier densities of said first to fourth p-type semiconductor regions (102 to 105) is such that (first p-type semiconductor region 105) > (fourth p-type semiconductor region 104) > (second p-type semiconductor region 103) > (third p-type semiconductor region 102). A device according to claim 1, characterized in that the density relation between carrier densities of said first to fourth p-type semiconductor regions is such that (fourth p-type semcoiductor region) >/= (first p-type semiconductor region) > (second p-type semiconductor region) > (third p-type semiconductor region). A semiconductor electron emission device having an electron emission portion comprised of a pn-junction between an n-type semiconductor and a p-type semiconductor for emitting electrons from a solid surface thereof, characterized in that said electron emission portion comprises: an n-type semiconductor region (506) located on said solid surface for forming said pn-junction; a first p-type semiconductor region (505) bringing about the avalanche breakdown by forming said pn-junction with said n-type semiconductor region (506); a second p-type semiconductor region (503) located around said first p-type semiconductor region (505); a third p-type semiconductor region (502) located around said second p-type semiconductor region (503); and a fourth p-type semiconductor region (504) for supplying carriers to said first p-type semiconductor region. A device according to claim 4, characterized in that the density relation between carrier densities of said first to fourth p-type semiconductor regions (502 to 505) and said n-type semiconductor region (506) is such that (n-type semiconductor region 506) > (first p-type semiconductor region 505) > (fourth p-type semiconductor region 504) > (second p-type semiconductor region 503) > (third p-type semiconductor region 502). A device according to claim 4, characterized in that the density relation between carrier densities of said first to fourth p-type semiconductor regions and said n-type semiconductor region is such that (n-type semiconductor region 506) > (fourth p-type semiconductor region 504) >/= (first p-type semiconductor region 505) > (second p-type semiconductor region 503) > (third p-type semiconductor region 502). A semiconductor electron emission device having an electron emission portion comprised of a Schottky barrier junction between a metal material of metallic compound material and a semiconductor for emitting electrons from a solid surface thereof, characterized in that said electron emission portion comprises: a first p-type semiconductor region (703) bringing about the avalanche breakdown by forming said Schottky barrier junction; a second p-type semiconductor region (704), located in contact with said first p-type semiconductor region (703), for supplying carriers to said first p-type semiconductor region (703); and an n-type semiconductor region (702), located around said first p-type semiconductor region (703), for forming a pn-junction with said first p-type semiconductor region (703), as well as forming said Schottky barrier junction with said metal material or metallic compound material (708). A device according to claim 7, characterized in that the density relation between carrier densities of said first and second p-type semiconductor regions (703, 704) and said n-type semiconductor region (702) is such that (first p-type semiconductor region 703) > (second p-type semiconductor region 704) > (n-type semiconductor region 702). A device according to claim 7, characterized in that the density relation between carrier densities of said first and second p-type semiconductor regions (703, 704) and said n-type semiconductor region (702) is such that (second p-type semiconductor region 704) >/= (first p-type semiconductor region 703) > (n-type semiconductor region 702). A semiconductor electron emission device having an electron emission portion comprised of a pn-junction between an n-type semiconductor and a p-type semiconductor for emitting electrons from a solid surface thereof, characterized in that said electron emission portion comprises: a first n-type semiconductor region (805) located on a solid surface; a first p-type semiconductor region (803) bringing about the avalanche breakdown by forming said pn-junction with said first n-type semiconductor region (805); a second p-type semiconductor region (804), located in contact with said first p-type semiconductor region (803), for supplying carriers to said first p-type semiconductor region (803); and a second n-type semiconductor region (802), located around said first p-type semiconductor region (803), for forming the pn-junction with said first p-type semiconductor region (803). A device according to claim 10, characterized in that the density relation between carrier densities of said first and second p-type semiconductor regions (803, 804) and said first and second n-type semiconductor regions (802, 805) is such that (first n-type semiconductor region 805) > (first p-type semiconductor region 803) > (second p-type semiconductor region 804) > (second n-type semiconductor region 802). A device according to claim 10, characterized in that the density relation between carrier densities of said first and second p-type semiconductor regions (803, 804) and said first and second n-type semiconductor regions (802, 805) is such that (first n-type semiconductor region 805) > (second p-type semiconductor region 804) >/= (first p-type semiconductor region 803) > (second n-type semiconductor region 802). A device according to claims 1 to 6, characterized in that said first p-type semiconductor regions (105; 505) and said fourth p-type semiconductor region (104; 504) of said electron emission portion are in contact. A device according to any of the preceding claims 1 to 12, characterized in that an electrode for defining the flying direction of electrons emitted from said electron emission portion is provided in the vicinity of said solid surface. A device according to any of the preceding claims 1 to 12, characterized in that an electrode for defining the kinetic energy of electrons emitted from said electron emission porton is provided in the vicinity of said solid surface. A device according to any of the preceding claims 1 to 3 and 7 to 9, characterized in that on the surface of said electron emission portion made of a metal material or metallic compound material forming the Schottky barrier junction, a material having a different work function from said metal material or metallic compound material is deposited. A device according to any of the preceding claims 1 to 12, characterized in that said electron emission portion is formed on a semiconductor substrate. A device according to any of the preceding claims 1 to 12, characterized in that a plurality of electron emission portions (600A to 600D) are provided on the same substrate. A device according to claim 18, characterized in that said same substrate is a semiconductor substrate. A device according to claim 18, characterized in that a plurality of electron emission portions (600A to 600D) are electrically independent to emit electrons separately. A device according to any of the preceding claims 1 to 12, characterized in that said p-type semiconductor regions or n-type semiconductor regions of the electron emission portion are formed with the ion injection method.

Inventors: KANEKO NORIO, OKUNUKI MASAHIKO, TSUKAMOTO TAKEO, WATANABE NOBUO, KANEKO, NORIO, OKUNUKI, MASAHIKO, TSUKAMOTO, TAKEO, WATANABE, NOBUO, KANEKO, NORIO, C/O CANON KABUSHIKI KAISHA, OKUNUKI, MASAHIKO, C/O CANON KABUSHIKI KAISHA, TSUKAMOTO, TAKEO, C/O CANON KABUSHIKI KAISHA, WATANABE, NOBUO, C/O CANON KABUSHIKI KAISHA
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1992
Main classification: H01J1
IPC codes: H01J1