ALUMINUM ALLOY WIRING LAYER, MANUFACTURING THEREOF, AND ALUMINUM ALLOY SPUTTERING TARGET

Abstract: An aluminum alloy wiring layer includes only scandium of 0.01-1.0 weight %, or includes scandium of 0.01-1.0 weight % and at least one kind of element of 0.1-3.0 weight % selected from the group comprising silicon, titanium, copper, boron, hafnium and rare earth elements (but scandium is excluded). The residual part of the aluminum alloy wiring layer is aluminum of 99.99 % or more in purity. This wiring layer, its manufacturing method and an aluminum alloy sputtering target used therein are suitable to large scale integrated circuits of the next generation.

Description: TECHNICAL FIELD The present invention relates to an aluminum alloy wiring layer, a method of producing the same and an aluminum alloy sputtering target used for producing the same. BACKGROUND ART Semiconductor logic devices including a microprocessor and semiconductor memory devices represented by a DRAM are inevitable as a central processing unit, an internal memory or an external memory of a computer and the like. In the process for producing such a large-scale integrated circuit, development of wiring technique for connecting several million to several ten million semiconductor transistors in one chip with high reliability is very important. At present, DRAM's of 16 megabits using wiring layers having a width of 0.7 to 0.8 µm and composed of an aluminum alloy material obtained by adding a small amount of silicon (Si) or a small amount of silicon and copper (Cu) to aluminum (Al), are ready for full-scale mass production. These wiring layers are produced by forming a thin film of about 1 µm in thickness on a silicon wafer by sputtering and forming a minute wiring pattern to the thin film by lithography. In producing these wiring layers, an Al-Si alloy target containing about 1 wt.% of Si or an Al-Si-Cu alloy target containing about 1 wt.% of Si and about 0.5 wt.% of Cu is used. with the recent development of advanced large-scale integrated circuits following DRAM's of 64 megabits and with the recent development of wiring layers having a narrower width (e.g., 0.3 to 0.6 µm) aimed at increasing the integration and the performance of semiconductor integrated circuits, a wiring technique having higher reliability has been demanded. Al-Si alloy wiring layers or Al-Si-Cu alloy wiring layers used at present, however, have low reliability because an additive such as silicon precipitate is used during the manufacturing process and remains on the circuit, or breakage of wire is frequently caused thereby. The breakage of an aluminum wire is ascribed to phenomena called electromigration and stress migration. The electromigration is a phenomenon in which metal ions are moved in wiring in accordance with an electric field by electric currents in the wiring and this effect causes voids on the grain boundary, thereby breaking the wire; The stress migration is a phenomenon of breakage of wire caused by which the tensile stress is produced on the aluminum wire in accordance with the difference in the thermal expansion between the aluminum wire and the barrier film of SiN or the like laminated, thereby producing voids on the grain boundary. JP-A-1289140 discloses an aluminum alloy wiring layer comprising an alloy of aluminum as the main component and an element which is different from aluminum and whose amount relative to aluminum is small, and wherein said different element is one or more element selected from the lanthanide elements, yttrium and scandium. EP-A-0249256 discloses a semiconductor device with an aluminum interconnect layer containing a small percentage of vanadium. DISCLOSURE OF THE INVENTION As a result of studies undertaken by the present inventors so as to solve the above-described problems in the prior art, and to provide a wiring layer which scarcely causes breakage of wire and which has a low electrical resistance, the following has been found. Scandium (Sc) combines with Al to form a minute intermetallic compound (ScAl 3 ), which disperses in Al, thereby producing a wire breakage preventing effect. ScAl 3 is different from the intermetallic compound CuAl 2 which is formed by combining Cu with Al, thereby not becoming coarse by the the heat treatment (400 to 450°C) which is inevitable after the formation of a thin film. The heat treatment herein means to an anealing treatment carried out for the purpose of making stable a metal thin film from the amorphous thin film and enhancing the adhesiveness thereof. The present invention has been achieved on the basis of this finding. Subject matter of the present invention is an aluminum alloy wiring layer according to Claim 1. Embodiments thereof are subject matter of Claims 2 and 3. Further subject matter is a process according the Claim 4 for producing an aluminum alloy wiring layer of the present invention. Preferred embodiments of this process are subject matter of Claims 5 and 6. Still a further subject matter is an aluminum alloy sputtering target according to Claim 7. Embodiments of this aluminum alloy sputtering target are subject matter of Claims 8 and 9. The present invention will be explained in detail hereinunder. In an aluminum alloy sputtering target of the present invention, a high-purity aluminum having a purity of not less than 99.99% is used as a base metal. Such a high-purity aluminum can be obtained by electrolytic refining, fractional crystallization, fractional distillation, crystallization or the like. In the present invention, 0.01 to 1.0 wt.% of scandium, or 0.01 to 1.0 wt.% of scandium and 0.01 to 3.0 wt.% of at least one element selected from the group consisting of silicon, titanium, copper, boron, hafnium and rare-earth elements other than scandium is added to such a high-purity aluminum. As the rare-earth elements, yttrium, lanthanum, cerium, praseodymium, neodymium, promethyum, samarium, europium, gadolinium and terbium may be exemplified. If the amounts of scandium contained therein and the amount of specific element contained together with scandium are out of the above-described ranges, the object of the present invention does not become to be attained. The particularly preferred scandium content is in the range of 0.05 to 0.6 wt.%. In the present invention, the aluminum alloy is produced by adding a predetermined amount of scandium, or scandium and specific element to a high-purity aluminum, casting the resultant mixture to obtain an ingot containing not more than 10 ppm of inevitable impurities, and applying the ingot to a heat-treatment, rolling-treatment, and reheat-treatment in order so as to form a material having uniform fine crystals. The conditions for the respective treatments are not specified, but heat-treatment is generally carried out at 500 to 550°C for 10 to 15 hours, rolling-treatment is generally carried out at a reduction ratio of 50 to 90%, and reheat-treatment is generally carried out at 400 to 450°C for 30 to 60 minutes. The aluminum alloy material obtained in this way is cut into a shape (e.g., circle, rectangle, and doughnut-like shape in which the central part of the above-mentioned shapes is bored) in accordance with a sputtering apparatus, thereby producing a sputtering target. An aluminum alloy wiring layer according to the present invention is produced by sputtering using the thus-obtained aluminum aloy sputtering target comprising 0.01 to 1.0 wt.% of scandium and the balance aluminum having a purity of not less than 99.99%, or an aluminum alloy target comprising 0.01 to 1.0 wt.% of scandium, 0.01 to 3.0 wt.% of at least one element selected from the group consisting of silicon, titanium, copper, boron, hafnium and rare-earth elements other than scandium and the balance aluminum having a purity of not less than 99.99%. The known sputtering apparatus and sputtering conditions may be adopted for the sputtering. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a graph showing the measured resistivities of the thin films obtained in Example and Comparative Example, wherein the ordinate represents a resistivity (µΩm) and the abscissa represents a wafer temperature (°C); the curves (1) to (4) show the samples 1 to 4, respectively, in Example, and (11) and (12) show the samples 11 and 12 respectively in Comparative Example (the same in Figs. 2 and 3). Fig. 2 is a graph showing the results of the electromigration test of the thin films obtained in Example and Comparative Example, wherein the ordinate represents a disconnection time (hour) and the abscissa represents a wafer temperature (°C). Fig. 3 is a graph showing the results of the stress migration test of the thin films obtained in Example and Comparative Example, wherein the ordinate represents the number of voids and the abscissa represents a wafer temperature (°C). Fig. 4 is an explanatory view of the entire part of the wiring pattern for the electromigration test. Fig. 5 is an enlarged explanatory view of the main part of the wiring pattern for the electromigration test shown in Fig. 4. Fig. 6 is an explanatory view of the wiring pattern for the stress migration test. Fig. 7 is an explanatory view of the wiring pattern for the stress migration test. Fig. 8 is an explanatory view of a heating plate used for the stress migration test. In Figs. 7 and 8, the symbol B represents a wedge-shaped void, and the reference numeral 1 represents a heating plate, the reference numeral 2 represents a presser plate, the reference numeral 3 represents a heater and the reference numeral 4 represents a wafer. BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be explained in more detail with reference to the following example, but it is to be understood that the present invention is not restricted thereto. The measurement of electrical resistance, the electromigration test and the stress migration test in the following example and comparative example were carried out by the following methods. <Measurement of electrical resistance> The sheet resistance was measured by an ohmmeter, and after a part of the thin film is dissolved and removed by etching, the thickness of the thin film was measured by a micro step hight meter. The resistivity was obtained from the follow-ing formula, and this was expressed as the electrical resistance. Resistivity = (sheet resistance)x(thickness of the thin film) <Electromigration test> A wafer with a wiring pattern formed thereon was brought into close contact with a heating plate and heated to 200°C. Electrodes were connected between wiring patterns (1) and (2) shown in Figs. 4 and 5. An ohmmeter was con-nected between (3) and (4). Disconnection was detected applying a direct current having a current density of 2 x 10 7 A/cm 2 between the electrodes, and the time elapsed until the disconnection was measured. Fig. 4 is an explanatory view of the entire wiring pattern for the electromigration test, and Fig. 5 is an enlarged explanatory view of the main part of the wiring pattern shown in Fig. 4. <Stress migration test> A wafer (4) with a wiring pattern formed thereon was brought into close contact with a heating plate (1) shown in Fig. 1 having a convex central portion protruding from the peripheral portion by 0.2 mm, so that the wafer (4) was curved and a tensile stress was applied to the wire. Thereafter, the wafer (4) was heated at 400°C for 5 minutes, and the number of voids produced at the portion represented by the wiring pattern (E) in Fig. 6 was counted. Only the number of voids (B) produced in the shape of a wedge on the side surfaces of the wiring layer and having a length of not less than 1 µm was measured. Fig. 8 is an explanatory view of a heating plate used for the stress migration test. In Fig. 8, the reference numeral 1 represents a heating plate, the reference numeral 2 represents a presser plate, the reference numeral 3 represents a heater and the reference numeral 4 represents a wafer, and the symbol B represents a wedge-shaped void. Example and Comparative Example A predetermined amount of metal element shown in Table 1 was added to a refined high-purity aluminum having a purity of not less than 99.999%, and the molten material was cast. The ingot obtained was heat-treated at 525 °C for 12 hours, rolled at a reduction ratio of 70%, and then reheated at 425°C for 45 minutes, thereby obtaining a material having uniform fine crystals. The material obtained was machined to produce a discal sputtering target 250 mm in diameter and 15 mm in thickness. Each sputtering target was mounted on a magnetron sputtering apparatus MLX-3000 (produced by Ulvac Corp.) and a thin film of 1 µm in thickness was formed on the surface of a silicon wafer 6 inches in diameter with an SiO 2 thin film having 0.2 µm in thickness formed thereon. Thereafter, the silicon wafer was heat-treated at 450°C for 15 minutes by lamp heating. The magnetron sputtering apparatus was operated under the following conditions. Base pressure degree of vacuum : 6 x 10 -8 torr Ar pressure : 4 x 10 -3 torr Sputtering electric power: 5 Kw Wafer heating temperature: 150°C, 200°C, 250°C These wafer heating temperatures were the condition adopted for carrying out an acceleration test. Each thin film obtained was subjected to the measurement of the electrical resistance, an electromigration test and a stress migration test. The results are shown in Figs. 1 to 3. Fig. 1 is a graph showing the measured electrical resistances, Fig. 2 is a graph showing the results of the electromigration test, and Fig. 3 is a graph showing the results of the stress migration test. In these drawings, the curves (1) to (4) and (11) and (12) correspond to the sample numbers in Table 1. The results of the measurement of the electrical resistances, the electromigration test and the stress migration test at a wafer heating temperature of 200°C are shown in Table 1. INDUSTRIAL APPLICABILITY The aluminum alloy sputtering target according to the present invention has a low resistivity and takes a long time until disconnection generates. In addition, the number of voids produced is small. Thus, it is excellent as a wiring material. The wiring layer using the aluminum alloy sputtering target according to the present invention has a great resistance to electromigration and stress migration, and has a high reliability, so that it is suitable as a wiring layer for an advanced large-scale integrated circuit.

Claims: An aluminum alloy wiring layer comprising 0.01 to 1.0 wt.% of scandium and the balance aluminum having a purity of not less than 99.99 %. An aluminum alloy wiring layer according to claim 1, characterized in that it additionally contains 0.01 to 3.0 wt.% of at least one element selected from the group consisting of silicon, titanium, copper, boron, hafnium and rare-earth elements other than scandium. An aluminum alloy wiring layer according to any one of claims 1 and 2, characterized in that the scandium content is 0.05 to 0.6 wt.%. A process for producing an aluminum alloy wiring layer comprising sputtering an aluminum alloy target composed of 0.01 to 1.0 wt.% of scandium and the balance aluminum having a purity of not less than 99.99 %. A process according to claim 4, characterized in that the aluminum alloy target additionally is composed of 0.01 to 3.0 wt.% of at least one element selected from the group consisting of silicon, titanium, copper, boron, hafnium and rare-earth elements other than scandium. A process for producing an aluminum alloy wiring layer according to any one of claims 4 and 5, characterized in that the scandium content in said aluminum alloy target is 0.05 to 0.6 wt.% An aluminum alloy sputtering target comprising 0.01 to 1.0 wt.% of scandium and the balance aluminum having a purity of not less than 99.99 %. An aluminum alloy sputtering target according to claim 7, characterized in that it additionally comprises 0.01 to 3.0 wt.% of at least one element selected from the group consisting of silicon, titanium, copper, boron, hafnium and rare-earth elements other than scandium. An aluminum alloy sputtering target according to any one of claims 7 and 8 wherein the scandium content is 0.05 to 0.6 wt.%.

Inventors: TAKEMURA KAZUNARI, UEDA TADAO, TAKEMURA, KAZUNARI, UEDA, TADAO, TAKEMURA, KAZUNARI 13-9, SANAI-CHO, UEDA, TADAO 490, FUKUDA-CHO
Applicants: RYOKA MATTHEY CORP, RYOKA MATTHEY CORPORATION
Application year: 1992
Main classification: H01L21
IPC codes: C22C21, H01L23