Video-audio digital recording/reproducing apparatus

Abstract: A video-audio digital recording and reproducing apparatus, in which the recording system has an interleave RAM for storing the blocked video signal in a unit of a block, and an encoding circuit for compressing and encoding the video signal read out from the interleave RAM, and the reproducing system has a decoding circuit for expanding and decoding the compressed video data, and a deinterleave RAM for storing video data outputted from the decoding circuit. The reading of blocks from the interleave RAM is randomly conducted. The sequence of writing blocks into the deinterleave RAM is the same as that of reading blocks from the interleave RAM. In this recording and reproducing apparatus, blocks having a large amount of compressed data are scattered and errors in the decoding process due to burst errors are also scattered, thereby enabling compressed video data to be recorded on a recording medium with an improved efficiency.

Description: This invention relates to a video-audio digital recording and reproducing apparatus in which an analog video signal and an analog audio signal are converted into digital signals to be recorded on a recording medium and recorded digital signals are reproduced in an analog form. A video-audio digital recording and reproducing apparatus is known in the art which can record the analog video signal and the analog audio signal in a digital form on the recording medium such as a magnetic tape, a magnetic disk, an optical disk or the like and reproduce digital signals recorded on such a recording medium and convert them into analog signals. Fig. 1 of the accompanying drawings is a block diagram illustrating the configuration of a prior art video-audio digital recording and reproducing apparatus which is disclosed in Japanese Patent Application Laid-Open No. 61-61,275. In Fig. 1, reference numerals 1 and 2 respectively indicate a video analog-digital (A/D) converter which converts the analog video signal into the digital signal, and an audio A/D converter which converts the analog audio signal into the digital signal. Video signals which has been converted into the digital signal by the video A/D converter 1 is supplied to a C2 encoder 3. The C2 encoder 3 derives a C2 parity in the error correction encoding of the video signal and adds it to the video signal. The video signal to which the C2 parity is added is then sent to an interleave random-access memory (RAM) 4 which in turn interleaves (shuffles) the input video data. The audio signal which has been converted into the digital signal by the audio A/D converter 2 is supplied to an audio error correction encoder 5. The audio error correction encoder 5 encodes the digital audio signal for error correction. The video data which has been shuffled by the interleave RAM 4 and the audio data which has been encoded by the audio error correction encoder 5 are synthesized to each other by an adder, and then the synthesized data is supplied to a C1 encoder 6. The C1 encoder 6 derives a C1 parity for the synthesized data and adds it to the data. The data to which the C1 parity is added is supplied to a modulator 7 which encodes the error correction encoded data for recording. The data encoded for recording is recorded on a magnetic tape 8 by a magnetic head 10 mounted on a rotating drum 9. Reference numerals 11-19 in Fig.1 indicate elements of the reproducing system, and 11 indicates a demodulator which decodes reproduced data for recording. The data decoded for recording is then supplied to a C1 decoder 12. The C1 decoder 12 performs the error correction on the reproduced data on the basis of the C1 parity word, and the reproduced data which has been corrected is sent to an audio/video (A/V) separation circuit 13. The A/V separation circuit 13 separates the reproduced data into video data and audio data, and the former is supplied to a deinterleave RAM 14 and the latter to an audio error correction decoder 18. The deinterleave RAM 14 deinterleaves (deshuffles) the input video data, and the deshuffled video data is sent to a C2 decoder 15. The C2 decoder 15 performs the error correction on the deshuffled video data on the basis of the C2 parity word, and the corrected video signal is sent to an interpolation circuit 16 which interpolates the video signal in a case where it has been impossible to perform the error correction. A video digital-analog (D/A) converter 17 converts the digital video signal which is outputted from the interpolation circuit 16, into the analog signal. The audio error correction decoder 18 performs the error correction on the input audio data, and the corrected audio signal is supplied to an audio D/A converter 19 which in turn converts the digital audio signal the into the analog signal. The operation of the prior art apparatus will be described. The analog video signal is converted into the digital signal by the video A/D converter 1, and the digital video signal is supplied to the C2 encoder 3. The digital video data to which the C2 parity has been added in the C2 encoder 3 is subjected to a predetermined shuffling (interleaving) process in the interleave RAM 4, and then sent to the adder. In contrast, the analog audio signal is converted into the digital signal by the audio A/D converter 2, and the digital audio signal is encoded for error correction in the audio error correction encoder 5 and thereafter sent to the adder. In the adder, both these data are synthesized to each other, and the synthesized data is supplied to the C1 encoder 6, in which the C1 parity is added to the synthesized data. As a result, the cross interleaving process in which an error correction parity word is added before and after the interleaving process is carried out. The data which has been subjected to the encoding for error correction and the interleave process is encoded for recording by the modulator 7, and then the encoded data is recorded on the magnetic tape 8 by the magnetic head 10. In the reproducing system, the digital data reproduced by the magnetic head 10 is decoded for recording by the demodulator 11, and the decoded data is corrected by the C1 decoder 12 on the basis of the C1 parity word. The output of the C1 decoder 12 is separated by the A/V separation circuit 13 into video data and audio data. The audio data is processed by the audio error correction decoder 18, and then the analog audio signal is reproduced by the audio D/A converter 19. In contrast, in the deinterleave RAM 14, the video data is subjected to the deshuffling (deinterleaving) process in which the data is rearranged to the original sequence, and then the C2 decoder 15 performs the error correction on the basis of the C2 parity word, or sets an error flag when it is not possible to correct an error. Thereafter, the video data is subjected to the primary or secondary signal interpolation by the interpolation circuit 16, and the analog video signal is reproduced by the video D/A converter 17. The interleaving and deinterleaving processes in the thus configured digital recording and reproducing apparatus are usually done with the object of scattering errors in the decoding process and for converged errors such as burst errors. Recently, in order to cope with digital data processing systems such as a digital video tape recorder (VTR), a recording method is widely employed in which the video signal is compressed by a high-efficiency encoding process and the compressed video data is recorded on a recording medium such as a magnetic tape. In a case where such a recording method is employed, the video signal is divided into blocks in a unit of a plurality of pixels, and each of these blocks is subjected to a high-efficiency encoding process. Since the manner of performing this encoding process varies depending upon the content of the video signal, the data amount is not always constant. In such a case, therefore, even if the interleaving process is done in the error correction, errors caused in the decoding process and for burst errors are not always scattered on a screen, and errors may become larger than expected. EP-A-0401854 discloses an orthogonal transform coding device in which input signals are subdivided into large blocks which are in turn made up of small blocks of data. Subsequent to the orthogonal transform, a data amount estimating unit quantizes the small blocks with a plurality of quantizers so that an optimum quantizer may be selected. On this basis, the orthogonal transformed data is processed by a variable length encoder. The fourth example on which the precharacterising portion of appended claim 1 is based has a large block formed by assembling small blocks situated at various positions of the picture plane whereby the amount of information contained in the respective large blocks is substantially equal since the amount of information on the picture plane is scattered. It is an object of the invention to provide a video-audio digital recording and reproducing apparatus which, even in a case that the video signal is compressed by a high-efficiency encoding process, is hardly affected by burst errors. It is another object of the invention to provide a video-audio digital recording and reproducing apparatus which, even in a case that the video signal is compressed by a high-efficiency encoding process, can efficiently record the video signal on a recording medium and reduce the deterioration of the image quality. According to the present invention, there is provided a video-audio digital recording apparatus in which digital video and audio signals are recorded on a recording medium, comprising: storage means for dividing a digital video signal into blocks each having a plurality of pixels, for storing the blocked video signal, and for performing shuffling of the blocks within one or several fields; and encoding means for reading the blocked video signal from said storage means, and for compressing and encoding the blocked video signal in a unit of a block, the encoding means comprising: an orthogonal transformation circuit for performing an orthogonal transform on the video signal of each block; an encoding circuit for performing a variable-length encoding on an output of said orthogonal transformation circuit; and a control circuit for controlling the variable-length encoding in said encoding circuit; characterised in that said control circuit estimates the total data amount of encoded data obtained by said encoding circuit for said one or several fields, on the basis of the output of said orthogonal transformation circuit, and controls the data amount of encoded data in a unit of a block in accordance with the estimated result so that the compressed data of said one or several fields converges to a predetermined amount of data. The invention will be further described by way of example only with reference to the accompanying drawings, in which:- Fig. 1 is a block diagram illustrating the configuration of a prior art video-audio digital recording and reproducing apparatus. Fig. 2 is a block diagram illustrating the configuration of a video-audio digital recording and reproducing apparatus according to the invention. Fig. 3 is a block diagram illustrating the inner configuration of a high-efficiency encoding circuit used in the apparatus of Fig. 2. Fig. 4 is a diagram schematically showing an example of an input image. Fig. 5 is a diagram showing the distribution of the data amount in a case where the input image shown in Fig. 4 is compressed by a high-efficiency encoding process. Fig. 6 is a diagram showing an example of the sequence of reading blocks after the input image shown in Fig. 4 is compressed by a high-efficiency encoding. Fig. 7 is a graph showing the variation of the accumulated data amount obtained when each block is read out in the sequence shown in Fig. 6. Fig. 8 is a diagram showing another example of the sequence of reading blocks after the input image shown in Fig. 4 is compressed by a high-efficiency encoding. Fig. 9 is a graph showing the variation of the accumulated data amount obtained when each block is read out from the blocks in the sequence shown in Fig. 8. Fig. 2 is a block diagram illustrating the configuration of a video-audio digital recording and reproducing apparatus according to the invention. In Fig. 2, reference numerals 1 and 2 respectively indicate a video A/D converter which converts an analog video signal into a digital signal, and an audio A/D converter which converts an analog audio signal into a digital signal. The video signal is converted into the digital signal by the video A/D converter 1, and then supplied to an interleave RAM 22. The interleave RAM 22 divides the digital video signal into blocks each of a plurality of pixels, and performs the interleaving process with one block as a unit. The video signal read out from the interleave RAM 22 is supplied to a high-efficiency encoding circuit 21 which in turn compresses the video signal in a unit of one block. The compressed video signal is supplied to a video error correction encoder 20. The video error correction encoder 20 has a configuration in which the C2 encoder 3 and C1 encoder 6 used in the prior art apparatus of Fig. 1 are combined together, and derives C1 and C2 parities and adds them to the video signal to output the encoded video data to an adder 30. The audio signal is converted to the digital signal by the audio A/D converter 2 and supplied to an audio error correction encoder 5. The audio error correction encoder 5 encodes the digital audio signal for error correction, and the encoded audio data is sent to the adder 30. The encoded video data and the encoded audio data are synthesized to each other by the adder 30, and then supplied to a modulator 7 by which the data encoded for error correction is encoded for recording. The data encoded for recording is recorded on a magnetic tape 8 by a magnetic head 10 mounted on a rotating drum 9. The configuration of the reproducing system will be described. Data which has been reproduced from the magnetic tape 8 is decoded for recording by a demodulator indicated by the numeral 11. The data decoded for recording is sent to an A/V separation circuit 13 in which the data decoded for recording is separated into video data and audio data. The video data is supplied to a video error correction decoder 23, and the audio data to an audio error correction decoder 18. The video error correction decoder 23 has a configuration in which the C1 decoder 12 and C2 decoder 15 used in the prior art apparatus of Fig. 1 are combined together, and performs the error correction on the basis of C1 and C2 parity words. The video data which has been corrected is supplied to a high-efficiency decoding circuit 24 by which the compressed video data is expanded, and the expanded video signal is sent to a deinterleave RAM 25. The deinterleave RAM 25 performs the deinterleaving process on the video signal in a unit of a block. Then, the video signal stored in the deinterleave RAM 25 is read out to be sent to an interpolation circuit 16 which interpolates the video signal in a case where it has been impossible to perform the error correction. A video D/A converter 17 converts the digital video signal into an analog signal. The audio error correction decoder 18 performs the errors correction on the input audio data, and the corrected audio signal is supplied to an audio D/A converter 19 which in turn converts the digital audio signal into an analog signal. Fig. 3 is a block diagram illustrating the inner configuration of the high-efficiency encoding circuit 21 used in the recording system shown in Fig. 2. The high-efficiency encoding circuit 21 comprises an orthogonal transformation circuit 26 which performs the orthogonal transform on each of the data blocks in a unit of a block, a variable-length encoding circuit 27 which performs the variable-length encoding on the output of the orthogonal transformation circuit 26 in accordance with the content of the image, and a total data amount estimation circuit 28 which estimates the total data amount after the compression (i.e., after the variable-length encoding) on the basis of the data obtained before the high-efficiency encoding (i.e., on the basis of the output of the orthogonal transformation circuit 26). The total data amount estimation circuit 28 controls the data amount in the variable-length encoding circuit 27 with a block as a unit, so that all the data in a predetermined field ultimately converges in a specified track of the magnetic tape 8. The operation of this apparatus will be described. In the recording system, the digital video signal which has been converted by the video A/D converter 1 in a similar manner as the prior art apparatus is stored in the interleave RAM 22, and divided into blocks in a unit of a plurality of pixels. Then, the video signal is read out so that the interleaving process is performed in a unit of a block, and thereafter compressed by the high-efficiency encoding circuit 21. C1 and C2 parities are added to the compressed video data by the video error correction encoder 20, thereby encoding the video data for error correction. The digital audio signal which has been converted by the audio A/D converter 2 in a similar manner as the prior art apparatus is encoded for error correction by the audio error correction encoder 5. The video encoded data and the audio encoded data are synthesized to each other by the adder 30. The synthesized data is encoded for recording by the modulator 7, and then recorded on the magnetic tape 8 by the magnetic head 10. In the reproducing system, the digital data reproduced from the magnetic tape 8 is decoded for recording by the demodulator 11, and the decoded data is separated by the A/V separation circuit 13 into video data and audio data. Errors in these video and audio data are corrected by the decoding for error correction in the video error correction decoder 23 and the audio error correction decoder 18, respectively. When it is impossible to correct an error, a flag is set to the corresponding data. Then, the compressed video data is expanded by the high-efficiency decoding circuit 24. The expanded data is sent to the deinterleave RAM 25 to be subjected to the deinterleaving process in a unit of a block, and thereafter respectively returned to the positions corresponding to those of the original video blocks. The video signal in which an error has riot been corrected and the error flag is on is subjected to the pixel interpolation along the horizontal and vertical directions or along the time axis by the interpolation circuit 16. Then, the analog video signal is reproduced by the video D/A converter 17. In the high-efficiency encoding method employed in the above-described digital recording and reproducing apparatus, generally, the variable-length encoding is carried out after dividing the video signal into blocks (e.g., each of the blocks consisting of 8 × 8 pixels) and performing the orthogonal transform in a unit of a block. When compressed data is to be recorded on a recording medium such as a magnetic tape, it is necessary to store compressed data for one or several fields in a specified track in order to simplify special reproducing and editing processes. Since the quantizing and encoding processes in the employed high-efficiency encoding method are conducted in accordance with the content of video data in each block, the amount of compressed data in each block for one or several fields is not always constant. Depending upon the content of video data, therefore, there are cases where the amount of compressed data may be so large that the data cannot be recorded in a specified track, or inversely there are cases where the amount of compressed data may be so small that a considerably wide region of a specified track remains unrecorded. In order to ensure that compressed video data can be always recorded in a specified track, according to the embodiment, the total amount of compressed data is estimated by the total data amount estimation circuit 28 on the basis of the data obtained before the high-efficiency encoding, and the variable-length encoding circuit 27 controls the data amount with a block as a unit, so that the compressed video data in one or several fields ultimately converge in a specified track. A case where the video signal indicative of an image of a house shown in Fig. 4 which has a large amount of data at the center area is inputted to the apparatus will be described. It is assumed that the high-efficiency encoding blocks are 60 blocks which are obtained by dividing a screen in six along the vertical direction and in ten along the horizontal direction, and that, when the high-efficiency encoding is performed on each of these blocks, these blocks have data amounts ranging from 1 to 10 as shown in Fig. 5. The video signal of each of these blocks is sequentially read out from the interleave RAM 22 with starting at the upper and left corner and proceeding along the horizontal direction as shown in Fig. 6. The numbers shown in a circle of each blocks in Fig. 6 indicate the sequence of reading the video signal. When the high-efficiency encoding is proceeded according to this sequence, the accumulated data amount in one field varies as shown in Fig. 7. In this illustrated case, the image correlation exists along the horizontal direction. Therefore, blocks having a large amount of compressed data are localized, resulting in that the accumulated data amount greatly varies when such a block is encoded in a high-efficiency. The broken straight line in Fig. 7 indicates an ideal variation of the accumulated data amount. If the accumulated data amount greatly deviates from this ideal variation, the final accumulated data amount cannot be within a prefixed total data amount, and hence the data amount is controlled. This causes the reduced accuracy of the compressed video data, i.e., the inferior image quality. According to the invention, therefore, the blocks are randomly read out from the interleave RAM 22, for example, in the sequence shown in Fig. 8. This enables each block to be encoded in a high-efficiency irrespective of the image correlation, so that blocks having a greater amount of compressed data are scattered. As a result, the accumulated data amount in one field varies as shown in Fig. 9 with becoming closer to the ideal variation indicated by the broken straight line. This eliminates the necessity of controlling the data amount, and prevents the accuracy of compressed video data from deteriorating. The reproduced video signal is written into the deinterleave RAM 25 in the same sequence as that of randomly reading the video signal from the interleave RAM 22. Consequently, each block can certainly be returned to its original position, thereby enabling the original image to be accurately reproduced. Since in the above-described interleaving process the sequence of processing the video signal in a unit of a high-efficiency encoding block is random in the term of positions in the screen, the arrangement of blocks recorded on a recording medium is also random, resulting in that errors are not locally concentrated even if a burst error burst has occurred on a recording medium in the reproducing process. As seen from the above description, according to the invention, since the interleave RAM 22 is disposed at the front stage of the high-efficiency encoding circuit 21 and the reading process is randomly conducted in a unit of a high-efficiency encoding block, it is possible to provide a video-audio digital recording and reproducing apparatus in which the degree of the bias in the data amount caused by the image correlation can be reduced so as to make the amount of the compressed data to be easily estimated, and the video signal can be encoded in a high-efficiency without reducing the accuracy of the compressed video data more than need, and the deterioration of the image quality can be reduced, and which is hardly affected by burst errors.

Claims: A video-audio digital recording apparatus in which digital video and audio signals are recorded on a recording medium, comprising: storage means (22) for dividing a digital video signal into blocks each having a plurality of pixels, for storing the blocked video signal, and for performing shuffling of the blocks within one or several fields; and encoding means (21) for reading the blocked video signal from said storage means, and for compressing and encoding the blocked video signal in a unit of a block, the encoding means (21) comprising: an orthogonal transformation circuit (26) for performing an orthogonal transform on the video signal of each block; an encoding circuit (27) for performing a variable-length encoding on an output of said orthogonal transformation circuit (26); and a control circuit (28) for controlling the variable-length encoding in said encoding circuit (27); characterised in that said control circuit (28) estimates the total data amount of encoded data obtained by said encoding circuit (27) for said one or several fields, on the basis of the output of said orthogonal transformation circuit (26), and controls the data amount of encoded data in a unit of a block in accordance with the estimated result so that the compressed data of said one or several fields converges to a predetermined amount of data. A video-audio digital recording apparatus according to claim 1, further comprising: means (20) for adding an error correction code to encoded data from said encoding means (21) to obtain video data with correction code; means (5) for adding an error correction code to the digital audio signal to obtain audio data with correction code; and means (30) for synthesizing the obtained video data with correction code and the obtained audio data with correction code, and for recording the synthesized data on the recording medium. A video-audio digital recording and reproducing apparatus in which digital video and audio signals are recorded on a recording medium and original video and audio signals are reproduced from the recording medium, comprising: the video-audio digital recording apparatus of claims 1 or 2; A video-audio digital recording and reproducing apparatus according to claim 3, further comprising: means (11,13) for reproducing the synthesized data from the recording medium (8), and for separating the synthesized data into the video data with correction code and the audio data with correction code; means (23) for decoding the error correction code of the separated video data with correction mode; and means (18) for decoding the error correction code of the separated audio data with correction code. A video-audio digital recording and reproducing apparatus according to claim 3 or 4 further comprising: means (17) for reading the digital video signal from said second storage means (16), and converting it into the analog video signal; and means (19) for converting an output of said audio error correction decoding means (18) to the analog audio signal. An apparatus according to any preceding claim further comprising: means (1) for converting an input analog video signal into a digital video signal; means (2) for converting an input analog audio signal into a digital audio signal.

Inventors: HONGO KIMITOSHI, ONISHI KEN, ONO YUKARI, SUGIYAMA KAZUHIRO, HONGO, KIMITOSHI, ONISHI, KEN, ONO, YUKARI, SUGIYAMA, KAZUHIRO, Hongo, Kimitoshi, c/o Kyoto Jigyosho, Onishi, Ken, c/o Denshi Shohin Kaihatsu Kenkyusho, Ono, Yukari, c/o Denshi Shohin Kaihatsu Kenkyusho, Sugiyama, Kazuhiro, c/o Denshi Shohin
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1992
Main classification: G11B20
IPC codes: G11B20, H04N5