Optical information recording and reproducing apparatus and recording medium

Abstract: An optical information recording and reproducing apparatus comprising: a reproduction signal processing circuit including one or more elements (5, 6, 10, 13, 18) which have respective variable parameters for changing states of the elements (5, 6, 10, 13, 18), respectively at the time of read-out of data from a recording medium (1) such that the data is read out from the recording medium (1) by changing the states of the elements (5, 6, 10, 13, 18).

Description: The present invention generally relates to an optical information recording and reproducing apparatus for recording and reproducing information on an optical disk having optically detectable guide tracks and more particularly, to an optical information recording and reproducing apparatus in which a processing for recovering data errors at the time of reproduction of signals recorded on the optical disk is performed. In optical disks having enormous potentialities as a memory having high density and large capacity, error control (error detection and correction) technique is vital in order to overcome error rate higher than those of magnetic recording apparatuses. Generally, optically detectable guide tracks such as guide grooves are provided in the optical disks so as to raise guide track density. A laser beam condensed to a diameter of about 1µm is irradiated over a recording layer formed on the guide track such that information signals are recorded on the recording layer by perforation, deformation of shape of the guide pit, change of optical reflectance of the recording layer, magnetooptical recording, etc. Since recording pits and track pitch are formed on the order of microns, the optical disks are apt to incur various defects, dust and damage during their production processes or in environment for their use, thereby resulting in drop-out of reproduction signals. As a result, it is said that raw error rate of the optical disks ranges from 10 -4 to 10 -6 which is quite higher than that of 10 -9 to 10 -12 obtained in magnetic disks representative of known recording mediums. Therefore, optical information recording and reproducing apparatuses employing optical disks have powerful error control and a verification function that immediately after data has been recorded at a track, contents recorded at the track are reproduced such that it is verified whether the data has been recorded at the track correctly. By using this verification function, verification is performed at the time of recording of the data. If it is found that the data is recorded at a defective sector referred to above and thus, contents of the data cannot be guaranteed, the data is rerecorded at an alternative sector provided at another location preliminarily. Furthermore, in information recording and reproducing apparatuses including the optical information recording and reproducing apparatuses, in case an error has been detected at the time of read-out of the data, rereading of the target data is generally attempted as a error recovery processing. With reference to Fig. 5 showing a reproduction signal processing circuit in the known information recording and reproducing apparatus, one example of an error recovery processing performed in the case where an error has been detected at the time of read-out of the data in the known information recording and reproducing apparatus is described. In Fig. 5, the prior art reproduction signal processing circuit includes an optical disk 1, a motor 2 for rotating the optical disk 1, an optical head 3 which condenses to a light beam having a diameter of about 1 µm, a laser beam emitted from a semiconductor laser or the like so as to irradiate the light beam over the optical disk 1 and a laser drive circuit 4 for modulating and driving the semiconductor laser, etc. in response to a recording information signal inputted to a terminal A. The known reproduction signal processing circuit further includes a pre-amplifier 42 for amplifying weak signals from the optical disk 1, a frequency characteristics correcting circuit 43 for emphasizing a specific frequency so as to facilitate reading of the data, a differentiating circuit 7, an amplifier 8, a zero-cross comparator 9, an AND gate 15, a phase locked loop (PLL) circuit 46, an address/data reading circuit 16 and a microprocessor 63 for controlling recording signals and reproduction signals or controlling the known information recording and reproducing apparatus as a whole. In addition, the known reproduction signal processing circuit includes first and second envelope detecting circuits 44 and 12 for detecting an envelope of a signal, first and second comparators 11 and 14 and a bias setting circuit 45 for setting a bias of the second comparator 14. Operation of the prior art reproduction signal processing circuit of the above described arrangement is described briefly, hereinbelow. A reproduction signal read by the optical head 3 is amplified by the pre-amplifier 42. Frequency characteristics of the reproduction signal amplified by the pre-amplifier 42 are corrected by the frequency characteristics correcting circuit 43. Fig. 7(a) shows one example of an output signal of the frequency characteristics correcting circuit 43. Peak detection of the reproduction signal is performed by two circuitries. One of the circuitries is a system for detecting peak of the reproduction signal and is constituted by the differentiating circuit 7, the amplifier 8 and the zero-cross comparator 9. An output signal of the differentiating circuit 7 is shown in Fig. 7(b),while an output signal of the zero-cross comparator 9 is shown in Fig.7(c) such that data is carried at a rise edge of the output signal of the zero-cross comparator 9. A crossed portion in Fig. 7(c) represents a noise signal. The other of the circuitry is a data gate detecting system for eliminating the noise signal referred to above and is constituted by the first envelope detecting circuit 44 and the first comparator 11. As indicated by the portion a in Fig. 7(a), an output signal of the first envelope detecting circuit 44 is usually set such that about 40 % of amplitude of the input signal is clipped. Thus, an output signal of the first comparator 11 is obtained as shown in Fig. 7(d) and peak of the data is detected by logical product of Figs. 7(c) and 7(d) as shown in Fig. 7(e). Furthermore, output of the data is performed by a gate signal of a data detecting circuit for detecting presence and absence of the data such that the data is outputted to only a sector which is regarded as recording the data therein. The data detecting circuit is formed by the second envelope detecting circuit 12, the bias setting circuit 45 and the second comparator 14. An output of the second comparator 14 is obtained as shown in Fig. 7(f) and finally, an output of the AND gate 15 is obtained as the reproduction signal as shown in Fig. 7(g). In case this binary signal is read by the address/data reading circuit 16 and any error is detected by the address/data reading circuit 16 during or after reading of the data, the address/data reading circuit 16 feeds error information back to the microprocessor 63. Fig. 6 is a flow chart showing processing at the time of read-out of the data in the known information recording and reproducing apparatus. In case the data can be correctly read by a single read-out, the program flow proceeds in the sequence of steps S19, step S47, step S22, step S23 and step S24. At step S19, a data read-out command is received, while at step S47, a retry counter RC is initialized. At step S22, the data is read out, while at step S23, it is judged whether or not an error has been detected. Finally, the program flow ends at step S24. Meanwhile, in case the data is read by several read-outs, the program flow proceeds in the sequence of steps S19, S47, S22, S23, S48, S26, S22, S23, S48, S26, ---, S48, S26, S22, S23 and S24. At step S48, an increment is imparted to count of the retry counter RC. At step S26, it is judged whether or not the count of the retry counter RC has exceeded a retry number N. In the known information recording and reproducing apparatus, if the remainder of previously recorded signals (referred to as "unerased signals", hereinbelow) as shown by the broken line in Fig. 8(a) is caused to overlap a new signal to which the data is updated in the same sector, such a phenomenon may happen that even if the data can be correctly read by verification of one optical disk drive, an error is produced in each read-out in another optical disk drive due to scatter in production quality such as scatter of the light beam produced by the optical system and the semiconductor laser, etc. as described briefly, hereinbelow. Fig. 8(a) shows an output signal of the frequency characteristics correcting circuit 43 of Fig. 5. Character a in Fig. 8(a) shows an output signal of the first envelope detecting circuit 44, while Fig. 8(d) shows a gate signal for detecting peak. Fig. 8(b) shows an output signal of the differentiating circuit 7, while Fig. 8(c) shows an output signal of the zero-cross comparator 9. Accordingly, peak of the data is detected by logical product of Figs. 8(c) and 8(d) and thus, a portion of the unerased signals is detected erroneously as shown in Fig. 8(e). A gate signal for detecting presence and absence of the data is shown in Fig. 8(f), while an output signal of the AND gate 15 also has a portion of the unerased signals as shown in Fig. 8(g). In this case, a data error is produced. In case the data error is produced even if rereading is performed many times, the routine of steps S22, S23, S48 and S26 is repeated a predetermined reading number of N times after the processing of steps S19 and S47 and then, step S27 follows. As described above, such a case may take place that data in a sector having, e.g., many unerased signals is correctly read by verification of one optical disk drive but is detected by another optical disk drive as containing a data error. An apparatus according to the preamble of claim 1 is known from GB-A-2 226 688. Accordingly, an object of an embodiment of the present invention is to provide, with a view to eliminating the disadvantages inherent in conventional information recording and reproducing apparatuses, an optical information recording and reproducing apparatus in which in case a data error is detected during or after reading of data, the data is read a plurality of times by changing a plurality of variable parameters of a reproduction signal processing circuit so as to raise reliability of the recorded data. According to a first aspect of the present invention there is provided an optical information recording and reproducing apparatus comprising: a reproduction signal processing circuit including: a microprocessor; and error detection means for detecting an error during or after read-out of the data. Said reproduction signal processing circuit further includes a plurality of elements which have respective variable parameters for changing the respective states of said elements at the time of read-out of data from a recording medium, said microprocessor being operable to set the parameters of at least two of said elements in combination at a time of rereading the data, said combination being one of a number of combinations corresponding to respective signal deterioration factors, whereby the data is read out from the recording medium by changing the states of said elements, and in the event that said error detection means has detected an error, the data is reread by changing the states of said elements such that each of said elements is set to a condition reducing the number of errors detected by said error detection means. JP-A-6 017 5111 discloses a robot control device, wherein a combination of parameters is set up at the time of teaching while referring an input signal and a required signal is output on the basis of the combination of said parameters. An optical information recording and reproducing apparatus according to an embodiment of the present invention comprises a reproduction signal processing circuit including a plurality of elements having respective variable parameters such that a microprocessor acting as a detection means for detecting a data error can set the parameters by utilising an output from an analog switch or a digital-analog converter. Meanwhile, when a data error is detected during read-out of the data, the parameters are reset before rereading. Preferably, a value minimising an error in read-out of the data, which has been determined by the detection means, is selected for each of the parameters so as to be recorded at a specific location of the optical disk such that conditional setting in the subsequent read-out is accurately performed immediately. By employing the above described arrangement, when conditions minimising occurrence of the error due to detection of unerased signals of a specific component are set at the time of rereading, reliability of reproduction of the written data can be raised. Examples of the invention will now be described with reference to the drawings in which:- Fig. 1 is a block diagram showing a reproduction signal processing circuit employed in an optical information recording and reproducing apparatus according to one embodiment of the present invention; Fig. 2 is a flow chart showing processing of the optical information recording and reproducing apparatus of Fig. 1; Figs. 3(a) to 3(g) and 4(a) to 4(g) are views explanatory of signals in the optical information recording and reproducing apparatus of Fig. 1; Fig. 5 is a block diagram showing a reproduction signal processing circuit employed in a prior art information recording and reproducing apparatus (already referred to); Fig. 6 is a flow chart showing processing of the prior art information recording and reproducing apparatus of Fig. 5 (already referred to); Figs. 7(a) to 7(g) and 8(a) to 8(g) are views explanatory of signals in the prior art reproduction signal processing circuit of Fig. 5 (already referred to); Fig. 9 is a flow chart showing another processing of the optical information recording and reproducing apparatus of Fig. 1; Fig. 10a is a view explanatory of data layout of an optical disk for use in the optical information recording and reproducing apparatus of Fig. 1; and Fig. 10b is a view showing data array of a portion of a variable parameter region in the optical disk of Fig. 10a. Before the description of the present invention proceeds, it is to be noted that like parts are designated by like reference numerals throughout several views of the accompanying drawings. Referring now to the drawings, there is shown in Fig. 1, a reproduction signal processing circuit employed in an optical information recording and reproducing apparatus according to one embodiment of the present invention. In the same manner as a prior art reproduction signal processing circuit of Fig. 5, the reproduction signal processing circuit includes an optical disk 1, a motor 2 for rotating the optical disk 1, an optical head 3 which condenses to a light beam having a diameter of about 1 µm, a laser beam emitted from a semiconductor laser or the like so as to irradiate the light beam over the optical disk 1, a laser drive circuit 4 for modulating and driving the semiconductor laser, etc. in response to a recording information signal inputted to a terminal A, a differentiating circuit 7, an amplifier 8, a zero-cross comparator 9, an AND gate 15, an address/data reading circuit 16, a second envelope detecting circuit 12 for detecting an envelope of a signal and first and second comparators 11 and 14. The production signal processing circuit of Fig. 1 further includes a microprocessor 17 which detects read-out errors of addresses and data from the address/data reading circuit 16 and is capable of setting a plurality of variable parameters of the production signal processing circuit, a pre-amplifier 5 in which amplification degree can be variably set by the microprocessor 17, a frequency characteristics correcting circuit 6 in which characteristics of frequency correction can be variably set by the microprocessor 17, a first envelope detecting circuit 10 in which comparison level for the first comparator 11 can be variably set by the microprocessor 17, a bias setting circuit 13 for setting a bias of the second comparator 14, in which voltage level can be variably set by the microprocessor 17 and a phase locked loop (PLL) circuit 18 which fetches data synchronously with a binary data signal at fetching timing variably set by the microprocessor 17. The above mentioned microprocessor 17, pre-amplifier 5, frequency characteristics correcting circuit 6, first envelope detecting circuit 10, bias setting circuit 13 and PLL circuit 18 correspond to but are different, in function, from the microprocessor 63, the pre-amplifier 42, the frequency characteristics correcting circuit 43, the first envelope detecting circuit 44, the bias setting circuit 45 and the PLL circuit 46 of the prior art production signal processing circuit of Fig. 5, respectively. Operation of the optical information recording and reproducing apparatus of the above described arrangement is described with reference to Figs. 3 and 4, hereinbelow. An example is given in which data in a sector having many unerased signals as shown by the broken lines in Fig. 3(a) is read out by an optical disk drive of the above described arrangement. Fig. 3(a) shows an output signal of the frequency characteristics correcting circuit 6. In a first read-out, since the parameter of the first envelope detecting circuit 10 is set to, for example, about 40 % of amplitude of an input signal, the output signal of the first envelope detecting circuit 10 is obtained as shown by the portion a in Fig. 3(a) and thus, a portion of the unerased signals is detected erroneously. An output signal of the first comparator 11 is shown in Fig. 3(d), while an output signal of the differentiating circuit 7 is shown in Fig. 3(b). Since an output signal of the zero-cross comparator 9 also detects the unerased signals, an output of the AND gate 15 also detects a portion of the unerased signals. An output signal of the AND gate 15 is shown in Fig. 3(g). A data error is produced in the address/data reading circuit 16 and is detected by the microprocessor 17. The microprocessor 17 which has detected the data error performs a preparation for rereading the data in accordance with a flow chart of Fig. 2. The program flow proceeds in the sequence of steps S19, S20, S21, S22, S23, S25, S26 and S21. At step S19, a data read-out command is received, while at step S20, a retry counter RC and a parameter control counter PCC are initialized. At step S21, parameters of the production signal processing circuit are set, while at step S22, data read-out is executed. At step S23, it is judged whether or not an error has been detected. At step 25, an increment is imparted to counts of the retry counter RC and the parameter control counter PCC. Meanwhile, at step S26, it is judged whether or not the count of the retry counter RC has exceeded a retry number N. Subsequently, in a second read-out, by using the parameter control counter PCC in the flow chart of Fig. 2, the microprocessor 17 sets, for example, the parameter of the frequency characteristics correcting circuit 6 gentler by reducing lead amount of a lead compensating circuit and restricting a high-frequency component and sets the parameter of the first envelope detecting circuit 10 to, e.g., about 65 % of amplitude of an input signal. At this time, an output signal of the frequency characteristics correcting circuit 6 is obtained as shown in Fig..4(a). Since the parameter of the first envelope detecting circuit 10 is set to about 65 % of amplitude of the input signal, the output signal of the first envelope detecting circuit 10 is shown by the portion a in Fig. 4(a) and thus, the unerased signals are not detected. An output signal of the first comparator 11 is shown in Fig. 4(d). An output signal of the differentiating circuit 7 is obtained as shown in Fig. 4(b), so that the unerased signals are detected and thus, an output signal of the zero-cross comparator 9 also detects the unerased signals as shown in Fig. 4(c). However, since an output signal of the first comparator 11 eliminates the unerased signals, an output signal of the AND gate 15 does not detect the unerased signals finally. Therefore, the data can be read out without an error in the address/data reading circuit 16 in the sequence of steps S22, S23 and S24. The program flow ends at step S24. In case the data cannot be read even in the second read-out, read-out of the data is further repeated by changing the above parameters. Then, when an error is detected in the read data even if reading is repeated a predetermined reading number of N times, error processing is performed. In the foregoing, setting of the parameters of the frequency characteristics correcting circuit 6 and the first envelope detecting circuit 10 has been described. However, these parameters may also be replaced by other parameters such as gain of the pre-amplifier 5, detection level of the bias setting circuit 13 for detecting presence and absence of the data, data fetching timing obtained by offsetting phase of the PLL circuit 18 used for data reproduction. Hereinbelow, examples of change of setting of the parameters referred to above are described. The frequency characteristics correcting circuit 6 can be formed by two or more sets of leading capacitors and resistors and an analog switch for effecting changeover among the sets. If a digital-analog converter is employed, levels of the first envelope detecting circuit 10 and the bias setting circuit 13 can be directly changed by changing data in the microprocessor 17. Alternatively, a plurality of biases may also be prepared so as to be changed over by using an analog switch. Amplification degree of the pre-amplifier 5 can be changed by employing a programmable amplifier or changing over a feedback resistance of an amplifier by an analog switch. Meanwhile, phase of the PLL circuit 18 can be changed easily by adding an output of the digital-analog converter to the phase at a fixed gain after a phase comparator in the PLL circuit 18. Since each of these procedures represents one example, it is needless to say that the parameters can be changed by employing other procedures. Furthermore, as shown in Fig. 9, before the data read-out command is received, for example, immediately after the optical disk has been inserted into the optical disk drive, the parameters of the reproduction signal processing circuit, which are converted into predetermined codes and are set initially, may be determined by reading a track in a variable parameter region 1P (Fig. 10(a)) of the optical disk 1 and then, the data is read out. In case an error is detected in the read data, the parameters are sequentially changed in accordance with setting of the parameter control counter PCC. Conditions minimizing the errors are written at the track in the variable parameter region 1P of the optical disk 1. Thus, when the data is reproduced next time, read-out is performed on the basis of this information written at the track in the variable parameter region 1P. As a result, even in the case where read-out conditions vary due to unerasing of signals, drop-out of sensitivity of the optical disk, shape of light beam in the apparatus, etc., at least medians of the parameters associated with the optical disk can be determined immediately and thus, highly reliable data read-out conditions can be determined promptly. Figs. 10(a) and 10(b) show the optical disk 1. As shown in Fig. 10(a), the optical disk 1 includes a user region 1U disposed at its radially outermost portion and the variable parameter region 1P disposed radially inwardly of the user region 1U. As shown in Fig. 10(b), the variable parameter region 1P stores addresses D11 and D21, PCC data D12 and drive identification data D13. The addresses D11 and D21 include addresses indicative of radial positions of tracks on the optical disk 1 and sector information indicative of angular positions of the tracks on the optical disk 1 and are preliminarily recorded on the optical disk 1 in embossed shape such as intermissions, etc. of the tracks. The PCC data D12 is data of the parameter control counter PCC. By reading out the PCC data D12, optimum conditions at the time of the previous reproduction can be set immediately. The PCC data D12 may be recorded in a fixed sequence for each of the parameters or information which determines combination of each of the parameters by a specific code may be recorded. The drive identification data D13 may be separate identification information for drives or may also be group identification information indicative of levels of model change, etc. When the drive identification data D13 is recorded and is used together with the PCC data D12 as necessary, the data read-out conditions can be determined more accurately and more promptly. Although the foregoing embodiments are applied to data read-out from optical disks having many unerased signals, in alternative embodiments it has been confirmed that data errors produced in damaged or repeatedly used optical disks can be corrected by setting different parameters, respectively. Therefore, in accordance with the present invention, by setting parameters corresponding to respective signal deterioration factors at the time of rereading of the data (i.e. the parameters are set in this way after an initial data read-out) the reliability of read-out of the data can be improved remarkably. Although the above embodiments describe optical disks, as is apparent from the degiven so far, since the present invention is directed to an apparatus for processing recorded signals, the present invention can also be widely applied to a device for recording and reproducing signals optically such as an optical card, an optical tape or the like. As is clear from the foregoing description, in case a data error is detected during or after read-out of the data from the recording medium, the data is reread a plurality of times by changing a plurality of the set parameters of the production signal processing circuit such that reliability of recording and reproduction of the data can be raised. Meanwhile, if these conditions are written at a specific location of the optical disk and read-out is performed on the basis of this written information when the data is reproduced next time, the medians of the parameters associated with the optical disk can be determined immediately and thus, highly reliable data read-out conditions can be determined promptly. Furthermore, in the embodiment, the program flow ends at the normal end routine for the data which could be read in rereading. However, by memorizing that rereading has been performed, it may also be possible to urge the user to perform such maintenance operations as complete erasure of the optical disk and the optical disk drive or erasable optical disks.

Claims: An optical information recording and reproducing apparatus comprising: a reproduction signal processing circuit including: a microprocessor (17) ; and error detection means (16, 17) for detecting an error during or after read-out of the data, whereby the data is read out from the recording medium (1), and in the event that said error detection means (16, 17) has detected an error, the data is reread by changing the state of said reproduction signal processing circuit such that it (10) is set to a condition reducing the number of errors detected by said error detection means (16, 17); characterised in that said reproduction signal processing circuit further includes a plurality of elements (5, 6, 10, 13, 18) which have respective variable parameters for changing the respective states of said elements (5, 6, 10, 13, 18) at the time of read-out of data from a recording medium (1), said microprocessor (17) being operable to set the parameters of at least two of said elements in combination at a time of rereading the data, said combination being one of a number of combinations corresponding to respective signal deterioration factors. The apparatus of claim 1, wherein the variable parameters include at least one of amplification degree of a pre-amplifier (5), frequency characteristics of a frequency characteristics compensation filter (6) inserted at a portion of said reproduction signal processing circuit preceding a binary circuit portion of said reproduction signal processing circuit, comparison level of a comparator (11) for converting analog signals into binary signals, comparison level acting as a bias of a an envelope detecting comparator (14) for detecting presence of recording signals and data fetching timing of a phase locked loop circuit (18) for reading out information signals including synchronous signals. The apparatus of claim 1 or claim 2, wherein conditional data for minimizing the number of detected errors for each of the variable parameters of said elements (5, 6, 10, 13, 18) is recorded at a specific location (1P) of the recording medium (1). The apparatus of claim 3, operable to read out information recorded at a specific location (1P) of the recording medium (1) so as to initialize the variable parameters of said elements (5, 6, 10, 13, 18) on the basis of the information.

Inventors: HIRONAKA MAYUMI, INOKUCHI CHIKASHI, ISHIBASHI KENZOU, HIRONAKA, MAYUMI, INOKUCHI, CHIKASHI, ISHIBASHI, KENZOU
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1992
Main classification: G11B7
IPC codes: G11B7, G11B27, G11B20