Low voltage D.C. to D.C. converter

Abstract: A circuit for converting one d.c. voltage to another d.c. voltage includes a transformer (T1) having a center tap and first and second end leads (t₁, t₂). A d.c. source voltage (V in ) is connected to the center tap of the transformer (T1). The end leads (t₁, t₂) are connected to ground through first and second MOSFETs (Q3, Q4) and to the gate of the MOSFET (Q3, Q4) through which the other end lead (t₁, t₂) is connected to ground such that the circuit is nominally self-oscillating due to transformer saturation. Current spikes may be minimized with a control circuit (20), consisting of an oscillator (22), a flip-flop (24), and first and second transistors (Q1, Q2), connected to the gates of the first and second MOSFETs (Q3, Q4). The control circuit (20) turns the MOSFETs (Q3, Q4) off prior to their natural oscillation turn off caused by transformer saturation. The circuit is particularly suited to operation with a low voltage d.c. source and low voltage MOSFETs (Fig.3).

Description: The present invention relates to a d.c. to d.c. converter for converting a first d.c. voltage to a second d.c. voltage, comprising: a transformer including at least a primary winding and a secondary winding, the primary winding being comprised of first and second end leads and a center lead, the center lead being connected to a d.c. voltage source; means for repetitively and alternately grounding the first and second end leads to generate a current between the center lead and a grounded one of the first and second end leads and to generate an autotransformer voltage across a nongrounded one of the first and second primary end leads, said means for repetitively and alternately grounding comprising: first and second voltage controlled switches connected between ground and the first and second end leads, respectively, the first and second voltage controlled switches having first and second control inputs, respectively, for activating the voltage controlled switches; and means for connecting the first end lead to the second control input and means for connecting the second end lead to the first control input, whereby the autotransformer voltage generated across the nongrounded end lead is provided to the control input of the voltage controlled switch connected to the grounded end lead to maintain the latter voltage controlled switch in an activated state. A d.c to d.c converter of the kind mentioned above is known from document GB-A-1 551 964. This prior art document discloses a d.c. to d.c. converter comprising a free-running multivibrator. The multivibrator comprises two transistors connected between end leads of a transformer and one terminal of a d.c. source. The other terminal of the d.c. source is connected to a center lead of the primary winding. The base electrodes of the two transistors are connected via resistors to the center lead associated with the respective other transistor. By this, a free-running multivibrator is constituted which is activated by closing a switch. The functioning of this converter is associated with saturation of the transistors as well as of the core of the transformer, what is believed undesirable for the reasons discussed below. Conventional d.c. to d.c. converters are comprised of two major components: a transformer and fast-switching, high-current, high-voltage transistors. The basic operation is to convert the voltage from a d.c. power source to a.c. square wave power at the transformer primary. The square wave power available at the transformer secondary is then rectified to generate a desired d.c. output voltage. There are two primary type of d.c. to d.c. converters: driven converters and self-oscillating converters: A conventional driven d.c. to d.c. converter, shown in FIG. 1, is comprised of two transistors Qa, Qb that are alternately switched on by an external square wave drive signal. It can be appreciated that the external square wave drive signal results in square waves of voltage and current at the transistor collectors. In other words, current flows in each transistor Qa, Qb on alternate half cycles of the external square wave drive signal. The problems that are associated with a conventional driven d.c. to d.c. converter like that shown in FIG. 1 include: (1) bipolar transistors require base drive current that is dissipative; (2) bipolar transistors have saturation losses larger than that associated with MOSFETs; (3) output load regulation is hampered by varying Vce(sat); and (4) MOSFETs can be operated at higher switching frequencies, thereby reducing magnetic size. FIG. 2 depicts a conventional self-oscillating d.c. to d.c. converter comprised of a d.c. source Vcc, a pair of BJT transistors Qc, Qd, and a transformer Tr1. The primary of transformer Tr1 includes a main center tapped winding NP1:NP2 and an auxiliary center tapped winding NB1:NB2. The transistors Qc, Qd are operated as switches via a feedback connection between the auxiliary base winding NB1:NB2 each transistor base. The operation of the conventional dc/dc converter is as follows: Assume that transistor Qc begins to turn on as current flows to its base from the DC source Vcc through RB1 and base winding NB1. As transistor Qc turns on and begins to saturate, current from the DC source Vcc begins to flow to ground through the primary winding NP1 and the collector/emitter junction. The voltage impressed on the primary winding NP1 is Vcc-Vce(sat) or, approximately, Vcc-1. A transformer coupling exists between the primary winding NP1 and the base winding NB1. Thus, the voltage induced across NB1 is (NB1/NP1) (Vcc-1). While current is flowing through the primary winding NP1, the transistor Qc is held on because of the positive voltage induced in the base winding NB1. However, once the transformer core saturates, the voltage across the primary winding NP1 drops to zero, forcing the voltage at the collector of Qc to be forced to near Vcc. If the voltage across the primary winding NP1 collapses, so does the voltage across the base winding NB1. As all of the winding voltages collapse to zero, Qd is turned partially on as the current from R3 is partially diverted into its base. As current is drawn through the collector of Qd, a voltage starts to appear across primary winding NP2 and, by transformer action, also across base winding NB2. The transistor Qd saturates as the voltage across the base winding NB2 provides additional drive to the base of Qd. As before, the transformer core saturates, the winding voltages collapse, and drive current begins to appear at the base of Qc. The just-described conventional dc/dc converter is relatively expensive because it requires a transformer having a plurality of primary windings in order to generate the base drive currents. Moreover, relatively durable components are needed because of the large current spikes created when the voltages on the windings of the saturated transformer core collapse. These inherent current spikes induce additional electromagnetic interference. The frequency of oscillation in such a self-oscillating converter is difficult to design and control since it is a function of temperature, component, and voltage supply tolerances. Finally, these conventional circuits require additional "bump start" components, such as a diode D B and a resistor R B , to initiate oscillations at power up. Therefore, it is an object of the present invention to overcome the problems intrinsic to the conventional driven and self-oscillating d.c. to d.c. converters. According to the d.c. to d.c. converter mentioned at the outset this object is achieved in that control means are provided for alternately connecting the first and second control inputs to ground to turn off the voltage controlled switches before the transformer saturates. It is an advantage of the present invention to provide a d.c. to d.c. converter that operates with an ordinary inexpensive single primary transformer; It is a further advantage of the present invention to minimize or eliminate current spikes in a d.c. to d.c. converter by preventing the transformer from saturating; and It is a further advantage of the present invention to provide a d.c. converter that can operate with a relatively low d.c. voltage source. The present invention achieves the above objects by providing a d.c. to d.c. converter for converting a first d.c. voltage to a second d.c. voltage comprising: a transformer including at least a primary winding and a secondary winding, the primary winding comprised of first and second end leads and a center lead, the center lead being connected to a d.c. voltage source; and means for repetitively and alternately grounding the first and second end leads to generate a current between the center lead and a grounded one of the first and second end leads and to generate an autotransformer voltage across a nongrounded one of the first and second primary end leads, said means for repetitively and alternately grounding comprising: first and second voltage controlled switches connected between ground and the first and second end leads, respectively, the first and second voltage controlled switches having first and second control inputs, respectively, for activating the voltage controlled switches; means for connecting the first end lead to the second control input and means for connecting the second end lead to the first control input, whereby the autotransformer voltage generated across the nongrounded end lead is provided to the control input of the voltage controlled switch connected to the grounded end lead to maintain the latter voltage controlled switch in an activated state; and control means for alternately connecting the first and second control inputs to ground to turn off the voltage controlled switches before the transformer saturates. The objects and features of the present invention, which are believed to be novel, are set forth with particularity in the appended claims. The present invention, both as to its organization and manner of operation, together with further objects and advantages, may best be understood by reference to the following description, taken in connection with the accompanying drawings. FIG. 1 is a circuit diagram of a conventional driven d.c. to d.c. converter; FIG. 2 is a circuit diagram of a conventional self-oscillating d.c. to d.c. converter; and FIG. 3 is a circuit diagram of a low voltage d.c. to d.c. converter according to the present invention. The following description is provided to enable any person skilled in the art to make and use the invention and sets forth the best modes contemplated by the inventors of carrying out their invention. Various modifications, however, will remain readily apparent to those skilled in the art, since the generic principles of the present invention have been defined herein specifically to provide a low voltage d.c. to d.c. converter. Referring to FIG. 3, a d.c. to d.c. converter according to the present invention is shown to have a primary side 20, 40 and a secondary side 60 separated by a transformer T1. The secondary side 60 is comprised of the transformerd's secondary winding Ns1:Ns2, the output of which is rectified with diodes D1, D2, smoothed with a capacitor C1, and applied to a load R L . The operation of the components which comprise the secondary side will not be described in detail as such operation is believed to be within the knowledge of those skilled in the art. It is believed sufficient to note that there are many other circuit constructions suitable for generating a regulated d.c. voltage from an alternating source of power. The primary side is best understood by describing it in two functional stages: a control stage 20 and an oscillating power stage 40. The control stage 20 is comprised of two transistors Q1, Q2 connected in a common emitter fashion. The oscillating power stage 40 is comprised of a transformer T1 having a single center tapped primary Np1:Np2, first and second Field Effect Transistors (FETs) Q3, Q4, and first and second feedback resistors R3, R4. The oscillating power stage 40 earns its name because it will self-oscillate even if separated from the driving stage 20 (i.e., as if transistors Q1 and Q2 are off). In general, the two MOSFETs Q3, Q4 oscillate in opposition to one another and thereby draw current through alternate half windings Np1, Np2 of the transformer primary. The control stage 20 earns its name because it inhibits or controls the oscillation of the oscillating power stage 40. More specifically, the collectors of the transistors Q1, Q2 are connected to the gates of the MOSFETs Q3, Q4, respectively, so that the control stage 20 may periodically turn off alternate MOSFETs Q3, Q4 by shorting its gate to ground. To fully understand the operation of the oscillating power stage 40, it is best to review the construction and operation of MOSFETs. A MOSFET is comprised of a gate, a source, and a drain and is generally considered a voltage controlled current device because a voltage at the gate can be used to control the flow of current between the source and the drain. The gate of a MOSFET is comparable to a capacitor and is a high impedance. A MOSFET's turn-on characteristics can generally be described by two parameters: Vgs(th) and Rds(on). If Vgs is below Vgs(th), then essentially no current will flow between the drain D and the source S. However, if Vgs is increased above Vgs(th), then a low impedance channel is formed between the drain D and the source S and current may flow therebetween. With its source grounded, a MOSFET can be operated as a switch by driving its gate between zero and Vgs(sat), where Vgs(sat) is the voltage at which Rds(on) for the device is specified. For low input voltage operation, the preferred MOSFETs are "Logic Level L Series" HEXFETs® manufactured by International Rectifier. These devices are characterized by Vgs(th) = 2.0 V (max) and Rds(on) = .05 ohms. The operation of the self-oscillating power stage 40 will now be described. At power up, virtually no current flows in the gate of either MOSFET Q3, Q4, such that a voltage Vin is present at the gate of each MOSFET. By ensuring that Vin >= Vgs(th), one of the two MOSFETs Q3, Q4 will begin to turn on as power up. However, only one MOSFET may be on at a time since the gate of each MOSFET is connected to ground through the other MOSFET. Therefore, the MOSFET that first begins to turn on will force the other MOSFET off. For the sake of argument, we will assume that first MOSFET Q3 begins to turn on first. As the first MOSFET Q3 is turning on and drawing current from the first primary terminal t1, an voltage is induced in the first half winding Np1. This voltage magnetically induces an autotransformer voltage in the second half winding Np2, thereby driving the first MOSFET Q3 further into saturation via the positive feedback connection to its gate. Eventually, the core of the transformer T1 will saturate and turn the first MOSFET Q3 off by shorting its gate to ground through the transformer T1 windings. Once the first MOSFET Q3 turns off, the gate of the second MOSFET Q4 is no longer connected to ground through the first MOSFET Q3. The second MOSFET Q4 therefore begins to turn on as the energy stored in the transformer windings is redirected to its gate. As the second MOSFET Q4 begins to turn on and draw current from the second primary terminal t2, an inductive voltage is induced in the second half winding Np2. This inductive voltage magnetically induces an autotransformer voltage in the first half winding Np1, thereby driving the second MOSFET Q4 further into saturation via the positive feedback connection to its gate. Eventually, the core saturates, and the process repeats. Although the present invention will operate without the driving circuit 20, it is believed undesirable for all of the reasons associated with the conventional oscillating d.c. to d.c. converters. In general, the current spikes put unnecessary strain on the MOSFETs and create undue electromagnetic interference. The control circuit 20 is provided to prevent current spikes by turning off the MOSFETs Q3, Q4 before the transformer T1 core saturates. A preferred embodiment of the control circuit 20 is comprised of an oscillator 22, a flip-flop 24, first and second transistors Q1, Q2, and first and second resistors R1, R2. As shown in FIG. 3, the Q and Q(not) outputs of the flip-flop 24 are connected to the respective bases of the first and second transistors Q1, Q2 with the first and second resistors R1, R2. The Q(not) output is also fed back to the D input such that the logic states of the Q and the Q(not) outputs alternate on each clock pulse. The oscillator 22 drives the clock input of the flip-flop 24, to thereby alternately turn the transistors Q1 and Q2 on and off. The collectors of the transistors Q1, Q2 are connected to a gate of a respective one of the MOSFETs Q3, Q4. The transistors Q1 and Q2 are used to minimize current spikes by turning the MOSFETs Q3 and Q4 off before the transformer T1 core saturates. The frequency of the oscillator 22 must therefore exceed the natural oscillation frequency of the oscillating power stage 40.

Claims: A d.c. to d.c. converter for converting a first d.c. voltage (V in ) to a second d.c. voltage (V o ) comprising: a transformer (T1) including at least a primary winding (N p 1, N p 2) and a secondary winding (N s 1, N s 2), the primary winding (N p 1, N p 2) being comprised of first and second end leads (t₁, t₂) and a center lead, the center lead being connected to a d.c. voltage source (V in ) ; means (20) for repetitively and alternately grounding the first and second end leads (t₁, t₂) to generate a current between the center lead and a grounded one of the first and second end leads (t₁, t₂) and to generate an autotransformer voltage across a non-grounded one of the first and second primary end leads (t₁, t₂), said means (20) for repetitively and alternately grounding comprising: first and second voltage controlled switches connected between ground and the first and second end leads (t₁, t₂), respectively, the first and second voltage controlled switches having first and second control inputs, respectively, for activating the voltage controlled switches; and means for connecting the first end lead (t₁) to the second control input and means for connecting the second end lead (t₂) to the first control input, whereby the autotransformer voltage generated across the nongrounded end lead is provided to the control input of the voltage controlled switch connected to the grounded end lead to maintain the latter voltage controlled switch in an activated state; characterized by: --control means (20) for alternately connecting the first and second control inputs to ground to turn off the voltage controlled switches before the transformer (T1) saturates. The converter of claim 1, characterized in that said first and second voltage controlled switches may be deactivated by grounding said first and second control inputs, respectively, and that the control means is comprised of: first and second transistors (Q1, Q2) having first and second base inputs, respectively; means for connecting the first transistor (Q1) to the first control input; means for connecting the second transistor (Q2) to the second control input; and means (22, 24) for repetitively and alternately providing control signals to said first and second base inputs to repetitively and alternately ground the first and second control inputs through said first and second transistors (Q1, Q2), respectively. The converter of claim 1 or claim 2, characterized by : said first and second voltage controlled switches each comprising a first and a second MOSFET (Q3, Q4), respectively, each MOSFET (Q3, Q4) having a gate, a drain, and a source; first and second resistors (R3, R4); said means connecting the drain and the source of the first MOSFET (Q3) between the first end lead (t₁) and ground; said means connecting the drain and the source of the second MOSFET (Q4) between the second end lead (t₂) and ground; said means connecting the first resistor (R3) between the gate of the first MOSFET (Q3) and the second end lead (t₂); and said means connecting the second resistor (R4) between a gate of the second MOSFET (Q4) and the first end lead (t₁). The converter of claim 2 and claim 3, characterized by: said means connecting the first transistor (Q1) between the gate of the first MOSFET (Q3) and ground; and said means connecting the second transistor (Q2) between the gate of the second MOSFET (Q4) and ground. The converter of any of claims 2 - 4, characterized in that said means (22, 24) for repetitively and alternately providing control signals to said first and second base inputs is comprised of: - a digital flip-flop (24) having first and second outputs (Q, Q) and a clock input (CLK), a voltage level at each of said first and second outputs (Q, Q), alternating between one of two voltage levels each time a clock signal is applied to the clock input (CLK), said first output (Q) being connected to said first base input and said second output (Q) being connected to said second base input. The converter of claim 5, characterized by an oscillator (22) having an output connected to the clock input (CLK) of said flip-flop (24).

Inventors: HULSEY STEPHEN J, LAZAR JAMES F, HULSEY, STEPHEN J., LAZAR, JAMES F.
Applicants: HUGHES AIRCRAFT CO, HUGHES AIRCRAFT COMPANY
Application year: 1992
Main classification: H02M3
IPC codes: H02M3