Semiconductor device unit having holder and method of mounting semiconductor devices using holder

Abstract: A semiconductor device unit includes a holder (3, 13, 63, 73, 83) having a plurality of holding parts (6, 16, 66, 76, 86), and a plurality of semiconductor devices (2, 2₁-2₃) held by the holding parts of the holder. Each of the semiconductor devices have a generally parallelepiped shape with top and bottom surfaces and at least one side surface provided with leads (5) which are exposed when the semiconductor device is held by the holding part of the holder.

Description: BACKGROUND OF THE INVENTION The present invention generally relates to semiconductor device units and methods of mounting semiconductor devices, and more particularly to a semiconductor device unit having a holder, and to a method of mounting semiconductor devices using the holder. Recently, as the size of computer systems has further been reduced, there are demands to package semiconductor devices with a high density. On the other hand, in memory devices such as dynamic random access memories (DRAMs), a plurality of semiconductor devices having the same construction are packaged on a single circuit substrate. Accordingly, there are demands to realize a method of packaging a plurality of semiconductor devices having the same construction with a high efficiency. In order to increase the packaging density, the package structure becomes an important factor. Conventionally, small and thin packages such as the small outline package (SOP), the single in-line package (SIP) and the zigzag in-line package (ZIP) are known as package structures which enable high density packaging. The SOP is a kind of surface package (surface mount). In other words, a SOP type semiconductor device is arranged on solder bumps which are formed on a circuit substrate, and the solder is thereafter melted to fix the semiconductor device. On the other hand, the vertical type package such as the SIP and the ZIP has a structure such that leads are arranged in line along one side surface of the package. Accordingly, this vertical type package is mounted vertically on the circuit substrate. The packaging density is improved by this vertical mounting, and in addition, it is possible to improve the cooling efficiency of the package. However, in the case of the SOP, there are problems in that a crack is easily formed in the package because it has a thin flat shape and the heat resistance of the package becomes large. In addition, because the package is surface mounted, there is also a problem in that the packaging area is large compared to that of the SIP, for example. In the case of the SIP and ZIP, there are problems in that it is difficult to make the package stand because the leads extend outwardly from one side surface thereof and the packaging (or mounting) process is troublesome to perform. For this reason, a structure was proposed to help the vertical package stand on the circuit substrate. According to this proposed structure, projections are formed on the package, and holes corresponding to the projections are provided in the circuit substrate. The vertical package stands on the circuit substrate in a state where the projections fit into the corresponding holes of the circuit substrate. However, according to this proposed structure, there are problems in that the holes must be formed in the circuit substrate and the production efficiency becomes poor due to this additional step of forming the holes. On the other hand, when the vertical package such as the SIP and the ZIP are made thin, there are problems in that a crack is easily formed in the package and the heat resistance of the package becomes large. From document US-A-4,894,706 a semiconductor device unit is known, comprising a holder having a plurality of holding parts and a plurality of semiconductor devices held by the holding parts of the holder in a vertical arrangement and parallel to each other, wherein each of the semiconductor devices has a generally parallelepiped shape with top and bottom major surfaces and at least one side surface provided with leads which are exposed when the semiconductor device is held by the holding part of the holder. The semiconductor devices are mounted onto a circuit substrate by connecting the exposed leads to the circuit substrate. SUMMARY OF THE INVENTION The object of the present invention is to provide a novel and useful semiconductor device and a method of mounting semiconductor devices, in which the problems described above are eliminated. According to the invention, a semiconductor device unit is provided, comprising a holder having a plurality of holding parts and a plurality of semiconductor devices held by the holding parts of the holder in a vertical arrangement and parallel to each other, each of the semiconductor devices having a generally parallelepiped shape with top and bottom major surfaces and at least one side surface provided with leads which are exposed when the semiconductor device is held by the holding part of the holder, wherein the holding parts of the holder are slots and the semiconductor devices are held by their top and bottom major surfaces such that at least one side surface of each semiconductor device provided with the leads is exposed. Furthermore, according to the invention, a method of mounting a plurality of semiconductor devices having leads on at least one side surface thereof onto a circuit substrate is provided, comprising the steps of (a) holding the semiconductor devices in a vertical arrangement and parallel to each other in holding parts of a holder so that the leads are exposed, and (b) mounting the semiconductor devices held by the holder onto the circuit substrate by connecting the exposed leads to the circuit substrate, wherein in the step (a) the holding parts of the holder are slots, and the semiconductor devices are held by their top and bottom major surfaces such that at least one side surface of each semiconductor device provided with the leads is exposed. According to the present invention, it is possible to make the semiconductor devices stand vertically on a circuit substrate because the semiconductor devices are held by the holder. The pitch with which the semiconductor devices may be arranged on the circuit substrate is improved, particularly when two or more semiconductor devices are held by one holding part of the holder. Therefore, the present invention can realize a high density packaging. In addition, the holder protects the relatively thin semiconductor devices the mechanical strength of which is not very large. Furthermore, the heat generated from the semiconductor device is transferred to the holder by thermal conduction and the heat resistance of the semiconductor device unit as a whole is improved compared to that of the semiconductor device itself. Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG.1 is a perspective view showing a first embodiment of a semiconductor device unit according to the present invention; FIG.2 is a perspective view showing a semiconductor device shown in FIG.1; FIG.3 is a perspective view for explaining holding of the semiconductor devices in a holder shown in FIG.1; FIGS.4A through 4D are perspective views for explaining the soldering of leads of the semiconductor devices on a circuit substrate shown in FIG.1; FIG.5 is a perspective view showing a second embodiment of the semiconductor device unit according to the present invention; FIG.6 is a perspective view showing a third embodiment of the semiconductor device unit according to the present invention; FIG.7 is a perspective view showing a fourth embodiment of the semiconductor device unit according to the present invention; FIG.8 is a perspective view showing a semiconductor device to which the present invention may be applied; FIG.9 is a perspective view showing another semiconductor device to which the present invention may be applied; FIG.10 is a perspective view showing a fifth embodiment of the semiconductor device unit according to the present invention; FIG.11 is a perspective view showing a sixth embodiment of the semiconductor device unit according to the present invention; FIG.12 is a perspective view showing a seventh embodiment of the semiconductor device unit according to the present invention; FIG.13 is a perspective view showing an eighth embodiment of the semiconductor device unit according to the present invention; and FIG.14 is a perspective view showing a ninth embodiment of the semiconductor device unit according to the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS A description will be given of a first embodiment of a semiconductor device unit according to the present invention. FIG.1 shows the first embodiment, and in FIG.1, a semiconductor device unit 1 includes semiconductor devices 2 and a holder 3 which holds the semiconductor devices 2. For example, the semiconductor device 2 is a memory device such as the DRAM, and a plurality of semiconductor devices having the same construction are packaged on a single circuit substrate 7. Each semiconductor device 2 has the vertical package structure shown on an enlarged scale in FIG.2. In the semiconductor device 2 shown in FIG.2, a plurality of leads 5 extend outwardly from one side surface of a package 4 which is made of a resin. A semiconductor element (not shown) such as a memory device is encapsulated within the package 4. Because the package 4 is relatively thin, the mechanical strength of the semiconductor device 2 itself is poor and its heat resistance is large. On the other hand, as shown in FIG.2, the leads 5 are bent in an L-shape at the tip extension thereof. The semiconductor device 2 having the vertical package structure shown in FIG.2 does not easily stand by itself on the circuit substrate 7. Even if it were possible to make the semiconductor device 2 stand by itself on the circuit substrate 7, the semiconductor device 2 would be too unstable to allow satisfactory soldering of the leads 5 onto the circuit substrate 7. According to the present invention, the semiconductor devices 2 which by themselves cannot stably stand on the circuit substrate 7 are held by the holder 3 so that the semiconductor devices 2 stand stably on the circuit substrate 7 when soldering the leads 5 onto the circuit substrate 7. For example, the holder 3 is molded from a resin and has a box shape as shown in FIG.3. In this embodiment, the holder 3 has five holding parts 6 for receiving the semiconductor devices 2. Each holding part 6 opens at the front and bottom surfaces of the holder 3. The holding parts 6 may be formed at the same time as molding the holder 3 by known means. When assembling the semiconductor device unit 1, each semiconductor device 2 is inserted into the corresponding holding part 6 of the holder 3. The semiconductor device unit 1 is assembled by this simple operation. Hence, the packaging process will not become complex and will not greatly increase the number of production steps by this process of assembling the semiconductor device unit 1. Next, a description will be given of the method of soldering the leads 5 of the semiconductor devices 2 onto the circuit substrate 7, by referring to FIGS.4A through 4D. First, in FIG.4A, a mask 100 including a plurality of windows 101 is placed on the circuit substrate 7 so that each window 101 matches a corresponding region 105 where the solder is to be applied. Second, in FIG.4B, a roll of solder 107 rolls in a direction of an arrow over the mask 100 to form the solder 107 on the regions 105 of the circuit substrate 7 via the windows 101. Third, in FIG.4C, the mask 100 is removed, and as a result, solder parts 107a are formed in the regions 105 of the circuit substrate 7. Fourth, in FIG.4D, each semiconductor device 2 (only one shown for the sake of convenience) is placed on the circuit substrate 7 so that the leads 5 rest on the corresponding solder parts 107a. Then, a reflow process is carried out to connect the leads 5 onto the circuit substrate 7 by the melted solder parts 107a. FIG.1 shows the semiconductor device unit 1 in the assembled state, and the semiconductor devices 2 are held within the holder 3. The leads extend downwardly from each of the semiconductor devices 2 within the holder 3. Accordingly, although each semiconductor device 2 by itself cannot stand stably on the circuit substrate 7, the semiconductor devices 2 within the holder 2 cooperate and stand stably on the circuit substrate 7. There is no need to provide holes in the circuit substrate 7 as in the case of the proposed structure described above, and it is possible to improve the packaging efficiency. In addition, because the semiconductor devices 2 are held by the holder 3, it is possible to reduce the pitch with which the semiconductor devices 2 are arranged on the circuit substrate 7 and realize a high packaging density. The package 4 is relatively thin and the semiconductor device 2 by itself does not have a satisfactory mechanical strength and has a large heat resistance. However, when the semiconductor devices 2 are held by the holder 3, the package 4 of each semiconductor device 2 is in contiguous contact with walls of the holder 3 defining the corresponding holding part 6. For this reason, the holder 3 also functions as a support member for improving the mechanical strength of each semiconductor device 2, and cracks will not easily be formed in the package 4 although the package 4 itself is relatively thin. Furthermore, the heat generated from each semiconductor device 2 is transferred to the holder 3 by thermal conduction. As a result, the heat resistance of the semiconductor device unit 1 as a whole decreases compared to that of the semiconductor device 2 itself, and the heat is efficiently radiated. Therefore, it is possible to reduce the undesirable effects of heat on each of the semiconductor devices 2. FIG.5 shows a second embodiment of the semiconductor device unit according to the present invention. A semiconductor device unit 11 shown in FIG.5 includes a holder 13 and a plurality of semiconductor devices 2 held in holding parts 16 of the holder 13. In this embodiment, the holding part 16 opens only at the bottom surface of the holder 13. Hence, compared to the first embodiment shown in FIG.1 in which a side surface 2a of each semiconductor device 2 held by the holder 3 is exposed to the outside, the mechanical strength and the heat resistance of the semiconductor device 2 is improved in this second embodiment. In other words, the holding part 16 of the holder 13 is a rectangular well which opens only at the bottom surface of the holder 13. For this reason, the semiconductor device 2 is buried in the holder 13 when the semiconductor device 2 is held by the holding part 16, and all of the outer surfaces of the semiconductor device 2 excluding the surface provided with the leads 5 make contiguous contact with the walls defining the holding part 16. Therefore, the mechanical strength of the semiconductor device 2 is improved compared to that of the first embodiment, and it is also possible to improve the cooling efficiency of the semiconductor device 2. FIG.6 shows a third embodiment of the semiconductor device unit according to the present invention. In FIG.6, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. A semiconductor device unit 21 shown in FIG.6 includes a cooling fin 24 which is provided around selected outer surfaces of the holder 3. For example, the cooling fin 24 is made of a metal, and improves the cooling efficiency of the semiconductor device 2. FIG.7 shows a fourth embodiment of the semiconductor device unit according to the present invention. In FIG.7, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. A semiconductor device unit 31 shown in FIG.7 includes cooling fins 34 which are provided on the top surface of the holder 3. The cooling fins 34 improve the cooling efficiency of the semiconductor device 2. In FIGS.6 and 7, the holder 3 may be made of a metal or a plastic, and the cooling fins 24 and 34 may be made of a metal or a plastic. An arbitrary combination of materials may be used for the holder 3 and the cooling fins 24 and 34, but if the same material is used for the two, the cooling fins 24 and 34 may be integrally formed on the holder 3. In the embodiments described above, the semiconductor device 2 has the L-shaped leads 5. However, it is possible to use other types of semiconductor devices such as the semiconductor devices shown in FIGS.8 and 9. The semiconductor devices shown in FIGS.8 and 9 may also be used in fifth through eighth embodiments which will be described later. A semiconductor device 2 1 shown in FIG.8 has leads 5 1 which are arranged in a zigzag manner, so that the density of the leads 5 1 may be improved. A semiconductor device 2 2 shown in FIG.9 has loop shaped leads 5 2 . The shape of the leads 5 2 would make it almost impossible for the semiconductor device 2 2 to stand by itself on the circuit substrate 7, but the present invention would enable a plurality of such semiconductor devices 2 2 to stably stand on the circuit substrate 7 by the use of the holder. FIG.10 shows a fifth embodiment of the semiconductor device unit according to the present invention. In FIG.10, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. According to a semiconductor device unit 41 shown in FIG.10, a cooling fin 44 is provided on the left part of each semiconductor device 2 which is held by the holder 3, and each cooling fin 44 projects from the holder 3. As a result, the cooling effect of the semiconductor device 2 is improved. FIG.11 shows a sixth embodiment of the semiconductor device unit according to the present invention. In FIG.11, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. According to a semiconductor device unit 51 shown in FIG.11, a cooling part 54 including a plurality of cooling pins 54a is provided on the top surface of the holder 3. The holder 3 may be made of a metal or a plastic, and the cooling part 54 may be made of a metal or a plastic. An arbitrary combination of materials may be used for the holder 3 and the cooling part 54, but if the same material is used for the two, the cooling part 54 may be integrally formed on the holder 3. FIG.12 shows a seventh embodiment of the semiconductor device unit according to the present invention. In FIG.12, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. According to a semiconductor device unit 61 shown in FIG.12, only the top part of each semiconductor device 2 is fit into a holder 63. In other words, a holding part 66 of the holder 63 holds only the top part of the semiconductor device 2. Walls of the holder 63 defining the holding part 66 make contiguous contact with the top part of the semiconductor device 2, and thus, the holder 63 can make the semiconductor devices 2 stand stably on the circuit substrate 7 when soldering the leads 5 onto the circuit substrate 7. FIG.13 shows an eighth embodiment of the semiconductor device unit according to the present invention. In FIG.13, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. According to a semiconductor device unit 71 shown in FIG.13, a holder 72 has holding parts 76 V for vertically holding semiconductor devices 2 3 , and holding parts 76 H for horizontally holding the semiconductor devices 2. Each semiconductor device 2 3 has the leads 5 provided on two adjacent side surfaces thereof. When the semiconductor device 2 3 is held by the holding part 76 V of the holder 73, the leads 5 of the semiconductor device 2 3 are exposed at the front and bottom surfaces of the holder 73. On the other hand, when the semiconductor device 2 is held by the holding part 76 H of the holder 73, the leads of the semiconductor device 2 are exposed at the front surface of the holder 73. Therefore, according to this embodiment, both the leads 5 exposed at the front surface of the holder 73 and the leads 5 exposed at the bottom surface of the holder 73 can be soldered onto the circuit substrate 7. This embodiment is thus advantageous in that the semiconductor devices 2 3 having a large number of leads 5 can be packaged on the circuit substrates 7. In addition, different kinds of semiconductor devices can be positively supported by the holder 73 when making the packaging process. FIG.14 shows a ninth embodiment of the semiconductor device unit according to the present invention. In FIG.14, those parts which are the same as those corresponding parts in FIGS.1 through 3 are designated by the same reference numerals, and a description thereof will be omitted. According to a semiconductor device unit 81 shown in FIG.14, a holder 83 has two holding parts 86. Each holding part 86 holds three semiconductor devices 2 in contiguous contact therewith. As a result, the pitch with which the semiconductor devices 2 may be arranged on the circuit substrate 7 may further be improved. Of course, the number of semiconductor devices 2 held by each holding part 86 of the holder 83 is not limited to three, and an arbitrary number of semiconductor devices 2 greater than one may be held by each holding part 86. In each of the embodiments described above, it is desirable that no air exists between the surfaces of the semiconductor device and the walls of the holder holding at least a part of the semiconductor device. In order to ensure contiguous contact between the contacting surfaces of the semiconductor device and the walls defining the holding part of the holder, it is possible to coat a lubricant such as grease on the surface of the semiconductor device and/or the walls defining the holding part of the holder. In addition, the shape of the holder is not limited to that of the described embodiments. In other words, the holder in the described embodiments has a generally parallelepiped shape in conformance with the generally parallelepiped shape of the semiconductor device, but it is of course possible to employ other shapes for the holder. Moreover, in each of the embodiments excluding the second embodiment, the side surface of the semiconductor device exposed at the front of the holder does not necessarily have to coincide with the front surface of the holder. In other words, the end part of the semiconductor device may project slightly from the front surface of the holder. Further, the present invention is not limited to these embodiments, but various variations and modifications may be made without departing from the scope of the present invention.

Claims: A semiconductor device unit, comprising a holder (3, 13, 63, 73, 83) having a plurality of holding parts (6, 16, 66, 76, 86), and a plurality of semiconductor devices (2, 2 1 - 2 3 ) held by said holding parts of said holder in a vertical arrangement and parallel to each other, wherein each of said semiconductor devices has a generally parallelepiped shape with top and bottom major surfaces and at least one side surface provided with leads (5) which are exposed when the semiconductor device is held by the holding part of the holder, characterized in that said holding parts (6, 16, 66, 76, 86) of said holder (3, 13, 63, 73, 83) are slots, and said semiconductor devices are held by their top and bottom major surfaces such that at least one side surface of each semiconductor device (2, 2 1 - 2 3 ) provided with said leads (5) is exposed. The semiconductor device unit as claimed in claim 1, characterized in that the holding parts (16) of said holder (13) have a well structure such that only one side surface of each semiconductor device (2, 2 1 , 2 2 ) provided with the leads (5) is exposed. The semiconductor device unit as claimed in claim 1, characterized in that the holding parts (66) of said holder (63) have a slot structure such that only an end part of each semiconductor device (2, 2 1 , 2 2 ) excluding the end provided with the leads (5) is held by said holder. The semiconductor device unit as claimed in claim 1, characterized in that the holding parts (6, 76, 86) of said holder (3, 73, 83) have a slot structure such that two side surfaces of each semiconductor device (2, 2 1 -2 3 ) and including the side surface provided with the leads are exposed. The semiconductor device unit as claimed in claim 4, characterized in that the semiconductor device (2, 2 1 , 2 2 ) has a cooling fin (44) which extends outwardly from a first side surface of the semiconductor device, and the first side surface of the semiconductor device is one of the two side surfaces exposed via the holding part (6) which has the slot structure. The semiconductor device unit as claimed in claim 4, characterized in that an end part of the semiconductor device (2, 2 1 -2 3 ) including a first side surface of the semiconductor device projects from said holder (3, 73, 83), and the first side surface of the semiconductor device is one of the two side surfaces exposed via the holding part (3, 73, 83) which has the slot structure. The semiconductor device unit as claimed in any of claims 1 to 6, characterized in that there is further provided a cooling part (24, 34, 54) provided on said holder (3) for radiating heat generated from each semiconductor device (2, 2 1 -2 3 ). The semiconductor device unit as claimed in claim 7, characterized in that said cooling part (24, 34, 54) covers at least one predetermined outer surface of said holder (3). The semiconductor device unit as claimed in claim 7, characterized in that said cooling part (34, 54) comprises a plurality of pins (34, 54a) which project from at least one predetermined outer surface of said holder (3). The semiconductor device unit as claimed in any of claims 7 to 9, characterized in that said holder (3) is made of a material selected from a group consisting of metals and plastics, and said cooling part (24, 34, 54) is made of a material selected from a group consisting of metals and plastics. The semiconductor device unit as claimed in claim 10, characterized in that said holder (3) and said cooling part (24, 34, 54) are integrally formed from the same material. The semiconductor device unit as claimed in any of claims 1 to 11, characterized in that each holding part (6, 16, 66, 76) of said holder (3, 13, 63, 73) holds one semiconductor device (2, 2 1 -2 3 ). The semiconductor device unit as claimed in any of claims 1 to 11, characterized in that each holding part (86) of said holder (83) holds a plurality of semiconductor devices (2, 2 1 -2 3 ). The semiconductor device unit as claimed in any of claims 1 -13, characterized in that further holding parts (76 H ) being slots are provided for horizontally holding further semiconductor devices (2, 2 1 - 2 3 ). The semiconductor device unit as claimed in claim 14, characterized in that the semiconductor device (2 3 ) held by the first holding part (76 V ) of said holder (73) has the leads (5) provided on two adjacent side surfaces thereof. The semiconductor device unit as claimed in any of claims 1 to 15, characterized in that walls of said holder (3, 13, 63, 73, 83) defining the holding part (6, 16, 66, 76, 86) make contiguous contact with at least the top and bottom major surfaces of the semiconductor device (2, 2 1 -2 3 ) which is held thereby. The semiconductor device unit as claimed in claim 16, characterized in that a lubricant is coated on at least one of the walls of said holder (3, 13, 63, 73, 83) defining the holding part (6, 16, 66, 76, 86) and at least the top and bottom major surfaces of the semiconductor device (2, 2 1 -2 3 ) which is held thereby. The semiconductor device unit as claimed in any of claims 1 to 17, characterized in that the leads (5) of the semiconductor device (2, 2 2 , 2 3 ) has a shape selected from a group consisting of an L-shape and a loop shape. The semiconductor device unit as claimed in any of claims 1 to 17, characterized in that the leads (5) of the semiconductor device (2 1 ) are arranged in a zigzag pattern on the side surface thereof. A method of mounting a plurality of semiconductor devices (2, 2 1 - 2 3 ) having leads (5) provided on at least one side surface thereof onto a circuit substrate (7), said semiconductor devices (2, 2 1 -2 3 ) having a generally parallelepiped shape and top and bottom major surfaces, comprising the steps of (a) holding said semiconductor devices (2, 2 1 - 2 3 ) in a vertical arrangement and parallel to each other in holding parts (6, 16, 66, 76, 86) of a holder (3, 13, 63, 73, 83) so that said leads are exposed, and (b) mounting said semiconductor devices held by said holder onto said circuit substrate (7) by connecting said exposed leads to said circuit substrate, characterized in that in said step (a), said holding parts (6, 16, 66, 76, 86) of said holder (3, 13, 63, 73, 83) are slots, and said semiconductor devices are held by their top and bottom major surfaces such that at least one side surface of each semiconductor device (2, 2 1 - 2 3 ) provided with said leads (5) is exposed. The method as claimed in claim 20, characterized in that said step (a) uses a holder (63) having holding parts (66) with a slot structure such that only an end part of each semiconductor device (2, 2 1 -2 3 ) excluding the end provided with the leads (5) is held by the holder. The method as claimed in claim 20, characterized in that said step (a) uses a holder (3, 73, 83) having holding parts (6, 76, 86) with a slot structure such that two side surfaces of each semiconductor device (2, 2 1 -2 3 ) and including the side surface provided with the leads (5) are exposed. The method as claimed in any of claims 20 to 22, characterized in that said step (a) uses a holder (3) provided with a cooling part (24, 34, 54) for radiating heat generated from each semiconductor device (2, 2 1 -2 3 ). The method as claimed in any of claims 20 to 23, characterized in that said step (a) uses a holder (3, 13, 63, 73) such that each holding part (6, 16, 66, 76) of the holder holds one semiconductor device (2, 2 1 -2 3 ). The method as claimed in any of claims 20 to 23, characterized in that said step (a) uses a holder (83) such that each holding part (86) of the holder holds a plurality of semiconductor devices (2, 2 1 -2 3 ). The method as claimed in any of claims 20 to 25, characterized in that said step (a) uses further holding parts (76 H ) being slots for horizontally holding further semiconductor devices (2, 2 1 -2 3 ). The method as claimed in claim 26, characterized in that said step (a) holds by the first holding part (76 V ) of the holder (73) a semiconductor device (2 3 ) having the leads (5) provided on two adjacent side surfaces thereof. The method as claimed in any of claims 20 to 27, characterized in that said step (a) holds the semiconductor devices (2, 2 1 -2 3 ) in the holding parts (6, 16, 66, 76, 86) of the holder (3, 13, 63, 73, 83) so that walls of the holder defining the holding part make contiguous contact with at least top and bottom major surfaces of the semiconductor device (2, 2 1 -2 3 ) which is held thereby. The method as claimed in claim 28, characterized in that said step (a) includes coating a lubricant on at least one of the walls of the holder (3, 13, 63, 73, 83) defining the holding part (6, 16, 66, 76, 86) and at least the top and bottom major surfaces of the semiconductor device (2, 2 1 -2 3 ) which is held thereby. The method as claimed in any of claims 20 to 29, characterized in that said step (b) mounts the semiconductor devices (2, 2 1 -2 3 ) held by the holder (3, 13, 63, 73, 83) onto the circuit substrate (7) by soldering the exposed leads (5) to the circuit substrate.

Inventors: KASAI JUNICHI, SONO MICHIO, TANIGUCHI NORIO, TSUJI KAZUTO, YOSHIMOTO MASANORI, KASAI, JUNICHI, SONO, MICHIO, TANIGUCHI, NORIO, TSUJI, KAZUTO, YOSHIMOTO, MASANORI, KASAI, JUNICHI, C/O FUJITSU LIMITED, Sono, Michio, c/o Fujitsu Limited, TANIGUCHI, NORIO, C/O FUJITSU LIMITED, TSUJI, KAZUTO, C/O FUJITSU LIMITED, Yoshimoto, Masanori, c/o Fujitsu Limited
Applicants: FUJITSU LTD, FUJITSU LIMITED
Application year: 1992
Main classification: H01L23
IPC codes: H01L21, H01L25, H05K3, H01L23