Audio amplifier

Abstract: An amplifier in which a current mirror circuit 53 is formed of a transistor Q25 on the input side and a transistor Q26 on the output side. The base-emitter junction area of the transistor Q26 is set to be N (N > 1) times as large as that of the transistor Q25. A parallel circuit of a resistor R25 and a capacitor C25 is connected between the base of the transistor Q25 and its bias point Q27. A resistor R26 is connected between the base of the transistor Q26 and the bias point Q27. The resistance value of the resistor R25 is set to be virtually N times as large as the resistance value of the resistor R26. When an input current i25 is supplied to the transistor Q25, an output current i26, which is N times as large as the input current, is obtained from the transistor Q26 on the output side, whereas the output current i26 is held lower than N times of the input current i25 when the frequency of the input current is high

Description: The present invention relates to a wideband amplifier for use for example in an AM radio receiver. When integrating a radio receiver into a one-chip IC arrangement, if the intermediate-frequency filter is formed of a ceramic filter or the like, it becomes impossible to incorporate the intermediate-frequency filter into the IC. Accordingly, it is considered as a solution to form the intermediate-frequency filter of an active filter using resistors, capacitors, and operational amplifiers. In such case, if the intermediate frequency f i is set to its standard value, 450 kHz, satisfactory results cannot be obtained because, then, the area occupied by the active filter on the semiconductor pellet becomes too great. Accordingly, it is further considered to reduce the intermediate frequency f i to a value sufficiently lower than the frequency band of the received signal, to 55 kHz, for example. FIG. 3 of the accompanying drawings is a diagram showing an example of such IC or radio receiver. Referring to FIG. 3, the portion 10 enclosed by a chain line indicates an IC for the one-chip IC AM receiver and T1 to T8 denote its external terminal pins, of which the pin T3 is a power supply pin and the pin T4 is a grounding terminal pin. The parts located outside the chain line are parts or circuits externally connected to the IC, of which reference numeral 1 denotes an antenna tuner and 2 denotes a resonator for local oscillation. The tuner 1 is formed of a bar antenna (antenna tuning coil) L1 and a variable capacitor VC1 and the resonator 2 is formed of a local oscillation coil L2 and a variable capacitor VC2 associated with the variable capacitor VC1. Further, SW denotes a power supply switch, BATT denotes a power supply battery for example of 3 V, VR denotes a variable resistor for volume control, and SP denotes a speaker. By the antenna tuner 1, a broadcast wave signal S r with a frequency f r S r = Er·sinω r t ω r = 2π f r is selectively acquired. Since what are relevant to signal processes described hereinafter are only the relative amplitude and phase between these signals, the initial phase is neglected in the above expression and in the following description. The signal S r is supplied to a high-frequency amplifier 11 through the terminal pin T1 of the IC 10, and the signal S r from the amplifier 11 is supplied to a first and a second mixer 12A and 12B. To the resonator 2, a local oscillator 13 is connected through the terminal pin T2, and therein, a local oscillation signal S o is generated. At this time, the oscillation frequency of the oscillation signal S o is set to 2f o such that 2f o = (f r + f i ) x 2, where f i is an intermediate frequency, f i = 55 kHz. The oscillation signal S o is supplied to a frequency divider (counter) 14 and divided into local signals S oa and S ob with a half the original frequency and a phase difference of 90° therebetween. More specifically, the oscillation signal S o is divided for frequency into S oa and S ob such that S oa = E o ·cos ω o t, S ob = E o ·sin ω o t, where ω o = 2π f o . These signals S oa and S ob are supplied to the mixers 12A and 12B, respectively, to be multiplied by the signal S r , and the following signals S ia and S ib are taken out from the mixers 12A and 12B S ia = S r ·S oa = E r ·sin ω r t·E o ·cos ω o t = α {sin(ω r + ω o )t + sin(ω r - ω o )t}, S ib = S r ·S ob = E r ·sin ω r t·E o .sin ω o t = α {-cos(ω r + ω o )t + cos(ω r - ω o )t}, where α = E r · E o /2. As described later, the signal components with the angular frequency (ω r - ω o ) out of the above signals S ia and S ib are used as the intermediate-frequency signals and the signal components with the angular frequency (ω r + ω o ) are eliminated. Hence, neglecting, for simplicity, the signal components with the angular frequency (ω r + ω o ) in the above expressions, we obtain S ia = α ·sin(ω r - ω o )t, S ib = α · cos(ω r - ω o )t. An image signal S m , at this time, is expressed as S m = E m ·sin ω m t, where ω m = ω o + ω i , ω i = 2π f i . Hence, if the image signal S m is included in the broadcast wave signal S r from the tuner 1, then the signals S ia and S ib become S ia = α ·sin(ω r - ω o )t + β ·sin(ω m - ω o )t, S ib = α ·cos(ω r - ω o )t + β ·cos(ω m - ω o )t, where β = E m ·E o /2. Further, since ω r < ω o < ω m , the above expressions become S ia = α ·sin(ω r - ω o )t + β ·sin(ω m - ω o )t = -α ·sin(ω o - ω r )t + β ·sin(ω m - ω o )t, S ib = α ·cos(ω r - ω o )t + β ·cos(ω m - ω o )t, = α ·cos(ω o - ω r )t + β ·cos(ω m - ω o )t. These signals S ia and S ib are supplied to phase shifters 15A and 15B. The phase shifters 15A and 15B are formed for example of active filters using capacitors, resistors, and operational amplifiers. The signal S ia is shifted for phase in the phase shifter 15A by a value  and the signal S ib is shifted for phase in the phase shifter 15B by a value ( + 90° ), and thereby, the two input signals S ia and S ib are shifted for phase so as to have the phase difference 90° ±1° therebetween, within the frequency range of 55 kHz ± 10 kHz. Thus, the signal S ib is arranged to lead the signal S ia by 90° by the phase shifters 15A and 15B, and these signals become S ia = -α · sin(ω o - ω r )t + β·sin(ω m - ω o )t, S ib = α ·cos{(ω o - ω r )t + 90° } + β · cos{(ω m - ω o )t + 90° } = -α · sin(ω o - ω r )t - β · sin(ω m - ω o )t. These signals S ia and S ib are supplied to an adder 16 to be added together. From the adder 16 is obtained a signal S i expressed as S i = S ia + S ib = -α · sin(ω o - ω r )t + β ·sin(ω m - ω o )t + {-α · sin(ω o - ω r )t - β · sin(ω m - ω o )t} = - 2α · sin(ω o - ω r )t. Since, here, ω o - ω r = 2π (f o - f r ) = 2π f i , the signal S i is the desired intermediate-frequency signal. Further, it is known that, even if an image signal S m is included in the broadcast wave signal S r from the tuner 1, the intermediate-frequency signal S i does not include signal components due to the image signal S m because such signal components cancel each other. Thus, the intermediate-frequency signal S i (and signal components with the angular frequency (ω r + ω o ) and others) converted from the broadcast wave signal S r can be obtained from the adder 16. The intermediate-frequency signal S i is supplied to a bandpass filter 17 for intermediate-frequency filtering. The bandpass filter 17 is formed for example of a biquad active filter using capacitors, resistors, and operational amplifiers and its passband is set to be 55 kHz ± 3 kHz. Thus, unnecessary signal components are attenuated by the bandpass filter 17 and only the intermediate-frequency signal S i is taken out. The thus obtained intermediate-frequency signal S i is supplied to an AM detector 22 through an amplifier 21, and thereby, an audio signal S s (and a DC component V22 corresponding to the level of the intermediate-frequency signal S i ) is taken out and this audio signal S s is supplied to an audio amplifier 23 with differential inputs. The signal S s from the amplifier 23 is supplied to the speaker SP through the pin T8 and a capacitor C5. The signal S ib from the mixer 12B is supplied to an AGC voltage generator 18 and, therein, an AGC voltage is generated. This AGC voltage is supplied to the amplifier 11 as the control signal of its gain and, therein, an AGC operation is performed on the signals S ia and S ib . In this case, the generator 18 is connected with a capacitor C3 for smoothing the AGC voltage through the pin T5. The AGC voltage is further supplied to each of operational amplifiers constituting the phase shifters 15A and 15B and the bandpass filter 17 as the reference voltage. The detected output from the detector 22 is supplied to an AGC voltage generator 24 to obtain an AGC voltage, and this AGC voltage is supplied to the amplifiers 11 and 21 as the control signal of their gains and, therein, AGC operations are performed on the signals S ia , S ib , and S i . In this case, the generator 24 is connected with a capacitor C4 through the pin T6, and a low-pass filter is formed with this capacitor C4, and thereby, the DC voltage V22 is extracted from the detected output, and from this DC voltage V22 is generated the AGC voltage. The DC voltage V22 is supplied to the differential input of the amplifier 23, whereby the DC component V22 supplied, together with the audio signal S s , from the detector 22 to the amplifier 23 is equivalently canceled. Further, the amplifier 23 is connected with the variable resistor VR through the pin T7. The gain of the amplifier 23 is controlled according to the resistance value of the variable resistor VR and, thus, the volume control is achieved with this variable resistor VR. The capacitor C6 is for bypassing signal components other than the audio signal S s . In the present example, since the intermediate frequency f i is sufficiently lower than the general intermediate frequency or receive band, the area occupied by the bandpass filter (intermediate-frequency filter) 17 for each step becomes larger but the number of steps for obtaining a required selectivity characteristic can be decreased. Accordingly, the area occupied by the whole of the bandpass filter 17 can be made smaller and hence it can be integrated into the IC arrangement. When the intermediate frequency f i is low, the image characteristic generally becomes worse, but since the image signal S m is removed by the circuits 12A to 16, the image characteristic is prevented from becoming worse. Further, since the phase shifters 15A and 15B as well as the bandpass filter 17 are formed of active filters, there is a limit in the signal level which can be handled by each of the circuits 15A, 15B, and 17. However, since AGC is applied to the amplifier 12, the phase shifters 15A and 15B and the bandpass filter 17 can be prevented from being applied with excessive inputs. An arrangement of AM/FM receiver with the described idea applied thereto is already disclosed in Japanese Laid-open Patent Publication No. 1-273432 (to which U.S. Pat. No. 5,020,147 corresponds). When a one-chip IC is arranged with the above idea applied thereto and a radio receiver is integrated into such an arrangement, the frequency band of the audio amplifier 23 extends to the receive frequency band of the receiver. Accordingly, a high-frequency feedback loop passing through the bar antenna L1 → receiving circuit system of the IC 10 → output terminal pin T8 → bar antenna L1 is formed, and therefore, when the output of the amplifier 23 is made greater (when the gain of the amplifier 23 is increased), a troublesome oscillating state is produced in the high-frequency band. To avoid such trouble, such a method as follows can be considered to cut off the feedback loop: 1. To connect a capacitor C6 between the pin T8 and ground; 2. To prolong the distance between the bar antenna L1 and the output terminal pin T8; 3. To insert a high-frequency choke coil between the output terminal pin T8 and the speaker SP; or 4. To insert a high-frequency choke coil between the power supply terminal pin T3 and the switch SW. However, when the method of the item number 1 is used, it is required to make the impedance of the capacitor C6 sufficiently smaller than the impedance of the speaker Sp at the frequency causing the oscillation. To meet this requirement, the capacity of the capacitor C6 must be great. Then, it becomes impossible to integrate the capacitor C6 into the IC 10, but necessary to attach the capacitor C6 externally to the IC 10, which leads to increase in the number of parts used. When the method of the item number 2 is used, though the number of the parts is not increased, the miniaturization of the receiver becomes unachievable. Further, when the method of the item number 3 or 4 is used, the coil cannot be integrated into the IC and, hence, the number of parts increases the same as in the case where the method of the item number 1 is used. Thus, it has been difficult to obtain a miniaturized high-performance receiver and the present invention is directed to the solution of the above described problem. EP-A3-0257345 discloses a current mirror circuit in which a feedback capacitor and series resistor are connected between the base of two transistors of a current mirror and the collector of the input side to reduce instability by reducing the frequency at which the open loop gain is unity. This allows the resistor and capacitor to be of such a size that they can be as an integrated circuit and can be used in an N-times scaling current mirror circuit. According to the present invention there is provided an amplifier comprising: two transistors connected as a current minor circuit with one on the input side (Q 25 ,Q 35 ) and the other on the output side (Q 26 ,Q 36 ) their bases being connected to a common bias point, wherein: the base-emitter junction area of said transistor on the output side (Q 26 ,Q 36 ) is set to be N (N > 1) times as large as the base-emitter junction area of said transistor on the input side (Q 25 ,Q 35 ); whereby when an input current is supplied to said transistor on the input side (Q 25 ,Q 35 ), an output current amplified by a factor N is obtained from said transistor on the output side (Q 26 ,Q 36 ) and a feedback circuit including a first resistor (R 25 ,R 35 ) and a capacitor (C 25 ,C 35 ) is connected to the base of the transistor on the input side (Q 25 ,Q 35 ) characterised in that: the base of said transistor on the input side (Q 25 ,C 35 ) is connected to the bias point via a parallel circuit of the first resistor (R 25 ,R 35 ) and the capacitor (C 25 ,C 35 ); and the base of said transistor on the output side (Q 26 ,Q 36 ) is connected to said bias point via a second resistor (R 26 ,R 36 ), the resistance value of said first resistor (R 25 ,R 35 ) being set to be substantially N times as large as the resistance value of said second resistor (R 26 ,R 36 ); whereby when the frequency of the input current and the output current is high the decrease in the impedance of said capacitor (C 25 ,C 35 ) holds the output current lower than N times of the input current. The frequency characteristic of the current mirror circuit 53 is corrected by the capacitor C25 and the current gain is decreased when the frequency is higher than the frequency determined by the time constant of the capacitor C25 and the resistor R25 and above. Thereby, unnecessary signal is not amplified for current in the high-frequency band. The invention will be further described by way of non-limitative example with reference to the accompanying drawings, in which:- Figure 1 is a correction diagram showing a portion of an example of the invention; FIG. 2 is a waveform chart explanatory of operation in an example of the invention; and FIG. 3 is a system diagram showing an example of a one-chip IC receiver. FIG. 1 shows an example of the power amplifying stage of the above described audio amplifier 23 of the IC 10. Referring to FIG. 1, the emitters of the transistors Q11 and Q12 are connected in common with the collector of the transistor Q16 for constant-current supply and, thereby, a differential amplifier 41 having the power supply terminal pin T3 as its reference potential point is formed, and the audio signal from the preamplifier stage 231 of the amplifier 23 is supplied to the base of the transistor Q11. A current mirror circuit 42 is formed of transistors Q13 and Q14 with the terminal pin T4 used as its reference potential point, and the current mirror circuit is connected to the transistors Q11 and Q12 as the load thereof. Further, a transistor Q15 is connected to the transistor Q16 and, thereby, a current mirror circuit 43 is formed, with the transistor Q15 used as its input side and the terminal pin T3 used as its reference potential point, while the transistor Q15 is connected with a constant-current source Q10. Thus, the power amplifier input portion is formed of the differential amplifier 41 and current-mirror circuits 42 and 43. Further, a current mirror circuit 51 is formed of transistors Q21 and Q22 with a constant-voltage source Vr used as its reference potential point, while the collector of the transistor Q21 on its input side is connected with the collectors of the transistors Q12 and Q14, and the collector of the transistor Q22 on its output side is connected with the collector of a transistor Q23. This transistor Q23, together with a transistor Q24, forms a current mirror circuit 52 having the terminal pin T4 as its reference potential point, while the collector of the transistor Q24 on its output side is connected with the collector of a transistor Q25. The transistor Q25, together with a transistor Q26, forms a current mirror circuit 53, having the transistor Q26 as the transistor on its output side, a transistor Q27 as that for its base bias, and the terminal pin T3 as its reference potential point, while the collector of the transistor Q26 is connected with the terminal pin T8. In this case, in the current mirror circuit 53, there is connected a resistor R27 for setting the bias current between the emitter of the transistor Q27 and the terminal pin T3, and at the same time, resistors R25 and R26 are connected between the emitter of the transistor Q27 and the bases of the transistors Q25 and Q26, of which the resistor R25 is connected in parallel with a capacitor C25. Further, a current mirror circuit 61 is formed of transistors Q31 and Q32 with the terminal pin T4 used as its reference potential point, while the collector of the transistor Q31 on its input side is connected with the collectors of the transistors Q12 and Q14, and the collector of the transistor Q32 on its output side is connected with the collector of a transistor Q33 through the transistor Q38 with its base grounded. The transistor Q33, together with a transistor Q34, forms a current mirror circuit 62 with the terminal pin T3 used as its reference potential point, while the collector of the transistor Q34 on its output side is connected with the collector od a transistor Q35. The transistor Q35, together with a transistor Q36, forms a current mirror circuit 63 having the transistor Q36 as the transistor on its output side, a transistor Q37 as that for base biasing, and the terminal pin T4 as its reference potential point, while the collector of the transistor Q36 is connected with the terminal pin T8. In the current mirror circuit 63, in this case, a resistor R37 for bias current setting is connected between the emitter of the transistor Q37 and the terminal pin T4, resistors R35 and R36 are connected between the emitter of the transistor Q37 and the bases of the transistors Q35 and Q36, and the resistor R35 has a capacitor C35 connected in parallel therewith. Further, in the present example, each of the base-emitter junction areas of the transistors Q22 and Q32 on the output sides of the current mirror circuits 51 and 61 is made 6 times as large as each of the base-emitter junction areas of the transistors Q21 and Q31 on the input sides of the same, and similarly, each of the base-emitter junction areas of the transistors Q24 and Q34 is made 6 times as large as each of the base-emitter junction areas of the transistors Q23 and Q33. Further, each of the base-emitter junction areas of the transistors Q26 and Q36 is made 100 times as large as each of the base-emitter junction areas of the transistors Q25 and Q35. As described above, the base-emitter junction area of the transistor on the output side has been made larger than the base-emitter junction area of the transistor on the input side by directly forming one area larger than the other. Other than that, while making equal the base-emitter junction area of the transistor on the input side and that of the transistor on the output side, the number of the transistors on the output side may be increased, or the number of the emitters of the transistor on the output side may be increased, so that the base-emitter junction area on the output side will become larger, in effect, than the base-emitter junction area of the transistor on the input side. In proportion to the ratio of the base-emitter junction area (100) of the transistors Q26 and Q36 to the base-emitter junction area of the corresponding transistors Q25 and Q35, the resistance value of the resistors R25 and R35 is made 100 times as large as the resistance value of the corresponding resistors R26 and R36. For example, it is arranged such that R25, R35 = 4 kΩ , R26, R36 = 35 to 40Ω , R27, R37 = 120 kΩ , C25, C35 = 20 pF. Thus a class-B power amplifier output portion is formed of the current mirror circuits 51 to 53 and 61 to 63. The collectors of the transistors Q26 and Q36 are connected with the base of the transistor Q11 through a resistor R11 and a capacitor C11 for negative feedback. The speaker Sp is connected to the terminal pin T8 through a capacitor C5. The terminal pin T3 is connected with a battery BATT for example of 3 V as the power supply. According to the above described arrangement, an audio signal is supplied from the preamplifier stage 231 to the differential amplifier 41 and thereby converted from voltage to current, and the signal current is is output from the collectors of the transistors Q12 and Q14. When the signal period during which the current is flows out of the collector of the transistor Q12 is called a positive half-cycle period and the signal period during which the current is flows into the collector of the transistor Q14 is called a negative half-cycle period, the transistor Q31 is turned on by the current is during the positive half-cycle period. Therefore, the positive half-cycle portion of the signal current is, indicated by a dotted line in FIG. 2, flows through the transistor Q31 as its collector current (signal current) i31 and this signal current i31 is passed through the signal lines of the current mirror circuit 61 → current mirror circuit 62 → current mirror circuit 63 and output to the terminal pin T8. Further, since the transistor Q21 is turned on during the negative half-cycle period of the current i s , the half-cycle portion of the signal current i s , indicated by a solid line in FIG. 2, flows through the transistor Q21 as its collector current i21 and this signal current i21 is passed through the signal lines of the current mirror circuit 51 → current mirror circuit 52 → current mirror circuit 53 and output to the terminal pin T8. Since, as described above, the base-emitter junction areas of the transistors on the output side are made 6 times, 6 times, and 100 times as large as the base-emitter junction areas of the corresponding transistors on the input side in the current mirror circuits (51, 61), (52, 62), and (53, 63) in the present example, the currents i31 and i21 are amplified for current by factors 6, 6, and 100 in the current mirror circuits (51, 61), (52, 62), and (53, 63), respectively, and totally amplified for current by a factor 3600 and output to the terminal pin T8. This amplified output is supplied to the speaker SP. Further, since the current mirror circuits 53 and 63 are connected with elements R25, R26, C25, R35, R36, and C35, an oscillating state is not produced in the high-frequency band even when the output of the amplifier 23 is increased. More specifically, denoting or expressing, as to the current mirror circuit 53, such that N: the ratio between base-emitter junction areas of the transistors Q26 and Q25, N = 100 i25: AC component of the collector current of the transistor Q25 I25: DC component of the collector current of the transistor Q25 i26: AC component of the collector current of the transistor Q26 I26: DC component of the collector current of the transistor Q26 hFE: current amplification factor of the transistors Q25 and Q26 Z25: Impedance of the parallel connection of the elements R25 and C25 VT = kT/q, we obtain the following expression holding with respect to the voltage between the terminal pin T3 and the emitter of the transistor Q27 (VT/I25) i25 + Z25 (i25/hFE) = (VT/I26) i26 + R26 (i26/hFE). Since the currents I25 and I26 are small when the signal is of small intensity, the following relationships hold (VT/I25) > (Z25/hFE), (VT/I26) > (R26/hFE). Hence, the expression (1) becomes approximately (VT/I25) i25 = (VT/I26) i26 ∴ i26/i25 = (VT/I25)/(VT/I26) = I26/I25 = 100 (= N). That is, the current gain of the current mirror circuit 53 when the signal is of small intensity becomes 100. When the signal is of great intensity, the currents I25 and I26 become large and approximately the following relationships hold in the expression (1) (VT/I25) i25 = 0, (VT/I26) i26 = 0. Hence, the expression (1) becomes Z25(i25/hFE) = R26(i26/hFE) ∴ i26/i25 = Z25/R26. When the signal frequency is low, the impedance of the capacitor C25 becomes high and hence Z25 = R25. Therefore, the expression (2) becomes i26/i25 = R25/R26 = 100. That is, even when the signal is of great intensity, the current gain of the current mirror circuit 53 becomes 100 provided that the signal frequency is low. When the signal frequency is high, the impedance of the capacitor C25 becomes low, and hence Z25 = 1/(2π f C25) where f: signal frequency. Therefore, the expression (2) becomes i26/i25 = 1/(2π f C25 R26) < 100. That is, when the signal is of great intensity and the signal frequency is high, the current gain of the current mirror circuit 53 becomes smaller than 100. In summary, the current gain of the current mirror circuit 53 becomes A. 100 when the signal is of small intensity, regardless of the signal frequency; B. 100 when the signal is of great intensity and the signal frequency is low; and C. smaller than 100 when the signal is of great intensity and the signal frequency is high. The current gains of the current mirror circuit 63 are entirely the same as those of the current mirror circuit 53. According to the present invention, as described in the foregoing, the current gain of each of the current mirror circuits 53 and 63 becomes smaller than the standard value (= 100) when the output is large and the frequency is in the high-frequency band and, hence, the current gain of the amplifier 23 becomes lower than the standard value (= 3600). Consequently, the feedback loop including the amplifier 23 is cutoff and no oscillation is produced in the high-frequency band. However, the amplifier 23 provides its standard gain for the audio signal and thereby achieves sufficient amplification of it, and it does not lower the distortion factor when the signal is of small intensity. Further, since the need for using the methods 1 to 4 mentioned earlier can be eliminated, the parts externally attached can be reduced in number and, in addition, the characteristics required of the receiver are prevented from being deteriorated by the use of one of the methods 1 to 4. Furthermore, the degree of freedom in the arrangement of the IC 10 and the parts externally attached thereto can be made great and, accordingly, a miniaturized high-performance receiver can be provided.

Claims: An amplifier comprising: two transistors connected as a current mirror circuit with one on the input side (Q 25 ,Q 35 ) and the other on the output side (Q 26 ,Q 36 ) their bases being connected to a common bias point, wherein: the base-emitter junction area of said transistor on the output side (Q 26 ,Q 36 ) is set to be N (N > 1) times as large as the base-emitter junction area of said transistor on the input side (Q 25 ,Q 35 ); whereby when an input current is supplied to said transistor on the input side (Q 25 ,Q 35 ), an output current amplified by a factor N is obtained from said transistor on the output side (Q 26 ,Q 36 ) and a feedback circuit including a first resistor (R 25 ,R 35 ) and a capacitor (C 25 ,C 35 ) is connected to the base of the transistor on the input side (Q 25 ,Q 35 ) characterised in that: the base of said transistor on the input side (Q 25 ,C 35 ) is connected to the bias point via a parallel circuit of the first resistor (R 25 ,R 35 ) and the capacitor (C 25 ,C 35 ); and the base of said transistor on the output side (Q 26 ,Q 36 ) is connected to said bias point via a second resistor (R 26 ,R 36 ), the resistance value of said first resistor (R 25 ,R 35 ) being set to be substantially N times as large as the resistance value of said second resistor (R 26 ,R 36 ); whereby when the frequency of the input current and the output current is high the decrease in the impedance of said capacitor (C 25 ,C 35 ) holds the output current lower than N times of the input current. An amplifier according to claim 1 wherein the emitters of said transistors (Q 25,26 ,Q 35,36 ) are connected with a reference potential point; and further comprising a bias transistor (Q 27 ,Q 37 ), the base thereof being connected with the collector of said transistor on the input side (Q 25 ,Q 35 ) and the emitter thereof being connected with said reference potential point through a biasing resistor (R 27 ,R 37 ); the parallel circuit of the first resistor (R 25 ,R 35 ) and the capacitor (C 25 ,C 35 ) being connected between the base of said transistor on the input side (Q 25 , Q 35 ) and the emitter of said transistor for biasing (Q 27 ,Q 37 ); and the second resistor (R 27 ,R 37 ) being connected between the base of said transistor on the output side (Q 26 ,Q 36 ) and the emitter of said transistor for biasing (Q 27 ,Q 37 ). An amplifier according to claim 1 or 2 wherein the said base-emitter junction area is set by providing a predetermined number of transistors on the input and/or output sides. An amplifier according to any one of the preceding claims wherein N is approximately 100.

Inventors: OKANOBU TAIWA, TOMIYAMA HITOSHI, OKANOBU, TAIWA, TOMIYAMA, HITOSHI
Applicants: SONY CORP, SONY CORPORATION
Application year: 1992
Main classification: H03F1
IPC codes: H03F1, H03F3