Integrated circuit and electronic apparatus

Abstract: An integrated circuit (1) of this invention is comprised of a processor (11), a first circuit (12) for generating a clock signal, and a second circuit (13) for selecting a suitable line voltage. Said first circuit (12) generates at least two kind of clock signals. When one kind of clock signal having a high frequency is selected to use, said processor (11) gives an instruction to the second circuit (13) so as to change the connection between external batteries (2a, 2b), and so, to obtain a high line voltage. On the contrary, when the other kind of clock signal having a low frequency is selected to use, said processor (11) gives an instruction to the second circuit (13) so as to change the connection between said batteries (2a, 2b), and so, to obtain a low line voltage.

Description: BACKGROUND OF THE INVENTION Field of the Invention This invention relates to an integrated circuit for use in an electronic apparatus in which high speed operation is required by battery drive. This invention also relates to the electronic apparatus itself. Description of the Prior Art In portable type electronic apparatus such as an electronic calculator, an electronic memo, a personal computer, and a portable telephone, batteries having small capacity should be used to be power supplies, in order to reduce the whole size and the weight of the apparatus. Therefore, in order to use these apparatus for a long time without changing batteries, that is, to increase the life time of batteries, it is very important to reduce the power consumption in these apparatus. To realize the reduction of power consumption in those apparatus, processes, in which high speed operation is not required, are executed with a clock signal having a lower frequency than that of the clock signal for use in processings in which high speed operation is required. Thus, to reduce the power consumption in a prior art electronic apparatus having small capacity of batteries, the frequency of an operational clock signal is made to change according to the speed of processings. On the other hand, high speed operation is strongly required in said apparatus as well as to improve its function. Therefore, a processing which requires a high speed operation is executed with synchronous to an operational clock signal having a higher frequency than that of the clock signal for use in a processing which does not require a high speed operation. However, in the case where a high frequency clock signal is used to execute a process, considerably high line voltage is required. This is because the operational frequency characteristic of an integrated circuit depends on its line voltage. In other words, raising the frequency of an operational clock signal requires increasing the line voltage. Because of the above mentioned reason, in a prior art, the line voltage of an electronic apparatus was fixed to a certain voltage level which corresponds to an operational clock signal used in processings in which high speed operation is required. As a result, the line voltage of the whole apparatus has become higher than that of corresponding to an operational clock signal used in processings in which high speed operation is not required. The power consumption of an electronic apparatus is proportional to the product of a line voltage value and a clock signal frequency. Consequently, even if a low frequency was selected to be the clock signal frequency in order to execute processings in which high speed operation is not required, the power consumption could not be largely reduced. This is because the line voltage was fixed to a high level for use in processings in which high speed operation is required. As a result, contrary to the expectation, the life time of a battery could not be largely improved. The above mentioned fact causes a big trouble to make small and light of an electronic system having a relatively large size, such as a personal computer. As described above, in a prior art electronic apparatus having small capacity of batteries as a power source, the line voltage of an integrated circuit was fixed to a high level. Therefore, even if the frequency of an operational clock signal was made to change according to the processing speed, the power consumption could not be improved to the expected value. WO-A-91/00564 [POQET]) discloses a power system for use with a computer, wherein the power system has incorporated a circuitry for automatically varying the supply voltage output to the computer system. The variation of the power is based upon the magnitude of the current being supplied to the computer by the power system or on power demand by a signal from the computer. The power switching implies a frequency change of the operational clock by driving a VCO. SUMMARY OF THE INVENTION It is the object of the present invention to provide an integrated circuit which is able to cope with high speed operation with greatly reducing the power consumption in an easy way. This object is achieved by an integrated circuit as it is described in new claim 1. Especially, a processor generates a first signal and a second signal in accordance with an operational clock signal used for determined processes and, then, outputs the first signal for specifying a frequency of the operational clock signal and the second signal for selecting a line voltage in accordance with the specified frequency. The dependent claims 2 to 9 show further developments of the integrated circuit of claim 1. These and other objectives, features, and advantages of the present invention will be more apparent from the following detailed description of preferred embodiments in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the main part of an electronic apparatus in which an integrated circuit according to one embodiment of the present invention is included; and Fig. 2 is a block diagram showing the main part of an electronic apparatus in which an integrated circuit according to another embodiment of the present invention is included. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS Fig. 1 shows the main part structure of an electric apparatus in which the integrated circuit according to one embodiment of the present invention is included. As shown in the figure, the apparatus is comprised of the following: an integrated circuit 1; two batteries 2a and 2b; and a plurality of optional integrated circuits 3a, 3b, ...3n. In this apparatus, the connection between batteries 2a and 2b is made to change so as to select a certain line voltage which corresponds to the frequency change of an operational clock signal used in circuit 1. The selected line voltage and the operational clock signal used in integrated circuit 1 are also supplied to other integrated circuits 3a, 3b, ..., and 3n. Integrated circuit 1, which features the present invention, is comprised of the following as shown in Fig. 1: a processor 11 to execute predetermined processings according to programs with synchronous to an operational clock signal; a first circuit 12 for supplying an operational clock signal into processor 11; a second circuit 13 for selecting a suitable line voltage, which is applied to processor 11, by changing the connection between two batteries placed outside integrated circuit 1. These two batteries are placed outside the circuit 1 and work as a power supply for the electronic apparatus. During the execution of programs, processor 11 outputs a first signal to specify the frequency of an operational clock signal corresponding to respective processings, one of which requires a high speed operation and another of which does not require a high speed operation. This first signal is previously set in a program according to the operation speed which is required by a processing to be executed. In order to execute a processing in which a high speed operation is required, a clock signal having a relatively high frequency is specified by the program. On the other hand, in order to execute a processing in which a high speed operation is not required, a clock signal having a relatively low frequency is specified. Processor 11 also outputs a second signal to select a line voltage by changing the connection between batteries 2a and 2b. This selection is carried out according to the frequency change of the clock signal which has been set by said first signal. In the case where the frequency of a clock signal is high, the second signal indicates to connect batteries 2a and 2b in series with each other so as to obtain a high line voltage. On the other hand, when the frequency of a clock signal is low, the second signal indicates to connect batteries 2a and 2b in parallel with each other so as to obtain a low line voltage. When the operational clock signal changes its frequency from a low level to a high level by the first signal, the second signal is output simultaneously, or immediately prior to the change, so as to connect batteries 2a and 2b in series. On the contrary, when the operational clock signal changes its frequency from the high level to the low level by said first signal, the second signal is output simultaneously, or immediately after the change, so as to connect batteries 2a and 2b in parallel. As explained above, the first signal obtained from processor 11 is applied into the first circuit 12 for supplying an operational clock signal, while the second signal is applied into the second circuit 13 for selecting the line voltage. The first circuit 12 for supplying an operational clock signal is comprised of the following: a first generator 14 to produce a clock signal having a relatively high frequency for use in a high speed operation: a second generator 15 to produce a clock signal having a relatively low frequency for use in a processing which does not require a high speed operation; and a selection circuit 16 for the clock signals produced in generators 14 and 15. Selection circuit 16 chooses an operational clock signal produced in generator 14 when the first signal from processor 11 claims the clock signal having a high frequency for use in a high speed operation. On the other hand, if the first signal claims the clock signal having a relatively low frequency, selection circuit 16 chooses the clock signal produced in generator 15. The clock signal chosen by selection circuit 16 is, then, given to processor 11 as an operational clock signal. Selection circuit 16 carries out the switching of signals between generators 14 and 15, by matching the phase of each signal which has a different frequency to the other. Therefore, the frequency of an operational clock signal does not deviate even just after the frequency change, thus causing no ill effect for executing a processing. The second circuit 13 for selecting a line voltage is comprised of four diodes 17a, 17b, 17c, and 17d and a switch 18 which is made of a MOS transistor. This switch 18 is allowed to conduct according to the control by the second signal, thus changing the connection between batteries 2a and 2b. When processor 11 wants to change the frequency of its operational clock signal from a low level to a high level, a second signal is given by processor 11 to switch 18 in the second circuit 13, thus allowing switch 18 to conduct. As a result, batteries 2a and 2b are connected in series so as to supply a high level voltage into processor 11. On the other hand, when processor 11 wants to change the frequency of its operational clock signal from a high level to a low level, the second signal is given by processor 11 into switch 18 in the second circuit 13, thus allowing switch 18 to become non-conductive. As a result, batteries 2a and 2b are connected in parallel so as to supply a low line voltage into processor 11. As described above, the line voltage in said embodiment is made to change according to the frequency change of the operational clock signal. Therefore, in the case where a high speed operation is required, that is, a high frequency clock signal should be used, the line voltage of a high level is selected to be used for executing a processing, thus enabling a high speed operation. On the other hand, in the case where a high speed operation is not required, that is, a relatively low frequency is used for the clock signal, the line voltage of a low level is selected to-be used for executing a processing, thus largely reducing the power consumption as compared with that of the prior art device in which its line voltage is fixed to a certain value. Consequently, the service life of batteries which are used to be the power supply can be greatly improved in this embodiment. This fact also enables to reduce the size of the power supply. Therefore, an electronic apparatus, in which the above mentioned integrated circuit is used, can be made smaller and lighter. Fig. 2 shows another embodiment of the present invention. In this figure, numbers as those of shown in Fig. 1 indicate the same structure elements, so that their explanation will be omitted. The embodiment shown in Fig. 2 is characterized by the structure of a circuit 13' for selecting a line voltage. In this circuit 13', MOS transistor switches 19a and 19b are used instead of diodes 17a to 17d in circuit 13 shown in Fig. 1. In order to change the connection between batteries 2a and 2b, these switches 19a and 19b are controlled to conduct by the output from inverter 20 in which the first signal obtained from processor 11 is inverted. In this embodiment, of course, the same advantages as those obtained from the first embodiment can also be obtained. This invention is not limited to the embodiments explained above. For example, the first circuit 13 or 13' for selecting a line voltage can be placed outside integrated circuit 1. In the case where a low line voltage is supplied to processor 11, only one battery may be used to supply the line voltage into processor 11, by dissolving the series connection of batteries. Also, it is possible to use only integrated circuit 1 to compose an electronic apparatus, without using optional integrated circuits 3a, 3b, and so on. In summary, according to the present invention, the frequency of an operational clock signal should be varied due to the change of processing speed. At the same time, the line voltage is varied in accordance with the frequency change of the operational clock signal. As a result, this invention is able to manage a processing which requires a high speed operation, with greatly reducing the power consumption as compared with that of the prior art device. Therefore, the service life of the batteries, which are used to be a power source, can be greatly extended as compared with that of the prior art. This fact also allows to reduce the whole size of a power source, and therefore, to reduce the size and the weight of an electronic apparatus.

Claims: An integrated circuit (1) comprising a processing means (11) for executing predetermined processes in synchronism with an operational clock signal, a clock signal generating means (12) for supplying the operational clock signal having a specified frequency into said processing means, and means (13) for selecting a suitable line voltage by changing the connection between various power supplies, said line voltage being supplied to said processing means (11) characterized in that said processing means (11) generates a first signal and a second signal during the execution of said predetermined processes, and, outputs said first signal to said clock signal generating means (12) for specifying the frequency of the operational clock signal required by a process to be executed, and outputs said second signal to said means (13) for selecting a line voltage being required to generate said operational clock signal. An integrated circuit (1) according to claim 1, wherein said means (13) for selecting a line voltage gives said selected line voltage into said processing means (11) at the same time, immediately before or immediately after said clock signal generating means (12) supplies the operational clock signal having a specified frequency into said processing means (13). An integrated circuit (1) according to claim 1 or 2, wherein said clock signal generating means (12) comprises a first generator (14) for producing a clock signal having a relatively high frequency, a second generator (15) for producing a clock signal having a relatively low frequency, and a selector (16) for choosing and outputting either one of said clock signals according to said first signal. An integrated circuit (1) according to any of the preceding claims, wherein said means (13) for selecting a suitable line voltage comprises switching means (17 1 , 17 2 , 17 3 , 17 4 , 18; 19a, 19b, 18, 20) for changing the connection between said various power supplies (2a, 2b). An integrated circuit (1) according to claim 4, wherein said switching means (17 1 , 17 2 , 17 3 , 17 4 , 18; 19a, 19b, 18, 20) connects said various power supplies (2a, 2b) in series or in parallel. An integrated circuit (1) according to claim 4 or 5, wherein said switching means comprises four diodes (17 1 , 17 2 , 17 3 , 174) and a MOS transistor (18). An integrated circuit (1) according to claim 4 or 5, wherein said switching means comprises first MOS transistors (19a, 19b), a second MOS transistor (18) and an inverter (20) in which said signal obtained from said processing means (11) is inverted. An electronic apparatus comprising said integrated circuit (1) according to any of the preceding claims and at least two batteries (2a, 2b) as said various power supplies. An electronic apparatus according to claim 8, further including at least one optional integrated circuit (3) in which said selected line voltage obtained from said selecting means (13) is supplied as power source.

Inventors: MUNETSUGU EIICHI, MUNETSUGU, EIICHI
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1992
Main classification: G06F1
IPC codes: G06F1, H01L27, G06F15, H01L21