Predistortion linearizer for microwave power amplifiers

Abstract: Predistortion linearizer for microwave power amplifiers wherein a single transistor (FT1), e.g. the GaAsFET type, subpolarized near the pinch-off condition, carries out the functions both of gain expander amplifier for recovery of amplitude distortion of the power amplifier and command signal generator for a dephaser element (D1) for recovery of the phase distortion of the power amplifier (FIG. 1).

Description: The present invention relates to improvements in predistortion linearizers for microwave power amplifiers. Modulations techniques presently in use in radio links, essentially Quadrature Amplitude Modulation (QAM), impose very stringent linearity requirements on the radiofrequency power amplifier of the transmitter on which the degradation of the modulated signal depends not a little. The power output from the final amplifier devices must be considerably lower than their saturation power so that the nonlinear distortions thereof introduced satisfy the specifications of the transmitter. Said distortions are due to compression of gain at high power found in the trend of the Amplitude Modulation (AM/AM) distortion curve at high power and the amplitude/modulation phase modulation (AM/PM) conversion curve, again at high power. Obviating these distortions usually involves oversizing said final amplifiers and hence high cost of the power amplifying section. As is known, use of a linearizing network in the transmitting section permits use of power devices with lower saturation for given distortion produced with a resulting increase of efficiency, e.g. for application in the transmitters of on-board repeaters in satellite communication systems or, for a given saturation power of final devices, allows higher linearity of the amplifier, e.g. for applications in transmitters for earth stations in said satellite communication systems. A linearization technique presently well known is termed 'feed forward error control' and includes all the linearizers which use an auxiliary microwave amplifier which amplifies an error signal obtained by determining the difference between the input signal and the distorted one appropriately attenuated output from the main amplifier. The error signal is proportional to the distortions generated by the main amplifier so that, added again with appropriate phase and amplitude at the output of the main amplifier, it reduces the distortions affecting the output signal. It is clear that the merit figure or degree of quality of this linearization system depends almost exclusively on the balancing of the final adder or coupler, which subtracts the error signal from the output signal of the amplifier. Balancing regulation circuitry amplitude and phase) for such a coupler is therefore necessary and is quite complex. In addition it is a true amplifier-linearizer in itself, not an addition to improve a known amplifier. Another present linearization technique calls for the use of RF (radio frequency) predistorters, i.e. nonlinear networks inserted upstream of the final microwave amplifier, which distort the input signal by means of networks embodied with components which work in nonlinear state in order to compensate for the AM/AM distortion curve and the amplitude/phase conversion curve AM/PM of the final power amplifier and guarantee better linearity of the transmitting section. The main drawback of said known predistorters exists however in the excessive complexity of said networks and thus in their excessive cost. An example of predistortion linearizer for microwave power amplifiers is known from the patent US-A-4,532,477 in which a network is described for the compensation of only the amplitude/phase conversion curve AM/PM. Said network consists of some cascaded amplification modules alternating with attenuation modules, increasing however excessively all the microwave amplifier structure; in addition it does not address the problem of the AM/AM curve compensation, for which further circuits would be necessary. Another example of predistortion linearizer for microwave power amplifiers is described in the Italian patent application no. 19497-A/87 filed by the same applicant on February 26, 1987. In the said previous Italian patent application there is described a predistortion linearizer applicable upstream of the power amplifier characterized in that it comprises a main network including a phase modulator and an amplitude modulator arranged in cascade and a secondary network with base band frequency including means for detecting in amplitude and filtering part of the input signal so as to produce a detected signal being a function of the instantaneous input power and a pair of adjustable gain amplifiers supplied with said detected signal and acting on said modulators in such a manner as to give them nonlinear response curves such as to compensate independently for both amplitude and phase nonlinearity of the power amplifier. Said linearizer, although it has all the advantages of the known art listed in the application, is still a costly and cumbersome embodiment, principally because of the presence therein of derived branches. In linearizers of this kind, the derived branches, as in the circuit described in the patent US-A-4,465,980, give rise to further problems with reference to the delay introduced, have to be compensated for, and to the undesired interaction between the two AM/AM and AM/PM compensation networks. Accordingly the purpose of the present invention is to overcome the above drawbacks and define a predistortion linearizer for microwave power amplifiers which is extremely simplified in its circuit structure. Indeed it comprises essentially a single transistor which carries out the functions both of the gain expander amplifier for recovery of the amplitude distortion of the power amplifier and of a generator of a command signal for a phase shift element for recovery of the phase distortion of the power amplifier. In a first form of embodiment said single transistor is placed upstream of the final power amplifier and followed by the phase shift element. In a second form of embodiment its function is fulfilled by the same final power amplifier. To achieve said purposes a first object of the present invention is a predistortion linearizer for a final microwave power amplifier subjected to gain compression and phase distortion comprising: a first subpolarized transistor which constitutes a gain expander stage when the power of the signal at its input is increasing, for the complete recovery of said gain compression before saturation; a phase shifter controlled by the direct-current component of the output voltage of said first transistor, and introducing a phase distortion which completely offsets that of said final power amplifier before saturation. The variant embodiments described in the dependent claims 2 to 11 constitute other objects of the present invention. Further objects and advantages of the present invention will be made clear by the following detailed description of an embodiment thereof and the annexed drawings given for purely nonlimiting explanatory purposes and wherein - FIG. 1 shows the circuit diagram of a first example of realization of the linearizer which is the object of the present invention, FIGS. 2, 3, 4 and 5 show the trends of some characteristic parameters of the linearizer and final power amplifier as a function of the power Pi of the input signal, FIG. 6 shows a first embodiment of the phase shift element D1 of FIG. 1, and FIG. 7 shows a second embodiment of said phase shift element. FIG. 1 shows a circuit embodiment of the linearizer which is the object of the invention and is applied upstream of a power amplifier for the purpose of compensating for the amplitude and phase distortions. Indeed the amplitude and phase response curves of a microwave power amplifier are typically as shown in FIG. 2 where there is shown the qualitative shape of the output power Pu (AM/AM distortion curve) and the input-output phase variation VF (AM/PM conversion curve) as a function of input power Pi. The linearizer thus has a dual purpose, i.e. first to expand its own gain at the Pi values so that in FIG. 2 the knee of the curve Pu occurs to compensate for said knee and continue the linear shape of Pu even in the immediate proximity of saturation, this latter zone being indicated by a horizontal shape which however cannot be offset; the second purpose is to vary its own input-output phase in a manner opposite to the shape of VF in FIG. 2. In FIG. 1 RFin, RFout indicate the input and output respectively of a radiofrequency signal. C1, C2 ...C5 indicate capacitances and L1, L2 inductances of known type. FT1 indicates a GaAsFET transistor (gallium arsenide field effect) having as known source S, drain D and gate G1, used in a common source configuration. R1 indicates a polarization resistance of FT1. D1 indicates a varactor diode. RA1, RA2, RA3 indicate normal input, interstage and output impedance matching networks respectively embodied for example in microstrip. VG, VP and V+ indicate the supply voltages of the gate of FT1, the anode of D1 and fixed positive respectively. C1 and C2 are used as block capacitances of the direct-current component (in the following dc component) at the input RFin and the output RFout respectively. C4 and the networks C3-L2, C5-L1 form low-pass decoupling filters between signal and supplies VG, VP and V+; C3, C4 and C5 have a grounded end. The input signal is applied to the gate of FT1 through C1 and RA1; the voltage Vg is also applied to the gate of FT1 through the filter C3-L2. The source of FT1 is connected to ground while the voltage V+ is brought to the drain through the filter C5-L1 and the resistance R1. The cathode of the diode D1 is also dc-connected to the drain of FT1 through the network RA2 and to the output RFout through the network RA3 and C2. The transistor FT1 amplifies the RF signal applied at the input RFin; the values of fixed supply voltage V+, resistance R1 and voltage VG are chosen in such a manner as to keep FT1 in subpolarization conditions, i.e. with the working point near the pinch-off region (low values of drain-source current Ids). In this manner an increase in the power of the RF input signal is capable of changing the working point of the device, i.e. increasing the dc component of the current Ids. Since the gain of FT1 depends on said dc component of Ids, the increase of the latter causes an increase in gain and supplies the desired expansion effect. FIG. 3 shows the qualitative shape of the gain curve Gi obtained as a function of the power Pi of the signal RF at the input RFin. By varying the parameters of the polarization network of FT1, i.e. VG, R1 and V+, it is possible to obtain a shape of Gi optimized from the point of view of compensation of the AM/AM distortion curve. The Figures also show the corresponding qualitative shape of the dc component of Ids as a function of Pi. Due to the presence of the resistance R1, as the dc component of Ids increases, the dc component of the drain-source voltage Vds of FT1 decreases and hence that of the polarization voltage VL of the varactor diode D1 (indeed D1 is dc-connected to the drain of FT1). Thus a detected voltage of the modulating signal envelope proportional to the dc component of Ids is present at the R1 ends and used as a control signal of the phase variation introduced by the downstream device which in the nonlimiting example described is the varactor diode D1. The effect obtained is thus a modulation of said voltage VL which, as is known, influences the internal capacitance value of the varactor and hence the phase shift introduced therefrom onto the R.F. signal. This effect can be used with advantage to offset the conversion curve AM/PM. FIG. 4 shows the qualitative shape of the phase variation FL as a function of the power Pi of the input signal. The shape of FL can be made specular in relation to that of VF (shown with broken line in FIG. 4) by appropriate sizing of the parameters which influence it, i.e. R1 and VP. To sum up, the transistor FT1 fulfils a double function: that of gain expander to offset the AM/AM distortion curve and that of detector of an envelope voltage which directly drives a phase shifter to offset the AM/PM conversion curve. More specifically, the gain expansion characteristic is adjusted by varying VG and the phase characteristic is adjusted by varying VP. The device of FIG. 1 follows very rapidly the dynamics of the input signal RF, i.e. its response as gain expander and phase shifter is a wide band response for the modulating signal because it consists of a single RF branch. This is in effect very important because it makes the device usable even when the multicarrier modulating signal is wide band, e.g. in transponders for satellites. In addition there is an undoubted advantage in terms of size and cost reduction of the components of the linearizer which can be embodied with microstrip or Microwave Integrated Circuit (MIC) technology using both discrete packaged components and chip-and-wire or integrated in Monolithic MIC (MMIC) technology. The linearization function can be performed by said final power stage consisting for example of a transistor of the FT1 type of FIG.1 brought to a similar working condition. This may be explained by a numerical example with reference made to FIG. 5 which shows the shapes of the output power Pu of the final power stage in two working conditions, normal (Ids=2A) and modified in accordance with the invention (Ids=0,7A) respectively, and the shape of the continuous component Ids of the drain current of the transistor of said final stage, as a function of the input power Pi. Assume a final power stage consisting of a GaAsFET transistor which in linear conditions has a gain of 10dB with working point Fds=10V, Ids=2A and output saturation power Pusat-40dBm at modulated signal frequencies of approximately 6-7GHz. Under these conditions the shape of output power Pu as a function of input power Pi is as indicated in FIG. 5 by parameter Ids-2A with the knee zone to be linearized. If we now decrease the gate-source voltage Vgs of the transistor to obtain Ids=0,7A, the gain of the linear zone decreases to approximately 7dB. Under these conditions when the input power Pi increases Ids also tends to increase to a nominal value of 2A in conformity with the shape of Ids shown in the figure. The increase of Ids causes an increase in the gain Gi of the transistor just in the zone where the curve Pu(Ids=2A) had the knee, introducing in this case a self-linearization effect: the amplitude in the knee zone of the curve Pu(Ids=0,7A) decreases greatly, offsetting the distortion curve AM/AM. As concerns offsetting the conversion curve AM/PM, the phase variations can be offset by a circuit of known type upstream driven by the voltage Vds of the final transistor as described with reference to FIG. 1. The variant now described can be used to advantage in QAM multi-level modulation systems where the RF output power is not constant but varies considerably in relation to the average value depending on the point of the constellation of symbols to be transmitted; for example in the 64QAM system there is a difference of approximately 8dB between average and maximum RF output power. There is a considerable current saving; for the low levels of the constellation for which the output power Pu is low the current Ids stays around 0,7A and reaches 2A only for the higher levels for which Pu is high. Since the points of the constellation are all equally probable, the average Ids current will be approximately 1.1-1.2A, and not 2A, with a clear consumption saving. Decrease of gain in the linear zone from 10 to 7dB does not involve problems because the 3dB difference is necessary only at the power peaks. A second variant calls for the embodiment of the phase shifter as in FIG. 6 wherein the same symbols as in FIG. 1 indicate the same components interconnected in the same manner. In FIG. 6 there has been added a second varicap diode D2 equal and in antiparallel to D1 for the signals. The anode of D2 is connected to the cathode of D1 while the cathode of D2 is polarized by the direct voltage VP2 and is connected to ground for the signals through the filter capacitance C6. The embodiment of FIG. 6 serves the case in which it is desired to offset a phase variation which may be either leading or lagging. One diode offsets the lagging phase variations and the other the leading ones; by appropriately sizing the voltages VP and VP2, it is possible to make one of the two diodes work while excluding the other, thus obtaining a leading phase shift with D2 inserted or lagging with D1 inserted. A third variant calls for an embodiment of the phase shifter as in FIG. 7 wherein the same symbols as in FIG. 1 indicate the same components interconnected in the same manner and performing the same functions. In FIG. 7 the phase shifter is embodied by a GaAsFET transistor indicated by FT2 and polarized in such a manner as to function as a normal amplifier in a common source configuration with the dc component of the drain-source current Ids2≃½Idss. The latter is the maximum value of the drain current for Vgs=0. R2 indicates the load resistance of FT2. C7, C8 and C9 indicate capacitances and L3, L4 indicate inductances of known type. C9 and the networks C7-L3, C8-L4 form low-pass decoupling filters between signals and supplies for output RFout, gate FT2 and drain FT2 respectively; C7, C8 and C9 have one end grounded. RA4 indicates an output matching network with the same function as RA1, RA2 and RA3. By varying the dc component of the gate-source voltage of FT2 there is obtained a variation of the dc component of the drain current Ids which does not cause appreciable variation in the gain of FT2, since FT2 is in linear operation conditions, but in the value of gate-source capacitance Cgs of FT2. The effect obtained is equivalent to that supplied by the varactor diode D1 of FIG. 1, i.e. variation of the phase FL of the output signal RFout which offsets the AM/PM conversion curve (see FIG. 4). In this case also, the voltage detected of the envelope of the modulating signal (which is proportional to the dc component of Ids of FT1 located at the ends of R1) is used as the control signal of the phase variation introduced by FT2. To bring said control signal to FT2 it is necessary to dc-couple the two transistors FT1 and FT2, bringing to the input of FT2 the voltage taken from R1, either in phase or phase inverted depending on whether the phase variation desired is leading or lagging respectively. To introduce a phase lag there can be used the component indicated by AMP in FIG. 7, which is a dc inverting amplifier with variable gain and a pass band having a width at least double that of the modulating input signal band. AMP receives and amplifies the dc component of the drain voltage of FT1 at one end of R1 and supplies it with changed sign to the gate of FT2 through the filter C7-L3 to obtain a modulation effect of the dc component of the gate voltage of FT2. This effect is transformed into a variation of the capacitance Cgs of FT2. AMP can be embodied by an inverting stage of any known type. If embodied by a GaAsFET transistor, the entire circuit of FIG. 7 can be integrated in MMIC technology of simple and economical embodiment. If FT2 is not to lead but lag in phase, the amplifier AMP will have the same characteristics as above except that it will be non-inverting. As another variant, the transistors called for in the various forms of embodiment described can also be of another type, e.g. bipolar.

Claims: Predistortion linearizer for a final microwave power amplifier which is subjected to gain compression and phase distortion comprising: a first subpolarized transistor (FT1) which constitutes a gain expander stage as the power of the signal at its input is increasing, for the complete recovery of said gain compression before saturation; a phase shifter (D1; D1, D2; FT2) controlled by the direct-current component of the output voltage of said first transistor, and introducing a phase distortion which completely offsets that of said final power amplifier before saturation. Linearizer as in claim 1, characterized in that said first transistor (FT1) is placed upstream of said final power amplifier. Linearizer as in claim 1, characterized in that said first transistor (FT1) is said final power amplifier. Linearizer as in claim 2 or 3, characterized in that said first transistor (FT1) is a GaAsFET in common source configuration whose gate polarization voltage (VG) is adjustable to obtain said subpolarization. Linearizer as in claim 2 or 3, characterized in that said first transistor (FT1) is bipolar in common emitter configuration whose base polarization voltage (VG) is adjustable to obtain said subpolarization. Linearizer as in claim 2, characterized in that said phase shifter consists of a varactor diode (D1) placed in parallel to and coupled for direct-current to the output of said first transistor (FT1), the polarization voltage (VP) of said diode being adjustable. Linearizer as in claim 2, characterized in that said phase shifter consists of two antiparallel varactor diodes (D1, D2) placed in parallel to and coupled for direct-current to the output of said first transistor (FT1), the polarization voltage (VP, VP2) of each of said diodes being independently adjustable. Linearizer as in claim 2, characterized in that said phase shifter is an amplifier stage placed downstream of said gain expander stage, consisting of a second GaAsFET transistor (FT2) in common source configuration, whose input is coupled for direct-current to the output of said first transistor (FT1). Linearizer as in claim 2, characterized in that said phase shifter is an amplifier stage placed downstream of said gain expander stage, consisting of a second bipolar transistor (FT2) in common emitter configuration, whose input is coupled for direct-current to the output of said first transistor (FT1). Linearizer as in claims 8 or 9, characterized in that said continuous coupling between the first and second transistors is obtained by a wide band inverting direct-voltage amplifier (AMP). Linearizer as in claims 8 or 9, characterized in that said continuous coupling between the first and second transistors is obtained by a wide band noninverting direct-voltage amplifier (AMP).

Inventors: ABBIATI ANTONIO, BUOLI CARLO, CERVI LUIGI, ABBIATI, ANTONIO, BUOLI, CARLO, CERVI, LUIGI
Applicants: SITS SOC IT TELECOM SIEMENS, SIEMENS TELECOMUNICAZIONI S.P.A.
Application year: 1991
Main classification: H03F1
IPC codes: H03H11, H03F1