Method for forming semiconductor structures including quantum-well wires

Abstract: In situ removal of selected or patterned portions of quantum well layers (22) is accomplished by photo-induced evaporation to form quantum wires (38), which may be in non-linear shapes, at the bases of at least one groove (14) in a semiconductor structure (10).

Description: The present invention relates generally to semiconductor structures and more particularly to semiconductor structures having quantum wires fabricated employing in situ photo-induced modifications to compound semiconductor films during epitaxial growth. The hallmark of the electronics industry has been miniaturization. The size required for computer chips and semiconductors has plunged nearly a thousandfold in just ten years. The future suggests even further progress in shrinking electronic elements. One aspect of the semiconductor has not keep pace in this rush toward miniaturization, the wires carrying the electric current flow to and from the ever-smaller lasers, p-n junctions, transistors, LEDs and other diodes, detectors, integrated circuits, microelectronics and the like. This may eventually lead to the rather incongruous sight of the wiring connecting circuitry components being larger than the components themselves. Quantum wires in semiconductors are regions in which the charge carriers are quantum-confined in the two dimensions orthogonal to the axis of the wire. Quantum effects in GaAs layers are most strong when the thickness is less than 50 nm. A quantum wire will still be useful if only one of its dimensions is less than 50 nm. For GaAs this typically means a region for the quantum wire in a semiconductor smaller than about 50 nm by 100 nm. In addition to their current conductance, quantum wires are expected to have useful and novei electrical properties, such as extremely-high electron mobility because of the two-dimensional confinement of carriers. Quantum wires of the appropriate size are expected to act like electron waveguides, which are analogous to optical waveguides. In situ fabrication of arrays of quantum wires has been contemplated and demonstrated by Fukui et al., "(AlAs) 0.5 (GaAs) 0.5 fractional-layer superlattices grown on (001) vicinal surfaces by metalorganic chemical vapor deposition" in Appl. Phys. Letters 50, 824 (1987), and Tsuchiya et al. in Phys Rev Letters 62, 466 (1989) using stepped surfaces obtained with off-axis substrates to produce tilted superlattices. A difficulty with this approach is the propagation of this surface topography through the relatively-thick layers required for the other layers of a semiconductor structure. Also, the resulting poor geometry of the quantum wires in the structure would make them ineffective as current-carrying wires. What is desired is a process, particularly as implemented in molecular beam epitaxy (MBE) or metallo-organic chemical vapor deposition (MOCVD), wherein ultrafine patterning of conducting channels or wires or electron waveguides can be achieved in situ without growth interruption by some off-line or non-growth procedure or process. There are two examples known where patterning may be achieved by quasi- in situ thermal processing wherein thermal etching is employed to remove GaAs selectively. In one example, a n-GaAs layer over a p-AlGaAs layer is selectively chemically etched in a particular region, followed by thermal etching to remove the remaining thin GaAs left from chemical etching before proceeding with regrowth of the p-AlGaAs layer. This forms a buried reverse-biased current confinement mechanism in a double heterostructure laser. H. Tanaka et al, "Single-Longitudinal-Mode Self Aligned AlGa(As) Double-Heterostructure Lasers Fabricated by Molecular Beam Epitaxy", Japanese Journal of Applied Physics, Vol. 24, pp. L89-L90, 1985. In the other example, a GaAs/AlGaAs heterostructure partially masked by a metallic film is thermally etched in an anisotropic manner illustrating sub-micron capabilities for device fabrication. A. C. Warren et al, "Masked, Anisotropic Thermal Etching and Regrowth for In Situ Patterning of Compound Semiconductors", Applied Physics Letters, Vol. 51(22), pp. 1818-1820, November 30, 1987. In both of these examples, AlGaAs masking layers are used as an etch stop to provide for the desired geometric configuration in thermally-etched GaAs, although it is also known that, given the proper desorption parameters, AlGaAs may also be thermally etched at higher temperatures with different attending ambient conditions vis-a-vis GaAs. However, none of these techniques employs in situ photo-induced evaporation as a technique in a film deposition system to reduce incrementally, on a minute scale, film thickness in patterned or selective locations at the growth surface either during or after film growth, producing smooth sculptured surface morphology, which is the principal objective of this invention. According to this invention, there is provided a method of forming a semiconductor structure according to claim 1, and a method of forming a body of semiconductor material according to claim 4. In particular, the invention may be employed in fabricating in situ quantum wires in semiconductor structures wherein induced evaporation enhancement purely removes or prevents the continued growth of the epitaxially-deposited materials in selected regions at the growth surface, without the need for masking or chemical etching processes. The present invention will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 is a schematic illustration of a side elevation of a quantum wire semiconductor structure prior to photo-induced desorption according to this invention; Figure 2 is a schematic illustration of a side elevation of a quantum wire semiconductor structure during photo-induced desorption; according to this invention. Figure 3 is a schematic illustration of a side elevation of a quantum wire semiconductor structure formed according to this invention; Figure 4 is a schematic illustration of a top elevation of patterns of quantum wire semiconductor structure formed according to this invention; Figure 5 is a schematic illustration of a side elevation of a series of linear or horizontal multiple quantum wire semiconductor structure formed according to this invention; Figure 6 is a schematic illustration of a side elevation of a vertical series of linear or horizontal quantum wire semiconductor structures formed according to this invention; Figure 7 is a schematic illustration of a side elevation of an alternative embodiment of a vertical series of linear or horizontal quantum wire semiconductor structures formed according to this invention; Figure 8 is a schematic illustration of a cut-away side elevation of a vertical quantum wire semiconductor structure prior to photo-induced desorption; Figure 9 is a schematic illustration of a cut-away side elevation of a vertical quantum wire semiconductor structure during photo-induced desorption, and Figure 10 is a schematic illustration of a cut-away side elevation of a vertical quantum wire semiconductor structure formed according to this invention. In describing the devices of this invention, reference is generally made to individual discrete structures, although it is generally the case that a plurality of such devices would be fabricated on a wafer substrate in a MOCVD reactor wherein the processing laser beam would be scanned and/or modulated to selected locations to perform the desired induced evaporation enhancement in patterned fashion across the wafer surface. Reference is now made to Figure 1 wherein there is disclosed a semiconductor structure 10 having a single quantum wire and fabricated using MOCVD processing. Semiconductor structure 10 includes a semiconductor cladding layer or substrate 12 of high bandgap semiconductor material such as Al x Ga 1-x As in one surface of which is formed a groove 14. If a semiconductor cladding layer is used, the layer can be anywhere in a semiconductor structure. The groove can be fabricated in the cladding layer by chemical etching, reactive ion etching, ion milling or other means. The groove can also be fabricated by a tightly-focussed beam scanned across the surface of the cladding layer with changing dwell time. In general, the groove should be as narrow as possible. However, the width and depth of the groove will depend upon the process used to fabricate it. For example, chemical etching and beam desorption form grooves that are wider than their depth. It is desirable to form grooves which are deeper than their width, with sidewall angles greater than 45 degrees. Reactive ion etching or ion milling form grooves with greater than 45 degrees sidewalls, and even with vertical sidewalls. For the sake of illustration, the groove 14 is shown as being V-shaped with opposing angled sidewalls 16 and 18 culminating in vertex 20. The groove can be from 10 nm to 2.5 µm deep. Upon the cladding layer 12, a quantum well layer 22 of low bandgap semiconductor material, such as GaAs or Al z Ga 1-z As where z< x, is grown at a temperature greater than 725 °C. The quantum well layer is typically less than 30 nm thick. A groove 24 in the quantum well layer is formed in the groove 14 in the cladding layer. The growth rate on the sidewalls 26 and 28 of the groove 24 of the quantum well layer at this temperature is lower than on the horizontal top surfaces, or mesas, 30 and 32, allowing formation of a slightly thicker region 34 at the vertex of the quantum well groove, as shown in Figure 1. Upon completion of the growth of quantum well layer 22, epitaxial growth is temporally discontinued, and the trimethyl-gallium (TMG) source to the MOCVD chamber is turned off, the substrate temperature is increased to about 825 °C and a laser beam or combination laser beam is focussed on the surface of quantum well layer 22 either orthogonally or, as indicated by lines 36 in Figure 2, at an angle near normal incidence to the sidewalls for a period of time sufficient to evaporate quantum well layer 22 at sidewalls 26 and 28 at a rate of 0.1 nm/second. The temperature at the illuminated portion of the quantum layer 22 during the evaporation process may be about 1000°C to 1030°C. It is well known in the art that, at temperatures above about 725 °C, the growth of GaAs on sidewalls of a mesa or groove is slower than on the mesa top or at the vertex of the groove, and that the difference increases further as the temperature is increased. This behavior implies that the sticking coefficient for Ga and As atoms is smallest on the sidewalls. Hence for near-normal incidence of the optical illumination, increased temperature is expected to desorb the GaAs of quantum well layer 22 preferentially from the sidewalls 26 and 28 and the top mesa areas 30 and 32 of the quantum well layer 22 compared to the region 34 at the vertex 20 of the quantum well groove 24. By controlling the illumination intensity, the angle and the length of exposure of the laser beam 36, the areas of quantum well layer 22 along the sidewalls 26 and 28 are desorbed down to the interface with cladding layer 12, resulting in a crescent-shaped quantum wire 38 forming in the vertex 20 of the groove 14 of the cladding layer 12. The Al x Ga 1-x As of the cladding layer 12 functions as a desorption stop to the optically-induced desorption because Al x Ga 1-x As, where x ≥ 0.15, is much more difficult to desorb by this process as compared to the desorption of the GaAs of the quantum well layer 22. In any case, the operating temperature for AlGaAs will be higher than that for GaAs because the Al content in AlGaAs causes a slower evaporation rate since GaAs has a higher vapor pressure than AlGaAs. The incidene angle of the laser beam 36 can also be adjusted to shadow the vertex and concentrate illumination on the sidewalls, as shown in Figure 2. The desorption of the quantum well layer in the shadowed vertex region will proceed more slowly than it would in the presence of illumination since any photochemical desorption will be reduced or eliminated and the vertex region will be cooler than its surrounding sidewalls. Both effects will enhance the lateral selectivity of the desorption. The optical process should be highly reproducible because exposure time and illumination intensity can be accurately controlled. This method allows growth of the quantum well layer to be performed at a temperature that optimizes the quality of the layer for the flow of electrical current. The desorption can subsequently be accomplished at a base temperature conducive to the preferential thinning of the sidewalls relative to the vertex region. The use of a laser beam for desorption is preferable to the simple raising of the temperature of the substrate to induce desorption, because the intensity of the optical illumination allows for faster raising of the semiconductor temperature, shorter desorption times and less time spent at high undesired temperatures. All of these factors greatly enhance the reproducibility of the process using optical illumination. As shown in Figure 3, after photo-induced desorption, a crescent-shaped quantum wire 38 has formed in vertex 20 of the groove 14 of the cladding layer 12, with the quantum well layer no longer existing on the sidewalls of the groove or the mesa levels on top of the cladding layer. Epitaxial growth is then continued with the growth of a cladding layer 40 of high bandgap semiconductor material such as Al y Ga 1-y As, where y>z and x>z, but y can be > or < x. The semiconductor cladding layer 40 can either follow the contour of the previously-deposited cladding layer 12 with its groove 14 and crescent-shaped quantum wire 38 or, as shown in this Figure, provide a flat upper surface 42. Other semiconductor layers can be deposited on cladding layer 40. One alternative to having a lower bandgap material quantum wire between higher bandgap material cladding layers is to have the quantum wire of doped material and the cladding layers of undoped or semi-insulating material. The initial cladding layer 12 of Figures 1 to 3 would be a layer of undoped or p-Al x Ga 1-x As. The quantum well layer 22 of Figure 1 would be a n-type doped quantum well layer comprising n-GaAs heavily doped, for example, with Si or Se at a concentration of 10 19 /cm 3 . The quantum well layer would be desorbed down to form the quantum wire 38 of Figures 2 and 3 and a cladding layer 40 of undoped or p-Al x Ga 1-x As would be grown on top of the quantum wire, as shown in Figure 3. The doping content of the quantum well layer is of opposing conductivity type to the adjacent undoped or semi-insulating cladding layers. Thus, the quantum wire and the cladding layers can be of the same material, for example AlGaAs, even though the bandgap would obviously be the same for both the wire and the cladding. By patterning the length and direction of the groove in the cladding layer, as shown in Figure 4, quantum wires can be formed at a right angle 44, a curve 46, a Y-branch 48, a T-branch 50 or any other pattern useful for the flow of electric current or electronic circuitry or electronic waveguides. Curves may require special etching techniques. Figure 5 discloses a semiconductor structure 52 with a series of linear or planar multiple quantum wires. The semiconductor structure 52 includes a semiconductor cladding layer or substrate 54 of GaAs or Al x Ga 1-x As, upon which multiple grooves 56 have been fabricated. Upon the cladding layer and grooves is epitaxially deposited a quantum well layer of GaAs or Al z Ga 1-z As, where z< x, which is desorbed down to crescent-shaped quantum wires 58 in the vertices of the grooves. The desorbing laser beam can either be a single laser beam or a combination beam working in sequence or, more appropriately, multiple laser beams or combination laser beams working in parallel or in series. A semiconductor cladding layer 60 of Al y Ga 1-y As is epitaxially deposited on top of the exposed surfaces of the semiconductor layer 54, the grooves 56 and the quantum wires 58. It is not necessary that the grooves, and thus the quantum wires, be parallel. As discussed with regard to Figure 4, patterns can be formed. Figure 6 discloses a semiconductor structure 62 with a vertical series of quantum wires. The semiconductor structure 62 includes a semiconductor cladding layer or substrate 64 of GaAs or Al x Ga 1-x As, upon which a groove 66 has been fabricated. Upon the cladding layer and groove is epitaxially deposited a quantum well layer of GaAs or Al z Ga 1-z As, where z< x, which is desorbed down to a crescent-shaped quantum wire 68 at the vertex of the groove. A barrier layer 70 of high bandgap semiconductor material such as Al c Ga 1-c As, where z<c, is then epitaxially deposited over the exposed surfaces of the semiconductor layer 64, the groove 66 and the quantum wire 68. The barrier layer follows the contour of the previously-deposited layer, groove and quantum wire to form a groove 72 in its surface, spatially aligned vertically with the groove 66 in the semiconductor layer 64. Another quantum well layer is grown on top of the barrier :ayer 70 and desorbed by photo-induction as already taught, leaving a crescent-shaped quantum wire 74 at the vertex of the groove 72. Another barrier layer 76 is deposited, followed by a quantum well layer which is desorbed to leave a crescent-shaped quantum wire 78 at the vertex of a groove 80. Epitaxial growth is then continued with the growth of a semiconductor cladding layer 82 of Al y Ga 1-y As which can either follow the contour of the last-deposited barrier layer 76 with its groove 80 and crescent shaped quantum wire 78, or, as shown in this Figure, provide a flat upper surface 84. In this Figure, the barrier layer follows the contour of the previous cladding or barrier layer. Thus, since there is a groove in the cladding layer, an aligned groove will form in the barrier layer when the barrier layer is epitaxially deposited on top of the dadding layer. If the barrier layer is grown with a flat upper surface, the groove in the barrier layer can also be fabricated by the same means as the groove in the cladding layer, namely by chemical etching, reactive ion etching, ion milling or other means. The groove can also be fabricated by a tightly focussed beam scanned across the surface of the cladding layer with changing dwell time One alternative to having the high bandgap semiconductor material barrier layer is to have the quantum wire of doped material and the cladding layers and barrier layers of undoped or semi-insulating material. The initial cladding layer 64 of Figure 6 would be a layer of undoped or p-Al x Ga 1-x As. The quantum well layer and the resulting quantum wire 68 would be a n-type doped quantum well layer comprising n-GaAs heavily doped, for example, with Si or Se at a concentration of 10 19 /cm 3 . The barrier layer 70 of undoped or p-Al x Ga 1-x As would be grown an top of the quantum wire. The other barrier layers 70 and 76 and the semiconductor cladding layer 82 would also be undoped or p-Al x Ga 1-x As and the other quantum wires 74 and 78 would be heavily doped n-GaAs. The sequentially grown quantum wires of Figure 6 are all self-aligned by the formation of the grooves. This growth sequence of alternating barrier layers and quantum well layers to be desorbed into quantum wires in the vertex of a groove of the barrier layer can be repeated to form as many quantum wires and layers of quantum wires as desired to form a multi-line bus of quantum wires buried in the semiconductor. Alternatively, as shown in Figure 7, the quantum wires of a semiconductor structure need not be aligned, but can be spatially separated by a barrier layer. The semiconductor structure 84 with multiple vertical quantum wires includes a semiconductor cladding layer or substrate 86 of GaAs or Al x Ga 1-x As, in which a groove 88 has been fabricated. Upon the cladding layer and groove is epitaxially deposited a quantum well layer of GaAs or Al z Ga 1-z As, where z< x, which is desorbed down to a crescent-shaped quantum wire 90 at the vertex of the groove. A barrier layer 92 of Al c Ga 1-c As, where z<c, or of any semi-insulating or low bandgap semiconductor material, is then epitaxially deposited over the exposed surfaces of the semiconductor layer 86, the groove 88 and the quantum wire 90 to form a flat upper surface 94 to the barrier layer. A groove 96 is fabricated in the barrier layer 92. The groove 96 in the barrier layer is not aligned with the groove 88 in the cladding layer. Spatially, the grooves can be at any angle relative to each other. For the purposes of this example, the groove 96 in the barrier layer is orthogonal to the groove 88 in the cladding layer. Another quantum well layer is grown on top of the barrier layer 92 and desorbed by photo-induction as mentioned above, leaving a crescent-shaped quantum wire 98 at the vertex of the groove 96. As shown in the Figure, it is not necessary that the quantum wires be parallel: the wires may cross at any angle relative to each other, separated by the barrier layer. This growth sequence of alternating depositing barrier layers, forming grooves and depositing quantum well layers to be desorbed into quantum wires in the vertex of a groove of the barrier layer can be repeated to form as many quantum wires and layers of quantum wires and patterns of quantum wires as desired. Epitaxial growth is then continued with the growth of a semiconductor cladding layer 100 of Al y Ga 1-y As as discussed above. Figure 8 discloses a semiconductor structure 104 with a quantum wire, having a semiconductor cladding layer or substrate 106 of GaAs or Al x Ga 1-x As, upon which a groove 108 has been fabricated. Upon the cladding layer and groove is epitaxially deposited a quantum well layer of GaAs or Al z Ga 1-z As, where z< x, which is desorbed down to a crescent-shaped quantum wire 110 at the vertex of the groove. A barrier layer 112 of Al c Ga 1-c As, where z<c, or of any semi-insulating or low bandgap semiconductor material, is then epitaxially deposited over the exposed surfaces of the semiconductor layer 106, the groove 108 and the quantum wire 110 to form a flat upper surface 114 to the barrier layer. A groove 116 is fabricated in the barrier layer 112 orthogonal to the groove 108 in the cladding layer. A hole 118 is fabricated vertically in the groove 116 through the barrier layer 112 to the buried quantum wire 110. This connecting hole can be fabricated by the same process as that by which the grooves are fabricated. Similarly, the connecting hole can be a shallow or deep groove, or a groove with vertical walls. Another quantum well layer is deposited on top of the barrier layer 112 to fill the groove 116 and the connecting hole 118 as shown in Figure 9. The quantum well layer is desorbed, leaving a crescent-shaped quantum wire 120 at the vertex of the groove 116 and a vertical quantum wire 122 in the hole 118 connecting quantum wire 120 and quantum wire 110 Epitaxial growth is then continued, as shown in Figure 10, with the growth of a semiconductor cladding layer 122. The spaced-apart quantum wires will be isolated from each other by the barrier layer except for the connecting hole where the vertical quantum wire connects the horizontal quantum wires. The use of horizontal quantum wires in Figures 8 to 10 is for the purposes of example. The quantum wires to be connected can be oriented at any angle spatially relative to each other, even aligned as in Figure 6. Alternatively, the connecting hole 118 can be filled with a quantum well layer of a different semiconductor material to form the vertical quantum wire 122. The quantum well layer deposited in the groove 116 and over the filled-in connecting hole 118 and desorbed to form quantum wire 120, would be the same material used to form quantum wire 110. This different semiconductor material for the connecting quantum wire would have a lowerbandgap than the semiconductor material used to form the quantum wires 110 and 120. The lower bandgap would aid in current flow through the connecting vertical quantum wire between the horizontal quantum wires. Alternatively, a semiconductor structure with a vertical quantum wire couldbe fabricated by rotating the semiconductor structure 12 in Figures 1 to 3 by 90 degrees, either before or after formation of the quantum wire. Horizontal and vertical quantum wires can be formed in the same semiconductor structure by rotating the structure depending upon whether horizontal or vertical quantum wires are to be fabricated. The ends of the quantum wires can be left open, not covered by the barrier or cladding layers, so that the quantum wires can be connected. Vertical and horizontal quantum wires could be fabricated together and connected together for the purposes of circuitry or carrying electrical current. It naturally follows that multiple layers of horizontal, vertical and patterned multiple quantum wires can be combined in a myriad of ways to form electronic circuitry or channels for current flow or to function as electronic waveguides. The quantum wire can be formed anywhere within a multi-layer semiconductor structure. Although the foregoing discussion has been described in connection with semiconductors of GaAs and GaAlAs, other III-V alloys may be employed in the practice of this invention, such as InGaP, InGaAsP, GaAlAsP, InGaAlP, InGaAlAsP, InP or GaAlSb or II-VI materials, e.g., ZnSe, ZnSSe and CdS. Also, Group IV materials , most importantly Si and Ge, may be ulitized as semiconductor layers or a multiple quantum well structure of alternating well layers of GaAs or Al z Ga 1-z As and corresponding barrier layers of eitherAlAs or Al z Ga 1-z Aswhere x>y>z'>z. In a multiple quantum wire semiconductor structure, different quantum wires can be of different quantum well semiconductor material depending upon circumstances and needs.

Claims: A method of forming a semiconductor structure (10) on a substrate layer (12), the structure including a longitudinally extending body (38) in which charge carriers are quantum-confined in the two dimensions orthogonal to the axis of the body, whereby the body forms a so-called 'quantum wire,' the method comprising the steps of: epitaxially depositing a layer (22) of semiconductor quantum well material on a substrate layer (12) of semiconductor material having in its surface a channel (14) having sidewalls (16, 18) which converge in depth; interrupting the deposition process after the deposited layer has reached a chosen depth; directing a beam of radiation at the deposited layer (22) to evaporate in situ portions (30, 32) of the layer (22) overlying the surface bordering the channel (14) and overlying the upper parts (26, 28) of the sidewalls (16, 18) of the channel (14), down to the interface with the layer beneath is, so as to selectively desorb the deposited material to leave a longitudinally-extending coherent body (38) of deposited semiconductor material in the channel (14); and epitaxially depositing at least one further layer (40) of semiconductor material on top of the resultant structure. A method as claimed in claim 1, in which the channel is formed in one of a plurality of patterns which are useful for electric current flow. A method as claimed in claim 1 or 2, including the steps of: forming at least two channels in the substrate prior to the deposition of the layer of semiconductor material from which the quantum wires are to be formed; depositing expitaxially the layer of semiconductor material; and selectively desorbing the material deposited in both or all channels to leave a quantum wire in the base of each channel. A method of forming a body of semiconductor material with at least two spaced-apart bodies of semiconductor material in which charge carriers are quantum-confined in the two dimensions orthogonal to the axis of each body, which bodies form so-called 'quantum wires,' comprising the steps of: epitaxially depositing a first layer (70) of semiconductor material on the structure resulting from carrying out the method as claimed in any one of claims 1 to 3; forming a channel with sloping sidewalls (72) in the outer surface of the deposited first layer; epitaxially depositing a second layer (76) of semiconductor material on the first layer; stopping the epitaxial growth after the second layer has reached a desired thickness; selectively desorbing in situ portions of the second layer overlying the surface thereof bordering the channel, and overlying the upper parts of the sidewalls, down to the interface with the layer of material beneath it, to leave a coherent body (74) of deposited semiconductor material in the base of the channel; and epitaxially depositing at least one further layer of semiconductor material on top of the resultant structure. A method as claimed in claim 4, including the steps of: epitaxially depositing at least one further layer of semiconductor material on the structure; forming a channel in the last deposited layer; depositing a further layer of quantum well material on the channeled surface; and selectively desorbing the deposited layer to leave a third quantum wire in the base of the channel, to form a semiconductor body with at least three quantum wires lying in spaced-apart parallel planes or surfaces. A method as claimed in any one of the preceding claims, in which the quantum wire is of a low-bandgap semiconductor material, and in which the adjacent layers or substrate are of high-bandgap semiconductor material. A method as claimed in claim 6, in which the quantum wire is of a doped material, and in which the adjacent layers or substrate are of an undoped, semi-insulating, or opposing conductivity type material. A method as claimed in claim 6 or 7, comprising a series of channels (58) in the same semiconductor layer or substrate, and a quantum wire (56) in the base of each channel. A method as claimed in any one of claims 6 to 8, comprising two or more superposed layers of semiconductor or barrier material, in which each layer has in it at least one channel (66, 72, 80), and in which there is a quantum wire (68, 74, 78) in the base of each channel.

Inventors: EPLER JOHN E, PAOLI THOMAS I, EPLER, JOHN E., PAOLI, THOMAS I.
Applicants: XEROX CORP, XEROX CORPORATION
Application year: 1991
Main classification: H01L21
IPC codes: H01L29, H01L21, H01S5