Image memory device

Abstract: An image memory device uses two line memories (1.4, 1.5) in a memory array (1.3) of a field memory (1.1) in lieu of an externally mounted line memory. Further, an instruction of bi-directional transfer between a memory array (1.2) and an output buffer memory (1.3 or 1.6) is used. Thereby, a motion picture discontinuity phenomenon can be avoided even if a motion picture video signal is asynchronously inputted and outputted.

Description: BACKGROUND OF THE INVENTION FIELD OF THE INVENTION The present invention relates to an image memory device for taking the synchronization of image signals with different timings which signals appear in, for example, a frame synchronizer, a vision mixer, a video switcher or the like. DESCRIPTION OF THE PRIOR ART Firstly, a motion picture discontinuity phenomenon which may occur where a motion picture video signal is asynchronously inputted and outputted, will be explained with reference to Figs. 3 to 5. Generally, where the read and write operations are asynchronously conducted, a frame passing phenomenon may take place since there is almost no complete coincidence between the read and write frequencies. Now consider the case where the writing side will soon come up with the reading side taken as a reference. In this case, since the writing for a certain line in a memory is made after the reading of that line, as shown in Fig. 3, the reading on the reading side always precedes by one field the writing on the writing side. Next, consider the case where the writing side passed the reading side ahead, as shown in Fig. 4. In this case, since the reading is made immediately after the writing, the write operation and the read operation relate to the same field. Therefore, old data and new data co-exist in the output of a frame in which the passing has occurred. Accordingly, in the case of a motion picture, this results in a discontinuous image. Especially, in the case of an output signal of a VTR, since it contains jitters, the passing continuously takes place, thereby resulting in a disturbed image. In the conventional technique, a line memory 5.3 is provided separately from a field memory 5.2, as shown in Fig. 5, in order to avoid the above-mentioned discontinuity phenomenon. Namely, the phase of a vertical synchronizing signal on the input side and that of a vertical synchronizing signal on the output side are compared with each other at the start of each field. In the case where a difference between the phases becomes smaller than 1H, a selector 5.4 is switched so that data of a line preceding a current line by 1H is read and is delivered to a serial output memory, thereby avoiding the passing. Next, in order to take a time matching, a signal delayed by 1H is read from the line memory at a synchronized timing so that no discontinuity is produced. In the conventional method, however, the line memory 5.3 is required in addition to the field memory 5.2. Therefore, this method is not satisfactory in the aspect of cost and space. JP-A-1 224 993 describes a semiconductor memory device in which a serial read operation and a serial write operation can be performed simultaneously. A serial output circuit is arranged to transfer data from columns to a serial output terminal sequentially in synchronism with a first series of clock signals, and a serial input circuit is arranged to transfer data applied to a serial input terminal to an input register sequentially in synchronism with a second series of clock signals. A write circuit is arranged for writing data stored in the input register simultaneously in parallel to said columns. SUMMARY OF THE INVENTION It would be desirable to avoid the discontinuity phenomenon without using such a line memory as mentioned above. In the present invention, as defined by claim 1, two free line memories in a memory array of a field memory are used in lieu of an externally-mounted line memory and an instruction of bi-directional transfer between an memory array and an output buffer memory is used. According to the present invention, a separate line memory is not required, and the number of parts required can therefore be reduced while avoiding the discontinuity phenomenon. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the construction of an image memory device in an embodiment of the present invention; Figs. 2A to 2F illustrate the operation of the image memory device shown in Fig. 1; Figs. 3 and 4 are views for explaining a discontinuity phenomenon upon operation of the conventional image memory device; and Fig. 5 is a block diagram of the conventional image memory device. DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 1 is a block diagram of an image memory device according to an embodiment of the present invention. In Fig. 1, reference numeral 1.1 denotes a field memory, numeral 1.2 a serial input buffer (memory portion) in the field memory 1.1, numeral 1.3 a memory array portion, numeral 1.4 an unused or free line A in the memory array, numeral 1.5 another unused or free line B in the memory array, numeral 1.6 a serial output buffer memory portion, and numeral 1.7 a memory controller composed of a logic circuit which controls the field memory 1.1. In this memory device, bi-directional transfer is possible between the output buffer 1.6 and the memory array 1.3. Next, the operation of the image memory device having the above construction will be explained. Firstly, the explanation will be made in the case where the difference between the phase of a vertical synchronizing signal on the input side and that on the output side compared at the start of each field is larger than 0.5H (where a frame passing phenomenon does not occur). A motion picture video signal is stored into the memory array 1.3 through the serial input buffer 1.2, is thereafter sequentially stored into a line memory of the serial output buffer 1.6 temporally and is thereafter outputted from the serial output buffer 1.6 in synchronism with an output synchronizing pulse. In the case where no frame passing phenomenon occurs, when a signal of the m-th line is stored into the serial input buffer 1.2, the m-th line data is written into the m-th line in the memory array 1.3 (from which the previous data has already been transferred) and data of the (m+1)th line in the memory array 1.3 is transferred to the serial output buffer 1.6. Before a signal of the next (m+1)th line is inputted into the serial input buffer 1.2, the (m+1)th line data in the serial output buffer 1.6 is outputted therefrom in synchronism with an output synchronizing signal. Accordingly, before data of a certain line is stored into the serial input buffer, data of a line in the memory array 1.3 corresponding to that line is transferred into the serial output buffer 1.6 and is outputted from the serial output buffer by an output synchronizing signal. On the other hand, in the case where the phase difference between an input and an output becomes very small, the above processing causes a motion picture discontinuity phenomenon owing to a frame passing. Next, the explanation will be made of the case where the difference between the phase of a vertical synchronizing signal on the input side and that of a vertical synchronizing signal on the output side compared at the head of each field is smaller than 0.5H (where a frame passing phenomenon may occur). Figs. 2A to 2F shown the operation of the image memory device for avoiding a motion picture discontinuity phenomenon which is caused by the frame passing phenomenon. Figs. 2A, 2B and 2C illustrate the operation of an odd line. Now consider the case where the difference in phase between a vertical synchronizing signal on the input side and a vertical synchronizing signal on the output side becomes smaller than 0.5H and the (2n-1)th line is to be read/written. As shown in Fig. 2A at the point of time when the (2n-1)th line is written into the memory array 1.3 through the serial input buffer 1.2, the reading side transfers the 2n-th line of an even line from the memory array 1.3 to the serial output buffer 1.6. The 2n-th line data is further transferred to a free line of the memory array 1.3 (a free line A 1.4 in the case shown), as shown in Fig. 2B. Next, the (2n-1)th data transferred to another free line (a free line B 1.5 in the case shown) through the above operation before 1H is transferred to the serial output buffer 1.6 as shown in Fig. 2C. Apparently, it may be seen that the (2n-1)th data is simultaneously inputted and outputted. But, since the transfer of data from the memory array 1.3 to the output buffer 1.6 is made in a manner shifted by one line, a discontinuity phenomenon can be avoided even if a frame passing phenomenon occurs. Similarly, the operation of the 2n-th line is shown in Figs. 2D, 2E and 2F. Firstly, the (2n+1)th data is transferred to the serial output buffer 1.6, as shown in Fig. 2D, and is immediately transferred to the free line B 1.5 in the memory array 1.3, as shown in Fig. 2E. Thereafter, the 2n-th line data saved before 1H is transferred to the serial output buffer 1.6, as shown in Fig. 2F. The above operation is repeated during one field, thereby making it possible to avoid a discontinuity phenomenon. In the above embodiment, an instruction for bi-directional transfer between the serial output buffer 1.6 and the memory array 1.3 is used. Alternatively, an instruction for bi-directional transfer between the serial input buffer 1.2 and the memory array 1.3 may be used. In this case, after data (2n +1) of the serial input buffer 1.2 has been transferred to the free line A (or B) and data (2n) of the other free line B (or A) has been transferred to the serial input buffer 1.2, the data (2n) is written into the memory array 1.3 and data (2n-1) of the memory array 1.3 is read and transferred to the serial output buffer 1.6. In the foregoing, an image memory method of a motion picture video signal using free lines has been explained in conjunction with a difference in phase between a vertical synchronizing signal on the input side and a vertical synchronizing signal on the output side smaller than 0.5H. However, the value of the phase difference may be changed, as required. As is apparent from the embodiment mentioned above, if the present invention is applied, a motion picture discontinuity phenomenon can be avoided, a frame synchronizer can be constructed at a low cost and with a small size, and the reliability can be improved by the reduction in number of parts. Further, a digital signal pattern on a printed board is reduced. This minimizes undesirable radiation advantageously.

Claims: An image memory device comprising: a memory array (1.3) including a first memory area having a capacity sufficient for storing data relating to one field of an image; a serial input buffer memory (1.2) for serially receiving data relating to successive fields of an image and for temporarily storing data relating to respective parts of one field, one part at a time, each of said parts having a predetermined size; a serial output buffer memory (1.6) for temporarily storing data relating to respective parts of one field of an image, one part at a time, each of said parts having said predetermined size, and for serially outputting the data stored therein; and means (1.7) for successively transferring the data stored in the serial input buffer memory (1.2) to the first memory area so as to transfer the data relating to the field of an image into the first memory area; characterised in that: said memory array (1.3) further includes a second memory area comprising two sections (1.4,1.5), each having a capacity sufficient for storing data relating to a part, having said predetermined size, of a field of an image; said transferring means (1.7) is operable, under a predetermined condition, for transferring to said serial output buffer memory (1.6) the data stored in the first memory area, the data being transferred in successive parts of said predetermined size, said predetermined condition being met when a phase difference between a vertical synchronising signal contained in the field of data received by said serial input buffer memory (1.2) and that contained in the field of data to be output from said serial output buffer memory (1.6) is larger than a predetermined value; and said transferring means (1.7) is otherwise, when said predetermined condition is not met, operable for transferring the data stored in the first memory area in successive data parts of said predetermined size, alternately to said two sections (1.4,1.5) of the second memory area and for transferring said parts one at a time alternately from said sections to said serial output buffer memory (1.6), instead of transferring the field of data stored in the first memory area directly to said serial output buffer memory (1.6). An image memory device as claimed in claim 1, wherein the capacity of the second memory area is sufficient for storing data relating to two lines of the image.

Inventors: OKAMOTO ICHIRO, OKAMOTO, ICHIRO
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1991
Main classification: H04N5
IPC codes: H04N5