Apparatus and method for adaptively compressing successive blocks of digital video

Abstract: The compression of successive blocks of digital data is optimized by selecting between different compression algorithms or different data formats on a block-by-block basis. In one application, digitized interlaced video signals are processed for transmission in a compressed form. A set of pixel data presented in a field format is compressed to provide a first compressed video signal. The set of pixel data is also presented in a frame format and compressed to provide a second compressed video signal. Errors are evaluated in the first and second compressed video signals. The compressed video signal having the least error is selected for further processing. The technique is repeated for successive sets of pixel data and the selected signals are encoded to identify them as field formatted or frame formatted signals. The encoded selected signals are then combined to provide a compressed video signal data stream for transmission. Apparatus for receiving and decoding the signals is also disclosed.

Description: The present invention relates to the compression of digital video, and more particularly to a method and apparatus for processing digitized interlaced video signals for transmission in a compressed form. Television signals are conventionally transmitted in analog form according to various standards adopted by particular countries. For example, the United States has adopted the standards of the National Television System Committee ("NTSC") while most European countries have adopted either PAL (Phase Alternating Line) or SECAM standards. Digital transmission of television signals can deliver video and audio services of much higher quality than analog techniques. Digital transmission schemes are particularly advantageous for signals that are broadcast by satellite to cable television affiliates and/or directly to home satellite television receivers. It is expected that digital television transmitter and receiver systems will replace existing analog systems just as digital compact discs have largely replaced analog phonograph records in the audio industry. A substantial amount of digital data must be transmitted in any digital television system. This is particularly true where high definition television ("HDTV") is provided. In a digital television system where signals are transmitted by satellite, the television signals can be transmitted using a quadrature phase shift keyed ("QPSK") modulated data stream. A subscriber to the system receives the QPSK data stream via a receiver/descrambler which provides video, audio, and data to the subscriber. In order to most efficiently use the available radio frequency spectrum, it is advantageous to compress the digital television signals to minimize the amount of data that must be transmitted. Video compression techniques have been used in the past for video teleconferencing and other specialized applications. Such systems are capable of very high compression ratios, but generally exhibit limited spatial resolution and poor motion rendition. This is usually a result of initial constraints imposed on the frame rate and on the horizontal and vertical sampling rates of the system. A video "frame" can be likened to one of a sequence of snapshots that together provide a moving picture. Each frame is sampled in both the horizontal and vertical direction to obtain all of the picture information contained therein. Video compression systems are currently under development for digital transmission of existing television signals and future high definition television signals. Such television signals are significantly more complex than teleconferencing signals and are much more difficult to compress. The performance of digital compression systems in television applications is highly scene dependent. In order to succeed, a compression algorithm should be able to adapt to specific conditions to increase compressibility and to mask invariable errors in a manner that will not be perceivable to a human viewer. Highly detailed moving objects in a television picture present the greatest challenge to a compression system. The most powerful compression systems currently available (i.e., those that achieve the greatest reduction in the amount of data necessary to define television pictures) utilize interframe processing in order to take advantage of the temporal correlation between successive frames. US-A-4,827,340 discloses a differential pulse code modulated video coder in which an intraframe predictor and a pure interframe predictor are used for compressing the data. The predictors predict what picture data will be in a current television frame based on the picture data contained in a previous frame. Thus, the transmitted portions of a current television frame are compared to similarly situated portions of the immediately preceding television frame and the differential signal is computed between these portions of data contained in the two frames. Instead of transmitting the whole current television frame only the differential signal is transmitted which results in a substantial reduction in the amount of data that has to be transmitted, particularly where the picture contained in successive screens is relatively constant. Therefore, reference US-A-4,827,340 teaches compression of a video signal, which is performed by using an interframe predictor in a first compression path and an intraframe predictor in a second compression path and the apparatus disclosed by document D1 determinos whether better compression is achieved using intraframe prediction or interframe prediction for each successive video frame. In summary, US-A-4,827,340 discloses a first data path for generating a first compressed video signal and a second data path for generating a second compressed video signal as well as means for evaluating the errors and means responsive to said error evaluating means. However, frame-to-frame correlation is reduced when there is movement. This requires more complicated processing to maintain a high degree of performance. Video compression is further complicated with television signals since interlaced scanning is used to define a television picture. Each frame of a television picture comprises a plurality of horizontal lines (e.g. 525 lines in a standard NTSC television signal) which together form a picture. The horizontal lines are divided into even and odd fields, wherein the even lines (lines 2, 4, 6, ...) form the even field and the odd lines (lines 1, 3, 5, ...) form the odd field. The even and odd fields are scanned in an alternating order to interleave the even and odd lines and provide the picture information in a proper sequence. The use of interlaced scanning complicates the compression of television signals as compared to previous teleconferencing applications, in which the compression was not performed on an interlaced signal. The object of the invention is to provide a general purpose compression system for optimizing the compression of digital pixel data. According to the present invention this object is solved by an apparatus for processing pixel data from digitized interlaced video signals for transmission in a compressed form comprising a first data path for generating a first compressed video signal a second data path for generating a second compressed video signal means coupled to said first data path for evaluating errors in the first compressed video signal and coupled to said second data path for evaluating errors in the second compressed video signal; and means responsive to said error evaluating means for selecting the compressed video signal having the least error, wherein said first data path comprises means for dividing said pixel data into blocks in a field format in which each frame is separated into its odd and even field for independent processing, and means for compressing said pixel data in said field format to provide said first compressed video signal; said second data path comprises means for dividing said pixel data into blocks in a frame format in which the odd and even fields of a frame are processed as a single frame by interleaving the lines of corresponding odd and even fields and means for compressing said pixel data in said frame format to provide a second compressed video signal. Further advantageous embodiments are subject matter of dependent claims 2 to 16. According to the present invention the above-mentioned object is also solved by a decoder apparatus characterized in that the following means are provided: means for receiving compressed digital video signals transmitted in blocks of frame processed pixel data and field processed pixel data; means coupled to said receiving means for determining whether a particular block of data contained in a received signal was frame processed or field processed; first means for decoding received blocks of field processed pixel data comprising said pixel data in blocks in a field format in which each frame is separated into its odd or even field for independent processing; second means for decoding received blocks of frame processed pixel data comprising said pixel data in blocks in a frame format in which the odd and even fields of a frame are processed as a single frame by interleaving the line of corresponding odd and even fields; and means responsive to said determining means for selectively combining decoded blocks from said first and second means to recover an uncompressed video signal. Further advantageous embodiments are subject matter of claims 18 to 22. According to the present invention the object mentioned above is also solved by a digital television system for processing pixel data from digitized interlaced video signals for transmission in a compressed form comprising: a first data path for generating first compressed data; a second data path for generating second compressed data; means coupled to said first data path for evaluating errors in the first compressed data and coupled to said second data path for evaluating errors in the second compressed data; and means responsive to said error evaluating means for selecting the compressed data having the least error; wherein said first data path comprises means for dividing said pixel data into blocks in a field format in which each frame is separated into its odd and even field for independent processing and means for compressing said pixel data in said field format to provide said first compressed data; said second data path comprises means for dividing said pixel data into blocks in a frame format in which the odd and even fields of a frame are processed as a single frame by interleaving the lines of corresponding even and odd fields and means for compressing said pixel data in said frame format to provide said second compressed data; said means responsive to said error evaluating means are selecting the compressed data for each block having the least error; means for encoding the selected data for each block to identify it as field processed or frame processed data are provided; and means for combining the encoded selected data to provide a compressed video data stream containing interspersed blocks of field processed pixel data and frame processed pixel data for transmission by a transmitter are provided. Further advantageous embodiments are subject matter of dependent claims 24 and 25. According to the present invention the object mentioned above is also solved by a method for encoding digital video signal pixel data for transmission in a compressed form comprising the steps of: generating a first compressed video signal in a first data path; generating a second compressed video signal in a second data path; evaluating errors in the first compressed video signal and evaluating errors in the second compressed video signal for selecting the compressed video signal having the least error; characterized in that for said first data path said pixel data are divided into blocks in a field format, in which each frame is separated into its odd and even field for independent processing, and said pixel data in said field format are compressed to provide said first compressed video signal; and for said second data path said pixel data are divided into blocks in a frame format in which the odd and even fields of a frame are processed as a single frame by interleaving the lines of corresponding even and odd fields, and said pixel data in said frame format are compressed to provide said second compressed video signal. Further advantageous embodiments of this method are subject matter of dependent claims 27 to 30. According to the present invention digitized interlaced television signal can be compressed in various formats. In one format, referred to herein as the "field format", each frame is separated into its two fields which are processed independently. In another format, referred to as the "frame format", the two fields are processed as a single frame by interleaving the lines of corresponding even and odd fields. Neither option is entirely satisfactory for video compression. Frame processing works better than field processing when there is little or no motion. Since each frame has twice the number of lines or samples than a field for a given picture height, there will be more correlation between samples and hence, compressibility is increased. To achieve the same accuracy as frame processing, field processing requires a higher bit rate. Thus, for equal bit rates frame processing achieves greater accuracy. Frame processing enjoys similar advantages over field processing if horizontally moving features have little horizontal detail or if vertically moving features have little vertical detail. In regions where there is little detail of any sort, frame processing often works better than field processing no matter how rapidly changes occur. In detailed moving areas, it is generally more efficient to compress field formatted data. In such cases, frame processing suffers from spurious high vertical frequencies introduced by the interleaving of the even and odd fields. This reduces the correlation between lines and therefore the effectiveness of the compression algorithm. According to the present invention the compression system combines the advantages of frame processing where there is little or no motion with the advantages of field processing in detailed moving areas. The inventive system permits video signals to be compressed and then reconstructed without any degradation in motion rendition and optimizes the compression of digital data by combining different compression techniques or data formats to obtain peak performance under different conditions. In accordance with the present invention, apparatus is provided for optimizing the compression of successive blocks of digital video. The video blocks are compressed in a first data path to provide a first compressed signal and in a second data path to provide a second compressed signal. Errors in the first and second compressed signals are evaluated, and the compressed signal having the least error is selected for each video block. The selected signals are then combined to provide a compressed digital data stream. Each selected signal is encoded with data indicative of the data path in which the signal originated. Receiver apparatus for decoding the compressed digital data stream comprises means for detecting the encoded data from each selected signal to identify whether the signal originated in the first or second data path. Means responsive to the detecting means decompresses the selected signals from the first data path in a corresponding first decompression path. Similarly, signals selected from the second data path are decompressed in a corresponding second decompression path. The first and second data paths can use different compression algorithms. Alternately, the same compression algorithm can be applied in each path to data that is provided to the paths in different formats. In either case, the first and second decompression paths will use decompression algorithms or data formats that correspond to those of the respective first and second data paths. In a preferred embodiment, the apparatus and method of the present invention process digitized interlaced video signals for transmission in a compressed form. The transmitted compressed signals are decoded at a receiver for reconstruction of the original interlaced video signals. A digitized interlaced video signal is divided at the transmitter into blocks of pixel data. The blocks are formatted into a field format and compressed to provide a first compressed video signal. The blocks are also formatted in a frame format and compressed to provide a second compressed video signal. Errors in the first and second compressed video signals are evaluated, and the compressed video signal having the least error is selected for each block. The selected signals are encoded to identify them as field formatted or frame formatted signals. The encoded signals are combined to provide a compressed video signal data stream for transmission. Motion compensation can be provided to increase the compression efficiency. With motion compensation, pixel data for a current video frame contained in the digitized interlaced signal is predicted from pixel data of a previous frame. The predicted pixel data is subtracted from the actual pixel data for the current frame to provide an abbreviated set of pixel data for use in producing the first and second compressed video signals. The selected signals are encoded with motion vector data generated during the prediction step. At a receiver, the combined and coded signals are decoded. Field formatted signals are processed in a decoder path adapted for field processing of data. Frame formatted signals are processed in a decoder path adapted for frame processing of data. The appropriate decompressed data (field processed or frame processed) for each data block is then combined. Motion vector data is retrieved at the receiver from encoded selected signals representing a current video frame. Data representing a previous video frame is stored. Prediction signals are computed from the retrieved motion vector data and the stored data. The prediction signals are added to the decompressed signals, and the resultant signals are formatted to reconstruct the original digitized interlaced video signal. Field formatting of data at the transmitter can be accomplished by dividing the digitized interlaced video signal into even and odd blocks of pixel data corresponding to even and odd fields of a video frame. The even and odd blocks are then provided to a first compressing means in an alternating order defining the field format. Frame formatted data can be provided by grouping the blocks into corresponding odd/even block pairs, and scanning the odd and even lines of pixel data from each pair in an alternating order. The resultant interleaved lines of frame formatted data from successive block pairs are provided to a second compressing means. One compression algorithm that may be used in connection with the present invention is the Discrete Cosine Transform ("DCT"), in which case the first and second compressing means produce and quantize respective first and second arrays of transform coefficients for the pixel data. The error evaluating means determine the error between the quantized transform coefficients and the unquantized transform coefficients of each array. The error may be computed from the difference between each coefficient in an array before and after quantization, and selection between field processed and frame processed data can be made by comparing the sum of the absolute value of all the coefficient differences in the first array to the sum of the absolute value of all the coefficient differences in the second array. The array having the least total error is chosen for transmission. The error evaluating means can alternatively operate in the pixel domain, by inverse transforming the first and second arrays to recover the pixel data. In this case, the error for the respective field and frame processing paths is determined by comparing the pixel data recovered from each array to the original set of pixel data presented to the compression means. Further features and advantages are disclosed in the drawings and the following detailed description. Figure 1 is an illustration depicting a video frame separated into odd and even fields for field processing of pixel data; Figure 2 is a diagram illustrating a video frame having interleaved even and odd lines for frame processing of pixel data; Figure 3 is a block diagram of data compression apparatus for use at a transmitter in accordance with the present invention; Figure 4a is a block diagram of circuitry that can be used to perform the function of scan converter #1 of Figure 3; Figure 4b is a diagram illustrating the format of pixel data blocks output from scan converter #1; Figure 5a is a block diagram of circuitry that can be used to perform the function of scan converter #2 of Figure 3; Figure 5b is a diagram illustrating the format of an odd/even pair of pixel data blocks provided by scan converter #2; Figure 6 is a diagram illustrating the order of individual pixel data blocks within the fields of a video frame; Figure 7 is a block diagram of error evaluation and selection circuitry that can be used in the apparatus of Figure 3; and Figure 8 is a block diagram of decoder apparatus for use at a receiver to decompress transmitted digital data and reconstruct a digitized interlaced video signal. Figure 1 illustrates a single video frame 10 separated into its two component fields. Field 1 designated by reference numeral 12 comprises the odd lines of the video frame. Field 2 represented by reference numeral 14 comprises the even lines of the video frame. In prior art analog television systems, each even and odd line of the video frame is defined by an analog signal modulated with image information. Sequential lines from the even and odd fields are interleaved to provide an intelligible video picture. An interlaced video frame 16 is depicted in Figure 2. Odd lines 18 from Field 1 are interleaved with even lines 20 from Field 2. The even and odd lines must be interleaved in this fashion in order for a proper picture to be displayed on a television screen. The present invention concerns digitally transmitted data. In digital television systems, each line of a video frame is defined by a sequence of digital data bits referred to as "pixels". A large amount of data is required to define each video frame of a television signal. For example, 7.4 megabits of data is required to provide one video frame at NTSC resolution. This assumes a 640 pixel by 480 line display is used with 8 bits of intensity value for each of the primary colors red, green, and blue. High definition television requires substantially more data to provide each video frame. In order to manage this amount of data, particularly for HDTV applications, the data must be compressed. As noted above, different data formatting and/or compression techniques can be more efficient than others at different times during the transmission of a digital data stream. For example, field processing of video data in a format as shown in Figure 1 is generally preferred in detailed moving areas. Frame processing, as depicted by the format of Figure 2, generally works better than field processing when there is little or no motion. The present invention provides a system that optimizes the compression of digital television data by switching between field processing and frame processing as appropriate. In accordance with the present invention, a standard digitized interlaced television signal is input at terminal 30 of the data compression apparatus shown in Figure 3. The process of digitizing video signals is well known in the art. A plurality of separate digitized signals may be provided for the various components, such as luminance and chrominance, of a video signal. When the present invention is used in conjunction with multiple luminance and chrominance components, it is most important that the luminance portion of the video signal take advantage of the adaptive field and frame processing. An image defined by the interlaced video signal is decomposed by a first scan converter 32 into blocks of a size appropriate for data compression. Any of the various data compression techniques well known in the art can be used in accordance with the present invention. The most popular compression technique is known as the Discrete Cosine Transform ("DCT"). This technique is described in Chen and Pratt, "Scene Adaptive Coder", IEEE Transactions on Communications , Vol. COM-32, No. 3, March 1984. The following description explains the invention using an 8 x 8 pixel block size together with the DCT compression technique. In order to minimize complexity and memory requirements for the compression and subsequent decompression apparatus of the present invention, scan converter 32 groups the even and odd fields of each video frame into pairs. The scan converter then alternately outputs the same block from one field and then the other. This function can be implemented using the components illustrated in the block diagram of Figure 4a. The digitized interlaced video signal input at terminal 30 is formatted to provide all of the lines from the odd field (Field 1) followed by all of the lines of the even field (Field 2). This is depicted in Figure 4b, which illustrates Field 1 (160) followed by Field 2 (162). The function of scan converter 32 is to divide Fields 1 and 2 into a plurality of corresponding blocks. Each block is M pixels wide by N pixels high. It takes j such blocks to cover the width of the picture and i blocks to cover the height of each field. Having established this format, scan converter 32 then outputs the blocks in alternating odd/even order, as illustrated in Figure 6. Figure 6 is a detailed representation of the odd and even fields 160, 162 of Figure 4b after the image has been decomposed by scan converter 32 into individual blocks of pixel data. Field 1 comprises odd blocks of pixel data and Field 2 comprises even blocks of pixel data. In the embodiment illustrated, each 8 x 8 block contains 64 pixels. The first block of data output from scan converter 32 for each field pair is block 164. Next, block 200 is output, followed by blocks 165, 201, 166, 202, etc. After block 231 is output from scan converter 32, the next two fields (representing the next video frame) are processed and read out in the same manner. The formatting of data by scan converter 32 as described above is referred to herein as field formatted data. In order to provide field formatted data, scan converter 32 can comprise a dual port RAM 70 as shown in Figure 4a. The data contained in a digitized interlaced video signal input at terminal 30 is loaded into RAM 70 in the order received. A read address is generated to enable the data to be read out of RAM 70 in the field format. A pixel clock signal input at terminal 72 is coupled to a pixel counter 74 that outputs a digital signal ranging from 0 to M-1. This count forms the log 2 M least significant bits of the dual port RAM read address. A divider 76 and horizontal block counter 78 produce a signal ranging from 0 to j-1 and forms the next log 2 j bits of the read address. Another divider circuit 80 and line counter 82 provide an output ranging from 0 to N-1, and forms the next log 2 N bits of the read address. Divider 84 and vertical block counter 86 provide an output ranging from 0 to i-1 to form the next log 2 i bits. Finally, divider 88 provides the most significant bit of the dual port RAM address in order to toggle between Field 1 and Field 2 of each video frame. The composite address signal input to RAM 70 requires 1 + log 2 M + log 2 j + log 2 N + log 2 i bits. For an 8 x 8 block size, the pixel and line counters will both require 3 bits. The number of bits required for the horizontal and vertical block counters will depend on the size of the fields. The result of the above is that the read address of RAM 70 will be incremented to output the video data in a field format. Those skilled in the art will appreciate that the pixels within each block may be scanned in a different order as determined by the input requirements of the DCT algorithm or other compression device used. Referring again to Figure 3, the field formatted data is output from scan converter 32 to a first compression path comprising a DCT transform coder 36 and a quantizer 38. These are conventional elements used in DCT compression, as described in the Chen and Pratt article referred to above. The field formatted data is also input to a second compression path comprising a second scan converter 42, a transform coder 44, and a quantizer 46. Transform coder 44 and quantizer 46 are identical to those in the first compression path. Prior to inputting the field formatted data to the first and second compression paths, an optional predictor signal used for motion compensation can be subtracted by a subtraction circuit 34. The motion compensation aspect of the present invention is described in more detail below. Scan converter 42 is used to convert the field formatted data from scan converter 32 into a frame format. In this format, corresponding pairs of blocks from the even and odd fields are interleaved on a line-by-line basis. Components for performing this operation are illustrated in Figure 5a. The frame format is illustrated in Figure 5b, which shows a pair of vertically adjacent blocks 250 comprising odd block 164 and corresponding even block 200. These are the same blocks that are illustrated in a field format in Figure 6. Block 164 contains 64 odd pixels 252 that represent portions of the odd lines contained in a video frame. Block 200 contains 64 even pixels 254 corresponding to portions of the even lines of the video frame. The components of Figure 5a scan the lines of pixels shown in Figure 5b in an alternating odd/even line scanning order to provide the interleaved frame formatted data. The field formatted data input at terminal 90 is stored by dual port RAM 92 in the order received. The pixel clock signal input at terminal 72 of Figure 5a is used to strobe a pixel counter 94 to provide an output signal ranging from 0 to M-1, which serves as the log 2 M least significant bits of the dual port RAM address. The pixel clock signal is divided by M at divider 96, and input to another divide by 2 circuit 98 for input to a line counter 100. The line counter outputs a digital signal ranging from 0 to N-1 which forms the next log 2 N bits of the dual port RAM address. The output of divide by M circuit 96 also serves as the most significant bit of the read address input of RAM 92. The resultant read address signal consists of 1 + log 2 N + log 2 M bits. This signal causes the data stored in RAM 92 to be read out in the frame format. As indicated in Figure 3, the compressed field formatted data from the first compression path is output from quantizer 38 to a switch 39. The frame formatted data compressed in the second compression path is output from quantizer 46 to switch 39. In accordance with the present invention, errors in the compressed data from the two different compression paths are evaluated and the data having the least error for each odd/even block pair is selected for transmission. Thus, where a portion of a video frame having little or no motion is compressed, it is likely that the pixel data processed in the frame format will be selected. Where the portion of the video frame being evaluated is from a detailed moving area, it is probable that the data compressed in a field format will be selected. Error evaluation and selection of frame processed or field processed data is achieved using hard wired logic generally designated by reference numeral 51. The error is determined by comparing the quantized transform coefficients to the original unquantized transform coefficients in each data path. The unquantized coefficients input to quantizer 38 are subtracted at 48 from the quantised coefficients output from quantizer 38. Similarly, the unquantized coefficients input to quantizer 46 are subtracted at 50 from the quantized coefficients output from quantizer 46. The results are input to an error evaluation and selection circuit 52 that compares the errors in the two paths. It should be appreciated that the error evaluation and selection could alternately be implemented in software. In a preferred embodiment, the error metric used is the sum of the absolute value of all the coefficient differences. However, other metrics such as the mean squared error will also perform satisfactorily. In either case, the average error is evaluated over a two-block region. This is required because the frame formatted data comprises interleaved data from odd/even block pairs, as shown in Figure 5b. Comparison of field formatted data to frame formatted data must therefore occur over the two-block region. The error evaluation and selection components 51 are illustrated in greater detail in Figure 7. As noted, these may be implemented in hardware or software. Quantized (Q) and unquantized ( Q ) data from the frame format compression path are input to terminals 104 and 102 respectively of subtraction circuit 106. The absolute value of the difference between these signals is determined by conventional means 108, and accumulated at 110. Similarly, the quantized and unquantized coefficients from the field format compression path are input at terminals 114, 112 respectively of subtraction circuitry 116. The absolute values of the differences are computed as indicated at 118, and accumulated at 120. The accumulated errors from the respective frame and field formatted paths are compared at a comparator 122, which provides an output signal at terminal 124 indicative of which path produced the least error for a particular pair of pixel data blocks. The output signal from the error evaluation and selection components actuates switch 39 (Figure 3) to connect the compression path having the least error to downstream processing circuitry. Such circuitry includes variable length coder 56 that assigns variable length codewords to represent the selected sets of quantized transform coefficients. An example of such a variable length coder is described in the Chen and Pratt article referred to above. The output of variable length coder 56 is input to a multiplexer 58 that combines the compressed data with control data carried on data path 68. The control data includes a bit for encoding the selected compressed signals to identify them as field formatted or frame formatted signals. This can be the same bit used to actuate switch 39, wherein the selection of one of the compression paths is represented by "1" and the other compression path is represented by "0". The adaptive field/frame encoding system shown in Figure 3 can optionally be combined with motion compensation to provide additional compression efficiencies. Motion compensation techniques are well known in the art. Such techniques are described, for example, by Staffan Ericsson in "Fixed and Adaptive Predictors for Hybrid Predictive/Transform Coding", IEEE Transactions on Communications , Vol. COM-33, No. 12, December 1985, and Ninomiya and Ohtsuka, "A Motion-Compensated Interframe Coding Scheme for Television Pictures", IEEE Transactions on Communications , Vol. COM-30, No. 1, January 1982, both incorporated herein by reference. In order to provide motion compensation, the pixel data for the current video frame is predicted by motion compensator 64 and motion estimator 66 from pixel data of a previous video frame stored in frame store 62. The predicted pixel data is subtracted from the actual pixel data for the current video frame at subtracter 34 to produce a set of pixel data representing a prediction error. The prediction error pixel data is presented to the first and second compression paths for compression and selection as described above. In order to obtain a prediction for the next frame, an inverse transformation to the processing stream selected by the error evaluation and selection components must be computed, followed by the inverse of the second scan converter 42 in cases where frame processing was selected. The inverse transform is provided by circuitry 40, and the inverse of the second scan converter is provided by circuitry 54. Switch 41 is actuated by the output signal from error evaluation and selection circuit 52 to couple appropriately formatted data to the motion compensation circuitry. The appropriate inverse transform data is added back at adder 60 to the predictor signal that was initially subtracted from the incoming video. The result is written into frame store 62 (e.g., a shift register or RAM) where it is delayed until it can be used as a prediction for the next frame. Block displacement information, indicative of the location of a previous block that best matches a current block of pixel data within a predefined area, is determined by a motion estimator 66 which inputs corresponding motion vector data (X, Y) to motion compensator 64. The motion vector data is also input to multiplexer 58 from motion estimator 66 via path 68. Multiplexer 58 appends the motion vector data to the encoded video signal for use in deriving an identical prediction signal at a receiver. Since the object of motion compensation is to improve compression performance in moving areas of a video picture, it is more effective to estimate the block displacements and perform the compensation using fields instead of frames. Therefore, the displacement of each block of a given field is determined with reference to the same field of the previous frame. In some cases, better results are obtainable if the field immediately preceding the given field is chosen for the reference. In this case, an even field would be matched with an odd field, and an odd field would be matched with an even field. However, such a strategy is more difficult to implement and is not as effective when the vertical displacement is zero. Motion compensation is performed in the same manner regardless of whether field processing or frame processing is chosen for encoding. A prediction is obtained for each block of a given field by utilizing the estimated displacement vector to identify the matching block in the same field of the previous frame. In cases where frame processing is chosen for encoding, the prediction errors from two different fields are eventually interleaved by the second scan converter 42. The compressed, encoded signals are output from multiplexer 58 to a transmitter (not shown). The transmitted signal is received by a digital television receiver, and the signals are decoded by a decoder such as that shown in Figure 8. The received digital signals are input at terminal 130 to a demultiplexer 132 which separates the encoded control signals from the video data signals. A variable length decoder 134 recovers the quantized transform coefficients. Recovered coefficients for field processed blocks are decompressed in a first decompression path comprising inverse transform coder 136 and switch 142. Recovered coefficients for frame processed blocks are decompressed in a second decompression path comprising inverse transform coder 136, inverse scan converter 140, and switch 142. Inverse scan converter 140 is a memory device that restores the order of pixels resulting from the use of the second scan converter 42 at the encoder back to the original scanning order. The control data bit identifying each pixel data block as frame processed or field processed actuates switch 142 via path 152 to apply the appropriate decompressed data from the first decompression path or second decompression path to an inverse scan converter 150. This inverse scan converter is a memory device that restores the reordered pixels resulting from the use of the first scan converter 32 at the encoder back to the original raster scan order. The output of inverse scan converter 150 is the recovered, reconstructed digitized interlaced video signal originally input to the encoder. This output signal is coupled to a video monitor for display of the video program. Motion compensation at the receiver is provided by frame store 146 and motion compensation circuitry 148. Motion vector data appended to blocks of pixel data at the encoder is retrieved by demultiplexer 132 at the receiver. The motion vector data is input via path 152 to motion compensation circuitry 148 which uses the data, together with data representing a previous video frame stored in frame store 146, to recompute the original prediction signals. The recomputed prediction signals are added to the decompressed blocks of pixel data for the current video frame at adder 144. Since the motion vector data computed by motion estimator 66 at the encoder is appended to the pixel data blocks, there is no need to provide motion estimation circuitry at the decoder and the resultant decoder system is simplified. It will now be appreciated that the present invention provides improved data compression techniques for use in digital data transmission, and particularly for use in the transmission of digital interlaced television signals. The invention may be advantageously used in the transmission of HDTV signals, and provides a means for substantially reducing the amount of data that must be transmitted to define HDTV television pictures. A selection between frame processing and field processing based on achieving minimum error in accordance with the present invention has been found to be very effective in improving the picture quality of digitally compressed television signals. Still or slowly moving regions are rendered much more accurately than would be possible in a field processing system. Motion rendition is much better than would be possible in a frame processing system. Since the selection is made on a local basis, the system can adjust to scenes containing both moving and nonmoving features. In a modification and adaptation of the inventive system described for example, in order to choose between frame and field processed data, block error can be evaluated in the pixel domain. In this instance, instead of comparing transform coefficients, each block of data can be inverse transformed and then compared to the original block of pixels.

Claims: Apparatus for processing pixel data from digitized interlaced video signals for transmission in a compressed form comprising a first data path (32, 36, 38) for generating a first compressed video signal a second data path (42, 44, 46) for generating a second compressed video signal means (51) coupled to said first data path for evaluating errors in the first compressed video signal and coupled to said second data path for evaluating errors in the second compressed video signal; and means (52, 39) responsive to said error evaluating means for selecting the compressed video signal having the least error, characterized in that said first data path comprises means (32) for dividing said pixel data into blocks in a field format in which each frame (10) is separated into its odd (lines 12) and even field (lines 14) for independent processing, and means (36, 38) for compressing said pixel data in said field format to provide said first compressed video signal; said second data path comprises means (42) for dividing said pixel data into blocks in a frame format in which the odd (lines 18) and even fields (lines 20) of a frame are processed as a single frame by interleaving the lines (18, 20) of corresponding odd (lines 18) and even fields (lines 20) and means (44, 46) for compressing said pixel data in said frame format to provide a second compressed video signal. Apparatus in accordance with claim 1 wherein: successive sets of pixel data are sequentially compressed and evaluated; and said selecting means (51) select the compressed video signal having the least error for each particular set. Apparatus in accordance with claim 1 or 2 further comprising: means for encoding (58) the selected signals to identify them as field formatted or frame formatted signals. Apparatus in accordance with claim 3 further comprising: means for combining (58) the encoded selected signals to provide a compressed video signal data stream for transmission. Apparatus in accordance with any of claims 1 to 4 further comprising: means (32) for dividing a digitized interlaced video signal into even and odd blocks of pixel data corresponding to even and odd fields of a video frame; and means (32) for presenting said even and odd blocks to said first compressing means (36, 38) in an alternating order defining said field format. Apparatus in accordance with claim 5 further comprising: means (42) for grouping said blocks into corresponding odd/even block pairs and scanning the odd and even lines of each pair in an alternating order to provide interleaved lines of pixel data; and means (42) for presenting the interleaved lines of pixel data from successive block pairs to said second compressing means (44, 46). Apparatus in accordance with any of claims 1-6 wherein said sets each comprise two vertically adjacent blocks of pixel data from a video frame. Apparatus in accordance with claim 1 wherein: said first and second compressing means (36, 38; 44, 46) produce and quantize respective first and second arrays of transform coefficients for the set of pixel data; and said error evaluating means (51) determine the error between the quantized transform coefficients and the unquantized transform coefficients of each array. Apparatus in accordance with claim 8 wherein: said error evaluating means (51) determine said error by computing the difference between each coefficient in an array before and after quantization; and said selecting means (52) compare the average error of all the coefficient differences in said first array to the average error of all the coefficient differences in said second array to identify the array having the least total error. Apparatus in accordance with claim 1 wherein: said first compressing means (36, 38) produce a first array of transform coefficients for said set of pixel data; said second compressing means (44, 46) produce a second array of transform coefficients for said set of pixel data; and said error evaluating means (51) comprise: means for inverse transforming said first and second arrays to recover the pixel data, and means for determining the error between the pixel data recovered from each array and the original set of pixel data presented to the first and second compressing means. Apparatus in accordance with claim 1 further comprising: means (30) for receiving a digitized interlaced video signal containing pixel data defining a sequence of video frames; means for predicting (62, 64, 66) the pixel data for a current video frame from pixel data of a previous video frame; means for subtracting (34) the predicted pixel data from the actual pixel data for the current video frame to produce a set of pixel data representing a prediction error; means for presenting (32, 34, 90) the prediction error pixel data to said first compressing means in a field format; and means for presenting (34, 90, 42) the prediction error pixel data to said second compressing means in a frame format. Apparatus in accordance with claim 11 further comprising: means for dividing (32) each video frame of the digitized interlaced video signal into successive blocks of pixel data for processing on a block-by-block basis by said predicting, subtracting and presenting means. Apparatus in accordance with claim 11 or 12 further comprising: means for encoding (58) the selected signals with motion vector data generated by said predicting means. Apparatus in accordance with any of claims 11 to 13 further comprising: means for encoding (58) the selected signals to identify them as field formatted or frame formatted signals. Apparatus in accordance with claim 14 further comprising: means for combining (58) the encoded selected signals to provide a compressed video signal data stream for transmission. A receiver for decoding the compressed digital data stream from the apparatus of one of claims 1 to 15 comprising: means for detecting (132) the encoding data from each selected signal to identify whether the signal originated in the first data path or the second data path; and means for responsive to said detecting means (142) for processing the selected signals from the first data path in a corresponding first decompression path (134, 136) and for processing the selected signals from the second data path in a corresponding second decompression path (134, 136, 140). Decoder apparatus characterized in that the following means are provided: means (130) for receiving compressed digital video signals transmitted in blocks of frame processed pixel data and field processed pixel data; means (132) coupled to said receiving means for determining whether a particular block of data contained in a received signal was frame processed or field processed; first means (134, 136) for decoding received blocks of field processed pixel data, said field processed pixel data comprising said pixel data in blocks in a field format in which each frame (10) is separated into its odd (lines 12) or even field (lines 14) for independent processing second means (134, 136, 140) for decoding received blocks of frame processed pixel data, said frame processed pixel data comprising said pixel data in blocks in a frame format in which the odd (lines 18) and even fields (lines 20) of a frame are processed as a single frame (10) by interleaving the lines (18, 20) of corresponding odd (lines 18) and even fields (lines 20); and means (142) responsive to said determining means for selectively combining decoded blocks from said first and second means to recover an uncompressed video signal. Apparatus in accordance with claim 17 further comprising means (150) for converting the recovered signal to a digitized interlaced video signal. Apparatus in accordance with claim 17 or 18 wherein said determining means (132) comprises means for reading field and frame processing identification data appended to said blocks. Apparatus in accordance with any claims 17 to 19 wherein said blocks comprise arrays of transform coefficients, and the first and second means comprise means for inverse transforming (136) said coefficients. Apparatus in accordance with claim 20 wherein the inverse transforming means are shared by said first and second means. Apparatus in accordance with any of claims 17 to 21 further comprising: means (132) for retrieving motion vector data appended to received blocks of pixel data representing a current video frame; means for storing (146) data representing a previous video frame; means for computing prediction signals (148) from the retrieved motion vector data and the stored data; and means for adding (144) said prediction signals to the received blocks for the current video frame. A digital television system for processing pixel data from digitized interlaced video signals for transmission in a compressed form comprising: a first data path (32, 36, 38) for generating first compressed data; a second data path (42, 44, 46) for generating second compressed data; means (51) coupled to said first data path for evaluating errors in the first compressed data and coupled to said second data path for evaluating errors in the second compressed data; and means (52, 39) responsive to said error evaluating means for selecting the compressed data having the least error; characterized in that said first data path comprises means (32) for dividing said pixel data into blocks in a field format in which each frame (10) is separated into its odd (lines 12) and even fields (lines 14) for independent processing and means (36, 38) for compressing said pixel data in said field format to provide said first compressed data; said second data path comprises means (42) for dividing said pixel data into blocks in a frame format in which the odd (lines 18) and even fields (lines 20) of a frame are processed as a single frame (16) by interleaving the lines (18, 20) of corresponding odd and even fields and means (44, 46) for compressing said pixel data in said frame format to provide said second compressed data; said means (52, 39) responsive to said error evaluating means are selecting the compressed data for each block having the least error; means (58) for encoding the selected data for each block to identify it as field processed or frame processed data are provided; and means (58) for combining the encoded selected data to provide a compressed video data stream containing interspersed blocks of field processed pixel data and frame processed pixel data for transmission by a transmitter are provided. The system of claim 23 further comprising: receiver means for receiving a compressed video data stream from said transmitter; means operatively associated with said receiver means (132) for decoding the encoded data in said data stream to identify field processed blocks and frame processed blocks; first means (134, 136) for processing received blocks of field processed data; second means (134, 136, 140) for processing received blocks of frame processed data; and means (142) responsive to said decoding means (132) for selectively combining blocks from said first and second processing means to recover an uncompressed digitized interlaced video signal. The system of claim 24 wherein said digitized interlaced video signal defines a sequence of video frames, said system further comprising: means for predicting (62, 64, 66) the pixel data for a current video frame from pixel data of a previous video frame; means for subtracting (34) the predicted pixel data from the actual pixel data for the current video frame to produce a set of pixel data representing a prediction error; means for presenting (90) the prediction error pixel data to said first data compression means (36, 38) as field formatted blocks; means for presenting (90, 42) the prediction error pixel data to said second data compression means as frame formatted blocks; means (66) operatively associated with said predicting means for generating motion vector data for the current video frame; means (58) operatively associated with said generating means for encoding the selected data for each block with corresponding motion vector data; means (132) operatively associated with said receiver means for retrieving the motion vector data from each block of a current video frame; means (146) operatively associated with said receiver for storing data representing a previous video frame; means (148) for computing prediction signals from the retrieved motion vector data and the stored data; and means for adding (144) said prediction signals to the received blocks for the current video frame. A method for encoding digital video signal pixel data for transmission in a compressed form comprising the steps of: generating a first compressed video signal in a first data path; generating a second compressed video signal in a second data path; evaluating errors in the first compressed video signal and evaluating errors in the second compressed video signal for selecting the compressed video signal having the least errors; characterized in that for said first data path said pixel data are divided into blocks in a field format, in which each frame (10) is separated into its odd (lines 12) and even field (lines 14) for independent processing, and said pixel data in said field format are compressed to provide said first compressed video signal; and for said second data path said pixel data are divided into blocks in a frame format in which the odd (lines 18) and even fields (lines 20) of a frame are processed as a single frame (16) by interleaving the lines (18, 20) of corresponding odd and even fields, and said pixel data in said frame format are compressed to provide said second compressed video signal. A method in accordance with claim 26 comprising the steps of selecting, for each block, the compressed video signal having the least error; encoding the selected signals to identify them as field formatted or frame formatted signals; and combining the encoded signals. A method in accordance with claim 27 comprising the further steps of: predicting the pixel data for a current video frame contained in said digital video signal from pixel data of a previous frame; subtracting said predicted pixel data from the actual pixel data for the current frame to provide an abbreviated set of pixel data for use in producing said first and second compressed video signals; and encoding the selected signals with motion vector data generated during said prediction step. A method for decoding the combined encoded signals produced by the method of claim 28, comprising the steps of: decompressing field formatted signals in a decompression path adapted for field processing of data; decompressing frame formatted signals in a decompression path adapted for frame processing of data; retrieving the motion vector data from encoded selected signals representing a current video frame; storing data representing a previous video frame; obtaining prediction signals from the stored data using the retrieved motion vector data; adding said prediction signals to the decompressed signals; and combining the decompressed signals to recover the digital video signal. A method for decoding the combined encoded signals produced by the method of any of claims 26 to 28, comprising the steps of: decompressing field formatted signals in a decompression path adapted for field processing of data; decompressing frame formatted signals in a decompression path adapted for frame processing of data; and combining the decompressed signals to recover the digital video signal.

Inventors: KRAUSE EDWARD A, PAIK WOO H, KRAUSE, EDWARD A., PAIK, WOO H.
Applicants: GEN INSTRUMENT CORP, GENERAL INSTRUMENT CORPORATION OF DELAWARE
Application year: 1991
Main classification: H04N7
IPC codes: H04N1, H04N7, H04N11, G06T9