IMPROVED TELEMETRY FORMAT

Abstract: A method and apparatus are disclosed for telemetering both analog and digital data from an implantable medical device to an external receiver, such as between an implanted cardiac pacer and its external programming equipment. Analog data is first converted to digital format by an analog-to-digital converter, such that the transmission is digital data. A damped carrier at 175 kilohertz is pulse position modulated by the data. The modulation scheme defines a frame of slightly less than 2 milliseconds. The frame is divided into 64 individual time periods using a crystal clock. The data, along with synchronization and identification codes, are positioned into predefined ranges within each frame as measured by the individual time periods. The data is uniquely identified by the position of a burst of the carrier within the predefined range. This modulation scheme enables necessary data to be transmitted at sufficiently high rates with reduced power requirements thereby conserving the internal battery of the implantable device. This modulation scheme provides flexibility of use, for example, with complex medical devices where transmission of increased volumes of data is desirable, such as cardiac devices having dual-chamber or multisensor capabilities, and for controlling particular conditions, such as tachyarrhythmia.

Description: IMPROVED TELEMETRY FORMAT BACKGROUND OF THE INVENTION Field of the Invention. The present invention generally relates to implantable medical devices, and more particularly, pertains to telemetry schemes for percutaneously transmitting analog and digital data from an implantable medical device. Description of the Prior Art. The earliest implantable medical devices were designed to operate in a single mode and with no direct percutaneous communication. Later it became clinically desirable to vary certain of the operating parameters and change modes of operation. This was accomplished through the use of programmers and other external devices which transferred commands percutaneously to the implanted medical device. The communication between the implant and the external world was at first primarily indirect. The operation of an implantable cardiac pacer could be observed, for example, in the electrocardiogram of the patient. Soon it became known that data could be sent from the implanted cardiac pacer by modulating the stimulation pulses in some manner. This can only provide a low bandpass channel, of course, without interfering with the clinical application of the device. Change of the pacing rate to indicate battery condition was a commonly used application of this technique. As implantable cardiac pacers became more complex, the desirability to transfer more data at higher speeds resulted in the percutaneous transmission of data using a radio frequency carrier. The data to be transmitted is of two basic types, namely, analog and digital. The analog information can include, for example, battery voltage, intracardiac electrocardiogram, sensor signals, output amplitude, output energy, output current, and lead impedance. The digital information can include, for example, statistics on performance, markers, current values of programmable parameters, implant data, and patient and unit identifiers. The earliest RF telemetry systems transmitted analog and digital information in separate formats, resulting in inefficient utilization of the available power/bandwidth. Also, these modulation schemes tended to be less than satisfactory in terms of battery consumption, and do not lend themselves to simultaneous transmission of differing data types. Many types of RF telemetry systems are known to be used in connection with implantable medical devices, such as cardiac pacemakers. An example of a pulse interval modulation telemetry system used for transmitting analog and digital data, individually and serially, from an implanted pacemaker to a remote programmer is disclosed in U.S. Patent No. 4,556,063 issued to Thompson et al., herein incorporated by reference. An example of a modern pacemaker programmer for use with programmable cardiac pacemakers having RF telemetric capabilities is disclosed in U.S. Patent No. 4,550,370 issued to Baker, herein incorporated by reference. However, the telemetry format which is used under these systems, as well as other prior telemetry systems, have not been entirely adequate for reasons described above and a need for significant improvement has continued. As will become apparent from the following, the present invention satisfies that need. SUMMARY OF THE INVENTION The present invention percutaneously transmits all data from the implantable medical device in a digital format. It is pulse position modulated on an RF carrier. To accomplish this, the analog quantities must be converted to digital values either at the time of transmission, such as for real-time intracardiac electrocardiograms, or before storage in the memory of the device, as in the case of historical values of pacing rate for subsequent transmission for trend analysis. Whether the data to be sent is initially analog or digital, it is transmitted in the same format, i.e., as digital information. The RF carrier is pulse position modulated to conserve battery energy. In this manner, only a short burst of the carrier, e.g., one cycle, is actually needed to transmit a given unit of data. The time position of that burst relative to a synchronizing standard determines the value of the data unit transmitted. To accomplish this pulse position modulation, a frame of about 2 milliseconds is defined. Within this frame are positioned a synchronizing burst, a frame identifier burst, and one or more data bursts. The synchronizing burst is positioned at a fixed position in the frame. The frame identifier and data are variables, such that the corresponding bursts occur within a range of time within the frame. The range in which a burst is found defines the nature or type of the variable. The position in the range defines the value of the variable. Because all data transmission is in a digital format, great flexibility is achieved with regard to additional units of data for future applications. The use of the standardized format and capability of encoding more data into a single pulse also decreases the overall battery current requirements and serves to level the energy demand over time. Transmitting the analog data in digital form provides enhanced noise immunity and accuracy. The transmission protocol provides data rates which are sufficient to transfer clinically useful EGM information in real time. Because each frame is independent, data quantities of varying precision can be transmitted using the same protocol. This modulation scheme provides flexibility of use, for example, with complex medical devices where transmission of increased volumes of data is desirable in real time, such as cardiac devices having dual-chamber or multisensor capabilities, and for controlling particular conditions such as tachyarrhythmia. BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be better understood, and its attendant advantages will be readily appreciated, by reference to the accompanying drawings when taken in consideration with the following detailed description, wherein: FIG. 1 is a simplified schematic view of an implantable medical device employing the improved telemetry format of the present invention; FIG. 2 is a conceptual view of one frame of the improved telemetry format of the present invention; FIG. 3 is a view of the actual transmission pattern of two frames of the improved telemetry format; FIG. 4 is a block diagram of a portion of an implantable medical device for implementation of the improved telemetry format; FIG. 5 is a simplified flowchart showing the basic function of software to perform the telemetry uplink operation of the improved telemetry format; FIG. 6 is a block diagram of the circuitry of the telemetry uplink hardware for implementing the improved telemetry format; FIG. 7 is a block diagram of the circuitry of the telemetry timing for implementing the improved telemetry format; and FIG. 8 is a schematic diagram of the driver circuitry for implementing the improved telemetry format. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention is disclosed relating to use of the improved telemetry format with an implantable cardiac pacer, which may be programmable. However, those of skill in the art will be readily able to adapt the teachings found herein to other implantable medical devices. It will also be understood by those of skill in the art that the telemetry format taught herein can be used for bi-directional communications between an implanted medical device and an external device. FIG. 1 is a simplified schematic diagram of the present invention as employed in a cardiac pacing system. An implantable pulse generator 10 is implanted in the patient under the outer skin barrier 28. Implantable pulse generator 10 is electrically coupled to the heart of the patient using at least one cardiac pacing lead 12 in a manner known in the art. Percutaneous telemetry data is transmitted from implantable pulse generator 10 by an RF uplink 26 utilizing the improved telemetry format to a receiving antenna 22, which is coupled to a programmer 20 via a cable 24. Receiving antenna 22 also contains a magnet which activates a reed switch in implantable pulse generator 10 as a safety feature, as taught in U.S. Patent No. 4,006,086 issued to Alferness et al., herein incorporated by reference. The telemetry data is demodulated and presented to the attending medical personnel by programmer 20. FIG. 2 is a schematic diagram of the protocol of RF uplink 26 using the improved telemetry format. The uplink uses a damped 175 kilohertz RF carrier which is pulse position modulated, as described in detail below. Shown at 30, the basic timing unit of the format is a frame, having a duration of t^. It will be understood by those skilled in the art, however, that the present invention can be practiced using fixed-length frames having periods of shorter or longer duration. In the preferred embodiment, the main timing source of implantable pulse generator 10 comprises a standard 32.768 kilohertz crystal clock which provides a basic clock cycle of 30.52 microseconds. Thus, a frame comprised of 64 clock cycles and extending over a fixed time interval of 1.953125 milliseconds is a convenient frame period, since such frame period is a binary multiple of the basic clock cycle. A unique synchronizing signal is positioned within a first fixed range of each frame 30. This signal comprises a synchronizing RF pulse 32 which is located at a time t nl within frame 30. To properly function as a synchronizing pulse, it must be located at a fixed point within the first fixed range of frame 30, as shown at 34. A four-bit frame identifier code is positioned within a second fixed range of each frame 30, such second fixed range comprising an identifier range 38. Identifier range 38 uses a total of eleven basic clock cycles as shown. This identifier code comprises an identifier RF pulse 36 which is pulse position modulated within the identifier range 38. The position of identifier pulse 36 within identifier range 38 identifies the nature or type of data found within each frame 30 which is being transmitted, such as peak sense, peak pressure, sense threshold and others, as described in further detail below. Shown at 40, time interval t^ thus uniquely represents the value of identifier pulse 36, which value in turn identifies the data type being transmitted within frame 30. Each frame 30 transfers one eight-bit byte of data along with the identifier code. This data is divided into two portions comprised of four bits of data each. A first portion of this data, namely the four least significant bits of the data byte, is positioned within a third fixed range of frame 30, such third fixed range comprising a lower nibble range 44. A second portion of this data, namely the four most significant bits of the data byte, is positioned within a fourth fixed range of frame 30, such fourth fixed range comprising an upper nibble range 48. A lower nibble pulse 42 is pulse position modulated within lower nibble range 44, such that its value is uniquely identified by its location, such as at a time t^ shown at 45. An upper nibble pulse 46 is also pulse position modulated within upper nibble range 48, such that its value is uniquely identified by its location, such as at a time ^ shown at 50. Lower nibble range 44 and upper nibble range 48 each comprise sixteen basic clock cycles, permitting each of the sixteen unique values of the four-bit nibble to be specified. To prevent data overlap, suitable guardbands are positioned between each of the ranges within the frame to uniquely identify the synchronizing pulses, thereby avoiding undefined and erroneous data transmission. FIG. 3 is a diagram of two frames of RF uplink 26, wherein a first frame corresponds to Word 1 shown at 70, and a second frame corresponds to Word 2 shown at 72. A count of clock cycles is indicated along an upper horizontal axis of this diagram for each frame. Each basic clock cycle has a duration of 30.52 microseconds. The first frame at 70 is initiated by an RF pulse 52. A synchronizing RF pulse 54 is shown uniquely identified as precisely four clock cycles later. Because the guardbands are all greater than four clock cycles, no combination of a frame identifier and data can appear as a synchronizing pulse. Synchronizing pulse 54 is used to provide frame synchronization between the transmitter (i.e., implantable pulse generator 10) and the receiver (i.e. , programmer 20). An identifier RF pulse 56 is located within identifier range 38, which range is defined as nine to nineteen basic clock cycles from the beginning of frame 70. In Word 1, for example, identifier pulse 56 is located at clock cycle nineteen. This identifies the frame as a particular type of data transfer, namely, "Sense Threshold" as indicated in Table 1 below. TABLE 1 Position Identification 9 Memory 10 Idle 11 EGM-1 12 Markers 13 Peak Sense 14 Pressure Waveform 15 Peak dp/dt 16 Peak Pressure 17 Delta Capacitor Voltage 18 Activity Counts 19 Sense Threshold A lower nibble RF pulse 58 is located within lower nibble range 44, which range is defined as twenty-four to thirty-nine basic clock cycles from the beginning of frame 70. In Word 1, for example, lower nibble pulse 58 is located at clock cycle thirty-one, specifying a binary value of seven on a scale of zero to fifteen. An upper nibble RF pulse 60 is located at clock cycle fifty-eight within upper nibble range 48, which range is defined as forty-four to fifty-nine basic clock cycles from the beginning of frame 70, and is demodulated in similar fashion. FIG. 4 is a block diagram of that portion of implantable pulse generator 10 which is associated with formatting and transmission of RF uplink 26. Most of the unique hardware which embodies the present invention is located on a single substrate, being a custom chip device indicated generally by arrow 105. The remainder is microprocessor-based logic indicated generally by arrow 100, comprising microprocessor 102, random access memory (RAM) 104, and parallel bus 106. The function of microprocessor-based logic 100 is described in further detail below. Chip 105 has an analog-to-digital (A/D) converter 108 which receives a number of analog inputs 110 from a multiplexer (not shown) . A/D converter 108 permits data to be transferred via RF uplink 26 to be digitized as necessary, so that all data is transmitted in a standardized digital form. Circuitry (CRC) for generating and analyzing the cyclic redundancy code used to forward error detect telemetry data transmitted over RF uplink 26 is indicated at 112. In the preferred embodiment, it is also used for data received by implantable pulse generator 10 via a downlink (not shown) . Circuitry (DMA) for providing direct memory access to RAM 104 is indicated at 114, thus permitting multiple byte transfers without constant management by microprocessor 102. Key hardware used to implement RF uplink 26 comprises telemetry control and data buffer circuitry indicated generally within dashed lines at 121, which circuitry includes data buffer 116 and telemetry control 120, and up-link timing circuitry 118. Data buffer 116 includes storage for twelve bits of data. This storage is partitioned into a four-bit section 119 for storage of the frame identifier code, and an eight-bit section 117 for storage of the lower nibble and upper nibble of a frame. Data buffer 116 thus stores all of the variables for one complete frame. Data buffer 116 is used to stage the variables for the frame which may be received from RAM 104, A/D converter 108, CRC 112, or elsewhere along parallel bus 106. Telemetry control 120 consists primarily of a telemetry status register. This register stores the telemetry commands and status as loaded by microprocessor 102. The contents of the register are thus used to gate the data at the proper time of the defined protocol. Up-link timing 118 decodes the twelve bits of data stored in data buffer 116 to produce a set of timing signals which key bursts of RF energy at the appropriate times to pulse position modulate the 175 kilohertz carrier. Up-link timing 118 also keys bursts of RF energy at the fixed positions within the frame corresponding to the frame-initiating pulse and the synchronizing pulse. FIG. 5 is a basic flowchart showing the overall function of the microprocessor-based logic 100. The role is essentially one of initiation of the transfer, rather than management of each detail of the transmission. Software associated with RF uplink 26 is started at element 130, usually by a down-linked command to transfer data. Element 132 schedules the requested transmission via the up-link facilities. This scheduling prioritizes uplink transmission requests. Lower priority is given to continuous real time transfers, such as EGM and battery voltage, whereas higher priority is given to single occurrence transmissions of status information. After scheduling, element 134 determines whether an uplink transmission is currently in progress. If an uplink transmission is in progress, element 132 re¬ schedules the request. If an uplink transmission is not in progress after scheduling, element 136 initiates the uplink transmission by activating telemetry control 120. Exit is via element 138. While some additional management of the process is required during the transmission, a description of such further details has been omitted, since it is not believed necessary to one skilled in the art to fully understand the present invention. As to the software associated with the uplink transmission, however, a source code listing of the pertinent sections of such software has been attached hereto as Appendix A, and is incorporated by reference herein. FIG. 6 is a block diagram showing the major data and control signals of telemetry control and data buffer 121 (which includes data buffer 116 and telemetry control 120 shown in FIG. 4), and also of up-link timing 118. A primary function of data buffer 116, as indicated above, is the staging of the twelve variable bits of a given frame which correspond to a four-bit frame identifier ID, and dual-nibble data comprising a four-bit lower nibble LN and a four-bit upper nibble UN. The data is received over an eight-bit, parallel bus 159 and can be from any one of several sources. Control lines EGMDATA at 150, PRSDATA at 151, DLDMA at 153, DMADS at 155, LDANDAT at 156, ENCRC at 161 and LDCRC at 171 specify the source. The output of A/D converter 108 of FIG. 4 is presented separately to data buffer 116 as an eight-bit parallel transfer to ADC(0-7) at 154 (see FIG. 6). The output of CRC 112 is presented separately to data buffer 116 as an eight-bit parallel transfer to CRC(0-7) at 160, since those devices are located on the same substrate. Telemetry control 120 outputs a number of control signals, including EGMGAIN at 162, RVPGAIN at 163, EGMTELEN at 164, ANULON at 165, RAMULON at 166, MEMEN at 167, PRSTELEN at 168, HDRCRCEN at 169 and EGMNPRS at 170. These control outputs are used to enable and control inputs to data buffer 116. The key outputs of telemetry control and data buffer 121 are TELRST at 182, which resets up-link timing 118 and initiates the beginning of a frame, and a parallel data transfer at 184, which transfers the frame identifier ID, lower nibble LN and upper nibble UN to up-link timing 118. Up-link timing 118 receives the frame-initiating control signal TELRST at 182 and the parallel data transfer (ID, LN and UN) at 184. A primary function of up-link timing 118 is to key the transmission of 175 kilohertz RF energy at the proper times to indicate start of frame, frame synchronization, frame identifier, lower nibble and upper nibble. Timing for this function is provided by the 32.768 kilohertz crystal clock to up¬ link timing 118 with clock signal XTAL at 186. An output TELCLK is provided at 188 which keys the actual burst of RF carrier at the proper times. FIG. 7 is a block diagram of up-link timing 118. A frame timing generator 202 provides the desired timing for a frame according to clock input XTAL at 186, in a manner hereinabove explained. Thus, each frame is comprised of sixty-four basic clock cycles. The process is initiated by receipt of the frame-initiating control signal TELRST at 182, which enables uplink when in a low state and disables uplink when in a high state. The initial clock cycle of a frame contains a burst of RF energy which is keyed by control signal TELCLK at 188, which is also used to trigger the start of the data decoding by an uplink word multiplexer 200. After the proper four-bit quantity is selected (i.e., frame identifier ID first, lower nibble LN next, and upper nibble UN last) , a telemetry pulse timer 204 determines the appropriate timing for a burst to be provided to frame timing generator 202, and a corresponding burst of RF energy is keyed. Each of the four-bit quantities thus results in the keying of a burst of RF energy at the appropriate time within each frame. FIG. 8 is a circuit diagram for the drive circuit for generating the RF carrier. A control signal TELCLK at 188 provides the timing information for keying the carrier. A non-overlap generator 220 functions as a delay device to save current by preventing output transistors 230 and 232 from conducting simultaneously. Every transition of control signal TELCLK at 188 causes one transition by non-overlap generator 220. Inverters 222, 224, 226 and 228 are scaled to provide efficient switching with sufficient drive to the gates of transistors 230 and 232. Transistors 230 and 232 drive the signal off of chip 105 to ANTDR at 234 to an antenna circuit. A tuned circuit of discreet components, capacitor 236 and coil 238, are located external to chip 105. Each transition thus causes this tuned circuit to resonate at 175 kilohertz, thereby generating one uplink burst. While the invention has been described above in connection with the particular embodiments and examples, one skilled in the art will appreciate that the invention is not necessarily so limited. It will thus be understood that numerous other embodiments, examples, uses and modifications of and departures from the teaching disclosed may be made as to various other systems for telemetering data to and from an implantable medical device, without departing from the scope of the present invention as claimed herein. APPENDIX A Avocet 6805 Assembler v2.20, #01002 Chip-.46δ05 10/12/89 0 xxxxxxxxxs R2 SYSTEM DATA AREA κ!«.-«.-∞_«_ι« File: DATA.ASH ..»!::::_ SRevision: 3.0 S -x=__x=_==-== '0005 400 ext_tlm_active EOU 5 ;Extended telemetry it active ■0006 401 wg~sta.e EOU 6 ;Magr_t state, node and rate are 402 ;βet to VOO_HOOE and mag_rate following 403 ;permanent programming. =0007 404 rr_trans EOU 7 ;Rate response transition 405 '0080 40. TLK NOMKAG HSK EOU 10110000B ;Hask to clear all telemetry 407 ;flags except those associated 408 ;with extended telemetry. 409 410 411 412 -0000 413 414 =0001 415 416 =0002 417 418 =0003 419 420 =0004 421 422 423 424 425 426 427 =0005 426 =0006 429 =0007 430 431 432 433 434 435 436 =0000 437 =0001 438 =0002 439 χ 0003 440 =000. 441 =0005 442 443 =0006 444 =0007 445 446 =0003 447 448 449 450 451 452 453 45- =0004 =0005 * x0006 4 -0007 45 459 «00F0 460 461 xOOCO 462 463 464 465 466 Downlink Control Byte equates 467 Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/89 08:11 «»«>_« R2 SYSTEH DATA AREA ================= File: DATA.ASH Page ====χχ χ χ== SRevision: 3.0 $ ============= 494 495 496 Telemetry equates 497 498 »*_*«»»•*»___**_-___--***--_-**-»********»-»-__»_*»•-»*_«*_**_***»_»-_ 499 500 501 * Marker values 502 ****«****«**************_.*** 503 =0066 504 Hr. REFRAC SEHSE EQU 66H ;Ventrical refractory sense mker =00EE 505 MtfsENSE ~ EQU OEEH ;Ventrical sense marker =00CC 506 ►ttfpACE EQU OCCH ;Ventrical pace marker =0077 507 MK LOC EOU 77H ;Loss of capture marker =00DD 508 Mt ~TRI GGERED EOU CODH ;Triggered pace marker 509 =0080 510 UP CRC EQU 80H ;Uplink CRC val for ULID regist =0000 511 UP~NOCRC EQU 0 ;Uplink no CRC val for ULID reg =0040 512 UP~HEH EQU 40H ;Uplink mem val for ULID regist =0000 513 UP~MOHEH EQU 0 ;Uplink no mem val for ULID 514 ;register 515 516 517 ID code and CRC bits for uplink messages 518 =0080 519 STATUS ID EOU •Confirmation ID =00C0 520 RAH ID~ EQU RAM uplink ID =0043 521 MARKER ID EQU ;Harker channel ID =0044 522 PKSEHSE ID EQU ;Heasure value IDs =0046 523 PKDPDT ΪD EQU =0047 524 PKPRESS ID EQU =0048 525 DLTAVOLT ID EQU =0049 526 ACTCHT D EOU =004A 527 SENSTHRS ID EQU 10 + UP NOCRC + UP HEH 528 529 530 531 Misc. telemetry equates 532 533 =00C3 534 ACCESS CCOE EQU 0C3H ;Telemetry access code for IPG =00B3 535 RH_HC0_L_ID EOU 10110011B ;IPG model I.D. value, model S444 536 =0027 537 IHTRRG SIZ EQU 39 ;Siιe of interrogate block =0080 538 HAX_HEHREAD EOU 128 ;Haxiπum memory block read size 539 =000F 540 PG0 EOU 0FH ;Control byte Page 0 ID =0001 541 PG7 EQU 1 fControl byte Page 7 ID =0002 542 PG8 EOU 2 ;Control byte Page 8 ID =0004 543 PG10 EOU 4 ;Control byte Page 10 ID 544 =0003 545 DHLK_EXTRΛ_LEH EQU 3 .Message overhead (sub from 546 ;IIW bytcount) =0001 547 DHU._CB_IHDX EQU 1 ; F i rst val f ield in downl ink 548 ( •message 549 ( 550 ; Emergency values 551 =0041 552 EHG_PV EQU 41H ;Emergency Pulse Width (2ms) =0018 553 EHG~AHP EQU 18H ;Emergency pulse amplitude 554 ;(6.0 Volts) 555 =0023 556 HIGH_RATE EQU 23H . • Highest rate that will allow 557 ;full RAH uplink (170pμτι) =001E 558 UP INK_DELAY EQU 1EH ;Miniπum time before next 559 . ■ scheduled event 560 jneeded for RAM uplink (300ms) =0003 561 UPSTAT DELAY EQU 03H ;Hiniπ τι time before next Avocet 6305 Assembler v2.20, #01002 Chip=146805 10/12/89 0 ========__ R2 EXECUTIVE ===================== File: POREXEC.ASH ========== SRevision: 3.0 $ ========== 264 265 POR and Executive Macros 266 267 t link? Avocet 6805 Assetrbler v2.20, #01002 Chip=146805 10/12/8908: _x__._____ 2 EXECUTIVE .-ι-«-_______ File: POREXEC.ASH P xxxxxxxxxx SRevision: 3.0 $ === χχχχχχ = 332 BRCLR inhibit_enabled,tlm flags,CHU IHHBT 333 LDX # * _. SENSE ;If not, get sense marker 334 BRA OU~UL ;Go uplink it 335 ;CKJ_IHHBT 336 LDX _ * MK_T IGGERED ;Else get triggered marker 337 BRA WU JL ;And send it 338 339 ;a ELSE IF ((paced evnt of exec flags) 340 ;;3 AND (NOT(inhibit of~tlm_flags))) THEH 341 ••a (« If pacing is not inhibited, " send a PACE marker. *) 342 ••a x :» MK PACE; 343 344 ;_HU_CKPACE 345 • Jump if NOT paced or if inhibited 346 BRCLR paced evnt,exec_flags,CHU CKSENSE 347 BRSET inhibit enabled, lm flagsT-HJ CKSENSE 348 LDX #MK_PACE ;Else get marker code 349 BRA _HU~UL ;And send it 350 351 352 353 354 355 356 357 ;CHU_CKSENSE 358 ;Jumρ if not sensed event 359 BRCLR sensed evnt,exec flags,CHU END 360 LDX #HK SENSE ;Else get marker value 361 362 ;;3 (* Uplink marker code •) 363 ;a CALLH UPLIHK_HARKER(x); 364 ;;3 END; (* marker channel active *) 365 ;;3 366 367 ;CHU. 368 UP INK_HARKER ;Ulink marker (value in x) 369 •CHU_ END 370 XENDH 371 372 ;S END; (* CHECK_HARKER_UPLINK *) 373 374 375 SEJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/8908 xz-c--z=-- 2 EXECUTIVE ===χχ=========χ====== File: POREXEC.ASH P ========== SRevision: 3.0 $ ========« 10/12/8908:1 e: POREXEC.ASH Pag (* If no markers are pending the flag one pending *) mrkr_pnd of uplink_flags := TRUE; marker val := x; END; END; enable interrupts; ;;S 555 556 ;; Uplink BUSY 557 ;; 558 ;UPL_BSY 559 ; BSET _rkr_pnd,uplink_flags ;Flag marker pending and 560 ; STX marker val ~ ;εtore marker in the buffer 561 ; 562 ;UPLHDONE 563 ; CLI ;Enabte interrupts 564 ; XENDH 565 ; 566 ;3 END; (* UPLINK HARKER *) 567 ; ' 568 569 SEJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/8908: __.____.-z R2 PACE OR SENSE MOOULE χ===_=*===χ==χ File: POS.ASH Pa __::is: SRevision: 3.0 S ============= 1816 ; a « -— ««« " «« ** « * ««««« UPLINK INTRRG *•••••••••**••**•**-• • >•«• 1817 ;8 « ~ * 1818 ;8* This macro uplinks the interrogate block of size INTRRG SI2 and * 1819 ;_* starting at the address pointed to by IWTRRGJkD if the uplink * 1820 ;8* channel is free. Otherwise, if there is no RAH uplink, the • 1821 ;8* interrogate block is set pending and is scheduled via the next * 1822 ;8* TELBF interrupt, occurring when the uplink channel becomes • 1823 8* free. All other uplinks have to be disabled while checking the * 1824 ;8* uplink flags to avoid contention of the uplink channel. * 1825 ;8- * 1826 ;B* ENTRY CONDITIONS: • 1827 ;a* None. 1828 .•a* 1829 ;B* EXIT CONDITIONS: * 1830 ;B* None. 1831 ;8* 1832 .a-----------**------------------------ • • •»** 1833 1834 ; 1835 ;_MACR0 UPLINK INTRRG; 1836 ;BBEGIN 1837 ;3 ( • Capture uplink channel - If busy set interrogate pending *) 1838 ;2 disable interrupts; 1839 ;8 IF NOKuplnk disabled of uplink_flags) THEN 1840 ; ~ 1841 ;UPLINK_IHTRRG SHACRO 1842 ; ~ SE1 ;Dissable interrupts 1843 ; BRSET upInk disabled,uplink flags,UI END 1W ;; - ' - 1845 ;;_ BEGIN 1846 ;;a IF NOT(u Iink bsy of uplink flags) THEN 1847 ;;8 BEGIN 1848 ;;a uplink_bsy of uplink_flags := TRUE; 1849 ;;3 enable interrupts; 1850 ;;3 statbyt := uplnk stβt; 1851 ;;a CALLH LOAD INTRRG UPLINK WITHIN R2L1B; 1852 ;;3 RAH uplink~of TELSTAT := TRUE; 1853 ;;S END; 1854 ;; 1855 ; BRSET uplink_bsy,uplink_flags,UI_UBSY 1856 ; BSET uplink_bsy,uplink~flags 1857 ; CLI .-Enable interrupts 1858 ; LDA uplnk_stat 1859 ; STA statbyt .'Initialize the uplink status byte 1860 ;U! LIU 1861 ; ~ LOAD INTRRG UPLINK 1862 ;UI LIU END 1863 ; ~ ~ BSET RAH uplink,TELSTAT 1864 ; BRA UI END 1865 ;; - 1866 ;;8 ELSE 1867 ;;8 intrrg_pnd of uplink flags := TRUE; 1868 ;;3 END; 186° ;; 1870 ;UI_UBSY 1871 ; ~ BSET intrrg_pnd,uplink flags 1872 ;; ~ 1873 ;;a enable interrupts; 1874 ;;a 1875 ;; 1876 ;UI_END 1877 ; ~ CLI .-Enable interrupts 1878 ; XENDH 1879 ; 1880 ;8END; (* UPLINK INTRRG • ) 1881 ; ~ 1882 1883 SEJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/89 08: »«__•«« R2 LSCAP INTERRUPT MODULE _======xx=x= File: LOC.ASH Pa ===== χ ==== SRevision: 3.0 S ====== Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/8908 ._«___ R2 LSCAP INTERRUPT HOOULE χ =========== File: LOC.AS*. P ========== SRevision: 3.0 $ ============= 477 ;ULH_LCP 478 ; . Jump if leap marker pending 479 ; BSET leap mrkr_pnd,u link flags 480 ; 481 ;; 482 ;;8 enable interrupts; 483 ;; 484 ;ULM_DONE 485 ; ~ CLI ;Enable interrupts 486 ; 487 ; XENDH 488 489 ; 490 ;S 491 ;8 END; ( « UPLINK LCAP MARKER •) 492 ;8 «3 ; 494 495 SEJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/8908:14:3 __»•«« R2 ADC INTERRUPT MODULE «»_«_•»•« File: ADC.ASH Page ===»====== SRevision: 3.0 S ============= 187 188 ADC Interrupt Macros 189 190 191 ;8*_ UPLINK HEAS VAL 192 ;8» 193 • a* This macro is used to uplink measured values. 194 195 ;a* ENTRY CONDITIONS: 196 ;8* The array neas_val has been- loaded with the appropriate 197 .3* data for uplink. The nurber of bytes for uplink is stored 198 ;B* in the x register. 199 • a* 200 ;8* EXIT CONDITIONS: 201 ;S* If the uplink channel is free it is captured and the data 202 ;3* in the meas_val buffer is uplinked. If the uplink channel 203 ;8* is busy with a RAH uplink the measured values are 204 ;a* discarded. Otherwise if the channel is busy the measured 205 • 9* values are flagged as pending and uplinked on the next 206 »*a* TELBF interrupt. 207 ;3* 208 ;S -_ 209 210 211 ,-a MACRO UPLINK_HEAS VAL(X); 212 ;8 BEGIN 213 ;S IF NOT(u Ink disabled of uplink flags) THEN 214 215 ;UPLINK HEAS VAL XHACRO 216 ;UHV START 217 ; ~ BRSET uplnk_disabled,uplink_flags,UHV_END 218 219 220 ;;2 BEGIN 221 ;;B IF NOT(u link_bsy of uplink_flags) THEH 222 223 ; 'Jump if uplink busy 224 BRSET uplink_bsy,uplink_ lags,UHV_SHV 225 226 227 ;;a BEGIN 228 ;;a {* Uplink channel free uplink measured value buffer *) 229 ;;3 uplink bsy of uplink flags := TRUE; 230 ;;a TELΛDHΪ := HIADDR(meas va OJ); 231 .- • a TELADLO := LOADDR(meas~val [0. ); 232 ;;a BYTCOUNT := x; 233 ;,*a ULID := meas id; 234 ;;a RAH uplink of TELSTAT := TRUE; 235 ;;a END; ~ 236 237 BSET uplink_bsy,uplink_ lags ;Set uplink busy 238 LDA #HIGH iϋeas_val ;Get buffer address HSB 239 STA TELADHI " ;Write DHA address register 240 241 LDA #LOU meas val ;Get buffer address LSB 242 STA TELADLO ~ ;etc. 243 STX BYTCOUNT ;Write byte count 244 LDA meas id ;Get ID 245 STA ULID * .-Write to hardware 246 BSET RAM uplink,TELSTAT ;Start uplink 247 BRA UMV~END ;Go exit 248 249 250 ;,-B ELSE (* HOT uplink bsy •) 251 ;;S BEGIN 252 ;;8 (* Set measured value uplink pending *) 253 ; ;8 meas_count := x; 254 ; ;B eas «d of upl ink f lags := TRUE; 255 ,* ,-a END; 256 ; ,-a END; 257 258 Avocet 6805 Assembler v2.20, #01002 Chip=146805 10/12/89 08:14:3 ======xx χ = R2 ADC INTERRUPT MODULE ===========«== File: ADC.ASH Page ========== SRevision: 3.0 S ============= 259 ;UHV_SHV 260 STX meas_coe_πt ;Save pending byte count 261 BSET n__ι_js-_,tjplink flags ;Show pending upling 262 BRA UHV_END Jlhats all folks 263 ;UHV_END 264 XENDH 265 266 END; (• UPLINK MEAS VAL * . 267 268 269 SEJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/9010:3 ========== R2 TELEHETRY HOOULE ===== File: TLH.ASH Pa ========== SRevision: 3.3 S ===== 378 Q ****************************** TLH **************************** ** ** * * 379 a* 380 a* R2, Pacemaker Model 8444 381 a* HOOULE: TLH 382 a* 383 a* The TLM module processes magnet mode operations while the reed 384 a* switch is closed. These include the handling of the telemetry 385 a* protocol, the TMT and lead test activation, the pulse pressure 386 a* calculation for loss of capture markers detection. The 387 a* telemetry protocol involves processing downlink and uplink 388 a* messages. Downlink messages are validated before being acted 389 a* upon. The uplink consists of confirmation and confirmation + 390 a* replies to downlink requests. 391 a* 392 a* Routines defined in this module include: 393 a* 394 a* Macros: 395 a* DO_MEMURlTE transfer downlink record to 396 a* memory 397 a* EXEC_SPEC_FUNC decode and execute special 398 a* function 399 a* EXEC_SPEC_REQ decode and execute special 400 a* requests 401 a* PROCESS_MEHU ITE transfer downlink record to 402 a* memory and evaluate it 403 a* PROCESS_HSG decode memory offsets 404 a* SWITCH_TO_NON_MAGHOOE restore non_ma net mode 405 a* operation 406 a* VA IDATE_MSG validate downlink message 407 a* 408 a* Procedures: 409 a* None. 410 a* 411 a* Drivers: 412 a* GNLSIHT PROC gain or loss interrupt handler 413 a* RDSWINT~PROC reed-switch interrupt handler 414 a* TELBFINT PROC telemetry buffer interrupt 415 a* handler 416 a* 417 a ****************************************************************** 418 419 420 DEFSEG TLH,CLASS=COOE 421 SEG TLM 422 423 SSETLN(HACROS.INC); XINCLUDE "MACROS.INC" Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/9010: ========== R2 TELEMETRY HOOULE ================== File: TLH.ASH P ========== SRevision: 3.3 $ ============= 424 425 SN0ALLPUBLIC 426 SSETLN(EQUATES.INC); XINCLUDE "EQUATES.INC" Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 10: ========== R2 TELEHETRY MODULE ================== File: TLH.ASH Pa ========== SRevision: 3.3 S ============= 1812 ********************************************************************** 1813 * Telemetry Subroutines * 1814 •a******************************************************************** 1815 1816 SEJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 10: ========== R2 TELEMETRY HOOULE ================== File: TLH.ASM Pa ========== SRevision: 3.3 S ============= 1817 1818 1819 1820 1821 1822 This procedure is the gain/loss interrupt handler and it is * 1823 non-preemptive. It is responsible for controlling the downlink * 1824 and disabling uplink. Whether the interrupt is do to a gain or a * 1825 loss of signal can be determined by reading a bit in the TELSTAT * 1826 register. At the beginning of a downlink all pending uplinks are * 1827 abandoned and the TELBF interrupt is masked out until the end of * 1828 downlink. In which case it is reenabled, after being first * 1829 cleared, in the case of downlink overrun. Downlink is then * 1830 disabled until just before the uplink response, either a status * 1831 uplink or a RAH uplink. * 1832 * 1833 ENTRY CONDITIONS: * 1834 No other interrupts are enabled at this point, ADC interrupts * 1835 are the only higher priority and they are ignored during * 1836 telemetry. * 1837 * 1838 EXIT CONDITIONS: * 1839 None. * 1840 * 1841 ******************************************************************* 1842 1843 1844 3PR0CEDURE GNLSINT- ROC; 1845 BBEGIH 1846 a 1847 (* Check if gain or toss of signal occurred. *) 1848 IF (downtnk_present of TELSTAT) THEN 1849 BEGIN 1850 (* Gain of downlink signal. Clear pending uplinks, disable 1851 uplink and TELBF interrupts, and clear any ADC and 1852 TELBFINT interrupts. 1853 uplink_flags := UPLNK GN_SET; 1854 IF (THT of mag_flagsrTHEN 1855 reset_THT of~mag_flags := TRUE; 1856 TELBFINT of ipgstate nsk := TRUE; 1857 IRQREG := TELBFINT HSK; 1858 ULID := 0; 1859 1860 (* If POS currently executing then postpone loss-o -signal 1861 processing until after POS is complete. 1862 IF ((sensed_evnt of exec_flags) 1863 OR (paced_evnt of exec_flags)) THEN 1864 GNLSINT of currentj-ri := TRUE; 1865 END; 1866 1867 1868 GNLSINT PROC 0000& 09 00* 1D 1869 BRCLR downlnk present,TELSTAT,GNLS LOSS 0003& A6 03 1870 LDA #UPLNK_GN_SET 0005& B700* 1871 STA uplink_flags ;Disable uplink 0007S 09 00* 02 1872 BRCLR THT,mag_flags,GNLS_NTHT 000A& 1A 00* 1873 BSET reset_THT,mag_flags ,'Reset THT if active 1874 GNLS NTHT 000CS 14 00* 1875 BSET TELBFINT,ipgstatejns- ;Mask TELBF interrupts 000E& AE 04 187. LDX #TELBFINT HSK 0010& BF 00* 18r STX IRQREG ;Clear TELBF interrupts 001254F 1878 CLRA 0013- B700* 1879 STA ULID ( •Clear ULID register 0015- B6 00* 1880 LDA exec flags ;Is POS currently executing? 0017i A4 03 1881 AND #<(1~SHL sensed evnt) (1 SHL paced_evnt)) 0019& 2702 1882 BEQ GNLS_NP0S ; No, then exit 001B& 12 00* 1883 BSET GNLSΪNT,current_pri ; Yes, postpone loss-o-signal 1884 ; until after POS Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 10: ========== R2 TELEMETRY HOOULE ================== File: TLH.ASH Pa ========== SRevision: 3.3 S ============= 1885 GNLS NPOS 001D& CC 0384& 1886 JHP GNLS DONE 1887 1888 ELSE IF (uplnk_disabled of uplink flags) THEN 1889 BEGIN 1890 (* If the uptnk_disabled bit was not set then a downlink 1891 overrun has occured (gain of signal was missed) and 1892 downlink should be ignored! I 1893 1894 IF (resetJTHT of mag flags) THEN 1895 CALL THT_RESET WITHIN R2LIB; 1896 1897 uptnk_stat := (uplnk_stat AND UPLNK_CLR_HSK); 1898 1899 IF (TELBFINT of IR Q REG) THEN 1900 BEGIN 1901 (* Downlink overflow - Flag error, uplink status, 1902 and clear TELBF interrupt *) 1903 IRQREG := TELBFIHTJ.SK; 1904 up stat_pnd of uplink_flags := TRUE; 1905 uplnk stat := uplnk stat OR DNLK OVF_ERR; 1906 END; 1907 1908 GNLS LOSS 0020& 00 00* 03 1909 BRSET uplnk disabled,uplink flags,GNLS LCONT 0023& CC 0384& 1910 JMP GNLS_DONE 1911 GNLS LCONT 0026S 08 00* 03 1912 BRCLR reset THT,mag_ lags,GNLS NTHTRST 0029& CD 0000* 1913 JSR THT_RESET ;Go abort~TMT sequence 1914 GNLS NTHTRST 002C& B600* 1915 LDA u lnk_stat 002E& A4 FO 1916 AND #UPLNK_CLR_HSK 0030& B700* 1917 STA up.lnk_stat ;Hask error bits in uplink status 0032& 05 00* OD 1918 BRCLR TELBFINT,IRQREG,GNLS NOVF ;Has downlink overflow occurred? 0035& AE 04 1919 LDX #TELBFINT HSK 0037& BF 00* 1920 STX IRQREG ;Clear TELBF interrupts 0039& 1600* 1921 BSET up stat_pnd,uplink flags ;Set status uplink pending 003B& AA 09 1922 ORA #0NLK_OVF_ERR 003D& B700* 1923 STA uplnk~stat ;Set and store Overflow error 003F& CC 0350S 1924 JHP GNLS UPLNK 1925 1926 ;a ELSE 1927 ;8 BEGIN 1928 ;3 (* No downlink overflow *) 1929 ;3 CALLM VALIDATE HSG; 1930 ,-a END; 1931 1932 GNLS NOVF 1933 ;VA IDATE_HSG 1934 1935 ( Request event time to be latched (write any value) 1936 NOTE: event time takes 0.244msec to be latched *) 1937 EVENTIHE := 0; 1938 1939 IF ((up_RAM_pnd of uplink_flags) 1940 OR Tintrrg_pnd of uplink flags)) THEN 1941 BEGIN 1942 (* Only allow RAH uplink if the pacing interval is above 1943 HIGH RATE, otherwise clear uplink status flag. 1944 IF (tiπieout int < HIGH RATE) THEN 1945 BEGIN 1946 up_RAH_pnd of uplink_ftags := FALSE; 1947 intrrgjsnd of uplink~flags := FALSE; 1948 up stat_pnd of uplink flags := TRUE; 1949 END;- 1950 ELSE 1951 up stat pnd of uplink flags := FALSE; 1952 END; Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 10: ========== R2 TELEMETRY HOOULE ================== File: TLH.ASH Pa ========== SRevision: 3.3 S ============= 1953 1954 GNLS JPLNK 0350& B700* 1955 STA EVENTIME ;Latch event time count 1956 GNLS UPEVNT 0352& B6 00* 1957 LDA uplink flags 0354& A4 14 1958 ANO #((1 SHL up_RΛM_pnd) + (1 SHL intrrg_pnd)) 0356& 2711 1959 BEQ GNLS_NRAMUP *-_mp if no RAH of interrogate uplink 0358& C60000* 1960 LDA timeout_int 035B& A1 23 1961 CHP #HIGH_RATE ;Is timeout less then upper rate limit? 035D4 24 08 1962 BHS GNLS_RTLO ; No, set uplink status flag false 035Fi 15 00* 1963 BCLR up_RAH_pnd,uplink_flags 0361& 19 00* 1964 BCLR intrrg_pnd,uplink_flags 0363& 1600* 1965 BSET up stat_pnd,uplink flags 0365& 20 02 1966 BRA GNLS_NRAMUP 1967 GNLS_RTLO 0367Ϊ 1700* 1968 BCLR up_stat_pnd,uplink_flags 1969 GNLS NRAHUP 1970 1971 ;3 (* If IPG in WT mode switch to WI mode until next event 1972 ;3 and scedule uplink if there is enough time. *) 1973 ,-a triggeredjnode of PACEM00E := FALSE; 1974 ;3 a := timeout int - EVENTIHE 1975 ,-a IF (((a > UPSTAT DELAY) AND (up stat_pnd of uplink_flags)) 1976 ,-a OR (a > UPLTNK_DELAY)) THEN 1977 ,-a CALL SCHEDULE UPLINK WITHIN R2LIB; 1978 ,-a ELSE 1979 ;3 uplnk cπfrm of tlm2 flags := TRUE; 1980 • a 1981 0369S 15 00* 1982 BCLR triggeredjnode,PACEMOOE ;Set in non-WT mode 036BS C6 0000* 1983 LDA timeout_int 036E& B0 00* 1984 SUB EVENTIHE ;Determine time remaining before next event 0370& A1 1E 1985 CHP #UPLINK DELAY ;Enough time for block uplink? 0372& 22 07 1986 BHI GNLS SU " ,- Yes, then schedule uplink 0374& 0700* 09 1987 BRCLR up_stat_pnd,uplink_flags,GNLSJ.UPLNK 0377& A1 03 1988 CHP #UPSTAT DELAY ;Enough time for status uplink? 0379& 23 05 1989 BLS GNLS_NUPLNK ; No, don't attempt uplink 1990 GNLS SU 037B& CD 0000* 1991 JSR SCHEDULE UPLINK 037EJ 20 02 1992 BRA GNLS_CTLBF 1993 GNLS NUPLNK 0.80& 18 00* 1994 BSET uplnk_cnfrm,tlm2_flags ;Indicate uplink to follow next event 1995 1996 pts and clear ADC interrupts 1997 k := FALSE; 1998 1999 2000 2001 2002 0382& 15 00* 2003 T,ipgstate nsk 2004 0384& A6 01 2005 HSK 0386& B700* 2006 ;Clear pending ADC interrupts 2007 0388& 81 2008 2009 2010 2011 2012 2013 -EJECT Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 10:3 ========== R2 TELEMETRY MODULE ================== File: TLH.ASM Pag ========== SRevision: 3.3 S ============= 2071 2072 2073 This procedure is the telemetry buffer interrupt handler. It is * 2074 non-preemptive. It is responsible for scheduling pending uplinks * 2075 (i.e. markers). If the last uplink was a RAH uplink, all pending * 2076 uplinks are cancelled. Otherwise, if there is either a pending * 2077 interrogate block or measured value, they are uplinked. * 2078 * 2079 ENTRY CONDITIONS: * 2080 No other interrupts are allowed during this routine, ADC must * 2081 be cleared if one occurred during uplink reschedule, and * 2082 processing of GAIN/LOSS must wait until after uplink TELBF * 2083 completes to insure that the uplink flags are not corrupted * 2084 * 2085 EXIT CONDITIONS: . * 2086 None. * 2087 * 2088 ******************************** 2089 2090 2091 ;aPROCEDURE TELBFINT PROC; 2092 ;3BEGIN 2093 ;3 2094 ;a (* If RAM uplink complete clear all pending uplinks *) 2095 ;3 IF (uplnk_disabled of uplink_flags) THEN 2096 ;3 uplink_flags := 0; 2097 2098 TELBFINT PROC 0423S 01 00* 05 2099 BRCLR uplnk_disabled,uplink_ lags,TLBF_UPLNK 042654F 2100 CLRA 04275 B700* 2101 STA uplϊnk_flags ;Clear all pending uplinks 042952068 2102 BRA TLBF DONE 2103 2104 ,-a ELSE 2105 ,-a BEGIN 2106 ;3 (* Previous uplink was not a RAH uplink, uplink pending *) 2107 ,-a IF ( rkr pnd of uplink flags) THEN 2108 ,-a BEGIN 2109 ;3 (* Harker from POS is pending *) 2110 ;3 mrkr_pnd of uplink flags := FALSE; 2111 ,-a TELADHI := HIADDR.marker val [0]); 2112 ;a TELADLO := LOADDR(marker~val [0]); 2113 ,-a BYTCOUNT := marker cnt; 2114 ,-a ULID := HARKER D;- 2115 ;3 RAM j link of TELSTAT := TRUE; 2116 ,-a END; 2117 ,*a 2118 2119 TLBF UPLNK 042B50D 00* 11 2120 BRCLR πrkr_pnd,upl nk_flags,TLBFJ.CAP 042E5 1D 00* 2121 BCLR mrkr_pnd,upIink_fIags 04305 A6 ..X 2122 LDA #HIGH marker_val ;Load register with hi address of marker val address 04325 B700* 2123 STA TELADHI 04345 A6 ..X 2124 LDA #LOW marker_val ;Load register with low address of marker va address 04365 B700* 2125 STA TELADLO 04385 CE 0000* 2126 LDX marker cnt ;Load x with byte count 043B5 A643 2127 LDA #MARKER_ID ;Load a with marker identification byte 043D52049 2128 BRA TLBF STRTU 2129 2130 ,-a ELSE IF (leap mrkr_pnd of uplink flags) THEN 2131 ,-a BEGIN 2132 ;3 (* Harker from loss of capture is pending *) 2133 ;3 lcap_mrkr_pnd of uptink_flags := FALSE; 2134 ,-a TELADHI t= HIΛDDRUcap marker); 2135 ;3 TELADLO := LOADDR(lcap " marker); 2136 ;3 BYTCOUNT := 1; Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 1 ========== R2 TELEMETRY HOOULE ===== File: TLM.ASH ========== SRevision: 3.3 S ===== 2137 ULID := MARKER ID; 2138 RAH uplink of TELSTAT := TRUE; 2139 END; " 2140 2141 2142 TLBF LCAP 043FS 0B 00* 10 2143 BRCLR lcapjnrkr_pnd,uplink_flags,TLBF_INTRRG 04425 18 00* 2144 BCLR lcap_mrkr_pnd,uplink_flags 04445 A6 ..X 2145 LDA #HIGH lcap_marker ;Load register with hi address of leap ma alue address 04465 B700* 2146 STA TELADHI 04485 A6 ..X 2147 LDA #LOW lcap narker ;Load register with low address byte of l rker value address 044AS B700* 2148 STA TELADLO 044CS AE 01 2149 LDX #1 :Load x with byte count 044E5 A643 2150 LDA #HARKER ID ;Load a with marker identification byte 04505 2036 2151 BRA TLBF STRTU 2152 2153 ,-a ELSE IF (intrrg_pnd of uplink flags) THEN 2154 ,-a BEGIN 2155 ,-a intrrg_pnd of uplink_flags := FALSE; 2156 ;3 statby. := uplnk stat; 2157 a CALLH LOAD_INTRRG_UPLINK WITHIN R2LIB; 2158 ;3 RAH plink of TELSTAT := TRUE; 2159 ,-a END; 2160 2161 TLBF INTRRG 045250900 20 2162 BRCLR intrrgjxid, upl ink_f lags, TLBF_HEAS 04555 19 00* 2163 BCLR intrrg_pnd,upl ink_f lags 04575 B6 00* 2164 LDA uplnk_stat 04595 C70000 2165 STA statbyt ;Update status byte 2166 TLBF LDIN 2167 ;LOAD_INTRRG_UPLINK 2168 TLBF LDIN END 04715 16 00* 2169 BSET RAM uplink,TELSTAT ,-Initiate uplink 0473520 1E 2170 BRA TLB? DONE 2171 2172 ;a ELSE IF (meas pnd of uplink flags) THEN 2173 ;3 BEGIN 2174 ;3 meas_pnd of uplink flags := FALSE; 2175 ,-a TELADHI := HIADDR( eas valCO]); 2176 ;3 TELADLO := LOADDR(meas~val [0] ); 2177 ;3 BYTCOUNT := meas_countJ 2178 ;a ULID := meas id; 2179 ,-a RAH uplink of TELSTAT := TRUE; 2180 ;3 END; ~ 2181 2182 TLBF HEAS 04755 OF 00* 18 2183 BRCLR meas_pnd,uplink_flags,TLBF_NUPLNK 04785 1F 00* 2184 BCLR easjpnd,uplink_flags 047A5 A6 ..X 2185 LDA #HIGH meas_val ;Load register with hi address of measure e address 047CS 8700* 2186 STA TELADHI 047E& A6 ..X 2187 LDA #LOW meas val ;Load register with low address byte of m d valυe address 04805 B700* 2188 STA TELADLO 04825 CE 0000* 2189 LDX meas_count ;Load x with byte count 04855 C60000* 2190 LDA meas id ;Load a with marker identification byte 2191 TLBF STRTU 0488& BF 00* 2192 STX BYTCOUNT ;Store byte count 048AS B700* 2193 STA ULID ;Store marker identification byte 048CS 16 00* 2194 BSET RAH uplink,TELSTAT ;Set the telemetry status byte and exit 0 8E520 03 2195 BRA TLB DONE 2196 2197 ;3 ELSE (* No pending uplinks *) 2198 ;3 uplink_flags := 0; 2199 ;3 END; 2200 ;3 (* Clear pending ADC interrupts *) Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/18/90 10 ========== R2 TELEMETRY MODULE ================== File: TLM.ASM P ========== SRevision: 3.3 S ============= 2201 ;3 IRQREG := ADCINT HSK; 2202 ;a 2203 ; 2204 TLBFJ.UPLNK 049054F 2205 CLRA 04915 B700* 2206 STA uplink flags /Clear uplink flags, no uplinks pending 2207 TLBF DONE 04935 A6 01 2208 " LDA #ADCINTJ.SK 04955 B7 00* 2209 STA IRQREG ~ ;Clear pending ADC interrupts 2210 TLBF END 0497581 2211 - RTS 2212 ; 2213 ;aEND; (* TELBFINT PROC *) 2214 ,-a 2215 ; 2216 END Avocet 6805 Assembler v2.20, #01002 Chip«146_05 1/08/90 11: ==<======- R2 LIBRARY HCOULE ======χ====χ=«==== File: R2LIB.ASM P ========== SRevision: 3.3 S «_« χ ==χ««χ*χ χ 120 LOAD INTRRG UPLINK 121 8* 122 8* This f-βero loads the telemetry registers in preparation for an * 123 8* Interrogate block uplink. * 124 8* • 125 8* ENTRY CONDITIONS: * 126 a* Uplink data registers are ready to be loaded without conflict. * 127 8* 128 8* EXIT CONDITIONS: 129 8* The interrogate block the size of INTRRG_SIZ and starting at * 130 3* the address pointed to by INTRRG_AD is setup for uplink. * 131 9* 132 8*' 133 134 135 MACRO LOAD INTRRG UPLINK; 136 BEGIN 137 138 (* Load interrogate status byte *) 139 intrrg_R2_stat := R2 _tat; 140 (• Uρlϊnk " channel assured free and uplnk disabled bit set *) 141 TELADHI := HIBYTEOHTRRG AD); 142 TELADLO := LOUSYTE(INTRRG AD); 143 BYTCOUNT := INTRRG SIZ; 144 ULID := RAHJD; 145 146 END; {* LOAD_INTRRG_UPL!NK *) 147 148 LOAD_INTRRG_UP INK XHACR0 149 LDA r2_stat ;Get r2 status byte 150 STA inϊrrg r2 stat ;ρut in interrogate status byte 151 LDA #HIGH INTRRG_AD ;Get address hi byte 152 STA TELADHI ~ ;Send it to the hardware 153 154 LDA #LCW INTRRG_AD ;Get acϋress lo byte 155 STA TELADLO ~ ;Send it to the hardware 156 157 LDA #INTRRG SIZ ;Get byte count 158 STA BYTCOUNT ;Write hardware register 159 LDA #RAH_ID ;Get ID 160 STA ULID ; etc. etc. etc. 161 XENDH 162 163 SEJECT -36- PCI7US91/00309 Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/08/90 11: ========== R2 LIBRARY MODULE ================== File: R2L1B.ASH ========== SRevision: 3.3 S ============= 164 2** * **** * * ** ******** - * « * LOAD p^ UPLINK * «• * • * •• ** •• ** ••• ** • * •• ** •« 165 8* 166 8* This necro loads the telemetry registers in preparation for a 167 8* RAH block uplink. 168 8* 169 3* ENTRY CONDITIONS: 170 8* Uplink data registers are ready to be loaded without conflict. 171 8* 172 8* EXIT CONDITIONS: 173 8* A RAM block of length indicated by P -d_bytes start ing at the 174 8* address indicated by P _ start is setup for uplink. 175 8* 176 a ** .. *** .* ********** * *** * ******* * ****** * ** * *** * ***** . ************** . 177 178 179 MACRO LOAD RAM UPLINK; 180 BEGIN 181 182 (* Uplink channel assumed free and uplnk disabled bit set *) 183 intrrg R2 stat := R2 stat; 184 TELADHI := " HIBYTE(P_rd_start); 185 TELADLO := LOUBYTE(P rd start); 186 BYTCOUNT := P -d bytes;- 187 ULID := RAJ. ID; ~ 188 189 END; (* LOAD RAH UPLINK *) 190 191 LOAD_RAH_UPLINK XXACRO 192 LDA r2 _tat ;Get r2 status byte 193 STA intrrg -2 stat ;put in interrogate status byte 194 LDA P _ start ;Get address hi byte 195 STA TELADHI ;Send it to the hardware 196 197 198 ;Send it to the hardware 199 200 ;Get byte count 201 ;Write hardware register 202 ;Get ID 203 ; etc. etc. etc. 204 205 206 207 SRESETLN 239 240 SNOALLPUBLIC 241 SNOLIST ;Don't List the equate file -37- Avocet 6805 Assembler v2.20, #01002 Chip=146805 1/08/90 =========_ R2 LIBRARY HOOULE ================== File: R2LIB.ASH ========== SRevision: 3.3 J xr=x========= 1106 B* « SCHEDULE UPLINK 1107 8* 1108 8* Thi-B procedure schedules uplink of RAM, interrogate block, or 1109 8* status in this order of priority. 1110 8* 1111 8* ENTRY CONDITIONS: 1112 8* No other interrupts are allowed during this routine, ADC 1113 8* interrupts must be cleared if one occurred during uplink 1114 8* scheduling. Processing of the GAIN/LOSS and TLBF interrupts 1115 8* wait until after uplink is scheduled to ensure that the 1116 8* uplink flags are not corrupted. 1117 8* 1118 8* EXIT CONDITIONS: 1119 8* Either a RAH block, an Interrogate block, or a status 1120 8* confirmation block are uplinked if any are pending. 1121 3* Status is iirbedded in a RAM or Interrogate block uplink. 1122 8* 1123 a * . 1124 1125 1126 ;3 PROCEDURE SCHEDULE UPLINK; 1127 ;3 BEGIN 1128 ;3 1129 ;3 (* Load status byte for RAM uplink and the load telemetry 1130 ;8 registers for uplink. *) 1131 ;8 IF (up RAHjsnd-of uplink flags) THEH 1132 ;S BEGIN 1133 ;8 (* Load for Ram uplink *) 1134 ;3 CALLM LOAD RAH JPLIHK; 1135 ;3 up RAHjsrefof tjpl ink f lags := FALSE; 1136 ;8 END; " 1137 1138 SCHEDULE UPLINK 1139 ;Juτp i f HOT RAH upl ink 018O50500* 10 1140 BRCLR up_RAH J_nd, upl ink_f lags, SUP_IHTRRG 1141 SU LRU 1142 ;LO-__RAM_UP IHK 0183S B600* 1143 LDA ~ ~r2_stat ;Get r2 status byte 01855 C70000* 1144 STA intrrg *2jstat ;put in interrogate status byte 01885 C60000* 1145 LDA P rd scart ;Get address hi byte 018B5 B700* 1146 STA TELADHI ,'Send it to the hardware 1147 01805 C6 X 1148 LDA P_rd_start +1 ;Get address lo byte 01905 B700* 1149 STA TELADLO ;Send it to the hardware 1150 01925 C60000* 1151 LDA P_rd bytes ;Get byte count 01955 B700* 1152 STA BYTCOUNT ;Write hardware register 0197t A6 CO 1153 LDA #RAH_ID ;Get ID 01995 B700* 1154 STA ULID- ; etc. etc. etc. 1155 SU LRU END 019B51500* 1156 BCLR up_RAHjy)d,upli k flags ;Clear the pending flag 01905 CC 01DU 1157 JHP SUP_STRT ;Go start uplink 1158 1159 1160 ;3 ELSE IF (intrrg_pnd of uplink flags) THEH 1161 ;S BEGIN 1162 ;3 (* Load for interrogate block uplink *) 1163 ;3 CALLM LOAD_INTRRG_UPLINK WITHIN R2LIB; 1164 ;8 intrrg xefof uplink flags :* FALSE; 1165 ;8 END; 1166 1167 SUPJHTRRG 1168 ;Jurrp i f NOT interrogate 01A050900* 1A 1169 BRCLR intrrg nd, upl ink_f lags, SUP_STAT 1170 SU LIU 1171 ;LOAD_INTRRG_UPLINK 01A35 B600* 1172 LDA ~ r2 _tat ;Get r2 status byte 01A55 C70000* 1173 STA intrrg "2_ιtat ;put in interrogate status byte -38- Avocet 6805 Assembler v2.20, #01002 C ip=146805 1/08/90 »======== R2 LIBRARY HOOULE ==== χχ =χ========= File: R2LIB.ASM =_==__===_ SRevision: 3.3 S ======== χ = χ == -39- Avocet 6805 Assembler v2.20, #01002 Chip=14__05 1/08/90 «<_----<=- R2 LIBRARY HOOULE χ ========== χχχ = χχχ File: R2LIB.ASM ========== SRevision: 3.3 _ ============= 1241 3** SET TLH TYPE 1242 8* 1243 8* This procedure decodes the telemetry type in P_tlm_type and 1244 8* sets up the hardware and marker channel accordingly. 1245 8* 1246 8* ENTRY COND. : 1247 8* P_tl_ι__typ- contains the desired telemetry. 1248 8* 1249 8* EXIT COND. : 1250 8* The analog uplink telemetry is updated en the next frame. 1251 3* Curr tln_type is written to PACESTAT and may not equal 1252 8* P_tlm_type. 1253 3* a - contains the current value of the TELSTAT register. 1254 3* 1255 3** 1256 1257 1258 ;a PROCEDURE SET TLH TYPE; 1259 ;a BEGIN 1260 ;3 1261 • a (* test for markers uplink selected *) 1262 a IF (mβrker_enabled of P tlm_type := TRUE) THEH 1263 ; β -__rker_active of mag flags := TRUE; 1264 • a ELSE 1265 ,-a mβrker_aetive of mag flags := FALSE; 1266 ;s 1267 1268 SET TLH TYPE 01DE5 C60000* 1269 LISA P_tlm_type ;Juφ if idle markers set 01E15 A4 01 1270 AND #?1 SHL marker enabled) 01E35 2704 1271 BEQ STT CLR 01E5Ϊ 1E 00* 1272 BSET markers_active,mag_flags ;Show idle markers 01E75 20 02 1273 BRA STT_ADJ ;Go~edjust telem type 1274 STT ICLR 01E91 1F 00* 1275 BCLR markers_active,mag_flβgs 1276 1277 1278 ;a (• adjust the telemetry type *) 1279 a curr tlm type := (P_tlm_type AND TLH TYPE HSK) OR IDLE UPLINK; 1280 ;a TELSTAT 7= (TELSTAT AND TELSTAT_HSK) " OR cϋrr_tlm_type; 1281 • a 1282 1283 STT ADJ 01EB5 C60000* 1284 ;Get telemetry type 01EE5 A4 C6 1285 ;lsolate real time uplink type 01F05 AA 01 12B6 ;Set uplink idle bit and save as current ty 01F25 B700* 1287 01F45 B600* 1288 ;Get current value of TELSTAT 01F64 A438 1289 ; and mask changeable bits 01F85 BA 00* 1290 ;Set new uplink type 01FA5 B700* 1291 ;Write new TELSTAT and return 1292 STT END 01FC5 81 1293 RTS 1294 1295 ;3 END; (* SET_TLM_TYPE *) 1296 1297 1298 sεjECT

Claims: HAT IS CLAIMED IS: 1 1. A method for transmitting data percutaneously 2 between a medical device implanted within a human body 3 and an external device, comprising the steps of: 4 ' (a) formatting the data to be transmitted by: 5 (1) establishing a frame having a fixed time g interval; η (2) placing a unique synchronizing signal at a 8 first fixed range within said frame; 9 * (3) placing a frame identifier at a second Q fixed range within said frame; and (4) placing said data at a third fixed range -,2 within said frame; and •, ( b ) transmitting said formatted data between said 4 implanted medical device and said external 5 device. 1 2. A method according to claim 1, wherein said 2 data is representative of more than one type of data, and 3 wherein said frame identifier is indicative of the data 4 type within said frame being transmitted. 1 3. A method according to claim 2, wherein said 2 data is in digital format. 1 4. A method according to claim 3, wherein each of 2 said steps (a)(2), (a)(3) and (a)(4) thereof further 3 comprises generating a burst of radio frequency energy at 4 a time within the corresponding fixed range appropriate 5 to pulse position modulate said burst. 2 5. An apparatus for transmitting data 2 percutaneously between an implantable medical device and 3 an external device, comprising: 4 (a) frame defining means for defining a 5 transmission frame of a fixed time interval; (b) first means coupled to said frame defining means for transmitting a synchronizing signal within a first time range of said transmission frame; (c) second means coupled to said frame defining means for transmitting a frame identifier within a second time range of said transmission frame; and (d) third means coupled to said frame defining means for transmitting said data within a third time range of said transmission frame.

Inventors: NICHOLS LUCY M, ROLINE GLENN M, THOMPSON DAVID L, WYBORNY PAUL B, NICHOLS, LUCY, M., ROLINE, GLENN, M., THOMPSON, DAVID, L., WYBORNY, PAUL, B.
Applicants: MEDTRONIC INC, MEDTRONIC, INC.
Application year: 1991
Main classification: G08C15
IPC codes: A61B5, A61N1