Active matrix liquid crystal display systems and methods of operating such systems

Abstract: An active matrix liquid crystal video display system comprises a display panel (10) having a row and column matrix array of liquid crystal picture elements (12) with respective controlling switching devices (11) for displaying video information such as TV pictures, and a drive circuit for driving the picture elements to which a video, e.g. TV, signal of given field frequency is supplied (25). In order to reduce the response time of the picture elements, the display panel is driven at a field rate higher than that of the supplied video signal. To this end, the drive circuit includes a field rate conversion circuit (28,30,31,32) comprising field stores.

Description: This invention relates to active matrix liquid crystal display systems, particularly video display systems, for example, for displaying TV pictures, and to methods of operating such systems. The invention concerns active matrix liquid crystal display systems of the kind comprising a display panel having a row and column array of liquid crystal picture elements each of which is controlled by an associated switching device, input means for receiving a video signal, and drive means for driving the picture elements in accordance with the video signal, the picture elements being driven a row at a time by scanning the rows in sequence during each successive field period. Liquid crystal video display systems for displaying TV pictures and the like are well known. Larger area displays commonly include an active switching device associated with each picture element in order to obtain sufficient display quality. These switching devices typically consist of TFTs or two-terminal non-linear devices such as diode or MIM elements. In the case of a simple and typical TFT addressed display system for example, a picture element electrode is connected to the drain of an associated TFT. The gates of the TFTs of all picture elements in the same row are connected to a common row, scanning, address conductor and the source of the TFTs of all picture elements in the same column are connected to a common column address conductor to which video information, data, signals are supplied. The picture elements are driven one row at a time in sequence by scanning the row conductors with gating signals. Video information signals, derived by sampling the video signal, for example TV signal, and determining the display output to be obtained from the row of picture elements, are applied to the column conductors and transferred to the corresponding picture element electrodes upon the TFTs being gated. After all rows have been driven, the operation is repeated with each row being addressed in successive field periods. The scanning, and hence field, frequency is determined by timing signals in the input video signal and the field rate of the display panel corresponds to that of the supplied video signal. In the case of a PAL TV display, for example, each line period, during which, or in the interval between successive line periods, a row of picture elements is addressed, is 64 microseconds and a field has a duration of 20 milliseconds. The length of a picture element charging (row address) period is determined by the video standard which, in the case of PAL, gives a maximum time of one TV line, i.e. 64 milliseconds for half resolution displays. This in turn determines the switching device's current which should be large enough to charge the picture element capacitance to that of the sampled video voltage in the charging period. During the remainder of the field period (20 ms for PAL) the switching device is off, effectively isolating the picture element, so that the charge is stored on the picture element and the display effect produced by the picture element maintained until the element is next addressed in the subsequent field period, although some decay is likely due to the non-perfect characteristics of the liquid crystal material. TV displays set demanding requirements as regards the ability to provide grey scales, full colour, good uniformity, high contrast and brightness, and a rapid response speed. The use of active matrix addressing, using for example TFTs, and twisted nematic liquid crystal materials have enabled many of these requirements to be satisfied to an extent. An important consideration for video applications is the speed of response of the picture elements to a change in data signal voltage. When the voltage across a picture element is changed to produce a different display effect (grey level) there is a finite time delay before the picture element settles down to the new display output level. For acceptable viewing, the display system should be capable of providing good display quality for rapidly moving images as found in TV or computer generated graphics. If the response speed of the picture elements is too slow, smearing of moving images occurs. This tends to be particularly noticeable for bright objects moving against a dark background. As a first order estimate the response time of the display should ideally be such that about 90% of any change in brightness takes place within one field period (i.e. about 20ms) if no obvious movement artifacts are to occur. Unlike CRTs in which brightness changes are rapid and the delay time of the phosphors is typically much shorter than 20ms so that no smearing effects are observed, known liquid crystal display systems respond to changes in applied video voltage much slower and changes in brightness of the output from a picture element commonly takes place continuously over a time greater than a field period so that smearing can occur. Improvements in twisted nematic liquid crystal materials and the use of thinner layers of material at the picture elements have helped to reduce this response time so that reasonable dynamic performance for TV applications and the like can be achieved. However, further improvement in this respect is considered necessary. It is an object of the present invention to provide a matrix liquid crystal display system, and a method of operating a matrix liquid crystal display device, through which an improvement in response speed is obtained. According to one aspect of the present invention there is provided a method of reducing picture element response time of an active matrix liquid crystal display system comprising a liquid crystal display panel having a row and column array of picture elements each associated with an active switching device, and drive means for driving the rows of picture elements in sequence according to a video signal of a given field rate supplied to the drive means by scanning the rows of the array in succession and supplying sampled fields of the video signal to the columns of the array, which is characterised in that the picture elements of the panel are driven at a field rate higher than that of the video signal supplied to the drive means with fields of the supplied video signal being loaded into field store means of the drive means whose contents are read out at a rate faster than that of loading for use in driving the picture elements. According to another aspect of the present invention an active matrix liquid crystal video display system comprising a display panel having a row and column array of liquid crystal picture elements each associated with a switching device, input means for receiving a video signal of a given field frequency and drive means for driving the picture elements a row at a time according to the input video signal by scanning the rows of the array in succession and supplying sampled fields of the video signal to the columns of the array, is characterised in that the drive means is operable to reduce picture element response time by driving the array of picture elements at a field rate greater than that of the input video signal and includes field store means into which picture information of an input video signal field is loaded and whose contents are arranged to be read out at a rate faster than that of loading for driving the picture elements according to the picture information of a stored field. Surprisingly, it has been found that the time taken for the transmission of a liquid crystal picture element to stabilise after a change in the drive (video) level can be reduced by increasing the field rate. When considering the response of the picture element transmission to changes of drive level from 90% transmission to 10% transmission and back, driven at the normal (standard) field time of 20ms it typically takes several fields for the transmission to settle to its new level. Upon reducing the field time, however, the picture element achieves the new level in a significantly shorter time. Thus the response time of the picture elements to changes in drive level can be reduced simply be increasing the field rate at which the elements are operated. The following is a likely explanation of the reason for this effect. There is a delay in the transmission change following an alteration in drive level because the molecules of the liquid crystal take a finite time to move to their new position. In addition, the dielectric constant and therefore the picture element capacitance depends upon the drive level but also takes a finite time to change following a change in drive level. When the picture element is addressed with the new drive level, the transmission starts to change. At the same time the picture element capacitance changes, and this in turn affects the picture element voltage. This change in picture element voltage slows down the rate of change in transmission. At the end of the field period, the picture element voltage differs from its original value and is restored by readdressing and this restores the rate of change in transmission to a higher value. Thus, if the picture element is readdressed at a higher field rate, the transmission settles down more quickly. There is described in US-A-4845473 a method of reducing flicker in the display from a TFT type liquid crystal display device in which the array of picture elements is addressed in an unconventional manner which involves splitting the array into two portions and applying a gating signal to successive rows of picture elements in each portion alternately. The width of each gating signal is one half that of a conventional gating signal so that each successive pair of gating signals, one to each portion, occupies a standard row scan period. Real time video signals are applied to picture elements in one portion in synchronism with the gating signals supplied to that portion while video signals from a memory store are applied to picture elements in the other portion in synchronism with the gating signals supplied to the other portion. Thereafter, as scanning continues, picture elements in the one portion and the other portion respectively receive stored and real time video signals, and so on. Consequently, picture elements in each of the two display portions receive both real time and stored video signals once in every normal field period whereby display flicker is reduced compared with conventionally driven display devices. In effect, the field frequency of the voltage applied to liquid crystal picture elements is raised. However, there is no suggestion in this disclosure that the response time of the picture elements might be affected in any way. It is to be noted also with the disclosed drive scheme that successively addressed rows of picture elements, one in each display portion, lie in opposite halves of the display rather than being physically adjacent, and that this requires complicated interconnection between the array and a row drive circuit. In EP-A-0254805, there is described a method of driving a liquid crystal display device whose picture elements have just two possible gradations, or states, and are driven using binary signals. In order to provide an apparent, multi-gradation display output from the array of picture elements, the picture element display signals are converted into sequences of binary signals according to their values and these sequences are applied to the picture elements in a series of successive fields occupying a normal frame period which, by virtue of a viewer's persistence of vision, can be interpreted as a multi-gradation display output. In this way an N gradation level output can be obtained over N-1 fields. However, in each individual field the picture elements are not supplied with the complete picture information according to the video signal but with binary signals which form only part of the picture information. As a consequence, no improvement in response time of the picture elements could be expected. In practising the present invention further components are necessary in the drive means of the display system compared with conventional display systems in order to perform the driving of the picture elements of the display panel at a higher field rate. However, for the benefits to be obtained, particularly with systems providing large area displays, either direct or through projection or intended for HDTV display, the additional cost and complexity necessary is easily justified. To retain compatibility with the video signal, the increased field rate at which the picture elements are driven is an integral multiple of the field rate of the input video signal. Preferably, the field rate of the picture elements is chosen to be two to four times the field rate of the supplied video signal. For example, in the case of the input signal comprising a PAL or NTSC TV broadcast signal whose field rates are 50Hz and 60Hz respectively, the field rate for the display panel may be increased to 100Hz and 120Hz respectively. An active matrix liquid crystal video display system, and a method for its operation, in accordance with the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:- Figure 1 is a schematic circuit diagram of an embodiment of active matrix addressed liquid crystal display according to the invention; Figures 2 to 5 illustrate graphically the transmission/time characteristics of various liquid crystal test cells using different types of twisted nematic LC material; and Figure 6 is a graph illustrating the relationship between the transmission characteristic against time of one of the test cells and the voltage across the cell against time during driving. Referring to Figure 1, the display system, which is intended for displaying video, for example TV, pictures, comprises an active matrix addressed liquid crystal display panel 10 having a row and column array of picture elements which consists of m rows (1 to m) with n horizontally arranged picture elements 12 (1 to n) in each row. Only a few of the picture elements are shown for simplicity. In practice, the total number of picture elements (mxn) in the matrix array may be several hundreds of thousands. The display panel 10 is of generally conventional form. Each picture element 12 is associated with a respective switching device in the form of a thin film transistor, TFT, 11 and is located adjacent the intersection of sets of row and column address conductors 14 and 16 with the boundaries of the picture elements being determined by the spacing between adjacent pairs of the row and column conductors. The gate terminals of all TFTs 11 associated with picture elements in the same row are connected to a common row conductor 14 to which, in operation, switching (gating) signals are supplied. Likewise, the source terminals associated with all picture elements in the same column are connected to a common column conductor 16 to which data (video information) signals are applied. The drain terminals of the TFTs are each connected to a respective transparent picture element electrode 18 forming part of, and defining, picture element. The row and column conductors 14 and 16, TFTs 11 and electrodes 18 are all carried on a transparent plate, for example of glass. Parallel to and spaced from this plate is a further transparent plate on which is formed a continuous transparent conductive layer constituting an electrode common to all the picture elements of the panel. Twisted nematic liquid crystal material is disposed between the two plates, the two plates being suitably sealed around their periphery. The opposing plates are provided with polariser layers in conventional manner. In operation, the display panel is illuminated by a light source disposed on one side and light entering the panel is duly modulated according to the transmission characteristics of the picture elements 12. The liquid crystal material modulates light transmitted through the picture elements according to the voltage applied thereacross, with each picture element, defined by the electrode 18 on one plate, an opposing portion of the common electrode on the other plate and the liquid crystal material therebetween, being operable to vary light transmission through the panel in accordance with a drive voltage applied across its respective electrodes. Following standard practice the device is driven on a row at a time basis by scanning the row conductors 14 sequentially with a gating (selection) signal so as to turn on each row of TFTs in turn and applying data, i.e. picture information, signals to the column conductors for each row of picture display elements in turn as appropriate and in synchronism with the gating signals so as to build up a complete display picture. For example, in the case of a TV display, each row of picture elements is provided with picture information signals corresponding to a TV line. Using one row at a time addressing all TFTs 11 of the addressed row are switched on for a period determined by the duration of the gating signal during which the video information signals are transferred from the column conductors 16 to the picture elements 12. Following row addressing and termination of the gating signal, the TFTs 11 of the row are turned off thereby isolating the picture elements from the conductors 16 and ensuring the applied charge is stored on the picture elements. The picture elements stay in the state into which they were driven until the next time they are addressed. The row conductors 14 are supplied successively with gating signals by a row driver circuit 20 comprising a digital shift register controlled by regular timing pulses from a timing and control circuit 21 to which a synchronisation signal is applied from a synchronisation seperator 26. In the intervals between gating signals the row conductors are supplied with a substantially constant reference potential by the drive circuit 20. Video data, picture information, signals are supplied to the column conductors 16 from a column driver circuit 22 comprising one or more shift register/sample and hold circuits. The circuit 22 is supplied with video data signals from a video processing circuit 24 and derived from a video (TV) signal containing picture and timing information and having a given field rate which is supplied to an input 25. Timing signals derived from synchronisation signals obtained in the synchronisation separator 26 from the timing information of the input video signal are supplied to the circuit 22 by the timing and control circuit 21 in synchronism with row scanning to provide serial to parallel conversion appropriate to the row at a time addressing of the panel 10. The circuits 20, 22, 24 and 26 are of generally conventional form and as such will not be described here in detail. A very basic form of column driver circuit 22 is shown schematically in Figure 1 for simplicity and it should be understood that other types of circuit may be employed as will be apparent to persons skilled in the art. To avoid electrochemical degradation of the LC material, the polarity of the drive signals applied to the picture elements is periodically inverted, in accordance with known practice, although the means by which this is achieved is not shown in Figure 1 for simplicity. This polarity inversion can take place after every complete field of the display panel. In a conventional TV display system, successive gating signals from the row driver circuit 20 are applied to the row conductors in synchronism with TV lines with each gating signal having a duration corresponding to a TV line period, T1, or less. After a gating signal has been applied to a row conductor, the TFTs of that row are turned off for the remainder of the TV field time Tf, Tf being approximately equal to m.T1. In the case of a half resolution PAL standard TV display for example, having a TV line period of 64 microseconds and each row conductor is applied with a gating signal at intervals of 20 milliseconds, corresponding to the TV field period. In the display system of Figure 1 however, and in accordance with the present invention, the display panel is driven at a field rate which is greater than the field rate of the input video, TV, signal. This leads to improvement in response time over conventionally-driven display systems. More particularly, the transmission response time of the picture elements, that is, the time taken for the transmission of a picture element to stabilise after a change in the applied drive level, is reduced by increasing the field rate so that the elements are driven more rapidly. The picture elements of the display panel 10 of the system embodiment of Figure 1 are driven at a field rate which is twice that of the standard TV signal supplied. For a PAL TV display signal having a field time of 20 milliseconds and a 50 Hz field rate this means that the field time of the display panel is reduced to 10 milliseconds with the field rate in effect being converted to 100Hz. To this end, and referring to Figure 1, the video signals from the input 25 are fed via an analogue to digital converter 27 and a change-over switch 28 into one of two digital field stores 30 and 31 which holds the digitised video signals for a complete TV field. The change-over switch 28 is operated, under the control of the circuit 21, such that alternate TV field signals are stored in the stores 30 and 31 respectively. While one store, e.g. 30, is being loaded the contents of the other store, 31, are read out and supplied via a change-over switch 32, also controlled by the circuit 21, and a digital to analogue converter 33 to the video processing circuit 24. The stored signals in one store are read out line by line to the circuit 24, each read-out taking half a TV line period. After one field has been read out the process is repeated so that the two successive, and identical, field read-outs from a store occupy one standard TV field period. After the two read-outs, the change-over switches 28 and 32 are operated so that the next TV field signals are read out to the circuit 24 from the other store, again twice in succession in identical manner, while the next TV field is being loaded into the first store. This operation is repeated continuously. Figures 2 to 5 illustrate graphically the effect of changing the display field rate, and more precisely the relationship between transmission and time of an individual picture element for different field rates. Because it is difficult to study the behaviour of a typical picture element of the display panel 10 in situ, large-scale picture elements, approximately 50mm square driven by an FET to simulate the matrix drive device were fabricated for the purpose of making the measurements depicted in these figures. The measurements were made under simulated TFT drive with two different amplitudes for the source waveform being set up. The FET input amplitude is switched between the two levels using a gate waveform derived by dividing the source waveform so as to provide synchronism. The transmission of the picture elements is measured using a light source and photodiode. The measurements shown in the Figures 2 to 5 are for the case in which switching of the picture elements is between 90% transmission and 10% transmission and back. This switching is effected after every eight field periods. Figures 2 and 3 show respectively the transmission, Tr, against time, t, characteristic for light-to-dark and dark-to-light transitions in the case of picture element, or cell, A using a commercially available twisted nematic liquid crystal material and polyimide alignment layers. Figures 4 and 5 show respectively the transmission, Tr, against time, t, characteristic for light-to-dark and dark-to-light transitions in the case of cell B which uses a different commercially available TN LC material and the same polyimide, alignment layers. Measurements of transmission against time were taken using three different field rates, namely 25Hz, 50Hz and 100Hz corresponding to field times, 40ms, 20ms, and 10ms respectively, and the measured results for each field rate are shown in the graphs, and identified by the labelling accordingly. In both cases, the light to dark response is found to be faster than the dark to light. The LC material of cell B has a higher resistivity than that of cell A. Even so, the response time of the cell with the former material is found to be much the same as the latter. Taken at a temperature of 22 degrees centigrade, and for a field rate of 50Hz, the response times of cell A are 35ms for light to dark and 45ms for dark to light transition and the response times of cell B are 30ms for light to dark and 44ms for dark to light. In each graphical illustration, the cells A and B are switched at t equal to 40ms. As mentioned before, the cells are switched to the different state after eight successive field periods. Thus, referring to Figure 2 for example, the cell A driven at a field rate of 100Hz is switched again from dark to light after 80ms (eight times 10ms), namely at t equal to 120ms. The time scale in the graphs is too short to illustrate the next change in the case of 25Hz driving. As can be seen particularly for the lower field rates, 25Hz and 50Hz, a ripple effect is produced. Considering for example cell A, light to dark, driven at 25Hz as depicted in Figure 2, transmission falls fairly sharply after initially switched at t equal to 40ms but after approximately 20ms actually starts to rise again until the cell is next addressed at t equal to 80ms when it again falls sharply. This pattern is repeated until after several field periods the transmission is almost stable at 10%. The three field rates at which the cells are addressed confirm that the response time of the cells is influenced by the field rate. The results are summarised in the following table, Field Time drive level time 90% 10% light to dark dark to light cell A 10ms 1.99V 3.01V 18ms 38ms 20ms 2.06V 3.08V 35ms 45ms 40ms 2.17V 3.18V 62ms 81ms cell B 10ms 3.91V 5.52V 20ms 36ms 20ms 3.91V 5.52V 30ms 44ms 40ms 3.91V 5.52V 47ms 80ms It can be seen from this table that the response time increases with increasing field time, especially for dark-to-light transition. When driven with a field period of 20ms, the cells A and B take several fields for the transition to settle to its new level. However, when the cells are driven with a reduced field time of 10ms, they settle down more quickly to the new level. The behaviour of the transmission as it changes and finally settles down following an alteration in the drive level is affected by the voltage decay in the cell and the delay in the voltage-dependent change in the dielectric constant of the LC material. The transmission curve, with active drive, depends upon the field rate. Generally, the values of the threshold and saturation voltages in the transmission curve increase with the increased field times. This is because leakage causes the RMS voltage across the cell to be less than the drive voltage. The longer the field time, the more the transmission curve departs from the direct drive case. This leakage can cause ripple at the field rate on the light transmitted by the liquid crystal cell. During the field time the actual voltage on the cell decays due to leakage. Immediately after the cell is addressed with a voltage level appropriate for 10% transmission , the transmission starts to fall at a rate dictated by the time taken for the LC molecules to realign themselves. In the meantime, the voltage across the cell is falling, due to leakage, and eventually a stage is reached where the voltage across the cell has decayed to the extent that the transmission is too low for the instantaneous applied voltage and the transmission rises again until the end of the field period when the voltage is refreshed and the process starts once more. Considering, for example, Cell B, the decay time constant is in excess of 10 seconds so voltage decay has little effect on the shape of the response curve during transitions. The main effect here is due to the delay in dielectric constant change. Because the molecules take a finite time to realign themselves after a change in the drive level, (e.g. dark to light) the change in dielectric constant is also delayed. Examination of Figures 4 and 5 shows that there is virtually no ripple on the transmission curve after the effects of a drive level change have gone. However, immediately after a drive level change, while the transmission is changing to its new value, there is a ripple at field rate. Figures 4 and 5 also show that the curves for the three field rates follow one another for the first 10ms after the drive level is switched. The 20ms and 40ms field time curves then remain together until 20ms has elapsed. The process can be examined in more detail in Figure 6 which shows the transmission, Tr, and cell voltage, V, in the 50ms following a light-to-dark transmission for 10ms and 20ms field times. Immediately after the drive level increase, the molecules start to realign themselves in the increased electric field. This causes the transmission to fall and the dielectric constant to increase. The increase in dielectric constant, and hence cell capacitance, causes a corresponding decrease in cell voltage, from its initial value of about 6.2 Volts, since with very little leakage the total charge on the cell remains virtually unchanged. For the first 10ms the voltage decay and the fall in transmission for both field rates is the same. During the second 10ms, the voltage and transmission for the 20ms field rate continues smoothly. In the case of the 10ms field time, the cell is readdressed after 10ms and the voltage is increased to its initial value of 6.2 volts but negatively this time in accordance with a conventional field inversion drive scheme to avoid degradation of the LC material. This restoration of the cell voltage results in an increase in the change in transmission and the curve for the 10ms field rate starts to fall more rapidly. After 20ms has elapsed readdressing takes place for the 20ms field time case. In the same way the voltage across the cell increases and there is a discontinuity in the transmission curve. The important point is that the more rapid addressing of the cell at the higher field rates causes the cell to reach its equilibrium value more quickly, i.e. the response time is decreased. The results demonstrate that the response time is a function of the time taken for the molecules to align themselves after a change in the drive level of the cell and show that by increasing the field rate, and therefore driving the cell more rapidly, the response time is reduced. The reduction in response time of liquid crystal picture elements by increasing the field rate at which they are driven results in improved image quality. This improvement is embodied in the (PAL) TV display system of figure 1 in which the picture elements are driven at a 100Hz field rate rather than a 50Hz field rate, corresponding to the TV signal field rate, as with standard practice. The reduction in response time is an important factor for high quality displays when using the display panel as part of a projection television system for large picture sizes and particularly for high definition television. The polarity of the picture element driven voltages may be reversed after every two display fields rather than after every successive display field. Although in the above-described embodiment the display field rate is twice that of the input video signal, the display field rate may be an integral multiple of the input video greater than two. Preferably the integral multiple is between 2 to 4. To accomplish this, the contents of the field store are read-out the appropriate number of times in each video signal field period. In an alternative embodiment, the LC display panel may be of the active matrix type employing two terminal non-linear devices, such as diode elements or MIMs, as active elements for the picture elements rather than TFTs. It is envisaged that approaches other than that described with reference to Figure 1 involving two field stores may be employed to enable the display panel to be driven at a field rate higher than that of the incoming video signal. Various techniques known in CRT display technology enabling CRTs to provide a display at, for example, double the field rate of the supplied video signal, e.g. at 100Hz for a 50Hz PAL standard TV signal, could be adapted for use in the active matrix liquid crystal display system. If A and B are used to represent two successive fields in a TV signal for example, some of these techniques operate to display at increased field rate by simple field repetition, that is, AABB and so on, as happens with the system described above. With other known techniques an alternating sequence of fields can be produced, i.e. ABAB and so on. More sophisticated techniques recently developed for HDTV CRT displays may be used to advantage in that in addition to a response time improvement a higher quality picture can be obtained. A preferred technique in this respect is that of motion compensation. With this technique, achieved by a more complex field-rate converter circuit, an intermediate field is added for display by the panel which is not merely a repetition of the preceding field but instead is derived from it and the next, proper, field by appropriate signal processing so that the sequence of display fields become A A/B B B/C C, etc. For further details of this technique, as applied to an HDTV CRT display system, reference is invited to the paper by Fernando et al entitled "Motion compensated Field Rate Conversion for HDMAC Display" presented at the International Broadcasting Convention, Brighton, September 1988 and published in IEE Conference Publication No. 293. From reading the present disclosure, other modifications and variations will be apparent to persons skilled in the art. Such modifications and variations may involve equivalents and other features which are already known in the design, manufacture and use of display systems and component parts thereof and which may be used instead of or in addition to features already described herein.

Claims: A method of reducing picture element response time of an active matrix liquid crystal display system comprising a liquid crystal display panel (10) having a row and column array of picture elements (12) each associated with an active switching device (11), and drive means (20 to 22, 24 to 26) for driving the rows of picture elements in sequence according to a video signal of a given field rate supplied to the drive means by scanning the rows of the array in succession and supplying samples fields of the video signal to the columns of the array, characterised in that the picture elements of the panel are driven at a field rate higher than that of the video signal supplied to the drive means with fields of the supplied video signal being loaded into field store means (27, 28, 30 to 33) of the drive means whose contents are read out at a rate faster than that of loading for use in driving the picture elements. A method according to Claim 1, characterised in that the field rate of the display panel is n times the field rate of the supplied video signal where n is equal to 2, 3 or 4. A method according claim 1 or Claim 2, characterised in that the field store means operates to provide a sequence of display fields which includes repetition fields. A method according to Claim 3, characterised in that alternate fields of the supplied video signal are loaded respectively into two field stores (30, 31) with the contents of one field store being read out for use in driving the picture elements a plurality of times while a field of the video signal is being loaded into the other field store. An active matrix liquid crystal video display system comprising a display panel (10) having a row and column array of liquid crystal picture elements (12) each associated with a switching device (11), input means (25) for receiving a video signal of a given field frequency and drive means (20 to 22, 24, 26) for driving the picture elements a row at a time according to the input video signal by scanning the rows of the array in succession and supplying sampled fields of the video signal to the columns of the array, characterised in that the drive means is operable to reduce picture element response time by driving the array of picture elements at a field rate greater than that of the input video signal and includes field store means (27, 28, 30 to 33) into which picture information of an input video signal field is loaded and whose contents are arranged to be read out at a rate faster than that of loading for driving the picture elements according to the picture information of a stored field. An active matrix liquid crystal video display system according to Claim 5, characterised in that the drive means is arranged to drive the display panel at a field rate n times that of the input video signal where n is equal to 2, 3 or 4. An active matrix liquid crystal video display system according to Claim 5 or Claim 6, characterised in that the field store means is arranged to provide at its output a sequence of display fields including repetition fields. An active matrix liquid crystal video display system according to Claim 7, characterised in that the field store means comprises first and second field stores (30, 31) into which alternate input video signal fields are loaded respectively, and in that the drive means is arranged so as to read out the contents of one field store and drive the picture elements in accordance therewith a plurality of times while the other field store is being loaded with a video signal field.

Inventors: KNAPP ALAN GEORGE, MANSELL JOHN REVERE, KNAPP, ALAN GEORGE, MANSELL, JOHN REVERE
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS UK LTD, PHILIPS ELECTRONICS N.V., PHILIPS ELECTRONICS UK LIMITED
Application year: 1991
Main classification: G09G3
IPC codes: G09G3