Display control device for reducing power consumption

Abstract: A display control device for receiving input data at a display controller-kernel unit, storing it in a memory, sequentially reading the stored data from the memory and displaying it on a display unit. The control device comprises a counter which is reset when a signal indicating writing of data in the memory is detected to output a counter signal when a predetermined value is counted, a display control circuit for outputting a control signal so as to close a gate inserted in a signal line between the display controller-kernel unit and the display unit in response to the counter signal to interrupt the signal line and turn off the backlight of the display unit, and means for invalidating the control signal when the fact that a signal is written in the memory is detected.

Description: This invention relates to a display control device where in order to reduce power consumption, input data is stored to be sequentially displayed on a display screen and, particularly, to a display control device adapted to turn off a display unit as long as no change in a displayed content takes place. A display control device is well known in which input data is stored in a memory and displayed sequentially on a screen. In such a display control device, a display controller-kernel unit delivers a control signal to a display panel, such as a liquid crystal display (LCD) panel or the like, in accordance with control instructions from an external unit, such as a central processing unit (CPU), to commence the control of the display panel and also stores data (character codes) fed from the CPU in a memory. The stored data are successively read from the memory, converted by the display controller-kernel unit to data to be displayed (character patterns) and fed to the display panel for display. Since the above-referred display control device reads the content of the memory to cause it to be displayed on the display screen even when no change in displayed content takes place, there is a drawback in that power is consumed even when no data are required to be displayed. It is well known to turn off a display screen when no data are required by displayed. For example, Japanese Patent Public Disclosure No. 9634/86 laid open on January 17, 1986 discloses a display control device for causing data to be displayed for a predetermined period of time in response to an operation of an input means. It is, however, necessary in such a prior art to provide an additional software to the control device and change a display controller-kernel unit, which will result in an increase in the size and cost of the device. Japanese Patent Public Disclosure No. 112371/84 laid open on June 28, 1984 also discloses a technique for automatically turning off a screen when a predetermined period of time for which the same image is displayed has lapsed. This technique also has such problems as mentioned above. EP-A-0 265 209 discloses a display apparatus whose display data control section with CPU and memories and display section are located far from each other and separately supplied with power from their respective local power sources. When display data are delivered from the display data control section a control system switches on the power source of the display section and off when no display data are supplied. The control system comprises a counter which is reset by the display data from the display data control section and which controls a switch. The switch connects the power supply to the display section. When no display data arrive the counter counts up to a fixed count value and opens the switch for the power supply. When data arrive, i.e. the reset of the counter is activated, the switch is closed. The reset signals are dependent on the input data signals of the memory. The control system of this prior art shows the disadvantage that the power is consumed even when no change in displayed content exists. It is an object of the invention to provide a display device capable of reducing a power consumption of a display control device, by adding simple circuits thereto, when no data are required to be displayed. To attain this purpose, the present invention provides a display control device including a display controller for receiving input data, storing it in a memory, sequentially reading the data stored in the memory and transmitting it to a display unit, the device comprising: timer means for generating an output at the time when a predetermined period of time has lapsed from the time of the data being written in the memory; gate means inserted in a signal line connecting the display controller and the display unit; and control means for closing the gate means in response to the output of the timer means to disable the display unit, and for opening the gate means in response to the writing of the data in the memory to enable the display unit. The display controller and the LCD panel may be connected by a signal line for transmitting a data shift clock as well as by a signal line for transmitting LCD data, and the gate means may be inserted in these signal lines. According to a further aspect of the invention, the present invention provides a display control device for receiving input data at a display controller-kernel unit, storing it in a memory and sequentially reading the stored data from the memory and displaying it on a display unit, the device comprising: a counter which is reset when a signal indicating writing of data in the memory is detected to output a counter signal when a predetermined value has been counted; a display control circuit for outputting a control signal so as to close a gate inserted in a signal line between the display controller-kernel unit and the display unit in response to the counter signal to interrupt the signal line and turn off the backlight of the display unit; and means for invalidating the control signal when the fact that a signal is written in the memory is detected. The foregoing and other objects and advantages of the invention will become more apparent from the following detailed description with reference to the accompanying drawings. Fig. 1 is a block diagram showing the structure of an embodiment of a display control device in accordance with the present invention; and Fig. 2 is a flow chart for explaining an operation of the display control device of Fig. 1. Fig. 1 is a block diagram showing the structure of an embodiment of a display control device in accordance with the present invention. In the drawing, a display controller-kernel unit 1 is connected to a CPU bus 2 which transmit a control signal from a CPU (not shown). The display controller-kernel unit 1 is also connected through a memory bus 3a to a memory 3 and delivers a control signal to a control signal line 4a, a data shift clock to a clock line 4b and a display data to a data line 4c. The display controller-kernel unit 1 is further connected through the signal line 4a to an LCD panel 4. The memory bus 3a is connected to a reset terminal of an internal counter 5, and the control signal line 4a is connected to a count terminal of the internal counter 5. The counter signal or output of the internal counter 5 is output to a signal line 5a. The internal counter 5 is connected through the signal line 5a to a display control circuit 6. The display control circuit 6 delivers a clock control signal to a signal line 6a, a data control signal to a signal line 6b and a backlight control signal to a signal line 6c. A clock gate 7 and a data gate 8 are inserted in the signal lines 4b and 4c, respectively, connecting between the display controller-kernel unit 1 and the LCD panel 4, the signal line 6a being connected to both of the gates, the signal line 6b to the data gate 8 and the signal line 6c to the LCD panel 4. In operation, when control instructions are fed from the CPU through the CPU bus 2 to the display controller-kernel unit 1, it delivers the LCD control signal through the signal line 4a to the LCD panel 4 and commences the control of the LCD panel 4. The display controller-kernel unit 1 produces a memory control signal for controlling the memory 3 and a data shift clock pulse for storing the data (character codes) fed through the CPU bus 2 in the memory 3. The data stored in the memory 3 are sequentially read, converted to display data (character patterns) and output to the LCD display data line 4c. The internal counter 5, when it detects the fact that a write-in signal has been output to the memory bus 3a, clears its count values and receives the LCD control signal from the signal line 4a to commence a counting operation (Steps S1 - S3 of Fig. 2). Simultaneously, the display control circuit 6 operates to open the clock gate 7 and the data gate 8 by the clock control signal and the data control signal, whereby the display data fed through the data line 4c is updated by the clock pulse supplied through the LCD data shift clock line 4b and displayed on the LCD display panel 4. If no write-in signal is detected on the memory bus 3a during a predetermined value has been counted and a predetermined period of time has lapsed, a counter signal is delivered to the counter signal line 5a (Steps S4 - S5). When detecting the counter signal on the signal line 5a, the display control circuit 6 delivers the clock control signal, the data control signal and the backlight control signal to the signal lines 6a, 6b and 6c, respectively, so that the clock gate 7 and the data gate 8 are closed by the clock control signal and the data control signal and the backlight of the LCD panel 4 is switched off, thus causing the display of the LCD panel 4 to be turned off (Steps S6 - S7). When a write-in signal is output again to the memory bus 3a while the display is being turned off, the display control circuit 6 operates to cancel all of the clock control signal, data control signal and backlight control signal which have been output up to this time (Steps S8 - S9), and the display is recovered on the LCD panel 4. In this manner, this embodiment operates to turn off the display unit after a predetermined lapse of time defined by the counter 5, in the event that no change in display content takes place, and thus a power consumption is reduced when no data are required to be display. Although the present invention has been described in detail with reference to a preferred embodiment, various modifications and alterations can be effected without departing from the scope and spirit of the invention. In stead of the LCD panel, for example, a CRT, plasma display or the like can be used as a display unit.

Claims: A display control device including a display controller (1) for receiving input data storing it in a memory (3), sequentially reading the data stored in the memory (3) and transmitting it to a display unit (4), comprising timer means (5) for generating an output at the time when a predetermined period of time has lapsed, characterized in that said timer means (5) generates an output after a predetermined period from the time of the data being written in said memory (3), that gate means (7,8) are inserted in a signal line (4a-c) connecting said display controller (1) and said display unit (4); and control means (6) are provided for closing said gate means (7,8) in response to the output of said timer means (5) so as to disable said display unit (4), and for opening said gate means (7,8) in response to the writing of the data in said memory (3) to enable said display unit (4). A control device as set forth in Claim 1, wherein said timer means is a counter (5) which is reset in response to the writing of the data in said memory (3) and provides an output signal when said counter (5) has counted up to a value corresponding to the predetermined period of time. A control device as set forth in Claim 1 or 2, wherein said display unit is an LCD panel (4), and said control means (6) is operable to receive the output from said counter (5) for disabling the backlight of said LCD panel and to detect the writing of the data in said memory (3) for enabling said backlight. A control device as set forth in Claim 1, 2 or 3, wherein said display controller (1) and said LCD panel (4) are connected by a signal line (4b) for transmitting a data shift clock as well as by a signal line (4c) for transmitting LCD data, said gate means (7,8) being inserted in these signal lines (4b,4c). A display control device as set forth in Claim 1, characterized in that said display controller is a display controller-kernel unit (1), storing input data in a memory, sequentially reading the stored data from said memory (3) and displaying it on said display unit, said control device comprising: a counter (5) which is reset when a signal indicating writing of data in said memory (3) is detected to output a counter signal when a predetermined value has been counted; a display control circuit (6) for outputting a control signal so as to close a gate (7,8) inserted in a signal line (4a-c) between said display controller-kernel unit (1) and said display unit (4) in response to said counter signal to interrupt said signal line and turn off the backlight of said display unit (4); and means (6) for invalidating said control signal when the fact that a signal is written in said memory is detected.

Inventors: ISHIKAWA YASUO, ISHIKAWA, YASUO, Ishikawa, Yasuo, c/o Computer Seisakusho
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1991
Main classification: G09G3
IPC codes: G02F1, G09G3, G06F1