Electron beam exposure apparatus

Abstract: Stored in the magnetic disk (71) are the lithography data (DD) for lithographing a mask pattern and the correction data (AD1, AD2) for correcting the lithography data (DD). The CPU (72) reads the lithography data (DD) and correction data (AD1, AD2) from the magnetic disk (71) and compares addresses from the different sources. When the two separate addresses coincide, the electro-optic system (80) lithographs the mask pattern based on the correction data (AD1, AD2), whereas when the two addresses disagree with each other, it lithographs the mask pattern according to the lithography data (DD).

Description: This invention relates to electron beam exposure apparatus for lithographing a photographic mask pattern for use in the manufacture of semiconductor devices, and more particularly to an electron beam exposure apparatus capable of partially correcting the pattern. To form a photographic mask pattern for lithography, a desired circuit pattern is generally converted into corresponding pattern data with a CAD (Computer-Aided Design) system. Then, EBMT (Electron Beam Magnetic Tape)-format lithography data is obtained through the pattern creation processes with a large computer. Based on the lithography data, an electron beam exposure apparatus emits a beam of electrons against a mask blank. Fig. 11 shows a conventional electron beam exposure apparatus. In this apparatus, EBMT-format lithography data stored on magnetic tape MT1 is loaded into a magnetic disk device 71. A CPU (Central Processing Unit) 72 sequentially reads the lithography data from the magnetic disk device 71 to convert it into various signals, sends a suitable signal to each of a lithography control circuit 73, EOS (Electron Optical System) control system 74, and stage control system 75, and actuates a synchronizing circuit 76. An electro-optic system 80 is controlled by the lithographing control circuit 73, the EOS control system 74, and a stage driving circuit 77 controlled by the stage control system 75. A keyboard connected to the CPU 72 is used to enter necessary commands for the operation of the electron beam exposure apparatus. Fig. 12 illustrates the electro-optic system 80. Electrons generated at an electron gun 81 pass through an anode 82, a first condenser lens 83, blanking electrode 84, second condenser lens 85, object lens (X-Y deflecting electrode) 86, and aperture 87 in sequence, and collide with a mask blank 90 on a cassette 89 mounted on a stage 88. Numeral 91 indicates a reflected electron detector for monitoring beam current. The stage 88 is driven in the X and Y directions with the stage driving circuit 77 controlled by the stage control system 75. A laser interferometer 92 detects stage 88's coordinate addresses, or X-Y coordinates for the pattern on the mask blank which is actually exposed to the beam, on the stage 88, and feeds back the detected X-Y coordinates to the stage control system 75. This allows the accurate positioning of the stage 88. Electrons produced at the electron gun 81 of the electro-optic system 80 are controlled by the lithography control circuit 73 and EOS control system 74, and radiated against the mask blank 90 on the stage 88. The stage is moved by the stage driving circuit 77 in the stage control system 75, as patterns are lithographed sequentially. When the pattern exposure based on the desired lithography data is completed, the CPU 72 reads the next potting data from the magnetic disk 71 to produce various signals for a subsequent pattern exposure. These actions are repeated to perform successive pattern exposures. After the creation of the EBMT-format lithography data, some part of the mask design may require partial corrections. For instance, correction of the pattern due to designing errors, CAD errors, changes in circuit specifications and the like needs modification of the mask. Conventionally, such alteration of mask design involves the large computer again carrying out a series of necessary steps to create correct EBMT-format lithography data. However, these reprocesses take a long time, resulting in increased costs. In addition, increased time for pattern correction and inspection reduces the throughput, having an adverse effect on the QTAT (Quick Turn Around Time). As mentioned above, in a conventional electron beam exposure apparatus, when pattern correction is needed after the creation of EBMT-format lithography data, it is necessary to recreate EBMT-format lithography data, leading to loss of time and a rise in production cost. Additionally, more time is needed for pattern correction and inspection, resulting in a decrease in the throughput. The object of the present invention is to provide an electron beam exposure apparatus that allows partial correction of pattern lithography without recreating EBMT-format lithography data even when pattern correction is needed even after the creation of EBMT-format lithography data, which helps improve the throughput from design work to mask creation. This object is achieved by an electron beam exposure apparatus comprising: memory means for storing lithography data used to lithograph a mask pattern, the lithography data containing addresses specifying the lithography position and data corresponding to the magnitude of a beam current for lithographing the mask pattern; supply means for supplying correction data used to correct said lithography data, the correction data containing addresses specifying correction position of the mask pattern and data corresponding to a beam current for correcting the mask pattern; first control means for comparing the address contained in the lithography data with the addresses contained in the correction data; second control means for controlling the magnitude of the beam current based on the data contained in the correction data when the first control means detects the coincidence of the two separate addresses, but based on the data contained in the lithography data when the coincidence is not reached; and exposure means for lithographing a pattern by using an electron beam produced according to the beam current controlled by the second control means. In this invention, when pattern correction is required after the creation of EBMT-format lithography data, the magnitude of the beam current is controlled to an optimum value based on the correction data prepared to specify partial correction of pattern lithography. This makes it possible to correct the pattern width partially or alter the pattern shape partly without recreating EBMT-format lithography data. Furthermore, since partial correction of pattern plotting can be made without recreating lithography data, the throughput from design work to mask creation can be improved. This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 is a schematic diagram for an electron beam exposure apparatus as an embodiment of the present invention; Fig. 2 shows a file structure of lithography data; Figs. 3 and 4 illustrate different file structures of correction data, respectively, stored in the magnetic disk device of Fig. 1; Fig. 5 is a flowchart for the operation of the embodiment in Fig. 1; Fig. 6 shows partial correction of a pattern based on the patterning addresses and values both contained in the correction data of Fig. 4; Fig. 7 illustrates the relationship between the measured beam current and pattern dimension variations in the electron beam exposure apparatus of Fig. 1; Fig. 8 illustrates the relationship between the measured development time and pattern dimension variations in the electron beam exposure apparatus of Fig. 1; Fig. 9 is another flowchart for the operation of the embodiment of Fig. 1; Fig. 10 shows partial correction of a pattern through the operation in Fig. 9; Fig. 11 is a schematic diagram for a conventional electron beam exposure apparatus; and Fig. 12 is a sectional view illustrating beam exposure with the electro-optic system of Fig. 9. An embodiment of the present invention will be explained in detail, referring to the accompanying drawings. The same parts in Fig. 1 as those in Fig. 11 are represented by the same symbols. In Fig. 1, a CPU 72 is connected to a keyboard 70 for entering data including the above-mentioned commands, a magnetic disk device 71, an EOS control system and a lithography control circuit 73 both for controlling the magnitude of beam current based on the lithography data, a stage control system 75 for controlling the position of the stage, a synchronizing circuit 76 for synchronizing the stage control system 75 with the lithography control circuit 73, and a comparator circuit 10 for comparing the X-Y coordinates from the stage control system 75 with those contained in the correction data from the CPU 72. EBMT-format lithography data stored in the MT1 and correction data stored in the MT2 are loaded and stored into the magnetic disk 71. The EOS control system 74 and lithography control circuit 73 are connected to the blanking electrode 84 in an electro-optic system 80. The stage control system 75 is connected to a stage driving circuit 77, which drives a stage 88. The stage control system 75 is connected to a laser interferometer 92 that detects X-Y coordinates of the pattern on the mask actually exposed to the beam. The electron beam exposure apparatus of Fig. 1 differs from the conventional one of Fig. 10 in the following points: (1) Stored in the magnetic disk device 71 are MT1-stored EBMT-format lithography data and MT2-stored correction data for partial correction of EBMT-format lithography data. (2) The comparator 10 is provided to compare the X-Y coordinates of the pattern address in the correction data read from the magnetic disk device 71 with the laser interferometer-measured X-Y coordinates of the address for the pattern on the mask blank actually exposed to the beam. (3) For CPU 72-controlled beam exposure based on the lithography data, when the two separate X-Y coordinates coincide at the comparator 10, the electro-optic system 80 is controlled so as to regulate the beam current according to the pattern correction contained in the correction data read from the magnetic disk device 71. Fig. 2 shows a file structure of the EBMT-format lithography data DD. The lithography data DD is made up of pattern addresses, their X-Y coordinates, and values corresponding to a beam current representing the pattern width, for example. Fig. 3 illustrates a file structure of the correction data. The correction data AD1 is composed of pattern addresses requiring correction, their X-Y coordinates, correction values corresponding to a beam current to correct, for example, the pattern width. Fig. 4 illustrates another file structure of the correction data. This correction data AD2 is composed of: the pattern addresses needing correction; their X-Y coordinates; correction values corresponding to a beam current to correct the pattern width, for example; patterning addresses required for patterning an additional pattern, for example; and patterning values corresponding to a beam current required for the patterning. The electron beam exposure apparatus of this embodiment operates the same way as does the aforementioned conventional one when no correction data exists. Here, the CPU 72 reads the lithography data from the magnetic disk 71 in sequence, converts them into different signals, and sends them to the lithography control circuit 73, EOS control system 74, and stage control system 75, respectively. It also synchronizes the stage control system 75 with the lithography control circuit 73 via the synchronizing circuit 76. This controls the electrons generated at the electron gun 81 and the stage movement, which allows continuous pattern exposure. When the pattern exposure based on the desired lithography data is completed, the CPU 72 reads the next lithography data from the magnetic disk 71 to produce and send necessary different signals. It repeats those steps as many times as required, enabling successive pattern exposure. Referring to Fig. 5, operation will be explained for the case where EBMT-format lithography data and correction data are stored in the magnetic disk 71. The CPU 71 first reads the EBMT-format lithography data from the magnetic disk 71 (step ST1), and then reads the magnetic disk 71-stored correction data (step ST2). In the electro-optic system 80, the pattern is produced on the mask blank through beam exposure, in the same manner as described above, according to the readout lithography data (step ST3). During the pattern lithography, the laser interferometer 92-measured X-Y coordinates of the beam lithography-produced pattern on the mask blank is compared with the X-Y coordinates of the pattern addresses contained in the correction data at the comparator circuit 10 (steps ST4 and 5). When the comparison results in disagreement, then the next lithography step will be carried out. When the comparison brings about a coincidence, or when an actually beam-lithographed position on the mask blank is at the correction position, the magnitude of electron beam current in the electro-optic system 80 is controlled according to the corrections contained in the read-out correction data, instead of the EBMT-format lithography data (step ST6). Therefore, when correction data with the file structure of Fig. 3 is used, the pattern width can be broadened by controlling the magnitude of the electron beam current in the electro-optic system 80 based on the pattern-width corrections contained in the correction data. In the case of using the correction data with the file structure of Fig. 4, the magnitude of the electron beam current is controlled according to the pattern-width corrections contained in the correction data, while the pattern is lithographed on the basis of the patterning addresses and values contained in the correction data. This allows addition of a pattern PN as shown by a broken line in Fig. 6, for example. With the above embodiment, even when pattern correction is needed after the EBMT-format lithography data has been once created, just preparing correction data enables partial correction of pattern lithography without recreating the EBMT-format lithography data. This improves the throughput. Fig. 7 shows the relationship between the beam current and the pattern dimension variations in the electron beam exposure apparatus of the embodiment. In this case, the variations in the pattern-width dimension were measured over the beam current range from 500 nA to 360 nA. In the measurement, the beam diameter was fixed to 0.5 µm and the development condition after beam exposure was set so that an optimum pattern dimension could be obtained at a beam-current of 400 nA. From Fig. 7, the following things can be seen: (1) Changing the magnitude of beam current by 10 nA results in a change in the pattern width by 0.1 µm, which permits an increment of the pattern correction up to 1.0 µm and its decrement down to - 0.3 µm. That is, a change in the dose by 0.2 µm C/cm⁻² changes the pattern dimension by 0.1 µm. (2) For 0.5 µm address unit or less, patterns of 3.0 µm or more width all allow control of their pattern dimensions. (3) Because of a restriction on the electron beam brightness, a 0.5-µm beam diameter permits the magnitude of beam current up to approximately 500 nA and a pattern edge roughness of 0.2 µm or less allows the beam-current magnitude down to 380 nA. Fig. 8 shows the relationship between the development time and the pattern dimension variations in the above electron beam exposure apparatus. Here, using the magnitude of beam current as parameter, variations in the pattern width are shown with respect to changes in development time after the beam exposure. In this measurement, the beam diameter was fixed to 0.5 µm and the measurement pattern is 4 µm in width on data. It is obvious that the development speed is 0.08 µm/30sec for each beam current. A change in the pattern width ΔL is: ΔL = (I - 400)/10 × 0.1 + 0.08 · Δt/30 wherein I is the magnitude of beam current and Δt is a change in time which is obtained from difference from between the present time and the development time at which a change in the pattern width ΔL is zero when electron beam is exposed by beam current of 400 nA. Accordingly, uniform dimension correction of the pattern on the mask blank through beam exposure can be achieved by changing the beam-current magnitude in increments of 10 nA with respect to 0.1 µm increments in the dimension correction. Therefore, as mentioned above, controlling the beam-current magnitude based on the correction value of the pattern width enables correction of the pattern at a portion needing dimensional amendments. Referring to Fig. 9, another operation of the electron beam exposure apparatus of Fig. 1 will be explained. In this operation, the CPU 72 first reads EBMT-format lithography data from the magnetic disk 71 (step ST10), and then reads the correction data from the magnetic disk 71 (step ST11). It also compares the pattern address contained in the lithography data with the pattern address contained in the correction data (steps ST12 and ST13). When the comparison results in disagreement, or when there is no correction data corresponding to the pattern address to be lithographed, the electron-beam magnitude in electro-optic system 80 is controlled based on the lithography data to lithograph the pattern (step ST14). On the other hand, when the comparison detects the pattern address contained in the lithography data agreeing with that in the correction data, or when there is a correction data corresponding to the pattern address to be lithographed, the pattern is lithographed by controlling the magnitude of the electron beam current in the electro-optic system 80 in accordance with the correction value contained in the read-out correction data in place of the lithography data (step ST15). In this embodiment, before the pattern is lithographed, the decision is made about whether there is a correction data corresponding to the pattern address to be lithographed. When the correction data exists, the magnitude of the electron beam current in the electro-optic system 80 is controlled on the basis of the correction value contained in the correction data instead of the lithography data. Thus, in addition to widening and lengthening the pattern, the pattern P1 can be shortened to the pattern P2 and the pattern P3 narrowed to the pattern P4 as shown in Fig. 10. While in the above embodiments, the correction data is written on to the magnetic tape and stored in the magnetic disk 71, it is not restricted to this approach, and may be directly entered from the keyboard 70 connected to the CPU 72. Although in Fig. 9, comparison of the address contained in the lithography data with that contained in the correction data is performed by the CPU 72, it is not limited to this technique, and may be carried out by the comparator circuit 10. This invention may be practiced and embodied in still other ways without departing from the spirit or essential character thereof. The preferred embodiments described herein are there fore illustrative and not restrictive, the scope of the invention being indicated by the appended claims and all variations which come within the meaning of the claims are intended to be embraced therein. Reference signs in the claims are intended for better understanding and shall not limit the scope.

Claims: An electron beam exposure apparatus comprising: memory means (71) for storing lithography data (DD) used to lithograph a mask pattern for use in the manufacture of semiconductor devices, said lithography data (DD) containing addresses specifying the lithography position and data corresponding to a beam current for lithographing the mask pattern; and exposure means (80) for lithographing the pattern using an electron beam, characterized by supply means (70, 71) for supplying correction data (AD1, AD2) used to correct said lithography data (DD), said correction data containing addresses specifying the correction position of the mask pattern and data corresponding to a beam current for correcting the mask pattern; first control means (72) for comparing the addresses contained in said lithography data (DD) with the addresses contained in said correction data (AD1, AD2); second control means (73, 74) for controlling the magnitude of beam current based on said data contained in said correction data (AD1, AD2) when said first control means (72) detects the coincidence of the two separate addresses, but based on said data contained in said lithography data (DD) when the coincidence is not reached; and by said exposure means (80) for lithographing the pattern using an electron beam being produced according to the beam current controlled by said second control means (73, 74). An apparatus according to claim 1, characterized in that said correction data (AD2) further contains patterning addresses used to lithograph a new pattern (PN) and data corresponding to a beam current for lithographing this pattern. An apparatus according to claim 1, characterized in that said correction data (AD1, AD2) contains either pattern-narrowing data or pattern-shortening data each contained in said lithography data. An apparatus according to claim 1, characterized in that said supply means (71) are a magnetic disk (71). An apparatus according to claim 1, characterized in that said supply means (71) are a keyboard (70).

Inventors: SUZUKI TOSHIYUKI C O INTELLECT, SUZUKI, TOSHIYUKI C/O INTELLECTUAL PROPERTY DIV.
Applicants: TOSHIBA KK, TOSHIBA MICRO ELECTRONICS, KABUSHIKI KAISHA TOSHIBA, TOSHIBA MICRO-ELECTRONICS CORPORATION
Application year: 1991
Main classification: G03F7
IPC codes: H01L21, H01J37