L.E.D. ARRAY PRINTER

Abstract: A non-impact printer apparatus is described that includes a recording head having a plurality of recording elements (30) such as LED's for recording on a recording medium (12). A plurality of driver chips (40) are provided on the head and each includes a plurality of current driving channels for selectively driving a plurality of recording elements in accordance with respective image data signals. The driver chips (40) each further include an extra current driving channel not associated with a recording element (30) for generating a current related to that sent to said recording elements. Monitoring of the current in the extra channel is provided to permit for changes of current to the recording elements (30) and/or corrected image data to provide fine tuned control over uniformity of the recording elements. A digitally adjustable current mirror controls the level of current to each LED during recording. Digital current data signals for controlling this level of current are also communicated over one of the lines of the data bus. Token bit signals are used to control the latching of both current data signals and image data signals in respective registers storing the digital data used for current control and the image data used for controlling energization times. Each driver chip (40) includes two sets of digitally addressable transistors. This allows for individual chip control of current to the respective LED's to correct for nonuniformity of light output from chip to chip due to temperature gradients as well as controlling for light output due to aging of the printhead. The current mirror has a master circuit for generating a reference current and a plurality of slave circuits for providing respective driver currents to the recording elements (30) selected for energization. A transistor switch is in series with a respective recording element (30) and switchable from one state to another in response to a signal at its control electrode. Each of the slave circuits includes an additional slave circuit which provides a current path for facilitating changing of the signal at the control electrode from one voltage level to another such as by allowing a capacitive charge at the control electrode to dissipate.

Description: L.E.D, ARRAY PRINTED BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to non-impact printer apparatus for recording, and more specifically, to circuitry thereon for controlling current uniformity to the recording elements. 2. Description of the Prior Art In U.S. Patent 4,831,395, an L.E.D. (light emitting diode) printhead is described wherein control of current to the LED's during recording is provided by a current mirror circuit. This circuit features an adjustable resistor and voltage supply to allow the respective currents to the LED's to be. controlled so that adjustments may be provided to have the outputs of the LED's be more uniform. Where groups of LED's are driven from respective driver chips, each driver chip is separately adjustable so that LED's driven from this driver chip receive sufficient current so that their respective intensities are similar to that of LED's driven by other driver chips on this printhead. Another aspect of adjustability requires the LED's to put out sufficient light to expose the recording medium such as a photoconductor. In U.S. Patent 4,885,597, an LED printhead is described wherein compensation for age and temperature of the LED's is accommodated to ensure that the intensity from the LED's is consistent over time. In this printhead, current to the LED's is regulated using digitally addressable current mirrors associated with each driver chip. The multi-bit digital current regulation signals used must be communicated to the driver chips and adjustments in intensities of the LED's made accordingly. -2- A problem therefore arises regarding the effect of temperature upon LED output and how to more accurately correct for temperature during use of the printhead. A problem further arises regarding the increased complexity in providing current regulating signals to the printhead to correct for the effects of temperature and other factors. A problem still further arises regarding maintaining consistency of LED light output under conditions where variations in LED driving voltage, V LED or V cc may occur as well as under conditions where LED's are being turned on and off at different times. It is therefore an object of the invention to overcome these problems and to provide an improved printer apparatus with improved means for measuring localized temperature of the printhead and for providing for more consistent operation and for more prompt and fine-tuned correction of non-uniformities. SUMMARY OF THE INVENTION The above object and others which will become apparent in reading the specification below are realized by a non-impact printer apparatus that includes a recording head having a plurality of recording elements for recording on a recording medium; driving means including a plurality of current driving channels for selectively driving said plurality of recording elements in accordance with respective image data signals; the driving means further including an extra current driving channel not associated with a recording element for generating a current related to that sent to said recording elements; and means for monitoring a parameter related to said current in said extra channel. In accordance with another aspect of the invention, a non-impact printer apparatus is provided that includes a recording head having a plurality of recording elements for recording on a recording medium; driving means for selectively driving said plurality of recording elements in accordance with respective image data signals; and means including data bus means for carrying on said data bus means multibit image data signals determining a recording duration for a recording element and for carrying on one line of said data bus means also used for carrying image data signals, a multibit digital signal used for regulating a level of current to said recording element. In accordance with still another aspect of the invention, there is provided a non-impact printer apparatus comprising: a recording head having a plurality of recording elements for recording on a recording medium; driving means for selectively driving said plurality of recording elements in accordance with respective image data signals; said driving means including a plurality of data register means with respective data register means associated with each recording element for storing said image data signals; data bus means for carrying image data signals; means for commonly connecting said data bus means to said plurality of data register means; means for generating a token bit signal; a multistage shift register means for outputting sequentially at respective stages the token bit signal for sequentially selecting a respective data -4- register means for accepting image data signals; said driving means further including current regulating means for regulating a level of electrical current to each recording element, the current regulating means being characterized by means for adjusting a level of electrical current to each recording element in response to a multibit digital signal; and wherein the current regulating means further includes first register means including a plurality of registers for storing digital signals related to a level of current control, second register means for storing and shifting a token bit signal, and means responsive to a token bit signal in said second register means for latching in an appropriate register of said first register means the multibit digital signal. In yet another aspect of the invention, there is provided a non-impact printer apparatus used for recording, comprising: a plurality of groups of recording elements, a plurality of integrated circuit driver chips for driving respective groups of recording elements; a) first digitally addressable current-conducting means for selectively establishing a first bias voltage in response to a first multibit digital signal; b) second digitally addressable current-conducting means responsive to the first bias voltage and to a second multibit digital signal for generating a bias current and establishing a second bias voltage; c) means for selectively causing current to flow through recording elements selected for energization; and d) current mirror driver means for regulating levels of currents through said selected recording elements, the level of current being related to said second bias voltage, and characterized by wherein elements a), b), c) and d) are all on each of said driver chips. There is further provided in accordance with the invention a non-impact printer apparatus comprising: a series of point-like energizable radiation sources arranged in a row; means providing data signals representing data to be printed; logic means responsive to the data signals for determining which of the point-like radiation sources are to be selected for energization; current driver means responsive to the logic means for providing electrical current to the radiation sources selected for energization, the current driver means including a master circuit including a first transistor for generating a reference current through said first transistor and a plurality of slave circuits for providing respective slave driver currents to the radiation sources selected for energization, means including (a) a plurality of individually selectively addressable current-conducting devices coupled to the master circuit, (b) first control means for selectively determining which of said plurality of devices are to be current conducting, and characterized by (c) current source means responsive to increases in temperature on the printhead for providing increased current generated by said current source means, (d) adjustable bias means coupling said current source means to said first plurality of devices to increase respective levels of currents conducted by selected ones of said first plurality of devices and responsive thereto for generating an adjusted voltage bias signal, and (e) bias responsive means responsive to an adjustment in voltage bias for increasing the reference current in response to the increase in the temperature of the printhead. The invention also provides a non-impact printer apparatus, comprising: a plurality of energizable recording elements; driving means for energizing said recording elements, said driving means including current mirror means having a master circuit means for generating a reference current and a plurality of slave circuit means for providing respective driver currents to the recording elements selected for energization; each slave circuit means including: (a) transistor switching means in series with a respective recording lement and switchable from one state to another in response to a signal and having a control elebtrode for controlling driver current to its respective recording element in response to the signal; (b) enabling means operating upon the control electrode for switching the switching means to allow driver current to be selectively provided to a respective recording element for a predetermined period of time; and (c) each of said slave circuit means further including its own additional slave circuit means for providing a current path for facilitating changing of the signal at the control electrode from one voltage level to another. The above and other objects and features of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings BRIEF DESCRIPTION OF THE DRAWINGS The subsequent description of a preferred embodiment of the present invention refers to the attached drawings wherein: FIG. 1 is a perspective view illustrating the general arrangement of a prior art non-impact printer; FIG. 2 is a block diagram of a circuit for providing signals to a non-impact printhead made in accordance with the invention; FIG. 3 is a block diagram of a printhead according to the invention, the printhead including a plurality of driver chips for driving the LED's formed on chip arrays; FIG. 4 is a block diagram of a driver chip made according to one embodiment of the invention and used on the printhead of FIG. 3; FIG. 5 is a circuit diagram of one circuit incorporated on the driver chip of FIG. 4 in accordance with the invention; and FIGS. 6A, 6B, 6C, and 6D comprise a schematic of a current driving circuit incorporated on the driver chip of FIG. 4. FIG. 7 is a block diagram of another embodiment of a printhead made according to the invention; FIG. 8 is a block diagram of a driver chip for use on the printhead of FIG. 7; FIG. 9 is a block diagram of an extra driver channel or current monitor channel for the driver chip of FIG. 8; FIG. 10 is a schematic of a token bit register incorporated on the driver chip of FIG. 8; FIG. 11 is a schematic of a token bit register incorporated on another embodiment of a driver chip that is a modification of that of FIG. 8; -8- FIG. 12 is a time line illustrating the occurrence of various pulses on the driver chip of FIG. 11; and FIG. 13 is a truth table illustrating operation of the modified driver chip of FIG. 11. DESCRIPTION OF THE PREFERRED EMBODIMENT Because the apparatus of the type described herein are well known, the present description will be directed in particular to elements forming part of, or cooperating more directly with, the present invention. The apparatus for the herein disclosed invention is typified by the diagram of FIG. 1; a linear array 10 of say 3584 triggerable recording elements; e.g. LED's, is disposed to expose selectively a photosensitive image-receiver medium 12 that is movable relative to the array by suitable conventional means (not shown). While the embodiments of the invention will be described in terms of LED printheads, other recording elements may also make use of this invention. Optical means for focusing the LED's onto the medium may also be provided. In this regard, gradient index optical fiber devices such as Selfoc (trademark of Nippon Sheet Glass Co., Ltd.) arrays are highly suited. The LED's of the array are triggered into operation by means of image processing electronics 14 that are responsive to image signal information. Depending on the duration for which any given LED is turned on, the exposure effected by such LED is more or less made. Where the medium 12 is, say, photographic film the latent image formed line by line by selective exposure of said LED's may be subsequently developed by conventional means to form a visible image. Where the medium 12 is an electrophotographic receptor, the LED's may be used to form an electrostatic image on a uniformly electrostatically charged photoconductor and this image developed using opaque toner particles and perhaps transferred to a copy sheet, see U.S. Patent 3,850,517 and 4,831,395. With reference now to FIGS. 2, 3, and 4, a data source 15 such as a computer, word processor, image scanner or other source of digitized image data, provides image data signals to a data processor 16 which may comprise a raster image processor. The data processor under control of clock pulses from a logic and control device (LCU) 13 provides a plurality of outputs including rasterized data outputs and control signals which are fed to the printhead. Data for each pixel may be represented by a multibit signal of say 4 bits representing a grey level for exposure for recording that pixel. A programmable ROM (PROM) 16a may be provided either on or off the printhead to modify the data to provide for uniformity correction from LED to LED. In this regard, see Pham et al PCT International application US 90/0074. The PROM transforms the 4-bit signal into a 6-bit grey level signal that is adjusted or corrected for the light-emitting characteristics of the respective LED. This balance in light output from LED to LED can be corrected by modifying the data bit signals in accordance with empirical determinations. The PROM has stored therein correction factors associated with each LED for modifying that LED's respective data. As will be described below, this PROM may be modified in accordance with age and/or temperature changes to the printhead. In addition, the LCU provides exposure clock pulses to a down/up counter 18 (FIG. 4) which, when enabled by a signal from the LCU, counts such clock pulses and provides at an output having a plurality of lines a digital signal representation of the state of the counter. Typically, such a counter has one line representing a least significant bit of such count and other lines representing other more significant bits. In accordance with a technique fully described in U.S. patent 4,750,010 in the names of Ayers et al, the output of counter 18 is provided to a first set of input terminals to a comparator 19 associated with each recording element 30, i.e., LED in this embodiment. A plurality of data lines from each of a plurality of corresponding data registers 24 is also provided to a second set of input terminals associated with each comparator 19. The comparators 19 all compare the output of the counter 18 with the value of the respective data. As will be described herein, the image data signals provided to each comparator relates to a desired ON time or period of enablement for a respective LED 30 for the recording of a particular pixel. As is well known, the LED's are alternately divided into odd and even-numbered LED's so that respective integrated circuit driver chips 40 therefor are located on opposite sides of the line of LED's. As the circuitry is identical for the corresponding driver chips, the discussion herein will be made as to one of these driver chips. The image data signals provided to each comparator 19 during the printing of a single line of dots by the row of LED's is related to the desired pixel or dot size to be exposed onto the image receiver medium by that LED for that particular line of dots. As shown in FIGS. 3 and 4, six independent lines of data DI0 through DI5 provide a six bit digital image data signal that allows for grey-scale variation of the output of each LED during each cycle of operation. During each cycle the data to each comparator may comprise six binary bits representing an amount from decimal 0 to decimal 63. Although the data lines DIO through DI5 are shown passing through the data registers 24 in FIG. 4, it will be appreciated that this is for the convenience of this illustration and that actually such lines comprise a plurality of data lines that are simultaneously available to all latches as will be described below. Suppose, for example, that an LED, LED* , is to be enabled for a time period equal to 20 clock periods plus T M , M . T M - N represents a pre-established minimum LED on time. In response to a start pulse on line LLATCHN, the counter 18 is enabled and commences to count exposure clock pulses from line 17 from decimal 63 to 0. Note that the clock pulses may be generated to have a variable programmable period. The six bit output of counter 18 is coupled to one set of inputs at terminal X of each of the comparators. This count is now compared with the data input at another set of inputs at terminal Y of this comparator which represents in binary form decimal ten. When there is a "match," i.e., when the count of terminal X is 10, a pulse is provided at the output terminal of comparator 19 to cause latch or toggle flip-flop 22 to enable the constant current driver 23 to commence and maintain current to LED ! . After the counter counts down to zero, the counter may be inhibited from counting additional clock pulses for a period T M - N that is either programmed into the counter or provided by other suitable means. After this predetermined time period T M - N , if used, the counter is set to count in its up mode and commences counting clock pulses -12- again. When the counter, in its count up mode, reaches decimal 10 the flip-flop 22 is reset and current to the LED ceases. The other LED's, etc. operate in similar fashion but their data may require different count values to turn on and off. What these LED's will thus have in common is that all will have their respective current pulses centered, i.e., the midpoints of the respective current pulses will occur at the same time. The pulse duration for each LED during each line of print is varied, however, in accordance with their respective image data signals. Reference is also made to aforementioned PCT International application No. US 90/00074, regarding a clocking scheme using a non-linear clock, the contents of which are incorporated by this reference. As noted in this latter reference, correction for unequal light output from LED to LED may be provided by adjustment of the data in accordance with the characteristics of each LED. Thus, a programmable read only memory device or PROM or other programmable device may store the characteristics of each LED and data for that LED can be modified to provide an input count at terminal Y that represents data modified by the exposure characteristics of the LED. For example, for an LED that is a relatively strong light emitter the PROM would modify data bits for that LED to reduce the count that otherwise would be provided at terminal Y based solely on the data. Still other circuitry for balancing the driving current to the LED's is described below. The description of the circuitry forming a part of the driving circuitry for distributing the image data signals to the appropriate comparator and to current driving circuits will now be described. In the example of the circuitry for the printhead shown in FIG. 3, the driving circuitry for the LED's are provided on opposite sides of the line of LED's 20. This is a known desirable arrangement for permitting LED's to be packed closer together to provide greater image resolution capabilities for the printer. As may be noted the circuit arrangement is an alternating one such that what may be called the even-numbered LED's have their respective driving circuitry located to one side of the line of LED's and what may be called the odd-numbered LED's have their respective driving circuitry located to the other side of the line of LED's. Typically, groups of, say, 64 of the odd numbered LED's (in a chip array 31 having 128 LED's arranged in a row) will have their respective driver circuitry formed in a single integrated circuit chip 40 and thus, for a printhead having 3584 LED's on the printhead, there may be 28 driver chips located on each side of the line of LED's. In order to save on production costs for these driver chips, it is desirable that they be identical. For the driver chips to be identical, although locatable on either side of the line of LED's, it is desirable for design simplicity that signals traversing the length of the printhead be programmably movable in either direction; see in this regard U.S. Patent 4,746,941. LED chip arrays having more than 128 LED's are also known but the invention will be described with reference to those having 128 LED's. The image data signals are output by the data processor 16 in accordance with image data signals for the odd-numbered LED's and image data signals for the even-numbered LED's. Discussion will now be made with regard to the image data signals for the -14- odd-numbered LED's, since operation and circuitry for driving the even-numbered LED's is identical. With reference to FIG. 4, data lines DIO - DI5 are independent lines each carrying a signal representing a digital bit (0 or 1) so that together their respective signals define a digital six bit number from decimal 0 to decimal 63. This image data signal is passed along lines DIO - DI5 on the printhead which comprise an image data signal bus. Associated with each LED is a data register means 24 for latching data from this bus during each cycle of operation for printing a single line of dots or pixels. As will be described, a token bit is used to enable a data register means associated with a particular LED to accept the data while other data register means associated with other LED's await their respective data. The use of a token bit in a printer apparatus for controlling latching of multibit data is described in U.S. Patent 4,746,941. The data register means 24 for each LED comprises a pair of latches 25, 26 or bi-stable multivibrators (msff - master-slave flip flops) for each of the six data lines. The pair of latches are connected in a master-slave relationship wherein in response to a token bit signal at the enable input terminal of the master latch 25, an image data signal at the data input terminal of the master latch 25 will cause the output of the master latch to either change or remain the same depending upon the image data signal. It will be noted that the six master latches 25 in the data register means of each LED are commonly connected to a line 27 to simultaneously receive the token bit signal from the token bit shift register 28. The token bit shift register 28 comprises a series of flip-flops 29 which have clock pulses (SHFTCLK) applied to the clock terminals thereof and the signal representing the token bit input to the data input terminal of each. Note that the same token bit signal will be provided to both the even and odd token bit shift registers for the even and odd numbered LED's. The output of each of these flip-flops 29 is connected to the data input terminal of the next flip-flop 29 in the series. Buffers 31 with enable inputs and direction controls are coupled to the token bit shift register 28 so that programmable control may be made of the direction for shifting the token bit along the token bit shift register 28. In the example where the token bit is to be shifted from left to right in FIG. 4 for the Data Odd half of the printhead, the signal line TDIR (token direction) is made at an appropriate logic level to allow the token bit on line LTOKEN to pass from left to right. Thus, in response to clock pulses from the data processor 16 the token bit is passed from stage to stage (left to right in FIG. 4) of the token bit shift register 28 and accordingly outputted sequentially over respective lines 21 through OR gates 11 to lines 27 for enablement of all the master latches 25 of a respective data register 24. With movement of the token bit from stage to stage of the shift register 28 the data bits occurring on lines DI0-DI5 are accepted by the data registers 24 in turn from left to right until all the 1792 data registers on this side of the printhead have acquired their respective six bits of data. A latch enable signal is then pulsed low on line LLATCHN to cause the respective slave latches 26 to latch the data at their respective outputs and to reset the toggle flip-flops 22. The respective outputs of the slave latches 26 are now communicated to the data input terminals Y of the respective comparators 19 for determining the duration of exposure for each LED in accordance with the techniques described above. The master latches 25 are now free to receive the image data signals for the next line of dots to be recorded. The comparators 19 each have at an output an AND gate 19' and a D type flip-flop 19" in order to prevent the propagation of extraneous logic glitches from the comparator outputs to the toggle flip-flop inputs. After LLATCHN returns to its inactive level, on the first rising edge of EXPCLK while a particular comparator's 19 output is at a logic high level, the respective toggle flip-flop 22 toggles from the reset state to the set state. The Q and QN outputs of this toggle flip-flop then cause the associated controlled current driver 23 to be enabled. After this same comparator's output has been returned to a low logic level, and then returns to a high logic level on some later rising edge of EXPCLK, the respective toggle flip-flop 22 toggles back to the reset state. The Q and QN outputs of this toggle flip-flop then disable the associated constant-current driver 23. With reference now to FIGS. 6A, B, C and D, the current driving circuit 23 portion of each driver chip 40 is shown. The respective outputs of the toggle flip-flops 22 are fed over respective lines 45 1 , 45 3 , and the following lines not shown 45 5 , — 45 125 and 45 127 . As may be seen each of these lines is actually a double line one of which carries an enable signal to turn the respective LED on and the other carries a complement of this signal. The lines 45 1 are input to respective control electrodes of transistors Q 426 » 0 27 - These transistors act as switches and form a part of a current mirror driving circuit that includes a master circuit formed by transistors Q 241 Q 425 and a series of digitally controlled transistors. More details concerning the digitally controlled transistors will be found below with reference to the discussion of FIGS. 6A and 6B. Briefly, these digitally controlled transistors may be selectively turned on to establish a signal I (CHIP BIAS) to thereby regulate a desired current level for the LED's driven by this driver chip. As may be noted in Figure 6C, circuitry for driving two LED's, i.e., LED, and LEU 3 are illustrated; it being understood that the driver chip would have appropriate circuits typified by those described below for driving say 64 of the odd-numbered LED's in an LED chip array having, for example, 128 LED's. Another driver chip on the other side of the LED chip array would be used to drive the 64 even-numbered LED's. The current through the master circuit establishes a potential V G1 on line 117. Directly in series with LED, are two transistors Q 28. 0 29 « Transistor Q 428 "-- s biased to be always conductive while transistor Q 429 is switched on and off and thus is the transistor controlling whether or not current is driven to LED, . The gate or control electrode of transistor 429 is coupled to the drain-source connection of transistors Q 426. Q 427 - When LED, is to be turned on, transistor Q 27 is made conductive and when LED t is to be turned off, transistor Q 2 i- s ma e conductive. The gate of transistor Q 426 receives a logic signal that is the inverse of that to gate Q 27 from a data driven enabling means 22 that is the circuitry of FIG. 4 which controls whether or not an LED is to be turned on and for how long. As noted above in a grey level printhead, the LED is to be turned on for a duration determined by the grey level data signals input to the printhead. Also associated with the circuitry for driving LED, , is an additional current mirror that includes two slave circuits. One slave circuit comprises transistors 0 4 20 > Q4 21 axι & Q 30- Th* 3 other slave circuit comprises transistors 0* 221 Q 23 and Q 31 . Transistors Q^o » Q^, are N-channel MOSFETS while the other transistors noted above are P-channel MOSFETS. The two additional slave circuits associated with LED ! are on continuously and assuming a nominal driving current of say ILED,-4 ma to LED, , the current through transistor Q 21 might be 1/80 ILED, and the current through transistor Q 423 might be 1/800 x ILED, . The currents through these slave circuits establishes a voltage level V G2 on line 114, which is the potential of the drain electrode of transistor Q427. In operation with transistor Q 29 turned off, transistor 0^ 6 is on and impresses approximately the voltage V cc at the gate of transistor Q 429 • When LED, is to be turned on to record a pixel (picture element), a signal is provided by the data enabling means 22 to the gate of transistor Q 427 to turn same on, while an inverse signal turns transistor Q 426 off- Before transistor Q 29 turns on, the capacitive load or change existing between its gate and substrate must be removed. When transistor Q 427 turns on, the charge on the gate terminal of transistor Q* 29 discharges through transistors Q 27 and Q 30 • This path for discharge of the gate capacitive load at transistor 0* 2 thereby provides a turn-on time not affected by the number of LED's that are sought to be simultaneously energized. The reason for this is that each control transistor corresponding to transistor Q 29 has its own respective path for discharge of its respective capacitive load. While the illustrated embodiment shows use of the additional current mirror circuit containing transistor Q 3 o for use in discharging the control electrode of the driving transistor, it will be understood that in some circuit arrangements, charging, rather than discharging, of the control electrode may be facilitated. Current through transistors Q 22 - Q 23 and Q 3 , is proportional to, i.e. mirrors, that through the master circuit because of the identical gate to source terminal biasing (V GS1 ) of transistors Q 424 an * 0 422 - Thus, current is constant in this slave circuit even though V cc from a conventional power supply varies since the potential difference V GS , between the gate and source terminal of transistor Q 422 remains constant. The current through the circuit comprised of transistors Q 422 « Q 423 anc _- Q 31 is mirrored by that through the slave circuit comprised of transistors Q 420 > Q 21 and Q 430 due to the identical gate to source biasing of transistors Q 30 , Q 431 • With a constant current being generated in the slave circuit comprised of transistors Q 42 0 > Q 21 anci Q 430 » the potential difference between the gate and source terminals of transistor Q 20 remains fixed as does that of transistor Q 21 thereby establishing a voltage level V G2 on line 114 which varies with -20- V cc although the potential difference V CC -V G2 remains constant. With the transistor Q* 29 turned on and conducting driving current to LED, during an exposure period, the voltage level V G2 is established at the gate of transistor 0* 2 v ^a now conducting transistor Q 27 . The voltage level at the source terminal of transistor Q 29 is now at a fixed threshold value above that of V G2 . Transistor Q 429 . acting as a cascode transistor and having its source terminal connected to the drain terminal of transistor Q 428. thereby establishes the drain potential of the transistor Q 28 as varying with changes in V cc . As noted above, the potential difference V G s , is constant even though V cc itself varies. The voltage relationships between the various terminals of transistor Q 28 are not affected by variations in V cc and the current to LED, during a period for recording a pixel stays constant. Thus, stability in driver current to LED, is provided since transient changes in V cc do not cause corresponding changes to the current conducted through LED, and thus do not affect the intensity level of light output by LED, . The tendency in some LED printheads for light output of an LED to diminish when other LED's are turned on can also be reduced with this circuit. As noted above, transistor Q 42 conducts current to LED, for a time period controlled by the data bits for recording an appropriate pixel. The level of current for recording this pixel is controlled by the current mirror which is responsive to the current level I(CHIP BIAS). The circuit for generating I(CHIP BIAS) will now be described. Page missing at the time of publication -22- Page missing at the time of publica t ion Page missing at the time of publication -24- Page missing at the time of publication Page missing at the time of publication -25- Page missing at the time of publication Page missing at the time of publication -28- Page missing at the time of publication Page missing at the time of publication Page missing at the time of publication Page missing at the time of publication -32- used by the LCU to provide fine adjustment of current to the LED's by changing the 8-bit local current regulating signal R* EF stored in registers R 2 in response to an algorithm relating temperature measured with signals to be fed to a respective driver chip's registers R 2 . The signal relative to temperature may also be used to adjust the data signals to regulate or correct the on-time of the LED's using pulsewidth modulation. As noted above, the LCU may calculate a new correction program based on the fall off of intensity with temperature for the LED's. This new program is then input to the PROM 16a to adjust the corrected data sent to the printhead. Note that the 65th channels on the even driver chips are also commonly connected to the input of the A/D converter 89 (FIG. 3). A reading of the voltage generated by a respective 65th driver channel on say an even-numbered driver chip is determined by having a logic high signal on the DI5 line on the even side with a corresponding low level signal on the DI5 line on the odd side since logic AND gate 101 (FIG. 5) on each driver chip passes the token bit only when the respective (odd or even) DI5 line is logic high. Description will now be made of the embodiment of FIGS. 7-9 wherein similar numbers to that of the prior embodiment relate to similar structures. In this alternative embodiment, image data and recording of same is handled in a similar way to that described above and is in accordance also with the description of U.S. Patent 4,746,941. In this example, eight bits of image data are used instead of six but the principle of operation is similar using an 8-bit comparator for determining exposure duration. During recording of one line of image data by the printhead 20, the next line of data is sent down the data bus D 0 -D 7 and is latched in consecutive order by the respective master-slave latch registers 24 in accordance with the presence of a token bit in a respective register. As noted above, the token bit is shifted down the 64-bit bidirectional token bit shift register 28 and image data on lines D 0 -D 7 is latched in a respective latch register 24. The token bit then exits the shift register and is shifted into the shift register of the next driver chip. Current monitoring is also activated during a portion of the period that the token bit is present in the driver chip's token bit shift register. A signal from the LCU is used to generate current in the 65th driver channel. The means for activation of the 65th driver channel will now be described further with reference also to FIG. 9. A latch 111 coupled with the extra, or in this example the 65th, driver channel has its output enabled or say placed logic high in response to the location of the token bit in a specific stage (N) of the token bit shift register 28. The output of token bit register stage N is coupled via the logic gates 186, 190 and 187, 191, respectively, to the preset and clear inputs of latch 111. In response to this, current flows in the 65th channel of the driver chip 40 now containing the token bit in a similar way to that described for the prior embodiment. Current to the 65th driver channel (FIG. 6D) terminates when the token bit has moved a fixed number of stages (say M stages) down the token bit shift register 28 in this same driver chip 40. In response to the token bit reaching a particular stage, N + M, the latch (111) output is disabled or cleared. The output of token bit register stage N + M is coupled via the logic gates 188, 190 and 189, 191, respectively, to the preset and clear inputs of latch 111. As may be noted in FIG. 7, the outputs of all the current monitors or 65th channels of all the odd-numbered driver chips are connected in parallel to a current to voltage converter which may be similar to that described above. These outputs are multiplexed by multiplexer 106 with the similar outputs of the current monitors to the even- umbered driver chips. An A/D converter 89 converts the analog signal which is also related to the temperature of that driver chip (and approximates the temperature of the LED's driven by that driver chip) to a digital signal that is communicated over appropriate lines to the LCU. The LCU, by keeping track of the counts of the token clock for use in shifting image data, knows which driver chip the token bit is located in and thus which driver chip's 65th channel is being activated at this time. Note that while data for recording the next line of pixels is being sent over bus lines D 0 -D and latched in appropriate master registers in response to the token bit, the previous line of pixels, whose data is stored in the slave registers of latches 24, is being printed by the LED's while the 65th channel driver channel is also activated. Note, too, that even though the token bit is shifted simultaneously down even and odd-numbered driver chips 40, for example, driver chips #1 and #2, or #3 and #4 or #55 and #56, the LCU recognizes that for a certain part of the period for which a token bit is resident within a driver chip (and for which the 65th channel monitoring is activated) the monitored current input to the multiplexer 106 must be odd. For example, and with reference to FIG. 7, when the token bit is within registers #2 through #32 of the bi-directional 64 token bit shift register 28 of say driver chip #1, the LCU is programmed to consider the current monitored signal from the A/D converter 89 as representing the current in driver chip #1, even though the token bit is simultaneously also in the driver chip #2. However, because driver chips #1 and #2 are identical and due to the bidirectional feature of the token register 28, the token bit in register #2 moves from register #64 to register #1 so that when the token bit is in one of the registers #2 through #32 on driver chip #1, it is in one of the registers #63 through #33 on chip #2. Similarly, when the token bit is in one of the registers #32 through #2 on driver chip #2, it is also simultaneously in one of registers #33 through #63 on driver chip #1. Thus, the LCU recognizes that when the token has moved 33 clock pulses into a token shift register of a driver chip (but less than 64 clock pulses) the signals generated by the A/D converter to the LCU represent current to the LED's in a driver chip that is the even-numbered driver chip of the pair of driver chips having the token bit. Additionally, a select signal is provided by the LCU to multiplexer 106, which controls which of the current signals, odd or even, is to be sent to the LCU. The overall clock token count determines which odd and even pair of driver chips the token is in. If desired, the extra current to voltage converter and analog multiplexer may be omitted as in the printhead of FIG. 3. With reference now to FIG. 10, further details of the token bit register 28 of the embodiment of FIG. 7 are shown. A token direction signal (Tdir) biases line 220 at one logic level and through inverter 221, biases line 222 at an opposite logic level. Assume that the signal Tdir biases line 220 for transmission of the token bit that travels from lef to right (Lbit) in FIG. 10. In such case, the tristate inverters 31 used for transmission of the right to left going token bit are disabled. The token bit is synchronized with pulses of the token clock (TCLK) and upon entering the driver chip, triggers the D input of the first token register of the token bit shift register to switch its outputs so that the Q output of the register is changed to enable the eight-bit latch 24 (FIG. 8) to latch the image data signals upon data bus lines D 0 -D . Upon occurrence of the next clock pulse the first token register is reset and the token bit is shifted via a tristate inverter 31 from the Q output of the first token register to the D input of the second token register. The second token register now has its Q output such that image data signals on the image data bus will be latched by the appropriate latch register associated with LED 3 . The change of the Q output of the second token register simultaneously sets latch 111 (FIG. 9) which triggers the 65th current channel (FIG. 6D) to enable transistor Q τ , to generate a current IQ T 1 which is identical to that simultaneously being driven through the LED's that are enabled for recording the prior line of pixels. The current is monitored by the LCU via A/D converter 89 and in accordance with a program in the LCU the current is related to the temperature of the driver chip. This current is monitored until the token bit reaches the 32nd token register upon which event the Q output of this register resets latch 111. With movement of the token bit into the 33rd token register of driver chip #1, the LCU commences' to monitor the current in the 65 driver channel of driver chip #2 as described above. As noted above, monitoring of the current is done first in driver chip #1 and then driver chip #2. The token bit then passes into driver chips #3 and #4 for monitoring the current in these chips as well as for latching of image data for these chips on lines D 0 -D 7 . In FIGS. 11-13, an improvement over the circuit of FIG. 10 is illustrated wherein in addition to use of the token bit for simultaneously controlling distribution of image data and use in monitoring current on driver chip temperature, there is also provided the use of the token bit for controlling the change of digital current regulation data in the driver chip just prior to recording each line of pixel data. In the embodiments described above, R R E F or V REF digital current regulation data was provided during interframe or other non-production periods when no printing was occurring. In the embodiment now to be described, the digital current regulation data is provided during printing. This allows current not only to be monitored in real time but also to be changed more promptly as required. As the same data bus is used to carry both image data signals and current regulation signals, a logic circuit 246 is provided in each driver chip to allow the circuit to discriminate between image data signals that control the pulsewidth time duration exposures used for recording the next row of image pixels or current regulation data signals which control the level of current to each LED activated during recording of the next row of pixels. Data for adjusting R^p is provided by the LCU based upon the temperature-related current signals generated by each of the respective current drivers for the 65th current channel of each driver chip. In response to these current signals, the LCU calculates a new 8-bit digital word for each driver chip to control the respective level of current in that driver chip. Simultaneously, a token bit is also generated on line Lbit and a control line labelled LD/Run is adjusted to a logic low level. In addition, the line T d j r is made a logic high level so that the logic circuit 246 has the four output lines thereof at suitable logic levels to disable the tristate inverters 31 associated with the image data token registers as well as disable the register 111 for disenabling the 65th current driver circuit. In response to the token bit input to the D input of a register 112, the Q output of this register changes to provide a load signal to the latch register 113 (FIG. 8) for loading current regulation data carried on lines D 0 -D 7 . The Q output of latch 112 is output to the Lbit input of the next driver chip so that with the next operation of the token clock, the output of Q changes. This provides the needed token pulse to the D input of the register 112 of the next driver chip. The LCU at this time has also changed the current regulation data upon lines D 0 -D 7 to be appropriate for proper regulations of current in this next driver chip. Note that because there are separate data lines for odd and even-numbered driver chips, the token bit is simultaneously applied to odd and even-numbered driver chips so that current regulation data is provided simultaneously to an odd-numbered driver chip as well as to an even-numbered driver chip. After respective current regulation data is distributed to all the driver chips, the LCU changes the LD/Run line to a logic high level and a new token bit is sent by the LCU to the first driver chips (odd and even) on the printhead for latching the image data signals on data bus lines D 0 -D 7 . With this token bit the register 111 will be set by the token bit to commence operation of the 65th channel current driver as described for the embodiment of FIGS. 7-9. Another difference in the embodiment of FIG. 11 is the use of the first token register (rather than the second token register) to commence drive to the 65th channel current driver. Other token registers may be designed for determining when the 65th channel is to be operated. It may be desirable for the LCU to have a small programmed delay as to when the LCU actually reviews the current data from the A/D converter 89 (FIG. ' 7). This delay will allow the driver current in the 65th current channel to stabilize. ADVANTAGES An improved printer apparatus has been described which provides for fine control over adjustments of current to the recording elements as well as for correction of pulsewidth durations as required for temperature compensation. There is also ensured that destructive current levels will not be generated when current to the recording elements are adjusted. The use in the embodiment of FIGS. 7-9 and 11-13 of the token bit in the token register while the token bit is also defining which latch register is to secure image data coming over the image data bus D 0 -D 7 allows current monitoring to be done during printing rather than waiting for say an interframe or other non-productive period. Thus, in response to the current (and temperature) related data obtained from each driver chip, prompt adjustment may be made by the LCU to terminate current to the LED's if an inappropriate current level is detected. In addition, if the current level is within acceptable -40- limits, prompt uniformity control is provided by adjusting or fine tuning image data to that driver chip. Image data from RIP 16 (FIG. 2) is a multibit digital signal indicating the level of grey of a pixel to be recorded by a particular LED. However, in response to a signal from the LCU regarding correction for uniformity, this multibit data signal may be adjusted to correct for say the decrease in light output by the LED's driven by this driver chip due to the higher temperatures of the LED array chip driven by this driver chip. As may be noted in FIG. 2, the odd and even data from RIP 16 may be first modified by a correction PROM 16a before this data is sent to the printhead. The correction PROM stores correction information so that an 8-bit word from RIP 16 is converted to a new 8-bit word that is corrected based on the temperature of the printhead to adjust pulsewidth duration. The LCU signals the PROM as to the correction factor based on the temperature related data provided in reading the 65th driver current channels. Thus, adjustability of the printhead to provide for uniformity is advantageously provided in several ways namely adjustment of current through use of current regulation data signals (V REF and/or R REF ) b using an image data bus during say an interframe to adjust a bias current I CHIP BIAS (FIGS. 6A, B, C and D) to the constant current driver circuits and by use of the adjustment to image data during production periods. In the embodiments of FIGS. 7-10 and 11-13, the adjustments of current are provided in a manner similar to that described for the embodiment of FIGS. 1-6. Control logic on each driver chip receives a signal indicating that it is to latch current regulation data into say an 8-bit latch which is used for local bias; i.e., this signal is particular to this driver chip. The driver chip may also receive a global bias signal V REF that is received commonly by all driver chips. This signal V REF may be analog or digital. A further improvement is provided in the embodiment of FIGS. 11-13 demonstrating that data for providing further fine tune adjustment of current can be provided during each line of recording. The described driver circuit retains the desirable feature of two-way addressability described in the prior art. That is, provision is made for digitally addressing each chip to correct for differences in light output by LED's driven by one chip versus those driven by another chip on the same printhead. These differences can arise due to processing condition differences arising during manufacture of the driver chips and for their respective driven LED's as well as nonuniformities arising from temperature differences. A second provision for digital addressability is retained to provide for global changes due to aging. By providing both addressable portions on each driver chip problems associated with noise are minimized. In addition, providing a non-digitally controlled transistor on each addressability portion simplifies calibration and allows for more accuracy in control of uniformity. The provision of a temperature compensated current source 172 advantageously and promptly increases current on a real-time basis by altering current to a series of digitally addressable transistors. This provides for instantaneous changes in current levels to the LED's for providing at least some correction for temperature excursions and thus provides an additional device for complementing the main temperature control which is provided through selection of transistors in one series of digitally addressable transistors. A printhead has also been described which provides efficient use of the electrical lines provided thereon. Multibit image data is effectively latched into appropriate registers in accordance with a token bit. Current regulation is effectively controlled using digitally addressed current regulation. Data for the image signals and current regulations are carried over the same lines, thereby reducing the need for additional lines. This reduces the number of bonding pads and connections required to be made in fabricating the printhead. While an embodiment of the invention has been described employing a single data line D15 (for say the odd-numbered driver chips) for carrying current regulating signals, it will be appreciated that multiple lines of the image data bus may be used for carrying current regulation data in parallel. Thus, there has also been described an LED printhead having an improved driving circuit for generating driving current to the recording elements that provides for turn-on times that are relatively independent of the number of recording elements turned on and further provides for constancy in light output by making the driving current insulated from changes in the driver voltage. Modifications to the circuit may, of course, be made. For example, transistors Q425 and Q423 are used effectively as resistors and may be also eliminated. While the preferred embodiment has been described in terms of MOSFET transistors that have their respective gates controlled, other devices providing an equivalent function such as bipolar or other gate controlled devices are also contemplated. Where bipolar transistors are used, transistor geometry or doping levels to respective transistors may be modified to provide the current scaling characteristics described herein. Although the invention has been described with respect to embodiment wherein an extra current driver channel is provided in each driver chip, the invention in its broader aspect contemplates that the current may be sensed in the driver channels of the recording elements. The invention has been described in detail with particular reference to preferred embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.

Claims: -44- Claims : 1. A non-impact printer apparatus comprising: a recording head having a plurality of recording elements for recording on a recording medium; driving means including a plurality of current driving channels for selectively driving said plurality of recording elements in accordance with respective image data signals; said driving means being characterized by an extra current driving channel not associated with a recording element for generating a current related to that sent to said recording elements; and means for monitoring a parameter related to said current in said extra channel. 2. The printer apparatus of Claim 1 and including means for shutting down current to the recording elements in response to sensing of a current level that is inappropriate for recording. 3. The printer apparatus of Claim 1 and including means for adjusting respective currents in a plurality of current driving channels in response to the parameter 1 related to current sensed in the extra chann l. 4. The printer apparatus of Claims 1, 2 or 3 and wherein the driving means comprises a current mirror having a master circuit and the current driving channels are slaves of said master circuit. 5. The printer apparatus of Claim 4 and including a plurality of digitally addressable transistors for changing a level of current in said master circuit. 6. The printer apparatus of Claims 1, 2 or 3 and including image data bus means for carrying image data signals; said driving means including respective data register means associated with each recording element for storing said image data signals; means for commonly connecting said data bus means to plural data register means associated with respective plural recording elements; means for generating a token bit signal; means including a multistage token bit shift register means having a plurality of respective stages for outputting sequentially at respective stages the token bit signal and for sequentially selecting a respective data register means for accepting image data signals. 7. The printer apparatus of Claim 6 and including a plurality of driver chips, each driver chip includes one of said driving means, and said apparatus further including means responsive to the token bit signal to select which driver chip's extra current driving channel current is being monitored. 8. The printer apparatus of Claim 7 and wherein the recording elements are arranged in a row; a respective multistage token bit shift register means is associated with each driver chip; the driver chips are arranged in a series of two rows of driver chips with the row of recording elements located between said two rows; means for shifting respective token bit signals simultaneously down the token bit shift register means of respective rows of driver chips; and means responsive to lodging a token bit signal in a particular stage of a multistage register associated with a respective driver chip for controlling monitoring of current in an extra current driving channel of said driver chip. 9. The printer apparatus of Claim 8 and wherein the recording elements are light-emitting diodes. 10. The printer apparatus of Claim 8 and including means for adjusting image data signals in -46- response to current sensed in an extra current driving channel. 11. The printer apparatus of Claim 1 and including means for adjusting image data signals to the recording elements in response to the parameter related to said current sensed in the extra channel. 12. The printer apparatus of Claim 1 or 11 and including means for adjusting current for driving said plurality of recording elements in response to a level of a parameter related to current sensed in the extra channel. 13. The printer apparatus of Claim 12 and wherein the driving means comprises a current mirror having a master circuit and the current driving channels are slaves of said master circuit. 14. The printer apparatus of Claim 13 and including a plurality of digitally addressable transistors for changing a level of current in said master circuit. 15. The printer apparatus of Claims 12, 13 or 14 and including image data bus means for carrying image data signals; a plurality of image data register means for storing said image data signals, a respective image data register means being associated respectively with each recording element for storing respective image data signals for enabling a respective recording element for recording; means commonly connecting said data bus means to said plurality of image data register means; means for generating a token bit signal; a multistage token bit shift register means for outputting sequentially at respective stages the token bit signal for sequentially selecting a respective image data register means for accepting image data signals. 16. The printer apparatus of Claim 15 and including a plurality of driver chips, each driver chip includes one of said driving means and said apparatus further includes means responsive to the token bit signal to select which driver chip's extra current driving channel parameter related to current is being sensed. 17. The printer apparatus of Claim 16 and wherein the recording elements are arranged in a row; a respective multistage token bit shift register means is associated with each driver chip; the driver chips are arranged in a series of two rows of driver chips with the row of recording elements located between said two rows; means for shifting respective token bit signals simultaneously down the token bit shift register means of respective rows of driver chips; and means responsive to the lodging of a token bit signal in a particular stage of a multistage register associated with a respective driver chip for controlling monitoring of a parameter related to current in an extra current driving channel of said driver chip. 18. The printer apparatus of Claim 17 and wherein the recording elements are light-emitting diodes. 19. The printer apparatus of Claim 1 and including a plurality of driver chips, each driver chip includes one of said driving means , said apparatus further includes a plurality of token bit registers wherein at least one of said registers is associated with each driver chip; means for generating a token bit signal; and means responsive to the token bit signal to select which driver chip's extra current driving channel parameter related to current is being monitored. -48- 20. The printer apparatus of Claim 19 and wherein a token bit shift register means is associated with each driver chip; the driver chips are located at opposite sides of an array of recording elements; means for shifting the token bit simultaneously down the token bit shift register means of opposing driver chips and means responsive to the position of the token bit in a particular stage controls the monitoring of the parameter related to current from one of the opposing driver chips containing a token bit. 21. The printer apparatus of Claim 7 and including means for generating current regulation data on at least one line of said image data bus means for regulating a level of current for driving recording elements and means for generating a token bit signal for selecting which driver chip is to receive the current regulation data. 22. The printer apparatus of Claim 21 and including means for generating current regulating signals during recording by said recording elements and means for disabling said data register means from accepting current regulating signals as image data signals. 23. The printer apparatus of Claim 1, the apparatus including a plurality of driver chips, each driver chip including said driving means, token bit shift register means, means for shifting a token bit down the token bit shift register means, and said monitoring means is responsive to the position of the token bit for controlling the monitoring of the parameter related to current in a particular one of the driver chips. 24. The printer apparatus of Claim 23 and wherein the recording elements are light-emitting diodes. 25. The printer apparatus of Claim 23 and including means for adjusting image data signals in response to the parameter related to current sensed in an extra current driving channel. 26. The printer apparatus of Claims 1, 3-6, 11-24 or 25 and wherein the parameter related to current is current. 27. A non-impact printer apparatus comprising: a recording head having a plurality of recording elements for recording on a recording medium; driving means for selectively driving said plurality of recording elements in accordance with respective image data signals; and characterized by means including data bus means for carrying on said data bus means multibit image data signals determining a recording duration for a recording element and for carrying on one line of said data bus means also used for carrying image data signals, a multibit digital signal used for regulating a level of current to said recording element; 28. The printer apparatus of Claim 27 and said driving means including a plurality of data register means with respective data register means being associated with each recording element for storing said image data signals; means for commonly connecting said data bus means to said plurality of data register means; means for generating a token bit signal; a multistage shift register means for outputting sequentially at respective stages the token bit signal for sequentially selecting a respective data register means for accepting image data signals; said driving means further including current regulating means for regulating a level of electrical current to each recording element, the current regulating means including means for adjusting a level of electrical current to each recording element in response to the multibit digital signal used for regulating current. 29. The printer apparatus of Claim 28 and wherein the current regulating means includes first register means including a plurality of registers for storing a multibit digital signal related to a level of current control, second register means for storing and shifting a token bit signal and means responsive to a token bit signal in said second register means for latching in an appropriate register of said first register means a digital signal found on said data bus means. 30. A non-impact printer apparatus comprising: a recording head having a plurality of recording elements for recording on a recording medium; driving means for selectively driving said plurality of recording elements in accordance with respective image data signals; said driving means including a plurality of data register means with respective data register means associated with each recording element for storing said image data signals; data bus means for carrying image data signals; means for commonly connecting said data bus means to said plurality of data register means; means for generating a token bit signal; a multistage shift register means for outputting sequentially at respective stages the token bit signal for sequentially selecting a respective data register means for accepting image data signals; said driving means further including current regulating means for regulating a level of electrical current to each recording element, the current regulating means being characterized by means for adjusting a level of electrical current to each recording element in response to a multibit digital signal; and wherein the current regulating means further includes first register means including a plurality of registers for storing digital signals related to a level of current control, second register means for storing and shifting a token bit signal, and means responsive to a token bit signal in said second register means for latching in an appropriate register of said first register means the multibit digital signal. 31. A non-impact printer apparatus used for recording, comprising: a plurality of groups of recording elements, a plurality of integrated circuit driver chips for driving respective groups of recording elements; a) first digitally addressable current-conducting means for selectively establishing a first bias voltage in response to a first multibit digital signal; b) second digitally addressable current-conducting means responsive to the first bias voltage and to a second multibit digital signal for generating a bias current and establishing a second bias voltage; c) means for selectively causing current to flow through recording elements selected for energization; and d) current mirror driver means for regulating levels of currents through said selected recording elements, the level of current being related to said second bias voltage, and characterized by wherein elements a), b), c) and d) are all on each of said driver chips. 32. The printer apparatus of Claim 31 and wherein each driver chip further includes a non-digitally addressable continuously operating current-conducting means cooperating with said first digitally addressable current-conducting means to establish an offset bias voltage level for said first bias voltage. 33. The printer apparatus of Claims 31 or 32 and wherein each driver chip further includes a non-digitally addressable continuously operating current-conducting means cooperating with said second digitally addressable current-conducting means to establish an offset bias current level for said bias current. 34. A non-impact printer apparatus comprising: a series of point-like energizable radiation sources arranged in a row; means providing data signals representing data to be printed; logic means responsive to the data signals for determining which of the point-like radiation sources are to be selected for energization; current driver means responsive to the logic means for providing electrical current to the radiation sources selected for energization, the current driver means including a master circuit including a first transistor for generating a reference current through said first transistor and a plurality of slave circuits for providing respective slave driver currents to the radiation sources selected for energization, means including (a) a plurality of individually selectively addressable current-conducting devices coupled to the master circuit, (b) first control means for selectively determining which of said plurality of devices are to be current conducting, and characterized by (c) current source means responsive to increases in temperature on the printhead for providing increased current generated by said current source means, (d) adjustable bias means coupling said current source means to said first plurality of devices to increase respective levels of currents conducted by selected ones of said first plurality of devices and responsive thereto for generating an adjusted voltage bias signal, and (e) bias responsive means responsive to an adjustment in voltage bias for increasing the reference current in response to the increase in the temperature of the printhead. 35. The printer apparatus of Claim 33 and wherein the bias responsive means includes a second plurality of individually selectively addressable current-conducting devices including terminals connected to said adjustable bias means and responsive to said adjusted voltage bias signal for generating plural currents by selected ones of said second plurality of devices, the second plurality of devices being in series with said first transistor, and second control means for selectively determining which of said second plurality of devices are to be current conducting. 36. The printer apparatus of Claim 35 and including a transistor coupled in series to said current source means that is not selectively addressable for establishing a minimum offset level for the adjusted voltage bias signal and another transistor that is not selectively addressable and is in parallel with said second plurality of devices for establishing a minimum offset reference current in response to a minimum offset level for the adjusted voltage bias signal. 37. A non-impact printer apparatus, comprising: a plurality of energizable recording elements; driving means for energizing said recording elements, said driving means including current mirror means having a master circuit means for generating a reference current and a plurality of slave circuit means for providing respective driver currents to the recording elements selected for energization; each slave circuit means including: (a) transistor switching means in series with a respective recording lement and switchable from one state to another in response to a signal and having a control electrode for controlling driver current to its respective recording element in response to the signal; (b) enabling means operating upon the control electrode for switching the switching means to allow driver current to be selectively provided to a respective recording element for a predetermined period of time; and characterized by (c) each of said slave circuit means further including its own additional slave circuit means for providing a current path for facilitating changing of the signal at the control electrode from one voltage level to another. 38. The printer apparatus of Claim 37 and including second transistor means in series with said transistor switching means for generating a first voltage signal that is input to one electrode of said transistor switching means, said first voltage signal varying with variations in said reference voltage; and said additional slave circuit means generating a second voltage signal at a control electrode of the transistor switching means that varies with the reference voltage.

Inventors: AGAR KEITH W, CHUNG JEREMY K, HADLEY MARY, KIEFFER KENNETH D, MATTERN MICHAEL WILLIAM, NG YEE SEUNG, PHAM HIEU T, POTUCEK MARTIN, SMALL JEFFREY A, AGAR, KEITH, W., CHUNG, JEREMY, K., HADLEY, MARY, KIEFFER, KENNETH, D., MATTERN, MICHAEL, WILLIAM, NG, YEE, SEUNG, PHAM, HIEU, T., POTUCEK, MARTIN, SMALL, JEFFREY, A.
Applicants: EASTMAN KODAK CO, EASTMAN KODAK COMPANY
Application year: 1991
Main classification: B41J2
IPC codes: B41J2, H04N1