Multilayer printed circuit board and manufacturing method

Abstract: A multilayer wiring board is constructed of insulating substrates (2₁ to 2₃) and circuit patterns (3₀ to 3₃) formed thereon. The circuit patterns in different layers are electrically connected with each other by way of blind holes (5₁,5₂) and/or a through hole selectively extending through the circuit patterns and the insulating substrates. The blind holes and/or the through hole have different diameters depending on the depths of the blind holes and/or the through hole in such a manner that the larger the depth, the larger the diameter. A manufacturing method for such a multilayer wiring board includes the steps of forming a mask on one surface of the multilayer substrate, the mask having a plurality of apertures registered with the blind holes and/or the through hole to be formed later, the apertures having different diameters depending on the depths of the blind holes and/or the through hole in such a manner that the larger the depth, the larger the diameter; etching a portion of the multilayer substrate corresponding to the smallest aperture with use of an abrasive powder having a particle size smaller than the diameter of the smallest aperture; and gradually etching portions of the multilayer substrate corresponding to the other apertures with use of abrasive powders having particle sizes smaller than the diameters of the other apertures, respectively; whereby the blind holes having the respectively desired depths and/or the through hole are formed in the multilayer substrate.

Description: 1. Field of the Invention The present invention relates to a multilayer wiring board and manufacturing methods therefor. More particularly, the present invention relates to a multilayer wiring board comprising a plurality of insulating substrates laminated together to form a multilayer substrate; a plurality of circuit patterns formed on both surfaces or one surface of each of the insulating substrates, the multilayer substrate being formed with a plurality of blind holes having different depths and at least one through hole or a plurality of blind holes extending selectively through the circuit patterns and the insulating substrates; and a conductive film formed on an inner circumferential surface and a bottom surface of each of the blind holes and an inner circumferential surface of the through holes, for electrically connecting the circuit pattern perforated to the circuit pattern exposed to the bottom surface of each of the blind holes and/or electrically connecting the circuit patterns perforated to each other. The present invention also relates to a manufacturing method of such a multilayer wiring board. 2. Description of Related Art In recent years, electronic equipments tend to be compact and multifunctional, and in association therewith, a high-density construction of wiring boards to be used in the electronic equipments has been progressed. The high-density construction has been realized by a so-called multilayer wiring board such that a plurality of circuit patterns are formed not only on both surfaces of a multilayer substrate constructed of a plurality of insulating substrates but also on each insulating substrate forming an inner layer, and the circuit patterns in different layers of the multilayer substrate are electrically connected with each other. A printed circuit board of this type is disclosed in US-A-4935584. The electrical connection between the circuit patterns in different two layers is realized by forming a through hole extending through the two circuit patterns and the insulating substrate interposed therebetween or forming a blind hole extending through one of the two circuit patterns and the insulating substrate and having a bottom exposed to the other circuit pattern, and by forming a conductive film on an inner circumferential surface of the through hole or on both an inner circumferential surface and the bottom of the blind hole. It is appreciated that the smaller the diameter of the through hole or the blind hole, the higher the wiring density of the wiring board. However, it is technically difficult to reduce the diameter of the through hole or the blind hole. Practically, it is impossible to form the blind hole having a diameter of 0.3 mm or less by drilling. Another method of forming such a hole by blasting an abrasive powder against the multilayer substrate is described in Japanese Patent Application No. 2-135665 filed by the present applicant. Figs. 4 and 5A to 5F show a multilayer wiring board and a manufacturing method therefor as described in this reference. Referring to Fig. 4, reference character a generally denotes a multilayer wiring board; b₁, b₂ and b₃ denote insulating substrates; c₀, c₁, c₂ and c₃ denote circuit patterns respectively formed from copper foils g₀, g₁, g₂ and g₃ on the insulating substrates b₁, b₂ and b₃. Reference characters d denote conductive films formed to provide electrical connection among the circuit patterns c₀ to c₃ through the different layers. A blind hole e₁ is formed through the circuit pattern c₀ and the insulating substrate b₁. Another blind hole e₂ is formed through the circuit pattern c₀ and the insulating substrates b₁ and b₂. A through hole f is formed through the circuit patterns c₀, the insulating substrates b₁, b₂ and b₃, and the circuit pattern c₃. The conductive films d are formed on the inner circumferential surfaces of the blind holes e₁ and e₂ and the through hole f and on the connecting portions of the circuit patterns c₀ to c₃. The multilayer wiring board a having such a construction is manufactured in the following manner. First, the insulating substrate b₂ having both surfaces on which the copper foils g₁ and g₂ are laminated is prepared (see Fig. 5A), and the copper foils g₁ and g₂ are partially removed by photoetching to form the predetermined circuit patterns c₁ and c₂ (see Fig. 5B). Then, the other insulating substrates b₁ and b₃ are laminated on both surfaces of the insulating substrate b₂ so as to fully cover the circuit patterns c₁ and c₂, and'then the copper foils g₀ and g₃ are laminated on both surfaces of such a laminated body constructed of the insulating substrates b₁, b₂ and b₃, thus forming a multilayer substrate h (see Fig. 5C). Next, the blind holes e₁ and e₂ and the through hole f are formed at predetermined positions of the multilayer substrate h in accordance with the following steps. The blind holes e₁ and e₂ are different in depth from each other. The blind hole e₁ extends through the copper foil g₀ (to be formed into the circuit pattern c₀) formed on the upper surface of the multilayer substrate h and further extends through the insulating substrate b₁ of the first layer in such a manner that the circuit pattern c₁ (formed from the copper foil g₁) formed on the upper surface of the insulating substrate b₂ is exposed to the bottom of the blind hole e₁. The blind hole e₂ is deeper than the blind hole e₁, and extends through the copper foil g₀, the insulating substrate b₁ of the first layer, and the insulating substrate b₂ of the second layer in such a manner that the circuit pattern c₂ (formed from the copper foil g₂) formed on the lower surface of the insulating substrate b₂ is exposed to the bottom of the blind hole e₂. The blind holes e₁ and e₂ and the through hole f are formed at predetermined positions of the multilayer substrate h in accordance with the following steps. First, a mask j having small apertures i₁, i₂ and i₃ of a predetermined size identical in diameter are formed on one surface of the multilayer substrate h on the side where the blind holes e₁ and e₂ are to be formed (see Fig. 5D). The apertures i₁, i₂ and i₃ of the mask j are registered with the forming positions of the blind holes e₁ and e₂ and the through hole f, respectively. Then, an abrasive powder (not shown) is blasted against the upper surface of the multilayer substrate h on which the mask j has been formed, so as to etch the portions of the multilayer substrate h corresponding to the apertures i₁, i₂ and i₃. The mask j to be employed herein is formed of such a material as not to be etched by the blasting of the abrasive powder. For example, a photosensitive urethane rubber is preferably used. The mask j is formed by first applying a photosensitive material on the entire surface of the multilayer substrate h on the side where the blind holes e₁ and e₂ are to be formed later, then irradiating ultraviolet rays through a photomask to the coating of the photosensitive material, and then selectively removing the portions of the coating to be formed into the apertures i₁, i₂ and i₃. When the abrasive powder is blasted against the upper surface of the multilayer substrate h on which the mask j has been formed, the copper foil g₀ exposed to the first aperture i₁ of the mask j and the insulating substrate b₁ disposed under the copper foil g₀ are etched by the abrasive powder to form the blind hole e₁; the copper foil g₀ exposed to the second aperture i₂ of the mask j, the insulating substrate b₁ disposed under the copper foil g₀, and the insulating substrate b₂ disposed under the insulating substrate b₁ are etched by the abrasive powder to form the blind hole e₂; and the copper foil g₀ exposed to the third aperture i₃ of the mask j, the insulating substrates b₁, b₂ and b₃, and the copper foil g₃ disposed under the insulating substrate b₃ are etched by the abrasive powder to form the through hole f (see Fig. 5E). Thereafter, copper plating is carried out on both surfaces of the multilayer substrate h, the inner circumferential surfaces and the bottom surfaces of the blind holes e₁ and e₂, and the inner circumferential surface of the through hole f, thereby forming the conductive film d for effecting electrical connection among the copper foils g₀ and g₃ and the circuit patterns c₁ and c₂ (see Fig. 5F). Finally, the copper foils g₀ and g₃ formed on the upper and lower surfaces of the multilayer substrate h are partially removed together with the conductive film d by photoetching to thereby form the circuit patterns c₀ and c₃. Thus, the multilayer wiring board a shown in Fig. 4 is completed. However, the multilayer wiring board and the manufacturing method therefor in the prior art as mentioned above have the following defects. First, in the plating step wherein a plating liquid is admitted into the blind holes e₁ and e₂ and the through hole f, the plating liquid is hard to penetrate into the deep blind hole e₂. Accordingly, a plating layer is not entirely formed on the inner circumferential surface and the bottom surface of the blind hole e₂. As a result, the electrical connection between the circuit patterns c₀ and c₂ cannot be secured. Secondly, in the blasting step wherein the abrasive powder is blasted against the upper surface of the multilayer substrate h to form the blind holes e₁ and e₂ and the through hole f, since the blind holes e₁ and e₂ and the through hole f have different depths, it is necessary to spot-blast the abrasive powder so as to individually form the blind holes e₁ and e₂ and the through hole f, or repeat the formation of the mask j and the blasting of the abrasive powder every time each of the holes is formed. As a result, much time for the blasting step is required. In the case that the difference in depth between the blind holes e₁ and e₂ is small, it is considered that both the blind holes e₁ and e₂ may be simultaneously formed because an etching rate of the insulating substrate is different from that of the copper foil. For instance, by blasting the abrasive powder to simultaneously etch the portions of the multilayer substrate h corresponding to the apertures i₁ and i₂ of the mask j, the blind hole e₁ is first formed so that the circuit pattern c₁ interposed between the insulating substrate b₁ of the first layer and the insulating substrate b₂ of the second layer may be exposed to the bottom of the blind hole e₁, and then the blasting of the abrasive powder is continued to etch the insulating substrate b₂ of the second layer until the bottom of the blind hole e₂ reaches the circuit pattern c₂ interposed between the insulating substrate b₂ of the second layer and the insulating substrate b₃ of the third layer. At this time, the bottom of the blind hole e₁, that is, the circuit pattern c₁ is also etched by the abrasive powder. However, since the etching rate of the circuit pattern c₁ (the copper foil g₁) is low, the circuit pattern c₁ is not perforated but the upper surface thereof is slightly cut out. Finally, when the circuit pattern c₂ becomes exposed to the bottom of the blind hole e₂, the blasting of the abrasive powder is stopped. Thus, the blind holes e₁ and e₂ having different depths can be formed in the multilayer substrate h in such a manner that the circuit patterns c₁ and c₂ are exposed to the bottoms of the blind holes e₁ and e₂, respectively. However, in the above case where the blind holes e₁ and e₂ having different depths are simultaneously formed, there is a possibility that the circuit pattern c₁ exposed to the bottom of the blind hole e₁ having a small depth is unduly etched or perforated under certain circumstances to cause a problem that the electrical connection by the conductive film to be formed later cannot be secured. SUMMARY OF THE INVENTION It is accordingly an object of the present invention to provide a novel multilayer wiring board which can secure electrical connection between circuit patterns formed in different layers by designing the diameters of the holes having different depths. It is another object of the present invention to provide a novel manufacturing method which can manufacture the multilayer wiring board of the present invention securely and quickly. The multilayer wiring board of the present invention is defined in claim 1. According to the multilayer wiring board of the present invention, a substance for forming the conductive film on the inner wall surfaces of the holes e.g., a plating liquid can securely penetrate into the holes even when the depths of any of the blind holes and/or the through hole are large. Accordingly, the electrical connection between the circuit patterns in the different layers farther isolated from each other can be secured. The manufacturing method for the multilayer wiring board in a first aspect of the present invention is is defined in claim 2. Moreover, the manufacturing method for the multilayer wiring board in a second aspect of the present invention is defined in claim 3. According to the first and second aspects of the manufacturing method of the present invention, the holes having different depths can be formed by using the single mask. Further, the respective required depths of the holes can be obtained without unduly etching the bottom of the blind hole having a small depth, and reliable electrical connection can therefore be obtained between the circuit patterns in the different layers through the conductive films formed on the inner wall surfaces of the holes Other objects and features of the invention will be more fully understood from the following detailed description and appended claims when taken with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is an enlarged sectional view of an essential part of the multilayer wiring board according to a first preferred embodiment of the present invention; Figs. 2A to 2H are enlarged sectional views illustrating the steps of the manufacturing method for the multilayer wiring board according to the first preferred embodiment; Figs. 3A to 3C are enlarged sectional views illustrating the steps of the manufacturing method according to a second preferred embodiment of the present invention; Fig. 4 is an enlarged sectional view of the multilayer wiring board in the prior art; and Figs. 5A to 5F are enlarged sectional views illustrating the conventional manufacturing method for the multilayer wiring board shown in Fig. 4. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS There will now be described in detail some preferred embodiments of the multilayer wiring board and the manufacturing method therefor according to the present invention. (First Preferred Embodiment) Fig. 1 shows a multilayer wiring board manufactured by the manufacturing method according to the present invention. In Fig. 1, reference numeral 1 generally designates a multilayer wiring board; 2₁, 2₂ and 2₃ designate insulating substrates; and 3₀, 3₁, 3₂ and 3₃ designate circuit patterns formed from copper foils 7₀, 7₁, 7₂ and 7₃ on the insulating substrates 2₁, 2₂ and 2₃. Reference numerals 4 designate conductive films formed to provide electrical connection among the circuit patterns 3₀, 3₁, 3₂ and 3₃ through the different layers. A blind hole 5₁ is formed through the circuit pattern 3₀ and the insulating substrate 2₁. Another blind hole 5₂ is formed through the circuit pattern 3₀ and the insulating substrates 2₁ and 2₂. A through hole 6 is formed through the circuit pattern 3₀, the insulating substrates 2₁, 2₂ and 2₃ and the circuit pattern 3₃. The conductive films 4 are formed on the inner circumferential surfaces of the blind holes 5₁ and 5₂ and the through hole 6 and on the connecting portions of the circuit patterns 3₀, 3₁, 3₂ and 3₃. The blind hole 5₂ having a large depth is larger in diameter than the blind hole 5₁ having a small depth. The through hole 6 is larger in diameter than the blind hole 52. The multilayer wiring board 1 having such a construction is manufactured in the following manner. First, the insulating substrate 2₂ having both surfaces on which the copper foils 7₁ and 7₂ are laminated is prepared (see Fig. 2A), and the copper foils 7₁ and 7₂ are partially removed by photoetching to form the predetermined circuit patterns 3₁ and 3₂ (see Fig. 2B). Then, the other insulating substrates 2 and 2₃ are laminated on both surfaces of the insulating substrate 2₂ so as to fully cover the circuit patterns 3₁ and 3₂, and then the copper foils 7₀ and 7₃ are laminated on both surfaces of such a laminated body constructed of the insulating substrates 2₁, 2₂ and 2₃, thus forming a multilayer substrate 8 (see Fig. 2C). Next, the blind holes 5₁ and 5₂ and the through hole 6 are formed at predetermined positions of the multilayer substrate 8 in accordance with the following steps. First, a mask 10 having small apertures 9₁, 9₂ and 9₃ of predetermined sizes different in diameter are formed on one surface of the multilayer substrate 8 on the side where the blind holes 5₁ and 5₂ are to be formed later (see Fig. 2D). The apertures 9₁, 9₂ and 9₃ of the mask 10 are registered with the forming positions of the blind holes 5₁ and 5₂ and the through hole 6, respectively. The first aperture 9₁ corresponding to the blind hole 5₁ having a small depth has the smallest diameter. The second aperture 9₂ corresponding to the blind hole 5 2 having a large depth is larger in diameter than the first aperture 9₁. The third aperture 9₃ corresponding to the through hole 6 is larger in diameter than the second aperture 9₂. For instance, the diameter of the first aperture 9₁ is set to 50µm; the diameter of the second aperture 9₂ is set to 100µm; and the diameter of the third aperture is set to 150µm. The mask 10 is formed of a photosensitive urethane rubber, for example. The mask 10 is formed by first applying this photosensitive material on the entire surface of the multilayer substrate 8 on the side where the blind holes 5₁ and 5₂ are to be formed, then irradiating ultraviolet rays through a photomask to the coating of the photosensitive material, and then selectively removing the portions of the coating to be formed into the apertures 9₁, 9₂ and 9₃. Thus, the mask 10 having the apertures 9₁, 9₂ and 9₃ is formed on the multilayer substrate 8. The mask 10 serves to prevent that the other portion of the multilayer substrate 8 except the portions corresponding to the apertures 9₁, 9₂ and 9₃ is etched off by blasting of abrasive powders 11₁, 11₂ and 11₃ which will be hereinafter described. The material of the mask 10 is not limited to the photosensitive urethane rubber, but it necessarily has an elasticity for rebounding the abrasive powders 11₁, 11₂ and 11₃ blasted. Further, the forming method for the mask 10 is not limited to photoetching. However, photoetching is preferable for the formation of the small apertures of 50µm, 100µm and 150µm in diameter as in this preferred embodiment since the small apertures can be formed faster and at lower costs. After thus forming the mask 10 on the multilayer substrate 8, the abrasive powder 11₁ having a particle size (20 - 30µm) smaller than the diameter (50µm) of the first aperture 9₁ is blasted against the upper surface of the multilayer substrate 8 on the side where the mask 10 has been formed, thereby forming the blind hole 5₁ in such a manner that the circuit pattern 3₁ interposed between the insulating substrate 2₁ of the first layer and the insulating substrate 2₂ of the second layer is exposed to the bottom of the blind hole 5₁ (see Fig. 2E). At this time, as the abrasive powder 11₁ also passes through the second and third apertures 9₂ and 9₃, the portions of the multilayer substrate 8 corresponding to the second and third apertures 9₂ and 9₃, that is, the forming portions for the blind hole 5₂ and the through hole 6 are also etched by the abrasive powder 11₁ to respectively form unfinished holes 12₁ and 12₂ having the same depth as that of the blind hole 5₁. In the next step, the abrasive powder 11₂ having a particle size (60 - 80µm) larger than the diameter (50µm) of the first aperture 9₁ but smaller than the diameter (100µm) of the second aperture 9₂ is blasted to etch the bottoms of the unfinished holes 12₁ and 12₂. Thus, the bottom of the unfinished hole 12₁ is etched by the abrasive powder 11₂ to form the blind hole 5₂ in such a manner that the circuit pattern 3₂ interposed between the insulating substrate 2₂ of the second layer and the insulating substrate 2₃ of the third layer is exposed to the bottom of the blind hole 5₂ (see Fig. 2F) At this time, as the abrasive powder 11₂ cannot pass through the first aperture 9₁ corresponding to the blind hole 5₁ which has already been formed, the bottom of the blind hole 5₁ is not etched by the abrasive powder 11₂. On the other hand, the bottom of the unfinished hole 12₂ corresponding to the third aperture 9₃ is etched by the abrasive powder 11₂ to form an unfinished hole 12₂' having the same depth as that of the blind hole 5₂. In the next step, the abrasive powder 11₃ having a particle size (110 - 130µm) larger than the diameter (100µm) of the second aperture 9₂ but smaller than the diameter (150µm) of the third aperture 9₃ is blasted to etch the bottom of the unfinished hole 12₂', that is, to perforate the insulating substrate 2₃ of the third layer and the copper foil 7₃ formed just under the insulating substrate 2₃, thereby forming the through hole 6 (see Fig. 2G). At this time, as the abrasive powder 11₃ cannot pass through the first and second apertures 9₁ and 9₂ respectively corresponding to the blind hole 5₁ and 5₂ which have already been formed, the bottoms of the blind holes 5₁ and 5₂ are not etched by the abrasive powder 11₃. That is, the circuit patterns 3₁ and 3₂ respectively exposed to the bottoms of the blind holes 5₁ and 5₂ are not etched by the abrasive powder 11₃. Thus, the blind holes 5₁ and 5₂ and the through hole 6 different in diameter and depth can be formed by blasting the abrasive powders 11₁, 11₂ and 11₃ different in particle size in this order. Next, the multilayer substrate 8 shown in Fig. 2G is. immersed into a copper plating liquid to carry out copper plating on the inner wall surfaces of the blind holes 5₁ and 5₂ and the through hole 6 as well as on both surfaces of the multilayer substrate 8. In general, a plating liquid is hard to penetrate into a deep blind hole. However, as the deep blind hole 5₂ in this preferred embodiment has a relatively large diameter, the copper plating liquid can be sufficiently admitted into the blind hole 5₂. Thus, the multilayer substrate 8 immersed in the copper plating liquid is plated with copper to form a copper foil 13 on both surfaces of the multilayer substrate 8 and the inner wall surfaces of the blind holes 5₁ and 5₂ and the through hole 6 (see Fig. 2H). Accordingly, the copper foil 70 formed on the upper surface of the multilayer substrate 8 is electrically connected to the circuit pattern 3₁ exposed to the bottom of the blind hole 5₁ through the copper foil 13 as the conductive film 4 formed on the inner circumferential surface and the bottom of the blind hole 5₁. Similarly, the copper foil 7₀ formed on the upper surface of the multilayer substrate 8 is electrically connected to the circuit pattern 3₂ exposed to the bottom of the blind hole 5₂ through the copper foil 13 as the conductive film 4 formed on the inner circumferential surface and the bottom of the blind hole 5₂. Further, the copper foil 7₀ formed on the upper surface of the multilayer substrate 8 is electrically connected to the copper foil 7₃ formed on the lower surface of the multilayer substrate 8 through the copper foil 13 as the conductive film 4 formed on the inner circumferential surface of the through hole 6. Finally, the copper foils 7₀ and 7₃ and the copper foils 13 formed on both surfaces of the multilayer substrate 8 shown in Fig. 2H are partially removed by photoetching to form the predetermined circuit patterns 3₀ and 3₃. Thus, as shown in Fig. 1, the multilayer wiring board 1 is obtained, in which the circuit pattern 3₀ formed on the upper surface of the multilayer substrate 8 is electrically connected to the circuit pattern 3₁ interposed between the insulating substrates 2₁ and 2₂ through the conductive film 4 formed on the inner circumferential surface and the bottom of the blind hole 5₁; the circuit pattern 3₀ formed on the upper surface of the multilayer substrate 8 is electrically connected to the circuit pattern 3₂ interposed between the insulating substrates 2₂ and 2₃ through the conductive film 4 formed on the inner circumferential surface and the bottom of the blind hole 5₂; and the circuit pattern 3₀ formed on the upper surface of the multilayer substrate 8 is electrically connected to the circuit pattern 3₃ formed on the lower surface of the multilayer substrate 8 through the conductive film 4 formed on the inner circumferential surface of the through hole 6. (Second Preferred Embodiment) Figs. 3A to 3C show a second preferred embodiment of the manufacturing method according to the present invention. While the second preferred embodiment is different in process from the first preferred embodiment, a multilayer wiring board to be manufactured by the second preferred embodiment is identical with that manufactured by the first preferred embodiment. The difference between the first preferred embodiment and the second preferred embodiment is that the order of blasting of the abrasive powders 11₁, 11₂ and 11₃ having different particle sizes in the second preferred embodiment is merely reverse to that in the first preferred embodiment. Accordingly, the following description of the second preferred embodiment will be directed primarily to this difference from the first preferred embodiment, and the same or like parts as those mentioned in the first preferred embodiment will be denoted by the same reference numerals with the detailed description thereof omitted herein. In the same manner as in the first preferred embodiment, the mask 10 is formed on the upper surface of the multilayer substrate 8. The mask 10 is formed with the small apertures 9₁, 9₂ and 9₃ having different diameters at the predetermined positions where the blind holes 5₁ and 5₂ and the through hole 6 are to be formed, respectively. For instance, the diameter of the first aperture 9₁ is set to 50µm; the diameter of the second aperture 9₂ is set to 100µm; and the diameter of the third aperture 9₃ is set to 150µm. First, the abrasive powder 11₃ having a particle size (110 - 130µm) larger than the diameter (100µm) of the second aperture 9₂ but smaller than the diameter (150µm) of the third aperture 9₃ is blasted against the upper surface of the multilayer substrate 8 on which the mask 10 has been formed, for a predetermined period of time, thereby forming an unfinished hole 14₁ having a suitable depth in the multilayer substrate 8 at the position corresponding to the third aperture 9₃ (see Fig. 3A). At this time, as the abrasive powder 11₃ cannot pass through the first and second apertures 9₁ and 9₂, the portions of the multilayer substrate 8 corresponding to the first and second apertures 9₁ and 9₂ are not etched by the abrasive powder 11₃. The depth of the unfinished hole 14₁ is decided according to required etching periods of time for the blind holes 5₁ and 5₂ and the through hole 6. For instance, it is assumed that the thickness of each of the copper foils 7₀ to 7₃ is 20µm; the thickness of each of the insulating substrates 2₁ to 2₃ is 60µm; the etching rate of each of the copper foils 7₀ to 7₃ is 5µm/min; and the etching rate of each of the insulating substrates 2₁ to 2₃ is 30µm/min. In this case, the required etching time t1 of the blind hole 5₁ becomes 6 minutes because the copper foil 7₀ formed on the upper surface of the multilayer substrate 8 and the insulating substrate 2₁ of the first layer are to be etched; the required etching time t2 of the blind hole 5₂ becomes 8 minutes because the copper foil 7₀ formed on the upper surface of the multilayer substrate 8, the insulating substrate 2₁ of the first layer, and the insulating substrate 2₂ of the second layer are to be etched; and the required etching time t3 of the through hole 6 becomes 14 minutes because the copper foils 7₀ and 7₃ formed on the upper and lower surfaces of the multilayer substrate 8 and all the insulating substrates 2₁, 2₂ and 2₃ of the first, second and third layers are to be etched. Accordingly, a required blasting time of the abrasive powder 11₃ for forming the unfinished hole 14₁ is decided as t3 - t2 = 6 minutes. In other words, the depth of the unfinished blind hole 14₁ becomes equal to the sum of the thickness of the copper foil 7₀ formed on the upper surface of the multilayer substrate 8 and the thickness of the insulating substrate 2₁ of the first layer. In the next step, the abrasive powder 11₂ having a particle size (60 - 80µm) larger than the diameter (50µm) of the first aperture 9₁ but smaller than the diameter (100µm) of the second aperture 9₂ is blasted against the upper surface of the multilayer substrate 8 for a predetermined period of time (t2 - t1 = 2 minutes) to thereby form an unfinished hole 14₂ in the multilayer substrate 8 at the position corresponding to the second aperture 9₂. The depth of the unfinished hole 14₂ becomes half the thickness of the copper foil 70 formed on the upper surface of the multilayer substrate 8 (see Fig. 3B). At this time, as the abrasive powder 11₂ cannot pass through the first aperture 9₁, the portion of the multilayer substrate 8 corresponding to the first aperture 9₁ is not etched. On the other hand, as the abrasive powder 11₂ can pass through the third aperture 9₃, the bottom of the unfinished hole 14₁ which has already been formed is etched by the abrasive powder 11₂ to thereby form an unfinished hole 14₁' having a depth corresponding to an etching time of t3 - t1 = 8 minutes. In other words, the depth of the unfinished hole 14₁' becomes equal to the sum of the thickness of the copper foil 7₀ formed on the upper surface of the multilayer substrate 8, the thickness of the insulating substrate 2₁ of the first layer, and the thickness of the insulating substrate 2₂ of the second layer. In the next step, the abrasive powder 11₁ having a particle size (10 - 30 µm) smaller than the diameter (50µm) of the first aperture 9₁ is blasted against the upper surface of the multilayer substrate 8 for a predetermined period of time (t1 = 6 minutes) to thereby etch the portion of the multilayer substrate 8 corresponding to the first aperture 9₁ by substantially the same depth as the sum of the thickness of the copper foil 7₀ formed on the upper surface of the multilayer substrate 8 and the thickness of the insulating substrate 2₁ of the first layer, thus forming the blind hole 5₁, the bottom of which is exposed to the circuit pattern 3₁ interposed between the insulating substrate 2₁ of the first layer and the insulating substrate 2₂ of the second layer (see Fig. 3C). At this time, as the abrasive powder 11₁ can pass through the second and third apertures 9₂ and 9₃, the bottoms of the unfinished holes 14₂ and 14₁' which have already been formed at the positions corresponding to the second and third apertures 9₂ and 9₃ are etched. Accordingly, the blind hole 5₂ having a depth corresponding to the etching time t2 is formed at the position corresponding to the second aperture 9₂, so that the bottom of the blind hole 5₂ is exposed to the circuit pattern 3₂ interposed between the insulating substrate 2₂ of the second layer and the insulating substrate 2₃ of the third layer. Further, the through hole 6 having a depth corresponding to the etching time t3 is formed at the position corresponding to the third aperture 9₃, so that the through hole 6 extends across the multilayer substrate 8. In this manner, by suitably controlling the respective blasting periods of time of the abrasive powders 11₃, 11₂ and 11₁ having different particle sizes, the blind holes 5₁ and 5₂ and the through hole 6 having different depths and diameters can be formed in the multilayer substrate 8. Thereafter, in the same manner as in the first preferred embodiment, copper plating is carried out on both surfaces of the multilayer substrate 8 having the blind holes 5₁ and 5₂ and the through hole 6 and on the inner wall surfaces of the blind holes 5₁ and 5₂ and the through hole 6. Then, etching is carried out on both surfaces of the multilayer substrate 8 to thereby form the desired circuit patterns 3₀ and 3₃. As a result, the multilayer wiring board 1 identical with that shown in Fig. 1 is obtained. It will be appreciated that each etching rate of the copper foil and the insulating substrate depends on the size of the abrasive powder, the blasting speed of the abrasive powder, and so on. While a difference in etching rate depending on the size of the abrasive powder has not been considered in the above preferred embodiments, it should be noted that strictly to say, the larger the size of the abrasive powder or the higher the blasting speed of the abrasive powder, the higher the etching rate. Further, although there has been illustrated in the above preferred embodiments that the two kinds of blind holes having different depths and the through hole are formed in the multilayer substrate, three or more kinds of blind holes having different depths or three or more winds of blind holes having different depths and through holes may be formed in a multilayer substrate having four or more layers according to the present invention. In addition, it is to be noted that the specific values of size, time, etc. mentioned in the above preferred embodiments are merely illustrative and that they are not to be construed as limiting the scope of the present invention.

Claims: A multilayer wiring board comprising a plurality of insulating substrates (2₁ to 2₃) laminated together to form a multilayer substrate; a plurality of circuit patterns (3₀ to 3₃) formed on both surfaces or one surface of each of said insulating substrates, said multilayer substrate being formed with either a plurality of blind holes (5₁, 5₂) having different depths and at least one through hole (6) or a plurality of blind holes extending selectively through said circuit patterns and said insulating substrates; and a conductive film (4) formed on an inner circumferential surface and a bottom surface of each of said blind holes and/or an inner circumferential surface of said through hole, for electrically connecting said circuit pattern perforated to said circuit pattern exposed to the bottom surface of each of said blind holes and/or electrically connecting said circuit patterns perforated to each other; wherein either said plurality of blind holes and said at least one through hole or said plurality of blind holes have different diameters depending on the depths of said blind holes and said through hole in such a manner that the larger the depth, the larger the diameter. A manufacturing method for a multilayer wiring board according to claim 1; said manufacturing method comprising the steps of: forming a mask on one surface of said multilayer substrate, said mask (10) having a plurality of apertures (9₁, 9₂, 9₃) registered with said blind holes (5₁, 5₂) and said at least one through hole (6) to be formed later, said apertures having different diameters depending on the depths of said blind holes and said at least one through hole in such a manner that the larger the depth, the larger the diameter; blasting an abrasive powder (11₁) having a particle size smaller than the diameter of a smallest one (5₁) of said apertures of said mask against said one surface of said multilayer substrate on which said mask is formed, so as to form a shallowest one of said blind holes at a position corresponding to said smallest aperture and simultaneously form unfinished holes having the same depth as that of said shallowest blind hole at positions corresponding to the other apertures; blasting an abrasive powder (11₂) having a particle size larger than the diameter of said smallest aperture (5₁) but smaller than the diameter of a second smallest one (5₂) of said apertures against said one surface of said multilayer substrate on which said mask is formed, so as to form a second shallowest one of said blind holes at the position corresponding to said second smallest aperture; and finally blasting an abrasive powder (11₃) having a particle size larger than the diameter of a second largest one of said apertures but smaller than the diameter of a largest one of said apertures against said one surface of said multilayer substrate on which said mask is formed, so as to form a deepest one of said blind holes or said at least one through hole (6) at the position corresponding to said largest aperture; whereby said blind holes and said at least one through hole are stepwise formed in said multilayer substrate at the positions corresponding to said apertures of said mask in the increasing order of the diameters of said apertures. A manufacturing method for a multilayer wiring board according to claim 1, said manufacturing method comprising the steps of: forming a mask (10) on one surface of said multilayer substrate (8), said mask having a plurality of apertures (9₁, 9₂, 9₃) registered with said blind holes and said at least one through hole to be formed later, said apertures having different diameters depending on the depths of said blind holes and said at least one through hole in such a manner that the larger the depth, the larger the diameter; blasting an abrasive powder (11₃) having a particle size smaller than the diameter of a largest one (9₃) of said apertures of said mask but larger than the diameter of a second largest one (9₂) of said apertures against said one surface of said multilayer substrate on which said mask is formed, so as to form an unfinished hole having a depth smaller than a desired depth at the position corresponding to said largest aperture; blasting an abrasive powder (11₂) having a particle size smaller than the diameter of said second largest aperture (9₂) but larger than the diameter of a third largest one (9₁) of said apertures against said one surface of said multilayer substrate on which said mask is formed, so as to form an unfinished hole having a depth smaller than a desired depth at the position corresponding to said second largest aperture and simultaneously etch a bottom surface of said unfinished hole formed at the position corresponding to said largest aperture; finally blasting an abrasive powder (11₁) having a particle size smaller than the diameter of a smallest one (9₁) of said apertures against said one surface of said multilayer substrate on which said mask is formed, so as to form a shallowest one of said blind holes at the position corresponding to said smallest aperture; whereby said blind holes and said at least one through hole are gradually formed in said multilayer substrate at the positions corresponding to said apertures of said mask in the decreasing order of the diameters of said apertures in such a manner that at the same time when said shallowest blind hole is completed, the other blind holes and said at least one through hole are completed. The multilayer wiring board according to claim 1, characterized by : a first insulating substrate (2₁); a second insulating substrate (2₂) laminated under said first insulating substrate (2₁); a third insulating substrate (2₃) laminated under said second insulating substrate (2₂); a first circuit pattern (30) formed on an upper surface of said first insulating substrate; a second circuit pattern (3₁) formed on an upper surface of said second insulating substrate; a third circuit pattern (3₂) formed on a lower surface of said second insulating substrate; a fourth circuit pattern (3₃) formed on a lower surface of said third insulating substrate; said first circuit pattern (3₀) and said first insulating substrate (2₁) being formed with a first blind hole (5₁) having a depth corresponding to the total thickness of said first circuit pattern and said first insulating substrate; said first circuit pattern, said first insulating substrate, and said second insulating substrate being formed with a second blind hole (5₂) having a depth corresponding to the total thickness of said first circuit pattern, said first insulating substrate, and said second insulating substrate; said first circuit pattern, said first insulating substrate, said second insulating substrate, said third insulating substrate, and said fourth circuit pattern being formed with a through hole (6) having a depth corresponding to the total thickness of said first circuit pattern, said first insulating substrate, said second insulating substrate, said third insulating substrate, and said fourth circuit pattern; a first conductive film (4) formed on an inner circumferential surface and a bottom surface of said first blind hole, for electrically connecting said first circuit pattern to said second circuit pattern; a second conductive film (4) formed on an inner circumferential surface and a bottom surface of said second blind hole, for electrically connecting said first circuit pattern to said third circuit pattern; and a third conductive film (4) formed on an inner circumferential surface of said through hole; wherein a diameter of said second blind hole is larger than that of said first blind hole, and a diameter of said through hole is larger than that of said second blind hole. A manufacturing method for a multilayer wiring boards according to claim 4. said manufacturing method comprising the steps of: forming said second and third circuit patterns (3₁, 3₂) on said upper and lower surfaces of said second insulating substrates (2₂), respectively; laminating said first and third insulating substratesjon said upper and lower surfaces of said second insulating substrates (2₂), respectively, in such a manner that said second circuit patterns (3₁) is interposed between said first and second insulating substrates (2₁, 2₂), and said third circuit pattern (3₂) is interposed between said second and third insulating substrates (2₂, 2₃) forming an upper conductor layer (7₀) on said upper surface of said first insulating substrate and a lower conductor layer (7₃) on said lower surface of said third insulating substrate; forming a mask (10) on said upper conductor layer, said mask having a first aperture (9₁) having a diameter equal to that of said first blind hole (5₁), a second aperture (9₂) having a diameter equal to that of said second blind hole (5₂), and a third aperture having a diameter equal to that of said through hole; blasting an abrasive powder (11₁) having a particle size smaller than the diameter of said first aperture against said mask to form said first blind hole (5₁) at a position registered with said first aperture and simultaneously form first and second unfinished holes each having a depth equal to that of said first blind hole at positions respectively registered with said second and third apertures; blasting an abrasive powder (11₂) having a particle size larger than the diameter of said first aperture but smaller than the diameter of said second aperture against said mask to form said second blind hole (5₂) from said first unfinished hole at the position registered with said second aperture and simultaneously form a third unfinished hole having a depth equal to that of said second blind hole from said second unfinished hole at the position registered with said third aperture; blasting an abrasive powder (11₃) having a particle size larger than the diameter of said second aperture but smaller than the diameter of said third aperture against said mask to form said through hole (6) from said third unfinished hole at the position registered with said third aperture; and forming said first conductive film (4) on the inner circumferential surface and the bottom surface of said first blind hole, said second conductive film (4) on the inner circumferential surface and the bottom surface of said second blind hole, and said third conductive film (4) on the inner circumferential surface of said through hole. A manufacturing method for a multilayer wiring board according to claim 4. said manufacturing method comprising the steps of: forming said second and third circuit patterns (3₁, 3₂) on said upper and lower surfaces of said second insulating substrate (2₂), respectively; laminating said first and third insulating substrates (2₁,2₃) on said upper and lower surfaces of said second insulating substrate, respectively, in such a manner that said second circuit pattern (3₁) is interposed between said first and second insulating substrates, and said third circuit pattern (3₂) is interposed between said second and third insulating substrates; forming an upper conductor layer (7₀) on said upper surface of said first insulating substrate and a lower conductor layers (7₃) on said lower surface of said third insulating substrate; forming a mask (10) on said upper conductor layer, said mask having a first aperture (9₁) having a diameter equal to that of said first blind hole, a second aperture (9₂) having a diameter equal to that of said second blind hole, and a third aperture (9₃) having a diameter equal to that of said through hole; blasting an abrasive powder (11₃) having a particle size smaller than the diameter of said third aperture but larger than the diameter of said second aperture against said mask to form a first unfinished hole having a depth smaller than that of said through hole at the position registered with said third aperture; blasting an abrasive powder (11₂) having a particle size smaller than the diameter of said second aperture but larger than the diameter of said first aperture against said mask to form a second unfinished hole having a depth smaller than that of said second blind hole at the position registered with said second aperture and simultaneously form a third unfinished hole having a depth smaller than that of said through hole from said first unfinished hole at the position registered with said third aperture; blasting an abrasive powder (11₁) having a particle size smaller than the diameter of said first aperture against said mask to form said first blind hole at the position registered with said first aperture and simultaneously form said second blind hole from said second unfinished hole at the position registered with said second aperture and said through hole from said third unfinished hole at the position registered with said third aperture; and forming said first conductive film (4) on the inner circumferential surface and the bottom surface of said first blind hole, said second conductive film (4) on the inner circumferential surface and the bottom surface of said second blind hole, and said third conductive film (4) on the inner circumferential surface of said through hole.

Inventors: TAMURA TOSHIO, YASUDA NOBUYUKI, TAMURA, TOSHIO, YASUDA, NOBUYUKI
Applicants: SONY CORP, SONY CORPORATION
Application year: 1991
Main classification: H05K1
IPC codes: H05K3, H05K1