Method of adaptively setting decision thresholds in a receiver for multilevel digital signals

Abstract: In order to make a decision on the logic value of the output symbol, the receiver for multivalued digital signals comprises a comparator circuit 3 for comparing the input signal to a plurality of decision thresholds. The decision thresholds are derived from the received signal by generating a regenerated signal which is proportional to the decision thresholds and comparing this generated signal in the adaptation circuit 17 to the input signal and, on the basis of the result of this comparison, adapting the decision thresholds by applying a positive or a negative voltage to the input of the integrator 24. In order to avoid that erroneous decisions on the logic value of the output symbol lead to misadaptations of the decision thresholds, the adaptation of the decision thresholds is prevented should this adaptation be erroneous. Should the adaptation be erroneous, the output of the exclusive-OR gate 21 becomes equal to 1 as a result of which switch 23 is moved to state a so that the input signal of the inverting integrator becomes equal to 0 and the decision thresholds remain constant.

Description: The invention relates to a receiver for multivalued digital signals which comprises comparing means comparing the value of an input signal relative to a reference value to a number of decision thresholds and generating an output symbol as a result of this comparison, which receiver includes means for producing a regenerated signal on the basis of the output symbol and the decision thresholds, which receiver includes means for generating an error signal on the basis of the difference between the absolute value of the input signal relative to the reference value and the absolute value of the regenerated signal and which receiver includes reference means for deriving the decision thresholds from the error signal. A receiver of this type is known from published European Patent Application No. EP 0 157 598. Generally, a receiver of this type is used for data transmission by means of, for example, a landline connection or a radio link. To optimally utilize the transmission medium, transmission codes are often used in which the data signal can assume more than two levels. These signal levels usually have equidistant amplitudes and are defined with respect to a reference value which is often equal to 0. An example of such a code is the 2B1Q code in which the logic value of each symbol may assume one of the values +3, +1, -1 or -3. The associated physical signal levels may, for example, be equal to +15 volts, +5 volts, -5 volts and -15 volts. Because the length of the transmission path and hence the signal loss on the transmission path may vary considerably, the amplitude of the received input signal at the receiver may show considerable variations for different situations. However, the receiver is to be able to connect the physical signal value associated to a symbol with the logic value of that symbol despite the considerably varying amplitude. In the prior-art receiver known from said European Patent Application, the decision on the logic value of the output symbol is made by means of a comparison of the value of the input signal to a number of equidistant decision thresholds. In order to minimize the probability of an erroneous decision, the decision thresholds are to have a value equal to the mean value of two adjacent-amplitude signal levels so that the distance from the decision thresholds to the two adjacent signal levels is equally large. In the code of said example the optimum values of the decision thresholds are equal to +10 volts, 0 and -10 volts. Since the amplitude of the input signal at the receiver is not a predetermined one, the optimum value of the decision thresholds cannot be predetermined ones either and, therefore, this optimum value is to be derived from the input signal. This is effected by deriving a regenerated signal from the logic value of the output symbol valid at a specific instant and the values of the decision thresholds valid at that instant, which regenerated signal is ideally equal to the physical value of the input signal. The regenerated signal is equal to the product of the logic value of the output symbol valid at a specific instant and half the absolute value of the difference between two decision thresholds valid at that instant. In order to verify whether the regenerated signal has the correct value, the difference is determined between the physical value of the input signal and the regenerated signal. In order to reduce a difference between the actual and optimum values of the decision thresholds, the absolute values of the decision thresholds are enhanced or reduced respectively, in small steps if the regenerated signal is smaller or larger respectively, than the physical value of the input signal. Adjustments of the decision thresholds are made in small steps in order to avoid the decision thresholds fluctuating strongly due to occasional disturbances of the input signal as a result of noise, crosstalk and so on. The method of adapting the decision thresholds in the prior-art receiver poses a problem in that erroneous decisions on the value of the received symbol may lead to misadaptations of the decision thresholds as will be clarified with the aid of the following numerical example. For this purpose, it is assumed that the input signal is a four-value signal having the logic values +3, +1, -1 and -3 and the physical values +15 volts, +5 volts, -5 volts and -15 volts. It is also assumed that the present decision thresholds in the receiver are equal to -4 volts, 0 volts and +4 volts, which values in an absolute sense are too low because the physical value of the symbol having the logic value +1 is 5 volts. If the transmitter has transmitted a +1 symbol, the input signal of the receiver will be equal to +5 volts. Since the maximum decision threshold in the receiver is equal to 4 volts, the receiver will make the wrong decision that the logic value of the received symbol is equal to +3. The valid regenerated signal will now be equal to 6 volts (+3*4volts/2). As the absolute value of the regenerated signal now exceeds the absolute value of the input signal, it is assumed that the absolute value of the decision thresholds is too high and this absolute decision threshold value will be lowered, although it is already too low. A similar misadaptation of the absolute value of the decision thresholds may also occur with too high an absolute value of the decision threshold. The misadaptations of the decision thresholds may lead to a constant or lengthy erroneous symbol detection as a result of which the receiver will not operate properly or only after a lengthy adjusting time. It is an object of the invention to provide a receiver as set out in the preamble in which it no longer happens that the receiver does not start to operate properly or only after a lengthy adjusting time due to misadaptations of the decision thresholds. For this purpose, the receiver is characterised in that the receiver comprises classification means classifying the output symbol into a plurality of categories on the basis of the logic value of the output symbol and in that the receiver includes means for adapting or not adapting the decision thresholds in dependence on the category in which the output symbol is placed. The invention is based on the innovative idea that it is certain for each output symbol which direction of adaptation of the decision thresholds might be erroneous and which direction of adaptation is certainly correct. On the basis of the possibly erroneous direction of adaptation belonging to an output symbol, this output symbol may be placed in one of the categories which have each their own way of adapting the decision thresholds. Adaptations which may be erroneous will now be disregarded; only those adaptations will be made which are definitely correct. A possible classification into categories may be realised by characterising the receiver in that the output symbol will be placed in a first category if the absolute value of the output symbol is equal to the maximum logic value the output symbol may assume and in that the symbol will be placed in a second category if the absolute value of the output symbol has the minimum positive logic value the output signal may assume and in that all further output symbols will be placed in a third category. Owing to these measures, symbols for which only an erroneous decision threshold reduction is possible, are placed in the first category. For that matter, if an erroneous decision on the received symbol leads to an output symbol having an absolute value equal to the maximum absolute value the output symbol may assume, the decision thresholds will be too low and a misadaptation of the decision thresholds will take place only if the decision thresholds are reduced. The output symbols for which only an erroneous decision threshold increase is possible are placed in the second category. For that matter, if an erroneous decision on the value of the output symbol leads to an output symbol having an absolute value equal to the minimum positive absolute value the output symbol may assume, the decision thresholds will be too high and a misadaptation of the decision thresholds will only be effected if the decision thresholds are increased. By suitably selecting the adaptation of the decision thresholds for the two categories, all misadaptations of the decision thresholds may then be avoided. The symbols for which both an erroneous decision threshold increase and an erroneous decision threshold reduction is possible are placed in the third category. The absolute value of these symbols is comprised between the absolute values of the symbols placed in the categories 1 and 2. An alternative classification is obtained by characterising the receiver in that the output symbol will be placed in a first category if the absolute value of the output symbol is equal to the maximum logic value the output symbol may assume and in that the output symbol will be placed in a second category if the absolute value of the output symbol has the minimum positive logic value it may assume and in that part of the further output symbols will be placed in the first category and the rest of the further output symbols will be placed in the second category. Owing to these measures there are no more than two categories so that the classification means may have a simpler structure. By implementing these measures the symbols for which only an erroneous reduction of the decision thresholds is possible are placed in category 1 and the symbols for which only an erroneous increase of the decision thresholds is possible are placed in category 2. For the symbols in these categories any misadaptations of the decision thresholds can be avoided. The symbols for which both an erroneous reduction and an erroneous increase of the decision thresholds is possible may be placed in the two categories alike because, if there are no more than two categories, only an erroneous increase of the decision thresholds (category 2) or an erroneous reduction (category 1) of the decision thresholds can be avoided. A specific embodiment is obtained in that the receiver can be characterised in that equally many output symbols are placed in both the first and second categories. As a result of the symmetry thus obtained, the decision thresholds will be adapted on average as often according to the adaptation method belonging to category 1 as according to the adaptation method belonging to category 2. Hence it is possible to adapt the decision thresholds equally rapidly when their values are too high or too low. Decision threshold adaptation is obtained by characterising the receiver in that with a first category output symbol the decision thresholds will be increased if the absolute value of the regenerated signal is smaller than the absolute value of the input signal relative to the reference value and in that the decision thresholds will be maintained at the same level if the absolute value of the regenerated signal is greater than the absolute value of the input signal relative to the reference value and in that with a second category output symbol the decision thresholds will be reduced if the absolute value of the regenerated signal is greater than the absolute value of the input signal relative to the reference value and in that the decision thresholds will be maintained at the same level if the absolute value of the regenerated signal is smaller than the absolute value of the input signal relative to the reference value. Consequently, if the received symbol is placed in the first category, the decision thresholds will never be reduced. Thus, an erroneous reduction of these decision thresholds is avoided. Alternatively, if the received symbol is placed in the second category, the decision thresholds will never be increased so that an erroneous increase of the decision thresholds is avoided. A particular embodiment is obtained by characterising the receiver in that the decision thresholds will be maintained at a constant level if the output symbol is placed in the third category. The use of this embodiment results in avoiding all misadaptations of the decision thresholds due to erroneous decisions with respect to the received symbol because there are no misadaptations for the symbols placed in categories 1 and 2 and because no adaptations whatsoever are made for the symbols placed in category 3. An additional advantage will be obtained by characterising the receiver in that the receiver comprises adaptive signal conditioning means of which the adaptation will be blocked if the decision thresholds are maintained at a constant level. The advantage obtained in this respect is that if the decision thresholds are kept constant, which implies that the received symbol may be erroneous, any misadaptation of the adaptive signal conditioning means will be omitted. The invention will be further explained with reference to the drawing Figures, in which: Fig. 1 shows an exemplary embodiment of a receiver according to the invention for a four-value signal, in which the decision thresholds are obtained by means of analog circuits; Fig. 2 shows a Table of the possible values of the output signals x and y of the receiver as shown in Fig. 1 with the associated received symbols and states S of a switch 16 shown in Fig. 1; Fig. 3 shows a simplified block diagram of a receiver according to the invention for a six-value signal, in which the decisions on the received symbol and the generation of the decision thresholds are made by means of a programmable processor; Fig. 4 shows a flow chart of a program for a programmable processor which makes the decision on the received symbol and provides the generation of the decision thresholds; Fig. 5 is a graph depicting the decision threshold deviations relative to their optimum values plotted against time, both for the prior-art receiver and for the receiver according to the invention. In the receiver as shown in Fig. 1 the input signal is applied to the positive input of a subtracter 1 and to the input of a low-pass filter 2. The output of the low-pass filter 2 is connected to the negative input of the subtracter 1. The output signal of the subtracter 1 is applied to a comparator circuit 3 in which this signal is applied to the positive inputs of three comparators 4, 5 and 6. The output signal of the subtracter 1 is in addition applied to an adaptation circuit 17 in which this signal is applied to the positive inputs of the comparators 18 and 19. The threshold voltages 2V r and -2V r coming from a reference circuit 8 are applied to the negative inputs of the comparators 4, 5 and 6. The outputs of the comparators 4 and 6 are connected to the inputs of an exlusive-OR gate 7. The output of the exclusive-OR gate 7 and the output of the comparator 5 together form the outputs of the receiver presenting output signals x and y. The signals x and y are further applied to two control inputs of a selector switch 16 of which a contact a is connected to the output of an operational amplifier 9, a further contact b is connected to the junction of resistors 11 and 12, a further contact c is connected to the junction of resistors 13 and 14 and a fourth contact d is connected to the output of an inverting integrator 24. The central contact of switch 16 is connected to the negative input of the comparator 18. The negative input of the comparator 19 is connected to a zero potential. The outputs of comparators 18 and 19 are connected to the inputs of an exclusive-OR gate 20. The output of the exclusive-OR gate 20 is connected to the control input of a change-over switch 22 and to an input of an exclusive-OR gate 21. The second input of exclusive-OR gate 21 is connected to the output of the exclusive-OR gate 7. The output of the exclusive-OR gate 21 is connected to the control input of the change-over switch 23. The positive supply voltage +Vdd is applied to a contact a of the change-over switch 22 and the negative supply voltage -Vdd is applied to a contact b of the change-over switch 22. The central contact of the change-over switch 22 is connected to a contact b of a change-over switch 23, while a contact a of the change-over switch 23 is connected to the zero potential. The central contact of change-over switch 23 is connected to the input of the inverting integrator 24 comprising a resistor 25, a capacitor 26 and an operational amplifier 27. The input of the inverting integrator 24 is constituted by one side of the resistor 25, whereas the other side of resistor 25 is connected to the inverting input of the operational amplifier 27. This inverting input is also connected to one side of the capacitor 26. The other side of the capacitor 26 is connected to the output of the operational amplifier 27, which output likewise constitutes the output of the integrator 24. The non-inverting input of the operational amplifier 27 is connected to the zero potential The output of the inverting integrator 24 is connected to the input of the reference circuit 8 in which this output is connected to a resistor chain consisting of mutually equal resistors 10, 11, 12, 13, 14 and 15. The junction between the resistors 12 and 13 is connected to the inverting input of an operational amplifier 9. The non-inverting input of operational amplifier 9 is connected to the zero potential. The voltage -2V r is available at the junction of the resistors 10 and 11. The voltage -V r is available at the junction of the resistors 11 and 12. The voltage V r is available at the junction of the resistors 13 and 14. The voltage 2V r is available at the junction of the resistors 14 and 15. In Fig. 1 it is assumed that the input signal is a four-value signal having the symbol values -3, -1, +1 and +3, which is symmetrical around a reference value, and in which the symbols occur equally often on average. The reference value of the input signal is determined by the low-pass filter 2. By subtracting this reference value from the input signal by means of subtracter 1, a symmetrical signal having a mean value 0 is obtained. This symmetrical signal is applied to the comparator circuit 3 in which three comparators compare this signal to threshold voltages 2V r , 0 and -2V r derived from a reference signal (3V r ) by means of the reference circuit 8. V r has a positive value in this respect. The output signal of the comparators will be equal to logic value "1" if the voltage on the positive input is larger than the voltage on the negative input and will be equal to logic value "0" if the voltage on the positive input is smaller than the voltage on the negative input. If the symmetrical signal is smaller than -2V r , the output signals of the comparators 4, 5 and 6 will be equal to logic value "0". Because the outputs of the comparators 4 and 6 are connected to the input of the exclusive-OR gate 7, the output signal of the exclusive-OR gate 7 and thus the signal x will be equal to the logic value "0". The output signal y will also be equal to the logic value "0". Now it is decided that the output symbol is equal to -3. If the symmetrical signal is larger than -2V r but smaller than 0, the output signals of the comparators 4 and 5 will be equal to logic value "0" and the output signal of the comparator 6 will be equal to the logic value "1". Since the input signals of the exclusive-OR gate 7 are now different, the output signal x will be equal to logic value "1". The output signal y will be equal to logic value "0". The output symbol is now decided to be equal to -1. If the symmetrical signal is larger than 0 but smaller than 2V r , the output signals of the comparators 5 and 6 will be equal to logic value "1" and the output signal of comparator 4 will be equal to logic value "0". The signal x will now be equal to logic value "1". The output signal y will also be equal to logic value "1". The output symbol is now decided to be equal to +1. If the symmetrical signal is larger than 2V r , the output signals of the comparators 4, 5 and 6 will be equal to logic value "1". The output signal x will be equal to logic value "0" whereas the output signal y will be equal to logic value "1". The output symbol is now decided to be equal to +3. In the Table shown in Fig. 2 the logic value of the outputs x and y is represented as a function of the output symbol. The output signals x and y are also applied to the control inputs of the selector switch 16. Table 2 likewise represents the state which selector switch 16 has assumed in response to the signals x and y. If a symbol -3 is received, the switch 16 will have assumed state a and a regenerated signal -3V r will be available at the central contact. If a symbol -1 is received, the switch 16 will have assumed state b and a regenerated signal -V r will be available at the central contact. If a symbol +1 is received, the switch 16 will have assumed state c and a regenerated signal V r will be available at the central contact. With a received symbol +3 a regenerated signal 3V r will be available at the central contact. In the adaptation circuit 17 the regenerated signal is compared to the symmetrical signal by means of the comparator 18. If the symmetrical signal is larger than the regenerated signal, the output signal of the comparator 18 will be equal to logic value "1". If the symmetrical signal is smaller than the regenerated signal, the output signal of the comparator 18 will be equal to logic value "0". If the symmetrical signal is larger than 0, the output signal of the comparator 19 will be equal to "1" and if the symmetrical signal is smaller than 0 the output signal of the comparator 19 will be equal to logic value "0". In the case where the symmetrical signal is larger than the regenerated signal and is positive, or smaller than the regenerated signal and also negative, the output signal z of the exclusive-OR gate 20 will be equal to logic value "0" as a sign that the reference signal is to be increased. In the case where the symmetrical signal is smaller than the regenerated signal and also positive or where the symmetrical signal is larger than the regenerated signal and also negative, the output signal z of the exclusive-OR gate 20 will be equal to logic value "1" as a sign that the reference signal is to be reduced. The switch 22 will have assumed state a if the output signal z of the exclusive-OR gate 20 is equal to logic value "1" and will have assumed state b if the output signal z of the exclusive-OR gate 20 is equal to logic value "0". If the switch 23 has assumed state b, the input of the inverting integrator 24 will be connected to the positive supply voltage and the reference signal and the decision thresholds will be reduced if the output signal z of the exclusive-OR gate 20 is equal to logic value "1". If the output signal z of the exclusive-OR gate 20 is equal to logic value "0", the input of the inverting integrator 24 will be connected to the negative supply voltage and the reference signal and decision thresholds will be increased. According to the innovative idea the received symbols -3 and +3 can be placed in a first category and the received symbols -1 and +1 in a second category, while in category 1 a reduction of the reference signal is prevented as is an increase of the reference signal in category 2. This reduction is prevented by enabling the switch 23 to assume state a by applying a logic "1" signal to its control input so that the input voltage of the inverting integrator 24 becomes equal to 0 so that the reference signal remains constant. From the Table in Fig. 2 it follows that if a received symbol is placed in the first category, the signal x will be equal to logic value "0" and if the received symbol is placed in the second category the signal x will be equal to logic value "1". The output signal of the exclusive-OR gate 21 will be equal to logic value "1" as a sign that the adaptation of the reference signal is to be prevented if the received symbol is placed in category 1 (x=0) and the output signal of the exclusive-OR gate 20 shows a reduction of the reference signal (z=1) and if the received symbol is placed in category 2 (x=1) and the output signal of the exclusive-OR gate 20 shows an increase of the reference signal (z=0). The inverting integrator 24 comprises a resistor 25, a capacitor 26 and an operational amplifier 27. According to a well-known property of a feedback operational amplifier, the operational amplifier 27 provides that the voltage difference between its inputs remains equal to 0. Consequently, the current i flowing through the resistor 25 will also flow through capacitor 26 and charge capacitor 26 so that, at the output of the operational amplifier 27, there will be an output voltage which is proportional to the integrated value of the current i and thus also proportional to the integrated value of the input voltage of the integrator 24. The reference circuit 8 generates from the reference signal (3V r ) the threshold voltages -2V r , 0 and 2V r which are necessary for the comparator circuit 3 and the voltages -3V r , -V r , V r and 3V r which are necessary for generating the regenerated symbol. Since the operational amplifier 9 will cause the difference voltage between its input terminals to be equal to 0, the voltage at the junction of resistors 12 and 13 will be equal to 0. If it is assumed that the switch 16 does not form any load to the chain of resistors, an identical current will flow through resistors 10, 11, 12, 13, 14 and 15 and, consequently, there will also be an identical voltage across these resistors. The voltage across each one of these resistors is equal to V r . The desired voltages 3V r , 2V r , V r , 0, -V r , -2V r and -3V r will then be available at the junctions between the resistors. In the receiver as shown in Fig. 3 the input signal is applied to an analog-to-digital converter 30. Also a clock signal is applied to the analog-to-digital converter 30 at a rate 1/T. The output of the analog-to-digital converter 30 is connected to adaptive signal conditioning means 31 in this exemplary embodiment consisting of a decision feedback intersymbol interference canceller 31. The output of the canceller 31 is connected to an input of a symbol detector 32. At the output of the symbol detector 32 the output symbol C is available. The symbol detector 32 also has a second output connected to canceller 31. In Fig. 3 the input signal is applied to the analog-to-digital converter 30 to sample the analog input signal at a rate equal to the symbol rate 1/T and to convert the analog input signal into a digital signal so that the further signal processing may be effected in digitized form. The output samples of the analog-to-digital converter 30 are applied to the adaptive decision feedback intersymbol interference canceller 31 which reproduces in response to the received symbols the intersymbol interference present in the received signal, and then subtracts this reproduced intersymbol interference from the received signal. Consequently, at the output of the intersymbol interference canceller 31 a signal is available which is substantially free from intersymbol interference as a result of which a better decision on the logic value of the received symbol is possible. The output signal of the canceller 31 is applied to a symbol detector 32. The symbol detector 32 may be realised by means of a signal processor of the type PCB5010. The function of the symbol detector 32 is realised by means of a program for a processor of this type whose flow chart is shown in Fig. 4 in which the numbered instructions have the connotations as indicated in the Table below. In Fig. 4 it is assumed that the input signal is a six-value signal that has the symbol values -5, -3, -1, +1, +3 and +5 and has a mean value 0. When the program is started, in instruction 42 all variables used are set to zero to obtain a clearly defined initial condition. In instruction 43 the variable REF, from which the decision thresholds are derived, is made equal to a small positive number δ. In the instruction 44 a sample S i of the input signal is waited for. In the instruction 45 the absolute value of the sample S i is compared to the reference signal REF. If the absolute value of the sample S i is smaller than the reference signal REF, the sample S i will be placed in category 1. If the absolute value of the sample S i is larger than the reference signal REF, the absolute value of the sample S i will be compared to the signal 2REF in instruction 46. If the absolute value of the sample S i is smaller than 2REF, the sample is placed in category 3 and differing from this, the sample will be placed in category 2. For the samples placed in category 2, the symbol values are determined and the reference signal REF is adapted in the instructions 47, 48, 49, 50 and 51. Since the absolute value of the symbol in category 2 is always equal to 1, only the sign is to be added to this absolute value. This is performed in instruction 47 in which the symbol value C is determined by determining the signum of the sample S i . Then, in instruction 48, the reconstructed signal S r is determined and in instruction 49 the difference D between the input sample S i and the reconstructed signal S r is determined. The reference signal REF should be increased if the difference D and the received symbol C are positive or if C and D are negative and the reference signal should be reduced if either of the signals C or D is positive and the other signal is negative. Since, according to the inventive idea, an increase of the reference signal is to be prevented for symbols in category 2, in instruction 50 the product of C and D is compared to 0. If this product is greater than zero this denotes that an increase of the reference signal should take place and the adaptation will not be performed after which instruction 53 will be proceeded to which blocks the adaptation of the intersymbol interference canceller 31 so as to avoid a misadaptation of this canceller. Then, instruction 44 is returned to. However, if the product of C and D is negative, the reduction of the reference signal is to be performed. This is effected in instruction 51 in which the reference signal is multiplied by a factor (1-α), where α is a small positive number (< 1). In order to avoid decision thresholds fluctuating too strongly as a result of occasional disturbances of the receiver input signal, these decision thresholds are adapted gradually. The symbol values for the samples placed in category 3 are determined and the reference signal REF is adapted in the instructions 52 and 53. Because the absolute value of the symbol in category 3 is always equal to 3, only the sign is to be added to this absolute value. This is effected by means of instruction 52 in which the output symbol C is determined by multiplying the signum of the input sample by 3. Since, according to the inventive idea, no adaptation of the reference signal is to take place for symbols in category 3, the reference signal is not adapted. In instruction 53 a signal is produced to block the adaptation of the intersymbol interference canceller 31. For the input samples placed in category 1, the symbol values are determined and the reference signal REF adapted in the instructions 54, 55, 56, 57 and 58. Because the absolute value of the symbol in category 1 is always equal to 5, only the sign is to be added to this absolute value. This is effected by means of instruction 54 in which the symbol value C is determined by multiplying the sign function of the input sample by 5. Subsequently, in instruction 55, the reconstructed signal S r is determined and in instruction 56 the difference D between the input signal S i and the reconstructed signal S r is determined. The reference signal REF should be increased if the difference D and the received symbol C are positive or if both signals are negative; the reference signal should be reduced if either of the signals C or D is positive and the other signal is negative. Since, according to the inventive idea, a reduction of the reference signal is to be prevented for symbols placed in category 1, the product of C and D is compared to 0 in instruction 50. If this product is smaller than 0 this denotes that a reduction of the reference signal should take place and the adaptation will not be carried out and, in instruction 53, the adaptation of the intersymbol interference canceller 31 will be blocked before instruction 44 is returned to. If the product of C and D is negative, however, the increase of the reference signal is to be effected. This takes place in instruction 51 in which the reference signal is multiplied by a factor (1+α)(α<1). In Fig. 5, curve a, the relative difference E between the actual decision thresholds and the optimum decision thresholds is plotted against time for the prior-art receiver. In curve b this difference is plotted for a receiver according to the invention. Both curves are based on the same series of transmitted symbols. It will be evident that in the prior-art receiver for a given series of input symbols the difference e remains large so that erroneous decisions on the logic value of the output symbol are made continuously. With the receiver according to the invention the difference e will rapidly diminish to a very small value.

Claims: Receiver for multivalued digital signals which comprises comparing means (3) comparing the value of an input signal relative to a reference value to a number of decision thresholds and generating an output symbol as a result of this comparison, which receiver includes means for producing a regenerated signal on the basis of the output symbol and the decision thresholds, which receiver includes means for generating an error signal on the basis of the difference between the absolute value of the input signal relative to the reference value and the absolute value of the regenerated signal and which receiver includes reference means for deriving the decision thresholds from the error signal, characterised in that the receiver comprises classification means for classifying the output symbol into a plurality of categories on the basis of the logic value of the output symbol and in that the receiver includes means (17) for adapting or not adapting the decision thresholds in dependence on the category in which the output symbol is placed. Receiver as claimed in Claim 1, characterised in that the output symbol will be placed in a first category if the absolute value of the output symbol is equal to the maximum logic value the output symbol may assume and in that the symbol will be placed in a second category if the absolute value of the output symbol has the minimum positive logic value the output signal may assume and in that all further output symbols will be placed in a third category. Receiver as claimed in Claim 1, characterised in that the output symbol will be placed in a first category if the absolute value of the output symbol is equal to the maximum logic value the output symbol may assume and in that the output symbol will be placed in a second category if the absolute value of the output symbol has the minimum positive logic value the output symbol may assume and in that part of the further output symbols will be placed in the first category and the rest of the further output symbols will be placed in the second category. Receiver as claimed in Claim 3, characterised in that an equally many output symbols are placed in both the first and second categories. Receiver as claimed in Claim 2, 3 or 4, characterised in that with a first category output symbol the decision thresholds will be increased if the absolute value of the regenerated signal is smaller than the absolute value of the input signal relative to the reference value and in that the decision thresholds will be maintained at the same level if the absolute value of the regenerated signal is greater than the absolute value of the input signal relative to the reference value and in that with a second category output symbol the decision thresholds will be reduced if the absolute value of the regenerated signal is greater than the absolute value of the input signal relative to the reference value and in that the decision thresholds will be maintained at the same level if the absolute value of the regenerated signal is smaller than the absolute value of the input signal relative to the reference value. Receiver as claimed in Claim 2, characterised in that the decision thresholds will be maintained at a constant level if the output signal is placed in the third category. Receiver as claimed in one of the preceding Claims, characterised in that the receiver comprises adaptive signal conditioning means of which the adaptation will be blocked if the decision thresholds are maintained at a constant level.

Inventors: BOGERS ANTONIUS JOHANNES PETRU, CASTELLO DA COSTA PAULO MAIWAL, VERBAKEL JOHANNES MARTINUS MAR, BOGERS, ANTONIUS JOHANNES PETRUS, CASTELLO DA COSTA, PAULO MAIWALD, VERBAKEL, JOHANNES MARTINUS MARIA
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1991
Main classification: H04L25
IPC codes: H04L25, G01R19, H04L27