Liquid crystal apparatus

Abstract: Disclosed is a liquid crystal element comprising a liquid crystal exhibiting spontaneous polarization, a pair of electrode substrates for sandwiching said liquid crystal therebetween, characterized in that insulating layers are formed between said electrode substrates and said liquid crystal, wherein a spontaneous polarization P s value of said liquid crystal, an interelectrode composite capacitance Ci of said insulation layers, and a voltage threshold value Vth of optical response of said liquid crystal in said liquid crystal element satisfy the following condition: 2P s Ci > Vth

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a liquid crystal apparatus exhibiting spontaneous polarization and, more particularly, to a liquid crystal apparatus using a ferroelectric liquid crystal (FLC). Related Background Art A ferroelectric liquid crystal (FLC) as a liquid crystal exhibiting the spontaneous polarization has received a great deal of attention in favor of advantages such as high-speed response and good memory characteristics and has been actively developed to obtain a light bulb and the like. Targets utilizing the above advantages are an optical shutter array, a high-definition display unit by simple matrix driving, a light bulb for high-density recording combined with a photoconductive body. In addition, the ferroelectric liquid crystal is expected to display a motion picture by active matrix driving using thin film transistors (TFTs). These characteristics are disclosed in U.S.P. No. 4,840,462, the Proceeding of the SID, Vol. 30/2, 1989 "Ferroelectric Liquid Crystal Video Display", and the like. European Patent application EP 294 852 A2 discloses a liquid crystal apparatus of the type defined in the first part of claim 1. In the case of this prior art device, bistability was evaluated by repeated application of a single polarity of alternating polarity. In driving a FLC, the following problems are posed generally or found to be caused as a result of experiments conducted by the present inventors. One of the problems is a decrease in response speed of the liquid crystal when a direct current (DC) component is continuously applied to the FLC for a long period of time due to the following reason. Localization of internal ions in the liquid crystal is assumed to be induced to form an electric field. To solve this problem, the present applicant made a proposal (Japanese Patent Application No. 2-69547) for canceling a DC component by an auxiliary pulse. In addition, since an FLC has spontaneous polarization, an electric field is formed by internal ions localized in correspondence with this spontaneous polarization, and a desired gradation image becomes unstable. It is found that hysteresis occurs in optical response to an external voltage value (applied voltage value). The phenomenon occurring upon application of a reset pulse and a write pulse continuously to the FLC at a drive frequency of about a television rate (60 Hz) will be described with reference to Figs. 20 to 22. In consideration of the problems found in the above experiments, in order to stably obtain a gradation image (gradation display) at a television rate in the FLC optical response, the present inventors have made further extensive studies in detail. SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal apparatus suitable for gradation display. It is another object of the present invention to provide a liquid crystal apparatus for realizing improved gradation display by using both an active matrix drive scheme using TFTs and a liquid crystal exhibiting spontaneous polarization, such as a ferroelectric liquid crystal. This object is solved, according to the invention, with the features of Claim 1. BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1(a) to 1(e) are waveform charts of drive signals used in the present invention; Fig. 2A is a sectional view of a cell used in the present invention; Fig. 2B is an equivalent circuit diagram of the cell; Figs. 3 to 5C are diagrams showing polarization states in the cell of the present invention; Figs. 6A to 6C are waveform charts of drive signals used in the present invention; Fig. 7 is an equivalent circuit diagram showing a polarization state in the cell used in the present invention; Fig. 8 is a waveform chart showing drive signals used in the cell of the present invention; Fig. 9 is an equivalent circuit diagram showing a polarization state in the cell used in the present invention; Figs. 10 and 11 are views showing changes in response time upon continuous application of a DC component of about 0.3 V as V SX at a 44-Hz period; Figs. 12 and 13 are waveform charts showing drive signals used in the present invention; Fig. 14 is a perspective view of the FLC; Fig. 15 is a block diagram of an apparatus according to the present invention; Fig. 16(a) to 16(d) are waveform charts of drive signals used in the present invention; Fig. 17 is a plan view of a panel; Figs. 18A and 18B and Figs. 19A and 19B are views showing polarization states of the cell of the present invention; Fig. 20 is a graph for explaining a V-T curve and hysteresis instability obtained upon continuous voltage application at a 60-Hz period; Fig. 21 is a graph for explaining instability exhibited upon continuous voltage application at a 44-Hz period; Fig. 22 is a graph for explaining a change in response deterioration over time upon continuous application of a 0.9 V a DC component at the 44-Hz period; and Fig. 23 is a sectional view of a cell of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A liquid crystal apparatus used in the present invention is of an active matrix drive scheme, as shown in Fig. 17. The liquid crystal apparatus comprises switching elements (TFTs obtained by using thin film semiconductors such as amorphous silicon and polysilicon) arranged along a plurality of rows (scanning lines) and a plurality of columns (data lines), first wiring lines (gate lines) commonly connecting the first terminals (gates) of the switching elements in units of rows, second wiring lines (source lines) connecting the second terminals (sources) of the switching elements in units of columns, a plurality of pixel electrodes (transparent electrodes) connected in units of third terminals (drains) of the switching elements, counter electrodes (transparent electrodes) arranged to oppose the pixel electrodes, and a liquid crystal (chiral smectic C, H, I, G, F liquid crystal exhibiting ferroelectric properties) exhibiting spontaneous polarization and arranged between the plurality of pixel electrodes and the counter electrodes. The distance between each pixel electrode and the corresponding counter electrode is set to be a minimum distance (about 5 µm or less) capable of sufficiently suppressing formation of a helical structure of the chiral smectic liquid crystal. However, the formation of the helical structure need not be suppressed in the present invention. Thermal control may be performed during driving of the liquid crystal to maintain the liquid crystal within a desired temperature range. As shown in Figs. 1(a) to 1(e), after a reset voltage signal V R and a recording voltage signal V W which are applied to a pixel for a predetermined period of time required to cause an optical change of the pixel, an auxiliary voltage signal V SX having a magnitude corresponding to that of the recording voltage signal V W is applied, thereby controlling an internal electric field to be described below. In order to describe the auxiliary voltage signal in more detail, the internal electric field generated by ionic localization caused by the DC component spontaneous polarization will be described below. Figs. 2A and 2B show a pseudo equivalent circuit model of an FLC element. Fig. 3 shows an ionic localization diagram obtained when an external DC component is applied for a long period of time. When a positive external DC component is applied, it is assumed that ionic localization indicated by ⊕ and ⊖ occurs inside the liquid crystal layer. At this time, if the upward direction (↑ δ+ / δ-) of spontaneous polarization (P S ) of the liquid crystal indicates that the liquid crystal corresponds to a black state, an electric field is generated so that the liquid crystal molecules tend to be displayed in black by this ionic localization. Figs. 4A and 4B show ionic localization by spontaneous polarization (PS) itself. When the direction of the spontaneous polarization (P S ) is kept in the "black" (↑ +δ / -δ Upward ) state, the ionic localization in Fig. 4A is obtained. However, when the direction of the spontaneous polarization (P S ) is kept in the "white" (↓ +δ / -δ Downward ) state, the ionic localization in Fig. 4B is obtained. As a result, the ions generate an electric field. When a new external voltage V W equal to the previous voltage is applied, depending on whether the liquid crystal state has been kept in the "black" or "white" state for a long period of time, the degree of ease in change of the ionic localization to the "white state" varies, thus causing the hysteresis in the optical response. In addition, instability occurs when the same display state is repeatedly refreshed. The function of the present invention will be described in more detail with reference to the waveforms of the drive signals in Figs. 1(a) to 1(e). Although the number of ions induced by spontaneous polarization is difficult to control, the DC component can be controlled by an external voltage applied to the liquid crystal. According to the present invention, the auxiliary voltage V S serves as a DC component, and the ionic localization is kept "constant" regardless of the state of the spontaneous polarization P S . The term "constant" indicates a total amount of ionic localization. The "constant" value may be a predetermined value or zero. However, the "constant" value need not always be zero. A method of adjusting the ionic localization to be "constant" will be described with reference to Figs. 5A to 5C. For a example, a total amount of ionic localization is apparently maintained to be an amount with which the "black" state as shown in Fig. 4A is kept set. The ionic localization sate of the "black" state shown in Fig. 5A is taken as an initial state. In this case, a drive signal having a waveform shown in Fig. 1(a) is applied to the liquid crystal in advance. In order to display the "black" state from this state, a drive signal having a waveform shown in Fig. 6A is applied to obtain the "black" state. At this time, the superposition amount of the DC component by the auxiliary voltage V SX may be zero. In order to display a gradation state, as shown in Fig. 5B, the ionic localization state to be obtained by this display is as shown in Fig. 18A. In order to keep the total ionic localization amount constant in the "black" display state, an auxiliary voltage +V SX1 shown in Fig. 6A is applied to add the ionic localization of Fig. 18B. In order to obtain a "white" state, as shown in Fig. 6C, an auxiliary voltage +V SX2 (Fig. 6C) is applied to maintain the state of Fig. 19A (i.e., the ionic localization state formed by this display) to the total amount obtained in the case of the "black" display. The numerical control of the auxiliary voltages V SX1 and V SX2 is appropriately performed in accordance with the magnitude of the instantaneous polarization P S and the ambient temperature. It is advantageous if the magnitude of the spontaneous polarization P S is set not so large (i.e., 10 nC/cm 2 or less, and preferably 5 nC/cm 2 or less) in the liquid crystal used in the present invention since then an excessive increase in the amplitude of the auxiliary voltage signal V SX can be suppressed. The numerical value for the amplitude of the signal V SX1 preferably falls within the following range: V SX to 2 P S Δ a Ci (where Δa is the gradation at the end of application of the voltage V W and satisfies condition 0 < Δa < 1, and Ci is the capacitance of the insulating layer) The criterion for this numeric value will be described below with reference to Fig. 7. Fig. 7 shows a measurement of a divided voltage applied to a liquid crystal layer when a terminal voltage of a liquid crystal pixel is set at 0 V immediately after a gradation recording voltage V W is applied. At this time, the liquid crystal molecules are partially returned to the "black" direction and are set in the gradation state. If the ratio of the "white" state is defined as Δa, the divided voltage of the liquid crystal layer is given as follows: -2 P S Δ a Ci + C LC Since a voltage which causes movement of ions in this gradation state is given by the above relation, if an external reverse voltage V SX of the voltage which causes this movement of ions is applied and the divided voltage of the liquid crystal C i / Ci + C LC V SX by the voltage V SX is set to equal to -2 P s Δa / Ci + C LC , movement of ions is assumed not to occur. Therefore, the following equation is established: Ci Ci + C LC V SX = 2 P s Δ a Ci + C LC and the solution can be obtained as follows: V SX = 2 P s Δ a Ci For example, if P S and Ci are 5 nC/cm 2 and 20 nF/cm 2 , respectively, the voltage V SX = about 0.5 V can be obtained even in the full "white" state. When the voltage V SX is applied within the range of 0 V to 0.5 V with the waveform shown in Fig. 8 in accordance with the gradation state, the initial ionic localization state can be maintained constant. When the voltage V SX corresponding to the gradation state of each frame is kept applied as a DC component until the next frame in image display repetition, ionic localization can be kept constant. Therefore, instability which may be caused by ionic localization can be eliminated. Second, since the DC component also serves as a "white" retention voltage of the liquid crystal, high-speed response of the liquid crystal can be obtained and can cope with the motion picture. Figs. 10 and 11 show an optical response test improved by the above driving method. As described above, in order to stabilize the ionic localization state caused by a display state, the peak value V SX = 2 P S Δ a / Ci of the auxiliary voltage is preferably stabilized. According to this driving method, the maximum value of the voltage V SX is preferably set as follows: V SXMAX = 2P S ·1 Ci Vth The present invention proposes a liquid crystal apparatus on the basis of the findings that the above condition must be essentially satisfied to balance the ions. As a condition of a liquid crystal element structure shown in Fig. 23, the effective magnitude of the spontaneous polarization P S of the liquid crystal used and the composite capacitance Ci of the alignment layers as important components constituting the element or an insulating layer portion including an additional insulating layer in the element must satisfy the above permanent relationship, thereby performing substantially stable gradation driving. From the qualitative viewpoint, the composite capacitance Ci is preferably set to be large, and the spontaneous polarization value P S of the liquid crystal used is preferably set to be small. In an experiment conducted by the present inventors, insulating layers formed to prevent electrical short-circuiting of the upper and lower electrodes of each cell are formed such that an oxide mixture (Ti-SiO x ) of Ti (titanium) and Si (silicon) is coated on the electrodes and baked to obtain thin films each having a thickness of about 1,000 Å. A 200 Å thick polyimide alignment layer is formed on this insulating film and baked. The resultant structure is rubbed to maximize the composite capacitance Ci. In this case, the capacitance Ci can be about several 10 nF/cm 2 . In order to further increase the capacitance Ci, the physical film thickness must be decreased, and a layer having a high dielectric constant is selected. The magnitude of the spontaneous polarization P S of the liquid crystal is a maximum of 10 nC/cm 2 when it is evaluated by a polarization reverse current. This magnitude is preferably 5 nC/cm 2 or less. As a result, the value 2P S /Ci is set to be about 0.5 V or less. In order to increase the value Vth, the viscosity of the liquid crystal is adjusted. However, it is generally disadvantageous to increase the drive voltage. In this case, the voltage Vth is defined as a DC application voltage limit with which an optical change is substantially not detected during a period of gradation display in driving the element. A driving method of the element will be described below. The above driving method cannot control each gradation level in formation of an image by a simple matrix. However, in principle, this driving method can be applied to an arrangement for driving pixels independently of each other as in driving of a single-bit optical shutter or a 7-segment display, or as in active matrix driving of TFTs (Thin Film Transistors). Actual drive waveforms in TFT active matrix driving will be described in detail below. Fig. 12 is a timing chart showing drive waveforms applied to active matrix driving. A reset signal V R for setting a pixel in the "black" state is applied, and a time voltage for sufficiently setting the pixel in the "black" state by utilizing the open characteristics of the TFT is also applied (Vr in Fig. 12). A recording voltage V W is applied, and this gradation level voltage V W is kept applied for a predetermined period of time in accordance with similar open characteristics. A ground signal V E is then applied to the pixel. During application of a ground voltage V e , the gradation transmittance is changed but can be stabilized by the following auxiliary signal. The auxiliary voltage signal V SX is then applied to the pixel. This signal can be selected from V SX1 and V SX2 in accordance with a desired gradation display state. As indicated by the voltages V SX1 and V SX2 in the display frame serving as one vertical scanning period in the gradation transmitting state, the auxiliary voltage signal is applied as a voltage value containing an appropriate DC voltage. Note that when a sufficiently high voltage is applied as the reset voltage, the voltages V SX1 and V SX2 may be applied as values added with voltages for effecting the DC components corresponding to the gradation levels after the voltage difference between the voltages Vr and V W is compensated to be zero during the frame period. The target DC component value of this auxiliary voltage signal V SX is selected in accordance with the magnitude of the spontaneous polarization Ps of the liquid crystal used. The target magnitude of the DC component value is given as V DC = 2 P S ·Δ a / Ci in accordance with the ratio Δa of the "white" state when the maximum transmittance is defined as "1". For example, if Ps to 5 nC/cm 2 , and the capacitance of the insulating layers constituting the liquid crystal cell is about 20 nF/cm 2 , the voltage V W for recording the full "White" state is set to be about 0.5 V. In the gradation display state, a DC component of about 0.5 V or less is superposed on the auxiliary voltage signal. The recording voltage V W or the recording voltage signal V W is a signal for determining the optical state of each pixel and represents a voltage signal (gradation voltage signal) corresponding to display brightness of the pixel. The auxiliary voltage V SX or the auxiliary voltage signal V SX is assumed to be a voltage for substantially stabilizing the gradation display state. This voltage signal is stabilized well at a DC voltage equal to or less than the optical threshold value Vth. In this case, the optical threshold value Vth is defined as a value with which an optical change is substantially not detected even if the threshold value Vth is kept applied throughout one frame. The absolute value of the auxiliary voltage signal V SX is preferably set to be about 1/50 to 1/5 that of the gradation voltage signal. Referring to Fig. 12, the application interval of the ground voltage V e between the voltages V W and V SX is given to stabilize a reaction component as response of the liquid crystal molecules after the gradation voltage signal V W is applied. However, even if this application interval is not provided in this element, the driving effect is not impaired in this embodiment. In this case, the V SX value must be appropriately regulated in accordance with a drive waveform. If a change in state of the liquid crystal is assumed to occur by the application interval of the reset voltage signal Vr, the application intervals of the voltage signals V W and V E can be set equal to that of the reset voltage Vr. In order to effectively practice the above driving method, a recording period of each line is divided into at least four intervals (if the V E application interval is not provided, only three intervals are required; and the following description exemplifies a case wherein the V E application interval is provided). Referring to Fig. 12, the lower timing chart represents a case wherein the recording period A of the nth line is divided into four intervals. That is, the recording period A is divided into a division interval a for enabling a gate corresponding to a subsequent line a few lines after the current line to reset the pixels of the subsequent line, a division interval b for enabling a gate of the nth line to perform recording of the nth line itself, a division interval c for enabling a gate corresponding to a previous line a few lines before the current line to apply the ground voltage to the recorded pixels of the previous line, and a division interval d for enabling a gate corresponding to another previous line a few lines before the above previous line to apply an auxiliary voltage signal to the recorded pixels of this other previous line. Note that the division intervals a , b , c , and d in the recording period A of the nth line may have any one of the following orders: abcd, abdc, acdb, acbd, bacd, badc, bcad, bcda, bdac, bdca, cabd,.... Fig. 12 shows optical states 101 to 104 of a liquid crystal pixel of the nth line. These states are enlarged in Fig. 13. Fig. 14 is a view showing an FLC sandwiched between an upper electrode substrate 11 having a TFT active matrix and a lower substrate with its entire surface serving as an electrode. In principle, when the direction of the spontaneous polarization P S is upward 201, the major axis of each FLC molecule is given as a direction indicated by a solid line 1; and when the direction of the spontaneous polarization P S is downward 202, the major axis of each FLC molecule is given as a direction indicated by a dotted line 2. When the reset voltage Vr shown in Fig. 20 is applied to keep the upper electrode in a negative state, the spontaneous polarization is ideally directed in the upward direction 201 during this interval. When one of polarizing plates 301 and 302 arranged as a crossed polarizer is aligned with the major-axis direction indicated by the solid line 1, the pixel is set in the "black" state. Therefore, full "black" states 101 and 103 in Fig. 12 can be obtained. When the gradation voltage signal as the recording voltage signal V W has a magnitude larger than the reverse threshold value Vth of the liquid crystal, a "white" domain is formed. However, if V W is less than Vth, a reset "black" state is maintained. When the ground voltage signal V E is enabled to apply the ground voltage V e , some molecules which are not latched to the "white" state tend to react, but the state is transited to the gradation display state (103 in Fig. 12) corresponding to the gradation voltage V W . Thereafter, when the auxiliary voltage signal V SX corresponding to the voltage V W is applied, the gradation state is maintained, and variations in ionic localization described above can be prevented. As a result, since the variations in ionic polarization are eliminated in each frame, no undesirable change in transmittance occurs. Therefore, a stable image display operation can be performed. In a so-called high-vision compatible television display, when about 1,000 scanning lines are interlaced-scanned at 30 or 60 Hz, each frame is driven for about 33 msec. For this reason, a recording period assigned to each line is about 33 µsec per frame. The recording period of 33 µsec for applying a recording voltage every nth line is divided into four intervals (i.e., each interval is about 8 µsec or less). For example, these four intervals consist of an interval for applying the VR pulse for resetting a line pixel applied with the recording voltage (V W ) six lines after the current line (= S 3 ), a recording pulse interval for applying the voltage V W to the pixel of the nth line, a ground signal interval for applying the ground voltage V E to a line pixel having been applied with the voltage V W six lines before the current line (= S 2 ), and an interval for applying the auxiliary voltage signal V SX to a line pixel having been applied with the V W 12 lines before the current line (= S 1 ). A total time for applying the respective voltages becomes about 198 µsec (= about 33 µsec x 6). A satisfactory image display could be obtained by the material used by the present inventor at maximum V R and V W voltages of about 7 V. In addition, the DC component was superposed on the auxiliary voltage V SX by a voltage equal to or less than the threshold value Vth corresponding to the gradation level to stabilize the gradation display state. The driving method shown in Fig. 12 will be described in more detail with reference to Fig. 13. The pulse peak value of the auxiliary voltage. signal V SX can be determined as follows. Assume that the peak value V R of the reset voltage Vr in the ideal voltage waveform during the reset signal interval a is -V 0 , and that the peak value V W of the recording voltage V W during the recording signal interval b is +V 0 . If the times for applying these voltages are equal to each other, a peak value V S0 of the auxiliary voltage signal V SX during the auxiliary voltage signal interval d is set at 0.5 V if Ps to 5 nC/cm 2 and Ci to 20 nF/cm 2 , in accordance with calculation 2 P S (Δ a =1) / Ci (interval 401). On the other hand, when gradation levels are assigned to the recording signal as indicated by intervals 402, 403, and 404, peak values V S1 , V S2 , and V S3 are defined as follows if the reset voltage is sufficiently high, the number of scanning lines is 1,000, and a 24-line period is provided as the frame interval (blanking period) as follows. If the reset interval, the recording interval, and the ground interval are defined as S 2 , S 3 , and (S 4 - S 3 ), respectively, and if condition S 2 = S 3 = (S 4 - S 3 ) = S is established, the following equations can be approximated: V S1 ' = ( V 0 - V 1 ) × S 1024 - (3 S + 1) V S2 ' = ( V 0 - V 2 ) × S 1024 - (3 S + 1) V S3 ' = ( V 0 - V 3 ) × S 1024 - (3 S + 1) When the DC components by the voltages Vr and V W are set to zero, and a voltage value corresponding to 2 P S Δ a (0<Δ a <1) / Ci is added to each zero DC component value, so that the peak values of the auxiliary voltage signals are defined with respect to gradation values (based on transmittances at the end of ground voltage application period) Δa 1 , Δa 2 , and Δa 3 as follows: V S1 = V S1 ' + 2 P S Δ a1 Ci V S2 = V S2 ' + 2 P S Δa 2 Ci V S3 = V S3 ' + 2 P S Δ a3 Ci (0 < Δa1,Δa2,Δa3 < 1) If the intervals S 2 , S 3 , and (S 4 - S 3 ) are different from each other, the voltage V S1 ' can be rewritten as follows: V S1 ' = ( V 0 × S 2 ) - ( V 1 × S 3 ) 1024 - { S 2 + S 3 + ( S 4 - S 3 ) + 1} For example, assume that the spontaneous polarization P S of the FLC used equals 5 nm/cm 2 , the capacitance Ci is 20 nF/cm 2 , the voltage V W is -7 V, and a 60% transmittance is obtained at V 1 of 5.5 V. If the S 2 = S 3 = (S 4 - S 3 ) = 6, then the following equation is obtained: V S1 ' = 7 × 6 - 5.5 × 6 1024 - 19 = 9 1005 ≃ 9 mV and therefore, V S1 = 9 (mV) + 0.5 (V) x 0.6 = 0.309 (V) The auxiliary voltage signal V SX may be calculated in accordance with the analog recording signal voltage V W on the spot, or may be automatically output from a prestored table T (V W and V SX ) if the recording signal V W is a digital signal. The above described driving method can be easily realized by arranging a frame memory or a line memory of at least S 4 lines in principle. That is, since a delay time of S 4 = 12 lines is present between generation of the recording signal and generation of the auxiliary signal, information of S 4 = 12 lines must be stored for generation of recording signals for other lines during this period. Fig. 15 shows a simple block diagram of a driver circuit. All signal tuning operations are performed in response to a clock (shown in Fig. 15). Gate signal output timings of the lines, reset signals for the source electrodes, and recording and auxiliary signal output timings are controlled by this clock. It is readily understood that a good effect can be obtained by a combination of a liquid crystal having spontaneous polarization and an active matrix element in order to apply the auxiliary voltage. In the above description, the ionic localization state is stabilized when the FCL state is the full "black" state. However, this localization may be stabilized when the FCL state is a full "white" state. In this case, ionic localization in the initial "white" state is caused to occur to start the operation. According to this method, a waveform in Fig. 16(d) is continuously applied. The DC component source for maintaining the ionic localization in the "black" state is 2 P S Δ a / Ci , and this component is applied as the auxiliary signal. If the "white" domain ratio is given as Δa, in order to maintain the ionic localization amount in the "white" state with respect to the remaining black domain ratio (1 - Δa), an auxiliary voltage having the following DC component superposing amount is applied (Figs. 16(a) to 16(d)): - 2 P S (1 - Δ a ) Ci That is, when the present invention is applied to the active matrix driving, the auxiliary voltage signals are given as follows, as shown in Fig. 21: V S0 = 0 V S1 = V S1 ' - 2 P S (1 - Δ a1 ) Ci V S2 = V S2 ' - 2 P S (1 - Δ a 2) Ci V S3 = V S3 ' - 2 P S (1 - Δ a3 ) Ci In this case, the correspondence between the recording voltage values V 1 , V 2 , and V 3 (Fig. 13) and the gradation values Δa 1 , Δa 2 , and Δa 3 is different from the case wherein the ionic localization is stabilized in the "black" state. A lower voltage is selected as the voltage V W to obtain good gradation display as in the above embodiment. When the stabilized gradation display is achieved, the DC component value - 2 P S (1 - Δ a ) / Ci is always smaller than Vth. According to the optical modulation element, as has been described above, there is provided a good liquid crystal apparatus. A high-precision direct viewing flat display or a projection display can be arranged. As a matter of course, by arranging a color filter on each pixel, or by using a plurality of liquid crystal elements of the above described driving method so as to perform color light projection, a transmission or reflection type high-definition flat color television or projection color television can be arranged.

Claims: A liquid crystal apparatus comprising a liquid crystal element comprising a liquid crystal exhibiting spontaneous polarization, a pair of electrode substrates for sandwiching said liquid crystal therebetween, wherein insulating layers are formed between said electrode substrates and said liquid crystal, and wherein the spontaneous polarization P s value of said liquid crystal, the interelectrode composite capacitance Ci of said insulation layers, and the voltage threshold value Vth of optical response of said liquid crystal in said liquid crystal element satisfy the following condition: 2P s Ci < Vth characterized by first means for applying a gradation voltage signal corresponding to gradation information to said pair of electrodes, and second means for applying a DC component serving as a reverse bias of an internal electric field generated upon application of the gradation voltage signal to said liquid crystal during one vertical scanning period. An apparatus according to claim 1, characterized in that said liquid crystal essentially consists of a ferroelectric liquid crystal. An apparatus according to any one of the preceding claims, characterized in that said one vertical scanning period is one frame scanning period. An apparatus according to any one of the preceding claims, characterized in that the value of the DC component is within a range of 1/50 to 1/5 of the gradation voltage signal. An apparatus according to any one of the preceding claims, characterized in that said liquid crystal element has a plurality of pairs of electrodes, each pair consisting of a pixel electrode and a counter electrode, switching elements arranged along a plurality of rows and a plurality of columns, first wiring lines commonly connecting first terminals of said switching elements in units of rows, second wiring lines commonly connecting second terminals of said switching elements in units of columns, a plurality of pixel electrodes connected in units of third terminals of said switching elements, counter electrodes opposite to said pixel electrodes, an insulating member formed on at least one of said pixel and counter electrodes, and scanning means for applying scanning pulses to said first wiring lines; wherein said first means applies said gradation voltage (V W ) signal to said electrodes by applying to said second wiring lines a signal corresponding to said gradation information, and wherein said second means applies said DC component (V SX ) to said liquid crystal by applying to said second wiring lines an auxiliary voltage signal. An apparatus according to claim 5, characterized in that said first means is arranged to apply to said second wiring lines said signal corresponding to said gradation information after a reset voltage signal is applied. An apparatus according to claim 6, characterized by means for applying, prior to application of the reset voltage signal, a voltage signal given such that a difference between an absolute value of the reset voltage signal and an absolute value of the gradation voltage signal becomes zero. An apparatus according to claim 6, characterized by means for applying a zero voltage during a period between the auxiliary voltage signal and the gradation voltage signal.

Inventors: FUJIWARA RYOJI, KANEKO SHUZO, MARUYAMA TOMOKO, YOSHIDA AKIO, FUJIWARA, RYOJI, KANEKO, SHUZO, MARUYAMA, TOMOKO, YOSHIDA, AKIO
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1991
Main classification: G02F1
IPC codes: G09G3, G02F1