FRAME SYNCHRONIZING METHOD FOR DIGITAL MOBILE RADIO

Abstract: This invention relates to a frame synchronizing method for a digital mobile radio in which plural pulses having different phases are generated from an asynchronous frame marker and a synchronous frame marker is produced based on these pulses. From the asynchronous frame marker, a pulse synchronized with it, a pulse delayed by a half of a clock period from it and a pulse delayed by the clock period from it are generated, and the one of these pulses is selected suitably.

Description: TECHNICAL FIELD This invention relates to the art of frame synchronization in the field of digital mobile radio communication. BACKGROUND ART In the TDMA (Time Division Multiple Access) communication method utilized in the field of digital mobile radio communication, frame synchronization is required between a mobile station and a base station. A state of the art synchronization technique is described in JP-A-59 215 115. However, because the distance between the mobile station and the base station as well as the path of radio wave propagation between the stations incessantly changes, the time required for the arrival of the radio wave changes necessarily. Therefore, when the period of burst data transmission at the mobile station is always set at a constant value T, a change in the distance between the mobile station and the base station or a change in the path of radio wave propagation between the stations results in, for example, a shortened or extended time required for the arrival of the radio wave. Consequently, the number of bits to be received in one burst data transmission period T at the mobile station decreases or increases by one bit, and an error occurs during decoding. In order to prevent such a trouble, the radio wave propagation time is measured at the base station, and this data is informed to the mobile station, so that the period of burst data transmission at the mobile station deviates within the range of the pulse width td of one data bit. On the basis of the frame marker of the burst data transmission period T ± td having the period deviation td, the mobile station carries out, for example, speech encoding for each frame unit, and the encoded data is transmitted as the burst data at the predetermined period of burst transmission. For the purpose of attaining such speech encoding and other processing, it is necessary that the period T ± td of the frame marker is maintained at the value which is n times (n: an integer) as large as the period Tc of the clock that determines the processing timing. That is, synchronization between them is required. A prior art method for frame synchronization will now be described by reference to Fig. 5. In Fig. 5, it is supposed that, in the period T ± td of an asynchronous frame marker AFM, T is selected to be T = 20 msec, and td is selected to be 3.7 µsec at a transmission rate of 270 kb/s and 20 µsec at a transmission rate of 50 kb/s, while the period Tc of the clock CLK used for the speech encoding is selected to be 125 µsec. As shown at Fig. 5 (I), the leading edge of a first clock CLK applied immediately after the risetime of an asynchronous frame marker is detected, and this clock is used as a synchronous frame marker SFM. According to such a method, the number of the clocks CLK included between the consecutive synchronous frame markers SFM corresponds to the number of predetermined periods, that is, T/Tc = 20/125 = 160 periods, when the consecutive plural asynchronous frame markers AFM(a) and AFM(b) are all present on the same side (the side immediately before the risetime of the clocks CLK in Fig. 5) when the risetime of the clocks CLK is considered as the border on each side. However, an extra clock CLK will be included to increase the number of clocks corresponding to 161 periods when, as shown in Fig. 5 (II), the leading one (a) of the consecutive asynchronous frame markers AFM is present immediately before the risetime of the associated clock CLK, and the trailing asynchronous frame marker (b) is present immediately after the risetime of the associated clock CLK. On the other hand, the number of periods is only 159 which is less by one period than the predetermined value when, as shown in Fig. 5 (III), the leading one (a) of the consecutive asynchronous frame markers AFM is present immediately after the risetime of the associated clock CLK, and the trailing asynchronous frame marker (b) is present immediately before the risetime of the associated clock CLK. Thus, the prior art frame synchronization method has had the problem that, when the asynchronous frame marker is present in the vicinity of the risetime of the associated clock CLK, the period of the synchronous frame marker SFM becomes larger or smaller by one bit depending on the position of the asynchronous frame marker. The present invention solves such a problem, and its object is to provide a novel frame synchronization method in which the synchronous frame marker having a predetermined constant period can be generated regardless of the wave propagation time. DISCLOSURE OF INVENTION In the present invention which solves the prior art problem, a pulse signal having the same phase as that of the asynchronous frame marker, another pulse signal delayed by 1/2 of one clock period from the asynchronous frame marker and still another pulse signal delayed by one clock period from the asynchronous frame marker are generated, and they are suitably selected. A pulse not present in the vicinity of the risetime of a clock is selected, and the leading edge of a synchronous frame marker is made to coincide with the leading edge of a first clock rising immediately after this pulse, so as to eliminate period deviation of the asynchronous frame marker. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a timing chart showing an embodiment of the present invention. Fig. 2 schematically illustrates the operation of gates. Fig. 3 illustrates transition of a selected pulse signal. Fig. 4 shows frame markers generated according to the method of the present invention. Figs. 5(I), 5(II) and 5(III) are timing charts showing synchronous frame markers generated according to the prior art frame synchronization method, respectively. BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will now be described in detail. Fig. 1 schematically illustrates the frame synchronization method of the present invention. I indicates an asynchronous frame marker received at a mobile station, and, to a constant period T determined by a base station, period deviation ± td attributable to a variation of the wave propagation time between the base station and the mobile station is added. The method will now be described with reference to the case where the period T is selected as T = 20 msec. II indicates a clock used in the transmitter part when a data input is applied from an analog-digital converter or when a speech is encoded. The period Tc is constant, and the embodiment will now be described with reference to the case where Tc is 125 µsec. Therefore, in this embodiment, the relation T = 160 x Tc holds when the frame marker is regularly synchronized. III indicates three kinds of pulse signals P1, P2 and P3 which are the feature of the present invention. The first pulse signal P1 has the same phase as that of the asynchronous frame marker AFM, the second pulse signal P2 has its phase delayed from that of the asynchronous frame marker AFM by 1/2 of the clock period Tc, that is, Tc/2, and the third pulse signal P3 has its phase delayed by one clock period Tc. The symbol IV indicates a select pulse for selecting one of the aforementioned three pulse signals P1, P2 and P3, and Fig. 2 shows that the second pulse signal P2 is selected. The symbol V indicates a synchronous frame marker SFM generated immediately after the risetime of the second pulse signal P2 on the basis of the selected second pulse signal P2. Fig. 2 shows the operation timing of various gates. I indicates a clock CLK. II indicates that a gate GF is in its H level for only a period TF immediately before the risetime of the clock CLK, III indicates that a gate GB is in its H level for only a period TB immediately after the risetime of the clock CLK, and IV indicates that a gate GR is in its H level for only a period TR whose center is the risetime of the clock CLK. These gate periods TF, TB and TR are selected to be sufficiently small relative to the period of the clock CLK respectively. For example, with respect to the period, 125 µsec, of the clock CLK, TF = TB = 125/16 = 7.8 µsec and TR = 125/4 = 31.2 µsec are selected. The manner of selection of the three pulse signals P1, P2 and P3 described above will be explained by reference to a transition diagram shown in Fig. 3. (1) The pulse signal P2 delayed by Tc/2 relative to the asynchronous frame marker AFM is initially selected as the pulse signal. (2) When, under the above condition, the select pulse is applied in a period Tf before the leading edge of the clock CLK, that is, when the select pulse is detected by the gate GF, the first pulse signal P1 is selected as the pulse signal to deal with the asynchronous frame marker in the next period. That is, the first pulse signal P1 having the same phase as that of the asynchronous frame marker AFM is selected (Fig. 3 I). On the other hand, when, under the condition where the second pulse signal P2 is selected, the select pulse is applied in a period Tb after the leading edge of the clock CLK, the third pulse signal P3 is selected as the pulse signal to deal with the asynchronous frame marker in the next period. That is, the third pulse signal P3 whose phase is delayed by one period Tc of the clock CLK relative to the asynchronous frame marker AFM is selected (Fig. 3 II). When, under the condition where the first or third pulse signal P1 or P3 is selected, the select pulse is applied in the period TR whose center is the risetime of the clock CLK, the second pulse signal P2 is selected again to deal with the asynchronous frame marker in the next period (Fig. 3 III, IV). In other case, the pulse signal presently selected is maintained (Fig. 3 V, VI, VII). Table 1 shows the results of investigation of the period of the synchronous frame marker SFM generated when the pulse signals P1, P2 and P3 are selected according to the transition rule described above. Transition of SP Value of N A → B I P2 P1 160 II P1 P2 160, 161 III P2 P3 160 IV P3 P2 159, 160 V P2 P2 160 VI P1 P1 160 VII P3 P3 160 It will be apparent from Table 1 that the period has the required value of 160 x Tc except the case (II of Table 1) where the transition from the first pulse signal to the second pulse signal occurs or the case (IV of Table 1) where the transition from the third pulse signal to the second pulse signal occurs. However, the select pulse initially selects the second pulse signal P2, that is, the pulse signal whose phase is delayed by Tc/2 from the asynchronous frame marker. Thus, immediately after the transition of the second pulse signal to the other pulse signal, that is, the first pulse signal P1 or the third pulse signal P3, the first pulse signal P1 and the third pulse signal P3 are merely delayed by Tc/2 relative to the asynchronous frame marker AFM respectively. Therefore, in order that the signal can be applied to the gate GR (Fig. 2 IV) having the time width Tr, deviation of the period of the asynchronous frame marker must be more than about ± (Tc - TR)/2. This will be considered with respect to the case where Tc = 125 µsec, TR = 31.2 µsec, and the transmission rate is 270 kb/s. It is necessary for the propagation time to change by an amount equal to (Tc - TR)/2 ÷ td = 13, that is, the time (3.7 x 13 = 48 µsec) which is 13 times as long as the time required for the transmission of one bit. When converted into the propagation distance, this time corresponds to 14.4 km. Therefore, because the zone radius of the digital land mobile radio telephone system now in use is only 3 to 5 km, such a period deviation cannot actually occur. Therefore, the states II and IV in Table 1 cannot occur actually, and the synchronous frame marker not including period deviation as a matter of practice can be generated. Thus, even when the leading one (a) of consecutive asynchronous frame markers AFM may appear, for example, immediately before the risetime of the associated clock CLK, or when the trailing asynchronous frame marker (b) may appear immediately after the risetime of the associated clock CLK, the synchronous frame markers SFM having the required period can be generated as shown in Fig. 4. INDUSTRIAL APPLICABILITY It will be understood from the foregoing description that, in the present invention, three kinds of pulses, that is, a pulse whose phase is the same as that of an asynchronous frame marker, another pulse whose phase is delayed from the asynchronous frame marker by 1/2 of one clock period and still another pulse whose period is delayed from the asynchronous frame marker by one clock period are prepared, one of the pulses not present in the vicinity of the risetime of a clock being selected, and a synchronous frame marker is generated at the risetime of a first clock immediately after the risetime of the selected pulse. Therefore, the period deviation of the asynchronous frame marker attributable to a change in the radio wave propagation time can be eliminated to ensure radio communication with high reliability.

Claims: A frame synchronization method for digital mobile radio communication comprising the steps of generating a first pulse whose phase is the same as that of an applied asynchronous frame marker, a second pulse whose phase is delayed by 1/2 of one clock period relative to the asynchronous frame marker and a third pulse whose phase is delayed by one clock period relative to the asynchronous frame marker, selecting from among said three kinds of pulses a pulse remote from the risetime of a clock, and generating a synchronous frame marker at the risetime of a first clock immediately after the risetime of said selected pulse.

Inventors: HONMA KOUICHI, KATO OSAMU, TSUBAKI KAZUHISA, HONMA, KOUICHI, KATO, OSAMU, TSUBAKI, KAZUHISA
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1991
Main classification: H04Q7
IPC codes: H04L7, H04B7, H04J3, H04W88