Amplifier

Abstract: An amplifier comprises a first transistor (Q12) of first polarity type having its emitter connected to a first input terminal and its base and collector connected to a second input terminal, a second transistor (Q11) of second polarity type having its base connected to the second input terminal, its collector connected to a first potential supply terminal (15) and its emitter connected to a second potential supply terminal (16) through a first current source (33), a third transistor (Q3) of first polarity type having its base connected to the emitter of the second transistor, its collector connected to the second potential supply terminal and its emitter connected to an output terminal (OUT), and a fourth transistor (Q4) of second polarity type having its base connected to the first input terminal, its collector connected to the first potential supply terminal and its emitter connected to the output terminal, wherein the first to fourth transistors constitute a push-pull output circuit. If the push-pull output circuit is used at the subsequent stage of a differential amplifier section, the second input terminal can be connected to the collector of an input stage transistor of the differential amplifier without causing the input stage element of the differential amplifier to be driven into saturation. The push-pull circuit requires the use of only one constant current source and hence less number of elements is required.

Description: The present invention relates to an amplifier having an improved push-pull output stage and, in particular, to an amplifier suitable for an IC fabrication. Fig. 1 shows an ordinary voltage follower circuit. Here, reference numerals 11 and 12 represent a differential input stage and output stage, respectively. In the circuit shown in Fig. 1, the output stage 12 is of an emitter follower configuration and a sink current at the output stage OUT is determined by an internal constant current source 13. As a way for increasing an output sink current, an output stage 21 is provided as a push-pull output circuit as shown in Fig. 2. In the circuit shown in Fig. 2, a transistor Q4 is driven from a differential input stage transistor Q1 side via a current mirror circuit 22 and transistor Q21. A transistor Q3 is driven from a differential input stage transistor Q2 side via current mirror circuits 23 and 24 and transistors Q22. With the collector current and base current of the transistor Q3 represented by I C and I B , the following relation holds: I C /I B = h FE (current amplification factor) If an input IN2 is to be connected to the collector of the transistor Q2 by omitting the current mirror circuits 23 and 24 which provide a cause for a complicated arrangement, then an equal potential is applied to the collector and emitter of the transistor Q2, that is, a potential on the output OUT becomes a level dropped by a base-to-emitter voltage V BE , causing the transistor Q2 to be driven into saturation. This connection cannot be achieved with an omission of the current mirror circuits 23 and 24, resulting in a complex circuit. Fig. 3 shows a known output stage 31 using transistors Q11 and Q12 and constant current sources 32 and 33 which eliminate the necessity of paying particular attention to the levels on IN1 and IN2 in Fig. 3. This circuit requires two constant current sources 32 and 33. US-A-4837523 reflects the prior art shown in Figure 3. IEEE Journal of Solid State Circuits vol. SC-16 no. 4 Aug. 1981, p. 261-266 reflects the prior art shown in Figure 2. It is accordingly the object of the present invention to provide an amplifier which can provide a push-pull output circuit of less number of elements without causing a differential input stage element to be driven into saturation. According to the present invention, there is provided an amplifier constituting a push-pull output circuit, comprising: a first transistor of first polarity type having its emitter connected to a first input terminal and its base and collector connected to a second input terminal; a second transistor of second polarity type having its base connected to the second input terminal, its collector connected to a first potential supply terminal and its emitter connected to a second potential supply terminal through a first current source; a third transistor of the first polarity type having its base connected to the emitter of the second transistor, its collector connected to the second potential supply terminal and its emitter connected to an output terminal; and a fourth transistor of second polarity type having its base connected to the first input terminal, its collector connected to the first potential supply terminal and its emitter connected to the output terminal, wherein the first to fourth transistors constitute the push-pull output circuit. That is, according to the present invention, potentials on the first and second input terminals are equal to the first transistor's base-to-emitter voltage V BE ≃ 0.65 V and the second input terminal and output terminal are set to an equal potential. Thus, a potential difference V BE can be applied across the collector and the emitter of the differential input stage transistor, The second input terminal can be connected directly to the collector of the differential input stage transistor in the preceding stage without causing the differential input stage transistor to be driven into saturation. Further, the first input terminal is provided in the aforementioned transistor and the push-pull output circuit is driven. Thus the resultant circuit requires the use of only one constant current source. This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Figs. 1 to 3, each, show a conventional amplifier; Fig. 4 is a circuit diagram showing an amplifier according to one embodiment of the present invention; and Figs. 5 to 8, each, are a circuit diagram showing an amplifier according to another embodiment of the present invention. The embodiments of the present invention will be explained below with reference to the accompanying drawings. Fig. 4 is a circuit diagram showing a principle of an output circuit section, the same reference numerals being employed to designate parts or elements corresponding in function to those shown in the known circuit. As shown in Fig. 4, a PNP transistor Q12 has its emitter connected to a first input terminal IN1 for push-pull circuit drive and its base and collector connected to a second input terminal IN2 and an NPN transistor Q11 has its base connected to the second input terminal IN2, its collector connected to a high potential power source 15 and its emitter connected to a low potential power source 16 through a constant current source 33, a PNP transistor Q3 has its base connected to the emitter of the transistor Q11, its collector connected to the low potential power source 16 and its emitter connected to an output terminal OUT, and an NPN transistor Q4 has its base connected to the first input terminal IN1, its collector connected to the high potential power source 15 and its emitter connected to the output terminal OUT. This arrangement provides a push-pull output circuit. The circuit shown in Fig. 4 includes a single constant current source (the constant current source 33) in which a potential difference across the terminals IN1 and IN2 is V BE ≃ 0.65 V and potentials on the terminals IN2 and OUT are set to the same level. Fig. 5 shows a voltage follower circuit according to another embodiment of the present invention where the circuit shown in Fig. 4 is employed as an output circuit 31. In the circuit shown in Fig. 5, a differential amplifier 11 is provided as an input stage, a differential input stage transistor Q1 has its base connected to an input terminal and its collector current supplied to the input of a current mirror circuit 17, an output current of a current mirror circuit 17 is supplied to the input terminal IN1, and a differential input stage element (transistor) Q2 has its base connected to an output terminal OUT and its collector current supplied to an input terminal IN2. In Fig. 5, potentials on the output terminal OUT (the base of the transistor Q2) and input terminal IN2 are set to substantially the same level. Therefore, a potential difference V BE can be set between the collector and the emitter of the transistor Q2 and the input terminal In2 can be connected directly to the collector of the transistor Q2 without causing the transistor Q2 to be driven into saturation. The operation of the circuit shown in Fig. 5 is as follows: If the input terminal IN and output terminal OUT are balanced, the input and output currents of the current mirror circuit 17 are equal to each other and hence the collector currents of the transistors Q1 and Q2 should be set to an equal level. Therefore, voltages V BE on the transistors Q1 and Q2 should be set to an equal level. It follows that the potentials on the input terminal IN and output terminal OUT are equal to each other. If, here, a voltage on the input terminal IN goes high, a voltage V BE on the transistor Q1 is made greater and collector current in the transistor Q1 is made greater and turned back at the current mirror circuit 17. Thus, the greater current flows through the bases of the transistors Q4 and Q11. As a result, the base current in the transistor Q11 serves to turn a transistor Q3 OFF and the base current in the transistor Q4 serves to go toward the output terminal OUT and a potential on the output terminal OUT goes high. The potentials on the input and output terminals IN and OUT are made at a stable state where there is a coincidence in level between the two. When the potential on the input terminal IN goes negative, a reverse operation results unlike the situation as set out above. The aforementioned embodiment has the following advantages. The current amplification factors of the output stage in the circuit shown in Fig. 2 are: h FE (NPN) times at an upper side (Q4) and h FE (PNP) times at a lower side (Q3) of the circuit shown in Fig. 2. The current amplification factors of the output stage in the circuit shown in Fig. 3 are: h FE (PNP) × h FE (NPN) time at an upper side (Q12, Q4) and h FE (NPN) × h FE (PNP) times at a lower side (Q11, Q3) of the circuit shown in Fig. 3. The current amplification factors of the output stage in the circuit shown in Fig. 4 are h FE (NPN) times at an upper side (Q4) h FE (NPN) × h FE (PNP) times at the lower side (Q11, Q3) of the circuit shown in Fig. 4. From the results as set out above, the circuit of Fig. 3 appears best as the current amplification factor, but, in an actual integrated circuit, the current amplification factor is h FE (PNP) < h FE (NPN) times since a lateral type transistor is employed as the PNP transistor. It is very important to compensate for the current amplification factor hFE of the lateral PNP transistor. In actual practice, there may be almost no difference between the cases of Figs. 3 and 4. The circuit of Fig. 3 requires two current sources (32, 33), while, on the other hand, the circuit of Fig. 4 requires one constant current source (33) to achieve less number of elements. Fig. 6 shows another embodiment of the present invention. In the embodiment shown in Fig. 6, the circuit of Fig. 4 is applied to a complementary differential amplifier including a PNP transistor 18, NPN transistor 19 and constant current source 20 at an input stage. A negative feedback circuit 25 is connected across the base of the input stage transistor 19 and an output terminal OUT, noting that a positive feedback circuit may be employed instead. In the circuit shown in Fig. 6, the base of the transistor 19, which serves as the feedback terminal, goes high by an amount 2V BE with respect to an input terminal IN. If the base of the transistor 19 is connected to the output terminal OUT through the feedback circuit 25, the gain and frequency characteristic can optionally be set by properly designing the arrangement of the feedback circuit 25. Fig. 7 shows a variant of the circuit shown in Fig. 6. Although, in the circuit shown in Fig. 6, the input terminal IN is provided on a low potential side, the circuit shown in Fig. 7 is symmetrically arranged relative to that shown in Fig. 6 such that an input terminal IN is provided on a high potential side, and can obtain the same advantage as in the circuit shown in Fig. 6. The present invention is not restricted to the aforementioned embodiments only, but various changes or modifications of the invention may be made without departing from the spirit and scope of the present invention. For example, the transistor Q12 as a diode-connected transistor in the previous embodiments may be equivalently replaced by an ordinary diode 14 as shown in Fig. 8. In the embodiments shown in Figs. 4 to 7, the transistors Q3 and Q12 are of the same polarity and the transistors Q4 and Q11 are of the same polarity, thus ensuring a better pairing property. It is thus possible to cancel a variation in temperature characteristic between the transistors as well as a variation in products manufactured. According to the present invention, an amplifier using a push-pull output circuit can be manufactured with less number of elements. Reference signs in the claims are intended for better understanding and shall not limit the scope.

Claims: An amplifier constituting a push-pull output circuit, comprising: a first transistor (Q12) of first polarity type having its emitter connected to a first input terminal (IN1) and its base and collector connected to a second input terminal (IN2); a second transistor (Q11) of second polarity type having its base connected to the second input terminal, its collector connected to a first potential supply terminal (15) and its emitter connected to a second potential supply terminal (16) through a first current source (33); a third transistor (Q3) of the first polarity type having its base connected to the emitter of the second transistor, its collector connected to the second potential supply terminal and its emitter connected to an output terminal (OUT); and a fourth transistor (Q4) of second polarity type having its base connected to the first input terminal, its collector connected to the first potential supply terminal and its emitter connected to the output terminal, wherein the first to fourth transistors constitute the push-pull output circuit. An amplifier according to claim 1, wherein a differential amplifier (11) is provided at an input stage and comprises a pair of fifth and sixth transistors (Q1, Q2), the fifth transistor (Q1) having its collector current supplied to a current mirror circuit (17), an output current in the current mirror circuit being input to the first input terminal of the push-pull output circuit, the sixth transistor (Q2) having its base connected to the output terminal (OUT) of the push-pull output circuit and its collector current supplied to the second input terminal of the push-pull output circuit, providing a voltage follower circuit. An amplifier according to claim 1, wherein a complementary differential amplifier section is provided at an input stage, a collector output on the complementary differential amplifier being input to either one of the first and second input terminals of the push-pull output circuit and the other input terminal being connected to a constant current source (20), the output terminal (OUT) of the push-pull output circuit being connected to one input terminal of the complementary differential amplifier through a feedback circuit (25), and the other input terminal of the complementary differential amplifier acting as a signal input terminal. The amplifier according to any preceding claim, characterized in that said first transistor is replaced by a diode (14).

Inventors: YOSHIDA YOSHIHIRO C O INTELLEC, YOSHIDA, YOSHIHIRO, C/O INTELLECTUAL PROPERTY DIV.
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1991
Main classification: H03F3
IPC codes: H03F3