Emitter-grounded amplifier circuit with bias circuit

Abstract: An amplifier circuit has an amplifying transistor (Q₁) having its emitter directly grounded and a biasing transistor (Q₄) for supplying a bias current to the base of the amplifying transistor through its emitter. The biasing transistor receives at its base an output voltage generated and forwarded from a bias voltage generating circuit which is composed of a constant current source (7), a constant current transistor (Q₂) and another biasing transistor (Q₃). One bias voltage generating circuit may provide its output voltage commonly to a plurality of biasing transistors each associated with the amplifying transistor. The circuit makes it possible to have the amplifying transistor operate at a desired operation point without using a resistor having a high resistance value. Further, since the emitter of the amplifying transistor is directly grounded, both the noise figure characteristics and high frequency characteristics are improved.

Description: The present invention relates to a transistor amplifying means and, more particularly, to an emitter-grounded high frequency amplifier circuit with a bias circuit. A conventional amplifying means known as a voltage feedback type self-biasing circuit is diagrammatically shown in Fig. 1. As shown therein, a transistor Q₁ has its collector connected to a signal output terminal 12 and connected to a power source terminal 10 through a load 8, its emitter grounded, and its base connected to a signal input terminal 11 and also connected to its collector through a feedback resistor 30. Fig. 2 is a circuit diagram showing another amplifying circuit known as a current feedback type self-biasing circuit. In this circuit, a voltage divided by serially-connected resistors 41, 42 is applied to the base of a transistor Q₁ as a bias voltage, and the current is fedback with the resistor 43 being connected to the emitter thereof. A capacitor 44 connected to the emitter is provided such that this emitter is grounded for AC components of an input signal applied at the input terminal 11. In the conventional circuit shown in Fig. 1, the base-collector voltage is given by the product of the base current and the feedback resistance and, if this is small, the transistor operates in a condition which is close to a saturation state, which results in deterioration in high frequency characteristics. A way to prevent the transistor from becoming the saturation state is to increase a resistance value of the feedback resistor 30. For instance, for the collector-base voltage to be 2 V with the collector current being 5 mA and the base current being 50 µA, it is necessary for the resistance value of the feedback resistor 30 to be as high as 40 kΩ. However, in the integrated circuit device, it is generally difficult to fabricate a resistor having such a high resistance value. The conventional amplifier circuit shown in Fig. 2 involves disadvantages in that it requires an AC-bypass capacitor 44 and, since the emitter is grounded through the resistor 43 and the capacitor 44, high frequency characteristics and noise characteristics are inferior as compare with those obtained where the emitter is directly grounded. Reference is also directed to US 3,903,479 which discloses an amplifier circuit comprising a plurality of transistors and resistors, an a.c. input signal source and a power supply terminal. With reference to the accompanying drawings of this patent specification, transistor 101 is connected as a grounded emitter amplifier and the base-emitter junction of transistor 111 is used to apply base potential to transistor 101. The emitter resistance of transistor 111 is the principal means used for resistance coupling of input signal from source 102 to transistor 101. Power supply 105 provides, via resistor 113, base current to transistor 111 and is also connected to the collector of transistor 111. It is, therefore, an object of the invention to overcome the problems existing in the conventional circuits and to provide an improved amplifier circuit. It is another object of the invention to provide a biasing circuit which is capable of stably supplying a bias current to an emitter-grounded transistor of the amplifying stage of the amplifier circuit. It is a further object of the invention to provide an amplifier circuit with an improvement in the noise characteristics and the higher frequency characteristics. According to one aspect of the invention, there is provided an amplifier circuit having at least first and second amplifying transistors each having a base connected to an input terminal, having a collector connected to an output terminal and connected to a power supply terminal through a load, and having an emitter grounded, the amplifier circuit being characterized by comprising: a first biasing transistor for supplying a bias current to the first amplifying transistor, the first biasing transistor having an emitter coupled to the base of the first amplifying transistor and a collector connected to the power supply terminal; a second biasing transistor for supplying a bias current to the second amplifying transistor, the second biasing transistor having an emitter coupled to the base of the second amplifying transistor and a collector connected to the power supply terminal; and a bias voltage generating circuit for supplying a bias voltage to the first and second biasing transistors, the bias voltage generating circuit including a constant current source a constant current source transistor having a collector connected to the power supply terminal through the constant current source and having an emitter grounded; and a third biasing transistor having a base connected to the collector of the constant current source transistor and also connected commonly to the bases of the first and second biasing transistors, an emitter coupled to the base of the constant current source transistor, and a collector connected to the power supply terminal, a size ratio between the third biasing transistor and the first biasing transistor or the second biasing transistor and that between the constant current source transistor and the first amplifying transistor or the second amplifying transistor being respectively m:n (m<n, and m, n being integers larger than 1). The above and other objects, features and advantages of the present invention will be apparent from the following description of preferred embodiments of the invention explained by way of example and with reference to the accompanying drawings. Fig. 1 is a circuit diagram showing an example of the prior art amplifier circuit; Fig. 2 is a circuit diagram showing another example of the prior art amplifier circuit; Fig. 3 is a circuit diagram showing a first embodiment according to the invention; and Fig. 4 is a circuit diagram showing another embodiment according to the invention. Now, embodiments of the present invention are explained with reference to the appended drawings. Throughout the following explanation, the same reference numerals or symbols refer to the same or like elements in all the figures of the drawings. Fig. 3 is a circuit diagram showing a first embodiment according to the present invention. As shown therein, an amplifying transistor Q₁ has its base connected to a signal input terminal 11, its collector connected to a signal output terminal 12 and also connected to a power supply terminal 10 through a load 8, and its emitter grounded directly. A bias voltage generating circuit is composed of a constant current source 7, transistors Q₂, Q₃ and an emitter resistor 15. An output voltage of this bias voltage generating circuit is taken out from the collector of the transistor Q₂ and is applied to the base of a biasing transistor Q₄. The biasing transistor Q₄ supplies a bias current to the base of the amplifying transistor Q₁ through an emitter resistor 16. Here, assuming that, as an example, a size ratio between the transistors Q₃ and Q₄ and that between the transistors Q₂ and Q₁ are respectively 1 : 10 and a size ratio between the emitter resistors 15 and 16 is 10 : 1 (with layer resistances thereof assumed to be the same), the base-emitter voltage of the transistor Q₂ and that of the transistor Q₁ will be the same. In this case, if the current to flow in the transistor Q₂ is 1 mA, the current to flow in the transistor Q₁ will be 10 mA. In the above example, the current flows in the amplifying transistor Q₁ is determined by both the size ratio of the respective transistors and the size ratio of the respective emitter resistors. However, it should be noted that it is possible to control the current to flow in the amplifying transistor Q₁ by varying only the size ratio of the transistors or only the size ratio of the resistors. Further, where the constant current source 7 is composed of a resistor only, the resistance values of such resistor may be changed for controlling the bias current. In the circuit shown in Fig. 3, the emitter resistor 16 is provided for the purpose of reducing to the minimum an influence that the bias circuit may give to a signal circuit or signal line. However, where the circuit impedance of the transistor Q₄ seen from the signal input terminal 11 is sufficiently high as compared with the impedance of the signal circuit, the emitter resistor 16 may be omitted. The omission of the other emitter resistor 15 gives no influence on the signal circuit. Fig. 4 is a circuit diagram showing an amplifier circuit of a second embodiment according to the present invention. In this embodiment, the output voltage of only one bias voltage generating circuit composed of a constant current source 7, transistors Q₂, Q₃ and an emitter resistor 15 is applied to each of the bases of biasing transistors Q₄, Q₆ of a plurality of amplifying circuits. That is, besides the amplifying circuit shown in Fig. 3, there is provided in this arrangement an additional amplifying circuit composed of an amplifying transistor Q₅, a biasing transistor Q₆, an emitter resistor 17 and a load 9. The base and the collector of the amplifying transistor Q₅ are respectively connected to a signal input terminal 13 and a signal output terminal 14. The current to be supplied by the bias voltage generating circuit to the biasing transistor only requires 1/h FE of the base current of the amplifying transistor. Therefore, there is no problem in the circuit operation even where only one bias voltage generating circuit produces bias currents for a plurality of amplifying circuits as in the arrangement according to this second embodiment. In the case where this arrangement is realized in an integrated circuit device, a bias transistor may be disposed between the amplifying transistors and in this way it is possible to ensure the necessary isolation or separation between these amplifying transistors. As explained above, the feature of the invention resides in the arrangement wherein the collector current of the biasing transistor which receives the output voltage from the bias voltage generating circuit as a base input is to be the base current of the amplifying transistor. Thus, it is possible to supply the bias current to the amplifying transistor as stably as in a current-mirror circuit configuration, and it is made possible to have the amplifying transistor operate at a desired operation point without using a resistor having a high resistance value such as in a conventional voltage feedback type amplifier circuit. Further, according to the present invention, since the emitter of the amplifying transistor is directly grounded, it is possible to improve the noise figure characteristics and the high frequency characteristics of the circuit. While the invention has been described in its preferred embodiments, it is to be understood that the words which have been used are words of description rather than limitation and that changes within the purview of the appended claims may be made without departing from the true scope of the invention in its broader aspects.

Claims: An amplifier circuit having at least first and second amplifying transistors (Q₁, Q₅) each having a base connected to an input terminal (11, 13), having a collector connected to an output terminal (12, 14) and connected to a power supply terminal (10) through a load (8, 9), and having an emitter grounded, said amplifier circuit being characterized by comprising: a first biasing transistor (Q₄) for supplying a bias current to said first amplifying transistor (Q₁), said first biasing transistor having an emitter coupled to the base of said first amplifying transistor and a collector connected to said power supply terminal; a second biasing transistor (Q₆) for supplying a bias current to said second amplifying transistor (Q₅), said second biasing transistor having an emitter coupled to the base of said second amplifying transistor and a collector connected to said power supply terminal; and a bias voltage generating circuit for supplying a bias voltage to said first and second biasing transistors (Q₄, Q₆), said bias voltage generating circuit including a constant current source (7); a constant current source transistor (Q₂) having a collector connected to said power supply terminal through said constant current source and having an emitter grounded; and a third biasing transistor (Q₃) having a base connected to the collector of said constant current source transistor and also connected commonly to the bases of said first and second biasing transistors (Q₄, Q₆), an emitter coupled to the base of said constant current source transistor, and a collector connected to said power supply terminal, a size ratio between said third biasing transistor (Q₃) and said first biasing transistor (Q₄) or said second biasing transistor (Q₆) and that between said constant current source transistor (Q₂) and said first amplifying transistor (Q₁) or said second amplifying transistor (Q₅) being respectively m:n (m<n, and m,n being integers larger than 1). An amplifier circuit according to Claim 1, which includes a first resistor connected between the emitter of said third biasing transistor (Q₃) and the base of said constant current source transistor (Q₂), a second resistor (16) connected between the emitter of said first biasing transistor (Q₄) and the base of said first amplifying transistor (Q₁) and a third resistor (17) connected between the emitter of said second biasing transistor (Q₆) and the base of said second amplifying transistor (Q₅). An amplifier circuit according to Claim 2, wherein a resistance ration between said first resistor (15) and said second resistor (16) or said third resistor (17) is n:m (m<n, and m,n being integers larger than 1).

Inventors: ASAZAWA HIROSHI C O NEC CORPOR, ASAZAWA, HIROSHI, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1991
Main classification: H03F1
IPC codes: H03F3, H03F1