Process for etching a conductive bi-layer structure

Abstract: A process for the preparation of a semiconductor device, comprising the steps of, (a) forming a mask including an organic film on a laminated film consisting of a metallic silicon compound layer and a non-single crystalline silicon layer formed over a substrate on which an oxide layer is formed, (b) etching the laminated film under a plasma atmosphere of a mixed gas including a chlorine gas and an oxygen gas by heating the substrate to a temperature of 60°C or more to fabricate the laminated film into an almost vertical figure in section, and (c) removing the mask from the laminated film. In this process, the laminated film consisting of a metal silicon compound layer on which a resist mask is formed, and a polycrystalline silicon layer formed over a substrate, can be given vertical patterning profile edge, and the uniformity of the etching rate in the substrate is enhanced. Further, as a deposition gas is not used in the present process, the occurrence of loose particles is restrained.

Description: Field of the Invention The present invention relates to a process for the preparation of a semiconductor device. More particularly, the process comprises the dry etching of a laminated film consisting of a metallic silicon layer and a non-single crystalline layer. Background of the Invention The production of integrated circuits, including semiconductor devices, requires accurate processing techniques. In this context, it is known to use a laminated film consisting of a metallic silicon compound layer and a polysilicon layer. Dry etching of such a film has employed SF 6 and CCl 4 as the etching gas. However, undercutting of the etched pattern may occur, so that the accuracy of the pattern dimensions is low. Further, the selectivity of a polycrystalline silicon to silicon dioxide is low. Dry etching has also used a mixture of SF 6 and O 2 . For example, polycide-structure etching by an SF 6 glow discharge, using a low cycle excitation parallel flat-type reactor is disclosed by M.E. Coe and S.H. Rogers: Solid State Technology (Japanese edition) (1982). However, there is considerable undercutting of the etched pattern. Japanese Examined Patent Publication (Kokoku) No. 61-168228 discloses two-step etching, i.e. reactive ion etching using a fluorine-containing gas, for the metallic silicide, and ion etching using a chlorine-type gas, for the polycrystalline silicon. SF 6 gas and CCl 4 gas are used for the first etching step, and CCl 4 gas and O 2 gas are used for the second etching step. No vertical pattern is obtained, even though the amount of undercutting is reduced to a certain extent. Furthermore, the selectivity to the silicon dioxide in the first etching step is low, e.g. 1 to 2, and the selectivity in the second etching step is also low, e.g. 2 to 3. Also, differences exist between the patterning profile obtained at the area wherein the space to be etched per unit space is large (hereinafter called the coarse area), and the area wherein the space to be etched per unit is small (hereinafter called the thick area). Therefore, this method is not suitable for the preparation of a semiconductor device having both coarse and thick portions. Furthermore, use of CCl 4 gas is now banned under environmental protection laws. Dry etching using mixed Cl 2 and BCl 3 gases, for a double film consisting of a metallic silicon compound layer and a polycrystalline silicon, is disclosed in Japanese Patent Application No. 59-85051. BCl 3 gas is apt to form by-products, i.e. deposits. It forms a vertical pattern in which the laminated film is protected by a side wall. Nevertheless, a small amount of BCl 3 gas causes a change of the etching rate, and accordingly, the pattern is not uniform in the field of the substrate. Thus, the reproducibility is poor, due to the influence of the BCl 3 deposited in the etching reaction chamber. Also, because BCl 3 is a deposition gas, a gas flowmeter becomes clogged and the particles are deposited in the etching reaction chamber. A similar problem arises if the BCl 3 is replaced by SiCl 4 . Reactive ion etching using mixed Cl 2 and O 2 gases for a metal silicide single layer is disclosed by Japanese Examined Patent Publications (Kokoku) Nos. 60-064476, 01-243430 and 02-094520. This procedure does not provide vertical edges. The etching rate of the upper metal silicon compound layer is faster than that of the lower polycrystalline silicon layer. Also, the uniformity of the etching rate of the metal silicon compound layer is poor, and thus the obtained pattern is not uniform in the substrate. EP-A-0328350 discloses dry etching with HBr or Br 2 , for the precise control of vertical or taper etching of a semiconductor wafer. EP-A-0284308 discloses a polycide etch process using SiCl 4 and HCl. Summary of the Invention According to the present invention, a process for the preparation of a semiconductor device, comprises the steps of: (a) forming a mask including an organic film on a laminated film consisting of a tungsten silicide layer and a non-single crystalline silicon layer formed over a substrate on which an oxide layer is formed; (b) etching the laminated film under a plasma atmosphere including a mixture of chlorine gas and 6 to 30%, based on the mixture, of oxygen gas, by heating the substrate to 60 to 150°C, to remove the tungsten silicide compound and to expose the non-single crystalline layer; (c) etching the non-single crystalline layer under a plasma atmosphere of hydrogen bromide gas, by heating the substrate to 60 to 150°C; and (d) removing the mask from the laminated film. In the present invention, the term "non-single crystalline silicon" means polycrystalline silicon, amorphous silicon, or fine crystalline silicon dispersed in amorphous silicon. Brief Description of the Drawings Objects and advantages of the present invention will be made clear by the following description of the present invention, with reference to the accompanying drawings, wherein: Figure 1 is a graph showing the relationship between the temperature of the substrate and the etching rate; Figures 2A through 2C are sectional views illustrating the relationship between the temperature of the substrate and etched patterns; Figure 3 is a graph showing the relationship between the temperature of the substrate and the uniformity of the etch rate for W silicide; Figure 4 is a schematic illustration showing an edge profile of the edged W polycide when using a silicon dioxide mask; Figure 5 is a schematic representation of the RIE system used in the embodiment of the present invention; Figures 6A and 6B are sectional views illustrating a sample employed in the embodiment of the present invention; Figure 7 is a graph showing the relationship between the mixed ratio of O 2 and the etching rate; Figure 8A through 8C are sectional views illustrating the relationship between the mixed ratio of O 2 and the edge profile; Figure 9 is a graph showing the relationship between the mixed ratio of O 2 and the uniformity of the etching rate; Figure 10 is a sectional view illustrating the pattern obtained by an embodiment of the present invention; and Figure 11 is a sectional view illustrating the pattern obtained by another embodiment of the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS To fabricate a laminated film consisting of a metal silicon compound layer and a polycrystalline silicon to have an almost vertical edge profile, it is necessary to obtain an etching rate for the tungsten silicide layer which, in step (b), is the same as or faster than the rate for the polycrystalline silicon layer. The present inventors carried out the following research in which the substrate on which the laminated film consisting of the metal silicon compound (in this experiment, tungsten silicide was employed) film and the polycrystalline silicon was heated to a temperature of 60°C using a positive-working photoresist (hereinafter abbreviated as "resist") to etch the laminated film by using a mixed gas of Cl 2 and O 2 , and as a result, found that the etching rate of the tungsten silicide (hereinafter abbreviated as "W silicide") was almost the same as that of the polycrystalline silicon. Then further experiments were made in which the substrate was heated at a temperature of 80°C to effect the etching, and as a result, it was found that the etching rate of the W silicide is faster than that of the polycrystalline silicon. Figure 1 illustrates the relationship between the temperature of the substrate and the etching rate for each layer, i.e., the polycrystalline silicon layer, the W silicide layer, and the silicon dioxide layer. The inventors then investigated the relationship between the temperature of the substrate and the obtained pattern, and obtained the results shown in Fig. 2. As shown in Fig. 2, the laminated film consisting of the W silicide layer 4 and polycrystalline silicon layer 3 (hereinafter abbreviated as "W polycide layer") was etched to form an almost vertical edge profile when the substrate 1 was heated to a temperature of 60°C or more. When the temperature of the substrate became higher than 150°C, the resist 5 was melted and deformed, and thus could not be used as a mask. Note, the numeral 2 in Fig. 2 represents silicon dioxide. Therefore, the upper limit of the temperature of the substrate is 150°C. Also, the etching rate of the silicon dioxide is not changed when the temperature of the substrate becomes high, as shown in Fig. 1. Therefore, the higher the temperature of the substrate, the higher the selectivity of the polycrystalline silicon to the silicon dioxide. When the temperature of the substrate was 80°C, this selectivity ratio was 4 to 5. Furthermore, the uniformity of the etching rate of the W silicide depends on the temperature of the substrate, and the higher the temperature of the substrate, the greater the uniformity of the etching rate as shown in Fig. 3. Therefore, it is important to control the temperature of the substrate when etching the W polycide. Also, when using silicon dioxide instead of the resist as the mask, the W silicide was heated to a temperature of 80°C while employing a mixed gas of Cl 2 and O 2 as an etching gas. As the result of this etching, a pattern with undercutting and almost no vertical edge profile was obtained as shown in Fig. 4. Therefore, it is obviously necessary to employ an organic mask, such as at least a resist, in this invention. The W polycide covered by a resist mask was heated to a temperature of 80°C while using hydrogen bromide as the gas for etching, and as the result, it was found that the W silicide was only very slightly etched, and therefore, hydrogen bromide cannot be employed as the etching gas for etching the W silicide, in step (b). Nevertheless, by employing hydrogen bromide as the etching gas, polycrystalline silicon covered by the resist mask was heated to a temperature of 80°C, and as a result, it was found that an almost vertical edge profile was obtained. Accordingly, based on the above phenomenon, hydrogen bromide is employed as the etching gas in the second etching step, i.e. step (c). The reasons for employing hydrogen bromide are as follows: W silicide is only slightly etched with hydrogen bromide, due to the slow etching rate thereof, and further, the selective ratio to silicon dioxide in the case of hydrogen bromide is large. Furthermore, polycrystalline silicon was heated to a temperature of 80°C while employing silicon dioxide instead of the resist as the etching mask, and as a result, it was found that an almost vertical edge profile was obtained. Also, it was found that the selectivity of polycrystalline silicon to silicon dioxide was 100 or more, and thus a resist including carbon which increases the etching rate for silicon dioxide, was not employed. As shown above, it was found that W polycide was fabricated to form an almost vertical edge profile by etching the W silicide coated by the resist mask while heating the W silicide to a temperature of 80°C and using a mixed gas of Cl 2 and O 2 , followed by etching the polycrystalline silicon by heating the polycrystalline while employing the resist and W silicide as the mask and using hydrogen bromide as the etching gas. In this case, the obtained selectivity of the polycrystalline to the lower silicon dioxide is about 10 to 20. As can be seen from the above description, the above two etching steps are necessary when a selectivity of more than five, to the lower silicon dioxide, is required. Note, when hydrogen bromide is employed in the second etching as the etching gas, the following effects are obtained. Namely, the Wo x and Wcl x particles adhered to the inner wall of the reaction chamber, which are formed in the first etching step, were covered by the Si Br x particles, and therefore, the Wo x and WCl x particle are not removed. Therefore, the Wo x and WCl x particles are not adhered to wafers as dust. The present invention will now be described in detail with reference to the following Examples; Examples 4 to 6 are illustrative embodiments. In the following Examples, the parallel plate-type RIE system is employed, Figure 5 is a schematic representation of the one type of such an RIE system. In this RIE system, 11 is a chamber, 12 is an exhaust gas system, 13 and 13' is an electrode, 14 is a RF electric power supply, 15 is a quartz cover, 16 is a gas inlet, 17 is a current electric supply, 18 is an electrostatic chuck, 19 is a wafer, 20 is a laser interferometer, and 21 is a recorder. In the RIE system shown in Fig. 5, a wafer stage is provided with a water cooling unit, and the temperature of the wafer is controlled by the controlling the temperature of the circulation water. Also, a determination of the etching rate of the metal silicon compound and of the polycrystalline silicon, and a detecting of the end point are carried out thereby. Figure 6 is a schematic illustration of a sample employed in the embodiment of the present invention, wherein Fig. 6A is a sectional view of a sample in which a polycrystalline silicon layer 3 having a thickness of 200 nm and a W silicide layer 4 having a thickness of 200 nm are formed on a silicon substrate 1, and a resist mask 5 is selectively coated over the W silicide layer 4. The numeral 2 represents a silicon dioxide layer. Figure 6B is a sectional view of a sample in which a polycrystalline silicon layer 3 having a thickness of 200 nm and a W silicide layer 4 having thickness of 200 nm are formed over a silicon substrate 1, and a upper resist 5 and a lower silicon dioxide mask 6 are selectively coated on the W silicide layer 4. Example 1 Using a mixed gas of Cl 2 and O 2 as an etching gas, the sample illustrated in Fig. 2A was etched under the following conditions while changing the temperature of the substrate 1. Note, the total flow amount was fixed at an amount of 100 sccm. The etching conditions were as follows; Mixed ratio of O 2 : 11% RF power : 500 W (1.1 W/cm 2 ) Pressure : 6.67 Pa (0.05 Torr) Figure 1 illustrates the relationship between the etching rate of each layer and the temperature of the substrate. As the temperature of the substrate becomes higher, the etching rate of the W silicide and the polycrystalline silicon becomes faster, but the etching rate of the silicon dioxide remains fixed. As a result, the selectivity becomes higher as the temperature of the substrate becomes higher, and when the temperature of the substrate reached 80°C, the selectivity of the polycrystalline to the silicon dioxide was 5.0. Figure 2 illustrates the relationship between the temperature of the substrate and the edges of the pattern of the layers. As seen from Fig. 2, when the temperature of the substrates was 60°C or more, the W silicide layer 4 was etched to form an almost vertical edge profile. Figure 3 shows the relationship between the temperature of the substrate an the uniformity of the etching rate for the W silicide layer 4. When the temperature of the substrate becomes higher the uniformity of the etching rate for the W silicide layer 4 is good, and when the temperature of the substrate is 60°C or more, the uniformity of the etching rate is fixed at almost ±15%. Example 2 Using a mixed gas of Cl 2 and O 2 as an etching gas, the sample illustrated in Fig. 6A was etched under the following conditions, while changing the mixed ratio of O 2 . The etching conditions were as follows; Stage temperature : 80°C RF power : 500 W (1.1 W/cm 2 ) Pressure : 6.67 Pa (0.05 Torr) Figure 7 illustrates the relationship between the etching rate of each film and the mixed ratio of O 2 . As the mixed ratio of O 2 becomes higher, the etching rate of each layer becomes faster. Conversely, when the mixed ratio of O 2 exceed 11%, the etching rate becomes slow. Figure 8 illustrates the relationship between the mixed ratio of O 2 and the etching profile. When the mixed ratio of O 2 is 6% or less, the etching profile has a reverse taper, but when the mixed ratio of O 2 is within a range of 6% to 30%, an almost vertical etching profile is obtained. At a mixed ratio of O 2 of 30% or more, however, a side-etched profile is obtained. Figure 9 illustrates the relationship between the mixed ratio of O 2 and the uniformity of etching rate for the W silicide layer 4. As the mixed ratio of O 2 becomes higher, the uniformity of the etching rate for the W silicide layer 4 becomes good, and when the mixed ratio of O 2 is more than 6%, the uniformity of the etching rate becomes fixed at almost ±14%. After the etching step, the deposits built up on the wall of the vacuum chamber were peeled off and fell onto the wafer as particles. The amounts of such particles were determined, and a result, 280 particles having a size of 0.2 µm or over in number were found. Also, after said etching gas step was carried out, the plasma treatment process using hydrogen bromide gas was effected. The treatment conditions were as follows: Flow rate of hydrogen bromide 100 sccm; inner pressure of the treatment chamber 17.3 Pa (130 mTorr); and RF power 300 w. After the plasma treatment, the amounts of particles were measured as above, and a results, 30 particles having a size of 0.2 µm or over were found. From these results, it was found that the occurrence of particles was substantially prevented by a plasma treatment using hydrogen bromide. Example 3 Using a mixed gas of Cl 2 and O 2 in the first etching step, and using HBr in the second etching step, the sample illustrated in Fig. 6(A) was etched under the following conditions, and as a result, an almost vertical etching profile as shown in Fig. 10 was obtained. Also, the obtained etching profile was vertical regardless of the patterning of each of the coarse area and the thick area. The selectivity to the silicon dioxide layer was 5 in the first etching step, and 11 in the second etching step. The uniformity of the etching rate for the polycrystalline silicon when using HBr was ±10%. Parameter First etching step Second etching step Substrate temperature (°C) 80 80 Mixed ratio of O 2 (%) 11 - Flow amount of HBr (sccm) - 100 RF power (W) 500 500 Pressure (Pa(Torr)) 6.67(0.05) 26.7(0.20) Example 4 Using a mixed gas of Cl 2 and O 2 in the first etching step, and using HBr in the second etching step, the sample illustrated in Fig. 6(A) was etched under the following conditions. Parameter First etching step Second etching step Substrate temperature (°C) 80 80 Mixed ratio of O 2 (%) 11 - Flow amount of HBr (sccm) - 100 RF power (W) 500 300 Pressure (Pa (Torr)) 6.67 (0.05) 13.3 (0.10) In Fig. 8, the numerals 1, 2, 3, 4 and 5 have the same meaning as those of Fig. 6A. As a result, an almost vertical etching profile as shown in Fig. 10 was obtained. Also, the obtained etching profile was vertical regardless of the patterning of each of the coarse area and the thick area. The selectivity to the under silicon oxide layer was 5 in the first etching step, and 17 in the second etching step. The uniformity of the etching rate for the polycrystalline silicon when using HBr was ±5%. Example 5 Using a mixed gas of Cl 2 and O 2 in the first etching step, and using HBr in the second etching step, the sample illustrated in Fig. 6(B) was etched under the following conditions. Note, the resist was removed after the completion of the first etching step but before beginning the second etching step. Parameter First etching step Second etching step Substrate temperature (°C) 80 80 Mixed ratio of O 2 (%) 11 - Flow amount of HBr (sccm) - 100 RF power (W) 500 300 Pressure (Pa (Torr)) 6.67 (0.05) 13.3 (0.10) As a result, an almost vertical etching profile as shown in Fig. 11 was obtained. Also, the obtained etching profile was vertical regardless of the patterning of each of the coarse area and the thick area. The selectivity to the under silicon dioxide layer was 5 in the first etching step, and 100 in the second etching step. The uniformity of the etching rate for the polycrystalline silicon when using HBr for the second etching step was ±5%. Example 6 Using a mixed gas of Cl 2 and O 2 in the first etching step, and using HBr in the second etching step, the sample illustrated in Fig. 6(B), wherein the silicon dioxide was replaced by silicon nitride, was etched under the following conditions, and a result, an almost vertical etching profile as shown in Fig. 11 was obtained. Also, the obtained etching profile was vertical regardless of the patterning of each of the coarse area and the thick area. The selectivity to the under silicon dioxide layer was 5 in the first etching step, and 100 in the second etching step. The uniformity of the etching rate for the polycrystalline silicon when using HBr was ±5%. As described above, in accordance with the present invention, the laminated film consisting of a metal silicon compound layer on which a resist mask is formed, and a polycrystalline silicon layer formed over a substrate, can be given vertical patterning profile edge by heating the substrate to a temperature of 60°C or more under a plasma atmosphere of a mixed gas of Cl 2 and O 2 . Furthermore, as a result of heating the substrate, the uniformity of the etching rate of the substrate is enhanced, and further, as a deposition gas is not used in the present process, the occurrence of loose particles is restrained. Accordingly, the present process provides an improvement of the fine manufacturing technique when producing semiconductor devices.

Claims: A process for the preparation of a semiconductor device, which comprises the steps of: (a) forming a mask including an organic film on a laminated film consisting of a tungsten silicide layer over a non-single crystalline silicon layer formed over a substrate on which an oxide layer is formed; (b) etching the laminated film under a plasma atmosphere including a mixture of chlorine gas and 6 to 30%, based on said mixture, of oxygen gas, by heating the substrate to 60 to 150°C, to remove the tungsten silicide compound and to expose the non-single crystalline silicon layer; (c) etching the non-single crystalline silicon layer under a plasma atmosphere of hydrogen bromide gas, by heating the substrate to 60 to 150°C; and (d) removing the mask from the laminated film. A process according to claim 1, wherein the mask includes an organic film and also an inorganic film on the laminated film, and the mask of the organic film is removed from the laminated film between the two etching steps. A process according to claim 1 or claim 2, in which the organic film is made of a silicon dioxide or a silicon nitride.

Inventors: IIZUKA KATSUHIKO, IIZUKA, KATSUHIKO
Applicants: FUJITSU LTD, FUJITSU LIMITED
Application year: 1991
Main classification: H01L21
IPC codes: H01L29, H01L21