Signal attenuator

Abstract: A first PIN diode (D R1 ) is connected to the input side of a tuner (T) at the front end of an FM receiver, in an AC coupled fashion parallel to the tuner (T). A correction inductance (L₂) is connected parallel to the first PIN diode (D R1 ) in an AC coupled fashion. The tuner (T) is connected, at its output side, parallel to a series-connected circuit of a correction capacitor (C₆) and a second PIN diode (D R2 ). The anodes of the first and second PIN diodes (D R1 ,D R2 ) are supplied with an automatic gain control (AGC) voltage. When the AGC voltage varies, the resistances of the first and second PIN diodes (D R1 ,D R2 ) vary in a manner to adjust the degree to which the correction inductance (L₂) and the correction capacitor (C₆) affect the resonance in the tuner.

Description: The present invention relates to a signal attenuator for use in the front end of an FM tuner circuit, and more particularly to a radio-frequency signal attenuator suitable for use in an automatic gain control (AGC) circuit. Radio waves transmitted from FM (frequency modulation) broadcast stations are received by aerial antennas. The radio waves received by the antennas are of a very weak level ranging from several microvolts [µV] to several millivolts [mV]. Therefore, it is necessary to amplify the radio-frequency (RF) signal that is received by an FM receiver. In order to amplify an RF signal stably and sufficiently, it is first converted into a lower-frequency signal, i.e., a signal having an intermediate frequency (IF), which is internationally established as 10.7 [MHz]. The portion of an FM receiver which produces an IF signal is referred to as a "front end". The front end of an FM receiver comprises an RF amplifier connected to the input terminal for amplifying a received RF signal, a local oscillator for generating a frequency (local oscillation frequency) which is necessary to produce an IF signal, and a mixer for mixing the local oscillation frequency and the RF signal thereby to generate an IF signal. There are known various front end designs which greatly govern the performance of FM receivers. According to one arrangement, the front end includes a tuner and an AGC circuit for receiving a desired broadcast RF signal with a good S/N ratio. The AGC circuit extracts a portion of the IF signal from a front stage of an IF amplifier which is connected to the mixer, and produces, with a diode, a DC voltage that is proportional to the amplitude of the IF signal. Then, the DC voltage (AGC voltage) is fed back to the input stage of the front end, so that the attenuation of the input RF signal applied to the RF amplifier is regulated depending on the magnitude of the received RF signal. A signal attenuator is used to attenuate the input RF signal. One conventional signal attenuator includes a PIN diode connected between a signal line and a ground line. Since the PIN diode has a variable resistance depending on the forward current flowing therethrough, it causes a variable attenuation of a DC component of the signal flowing through the signal line, depending on the AGC voltage. The signal attenuator with the PIN diode is however disadvantageous in that the central frequency of the attenuation characteristics thereof tends to vary as the resistance of the PIN diode varies, resulting in a change in the central frequency of the tuner. However, the central frequency of the tuner should be prevented from varying because a change in the central frequency of the tuner would bring about a tracking error when a desired broadcast station is to be selected. JP-A-57054414 and US-A-3534278 disclose attenuator circuits employing PIN diodes to improve frequency response characteristics. It is therefore an object of the present invention to provide a signal attenuator which prevents the central frequency of attenuation characteristics thereof from varying when it attenuates a signal. According to the present invention, there is provided a signal attenuator comprising: a tuner composed of an inductance and a capacitor which are connected parallel to each other; an input coupling capacitor connected to the tuner and forming an input side of said tuner; a first PIN diode connected in parallel to an input side of said tuner through said coupling capacitor, said first PIN diode having an anode; a correction inductance connected in parallel to said first PIN diode in an AC coupled fashion; and a series-connected circuit composed of a correction capacitor and a second PIN diode which are connected in series with each other, said series-connected circuit being connected to an output side of said tuner in parallel thereto, said second PIN diode having an anode; and means for supplying an automatic gain control voltage to the anodes of said first and second PIN diodes. As the resistance of the first PIN diode is lowered, the coupling capacitor is virtually connected parallel to the tuner. Since the correction inductance is connected parallel to the first PIN diode, however, the central frequency of the tuner is prevented from being lowered. Specifically, the correction inductance acts to increase the central frequency of the tuner, thereby canceling out a reduction in the central frequency which is caused by the coupling capacitor. The correction inductance does not cope with every level of the input signal and requires fine adjustments because the correction inductance has a constant value. Therefore, the output side of the tuner is connected to the series-connected circuit of the correction capacitor for draining AC energy to ground and the second PIN diode. The resistance of the second PIN diode varies depending on the automatic gain control voltage to slightly vary the degree to which the correction capacitor affects the tuner, i.e., increases the central frequency thereof. In this manner, the central frequency of the tuner is thus prevented from varying. The above and other objects, features and advantages of the present invention will become more apparent from the following description when taken in conjunction with the accompanying drawings in which a preferred embodiment of the present invention is shown by way of illustrative example. In the drawings:- FIG. 1 is a circuit diagram of a conventional signal attenuator; FIG. 2 is a diagram showing the attenuation characteristics of the signal attenuator shown in FIG. 1; FIG. 3 is a circuit diagram of a signal attenuator according to the present invention; FIG. 4 is a diagram showing the attenuation characteristics of the signal attenuator shown in FIG. 3; FIG. 5a is a circuit diagram of a circuit which is equivalent to the signal attenuator shown in FIG. 4; FIG. 5b is a circuit diagram of a circuit modified from the circuit shown in FIG. 5a; FIG. 6 is a diagram showing the frequency characteristics of the circuit shown in FIG. 5b; FIG. 7a is a circuit diagram of a circuit which is equivalent to the signal attenuator shown in FIG. 4; FIG. 7b is a circuit diagram of a circuit modified from the circuit shown in FIG. 7a; and FIG. 8 is a diagram showing the frequency characteristics of the circuit shown in FIG. 7b. Prior to describing a preferred embodiment of the present invention, a general signal attenuator will first be described below for a better understanding of the present invention. FIG. 1 shows a general signal attenuator for use in an automatic gain control (AGC) in the front end of an FM receiver. An input signal V IN from an input signal source S such as an antenna or the like is transmitted through a signal source impedance Z g and applied to a tuner T through two coupling capacitors C 2 , C 3 . The tuner T comprises an inductance L 1 and a capacitor C 5 which are connected parallel to each other. Then, the signal selected by the tuner T is transmitted as an output signal V OUT through a coupling capacitor C 4 and supplied to a load impedance Z L . A first PIN diode D R1 is connected between ground and a signal line interconnecting the capacitors C 2 , C 3 . The first PIN diode D R1 has an anode to which an AGC voltage V AGC is applied through a resistor R 1 , a capacitor C 1 , and a diode D 1 . The first PIN diode D R1 acts as a variable resistor VR having a negative resistance VR which is variable depending on the forward current flowing between its anode and cathode. As viewed from the input signal source S, the first PIN diode D R1 is connected in series with the signal source impedance Z g . The first PIN diode D R1 and the signal source impedance Z g connected in series therewith divide the voltage of the input signal V IN , and the divided voltage is applied through the coupling capacitor C 3 to the tuner T. Therefore, the attenuation of the signal supplied to the tuner T depends on the resistance VR of the first PIN diode D R1 . A change in the level of the received signal is reflected by the AGC voltage V AGC , which is applied to the diode D 1 through the resistor R 1 and the capacitor C 1 that constitute a first low-pass filter. The operating point of the first PIN diode D R1 is thus determined by a DC voltage. Therefore, the first PIN diode D R1 acts to attenuate the level of the input signal V IN from the input signal source S depending on the input signal V IN . The signal attenuator shown in FIG. 1 has attenuation characteristics as shown in FIG. 2. The characteristic curves shown in FIG. 2 are plotted when the resistance VR is VR = R 1 [kΩ], R 2 [kΩ], and R 3 [kΩ], respectively. As shown in FIG. 2, as the resistance VR varies, the peak of the total impedance is shifted toward lower values, and hence the central frequency of the tuner T is shifted for the following reason: When the resistance VR of the first PIN diode D R1 is lowered, the potential at the input side of the coupling capacitor C 3 approaches the ground level in a cyclically varying manner (at a radio frequency). The capacitor C 3 is thus virtually connected parallel to the tuner T, and hence the number of parallel-connected capacitors of the tuner T is increased, lowering the resonant frequency of the tuner T. If the central frequency of the tuner T varies to a large extent, then a tracking error will be caused when the station of a desired frequency is to be selected. A signal attenuator according to the present invention will now be described below. FIG. 3 shows a signal attenuator according to the present invention. Those parts shown in FIG. 3 which are identical to those shown in FIG. 1 are denoted by identical reference characters. The signal attenuator shown in FIG. 3 differs from the signal attenuator shown in FIG. 1 in that a correction inductance L 2 is connected parallel to the first PIN diode D R1 through a DC cutoff capacitor C 8 in an AC coupled fashion, a series-connected circuit of a correction capacitor C 6 and a second PIN diode D R2 is connected parallel to the capacitor C 5 , and the AGC voltage V AGC is also supplied to the junction between the correction capacitor C 6 and the second PIN diode D R2 through a resistor R 2 , a capacitor C 7 , and a diode D 2 . The correction capacitor C 6 has a relatively small capacitance. The second PIN diode D R2 serves as a variable resistor whose resistance depends on the forward current flowing therethrough, as with the first PIN diode D R1 . The resistor R 2 and the capacitor C 7 make up a second low-pass filter. The diode D 2 applies the AGC voltage V AGC as a bias voltage to the second PIN diode D R2 . When the input signal V IN from the input signal source S increase in level, the DC voltage applied to the first PIN diode D R1 also increased, and the resistance VR thereof decreases. At this time, the RF potential at the input side of the coupling capacitor C 3 , which is determined by the voltage dividing ratio of the signal source impedance Z g and the resistance VR of the first PIN diode D R1 , is lowered thereby to attenuate the input signal. When the potential at the input side of the coupling capacitor C 3 is lowered to a large extent, it would approach the ground level, virtually connecting the coupling capacitor C3 parallel to the tuner T, whose central frequency would be shifted into a lower range. According to the present invention, the correction inductance L 2 connected parallel to the first PIN diode D R1 acts to increase the central frequency of the tuner T. As a result, since the correction inductance L 2 cancels out a reduction in the central frequency, which is caused by the coupling capacitor C 3 , the central frequency is prevented from being lowered. The correction inductance L 2 has a constant value, and does not cope with every attenuation achieved by the first PIN diode D R1 . To solve such a problem, the second PIN diode D R2 , which operates in the same manner as the first PIN diode D R1 , is employed to adjust the degree to which the correction capacitor C 6 contributes to the tuner T. The problem posed by the coupling capacitor C 3 is solved by the combination of the correction inductance L 2 , the correction capacitor C 6 , and the second PIN diode D R2 . The signal attenuator shown in FIG. 3 has attenuation characteristics shown in FIG. 4 where the central frequency is substantially prevented from being shifted. The diodes D 1 , D 2 may comprise switching diodes. Since switching diodes suffer from nonlinear distortion, however, the diodes D 1 , D 2 should preferably comprise PIN diodes. The resistance of the PIN diodes is thus reduced equivalently to 1/2. The canceling-out of a reduction in the central frequency will be described below with reference to FIGS. 5a through 8. FIG. 5a shows a circuit equivalent to the signal attenuator shown in FIG. 3. FIG. 5b shows a circuit modified from the circuit illustrated in FIG. 5a, with the second PIN diode DR2 omitted. FIG. 6 shows the frequency characteristics of the circuit shown in FIG. 5b, the characteristic curves being plotted with respect to difference resistances VR. Study of FIG. 6 indicates that the central frequency of the tuner is shifted into a lower range when the resistance VR varies from a low value of 10 Ω to a high value of Ω. FIG. 7b shows another circuit modified from the equivalent circuit shown in FIG. 7a, with the first PIN diode DR1 omitted. FIG. 8 illustrates the frequency characteristics of the circuit shown in FIG. 7b, the characteristic curves being plotted with respect to difference resistances VR. As shown in FIG. 8, the central frequency of the tuner is shifted into a higher range when the resistance VR varies from a low value of 100 Ω to a high value of Ω. Since the signal attenuator shown in FIG. 3 is a combination of the circuits shown in FIGS. 5b and 7b, the shifts or variations of the central frequencies in the circuits shown in FIGS. 5b and 7b are canceled out by each other in the signal attenuator shown in FIG. 3, and the stable attenuation characteristics shown in FIG. 4 can be achieved. With the present invention, inasmuch as a change in the central frequency of the tuner is suppressed when the input signal is attenuated, a tracking error with respect to the received frequency is prevented from happening.

Claims: A signal attenuator comprising: a tuner (T) composed of an inductance (L 1 ) and a capacitor (C 5 ) which are connected parallel to each other; an input coupling capacitor (C 3 ) connected to the tuner and forming an input side of said tuner; a first PIN diode (D R1 ) connected in parallel to the input side of said tuner (T), said first PIN diode (D R1 ) having an anode; a correction inductance (L 2 ) connected in parallel to said first PIN diode (D R1 ) in an AC coupled fashion; and a series-connected circuit composed of a correction capacitor (C 6 ) and a second PIN diode (D R2 ) which are connected in series with each other, said series-connected circuit being connected to an output side of said tuner (T) in parallel thereto, said second PIN diode (D R2 ) having an anode; and means for supplying an automatic gain control voltage to the anodes of said first and second PIN diodes (D R1 ,D R2 ). A signal attenuator according to claim 1, wherein said correction inductance (L 2 ) is connected to said first PIN diode (D R1 ) through a DC cutoff capacitor. A signal attenuator according to claim 1, wherein means for supplying an automatic gain control comprises a first low pass filter (R 1 , C 1 ) and a first diode (D 1 ) provided between said first PIN diode (D R1 ) and said first low pass filter, and a second low pass filter (R 2 , C 7 ) and a second diode (D 2 ) provided between said second PIN dipode (D R2 ) and said second low pass filter.

Inventors: KOSUGA TADASHI, KOSUGA, TADASHI, KOSUGA, TADASHI, C/O PIONEER ELECTRONIC CORP.
Applicants: PIONEER ELECTRONIC CORP, PIONEER ELECTRONIC CORPORATION
Application year: 1991
Main classification: H03H7
IPC codes: H04B1, H03G3, H03H7