Painting pattern generation system and pattern painting method using the system

Abstract: Disclosed is a painting pattern generation system for painting interior areas enclosed by outlines by using outline data and flag data, comprising a first memory (11A) used for storing the outline data by which patterns in the interior areas enclosed by the outline are generated, a second memory (11B) used for storing the flag data by which the interior areas are painted, an operational circuit (21) for reading out the outline data and the flag data in the first and the second memories (11), for performing an exclusive OR (XOR) operation between two adjacent items of flag data in the second memory (11B) in a predetermined scan line direction, and for performing predetermined logical operations between the result of the XOR operation and the outline data in the first memory (11A) in the scan line direction for all the scan lines to obtain the data for painting the pattern in the interior areas enclosed by the outline data, and a writing circuit for writing the data for the pattern painted by the operational circuit into the first memory (11A) and for further overlapping the data for the next outline on the painted pattern data in the first memory. A pattern painting method using the system is also disclosed

Description: BACKGROUND OF THE INVENTION Field of the Invention This invention relates to a painting pattern generation system for painting a plurality of regions enclosed by outlines (or boundaries) and a pattern painting method using the system. Description of the Prior Art A painting method is commonly known by which a plurality of pattern interior areas enclosed only by outlines (or boundaries) are selectively painted based on an even-odd rule. US 4,745,575 discloses a graphics display apparatus including a raster-scanned CRT refreshed from a bit-for-pel refresh buffer loaded with bit patterns by a microprocessor corresponding to desired image. To display shaded areas, additional control logic draws an outline of the area in an auxiliary memory, preferably using Bresenham's Algorithm, according to a specified rules. At a filling logic consisting of EXCLUSIVE-OR gates is used to fill draw the filled areas in the refresh buffer as the outline is read from the auxiliary memory into the refresh buffer. This hardware assistance by the control logic and edge fill logic to the microprocessor enables complex areas to be drawn and filled without unduly degrading the performance of the microprocessor. Fig. 1 is a block diagram of a painting pattern generation system which uses the even-odd method. The system comprises a local memory (or a bit-map memory) 11 including a first memory area and a second memory area A and B, each size of which is matched to the size of a pattern to be generated, a pattern generating device 9 by which the contents of the first and the second memories are read out and then processed by a logical operation to generate a pattern, a central processing unit CPU 1 as a host CPU (or a processor) which can control the operation of the pattern generating device 9, and a main memory 3 and a font memory 5 connected to the host CPU 1. In the painting pattern generation system, a white and a black pattern are expressed by two data units, "1" and "0". Next, an example of the conventional pattern painting method based on the even-odd method will now be explained with reference to Figs. 2A to 2C. In a step 1 as shown in Fig. 2A, the contents of the first and the second memories are initialized by the pattern generating device 9 under the control of the host CPU 1. Next, in a step 2 as shown in Fig. 2B, the pattern generating device 9 draws outline data in the first memory A and provides a flag data in the second memory B. The flag data is required for a painting operation and generated by a predetermined rule. Next, in a step 3 as shown in Fig. 2C, the pattern generating device 9 reads out the outline data and the flag data in the first and the second memories A and B, then calculates an exclusive OR (XOR) operation between two adjacent items of flag data along a scan line direction, which is a painting operation for the interior of an area enclosed by the outlines. At the same time, a logical OR operation between the result of the XOR operation and the outline data in the first memory A is carried out in the scan line direction. (This OR operation is a compensation operation for the painting operation.) The result of the OR calculation is written on the same scan line in the second memory B. The steps 1 to 3 are carried out for all scan lines on the outlines (or the closed curves which are generated by the outline data) involved in the pattern to obtain the completely painted pattern data. The completely painted pattern data is read out to the main memory 3 by the host CPU 1. In order to execute a next pattern generating operation, the steps 1 to 3 described above are performed repeatedly at the required times. However, there is a problem in the even-odd method in the prior art. For example, when there is a pattern having a plurality of closed curves (or boundaries) along the scan line direction shown in Fig. 3A, painted areas (the shaded portions shown in Fig. 3B) are provided alternately. In such a case, it is difficult to paint any required areas at random. When a pattern having several required areas to be painted is obtained by using the system comprising the conventional pattern generation system (in which the first memory region A stores outline data and the second memory region B contains flag data) based on the even-odd rule, the resultant pattern data is required as shown in Fig. 4B. In addition, in the prior art, when the resultant pattern as shown in Fig. 4C is required by using the conventional pattern generation system, it is possible to generate the pattern with many processes. But the processes requires much time and must be executed under the control of a host CPU. Each process can process only one segment which means a closed pattern). The operation procedures above will now be explained with reference to Figs. 5A to 5C. First, in a step 1 as shown in Fig. 5A, the pattern generating device 9 draws outline data and flag data for segments 101 and 105 shown in Fig. 4A in the first and the second memories A and B which have already been initialized completely under the control of the host CPU 1. Then, the outline data and the painted pattern data is stored in the first and the second memories A and B, respectively, after completion of these painting operations. Then, the host CPU 1 reads out the painted pattern data in the second memory B to be transferred to the main memory 3. Next, in a step 2 as shown in Fig. 5B, the pattern generating device 9 initializes the contents of the first and the second memories A and B, then draws the outline data and the flag data of the segment 103 shown in Fig. 4A in the first and the second memories A and B as the painting operation. Next, the painted pattern data in the second memory B is transferred to the main memory 3 in the host CPU 1 as in the step 1. A logical OR operation between the painted data transferred from the second memory B and the painted data which have been transferred in the step 1 shown in Fig. 5A is performed, then the resultant data is stored in the main memory 3. Next, in a step 3 as shown in Fig. 5C, the pattern generating device 9 initializes completely the contents of the first and the second memories A and B, then draws the outline from the outline data and the flag data of all of the segments as shown in Fig. 4A in the first and the second memories A and B. In the step 3, the painting operation is not performed because there is no data to be painted. Accordingly, only the outline data in the first memory A is transferred to the main memory 3 in the host CPU 1. Then, the logical OR operation of the outline data and the data which has been stored in the step 2 is executed, and the result of the operation is transferred to the main memory 3 under the control of the host CPU 1. By the operations as described above, the required data such as the data shown in Fig. 4C can be stored in the main memory 3. However, the painting operations described above require much time to obtain the required pattern data because these painting operations must access the host CPU 1 more frequently. Accordingly, there is a problem in the prior art that the total time for the painting operations is long. SUMMARY OF THE INVENTION This invention is provided to overcome the problem of the conventional painting operations and the conventional pattern generation system in the prior art. An object of the present invention is therefore to provide a painting pattern generation system which can be made up of reduced hardware components, and which is capable of executing painting operations at a high speed. This object is solved by a painting pattern generation system for obtaining patterns painted in interior areas enclosed by closed curve outlines by using outline data and flag data, comprising: first memory means used for storing data for drawing an outline by which patterns in the interior areas enclosed by the outline are generated; second memory means used for storing flag data by which the interior areas are painted, the flag data being generated by a predetermined rule; and operational means for reading out the outline data and the flag data stored in said first and said second memory means, for performing an exclusive OR operation between two adjacent items of flag data in said second memory means in a predetermined scan line direction for all scan lines on the outlines involved in a pattern, and for operating predetermined logical operations between the result of the XOR operation and the outline data in said first memory means along the scan line direction for all scan lines to obtain the painted pattern data for painting the patterns in the interior areas enclosed by the outline, wherein said operational means is further arranged for writing the painted pattern data into said first memory means and for overlapping the outline data of a further pattern on the painted pattern data in said first memory means, said operational means being adapted to execute said writing and overlapping to obtain painted pattern data for all patterns in which the required interior area is painted. The object is also solved by a painting pattern method for obtaining patterns painted in interior areas enclosed by closed curve outlines based on outline data and flag data, comprising the steps: (a) drawing a first outline from the data stored in a first memory region, and providing flag data in a second memory region to be used in painting the first outline; (b) reading out the data stored in said first and said second memory regions, then providing an exclusive OR operation between two adjacent items of flag data in said second memory region in a predetermined scan line direction for all scan lines on the outlines involved in a pattern, performing a predetermined logical operation between the result of the XOR operation and the outline data in said first memory region along the scan line direction for all scan lines to obtain the painted pattern data for painting the patterns in the interior areas enclosed by the outline, wherein the method comprises the steps: (c) clearing the content of said second memory region in parallel with the logical operation executed in step (b); (d) writing the painted pattern data obtained in the step (b) into said first memory region; (e) writing data for the outline of a further pattern into said first memory region to overlap with the painted pattern data obtained in step (d), and writing the flag data for the outline of the further pattern into said second memory region which has been cleared in step (c); (f) reading out the data stored in said first and said second memory regions, for performing an exclusive OR operation between two adjacent items of flag data for the outline of the further pattern in the scan line direction for all the scan lines on the outlines of the pattern, for performing a logical operation between the result of the XOR operation and the painted pattern data in said first memory region for all the scan lines on the outline to paint the pattern in the interior area enclosed by the outline of the further pattern; (g) writing the data for the painted pattern obtained in step (f) into said first memory region, and (h) performing steps (e) to (g) at predetermined times to obtain painted pattern data for all patterns in which the required interior area is painted. According to the invention, the number of times the host CPU is accessed can be reduced by the inventive system and the inventive method based on the even-odd rule because a memory in the host CPU (which must be used frequently to generate the required painting patterns in the prior art) is not used to generate the required painting patterns. Further advantageous embodiments and improvements of the invention are listed in the dependent claims. Hereinafter, embodiments of the invention will be described with reference to the drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 ia a block diagram of a conventional pattern generating system: Figs. 2A to 2C are memory regions to be painted by using the conventional pattern generating system as shown in Fig. 1; Figs 3A and 3B are pattern diagrams showing a painting operation executed along a scan line by the conventional pattern generating system as shown in Fig. 1; Figs 4A to 4C are pattern diagrams showing a painting operation to be executed by the conventional pattern generating system as shown in Fig. 1; Figs. 5A to 5C are diagrams for explaining a pattern painting step by the conventional pattern generating system as shown in Fig. 1; Fig. 6 is a diagram of a pattern generation system according to the present invention; Figs. 7A to 7C are diagrams for explaining a pattern painting operation by the pattern generation system according to the present invention; and Fig. 8 is a diagram of a painting calculating device incorporated in the pattern generation system according to the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS Fig. 6 is a block diagram of a painting pattern generating device which is capable of efficiently executing a painting operation for various patterns. Although the configuration of the painting pattern generating device is similar to that of the conventional painting pattern generating device as shown in Fig. 1, the functions of a host CPU 20 and a pattern generation system are different from those of the conventional painting pattern generation system. The difference will now be explained below in detail. In the painting pattern generation system according to the present invention, almost all the painting operations can be executed without the control of the host CPU 20 by only using the pattern generating device 21 and a local memory 11 at a high operation speed. Hereinafter, the painting operation for painting patterns will be explained with reference to Fig. 7. The patterns as shown in Fig. 4C are used as patterns to be painted in the following description. First, in a step 1 shown in Fig. 7A, the pattern generator 21 receives the clear command transferred from the CPU 20 for initializing the contents of the memories, then clears the contents of the first and the second memory regions A and B. The pattern generator 21 which has received the clear command from the host CPU 20 draws outlines for the segments 101 and 105 shown in Fig. 7A in the first and the second memory regions. For the painting operation, the pattern generator 21 reads out the painting data stored in the first and the second memory regions, then performs an exclusive OR (XOR) operation between two adjacent items of flag data in the scan line direction (for painting the interior portion enclosed by the outline), and further performs a logical OR operation between the result of the XOR operation and the outline data from the first memory region A (for a compensation of data for painting the patterns in the interior areas). The flag data in the second memory region is cleared after the operation for the scan line in the painting operation described above. The painting operation described above are operated along the scan lines for all closed curves (outlines), so that the painted pattern data of the segments 101 and 105 are obtained in the first memory region A shown in Fig. 7A. Fig. 8 is a block diagram of a calculator 22 for performing the XOR and OR operations which is widely used in the prior art for executing the painting operation described above. Next, in the step 2 as shown in Fig. 7B, the pattern generator 21 which has received the drawing command transferred from the host CPU 20 overlaps the outline data for the segment 103 shown in Fig. 4A on the pattern data obtained in the step 1 described above, then further draws the flag data for the segment 103 in the second memory region B from the flags. Next, the pattern generator 21 which has received the command for painting from the host CPU also performs the painting operation described in the step 1, then writes the result of the operation on the scan line in the memory region A and clears the flag data in the memory region B when the operation on the scan line is completed. The painting operations are executed for all of the scan lines on the closed curves to obtain the data for painting the pattern in the segments 101, 103, and 105. Next, in the step 3 as shown in Fig. 7C, the pattern generator 21 which has received the outline drawing command from the host CPU 20 draws the outline data of all of the segments on the pattern painted in the segments 101, 103, and 105 in the first memory region A. As the result, the data for the pattern painted as shown in Fig. 4C can be obtained from the first memory region A. The host CPU 20 transfers the pattern data contained in the first memory region A by a block transfer command. By use of the pattern painting method and the system therefor in the embodiment according to the present invention, under the control of a host CPU, the painting operation for a plurality of areas enclosed by closed curves (or outlines) can be executed with a reduction in the number of access items of a main memory. As described above in detail, any element in a pattern can be divided and overlaps with another pattern by using two memory regions for painting. Without increasing the number of accesses to a host CPU and adding a relatively small amount of hardware, a high-speed painting operation can be obtained by using an even-odd rule for any area in the pattern.

Claims: A painting pattern generation system for obtaining patterns painted in interior areas enclosed by closed curve outlines by using outline data and flag data, comprising: first memory means (11A) used for storing data for drawing an outline by which patterns in the interior areas enclosed by the outline are generated; second memory means (11B) used for storing flag data by which the interior areas are painted, the flag data being generated by a predetermined rule; and operational means (21) for reading out the outline data and the flag data stored in said first and said second memory means (11A, 11B), for performing an exclusive OR (XOR) operation between two adjacent items of flag data in said second memory means (11B) in a predetermined scan line direction for all scan lines on the outlines involved in a pattern, and for operating predetermined logical operations between the result of the XOR operation and the outline data in said first memory means (11A) along the scan line direction for all scan lines to obtain the painted pattern data for painting the patterns in the interior areas enclosed by the outline, characterized in that said operational means (21) is further arranged for writing the painted pattern data into said first memory means (11A) and for overlapping the outline data of a further pattern on the painted pattern data in said first memory means (11A), said operational means (21) being adapted to execute said writing and overlapping to obtain painted pattern data for all patterns in which the required interior area is painted. A painting pattern generation system according to claim 1, wherein the system is further arranged for clearing the data in said second memory means (11B) in parallel with the logical operation by said operational means (21). A painting pattern generation system according to claims 1 and 2, wherein said operational means (21) is further capable of writing flag data for the outline of a further pattern into the cleared second memory means (11B), the operational means (21) reads out the data stored in said first and second memory means (11A, 11B), then performs an exclusive OR (XOR) operation between two adjacent items of flag data for the outline of the further pattern in the predetermined scan line direction in said second memory means (11B), and further performs a logical operation between the result of the XOR operation and the painted pattern data stored in said first memory means (11A) in the scan line direction for the scan lines to obtain painted pattern data by which the interior areas enclosed by the outline of the further pattern are painted. A painting pattern method for obtaining patterns painted in interior areas enclosed by closed curve outlines based on outline data and flag data, comprising the steps: (a) drawing a first outline from the data stored in a first memory region (11A), and providing flag data in a second memory region (11B) to be used in painting the first outline; (b) reading out the data stored in said first and said second memory regions (11A, 11B), then providing an exclusive OR (XOR) operation between two adjacent items of flag data in said second memory region (11B) in a predetermined scan line direction for all scan lines on the outlines involved in a pattern, performing a predetermined logical operation between the result of the XOR operation and the outline data in said first memory region (11A) along the scan line direction for all scan lines to obtain the painted pattern data for painting the patterns in the interior areas enclosed by the outline; characterized by further comprising the steps: (c) clearing the content of said second memory region (11B) in parallel with the logical operation executed in step (b); (d) writing the painted pattern data obtained in the step (b) into said first memory region (11A); (e) writing data for the outline of a further pattern into said first memory region (11A) to overlap with the painted pattern data obtained in step (d), and writing the flag data for the outline of the further pattern into said second memory region (11B) which has been cleared in step (c); (f) reading out the data stored in said first and said second memory regions (11A, 11B), for performing an exclusive OR operation between two adjacent items of flag data for the outline of the further pattern in the scan line direction for all the scan lines on the outlines of the pattern, for performing a logical operation between the result of the XOR operation and the painted pattern data in said first memory region (11A) for all the scan lines on the outline to paint the pattern in the interior area enclosed by the outline of the further pattern; (g) writing the data for the painted pattern obtained in step (f) into said first memory region (11A), and (h) performing steps (e) to (g) at predetermined times to obtain painted pattern data for all patterns in which the required interior area is painted.

Inventors: KAI NAOYUKI, MINAGAWA TSUTOMU, OHHASHI MASAHIDE, KAI, NAOYUKI, MINAGAWA, TSUTOMU, OHHASHI, MASAHIDE
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1991
Main classification: G06T11
IPC codes: G09G5, H01L29, G06T11