Method and system for error correction in digital transmission

Abstract: For the error correction in digital transmissions using the so-called Reed Solomon coding/decoding techniques, in reception it is processed the received data stream using a new algorithm having the equations where Pe (α i ) = f (ei), with f (ei) being a suitably selected function Now it is possible to use the said decoding algorithm using a hardware extremely simplified with respect to the conventional implementation systems. A fulfilment form of the implementation circuit includes : a central timing unit (UT) a preset unit (UP) at least a Reed Solomon coding and/or decoding circuit (COD/DECOD) running according to the proposed algorithm.

Description: It is well-known the error correction coding theory in digital transmissions using the so-called Reed Solomon coding/decoding techniques (see e.g., W.W. Peterson and E.J. Weldon Jr., "Error Correcting Codes" IInd edition, The MIT Press, 1972) for the protection of the transmitted symbol stream from errors introduced by the transmission channel. This technique foresees the association of each block of k information symbols, generated by the data source, with n-k redundancy symbols selected according to a relation specified in the following description. The n symbols obtained in this manner are transmitted by the channel with a certain error probability. On the reception side, using the analysis of received symbols and limited by the code correction capacity, the positions of eventual errors introduced by the channel can be located, and the originally transmitted information is reconstructed. Visualizing the concept, Figure 1 shows a conventional system in which the symbols represent the functional blocks (Bxx) and signals (Sxx) as follows: B11) is a source SO for data in the form of symbols having a length of m bit in time-serial succession; S11) is generated by SO and is the input signal of the encoder CODIF that is now divided in blocks of k symbols; B12) is the encoder CODIF that adds n- k redundancy symbols to each input block; S12) is the signal generated by the encoder CODIF that is now formed with blocks of n symbols; B13) is a scheme of the transmission channel CT: the transmitted blocks are submitted to errors with a certain probability; S13) indicates the received symbols that can be considered as an overlapping of the original transmitted symbols and symbols introduced from the channel CT; B14) is the block DEC that executes the analysis of received words and, limited to the correction capacity of the code, establishes the positions and the amplitudes of the errors introduced by the channel CT; S14) is the signal that indicates the error position; S15) is the signal that holds the information related to the error amplitude; B15) is the function block delay that introduces a suitable delay for allowing the correct synchronization of operations; S16) is the signal that coincides with the signal S13 suitably delayed; B16) is the block CORR that reconstructs the original information transmitted according to the signals S14, S15; S17) is the sequence of symbols obtained by correcting the errors and corresponds to S12; B17) is the EXTRACTION block for the useful information. The application of this technique allows to correct up to to received wrong symbols in a block of n symbols, where to is equal to: to = (n - k)/2 with the preceding definition of parameters. The algorithms used for the association of redundancy symbols to the information symbols in transmission and for decoding the eventual positions of errors in reception are well-known and described in a general mathematical form in the technical literature. Regarding the transmission part, the algorithms have a relative simple circuit implementation; however, with regard to the reception part, they are more complex and their immediate transformation in a circuit type can cause unsatisfactory results under the point of view of costs, overall dimensions. consumptions and performances. For achieving a sufficient implementation, is it necessary to rewrite the decoding algorithm using equations that, although allowing the exact calculation of the considered magnitudes, can be carried out by means of more simple circuits and a reduced number of components. A first aim of the invention is to supply a system that, using a critical rewriting of the decoding algorithm, allows a circuit execution having a reduced complexity with consequent advantages in terms of costs, overall dimensions. consumptions and performances. This aim is met by the method and the apparatus defined in claim 1 and in claim 4, respectively. The method and system according to the invention is characterized in that, in reception, a correction algorithm, as defined by the equations (F1), (F2), (F3), (F4) described in the following is applied. Now it is illustrated briefly the theoretical basis of the Reed Solomon correction technique applied e.g. to the case of symbols having a length of m bits. Given a generical sequence of L symbols bo, b1, b2,..... bL-1, it can be associated univocally with a polynomial of degree L-1: Coding In the coding phase, the Reed Solomon technique foresees the calculation of the polynomial: T(x) = I(x)x n-k + R ( x ) where I(x) is the polynomial associated to k information symbols and R(x) having a n-k-1 degree is the remainder of the division of I(x)x n-k by g(x); and further being: a polynomial of degree 2to and i a properly selected parameter. It must be remembered that. being the base field of the type GF(2). the sum of two equal symbols belonging to the field is always zero. It follows immediately that the property P(x 2 ) = P 2 (x). The encoder allows to obtain the sequence of symbols representing the remainder R(x) in a relatively simple manner: the transmitted sequence of n symbols represents the whole polynomial T(x) that is the named code word, formed of k symbols emitted by the source SO followed by the n-k redundancy symbols: to, t1,...tn-1 that are the coefficients of T(x) (t o is transmitted as the last symbol while tn-1 is transmitted as the first symbol), with ti = Ri for i=0,...., n-k-1 and ti = Ii for i = n-k, ... , n-1, being respectively Ri and Ii the coefficients of R(x) and I(x). Decoding Figure 2 shows the classic decoding scheme. It is made up of the following functional blocks: a block B21) carries out the valuation of the syndromes Sj with: j =i, i+1, 2to+i-1, with i being as specified in the definition of the polynomial g(x); a block B22) applies an algorithm for determining the coefficients of the location polynomial (e.g. the Berlekamp's algorithm); a block B23) establishes the error positions by the search of zeroes of the locator polynomial using the Chien's algorithm; a block B24) carries out the valuation of the amplitudes of the error by means of, e.g., the Forney's algorithm; the blocks B25) are the ones that insert suitable delays for the correct running of the system. The resolution equations related to the various indicated algorithms can be found in the literature (see e.g. W.W. Peterson and E.J. Weldon Jr., "Error Correcting Codes" IInd edition. The MIT Press, 1972). The hardware implementation of these traditional algorithms is notoriously complex with great disadvantages in terms of overall dimension. consumptions costs and performances. For obviating the above mentioned drawbacks, the present invention proposes a new decoding algorithm, with the result of notable advantages for the simplicity of the hardware implementation. The main characteristics of the invention are indicated in the claims. For decribing in detail the mathematical formulation of the invention, the following expressions are specified: ei α i generic amplitude error ei in position i; syndromes. The decoding algorithm, according to the invention, follows the scheme illustrated in Figure 3. The classic algorithm (e.g. indicated in Figure 2) hold in the functional block SIND allows the calculation of the syndromes Si,..... , S 2to+i-1 (in the following, for simplifying the description, it is assumed that i = 1). The block SL establishes (advantageously in parallel processing) the coefficients of two polynomials, the first being the locator polynomial Pl and following the classic theory, while the second polynomial Pe is the element characterizing the algorithm of the system according to the invention and supplies, evaluated in the error position, a function for the error amplitude. According to a first feature of the invention, the error polynomial Pe is defined as follows: where Pe (α i ) = f (ei), with f(ei) being a suitably selected function. Starting from the definition of the polynomial Pe(x) it is constructed a set of t equations in the following manner: the error polynomial is multiplied respectively by x, x 2 ,.... x to-1 and it is evaluated in the generical position α i . In this manner it is got the following equation system SE1: Now each equation of the system SE1 is multiplied by the term α i ei, representing the generical error in amplitude and position, is summed in all errors, summing in i . In this manner, each term of the equation of SE1 yields a sum of the type: that can be recognized as a generic syndrome. Replacing this expression in the equation system SE1 and multiplying by the term α i ei and summing according to the index i, a new equation system SE2 is obtained: Now it can be observed that the coefficient matrix and a part of the right hand side of this equation system SE2 is exactly identical to the right hand side used for determining the coefficients of the location polynomial Pl. According to another feature of the invention, the following selection is made: f e i = 1 e i Then the generic term is obtained remembering the property P ( x 2 ) = P 2 ( x ) that is valid in GF(2). Finally it is obtained the equation system SE3: Since this equation system SE3 is a linear system, the overlapping effect can be applied. Therefore the solutions can be obtained as sum of two terms, the first arising from the known terms S to+i with 1 ≤ i ≤ to, the second term arising from the known terms of the type Sj , with i = 2, 4,..., 2to. Therefore the generic solution can be written as follows: E i = E i * + δ E i, 1 ≤ i ≤ t 0. Replacing this solution into the error polynomial Pe, it can be obtained: P e (x) = x t 0 + E 1 * x t 0 - 1 + ... + E t 0 * + δ E 1 x t 0 - 1 + ... + δ E t 0 and, observing that E1*, E2*,..... , Eto* are exactly the coefficients of the locator polynomial Pl, the error polynomial Pe estimated in the error positions α i supplies: δ E 1 α ( t 0 - 1) i + δ E 2 α (t 0 - 2) i + ... + δ E t 0 = 1 e i . Using the algorithm of the invention, the amplitudes of errors can be now obtained simply considering this polynomial Pe, the coefficients therefore are estimated exactly by the same process as the coefficients of the locator polynomial Pl, as the sole variation in the classic equation system that allows its calculation is the different column of the right hand side. Differently from the known solutions, the solution according to the invention allows to obtain the error correction with a better degree of parallelism and with a better efficiency. In fact the known methods require the calculation of the coefficients of the locator polynomial Pl. When it is possible to establish the error positions, then the coefficients of the two polynomials are established depending on the position of the normal error, whose ratio, estimated in the error positions, supplies the amplitudes of the errors. On the contrary, according to the invention, the coefficients of the location polynomial Pl and of the error polynomial Pe can be contemporaneously estimated, and from the first polynomial Pl it can be established the position of the current error that, replaced in the second polynomial Pe, supplies advantageously the wished error amplitude. When the coefficients of the locator polynomial Pl and of the error polynomial Pe are calculated, it can be used the Chien's algorithm for establishing the real error positions and at the same time the related amplitudes. According to another important feature of the invention, the Chien's search algorithm is modified in such a manner that its hardware implementation is simplified. In particular, instead of considering the classic structure, in which the degree of the locator polynomial Pl depends on the error number really occurred, it is established now a polynomial Pl of a degree equal to the maximum number of errors that can be corrected by the code. Indicating by ωi, with i = 0, 1,....., to. ωo = 1. the coefficients of the locator polynomial Pl. the resulting polynomial has the critical expression: Among the further advantages of the invention, it must be underlined the advantage related to the possible extensions of the algorithm that is the object of the invention; in particular the equations (F1), (F2), (F3) can be simply extended to the case of non-binary BCH codes, Reed Solomon codes with non-binary base field, etc, etc.. Circuit fulfilment According to another preferred and therefore advantageous embodiment form of the invention, a sole integrated device includes the encoder COD and the decoder DECOD of the Reed Solomon's code. Figure 4 shows the devices that form an integrated circuit for the total implementation of the system. Figure 4 represents contemporaneously signals and functional blocks. More precisely the components can be identified as follows: S41) CLOCK signal; S42) SYNC signal that establishes the start of each block of n symbols to be coded or decoded; S43) SELECTION signals that form a group of external signals by which the device is preset for: developing the functions of encoder or decoder, processing the symbol blocks having a length until k, running or not running with interleaving, running or not running in a transparent manner (the encoder is disabled in transmission, and the decoder is disabled in reception), making or not making the error correction in reception, making an autodiagnosis procedure; S44) input signal; B41) UT unit for generating the timings of the whole system; B42) UP management unit for the presettings indicated at point S43; N43) DEMUX units for shunting the input S44 towards the decoder COD in transmission and towards the decoder DECOD in reception; B44) encoding unit COD according to what described; B45) decoding unit DECOD according to the invention as described in Figure 3 and in equations (F1), (F2), (F3), (F4); B46) MUX unit for selecting the output from the encoder COD in transmission and from the decoder DECOD in reception; S45) output signals coming from the encoder COD in transmission and from the decoder DECOD in reception; S46) control signals such e.g.: block synchronism. estimation of the frequency of channel errors, test signals. For explaining the present invention was exemplified with reference to an embodiment represented in the figures.

Claims: A method for error correction in digital transmission using the Reed-Solomon encoding/decoding technique for correcting up to t 0 errors, comprising the steps of: Receiving coded data signals; Calculating the syndromes S i , ... S 2to+i-1 of said coded data signals; Establishing the coefficients E j * (j = 0 ... t 0 ) of a locator polynomial Pl by solving the following system of equations for the E j * which represent the elementary symmetric function of the error position j; Establishing the coefficients δE j of an error amplitude polynomial Pe by solving the following system of equations for the δE j ; Obtaining the roots α j of the locator polynomial Pl using Chien's algorithm; Evaluating the error amplitude polynomial Pe at the error locations α j to obtain the error amplitudes e j ; and Correcting any errors in the received data signals using the error locations α j and their corresponding error amplitudes e j . The method of claim 1, wherein the coefficients of the error locator polynomial Pl and the error amplitude polynomial Pe are calculated in parallel. The method of claim 1 or 2, wherein the coefficients of the error locator polynomial Pl and the error amplitude polynomial Pe are calculated for a degree t 0 polynomial independently of the number of errors which actually occurred. An apparatus for error correction in digital transmission using the Reed-Solomon encoding/decoding technique for correcting up to t 0 errors, said apparatus comprising: Means for receiving coded data signals; Means (SIND) for calculating the syndromes S i , ... S 2to+i-1 of said coded data signals; Means (SL) for establishing the coefficients E j * (j = 0 ... t 0 ) of a locator polynomial Pl by solving the following system of equations for the E j * which represent the elementary symmetric function of the error position j; Means (SL) for establishing the coefficients δE j of an error amplitude polynomial Pe by solving the following system of equations for the δE j ; Means for obtaining the roots α j of the locator polynomial Pl using Chien's algorithm; Means for evaluating the error amplitude polynomial Pe at the error locations α j to obtain the error amplitudes e j ; and Means for correcting any errors in the received data signals using the error locations α j and their corresponding error amplitudes e j .

Inventors: CUCCHI SILVIO, PARLADORI GIORGIO, ZAPPAROLI PAOLO, CUCCHI, SILVIO, PARLADORI, GIORGIO, ZAPPAROLI, PAOLO
Applicants: ALCATEL ITALIA, ALCATEL ITALIA S.P.A
Application year: 1991
Main classification: H03M13
IPC codes: H03M13