Companding current-mode transconductor-C integrator

Abstract: In a current-mode transconductor-C integrator the non-linearity of the voltage-to-current conversion of a transconductor (17) is corrected by means of a differentiator (3) which supplies a current (i d ) which is proportional to the derivative of a current (i f ), which is proportional to the transconductor output current (i out ), with respect to the transconductor control voltage (v), which current (i d ) is divided by means of a current divider (9) into an input current (i in ) and is applied as a quotient current (i q ) to an integrating capacitor (13) across which a voltage (v) is built up, which voltage is converted into an output current (i out ) by the transconductor. This results in an output current (i out ) which is linearly proportional to the integral of the input current (i in ) without distortion caused by the non-linear voltage-to-current characteristic of the transconductor (17).

Description: The invention relates to a transconductor-capacitor integrator for generating at least one output signal which is proportional to the integral of an input signal, which integrator comprises an input terminal for receiving the input signal, an output terminal for supplying the output signal, a capacitor and, coupled thereto, a transconductor having an input and an output. Such a transconductor-C integrator is known inter alia from the article "A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning", IEEE Journal of Solid State Circuits, Vol. 23, No. 3, June 1988, pp. 750-758, Fig. 1. Continuous-time filters are suitable for a variety of filter functions in the field of audio and video signal processing and as anti-alias filters in digital or switched-capacitor systems. Continuous-time filters require a transconductor-C integrator with a linear tunable transconductor. However, tuning capability and linearity cannot be combined simply. In addition, there is a need for transconductor-C integrators operating in the current mode, i.e. the input and the output signals take the form of currents. This need is fostered by the trend towards lower supply voltages and the search for improved high-frequency performance of the filter systems. The advantages of the current mode over the voltages mode have been mentioned inter alia in the article "All current-mode frequency selective circuits", Electronics Letters, 8th June 1989, Vol. 25, No. 12, pp. 759-761. It is an object of the invention to provide a tunable transconductor-C integrator which operates in the current mode and which performs a linear integrator function utilising a non-linear transconductor. According to the invention as claimed a transconductor-capacitor integrator of the type defined in the opening paragraph is therefor characterized in that the input signal and the output signal are input current and an output current respectively, the transconductor has its input and its output coupled to the capacitor and the output terminal respectively to convert a voltage across the capacitor into the output current, and in that the integrator further comprises a differentiator for generating a differentiated current which is proportional to the derivative with respect to the voltage across the capacitor of a feedback current proportional to the output current, and a current divider for supplying to the capacitor a quotient current proportional to the quotient of the input current at the input terminal and the differentiated current. The distortion of the output current as a result of the non-linear voltage-to-current characteristic of the transconductor is measured by the differentiator and is supplied as a differentiated current to the current divider which supplies a quotient current, which is proportional to the quotient of the input current and the differentiated current, to the capacitor across which a voltage is built up by integration, which voltage is converted into the output current by the transconductor. The loop thus formed results in a current integration function which is fully independent of the voltage-to-current characteristic of the transconductor. This characteristic may then be non-linear, for example expanding, so that the quotient current of the current divider will exhibit a compressing characteristic. For a given variation of the output current the variation of the voltage across the capacitor is the substantially smaller than in the case of a linear transconductor. Such a companding (= compressing and expanding) current-mode integrator is very suitable at low supply voltages. A first embodiment of a transconductor-capacitor integrator in accordance with the invention is characterized in that the differentiator is a direct current-path between the feedback current and the differentiated current and in that the voltage-to-current conversion of the transconductor has an exponential relationship, the output current being proportional to the exponent of the voltage across the capacitor. The choice of the exponential relationship enables the differentiator to be reduced to a direct connection, so that the differentiated current is equal to the feedback current. A further simplification can be achieved with a transconductor-capacitor integrator in accordance with the invention which is characterized in that the transconductor comprises a first output transistor having a first and a second main electrode and a control electrode, having its second main electrode coupled to the output terminal, and having a junction formed by the control electrode and the first main electrode arranged in parallel with the capacitor. It is then possible to choose for a bipolar transistor whose base, emitter and collector correspond to the control electrode, the first main electrode and the second main electrode respectively, or for a unipolar MOS transistor operating in the weak inversion mode and whose gate, source and drain correspond to the above electrodes. As is known the relationship between the current through the transistor and the voltage difference between the control electrode and the first main electrode is exponential for both transistor types. A second embodiment of a transconductor-capacitor integrator in accordance with the invention is characterized in that the transconductor further comprises a second output transistor having a first and a second main electrode and a control electrode, of which the first main electrode and the control electrode are connected to corresponding electrodes of the first output transistor and of which the second main electrode is an output for the feedback current. The feedback current proportional to the output current is then supplied by the second output transistor. A third embodiment of a transconductor-capacitor integrator in accordance with the invention is characterized in that the current divider comprises: a first through fourth transistor, each having a first and a second main electrode and a control electrode, the control electrode of the first transistor being connected to the first main electrode of the second transistor, the control electrodes of the second and the third transistor being interconnected in a node, the first main electrode of the third transistor being connected to the control electrode of the fourth transistor, the control electrode of the first transistor being coupled to the input terminal, the second main electrode of the first transistor being coupled to the node, the first main electrode of the first and the fourth transistor being connected to a first power-supply terminal, and the second main electrodes of the second and the third transistor being coupled to a second power-supply terminal; a bias current source coupled to the node, a current mirror having a first and a second current terminal coupled to the second main electrode of the fourth transistor and the control electrode of the first output transistor, and in that the first main electrodes of the first and the second output transistor are connected to the first power-supply terminal. The first through the fourth transistor are arranged in a translinear loop in which the product of the currents through the first and the second transistor is equal to the product of the currents though the third and the fourth transistor. As a result of this the current through the fourth transistor, which is supplied to the capacitor via the current mirror, is proportional to the quotient of the input current and the feedback current. The proportionality constant is defined by the bias current source, whose output current may be controllable to enable the integrator to be tuned. The current divider can be simplified by interchanging the functions of the third and the fourth transistor in the translinear loop. This yields a fourth embodiment of a transconductor-capacitor integrator, which is characterized in that the current divider comprises a first, a second and a third transistor each having a first and a second main electrode and a control electrode, the control electrode of the first transistor being connected to the first main electrode of the second transistor, the control electrodes of the second and the third transistor being interconnected in a node, the first main electrode of the third transistor being connected to the control electrode of the first output transistor, the control electrode of the first transistor being coupled to the input terminal, the second main electrode of the first transistor being coupled to the node, the first main electrode of the first transistor being connected to a first power-supply terminal, and the second main electrodes of the second and the third transistor being coupled to a second power-supply terminal; a bias current source coupled to the node, and in that the first main electrode of the first output transistor is connected to the first power-supply terminal. This enables the current mirror, the fourth transistor and the second output transistor to be dispensed with. This fourth embodiment may be characterized further in that the integrator further comprises a first and a second further transistor each having a first and a second main electrode and a control electrode, the control electrode and the first main electrode of the first further transistor and of the second further transistor being connected to the corresponding electrodes of the first transistor and of the first output transistor respectively, and the second main electrode of the first further transistor and the second further transistor being coupled to the control electrode of the first output transistor and of the first transistor respectively. The first and the second further transistor provide a discharge current path for the capacitor. This embodiment is an integrator operating at very low supply voltages, i.e. two base-emitter junction voltages when bipolar transistors are chosen, and can be cascaded readily because the input and output currents are at compatible voltage levels. A balanced fourth embodiment of a transconductor-capacitor integrator in accordance with the invention is characterized in that the integrator further comprises a further input terminal for receiving a further input current and a further output terminal for supplying a further output current, a further capacitor whose capacitance is substantially equal to that of the first-mentioned capacitor, a further bias current source for supplying a current which is substantially equal to that of the first-mentioned bias current source, a fourth through sixth capacitor, each having a first and a second main electrode and a control electrode, the electrodes of the fourth, the fifth and the sixth transistor and of the second output transistor being connected to each other and to the further input terminal, the further output terminal, the further capacitor, the further bias current source, the first power-supply terminal and the second power-supply terminal in a way similar to the corresponding electrodes of the first, the second and the third transistor and the first output transistor respectively, a first group of at least one further output transistor, each transistor having a first main electrode and a control electrode, which are connected to the corresponding electrodes of the first output transistor, and a second main electrode, one of which is coupled to the control electrode of the second output transistor and the other of which are coupled to respective other output terminals for supplying a current which is proportional to the first-mentioned output current, a second group of at least one further output transistor, each transistor having a first main electrode and a control electrode, which are connected to the corresponding electrodes of the second output transistor, and a second main electrode, one of which is coupled to the control electrode of the first output transistor and the other of which to the respective other output terminals for supplying a current which is proportional to the further output current. This embodiment is suitable for differential input and output currents, has a high common-mode rejection and has input and output currents at compatible voltage levels. This enables this balanced integrator to be cascaded simply to form biquadratic filter sections. Moreover, the input terminals form virtual earthing points, enabling an input voltage to be converted simply into an input current by means of series resistors. The invention will now be described in more detail, by way of example, with reference to the accompanying drawings, in which Figure 1 is the basic diagram of a transconductor-capacitor integrator in accordance with the invention, Figures 2 and 3 are basic diagrams of embodiments of a transconductor-capacitor integrator in accordance with the invention, Figures 4, 5, 6 and 7 are circuit diagrams of a transconductor-capacitor integrator in accordance with the invention, Figure 8 is a symbolic representation of the transconductor-capacitor integrator shown in Fig. 7, and Figure 9 shows a biquadratic filter section comprising two transconductor-capacitor integrators in accordance with the invention. In all these Figures corresponding parts bear the same reference numerals. Figure 1 shows the basic diagram of a companding transconductor-C integrator in accordance with the invention. An input current i in to be integrated at an input terminal 1 and a differentiated current i d from a differentiator 3 are applied to inputs 5 and 7 respectively of a current divider 9 which produces at its output 9 a quotient current i q proportional to the quotient of the input current i in and the differentiated current i d in accordance with: i q = I o * (i in /i d ) in which I o is a constant current. The output 11 of the current divider 9 is connected to a capacitor 13 having a capacitance C and to the input 15 of a transconductor 17 having an input terminal 19 in which an output current i out flows. The transconductor 13 converts the voltage v across the capacitor 13 into the output current i out in accordance with a voltage-to-current function (f(v): i out = f(v) This function is generally non-linear and produces undesirable signal distortion in the output current i out . The transconductor further has a second output 21 where it supplies a feedback current i f proportional or equal to the output current i out . The feedback current i f and the voltage v are applied to the inputs 23 and 25 respectively of the differentiator 3, at whose output 27 a differentiated current i d is produced in accordance with: i d = V o * (di f /dv) in which V o is a constant voltage. Moreover, it is assumed hereinafter that: i f = i out * K where K is a constant, so that equation (3) becomes: i d = K * V o * (di out /dv) The quotient current i q flows into the capacitor 13, so that by means of equation (1) it is possible to write: i q = I o * (i in /i d ) = C *(dv/dt) The chain rule yields: di out /dt = (di out /dv) * (dv/dt) Substitution of the equations (5) and (6) in equation (7) yields: di out dt = i d K * V o * i in i d * I o C Integration with respect to time in equation (8) then results in: i out = I o KVoC ∫ i in dt The output current I out is linearly proportional to the integral of the input current i in and is fully independent of the voltage to current function f(v) of the transconductor 17. Signal distortions in the output current i out as a result of non-linearities in the transconductor 17 have been removed. If f(v) is an expanding function the quotient current i q will have a compressing characteristic. In that case the variation in the voltage v across the capacitor 13 for a given variation of the output current i out will be smaller than in the case of a linear function f(v) of the transconductor. The integrator then behaves as a companding (= compressing and expanding) current-mode integrator and is very suitable for low supply voltages. For the function f(v) of the transconductor 17 various functions can be used. A practical choice is that which allows the differentiator to be replaced by a simple interconnection between its input 23 and its output 27, as is shown in Fig. 2. In this case it is required that i d = K * i out Substitution of equation (5) in equation (10) yields: V o = (di out /dv) = i out and integration of equation (11) with respect to v yields: i out = I S exp (v/V o ) where I S is a constant current. If an exponential voltage-to-current function is chosen for the transconductor 17 it appears that the differentiator may be replaced by an interconnection. A transconductor with an exponential transfer function in accordance with equation (12) can be realised with bipolar transistors or with unipolar MOS transistors operating in the weak-inversion mode. Fig. 3a shows an embodiment comprising bipolar transistors and Fig. 3b shows an embodiment comprising MOS transistors operating in the weak-inversion mode. In Fig. 3a the transconductor 17 comprises a first output transistor T1 and a second output transistor T2 whose base-emitter junctions are arranged in parallel with the capacitor 13. The collector of the first output transistor T1 is coupled to the output terminal 19 and supplies the output current i out . The collector of the second output transistor T2 is connected to the output 21 and supplies a current i f proportional to i out to the input 7 of the current divider 9. The proportionality is defined by the relative dimensions of the transistors T1 and T2. The embodiment shown in Fig. 3b is similar to that shown in Fig. 3a but comprises a first and a second unipolar MOS transistor operating in the weak-inversion mode and having a gate, source and drain instead of a base, emitter and collector respectively. The embodiments described hereinafter are shown only with bipolar transistors. However, in each case the bipolar transistors may be replaced by unipolar MOS transistors operating in the weak-inversion mode, in which case base, emitter and collector should read gate, source and drain respectively. Fig. 4 shows a modification of an integrator as shown in Fig. 3a. The current divider 9 comprises a bias current source 30, which supplies a current I o to a node 32, a current mirror 34 and four transistors T3, T4, T5 and T6 forming a translinear loop, the series arrangement of the base-emitter junctions of the transistors T3 and T4 and the series arrangement of the base-emitter junctions of the transistors T5 and T6 being connected in parallel between the node 32 and a negative power-supply terminal 36. The emitters of the transistors T3 and T6 are connected to the negative power-supply terminal. The bias current source and the collectors of the transistors T4 and T5 are coupled to a positive power-supply terminal 38. The emitter of the transistor T4 and the base of the transistor T3 are connected to the input 5 of the current divider 9, causing the current i in to flow through the transistor T4. The base of the transistor T4 and the collector of the transistor T3 are connected to the node 32, so that the current i o flows through the transistor T3. The emitter of the transistor T5 and the base of the transistor T6 are connected to the input 7 of the current divider 9, causing a current i f to flow through the transistor T5, which current by way of example is selected to be equal to i out . A first current terminal 40 of the current mirror 34 is coupled to the output 11 of the current divider 9. The output 11 is also coupled to the collector of the transistor T6. A second current terminal 42 of the current mirror 34 is coupled to one terminal of the capacitor 13, whose other terminal is connected to the negative power-supply terminal 36. The quotient current i q consequently flows through the transistor T6 and through the capacitor 13. It follows from the translinear-loop principle, which is know per se , that the product of the currents through the transistors T3 and T4 is equal to the product of the currents through the transistors T5 and T6: I o * i in = i out * i q This is in agreement with equation (6) if i d is equal to i out . The integrator can be tined by making the bias current source 30 controllable. This follows from equation (6). Fig. 5 shows an embodiment derived from that shown in Fig. 4. The transistors T6 and T2 and the current mirror 34 have now been dispensed with. The emitter of the transistor T5 is connected to the output 11 of the current divider and the output 11 is connected directly to the base of the transistor T1 via the input 15 of the transconductor 17. As a result of this, the transistor T1, instead of the transistor T6 in Fig. 4, forms part of the translinear loop. As a consequence the current i q, instead of the current i out as in Fig. 4, now flows through the transistor T5. However, the result remains in compliance with equation (13). Fig. 6 shows an embodiment in which a discharge path has been provided for the capacitor 13. Two transistors T7 and T8 have been added to the integrator shown in Fig. 5. The base-emitter junctions of the transistors T7 and T8 are arranged in parallel with those of the transistors T3 and T4 respectively, so that the collector current of the transistor T7 is equal to that of T3, i.e. I o , and the collector current of the transistor T8 is equal to that of the transistor T1, i.e. i out . The collector of the transistor T7 is connected to the base of the transistor T1 and the collector of the transistor T8 is connected to the base of the transistor T3. This results in a current i in +i out flowing through the transistor T4 and a current i q +I o flowing through the transistor T5. Consequently, the following equation is valid: I o * (i in + i out ) = i out * (i q + I o ) Both members of equation (14) comprise a redundant term I o * i out , so that equation (14) is in principle identical to equation (13). Fig. 7 shows a balanced integrator having input terminals 1 and 44 for receiving balanced input currents i in1 and i in2 and output terminals 19 and 46 for supplying balanced output currents i out1 and i out2 . The balanced integrator comprises two integrators of the type as shown in Fig. 5, one integrator being identical to that shown in Fig. 5 and the other integrator comprising a capacitor 48, a bias current source 40, the transistors T11, T13, T14 and T15, the input terminal 44 and the output terminal 46 which are connected to each other and to the positive power-supply terminal 38 and the negative power-supply terminal 36 in the same way as the corresponding capacitor 13, the boas current source 30, the transistors T1, T3, T4 and T5, the input terminal 1 and the output terminal 19 of the one integrator. In addition, it comprises a transistor T16 whose base-emitter junction is arranged in parallel with that of the transistor T11 and whose collector is connected to the base of the transistor T1, and a transistor T17 whose base-emitter junction is arranged in parallel with that of the transistor T1 and whose collector is connected to the base of the transistor T11. A voltage v 1 appears across the capacitor 13 and a voltage v 2 across the capacitor 48, which is assumed to be equal. A current i q1 flows through the capacitor 13 and a current i q2 through the capacitor 48. If the transistors T16 and T17 are assumed to be identical to the transistors T11 and T1, although this is not essential, currents i q1 + i out2 and i q2 + i out1 will flow through the transistors T5 and T15 respectively. The translinear loop T3, T4, T5 and T6 complies with: I in1 * I o = i out1 * (i out2 + i q1 ) The translinear loop T13, T14, T15 and T17 complies with: I in2 * I o = i out2 * (i out1 + i q2 ) Subtracting equations (15) and (16) from one another and equating the difference current i in1 - i in2 with i in and the difference current i out1 - i out2 with i out yields a result similar to that in equation (13). Owing to the translinear principle the transistor currents can assume values far below their quiescent values, which enables a large dynamic output swing to be obtained. Common-mode currents are rejected and the integrator can be cascaded simply because the voltages on the input and output terminals are compatible. The input terminals 1 and 44 are virtual earthing points, so that input voltage sources can be coupled simply via resistors. The circuits shown in Figs. 5, 6 and 7 already operate at very low supply voltages because they comprise only two base-emitter junctions between the power-supply terminals. By arranging additional transistors in parallel with the transistor T1 in the integrators shown in Figs. 4, 5, 6 and 7 and in parallel with the transistor T11 in Fig. 7 the number of current outputs can be increased. The individual output currents can be weighted by suitably scaling the dimensions of the parallel transistors. In the balanced integrator shown in Fig. 7 these additional transistors bear the references T18 and T19, which have their base-emitter junctions arranged in parallel with that of the transistor T1 and their collectors connected to the additional output terminals 50 and 52 respectively, and T20 and T21, which have their base-emitter junctions arranged in parallel with that of the transistor T11 and their collectors connected to the additional output terminals 54 and 56 respectively. This balanced transconductor-C integrator is shown symbolically in Fig. 8. The terminal 1 is the input I, the terminal 44 is the inverting input NI, the terminals 46, 54, 56 are the inverting outputs NO1, NO2, NO3, and the terminals 19., 50, 52 are the outputs O1, O2, O3. Fig. 9 shows an example employing two balanced integrators A and B by means of which a biquadratic filter section can be realised. The coefficients of the biquadratic filter function are dictated by the ratios of the transistor dimensions. Positive coefficients are obtained through summation of signal currents by combining in-phase currents. Negative coefficients are obtained through subtraction of signal currents by combining anti-phase currents. The input signal is applied to the filter input terminals 60 and 62. The output signal can be taken from the filter output terminals 64 and 66. The terminals I and NI of the integrator A are connected, each time in the same sequence, to the filter input terminals 60 and 62, the terminals NO1 and O1 of the integrator A and the terminals O3 and NO3 of the integrator B. The terminals NO2 and O2 of the integrator A and the terminals NO2 and O2 of the integrator B are connected to the filter output terminals 64 and 66. The terminals NO3 and O3 of the integrator A are connected to the terminals I and NI of the integrator B and to the terminals NO1 and O1 of the integrator B. The frequency response characteristic of the biquadratic filter section is defined by the coefficients and also by the values of the capacitors 13 and 48 and the magnitudes of the currents I o of the bias current sources 30 and 40 in the circuit shown in Fig. 7. The filter characteristic of the biquadratic section can be tuned by making the current sources 30 and 40 controllable.

Claims: A transconductor-capacitor integrator for generating at least one output signal which is proportional to the integral of an input signal, which integrator comprises an input terminal for receiving the input signal, an output terminal for supplying the output signal, a capacitor (13) and, coupled thereto, a transconductor (17) having an input and an output, characterized in that the input signal and the output signal are an input current and an output current respectively, the transconductor (17) has its input and its output coupled to the capacitor (13) and the output terminal respectively to convert a voltage across the capacitor (13) into the output current, and in that the integrator further comprises a differentiator (3) for generating a differentiated current which is proportional to the derivative with respect to the voltage across the capacitor of a feedback current proportional to the output current, and a current divider (9) for supplying to the capacitor (13) a quotient current proportional to the quotient of the input current at the input terminal and the differentiated current. An integrator as claimed in Claim 1, characterized in that the differentiator is a direct current-path between the feedback current and the differentiated current and in that the voltage-to-current conversion of the transconductor has an exponential relationship, the output current being proportional to the exponent of the voltage across the capacitor. An integrator as claimed in Claim 2, characterized in that the transconductor (17) comprises a first output transistor (T1) having a first and a second main electrode and a control electrode, having its second main electrode coupled to the output terminal, and having a junction formed by the control electrode and the first main electrode arranged in parallel with the capacitor (13). An integrator as claimed in Claim 3, characterized in that the transconductor further comprises a second output transistor (T2) having a first and a second main electrode and a control electrode, of which the first main electrode and the control electrode are connected to corresponding electrodes of the first output transistor (T1) and of which the second main electrode is an output for the feedback current. An integrator as claimed in Claim 4, characterized in that the current divider comprises: a first through fourth transistor (T3, T4, T5, T6), each having a first and a second main electrode and a control electrode, the control electrode of the first transistor (T3) being connected to the first main electrode of the second transistor (T4), the control electrodes of the second (T4) and the third transistor (T5) being interconnected in a node, the first main electrode of the third transistor (T5) being connected to the control electrode of the fourth transistor (T6), the control electrode of the first transistor (T3) being coupled to the input terminal, the second main electrode of the first transistor (T3) being coupled to the node, the first main electrode of the first (T3) and the fourth transistor (T6) being connected to a first power-supply terminal (36), and the second main electrodes of the second and the third transistor being coupled to a second power-supply terminal (38); a bias current source (30) coupled to the node, a current mirror (34) having a first and a second current terminal coupled to the second main electrode of the fourth transistor (T6) and the control electrode of the first output transistor (T1), and in that the first main electrodes of the first and the second output transistor (T1, T2) are connected to the first power-supply terminal (36). An integrator as claimed in Claim 3, characterized in that the current divider comprises a first, a second and a third transistor (T3, T4, T5) each having a first and a second main electrode and a control electrode, the control electrode of the first transistor (T3) being connected to the first main electrode of the second transistor, the control electrodes of the second (T4) and the third transistor (T5) being interconnected in a node, the first main electrode of the third transistor (T5) being connected to the control electrode of the first output transistor, the control electrode of the first transistor (T3) being coupled to the input terminal, the second main electrode of the first transistor (T3) being coupled to the node, the first main electrode of the first transistor (T3) being connected to a first power-supply terminal (36), and the second main electrodes of the second and the third transistor being coupled to a second power-supply terminal (38); a bias current source (30) coupled to the node, and in that the first main electrode of the first output transistor (T1) is connected to the first power-supply terminal (36). An integrator as claimed in Claim 6, characterized in that the integrator further comprises a first and a second further transistor (T7, T8) each having a first and a second main electrode and a control electrode, the control electrode and the first main electrode of the first further transistor (T7) and of the second further transistor (T8) being connected to the corresponding electrodes of the first transistor (T3) and of the first output transistor respectively, and the second main electrode of the first further transistor (T7) and the second further transistor (T8) being coupled to the control electrode of the first output transistor (T1) and of the first transistor (T3) respectively. An integrator as claimed in Claim 6, characterized in that the integrator further comprises a further input terminal for receiving a further input current and a further output terminal for supplying a further output current, a further capacitor (48) whose capacitance is substantially equal to that of the first-mentioned capacitor, a further bias current source (40) for supplying a current which is substantially equal to that of the first-mentioned bias current source, a fourth through sixth transistor, each having a first and a second main electrode and a control electrode, the electrodes of the fourth, the fifth and the sixth transistor and of the second output transistor being connected to each other and to the further input terminal, the further output terminal, the further capacitor, the further bias current source, the first power-supply terminal and the second power-supply terminal in a way similar to the corresponding electrodes of the first, the second and the third transistor and the first output transistor respectively, a first group of at least one further output transistor, each transistor having a first main electrode and a control electrode, which are connected to the corresponding electrodes of the first output transistor, and a second main electrode, one of which is coupled to the control electrode of the second output transistor and the other of which are coupled to respective other output terminals for supplying a current which is proportional to the first-mentioned output current, a second group of at least one further output transistor, each transistor having a first main electrode and a control electrode, which are connected to the corresponding electrodes of the second output transistor, and a second main electrode, one of which is coupled to the control electrode of the first output transistor and the other of which to the respective other output terminals for supplying a current which is proportional to the further output current. An integrator as claimed in Claim 3, 4, 5, 6, 7 or 8, characterized in that the integrator is constructed with bipolar transistors, the control electrode, the first main electrode and the second main electrode corresponding to the base, the emitter and the collector respectively. An integrator as claimed in Claim 3, 4, 5, 6, 7 or 8, characterized in that the integrator is constructed with unipolar MOS transistors operating in the weak-inversion mode, the control electrode, the first main electrode and the second main electrode corresponding to the gate, the source and the drain respectively. An integrator as claimed in Claim 5, 6, 7, 8, 9 or 10, characterized in that the first-mentioned bias current source supplies a current whose magnitude is controllable. A filter arrangement comprising a first and a second integrator as claimed in Claim 8, 9, 10 or 11, two complementary filter input terminals and two complementary filter output terminals, each of the integrators having a non-inverting and a complementary inverting input which correspond to said first-mentioned input terminal and the further input terminal respectively, and having a first, second and third inverting output corresponding to the first-mentioned output terminal and two further output terminals respectively coupled to the second main electrodes of two further output transistors of the first group and having a first, second, and third non-inverting output complementary to the first, the second and the third inverting output respectively and corresponding to the further output terminals and two further output terminals respectively coupled to the second main electrode of two further output transistors of the second group, the non-inverting input and the first inverting output of the first integrator and the first non-inverting output of the second integrator being connected to one of the filter input terminals, the second inverting output of the first and of the second integrator being connected to one of the filter output terminals, the third inverting output of the first integrator being connected to the non-inverting input and the first inverting output of the second integrator, and the remaining filter input terminal, filter output terminal, inputs and outputs of the integrators being connected in a manner identical to their complementary counterparts, thereby constituting a filter section having a biquadratic transfer function whose coefficients are defined by the relative dimensions of the transistors in the integrators.

Inventors: SEEVINCK EVERT, SEEVINCK, EVERT
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1991
Main classification: G06G7
IPC codes: G06G7