Solar cell

Abstract: To prevent or to reduce the occurrence of surface cracks a surface of the substrate (1) is patterned and is sub-divided thereby as a means of stress relief. The active layer (2,3) itself may be sub-divided into islands (18) or alternatively the rear electrode layer (5) may be sub-divided.

Description: The present invention relates to a GaAs solar cell on an Si substrate. Figures 1(a) and 1(b) are views showing a structure of a conventional GaAs solar cell on an Si substrate, in which figure 1(a) is its plan view and figure 1(b) is a sectional view taken along a line A-A in figure 1(a). In figures 1(a) and 1(b), reference numeral 1 designates an Si substrate. A GaAs layer 2 of a first conductivity type, preferably n-type and a GaAs layer 3 of a second conductivity type (p-type) which serve as active layers are laminated on a first main surface 1a of the Si substrate 1 and then an anode electrode (p side electrode) 6 is formed on the p type GaAs layer 3 and a cathode electrode (n side electrode) 5 is provided on a second main surface 1b of the Si substrate 1. Thus, a solar cell 21 is formed. The GaAs solar cell 21 on the Si substrate is normally manufactured by the following method. First, the n type GaAs layer 2 and the p type GaAs layer 3 are sequentially formed on the first main surface 1a of the n type Si substrate 1 having a surface orientation of approximately (100) by a method of crystal growth of a compound semiconductor, such as MOCVD method. Thus, a pn junction 4 which generates a photovoltaic effect is formed. Then, as an electrode for taking a photoelectromotive force out, the anode electrode (p side electrode) 6 is selectively formed on the p type GaAs and the cathode electrode (n side electrode) 5 is formed on the whole surface of the second main surface 1b of the Si substrate 1. The anode electrode 6 comprises collecting electrodes 6a for collecting a photoelectric current and a common electrode 6b for connecting the collecting electrodes to an outside circuit. In addition, these electrodes are formed by sputtering or by vapour deposition and Ti/Ag is normally used. It is a problem that, during thermal cycling, such as in performing a thermal shock test down to a temperature of -200°C, for example, cracks 7 can be generated. The present invention, which is defined in the appended claims, is intended as a solution to the foregoing problem. In the accompanying drawings: Figure 1(a) is a plan view of a conventional GaAs solar cell on a Si substrate; Figure 1(b) is a sectional view of this solar cell taken along a line A-A of figure 1(a); Figure 2 is a sectional view of a GaAs solar cell on a Si substrate according to the present invention. To further the understanding of this invention, a preferred embodiment thereof will be described hereinbelow and reference will be made to figure 2 of the drawings. The following description, however, is given merely by way of example. According to the embodiment shown in figure 2, a non-conductive BN film 10 is provided on the second main surface of the Si substrate 1. Separate Ti/Au metal electrodes 11 formed over apertures in the BN film 10 are used as the n side electrodes 5. In this case, a compressive stress is applied to the GaAs layers 2 and 3 by the BN film 10 at a low temperature and then the tensile stress caused by the difference in thermal expansion coefficient between Si and GaAs can be offset. Thus, according to this embodiment of the present invention crack generation is suppressed. Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the scope of the present invention being limited only by the terms of the following claims.

Claims: A solar cell comprising: a Si substrate (1) of a first conductivity type; a first GaAs active layer (2) of a first conductivity type located on a front surface of said Si substrate (1); a second GaAs active layer (3) of a second conductivity type located on, and defining a pn junction with, said first GaAs active layer (2); a first electrode structure (11) in contact with the back surface of said Si substrate (1); and a second electrode structure (6) in contact with said second GaAs active layer (3); characterised in that a non-conductive BN film (10) is formed on the back surface of said Si substrate (1), said first electrode structure (11) being in contact with the back surface of said Si substrate (1) via apertures in said BN film (10). A solar cell as claimed in claim 1 wherein said first and second conductivity types are n-type and p-type respectively and said first electrode structure (11) is of metal. A solar cell as claimed in claim 2 wherein said first electrode structure (11) is of Ti/Au.

Inventors: KADOTA YOSHIAKI, MITSUI KOTARO, NISHIMURA TAKASHI, OGASAWARA NOBUYOSHI, OHMACHI YOSHIRO, OOHARA TAKAHIKO, KADOTA, YOSHIAKI, MITSUI, KOTARO, NISHIMURA, TAKASHI, OGASAWARA, NOBUYOSHI, OHMACHI, YOSHIRO, OOHARA, TAKAHIKO, MITSUI, KOTARO, C/O MITSUBISHI DENKI K. K., NISHIMURA, TAKASHI, C/O MITSUBISHI DENKI K. K., OGASAWARA, NOBUYOSHI, C/O MITSUBISHI DENKI K. K.
Applicants: MITSUBISHI ELECTRIC CORP, NIPPON TELEGRAPH & TELEPHONE, MITSUBISHI DENKI KABUSHIKI KAISHA, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Application year: 1991
Main classification: H01L31
IPC codes: H01L31, H01L21, H01L27