A method of and a device for driving a wire-dot print head

Abstract: In a wire dot printer having a wire-dot print head provided with wire drive elements disposed in sequence, the energization of the respective wire drive elements is controlled in accordance with print data supplied for respective drive elements and a drive time signal (DT1-n, DT1-n) supplied in common to a plurality of the drive elements. Detection is made, for each drive element, whether or not an adjacent drive element is energized, in accordance with the print data corresponding to the adjacent drive element, and the energization time for the particular drive element is controlled in accordance with the result of the detection.

Description: The present invention relates to a device for driving a wire-dot printing head Hitherto, various types of wire-dot print heads have been used for a wire-dot printers. Spring-charged wire-dot print heads are widely used in applications where high speeds and high printing forces are desired. Fig. 1 is a sectional view of a wire-dot print head of the spring charge type. In the figure, print wires 1 extend generally parallel with each other. The front or forward (upper as seen in the figure) parts of the print wires 1 extend through an aperture 8a provided in the front end of a nose 8b forming the front part of a wire guide 8. When the print wires 1 are driven forward, in a manner later described, their front ends strike a print medium, such as print paper PP on platen PL via an ink ribbon IR thereby performing wire-dot printing. Rear (lower as seen in the figure) ends of the print wires 1 are fixed to inner or first ends of armatures 2 which are disposed to extend radially. A plate spring 3 comprises radial parts 3a which are fixed to rear surfaces of outer or second ends of the armatures 2. The plate spring 3 also comprises an annular part 3b which integrally connects the outer ends of the radial parts 3a and is clamped between the front end of a cylindrical permanent magnet 4 and the rear surface of an annular part 5b of a front yoke 5. The front yoke 5 also comprises radial parts 5a having outer ends integrally connected by the annular part 5b. Each armature 2 is positioned between adjacent radial parts 5a of the front yoke 5, with a slight gap on each side. Cores 6 extend from a disk-shaped base yoke 10 forward and their front ends are facing the lower surfaces of the armatures 2. Coils 7 are wound on the cores 6 to form electromagnets EM for the respective armatures 2 and hence for the respective print wires 1. The rear end of the cylindrical permanent magnet 4 is connected to the periphery of the disk-shaped base yoke 10. The permanent magnet 4, the annular part 3b of the plate spring 3, the annular part 5b of the front yoke 5 and an annular part 8c of the wire guide 8 form a cylindrical wall of the print head. The magnetic flux from the permanent magnet 4 passes through the annular part 5b of the front yoke 5, the radial parts 5a of the front yoke 5, the armatures 2, the cores 6 and the base yoke 10, thereby attracting the armatures 2 toward the cores 6, bending the radial parts 3a of the plate spring 3. When the electromagnets EM are energized to generate a magnetic flux canceling the magnetic flux from the permanent magnet 4, the armatures 2 are released and the print wires 1 are driven forward by virtue of the recovery force of the plate spring 3. Further details of this action are described in for example Japanese Patent Kokai Publication No. 53860/1989. The period for which the electromagnets are energized is determined by a drive time signal DT 1 shown in Fig. 2. Another drive time signal DT 2 is used to provide, subsequent to the energization time, a period PR1 in which currents due to the electromotive forces induced in the electromagnets are allowed to flow through a certain current path. Subsequent to the first period, the currents which are also due to electromotive forces, flow through another current path for a certain period, denoted PR2, until the current falls to zero. An example of a wire dot print head with drive circuitry which operates in this way is described in EP-A-0 294 288. An assembly, particularly the electromagnet EM, for driving a single print wire will be called a wire drive element. The wire-dot print head has a multiplicity of, e.g., 24, drive elements. They are disposed in an array or in sequence along a ring as shown in Fig. 3. In the figure, the positions of the drive elements, particularly the electromagnets on the disk-shaped base yoke 10 are illustrated. They are numbered, as #1, #2, #3, and so on, in the order in which the front ends of the corresponding print wires 1 are arranged from top to bottom. In the sequence along the circle in which the electromagnets are disposed in sequence, they are arranged in the counterclockwise direction in the order of #1, #3, #5, ... #2. For the purpose of reducing the size and cost of the wire-dot print head, the base yoke 10 to which the cores 9 are fixed, the permanent magnet 4, and the front yoke 5 and the like are formed as an integral unit, and for this reason much of the magnetic circuit of the drive element is shared. As a result, magnetic flux generated from one drive element enters a magnetic circuit of an adjacent drive element, creating a magnetic interference which brings about a variation in the magnetic circuit of the above-mentioned adjacent drive element. This magnetic interference not only increases the exciting current of the coil, but also gives considerable influences on the printing operation of the armatures, such as the shifting in the timing of the release of armatures. The variations in the armature operation due to the magnetic interference is becoming a larger problem as the speed and the printing force of the wire-dot print head are increased. Systems have been proposed in which the time for which currents are made to flow through the coils, i.e., the time for which the coils are energized are varied, depending on the number of the coils that are simultaneously excited, and these systems are used as effective means. One of such systems is disclosed in Japanese Patent Kokoku Publication No. 30154/1988. According to this publication, means for detecting print data signals supplied for the respective electromagnets and the number of the electromagnets that are simultaneously driven responsive to the signals, means actuated in accordance with timing signals generated every predetermined pitch of movement of wire drive element, means supplying a time signal having a length corresponding to the number of the electromagnets, and means gating the print data signals with the time signal to produce drive signals for the electromagnets are provided, and the time for which the coils are energized is thereby varied. In the conventional wire-dot printers, the control is made based solely on the number of the coils which are energized, so the printing operations of the armatures are not necessarily constant. For instance, the magnetic interference gives a significant influence on the adjacent drive elements, and the degree of interference differs much depending on whether or not adjacent electromagnets are simultaneously driven. Usually, the time for which coils are energized is varied to minimize the influence with the combination of pins giving the worst armature operations. For this reason, with respect to the combination of the pins with which the time for which the coils are energized may be short, energy more than necessary is supplied to the coils, and the heating of the coils is increased, and the printing forces are excessive. An explanation will now be given of the influence on the armature operations both in a situation in which adjacent drive elements are simultaneously driven and a situation in which adjacent drive elements are not simultaneously driven. As described earlier, the magnetic interference gives the largest influence on an adjacent drive element, and the more separated the driven elements are, the smaller is the influence. The influence appears as the variation in the inductance of the magnetic circuit of the drive element, and the phenomena vary depending on the number and positions of elements that are simultaneously driven. The phenomena also vary depending on the structure and the material of the wire-dot print head. It is therefore difficult to determine whether the magnetic interference accelerates or retards the operation of the armatures. It is known that for a different type of printing head the energisation of adjacent print elements can require the energisation levels of the elements to be increased, as described in JP-A-64 53 860. In accordance with the present invention there is provided a device for driving a wire dot printer having a wire dot printing head provided with wire drive elements disposed in a sequence, each wire drive element including an electrically energizable coil and switching means for controlling current flow through the coil, the device comprising means for controlling the energization of the respective drive elements cyclically for respective energization periods in accordance with print data for the respective drive elements, the print data being indicative of whether or not the respective wire drive elements are to be driven for each cycle, each said energization period including a first phase during which energy is supplied to the coil, followed by a second phase during which said supply of energy is removed and current flow through the coil is maintained by self inductance, and a third phase during which a sink is provided for the self-induced current, the second phases for all the drive elements terminating at a fixed time and at substantially the same time for a given cycle, timing signal generating means for generating first and second timing signal configurations that define durations for said first and said second phases of each energization period and drive circuit means responsive to the individual timing signal configurations for driving the individual drive elements characterised by logic gate means responsive to said print data, for producing individual detection signals for the respective drive elements, representative of whether an adjacent drive element is to be concurrently energized and selecting means responsive to the individual detection signals for selecting said first or second timing signal configurations for each of the drive elements individually, said drive circuit means being responsive to the individual timing signal configurations selected by the selecting means for the respective drive elements, for driving the individual drive elements such that the first phase of the respective energization period assumes said relatively short duration when an adjacent drive element is to be concurrently energized. By means of the invention, overheating of the printing head can be avoided. The invention will now be described by way of example, reference being had to the accompanying drawings, in which: FIGURE 1 is a sectional view of a typical known print head; FIGURE 2 is a waveform diagram for the known drive circuit; FIGURE 3 is a diagram showing the arrangement of the drive elements; FIGURE 4 is a diagram showing a drive control circuit for a print head driving device, in accordance with the invention; FIGURE 5 is a diagram showing the arrangement of the drive elements on the base yoke; FIGURE 6 is a time chart of the drive control circuit for the print head; FIGURE 7 is a waveform diagram of the coil current corresponding to Figure 6; FIGURE 8 is a circuit diagram showing part of the drive circuit; FIGURE 9 is a block diagram showing the drive control circuit for a print head driving device for a second embodiment of the invention; FIGURE 10 is a time chart of the drive circuit for the print head shown in Figure 9; FIGURE 11 is a waveform diagram of the coil currents corresponding to Figure 10; and FIGURE 12 is a circuit diagram showing a modification of a detecting circuit. In the drawings, identical elements throughout various figures are denoted by identical reference marks. First Embodiment Fig. 4 is a circuit diagram showing a print head drive control circuit of an embodiment of the invention. Print data #1, #3, #5, ..., #2 are supplied, each print cycle, from a print data generating unit, not shown, for respective drive elements and hence for respective print wires 1 and determine whether the corresponding print wires 1 are to be driven during the particular print cycle. Identical reference marks #1, #3, #5, ..., #2 are used to correlate the print data with the drive elements for which the print data are generated. The print data are input to a detecting circuit 20 as well as to drive circuits later described. The detecting circuit 20 detects, for each drive element, whether said each drive element and at least one of the drive elements adjacent to the first-mentioned drive element are to be energized in the particular print cycle. This detection is made in accordance with the print data #1, #3, #5, ..., #2. The results of the detection are detection signals 20a, 20b, 20c, ..., 20x. The alphabetical suffixes a, b, c, ..., x respectively correspond to #1, #3, #5, ..., #2 of the drive elements. Fig. 5 shows the correspondence between the number (#) of each of drive elements and the alphabetical suffixes of each detection signal. The detecting circuit 20 comprises logical product circuit (hereinafter referred to as AND gates) 21a, 21b, 21c, ..., 21x, and logical sum circuits (hereinafter referred to as OR gates) 22a, 22b, 22c, ..., 22x. The AND gates 21a receives print data #1 and #3. The AND gate 21b receives print data #3 and #5. The AND gate 21c receives print data #5 and #7. The last AND gate 21x receives print data #1 and #2. That is, two print data which are for drive elements adjacent to each other in the circular sequence in which they are disposed as shown in Fig. 3 are applied to inputs of each of the AND gates 21a, 21b, 21c, ..., 21x. The OR gate 22a receives the output signals from the AND gates 21a and 21x. The OR gate 22b receives the output signals from the AND gates 21a and 21b. The OR gate 22c receives the output signals from the AND gates 21b and 21c. That is, the OR gates 22b to 22x receive the output signals of pairs of AND gates 21a to 21x in the front stage that are adjacent to each other. The OR gate 22a receives the output signals of the AND gate 21a of the uppermost position and the AND gate 21x of the lowermost position. Thus, the AND gates of each of said pairs receive one common print data for a certain drive element, and two print data which are for drive elements adjacent, on both respective sides, to said certain drive element. Each of the AND gates 21a, 21b, 21c, ..., 21x detects whether the print data for each drive element and the drive element next (in the order of arrangement) to the first-mentioned drive element are both active meaning that these two drive elements are to be energized in the particular print cycle. Each of the OR gates 22a, 22b, 22c, ..., 22x detects whether the print data for the corresponding drive element and at least one of the drive elements adjacent to the first-mentioned drive element are both active. When the detecting circuit 20 finds, on the basis of the input print data, that the print data for the corresponding drive element as well as one or both of the print data for the drive elements adjacent to the first-mentioned drive element in question are both at "1", it generates the detection signal of "1" for the particular drive elements. Otherwise, it generates the detection signal of "0" for the particular print data. The timing signal generating circuit 23 generates an on-timing signal ST, and off-timing signals STP 1 , STP 2 in time with the generation of the print data. Responsive to the on-timing signal ST, the drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 for the respective drive elements are turned on. Responsive to the off-timing signals STP 1 , STP 2 , the drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 for the respective drive elements are turned off. The drive time signal DT 2 is also generated, with its on-timing (leading edge) and off-timing (trailing edge) being coincident with that in the prior art. The off-timing signal selecting circuit 24 comprises data selectors 24a, 24b, 24c, ..., 24x, which receive, at the input terminals A and B, the off-timing signals STP 1 and STP 2 generated by the timing signal generating circuit 23. Each of the data selectors receives, at its data select terminal S, the corresponding detection signal from the detecting circuit 20, and when the signal at terminal S is at "1" it selects the signal being input to terminal A and output the selected signal through the output terminal Y. When the signal at the select terminal S at "0" the data selector selects the signal being input at terminal B and output the selected signal through the output terminal Y. The drive time signal generating circuit 25 comprises JK flip-flops 25a, 25b, 25c, ..., 25x. Input to the J terminal of each JK flip-flop is the on-timing signal ST generated by the timing signal generating circuit 23. Input to the K terminal of each JK flip-flop is the output of the corresponding data selector of the off-timing signal selecting circuit 24. Input to the reset terminals R of the JK flip-flops 25a, 25b, 25c, ..., 25x are print data #1, #3, #5, ..., #2. The output signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 of the JK flip-flops are the drive time signals for controlling the coil currents through the drive elements #1, #3, #5, ..., #2, and are used in place of the drive time signal DT 1 in the prior art. The drive time signal for each drive element of which an adjacent drive element is driven is turned on responsive to the on-timing signal ST and is turned off responsive to the off-timing signal STP 1 . The drive time signals for other drive elements are turned on responsive to the on-timing signal ST and are turned off responsive to the off-timing signal STP 2 . Fig. 6 is a time chart of the print head drive control circuit in Fig. 4. Fig. 6 shows, at (a), the print data #1, #3, #5, ...., #2. Fig. 6 shows, at (b), (c) and (d), respectively show the on-timing signal ST, and the off-timing signals STP 1 and STP 2 generated by the timing signal generating circuit 23. Fig. 6 shows, at (e), the drive time signal DT 1-n which is turned on and off responsive to the on-timing signal ST and the off-timing signal STP 1 . Fig. 6 shows, at (f), the drive time signal DT 1-n′ which is turned on and off responsive to the on-timing signal ST and the off-timing signal STP 2 . In the reference marks, the suffixes "n" and "n′" correspond to the numbers of the drive elements. Fig. 6 shows, at (g), the drive time signal DT 2 . Fig. 7 shows waveforms of the coil currents corresponding to Fig. 6. The waveform A is obtained when the drive time signal DT 1-n is used, while the waveform B is obtained when the drive time signal DT 1-n′ is used. Fig. 8 shows part of the drive circuit for a single drive element. The drive time signal DT 1-n or DT 1-n′ is inverted at the inverter 26, and is input to the base of a PNP transistor 27. The drive time signal DT 2 is input to an AND gate 29 together with print data, and their logical product is determined, and input to the base of an NPN transistor 30. Connected to the collector of the transistor 27 is a first end of a coil 28. Connected to the collector of the transistor 30 is a second end of the coil 28. Connected to the emitter of the transistor 27 is a power supply Vcc, and the emitter of the transistor 30 is connected to the ground. A diode 41 is connected across the series connection of the coil 28 and the transistor 30, with its anode connected to the emitter of the transistor 30 and its cathode connected to the first end of the coil 28. Another diode 42 is connected across the series connection of the transistor 27 and the coil 28, with its anode connected to the second end of the coil 28 and with its cathode connected to the emitter of the transistor 27. A circuit similar to that shown in Fig. 8 is provided for each of the drive elements. The operation will now be described. As an example, it is assumed that the drive elements represented by black dots in the sequence of drive elements shown in Fig. 3, #5, #7, #9, #10, #12, #15 and #20 are to be driven, and the drive elements represented by white dots are not to be driven. This means, the drive elements #5, #7, #9, #10, and #12 and least one of their neighboring drive elements are simultaneously driven, while the drive elements adjacent to the drive elements #15 and #20 are not driven. The print data #1, #3, #5, ..., #2 are input at time T 1 shown in Fig. 6, to the detecting circuit 20 shown in Fig. 4. The detection signals 20c, 20d, 24e, 24s and 24t corresponding to the drive elements #5, #7, #9, #10, and #12 will assume level "1" and other detection signals will assume level "0". As a result, the data selectors 24c, 24d, 24e, 24s and 24t of the off-timing signal selection means 24 select the off-timing signals STP 1 and supply it to the drive time signal generating circuit 25. Other data selectors select the off-timing signal STP 2 , and supply it to the drive time signal generating circuit 25. At time T 2 , the on-timing signal ST rises to level "1". The JK flip-flops of the drive time signal generating circuit 25 operate in accordance with clock pulses not shown and the drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ...DT 1-2 rise to level "1". The drive time signals DT 1-5 , DT 1-7 , DT 1-9 , DT 1-10 , and DT 1-12 rise and fall at the timings T 2 and T 3 , like the drive time signal DT 1-n shown in Fig. 6 at (e), and other drive time signals rise and fall at T 2 and T 4 like the drive time signal DT 1-n′ shown in Fig. 6 at (f). The drive time signal DT 2 then will also be at level "1". The drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 and the drive time signals DT 2 are supplied to the drive circuits of the respective drive elements, like that shown in Fig. 8, and determine, together with the print data for each drive element, whether to energize the coil and when to start and stop the energization. In the example under consideration, the print data for the coils #5, #7, #9, #10, #12, #15 and #20 are "1" and other print data are at "0". The energization of these coils is commenced at T 2 . The detection signals for the coils #5, #7, #9, #10, and #12 are at "1", so the energization of the corresponding coils is terminated at T 3 . On the other hand, the detection signals for the coils #15 and #20 are at "0", so the energization of the corresponding coils is terminated at T 4 . The "energization" as used here means turning on both the transistors 27 and 30 for supplying a current from the power supply Vcc, through the coil and to the ground. When the energization is terminated, the transistor 27 is turned off, but the transistor 30 is kept on. Then, due to the electromotive force induced in the coil 28, a current continues to flow through a path P1 consisting of the coil 28, the transistor 30 and the diode 41. The current gradually falls as indicated by curves A and B in Fig. 7. The curve A is for the case in which the energization is terminated at T 3 , while the curve B is for the case in which the energization is terminated at T 4 . The transistor 28 is thereafter turned off, at the trailing edge of the drive time signal DT 2 . The current due to the electromotive force then begins to flow from the ground, through a path P2 consisting of the diode 41, the coil 28, and the diode 42, to the power supply Vcc. The current through the path P2 rapidly falls, as shown in Fig. 7. As has been described according to the above embodiment, the trailing edges of the drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 are controlled in accordance with detection signals indicating whether or not an adjacent drive element is driven. Accordingly, the coil energization time for the drive element which is adjacent can be made shorter than the coil energization time which is not adjacent. Second Embodiment Fig. 9 is a circuit diagram showing a drive control circuit for the print head of a second embodiment of the invention. The difference from the first embodiment is that the leading edges of the drive time signals rather than the trailing edges are controlled for the purpose of varying the lengths of the energization times. For implementing such a scheme, the timing signal generating circuit 31, the on-timing signal selecting circuit 32 and the drive time signal generating circuit 33 have different configurations. The timing signal generating circuit 31 generates first and second on-timing signals ST 1 and ST 2 for turning on the drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 , and a single off-timing signal STP for turning off the drive time signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 , in time with the generation of the print data. The drive time signal DT 2 is also generated. The on-timing signal selecting circuit 32 comprises data selectors 32a, 32b, 32c, ..., 32x, which receive at the data input terminals A and B the on-timing signals ST 1 and ST 2 generated by the timing signal generating circuit 31. They receive, at the data select terminals S, the detection signals from the detecting circuit 20, and responsive to the detection signal of "1" they select the signal being input to the terminal B and output it to the output terminal Y, and responsive to the detection signal of "0" they select the signal input to the terminal A and output it the output terminal Y. The drive time signal generating circuit 33 comprises JK flip-flops 33a, 33b, 33c, ..., 33x. Input to the J terminal of each JK flip-flop are the output signals from the respective data selectors. Input to the K terminal of each JK flip-flop is the off-timing signal STP generated by the timing signal generating circuit 31. Input to the reset terminals R of the JK flip-flops 33a, 33b, 33c, ..., 33x are print data #1, #3, #5, ..., #2. The output signals DT 1-1 , DT 1-3 , DT 1-5 , ..., DT 1-2 of the JK flip-flops are the drive time signals for controlling the energization of the corresponding drive elements #1, #3, #5, ..., #2, and are used in place of the drive time signal DT 1 mentioned in the description of the prior art. The drive time signal for each drive element of which an adjacent drive element is driven is turned on responsive to the on-timing signal ST 2 , and is turned off with the off-timing signal STP. The drive time signals for other drive elements are turned on with the on-timing signal ST 1 and is turned off with the off-timing signal STP. Fig. 10 is a time chart of the print head drive control circuit in Fig. 9. Fig. 10 shows, at (a), the print data #1, #3, #5, ...., #2. Fig. 10 shows, at (b), (c) and (d), the on-timing signals ST 1 , ST 2 , and the off-timing signal STP generated by the timing signal generating circuit 31. Fig. 10 shows, at (e), the drive time signal DT 1-n which is turned on and off with the on-timing signal ST 1 and the off-timing signal STP. Fig. 10 shows, at (f), the drive time signal DT 1-n′ which is turned on and off with the on-timing signal ST 2 and the off-timing signal STP. In the reference marks, the suffixes "n" and "n′" correspond to the numbers of the drive elements. Fig. 10 shows, at (g), the drive time signal DT 2 . In the same way as the first embodiment, the drive time signals DT 1-n , DT 1-n′ and DT 2 as well as the print data are input to the drive circuits of the drive elements to determine whether and when to energize the respective drive elements. Fig. 11 shows waveforms of the coil currents corresponding to Fig. 10. The waveform C is for the drive time signal DT 1-n and is obtained when the energization is commenced at T 2 . The waveform D is for the drive time signal DT 1-n′ and is obtained when the energization is commenced at T 3 . The operation will now be described. As an example, it is assumed that the drive elements #5, #7, #9, #10, #12, #15 and #20 are driven, as in the first embodiment. The print data #1, #3, #5, ..., #2 are input at time T 1 shown in Fig. 9, to the detecting circuit 20 shown in Fig. 9. The print data for the drive elements #5, #7, #9, #10, #12, #15 and #20 are at "1". The drive elements #5, #7, #9, #10 and #12 have their neighboring drive elements simultaneously driven, so the detection signals corresponding to the drive elements #5, #7, #9, #10, and #12 will assume level "1" and other detection signals will assume level "0". As a result, the data selectors 32c, 32d, 32e, 32s and 32t of the on-timing signal selection means 32 select the on-timing signals ST 2 and supply it to the drive time signal generating circuit 33. Other data selectors select the on-timing signal ST 1 , and supply it to the drive time signal generating circuit 33. At time T 2 , the on-timing signal ST 1 rises to level "1", responsive to which the drive time signal DT 1-n corresponding to the drive elements other than the drive elements #5, #7, #9, #10 and #12 rise to level "1". At time T 3 , the on-timing signal ST 2 rises to level "1", responsive to which the drive time signals DT 1-n′ corresponding to the drive elements #5, #7, #9, #10 and #12 rise to level "1". Input to the drive circuits of the drive elements #15 and #20 are the drive time signals DT 1-n , DT 2 and the print data #15 and #20, and the drive elements are energized so as to conduct a current as indicated by waveform C in Fig. 11. Input to the drive circuits of the drive elements #5, #7, #9, #10 and #12 are the drive time signals DT 1-n′ , DT 2 and the print data #5, #7, #9, #10 and #12, and the drive elements are energized so as to conduct a current as indicated by waveform D shown in Fig. 11. At time T 4 , the off-timing signal STP rises to "1", responsive to which the the JK flip-flops of the drive time signal generating circuit 33 shown in Fig. 9 operate, in accordance with clock pulses not shown, to set the drive time signals DT 1-n and DT 1-n′ to "0". As a result, the energization of the drive elements #5, #7, #9, #10, #12, #15 and #20 (the current supply to the coils of the drive elements #5, #7, #9, #10, #12, #15 and #20 from the power supply Vcc) is terminated. At time T 5 , the drive time signal DT 2 falls to level "0". The attenuation of the coil current due to the electromotive force rapidly falls as illustrated. Various modifications are possible without departing from the sprit of the invention. For instance, although in the embodiments described, the detecting circuit 20 detects, for each drive element, whether said each drive element and at least one of the drive elements adjacent to the first-mentioned drive element are to be energized in the particular print cycle, the detecting circuit 20 may alternatively be so arranged to detect, for each of the drive elements, whether at least one of the drive elements adjacent to the first-mentioned drive element is driven during each print cycle. This can be implemented by a detecting circuit 120 shown in Fig. 12. It comprises OR gates 122a to 122x for the respective drive elements. Each OR gate for each drive element is connected to receive the print data for the drive elements adjacent to the drive element in question and using the output of the OR gate as the detection signal 120a to 120x. Using such detection signals will produce the same results since the drive elements are not actually energized unless the corresponding print data input to the AND gate 29 at the base of the driving transistor 30 is also active. As has been described according to the invention, the energization time for each drive element is determined depending on whether or not an adjacent drive element is simultaneously energized: it is shortened if the adjacent drive element is also energized. Accordingly, supply of excessive energy to drive elements whose neighbouring adjacent drive element is driven simultaneously is avoided, and the heating of the wire-dot print head is reduced, the print quality can be made uniform, and a high-speed wire-dot print head having a desirable armature operation can be provided.

Claims: A device for driving a wire dot printer having a wire dot printing head provided with wire drive elements (28) disposed in a sequence, each wire drive element including an electrically energizable coil and switching means for controlling current flow through the coil, the device comprising: means (26,27,29,30,31,32,33,41,42) for controlling the energization of the respective drive elements cyclically for respective energization periods in accordance with print data (#1,#3...) for the respective drive elements, the print data being indicative of whether or not the respective wire drive elements are to be driven for each cycle, each said energization period including a first phase (DT 1 ) during which energy is supplied to the coil, followed by a second phase (DT 1 -DT 2 ) during which said supply of energy is removed and current flow through the coil is maintained by self inductance, and a third phase during which a sink is provided for the self-induced current, the second phases for all the drive elements terminating at a fixed time and at substantially the same time (T 5 ) for a given cycle; timing signal generating means (23,31) for generating first and second timing signal configurations that define durations for said first and second phases of each energization period; and drive circuit means (25,33) responsive to the individual timing signal configurations for driving the individual drive elements, characterised by : logic gate means (21,22;122) responsive to said print data, for producing individual detection signals (20) for the respective drive elements, representative of whether an adjacent drive element is to be concurrently energized; and selecting means (24,32) responsive to the individual detection signals for selecting said first or second timing signal configurations for each of the drive elements individually; said drive circuit means (25,33) being responsive to the individual timing signal configurations selected by the selecting means for the respective drive elements, for driving the individual drive elements such that the first phase of the respective energization period assumes said relatively short duration when an adjacent drive element is to be concurrently energized. A device according to claim 1 wherein the timing signal generating means (23) generates said first and second timing signal configurations for which said first phase has either a relatively long (T 2 -T 4 ) or short (T 2 -T 3 ) duration. A device according to claim 2 wherein the timing signal generating means is operative to generate a start pulse (ST) for defining the start of the first phase, a first stop pulse (STP 1 ) for defining the end of the first phase for said relatively short duration, and a second stop pulse (STP 2 ) for defining the end of the first phase for said relatively long duration. A device according to claim 2 or 3 wherein the combined duration of the first and second phases is the same for the first and second timing signal configurations. A device according to claim 1 wherein the timing signal generating means (31) generates said first and second timing signal configurations for which said first phase has either a relatively long (T 2 -T 4 ) or short (T 3 -T 4 ) duration and the second phase (T 4 -T 5 ) has the same duration. A device according to claim 1 or 5 wherein the timing signal generating means (31) is operative to generate a first start pulse (ST 1 ) for defining the start of the first phase for said relatively long duration, and a second start pulse (ST 2 ) for defining the start of the first phase for said relatively short duration, followed by a stop pulse (STP) for defining the end of the first phase. A device according to any preceding claim wherein the drive circuit means (25,33) generates a first timing signal (DT 1 ) which defines the duration of the first phase. A device according to claim 7 wherein the timing signal generating means (23,31) generates a second timing signal (DT 2 ) which defines the combined duration of the first and second phases. A device according to claim 8 including the plurality of wire driving elements (28), each comprising a first switch (27) connecting one end of the coil (28) to a power supply (V cc ), and controlled by said first timing signal (DT 1 ), a second switch (30) connecting the other end of the coil to ground and controlled by the second timing signal (DT 2 ), both of the switches being switched on for said first phase, a first diode (41) connected across the series connection of the second switch and the coil to permit an electric current to flow through the coil the second switch and the first diode during said second phase for which the first switch is turned off and the second switch is turned on, and a second diode (42) connected across the series connection of the first switch and the coil to permit an electric current to flow during the third phase through the first diode the coil and the second diode for which both switches are turned off. A device according to claim 8 or 9 including means (26,29) responsive to said timing signals (DT 1 -DT 2 ) and the print data for the respective drive elements, for permitting the drive elements to be driven when both the print data (#1) and the timing signals indicates that the element is to be driven. A device according to any preceding claim wherein said logic gate means comprise AND gates (21) for determining whether print data signals for adjacent ones of the drive elements are to be concurrently energized, and OR gates (22) associated with the drive elements respectively and responsive to the outputs of the AND gates for determining whether for a particular drive element, an element on either side thereof in the sequence is to be concurrently energized therewith. A device according to any one of claims 1 to 10 wherein the logic gate means comprise a plurality of OR gates (122) associated with the drive elements respectively, each of the OR gates having inputs to receive the print data signals for drive elements on opposite sides of the drive element associated therewith.

Inventors: ANDOU HIROKAZU, IKEDA KIYOSHI, KOYAMA TATSUYA, ANDOU, HIROKAZU, IKEDA, KIYOSHI, KOYAMA, TATSUYA, ANDOU, HIROKAZU, C/O OKI EL. INDUSTRY CO., LTD., IKEDA, KIYOSHI, C/O OKI EL. INDUSTRY CO., LTD., KOYAMA, TATSUYA, C/O OKI EL. INDUSTRY CO., LTD.
Applicants: OKI ELECTRIC IND CO LTD, OKI ELECTRIC INDUSTRY CO., LTD.
Application year: 1991
Main classification: B41J2
IPC codes: B41J2, B41J9