Improved system for triac trigger control in combination with a sensing element

Abstract: The invention relates to a circuit of the kind wherein a load (L) is supplied via a triac (TC) with current from an AC voltage supply source (A, B) under the control of a triac control means (IC) in combination with a sensing element (RT). In previous circuits the sensing element is energised by a current from a DC source which is derived by rectification and smoothing of the alternating current of an alternating voltage supply source, which has limitations in integrated circuitry. In the present invention the sensing element (RT) is energised by an alternating current to produce a sensed alternating current. The triac control means (IC) includes an integration means (6) for producing a control signal which is representative of the integral of the difference between a value corresponding with the average peak to peak magnitude of the sensed alternating current and a reference value. The triggering or otherwise of the triac (TC) being determined by a latch (LCH) actuated in response to the magnitude of the control signal relative to one or more threshold levels. The present invention may be used in thermostats or other sensing devices.

Description: The present invention relates to a circuit arrangement comprising a load supplied via a triac with current from an alternating voltage source under control of a triac trigger control means in combination with a sensing element. Such an arrangement is known from UK Patent Application GB-A-2 075 723. As a rule, the alternating voltage source is formed by an alternating mains voltage source. Usually the sensing element is sensitive to the effects produced by the load. For example, the sensing element may be a temperature dependent resistance located in proximity to a load in the form of a heating element, in which case variations of the sensing element may be utilised to control triggering of the triac to ensure that the heat produced by the load remains within certain temperature limits. In known circuit arrangement the sensing element is energised by a current from a direct current source so as to produce a voltage for influencing operation of said triac control means. Additionally, the triac trigger control means form part of an integrated circuit assembly incorporating a direct current supply source which, in operation, is able to be energised by the alternating voltage source. Accordingly, the sensing element is readily able to be energised from the direct current supply source forming part of the integrated circuit assembly. Employing direct current energisation of the said sensing element has the disadvantage that, unless battery supplies are available as a direct current source, it is necessary to provide a source of direct current by rectification and smoothing of alternating current derived from the alternating voltage supply source. The provision of battery supplies is expensive, likewise the provision of a rectification and smoothing circuit if a direct current source is energised from a mains supply. In instances where the triac trigger control means form part of an integrated circuit assembly incorporating a direct current supply source energised by the said alternating voltage source, utilisation of the incorporated direct current supply source has the limitation that typical incorporated direct current supply sources deliver voltages of less than 12 volts in order to suit the power supply needs of the triac control system. For the energisation of the sensing element from a source of direct current it is preferable for the source to have a terminal voltage significantly larger than 12 volts in order to utilise the available operating range of the sensing element. For example, the resistance of a thermistor employed as a sensing element for an electric cooking appliance may vary by three orders of magnitude over the anticipated cooking range. With circuit arrangements of the kind to which the invention relates, in practice it may be necessary for the load and the sensing element to be located remotely from the remainder of the circuit arrangement with the consequence that connection leads between the remotely located sensing element and the remainder of the circuit arrangement are susceptible to the pick-up of interference which may impair satisfactory operation of the circuit arrangement when the sensing element is energised from a source of direct current, unless the interference is filtered. Moreover, circuit arrangements of the kind to which the invention relates frequently employ a temperature setting element in addition to a temperature sensing element, which temperature setting element is energised from the same source of direct current so that in the event of the temperature setting element being remotely located, the connection leads thereto are also susceptible to the pick-up of interference unless provision is made for filtering such interference. A circuit arrangement in accordance with the present invention has a number of novel features and, in comparison with known circuit arrangements of the kind to which the invention relates, displays many advantages which will be apparent from the following general description thereof and from the following description of individual embodiments of the invention. For this purpose, the circuit arrangement in accordance with the invention is characterised in that said sensing element is energised by alternating current derive from the alternating voltage source to produce a sense alternating current and the said triac trigger control means includes an integration means for producing a control signal, triggering or otherwise of the said triac being determined by the state of a latch actuated in response to the magnitude of the control signal relative to one or more threshold levels, during at least one state of the latch the control signal produced by the integration means representing the integral of the difference between a value corresponding with the average peak to peak magnitude of the sensed alternating current and a reference value. The control signal can be produced by integration of the difference between the average peak to peak magnitude of the sensed alternating current and that of a reference alternating current but the invention is not limited to production of the said control signal in this way. One form of the invention is based upon the use of a single threshold and actuation of the said latch in response to the magnitude of the control signal which is able to be carried out only when the latch is in a given state, such actuation being in response to the magnitude of the control signal relative to the single chosen threshold level, with actuation of the latch when in it's opposite state being produced by means other than in response to the control signal. For instance, the latch may be designed to automatically return to the given state after a fixed time period in it's opposite state. In this way the latch may be arranged to function as a cyclic switch controlling the triggering of the triac in accordance with a duty cycle having a fixed time interval of continuous triac triggering and variable time interval of non-triggering or vice versa, the length of each variable time interval being determined by the time taken for the magnitude of the control signal to reach the chosen threshold level. Another form of the invention may be based upon the use of two thresholds. In this case, the latch has a reset state and a set state and changeover of the latch state from the set state to the reset state (or vice versa) is actuated by the magnitude of the control signal exceeding a first threshold level whereas changeover of the latch state from the reset state to the set state (or vice versa) is actuated by the magnitude of the control signal falling below a second threshold level. With a "two threshold level" form of the invention, the triac trigger control means may be arranged so that here also the latch functions as a cyclic switch controlling the triggering of the triac in accordance with a duty cycle having a fixed time interval of continuous triac triggering and a variable time interval of non-triggering or vice versa. However, with the triac control means so arranged, whilst the length of each variable time interval is determined during one latch state, as before, by the time taken for the magnitude of the control signal to reach one threshold level( for example, the first threshold level) there is a significant difference from the "single threshold level" form of the invention in that, during the other latch state, the control signal produced by the integration means does not represent the integration of the difference between the magnitude of the sensed alternating current and that of a reference alternating current. Instead, by utilization of a source of constant current the control signal produced by the integration means, during this other latch state, changes in magnitude at such a rate as to reach the other threshold level ( for example, the second threshold level) at the end of a fixed time interval. Alternatively with a "Two Threshold Level" form of the invention, the triac trigger control means may be arranged so that the latch functions as a cyclic switch controlling the triggering of the triac in accordance with a duty cycle having a variable time interval of continuous triac triggering and a variable time interval of non-triggering. In one system for achieving this, the integration means comprises a capacitance which is charged and discharged at a rate proportional to the difference in magnitude between the said sensed alternating current and the said reference alternating current, with the voltage corresponding to the charge on the capacitance serving as the control voltage. With this system, the respective durations of both variable time intervals, commencing from the instant of latch changeover, is determined by the time taken for the magnitude of the control signal to reach the threshold level for the next latch actuation. In another system for achieving this the triac trigger control means comprises comparator means for comparing the sensed alternating current with the reference alternating current and producing a first output signal when the sensed alternating current exceeds the reference alternating current and a second output signal when the sensed alternating current is below the reference alternating current, switching means for coupling a first constant current source and a second constant current source to the integration means in response to the first output signal and the second output signal respectively. The invention will now be described in greater detail with reference to the accompanying drawings in which :- Figure 1 is a schematic diagram, partly in block form, of an embodiment of the invention forming part of an electrical heating appliance. Figure 2 is a family of graphs related to the operation of the circuit arrangement of Figure 1. Figure 3 is a diagram showing a variation of the circuit arrangement of Figure 1. Figures 4 and 5 are diagrams of schematic circuit arrangements showing other variations of the circuit arrangement of Figure 1. Figure 6 is a diagram of a schematic circuit arrangement, partly in block form, of another embodiment of the invention. In the circuit arrangement of Figure 1, a triac device TC having main current path terminals TM1 and TM2 and a gate terminal G is connected with it's main current path in series with a load L across the terminals A and B of a conventional alternating mains voltage supply source ( not shown ) delivering a supply voltage of 240 volts at a frequency of 50 hertz to the terminals A and B, the terminal A being the active terminal and the terminal B being the neutral terminal of the mains supply source. The load L constitutes the heating element of the appliance and the remainder of the circuit arrangement of Figure 1 provides a system for controlling the supply of current to the load L so that the heat produced by the load L maintains the temperature of the mass being heated at or near a temperature selected by the user. The triac TC is triggered by gating pulses supplied to it's gating electrode G from an output terminal of an integrated circuit assembly IC generally signified by that portion of the Figure enclosed within dotted lines, the gating pulses being supplied from a trigger pulse generator TPG forming part of the integrated circuit assembly IC. The operating condition of the trigger pulse generator TPG is dictated by the "on" and the "off" state of a latch LCH in such a manner that the trigger pulse generator TPG is operative when the latch LCH is in the "on" state and is inoperative when the latch LCH is in the "off" state. When the trigger pulse generator TPG is operative, a continuous stream of gating pulses in synchronism with the alternating supply voltage is supplied to the electrode G of the triac TC. In a known manner, the application of gating pulses to the electrode G renders the triac TC conductive so that current flows from the alternating mains voltage source via the load L and the triac TC causing heat to be dissipated in the load L. The trigger pulse generator TPG may, for example, be in the form described in the applicant's co-pending Australian Patent Application No. 31615/89 in which a trigger pulse is produced at every so-called "zero crossing point" between alternate half cycles of the alternating voltage of the mains supply. A direct current supply source DC is incorporated within the integrated circuit assembly IC and is energised from the alternating mains voltage supply, for this purpose the source DC is connected via a voltage dropping resistance 5 to the terminal A and also to the terminal B via the terminal VCC. In known manner, direct current is produced by the source DC by means (not shown) of a zener diode and associated circuitry in combination with a capacitance connected between terminals VCC and VEE of the integrated circuit assembly IC so that a fixed potential of 7.5 volts is produced between the terminals VCC and VEE, the terminal VCC being positive relative to the terminal VEE. By means of connections ( not shown ) the voltage present between the terminal VCC and VEE is supplied inter alia to energise the trigger pulse generator TPG and the latch LCH. In addition to the trigger pulse generator TPG and the latch LCH, the triac trigger control means includes a pair of voltage comparators CP1 and CP2, a current difference detection means generally denoted as CDD, an integration means in the form of a capacitance 6 connected between the terminal CAP and the terminal VEE and a current sensing circuit denoted generally as CSC. The current sensing circuit CSC includes a pair of current dividing networks. One current dividing network comprises the series combination of a fixed resistance 1 and a temperature sensing resistance RT being a negative temperature co-efficient resistance whereas the other current dividing network comprises the series combination of a fixed resistance 2 and an adjustable resistance RS. Both current dividing networks are connected across the terminals A and B of the alternating mains voltage source and in this way the temperature sensing resistance RT and the adjustable resistance RS are respectively energised thereby so that the current which flows via the Resistance RT may be termed a "Sensed Alternating Current" and the current which flows via the resistance RS may be teamed a "Reference Alternating Current". The resistance values of the Resistances 1 and 2 are so chosen relative to the respective resistance values of the resistances RT and RS that the voltages developed respectively across the resistance RT and RS are variable over a satisfactory voltage range in proportion to variation of the magnitude of the sensed alternating current and that of the reference alternating current, variation of the magnitude of the sensed alternating current being produced by temperature changes sensed by the resistance RT and variation of the reference alternating current being produced by manual adjustment of the resistance RS by a user operation to select a desired temperature. In practice, it may be intended for the temperature sensing resistance RT to be located in close proximity to the mass being heated by the load L and, as a consequence the conductors for providing electrical connection between the resistance RT and the remainder of the network are susceptible to the pick-up of interference. In practice, it is sometimes required for the adjustable resistance RS also to be remotely located from the remainder of the network of which it forms part so as to facilitate manual adjustment of the temperature desired by the user and, as a consequence in such circumstances, conductors for providing electrical connection to the remotely located resistance RS are also susceptible to the pick-up of interference. The junction of the resistance 1 with the temperature sensing resistance RT is connected via the current setting resistance 3 to the terminal SA of the integrated circuit assembly IC for supplying thereto a sensed alternating current whereas the junction of the resistance 2 with the adjustable resistance RS is connected via the current setting resistance 4 to the terminal SB of the integrated circuit assembly IC for supplying thereto a reference alternating current. The current difference detector means CDD is composed of the series combination of the emitter collector paths of three transistors T1,T2 and T3 between the terminal SA and the terminal VEE and the series combination of the emitter collector paths of three transistors T4,T5 and T6 between the terminal SB and the terminal VEE. The terminal SA is connected via the diodes D1 and D2 to the terminal VCC whereas the terminal SB is connected via the diodes D3 and D4 to the terminal VCC. The base electrodes of the transistors T1, T4 and T7 and the collector electrode of the transistor T7 are all connected to a common point which is connected via a constant current source to the terminal VEE with the emitter electrode of the transistor T7 being connected to the terminal VCC so that the base voltages of transistor T1 and transistor T4 are held one VBE below the voltage on terminal VCC; so that when the transistors are operating, the normal operating VBE of transistor T1 and transistor T4 ensures that the voltage on the emitters of these transistors is close to the voltage of terminal VCC. The transistors T2,T5,T3 and T6 are interconnected so as to function as a current mirror circuit in which the magnitude of the flow of the current via the series combination of the collector emitter paths of the transistors T2 and T3 tends to follow and be equivalent with the magnitude of the flow of current via the series combination of the collector emitter paths of the transistors T5 and T6. The collector electrode of the transistor T1 is connected via the terminal CAP and the capacitance 6 to the terminal VEE. It will be appreciated that the temperature sensing resistance RT is shunted by the resistance 3 in series with the parallel combination of the emitter of the transistor T1 and the diodes D1 and D2 whereas the adjustable resistance RS is shunted by the resistance 4 in series with the parallel combination of the emitter of the transistor T4 and the diodes D3 and D4. However, the resistance value of the resistance 3 is large relative to that of the temperature sensitive resistance RT and the resistance value of the resistance 4 is large relative to that of the adjustable resistance RS. In addition, the emitter-collector paths of the transistors T1, T2 and T3 are connected in series with the output circuit of the direct current source DC across the diodes D1 and D2 whereas the emitter-collector paths of the transistors T4, T5 and T6 are connected in series with the output circuit of the direct current source DC across the diodes D3 and D4. The difference between the current applied to terminal SA and to terminal SB dictate the operation of the circuit of Figure 1 and in this respect, owing to the action of the diodes D1 and D3, the respective voltages produced at the terminals SA and SB are clamped at a voltage equal to one VBE below the voltage of the terminal VCC during each negative half cycle of the alternating supply voltage across the terminals A and B. During these negative half cycles, the transistors T1 and T4 are both biased-off and non-conductive. During positive half-cycles of the alternating supply voltage both of the transistors T1 and T4 are conductive, the respective voltages present at the terminals SA and SB being both within a few millivolts of the voltage of the terminal VCC. During such positive half-cycles, the relative magnitudes of the respective emitter-collector currents of the transistors T1 and T4 are determined by the relative magnitudes of the current supplied to the terminal SA from the junction of resistance 1 and the temperature sensitive resistance RT and the current supplied to the terminal SB from the junction of the resistance 2 with the adjustable resistance RS. The diodes D2 and D4 do not conduct during positive half cycles of the supply voltage unless abnormal conditions exist. In operation, if the magnitude of the sensed alternating current fed via the terminal SA is larger than the reference alternating current fed via the terminal SB then the emitter collector current of the transistor T1 will be greater than the emitter collector current of the transistor T4 causing the capacitance 6 to be charged by the current difference in a direction for the terminal CAP to go positive relative to the terminal VEE. On the other hand, if the magnitude of the reference alternating current fed via the terminal SB is larger than the sensed alternating current fed via the terminal SA then the emitter collector current of the transistor T4 will be greater than that of the transistor T1. In these circumstances, owing to the current mirror action of the transistors T2,T3,T5 and T6, the magnitude of current drawn by the collector emitter path of transistor T2 will be greater than collector emitter current of the transistor T1 causing the capacitance 6 to be discharged towards the potential VEE. With alternating current flow of equal magnitude via the respective terminals SA and SB the charge on the capacitance 6 will remain constant. Assuming that the resistive value of the resistance 1 is equal to that of the resistance 2, the relative magnitudes of the alternating current flow via the terminals SA and SB is dictated by the relative resistive values of the temperature sensing resistance RT and the adjustable resistance RS. By means of the two voltage comparators CP1 and CP2, the voltage across the capacitance 6 ( i.e. the voltage present at the terminal CAP relative to the voltage of the terminal VEE ) is employed as a control signal for controlling the on/off state of the latch LCH and hence for controlling operation or otherwise of the trigger pulse generator TPG. To this end, the terminal CAP is connected to the positive input of the comparator CP1 and to the negative input of the comparator CP2. The negative input of the comparator CP1 is connected to a potential which is 0.6 volts negative relative to the terminal VCC whereas the positive input of the comparator CP2 is connected to a potential which is 1.2 volts positive relative to the terminal VEE. In this way the potentials applied respectively to the negative terminal of the comparator CP1 and to the positive terminal of the comparator CP2 serve as threshold levels whereby the output of the comparator CP1 is activated if the potential of the terminal CAP exceeds the potential of its negative input causing the latch LCH to be switched to its "on" state. Alternatively the output of the comparator CP2 is activated if the potential of the terminal CAP falls below the potential of its positive input causing the latch LCH to be switched to its "off" state. It will be realised that the circuit arrangement of Figure 1 is a "two-threshold level" form of the invention. The cyclic operation of the circuit arrangement of Figure 1 may be understood from the drawings of Figure 2 which shows graphs depicting conditions at different parts of the circuit arrangement of Figure 1 over a period of time, a common time relationship existing between all the graphs of Figure 2. In this respect, in Figure 2 (a) the temperature of the sensing resistance RT is denoted by the solid line 21. In Figure 2 (b) the average magnitude of the sensed alternating current relative to zero, fed to the terminal SA via the resistance 3 is denoted by the solid line 22 and the average magnitude of the reference alternating current relative to zero fed to the terminal SB via the resistance 4 is denoted by the solid line 23. In Figure 2 (c) the solid line 24 denotes the magnitude of the difference between the currents represented respectively as 22 and 23. It follows that the portion of the line 24 above the zero - reference line 0 represents the current flowing into the capacitance 6 and the portion of the line 24 below the zero - reference line 0 represents the current flowing out of the capacitance 6. In Figure 2(d), the solid line 25 represents the voltage present across the capacitance 6, the dotted line 26 representing the upper threshold level at a voltage equivalent to the voltage at the terminal VCC less 0.6 volts. and the dotted line 27 representing the lower threshold level at a voltage equivalent to the voltage of the terminal VEE plus 1.2 volts. In Figure 2 (e) the line 28 represents the "on" and the "off" state of the latch LCH and in Figure 2 (f), the line 29 represents the state of operation of the trigger-pulse generator TPG and hence indicates also whether or not the triac TC is being triggered. If now the circuit arrangement of Figure 1 is considered together with the family of graphs of Figure 2 and it is assumed the circuit arrangement of Figure 1 is switched on at the instant t1 with the adjustable resistance RS set to a desired temperature, which is a higher temperature at the instant t1 than that of the mass intended to be heated by the load L. Under such conditions, the resistance of the sensing resistance RT will be higher than the resistance of the adjustable resistance RS and consequently the voltage developed across the sensing resistance RT will be high relative to the voltage developed across the resistance RS so that the magnitude of the sensed alternating current supplied via the terminal SA will be greater than the magnitude of the reference alternating current supplied via the terminal SB as indicated in Figure 2 (b) by the currents denoted as 22 and 23. At the instant t1, the voltage across the capacitance 6 is assumed to be zero with the latch LCH in its "off" state so that the trigger pulse generator TPG is non-operative and the triac TC is non-conductive and no current is flowing via the load L. Since current supplied via the terminal SA is greater in magnitude than the current supplied via the terminal SB then, owing to the action of the current difference detector CDD, the capacitance 6 is charged via the emitter-collector path of the transistor T1 so that the voltage at the terminal CAP rises relative to the voltage at the terminal VEE as shown by the line 25 of Figure 2 (d). The voltage at the terminal CAP continues to rise towards the voltage at the terminal VCC until at the instant t2 the voltage at the terminal CAP reaches the upper threshold level denoted by the dotted line 26 whereupon the output of the comparator CP1 is activated and the latch LCH is switched to its "on" state causing the trigger generator TPG to operate and generate a continuous supply of trigger-pulses which are fed to the gate electrode G of the triac device TC so that the triac TC conducts and alternating current flows from the mains alternating current source via the load L and via the triac TC. The flow of alternating current via the load L heats the mass associated with the load L and the temperature of the sensing resistance RT commences to rise as indicated by the line 21 in Figure 2 (a) between the instant t2 and the t3. As the temperature of the mass sensed by the sensing resistance RT rises, in due course the resistance of the sensing resistance RT falls and the difference between the magnitude of the sensed alternating current fed to the terminal SA and that of the reference alternating current fed to the terminal SB diminishes as indicated by the line 22 in Figure 2 (c) and by convergence of the lines 22 and 23 in Figure 2 (b). As the temperature sensed by the resistance RT continues to rise, the difference between the magnitude of the sensed alternating current and that of the reference alternating current grows less and less until at the instant t3 the difference between the two is zero, the instant t3 being the instant at which the resistance of the sensing resistance RT is equal to the resistance of the adjustable resistance RS. At this instant, the magnitude of the sensed alternating current fed to the terminal SA is equal to that of the reference alternating current fed to the terminal SB and the emitter-collector current of the transistor T4 is equal in magnitude to that of the transistor T1. Owing to the previously described current mirror action, the collector-emitter current of the transistor T2 corresponds with the emitter-collector current of the transistor T4 so that, at the instant t3, current flow charging the capacitance 6 via the transistor T1 is in balance with the current flow discharging the capacitance 6 via the transistor T2. Following the instant t3, the magnitude of the sensed alternating current fed via the terminal SA is less than that of the reference alternating current fed via the terminal SB, accordingly current flow via the emitter-collector path of the transistor T4 and also current flow via the collector-emitter path of the transistor T2 is greater than the current flow via the emitter-collector path of the transistor T1 so that the capacitance 6 commences to be discharged via the transistor T2. Between the instant t3 and t4, since the sensed alternating current is less than the reference alternating current, the capacitance 6 discharges and as the voltage at the terminal CAP reaches the lower threshold, as denoted by the intersection of the line 25 with the dotted line 27 at the instant t4, the output of the comparator CP2 is activated causing switch over of the latch LCH to its "off" state, switching off the generator TPG and hence the supply of trigger pulses to the triac TC which ceases to conduct, cutting off the supply of alternating current to the load L. Between the instants t3 and t4, the generator TPG is operational and current is being supplied to the load L via the triac TC so that the mass sensed by the resistance RT continues to be heated and the resistance of the sensing resistance RT continues to fall so that the difference between the magnitude of the sensed alternating current and that of the reference alternating current increases in the opposite direction, i.e. with the reference alternating current greater than the sensed alternating current. However, following the instant t4, owing to the cut-off of the supply of current to the load L, the temperature of the sensing resistance RT reaches a maximum as indicated by the line 21 in Figure 2 (a), at the same time the sensed alternating current reaches a maximum as shown by the line 22 in Figure 2 (b) and the difference current (i.e. the current at the terminal CAP) as denoted by the line 24 in Figure 2 (c) reaches a maximum in the reverse direction. After reaching a maximum, the temperature of the resistance RT starts to fall, the magnitude of the difference current as denoted by the line 24 starts to diminish falling to zero at the instant t5 when the current fed via the emitter-collector path of the transistor T1 is once again equal in magnitude to the collector-emitter current of the transistor T2. Subsequent to the instant t5, as the temperature continues to fall and with the magnitude of the sensed alternating current becoming greater than the reference current, the capacitance 6 commences to be charged again and the voltage at the terminal CAP starts to rise once more towards the upper threshold level denoted by the dotted line 26 in Figure 2 (d). When the upper threshold level is reached, the output of the comparator CP1 is activated and the generator TPG again supplies triggering pulses to the triac TC so that current is again supplied to the load L whereupon the sequence of operations is repeated cyclically as depicted by the family of graphs of Figure 2. It can be seen from the graphs of Figure 2 that subsequent to the instant t3, the temperature sensed by the resistance RT remains within a particular temperature range about a mean temperature level denoted by the dotted line TM. Adjustment of the resistance RS permits the magnitude of the reference alternating current to be adjusted with corresponding adjustment of the resultant mean temperature level. For a given mass being heated by the load L, subsequent to the instant t3 the duty cycle performed by the latch LCH automatically stabilises at a ratio determined by the setting of the adjustable resistance RS and the ambient temperature thereby governing the mean temperature of the mass and the resultant sensed temperature which cyclically fluctuates at the same frequency as that of the switching frequency of the latch LCH over a certain temperature range approximately centred on the temperature TM which is, of course, also dependent upon the setting of the resistance RS. The circuit arrangement of Figure 1 permits a temperature sensitive resistance to be utilized as the resistance RT having a resistance which varies by several orders of magnitude over the temperature range to be sensed. The integration means constituted by the capacitance 6 and associated circuitry inter alia performs a filtering function preventing inadvertent switching of the latch LCH by transient voltages resulting from the pick-up of interference by connection leads to the sensing resistance RT and to the adjustable resistance RS. The graphs of Figure 2 indicate thermal mass delay effects. That is to say, the shape of the line 21 in Figure 2 (a), consequently the shape of the line 22 of Figure 2 (b) and the shape of the line 24 of Figure 2 (c) show that the load L of Figure 1 is employed, in this instance, to heat a mass having characteristics such that a significant period of time elapses for the temperature sensed by the resistance RT to be effected by "switch on" or "switch off" of the generator TPG and hence conductivity or otherwise of the triac TC. If the circuit arrangement of Figure 1 were to be employed so that the load L heated a mass having no thermal mass delay then at the instant t4, the temperature shown by the line 21 in Figure 2 (a) would immediately and rapidly fall owing to "switch off" of the generator TPG and also at the instant t6, the temperature shown by the line 21 would immediately start to rise owing to "switch on" of the generator TPG. In addition, in such circumstances, the time period between the instants t4 and t5 would be significantly reduced since the rapid temperature drop would cause the sensed current to rapidly increase in magnitude. However, in the circumstances illustrated by the graphs of Figure 2, not only does the sensed temperature denoted by the line 21 continue to rise following the instant t3 (when the sensed alternating current is equal to the reference alternating current) during the "reaction time" up until the instant t4 whilst the capacitance 6 is discharging to the lower threshold level as indicated by the line 25 but, as previously mentioned, the sensed temperature denoted by the line 21 continues to rise following the instant t4 owing to thermal mass delay. Corresponding effects in the reverse direction are evident between the instant t5 and the instant t6 and between the instants t6 and t7. In total, there is significant "overshoot" and "undershoot" by the line 21 of the mean temperature denoted by the dotted line TM in Figure 2 (a). In other words, subsequent to the instant t3, there is a variation of the temperature of the mass and also of the sensed temperature denoted by the line 21 over a considerable range about the mean temperature TM. The shape of the line 21 is typical of a situation in which the circuit arrangement of Figure 1 is employed for heating a water bed where a large mass is being heated by the load L, which mass is also subject to the effects of convection and there may be a significant temperature gradient between the load L and the sensing resistance RT. It will be realised that the "overshoot" and "undershoot" previously referred to results from a combination of the "reaction time" of the circuit arrangement of Figure 1 and of the thermal mass delay of the mass being heated by the load L. Thermal mass delay is determined, inter alia, by the rate of heat radiation by the mass being heated (which depends, of course, upon the size and the nature of the mass.) as well as the size and nature of the heating element together with the rate at which heat is able to flow between the heating element and the mass being heated. Reduction of the "overshoot" and "undershoot" may be desirable in some instances. Many variations of the circuit arrangement of Figure 1 are possible within the scope of the present invention. One such variation is depicted by the circuit arrangement of Figure 3 which shows systematically a portion of the circuit arrangement of Figure 1 which has been modified to provide a two-position switching unit SU between the terminal CAP and the junction of the collector electrodes of the transistors T1 and T2. The switching units SU has two positions. In position A, the terminal CAP is connected to the junction of the collector electrodes of the transistors T1 and T2 and the resultant circuit arrangement corresponds with the circuit arrangement of Figure 1. When the switching unit SU is in position B, the terminal CAP is connected to the terminal VEE via a constant current source SCE. The switching unit SU is controlled by the output of the latch LCH in such a manner that with the latch LCH in the "off" state the switch SU is in position A whereas with the latch LCH in the "on" state, the switch SU is in position B. The current supplied by the source SCE flows in the direction which will discharge the capacitance 6 when the latter is positively charged relative to the voltage of the terminal VEE. The variation provided by the circuit arrangement of Figure 3 causes the resultant modified circuit arrangement of Figure 1 to operate in a basically similar manner to the operation of Figure 1 described with reference to the graphs of Figure 2 except that each occurrence when the charge on the capacitance 6 reaches the upper threshold level thereby causing the latch LCH to be switched to its "on" state so that the triac TC is triggered and current flows via the load L heating the mass then the switch SU is changed to position B and causes the capacitance 6 to be discharged towards the low threshold level at a steady rate. With each such occurrence, since discharge of the capacitance 6 from the voltage of the upper to that of the lower threshold level is at a steady rate, each period of time taken to complete the discharge to the voltage of the lower threshold level is a fixed duration. Of course, when the charge on the capacitance 6 reaches the lower threshold level, the latch LCH is switched to its "off" state so that the triac TC commences to be triggered, cutting-off the supply of the current to the load L whilst the switch SU is returned once more to the position A permitting the capacitance 6 to be charged once more towards the upper threshold level whenever the magnitude of the sensed alternating current supplied via the terminal SA is greater than that of the reference alternating current supplied via the terminal SB. The variation provided by the circuit arrangement of Figure 3, in operation results in the latch LCH having "on" periods of fixed duration and "off" periods of variable duration. The duration of the "off" periods of the latch LCH is determined by the difference between the magnitude of the sensed alternating current supplied via the terminal SB and that of the reference alternating current supplied via the terminal SA. If the setting of the adjustable resistance RS corresponds with a temperature which is greater than the temperature sensed by the resistance RT, then the magnitude of the sensed current will be greater than that of the reference alternating current. The larger the magnitude of the sensed alternating current relative to that of the reference alternating current then the shorter is the duration of the "off" period of the latch LCH. The constant current source SCE should be proportioned so as to produce a current of magnitude which will result in the latch LCH having fixed "on" periods of a duration which is long relative to the duration of an "off" period of the latch LCH under conditions when the magnitude of the sensed alternating current is much larger than that of the reference alternating current so that, under such conditions, the resultant duty-cycle of the latch LCH is composed of a fixed "on" period and a relatively short "off" period whereby the flow of mains alternating current through the load L is interrupted only for relatively short intervals. When the mass being heated by the load L has reached a temperature such that the temperature sensed by the resistance RT is at or near the temperature setting of the resistance RS then the difference in magnitude between the sensed alternating current supplied via the terminal SA and that of the reference alternating current supplied via the terminal SB will be relatively small so that the duration of time for the capacitance 6 to be charged from the voltage of the lower threshold to that of the upper threshold will be relatively long and these conditions will result in the duration of the "off" periods of the latch LCH being comparable to the fixed duration of the "on" periods. Accordingly, the duty cycle performed by the latch LCH becomes stabilised so that the mean level of the mass being heated by the load L and consequently the sensed temperature corresponds with the temperature setting of the adjustable resistance RS. Another variation of the circuit arrangement of Figure 1 is depicted by the schematic circuit arrangement in Figure 4 of the accompanying drawings in which like parts to those of Figure 1 are denoted by like numerals or letters. A consideration of the graphs provided by Figure 2 (a) and Figure 2 (c) shows that the presence of thermal mass delay causes "overshoot" and "undershoot" and thus imposes a hysteresis effect upon the operation of the circuit arrangement of Figure 1. In the circuit arrangement of Figure 4, the fixed resistances 41 and 43 are connected in series across the terminals A and B with the sensing resistance RT connected between the junction of the resistances 41 and 43 and the terminal VCC. Likewise, the fixed resistances 42 and 44 are connected in series across the terminals A and B with the adjustable temperature-setting resistance RS connected from the junction of the resistances 42 and 44 to the terminal VCC. The resistances 42, 43 and 44 each have a resistance value of 470 kilohms whereas the resistance 41 has a resistance value of 420 kilohms. The terminal VCC is connected to the junction of the triac TC and the load L. In operation, when the triac TC is conducting the whole of the mains alternating voltage is developed across the load L but, when the triac TC is cut-off, the whole of the mains alternating voltage is developed across the triac TC. Since the resistances RT and RS are connected to the junction of the triac TC and the load L, the current drive for both the sensing resistance RT and for the adjustable resistance RS are taken from across the triac TC when the latch LCH is in the "off" state and from across the load L when the latch LCH is in the "on" state. Accordingly, the circuit arrangement of Figure 4 provides a feedback system since, owing to the imbalance of the bridge network formed by the resistances 41, 42, 43 and 44 as a consequence of the lower resistance value of the resistance 41, each time the latch LCH is switched from one state to the other and the current drive for the resistance RT and RS is changed then the sensed alternating current supplied via the terminal SA is driven further out of balance then would be the case if the resistance 41 was equal in value to the resistances 42, 43 and 44. The feedback system provided in the circuit arrangement of Figure 4 is such that the out of balance current drive to the resistance RT increases the magnitude of the current difference between the sensed alternating current supplied via the terminal SA and the reference alternating current supplied via the terminal SB causing more rapid charge or discharge of the capacitance 6 from one threshold level to the other than would otherwise be the case resulting in a reduction of the cycling period of the latch LCH and a reduction of "overshoot" and "undershoot" of the selected mean temperature determined by the setting of the resistance RS. It will be understood that, in the feed back system of the circuit arrangement of Figure 4, the percentage of feed back will depend upon the relative values of resistances 41 and 43. Moreover, feed back in the opposite direction is produced when the resistance value of the resistance 41 is greater than that of the resistance 43. Feed back is also able to be produced if the resistance values of the resistances 41 and 43 are equal and those of the resistances 42 and 44 are unequal. In the circuit arrangement of Figure 4, it is to be noted that the common connection of the resistance RT with the junction of the load L and the triac TC follows the teachings of the applicants co-pending Australian Patent Application No. PK2501. The circuit arrangement of Figure 5, in which similar parts to those of Figure 1 are denoted by like numerals or letters, is another example of the application of feed back to achieve the same result as that achieved by the circuit arrangement of Figure 4. The circuit arrangement of Figure 5 is intended to illustrate a circuit arrangement which is identical to that of Figure 1 except that feed back current is applied from the junction of the triac TC and the load L via a feed back resistance 51 to the junction of the resistance 1 and the sensing resistance RT. It will be understood that either as the case may be a positive or negative feed back may be obtained in the circuit arrangement of Figure 5. In a variation of the circuit arrangement of Figure 5, the feed back resistance 51 may be connected to the junction of the resistance RS and resistance 2. It will be understood that all else being equal, this variation will have a feed back of opposite sense to that of the circuit arrangement of Figure 5. It will be realized that a circuit arrangement on the basis of a single threshold form of the invention is readily conceivable which operates in a somewhat similar manner to the circuit arrangement permitted by the variation associated with the circuit arrangement of Figure 3. Such a single threshold form may, for instance, be provided by further modification to the circuit arrangements of the Figure 1 and of Figure 3 of such a kind that the comparator CP2 is eliminated and the latch LCH is replaced by a latch of known kind provided with a timing system not related to the capacitance 6 so that the latch nevertheless has an "on" period of fixed duration. In addition, the constant current source SCE is replaced by a diode so that each time the latch LCH is activated into the "on" state causing the switching unit SU to return to its position B, the capacitance 6 is rapidly discharged. Another simple variation of the circuit arrangement of Figure 1, which is equally applicable when the variation associated with the circuit arrangement of Figure 3 is also incorporated, is for the resistances RT and RS to be replaced by fixed resistances and for the resistances RT and RS to be respectively connected in series with the resistances R3 and R4. As previously indicated, an important feature of the present invention is the energization of the temperature sensing resistance by alternating current derived from the alternating supply source. The present specification describes how the resultant alternating current signal is utilized to provide a satisfactory input for a direct current input comparator system. This is achieved, in the case of the circuit arrangement of Figure 1 by way of an integration means in the form of the capacitance 6 and the circuitry associated there with which provides an interface between the current difference detector CDD and the comparators CP1 and CP2. It is useful to recognise that the transistors T1 and T4 conduct only when the polarity of the input signal at the terminals SA and SB is positive relative to the voltage of the terminal VEE. When the polarity of the input signal at the terminals SA and SB is negative, the transistors T1 and T4 will not conduct so that no current flows into or out of the capacitance 6 and during this time the charge on the capacitance 6 remains unchanged. Accordingly, a different current (i.e. a current which is the difference between the sensed alternating current flowing via the terminal SB and the reference alternating current flowing via the terminal SA) flows to or from the capacitance 6 via the terminal CAP for only part of the time (i.e. approximately only during positive half-cycles of the alternating supply voltage). The arrangement thus serves to extend the integration times of the capacitance 6 and the resultant integrating times are greater than would be obtained with a direct current energised circuit employing equivalent components values. A further embodiment of the invention will now be described with reference to Figure 6 of the accompanying drawings which illustrates systematically a significant modification of the integrated circuits unit IC, like parts to those of Figure 1 being denoted by like letters or numerals. In the circuit arrangement of Figure 6, the capacitance 6 is not charged by current supplied via the transistor T1 or discharged by the flow of current via the transistor T2. Instead, the terminal CAP is connected to a two-position switching unit 63 which is also connected via a constant current source 61 to the terminal VCC and via a constant current source 62 to the terminal VEE whereby the capacitance 6 is charged via the constant current source 61 when the switching unit 63 is in the position denoted by the letter X and is discharged via the constant current source 62 when the switching unit 63 is in the position denoted by the letter Y. The switching position of the unit 63 is controlled by the output of a current comparator 64 having one input 65 connected to the junction of the collector electrodes of the transistors T1 and T2. The other input 66 of the comparator 64 is connected to a suitable direct current reference source (not shown). The comparator 64 is of a known kind and its input 65 presents a low-impedance to the junction of the collector electrodes of the transistors T1 and T2 such that current flows via the input 65 into or out of the comparator 64 depending upon whether or not the current difference between the sensed alternating current supplied via the terminal SA and the reference alternating current supplied via the terminal SB is positive or negative. When the current difference is positive, the output of the comparator 64 switches the unit 63 to the position X which charges the capacitance 6 towards the upper threshold level and when the current difference is negative, the output of the comparator 64 switches the unit 63 to the position Y which discharges the capacitance 6 towards the lower threshold. A number of different design possibilities are available with the circuit arrangement of Figure 6. For example, the constant current sources 61 and 62 may be proportioned to supply current of equal magnitude and, in these circumstances, if the switch unit 63 is driven so that there is an equal amount of time in position X as in position Y over a given period of time as a result of the difference between the sensed alternating current and the reference alternating current changing from a positive difference to a negative difference then there will be equal amounts of time during which the capacitance 6 is charged and discharged so that there will be no net charge or discharge of the capacitance 6. On the other hand, if the switch unit 63 is driven so that the amount of time in the respective positions X and Y is unequal over a given period of time than the charge on the capacitance 6 will move towards one or the other of the two thresholds causing switch over of the latch LCH when the threshold in question is reached. The response time of the arrangement (e.g. the time taken for the voltage corresponding to the charge on the capacitance 6 to move from one threshold to the other) assuming a one hundred percent unbalance between the amount of time occupied by the switch unit 63 in the respective positions X and Y depends upon the size of the capacitance 6 and the upon the magnitude of the current supplied by the constant current sources 61 and 62. If required, the constant current sources 61 and 62 may be proportioned relative to each other so that the response time in one direction is less than that in the other. For the purposes of this description, the direct current source to which the input 66 is connected is such that the comparator 64 reacts, as described, to the current via the input 65 being positive or negative. Other possibilities are available whereby the source to which the input 66 is connected serves as a threshold requiring the magnitude of the current flowing via the input 65 to be of a given magnitude (in either a positive or negative direction) for the output of the comparator 64 to be activated to cause changeover of the switching unit 63. Still further possibilities are available in the nature of the switching unit 63. Such other possibilities and further possibilities should be considered depending upon the control characteristics that are desired. If desired, a completely different input threshold system for the comparator 64 may be used in lieu of that shown in Figure 6 by replacing the current difference detector CDD and the comparator 64 by a threshold circuit which compares the instantaneous magnitude of the alternating signal voltage developed across the sensing resistance RT with equal and opposite threshold voltage limits set by a reference voltage and controls the switch position of the unit 63 in such a manner that position X is occupied by the unit 63 whenever the signal voltage exceeds the limits and position Y is occupied by the unit 63 whenever the signal voltage is within the limits. In the foregoing description of the invention, reference is made to the average peak-to-peak magnitude of the sensed alternating current and to the average peak-to-peak magnitude of a reference alternating current. In Figure 2 (b), it is intended that the line 23 depicts a value corresponding with the average peak-to-peak magnitude of the reference alternating current flowing in the adjustable resistance RS at a given adjustment thereof, which value remains constant. On the other hand, in Figure 2 (b) it is intended that the line 22 depicts a value corresponding with the average peak-to-peak magnitude of the sensed alternating current flowing in the temperature sensitive resistance RT, which value changes with change in the temperature to which the resistance RT is exposed. As indicated previously, the line 24 in Figure 2 (c) depicts a value corresponding with the difference between the values represented respectively by the lines 22 and 23 of Figure 2 (b). However, although the line 25 in Figure 2 (d) depicts the voltage representing the charge on the capacitance 6, the line 25 does not represent, throughout its length, the integral of the value denoted by the line 24. Nevertheless, the portions of the line 25 between the instants tl and t2, between the instants t3 and t4, between the instants t5 and t6, between the instants t7 and t8 and between the instants t9 and t10 are intended to represent the integral of the value denoted by the line 24 within the corresponding portions thereof. The portions referred to in the preceding sentence correspond with intervals when the voltage on the capacitance 6 is effective as a control voltage. It will be appreciated that the invention is not limited to the embodiments described herein, but many further variations are possible for those skilled in the art without departing from the scope of invention. For example although the invention is described herein with the said sensing element in the form of a temperature sensing element, the invention is also applicable to other kinds of sensing elements, i.e. humidity dependent capacitance. Furthermore although the invention has been described with reference to the sensed alternating current decreasing with increasing temperature, the invention is also applicable in general to any applications in which the sensed alternating current increases with an increase or decrease as the case may be in a control parameter. As will be appreciated by the man skilled in the art modifications may be needed to the circuit arrangements to take into account such differences in different applications without necessarily departing from the scope of the invention.

Claims: A circuit arrangement comprising a load (L) supplied via a triac (TC) with current from an alternating voltage source (A, B) under control of a triac trigger control means (IC) in combination with a sensing element (RT), characterised in that the sensing element (RT) is energised by alternating current derived from the alternating voltage source (A, B) to produce a sensed alternating current and in that the triac trigger control means (IC) includes an integration means (6) for producing a control signal, triggering or otherwise of the triac (TC) being determined by the state of a latch (LCH) actuated in response to the magnitude of the control signal relative to one or more threshold levels (CP1, CP2), during at least one state of the latch (LCH) the control signal produced by the integration means (6) representing the integral of the difference between a value corresponding with the average peak to peak magnitude of the sensed alternating current and a reference value. A circuit arrangement as claimed in Claim 1 wherein the said control signal is produced by integration of the difference between the average peak to peak magnitude of the sensed alternating current and that of a reference alternating current. A circuit arrangement as claimed in either Claim 1 or Claim 2 wherein the said latch (LCH) is so arranged that actuation of the said latch in response to the magnitude of the said control signal is able to be carried out only when the latch is in a given state, such actuation being in response to the magnitude of the control signal relative to a single chosen threshold level, with actuation of the latch when in it's opposite state being produced by means other than in response to the said control signal. A circuit arrangement as claimed in Claim 3 wherein the said latch (LCH) is arranged to automatically return to the said given state at the end of a fixed time period in the said opposite state. A circuit arrangement as claimed in either Claim 3 or Claim 4 wherein the said latch (LCH) is connected to function as a cyclic switch controlling the triggering of the said triac (TC) in accordance with a duty cycle having a fixed time interval of continuous triac triggering and variable time interval of non-triggering or vice versa, the length of each variable time interval being determined by the time taken for the magnitude of the said control signal to reach the chosen threshold level. A circuit arrangement as claimed in either Claim 1 or Claim 2 wherein the said latch (LCH) has a reset state and a set state and changeover of the latch state from the set state to the reset state (or vice versa) is actuated by the magnitude of the said control signal exceeding a first threshold level whereas changeover of the latch state from the reset state to the set state (or vice versa) is actuated by the magnitude of the said control signal falling below a second threshold level. A circuit arrangement as claimed in Claim 6 wherein the said triac trigger control means (Id) is arranged so that the said latch (LCH) functions as a cyclic switch controlling the triggering of the said triac (Td) in accordance with a duty cycle having a fixed time interval of continuous triac triggering and a variable time interval of non-triggering or vice versa. A circuit arrangement as claimed in Claim 7 wherein the said triac control means (Id) includes a source of constant current (SCE) and is so arranged that the length of each variable time interval is determined, during one latch state by the time taken for the magnitude of the said control signal to reach one threshold level (for example the said first threshold level) and during the other latch state, the control signal produced by the integration means is determined by the said source of constant current and changes in magnitude at such a rate as to reach the other threshold level (for example the second threshold level) at the end of a fixed time interval. A circuit arrangement as claimed in Claim 6 wherein the said triac trigger control means (Id) is arranged so that the said latch functions as a cyclic switch controlling the triggering of the said triac in accordance with a duty cycle having a variable time interval of continuous triac triggering and a variable time interval of non-triggering. A circuit arrangement as claimed in Claim 9 wherein the said integration means comprises a capacitance (6) which is charged and discharged at a rate proportional to the difference in magnitude between the said sensed alternating current and the said reference alternating current, with the voltage corresponding to the charge on the said capacitance serving as the said control voltage whereby the respective durations of both variable time intervals, commencing from the instant of latch changeover, is determined by the time taken for the magnitude of the said control signal to reach the threshold level for the next latch actuation. A circuit arrangement as claimed in Claim 9 wherein the said triac trigger control means (Id) comprises comparator means (64) for comparing the said sensed alternating current with the said reference alternating current thereby producing a first output signal when the sensed alternating current exceeds the reference alternating current and a second output signal when the sensed alternating current is below the reference alternating current, and switching means (63) for coupling a first constant current source (61) and a second constant current source (62) to the said integration means (6) in response to the first output signal and the second output signal respectively. A circuit arrangement as claimed in any one of the preceding claims 2 to 10 in which the said sensed alternating current is derived from the junction of the said sensing element (RT) with a first fixed resistance (1) in series therewith thereby forming a first voltage divider network and the said reference alternating current is derived from the junction of an adjustable resistance (RS) with a second fixed resistance (2) in series therewith thereby forming a second voltage divider network, the first and second voltage divider networks being completed in parallel with each other. A circuit arrangement as claimed in Claim 12 in which the said first and the said second voltage divider networks are connected across the said alternating voltage supply source (A, B) A circuit arrangement as claimed in Claim 13 in which feedback is supplied to the said current sensing network via a feedback path extending from the junction of the said triac (TC) with the said load (L) either to the junction of the said sensing element (RT) with the said first resistance (1) or to the junction of the said adjustable resistance (RS) with the said second fixed resistance (2) in series. A circuit arrangement as claimed in Claim 12 in which the said first and the said second voltage divider networks are connected between one terminal (8) the said alternating voltage supply source and the junction of the said triac (TC) with the said load (L) the junction of the said sensing element (RT) with the said first fixed resistance (43) being connected via a third fixed resistance (41) the remaining terminal (A) of the said alternating voltage supply source and the junction of the said adjustable resistance (RS) with the said second fixed resistance (44) being connected via a fourth fixed resistance (42) also to the remaining terminals (A) of the said alternating voltage source, the relative values of the said first (43) and second (44) fixed resistance being such that with each change of state of the said latch (LCH) the current drive for the said sensing element (RT) and the said adjustable resistance (RS) is further out of balance than if the said first (43) and second (44) fixed resistance were of equal value.

Inventors: CRAWFORD JOHN SIDNEY, KAY MALCOLM JOHN, TRACY PHILIPS ANTHONY, CRAWFORD, JOHN SIDNEY, KAY, MALCOLM JOHN, TRACY, PHILIPS ANTHONY
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1991
Main classification: G05D23
IPC codes: H02M1, H02M5, G05F1