Shading correction apparatus

Abstract: A shading correction apparatus eliminates a shading signal component or components from an output signal of an imaging device (1) having an array of pixels. The apparatus includes an A/D converter (12) for digitizing the output signal, and a memory (18) for storing level data of the digitized signal while exposure of the imaging device is controlled (28) to be at a zero level or a uniformly illuminated level, according to whether black shading correction or white shading correction, respectively, is to be performed. A shading correction signal former (14) generates a shading correction signal or signals from data read out from the memory (18). The shading correction signal or signals are applied to a correction circuit (3) which processes an output signal produced by the imaging device during normal imaging operation in accordance with the correction signal or signals in order to eliminate the shading signal component or components from that output signal.

Description: This invention relates to shading correction apparatus for eliminating a shading signal component from an output signal of an image pick-up device having a plurality of pixels, which may for example be arranged in an array having, for instance, a matrix configuration. Output signals (also referred to hereinafter as "imaging output signals") obtained from image pick-up devices (also referred to hereinafter as "imaging devices") such as video cameras are known to suffer from shading arising from a number of causes, such as fluctuations in sensitivity of the imaging device or dark current effects, that is distortions in brightness over a wide extent of a viewing screen. For example, in a solid state imaging device, such as a charge coupled imaging device (CCD imaging device), it has been proposed to use a variety of image sensors, such as frame charge transfer, interline charge transfer or frame interline charge transfer type image sensors, according to which signal charges from pixels of the sensor, which are arranged in a matrix configuration, are transferred in the vertical direction and sequentially read out by means of a horizontal transfer register, so that one horizontal line is read out during one horizontal scanning period, and the signal charges for the totality of the pixels of the device (and therefore for the totality of the pixels of a field or frame) are read out during one vertical scanning period, so as to produce an imaging output signal. Thus, a dark current proportional to the time during which the signal charges are transferred to the horizontal transfer register is added to the signal charges to give rise to sawtooth (serrated) changes in brightness during each vertical scanning period, that is shading in the vertical direction. On the other hand, the dark current in the horizontal transfer register gives rise to sawtooth (serrated) changes in brightness during each horizontal scanning period, that is shading in the horizontal direction. In general, the above-mentioned shading may be classified into white (modulation) shading, according to which the output is lowered in peripheral regions of the viewing screen, and black (superposition) shading, according to which the black level is not uniform throughout the viewing screen. Shading correction processing is conventionally performed by mixing shading correction signals into the imaging output signals in an analog fashion, using a multiplier for white shading and an adder for black shading. The shading correction signals may be formed by generating sawtooth and parabolic signals for the horizontal and vertical directions, and combining these signals. With the conventional shading correction circuit, output levels of the sawtooth signal generators and the parabolic signal generators may be manually adjusted by means of a level control means, such as a volume knob. Thus, the output levels of the signal generators are adjusted manually to achieve optimum shading correcting processing while reference is continuously made to a waveform monitor. US Patent US-A-4 731 652 discloses such an arrangement in which the levels of output signals of horizontal and vertical sawtooth and parabolic waveform generators are manually adjustable by means of gain control circuits comprising variable resistors. If use is made of a three colour CCD imaging system in which an object image is separated into colour components, for example red, green and blue components, and images of the three colour components are formed separately by three respective imaging devices, shading correction has to be performed for each of the imaging devices. Since, with the conventional shading correction circuit, shading correction is achieved by manually adjusting the output levels of the sawtooth and parabolic signal generators while continuously referring to a waveform monitor, the problem arises that a time-consuming adjustment operation by a skilled operator is needed for achieving accurate adjustment. This problem is serious even in the case of a single output imaging device. The problem is even more serious in the case of the three colour CCD imaging system, in that the shading correction that has to be performed for each of the three imaging devices is even more labour-intensive and time-consuming. US Patent US-A-4 562 459 discloses an NTSC colour TV camera having a shading correction circuit. In this circuit, signals (Y-R) and (Y-B), representing the differences between a luminance (Y) and red (R) and blue (B) signals from the camera, are formed by respective differential amplifiers. The signals (Y-R) and (Y-B) are sampled in accordance with clock pulses corresponding to individual screen regions, digitised and stored while a white pattern is imaged by the camera. Shading amplifiers for the R and B signals have their gains controlled by the stored signals such that the R and B signal levels are made equal to the Y signal level, whereby shading correction is performed automatically. US-A-4 562 459 also discloses a previously known arrangement. generally as outlined above, which uses sawtooth signal generators and parabolic signal generators to perform shading correction and is subject to the need for complex manual adjustment. German Patent Application Publication No. DE-A-2 538 544 discloses another previously proposed shading correction apparatus. According to a first form of implementation thereof, the invention provides a shading correction apparatus in which shading correction data for use in shading correction are formed from an imaging output signal obtained from an imaging device and are stored in memory means, the shading correction data are read out from the memory means during actual imaging, and shading correction of the imaging output signal of the imaging device is automatically performed by correction means with the aid of a shading correction signal formed by correction signal forming means on the basis of the stored shading correction data. There is thus provided a shading correction apparatus for eliminating (wholly or partially) a shading signal component from an imaging output signal of one or more imaging devices having a plurality of pixels (arranged for instance in a matrix configuration), which enables satisfactory shading correction to be achieved quickly and reliably. According to an aspect of the first form of implementation thereof, the invention provides a shading correction apparatus for eliminating (partially or wholly) a black shading signal component from an output signal of an image pick-up device having a plurality of pixels, the apparatus comprising: exposure control means for controlling an exposure level of the image pick-up device; analog to digital converting means for converting an output signal of the image pick-up device into a digital video signal; shading correction data generating means for generating first and second black shading correction data by integrating said digital video signals outputted from predetermined ones of said pixels of the image pick-up device in horizontal and vertical directions, respectively, while the exposure control means is operative to control said exposure level to be at zero level; memory means for memorizing said first and second black shading correction data; shading correction signal generating means for generating a black shading correction signal according to said first and second black shading correction data read out from the memory means; and signal processing means for processing an output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image, said signal processing means comprising subtracting means for subtracting said black shading correction signal from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image so that said shading signal component is eliminated from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image. According to another aspect of the first form of implementation thereof, the invention provides a shading apparatus for eliminating (partially or wholly) a white shading signal component from an output signal of an image pick-up device having a plurality of pixels, the apparatus comprising: exposure control means for controlling an exposure level of the image pick-up device; analog to digital converting means for converting an output signal of the image pick-up device into a digital video signal; shading correction data generating means for generating first and second white shading correction data by integrating said digital video signals outputted from predetermined ones of said pixels of the image pick up device in horizontal and vertical directions, respectively, while the exposure control means is operative to control said exposure level such that the image pick-up device is uniformly exposed; memory means for memorizing said first and second shading correction data; shading correction signal generating means for generating a white shading correction signal according to said first and second white shading correction data read out from the memory means; and signal processing means for processing an output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image, said signal processing means comprising dividing means for dividing said output signal, produced by the image pick-up device while the image pick-up device is exposed to pick up an image, by said white shading correction signal so that said white shading signal component is eliminated from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image. The stored shading correction data may be derived from an imaging output signal produced by the image pick-up device (imaging device) under a condition in which no light is incident on an imaging surface of the imaging device, i.e. while the exposure level is at zero level, whereby a black shading correction signal is formed by the shading correction signal generating means on the basis of the shading correction data read out from the memory means. The imaging output signal may then be subjected to black shading correction by subtracting the black shading correction signal from the imaging output signal of the imaging device. Additionally or alternatively, the stored shading correction data may be derived from imaging an output signal produced by the imaging device with light of uniform light intensity or volume incident on the entirety of the imaging surface of the imaging device, whereby a white shading correction signal is formed by the shading correction signal generating means on the basis of the shading correction data read out from the memory means. The imaging output signal may then be subjected to white shading correction by dividing the imaging output signal of the imaging device by the white shading correction signal. The memory means may comprise a random access memory and an electrically erasable programmable read-only memory, and the output signals of the analog to digital converting means may be stored in the programmable read-only memory at a reduced data volume so that the number of the output data is lesser at the middle than at the margin (periphery) of the imaging surface. The random access memory may be used for forming the shading correction data or correcting the shading on the basis of the shading correction data, whereas the electrically erasable programmable read-only memory thereof may be used for prolonged storage of the shading correction data. According to a second form of implementation thereof, the invention provides a shading correction apparatus for wholly or partially eliminating a shading signal component from an output signal of an image pick-up device having a plurality of pixels, the apparatus comprising: exposure control means for controlling an exposure level of the image pick-up device; analog to digital converting means for converting an output signal of the image pick-up device into a digital video signal; sampling means for sampling said digital video signal in vertical and horizontal directions at predetermined intervals while the exposure control means is operative to control said exposure level to be at zero level or while the exposure control means is operative to control said exposure level such that the image pick-up device is uniformly exposed; quadratic curve generating means for generating first and second quadratic curves according to said digital video signal as sampled in the vertical and horizontal directions; sawtooth signal generating means for generating a sawtooth signal; parabolic signal generating means for generating a parabolic signal; first level control means for controlling the level of said sawtooth signal according to coefficients of a second order term of said first and second quadratic curves; second level control means for controlling the level of said parabolic signal according to coefficients of a first order term of said first and second quadratic curves; and signal processing means for processing an output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image, according to output signals of the first and second level control means, so that said shading signal component is eliminated from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image. There is thus provided a shading correction apparatus for performing shading correction of an imaging output signal from an imaging (image pick-up) device by means of a sawtooth signal generated by a sawtooth signal generating means and a parabolic signal generated by a parabolic signal generating means, in which optimum shading correction processing may be realized quickly and reliably. Thus, sawtooth and parabolic signals having signal levels necessary for effecting shading correction are formed automatically on the basis of an imaging output signal obtained from the imaging device, in order that a satisfactory shading correcting operation may be performed automatically. The invention will now be further described, by way of illustrative and non-limiting example, with reference to the accompanying drawings, in which: Fig. 1 is a block diagram showing the construction of a shading correction apparatus according to a first embodiment of the invention; Fig. 2 is an illustrative view showing the arrangement of an array of pixels of a solid-state imaging device supplying an imaging output signal to the shading correction apparatus of Fig. 1, and typical shading characteristics thereof in the horizontal and vertical directions; Fig. 3 is an illustrative view showing data strings of black shading correction data and white shading correction data stored in a memory of the shading correction apparatus of Fig. 1; Fig. 4 is a block diagram showing the detailed construction of a data processing circuit of a shading correction signal forming section of the shading correction apparatus of Fig. 1; Fig. 5 is a flow chart showing a control procedure carried out by a system controller of the shading correction apparatus of Fig. 1; Fig. 6 is a waveform diagram showing a shading correction signal formed by the shading correction signal forming section of the apparatus of Fig. 1; Fig. 7 is a block diagram showing the construction of a shading correction apparatus according to a second embodiment of the invention; Fig. 8 is an illustrative view showing an array of pixels of a solid-state imaging device supplying an imaging output signal to the shading correction apparatus of Fig. 7, and exemplary shading characteristics thereof in the horizontal and vertical directions; Fig. 9 is a block diagram showing an exemplary sawtooth signal generating circuit of a digital circuit configuration that can be employed in the shading correction apparatus of Fig. 7; Fig. 10 is a graph showing output characteristics for use in describing the operation of the sawtooth signal generating circuit shown in Fig. 9; Fig. 11 is a block diagram showing an exemplary parabolic signal generating circuit of a digital circuit configuration that can be employed in the shading correction apparatus of Fig. 7; and Fig. 12 is a graph showing output characteristics for use in describing the operation of the parabolic signal generating circuit shown in Fig. 11. A shading correction apparatus according to a first embodiment of the invention will now be described in detail with reference to Figs. 1 to 6 of the drawings. In the present embodiment, the invention is applied by way of example to a three colour CCD imaging device. As shown in Fig. 1, imaging output signals E R , E G and E B produced by first, second and third imaging devices 1R, 1G and 1B for R, G and B (red, green and blue) channels, respectively, are supplied to a correction circuit 3 by means of preamplifiers 2R, 2G and 2B, respectively. The imaging devices 1R, 1G and 1B constitute an imaging section of the above-mentioned three colour CCD imaging device, which is provided in an imaging optical system 7 including an imaging lens 4, an iris unit or device 5 and a colour separation prism 6. Each of the imaging devices 1R, 1G and 1B is a CCD image sensor formed by a number (M x N) of pixels S₁₁ to S MN (Fig. 2) arranged in a matrix array comprising a number M of pixels in the horizontal direction and a number N of pixels in the vertical direction, as shown in Fig. 2, and is driven by a CCD driver (not shown) so that signal charges from the totality of the pixels S₁₁ to S MN for each field or frame will be read out during one vertical scanning period. The red colour component of the imaging output signal E R of an object image, which has been colour-separated by the colour separating prism 6, is supplied from the first imaging device 1R to the correction circuit 3 by way of the preamplifier 2R as an R-channel signal. The green colour component of the image output signal E G of the object image, which has been colour-separated by the colour separating prism 6, is supplied from the second imaging device 1G to the correction circuit 3 by way of the preamplifier 2G as a G-channel signal. Similarly, the blue colour component of the image output signal E B of the object image, which has been colour-separated by the colour separating prism 6, is supplied from the third imaging device 1B to the correction circuit 3 by way of the preamplifier 2B as a B-channel signal. The correction circuit 3 processes the imaging output signals E R , E G and E B , produced by the imaging devices 1R, 1G and 1B for the R, G and B channels, respectively, by effecting black shading correction processing and white shading correction processing. The correction circuit 3 includes subtractors 8R, 8G and 8B for the R, G and B channels, supplied with the imaging output signals E R , E G and E B , respectively, and dividers 10R, 10G and 10B for the R, G and B channels, supplied with subtraction output signals from the subtractors 8R, 8G and 8B, by means of variable gain preamplifiers 9R, 9G and 9B, respectively. in the correction circuit 3, the subtractors 8R, 8G and 8B process the imaging output signals E R , E G and E B of the R, G and B channels, respectively, by effecting black shading correction processing by subtracting from the imaging output signals E R , E G and E B black shading correction signals B RSH , B GSH and B BSH for the R, G and B channels, respectively, that are supplied from a shading correction signal forming section 14 by which they are generated as described hereinbelow. The variable gain amplifiers 9R, 9G and 9B process the imaging output signals E R , E G and E B of the R, G and B channels by signal level adjustment, such as white balance or black balance adjustment, and are gain-controlled by control signals for the R, G and B channels supplied from a system controller 27 described hereinbelow. The dividers 10R, 10G and 10B process the imaging output signals E R , E G and E B of the R, G and B channels, respectively, by effecting white shading correction processing by dividing the imaging output signals E R , E G and E B by white shading correction signals W RSH , W GSH and W BSH for the R, G and B channels, respectively, that are supplied from the shading correction signal forming section 14. The dividers 10R, 10G and 10B may be implemented as multipliers operative to multiply the imaging output signals E R , E G and E B of the R, G and B channels by reciprocals of the white shading correction signals W RSH , W GSH and W BSH , respectively. The imaging output signals E R , E G and E B , corrected by the correction circuit 3, are supplied therefrom to analog to digital (A/D) converters 12R, 12G and 12B of the R, G and B channels, respectively, via respective preknee circuits 11R, 11G and 11B. The preknee circuits 11R, 11G and 11B effect non-linear processing of the imaging output signals E R , E G and E B of the R, C and B channels outputted by the correction circuit 3 in order to prevent the input signal levels to the A/D converters 12R, 12G and 12B exceeding the dynamic range thereof. The A/D converters 12R, 12G and 12B provide digital level data indicating the signal levels of the imaging output signals E R , E G and E B as corrected by the correction circuit 3. Level data indicating the levels of the imaging output signals E R , E G and E B of the R, G and B channels, provided by the A/D converters 12R, 12G and 12B, respectively, are supplied as shading corrected concurrent imaging output data D R , D G and D B to the shading correction signal forming section (also referred to hereinafter as "the shading correction signal former") 14, and to downstream signal processing circuits (not shown), via defect correction circuits 13R, 13G and 13B, respectively. The defect correction circuits 13R, 13G and 13B process signal charges from defective pixels of the imaging devices 1R, 1G and 1B, that is parts of the imaging output signals E R , E G and E B corresponding to defective pixels of the R, G and B channels, by defect correction processing that corrects their signal levels on the basis of level data of previously detected defective pixels. The shading correction signal former 14 includes: low-pass filters (LPFs) 15R, 15G and 15B supplied with the concurrent imaging output data D R , D G and D B of the channels R, G and B, respectively; a data selector 16 supplied with the concurrent imaging output data D R , D G and D B , respectively, by means of the low-pass filters 15R, 15G and 15B; a data processing circuit 17 supplied with dot sequential data D[R/G/B] selected by the data selector 16; a working memory 18, which is an overwritable random access memory (RAM), connected to the data processing circuit 17; a backup memory 19, which is an electrically erasable and programmable read-only memory (EEPROM), similarly connected to the data processing circuit 17; a data selector 20 for distributing black shading correction data D[B RSH /B GSH /B BSH ], outputted dot-sequentially from the data processing circuit 17, to the R, G and B channels; a data selector 21 for distributing white shading correction data D[W RSH /W GSH /W BSH ], outputted dot-sequentially from the data processing circuit 17, to the R, C and B channels; digital to analog (D/A) converters 23R, 23G and 23B for converting the black shading correction data D[B RSH ], D[B GSH ] and D[B BSH ], distributed by the data selector 20, into corresponding analog signals; D/A converters 24R, 24G and 24B for converting the white shading correction data D[W RSH ], D[W GSH ] and D[W BSH ] for the R, G and B channels, as distributed by the data selector 21, into corresponding analog signals; and low-pass filters 25R, 25G, 25B, 26R, 26G and 26B provided on the output sides of the D/A converters 23R, 23G, 23B, 24R, 24G and 24B, respectively. The low-pass filters 15R, 15G and 15B of the shading correction signal former 14 are digital filters having a cut-off frequency equal to one-eighth of a clock frequency of the A/D converters 12R, 12G and 12B, and limit the bandwidths of the concurrent imaging output data D R , D G and a D B to one-eighth by performing bandwidth limitation. The data selector 16 selects the concurrent imaging output data D R , D G and D B of the channels R, G and B, as thus bandwidth-limited by the low-pass filters 15R, 15G and 15B, dot-sequentially on a channel-by-channel basis, thereby forming the dot-sequential data D[R/G/B] with the number of data reduced to one-eighth of the original number. The dot-sequential data D[R/G/B], thus formed by data selector 16, indicate dot-sequentially the signal levels of the imaging output signals from signal charges of every eighth pixel of the pixels S₁₁ to S MN of the imaging devices 1R, 1G and 1B, namely those shown hatched in Fig. 2. It is to be noted that a driver or control circuit 28 of the iris unit 5 of the imaging optical system 7 is so controlled by the system controller 27 that: for detecting the black shading characteristics, the iris unit 5 is closed and the imaging devices 1R, 1G and 1B perform an imaging operation without any light falling on their respective imaging surfaces; and, for detecting the white shading characteristics, the iris unit 5 is opened and the imaging devices 1R, 1G and 1B perform an imaging operation with light of a uniform light intensity corresponding to 100 percent brightness falling on the entirety of the imaging surfaces. The data processing circuit 17 finds black shading correction data D[B RSH /B GSH /B BSH ] and white shading correction data D[W RSH /W GSH /W BSH ], consistent with the black and white shading characteristics of the imaging devices 1R, 1G and 1B, on the basis of the dot-sequential data D[R/G/B] supplied from the data selector 16, and stores the data dot-sequentially in the working memory 18 as shown in Fig. 3. During actual imaging, the data processing circuit 17 reads out the black shading correction data D[B RSH /B GSH /B BSH ] and the white shading correction data D[W RSH /W GSH /W BSH ] from the working memory 18 dot-sequentially so that the thus read-out data can be outputted by means of the data selectors 20 and 21. In the present embodiment, the data processing circuit 17 processes the dot-sequential data D[R/G/B], indicating dot-sequentially the signal levels of the imaging output signals from signal charges at every eighth pixel of the pixels S₁₁ to S MN of the imaging devices 1R, 1G and 1B, by: integrating the level data indicative of the imaging output levels of the pixels lying at the same horizontal positions P h1 to P hm as shown in Fig. 2 to produce a data string D[l h1 to l hm ] indicating the horizontal shading characteristics with the use of level data having a thereby improved signal to noise (S/N) ratio to produce horizontal shading correction data dot-sequentially from the data string D[l h1 to l hm ]; and by integrating the level data indicative of the imaging output levels of the pixels lying at the same vertical positions P v1 to P vm to produce a data string D[l v1 to l vm ] indicating the vertical shading characteristics with the use of level data having a thereby improved S/N ratio to produce vertical shading correction data dot-sequentially from the data string D[l v1 to l vm ]. The data processing circuit 17 may for example be constructed as shown in Fig. 4. Thus, the dot-sequential data D[R/G/B] from the data selector 16 are supplied to a clipping circuit 31. The clipping circuit 31 processes the dot-sequential data D[R/G/B] by dot-sequential subtraction of the mean values of the respective frames of the imaging devices 1R, 1G and 1B and clipping to the lower n bits. The clipped dot-sequential data D[R/G/B] are supplied to a down-sampling circuit 32 which processes the clipped dot-sequential data D[R/G/B] by limiting the bandwidth of the dot-sequential data D[R/G/B] indicating the shading characteristics of the imaging devices 1R, 1G and 1B to one sixteenth by using, for example, a digital filter having a transfer function H(z) given by: H z = 1 4 Z -4 + 1 2 Z 0 + 1 4 Z 4 . The dot-sequential data D[R/G/B], thus down-sampled by the down-sampling circuit 32, are supplied to an accumulator or register 33. The accumulator 33 processes the dot-sequential data D[R/G/B] by concurrently adding and integrating the level data indicating the imaging output levels of the pixels at the same horizontal positions P h1 to P hn , using the working memory 18, as shown in Fig. 2, thereby producing black shading correction data D[B RSH /B GSH /B BSH ] H and white shading correction data D[W RSH /W GSH /W BSH ] H dot-sequentially as shading correction data consistent with the horizontal shading component for each of the imaging devices 1R, 1G and 1B. The accumulator 33 also processes the dot-sequential data D[R/G/B] by integrating the level data indicating the imaging output levels of the pixels at the same horizontal positions P v1 to P vm , using the working memory 18, thereby producing black shading correction data D[B RSH /B GSH /B BSH ] V and white shading correction data D[W RSH /W GSH /W BSH ] V dot-sequentially as shading correction data consistent with the vertical shading component for each of the imaging devices 1R, 1G and 1B. It will be noted that the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H in the horizontal direction are formed by concurrent addition in the accumulator 33, while the black shading correction data D[B RSH /B GSH /B BSH ] V and the white shading correction data D[W RSH /W GSH /W BSH ] V in the vertical direction are formed by concurrent addition in memory, using the working memory 18. In this manner, the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H in the horizontal direction, as well as the black shading correction data D[B RSH /B GSH /B BSH ] V and the white shading correction data D[W RSH /W GSH /W BSH ] V in the vertical direction, for the imaging devices 1R, 1G and 1B, formed from the dot-sequential data D[R/G/B], are written and stored dot-sequentially in the working memory 18. The black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H in the horizontal direction, as well as the black shading correction data D[B RSH /B GSH /B BSH ] V and the white shading correction data D[W RSH /W GSH /W BSH ] V in the vertical direction, thus stored in the working memory 18, are read out dot-sequentially from the working memory 18 and supplied via a buffer 34 to a horizontal/vertical (H/V) data separator 35 when performing shading correction of the imaging output signals of the R, G and B channels. The data separator 35 separates the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H for the horizontal direction and the black shading correction data D[B RSH /B GSH /B BSH ] V and the white shading correction data D[W RSH /W GSH /W BSH ] V for the vertical direction, and transmits the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H for the horizontal direction to an interpolation circuit 36, while transmitting the black shading correction data D[B RSH /B GSH /B BSH ] V and the white shading correction data D[W RSH /W GSH /W BSH ] V to adders 37 and 38, respectively. The interpolation circuit 36 processes the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H , supplied thereto from the data separator 35 dot-sequentially at a data rate equal to one eighth of the clock frequency, by mean value interpolation, while separating the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H from each other and outputting these separated data at a data rate of 1/4. The horizontal black shading correction data D[B RSH /B GSH /B BSH ] H , obtained at the data rate of 1/4 from the interpolation circuit 35, are supplied to the adder 37. The adder 37 adds the horizontal black shading correction data D[B RSH /B GSH /B BSH ] H to the vertical black shading correction data D[B RSH /B GSH /B BSH ] V to form horizontal and vertical black shading correction data D[B RSH /B GSH /B BSH ] which are then outputted by means of a clipping circuit 39. The horizontal white shading correction data D[W RSH /W GSH /W BSH ] H , outputted at the data rate of 1/4 by the interpolating circuit 36, are supplied to the adder 38. The adder 38 adds the horizontal white shading correction data D[W RSH /W GSH /W BSH ] H and the vertical white shading correction data D[W RSH /W GSH /W BSH ] V to each other to produce horizontal and vertical white shading correction data D[W RSH /W GSH /W BSH ], which are then outputted by means of the clipping circuit 39. Referring back to Fig. 1, the data selector 20, supplied with the black shading correction data D[B RSH /B GSH /B BSH ] dot-sequentially outputted from the data processing circuit 17, is operative to distribute the black shading correction data D[B RSH /B GSH /B BSH ] to the D/A converters 23R, 23G and 23B of the R, G and B channels, and is constituted by, for example, a latch circuit. The black shading correction data D[B RSH ], D[B GSH ] and D[B BSH ] supplied from the selector 20 are converted into analog signals by the D/A converters 23R, 23G and 23B, respectively. The output signal from the D/A converter 23R for converting the black shading correction data D[B RSH ] into an analog signal are supplied via the low-pass filter 25R to the R-channel subtractor 8R of the correction circuit 3 as the black shading correction signal B RSH . The output signal from the D/A converter 23G for converting the black shading correction data D[B GSH ] into an analog signal are supplied via the low-pass filter 25G to the G-channel subtractor 8G of the correction circuit 3 as the black shading correction signal B GSH . Similarly, the output signal from the D/A converter 23B for converting the black shading correction data D[B BSH ] into an analog signal are supplied via the low-pass filter 26B to the B-channel subtractor 8B of the correction circuit 3 as the black shading correction signal B BSH . The data selector 21, supplied with the white shading correction data D[W RSH /W GSH /W BSH ] dot-sequentially outputted from the data processing circuit 17, is operative to distribute the white shading correction data D[W RSH /W GSH /W BSH ] to the D/A converters 24R, 24G and 24B of the R, G and B channels, and is constituted by, for example, a latch circuit. The D/A converters 24R, 24G and 24B are operative to convert the white shading correction data D[B RSH ], D[B GSH ] and D[B BSH ] from the data selector 21 into analog signals. The output signal of the D/A converter 24R for converting the white shading correction data D[W RSH ] into an analog signal are supplied via the low-pass filter 26R to the R-channel divider 8R of the correction circuit 3 as the white shading correction signal W RSH . The output signal of the D/A converter 24G for converting the white shading correction data [W GSH ] into an analog signal are supplied via the low-pass filter 26G to the G-channel divider 8G of the correction circuit 3 as the white shading correction signal W GSH . Similarly, the output signal of the D/A converter 24B for converting the white shading correction data D[W BSH ] into an analog signal are supplied via the low-pass filter 26B to the B-channel divider 8B of the correction circuit 3 as the white shading correction signal W BSH . The shading correction apparatus of the present embodiment is controlled by the system controller 27 in a manner which will now be described with reference to a flow chart shown in Fig. 5. Thus, when a shading detection mode is entered, the operation of detecting the black shading characteristics is initiated. At a first step S₁, the iris unit 6 is closed and the imaging devices 1R, 1G and 1B thus perform an imaging operation without any light falling on their imaging surfaces. At the next (second) step S₂, the black shading correction data D[B RSH /B GSH /B BSH ] in the working memory 18 are all set to 0, while the white shading correction data D[W RSH /W GSH /W BSH ] are all set to 1. At the next (third) step S₃, the data processing circuit 17 processes the imaging output signals E R , E G and E B , produced by the imaging devices 1R, 1G and 1B without any light incident on their imaging surfaces, for forming black shading correction data D[B RSH /B GSH /B BSH ] on the basis of the dot-sequential data D[R/G/B] and dot-sequentially storing the data in the working memory 18. At the next (fourth) step S₄, the data processing circuit 17 reads out the black shading correction data D[B RSH /B GSH /B BSH ] and the white shading correction data D[W RSH /W GSH /W BSH ] dot-sequentially from the working memory 18 and processes the imaging output signals E R , E G and E B from the imaging devices 1R, 1G and 1B by effecting shading correction processing by means of the correction circuit 3. The data processing circuit 17 then detects black shading correction errors of the shading corrected imaging output signals E R , E G and E B by, for example, a least squares method. At the next (fifth) step S₅, it is determined whether the black shading correction errors of the shading corrected imaging output signals E R , E G and E B detected at the fourth step S₄ are not larger than a predetermined value (threshold). If the result of the decision made at the fifth step S₅ is NO, that is if the shading correction errors are larger than the predetermined value, the system controller 27 proceeds to a step S₆ to control the gains of the variable gain amplifiers 9R, 9G and 9B of the correction circuit 3 in a direction to reduce the shading correction errors. The system controller then reverts to the step S₂ to repeat the operations from the step S₂ to the step S₆. If the result of the decision made at the fifth step S₅ is YES, that is if the shading correction errors are not larger than the predetermined value, the operation of detecting the black shading characteristics is terminated when the shading corrected imaging output signals E R , E G and E B fall to below the predetermined value. The system controller 27 then proceeds to a seventh step S₇. At the seventh step S₇, the system controller 27 decides whether detection of the white shading characteristics is to be performed. If the result of the decision is NO, that is if detection of the white shading characteristics is not to be performed, the control operation of the detection mode of detecting the white shading characteristics is terminated. If the result of the decision at the seventh step S₇ is YES, that is if detection of the white shading characteristics is to be performed, the system controller 27 proceeds to the next (eighth) step S₈. At the eighth step S₈, the iris unit 6 is opened and the imaging devices 1R, 1G and 1B perform an imaging operation with light of uniform light intensity corresponding to 100 percent brightness falling on the whole of the imaging surfaces with the use of a white colour pattern, such as a Porta pattern. At the next (ninth) step S₉, the data processing circuit 17 processes the imaging output signals E R , E G and E B produced by the imaging devices 1R, 1G and 1B with light of uniform light intensity corresponding to 100 percent brightness falling on the whole of the imaging surfaces, for forming white shading correction data D[W RSH /W GSH /W BSH ] on the basis of the dot-sequential data D[R/G/B] and dot-sequentially storing the data in the working memory 18. At the next (tenth) step S₁₀, the data processing circuit 17 reads out the black shading correction data D[B RSH /B GSH /B BSH ] and the white shading correction data D[W RSH /W GSH /W BSH ] from the working memory 18 dot-sequentially and processes the imaging output signals E R , E G and E B from the imaging devices 1R, 1G and 1B by shading correction processing effected by the correction circuit 3, while detecting white shading correction errors of the shading corrected imaging output signals E R , E G and E B by, for example, a least squares method. At the next step S₁₁, it is determined whether the white shading correction errors of the shading corrected imaging output signals E R , E G and E B detected at the tenth step S₁₀ are not larger than a predetermined value (threshold). If the result of the decision made at the step S₁₁ is NO, that is if the white shading correction errors are larger than the predetermined value, the system controller proceeds to a step S₁₂ to control the gains of the variable gain amplifiers 9R, 9G and 9B of the correction circuit 3 in a direction to decrease the white shading correction errors. Then, at the next step S₁₃, the system controller 27 sets all the white shading correction data D[W RSH /W GSH /W BSH ] in the working memory 18 to 1, after which the system controller reverts to the step S₉ to repeat the operations from the step S₉ to the step S₁₃. If the result of the decision made at the step S₁₁ is YES, that is if the white shading correction errors of the shading corrected imaging output signals E R , E G and E B are not larger than the predetermined value, the operation of detecting the white shading characteristics is terminated. The system controller 27 proceeds to a step S₁₄ to perform white balance adjustment to terminate the control operation of the detection mode for detecting the shading characteristics. At the step S₁₄, with the imaging output signals E R , E G and E B of the R, G and B channels, produced by the imaging devices 1R, 1G and 1B and white shading corrected on the basis of the black shading correction data D[B RSH /B GSH /B BSH ] and the white shading correction data D[W RSH /W GSH /W BSH ] fetched dot-sequentially into the working memory 13, as described previously, the system controller 27 sets the gains of the variable gain amplifiers 9R, 9G and 9B of the correction circuit 3 so that the imaging output concurrent data D R , D G and D B of the respective channels will exhibit an equal signal level, thereby performing white balance adjustment. The operation of detecting the shading characteristics without any light being incident on the imaging surfaces of the imaging devices 1R, 1G and 1B, that is the black shading characteristics, may be performed at any desired occasion of closing the iris unit 5. However, the operation of detecting the white shading characteristics cannot be performed so frequently, because the imaging operation has to be performed with light of uniform light intensity with 100 percent brightness falling on the imaging surfaces of the imaging devices 1R, 1G and 1B with the use of a white colour pattern, such as a Porta pattern. Therefore, the latest white shading correction data as found by the detecting operation of the white shading characteristics are preferably stored in the backup memory (EEPROM) 19. In general, the shading characteristics of an imaging device are subject to larger changes in the marginal (peripheral) region of the imaging surface than at the middle of the imaging surface. For this reason, data may be eliminated periodically, so that the data volume is lesser at the middle of the imaging surface, for conserving the storage capacity of the backup memory 19. For example, the horizontal white shading correction data D[W RSH /W GSH /W BSH ] H may be subjected to down-sampling in such a manner that the number of data is reduced by factors of 1/8 and 1/128 at the margin and at the middle of the imaging surface, respectively, while the vertical white shading correction data D[W RSH /W GSH /W BSH ] V may be subjected to down-sampling in such a manner that the number of data is reduced by factors of 1/4 and 1/32 at the margin and at the middle of the imaging surface, respectively. In the present embodiment, the data processing circuit 17 is provided with a processing circuit 40 (Fig. 4) whereby the latest white shading correction data D[W RSH /W GSH /W BSH ] as found by the above-described detection operation for detecting the white shading characteristics are read out from the working memory 18 and subjected to down-sampling to reduce the number of data stored in the backup memory 19 in that the white shading correction data with the lesser data volume read out from the buffer memory 19 are interpolated and written in the working memory 18 via a buffer circuit 41 as the white shading correction data. The data reduction and interpolation effected in the processing circuit 40 may be implemented by a digital filter having a transfer function H(z) given by: H z = 1 4 Z -4 + 1 2 Z 0 + 1 4 Z 4 . for sequentially providing the data rates through the filter equal to 1/2 or 2 times. It should be noted that, in the above-described shading correction signal former 13, optimum correction occasionally cannot be achieved by the black shading correction signals B RSH , B GSH and B BSH of the R, G and B channels, supplied from the D/A converters 23R, 23G and 23B to the correction circuit 3 by way of the low-pass filters 25R, 25G and 25B, or by the white shading correction signals W RSH , W GSH and W BSH supplied from the D/A converters 24R, 24G and 24B to the correction circuit 3 by way of the low-pass filters 26R, 26G and 26B, because the rising and falling edges thereof tend to become dull or rounded (that is, to lose their sharpness or abruptness) due to the filter characteristics of the low-pass filters 25R, 25G, 25B, 26R, 26G and 26B, as shown by broken lines at (A) in Fig. 6. For this reason, with the shading correction signal former 14 of the present embodiment, when reading out the above-mentioned horizontal black shading correction data D[B RSH /B GSH /B BSH ] H and white shading correction data D[W RSH /W GSH /W BSH ] H from the working memory 18, the reading start time of the leading data in each line is advanced repeatedly into each successive blanking interval T BLK by a predetermined time interval or period T as shown at (B) in Fig. 6, so that the leading data in each line is read out from the working memory 18 repeatedly during the intervals or periods T, in order to ensure optimum correction by preventing the occurrence of a situation in which the adverse waveform distortion effects caused by the filter characteristics of the low-pass filters 25R, 25G, 25B, 26R, 26G and 26B are displayed during the regular correction time interval T₀. Instead of controlling the reading out of data from the working memory 18 as described above, it is possible to prevent waveform distortion due to the filter characteristics of the low-pass filters 25R, 25G, 25B, 26R, 26G and 26B by controlling the writing of data to the working memory 18. A way in which such control of writing to the working memory 18 may be achieved will now be described with reference to Fig. 6. When detecting the white shading characteristics, data having the same level as levels just behind (after) the blanking intervals T BLK of the output signals from the A/D converters 12R, 12G and 12B are written into the working memory 18 during the periods T. White shading correction data are thus stored in (written into) the working memory 18 during the periods T₀. When imaging, that is when picking up an image, data read out from an address or addresses of the working memory 18 corresponding to the periods T and the white shading correction data as read out from an address or addresses of the working memory 18 corresponding to the periods T₀ are supplied to the low-pass filters 26R, 26G and 26B via the D/A converters 24R, 24G and 24B. In this way, it is possible to prevent waveform distortion caused by the filter characteristics of the low-pass filters 26R, 26G and 26B. The control of writing data to and reading data from the working memory 18 is performed by the system controller 27. Black shading correction may be carried out in the above case in the same way as that in which white shading correction is effected. With the above-described shading correction apparatus of the present embodiment, shading correction data for each of the imaging devices 1R, 1G and 1B are formed from the imaging output data D R , D G and D B , digitized by the A/D converters 12R, 12G and 12B of the R, G and B channels from the imaging output signals E R , E G and E B from the first, second and third imaging devices 1R, 1G and 1B as light exposure controlled by the iris unit 5, and the so-formed shading correction data are stored in the working memory 18 constituted by a RAM. Then, during actual imaging, shading correction signals for each of the imaging devices 1R, 1G and 1B are formed on the basis of the shading correction data read out from the working memory 18 so that the imaging output signals E R , E G and E B from the imaging devices 1R, 1G and 1B may be automatically subjected to shading correction processing. In addition, with the above-described shading correction apparatus, the state of light exposure of the first, second and third imaging devices 1R, 1G and 1B is controlled, on the one hand, by the iris unit 5 so that no light will be incident on the imaging surfaces of the first, second and third imaging devices 1R, 1G and 1B and, under the thus-controlled state of light exposure, the black shading correction data D[B RSH ], D[B GSH ] and D[B BSH ] for each of the imaging devices 1R, 1G and 1B are formed from the imaging output data D R , D G and D B digitized from the imaging output signals E R , E G and E B of the imaging devices 1R, 1G and 1B by the A/D converters 12R, 12G and 12B of the R, G and B channels. On the other hand, the state of light exposure of the first, second and third imaging devices 1R, 1G and 1B is controlled by the iris unit 5 so that light of uniform light intensity will be incident on the whole of the imaging surfaces of the first, second and third imaging devices 1R, 1G and 1B and, under the thus-controlled state of light exposure, the white shading correction data D[W RSH ], D[W GSH ] and D[W BSH ] for each of the imaging device 1R, 1G and 1B are formed from the imaging output data D R , D G and D B of the R, G and B channels digitized from the imaging output signals E R , E G and E B of the imaging devices 1R, 1G and 1B. These black shading correction data D[B RSH ], D[B GSH ] and D[B BSH ], as well as the white shading correction data D[W RSH ], D[W GSH ] and D[W BSH ], are stored in the working memory 18. Then, during actual imaging, the black shading correction signals B RSH , B GSH and B BSH , as well as the white shading correction signals W RSH , W GSH and W BSH , are formed on the basis of the black shading correction data D[B RSH ], D[B GSH ] and D[B BSH ] as well as the white shading correction data D[W RSH ], D[W GSH ] and D[W BSH ], read out from the working memory 18, so that the imaging output signals E R , E G and E B of the imaging devices 1R, 1G and 1B may be quickly and reliably subjected to black shading correction processing and white shading correction processing. Also, with the above-described shading correction apparatus, the imaging output data digitized from the imaging output signals E R , E G and E B of the first, second and third imaging devices 1R, 1G and 1B with no light falling on the respective imaging surfaces are processed into dot-sequential black shading correction data D[B RSH /B GSH /B BSH ] with the data volume reduced to one eighth of the original data volume. On the other hand, the imaging output data D R , D G and D B digitized from the imaging output signals E R , E G and E B with light of uniform intensity falling on the full imaging surfaces of the imaging devices are processed into the white shading correction data D[W RSH /W GSH /W BSH ] with the data volume reduced to one eighth of the original data volume. This results in a reduced shading correction data volume. In addition, since these dot-sequential black shading correction data D[B RSH /B GSH /B BSH ] and white shading correction data D[W RSH /W GSH /W BSH ] are stored collectively in the working memory 18, the various shading correction data necessary for shading correction of the imaging devices may be stored in a single memory without the necessity of providing plural memory means for storing black and white shading correction data for the imaging devices. Further, with the shading correction apparatus of the present embodiment, since the level data of the imaging output signals E R , E G and E B of the pixels of the imaging devices 1R, 1G and 1B, digitized more for each of the imaging devices 1R, 1G and 1B from the imaging output data D R , D G and D B as digitized by the A/D converters 12R, 12G and 12B of the R, G and B channels, are integrated in the horizontal and vertical directions for forming the black shading correction data D[B RSH /B GSH /B BSH ] H and the white shading correction data D[W RSH /W GSH /W BSH ] H consistent with the horizontal shading component as well as the black shading correction data D[B RSH /B GSH /B BSH ] V and the white shading correction data D[W RSH /W GSH /W BSH ] V consistent with the vertical shading component, as the shading correction data, the data volume of the shading correction data used for shading correction may be reduced to enable the shading correction data to be stored in a working memory 18 of reduced storage capacity. In addition, with the above-described shading correction apparatus, by providing the working memory 18 constituted by a RAM and the backup memory 19 constituted by an EEPROM, as the storage means for storing the shading correction data, it becomes possible to perform the operation of shading correction data generation or shading correction on the basis of the shading correction data with the aid of the working memory 18, while it becomes possible to store the shading correction data for a prolonged time using the backup memory 19. Also, since the shading correction data stored in the backup memory 19 are previously reduced in data volume so that the number of output data is lesser at the middle than at the margin of the imaging surfaces of the imaging devices, an EEPROM which has a lesser storage capacity, and thus is less expensive, amy be employed. The invention is not limited to the above-described embodiment. For example, instead of processing the imaging output signals E R , E G and E B of the first, second and third imaging devices 1R, 1G and 1B by analog shading correction processing by means of the correction circuit 3, as in the above-described embodiment, it is possible to provide a digital shading correction circuit downstream of the A/D converters 12R, 12G and 12B of the R, G and B channels and to supply the black shading correction data D[B RSH ], D[B GSH ] and D[B BSH ] as well as the white shading correction data D[W RSH ], D[W GSH ] and D[W BSH ] to the digital correction circuit by means of the data selectors 20 and 21. With the above-described shading correction apparatus embodying the invention, the level data of imaging output signals of a predetermined number of pixels, digitized by analog/digital converting means from the imaging output signals of the imaging devices controlled as regards light exposure by light exposure control means, are stored as shading correction data in memory means, and shading correction signals are formed on the basis of the shading correction data read out from the storage means, during actual imaging, thereby enabling the imaging output signals of the imaging devices automatically to be subjected to shading correction processing. In addition, with the above-described shading correction apparatus embodying the invention, the state of light exposure is controlled by the light exposure control means such that no light will be incident on the imaging surfaces of the imaging devices, and black shading correction data are produced from the imaging output data digitized from the imaging output signals of the imaging devices in the thus-controlled state of light exposure, thereby enabling the imaging output signals of the imaging devices to be subject to black shading correction processing quickly and reliably during actual imaging. Further, with the shading correction apparatus according to the above embodiment, the state of light exposure is controlled by the light exposure control means so that light of uniform light intensity will be incident on the entirety of the imaging surfaces of the imaging devices, and white shading correction data are produced from imaging output data digitized from imaging output signals of the imaging devices in the thus-controlled state of light exposure, thereby enabling the imaging output signals of the imaging devices to be subjected to white shading correction quickly and reliably during actual imaging. Also, with the shading correction apparatus according to the above embodiment of the invention, by providing the random access memory (RAM) and the electrically erasable programmable read only memory (EEPROM) as storage means, the operation of forming the shading correction data or correcting the shading by means of the shading correction data may be performed using the RAM as a working memory, while the shading correction data may be stored for a prolonged time using the EEPROM as a backup memory. Further, the shading correction data stored in the programmable read-only memory have been reduced in data volume so that the number of output data is lesser at the middle than at the margin of the imaging surface of each imaging device, so that it becomes possible to use memory of a smaller storage capacity. A shading correction apparatus according to a second embodiment of the invention will now be described in detail with reference to Figs. 7 to 12 of the drawings. The apparatus of Figs. 7 to 12 is similar in many respects to that of Figs. 1 to 6. The shading correction circuit according to the present embodiment is operative to eliminate a shading component in an imaging output signal of an imaging device 101 having an array of a large number of pixels arranged in a matrix configuration and, as shown in Fig. 7, the apparatus comprises a correction circuit 103 for processing the imaging output signal from the imaging device 101 by shading correction processing, an analog to digital (A/D) converter 105 for converting the output signal of the correction circuit 103 into a digital signal, and a shading correction signal forming section 110 for forming a shading correction signal (or signals) on the basis of output data from the A/D converter 105. The imaging device 101 used with the present embodiment is a CCD image sensor in which a number (M x N) of pixels S₁₁ to S MN are arrayed in a matrix configuration comprising a number M of horizontal rows of pixels and a number N of vertical columns of pixels. The imaging device 110 is driven by a CCD driving unit (not shown) so that signal charges for the totality of the pixels S₁₁ to S MN constituting a field or frame is read out during one vertical scanning period. The sequential signal charges read out from the imaging device 101 are supplied as an imaging output signal via a preamplifier 102 to the correction circuit 103. An iris unit 109 controlled by an iris control circuit or driver 108, which is in turn controlled by a system controller 107, is provided ahead of an imaging surface of the imaging device 101. The correction circuit 103 subjects the imaging output signal from the imaging device 101 to shading correction processing by using the shading correction signal supplied by the shading correction signal forming section 110, and is constituted by, for example, a subtractor (not shown) for subtracting the shading correction signal from the imaging output signal and a divider (not shown) for dividing the imaging output signal by the shading correction signal. The output signal from the correction circuit 103 is supplied via a preknee circuit 104 to the A/D converter 105. The preknee circuit 104 effects non-linear processing of the output signal from the correction circuit 103 to prevent the input signal level to the A/D converter 105 exceeding the dynamic range thereof. The A/D converter 105 processes the output signal of the correction circuit 103, as supplied via the preknee circuit 104, to form level data indicating the signal level of the output signal. The level data produced by the A/D converter 105 are supplied as shading corrected imaging output data to the shading correction signal forming section 110, and to downstream signal processing circuits (not shown), via a defect correction circuit 106. The defect correction circuit 106 processes signal charges, that is parts of the imaging output signal, from defective pixels of the imaging device 101, by defect correction processing that corrects the signal level of the imaging output signal. The circuit 106 performs the defect correction processing on the basis of previously detected defective pixel data of the imaging device 101. The shading correction signal forming circuit 110 of the present embodiment is constituted by: a sampling circuit 111 for sampling level data supplied from the A/D converter 105 via the defect correction circuit 106 at a predetermined sampling interval; an arithmetic unit or device or central processor unit (CPU) 112 supplied with sampled data from the sampling circuit 111; a memory 113 connected to the arithmetic device 112; sawtooth (serrated) signal generators 114H, 114V for generating sawtooth signals at the horizontal scanning period and the vertical scanning period, respectively; parabolic signal generators 115H, 115V for generating parabolic signals at the horizontal scanning period and the vertical scanning period, respectively; level controllers (level control circuits) 116H, 116V for controlling the signal levels of the sawtooth signals from the sawtooth signal generators 114H, 114V; level controllers (level control circuits) 117H, 117V for controlling the signal levels of the parabolic signals from the parabolic signal generators 115H, 115V; and adders 118H, 118V and 118 for summing together the sawtooth signals and the parabolic signals. The shading correction signal forming section 110 is controlled by the system controller 107 to be switched between a shading detection mode of operation and a shading correcting mode of operation. For black shading detection during the shading detecting mode of operation, the iris unit 109 provided ahead of the imaging surface of the imaging device 101 is closed by the iris control circuit 108 (in turn controlled by the system controller 107) so that an imaging operation is performed without any light falling on the imaging surface. For white shading detection, the iris unit 109 is opened by the iris control circuit 108 (in turn controlled by the system controller 107) and an imaging operation is performed under a condition such that, with the use of a white pattern, such as a Porta pattern, light of uniform light intensity will be incident on all of the imaging surface. The imaging output signal obtained from the imaging device 101 during the shading detecting mode is supplied via the preknee circuit 104 to the A/D converter 105 in an uncorrected state, that is without being subjected to shading correction processing by the correction circuit 103. The sampling circuit 111 processes the level data supplied from the A/D converter 105 via the defect correction circuit 106 by sampling, from the imaging output signal constituted by the signal charges of the pixels S₁₁ to S MN of the imaging device 101, level data of the imaging output signal from the signal charges of a number (m x n) of pixels composed of a number m of horizontal rows of pixels and a number n of vertical columns of pixels, as shown by hatching in Fig. 8, and cumulatively adding the level data of the imaging output signal for pixels lying at the same positions P h1 to P hm in the horizontal direction, thereby forming a first data string D[l h1 to l hm ] indicative of shading characteristics in the horizontal direction, and also cumulatively adding the level data of the imaging output signal for pixels lying at the same positions P v1 to P vm in the vertical direction, thereby forming a second data string D[l v1 to l vm ] indicative of shading characteristics in the vertical direction. The signal to noise (S/N) ratio of the level data may be improved by using a cumulative sum of level data of the imaging output signal corresponding to the pixels lying at the same positions in the horizontal or vertical direction. The S/N ratio of the level data may be further improved by synchronized addition on a frame-by-frame basis. It is to be noted that, in the present embodiment, the sampling circuit 111 forms first and second data strings D[l h1 to l hm ] B and D[l v1 to l vm ] B , indicative of black shading characteristics detected from the imaging output signal obtained from the imaging device 101 by carrying out imaging without any light falling on the imaging surface, and forms first and second data strings D[l h1 to l hm ] W and D[l v1 to l vm ] W , indicative of white shading characteristics detected from the imaging output signal obtained by carrying out the imaging operation with light of uniform light intensity incident on all of the imaging surface, and transmits these data strings to the arithmetic device 112 for storage in the memory 113. The arithmetic device 112 calculates, from the black shading characteristics indicated by the first and second data strings D[l h1 to l hm ] B and D[l v1 to l vm ] B stored in the memory 113, a quadratic curve indicating a shading waveform in the horizontal direction and another quadratic curve indicating a shading waveform in the vertical direction. The arithmetic device 112 also calculates, from the white shading characteristics indicated by the first and second data strings D[l h1 to l hm ] W and D[l v1 to l vm ] W stored in the memory 113, a quadratic curve indicating a shading waveform in the horizontal direction and another quadratic curve indicating a shading waveform in the vertical direction. The arithmetic operation performed by the arithmetic device 112 to find the quadratic curves may comprise fitting a quadratic curve (y=ax²+bx+c) to the data strings obtained in the above-described manner by the sampling circuit 111 by a least squares method. Thus, the sum of the squares of the deviations or errors E when the curve y=ax²+bx+c is fitted to a number r of waveform sampling data (x₁, y₁), (x₂, y₂), ..., (x r , y r ) is given by For minimizing the sum of the squares of the errors E, it suffices if ∂E ∂ a =0 ∂E ∂ b =0 ∂E ∂ c =0 that is if the results of partial differentiation of E with respect to coefficients a, b and c are equal to zero. The coefficients a and b may be represented by the equations and The coefficients C₀ to C₆ in Equations (3) and (4) are given by: and If an equal sampling interval is used, and x i is normalized, x i =i, so that the coefficients C₀ to C₆ in Equations (3) and (4) become functions of n. With a sampling interval of s, the coefficients a and b may be expressed by the equations and The coefficients C₀ to C₇ in Equations (12) and (13) above have been reduced and, for the members r of the sampling data, assume for example the values shown in the following table: number of data coefficients n C₀ C₁ C₂ C₃ C₄ C₅ C₆ C₇ 1 0 0 0 0 0 0 0 0 2 0 6 -9 3 0 -18 27 -9 3 2 10 -12 3 2 -42 49 -12 4 4 5 -5 1 20 -135 129 -25 5 14 7 -6 1 70 -231 187 -30 6 112 28 -21 3 560 -1092 767 -105 7 84 12 -8 1 84 -108 67 -8 8 168 15 -9 1 168 -153 85 -9 9 924 55 -30 3 4620 -3135 1577 -150 10 528 22 -11 1 2640 -1386 637 -55 11 858 26 -12 1 1430 -598 253 -20 12 4004 91 -39 3 4004 -1365 535 -39 13 2002 35 -14 1 2002 -567 207 -14 14 2912 40 -15 1 14560 -3480 1189 -75 15 12376 136 -48 3 61880 -12548 4061 -240 The arithmetic device 112 calculates coefficients a HB and b HB of the quadratic curve fitted to the horizontal shading waveform of the black shading characteristics, indicated by the first and second data strings D[l h1 to l hm ] B and D[l v1 to l vm ] B stored in the memory 113, and coefficients a VB and b VB of the quadratic curve fitted to the vertical shading waveform of the black shading characteristics, and stores these coefficients a HB' b HB , a VB and b VB in the memory 113. Also, the arithmetic device 112 calculates coefficients a HW and b HW of the quadratic curve fitted to the horizontal shading waveform of the white shading characteristics, indicated by the first and second data strings D[l h1 to l hm ] W and D[l v1 to l vm ] W stored in the memory 113, and coefficients a VW and b VW of the quadratic curve fitted to the vertical shading waveform of the white shading characteristics, and stores these coefficients a HW , b HW , a VB and b VB in the memory 113. In this manner, during the shading detecting mode of operation, that is the mode of detecting the shading characteristics, the arithmetic device 112 calculates the coefficients a HB , b HB , a VB and b VB of the quadratic curves fitted to the shading waveforms in the horizontal and vertical directions of the black shading characteristics, and the coefficients a HW , b HW , a VW and b VW of the quadratic curves fitted to the shading waveforms in the horizontal and vertical directions of the white shading characteristics, and stores these coefficients in the memory 113. When the system controller then causes the shading correcting mode of operation, that is the mode of correcting the shading characteristics, to be entered, the arithmetic unit 112 reads out from the memory 113 the coefficients a h , b H , a V and b V stored in the memory 113 during operation of the mode of detecting the shading characteristics, and transmits these coefficients to the level controllers 116H, 117H, 116V and 117V. The level controller 116H processes the sawtooth signal for the horizontal scanning period, outputted by the sawtooth signal generator 114H, in accordance with a level control operation consistent with the coefficient b H of the first order term of the quadratic curve fitted to the shading waveform in the horizontal direction of the shading characteristics. The level controller 117H processes the parabolic signal of the horizontal scanning period, outputted by the parabolic signal generator 115H, in accordance with a level control operation consistent with the coefficient a H of the second order term of the quadratic curve fitted to the shading waveform in the horizontal direction. The level controller 116V processes the sawtooth signal for the vertical scanning period, outputted from the sawtooth signal generator 114V, in accordance with a level control operation consistent with the coefficient b V of the first order term of the quadratic curve fitted to the shading waveform in the vertical direction of the shading characteristics. The level controller 117V processes the parabolic signal for the vertical scanning period, outputted by the parabolic signal generator 115V, in accordance with a level control operation consistent with the coefficient aV of the second order term of the quadratic curve fitted to the shading waveform in the vertical direction. The adder 118H sums together the sawtooth signal processed by the level control circuit 116H in accordance with the level control operation consistent with the coefficient b H , and the parabolic signal processed by the level control circuit 117H in accordance with the level control operation consistent with the coefficient a H , to from a shading correction signal for the horizontal direction. The adder 118V sums together the sawtooth signal processed by the level control circuit 116V in accordance with the level control operation consistent with the coefficient b V , and the parabolic signal processed by the level control circuit 117V in accordance with the level control operation consistent with the coefficient a V , to form a shading correction signal for the vertical direction. The adder 118 sums the horizontal and vertical shading correction signals, formed as described above by the adders 118H and 118V, respectively, to form a shading correction signal for the entire frame. The shading correction signal thereby formed by the adder 118 is supplied to the correction circuit 103. In the present embodiment, the shading correction signal forming section 110 includes a processing system for forming a black shading correction signal on the basis of the coefficients a HB , b HB , a VB and b VB of the curves approximating to the black shading waveform, and a processing system for forming a white shading correction signal on the basis of the coefficients a HW , b HW , a VW and b VW of the curves approximating to the white shading waveform. The black shading correction signal and the white shading correction signal are supplied to the correction circuit 103. The correction circuit 103 processes the imaging output signal supplied by the imaging device 101 via the preamplifier 102 by adding the above-mentioned black shading correction signals thereto to perform black shading correction. The circuit 103 also processes the imaging output signal supplied by the imaging device 101 by multiplying it by the white shading correction signal to perform white shading correction. The imaging output signal thus subjected by the correction circuit 103 to black shading correction processing and white shading correction processing is digitized by the A/D converter 105 so as to be supplied as shading corrected imaging output data to the downstream signal processing circuits (not shown). It is to be noted that the circuit construction of the sawtooth signal generators 114H, 114V, as well as of the parabolic signal generators 115H, 115V, would be simpler if use were made of a digital design or a configuration other than of generators used in an analog design or a configuration using operational amplifiers or gain control amplifiers. A digital design of the sawtooth signal generators 114H and 114V may be achieved by using counters. For example, as shown in Fig. 9, a digital design for each of the sawtooth generators 114H and 114V may be achieved by using first and second counters 121, 122, a subtraction circuit (subtractor) 123 and an exclusive OR circuit 124. The counters 121, 122 of the sawtooth signal generators are reset (at reset inputs R thereof) by reset pulses at the repetition period of the output sawtooth signal to count clock pulses X at a repetition period corresponding to the pixel pitch. That is, for forming the sawtooth signal for the horizontal scanning period, the counters 121, 122 are reset by rest pulses at the horizontal scanning period for counting clock pulses at a repetition period corresponding to the pixel pitch in the horizontal direction. For forming the sawtooth signal at the vertical scanning period, the counters 121, 122 are reset by reset pulses at the vertical scanning period for counting clock pulses at a repetition period corresponding to the pixel pitch in the vertical direction, that is the horizontal scanning period. The first counter 121 has a carry output terminal (CRY) thereof connected to a load input terminal (LOAD) thereof, and coefficient data supplied to a data input terminal (DATA) thereof are loaded at the timing of the carry output. The coefficient data represent the gradient or inclination of the output sawtooth signal. The coefficients b HB , b VB , b HW and b VW , calculated by the arithmetic device 112 during the mode of detecting the shading characteristics, are used as the coefficient data. The first counter 121 transmits the carry output to an enable input terminal (EN) of the second counter 122 at a repetition period consistent with the loaded coefficient data. The second counter 122 counts the clock pulses X each time a carry output of the first counter 121 is supplied to the enable input terminal of the counter 122 to output sawtooth signal data y SW having a gradient 1/b corresponding to the coefficient data b. The sawtooth signal data y SW , formed by the second counter 122, are supplied to the subtractor 123, in which the value n/2b is subtracted from the data y SW to remove the d c component and provide a sawtooth signal output as shown in Fig. 10. (Fig. 10 shows two such signals, namely one for b=1, represented by a full line, and one for b=2, represented by a dashed line.) The above-mentioned value n stands for the total number of pixels per scanning line when the sawtooth signal at the horizontal scanning period is to be formed, and the total number of pixels in each frame when the sawtooth signal at the vertical scanning period is to be formed. The sawtooth signal data y SWO , thus freed of the d c component by the subtractor 123, and represented by Y SWO = 1 b x - n 2b is outputted, after polarity data are provided thereto in the exclusive OR circuit 124. A digital configuration or design for each of the parabolic signal generators 115H, 115V may be achieved, as shown by way of example in Fig. 11, by using a sawtooth signal generator 131, an integrating circuit 132 and a subtraction circuit 133. The sawtooth signal generator 131 is constituted by a first counter 134, which has a data input terminal (DATA) thereof supplied with coefficient data representing the gradient of the output sawtooth signal, and a second counter 135, which has an enable input terminal (EN) thereof supplied with a carry output (CRY) of the first counter 134. The counters 134, 135 are reset (at reset inputs R thereof) by reset pulses at the repetition period of the parabolic signals generated by the parabolic signal generator of digital configuration to count clock pulses X at a repetition period corresponding to the pixel pitch. Thus, when forming the parabolic signal at the horizontal scanning period, the counters 134, 135 are reset by reset pulses at the horizontal scanning period to count clock pulses of a repetition period corresponding to the horizontal pixel pitch. On the other hand, when forming the parabolic signal at the vertical scanning period, the counters 134, 135 are reset by reset pulses at the vertical scanning period to count clock pulses of a repetition period corresponding to the pixel pitch in the vertical direction, that is the vertical scanning period. The first counter 134 has its carry output terminal (CRY) connected to a load input terminal (LOAD) thereof, and the input coefficient data supplied to its data input terminal (DATA) is loaded at the timing of the carry output. The coefficient data, as mentioned above, represent the gradient or inclination of the output sawtooth signal. The coefficients a HB , a VB , a HW and a VW , calculated by the arithmetic unit 112 during the mode of detecting the shading characteristics, are used as the coefficient data. The counter 134 transmits the carry output to the enable input terminal (EN) of the second counter 135 at a repetition period consistent with the loaded coefficient data. The second counter 135 counts the clock pulses X each time a carry output of the first counter 124 is supplied to the enable input terminal of the counter 135 to output sawtooth signal data y SW , represented by the equation y SW = 1 a x having a gradient 1/a consistent with the coefficient data a. The sawtooth signal outputted by the sawtooth signal generator 131 is shown by a straight line in Fig. 12. (More precisely, two such sawtooth signals are shown in Fig. 12, namely one for a=1, represented by a full straight line, and one for a=2, represented by a dashed straight line.) The integrating circuit 132 for integrating the sawtooth signal data y SW from the sawtooth signal generator 131 is constituted by an adder (addition circuit) 136 supplied with the data y SW , a latch (latch circuit) 137 for latching an addition output from the adder 136, and a subtractor (subtraction circuit) 139 supplied with the data y SW via a 1/2 (one half) multiplier 138. The latch 137 transmits latch output data thereof to the adder 136 and to the subtractor 139. In operation of the above-described integration circuit 132, the adder 136 adds the sawtooth signal data y SW from the sawtooth signal generator 131 to the latch output data from the latch 137, and the addition output is latched for cumulatively adding the sawtooth signal data y SW . The subtractor 139 subtracts sawtooth signal data y SW /2, supplied via the 1/2 multiplier 138, from the latch output data of the latch 137 (that is, the cumulative sum data of the sawtooth signal data y SW ) to form parabolic signal data represent by the equation y pb The parabolic signal data y pb generated by the integrating circuit 132 are supplied to the subtraction circuit 133, where the value n/3a is subtracted from the data y pb . Thus, parabolic signal data Y pbo freed of d c components, as represented by the equation Y pbo = 1 2a × 2 - n 3a and as shown by a curved line in Fig. 12, are outputted. (More precisely, two such parabolic signals are shown in Fig. 12, namely one for a=1, represented by a full curved line, and one for a=2, represented by a dashed curved line.) The symbol n used in the above equations represents the total number of pixels per scanning line and the total number of scanning lines per frame, according to whether the sawtooth signal for the horizontal scanning period or the sawtooth signal for the vertical scanning period, respectively, are being formed. The sawtooth signal data y SWO and the parabolic signal data y pbo , formed by the sawtooth signal generator and the parabolic signal generator of digital circuit configuration, respectively, may be summed together to provide a digital shading correction signal or signals. That digital shading correction signal or signals may be converted by digital to analog converting means into a corresponding analog signal or signals and supplied to the correction circuit 103. The correction circuit 103 may if desired be designed to have a digital configuration and be provided downstream of the A/D converter 105 to perform the shading correction in a digital fashion, though this involves a complicated processing operation in the vicinity of the knee point in the preknee processing operation. In addition, the circuit is increased in size as regards black shading correction because a subtraction operation needs to be performed after the shading correction signal is multiplied by a gain after gain switching on the analog side. In the present embodiment, the shading correction signal forming section 110 checks whether the shading correction error in the shading corrected imaging output data for the shading correction mode is not more than a predetermined value stored in the memory 113. If the shading correction error is larger than the predetermined value, the signal forming section 110 causes the gains of the iris control circuit 108 and the preamplifier 102 to be changed to reduce the error and, using these changed (renewed) gains, repeats the operation of the shading detecting mode to store coefficient data which will give a shading correction error not larger than the predetermined value. In this way, the imaging signal from the imaging device 101 may be subjected to optimum shading correcting processing. With the above-described shading correction apparatus embodying the invention, black and/or white shading characteristics may be detected by digital processing of imaging output signals obtained from an imaging device comprising an array of a large number of pixels in a matrix configuration with no light falling on the imaging device and with light of uniform light intensity incident on all of an imaging surface of the imaging device, according to which sawtooth signals and parabolic signals having the levels necessary for shading correction may be formed automatically. By sampling imaging output signal level data of the pixels of the imaging device at a predetermined interval in both the vertical and horizontal directions, shading characteristics of the imaging output signal of the imaging device may be detected on the basis of first and second data strings each having a reduced data amount or volume, so that the shading characteristics may be detected using a memory of a reduced storage capacity. Thus, in accordance with the present embodiment, which provides a shading correcting apparatus in which an imaging output signal from the imaging device is subjected to shading correcting processing by means of sawtooth signals from sawtooth signal generators and parabolic signals from parabolic signal generators, satisfactory shading correction may be performed quickly and reliably by a simple circuit. References in the foregoing description and in the appended claims to a shading signal component being eliminated from an output signal of an image pick-up device (imaging device) are to be construed as covering both complete and partial elimination.

Claims: A shading correction apparatus for eliminating a black shading signal component from an output signal of an image pick-up device (1) having a plurality of pixels, the apparatus comprising: exposure control means (28) for controlling an exposure level of the image pick-up device (1); analog to digital converting means (12) for converting an output signal of the image pick-up device (1) into a digital video signal; shading correction data generating means (17) for generating first and second black shading correction data by integrating said digital video signals outputted from predetermined ones of said pixels of the image pick-up device (1) in horizontal and vertical directions, respectively, while the exposure control means (28) is operative to control said exposure level to be at zero level; memory means (18) for memorizing said first and second black shading correction data; shading correction signal generating means (17) for generating a black shading correction signal according to said first and second black shading correction data read out from the memory means (18); and signal processing means (3) for processing an output signal produced by the image pick-up device (1) while the image pick-up device is exposed to pick up an image, said signal processing means (3) comprising subtracting means (8) for subtracting said black shading correction signal from said output signal produced by the image pick-up device (1) while the image pick-up device is exposed to pick up an image so that said shading signal component is eliminated from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image. A shading correction apparatus according to claim 1, for eliminating black shading signal components from output signals of first, second and third charge coupled image pick-up devices (1R, 1G, 1B) of an image pick-up means, each of which devices has a plurality of pixels, wherein: the exposure control means (28) is operative to control the exposure level of the image pick-up means; the analog to digital converting means (12R, 12G, 12B) is operative to convert output signals of the first, second and third charge coupled devices (1R, 1G, 1B) into digital video signals; the shading correction data generating means (17) is operative to generate said first and second black shading correction data by integrating said digital video signals outputted from predetermined ones of said pixels of said first, second and third charge coupled devices (1R, 1G, 1B)in point sequential manner while the exposure control means (28) is operative to control the exposure level of the image pick-up means to be at zero level; the shading correction signal generating means (17) is operative to generate a respective said black shading correction signal for each of the charge coupled devices (1R, 1G, 1B) according to said black shading correction data read out from the memory means (18); and the signal processing means (3) comprises first, second and third subtracting means (8R, 8G, 8B) each operative to subtract a respective one of said black shading correction signals from a respective one of said output signals produced by the first, second and third charge coupled devices (1R, 1G, 1B) while the image pick-up means is exposed to pick up an image. A shading correction apparatus for eliminating a white shading signal component from an output signal of an image pick-up device (1) having a plurality of pixels, the apparatus comprising: exposure control means (28) for controlling an exposure level of the image pick-up device (1); analog to digital converting means (12) for converting an output signal of the image pick-up device (1) into a digital video signal; shading correction data generating means (17) for generating first and second white shading correction data by integrating said digital video signals outputted from predetermined ones of said pixels of the image pick up device (1) in horizontal and vertical directions, respectively, while the exposure control means (28) is operative to control said exposure level such that the image pick-up device is uniformly exposed; memory means (18) for memorizing said first and second shading correction data; shading correction signal generating means (17) for generating a white shading correction signal according to said first and second white shading correction data read out from the memory means (18); and signal processing means (3) for processing an output signal produced by the image pick-up device (1) while the image pick-up device is exposed to pick up an image, said signal processing means (3) comprising dividing means (10) for dividing said output signal, produced by the image pick-up device (1) while the image pick-up device is exposed to pick up an image, by said white shading correction signal so that said white shading signal component is eliminated from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image. A shading correction apparatus according to claim 3, for eliminating white shading signal components from output signals of first, second and third charge coupled image pick-up devices (1R, 1G, 1B) of an image pick-up means, each of which devices has a plurality of pixels, wherein: the exposure control means (28) is operative to control the exposure level of the image pick-up means; the analog to digital converting means (12R, 12G, 12B) is operative to convert output signals of the first, second and third charge coupled devices (1R, 1G, 1B) into digital video signals; the shading correction data generating means (17) is operative to generate said first and second white shading correction data by integrating said digital video signals outputted from predetermined ones of said pixels of said first, second and third charge coupled devices (1R, 1G, 1B) in point sequential manner while the exposure control means (28) is operative to control the exposure level of the image pick-up means such that the image pick-up means is uniformly exposed; the shading correction signal generating means (17) is operative to generate a respective said white shading correction signal for each of the charge coupled devices (1R, 1G, 1B) according to said white shading correction data read out from the memory means (18); and the signal processing means (3) comprises first, second and third dividing means (10R, 10G, 10B) each operative to divide the output signal produced by a respective one of first, second and third charge coupled devices (1R, 1G, 1B) while the image pick-up means is exposed to pick up an image by a respective one of said white shading correction signals. A shading correction apparatus for eliminating a shading signal component from an output signal of an image pick-up device (101) having a plurality of pixels, the apparatus comprising: exposure control means (108) for controlling an exposure level of the image pick-up device (101); analog to digital converting means (105) for converting an output signal of the image pick-up device (101) into a digital video signal; sampling means (111) for sampling said digital video signal in vertical and horizontal directions at predetermined intervals while the exposure control means (108) is operative to control said exposure level to be at zero level or while the exposure control means (108) is operative to control said exposure level such that the image pick-up device is uniformly exposed; quadratic curve generating means (112) for generating first and second quadratic curves according to said digital video signal as sampled in the vertical and horizontal directions; sawtooth signal generating means (114) for generating a sawtooth signal; parabolic signal generating means (115) for generating a parabolic signal; first level control means (116) for controlling the level of said sawtooth signal according to coefficients of a second order term of said first and second quadratic curves; second level control means (117) for controlling the level of said parabolic signal according to coefficients of a first order term of said first and second quadratic curves; and signal processing means (103) for processing an output signal produced by the image pick-up device (101) while the image pick-up device is exposed to pick up an image, according to output signals of the first and second level control means (116, 117), so that said shading signal component is eliminated from said output signal produced by the image pick-up device while the image pick-up device is exposed to pick up an image. A shading correction apparatus according to claim 5, wherein the signal processing means (103) is operative to process said output signal by subtracting from said output signal, or dividing said output signal by, a shading correction signal derived (118) from said output signals of the first and second level control means (116, 117).

Inventors: ASAIDA TAKASHI C O PATENTS DIV, SUDO FUMIHIKO C O PATENTS DIVI, ASAIDA, TAKASHI, C/O PATENTS DIVISION, SUDO, FUMIHIKO, C/O PATENTS DIVISION
Applicants: SONY CORP, SONY CORPORATION
Application year: 1991
Main classification: H04N5
IPC codes: H04N5