AC/DC power converting apparatus

Abstract: A DC-to-AC electric power converting apparatus comprising: an inverter circuit (14) having a plurality of switching elements and converting DC electric power into AC electric power; a transformer (2A) connected to the inverter circuit (14); a cyclo-converter circuit (15) for converting the frequency of the output from the transformer (2A); a carrier signal generator (6A) for generating a carrier signal of a predetermined frequency; an inverter switching circuit (17A) for controlling the switching operation of a plurality of the switching elements of the inverter circuit (14) in synchronization with the carrier signal and switching a plurality of the switching elements of the inverter circuit (14) in a period in which an electric current is not substantially passed through the inverter circuit (14); a reference voltage signal generating circuit (16) for generating a reference voltage signal for the AC voltage to be transmitted from the cyclo-converter circuit (15); and a switching signal generating circuit (18A) for generating a control signal for controlling the cyclo-converter circuit (15) in response to the reference voltage signal generated by the reference voltage signal generating circuit (16) and the carrier signal generated by the carrier signal generator (6A).

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a DC-to-AC electric power converting apparatus according to the preamble of claim 1. Such a DC-to-AC electric power converting apparatus is known from Intelec, 89 Conf. Proceedings, 15 Oct. 1989, FIRENZE Article 19.1, page 1-6, Muroyama : "A control method for a high frequency link inverter using cycloconverter techniques". More particularly, the present invention relates to an electric power converting apparatus of a high frequency intermediate link system in which high frequency electric power is transmitted/received via an insulating transformer. Description of the Related Art The structure of a conventional apparatus will be described with reference to Fig. 15. Fig. 15 is a block diagram of a conventional DC-to-Ac power converting apparatus as disclosed in IEEE PESC '88 Record, pp658-663, 1988. Referring to the drawing, reference numeral 1 represents an inverter circuit, 2 represents a transformer the input of which is connected to the inverter circuit 1 and 3 represents a cyclo-converter circuit connected to the output of the transformer 2. Reference numeral 4 represents a filter circuit connected to the output of the cyclo-converter circuit 3 and 5 represents a current detector for detecting the output current from the cyclo-converter circuit 3. Reference numeral 6 represents a carrier signal generator, 7 represents a reference voltage signal generating circuit and 8 represents an absolute circuit. Reference numeral 9 represents a PWM circuit, 10 represents an inverter switching circuit and 11 represents a cyclo-converter switching circuit. The inverter circuit 1 comprises four semiconductor switching devices S₁ to S₄, while the cyclo-converter circuit 3 comprises four semiconductor switching devices S₅, S₆, S 5A and S 6A . The transformer 2 is arranged in such a manner that the turn ratio of the primary coil and the secondary coil is 1:2 and an intermediate tap is formed at the midpoint of the secondary coil. The filter circuit 4 is an LC filter circuit comprising a reactor and a capacitor. Reference numerals 12 and 13 respectively represent a DC power source and a load circuit connected to the DC-to-AC electric power converting apparatus. Then, the operation of the above-described conventional apparatus will be described with reference to Fig. 16. As shown in the uppermost portion of Fig. 16, reference voltage signal V* in the sine waveform transmitted from the reference voltage signal generating circuit 7 is converted into absolute signal |V*| by the absolute circuit 8. The absolute signal |V*| is, together with a carrier signal transmitted from the carrier signal generator 6, supplied to the PWM circuit 9. As a result, the PWM circuit 9 transmits two types binary signals T a and T b . That is, the binary signal T a , the level of which is changed in synchronization with the timing at which the amplitude of the absolute signal |V*| and that of the carrier signal are allowed to coincide with each other, and the binary signal T b , the level of which is changed in synchronization with the last transition of the carrier signal, are transmitted. Then, the binary signal T a and T b are supplied to the inverter switching circuit 10 so that ON/OFF signals T₁ to T₄ for switching on/off the four semiconductor switching devices S₁ to S₄ constituting the inverter circuit 1 are transmitted. That is, the ON/OFF signals T₁ and T₃ are the same as the binary signals T b and T a , respectively. The ON/OFF signals T₂ and T₄ are the signals obtained by respectively inverting the sign of the binary signals T b and T a . When the level of the ON/OFF signals T₁ to T₄ is high, the corresponding semiconductor switching devices S₁ to S₄ are switched on. When the same is low, the corresponding semiconductor switching devices S₁ to S₄ are switched off. As a result of the structure shown in Fig. 15, the relationships among the semiconductor switching devices S₁ to S₄ and the secondary voltage V₂ of the transformer 2 are expressed as follows: When the switches S₁ and S₃ are switched on: V₂ = 0 When the switches S₁ and S₄ are switched on: V₂ = V dc When the switches S₂ and S₃ are switched on: V₂ = - V dc When the switches S₂ and S₄ are switched on: V₂ = 0 where symbol V dc denotes the DC output voltage from the DC power source 12. Therefore, when the semiconductor switching devices S₁ to S₄ constituting the inverter circuit 1 are switched on/off in response to the ON/OFF signals T₁ to T₄, V₂ becomes AC voltage the pulse width of which has been modulated as shown in Fig. 16. When the binary signal T b , the reference voltage signal V* and output current i cc from the cyclo-converter circuit 3 transmitted from the current detector 5 are supplied to the cyclo-converter switching circuit 11, ON/OFF signals T₅, T₆, T 5A and T 6A for respectively switching on/off the four semiconductor switching devices S₅, S₆, S 5A and S 6A constituting the cyclo-converter circuit 3 are transmitted from the cyclo-converter switching circuit 11. It is assumed that the polarity of the output current i cc is defined in such a manner that the direction, in which the output current i cc is supplied to the load circuit 13, is positive. When the polarity of the i cc is positive, the semiconductor switching device S₅ or S₆ is switched on/off. When the same is negative, S 5A or S 6A is switched on/off. As a result of the structure arranged as shown in Fig. 15, the relationship between the output voltage V cc from the cyclo-converter circuit 3 and the secondary voltage V₂ of the transformer 2 is expressed as follows: When S₅ or S 5A is switched on: V cc = V₂ When S₆ or S 6A is switched on: V cc = - V₂ Therefore, when the ON/OFF signal T₅ or T 5A is made the same as the binary signal T b and as well the ON/OFF signal T₆ or T 6A is made the signal formed by inverting the sign of the binary signal Tb, the polarity of V cc becomes positive. When the ON/OFF signal T₅ or T 5a is made the signal formed by inverting the sign of the binary signal T b and as well the ON/OFF signal T₆ or T 6A is made the same as the binary signal T b , the polarity of V cc becomes negative. As a result, the cyclo-converter switching circuit 11 discriminates the polarity of the reference voltage signal V* and the output current i cc from the cyclo-converter circuit 3 respectively supplied from the reference voltage signal generating circuit 7 and the current detector 5. Thus, the ON/OFF signals T₅, T₆, T 5A and T 6A as shown in Fig. 16 are generated from the binary signal T b supplied from the PWM circuit 9 in accordance with the thus discriminated polarity. In accordance with this, sine-wave voltage, the pulse width of which has been modulated and which is as shown in the lowermost portion of Fig. 16, can be obtained as the output voltage V cc from the cyclo-converter 3. When the obtained output voltage V cc is then supplied to the filter circuit 4, sine-wave voltage V L from which the high frequency component has been eliminated due to the PWM operation is supplied to the load circuit 13. When the frequency of the carrier signal is raised sufficiently with respect to the frequency of the reference voltage signal V* at this time, the load voltage V L to be supplied to the load circuit 13 becomes the voltage from which the high frequency component has been sufficiently removed due to the PWM operation and the amplitude and the phase thereof have been made substantially the same as those of the reference voltage signal V*. Fig. 16 illustrates a switching pattern when the load circuit 13 has been made the linear load of the delay power factor. Then, electric currents which respectively pass through each of the switching elements of the inverter circuit 1 and the cyclo-converter circuit 3 will now be considered. Since the electric current output from the cyclo-converter 3 continuously passes, the electric current is not turned on/off at the moment at which each of the switching elements is switched off. As a result, it commutates to another switching element which is switched on. In the cyclo-converter circuit 3, since a pair is formed by the switches S₅ and S₆ and another pair is formed by the switches S 5A and S 6A , the electric current is complementarily commutates to each other. For example, when the switch S₅ switches off the electric current, the current commutates to the switch S₆ which is switched on. On the contrary, when the switch S 5A switches off the electric current, the current commutates to the switch S 6A . In the inverter circuit 1, the electric current circulates in the inverter circuit 1 when V₂ = 0 in Equation (1). On the contrary, the electric current passes through the DC power source 12 when V₂ = V dc or - V dc . For example, when the switch S₄ switches off the electric current in a state where the electric current passes because the switches S₁ and S₄ are switched on, the electric current commutates to the switch S₃ which is switched on. As described above, the conventional DC-to-AC electric power converting apparatus receives DC electric power and transmits AC electric power in accordance to the reference voltage signal. The above-described DC-to-AC electric power converting apparatus is usually called "a high frequency intermediate link type electric power converting apparatus" since the high frequency electric power is supplied/received via a transformer. There has been known a fact that a structure, in which the high frequency intermediate link type electric power converting apparatus is employed in an AC power source apparatus such as the uninterruptive power supply system, will enable the size and the weight of the insulating transformer and the filter circuit to be reduced. However, the conventional DC/AC power converting apparatus encounters problems in that the conversion efficiency is unsatisfactory and the switching frequency cannot be raised due to large switching loss generated because the switching elements of the inverter circuit and the cyclo-converter circuit switch on/off the electric current. Furthermore, there arises another problem of generating voltage surge due to switching. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide DC/AC power converting apparatus exhibiting small switching loss, high conversion efficiency and reduced voltage surge. According to the present invention, there is provided a DC-to-AC electric power converting apparatus of the initially defined type having the characterizing features of claim 1. Preferred embodiments are listed in the dependent claims. Other and further objects, features and advantages of the invention will be appear more fully from the following description. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram which illustrates a first embodiment of the present invention; Fig. 2 is a block diagram which illustrates an inverter circuit, a transformer and a cyclo-converter circuit according to the first embodiment; Fig. 3 is a block diagram which illustrates an inverter switching circuit according to the first embodiment; Fig. 4 is a block diagram which illustrates a switching signal generating circuit according to the first embodiment; Fig. 5 is a timing chart which illustrates the operation of the first embodiment; Fig. 6 is a block diagram which illustrates a second embodiment of the present invention; Fig. 7 is a block diagram which illustrates a cyclo-converter circuit and a filter circuit according to the second embodiment; Fig. 8 is a block diagram which illustrates a first switching signal generating circuit according to the second embodiment; Fig. 9 is a block diagram which illustrates a second switching signal generating circuit according to the second embodiment; Fig. 10 is a timing chart which illustrates the operation of the second embodiment; Fig. 11 is a block diagram which illustrates a third embodiment of the present invention; Fig. 12 is a block diagram which illustrates an inverter switching circuit according to a third embodiment; Fig. 13 is a block diagram which illustrates a switching signal generating circuit according to the third embodiment; Fig. 14 is a timing chart which illustrates the operation of the third embodiment; Fig. 15 is a block diagram which illustrates a conventional DC-to-AC electric power converting apparatus; and Fig. 16 is a timing chart which illustrates the operation of the DC-to-Ac electric power converting apparatus shown in Fig. 15. DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will now be described with reference to the drawings. Figs. 1 to 5 illustrate a first embodiment of the present invention, where Fig. 1 illustrates the structure of the first embodiment. Referring to Fig. 1, reference numeral 2A represents a transformer, 6A represents a carrier signal generator, 14 represents an inverter circuit and 15 represents a cyclo-converter circuit. Reference numeral 16 represents a reference voltage signal generating circuit and 17A represents an inverter switching circuit. Reference numeral 18A represents a switching signal generating circuit. The filter circuit 4, the DC power source 12 and the load circuit 13 are the same as those for the conventional structure. Fig. 2 illustrates the detailed structure of each of the inverter circuit 14, the transformer 2A and the cyclo-converter circuit 15. The inverter circuit 14 comprises input terminals 141 and 142 connected to the DC power source 12, semiconductor switching devices S₁ to S₄ such as transistors and MOSFETs, diodes D₁ to D₄ connected to the respective switching devices S₁ to S₄ in an inverted parallel manner and output terminals 143 and 144. The transformer 2A comprises primary coil terminals 21 and 22 connected to the output terminals 143 and 144 of the inverter circuit 14 and secondary coil terminals 23 and 24, the transformer 2A having a transformation ratio of 1:1. The cyclo-converter circuit 15 comprises input terminals 151 and 152 connected to the secondary coil terminals 23 and 24 of the transformer 2A, semiconductor switching devices S₅ to S₈ and S 5A to S 8A such as transistors and MOSFETs, diodes D₅ to D₈ and D 5A to D 8A connected to the above-described switching devices S₅ to S₈ and S 5A to S 8A in an inverted parallel manner and output terminals 153 and 154 connected to the filter circuit 4. The above-described two semiconductor switching devices S n and S nA (n = 5 to 8) and diodes D n and D nA (n = 5 to 8) connected to the two semiconductor switching devices S n and S nA (n = 5 to 8) constitute bidirectional switches each of which is arranged in such a manner that the direction, through which electric power is supplied, can be controlled. Fig. 3 illustrates the detailed structure of the inverter switching circuit 17A which comprises an input terminal 170 connected to the carrier signal generator 6A, a peak detecting circuit 171 for detecting the peak of the signal supplied to the input terminal 170, a 1/2 divider 172 the polarity of the output signal from which is inverted in synchronization with the output from the peak detecting circuit 171, NOT circuit 173 connected to the 1/2 divider 172 and output terminals 174 to 177. Fig. 4 illustrates the detailed structure of the switching signal generating circuit 18A which comprises an input terminal 200 connected to the carrier signal generator 6A, an input terminal 201 connected to the reference voltage signal generating circuit 16, an absolute circuit 202, a comparator 203 constituted in such a manner that it transmits an output signal having a narrow width at an intersection between the last transition slope of the carrier signal V p and the reference voltage signal |V cc *|, a comparator 205 constituted in such a manner that it transmits an output signal having a narrow width at an intersection between the first transition slope of the carrier signal V p and the reference voltage signal |V cc *|, NOT circuits 207, 208 and 210, 1/2 dividers 204 and 206 the polarity of the output from which is inverted in synchronization with the last transition of the input signal, a polarity discriminating circuit 209, AND circuits 211 to 218, OR circuits 219 to 222 and output terminals 223 to 226. Then, the operation of the above-described structure will be described with reference to a timing chart shown in Fig. 5. First, carrier signal V p in the triangular form as shown in the uppermost portion of Fig. 5 is transmitted from the carrier signal generator 6A. Then, ON/OFF signals T₁ to T₄ the duty ratio of each of which is 50 % are transmitted from the inverter switching circuit 17A due to the following operation: referring to Fig. 3, the carrier signal V p is supplied via the input terminal 170, signal synchronized with the peak of the carrier signal V p is input to the 1/2 divider 172 by the peak detecting circuit 171, signal T x shown in Fig. 5 is transmitted from the 1/2 divider 172, while signal T y formed by inverting the sign of the signal T x is transmitted from the NOT circuit 173. As a result, the signal T x serving as the ON/OFF signals T₁ and T₄ are transmitted through the output terminals 174 and 175, while the signal T y serving as the ON/OFF signals T₂ and T₃ are transmitted through the output terminals 176 and 177. When the level of each of the ON/OFF signals T₁ to T₄ is high, the corresponding semiconductor switching devices S₁ to S₄ of the inverter circuit 14 shown in Fig.2 are switched on, while the same are switched off when the above-described level is low. As a result of the structure shown in Fig. 2, the relationships among the semiconductor switching devices S₁ to S₄ and the secondary voltage V₂ of the transformer 2A are expressed as follows: When the switches S₁ and S₄ are switched on: V₂ = V dc When the switches S₂ and S₃ are switched on: V₂ = - V dc where symbol V dc denotes the DC output voltage from the DC power source 12. Therefore, the secondary voltage V₂ becomes rectangular wave voltage the duty ratio of which is 50 % as shown in Fig. 5. On the other hand, reference voltage signal V cc *, which denotes the voltage to be transmitted from the cyclo-converter circuit 15, is transmitted from the reference voltage signal generating circuit 16 so as to be supplied to the switching signal generating circuit 18A together with the carrier signal V p . When the switching signal generating circuit 18A receives the above-described signals V cc * and V p , it transmits the switching signals T₅ to T₈, the pulse width of each of which has been modulated, as follows: referring to Fig. 4, the reference voltage signal V cc * supplied through the input terminal 201 is converted into absolute signal |V cc *| by the absolute circuit 202. The above-described absolute signal |V cc *| is divided into two portions either of which is supplied to the comparator 203 so as to be subjected to a comparison with the last transition of the carrier signal V p supplied via the input terminal 200 and the other of which is supplied to the comparator 205 so as to be subjected to a comparison with the first transition of V p . The output from the comparator 203 is transmitted to the 1/2 divider 204 which then transmits a signal T a shown in Fig. 5. The output from the comparator 205 is transmitted to the 1/2 divider 206 which then transmits signal T b shown in Fig. 5. When the signal T a is supplied to the NOT circuit 207, signal T c is transmitted. When the signal T b is supplied to the NOT circuit 208, signal T d is transmitted. Then, the relationships among the signals T a to T d and the output voltage V cc from the cyclo-converter circuit 15 will be described. When the polarity of the output voltage V cc is desired to be made positive, the switching signals T₅ to T₈ are determined in accordance with the following equations: T₅ = T a , T₆ = T d , T₇ = T c , T₈ = T b In response to the switching signals T₅ to T₈, the semiconductor switching devices S n and S nA (n = 5 to 8) constituting the bi-directional switch are switched on/off. The relationships among the operation of the semiconductor switching devices S₅ to S₈ and S 5A to S 8A and the output voltage V cc from the cyclo-converter circuit 15 are expressed by the following equations: When S₅ and S₈ (or S 5A and S 8A ) is switched on: V cc = V₂ When S₆ and S₇ (or S 6A and S 7A ) is switched on: V cc = - V₂ When S₅ and S₆ (or S 5A and S 6A ) is switched on: V cc = 0 When S₇ and S₈ (or S 7A and S 8A ) is switched on: V cc = 0 Therefore, as can be shown from Equations (4) and (5), when the levels of the signals T a and T b are respectively high and low, V cc = V₂. When the levels of the signals T a and T b are respectively low and high, V cc = - V₂. When the levels of the signals T a and T b are simultaneously high or low, V cc = 0. Therefore, the output voltage V cc from the cyclo-converter circuit 15 is, as shown in Fig. 5, subjected to the PWM operation so as to be made positive voltage. On the contrary, when the polarity of V cc is desired to be made negative, the switching signals T₅ to T₈ may be determined in accordance with the following equations: T₅ = T c , T₆ = T b , T₇ = T a , T₈ = T d Then, the operation of the switching signal generating circuit 18A will be described. The polarity discriminating circuit 209 transmits polarity signal V sgn of the reference voltage signal V cc *. Furthermore, the NOT circuit 210 transmits a signal obtained by inverting the sign of the polarity signal V sgn . The above-described signals and signals T a to T d are supplied to the OR circuits 219 to 222 via the AND circuits 211 to 218. When the polarity of the reference voltage signal V cc * is positive, the signals T a , T c , T d and T b are transmitted from the corresponding AND circuits 211, 214, 216 and 217. Therefore, the output terminals 223 to 226 transmit the switching signal T₅ to T₈ which correspond to Equation (4). Similarly, when the polarity of the reference voltage signal V cc * is negative, the switching signals T₅ to T₈ corresponding to Equation (6) are transmitted. As a result of the above-described operation, voltage V cc having the waveform formed by pulse-width-modulating the AC reference voltage signal V cc * transmitted from the reference voltage signal generating circuit 16 is transmitted from the cyclo-converter circuit 15. Furthermore, the output voltage V cc , from which its high frequency component has been removed by the filter circuit 4 connected to the output side of the cyclo-converter circuit 15, is supplied to the load circuit 13. Then, the electric currents which respectively pass through the inverter 14 and the cyclo-converter 15 will now be described with reference to Fig. 5. Output current I cc from the cyclo-converter 15 is, as shown in Fig. 5, a continuous electric current which is determined by the filter circuit 4 and the load circuit 13. The electric current which passes through the cyclo-converter 15 repeats the following two modes due to the PWM operation performed by the switching element, that is, a mode in which it passes through the cyclo-converter 15 and another mode in which it circulates in the cyclo-converter 15: (i) Passing Mode A mode in which two arms S₅ and S₈ of the cyclo-converter arms or two arms S₆ and S₇ of the same are simultaneously turned on so that the voltage V cc is transmitted. The output current I cc is transmitted from the inverter 14 via the cyclo-converter 15. (ii) Circulation Mode A mode in which two arms S₅ and S₆ of the cyclo-converter arms or two arms S₇ and S₈ of the same are simultaneously turned on so that the voltage V cc becomes zero. The output current I cc circulates in the cyclo-converter 15 before it is transmitted. Therefore, no electric current passes through the inverter 14. Therefore, as shown in Fig. 5, the input electric current I s received by the cyclo-converter 15 passes in only a period in which the voltage V cc is transmitted. The pulse width of V cc is controlled in such a manner that its center is made to be the zero point of the carrier signal V p . Thus, its width becomes the width between two peaks of V p when the pulse width becomes largest. Therefore, by setting the gain of the reference voltage generating circuit 16 in such a manner that the maximum absolute value |V cc *| of the reference voltage signal shown in Fig. 5 is smaller than the peak value of the carrier signal V p , V cc necessarily becomes zero in the vicinity of the peak value of the carrier signal V p and also I s necessarily becomes zero. On the other hand, the ON/OFF signals T x and T y synchronize with the peak of the carrier signal V p as shown in Fig. 5, switching of the inverter 14 is necessarily performed in a period I s = 0, that is, in a period in which the electric current is not substantially passed through each arm of the inverter 14. The switching loss of the switching element of the inverter 14 relates to the electric current, which passes through the switching element, and the applied voltage. Therefore, when the level of the electric current is zero, no switching loss is generated. That is, the inverter 14 is able to be operated while preventing the switching loss. Since the surge voltage which is generated due to switching of the inverter 14 and which affects the voltage resistance of the circuit element is generated when the electric current which passes through by a quantity corresponding to the inductance of the inverter circuit 14 is interrupted, an undesirable surge voltage cannot be generated by performing the switching operation when the electric current, which passes through the switching element, is zero. Then, a second embodiment of the present invention will be described with reference to Figs. 6 to 10. According to this embodiment, a three-phase AC voltage is transmitted as an example of the cases in which a multi-phase AC output is obtained. Fig. 6 is a block diagram which illustrates the third embodiment. Referring to the drawing, reference numeral 4A represents a filter circuit, 15A represents a cyclo-converter circuit and 16A represents a reference voltage signal generating circuit. Reference numeral 18B represents a first switching signal generating circuit, 30A represents a second switching signal generating circuit and 13A represents a three-phase load circuit connected to the above-described DC-to-AC electric power converting apparatus. The other elements are the same as the elements according to the first embodiment. Fig. 7 illustrates the detailed structure of the cyclo-converter circuit 15A and that of the filter circuit 4A. The cyclo-converter circuit 15A comprises input terminals 400 and 401 connected to the secondary coil terminals 23 and 24 of the transformer 2A, semiconductor switching devices S₅ to S₁₀ and S 5A to S 10A such as transistors and MOSFETs, diodes D₅ to D₁₀ and D 5A to D 10A connected to the above-described switching devices S₅ to S₁₀ and S 5A to S 10A in an inverted parallel manner and output terminals 402 and 404 connected to the filter circuit 4A. The above-described two semiconductor switching devices S n and S nA (n = 5 to 10) and diodes D n and D nA (n = 5 to 10) connected to the two semiconductor switching devices S n and S nA (n = 5 to 10) constitute bidirectional switches each of which is arranged in such a manner that the direction, through which electric power is supplied, can be controlled. The filter circuit 4A comprises input terminals 405 to 407 respectively connected to the output terminals 402 to 404 of the cyclo-converter circuit 15A, reactors L F and condensers C F and output terminals 408 to 410. Fig. 8 illustrates the detailed structure of the first switching signal generating circuit 18B which comprises input terminals 420 to 422 connected to the reference voltage signal generating circuit 16A, an input terminal 423 connected to the carrier signal generator 6A, comparators 424 to 426, NOT circuits 430 to 432, polarity discriminating circuits 433 to 435 and output terminals 436 to 444. Fig. 9 illustrates the detailed structure of the second switching signal generating circuit 30A which comprises input terminals 450 to 455 connected to the output terminals 436 to 441 of the first switching signal generating circuit 18B, input terminals 456 to 458 connected to the output terminals 442 to 444, an input terminal 459 connected to the inverter switching circuit 17, XOR (exclusive OR) circuits 462 to 470 and output terminals 471 to 476. Then, the operation of the second embodiment will be described with reference to Fig. 10. First, the triangle shape carrier signal V p shown in the uppermost portion of Fig. 10 is transmitted from the carrier signal generator 6A. The carrier signal V p is then supplied to the inverter switching circuit 17 so that the inverter switching circuit 17 transmits the ON/OFF signals T₁ to T₄. The four semiconductor switching devices S₁ to S₄ of the inverter circuit 14 are switched on/off in response to the ON/OFF signals T₁ to T₄. As a result, the secondary voltage V₂ of the transformer 2A becomes rectangular waveform voltage the duty ratio of which is 50 % as shown in Fig. 10. Since the above-described operation is the same as that according to the first embodiment, the detailed description is omitted here. Then, three-phase (phases, u, v and w) AC reference voltage signals V ccu* , V ccv* and V ccw* are transmitted from the reference voltage signal generating circuit 16A so as to be supplied, together with the carrier signal V p , to the first switching signal generating circuit 18B. Then, the operation of the four switching devices S₅, S₆, S 5A and S 6A included in the cyclo-converter circuit 15A for controlling the voltage of the phase u will be described with reference to Fig. 10. Referring to Fig. 8, the u-phase reference voltage signal V ccu* supplied to the input terminal 420 of the first switching signal generating circuit 18B is, together with the carrier signal V p supplied to the input terminal 423, supplied to the comparator 424. As a result, the first switching signal T pu as shown in Fig. 10 is transmitted from the comparator 424. The signal T pu is supplied to the NOT circuit 430 so that the first switching signal T qu shown in Fig. 10 is transmitted. These first switching signals T pu and T qu are transmitted through the output terminals 436 and 437, respectively. The polarity of V ccu* is discriminated by the polarity discriminating circuit 433 so as to be transmitted through the output terminal 442 as u-phase voltage polarity signal V sgn . Then, the operation of the second switching signal generating circuit 30A will be described. Referring to Fig. 9, the u-phase voltage polarity signal V sgu transmitted from the first switching signal generating circuit 18B and the signal Tx, which is shown in Fig. 10, transmitted from the inverter switching circuit 17A are supplied to the XOR circuit 462 via the input terminals 456 and 459. The XOR circuit 462 transmits the signal Y u of a high level when the level of the polarity signal V sgu and that of the signal Tx are the same (that is, the polarity of the u-phase output voltage V ccu of the cyclo-converter 15A and that of the secondary voltage V₂ of the transformer 2A are the same). On the other hand, the XOR circuit 462 transmits the Y u signal of a low level when the level of the polarity signal V sgn and that of the signal Tx are different from each other. Then, the switching signals T pu and T qu transmitted from the first switching signal generating circuit 18B are supplied via the input terminals 450 and 451 so as to be supplied, together with the signal Y u , to the XOR circuits 465 and 466. In response to this, the second switching signals T₅ and T₆ which correspond to the polarity of the secondary voltage V₂ are transmitted from the XOR circuits 465 and 466 through the output terminals 471 and 472. As a result, the switching devices S₅, S₆, S 5A and S 6A are switched on/off. Then, the output voltage from the cyclo-converter circuit 15A will now be described with reference to phase u. While arranging the electric potential at the neutral point of the voltage supplied to the cyclo-converter circuit 15A, that is, the electric potential at the midpoint of the secondary coil of the transformer 2A to be the reference, voltage V uo of the u-phase output terminal 402 is expressed by the following equation: When S₅ or S 5A is switched on: V uo = V₂ 2 When S₆ or S 6A is switched on: V uo = - V₂ 2 Since the signal T₅ for switching on/off the switching elements S₅ and S 5A is generated from the PWM signal T pu and the signal T x denoting the polarity of V₂ in the above-described manner, the waveform of the voltage V uo becomes as shown in Fig. 10, the waveform being formed by pulse-width modulating in such a manner that its basic wave component becomes V ccu* corresponding to the PWM signal T pu . Also the waveforms of the v-phase output voltage V vo and the w-phase output voltage V wo become those corresponding to the reference signals V ccv* and V ccw* , respectively before they are transmitted to the v-phase output terminal 403 and the w-phase output terminal 404, respectively. The high frequency components of the output voltages V uo , V vo and V wo are removed by the filter circuit 4A before they are transmitted to the output terminals 408 to 410 so as to be supplied to the load circuit 13A. Taking note of the electric current which passes through the cyclo-converter 15A, there are the passing mode and the circulation mode similarly to the above-described first embodiment. However, since the three-phase circuit has a plurality of arms through which the electric current circulates, it circulates through the v-phase arms (S₇ and S 7A or S₈ and S 8A ), the w-phase arms (S₉ and S 9A or S₁₀ and S 10A ) or both the above-described arms in a case of, for example, the u-phase electric current I ccu circulates. However, since the sum of the three-phase electric currents is always zero (I ccu + I ccv + I ccw = 0), there is a mode in which only a portion of the u-phase electric current circulates. All of the three-phase electric currents circulate when the three arms S₅ (or S 5A ), S₇ (or S 7A ) and S₉ (or S 9A ) are simultaneously turned on or when the three arms S₆ (or S 6A ), S₈ (or S 8A ), S₁₀ (or S 10A ) are simultaneously turned on. As can be seen from Fig. 10, the switching pattern in which all of the three-phase electric currents circulate is necessarily generated in the vicinity of the peak value of the carrier signal V p similarly to the above-described first embodiment. Therefore, also according to the second embodiment, switching of the inverter is necessarily performed in the period I s = 0, that is, in the period in which the electric current is not substantially passed through each arm of the inverter. As a result, a three-phase output voltage can be obtained while preventing the generation of the switching loss in the inverter and as preventing the surge voltage. Then, a third embodiment of the present invention will now be described with reference to Figs. 11 to 14. According to this embodiment, a three-phase AC voltage is transmitted. Fig. 11 is a block diagram which illustrates the structure of the third embodiment, where reference numeral 6B represents a carrier signal generator for generating a sawtooth-shaped carrier signal, 17B represents an inverter switching circuit and 18C represents a switching signal generating circuit. The other structures are the same as those according to the second embodiment shown in Fig. 6. Fig. 12 illustrates the detailed structure of the inverter switching circuit 17B which is structured in the same manner as the inverter switching circuit 17A according to the first and second embodiments except for the arrangement in which a detection circuit 178 is employed in place of the peak detection circuit 171, the detection circuit 178 according to this embodiment acting to generate a signal at the first transition edge of the input signal supplied to the input terminal 170. Fig. 13 illustrates the detailed structure of the switching signal generating circuit 18C which comprises the input terminals 420 to 422 connected to the reference signal generating circuit 16A, the input terminal 423 connected to the carrier signal generator 6B, comparators 433 to 435 arranged to transmit output signals each of which has a narrow width at the intersections between the last transition slope of the carrier signal V p and the reference voltage signals V ccu* , V ccv* and V ccw* , 1/2 dividers 427 to 429, NOT circuits 430 to 432 and the output terminals 471 to 476. Then, the operation of the third embodiment thus-constituted will now be described with reference to Fig. 14. First, the carrier signal V p formed into a sawtooth shape which is lowered to the right as shown in Fig. 14 is transmitted from the carrier signal generator 6B. Then, by supplying the carrier signal V p thus-transmitted to the inverter switching circuit 17B, an inverter ON/OFF signal T x (T₁, T₄) and T y (T₂, T₃) which synchronize with the first transition edge of V p is transmitted to the inverter circuit 14, causing the four switching elements S₁ to S₄ of the inverter circuit 14 to be switched on/off by corresponding signals. As a result, the secondary voltage V₂ of the transformer 2A becomes, as shown in Fig. 14, a rectangular waveform voltage which synchronizes with the first transition edge of the carrier signal V p and the duty ratio of which is 50 %. Then, the reference voltage signal generating circuit 16A transmits the three-phase AC reference voltage signals V ccu* , V ccv* and V ccw* before they are, together with the above-described carrier signal V p , supplied to the switching signal generating circuit 18C. Taking note of phase u, a narrow-width pulse is transmitted from the comparator 433 at the intersection between the first transition slope of the carrier signal V p and the reference voltage signal V ccu* before it is divided by the 1/2 divider 427. As a result, the switching signal T₅ formed as shown in Fig. 14 is transmitted to the output terminal 471. Furthermore, the signal T₆ obtained by inverting the signal T₅ in the NOT circuit 430 is transmitted to the output terminal 472. Similarly, the signals T₇ and T₈ which correspond to the phase v are transmitted to the output terminals 473 and 474 and the signals T₉ and T₁₀ corresponding to the phase w are transmitted to the output terminals 475 and 476. In this state, since the three 1/2 dividers 427 to 429 are synchronized with each other, the signals T₅, T₇ and T₉ respectively first-rise or trail in the same period of the carrier signal V p . The switching signals T₅ to T₁₀ respectively switch on/off the switching element pairs composed of the switching elements S₅ - S 5A to S₁₀ - S 10A of the cyclo-converter circuit 15A. As a result, the output voltage V uo formed by pulse-width-modulating V ccu* can be obtained at the u-phase output terminal 402 of the cyclo-converter circuit 15A, while the output voltage V vo formed by pulse-width modulating V ccv* can be obtained at the v-phase output terminal 403 of the same. In this state, the voltage V uv between the phases u and v becomes the difference between V uo and V vo . Similarly to the first and second embodiments, the third embodiment is enabled to have the cyclo-converter electric current passing mode and the circulating mode. Taking note of the electric current I uv which passes between the phase u and the phase v, the period in which the voltage is transmitted to V uv becomes the passing mode similarly to the first embodiment. Therefore, the waveform of the uv component in I s becomes as shown in Fig. 14. As a result of a comparison made between the uv component in I s and T x and T y shown in Fig. 14, it can be understood that the switching of the inverter circuit is necessarily performed in the period of the circulating mode. Since the same result can be obtained also considering the electric current passing through the phase w, all of the three electric currents are brought into the circulating mode in the vicinity of the first transition edge of the carrier signal V p . Therefore, also according to the third embodiment, the switching of the inverter circuit is performed in the period I s = 0, that is, in a period in which the electric current is not substantially passed through each arm of the inverter circuit. As a result, the same effect as that obtainable according to the first and second embodiments can be obtained. Furthermore, according to the third embodiment, an effect can be obtained in that the structure can be simplified in comparison to the second embodiment. Although the description has been made about the three-phase structure, the cyclo-converter can be constituted as the mono-phase output similarly to the first embodiment. Although the invention has been described in its preferred form with a certain degree of particularly, it is understood that the present disclosure of the preferred form has been changed in the details of construction and the combination and arrangement of parts may be resorted to without departing from the spirit and the scope of the invention as hereinafter claimed.

Claims: A DC-to-AC electric power converting apparatus comprising: an inverted circuit (14) having a plurality of switching elements and converting DC electric power into AC electric power; a transformer (2A) connected to said inverter circuit (14); a cyclo-converter circuit (15; 15A) for converting the frequency of the output from said transformer (2A); a carrier signal generator (6A; 6B) for generating a carrier signal (V p ) of a predetermined frequency; an inverter switching circuit (17; 17A; 17B) for controlling the switching operation of said plurality of switching elements of said inverter circuit (14) in synchronisation with said carrier signal (V p ); a reference voltage signal generating circuit (16; 16A) for generating a reference voltage signal (V cc *) for the AC voltage to be transmitted from said cyclo-converter circuit (15; 15A), and a switching signal generating circuit (18A; 18B, 30A; 18C) for controlling said cyclo-converter circuit (15; 15A) in response to said reference voltage signal (V cc *) generated by said reference voltage signal generating circuit (16; 16A) and said carrier signal (V p ) generated by said carrier signal generator (6A; 6B); characterized in that the inverter switching circuit (17; 17A; 17B) controls the switching operation of said plurality of switching elements of said inverter circuit (14) in synchronisation with peaks or transitions of said carrier signal (V p ); and the switching signal generating circuit (18A; 18B, 30A; 18C) controls said cyclo-converter circuit (15; 15A) such that an output signal (V cc ) is pulse width modulated having portions in which an output electric current (I s ) from said cyclo-converter circuit (15; 15A) circulates in said cyclo-converter circuit (15; 15A) synchronised with said peaks or transitions of the carrier signal (V p ). An apparatus according to claim 1 wherein said inverter switching circuit (17; 17A; 17B) switches on/off said plurality of said switching elements of said inverter circuit (14) in a periord in which an output electric current from said cyclo-converter circuit (15; 15A) circulates in said cylco-converter circuit. An apparatus according to claim 1 wherein said inverter switching circuit (17; 17A; 17B) transmits a control signal, the duty ratio of which is about 50 %, to said inverter circuit (14). An apparatus according to claim 1 wherein said cyclo-converter circuit (15; 15A) includes a plurality of switching elements and transmits AC power which has been subjected to a pulse width modulation. An apparatus according to claim 1 wherein said cyclo-converter circuit (15; 15A) transmits multi-phase AC power. An apparatus according to claim 1 further comprising a filter circuit (4) for removing the high frequency component of the output signal (V cc ) of said cyclo-converter circuit (15).

Inventors: KOYAMA MASATO C O MITSUBISHI D, SANADA KAZUNORI C O MITSUBISHI, SASHIDA NOBUO C O MITSUBISHI D, KOYAMA, MASATO, C/O MITSUBISHI DENKI K. K. SANGYO, SANADA, KAZUNORI, C/O MITSUBISHI DENKI K.K., SASHIDA, NOBUO, C/O MITSUBISHI DENKI K.K.
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1991
Main classification: H02M7
IPC codes: H02M5, H02M7