Electronic power device realized by a series of elementary semi-conductor components connected in parallel and related manufacturing process

Abstract: A number of modular elementary power components is provided in the same number of chips of a same slice of semiconductor material. Each component has its own cathodic metallization insulated on one side of the slice and side buses running around said metallization and connected with the control electrode of the component. A second series of buses (central buses) leading to a common metallization area in the centre of a same side of the slice has a crossed arrangement so as to form a lattice comprising inside each mesh the cathodic metallization of a respective chip and the corresponding side buses. A series of connection elements, at least one for each elementary semiconductor component of the slice, connects the side buses of each elementary component with the neighbouring central buses. Said connection elements allow very easy deactivation of the elementary components which prove defective on testing.

Description: The present invention relates to an electronic power device realized by a series of elementary semiconductor components connected in parallel and the related manufacturing process. Electronic power devices of the semiconductor type are commonly provided either with a single semiconductor component having a more or less large area, e.g. a thyristor, or with a number of physically separate semiconductor components mounted in parallel on insulated modular units contained in a single package. Electronic power devices provided with a single component have limits as concerns the limited value of deliverable power or, if they have high power with output current between 1000 A and 3000 A, as concerns the lesser piloting ease and limited switching speed. A high power device with a single component is the one known in trade by the name 'Press Pack'. Electronic power devices with a number of physically separate components have disadvantages connected with the greater complexity of assembly procedures and, in higher power devices, considerably greater space occupied compared with that of devices of equal power having a single component. From EP-A-0 326 780 a power transistor is known with a number of bipolar junction transistors connected in parallel and monolithically integrated. In order to avoid possible defective operation of the transistor the contact links from each device collector to a common collector line is provided with a fusible portion. Even the base may be provided with a fusible link portion. When a transistor becomes defective the fusible link portion burns out and the transistor becomes isolated. The purpose of the present invention is the embodiment of power devices and in particular very high power devices free from the aforementioned disadvantages. These and other purposes are achieved by a device and manufacturing process as described and characterized in the claims set forth below. The features of the present invention will be more evident by the following description and the annexed drawings relevant to possible embodiment examples of nonlimitative value. In the drawings: FIG.1 shows a cross section view of an embodiment of a device in accordance with the present invention, FIG.2 shows an exploded perspective view of the device of FIG. 1, FIG.3 shows a top view of the silicon slice of FIGS. 1 and 2, FIG.4 shows a bottom view of the contact washer of FIGS. 1 and 2, FIG.5 shows a cross section of the above contact washer, FIG.6 shows an enlarged top view of a metallic track of the network of metallic tracks on the top of the silicon slice of FIG. 3, and FIG.7 shows a circuit equivalent to an elementary power device of the MCT type. FIGS. 1 and 2 show two views, a cross section view and an exploded perspective view respectively, of a power device in accordance with the present invention. The meaning of the various parts therein is as follows: 1 and 2: nickel plated copper plates constituting the cathode and the anode respectively of the device; 3 and 4: molibdenum or tungsten plate; 5: contact washer made of silver plated copper or silver or molibdenum; 6: silicon slice; 7: contact disk made of silver plated copper or silver or molibdenum; 8, 9 and 10: flange of nickel plated copper; 11: plastic washer for positioning the silicon slice in the container; 12: porcelain container body; 13: duct and terminal of the control electrode; 14: filiform metallic element for lead-in of the control signal, with the end part consisting of a spiral spring. Fig.3 shows a top view of the silicon slice 6 of FIGS. 1 and 2, having a diameter of 5 inches. It shows a lattice made up of 15 vertical lines and 15 horizontal lines delimiting all together 144 blank quadrangular areas. These areas represent the same number of elementary cathodic metallizations, i.e. metallized areas, e.g. of aluminium, of the top surface of the slice, insulated from one another, each delimiting an underlying portion of the slice, i.e. a chip, wherein is provided an elementary semiconductor component whose cathode region is in contact with the top elementary metallized area. The underlying side of the slice (not shown) is entirely metallized and constitutes the common anodic electrode to which lead the anodes of the individual elementary components. The fifteen vertical and horizontal lines of FIG. 3 represent a series of metallic tracks of aluminium (bus) running beside the above mentioned elementary cathodic metallizations and insulated therefrom, having the function of lead-in tracks for distributing the control signal to the control electrodes of the various elementary power components. Said metallization tracks have interconnection points at each crossing and lead to a common quadrangular metallization area 31 (control pad) in the centre of the top surface of the slice, an area which acts as a common control terminal to which lead all the control electrodes of the various elementary semiconductor components. FIG. 6 shows an enlarged scaleless view of said metallic tracks in a section intermediate between two successive vertical crossings. The parts thereof represent: A: righthand border line of the cathodic metallization of the lefthand chip; B: lefthand border line of the cathodic metallization of the righthand chip; EF: lines delimiting inside them a vertical central bus running between the above borders and interconnected at the top and bottom crossings with other horizontal central buses exactly like it; CD: lines delimiting inside them a metallic track acting as a side control bus for the lefthand chip, running along the 4 sides of the cathodic metallization of the chip and insulated therefrom; it is also insulated from the central buses running around the chip, except at four connection points, one for each side of the chip; for the righthand side of the lefthand chip this connection point at the central bus is represented by a metallic jumper 61 made of the same metallic film the tracks are made of; GH: the same remarks as for the CD lines apply but for the righthand chip; the GH lines delimit inside them a metallic track acting as a side control bus for the righthand chip, running along the 4 sides of the cathodic metallization of the chip and insulated therefrom; it is also insulated from the central buses running around the chip, except at four connection points, one for each side of the chip; for the lefthand side of the righthand chip this connection point to the central bus is represented by the metallic bridge 62 which is also made of the same metallic film as the tracks. The description of a section of metallic tracks intermediate between two successive vertical crossings applies naturally also, mutatis mutandis, to an intermediate section between two successive horizontal crossings. The side control bus of each chip is interconnected, in a manner not shown in the figures but apparent to those skilled in the art, with the control electrode of the elementary component provided in the chip. Said elementary component can be of the MOS type (Power MOS, IGBT, MCT) or bipolar (SCR, GTO, BJT). If an MCT (MOS Controlled Thyristor) component is used, of which FIG. 7 shows the equivalent electrical circuit (in this figure A′,G′ and C′ represent the anode, gate and cathode electrodes, T1 and T2 two bipolar transistors, M1 an N-channel MOS and M2 a P-channel MOS transistor), the control bus of each chip will be interconnected with the underlying polysilicon gate layer of the two P-channel and N-channel MOS in the MCT. From the foregoing it is clear that the control electrode of each elementary component is electrically connected to the common control terminal (pad 31) through the side control buses of each chip, the associated points of connection to the central buses and the central buses themselves. As shown in FIG. 4 in a bottom view and FIG. 5 in a cross section view along plane of cut A-A of FIG. 4, the contacting washer 5 has at the bottom a lattice of grooves reflecting the same arrangement as the lattice of metallization tracks on the top surface of the slice. These grooves divide the bottom side of the contacting washer in 144 quadrangular reliefs having the function of contacting the elemenary cathodic metallizations while avoiding contact with the central and side buses of the slice. To avoide this it is sufficient to size the width of the groove adequately. In the centre of the contacting washer there is a quadrangular opening 41 designed to allow passage of the terminal spring part of the lead-in wire 14 for the control signal. Division of the metallization tracks of the slice in central and side buses, and the presence of connection points between the side and central buses take on significance in the light of the following considerations. The case in which the elementary components provided in a silicon slice of the type shown in FIG. 3 will all be operational at the end of the manufacturing process is an entirely theoretical eventuality. In reality all the components in the slice must be subjected to acceptance testing at the end of the processing. Normally, following this test, some components (chips) are defective and hence, in the present case, must be made electrically inactive. The structural characteristics indicated above for the device in accordance with the present invention serve advantageously for this purpose. Let us assume for example that the chip 32 of FIG. 3 is defective upon inspection. In this case it will be made inactive by eliminating the connection points between each side bus and the adjacent central buses and also eliminating the contact of its cathodic metallization with the washer 5. Elimination of the connection points is very easy. Supposing that the bus of FIG. 6 is on the righthand side of the chip 32, to eliminate the righthand connection point it is sufficient to circulate in the jumper 61, e.g. by applying two electrodes of opposite electric polarity on the two widened areas 63 and 64 of FIG. 6, a sufficiently strong current to cause fusion. The same applies for the other connection points of the side buses of the chip 32. It is thus seen that the above connection points between side and central buses also fulfill the useful function of fuses. To eliminate the contact between the cathodic metallization of the chip 32 and the washer 5 there must be no corresponding quadrangular contact relief (52 in FIGS. 4 and 5) in the washer. To achieve this there are two ways to proceed: 1) providing the washer 5 after the acceptance test of the chip and then using a photoetching mask of the washer which excludes the relief 52; or 2) providing before the acceptance test a washer 5 having all the contacting reliefs and then, after the chip test, mechanically removing, e.g. with a step cutter, the relief 52. It will be very opportune also to put in place of the absent metallic relief 52 a thin layer of insulating material, e.g. a layer of mica fixed with bonding agent, designed to prevent any electrical discharges between the cathode and the anode of the defective power component during operation. Once the defective chips have been deactivated as explained above, the device is ready for assembly. The silicon slice, the contacting washer, the contacting disk and the two molibdenum or tungsten disks are placed in the ceramic body 12 in accordance with the arrangement shown in FIGS. 1 and 2. Subsequently, in accordance with the known art for the "press pack" package, the device is closed and sealed permanently by welding the copper flanges in a pure nitrogen environment, nitrogen which at the end remains incorporated in the package. When the device has been closed and the metallic plates 1 and 2 have been applied thereto, it is ready for installation. In the installed device the internal contacts (anode, cathode and gate) for connecting the internal components to the external user's circuit are provided by free pressure contacts. More specifically, the anode and cathode contacts consist of copper poles of "press pack" package which, when subjected to sufficient pressures, ensure the passage of thousands of amperes and dissipation of the heat generated in the power component, while the gate contact is ensured by the pressure exerted by the terminal spring of the wire 14 on the pad 31 in the centre of the slice, the wire 14 serving as connection with the outside through the duct 13 passing through the ceramic of the press pack capsule (FIGS. 1 and 2). The advantages of the above described device are apparent. In particular the device make it possible: achieving switching speed and piloting ease typical of components of small power and, at the same time, occupying the reduced space characteristic of more powerful devices provided by a single component; minimizing the space occupied by the various elementary components placed in parallel by using the same slice on which they were provided; using a package already on the market (the press pack) having excellent heat dissipation characteristics; assemblying with extreme ease and speed, due to the specific structure of the contacting washer 5, the arrangement of the metallic gate tracks and the presence of connection points (fuses) betwen the central and side buses which allows fast and safe deactivation of defective components; providing power devices, especially MOS technology devices, with good yield. Obviously numerous modifications, adaptations, variations and substitutions of elements with others functionally equivalent are possible to the preferred embodiments described above without departing from the scope of the following claims. One such variation could for example concern the insulation provided between defective chips and the upper contacting washer, which could be ensured by a layer of insulation other than mica or even by the nitrogen atmosphere filling the package. Another variation could concern the connection points between the side and central buses which could be provided in another way, e.g. with other kinds of fuses.

Claims: A power semiconductor device comprising: an array of semiconductor component elements connected in parallel and formed in a single slice of semiconductor material having first and second major surfaces, each said component element having an anode electrode, a cathode electrode and a control electrode, a metallic layer covering said first surface, said metallic layer being formed on said anode electrodes of the semiconductor component elements, an array of discrete cathode metallizations on said second surfaces, each one being formed on a respective cathode electrode of a component element; a first series of metallic tracks on said second surface, each track of said first series of metallic tracks running around the periphery of a respective cathode metallization whilst being insulated therefrom and in contact with the control electrode of the respective component element, a second series of interconnected metallic tracks on said second surface and having vertical and horizontal tracks in a mesh-like lattice interconnected at each crossing and arranged such that inside each mesh of said lattice is a respective discrete cathode metallization and the corresponding track of said first series of metallic tracks, a common control terminal metallization area (31) in the centre of the second surface of the slice, said second series of interconnected metallic tracks being electrically connected to said common control terminal metallization area, each semiconductor component element having at least one fusible connection element (61, 62) associated therewith, said fusible connection element (61, 62) being provided on the second surface of the slice and connecting the respective track of said first series of metallization tracks with the respective adjacent track of said second series of interconnected metallic tracks. Power semiconductor device according to claim 1 characterized in that said first series of metallic tracks and second series of interconnected metallic tracks have widened areas at the connection points with said fusible connection elements (61,62). Power semiconductor device according to claim 1 characterized in that said fusible connection elements (61,62) consist of thin metallic tracks on the second surface of the slice. Power semiconductor device device according to claim 1 characterized in that the device comprises defective component elements (32) and at each defective component element the first series of metallic tracks are completely insulated from the second series of interconnected metallic tracks. An assembly of a power semiconductor device according to claim 1 and a metallic contact disk characterized by a metallic contact disk (5) contacting the second surface of the slice for its entire extension, having an opening facing said common control terminal metallisation area of the slice and also having on the surface contacting the slice a series of grooves corresponding to said first and second series of tracks so as to give an array of quadrangular relief portions one for each efficient semiconductor component element of the slice, each one contacting the corresponding cathode metallization of one said component element. Assembly according to claim 5 characterized in that opposite each defective component element (32) of the slice said quadrangular relief portions are missing. Assembly according to claim 6 characterized in that at each defective component element of the slice the cathode metallization is insulated from the neighbouring metallic contact disk (5) by a layer of insulating material. Assembly according to claim 7 characterized in that said layer of insulating material consists of mica. Assembly according to claim 5 characterized in that said metallic contact disk (5) is silver plated copper or silver or molybdenum. Packaged power semiconductor device comprising the assembly of claim 5 or 9 characterized in that said slice of semiconductor material and said metallic contact disk (5) are mounted in a package of the press pack type comprising: a contacting disk (7) of silver plated copper in contact with the first surface of the slice (6), two molybdenum or tungsten plates (3,4) overlying respectively the metallic disk (5) and the contacting disk (7), a porcelain body (12) forming the container of said slice, metallic contact disk, contacting disk and molybdenum or tungsten plates, a plastic washer (11) provided on the peripheral side of the slice to ensure its positioning in the container, an insulated metallic wire (14) for lead-in of the control current with the control terminal end thereof, consisting of a spiral spring in contact with the common control terminal of the slice through the opening of the metallic contact disk (5) facing said common control terminal of the slice, two or more nickel plated copper flanges (8,9,10) closing the porcelain body (12), and two nickel plated copper plates (1,2) each overlying one of the aforesaid flanges (8,9,10) and constituting the cathode and the anode of the package device. A process for manufacturing an assembly of a power semiconductor device comprising an array of semiconductor component elements connected in parallel and a metallic contact disk, said process comprising the steps of: forming an array of semiconductor component elements in a slice of semiconductor material, each said component element having an anode electrode, a cathode electrode and a control electrode, forming a metallic layer covering said first surface, said metallic layer being formed on said anode electrodes of the semiconductor component elements, forming an array of discrete cathode metallizations on said second surface, each one being formed on a respective cathode electrode of a component element; forming a first series of metallic tracks on said second surface, each track of said first series of metallic tracks running around the periphery of a respective cathode metallization whilst being insulated therefrom and in contact with the control electrode of the respective component element, forming a second series of interconnected metallic tracks on said second surface and having vertical and horizontal tracks in a mesh-like lattice interconnected at each crossing and arranged such that inside each mesh of said lattice is a respective discrete cathode metallization and the corresponding track of said first series of metallic tracks, forming a common control terminal metallization area (31) in the centre of the second surface of the slice, said second series of interconnected metallic tracks being electrically connected to said common control terminal metallization area, forming for each semiconductor component element at least one fusible connection element (61, 62) associated therewith, said fusible connection element (61, 62) being formed on the second surface of the slice and connecting the respective track of said first series of metallic tracks with the respective adjacent track of said second series of interconnected metallic tracks ; providing a metallic contact disk (5) overlying the second surface of the slice for its entire extension, said metallic contact disk having an opening to face the said common control terminal metallization area (31) and also having on the surface contacting the slice a series of grooves corresponding to said first and second series of tracks so as to give an array of quadrangular relief portions, one for each semiconductor component element of the slice, and each one contacting the corresponding cathode metallization of one said component element, performing an acceptance test of the slice to identify any defective component elements, elimination by fusing of the fusible connection elements (61, 62) corresponding to the defective component elements, thereby electrically isolating said defective component elements from said common control terminal metallization area (31), elimination of ones of said relief portions intended for contacting the corresponding cathode metallization of said defective elementary components, and the optional replacement of said ones of said relief portions by a layer of insulating material. Process for manufacturing a power semiconductor device according to claim 1 characterized in that the relief portions intended for contacting the corresponding cathode metallizations of said defective component elements are eliminated by removal with a step cutter. Process according to claim 11, wherein the steps of elimination of ones of said relief portions intended for contacting the corresponding cathode metallization of said defective component elements and the optional replacement of said ones of said relief portions by a layer of insulating material, are replaced by the step of covering the cathode metallization of said defective component elements with a layer of insulating material. Process according to claim 11 or 13 characterized in that said fusible connection elements are provided in the form of thin metallic tracks on the second surface of the slice. Process according to claim 11 or 13 characterized in that said first series of metallic tracks and said second series of interconnected metallic tracks are provided with widened areas at the connection points with said fusible connection elements. Process according to claim 15 characterized in that said elimination of the fusible connection elements is performed by passing in said fusible connection elements a current sufficiently strong to cause fusion, the fusion current being brought to a fusible connection element by two electrodes placed in contact with said widened areas. Process for manufacturing a packaged power semiconductor device comprising the assembly according to claim 11, 12 or 13, wherein said assembly is mounted in a package of the press pack type, said package comprising the steps of: placing a contacting disk (7) of silver plated copper in contact with the first surface of the slice (6), overlaying two molybdenum or tungsten plates (3,4) respectively on the metallic contact disk (5) and the contacting disk (7), providing a porcelain body (12) as a container of said slice (6), metallic contact disk (5), contacting disk (6) and molybdenum or tungsten plates (3,4), inserting a plastic washer (11) on the peripheral side of the slice to ensure its positioning in the container (12), providing an insulated metallic wire (14) for lead-in of the control current, with a control terminal end thereof consisting of a spiral spring, said spring being placed in contact with the common control terminal (31) through the opening in the metallic contact disk (5) facing said common control terminal (31), providing two or more nickel plated copper flanges (8, 9,10) to close the porcelain body with welding performed in a pure nitrogen environment, overlaying two nickel plated copper plates (12) each on one of said flanges (8,9,10), said nickel plated copper plates constituting the cathode and the anode of the packaged device.

Inventors: FERLA GIUSEPPE, RONSISVALLE CESARE, ZANI PIER ENRICO, FERLA, GIUSEPPE, RONSISVALLE, CESARE, ZANI, PIER ENRICO
Applicants: ANSALDO TRASPORTI SPA, SGS THOMSON MICROELECTRONICS, ANSALDO TRASPORTI S.P.A., SGS-THOMSON MICROELECTRONICS S.R.L.
Application year: 1991
Main classification: H01L23
IPC codes: H01L25, H01L23