A semiconductor laser device and a method of producing the same

Abstract: A semiconductor laser device having a mesa stripe whose side faces are facets of {111} planes is disclosed. In the laser device, a current blocking layer is formed on a semiconductor substrate (1) whose main surface is a (100) plane, and a channel (10) which is oriented along the <011> direction is formed in the current blocking layer. The mesa stripe is formed on the substrate (1) within the channel (10) by a selective growth technique. The mesa stripe has a multilayer structure (11) including an active layer (4) and is covered by a burying layer.

Description: BACKGROUND OF THE INVENTION This invention relates to a semiconductor laser device suitable as a light source for optical communications and a method of producing the same. In particular, this invention relates to a semiconductor laser device which can emit laser light oscillating stably in a single fundamental transverse mode at low threshold currents, and a method of producing the same. Semiconductor laser devices which can emit laser light oscillating in the 1 µm wavelength band region (1.1 to 1.7 µm) are currently the subject of intensive research with a view to utilization as light sources for optical communications (high-speed long-distance communications). This is due to the fact that the propagation loss in the quartz fibers used for optical communications is extremely small in this wavelength band. In particular, in low-loss quartz fibers manufactured from high-purity materials, no appreciable material dispersion occurs in the 1.3 µm wavelength, and therefore, by using a semiconductor laser which emits a light having a wavelength in this band, cutoff frequencies exceeding 1 GHz·km can be realized. Figure 20 shows a cross-sectional view of a conventional semiconductor laser device of the type used as a 1.3 µm light source for optical communications. This semiconductor laser device has a buried heterostructure (BH structure). As shown in Figure 20, this device comprises a mesa stripe structure in which an n-type indium phosphide cladding layer 22, an undoped InGaAsP active layer 23 , a p-type indium phosphide cladding layer 24, and a p-type InGaAsP cap layer 25 is formed upon the semiconductor substrate 21 . A burying layer which comprises a p-type indium phosphide current blocking layer 26 and an n-type indium phosphide current blocking layer 27 covers the sides of the mesa stripe structure. The device has an AuZn electrode 28 is formed on a p-type InGaAsP cap layer 25 and an AuGe electrode 29 on the reverse face of the substrate 21. In the semiconductor laser device illustrated in Figure 20, the sides of the mesa stripe structure including the active layer 23 are covered by the burying layer, and consequently laser light in a single fundamental transverse mode is obtained. Also, the structure is such that, if a voltage with a forward bias is applied on the mesa stripe structure, then a voltage with a reverse bias is applied upon the p-n junction within the burying layer. Consequently, currents flowing through the burying layer are diminished, and injection currents are confined within the mesa stripe structure. Therefore, the threshold current level is reduced, and stable fundamental transverse oscillation at a low current can be realized. Next, a method for the production of the semiconductor laser device illustrated in Figure 20 will be explained. First, using a liquid phase epitaxy (LPE) technique, the n-type indium phosphide cladding layer 22 , the undoped InGaAsP active layer 23 , the p-type indium phosphide cladding layer 24 , and the p-type InGaAsP cap layer 25 are grown, in that order, upon the substrate 21 . Next, in order to form the portion into which the burying layer is to be buried, an etching mask with a mesa stripe pattern of the prescribed width is formed on the p-type InGaAsP cap layer 25 , after which the p-type InGaAsP cap layer, p-type indium phosphide cladding layer 24 , undoped InGaAsP active layer 23 , and n-type indium phosphide cladding layer 22 below the region not covered by the etching mask are etched. In this manner, the mesa stripe structure composed of the indium phosphide cladding layer 22 , the InGaAsP active layer 23 , an indium phosphide cladding layer 24 , and the p-type InGaAsP cap layer 25 is formed over the substrate 21 . The pattern of the etching mask defines the width of the active layer 23 . Next, using an LPE technique, the p-type indium phosphide current blocking layer 26 and the n-type indium phosphide current blocking layer 27 are successively grown, in that order from the substrate side, on the region of the substrate 21 above which the n-type indium phosphide cladding layer 22 , the undoped InGaAsP active layer 23 , the p-type indium phosphide cladding layer 24 , and the p-type InGaAsP cap layer have been removed by the etching process. This is performed in such a manner that the burying layer covers the sides of the mesa stripe structure, and, moreover, so that the height of the interface (p-n junction) between the p-type indium phosphide current blocking layer 26 and the n-type indium phosphide current blocking layer 27 is the same as or slightly greater than the height of the active layer 23. After removal of the etching mask, the AuZn electrode 28 is formed above the p-type InGaAsP cap layer 25 and the n-type indium phosphide current blocking layer 27 , and the AuGe electrode 29 is formed on the reverse face of the substrate 21. In the conventional semiconductor laser illustrated in Figure 20, the formation of an active layer 23 with the prescribed stripe width necessitates a process whereby, after a multilayer containing the active layer 23 has been formed over the entire substrate 21 , a prescribed region of this multilayer is etched with high precision to form a mesa stripe structure with the required width. In order to stabilize the transverse mode oscillation of the laser, the deviation of the width of the active layer 23 from the prescribed value must not exceed the order of 0.1 µm. However, in the above-described conventional process, the mesa stripe structure is formed by deep etching of a specified portion of the multilayer formed over the entire wafer, and therefore the determination of the width of the active layer 23 with good reproducibility at a precision of this order is extremely difficult. Consequently, a large statistical dispersion arises in the width of the active layer 23 . Moreover, in order to reduce the thresholed current level, the thickness of the various layers must be appropriately controlled so that the height of the p-n junction in the burying layer approximately coincides with the height of the active layer 23. If the height of the p-n junction deviates excessively from the height of the active layer 23 , then the currents flowing through the burying layer rather than the active layer 23 increase, and consequently the threshold current level rises. Also, since etching and other processes are necessary between the crystal growth process for the formation of the mesa stripe structure and the crystal growth process for formation of the burying layer, the overall process is complex. Furthermore, during the period between the two crystal growth processes, impurities may enter the crystal layers from the ambient atmosphere. Figure 21 shows another type of conventional semiconductor laser device (Japanese Laid-Open Patent Publication No. 64-25590). This semiconductor laser device comprises a ridge 32 of width 5 µm and height 2.2 µm formed along the <011> direction (direction of the resonator, perpendicular to the plane of the Figure) on the (100)-oriented n-type gallium arsenide substrate 31. Also, the device comprises a triangular mesa stripe structure on the ridge 32 . The mesa structure has an n-type gallium arsenide buffer layer 33 , an n-type aluminum gallium arsenide cladding layer 34 , an undoped GaAs active layer 35 , and a p-type aluminum gallium arsenide cladding layer 36 which are laminated, in that order, upon the substrate 31. The side faces of this structure are (111) B facets, and the angle formed between the facet and the surface of the substrate 31 is 54.7°. The side face of the mesa stripe structure constitutes a facet with a specified crystal plane orientation in this manner because the various layers are grown under conditions such that crystal growth on the (111) B plane is difficult. The device has a multilayer similar to the mesa stripe structure upon the region of the substrate 31 other than that upon which the mesa stripe structure is formed. In addition, the device comprises an n-type aluminum gallium arsenide barrier layer 41 , a p-type aluminum gallium arsenide cladding layer 42 , and a p-type GaAs contact layer 43 which are formed in that order from the substrate side, and a p-terminal electrode 44 formed over the p-type GaAs contact layer 43 and an n-terminal electrode 45 formed over the reverse face of the substrate 31 . A method for the production of the laser device has the advantage of not requiring an etching process between the crystal growth process for formation of the mesa stripe multilayer structure and the crystal growth process for formation of the burying layer. Also, since the two kinds of crystal growth processes can be performed continuously as a single-step process, the possibility for entry of impurities from the surrounding air into the crystal layers is diminished. However, in this method, the ridge 32 is formed by deep etching of the substrate 31 , and therefore the formation of the ridge 32 with the prescribed width and with a good yield is difficult, which constitutes a problem. Moreover, since a double heterostructure is formed above the ridge 32 , a large level difference exists on the wafer before the formation of the burying layer, and therefore the levelling of the wafer surface by the formation of the burying layer is difficult. If the surface of the wafer is not flat, then, if the semiconductor device is to be mounted on a material such as a heat sink, the proper contact between the heat sink, etc., and the upper surface of the wafer cannot be effected, which constitutes another problem. Furthermore, in this conventional technology, the thickness of the various layers must be precisely controlled so as to ensure that the height of the p-n junction in the burying layer coincides with the height of the active layer, and consequently the problem of low manufacturing yield also arises. Figure 22 shows another type of conventional semiconductor laser device. This semiconductor laser device has a multilayer structure of the same type as that of the mesa stripe structure of Figure 35 along the <011> direction (direction of resonator, perpendicular to plane of the Figure) over a (100)-oriented n-type indium phosphide substrate 51. This multilayer structure is formed by depositing a silica film, having a rectangular opening with the long side along the <011> direction, on the n-type indium phosphide substrate 51 , after which, using an MOCVD technique, an n-type gallium arsenide buffer layer 52, an n-type aluminum gallium arsenide cladding layer 53, an undoped GaAs active layer 54 , and a p-type aluminum gallium arsenide cladding layer 55 are successively formed by selective growth, in that order, within the rectangular opening only. As in the preceding method of fabrication, the side faces of the multilayer structure formed in this manner are (111) B facets. The crystal growth does not occur on the SiO 2 film. After the selective crystal growth process, the SiO 2 film is removed from the substrate 51 by etching. Then, using an LPE technique, a p-type aluminum gallium arsenide burying layer 56, an n-type aluminum gallium arsenide burying layer 57 , a p-type aluminum gallium arsenide burying layer 58 , and a p-type GaAs cap layer 59 are successively formed, in that order, over the substrate 51 from which the SiO 2 film has been removed. The surface of the wafer is levelled by the growth of these layers. In order to reduce currents flowing in the burying layers, the height of the interface (p-n junction surface) between the p-type aluminum gallium arsenide burying layer 56 and the n-type aluminum gallium arsenide burying layer 57 is controlled so as to nearly coincide with the height of the active layer 54. Also, a p-terminal electrode 60 is formed over the p-type GaAs cap layer 59 and an n-terminal electrode 61 over the reverse face of the substrate 51. In this method of fabrication, no ridge is formed on the top surface of the substrate 51, therefore, the level difference on the wafer surface prior to the formation of the burying layers is comparatively small, which tends to facilitate the levelling of the wafer surface by the formation of the burying layers. However, the precise control of thickness of the burying layers so as to ensure that the p-n junction in the burying layers is formed in the vicinity of the active layer 54 is difficult, and consequently the production yield is low. Moreover, when the SiO 2 film is removed from the substrate 51 by a hydrofluoric acid or other type of etching fluid, concomitant etching damage to the mesa stripe multilayer structure also constitutes a problem. This etching damage reduces the production yield and reliability of the semiconductor laser device. The above-described semiconductor laser has other problems stated below. In optical instruments employing coherent light, the polarization of the coherent light possesses important significance. In general, the light emitted from semiconductor laser devices is polarized in a TE wave, and the direction of polarization is parallel to the active layer. Therefore, two semiconductor laser devices are required in order to obtain two varieties of laser light with different directions of polarization. For example, if two semiconductor laser devices are arrayed in series, a half-wave plate can be used to rotate the direction of polarization of the light emitted by one of the semiconductor laser devices relative to that of the light emitted by the other, thereby obtaining two laser beams with mutually distinct directions of polarization. However, this conventional technique requires two semiconductor laser devices as well as optical components such as half-wave plates, etc., therefore, a larger number of components is required, which is disadvantageous as regards miniaturization of devices incorporating such devices. The type of semiconductor laser device illustrated by Figure 20 has the problem of increased leakage current flowing across the p-n junction of the burying layer concomitantly with elevations in the temperature of the device. Consequently, the driving current required for the desired light output increases when the temperature of device rises. Also, owing to the strong temperature dependence of the current-light output characteristic and oscillation frequency, the temperature characteristics of the semiconductor laser device deteriorate and the reliability decreases. Furthermore, another problem arises from the fact that the response characteristic of the light output with respect to the modulation of the driving voltage deteriorates due to the formation of junction capacitance in the vicinity of the p-n junction. In the following, the various problems arising from the burying layers of other conventional burying type semiconductor laser devices will be explained with reference to Figures 23 and 24. Both of these semiconductor laser devices have a mesa stripe structure formed by successively growing an n-type cladding layer 72, an active layer 73 , a p-type cladding layer 74 , and a p-type cap layer 75, in that order, upon an n-type substrate 71. These two devices are characterized by their burying layers. First, the semiconductor laser device illustrated in Figure 23 will be described. The burying layer of this semiconductor laser device is a semi-insulating semiconductor layer 81 . The upper surface of the wafer is levelled, and on the levelled upper surface is formed a p-terminal electrode 77 . Also, an n-terminal electrode 78 is formed on the reverse side of the substrate. This semi-insulating semiconductor layer 81 is composed of an epitaxially grown semiconductor layer doped with transitional metals such as chromium, iron or cobalt, etc., as impurities. These impurities form deep-level traps in the semi-insulating semiconductor layer 81. Owing to the trapping by these deep levels of carriers injected into the semi-insulating semiconductor layer 81, almost no current flows within this semi-insulating semiconductor layer 81 . Therefore, when the voltage which drives this semiconductor laser device is applied upon the electrodes, the flow of currents injected from the electrodes 77 and 78 is confined in the mesa stripe structure. However, in the semiconductor laser device of Figure 23, the following problems arise from the doping of the semiconductor layer with transition metals such as chromium, iron or cobalt as impurities. If the semi-insulating semiconductor layer 81 (which constitutes the burying layer) is grown by liquid phase epitaxy, then, since the density of deep-level traps formed in the semi-insulating semiconductor layer 81 grown in this manner is low, consequently, carriers injected into the burying layer cannot be adequately trapped, therefore, the insulating effect manifested by the burying layer is inadequate. The low density of deep-level impurities is due to the poor solubility of the transition metals in the melt which is used for an LPE. On the other hand, if the semi-insulating semiconductor layer 81 is formed by vapor phase growth, then the deep groves between the several mesa stripe structures formed on the substrate 71 prior to subdivision into chips cannot be adequately filled by the semi-insulating semiconductor layer 81. Moreover, another problem arising in the semiconductor laser device of Figure 23 is the diffusion of transition metals into the active layer 73 or cladding layer 74 of the mesa stripe structure from the burying layer when the temperature of the latter has been elevated by heat generated during the operation of the said semiconductor laser device. When transition metals diffuse into the active layer 73 , the luminous efficiency of the semiconductor laser device drops and the operating life is shortened. Next, the semiconductor laser device illustrated in Figure 24 will be described. This semiconductor laser device has a burying layer composed of polyimide resin 91 . A thin p-type epitaxially grown layer 92 and a silica layer 93, which serve to protect the semiconductor layers in the mesa stripe structure, are interposed between the polyimide layer 91 and the substrate 71. The burying layer, being composed of polyimide resin 91, is an electrical insulator. Therefore, when the voltage which drives this semiconductor laser device is applied to the electrodes 77 and 78, the resulting current does not flow through the burying layer. Consequently, the current injected from the electrodes 77 and 78 is confined in the mesa stripe structure. However, the semiconductor laser device of Figure 24 involves a problem in that the thermal conductivity of the polyimide layer 91 is low. If the thermal conductivity of the burying layer is low, then the heat generated within the active layer 73 during operation is not adequately conducted to the exterior of the device, hence, the temperature of the said active layer 73 rises. Concomitantly with this temperature elevation of the active layer 73 , the threshold current increases, and the differential efficiency drops. Also, the width of the mesa stripe structure of each of the semiconductor laser devices is of the order of 2 µm. That is, in order to ensure that the transverse mode of the emitted laser light is of the single fundamental transverse mode, a narrow mesa stripe structure of the order of 2 µm in width must be formed on the substrate. Since each of these devices has a narrow mesa stripe structure of the order of 2 µm in width, the mesa stripe structure is easily damaged when the wafer surface is levelled. Owing to this problem, the production yield tends to be low. Moreover, if the width of the mesa stripe structure is greater than the prescribed value, then the semiconductor laser device becomes incapable of stable oscillation in the fundamental transverse mode. Distributed feedback (DFB) semiconductor laser devices, in which a periodic variation in refractive index is imparted to the current injection site, are currently drawing attention as light sources for communications and optical measurement by virtue of easy oscillation in the single longitudinal mode and stability of oscillatory wavelength even under variations of temperature and driving current. Since high reliability and low driving current are required in this field of application, BH semiconductor laser devices, which oscillate in the fundamental transeverse mode at a low-current threshold level, are the principal types used in this field. Figure 25 shows an example of a conventional DFB semiconductor laser device with a BH structure. This type of DFB semiconductor laser device is fabricated in the following manner. First, an n-type AlGaAs first cladding layer 732, an undoped gallium arsenide active layer 733, a p-type AlGaAs carrier barrier layer 734, and a p-type AlGaAs guide layer 735 are successively grown, in that order, over the n-type gallium arsenide substrate 731 . Next, a diffraction grating is ruled on the upper surface of the p-type AlGaAs guide layer 735 . Then, a p-type AlGaAs second cladding layer 736 and a p + -GaAs cap layer 737 are grown on the p-type AlGaAs guide layer 735 upon which the diffraction grating has been ruled. The surface of the p-type AlGaAs second cladding layer would oxidize if exposed, which would impede the subsequent growth processes, and therefore the p + -GaAs cap layer 737 is formed in order to prevent this surface oxidation. Next, two parallel grooves extending down to the substrate are formed by etching, thereby forming a stripe-like mesa. Then, an n-type AlGaAs first current blocking layer 738, a p-type AlGaAs second current blocking layer 739 , and an n-type AlGaAs third current blocking layer 701 are successively grown, thereby filling the grooves. Finally, a p + -GaAs contact layer 702 is grown so as to level the surface, after which a p-terminal electrode 703 on the uppersurface and an n-terminal electrode 704 on the reverse side of the substrate are formed. In order to fabricate the BH type of DFB semiconductor laser device shown in Figure 25, after growing the p + -GaAs cap layer 737, two parallel grooves must be formed to form the stripe-like mesa. Also, in order to obtained stable single transverse mode oscillations, this etching must be controlled with sufficient accuracy as to ensure the stripe width of the mesa is in the range 1 to 1.5 µm. Moreover, the several current blocking layers must be grown to the desired thickness on the two sides of the stripe-like mesa. Thus, like other prior art described above, the fabrication of this DFB semiconductor laser device also requires extremely precise etching processes as well as processes for the growth of current blocking layers with highly accurate control, therefore, the number of steps in the overall fabrication process is large. Consequently, these conventional methods of fabrication are poorly suited for mass production. Furthermore, since the characteristics of the devices depend upon the etching precision, shortcomings arise in that performance is necessarily unstable and the manufacturing yield is low. "Patents Abstracts of Japan" Vol 11, No. 81 (E-488) (2528) 12 March 1987, on which the preambles of claims 1 and 3 are based, discloses a method of producing a laser device which includes the steps of growing a current blocking layer; etching the current blocking layer to form a V-shaped groove; growing a multilayer structure; a second etching step, in which grooves are etching in the multilayer structure; and growing burying layers in the grooves. This method requires two etching steps. "Patents Abstracts of Japan" Vol 13, No. 264 (E-774) (3612), 19 June 1989 discloses a method of growing a semiconductor laser in which a stripe is provided on a substrate. The surface of the substrate, apart from the stripe, is covered with a layer which inhibits growth. A multilayer structure can then be grown selectively on the stripe, and no growth will occur on the remainder of the substrate. According to a first aspect of the present invention there is provided a method of producing a III-V semiconductor laser device comprising the steps of: forming a current blocking layer on a semiconductor substrate; forming a channel in said current blocking layer, the channel being formed to reach said substrate; forming a first multilayer structure comprising a plurality of semiconductor layers including an active layer, said structure being in the form of a mesa stripe on said substrate and within raid channel; and forming a second multilayer structure simultaneously with the first multilayer structure, the second multilayer structure including semiconductor layers of the same type as those included in the first multilayer structure; the method being characterised in that the current blocking layer is formed on a (100) plane of the substrate; in that the channel is oriented in the <011> direction; and in that the multilayer structures are grown using a metal-organic chemical vapor deposition technique, wherein the substrate temperature, the ambient pressure and the V/III ratio are selected to provide selective growth of the multilayer structures whereby the side surfaces parallel to the laser beam propagation direction of the first and second multilayer structures are facets of {111} planes. In a preferred embodiment the step of growing the first and second multilayer structures is carried out in a chemical vapour deposition apparatus; and wherein the method further comprises the step of growing in the chemical vapour deposition apparatus a semiconductor layer having a refractive index smaller than that of said active layer to cover the side surfaces parallel to the laser beam propagation direction of said active layer without contact between the substrate and the external atmosphere. A second aspect of the present invention provides a III-V semiconductor laser device comprising: a semiconductor substrate; a current blocking layer formed on a surface of the semiconductor substrate; a channel formed in the current blocking layer, the channel reaching the substrate; a mesa stripe having a first multilayer structure comprising a plurality of semiconductor layers including an active layer and formed on said substrate within said channel; a burying layer covering the side surfaces parallel to the laser beam propagation direction of the first multilayer structure; and a second multilayer structure interposed between the current blocking layer and the burying layer, the second multilayer structure including semiconductor layers of the same type as those included in the first multilayer structure; characterised in that the surface of the substrate is a (100) plane and is flat; in that the channel is oriented along the <011> direction; in that the side surfaces parallel to the laser beam propagation direction of the first multilayer structure and the side surfaces parallel to the laser beam propagation direction of the second multilayer structure are facets of {111} planes. In a preferred embodiment the electrical resistance of said burying layer is higher than that of said multilayer structure. In a preferred embodiment the first multilayer structure includes a layer represented by Al x Ga 1-x As (x ≥ 0.7) at the top thereof. In a preferred embodiment the burying layer consists of an SOG. In a preferred embodiment the current blocking layer is made of semiconductor material. In a preferred embodiment the current blocking layer is made of dielectric material. In a preferred embodiment the current blocking layer is made of semiconductor material containing aluminium. In a preferred embodiment the current blocking layer is semi-insulating. Thus, the invention described herein makes possible the objectives of: (1) providing a semiconductor laser device such that the width of the active layer is controlled with high precision, which can oscillate stably in the single fundamental transverse mode at a low threshold current level, as well as a method of producing the same; (2) providing a semiconductor laser device in which high precision control is not necessary in the step of forming the height of the burying layer, and the top face of the wafer can easily be levelled, as well as methods for accomplishing the same; (3) providing a semiconductor laser device which can emit two varieties of light polarized in mutually perpendicular directions, as well as a method accomplishing the same; (4) providing a semiconductor laser device which, although having relatively wide mesa stripe structures, are nevertheless capable of emitting laser light oscillating in a single fundamental transverse mode, and can be manufactured with a high yield, as well as a method of producing the same; (5) providing a semiconductor laser device which has excellent response characteristics with respect to the modulations of the driving current, in addition to excellent temperature characteristics, as well as a method of producing the same; and (6) providing a semiconductor laser device having a BH structure suitable for mass production, as well as a method of mass producing the same. BRIEF DESCRIPTION OF THE DRAWINGS This invention may be better understood and its numerous objects and advantages will become apparent to those skilled in the art by reference to the accompanying drawings as follows: Figure 1 is a cross-sectional view of a first comparative example. Figures 2A through 2E are cross-sectional views illustrating the process of fabrication of the first comparative example. Figure 3 is a cross-sectional view of a second comparative example. Figure 4 is a cross-sectional view of a third comparative example. Figure 5 is a cross-sectional view of a fourth comparative example. Figures 6A through 6E are cross-sectional views illustrating the process of fabrication of the fourth comparative example. Figure 7 is a cross-sectional view of a fifth comparative example. Figure 8 is a cross-sectional view of a first embodiment of the present invention. Figures 9A through 9C are cross-sectional views illustrating the process of fabrication of the first embodiment of the present invention. Figure 10 is a cross-sectional view of a second embodiment of the present invention. Figure 11 is a cross-sectional view of a comparative example. Figure 12 is a cross-sectional view of a third embodiment of the present invention. Figure 13 is a graph showing the relations between growth rates of layers grown in a channel along the [01 1 ] direction and the width of the channel. Figures 14A and 14C are graphs showing the relations between thicknesses of layers grown in a channel along the [011] direction and the corresponding growth time. Figures 14B and 14D are schematic diagrams showing the cross-sections of the respective layers grown in a channel along the [011]. Figures 15A and 15C are graphs showing the relations between thicknesses of layers grown in a channel along that [01 1 ] direction and the corresponding growth time. Figures 15B and 15D are schematic diagrams showing the cross-sections of the respective layers grown in a channel along the [011]. Figure 16 is a cross-sectional view of a fourth embodiment of the present invention. Figure 17 is a cross-sectional view of an fifth embodiment of the present invention. Figure 18 is a cross-sectional view of a sixth embodiment of the present invention. Figures 19A through 19D are cross-sectional views illustrating the process of fabrication of the fourth embodiment of the present invention. Figure 20 is a cross-sectional view illustrating a prior art. Figure 21 is a cross-sectional view illustrating other prior art. Figure 22 is a cross-sectional view illustrating still other prior art. Figure 23 is also a cross-sectional view illustrating still other prior art. Figure 24 is also a cross-sectional view illustrating still other prior art. Figure 25 is also a cross-sectional view illustrating still other prior art. Figure 1 shows a cross-sectional view of a comparative example. As shown in Figure 1, a noncrystalline dielectric film 2 of thickness 0.2 to 0.5 µm, composed of Si 3 N 4 , is formed over a (100)-oriented n-type indium phosphide substrate 1 . In the dielectric film 2 is formed a channel 10, of width 5 µm, running along the [011] direction (resonator direction, perpendicular to the plane of Figure) and extending down to the substrate 1 . Owing to the channel 10 reaching the substrate 1 in the dielectric film 2 , driving current can flow between the electrodes via the channel 10. Over the substrate 1 and within the channel 10 is formed a multilayer structure 11 . The multilayer structure 11 has a silicon-doped n-type indium phosphide cladding layer 3 (thickness 2 µm, carrier concentration n = 1 x 10 18 /cm 3 ), an undoped GaInAsP active layer 4 (thickness 0.15 µm, oscillation wavelength 1.3 µm), a zinc-doped p-type indium phosphide cladding layer 5 (thickness 1 µm, carrier concentration p = 5 x 10 17 /cm 3 ), and a zinc-doped p-type GaInAsP contact layer 6 (thickness 0.1 µm, carrier concentration p = 1 x 10 18 /cm 3 ), in that order from the substrate 1 . The side faces of the multilayer structure 11 are (111) B planes, the angle between the side faces and the surface of the substrate 1 being 54.7°. Therefore, the width of the active layer 4 , which is 2 µm in this embodiment, the width of the channel 10, and the thickness of the n-type indium phosphide cladding layer 3 are geometrically determined by this angle. As a burying layer, an iron-doped indium phosphide layer 7 , with resistance (resistivity 0.1 MΩcm) higher than that of the multilayer structure 11 , is formed over the region of the substrate 1 and the noncrystaline dielectric film 2 so as to cover the side faces of the multilayer structure 11 . An AuZn electrode 8 is formed above this high-resistance indium phosphide layer and a p-type GaInAsP contact layer 6 , while an AuGe electrode 9 is formed on the reverse face of the substrate 1 . Thus, the semiconductor laser device has a mesa stripe which has the multilayer structure 11 with (111) B facets as side surfaces. The angle between these (111) B facets and the upper surface of the substrate 1 is the crystallographically determined value 54.7°. As will be explained below, this type of mesa stripe having (111) B facets as side faces can be formed by, for example, selective growth using a MOCVD technique. The stripe width of the active layer 4 is determined by the angle, the width of the channel 10 and the thickness of the n-type indium phosphide cladding layer 3 , and is therefore subject to but slight statistical variation, consequently, the transverse oscillatory mode is stable, moreover, variation in characteristics among individual devices is diminished. Also, the burying layer has a high electrical resistance, and moreover, the dielectric layer 2 is formed between the burying layer and the substrate 1 , thereby decreasing the current flowing in the burying layer. A method for the production of the semiconductor laser device illustrated in Figure 1 will be explained with reference to Figure 2. First, the dielectric film 2 composed of Si 3 N 4 was formed by a plasma CVD technique over the (100)-oriented n-type indium phosphide substrate 1 . Next, using a conventional photoetching process, the channel 10 of width 5 µm running along the [011] direction was formed in the dielectric film 2 (Figure 2A). Also, the etching conditions were adjusted so that a depth of the channel 10 reached the substrate 1 . Next, by a selective growth process using an MOCVD method, the multilayer structure 11 with a double heterostructure was formed only on the portion of surface of the substrate 1 within channel 10 (Figure 2B). In this process, crystal growth does not occur on the noncrystalline dielectric film 2 . By appropriately regulating the gaseous species, etc., during the course of crystal growth, the n-type indium phosphide cladding layer 3 , the undoped GaInAsP active layer 4 , the p-type indium phosphide cladding layer 5 , and the p-type GaInAsP contact layer 6 were continuously grown in that order from the side of substrate 1 . During this growth process, the substrate temperature was maintained at approximately 650°C and the pressure of the ambient area at approximately 76 torr. In this selective growth process, the growth rate is subject to a plane orientation dependence which is such that crystal growth does not occur on (111) B planes, and consequently (111) B facets were formed as the side faces of the multilayer structure 11 as a result of the growth process. Thus, above the channel 10 running along the [011] direction, there was formed the multilayer structure 11 with a (100) plane as an upper face and with (111) B planes as side faces running along the channel 10 . Next, over the dielectric film 2 , upon which the multilayer structure 11 had not been formed, a high resistance indium phosphide current blocking layer 7 was grown so as to cover the side faces of the multilayer structure 11 . During this growth process, the substrate temperature was maintained at approximately 550°C and the ambient pressure at approximately 760 torr (normal pressure). Since selective growth does not occur under these growth conditions, layers of nearly equal thickness were grown above both the multilayer structure 11 and the dielectric film 2 (Figure 2C). Also, since the dielectric film 2 is noncrystalline, the high-resistance indium phosphide current blocking layer 7 grown on this dielectric film 2 is also noncrystalline or polycrystalline. According to the embodiment, the selective growth process for forming the multilayer structure 11 as well as the nonselective growth process for forming the burying layer were both performed continuously within the same MOCVD apparatus, without removal of the wafer into the external atmosphere, by merely changing the temperature, pressure and other growth conditions. Next, after coating the entire wafer surface with the polyimide resin PIQ (not shown in Figures), this polyimide resin PIQ as well as a portion of the high-resistance indium phosphide current blocking layer 7 were etched from their upper surfaces down to the p-type GaInAsP contact layer 6 , thereby levelling the upper surface of the wafer (Figure 2D). Then, an AuZn electrode 8 was formed over the levelled high-resistance current blocking layer 7 and the p-type GaInAsP contact layer 6 , and finally, an AuGe electrode 9 was formed on the reverse face of the substrate 1 , thereby producing the semiconductor laser device illustrated in Figure 2E. Thus, in the present embodiment, in order to form the active layer 4 with a prescribed width and with high manufacturing yield, a multilayer structure 11 containing the said active layer 4 was selectively grown by MOCVD over the channel 10 on the substrate 1 . In this manner, (111) B facets were formed as the side faces of the multilayer structure 11 , which grew in the form of a ridge. Since the angle between these (111) B facets and the surface of the substrate 1 is the crystallographically determined value 54.7°, the width of the active layer 4 could be controlled with high precision by properly adjusting the thickness of the n-type indium phosphide cladding layer 3 with respect to the width of the channel 10 . Since the ridge-shaped multilayer structure 11 was formed in this manner, the process for deeply etching a prescribed portion of a multilayer structure formed over the entire surface of the wafer, as in the conventional fabrication methods described above, was not necessary. Therefore, despite the fact that the design value of the width of the active layer 4 was of the order of 2 µm, deviations from this value were easily kept below 0.1 µm. Hence, the width of the active layer 4 could be controlled with good reproducibility, and no large statistical dispersion occurred in the width of the said active layer 4 . Moreover, since the selective and the nonselective growth processes were performed continuously within the same MOCVD apparatus and without removing the wafer into the external atmosphere, the process was simple and the also the entry of impurities from the surrounding atmosphere into the crystalline layers was prevented. Furthermore, the high-resistance indium phosphide current blocking layer 7 which was formed as the burying layer is a high-resistance layer without a p-r junction, high-precision control of the thickness of this layer was not necessary. Therefore, nonuniformity in process control did not give rise to increased flow of currents in the burying layer, and semiconductor laser devices with low threshold level were fabricated with high yield. Next, a second comparative example will be explained with reference to Figure 3. In the second comparative example, the channel 10 runs along the [01 1 ] direction. A noncrystalline dielectric film 2 of thickness 0.3 µm, composed of Si 3 N 4 is formed over a (100)-oriented n-type indium phosphide substrate 1 , and in this dielectric film 2 is formed a channel 10 of width 1.5 µm running along the [01 1 ] direction (resonator direction, perpendicular to the plane of the Figure). The channel reaches the substrate 1. Owing to the fact that the lengthwise direction of the channel 10 is [01 1 ], the angle between the (111) B planes which constitute the side faces of the multilayer structure 11 selectively grown in the channel 10 is the crystallographically determined value 125.3°. Therefore, as shown by Figure 3, unlike the first embodiment, the width of the active layer 4 in the second embodiment is greater than that of the channel 10. However, in the present example also, the width of the active layer 4 can be controlled with high precision by properly adjusting the thickness of the n-type indium phosphide cladding layer 3 with respect to the width of the channel 10 , hence, in this respect, the same efficacy as was realized in the first example can be obtained. Next, a third comparative example will be explained with reference to Figure 4. In this third comparative example, the processes up through the formation of the multilayer structure 11 having a double heterostructure are the same as the corresponding processes in the first embodiment, and therefore only the processes beginning with the formation of the burying layer will be explained here. In the fabrication process of the third comparative example, after the formation of the multilayer structure 11 by a selective growth process, a high-resistance indium phosphide layer 7 , which functions as the burying layer, is grown, using the same method as that employed for this purpose in the first comparative example, over the region of the substrate 1 over which the multilayer structure 11 has not been formed. However, one of the points wherein the present process differs from that of the first comparative example is that the thickness of the high-resistance indium phosphide layer 7 in the present case is less than that of the multilayer structure 11. After the formation of the high-resistance indium phosphide layer 7 , p-type impurities are introduced by ion implantation into the portion of the high-resistance indium phosphide layer 7 situated above the p-type GaInAsP contact layer 6 , thereby converting this portion only into a low-resistance p-type diffusion layer 13 . Next, after levelling the wafer surface by forming an SOG film 14 on the wafer surface, the surface of the p-type diffusion layer 13 is exposed by etching the SOG film 14. Finally, an AuZn electrode 8 is formed over the p-type diffusion layer 13 and the SOG film 14 , and an AuGe electrode 9 is formed on the reverse face of the substrate 1 . Like those of the other examples, the semiconductor laser device of the present example permits the achievement of stable single transverse mode oscillations with a low current level. The present example has been explained with reference to an example wherein the levelling of the wafer surface was accomplished by joint use of SOG coating and etching, however, this levelling can also be accomplished by SOG coating alone. Moreover, not only ion implantation methods but also doping methods can be used for the formation of the p-type diffusion layer 13. Also, although GaInAsP system semiconductor materials were used in each of the examples described above, the same effects can also be obtained by using other semiconductor systems, for example, semiconductor materials such as AlGaAs systems, InGaAlP systems, etc. Furthermore, as regards conductivity type, semiconductor materials with conductivity types opposite to those of the above embodiments can also be used. Moreover, the examples were explained with reference to [011] and [01 1 ] as the lengthwise directions of the channels, however, other crystallographically equivalent directions represented by <011> can also be used. Figure 5 shows a cross-sectional view of a fourth comparative example of the present invention. As shown in Figure 5, a noncrystalline dielectric film 102, composed of silica, is formed on a (100)-oriented n-type indium phosphide substrate 101 with carrier concentration n = 2 x 10 18 /cm 3 . In the dielectric film 102 is formed a channel 112 of width 5 µm, running along the [011] direction (resonator direction, perpendicular to the plane of the Figure) and reaching the substrate 101. Owing to the channel 112 in the dielectric film 102, driving current can flow between the electrodes via the said channel 112. Over the substrate 101 and within the channel 112 is formed a multilayer structure. The multilayer structure consisting of an n-type indium phosphide buffer layer 103 (thickness 1 µm, carrier concentration n = 1 x 10 18 /cm 3 ), an n-type indium phosphide cladding layer 104 (thickness 1 µm, carrier concentration n = 1 x 10 18 /cm 3 ), an undoped InGaAsP active layer 105 (thickness 0.2 µm, oscillation wavelength 1.3 µm), and a p-type indium phosphide cladding layer 106 (thickness 1.5 µm, carrier concentration p = 1 x 10 17 /cm 3 ), in that order from the substrate side 101. The multilayer mesa stripe constitutes the lower portion 113 of a mesa stripe to be described below. The cross-section of this lower portion 113 of the mesa stripe is triangular in shape, with (111) B facets as side faces. The angle between the (111) B facets and the surface of the substrate 101 is 54.7°. The width of the active layer 105 , which is 2 µm, is geometrically determined by this angle, the width of the channel 112 , n-type indium phosphide buffer layer 103 and the thickness of the n-type indium phosphide cladding layer 104 . Over the lower portion 113 of this mesa stripe is formed a p-type indium phosphide layer 107 (thickness 2 µm, carrier concentration p = 1 x 10 18 /cm 3 ), with refractive index lower than that of the active layer 105 , in such a manner as to cover the side faces of the active layer 105 . Also, a p-type InGaAsP cap layer 108 (thickness 0.5 µm, carrier concentration p = 6 x 10 18 /cm 3 ) is formed above the p-type indium phosphide layer 107 . Thus, a mesa stripe is formed by a lower portion 113 consisting of the n-type indium phosphide buffer layer 103 , the n-type indium phosphide cladding layer 104 , the undoped InGaAsP active layer 105 , and the p-type indium phosphide cladding layer 106 , combined with an upper portion 114 consisting of the p-type indium phosphide layer 107 and the p-type InGaAsP layer 108 . As shown by Figure 5, the cross-sectional shape of the said mesa stripe is hexagonal. The p-type indium phosphide layer 107 and the p-type InGaAsP cap layer 108 are not formed on the silica dielectric film 102 . As a burying layer, an SOG (spin-on glass) film 109 , with excellent insulating characteristics, is formed over the region of the substrate 101 other than that upon which the mesa stripe has previously been formed, so as to cover the side faces of the mesa stripe. The upper surface of the wafer is levelled by covering the mesa stripe with the SOG film 109 . An AuZn electrode 110 is formed over this levelled upper surface of the wafer and an AuGe electrode 111 is formed on the reverse face of the substrate 101 . Thus, the lower portion 113 of the mesa stripe of the semiconductor laser device of the present embodiment has (111) B facets as side faces, and the angle between these (111) B facets and the surface of the substrate 101 is the crystallographically determined value 54.7°. Therefore, the semiconductor laser device of the present embodiment has an active layer 105 with a width determined by this angle, the width of the channel 112 , and the combined width of the n-type indium phosphide buffer layer 103 and the n-type indium phosphide cladding layer 104 . Consequently, the transverse oscillatory mode is stable, moreover, variation in oscillatory characteristics among individual devices is slight. The side faces of the InGaAsP active layer 105 in the lower portion 113 of the mesa stripe are covered by the p-type indium phosphide layer 107 of the upper portion 114 of the mesa stripe, and the refractive index of the p-type indium phosphide layer 107 is lower than that of the active layer 105. Therefore, the laser light generated in the interior of the active layer 105 is effectively confined within the said active layer 105. Also, owing to the built-in potential generated at the interface between the InGaAsP active layer 105 and the p-type indium phosphide layer 107 , the carriers injected into the active layer 105 are confined within the said active layer 105. Therefore, the injected carriers effectively contribute to the laser oscillations, and the threshold current level is lowered. Also, since the lower portion 113 of the mesa stripe multilayer structure, which includes the active layer 105, is surrounded by the p-type indium phosphide layer 107 , which has comparatively high thermal conductivity, the heat generated in the active layer 105 is rapidly released from the lower portion 113 into the burying layer. Moreover, the thermal expansion coefficient of the InGaAsP active layer 105 is comparatively close to that of the p-type indium phosphide layer 107, hence, differences in thermal expansion rates do not cause crystal defects or other adverse effects in the vicinity of the interface between the InGaAsP active layer 105 and the p-type indium phosphide layer 107, and therefore interfacial levels are not prone to arise. Hence, the configuration of the present embodiment provides long-life semiconductor laser devices with excellent temperature characteristics and reliability. These excellent characteristics would be difficult to obtain with a configuration allowing direct contact between the lower portion 113 of the mesa stripe multilayer structure and the SOG layer 109. Since the SOG layer 109 which constitutes the burying layer has superior insulating characteristics and lower permittivity than the semiconductors conventionally used as burying layers, the reactive current flowing in the burying layer is diminished, and, moreover, excellent high-speed response characteristics are obtainable. The current versus light output characteristics of semiconductor laser devices having a semiconductor layer (active layer) emitting long-wave laser light are usually very susceptible to changes arising from temperature fluctuations. In particular, the current-light output characteristics of semiconductor laser devices possessing configurations with burying layers including p-n junctions upon which a reverse bias is applied are especially prone to changes concomitant with temperature fluctuations, since the leakage currents of the p-n junctions has strong temperature dependence. Therefore, a configuration such as that of the present embodiment, employing an SOG film (without p-n junctions) as the burying layer, is highly suitable for semiconductor laser devices emitting long-wave light. A method of fabrication of the semiconductor laser device illustrated in Figure 5 will be explained with reference to Figure 6. First, the dielectric film 102 was deposited by a plasma CVD technique over a (100)-oriented n-type indium phosphide substrate 101 . Next, using a conventional photoetching process, the channel 112 of width 5 µm, running along the [011] direction, was formed in the dielectric film 102 (Figure 6A). The etching conditions were adjusted so that the depth of the channel 112 reached the substrate 101 . Next, by a selective growth process using a MOCVD method, the multilayer structure which was to constitute the lower portion 113 of the mesa stripe was formed on the portion of surface of the substrate 101 within channel 112 (Figure 6B). By appropriately regulating the gaseous species, etc., during the course of crystal growth, the n-type indium phosphide buffer layer 103 , the n-type indium phosphide cladding layer 104 , the undoped InGaAsP active layer 105 , and the p-type indium phosphide cladding layer 106 were continuously grown in that order from the side of the substrate 101 . During this growth process, the substrate temperature was maintained at approximately 650°C and the pressure of the ambient area at approximately 10 torr. In this selective growth process, the growth rate is subject to a plane orientation dependence which is such that crystal growth does not occur on (111) B planes, and consequently (111) B facets were formed as the side faces of the multilayer structure as a result of this growth process. Thus, the lower portion 113 of the mesa stripe, with (111) B planes as side faces, and with a triangular cross-section, was formed above the channel 112 running along the [011] direction. Next, using an LPE technique (growth temperature 600°C), the p-type indium phosphide layer 107 and the p-type InGaAsP cap layer 108 were successively formed, thereby forming a mesa stripe (Figure 6C). These layers grew only on the (111) planes of the lower portion 113 of the mesa stripe, and not on the silica dielectric layer 2 . In this manner, the side faces of the active layer 105 were covered by the p-type indium phosphide layer 107 with refractive index lower than that of the said active layer 105 . Next, an SOG solution was coated onto the top of the wafer by a spin coating technique, thereby levelling the wafer surface which had been rendered irregular by the formation of the mesa stripe. The silica concentration in the SOG solution used for this purpose was 20%, and the wafer was rotated at 1000 rpm for a period of 30 seconds while the said SOG solution was applied. After coating, the wafer was baked at 450°C for 30 minutes. By this process, a vitreous SOG film 109 was formed over the dielectric film 102 in such a manner as to bury the outside of the mesa stripe (Figure 6D). Finally, the AuZn electrode 10 was formed on the wafer surface which had been levelled by the SOG film 109, and the AuGe electrode 11 was formed on the reverse face of the substrate 101 (Figure 6E), thereby producing the semiconductor laser device of Figure 5. Thus, in the present example, in order to form an active layer 105 with a prescribed width and with good manufacturing yield, an MOCVD technique was used to selectively form the multilayer structure including the active layer 105 in the form of a mesa stripe above the channel 112 on the substrate 101 . In this manner, (111) B plane facets were formed as the side faces of the multilayer structure. Since the angle between these (111) B facets and the surface of the substrate 101 is the crystallographically determined value 54.7°, the width of the active layer 105 could be controlled with high precision by properly adjusting the thickness of the n-type indium phosphide buffer layer 103 and the n-type indium phosphide cladding layer 104 with respect to the width of the channel 112 . In the present embodiment, a process for deeply etching a prescribed portion of a multilayer structure formed over the entire surface of the wafer, as in the conventional fabrication methods described above, was not necessary. Therefore, despite the fact that the design value of the width of the active layer 105 was of the order of 2 µm, deviations from this value were easily kept below 0.1 µm. Hence, the width of the active layer 105 could be controlled with good reproducibility, and no large statistical dispersion occurred in the width of the active layer 105. Moreover, the SOG film 109 which was employed as the burying layer has a high electrical resistance as well as displaying excellent adhesion to the dielectric film 102 , which permits the fabrication with good yield of semiconductor laser devices having low threshold currents. Furthermore, in the present embodiment, the method used to form the burying layer consisting of an SOG film 109, that is, spin coating, permits the formation of a level film over the wafer surface in a simple manner, and therefore the wafer surface is more readily levelled as compared with conventional fabrication methods wherein burying layers consisting of semiconductor films are formed by a crystal growth processes. Figure 7 shows a cross-sectional view of the semiconductor laser device of a fifth comparative example. Crystallographically, the longitudinal direction of the channel in the semiconductor laser device illustrated by Figure 5 is [011], whereas that of the channel in the present comparative example is [00 1 ]. Consequently, in the present comparative example, the lower portion 113 of the mesa stripe selectively grown by the MOCVD method is hexagonal, as shown in Figure 7. The active layer 105 is composed of a portion parallel to the substrate 101 and a portion inclined toward the substrate 101 . The side faces of the lower portion 113 of the multilayer structure formed in the present embodiment are, like those of the corresponding lower portion 113 in the preceding comparative example, {111} planes. Above this lower portion 113, an n-type indium phosphide layer 107 with lower refractive index then the active layer 105 is selectively formed in such a manner as to cover the lateral faces of the active layer, and a p-type InGaAsP cap layer 108 is formed over the n-type indium phosphide layer 107 . In the present comparative example also, a mesa stripe is formed by combination of a lower mesa stripe multilayer structure 113, formed by successive superposition of an n-type indium phosphide buffer layer 103, an n-type indium phosphide cladding layer 104 , an undoped InGaAsP active layer 105 , and a p-type indium phosphide cladding layer 106, in that order from the side of the substrate 101, with an upper mesa stripe multilayer structure 114 consisting of an indium phosphide layer 107 and an InGaAsP cap layer 108. In the active layer 105 , laser light is confined in the portion of the layer which is parallel to the surface of the substrate 101 . In order to secure laser oscillations in the single fundamental transverse mode, the width of the portion of the active layer 105 which is parallel to the substrate 101 must be set to a value of the order of 2 µm. For this reason, the width of the channel formed in the dielectric layer 102 must be smaller than that of the corresponding channel in the semiconductor laser device shown in Figure 5. Like the semiconductor laser devices described above, the semiconductor laser device of the present example displays excellent temperature characteristics and reliability, as well as small current flowing through the burying layer and superior high-speed response characteristics. Also, explanations were presented with reference to examples wherein InGaAsP/InP systems are used as semiconductor materials. However, the same efficacy as that already described in connection with the embodiments can also be obtained in semiconductor laser devices employing other semiconductor materials, for example, GaAlAs/GaAs systems, etc. In such cases, the semiconductor layers which are formed over the lower portion 113 of the mesa stripe multilayer structure with {111} planes as side faces can be formed from semiconductor materials with the same composition as that of the cladding layers in the lower portion 113. Moreover, as regards methods for the selective growth upon the substrate within the channel area of the lower portion 113 of the mesa stripe multilayer structure possessing {111} plane facets, MBE as well as MOCVD techniques can be used for this purpose. Furthermore, as regards the conductivity type of the various semiconductor layers, semiconductor materials with conductivity types opposite to those of the above embodiments can also be used. Not only silica but also other dielectric materials can be used for the dielectric layers, for example, silicon nitride layers, alumina layers, and various types of plastic layers composed of materials such as photosensitive polyimide resins or resists, etc., are suitable for the present purpose. As for the burying layer, not only SOG films but also films composed of plastic materials such as polyimide resins, etc., are applicable for this purpose. Figure 8 shows a cross-sectional view of a first embodiment of the present invention. A semi-insulating vanadium-doped gallium arsenide current blocking layer 202 of thickness 0.5 µm and resistivity of the order 1 x 10 6 Ωcm is formed above a (100)-oriented n-type gallium arsenide substrate 201a. In this semi-insulating gallium arsenide current blocking layer 202 is formed a channel 210a, 3 µm in width, running along the [011] direction (resonator direction, perpendicular to the plane of the Figure) and extending down to the substrate 201a . Owing to the channel 210a in the said semi-insulating gallium arsenide current blocking layer 202 , driving current flows between the electrodes via the said channel 210a . A mesa stripe structure with triangular cross-section is formed on the substrate 201a and within the channel 210a . The mesa stripe structure has a selenium-doped n-type AlGaAs cladding layer 203a (thickness 1.0 µm, carrier concentration n = 1 x 10 18 /cm 3 ), an undoped AlGaAs active layer 204a (thickness 0.1 µm), and a zinc-doped p-type AlGaAs cladding layer 205a (thickness 1.0 µm, carrier concentration p = 1 x 10 18 /cm 3 ) laminated in that order from the substrate side. The side faces of this mesa stripe structure are {111} B planes, hence, the angle between these side faces and the upper surface of the substrate 201a is 54.7°. Therefore, the width of the active layer 204a , which is 1.5 µm, is geometrically determined by this angle, the width of the channel 210a , and the thickness of the n-type AlGaAs cladding layer 203a On the other hand, over the semi-insulating gallium arsenide current blocking layer 202 are formed a selenium-doped n-type AlGaAs cladding layer 203b , an undoped AlGaAs active layer 204b , and a zinc-doped p-type AlGaAs cladding layer 205b , in that order from the substrate side. A p-type AlGaAs burying layer 206 (thickness 5 µm, carrier concentration p = 1 x 10 18 /cm 3 ) is formed over the p-type AlGaAs cladding layers 205a and 205b. The p-type AlGaAs burying layer 206 covers the mesa stripe structure. A zinc-doped p-type gallium arsenide contact layer 207 (thickness 0.3 µm, carrier concentration p = 1 x 10 19 /cm 3 ) is formed over the p-type AlGaAs burying layer 206. An Au/Zn electrode 208 is formed over the p-type gallium arsenide contact layer 207 , and an Au/Ge electrode 209 is formed on the reverse face of the substrate 201a. Since the width of the active layer 204a in the semiconductor laser device of the present embodiment can be adjusted through the width of the channel 210a and the thickness of the n-type gallium arsenide cladding layer 203a, the transverse oscillations of the emitted laser light can be restricted to the single fundamental mode, and moreover, the degree of nonuniformity among the characteristics of individual devices is slight. Furthermore, in the semiconductor laser device of the present embodiment, a mesa stripe structure is formed within a concave portion above the substrate 201a, moreover, since the multilayer structure grown when this mesa stripe structure is formed is also present above areas other than the concave portion, the upper surface of the wafer is adequately levelled by the burying layer, etc. Next, the method of fabrication of the semiconductor laser device illustrated by Figure 8 will be explained with reference to Figure 9. First, the vanadium-doped semi-insulating gallium arsenide current blocking layer 202 was formed by an MOCVD technique over the (100)-oriented n-type gallium arsenide substrate 201a . Next, using a conventional photoetching process, the channel 210a of width 3 µm running along the [011] direction was formed in the said semi-insulating gallium arsenide current blocking layer 202 (Figure 9A). Also, the etching conditions were adjusted so that the depth of the channel 210a reached the substrate 201a . Next by a selective growth process using an MOCVD method, the mesa stripe structure with a triangular cross-section was formed on the portion of the surface of the substrate 201a within the channel 210a (Figure 9B). In this crystal growth process, by appropriately regulating the gaseous species, etc., the n-type AlGaAs cladding layer 203a , the undoped AlGaAs active layer 204a , and the p-type AlGaAs cladding layer 205a were continuously grown in that order from the side of the substrate 201a . During this growth process, the V/III ratio was 120, while the substrate temperature was maintained at approximately 750°C and the pressure of the ambient at approximately 50 torr. Under these growth conditions, the growth rate is subject to a plane orientation dependence which is such that crystal growth does not occur on {111} planes, and consequently {111} B facets were formed as the side faces of the mesa stripe structure as a result of the growth process. Thus, above the channel 210a running along the [011] direction, there was formed the mesa stripe structure with a triangular cross-section and with {111} B planes as the side faces running along the channel 210a . Simultaneously, during the crystal growth process, the n-type AlGaAs cladding layer 203b , the undoped AlGaAs active layer 204b and the p-type AlGaAs cladding layer 205b , in that order from the side of the substrate 201a , were also continuously grown over the semi-insulating gallium arsenide current blocking layer 202 . Next, the p-type AlGaAs burying layer 206 and the p-type gallium arsenide contact layer 207 were successively grown so as to cover the said mesa stripe structure and the p-type AlGaAs cladding layer 205b . During this crystal growth process, the substrate temperature was maintained at approximately 750°C and the ambient pressure at 760 torr. The crystal growth conditions are nonselective with respect to crystal plane orientation. Therefore, the p-type AlGaAs burying layer 206 also grew on the side faces of the said mesa stripe structure, and consequently the resulting upper surface of the p-type AlGaAs burying layer 206 was level. In the present embodiment, the selective growth process for forming the mesa stripe structure as well as the nonselective growth process for forming the burying layer were performed continuously within one and the same MOCVD apparatus, without contact between the wafer and the external atmosphere. An Au/Zn electrode 208 was formed over the level upper surface of the p-type gallium arsenide layer 207, and an Au/Ge electrode 209 was formed on the reverse face of the substrate 201a (Figure 9C), thereby completing the fabrication of the semiconductor laser device of Figure 8. Thus, in the present embodiment, using MOCVD techniques, a mesa stripe structure including the active layer 204 was selectively grown above the channel 210a on the substrate 201a, and {111} B plane facets were formed as side faces of the said mesa stripe structure. Moreover, since the selective and nonselective growth processes were performed continuously within one and the same MOCVD apparatus and without contact between the wafer and the external atmosphere, the overall fabrication process was simplified, and the entry of impurities from the surrounding air into the crystal layers was prevented. Next, a second embodiment will be explained with reference to Figure 10. The major differences between the present embodiment and the first embodiment described above consist in the presence of a p-type Al X Ga 1-X As (X ≧ 0.7) layer 220 above the p-type AlGaAs cladding layer 205a and the fact that the burying layer 206 in the present embodiment is a semi-insulating AlGaAs layer. The p-type Al X Ga 1-X As layer 220 has a high aluminum content, and therefore the semi-insulating AlGaAs burying layer 206 displays almost no growth on the layer 220 . A p-type AlGaAs cladding layer 211 is formed over the semi-insulating AlGaAs burying layer 206, and a p-type gallium arsenide contact layer 207 is formed over layer 211. An Au/Zn electrode 208 is formed over the p-type gallium arsenide contact layer 207, and an Au/Ge electrode 209 is formed on the reverse face of the substrate 201a. The semiconductor laser device of the present embodiment, like that of the first embodiment described above, can emit laser light stably in a single fundamental transverse mode even at low current levels. Also, although both the embodiments utilize semi-insulating semiconductor materials as the current blocking layer 202 in which the channel 210a is located, a semiconductor layer with a conductivity type opposite to that of the substrate could also be employed for this purpose. Next, a comparative example will be explained with reference to Figure 11. In the comparative example, unlike the above-described embodiments, no semi-insulating gallium arsenide current blocking layer with a channel is formed above the (100)-oriented n-type gallium arsenide substrate 201b. In place of this, in the present comparative example, a channel 210b of width 3 µm and depth 0.5 µm, running along the [011] direction (resonator direction, perpendicular to the plane of the Figure) is formed directly in the substrate 201b by etching the upper surface of the substrate 201b . A mesa stripe structure similar to that of the embodiments described above is formed on the channel 210b in the substrate 201b by the same type of crystal growth process as the used in the preceding embodiments. Above the portion of the substrate 201b other than that upon which the said channel 210b has been formed, an n-type AlGaAs cladding layer 203b , an undoped AlGaAs active layer 204b , and a p-type AlGaAs cladding layer 205b , in that order from the side of the substrate 201b , are laminated by a method similar to that employed in the various embodiments described above. A semi-insulating AlGaAs burying layer 206 is formed above the p-type AlGaAs cladding layers 205a and 205b so as to cover the mesa stripe structure, and above this is formed a p-type gallium arsenide contact layer 207 . An Au/Zn electrode 208 is formed over the p-type gallium arsenide contact layer 207 , and an Au/Ge electrode 209 is formed on the reverse face of the substrate 201b . In the semi-insulating AlGaAs burying layer 206 and p-type gallium arsenide contact layer 207 , a stripe-shaped diffusion zone 230 , into which zinc has been selectively diffused, is formed in apposition to the channel 210b formed in the substrate 201b . This stripe-shaped diffusion zone 230 serves to form a confined current path between the p-type AlGaAs cladding layer 205a and the p-type gallium arsenide contact layer 207. The semiconductor laser device, like those of the other embodiments, can emit laser light stably in the single fundamental transverse mode even at low current level. Next, a third embodiment, formed with the use of an indium phosphide substrate, will be explained with reference to Figure 12. The semiconductor laser device of the present embodiment has the same structure as that of the first embodiment, but differs from the latter in the specific materials used for the various semiconductor layers. Upon the (100)-oriented n-type indium phosphide substrate 221a is formed a current blocking layer 222 of thickness 0.5 µm and resistivity 1 x 10 MΩcm, consisting of iron-doped semi-insulating Ga X In 1-X P Y As 1-Y (X = 0.46 (1-Y), 0 ≦ X ≦ 1), lattice-matched with the indium phosphide substrate 221a . A channel 210a of width 3 µm, reaching the substrate 221a and running along the [011] direction (resonator direction, perpendicular to the plane of the Figure) is formed in the semi-insulating Ga X In 1-X P Y As 1-Y current blocking layer 222. A mesa stripe structure with triangular cross-section is formed by successively superimposing, upon the portion of the surface of the substrate 221a within the channel 210a , a silicon-doped n-type indium phosphide cladding layer 223a (thickness 1.0 µm, carrier concentration n = 1 x 10 18 /cm 3 ), an undoped GaInAsP active layer 224a (thickness 0.1 µm), and a zinc-doped p-type indium phosphide cladding layer 225a (thickness 1.0 µm, carrier concentration p = 1 x 10 18 /cm 3 ), in that order from the side of the substrate 221a , thereby forming a double heterostructure. The side faces of this mesa stripe structure are {111} B planes. These various layers are grown by MOCVD techniques, maintaining the substrate temperature at approximately 650°C and the pressure of the ambient area at approximately 50 torr, with a V/III ratio of 200. Upon the semi-insulating Ga X In 1-X P Y As 1-Y current blocking layer 222 are successively laminated a silicon-doped n-type indium phosphide cladding layer 223b , an undoped GaInAsP active layer 224b , and a zinc-doped p-type indium phosphide cladding layer 225b , in that order from the side of the substrate 221a . A p-type indium phosphide burying layer 226 (thickness 5 µm, carrier concentration p = 1 x 10 18 /cm 3 ) is formed on the zinc-doped p-type indium phosphide layers 225a and 225b so as to cover the mesa stripe structure. A zinc-doped p-type GaInAsP contact layer 227 (thickness 0.3 µm, carrier concentration p = 1 x 10 19 /cm 3 ) is formed over the p-type indium phosphide burying layer 226. An Au/Zn electrode 228 is formed on the p-type GaInAsP contact layer 227 , and an Au/Ge electrode 229 on the reverse face of the substrate 221. The semiconductor laser device of the present embodiment also comprises a mesa stripe structure having {111} B facets as side faces. Consequently, the width of the active layer 224a in the semiconductor laser device of the present embodiment is subject to little statistical variation, and therefore the transverse oscillations of the emitted laser light can be restricted to the single fundamental mode, and moreover, the degree of nonuniformity among the characteristics of individual devices is slight. In the semiconductor laser devices of the second embodiment described above, the substrate and various semiconductor layers can also be replaced by the same type of substrate and the same varieties of semiconductor layers as those employed in the present embodiment. Thus, in the first to third embodiments described above, a mesa stripe structure is formed in a concave portion of the substrate, moreover, the multilayer structure which is grown in the process cf formation of the mesa stripe structure is also present above the area of the substrate other than the concave portion, thus providing the advantage of easy levelling of the wafer surface by the formation of the burying layer. Furthermore, as regards the conductivity type of the various semiconductor layers, semiconductor materials with conductivity types opposite to those of the above embodiments can also be used. Moreover, the channel can also be oriented in the [011] direction. That is, the direction of the channel could also be that represented by <011>. Figure 13 shows representative graphs indicating the relations between the channel width (µm) and the rate of growth (angstroms/min) of crystal layers grown within the channel. The curves A, B, C, and D in the figure indicate the growth rates of an indium phosphide layer upon a (100) plane, a gallium arsenide layer upon a (100) plane, an indium phosphide or gallium arsenide layer upon a (111) B plane, and an indium phosphide or gallium arsenide layer upon a (111) A plane, respectively. By utilizing the plane orientation dependence of the growth rate, mesa stripe structures with prescribed widths can be formed with high precision. Figure 14C shows the time dependence of the thickness of an AlGaAs layer grown upon a (001)-oriented gallium arsenide substrate initially covered by an AlGaAs layer with a channel running along the [011] direction. Growth was conducted by an MOCVD technique. As seen from Figure 14C, directly after the commencement of the growth, rapid formation of an AlGaAs layer is observed on the portion where the surface of the (100)-oriented gallium arsenide layer is exposed (i.e., the channel portion). On the other hand, one observes that no growth whatsoever occurs on the previously existing AlGaAs layer during the first 30 minutes of the process. This phenomenon was discovered by the present inventors. The reason for this delay in commencement of growth of the AlGaAs layer over the pre-existing AlGaAs layer is as follows. When the AlGaAs layer is exposed to the air, the oxygen in the air combines with the aluminum and therefore an oxide film is prone to form on the exposed surface of the AlGaAs layer. If such an oxide film is present, then growth of a further AlGaAs layer over this film does not occur. However, since the hydrogen ions generated by decomposition of the arsine in the deposition gas reduce the oxide film formed on the original AlGaAs layer, the oxide film is gradually removed by reduction. Therefore, after the commencement of crystal growth, when the period of time required for the removal of the oxide film has elapsed, an AlGaAs layer begins to grow over the pre-existing AlGaAs layer. As seen from Figure 14C, a period of 30 minutes was required for the removal of the oxide film by reduction in the experiments. On the other hand, almost no oxide film is formed on the surface of GaAs, since the latter contains no aluminum. Therefore, the formation of an AlGaAs layer on the gallium arsenide substrate within the channel begins directly after the initiation of the growth process. At approximately the time when growth begins on the pre-existing AlGaAs layer, the rate of growth of the AlGaAs layer within the channel changes. The reason for this is as follows. Under the conditions of the experiments, the rate of growth of the AlGaAs layer is determined by the content of organometallic compounds supplied to the growing surface of the AlGaAs layer from the deposition gas. Directly after the initiation of the growth process, the organometallic compounds are not consumed on the surface of the pre-existing AlGaAs layer, but diffuse rapidly within the channel. However, after the subsequent commencement of growth on the pre-existing AlGaAs layer, the quantity of organometallic compounds supplied within the channel decreases. Consequently, after the start of growth on the pre-existing AlGaAs layer, the rate of growth of the AlGaAs layer within the channel decreases. Figure 14A shows the time dependence of the thickness of an indium phosphide layer grown upon a (001)-oriented indium phosphide substrate initially covered by an AlGaInAs layer with a channel running along the [011] direction. The same phenomenon as that described above was also observed in this case. Figures 14B and 14D are schematic cross-sectional views of the respective grown layers. Figures 15A and 15C show the corresponding experimental results obtained when the direction of the channel was [01 1 ], while Figures 15B and 15D are schematic cross-sectional views of the respective grown layers. As seen from Figures 15A and 15C, the above-described time dependence of the thickness of the grown layer was also observed in the present case. However, when the longitudinal direction of the channel is [01 1 ], the cross-sectional shape of the grown stripe is hexagonal. Figure 16 shows a cross-sectional view of a fourth embodiment of the present invention. The semiconductor laser device of the present embodiment is of the same construction as that of the first embodiment (Figure 8), except for the fact that the current blocking layer 302 in the present case is composed of a semiconductor containing aluminum (AlGaAs). The process of fabrication of the semiconductor laser device shown in Figure 16 will now be explained with reference to Figures 19A to 19D. First, a vanadium-doped semi-insulating Al X Ga 1-X As current blocking layer 302 (X = 0.3) was formed by an MOCVD technique over the (100)-oriented n-type gallium arsenide substrate 301a (a p-type AlGaAs layer could also be used as the blocking layer 302 ). Next, using a conventional photoetching process, a channel 310a of width 3 µm running along the [011] direction was formed in the semi-insulating AlGaAs current blocking layer 302 (Figure 19A). Also, the etching conditions were adjusted so that the depth of the channel 310a reached the substrate 301a . Next, by a selective growth process using an MOCVD method, a mesa stripe structure with a triangular cross-section was formed on the portion of surface of the substrate 301a within the channel 310a (Figure 19B). In this crystal growth process, by appropriately regulating the gaseous species, etc., the n-type Al X Ga 1-X As cladding layer 303a (X = 0.5), the undoped AlGaAs active layer 304a , and the p-type Al X Ga 1-X As cladding layer 305a (x = 0.5) were continuously grown in that order from the side of the substrate 301a . During this growth process, the V/III ratio was 60, while the substrate temperature was maintained at approximately 750°C and the pressure of the ambient area at approximately 76 torr. Under these growth conditions, the growth rate is subject to a plane orientation dependence which is such that crystal growth does not occur on {111} planes, and consequently {111} B facets were formed as the lateral faces of the mesa stripe structure as a result of the growth process. Thus, above the channel 310a running along the [011] direction, there was formed a mesa stripe structure with a triangular cross-section and with {111} B planes as the lateral faces running along the channel 310a . Simultaneously, during the crystal growth process, an n-type Al X Ga 1-X As cladding layer 303b (X = 0.5), an undoped AlGaAs active layer 304b and a p-type Al X Ga 1-X As cladding layer 305b (x = 0.5), in that order from the side of the substrate 301a , were also continuously grown over the semi-insulating Al X Ga 1-X As current blocking layer 302 (X = 0.3). Next, a p-type Al X Ga 1-X As burying layer 306 (X = 0.5) and a zinc-doped p-type gallium arsenide contact layer 307 were successively grown so as to cover the mesa stripe structure and the p-type Al X Ga 1-X As cladding layer 305b (Figure 19C). During this crystal growth process, the ambient pressure was maintained at 760 torr. This crystal growth condition is nonselective with respect to crystal plane orientation. Therefore, the p-type AlGaAs burying layer 306 also grew on the lateral faces of the said mesa stripe structure, and consequently the resulting upper surface of the p-type AlGaAs burying layer 306 was levelled. In the present embodiment, the selective growth process used for the formation of the mesa stripe structure as well as the nonselective growth process used for the formation of the burying layer were performed continuously within one and the same MOCVD apparatus, without contact between the wafer and the external atmosphere. Finally, an Au/Zn electrode 308 was formed over the level upper surface of the p-type gallium arsenide layer 307 , and an Au/Ge electrode 309 was formed on the reverse face of the substrate 301a (Figure 19D), thereby completing the fabrication of the semiconductor laser device of Figure 16. Figure 17 illustrates a fifth embodiment of the present invention. After forming a mesa stripe structure by the same procedure as that used in the fourth embodiment, a semi-insulating AlGaAs burying layer 331 was formed. This growth process was conducted in such a manner that the burying layer 331 did not rise above the apex of the mesa stripe structure. In order to ensure that the height of the burying layer 331 did not exceed that of the apex, a p-type AlGaAs layer 330 was added to the apical portion of the mesa stripe structure. Since the rate of growth of the burying layer 331 on this p-type AlGaAs layer 330 is small, this serves to prevent the growth of the burying layer 331 beyond the level of the apex. Also, since this p-type AlGaAs layer 330 is selectively grown on the apical portion of the mesa stripe structure, appreciable growth of this layer does not occur on any area other than the said apical portion. A p-type cladding layer 311 is then formed so as to make contact with the apex. Figure 18 illustrates a sixth embodiment. In the present embodiment, a p-type AlGaAs layer 341 and an n-type AlGaAs layer 342 are successively and continuously formed to serve jointly as the burying layer. Thus, a p-n junction is formed within the burying layer. Then, a p-type AlGaAs cladding layer 332 is formed so as to make contact with the apical portion of the mesa stripe structure. It is understood that various other modifications will be apparent to and can be readily made by those skilled in the art without departing from the scope of this invention. Accordingly, it is not intended that the scope of the claims appended hereto be limited to the description as set forth herein, but rather that the claims be construed as encompassing all the features of patentable novelty that reside in the present invention, including all features that would be treated as equivalents thereof by those skilled in the art to which this invention pertains.

Claims: A method of producing a III-V semiconductor laser device comprising the steps of: forming a current blocking layer (202, 222, 302) on a semiconductor substrate (201a, 201b, 221a, 301a); forming a channel in said current blocking layer, the channel being formed to reach said substrate; forming a first multilayer structure comprising a plurality of semiconductor layers including an active layer (204a, 224a) said structure being in the form of a mesa stripe on said substrate and within said channel; and forming on said current blocking layer a second multilayer structure simultaneously with the first multilayer structure, the second multilayer structure including semiconductor layers of the same type as those included in the first multilayer structure; the method being characterised in that the current blocking layer is formed on a (100) plane of the substrate; in that the channel is oriented in the <011> direction; and in that the multilayer structures are grown using a metal-organic chemical vapor deposition technique, wherein the sustrate temperature, the ambient pressure and the V/III ratio are selected to provide selective growth of the multilayer structures whereby the side surfaces parallel to the laser beam propagation direction of the first and second multilayer structures are facets of {111} planes. A method of producing a semiconductor laser device according to claim 1 wherein the step of growing the first and second multilayer structures is carried out in a chemical vapour deposition apparatus; and wherein the method further comprises the step of growing in the chemical vapour deposition apparatus a semiconductor layer having a refractive index smaller than that of said active layer to cover the side surfaces parallel to the laser beam propagation direction of said active layer without contact between the substrate and the external atmosphere. A III-V semiconductor laser device comprising: a semiconductor substrate (201a, 201b, 221a, 301a); a current blocking layer (202, 222, 302) formed on a surface of the semiconductor substrate; a channel formed in the current blocking layer, the channel reaching the substrate; a mesa stripe having a first multilayer structure comprising a plurality of semiconductor layers including an active layer (204a, 224a, 304a) and formed on said substrate within said channel; a burying layer (206, 226, 306, 331, 341, 342) covering the side surfaces parallel to the laser beam propagation direction of the first multilayer structure; and a second multilayer structure interposed between the current blocking layer and the burying layer, the second multilayer structure including semiconductor layers of the same type as those included in the first multilayer structure; characterised in that the surface of the substrate is a (100) plane and is flat; in that the channel is oriented along the <011> direction; in that the side surfaces parallel to the laser beam propagation direction of the first multilayer structure and the side surfaces parallel to the laser beam propagation direction of the second multilayer structure are facets of {111} planes. A semiconductor laser device according to claim 3, wherein the electrical resistance of said burying layer is higher than that of said multilayer structure. A semiconductor laser device according to claim 3, wherein the first multilayer structure includes a layer represented by Al x Ga 1-x As (x ≥ 0.7) at the top thereof. A semiconductor laser device according to claim 3, wherein said burying layer consists of a spin-on-glass (SOG). A semiconductor laser device according to claim 3, wherein said current blocking layer is made of semiconductor material. A semiconductor laser device according to claim 3, wherein said current blocking layer is made of dielectric material. A semiconductor laser device according to claim 3, wherein said current blocking layer is made of semiconductor material containing aluminium. A semiconductor laser device according to claim 9, wherein said current blocking layer is semi-insulating.

Inventors: INOGUCHI KAZUHIKO, KONUSHI FUMIHIRO, KUDO HIROAKI, NAKANISHI CHITOSE, NAKATSU HIROSHI, OKUMURA TOSHIYUKI, SEKI AKINORI, SUGAHARA SATOSHI, TAKIGUCHI HARUHISA, INOGUCHI, KAZUHIKO, KONUSHI, FUMIHIRO, KUDO, HIROAKI, NAKANISHI, CHITOSE, NAKATSU, HIROSHI, OKUMURA, TOSHIYUKI, SEKI, AKINORI, SUGAHARA, SATOSHI, TAKIGUCHI, HARUHISA
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1990
Main classification: H01S3
IPC codes: H01S5, H01L21, H01L33