A METHOD AND APPARATUS FOR BATTERY CONSERVATION IN A SELECTIVE CALL RECEIVER

Abstract: In a battery powered selective call receiver receiving a synchronous signal (100), a battery saving method extends battery life by optimizing the amount of time (124, 128) the receiver circuit is activated when searching for reception of a predetermined code (134) after previously (104) acquiring synchronization with the signal.

Description: A METHOD AND APPARATUS FOR BATTERY CONSERVATION IN A SELECTIVE CALL RECEIVER Field of the Invention This invention relates in general to selective call receivers, and in particular to selective call receivers receiving synchronous signals. Background of the Invention Selective call receivers generally operate using batteries to allow the selective call receivers to be portable and compact. The selective call receivers must, therefore, utilize power saving techniques such as switching the receiver circuit of the selective call receiver On' and 'off in order to obtain the maximum possible life from the batteries. The 'on' time interval of the receiver circuit when the selective call receiver may potentially receive a selective call message addressed to the selective call receiver consumes power. Conversely, the 'off interval inhibits reception of the signal by the receiver circuit, thereby conserving power. Thus, it is desirable to minimize the 'on' time interval of the receiver circuit. When the receiver circuit loses the system signal either from the selective call receiver being out of range of the system transmitters, from being shielded by buildings, or when the channel is shared with another signal protocol,the receiver circuit typically returns to the initial synchronization acquisition mode. Regrettably, the synchronous acquisition mode is not very efficient in terms of battery life. Thus, a selective call receiver which is in a weak signal condition for a long period of time will consume a great deal of battery power to re-synchronize. Also when selective call receivers are turned 'off and then 'on' by the user, the receiver circuit usually powers up in the synchronization acquisition mode to search for the system signal, wasting much battery power. Thus, what is needed is a selective call receiver which conserves battery power by limiting the time which the selective call receiver operates in the power consuming synchronization acquisition mode. Summary of the Invention In one form, there is provided a method in a selective call receiver for activating a receiver circuit which has previously acquired synchronization with a synchronous signal. The receiver circuit is activated for an adjustable time duration, the time duration determined by the system stability comprising the stability of the selective call receiver and the stability of the signal, and the time since acquiring synchronization with the signal. Brief Description of the Drawing FIG. 1 is a block diagram of a selective call receiver according to the present invention. FIGs. 2A and 2B are diagrams of the synchronous signalling protocol of the preferred embodiment of the present invention. FIGs. 3A and 3B is a flowchart of the operation of the preferred embodiment of the present invention. FIG. 4 is timing diagrams of the operation of the preferred embodiment of the present invention. Detailed Description of the Invention Referring to FIG. 1, a selective call receiver receives signals via an antenna 10. A receiver/demodulator circuit 12 demodulates the received signals on one of a plurality of frequencies and provides the demodulated signals to a data port (RX DATA) 14 of a microprocessor 16. The microprocessor 16 includes at least one other input/output (I/O) port 17 and is programmed to acquire synchronization to and decode a selective call network signalling protocol. Acquiring synchronization comprises two steps: acquiring bit synchronization and acquiring frame synchronization. Bit synchronization is a process used to determine the location of bit boundaries of a data transmission having bits transmitted at a predetermined baud rate, and thereafter, to provide a clock to synchronously sample the bits. Frame synchronization frames the bits transmitted so that the data transmitted is in a. form to be decoded thereby indicating various word boundaries such as the first bit of address and data signals. Methods for acquiring synchronization to asynchronous signalling protocols are described in U.S. Patent Nos. 4,506,262 and 4,424,514. When synchronization has been acquired, the receiver's selective call address has been detected, and the signal has been decoded, an output is provided to an output device 18 via the I/O port 17. The output device 18 could be an audio amplifier and a speaker for providing audio output or a liquid crystal display (LCD) for providing a visual output. A battery 20 supplies power for operation of the selective call receiver, and particularly for operation of the microprocessor 16 and the devices of the receiver/ demodulator circuit 12. A switch 22 activates and deactivates the receiver /demodulator circuit 12 (i.e., switches the receiver circuit 'on' and Off) in response to a signal 13 received from the microprocessor 16. A clock 24 supplies timing signals to the microprocessor 16 for operation of the synchronization acquisition and other routines. The clock 24 is powered by the battery 20 and, in the preferred embodiment, is a real time clock for maintaining time even when the selective call receiver is de- energized (i.e., turned off). A memory 26 is used for the storage of information necessary to the operation of the routines of the present invention which produce the signal controlling switch 22. In the preferred embodiment, the memory 26 is a nonvolatile memory capable of being written into and read from by the microprocessor 16. User selectable controls 28 allow the user to command the microprocessor controller 16 to perform the selective call receiver operations well known to those skilled in the art. The user controls 28 typically include control switches such as an ON /OFF control button for energizing and de-energizing the selective call receiver. For a more detailed description of the fundamental structure and operation of selective call receivers, reference is made to U.S. Patent Number 4,518,961, U.S. Patent Number 4,649,538, and U.S. Patent Number 4,755,816, all commonly assigned to the same assignee as the present invention, and the teachings of which are hereby incorporated by reference. Referring to FIGs. 2A and 2B, the synchronous signalling protocol of the preferred embodiment comprises a system of sixty-four rotating frames 30. Each frame 30 in turn comprises a synchronization (sync) block 32 and eighteen information blocks 34. The time for the system to cycle, i.e. for the sixty-four frames 30 to be transmitted, is 256 seconds with four seconds for each frame 30. The information blocks 34 contain selective call addresses and data and, in some cases, system overhead information. Referring to FIG. 2B, portions of the sync block 32 of each frame are sent at a predetermined baud rate and may convey the baud rate information necessary to decode the eighteen information blocks. The sync block 32 also comprises synchronization information to allow the selective call receiver to acquire bit and frame synchronization. In the preferred embodiment, the sync block 32 comprises 192 bits when transmitted at 1200 baud for a total of 160 milliseconds (msec) transmission time. The 192 bits comprise a bit and frame synchronization portion 36, a (32,21) BCH word 38 comprising frame information, and information block bit and frame synchronization portion 40. Portion 36 is utilized to acquire bit and frame synchronization. A thirty-two bit pattern 42 of alternating ones and zeros is utilized for acquiring bit synchronization and a (32,21) BCH word "A" 44 conveys the baud rate used to transmit the information blocks and provide frame synchronization. An additional sixteen bit one/zero pattern 46 aids bit synchronization and a (32,21) BCH word "inverted A" 48 is used for redundancy. Portion 40 is transmitted at the baud rate of the information blocks to allow for bit and frame synchronization at the information block baud rate. In like manner to the bit and frame synchronization of portion 36, portion 40 comprises a plurality of bits 50 and a second plurality of bits 54 for bit synchronization. A sixteen bit pattern "C" 52 and "inverted C" 56 are transmitted to allow the selective call receiver to acquire frame synchronization for decoding the subsequent information blocks. At 1200 baud, the pluralities of bits 50 and 54 comprise eight bits each. Referring to Figs. 3A and 3B, the operation of the battery saving routine of the present invention begins when the selective call receiver is energized 60, i.e., when the user turns the ON/OFF switch ON. Next, the microprocessor 16 polls the nonvolatile memory 26 to determine whether a value TTME1 is stored therein 62. TIME1 is a value indicating at what time, as measured by the real time clock 24 (FIG. 1), the selective call receiver last acquired synchronization. If no value for ΗME1 is stored in the memory 26, step 62, the receiver/ demodulator 12 (FIG. 1) is activated and the battery saving routine determines whether synchronization has been acquired with the synchronous signal 64. The battery saving routine operates in a loop until synchronization has been acquired 64. The process of acquiring synchronization may have a different battery saving routine. When synchronization has been acquired 64, the value TTME1 is set equal to the value REALTIME of the real time clock 24, at the time of synchronization acquisition (SYNC ACQ) 66 which corrosponds with the center of interval 36. A counter CNT, which counts the number of synchronous signal cycles is initialized to one 68, and TTMEl is stored in nonvolatile memory 70. The eighteen blocks 34 are decoded in step 72. Power consersation may be performed while receiving blocks 34 based on a signal included therein. Additionally, blocks 34 may include information instructing the receiver to only activate in certain frames. Since the signalling protocol utilized in the present invention is a synchronous signalling protocol, the battery saving routine can predict with some degree of accuracy when the next sync block 32 (FIG. 2A) of interest to the receiver will be transmitted. The frame is decoded 72 and the receiver circuit is deactivated 74 by generating a signal 13 from the microprocessor 16 to the switch 22 (FIG. 1), which opens the switch 22. Next, a value TIME DURATION which determines the amount of time that the receiver circuit is activated to attempt to reacquire synchronization is calculated 76. In the present invention, TIME DURAΗON is the sum of three values: the transmission time of the 116 bits of the portion 36 of the sync block 32 represented as the constant SYNCBL TIME; the deviation due to the accuracy of the real time clock 24 calculated as a constant CLOCKACC, representative of the amount of time the clock loses or gains in a unit of time, multiplied by the product of the counter CNT times a constant CYCLETTME, which represents the amount of time for one frame; and the deviation due to the system signal stability calculated as a constant SIGSTAB, representative of the amount of shift the synchronous signal experiences in a unit of time, multiplied by the product of the counter CNT times CYCLETIME. In the preferred embodiment, SYNCBLKTIME equals 96.7 milliseconds (msec) since the 116 bits are transmitted at 1200 baud. CYCLETIME equals four seconds, the amount of time to transmit one frame 30 (FIG. 2A). In other embodiments, CYCLETIME may comprise other frame times and may also represent a multiple of frames. If the clock loses one second every thousand seconds, then CLOCKACC equals 0.001. If the signal system stability indicates that for every ten million bits transmitted the synchronous signal shifts one bit, then SIGSTAB equals 0.0000001. Using the above values, in the first synchronous signal cycle, TIME DURATION would equal 104.7 msec. Each successive increment of CNT by one would increase TIME DURATION by 8 msec, a factor of worst case shifting between the real time clock in the selective call receiver and the system signal. It can be seen that the effect of the deviation due to the accuracy of the signal stability is minimal compared to the real time clock for this example. In an alternate embodiment, the signal stability could be expected to be on the order of two parts per million ppm and the selective call receiver stability on the order of thirty ppm. After the calculation of TIME DURATION 76, the battery saving routine enters a loop 78 until a time specified by the equation: TIME1 + (CNT * CYCLETIME) - 1/2 * TIME DURATION as shown at decision block 78. Since TIME DURATION specifies the time width of a window during which the receiver is activated to search for the signal, and in particular for the sync block 32 (FIG. 2A) of the signal, the equation represents a time one-half the width of the receiver activated time window before the number (CNT) of cycles times CYCLETIME after last acquiring synchronization (TIME1). Upon the equality of step 78, step 79 determines whether or not to activate the receiver in this frame. The determination may be the result of the signal received at step 72, from information stored in the code plug in the pager or from another signal received in the transmission and the frame number. The counter is then incremented by one 80 and the operation returns to step 76. If the receiver 81 is activated, the routine determines whether synchronization has been acquired 82. If synchronization is acquired, TTMEl is redefined 66, CNT is reinitialized 68, and processing continues as described above. If synchronization is not acquired within the time window defined by TIME DURATION 84, i.e., if synchronization is not acquired by the time described by the equation: ΗME1 + (CNT * CYCLETIME) + 1/2 * TIME DURATION as shown in decision block 84, the receiver is deactivated 86 by applying a signal to close the switch 22 (FIG. 1). The counter CNT is incremented by one 88 and the operation of the battery saving routine returns to calculate a new TIME DURATION 76. Another aspect of the present invention allows for battery saving when initially acquiring synchronization after the selective call receiver has been turned on (energized) 60. If a value for TIME1 is stored in the nonvolatile memory 62, a variable ONTIME is set equal to the value of the real time clock 24 (FIG. 1) at the time the selective call receiver is turned on (ENERGIZE) 92. A second variable ONCYCLE is set equal to a function (INT[ ]) of the difference between ONTIME and TIME1 divided by CYCLETIME 94. The function divides the difference in times by the signal cycle time and removes the remainder to obtain an integer result indicative of which signal cycle after last acquiring synchronization the selective call receiver energized. CNT is set equal to the next cycle 94 and the time width of the window for activating the receiver (TIME DURATION) is calculated as described above 96. If the window is greater than or equal to a selectable multiple (1/N) of the signal cycle time, it is determined that no benefit of battery power conservation would be gained by using the battery saving routine. Thus the receiver is activated 63 and the routine enters the idle loop awaiting synchronization acquisition 64. For example if N equals one, then the time window would require the receiver to be constantly activated and no benefit would be gained by utilizing the battery saving routine. An N of two would provide for a fifty per cent battery saving duty cycle. If the window is not greater than or equal to N times the signal cycle time, then processing enters the loop 78 in the battery saving routine awaiting the time value of clock 24 (FIG. 1) to equal TIME1 plus (CNT times CYCLETIME) minus one-half TIME DURATION 78. Referring next to FIG. 4, a timing diagram of the functioning of the receiver 12 during the operation of the battery saving routine is shown on lines 100a, 100b and 100b', where time increases from left to right. At time 102, the receiver 12 is activated and remains in the synchronization acquisition loop 64 (FIG. 3A) until time 104 (ΗME1) when synchronization is acquired. The receiver then remains activated during the decoding of the frame 72 until instructed to turn off by information within the frame or the end of the frame is reached 74 at time 106. While the receiver is deactivated the width of a time window 108 to search for the synchronous signal is calculated (TIME DURATION) 76 (FIG. 3A). The standard time width of the sync block, SYNCBLKTIME, is shown as 110 and the end of the first cycle, i.e., TIME1 plus CYCLETIME, is time 111. The receiver is then activated 80 (FIG. 3A) at time 112, i.e., when the real time clock has reached a value defined as: TTME1 + (CNT * CYCLETIME) - 1/2 * TIME DURATION shown at step 78, FIG. 3A. The receiver is deactivated at time 114 as no signal is found by the receiver 12. The second cycle ends at time 116 and a time window 118 is calculated for activation of the receiver 12 at time 120 to search for the signal and deactivation of the receiver 12 to inhibit reception at time 122, where the time window is centered on the completion of the second cycle 116. Similarly, a third time window 124 to search for the signal is centered on the end of a third cycle at time 126 and a fourth time window 128 is centered on the end of a fourth cycle at time 130. At time 132 the receiver is activated for a fifth time window to search * for the signal. The signal is detected and, at time 134 synchronization is acquired thus beginning the process over again. Alternatively, it is shown that the selective call receiver could be de- energized on time line 100b'. After deactivation of the receiver at the close of the third time window 124, the selective call receiver is de-energized at time 136. Some time later, at time 138, the selective call receiver is energized. The location of the next end of cycle 140 is determined and a time window is calculated whereby the receiver 12 is activated at time 142. The receiver detects the signed and synchronization is acquired at time 144, once again beginning the process over. After acquiring synchronization the first time followed thereafter in the absence of the signal, the receiver adjusts its acquisition only enough to compensate for system stability. Thus, it can be seen that the present invention results in substantial power conservation over conventional selective call receiver battery saving modes which typically have a fifty per cent duty cycle. Though the amount of receiver activation time increases over time, the increase is small because it depends on the accuracy of the real time clock and the stability of the system signal. In our example above, the activation of the receiver would not approach a fifty per cent duty cycle until TIME DURATION equalled two seconds, one-half of the cycle time. With SYNCBLKTIME equal to 160 msec and TIME DURATION increasing by one msec every cycle, the battery power consumption of the present invention would not begin to equal that of a conventional selective call receiver until 1,840 cycles have passed during which a continually energized selective call receiver does not detect the synchronous signal. A further improvement would allow for the fifty per cent duty cycle to take over at that time so that battery consumption would never be worse than the present fifty per cent duty cycle receivers. Also, to avoid a worse than fifty per cent duty cycle upon energizing a selective call receiver, a further improvement would allow for the receiver to periodically reacquire synchronization even when the selective call receiver is de-energized.

Claims: CLAIMS 1. In a radio receiver, a method comprising the steps of: acquiring synchronization at a first time with a synchronous signal having a signal system stability and a predetermined code; calculating a time duration determined by time elapsed since said first time and said signal system stability; and activating said radio receiver for said time duration to search for said predetermined code. 2. The method of Claim 1 further comprising after the step of activating said radio receiver, the step of deactivating said radio receiver after said time duration if said predetermined code has not been found. 3. The method of Claim 1 wherein said step of calculating said time duration further comprises determining said time duration in response to said synchronous signal. 4. In a selective call receiver, a method comprising the steps of: acquiring synchronization at a first time with a synchronous signal having a cycle time and a system signal stability; storing said first time as a stored value in a nonvolatile memory; de-energizing said selective call receiver; energizing said selective call receiver; and activating said selective call receiver to search for said synchronous signal at a second time, said second time determined by a real time clock, said stored value, said cycle time and said system signal stability. 5. The method of Claim 4 further comprising after the step of de- energizing said selective call receiver the steps of: reacquiring synchronization at a third time; storing said third time as said stored value in said nonvolatile memory, thereby overwriting said stored value previously stored therein; and repeating said steps of reacquiring synchronization and storing said third time until said selective call receiver is energized. 6. A selective call receiver comprising: receiving means for receiving a synchronous signal having a predetermined cycle time and a system signal stability; synchronization acquisition means for acquiring synchronization with said synchronous signal; and activation means for activating said receiving means and said synchronous acquisition means at an activation time, said activation time determined by said system signal stability. 7. The selective call receiver of Claim 6 further comprising clock means for measuring time from a first time, said first time being a time that said synchronous acquisition means acquires synchronization with said synchronous signal; and wherein said activation means determines said activation time in response to said system signal stability and said time. 8. The selective call receiver of Claim 6 further comprising deactivation means for deactivating said receiving means and said synchronization acquisition means in response to said synchronous signal. 9. The selective call receiver of Claim 6 wherein said activation means comprises: memory means for storing a first value indicative of said system signal stability; and calculation means for calculating said activation time as a function of said first value. 10. The selective call receiver of Claim 7 further comprising: deactivation means for deactivating said receiving means and said synchronization acquisition means in response to said signal system stability and said time if said synchronization acquisition means does not acquire synchronization with said synchronous signal. 11. The selective call receiver of Claim 9, wherein said synchronous signal comprises information, the selective call receiver further comprising: decoding means coupled to said receiving means for decoding said synchronous signal and generating a first value substantially equivalent to said system signal stability and a second value substantially equivalent to said predetermined cyde time from said information; and storage means for storing said values in said memory means. 12. The selective call receiver of Claim 9 wherein said memory means stores a second value indicative of said predetermined cycle time and said calculation means calculates said activation time as a function of said first and second values. 13. The selective call receiver of Claim 10 wherein said activation means comprises: memory means for storing a value indicative of said system signal stability; and calculating means coupled to said dock means and said memory means for calculating said activation time. 14. The selective call receiver of Claim 12 wherein said memory means stores a third value indicative of a first time, said first time being a time that said synchronous acquisition means acquires synchronization with said synchronous signal, and wherein said calculation means calculates said activation time as a function of said first, second and third values. 15. The selective call receiver of Claim 14 further comprising a dock means for generating a real time value, and wherein said calculation means is coupled to said dock means and calculates said activation time as a function of said first, second and third values and said real time value. 16. The selective call receiver of Claim 13 wherein said clock means is a real time clock and said memory means is a nonvolatile memory means, said selective call receiver further comprising user selectable means for energizing and de-energizing said selective call receiver. 17. The seledive call receiver of Claim 14 wherein said synchronous signal comprises a sync block having a sync block time duration and said memory means stores a fourth value substantially equivalent to said sync block time duration and wherein said calculation means calculates said activation time as a function of said first, second, third and fourth values. 18. A selective call receiver comprising: receiving means for receiving a synchronous signal having a system signal stability and comprising information; synchronization acquisition means for acquiring synchronization with said synchronous signal; deactivation means for deactivating said receiver in response to said information; calculation means for calculating a time duration, said time duration determined by said system signal stability; and activation means for activating said receiving means for said time duration. 19. The selective call receiver of Claim 18, further comprising dock means for measuring time from a first time, said first time being the time that said synchronous acquisition means acquires synchronization with said synchronous signal; and wherein said time duration is determined by said system signal stability and said time.

Inventors: DELUCA MICHAEL J, MOORE MORRIS A, SCHWENDEMAN ROBERT J, SNOWDEN GREGORY O, WILLARD DAVID F, DELUCA, MICHAEL, J., MOORE, MORRIS, A., SCHWENDEMAN, ROBERT, J., SNOWDEN, GREGORY, O., WILLARD, DAVID, F.
Applicants: MOTOROLA INC, MOTOROLA, INC.
Application year: 1990
Main classification: H04B5
IPC codes: H04W52, H04W88