Semiconductor device having semiconductor body embedded in an envelope made of synthetic material

Abstract: Semiconductor device with a wiring pattern 3, 6 provided with an insulating layer 4 embedded in an envelope 5 made of synthetic material. To prevent hair cracks in the insulating layer 4, the thickness of the insulating layer 4 is so chosen that the lowest point of top 8 of the insulating layer 4 is at a higher level than the highest point of the wiring pattern 3, 6.

Description: The invention relates to a semiconductor device having a semiconductor body which is provided with an insulating layer adjoining the semiconductor body and a conductor track, on top of said insulating layer said conductor track being covered by an insulating layer which is embedded in an envelope made of synthetic material. A semiconductor device of the type described in the opening paragraph is known from Japanese Patent Application 55-132014, in which it is described that the conductor track is often thicker than the insulating layer covering that track. Now if the semiconductor device is exposed to changing temperatures, mechanical strain will occur in the device owing to the difference in coefficient of expansion of the synthetic material of the envelope and the rest of the semiconductor device and owing to the setting and shrinking of the synthetic material. This causes fractures in the insulating layer covering the conductor track and displacement of the conductor track. The remedy recommended was to choose the thickness of the insulating layer covering the track to be greater than the thickness of the conductor track. Now that the semiconductor devices become increasingly more complicated, this measure turns out to be insufficient in practice in many cases, especially when conductor tracks are present at various levels. In that case the problem often occurs that hair cracks are formed in the insulating layer or layers covering the conductor tracks, which results in an attack of the conductor tracks and failure of the semiconductor device. In US-A-4 613 888 a semiconductor device is disclosed which includes conductor tracks at various levels, the uppermost conductor track having an unspecified thickness and being formed on a subinsulating interlayer with a thickness of about 0.6 µm, said uppermost conductor track being covered by an insulating layer with a thickness of about 1 µm. The invention has for its object inter alia to obviate the above problem at least substantially. The invention is based inter alia on the recognition of the fact that, if the said problem is to be obviated, the insulating layer covering the conductor tracks must be given a thickness which is adapted to the topography of the cross-sectional area of the semiconductor device. The semiconductor device according to the invention, therefore, is characterized in that it comprises various conductor tracks at various levels, which tracks are covered by the insulating layer embedded in the envelope made of synthetic material, the lowest point of the top of the insulating layer embedded in the said envelope being at a higher level than the highest point of the conductor tracks. The semiconductor device according to the invention has the advantage that the occurrence of hair cracks in the insulating layer embedded in the envelope made of synthetic material can be reduced to a minimum. Preferably, the hardness of the insulating layer embedded in the envelope made of synthetic material is greater than that of the said envelope in that case. The term "hardness" is herein understood to mean the modulus of elasticity of the relevant material. The material of the envelope made of synthetic material usually has a hardness of approximately 10 GPa. Preferably, the hardness of the insulating layer embedded in the said envelope is greater than 20 GPa, more preferably greater than 50 GPa. The insulating layer embedded in the envelope made of synthetic material preferably consists of a material chosen from the group comprising silicon oxide obtained from a silane compound, like tetraethyl orthosilicate, under oxidizing conditions in a plasma, silicon nitride and silicon oxynitride. These materials have a hardness of approximately 100 GPa. Among these materials, silicon nitride and silicon oxynitride are preferred. The insulating layer embedded in the envelope made of synthetic material need not consist of a homogeneous layer; it may also comprise various, for example two, sub-layers of different composition, which first and second sub-layer are formed in successive stages. In this case the first sub-layer consists of a material chosen from the materials listed above for a homogeneous layer, having a hardness of approximately 100 GPa. The preference for the first sub-layer again is for silicon nitride and silicon oxynitride. The material for the second sub-layer may be chosen from the group of materials listed above, to which is added silicon oxide obtained from polysiloxane. A hardness of at least 50 GPa is sufficient for the second sub-layer. The invention will now be explained further with reference to a few examples and the accompanying drawing. In the drawing, Fig. 1 shows diagrammatically and in cross-section a part of a semiconductor device according to the state of the art during a stage of manufacture, while Fig. 2 shows diagrammatically and in cross-section a part of a semiconductor device according to the invention during a stage of manufacture. Fig. 1 shows a semiconductor body 1, which is provided with an insulating layer 2 adjoining the semiconductor body 1, on top of which layer 2 there is a conductor track 3, the conductor track 3 being covered by an insulating layer 4 which is embedded in an envelope 5 made of synthetic material. According to the present state of the art, problems involving displacement of conductor tracks owing to thermo-mechanical strain in semiconductor devices are prevented by choosing the thickness of the insulating layer 4 to be greater than that of the conductor track 3. For complicated semiconductor devices this measure is often insufficient, namely when conductor tracks 3, 6 are present at different levels. In Fig. 2, for example, conductor track 6 lies above a different structure 7. The semiconductor device according to the invention comprises various conductor tracks 3, 6 at different levels, covered with the insulating layer 4 embedded in the envelope 5 made of synthetic material, the lowest point of the top 8 of the insulating layer 4 embedded in the said envelope 5 being at a higher level than the highest point of the conductor tracks 3, 6. The hardness of the layer 4 is preferably greater than that of the envelope 5 and greater than 20 GPa, for example greater than 50 GPa. The insulating layer 4 may consist of two sub-layers 21 and 22 of different composition. The material for the homogeneous layer 4 or a sub-layer 21 is chosen from the silicon oxide obtained from a silane compound, like tetraethyl orthosilicate, under oxidizing conditions, silicon nitride and silicon oxynitride, preferably the latter two materials. For the sub-layer 22, silicon dioxide obtained from polysiloxane is also suitable. Example 1. A 0.6 µm thick conductor track 7 made of polysilicon is provided on a semiconductor body 1 made from silicon having the p-type conductivity. The silicon body 1 and the conductor track 7 are covered with a 0.8 µm thick insulating layer 2 made of silicon oxide. On the insulating layer 2 there are 1 µm thick conductor tracks 3, 6 made of an aluminium alloy, and on top of this an insulating, 3 µm thick layer 4 made of silicon oxynitride, the entire assembly being embedded in an envelope 5 consisting of an epoxy resin filled with silicon oxide. The methods for obtaining the semiconductor device are those which are conventional in semiconductor technology. Example 2. The semiconductor device in this example is different from the previous example in that, instead of a homogeneous layer 4, two sub-layers 21 and 22 are used, which are 0.5 µm and 2.5 µm thick, respectively, and which consist of silicon oxynitride and of silicon oxide obtained from polysiloxane, respectively. The invention is not limited to the examples given and can be varied in many ways within the scope of the invention by those skilled in the art. Thus, three instead of two sub-layers may be used, an intermediate sub-layer being softer than the outermost sub-layers.

Claims: A semiconductor device having a semiconductor body which is provided with an insulating layer adjoining the semiconductor body and a conductor track on top of said insulating layer, said conductor track being covered by an insulating layer which is embedded in an envelope made of synthetic material, characterized in that the semiconductor device comprises various conductor tracks at various levels, which tracks are covered by the insulating layer embedded in the envelope made of synthetic material, the lowest point of the top of the insulating layer embedded in the said envelope being at a higher level than the highest point of the conductor tracks. A semiconductor device as claimed in Claim 1, characterized in that the hardness of the insulating layer embedded in the envelope made of synthetic material is greater than that of the said envelope. A semiconductor device as claimed in Claim 2, characterized in that the hardness of the insulating layer embedded in the envelope made of synthetic material is greater than 20 GPa. A semiconductor device as claimed in Claim 3, characterized in that the hardness of the insulating layer embedded in the envelope made of synthetic material is greater than 50 GPa. A semiconductor device as claimed in any of the preceding Claims, characterized in that the insulating layer embedded in the envelope made of synthetic material consists of a material which is chosen from the group comprising silicon oxide obtained from a silane compound under oxidizing conditions in a plasma, silicon nitride and silicon oxynitride. A semiconductor device as claimed in Claim 5, characterized in that the material of the embedded layer consists of siliconnitride or siliconoxynitride. A semiconductor device as claimed in any of the preceding Claims, characterized in that the insulating layer embedded in the envelope made of synthetic material comprises several sub-layers. A semiconductor device as claimed in Claim 7, characterized in that the embedded layer comprises a first and a second sub-layer of different composition, which were formed in successive stages. A semiconductor device as claimed in Claim 8, characterized in that the first sub-layer consists of a material chosen from the group comprising silicon oxide obtained from a silane compound under oxidizing conditions in a plasma, silicon nitride and silicon oxynitride. A semiconductor device as claimed in Claim 9, characterized in that the material of the first sub-layer consists of silicon nitride or silicon oxynitride. A semiconductor device as claimed in Claims 8 and 9, characterized in that the material of the second sub-layer is chosen from the same group as that of the first sub-layer, to which is added silicon oxide obtained from polysiloxane.

Inventors: BELLERSEN MICHAEL FRIEDRICH BR, GOOTZEN WILHELMUS FRANCISCUS M, BELLERSEN, MICHAEL FRIEDRICH BRUNO, GOOTZEN, WILHELMUS FRANCISCUS MARIE
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1990
Main classification: H01L23
IPC codes: H01L23