Process for producing a CVD-SiO2 film according to a TEOS-O3 reaction

Abstract: In a process for producing a semiconductor device, deposition of a CVD-SiO₂ film (32) at a given first O₃ concentration according to a TEOS-O₃ reaction is followed by further deposition of a CVD-SiO₂ film (34) at a second O₃ concentration higher than the first O₃ concentration according to the TEOS-O₃ reaction to form a CVD-SiO₂ film having a predetermined thickness and a surface little uneven.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a process for producing a semiconductor device, and more particularly to a process for depositing a CVD-SiO₂ film according to a TEOS-O₃ reaction. Prior Art International Electron Devices meeting, Technical Digest, pages 669-672, 1989 investigates the CVD deposition of SiO₂ using TEOS and O₃. Fig. 4 is an illustration of a conventional process for depositing a CVD-SiO₂ film according to a TEOS (tetraethyl ortho-silicate, Si(OC₂H₅)₄, an alkoxysilane) - O₃ reaction. Fig. 4 (a) illustrates a polycrystalline silicon film 6 (hereinafter referred to in brief as a "poly-Si film") formed on a thermal SiO₂ film 4 formed in a surface portion of an Si substrate 2 through a heat treatment thereof. Examples of semiconductor devices including such a structure includes a MOS transistor comprising a gate SiO₂ film coresponding to the thermal SiO₂ film 4 and a gate electrode corresponding to the poly-Si film 6. On the structure of Fig. 4 (a), a CVD-SiO₂ film 8 is formed as an interlayer insulating film according to the TEOS-O₃ reaction as shown in Fig. 4 (b). It has been found out that the surface of the CVD-SiO₂ film 8 in perspective view of Fig. 4 (c), deposited according to the TEOS-O₃ reaction, is even, or smooth, in the areas where the underlying surface is of the poly-Si film 6 (see a partially enlarged view A), but often uneven, or rough, in the areas where the underlying surface is of the thermal SiO₂ film 4 (see a partially enlarged view B). The data of Fig. 3 obtained through experiment by the inventors of the present invention shows a tendency for the surface roughness of such a CVD-SiO₂ film to increase particularly with an increase in the O₃ concentration in the TEOS-O₃ reaction. The uneven surface of the CVD-SiO₂ film 8 sometimes causes stress to be put on wirings formed thereon with high liability thereof to undergo disconnection and the like, leading to low reliability of a semiconductor device. Fig. 3 is a characteristic diagram showing the relationship between the ozone concentration and the surface state of CVD-SiO₂ film, wherein the abscissa represents the ozone concentration (mol %) while the ordinate represents the surface roughness (Å)(IR=0.1nm), which was examined in the experiment by putting and running a probe on a CVD-SiO₂ film to measure a difference of altitude in the up-and-down movement of the probe. The present invention has been made in view of the foregoing problems of the prior art. Accordingly, an object of the present invention is to provide a process for depositing a CVD-SiO₂ film according to a TEOS-O₃ reaction by which the unevenness of a CVD-SiO₃ film can be suppressed as much as possible. SUMMARY OF THE INVENTION In accordance with the present invention, there is provided a process for producing a semiconductor device, comprising depositing a CVD-SiO₃ film at a given first O₃ concentration according to a TEOS-SiO₂ reaction, and further depositing a CVD-SiO₂ film at a second O₃ concentration higher than the first O₃ concentration according to the TEOS-O₃ reaction. The first O₃ concentration is preferably about 0.5 to 2 mol %, while the second O₃ concentration is preferably 4 to 7 mol %. In the process of the present invention for producing a semiconductor device, the first O₃ concentration at the first stage of deposition of a CVD-SiO₂ film according to the TEOS-O₃ reaction is set as low as preferably about 0.5 to 2 mol %. This makes the surface of the resulting CVD-SiO₂ film little uneven even on thermal SiO₂ film areas, if any, of an underlying surface as demonstrated by the characteristic diagram of Fig. 3 showing the relationship between the ozone concentration and the surface state of the CVD-SiO₂ film. When the O₃ concentration is low, however, the film coverage around angular parts of stepped portions of the underlying surface, the moisture absorption characteristics of the film, etc. are insufficient. Accordingly, the film thickness is desired to be substantially inreducible minimum. At the second stage, the second O₃ concentration is set as high as preferably about 4 to 7 mol % to further deposit a CVD-SiO₂ film according to the TEOS-O₃ reaction. According to the foregoing procedure, the second-stage deposition at a high O₃ concentration undergo no substantial influences of the underlying thermal SiO₂ film areas, if any, to make the surface of the resulting CVD-SiO₂ film little uneven even on the thermal SiO₂ film areas of the underlying surface because the thermal SiO₂ film is covered with the CVD-SiO₂ film with a surface little uneven, deposited at the first stage. At the second stage, the CVD-SiO₂ film is deposited at the high O₃ concentration to a predetermined thickness necessary for the process of the present invention. For example, when it is used as an interlayer insulating film, the CVD-SiO₂ film is deposited at the high O₃ concentration to a thickness suited for the interlayer insulating film. The CVD-SiO₂ film formed at the high O₃ concentration is of high quality with low moisture absorption and with good coverage around angular parts of stepped portions of the underlying surface. Thus, according to the process of the present invention, a highly reliable insulating film with a surface little uneven and good coverage all across the film can be obtained even if the underlying surface includes areas of a thermal SiO₂ film. BRIEF DESCRIPTION OF THE DRAWINGS The foregoing and other objects, features and advantages of the present invention will be better understood from the following description taken in connection with the accompanying drawings, in which: Fig. 1 is an illustration of a process for producing a semiconductor device in Example according to the present invention; Fig. 2 is a schematic diagram illustrating an example of production equipment for use in the process of the present invention; Fig. 3 is a characteristic diagram showing the relationship between the ozone concentration and the surface state of CVD-SiO₂ film; and Fig.4 is an illustration of a conventional process for producing a semiconductor device. DESCRIPTION OF PREFERRED EMBODIMENTS The following Examples will now illustrate the present invention in more detail while referring to the accompanying drawings, but should not be construed as limiting the scope of the invention. Fig. 1 illustrates a CVD process using the TEOS-O₃ reaction in Example according to the present invention, while Fig. 2 illustrates an example of production equipment for use in the CVD process of the present invention. The equipment of Fig. 2 comprises mass flow controllers (MFC) 10a and 10b, valves 12a to 12d, an ozone generator 14 wherein oxygen (O₂) is converted into ozone (O₃), a reservoir 16 for a TEOS solution which is kept at a temperature of 40 to 65 °C, and a CVD chamber 16. The CVD chamber 16 includes a heater 18, a gas outflow head 20, and a gas discharge outlet 22. Wafers 24a and 24b to be subjected to film formation are in place in the chamber 16. The procedure of CVD-SiO₂ film deposition in the equipment of Fig. 2 is as follows. The valves 12a and 12b are opened. This entails generation of O₃ gas in the ozone generator 14, from which the O₃ gas is fed into the chamber 16 through the gas inflow head 20, through which TEOS gas on a carrier gas N₂ is also fed into the chamber 16. The TEOS gas is decomposed with the aid of the O₃ gas on the wafers 22a and 22b to deposit CVD-SiO₂ films on the surfaces of the wafers 22a and 22b. The O₃ concentration may be changed by controlling the amount of conversion of O₂ into O₃ in the ozone generator 14, or by appropriately adjusting the mass flow controller (MFC) 10a as well as the valves 12a and 12b. The process for forming a CVD-SiO₂ film in this Example according to the present invention will now be described while referring to Fig. 1. As shown in Fig. 1 (a), an Si substrate 26 is heat-treated to form a thermal SiO₂ film 28 to serve as a gate insulating film, followed by deposition of poly-Si according to a CVD method and subsequent patterning thereof to form a poly-Si film 30 to serve as a gate electrode. Subsequently, a CVD-SiO₂ film is deposited using the equipment of Fig. 2. The substrate temperature is first set at 400 °C with the heater 18. The O₃ concentration is initially set to be about 1 mol % to deposit a CVD-SiO₂ film 32 as shown in Fig. 4 (b). The thickness of the film 32 may be satisfactory in so far as the thermal SiO₂ film 28 can be covered therewith, and is as small as, for example, 1,000 Å. Subsequently, the O₃ concentration is increased to about 5 mol %, at which a CVD-SiO₂ film 34 is then deposited as shown in Fig. 4 (c). The thickness of the film 34 is desired to be as large as, for example, about 6,000 Å to be on a level of thickness required of an interlayer insulating film. Even at such a high O₃ concentration, the underlying thermal SiO₂ film 28 exerts no substantial influences on the CVD-SiO₂ film 34 because it is perfectly covered with the CVD-SiO₂ film 32 (formed at the O₃ concentration of about 1 mol %). Thus, the surface of the CVD-SiO₂ film 34 (formed at the O₃ concentration of about 5 mol %) is little uneven. The CVD-SiO₂ film 34 (formed at the O₃ concentration of about 5 mol %) shows a deposition form of flowing profiles around angular parts of stepped portions of the poly-Si film 30 with excellent coverage, and is of high quality with reduced moisture absorption. In this Example according to the present invention, the surface of the CVD-SiO₂ film 34 (formed at the O₃ concentration of about 5 mol %) can be made even, or smooth, even on the surface areas of the thermal SiO₂ film 28, included in the underlying surface, without undergoing any unfavorable influences of the underlying surface, while providing good film quality and coverage characteristics. As described hereinbefore, according to the process of the present invention, the first stage of covering the underlying surface including the surface areas of the thermal SiO₂ film, if any, with a CVD-SiO₂ film deposited according to the TEOS-O₃ reaction at a low O₃ concentration is followed by the second stage of further depositing a second CVD-SiO₂ film with good film quality and coverage characteristics according to the TEOS-O₃ reaction at a high O₃ concentration to form an insulating film having a predetermined thickness for the purpose of avoiding the unfavorable influences of the underlying surface. This enables formation of an insulating film with a surface little uneven, endowed with satisfactory characteristics of an SiO₂ film formed according to the TEOS-O₃ reaction at a high O₃ concentration. This enables production of highly reliable semiconductor devices with reduced stress put on wirings and the like formed thereon.

Claims: A process for producing a semiconductor device, comprising depositing a CVD-SiO₂ film according to a TEOS-O₃ reaction at a low first O₃ concentration, and further depositing a second CVD-SiO₂ film thereon according to the TEOS-O₃ reaction at a second O₃ concentration higher than said first O₃ concentration. A process for producing a semiconductor device as claimed in claim 1, wherein said first O₃ concentration is about 0.5 to 2 mol %, while said second O₃ concentration is about 4 to 7 mol %.

Inventors: MAEDA KAZUO C O SEMICONDUCTOR, NISHIMOTO YUKO C O SEMICONDUCT, TOKUMASU NOBORU C O SEMICONDUC, MAEDA, KAZUO, C/O SEMICONDUCTOR PROCESS, NISHIMOTO, YUKO, C/O SEMICONDUCTOR PROCESS, TOKUMASU, NOBORU, C/O SEMICONDUCTOR PROCESS
Applicants: ALCAN TECH CO INC, CANON SALES CO INC, SEMICONDUCTOR PROCESS LAB CO, ALCAN- TECH CO., INC., CANON SALES CO., INC., SEMICONDUCTOR PROCESS LABORATORY CO., LTD.
Application year: 1990
Main classification: H01L21
IPC codes: H01L21, C23C16