Cryogenic semiconductor power devices

Abstract: A cryogenic solid-state semiconductor power device, (10) has the actual device chip (12) mounted on a substrate (11) of a material of very high thermal conductivity, which is positioned in a a bath of inorganic fluid. The substrate may be formed of beryllia, beryllium, alumina, aluminum nitride, diamond and the like materials.

Description: The present invention relates to semiconductor power devices and, more particularly, to novel solid-state semiconductor power devices, such as metal-oxide-semiconductor field-effect transistors (MOSFETs), static induction transistors (SITs), for operation at cryogenic temperatures, such as in a bath of liquid nitrogen coolants. In many power generation applications, solid-state devices have replaced vacuum tubes. Due to the extremely high power density which occurs in the very small volume of most solid-state power devices (such as in the channel of a MOSFET), the reliability and life of the device can be shortened. While it is well known to minimize device power dissipation by using switch-mode and other high-efficiency methodologies, it is often difficult to provide for fast removal of the heat energy generated inside the device, as by dissipation of switching current in the on-resistance of a power MOSFET. While good thermal design is required, maximization of the thermal conductivity of the semiconductor material, and the substrate upon which the device chip is mounted, must be provided. A power device mounted and packaged for operation at cryogenic temperatures, to provide extremely high efficiency and very small size, is therefore highly desirable. The article "On resistance, thermal resistance and reverse recovery time of power MOSFETs at 77K", O. Mueller, Cryogenics, vol. 29, no. 10, October 1989, pages 1006-1014 discloses a power MOSFET mounted on a heatsink and immersed in liquid nitrogen. A device in accordance with the present invention is given by claim 1. In accordance with an embodiment of the invention, a solid-state semiconductor power device optimized for cryogenic applications has the actual device chip mounted on a substrate of a material of very high thermal conductivity, which is positioned in a bath of cryogenic fluid. The substrate may be formed of beryllia, beryllium, alumina, aluminum nitride, or diamond. The device can be a MOSFET, or SIT. A presently preferred embodiment has a substrate disposed in a vertical plane, so that, if either or both of the chip-mounting surface and the rear substrate surface are bathed in the cryogenic cooling liquid, buildup of a low thermal-conductivity vapor barrier between the cryogenic liquid and the chip-supporting heat sink is prevented. A better understanding of the present invention will become apparent upon reading of the following illustrative description, when considered in conjunction with the associated drawings, in which: Figure 1 is a side view of a basic cryogenically-cooled semiconductor power device, known to the Applicant; Figure 2 is a graph illustrating the thermal conductivity of a number of materials, with respect to a range of cryogenic and room temperatures; Figure 3 is a sectional side view of one presently preferred cryogenic semiconductor power device mounting apparatus; and Figure 4 is a schematic diagram of an equivalent circuit of a MOSFET, and useful in appreciating aspects of the present invention. Referring initially to Figure 1, a cryogenically-coolable semiconductor power device 10 includes a heat sink member 11 having a first surface 11a upon which is mounted a solid-state semiconductor power device chip 12, and having a second surface 11b which may be mounted upon a thermally-conductive structural member 14, of copper and like material, to hold the semiconductor chip 12 and supporting thermally-conductive member 11 within a bath 15 of a cryogenic liquid, such as liquid nitrogen (LN 2 ) at a temperature of about 77K. In a device for use at room temperature member 11 will consist of an electrically insulative material such as beryllia (BeO). Hence the heat sink thickness T is made as small as possible relative to the thickness of member 14, as the thermal conductivity  of the beryllia is less than the thermal conductivity of the member 14 material (say, Cu). At cryogenic temperatures (say, 77K), however T is chosen to be much larger, as  BeO is greater than  Cu . Advantageously, device 10 is disposed in a vertical plane, i.e. with both surfaces 11a and 11b vertically disposed, such that any vapor thermally agitated from the surrounding cryogenic liquid mass 15 does not collect about the device 10 and form a low-thermal-conductivity vapor barrier between device 10 and the surrounding coolant 15. It is well known that the thermal conductivity of some substrate materials, such as alumina, diamond, or beryllia, tend to increase at cryogenic temperatures, and in fact may peak near the temperature (i.e. 77K) of liquid nitrogen. The thermal conductivity of conductors such as copper and aluminum as well as of certain solid-state-device-forming semiconductor materials (such as silicon, or germanium) increase as temperatures are decreased well into the cryogenic region. Tests of MOSFET and SIT (static-induction-transistor) devices have shown that many important electronic properties improve dramatically in the cryogenic temperature regions. For example, the on-resistance of high voltage (200-1000V) MOSFETs decreases by a factor of between about 10 and about 30, at liquid nitrogen temperatures, with respect to room temperature (e.g. 290K). The switching time, and therefore switching power loss, decrease, as the effect of parasitic capacities decrease with temperature. Therefore, speed increases, as well as transconductance, gain and maximum current, due to increased electron mobility. All such changes result in a lower-cost device for handling the same power levels. In Figure 3, there is shown an embodiment of the invention wherein a generally L-shaped substrate member 11' of a high-thermal-conductivity, but electrically insulative, material, such as aluminum nitride, beryllium oxide, has a first surface 11'a, which may be within a recessed portion 11'b and the like, upon which the power device chip 12 is mounted. Recess 11'b is formed upon a leg portion 11'c of the substrate, which also has a base portion 11'd extending at right angles to leg portion 11'c, so that a surface 11'e can be mounted against an insulative member 16. Securing means 18, such as an insulated screw and the like, can be utilized to fasten substrate 11' to member 16; advantageously, member 16 may be vertically disposed, and portion 11'd is a means for positioning the chip 12/substrate 11'c such that a vapor barrier does not build up between the coolant and the substrate. Alternatively, member 11' can be made of an electrically and thermally conductive material, such as beryllium, with member 16 being of a electrically-insulative material; part of the member (i.e. leg 11'c) can be of an electrically conductive material (Be) and another part (portion 11'd) of an insulative material (BeO). Electrical connections from device chip 12 to each of at least one conductive leads 20 can be made by known means, such as bonding wires 20a and the like. If desired, a cover member 22 can be placed over the semiconductor chip 12, to provide additional protection thereto. In use, a cryogenic agent, such as liquid nitrogen (LN 2 ) contacts at least substrate 11', for withdrawal of dissipative thermal energy from device 12, through the high thermal-conductivity material of the supporting substrate. As previously stated, chip 12 may be a MOSFET, or a SIT. Figure 4 is a schematic diagram of an equivalent electrical circuit of a MOSFET. In addition to an ideal device 12' having an input capacitance C in , an input resistance R in and a gate-drain capacitance C gd , there is also a parasitic bipolar transistor Q p , having its own base-emitter parasitic resistance R p and series-connected drain capacitances C d1 and C d2 . Cryogenic cooling reduces the undesirable effect of all of the parasitic elements, as well as increasing the speed and maximum current handling capability of device 12'.

Claims: A device for use in a cryogenic environment comprising: a semiconductor power chip device (12); a substrate (11') having a first surface (11'a) on which the chip is mounted, the substrate being substantially surrounded by a mass of cryogenic fluid; the substrate consisting of an electrically insulative but thermally conductive material having greater thermal conductivity at cryogenic temperatures than at room temperature; the substrate having a thickness selected for optimum dissipation, at cryogenic temperatures, of chip-generated heat, the thickness being greater than the substrate thickness selected for optimum heat dissipation for device operation at room temperature; a structural member (16) disposed in the mass of cryogenic fluid substantially parallel to the substrate; and means for increasing the heat dissipation of the substrate including a base portion (11'd) connected between the substrate and the structural member for spacing a second surface of the substrate from the structural member, the base portion being effective to permit the second surface of the substrate to be exposed to the cryogenic fluid. The device according to claim 1 wherein the substrate includes a recess (11'b) in the first surface for holding the chip; and means (22) for providing a protective covering for the chip. The device according to claims 1 or 2 wherein the first and second surfaces are opposed surfaces. The device according to any one of the preceding claims wherein the substrate is L-shaped. The device according to any one of claims 1 to 4, wherein the substrate is oriented in the cryogenic mass by the base portion to minimize the collection of barrier vapor adjacent the surface. The device of any one of the preceding claims wherein the substrate material is selected from the group consisting of beryllium, beryllia, alumina, diamond and aluminum nitride. The device according to any one of the preceding claims wherein the chip is fabricated from a material selected from the group consisting of silicon and gallium arsenide. The device according to any one of the preceding claims wherein the structural member is electrically insulative. The device according to any one of the preceding claims wherein the base portion is electrically insulative.

Inventors: MUELLER OTWARD MARIA, SMITH LOWELL SCOTT, MUELLER, OTWARD MARIA, SMITH, LOWELL SCOTT
Applicants: GEN ELECTRIC, GENERAL ELECTRIC COMPANY
Application year: 1990
Main classification: H01L23
IPC codes: H01L23