Hybrid amplifier

Abstract: Hybrid RF amplifiers (10) of improved performance are obtained by arranging film resistors (R1,R2,R3,R4), metallization and other components on a circuit board (40) so that symmetrical parts of the electrical circuit (10) are arranged in a mirror symmetrical fashion about a line (60) extending along the circuit board (40) and by aligning symmetrical resistors (R1,R2) either parallel or orthogonal to this line (60) and by utilizing common ground metal regions (54,54′) to terminate resistors (R1,R2) that are aligned and orthogonal to the mirror line (60) and spaced apart by a gap (56) but joined to a common ground (50) at a single location.

Description: Field of the Invention This invention concerns electronic assemblies and, more particularly, hybrid amplifiers for operation at radio frequencies. Background of the Invention It is known in the electronic arts to build electronic assemblies by mounting components and interconnections on circuit boards. Ceramics, such as for example alumina or beryllia, are much used for circuit boards because of their dimensional stability and excellent thermal properties. Metal film conductors prepared by means well known in the art are used on circuit boards to provide interconnections and bonding pads for various components. Some components, as for example resistors, are also provided in film form on ceramic boards. Other components, as for example, IC's, transistors, diodes, capacitors and transformers are often provided in discrete form and mounted on and/or connected to metallized contact regions on the board. Methods for providing such are well known in the art. A particular problem associated with electronic circuits and assemblies that must operate in the radio frequency (RF) range of 100-1000 MHz or higher is that the performance of such units is especially sensitive to parasitic R, C and L associated with the placement of the components and interconnections on the circuit board. Parasitics can adversely affect gain, bandwidth, stability and noise. Because of these parasitics, the performance of such circuits is less than ideal and there is a continuing need to provide RF circuits and assemblies, particularly hybrid RF amplifiers, in which the adverse affects of parasitics are reduced and improved performance obtained. US Patent No. 3,838,443 describes a low-cost mounting assembly arranged in minimise package parasitics. In US Patent No. 4,783,697, assigned to the same assignee as the present invention, the structure of a leadless chip carrier assembly, suitable for use with radio frequency power transistors, is disclosed. UK Patent Application No. 2 075 298 relates to the field of high voltage, high frequency amplifiers. BRIEF SUMMARY OF THE INVENTION In accordance with the present invention, there is provided a Radio Frequency (RF) amplifier, arranged on a circuit board having thereon conductors and film resistors, having: first and second amplifying means each including at least first and second directly coupled amplifier elements having first and second current electrodes and a control electrode; and first, second, third, fourth and fifth metal regions; said third and fourth metal regions having portions that extend at least partially along three sides of said first and second metal regions, respectively; wherein said first and second amplifier elements are respectively mounted on said first and second metal regions; wherein the control electrode of said first amplifier element is coupled to said fifth metal region; said first current electrode of said first amplifier element is double-bonded to said third metal region across said first metal region; said second current electrode of said first amplifier element is coupled to said first metal region; the control electrode of said second amplifier element is double-bonded to said fourth metal region across said second metal region; the first current electrode of the second amplifier element is coupled to the second current electrode of said first amplifier element; and the second current electrode of said second amplifier element is coupled to said second metal region; wherein said first and second amplifying means are arranged in mirror symmetric fashion on either side of a first direction extending along the board, wherein at least two film resistors in each amplifying means have first ends terminating at a common conductor, each common conductor being connected to ground potential and oriented transverse to the first direction, the other end of a first of said at least two resistors being coupled to said fifth metal region, and the other end of a second of said at least two resistors being coupled to said third metal region, whereby the symmetry provides an improved virtual ground between the first and second amplifying means and reduces the effects of parasitics. In a preferred embodiment, the at least two film resistors in each amplifying means are arranged such that, during operation, current flow therethrough is substantially parallel to the first direction. Furthermore, the transverse-oriented common conductors of each amplifying means may be separated by a gap, and may also be aligned. In the preferred embodiment, aligned transverse-oriented common conductors are coupled to a ground conductor of the amplifier by a common connection, thereby eliminating asymmetric return current flow in the ground conductor and further improving balance between said first and second circuit portions. Each amplifying means may comprise a further film resistor having a longitudinal direction oriented transverse to the first direction, wherein the arrangement of said further film resistors is symmetrical about the first direction. An exemplary embodiment of the invention will now be described with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a simplified circuit diagram of a dual RF Cascode amplifier according to the prior art; FIGS. 2-5 are simplified plan views of a hybrid implementation of the circuit of FIG. 1 according to the prior art and at various stages of manufacture; and FIGS. 6-9 are simplified plan views of a hybrid implementation of the circuit of FIG. 1 analogous to FIGS. 2-5 and at various stages of manufacture, but according to the present invention. DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT FIG. 1 is a diagram of circuit 10 of a dual RF Cascode amplifier according to the prior art. As those skilled in the art will appreciate, circuit 10 is highly simplified in that it does not show the R, C and/or L parasitics that are present in any physical implementation of circuit 10. Theses parasitics can have a profound influence on the actual circuit performance, especially at high frequencies. Circuit 10 comprises two substantially identical push-pull circuit portions 12, 14, indicated by the dashed lines in FIG. 1. Each circuit portion 12, 14 contains substantially similar components interconnected in the same way and comprising, resistors R1-5, R1′-5′, capacitors C1-C2, C1′-C2′ and amplifying means Q1-Q2, Q1′-Q2′. Circuit portions 12, 14 are supplied in a push-pull fashion by RF input transformer T1 and the amplified signal is extracted through RF output transformer T2. Resistor R6 and capacitor C3 through the effect of a virtual ground provide a means of independently controlling the AC emitter impedance of Q1, Q1′ with no effect on the DC emitter impedance. DC power (Vcc) is supplied to circuit 10 through resistors R7, R8 and T2. Capacitor C5 is an RF by-pass capacitor. Resistor R9 and capacitor C4 are optional. Optional output shunt capacitor C6 assists in controlling the high frequency gain and output impedance of circuit 10. Optional input shunt capacitor C7 assists in controlling the high frequency input impedance of circuit 10. Bipolar transistors are typically used for amplifying means Q1, Q2, Q1′, Q2′ because of their excellent high frequency properties but other types of RF amplifying components, IC's or sub-assemblies may also be used. Optional capacitors (not shown) may also be provided from the bases of Q1, Q1′ to ground to assist in input impedance matching. For convenience of explanation, the present invention will be described for the situation where bipolar transistors are employed for Q1, Q2, Q1′, Q2′, but those of skill in the art will understand based on the description herein how other types of RF amplifying components, IC's or sub-assemblies may be used. RF-MOSFETS are an example of a suitable alternative amplifying component. Input amplifiers Q1, Q1′ are operated in a base-input, common-emitter configuration. The collector-outputs of transistors Q1, Q1′ are directly connected to the emitter-inputs of Q2, Q2′, respectively, which are operated in the common-base configuration. The collector-outputs of Q2, Q2′ are connected to each end of the primary windings of RF output transformer T2. Series feedback elements R2, R2′ R6 and C3 and shunt feedback elements C1-C2, R5 and C1′-C2′, R5′ assist in stabilizing the amplifier and reducing distortion, and in controlling gain and input-output impedance. The functions of the the other resistors and capacitors of circuit 10 are well understood in the art. While balanced cascode amplifier circuit 10 is conceptually simple, the physical realization is quite complex where operation at very high frequencies, especially RF frequencies (100-1000 MHz or more) is intended. This is because, any physical realization inevitably introduces parasitic R, C, and/or L which tend to degrade performance from the ideal represented by circuit 10. It is the management of these parasitics that determines the ultimate performance of the physical circuit. These parasitics are primarily determined by the layout of the components and interconnections on the circuit board. FIGS. 2-5 show simplified plan views of prior art circuit board 20 on which circuit 10 is implemented at various stages of manufacture and FIGS. 6-9 show analogous circuit board 40 implementing circuit 10 according to the present invention. Circuit boards 20, 40 measure approximately 13 x 25 mm in area. In FIGS. 2-9, metal bonding and interconnection regions are shown as light grey or lightly stippled regions and film resistors are shown as darker grey or more heavily stippled regions. To facilitate comparison between FIG. 1 and FIGS. 2-9, the same designators, e.g., R1-R9, C1-C6 and Q1-Q2 (primed and un-primed) have been used on FIGS. 2-9 as on circuit 10 of FIG. 1. The letters "G" on FIGS. 2-9 indicate various ground (i.e., common return) regions. Thus, each region of boards 20 or 40 may be related to the corresponding component or connection of circuit 10. Referring now to FIGS. 2-5, FIG. 2 is a simplified plan view of circuit board 20 with metal regions and film resistors provided thereon. Methods for fabricating such boards with patterned metallization and film resistors are well known in the art. Either thick or thin film fabrication technologies may be employed. FIG. 3 shows the same board as in FIG. 2 but with the chip capacitors C1-C6, C1′-C6′ and bipolar transistors Q1,Q2, Q1′,Q2′ added. These are typically soldered in place but any convenient attachment method consistent with the electrical and thermal requirements may be used. Such methods are well known in the art. FIG. 4 shows the same board as in FIG. 3 but with various additional interconnections provided, as for example, by wire bonding. As those of skill in the art will appreciate, certain of the wire bonded connections are discretionary, as for example, those bridging across various portions of R7 or R8 so as to permit adjustment of their resistances or C2, C2′ to permit adjustment of their capacitances. FIG. 5 shows the same board as in FIG. 4 but with transformers T1, T2 added. The circuit is now complete. For simplicity, the connection and arrangement of the un-primed components will be described in detail. Those of skill in the art will understand that a corresponding set of connections and arrangements are provided for the primed components indicated in portion 14 of circuit 10 (FIG. 1) and on FIGS. 2-5. The same convention is also followed with respect to FIGS. 6-9. Referring now to FIGS. 2-5, metal region 21 is provided for mounting the collector of transistor Q1 and providing a bonding location for connecting the collector of Q1 to the emitter of Q2. Metal region 22 is provided for mounting the collector of transistor Q2, for providing a terminus for resistor R5 and for providing a terminus for bonding to capacitor C2. Capacitor C2 is formed by the side-by-side interrupted metal regions indicated at that location on board 20. The magnitude of C2 is adjusted by bonding together one or more lengths of metal (see FIG. 3). The capacitance of C2 is very small. Metal region 23 interconnects resistors R1 and R3, provides one terminus for capacitor C1 and provides a terminus for wire bonding to the base of transistor Q1. Metal region 24 provides a terminus of resistor R2 and a bonding location for bonding to the emitter of Q1, and provides a terminus for resistor R6 and capacitor C3. Metal region 25 provides a terminus for resistor R4 and a bonding location for bonding to the base of Q2. Metal region 26 provides the other plate of the side-by-side metal regions forming capacitor C2 and provides the other terminus for capacitor C1. Metal region 27 provides the other terminus for resistor R4 and a terminus for resistors R7-R9. Metal region 28 interconnects resistors R3 and R7. Metal region 29 connects resistors R8 to Vcc. Metal regions 30 are ground (i.e., common return) connections. Metal regions 31, 32 provide connections for RF-IN and RF-OUT respectively and metal region 33 provides a terminus for capacitor C4 whose other terminus is connected to an adjacent ground region 30. The other ends of resistors R1, R2 and capacitors C4, C5 are coupled to other adjacent ground regions 30. The corresponding metal regions in primed portion 14 of the dual amplifier are indicated on FIGS. 2-5 by the same numbers with a prime symbol and, as those of skill in the art will understand, provide corresponding connections to the primed and other components. While prior art realizations of circuit 10, as exemplified by FIGS. 2-5, give good performance, further improvement is desired. The present invention is concerned with improving the performance primarily through re-arrangement of the physical layout of the components and connections on the circuit board. These re-arrangements also allow the magnitude of some of the components shown in circuit 10 to be adjusted to more favorable ranges, further contributing to improved performance. FIGS. 6-9 show simplified plan views of an improved physical realization of circuit 10, analogous to FIGS. 2-5, but according to the present invention. The locations of the various components on circuit board 40 have been marked in the same way as in FIGS. 2-5 to correspond to the components indicated in circuit 10. Metallized regions 41-53 identified in FIGS. 6-9 are analogous to metallized regions 21-33, respectively, and correspond to the same interconnections in circuit 10. The dimensions of circuit board 40 are the same as circuit board 20 and no additional board space is required. By comparing FIGS. 2-5 and 6-9 it will be apparent to those of skill in the art that the location and extent of metallization regions 41-53 have been modified as compared to metallization regions 21-32 and the position of various components arranged. It has been found that the arrangement illustrated in FIGS. 6-9 gives significantly improved performance. EXAMPLE Amplifiers implementing circuit 10 were constructed according to prior art layouts and arrangements and according to the present invention shown in FIGS. 6-9. Bipolar transistor chips having f t values of at least 6 GHz were used for Q1, Q1′, Q2, Q2′. The amplifiers were tuned to operate in the range of 40-550 MHz and had nominal in-band gains of about 18 db with matched loads. Other things being equal, it was found that the improved arrangement of the present invention provided greater gain at high frequencies, e.g., at least 1 db greater at 550 MHz. This is a significant improvement. The improved layout of the present invention also gave much better gain stability. Gain stability describes the propensity of the amplifier to break into oscillations when, for example, the load impedance is varied. This is an important property of RF amplifiers. Typically such oscillations occur at out-of-band frequencies above the intended upper cut-off frequency of the amplifier, for example, in the range 750-1200 Mhz for a typical prior art 40-550 MHz amplifier. Such conditions are familiar to those of skill in the art and are a significant design problem in RF circuits. Absolutely stable amplifiers are much desired but have not been possible with the prior art arrangements. At certain output impedance conditions, the gain and phase shift of the prior art amplifiers are such that oscillations may occur. It was found that although generally well behaved, the prior art amplifiers become unstable under certain output impedance mis-match conditions, whereas the improved arrangement of FIGS. 6-9 does not. The improved amplifiers of the present invention have much better out-of-band gain stability. In addition, it was determined that because of the improved out-of-band gain stability, the value of resistors R4, R4′ which have previously been required to be comparatively high (e.g., 40 ohms) to achieve adequate circuit stability could be reduced to much smaller values (e.g., 5 ohms) thereby also substantially reducing amplifier distortion. A composite triple beat distortion reduction of at least 1 db is obtained in this way. This is very significant. The various modifications that provide these performance improvements are explained in more detailed below. Referring now to FIGS. 6-9, the physical arrangement of the components enclosed in the amplifier portions within dashed lines 12, 14 of FIG. 1 have been modified to provide as nearly perfect physical mirror symmetry about line 60 as possible. This more perfect mirror symmetry provides a much improved virtual ground between circuit portions 12, 14 along line 60. This greatly reduces the effect of parasitics associated with circuit portions 12, 14. Several important aspects of these changes contribute to reducing the parasitic effects. For example, resistors R1, R2 (and counterparts R1′, R2′) have been reoriented so that current flow therein is substantially parallel to mirror line 60 and so that resistors R1, R2 are substantially aligned and terminate on newly provided common conductor 54 (resistors R1′, R2′ are also aligned and terminate on newly provided common conductor 54′). The longer dimensions of R1, R2 (and R1′, R2′) are transverse to line 60 in this example, but this depends on the desired resistance values or ratios. Common conductors 54, 54′ which are symmetrical about mirror line 60 and oriented transverse thereto have been added. It is desirable that common conductors 54, 54′ be separated by a gap so that the resistors and circuit portions 12, 14 can be individually tested during manufacture. Spaced-apart common conductors 54, 54′ are then joined together and to adjacent ground region 50 by conductors 55 (see FIG. 8) so that there is substantially only a single symmetric ground connection location for common conductors 54, 54′. This eliminates asymmetrical return current flow in ground region 50 near input 51 further improving the balance between circuit portions 12, 14. In addition, metal regions 44, 44′ and 45, 45′ have been enlarged with respect to prior art regions 24, 24′ and 25, 25′. These changes, as long with the addition of common conductors 54, 54′, reduce the parasitic inductance associated with R2, R2′, R4, R4′, R6 and, as explained further below, the leads coupled to the Q1, Q1′, Q2, Q2′. A further improved feature of the arrangement of FIGS. 6-9 is that metal region 44 is arranged to have a U-shaped portion that extends along three sides of metal region 41 on which Q1 is mounted so that the emitter connections to Q1 may be double bonded from opposite arms of the U. This substantially reduces the parasitic inductance and resistance of the emitter connection to Q1 and materially improves performance. The combination of the double bonded emitter of Q1 permitted by the U-shaped portion of metal region 44 and the double bonded base of Q2 permitted by the U-shaped portion of metal region 45 is also a new feature. Metal regions 44′ and 45′ have the same features, mirror symmetric about line 60. A still further improved feature of the embodiment illustrated in FIGS. 6-9 is that resistor R3 has been re-arranged to have current flow transverse to mirror line 60 and relocated so as to reduce the parasitic coupling to capacitor C2 and to provide the additional space needed for the U-shaped arms of metal region 44. Locating resistor R3 farther from capacitor C2 decouples the symmetrical amplifier circuitry from the bias chain associated with resistors R7, R8 and conductors 47, 48. This helps eliminate feedback of distortion components present on conductor 47. The same modifications have been made to resistor R3′ and associated conductors, so that the arrangement of R3, R3′ is symmetrical about line 60 and both R3, R3′ and C2, C2′ are less affected by the proximity of the non-symmetrical portions of circuit 10. This reduces the effects of the parasitics associated with these resistors, capacitors and connecting leads. In the particular embodiment shown, the longer dimensions of R3, R3′ are transverse to line 60, but this depends on the desired resistance values or ratios. It will be appreciated by those of skill in the art that the invented arrangement provides improved performance over the prior art, for example, greater gain-bandwidth and better gain stability margin, using substantially the same components and with the same or smaller board space. These are significant improvements which are especially valuable in connection with RF amplifiers. It will also be observed that the improved layout lends itself more readily to shrinking the overall circuit board area. While the present invention has been illustrated in terms of particular types of amplifying means and other components, those of skill in the art will appreciate that the present invention applies equally well to other choices of amplifying means and components and various other circuits, and that, based on the teachings herein, those of skill in the art will understand how to make such variations without undue experimentation. Accordingly, the invention is defined by the claims that follow.

Claims: An RF amplifier (10), arranged on a circuit board (40) having thereon conductors and film resistors, having: first and second amplifying means each including at least first (Q1) and second (Q2) directly coupled amplifier elements having first and second current electrodes and a control electrode; and first (41), second (42), third (44), fourth (45) and fifth (43) metal regions; said third (44) and fourth (45) metal regions having portions that extend at least partially along three sides of said first (41) and second (42) metal regions, respectively; wherein said first and second amplifier elements are respectively mounted on said first (41) and second (42) metal regions; wherein the control electrode of said first (Q1) amplifier element is coupled to said fifth metal region (43); said first current electrode of said first amplifier element (Q1) is double-bonded to said third metal region (44) across said first metal region (41); said second current electrode of said first (Q1) amplifier element is coupled to said first metal region (41); the control electrode of said second amplifier element (Q2) is double-bonded to said fourth metal region (45) across said second metal region (42); the first current electrode of the second amplifier element (Q2) is coupled to the second current electrode of said first amplifier element (Q1); and the second current electrode of said second (Q2) amplifier element is coupled to said second metal region (42); wherein said first and second amplifying means are arranged in mirror symmetric fashion on either side of a first direction (60) extending along the board (40), wherein at least two film resistors (R1,R2) in each amplifying means have first ends terminating at a common conductor (54), each common conductor (54) being connected to ground potential and oriented transverse to the first direction (60), the other end of a first of said at least two resistors being coupled to said fifth metal region (43), and the other end of a second of said at least two resistors being coupled to said third metal region (44), whereby the symmetry provides an improved virtual ground between the first and second amplifying means and reduces the effects of parasitics. The amplifier of claim 1, wherein the at least two film resistors (R1,R2) in each amplifying means are arranged such that, during operation, current flow therethrough is substantially parallel to the first direction (60). The amplifier of claim 1 or 2, wherein the transverse-oriented common conductors (54) of each amplifying means are separated by a gap (56). The amplifier of claim 1, 2 or 3, wherein the transverse-oriented common conductors (54) of each amplifying means are aligned. The amplifier of claim 4, wherein the aligned transverse-oriented common conductors (54) are coupled to a ground conductor of the amplifier by a common connection (50), thereby eliminating asymmetric return current flow in the ground conductor and further improving balance between said first (12) and second (14) circuit portions. The amplifier of any preceding claim, wherein each amplifying means comprises a further film resistor (R3) having a longitudinal direction oriented transverse to the first direction (60), wherein the arrangement of said further film resistor is symmetrical about said first direction.

Inventors: CRAFT SCOTT, PFIZENMAYER HENRY L, WERNETT FREDERICK C, CRAFT, SCOTT, PFIZENMAYER, HENRY L, WERNETT, FREDERICK C.
Applicants: MOTOROLA INC, MOTOROLA, INC.
Application year: 1990
Main classification: H01L25
IPC codes: H05K1, H03F3, H03F1, H01L23