Predictive decoding device correcting code errors

Abstract: A decoding device used in a predictive coding method includes a replacement circuit for replacing a decoded value corresponding to an encoded code having an uncorrectable er­ ror with the decoded value of the immediately preceding sample, and decoding of the succeeding sample is performed according to the decoded value output from the replacement circuit.

Description: This invention relates to a decoding device for decoding encoded codes subjected to predictive coding, and more particularly, to countermeasures when a code error occurs in a transmission channel. As a method for reducing the number of transmitted bits for one sample when image information is digitally transmitted, a difference (or differential) predictive coding method (termed hereinafter a DPCM) has been known which compresses data utilizing the property that adjacent sample values have large correlation with each other. FIG. 1 is a block diagram showing the configuration of a most common preceding-value-predictive DPCM encoding device. In FIG. 1, there is shown an input terminal 10 for a sampled value X i . A subtracter 12 subtracts a predictive value P i from the input sampled value X i . A quantizer 14 outputs an encoded code Y i . There are also shown an inverse quantizer 16, and an adder 18. A D-flip-flop 20 outputs a predictive value. An error correcting coding circuit 22 adds an error correcting code to the encoded code Y i . An output terminal 24 is for a string of transmitted codes with error correcting codes added thereto. The subtracter 12 subtracts the predictive value P i (consisting of 8 bits), which is a decoded value of the immediately preceding value output from the D-flip-flop 20, from the sampled value X i (consisting of 8 bits) from the input terminal 10. The quantizer 14 quantizes a difference value output from the subtracter 12, and outputs a DPCM-encoded code Y i (consisting of 4 bits). The error correcting coding circuit 22 adds a parity for error correction to the encoded code Y i output from the quantizer 14, and outputs the resultant signal to the output terminal 24. The inverse quantizer 16 inversely quantizes the DPCM-encoded code Y i (consisting of 4 bits) output from the quantizer 14, and outputs a representative quantized difference value of a difference (consisting of 8 bits). The adder 18 adds the predictive value P i to the output from the inverse quantizer 16, and outputs a local decoded value X i ′. The D-flip-flop 20 delays the local decoded value X i ′ for an interval of one sample, and supplies it to the subtracter 12 and the adder 18 as the predictive value Y i . In general, the generation probability of the difference value between the predictive value Y i and the sampled value X i concentrates in very small values. Accordingly, by having a configuration in which regions having small difference values are finely quantized, and in which regions having large difference values are coarsely quantized, compression of the amount of information becomes possible. Table 1 shows a correspondence relation among difference values (outputs from the subtracter 12), DPCM-encoded codes Y i output from the quantizer 14, and representative difference values output from the inverse quantizer 16. Range of difference value DPCM code Represented difference value - 255 - - 94 0 - 140 - 93 - - 70 1 - 80 - 69 - - 50 2 - 58 - 49 - - 34 3 - 40 - 33 - - 22 4 - 27 - 21 - - 13 5 - 17 - 12 - - 6 6 - 8 - 5 - - 2 7 - 3 - 1 - 1 8 0 2 - 5 9 3 6 - 11 10 8 12 - 20 11 15 21 - 35 12 27 36 - 53 13 44 54 - 93 14 70 94 - 255 15 150 As shown in Table 1, the quantizer 14 performs non-linear quantization, and as a result, compresses the amount of information to one half. FIG. 2 shows a block diagram of the configuration of a decoding device corresponding to the encoding device shown in FIG. 1. In FIG. 2, there are shown an input terminal 26 for a transmitted DPCM-encoded code, an error detection/correction circuit 28, an inverse quantizer 30, an adder 32, a D-flip-flop 34, a switch 38, a 1-line delay unit 36, and an output terminal 40 for a decoded value. In the transmitted code input from the input terminal 26, an error which occurred during data transmission is detected and corrected by the error detection/correction circuit 28. The error detection/correction circuit 28 supplies the inverse quantizer 30 with the DPCM-encoded code Y i , and outputs an error flag (see FIG. 3) for controlling the switch 38 if the error could not be corrected. The inverse quantizer 30 inversely quantizes the DPCM-encoded code Y i , and outputs a representative difference value. The adder 32 adds an output from the D-flip-flop, which is the decoded value of the immediately preceding value, to the output from the inverse quantizer 30. The output from the adder 32 becomes the decoded value X i ′. The output from the adder 32 is delayed for an interval of one sample by the D-flip-flop 34, and is returned to the adder 32 as the decoded value (predictive value) of the immediately preceding value. The output from the adder 32 is directly supplied to contact "a" of the switch 38, and is also supplied to contact "b" of the switch 38 via the 1-line delay unit 36. In general, in the DPCM, it is known that, when an error once occurs in a transmission channel, the error is propagated to succeeding decoded values X i+1 - X i+j until the decoded value (reset value) of the DPCM-encoded code obtained by quantizing the sampled value itself is subsequently obtained. Accordingly, when an uncorrectable error is detected in the encoded code Y i by the error detection/correction circuit 28, an error flag is raised after the detection of the uncorrectable error, as shown in FIG. 3. While the error flag is raised, the switch 38 is switched to the side of contact "b", and the decoded value is replaced, that is, concealed by the sampled value on the immediately preceding line. FIG. 3 shows changes in the decoded values by this concealment at respective sampled points. In the above-described conventional example, however, since the decoded value is replaced by the sampled value on the immediately preceding line, there is a disadvantage in that a 1-line delay unit is needed, causing an increase in hardware. Furthermore, since all the decoded values after the detection of the uncorrectable encoded code are replaced, there is a disadvantage in that much deterioration in an image occurs if there is no correlation between a sampled value on the current line and a sampled value on the immediately preceding line. In such a case, the difference between the sampled value on the immediately preceding line and the sampled value in the case of no transmission-line error becomes large, as shown in Fig. 3, causing remarkable deterioration in picture quality. It is an object of the present invention to alleviate some or all of the problems as described above, for example by providing a low-cost predictive decoding device which can reduce deterioration in transmitted information even when a code error occurs in a transmission channel. According to one aspect, the present invention provides a predictive decoding device for decoding an encoded code, comprising: decoding means for computing and outputting a decoded value on the basis of the encoded code and a decode predictive value; predictive means for generating the decode predictive value on the basis of a past decoded value; and error detection means for detecting a code error in the encoded code and for outputting an error flag in response to the detected code error; characterised in that the decoding means is arranged to output a substitute value computed on the basis of the past decode value as a substitute for the computed decoded value in response to the error flag, and in that the substitute value is used as the past decoded value for the generation of a subsequent decode predictive value. According to another aspect, the present invention also provides a method for predictively decoding an encoded code, comprising: a decoding step of computing and outputting a decoded value on the basis of the encoded code and a decode predictive value; a predicting step of generating the decode predictive value on the basis of a past decoded value; and an error detection step of detecting a code error in the encoded code and for outputting an error flag in response to the detected code error; characterised in that the decoding step is performed so as to output a substitute value computed on the basis of the past decode value as a substitute for the computed decoded value in response to the error flag, and in that the substitute value is used as the past decoded value for the generation of a subsequent decode predictive value. These and other objects and features of the present invention will become more apparent from the following detailed description of the preferred embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the general configuration of a conventional DPCM encoding device; FIG. 2 is a block diagram showing the configuration of a decoding device corresponding to the encoding device shown in FIG. 1; FIG. 3 is a timing chart for explaining the operation of each unit shown in FIG. 2; FIG. 4 is a block diagram showing the configuration of a decoding device according to an embodiment of the present invention; FIG. 5 is a timing chart for explaining the operation of each unit shown in FIG. 4; FIG. 6 is a block diagram showing the configuration of a decoding device according to another embodiment of the present invention; FIG. 7 is a block diagram showing the configuration of a decoding device according to still another embodiment of the present invention; FIG. 8 is a block diagram showing the configuration of an encoding device according to an embodiment of the present invention; FIG. 9 is a block diagram showing the configuration of a decoding device according to still another embodiment of the present invention, corresponding to the FIG. 8 encoding device; FIG. 10 is a timing chart for explaining the operation of each unit shown in FIG. 9; and FIG. 11 is a block diagram showing the configuration of a decoding device according to still another embodiment of the present invention. The preferred embodiments of the present invention will now be explained with reference to the drawings. FIG. 4 is a block diagram showing the configuration of a decoding device according to an embodiment of the present invention. In FIG. 4, there are shown an input terminal 42 for transmitted data, an error detection/correction circuit 44, an inverse quantizer 46, and an adder 48. A switch 50 is switched by an error flag indicating the occurrence of an incorrectable error code. A D-flip-flop 52 functions as a delay unit for an interval of one sample. There is also shown an output terminal 54 for a decoded value. The error detection/correction circuit 44 receives transmitted data from the input terminal 42, detects and corrects a code error during transmission, and supplies the inverse quantizer 30 with a DPCM code. The error detection/correction circuit 44 also raises an error flag controlling the switch 50 for a period of one sample for an uncorrectable code error, as shown in FIG. 5. The adder 48 adds an output (the immediately preceding decoded value) from the D-flip-flop 52 to an output (a representative difference value) from the inverse quantizer 46. An output from the adder 48 is connected to contact "a" of the switch 50, and an output from the D-flip-flop 52 is connected to contact "b" of the switch 50. A signal selected by the switch 50 is supplied to the output terminal 54 as a decoded value, and is also supplied to the D-flip-flop 52. That is, the switch 50 is usually connected to contact "a" to select the output from the adder 48. However, when an uncorrectable code error occurs, the switch 50 is connected to contact "b" for a period of one sample in accordance with the error flag from the error detection/correction circuit 44 to select the immediately preceding decoded value. FIG. 5 is a timing chart for explaining the operation of the decoding device shown in FIG. 4. An uncorrectable code error has occurred in the encoded code at the moment of the fifth sample, and the decoded value erroneously decoded at that moment is replaced by the decoded value of the preceding sample. In general, since the sampled value of the preceding sample has very high correlation with the current sampled value, a concealment error in the decoded value is very small. Subsequently, decoding is performed by transmitted DPCM codes, the concealment error is confined within a predetermined value, and hence does not increase. In particular, when an uncorrectable transmitted error occurs in a sample having the same sampled value as in the preceding sample, the concealment error is zero. The portion of the inverse quantizer 46, the adder 48 and the switch 50 may be formed by a ROM table. FIG. 6 is a block diagram showing the configuration of the ROM table. A ROM 56, serving as a decoding table, allocates 4 bits, 8 bits and 1 bit for the DPCM code, the predictive value and the error flag output from the error detection/correction circuit 44, respectively, as input addresses, and also has an 8-bit output. In the ROM 56, a data table may be stored so that the decoded value of the preceding value, that is, the same code as the output from the D-flip-flop is output to an address corresponding to a case in which an error flag is raised, and so that a value obtained by adding the decoded value of the preceding value from the D-flip-flop to the representative difference value by a 4-bit DPCM code is output to an address corresponding to a case in which an error flag is not raised. Although, in the above-described embodiment, an explanation has been provided illustrating the preceding-value-predictive encoding method, the present invention may, of course, be also applied to an interframe predictive encoding method or an interline predictive encoding method. As can be easily understood from the above explanation, according to the above-described embodiment, since a 1-line delay unit is not used, the circuit configuration becomes simplified and inexpensive. Furthermore, since the decoded value is replaced by the immediatly preceding value having the highest correlation when correction is impossible, the concealment error is very small. In addition, since the subsequent decoding is performed by the replaced decoded value, the concealment error does not increase with time. FIG. 7 is a block digram showing the configuration of a decoding device according to another embodiment of the present invention. In FIG. 7, components identical to those shown in FIG. 4 are indicated by identical numerals. A code setting circuit 47, in which a DPCM code ('8' in the example shown in Table 1) making the representative difference value 0 is set, outputs the code. A switch 49 is usually connected to the side of the output from the error detection/correction circuit 44, and is switched to the side of the code setting circuit 47 in accordance with an error flag from the error detection/correction circuit 44. The error detection/correction circuit 44 raises an error flag controlling the switch 49 for a period of one sample for an uncorrectable transmitted error, as shown in FIG. 5. Accordingly, when there is no uncorrectable transmitted error, an output from the error detection/correction circuit 44 is supplied to the inverse quantizer 46, and when there is an uncorrectable transmitted error, an output from the code setting circuit 47 is supplied to the inverse quantizer 46. The adder 48 adds an output (the immediately preceding decoded value) from the D-flip-flop 52 to an output (the representative difference value) from the inverse quantizer 46. An output from the adder 48 is supplied to the output terminal 54 as a decoded value, and is also supplied to the D-flip-flop 52. When the error detection/correction circuit 44 cannot correct a transmitted error, since the switch 49 is connected to the side of the code setting circuit 47, the inverse quantizer 46 outputs 0. Accordingly, the output from the adder 52 remains the decoded value of the immediately preceding sample. Suppose, for example, that an uncorrectable transmitted error occurs at the moment of the fifth sample, as shown in FIG. 5. The decoded value erroneously decoded at that moment is replaced by the decoded value of the immediately preceding sample by the code setting circuit 47 and the switch 49. Accordingly, also in the FIG. 6 embodiment, the same effects and functions as those in the FIG. 4 embodiment may be obtained. That is, also in the FIG. 6 embodiment, since 1-line delay unit is not used, the circuit configuration becomes simplified and inexpensive. Furthermore, since the decoded value is replaced by the immediatly preceding value having the highest correlation when correction is impossible, the concealment error is very small, and the concealment error does not increase with time. Next, an explanation will be provided of still another embodiment of the present invention. FIG. 8 is a diagram showing the schematic configuration of an encoding device using the DPCM encoding method according to still another embodiment of the present invention. In FIG. 8, a difference between an input 8-bit digital sampled value X i and a predictive value P i , which will be described later, is obtained by a subtracter 102, and the difference value is input to quantizers (Q₁ - Q₄) 103 - 106. The quantizers (Q₁ - Q₄) 103 - 106 have different quantization characteristics. Tables 2.1, 2.2, 2.3 and 2.4 show nonlinear quantization tables for the quantizers (Q₁ - Q₄) 103 - 106, respectively. The 8-bit sampled value is subjected to nonlinear quantization by the four quantizers (Q₁ - Q₄) 103 - 106, and is converted into 4-bit data. Outputs from the quantizers (Q₁ - Q₄) 103 - 106 are supplied to a switch 107. The switching operation of the switch 107 is controlled by a switching control circuit 108, which detects, for example, the two most significant bits in the 8-bit predictive value P i output from a predictive unit 116 (which will be described later) in order to detect to which level range the predictive value P i at that moment is, and controls the switch 107 so as to output one of the output signals from the quantizers (Q₁ - Q₄) 103 - 106 in accordance with the result of the detection. That is, if the level of the 8-bit predictive value P i is divided into four levels (for example, 0 - 63, 64 - 127, 128 - 191, and 192 - 255), the ranges of levels which the difference value between the predictive value P i and the sampled value X i obtained by the subtracter 102 can generate become -63 - 255, -127 - 191, -191 - 127, and -255 - 63. Accordingly, by providing 8-bit-to-4-bit nonlinear quantization tables in the level range which each difference value can generate, as shown in Tables 2.1 - 2.4, the range of the nonlinear quantization level becomes narrower than -255 - 255 in each table. Hence, it becomes possible to effectively utilize allocation of 4 bits, and to finely perform quantization. When the level of the 8-bit predictive value P i is divided into 4 levels as described above, it is possible to determine to which of the divided levels the predictive value P i belongs by knowing its significant 2 bits. Hence, the switch 107 is connected to the output from the quantizer corresponding to the determined level of the predictive value P i by the switching control circuit 108, as described above. When, for example, the level of the predictive value P i is determined to be 64 - 127 by the switching control circuit 108, the switch 107 is connected to the output from the quantizer Q₂. An error correcting code is added to the 4-bit encoded code quantized by the quantizer selected as described above by an error correcting coder 109, and the resultant signal is transmitted to a transmission channel. The above-described encoded code Y i is also input to representative value setting circuits (R₁ - R₄) 110 - 113. The representative value setting circuits (R₁ - R₄) 110 - 113 have inverse characteristics corresponding to the quantizers (Q₁ - Q₄) 103 - 106. The quantizers Q₁, Q₂, Q₃ and Q₄ correspond to the representative value setting circuits R₁, R₂, R₃ and R₄, respectively. The 4-bit encoded code is inversely converted into an 8-bit representative value by each of the representative value setting circuits (R₁ - R₄) 110 - 113, as shown in each of Tables 2.1 - 2.4, and the representative value is supplied to a switch 114. The switching operation of the switch 114 is controlled by the switching control circuit 108 in the same manner as the switch 107, and is connected to the output of the corresponding representative setting circuit in accordance with the above-described correspondence. The representative value output from the switch 114 is added to the predictive value P i output from a predictive unit 116 in an adder 115, and thus a local decoded value X i ′ is obtained. The local decoded value X i ′ is input to the predictive unit 116. In the above-described encoding device having the configuration shown in FIG. 8, the quantization error can be made smaller than in the encoding device shown in FIG. 1 without changing the compression rate. The assignee of the present application has previously proposed the configuration of the device shown in FIG. 8 itself in Japanese Patent Application No. 61-56619 (1986). However, the allocation of codes in each of the above-described quantizers is different from that shown in the above-described Japanese Patent Application No. 61-56619 (1986). That is, in the quantizers (Q₁ - Q₄) 103 - 106, the arrangement of encoded codes relative to the amounts of difference values is common to the quantizers. In the examples of Tables 2.1 - 2.4, the encoded code becomes a code at a higher position in Tables 2.1 - 2.4 as the difference value increases, and becomes a code at a lower position as the difference value decreases. By decoding an encoded code encoded by an encoding device having a configuration in which a plurality of quantizers having such quantization characteristics are selectively used by a decoding device of the embodiment of the present invention shown in FIG. 9, the following specific and advantageous effects can be obtained. FIG. 9 shows a decoding device according to still another embodiment of the present invention corresponding to the encoding device shown in FIG. 8. In FIG. 9, an error correction circuit 117 corrects code errors in a transmitted code input from a terminal 129, and reconverts the transmitted code into the 4-bit encoded code before transmission. The resultant signal is then supplied to representative value setting circuits (R₁ - R₄) 118 - 121. As in the representative value setting circuits (R₁ - R₄) 110 - 113 shown in FIG. 8, in each of representative value setting circuits (R₁′ - R₄′) 118 - 121, the 4-bit encoded code is inversely converted into an 8-bit representative value , which is supplied to a switch 122. The switching operation of the switch 122 is controlled by a switching control circuit 126. As in the case of FIG. 8, the switching control circuit 126 detects the two most significant bits of a predictive-value signal P i output from a predictive unit 125, and is connected to the output from the representative value setting circuit corresponding to the result of the detection. The representative value thus output from the switch 122 is added to the predictive value P i in an adder 123, and a decoded value X i ′ is thus obtained. The switch 128 is usually connected to side A to output the decoded value output from the adder 123 as an output decoded value and also supplies the decoded value to the predictive unit 125. The predictive unit 125 is configured, for example, by the D-flip-flop 52 shown in FIG. 4, which delays a signal for a period of one sample. In this case, the immediately preceding decoded value is made the next predictive value. When the error correction circuit 117 has detected an uncorrectable code error, it issues an error flag, and the switch 128 is thereby connected to side B. A predictive value is thereby output from the switch 128. When the predictive unit 125 comprises a D-flip-flop which delays a signal for a period of one sample, the immediately preceding decoded value is output. Since there is very strong correlation between the predictive value and the decoded value, an error occurring in this process is very small. Hence, the same functions and effects as in the FIG. 4 embodiment can be obtained. Furthermore, the present embodiment has the function and effect that, even if a large predictive error exists when the above-described processing of replacing the predictive value with the decoded value, and a large error is thereby produced in the decoded value, the error converges. An explanation will now be provided of this function and effect. FIG. 10 shows a timing chart showing the operation of the decoding device shown in FIG. 9. In FIG. 10, sampled values are indicated by ○, and decoded values are indicated by Δ. Table 3 shows specific data of the sampled values, the corresponding predictive values, difference values, tables (representative value setting circuits) used, encoded codes, representative values and decoded values. In Table 3, time lapses in the rightward direction. Sampled value Predictive value Difference value Table used Code Representative value Decoded value 225 225 237 225 12 R₄ 5 11 236 237 236 1 R₄ 3 1 237 244 237 7 R₄ 5 11 248 233 248 -15 R₄ -1 -11 237 236 237 -1 R₄ 1 -1 236 232 236 -4 R₄ 0 -4 232 175 232 -57 R₄ -3 -55 177 60 177 -117 R₃ -7 -153 24 25 24 1 R₁ -1 1 25 37 25 12 R₁ 1 11 36 37 36 1 R₁ -1 1 37 62 37 25 R₁ 2 27 64 75 64 11 R₂ 3 9 73 100 73 27 R₂ 4 21 94 162 94 68 R₂ 6 87 181 162 181 -19 R₃ -4 -21 160 137 160 -23 R₃ -4 -21 139 In FIG. 10, an original signal is indicated by a solid line, and a decoded signal is indicated by a broken line. A signal close to the original signal is restored as long as a normal decoding operation is continued. On the other hand, for the worst case in which a code error occurs with a timing producing the largest difference value between the predictive value and the sampled value, that is, a timing τ shown in FIG. 10, decoded values output from the switch 128 shown in FIG. 9 are indicated by X in FIG. 10. Table 4 shows sampled values, predictive values, difference values, tables used, encoded codes, representative values and decoded values in this case. When the code error occurs, since the difference value itself is output, the difference value is dealt with as 0, and the decoded value does not change, as shown in Table 4. A worst case is now assumed in which the difference value is -117, so an error of more than 100 relative to the sampled value is produced in the decoded value. Calculation of the succeeding predictive value is performed using this decoded value, and decoding is thus continued. Although transmitted encoded codes are the same as in Table 3, the tables used are different. By continuing this decoding operation, a signal shown by a one-dot chain line in FIG. 10 is restored. As is apparent from FIG. 10, the above-described error gradually converges, and a restored signal which is almost identical to the original signal can be obtained after the lapse of a predetermined period. As described above, the present embodiment has the superior effect that, by decoding encoded codes DPCM-encoded by the encoding device shown in FIG. 8 by the decoding device shown in FIG. 9, there is little error produced in the decoded value even if a code error occurs, and even if a large error occurs, the error gradually converges with the lapse of time. Sampled value Predictive value Difference value Table used Code Representative value Decoded value 225 225 237 225 12 Q₄ 5 11 236 237 236 1 Q₄ 3 1 237 244 237 7 Q₄ 5 11 248 233 248 -15 Q₄ -1 -11 237 236 237 -1 Q₄ 1 -1 236 232 236 -4 Q₄ 0 -4 232 175 232 -57 Q₄ -3 -55 177 60 177 X → (0) (Q₃) (0) (0) 177 25 177 Q₃ -1 -1 176 37 176 Q₃ 1 1 177 37 177 Q₃ -1 -1 176 62 176 Q₃ 2 3 179 75 179 Q₃ 3 9 188 100 188 Q₃ 4 21 209 162 209 Q₄ 6 27 236 162 236 Q₄ -4 -90 146 137 146 Q₃ -4 -21 125 FIG. 11 is a diagram showing the configuration of a decoding device according to another embodiment in which a part of the FIG. 9 embodiment is modified. In FIG. 11, the same components as in FIG. 9 are indicated by the same numerals, and an explanation thereof will be omitted. In the FIG. 11 embodiment, when a code error occurs, the value 0 from a code setting circuit 127 is output from a switch 124 in accordance with the error flag from the error correction circuit 117. Accordingly, the adder 123 outputs the predictive value output from the predictive unit 125 without modification when the code error occurs. Hence, the same functions and effects as in the decoding device shown in FIG. 9 can also be obtained in the decoding device shown in FIG. 11. The embodiments shown in FIGS. 8 - 11 have the configuration in which four quantizers and inverse quantizers as shown in Tables 2.1 - 2.4 are selected in accordance with the level of the predictive value. In general, however, if a configuration is adopted in which n (n is an integer equal to 2 or more) quantization characteristics having a common arrangement of encoded codes relative to the amounts of difference values are set, and for at least one identical encoded code, the representative quantized value according to the n quantization characteristics becomes smaller for the quantizer used for a larger predictive value, the amount of error tends to converge with time by utilizing this code. The convergence efficiency of the error amount can be improved by setting the system so that more quantization characteristics can be selected in accordance with the predictive value, and by satisfying for more encoded codes the relationship that the representative quantized value becomes smaller as the predictive value is larger.

Claims: A predictive decoding device for decoding an encoded code, comprising: decoding means (46; 48, 50) for computing and outputting a decoded value on the basis of said encoded code and a decode predictive value; predictive means (52) for generating said decode predictive value on the basis of a past decoded value; and error detection means (44) for detecting a code error in said encoded code and for outputting an error flag in response to the detected code error; characterised in that said decoding means (46; 48, 50) is arranged to output a substitute value computed on the basis of the past decode value as a substitute for the computed decoded value in response to said error flag, and in that said substitute value is used as said past decoded value for the generation of a subsequent decode predictive value. A device according to claim 1, wherein said decoding means replaces the present decoded value computed by said decoding means with the past decoded value in response to said error flag. A device according to claim 1 or 2, wherein said decoding means replaces a present decoded value, computed by said decoding means and corresponding to an encoded code in which an uncorrected code error is indicated by said error flag, with a past decoded value immediately preceding the present decoded value to be replaced. A device according to claim 1, 2 or 3, wherein said decoding means outputs said substitute value for a predetermined sampling period. A device according to any of claims 1 to 4, wherein said predictive means produces said decode predictive value by delaying said output value output from said decoding means for one sample period. A device according to any of claims 1 to 5, wherein said decoding means includes look-up table means, having said encoded code and said decode predictive value as inputs, for computing the decoded value. A device according to claim 6, wherein said error flag is a further input to said look-up table means, and wherein values having the same values as decode predictive values are written, irrespective of said encoded code, in each address corresponding to occurrence of an error flag which indicates an uncorrected code error. A device according to any preceding claim, corresponding to an encoder in which said encoded code is obtained by quantizing with quantization characteristics controlled in accordance with an encode predictive value, wherein said decoding means determines inverse quantization characteristics in accordance with said decode predictive value and calculates said decoded value using the determined inverse quantization characteristics. A device according to any preceding claim, wherein said decoding means replaces said encoded code with a predetermined code in response to said error flag. A device according to claim 9, wherein said predetermined code is a code of which a decoded value is zero when said predetermined code is decoded. A device according to any preceding claim, wherein said decode predictive value is equal to said past decoded value. A device according to any preceding claim, wherein said encoded code and decoded value relate to a pixel on a line of a raster image to be decoded, and wherein said past decoded value corresponds to a preceding pixel on the same line. A method for predictively decoding an encoded code, comprising: a decoding step of computing and outputting a decoded value on the basis of said encoded code and a decode predictive value; a predicting step of generating said decode predictive value on the basis of a past decoded value; and an error detection step of detecting a code error in said encoded code and for outputting an error flag in response to the detected code error; characterised in that said decoding step is performed so as to output a substitute value computed on the basis of the past decode value as a substitute for the computed decoded value in response to said error flag, and in that said substitute value is used as said past decoded value for the generation of a subsequent decode predictive value. A method according to claim 13, wherein said decoding step replaces the present decoded value computed by said decoding step with the past decoded value in response to said error flag. A method according to claim 13 or 14, wherein said decoding step replaces a present decoded value, computed by said decoding step and corresponding to an encoded code in which an uncorrected code error is indicated by said error flag, with a past decoded value immediately preceding the present decoded value to be replaced. A method according to claim 13, 14 or 15, wherein said decoding step outputs said substitute value for a predetermined sampling period. A method according to any of claims 13 to 16, wherein said predicting step produces said decode predictive value by delaying said output value output from said decoding step for one sample period. A method according to any of claims 13 to 17, wherein said decoding step includes access to a look-up table, having said encoded code and said decode predictive value as inputs, for computing the decoded value. A method according to claim 18, wherein said error flag is a further input to said look-up table, and wherein values having the same values as decode predictive values are written, irrespective of said encoded code, in each address corresponding to occurrence of an error flag which indicates an uncorrected code error. A method according to any of claims 13 to 19, corresponding to an encoding method in which said encoded code is obtained by quantizing with quantization characteristics controlled in accordance with an encode predictive value, wherein said decoding step determines inverse quantization characteristics in accordance with said decode predictive value and calculates said decoded value using the determined inverse quantization characteristics. A method according to any of claims 13 to 20, wherein said decoding step replaces said encoded code with a predetermined code in response to said error flag. A method according to claim 21, wherein said predetermined code is a code of which a decoded value is zero when said predetermined code is decoded. A method according to any of claims 13 to 22, wherein said decode predictive value is equal to said past decoded value. A method according to any of claims 13 to 23, wherein said encoded code and decoded value relate to a pixel on a line of a raster image to be decoded, and wherein said past decoded value corresponds to a preceding pixel on the same line.

Inventors: HOSHI NOBUHIRO, ISHII YOSHIKI, NAGASAWA KENICHI, HOSHI, NOBUHIRO, ISHII, YOSHIKI, NAGASAWA, KENICHI
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1990
Main classification: H03M13
IPC codes: H03M7, H04N7, G11B20