High voltage regulator circuit for picture tube

Abstract: A high voltage regulator circuit for maintaining the ultor voltage applied to a picture tube of a television receiver apparatus provides an auxiliary voltage signal for compensation of variations in the ultor voltage caused by variations in the beam current. An improved phase control circuit controls the phase position of the pulses of the auxiliary voltage signal so that they lag with only the leading parts thereof overlapping the retrace voltage signal pulses, in order to prevent the introduction of fluctuations in the ultor voltage due to secondary ringing. The phase control circuit includes a sawtooth waveform generator which generates a sawtooth signal corresponding to the retrace pulses, a reference voltage generator which generates a reference voltage corresponding to the ultor voltage, a comparator for comparing the sawtooth signal to the reference voltage, and a one-shot multivibrator circuit responsive to the comparator output for generating a pulse signal for the auxiliary pulses lagging in phase to the retrace pulses.

Description: This invention relates to a high voltage power supply circuit for a television apparatus and, more particularly, to an improved circuit which regulates a high voltage applied to a picture tube by feedback control. In television receiver or monitor circuits, an ultor accelerating voltage or high voltage for a picture tube is typically obtained by rectifying a retrace pulse voltage stepped up by a high voltage winding of a flyback transformer. The retrace pulse voltage is developed by a horizontal deflection circuit that is coupled to the high voltage winding via the primary winding of the flyback transformer. The horizontal deflection circuit has an output stage which includes a horizontal deflection winding, a retrace capacitor, and a trace switch including a damper diode and a horizontal output transistor. In typical television receiver circuits, the raster size of the beam of a picture tube is inversely proportional to the square root of the ultor accelerating voltage. Because the high voltage circuit exhibits a certain amount of source impedance, increasing the beam current drawn from the ultor terminal will result in a decrease of the ultor accelerating potential. Ultor voltage variations resulting from variation of the beam current occur mainly due to a leakage inductance between the high voltage and the primary winding of the flyback transformer. The ultor voltage variations lead to reduced picture tube performance, which is manifested by undesirable raster size variations, reduced peak brightness, and poor focus at high beam currents. Due to the demand for larger picture tubes having increased resolution and higher definition images, it is desirable to obtain improved regulation of ultor voltages over a wide range of beam current and brightness. An ultor voltage regulator circuit is disclosed in U.S. Patent Publication US-A-4,812,720, entitled "High Voltage Stabilization Circuit For Video Display Apparatus", in the name of Peter E. Haferl (the Haferl patent). An example of this voltage regulator circuit is described below with reference to FIGURES 1 and 2a-2f. As shown in FIGURE 1, the ultor voltage regulator circuit of the Haferl patent includes a horizontal deflection circuit 100 and a high voltage stabilization circuit 102 which generates a stabilized ultor voltage U. A switching transistor Q1 of the deflection circuit 100, responsive to a horizontal drive signal, generates a horizontal retrace voltage pulse V1 in a retrace or flyback resonant circuit 79 that is coupled via a primary winding W1 of a transformer T1 to a tertiary high voltage winding W2 to form a voltage pulse V2. A switching transistor Q2 of stabilization circuit 102, responsive to an output of a control circuit 103, generates a voltage pulse V4 that is coupled via a primary winding Wa of an auxiliary transformer T2 to an auxiliary voltage winding Wb to form a voltage pulse V3. Winding Wb is coupled in series with high voltage winding W2. The sum of the high voltage pulse V2, generated in winding W2, and of auxiliary voltage pulse V3, generated in winding Wb, is applied to a voltage tripler 101 which generates ultor voltage U in proportion to the peak value of the sum voltages. As shown more clearly in FIGURES 2a-2f, the phase of the voltage pulse V3 is advanced relative to that of the voltage pulse V2. The phase is adjusted backward, or delayed by control circuit 103 such that voltage pulse V3 is in a more overlapping position, thereby adding to voltage pulse V2 at high beam current when the ultor voltage tends to drop. Thus, the peak value of the sum of voltage pulses V2 and V3, and, thereby, ultor voltage U, is maintained substantially constant despite variations in the beam current. Assume a hypothetical arrangement similar to that of the Haferl patent but that, unlike the Haferl patent arrangement, does not utilize the voltage tripler. In such hypothetical arrangement, the number of winding turns in the transformers may be higher for obtaining the same level of the ultor voltage. Such hypothetical arrangement may be more susceptible to a particular kind of ringing. Should such ringing occur in a voltage V3' shown in FIGURE 3 that is analogous to voltage pulse V3 of FIGURE 2c, after, for example, a time that is analogous to time t 3 or t 4 of FIGURE 2c, such ringing might affect the ultor voltage. Such ringing might introduce fluctuation in the peak value of the sum of voltage pulses that are analogous to voltage pulses V2 and V3. The fluctuation might occur particularly at high beam current, thereby causing fluctuations in ultor voltage U. The ringing might cause instability since the ringing might represent a phase reversal in the feedback loop signal path. It may be desirable to regulate the ultor voltage in such a way that, should such ringing occur, it will not affect the ultor voltage. A high voltage power supply qf a video apparatus, embodying an aspect of the invention, is as defined in claim 1. FIGURE 1 is a circuit diagram illustrating a high voltage regulator circuit of the Haferl patent for a picture tube. FIGURES 2a-2f illustrate waveform diagrams of the high voltage regulator circuit of FIGURE 1; FIGURE 3 illustrates a waveform in which ringing occurs; FIGURE 4 is a schematic diagram of a high voltage regulator circuit, embodying an aspect of the invention, that prevents ringing such as shown in FIGURE 3 from affecting the ultor voltage; FIGURES 5A to 5E are idealized waveform diagrams useful for illustrating the operation of the high voltage regulator circuit of FIGURE 4; and FIGURES 6A-6C illustrate additional waveforms useful for explaining the operation of the circuit of FIGURE 4. A high voltage regulator circuit 200 of FIGURE 4, embodying an aspect of the invention, includes a horizontal deflection circuit 100 of, for example, a projection television receiver. A horizontal oscillator and driver stage 11 generates in response to a horizontal synchronization signal VS, obtained from a video detector, not shown, a control signal VHO. A switching transistor Q1 has a base electrode that is responsive to signal Signal VHO determines the switching timing of transistor Q1. The collector of transistor Q1 is coupled to a damper diode D1 and to a deflection retrace resonant circuit 12. Resonant circuit 12 includes a retrace capacitor C1, a primary winding W10 of a flyback transformer T1 and a parallel arrangement of three horizontal deflection windings L H for corresponding three picture tubes of the projection television receiver. For illustration purposes, only one picture tube of the three picture tubes 13 is shown in FIGURE 4. As a result of the switching operation of transistor Q1 a retrace voltage VRET is developed across winding WIO in a well known manner. Voltage VRET is transformer coupled to a tertiary winding W20 for producing a first high voltage component V20 across winding W20 at a reference or constant phase relative to that of signal VS. An auxiliary control voltage generator 300 includes a MOS switching transistor Q2 having switching timing that is controlled by an output signal 19a of a lagged pulse generator or one-shot multivibrator 19. Signal 19a is coupled to a gate electrode of transistor Q2 via a driver stage 20 that includes complementary transistors TH04 and TH05. A damper diode D2 is coupled in an antiparallel manner across transistor Q2. A drain electrode of transistor Q2 is coupled to an auxiliary flyback resonant circuit 14. Resonant circuit 14 includes a winding Wal of transformer T2 and a flyback capacitor C2. A retrace voltage that is developed across a winding W60 of transformer T1 is rectified for producing an energizing voltage V1 that is coupled to primary winding Wal of transformer T2. As a result of the switching operation of transistor Q2, a pulse of an auxiliary flyback voltage VAUX is developed across winding Wal that is energized by voltage V1. The pulse of voltage VAUX is transformer-coupled to a winding Wb1 of transformer T2 for developing an auxiliary, second voltage component V30 across winding Wb1 at a peak amplitude that is substantially smaller than that of voltage component V20. Winding Wb1 is coupled in series with winding W20 of transformer T1. Consequently, voltage components V20 and V30 are additively summed and rectified by tertiary diodes DW2 for producing an ultor voltage HV. Ultor voltage is coupled to an ultor terminal of, for example, picture tube 13 without a need for a voltage tripler that is used in the Haferl patent arrangement. By varying its phase, the magnitude of a portion of voltage component V30 that occurs during a given retrace interval of voltage VRET increases in response to a corresponding increase in the beam current of picture tube 13. Consequently, ultor voltage HV is maintained regulated, or substantially constant for reasons similar to those explained in the Haferl patent. The compensation function of auxiliary voltage component V30 is obtained in a negative feedback phase control circuit 15. Control circuit 15, for example, increases the phase difference between the phase of the flyback pulse of voltage VAUX and the reference phase of retrace voltage VRET when voltage HV would, otherwise, tend to decrease. In phase control circuit 15, voltage HV is coupled to a noninverting input terminal of a conventional differential amplifier 18 via a splitter resistor 60 and emitter follower transistors TK01 and TK02. Amplifier 18 produces a reference signal VREG at a level that varies in accordance with that of voltage HV. FIGURES 5A-5E and 6A-6C illustrate waveforms useful for explaining the operation of the circuit of FIGURE 4. Similar symbols and numerals in FIGURES 4 and 5A-5E and 6A-6C indicate similar items or functions. The dashed lines in FIGURES 5B-5E and 6A-6C are representative of a high beam current condition; whereas the corresponding solid lines, represent a low beam current condition. A sawtooth wave form generator 17 of FIGURE 4 includes a transistor Q3 that is turned on during each horizontal retrace by the operation of a retrace signal HTR that is developed across a winding W50 of transformer T1. Signal HTR causes a signal VSAW developed across a capacitor C17 to be downramping, as shown in FIGURE 5B during a portion of interval t 1 -t 3 . During each horizontal trace, such as interval t 3 -t 1 ', signal VSAW is upramping. Signal VSAW is coupled to a noninverting input terminal of a comparator 18; whereas, signal VREG is coupled to an inverting input terminal of comparator 18. At a crossover point, when signal VSAW becomes more positive than signal VREG, such as at time t 4 of FIGURE 5B, corresponding to a high beam current condition, or at time t 4 ', corresponding to a low beam current condition, a falling edge occurs in an output signal 18a of FIGURE 5C of comparator 18' of FIGURE 4. Thus, the falling edge of signal 18a of FIGURE 5C occurs later in the cycle or further delayed in the low beam current condition. Signal 18a is coupled to an input terminal of one-shot multivibrator 19. Multivibrator 19 generates a rising edge of pulse signal 19a of FIGURE 5D. Signal 19a is at a high level during an interval having a constant length PW. The length PW is independent on the timing of signal 18a of FIGURE 5C. At, for example, time t 2A of FIGURE 5D, that corresponds to a high beam current condition, the falling edge of signal 19a occurs. On the other hand, at the low beam current condition, the falling edge of signal 19a occurs at a later time, t 2B . Thus, signal 19a of FIGURE 5D is at a low level during an interval having a length PI. The length PI is also constant and is independent on the timing of signal 18a of FIGURE 5C. The length PI of FIGURE 5D is, for example, longer than twice the pulse width WR of retrace voltage VRET of FIGURE 5A. For example, when the width WR is equal to 6 microseconds, the length PI may be of the order of 15 microseconds. Signal 19a of FIGURE 4 is coupled to the gate of transistor Q2, as explained before. When signal 19a is at the high level, transistor Q2 is conductive and no pulse occurs in voltage VAUX of FIGURE 5E that is maintained at a low level. When the falling edge of signal 19a of FIGURE 5D occurs, a corresponding pulse of flyback auxiliary voltage VAUX of FIGURE 5E is initiated such as at time t 2A , for the high beam current condition, or at time t 2B , for the low beam current condition. The earlier the pulse of voltage VAUX occurs, for example, within retrace interval t 1 -t 3 , the larger is its contribution to voltage HV of FIGURE 4. Variation of the phase of the pulse of voltage VAUX of FIGURE 5E, or its initiation time, occurs in a negative feedback manner to compensate, for example, for the beam current variation. In accordance with the invention, voltage VAUX lags in phase relative to that of voltage VRET of Fig. 5A. Also, the phase of voltage component V30 lags relative to that of voltage component V20. Consequently, the end time of each pulse of, for example, voltage VAUX, such as time t 5A , and at least a part of the trailing portion of the pulse, such as part VAUX(A), occur outside retrace interval t 1 -t 3 of FIGURE 5A. Therefore, any ringing in voltage component V30 of FIGURE 4 that may occur during or after, for example, the occurrence of part VAUX(A), advantageously, cannot affect ultor voltage HV of FIGURE 4 since such ringing occurs outside retrace interval t 1 -t 3 of FIGURE 5A when voltage VRET is approximately zero. Had such ringing been allowed to affect voltage HV, it might have caused a phase reversal in the feedback loop. Had a phase reversal been permitted to occur, a decrease in voltage HV might have caused the feedback loop, disadvantageously, to, for example, further decrease voltage HV of FIGURE 4. Unlike in the Haferl patent arrangement, no voltage tripler is used in the arrangement of FIGURE 4. Advantageously, this feature may reduce the cost of the power supply. However, to obtain the required level of voltage HV, more winding turns in the transformers may be required in the arrangement of FIGURE 4. The need for preventing the aforementioned ringing from affecting voltage HV is particularly significant when the number of winding turns in the windings of the transformers is large. This is so since large number of winding turns tends to produce such ringing at frequencies and amplitudes that may have adverse effect on the regulation of voltage HV. Thus, the arrangement of FIGURE 4, that does not utilize any voltage multiplier, advantageously, eliminates any adverse of such ringing. The width WA of the pulse of voltage VAUX of FIGURE 5E is maintained substantially wider, such as 12 microseconds than, for example, that of voltage VRET. Therefore, the harmonics in transformer T2 of FIGURE 4 are at low frequencies. Therefore, advantageously, the design requirements from transformer T2 are tolerant or relaxed despite the fact that the number of winding turns is large. At zero beam current, representing one extreme case, the pulse of voltage VAUX of FIGURE 6B is initiated after tertiary diodes DW2 of FIGURE 4 cease conducting. Consequently, voltage component V30 of FIGURE 6C has been maintained negative throughout retrace. Therefore, voltage component V30 tends to cause a decrease in voltage HV of FIGURE 4. On the other hand, at maximum beam current, representing the other extreme case, voltage component V30 of FIGURE 6C begins increasing prior to the conduction time of diodes DW2 of FIGURE 4. Therefore, voltage component V30 is sufficiently positive to compensate for the tendency of voltage HV to drop. Within the regulation range that lies between these extreme cases, the phase of voltage VAUX is, for example, further delayed as the beam current decreases. In order to prevent phase reversal in the feedback loop it may be desirable to prevent the initiation of the pulse of auxiliary voltage VAUX of FIGURE 6B from occurring earlier than a predetermined instant. In accordance with another aspect of the invention, a cathode of a diode DL of Figure 4 is coupled to the inverting input terminal of comparator 18'. The anode of diode DL is coupled to a DC voltage that is developed across a resistor RL of a voltage divider. Diode DL prevents, by a clamping action, voltage VREG from decreasing below a predetermined level. Thereby, the earliest trigger timing of one-shot multivibrator 19 is limited. The result is that the earliest initiation time of the pulse of voltage VAUX of FIGURE 5E is also limited.

Claims: A high voltage power supply of a video apparatus, comprising: a source (11) of an input signal having a frequency that is related to a deflection frequency, and a reference phase; a first flyback resonant circuit (12) that includes a deflection winding (LH) and a primary winding (W10) of a first flyback transformer (T1); first switching means (Q1) responsive to said input signal and coupled to said first flyback resonant circuit for generating in a high voltage winding (W20) of said first flyback transformer (T1) a periodic, resonant first flyback voltage (V20) at a phase with substantially constant relation with respect to said reference phase; a second flyback resonant circuit (14) including a winding of a second flyback transformer (T2) coupled to a high voltage circuit including said high voltage winding; second switching means (Q2) responsive to a phase control signal and coupled to said second flyback resonant circuit for generating, in accordance with said phase control signal, a periodic, resonant second flyback voltage (VAUX) at a controllable phase that is lagging relative to said phase of said first flyback voltage (V20), said second flyback voltage being applied in series with said first flyback voltage such that, as a sum of both voltages, a high voltage pulse is developed having an amplitude that varies in accordance with said controllable phase, said flyback voltages including ringing, during a portion thereof, said ringing being produced in transformer windings; and means (60,18,17,19,20) responsive to a signal (HV) that is indicative of said high voltage pulse, for generating said phase control signal to cause a decrease of said controllable phase when the amplitude of said high voltage pulse decreases, in a manner to regulate the amplitude of said high voltage pulse in a negative feedback loop and to establish said controllable phase lagging in order to prevent said ringing from changing said negative feedback loop to a positive feedback loop. A power supply according to Claim 1 wherein said first and second flyback voltages are at least partially overlapping. A high voltage power supply according to Claim 1 wherein said first flyback resonant circuit comprises a horizontal deflection winding (LH) as said deflection winding, and a flyback capacitance (C1). A high voltage power supply according to Claim 1 wherein said high voltage winding (W20) comprises a tertiary winding of said flyback transformer. A power supply according to Claim 1 wherein a flyback resonance frequency of said second flyback resonant circuit is substantially lower than that of said first flyback resonant circuit. A power supply according to Claim 1 wherein said first and second flyback voltages are produced in windings that are magnetically separated to produce said high voltage pulse in accordance with the sum of said first and second flyback voltages. A high voltage power supply according to Claim 1, further comprising rectifier means (DW2) coupled to said high voltage winding for generating a rectified high voltage (HV) that is coupled to a load circuit (60), and wherein said control circuit is responsive to said rectified high voltage for varying said phase of said second flyback voltage in a negative feedback manner that stabilizes said rectified high voltage when a current that flows in said rectifier means varies. A power supply according to Claim 7 wherein said control circuit comprises, means (DL) for limiting the range of said controllable phase to prevent said negative feedback from changing to being a positive feedback.

Inventors: BICHELER HANS-GUENTER, RODRIGUEZ-CAVAZOS ENRIQUE, BICHELER, HANS-GUENTER, RODRIGUEZ-CAVAZOS, ENRIQUE, Bicheler, Hans-Günter
Applicants: RCA THOMSON LICENSING CORP, RCA THOMSON LICENSING CORPORATION
Application year: 1990
Main classification: H04N3
IPC codes: H04N3