Method for producing an ultra-thin dielectric for microelectronics applications

Abstract: A system for fabricating an ultra-thin composite di­ electric, usable for the capacitor in DRAM and in other integrated circuits, involving the deposition, a LPCVD tube, of a nitride (3) in situ on a very thin LPCVD oxide (2). By re-oxidizing the nitride (3) or depositing a LPCVD oxide layer (4, 4′) in situ thereon, a composite ONO dielectric, having very low defect density and good overall electric properties, of less than 10 nm in thickness and as low as 4.5 nm, may be formed.

Description: The present invention relates to a method for the fabrication of ultra-thin composite dielectric, usable in dynamic random-access memory (DRAM) and other integrated circuits (IC), and particularly involving in situ deposition by the low-pressure chemical-vapor deposition (LPCVD) technique so as to be completely compatible with standard IC fabrication processes. The dielectric presently used for the storage capacitor in large DRAM chips is composed of a triple layer of Oxide-Nitride-Oxide (ONO). The nitride is deposited on thermally grown oxide and the top layer is formed by reoxidation of the nitride to convert a thin layer of nitride to oxide. This triple layer is used, rather than a single layer of thermal oxide, because of the much lower defect density offered by ONO. It has been found that due to the low defect density of ONO very few large area capacitors of this dielectric break at high fields during voltage stress. This is especially significant for the DRAM capacitor because the total area covered by all the capacitors on one chip is relatively large and the defect density of a single oxide layer is not low enough. The ONO triple layer dielectric combines the advantages of low defect density with good interface to the silicon substrate and a high dielectric breakdown. These qualities are very important for the yield and reliability of large DRAM chips (i.e., >1Mbits). The ONO is usually fabricated by first thermally oxidizing the surface of a silicon substrate. Next, the thin nitride layer is deposited by low-pressure-chemical-vapor-deposition (LPCVD), and the top oxide layer is then formed by thermally reoxidizing the nitride to convert a part of it to oxide. This contrasts with the different approach taught by T. Hori, and H. Iwasaki, in "Improved Transconductance Under High Normal Field in MOSFET's with Ultrathin Nitrided Oxides", IEEE Electron Device Lett., 10, 195 (1989), whereby the ONO is formed by nitridizing the first oxide in ammonia and then reoxidation, both done in a rapid-thermal-processing (RTP) tool. As DRAM chips increase in their capacity it is required to increase the capacitance of the memory cell. To do this it is necessary to reduce the ONO thickness below its present dimension of about 14 nm. (All references to thicknesses of the composite ONO film are the so called "oxide electrical-equivalent thickness", which is the thickness of the film assuming its dielectric constant is 3.9. All thicknesses of the separate layers are their physical values either from ellipsometry or from the deposition rate and time.) To date there exists a limitation on scaling down the ONO thickness because a nitride layer thinner than about 6-7 nm cannot be reoxidized without the nitride breaking through during reoxidation which results in a thick single oxide layer. In this regard, see, for example, W.T. Chang, D.K. Shih, D.L. Kwong, Y. Zhou, and S. Lee, "Rapid Thermal Oxidation of Thin Nitride/Oxide Stacked Layers", Appl. Phys. Lett., 54, 430 (1989), which points out the reoxidation problem and describes reoxidation of, 60,90,120 Å. nitride in an RTP tool. Also, K.K. Young, W.G. Oldham, and J. Rose, in "Preparation and Characterization of 100 Å. Oxide/Nitride/Oxide Stacked Films", Electrochemical Society extended abstracts 86-2, 618 (1986), describe the breakthrough of nitride thinner than about 7 nm upon reoxidation. Consequently, it is desirable and an object of the present invention to provide a method and means for producing an ultra-thin dielectric and one which allows the fabrication of an ONO layer as thin as about 5 nm with very low defect density in a manner completely compatible with present day DRAM fabrication technology, using the LPCVD technique. The present invention as claimed accordingly involves a method for fabricating an ultrathin dielectric by forming a thin layer of nitride (≃ 3 nm) on a very thin LPCVD oxide, which composite may then be adapted by reoxidizing the nitride layer in such manner as to produce a triple dielectric of as little as 4.5 nm total thickness with low defect density (< 0.1 per cm²). In particular, it has been discovered that a thin nitride deposited on a very thin LPCVD oxide has much better qualities, than yet achieved in the art, provided both the oxide and nitride film are deposited in situ in the same reactor tube at very low deposition rates. The oxide deposition step requires only a few Å of oxide and may be considered as an in situ surface preparation treatment for the subsequent nitride deposition. This treatment can be applied also on a thin thermal oxide on silicon substrate. The formation of a very thin ONO film, utilizing the ultrathin dielectric in accordance with the invention, may be achieved by thermally reoxidizing the nitride to convert part of it into an oxide, which could not previously be done on such thin nitride films. The ONO dielectric may be formed directly on a Si substrate or following thermal oxidation or oxide deposition on the substrate. The top-reoxidizing procedure has been found to result in films having different properties. Consequently, the resulting very thin ONO may find use in various thin dielectric applications such as the gate in FET devices or the dielectric in decoupling capacitors, etc. Preferred embodiments of the present invention are described in the following with reference to the accompanying drawings, in which: Fig. 1 is a cross-sectional view illustrating one form of dielectric in accordance with the present invention; Fig. 2 is a view as in Fig. 1 showing an alternate form of dielectric in accordance with the invention; Fig. 3 shows an another form of dielectric in accordance with the invention; Present thin dielectrics, such as the dielectric for the storage capacitor in DRAM, are composed of a triple layer of oxide-nitride-oxide (ONO). The nitride is deposited on thermally grown oxide and the top layer is formed by reoxidation of the nitride to convert a thin layer of nitride to oxide. Until now the nitride layer in such arrangements has not been able to survive reoxidation at thicknesses below 6-7 nm. In this context the invention herein involves procedures for reoxidizing a 3 nm layer of nitride in such manner as to produce a triple dielectric of as little as 4.5 nm total thickness with low defect density. In particular, it has been discovered that by depositing a thin layer of nitride on a film of CVD oxide, in situ in the same LPCVD tube, at a slow deposition rate, the resulting thin nitride will withstand reoxidation. For example, the oxide may be produced using slow oxide-deposition from SiCl₂H₂/N₂O gas at 785°C and 41.3 Pa (310 mT) to achieve a rate of 0.1 nm/min. which can be increased by raising the temperature to about 800°C. After oxide deposition the N₂O gas is turned off and NH₃ is turned on to switch to nitride deposition to a thickness of 3 nm. Such a nitride layer will then withstand reoxidation at 950°C for 20 min. in O₂ + HCl ambient giving a 4.5 nm triple dielectric capable of adaptation to a boron doped polysilicon gate, with low defect density, and an average current-density at breakdown of 0.5 A/cm². The reoxidation resistance of this nitride layer has been extended to block wet oxidation at 1000°C for anywhere between 30 and 60 min.. It has further been discovered that the thin nitride can be deposited directly on thermal oxide by giving the thermal oxide a short treatment in the LPCVD reactor of a few minutes of exposure to SiCl₂H₂/N₂O gases and then the nitride deposition is done in situ as above with comparable reoxidation qualities. The preferred procedures for fabricating the thin ONO in accordance with the invention consist more specifically of the following steps: Step I. A bottom oxide layer is formed, for example, on a substrate such as a silicon substrate Si, using either of two procedures as follows. The silicon substrate is cleaned and then thermally oxidized by standard oxidation procedures at about 700-1000°C, for times designed to yield an oxide film (layer 1 in Figure 1) of the required thickness. In the preferred embodiment the oxide thickness is about 2.5-4 nm, thermally grown in dry oxygen at 700°C. Alternatively, the silicon substrate is cleaned and an oxide layer is deposited on it (layer 1′ in Fig. 2). In the preferred embodiment the oxide is deposited by LPCVD in the same tool as the subsequent nitride deposition is done. The oxide deposition is carried out by the same process as described in step 2 below giving the structure of Fig. 2. Step 2. Surface preparation (layer 2) before deposition of the nitride is carried out in the same tube as the nitride deposition. More particularly, it consists of the short deposit of a low deposition-rate LPCVD oxide that should be done in situ in the same LPCVD reactor tube where the nitride deposition of step 3 is done. The gas mixture for the deposition is SiCl₂H₂/N₂O. The gas ratios are determined by the gas flow rates. The deposition temperature and pressure in the tube will determine the deposition rate. In the preferred embodiment these para-meters are a temperature of about 785°C, a pressure of about 41.3 Pa (310 mT), and approximate gas flow rates of SiCl₂H₂ at 70 sccm, and N₂O at 270 sccm (sccm is a commonly used unit meaning standard cubic centimeters per minute, wherein standard refers to a temperature of 0°C amd a pressure of 101.3 kPA (760 torr)). How-ever, these parameters may be varied within acceptable ranges, such as, temperatures between about 720-800°C, pressures between about 26.7-106.7 Pa (200-800 mT), and gas flows adjusted according to required deposition rate, e.g., 0.1 nm/min. To ensure high quality thin nitride a minimal surface preparation time is required. The appropriate deposit time for the LPCVD oxide depends on the structure and has been found for different applications to be: 4 minutes when deposited on thermal oxide on the top planar silicon surface (Fig. 1); 1 minute on freshly cleaned bare silicon surface (Fig. 3); and 1 minute on CVD oxide done in another tool. Step 3. Nitride deposition (layer 3) is accomplished in situ after the previous step 2 is completed. The preferred parameters are a gas mixture of SiCl₂H₂/NH₃, at a temperature of about 785°C and gas pressure of about 26.7 Pa (200 mT), and approximate gas flows of SiCl₂H₂ at 10 sccm and NH₃ at 100 sccm. Acceptable ranges include temperatures between about 720-800°C, pressures ranging between about 13.3-106.7 Pa (100-800 mT), and gas flows adjusted accordingly. In the preferred embodiment the deposition rate of nitride is 1 nm/min. and the nitride thickness can be as low as 3 nm. Step 4. The final step involves the formation of a top oxide (layer 4 or 4′). This is accomplished by thermal reoxidation of the nitride. In the preferred embodiment, the nitride is reoxidized at 950°C, for 20 min. in O₂/HCl ambient. This converts part of the nitride to oxide (layer 4) without breaking through the nitride. It has been found in particular that a 4 nm nitride layer formed as in step 3 can withstand reoxidation at 1000°C, for 30 min. in wet O₂ ambient. To test their electrical characteristics, the various ONO structures shown in Figs. 1-3 were fabricated on 125 mm silicon wafers. Capacitors were formed by standard polysilicon and aluminum electrode techniques on top of the ONO films. Electrical testing was done on capacitors having areas from 1 x 10⁻⁴ to 0.1 cm². Defect densities were measured by stressing 120 capacitors, each having an area of 0.08 cm², covering a total area of about 10 cm². Defect densities as low as 0.1 per /cm² were obtained and in several cases the defect density was found in the testing to be zero. These results were determined by the number of capacitors that broke well below the voltage determined by the dielectric strength of the film. The average dielectric strength of the films was 12-14 MV/cm. Interface trap densities determined by standard characterization techniques of the interface betwen silicon and SiO₂ were as low as for standard SiO₂. Testing was also done for electron trapping, as nitride and deposited oxides are known to trap electrons, i.e., be very "trappy" for electrons. ONO films above about 6.5 nm thickness are quite trappy, which poses a problem for their use as FET gate dielectric. The present invention therefore provides a composite ONO dielectric, having very low defect density and good overall electric properties, of less than 10 nm in thickness and as low as about 4.5 nm.

Claims: A method for producing a low defect density ultra thin oxide/nitride/oxide (ONO) dielectric comprising the steps of: producing a thin film of oxide (2) by deposition in an LPCVD tube; slowly depositing a thin layer of silicon nitride (3), in situ in said LPCVD tube, from a gas mixture of SiCl₂H₂/NH₃, at a temperature in the range between 720-800°C, at a pressure in the range between 13.3-106.7 Pa (100-800 mT) and gas flows adjusted to achieve a deposition rate of 1 nm/min on said thin film of oxide, to a thickness of at least 3 nm and such that the resulting oxide-nitride structure has a thickness in the range from 4 nm up to less than 10 nm, and forming a thin layer of oxide (4) thereon to a thickness such that the thickness of the resulting composite ONO is under 10 nm, said oxide (4) being formed by thermal reoxidation of said nitride layer (3). A method as in claim 1 wherein the oxide film producing step comprises depositing an oxide (2) from SiCl₂H₂/N₂O gas on a substrate in said LPCVD tube and the oxide (2) is deposited at a temperature in the range between 720-800°C, at a pressure in the range between 26.7-106.7 kPa (200-800 mT), and gas flows at a deposition rate of 0.1 nm/min. A method as in claim 2 wherein the oxide (2) is deposited at a temperature of 785°C, a pressure of 41.3 Pa (310 mT), and approximate gas flow rates of SiCl₂H₂ at 70 sccm, and N₂O at 270 sccm. A method as in claim 1, 2 or 3 wherein the nitride depositing step comprises depositing a layer of nitride (3) from a gas mixture of SiCl₂H₂/NH₃, at a temperature of 785°C, a pressure of 26.7 Pa (200 mT), and approximate gas flows of SiCl₂H₂ at 10 sccm, and NH₃ at 100 sccm. A method as in any one of the preceding claims wherein the step of forming the thin layer of oxide (4) is carried out at 950°C, for 20 min. in O₂/HCl ambient. A method as in any one of claims 1 to 3 wherein the oxide producing step further comprises cleaning and then depositing the oxide layer (2) on a silicon substrate. A method as in any one of claims 1 to 3 wherein the oxide producing step further comprises cleaning and thermally oxidizing a silicon substrate, on which said thin film of oxide (2) is then to be deposited, by standard oxidation procedures at a temperature in the range between 700-1000°C, for a time yielding an oxide thickness in the range between 2.5-4 nm, in dry oxygen.

Inventors: NGUYEN THAO NGOC, STEIN KENNETH JAY, SUN YUAN-CHEN, WEINBERG ZEEV AVRAHAM, NGUYEN, THAO NGOC, STEIN, KENNETH JAY, SUN, YUAN-CHEN, WEINBERG, ZEEV AVRAHAM
Applicants: IBM, INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1990
Main classification: H01L21
IPC codes: H01L21, C23C16, H01L29