Photoelectric converting apparatus

Abstract: There is provided a photoelectric converting apparatus having a plurality of photoelectric conversion device lines and a plurality of scanning circuits corresponding to the plurality of photoelectric conversion device lines, wherein the plurality of photoelectric conversion device lines and the plurality of scanning circuits are connected by wirings.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a photoelectric converting apparatus and, more particularly, to a photoelectric converting apparatus having a plurality of photoelectric conversion device lines in which a signal can be independently output from each of the photoelectric conversion device lines. Related Background Art A photoelectric converting apparatus to read a color image is generally constructed by three pixel lines having three different spectral sensitivities. The pixel lines scan on an original, so that the original is read. At this time, to obtain image information at a certain position (P) on the original, on the system side, it is necessary to record the information for a period of time when the three pixel lines scan the position P. This is because it is necessary to store the information from all of the pixel lines since the timings to obtain the image information at the position P of the pixel lines are different. A recording capacity M which is necessary to store the information needs to be set to M = N · d/p (N: the number of pixels, d: distance between pixel lines, p: pitch of the pixels constructing the pixel line) with respect to one pixel line. In this case, to keep a resolution constant and to reduce M, it is desirable to reduce d. A known photoelectric converting apparatus (disclosed in JP-A-62147766) in which the distance d between pixel lines is reduced will be shown below. Fig. 7A is an explanatory diagram of a construction of the known photoelectric converting apparatus and Fig. 7B is a partial enlarged diagram of such a photoelectric converting apparatus. As shown in Fig. 7A, three different pixel lines A, B, and C are arranged adjacently, charge transfer means a 1 , b 1 , and c 1 are arranged on one side, and charge transfer means a 2 , b 2 , and c 2 are arranged on the other side. The pixels constructing the pixel lines A, B, and C are alternately divided into the pixels whose signals are transferred to the charge transfer means a 1 , b 1 , and c 1 and the pixels whose signals are transferred to the charge transfer means a 2 , b 2 , and c 2 . As shown in Fig. 7B, the pitch of the pixels is set to p and the distance between the pixel lines is set to d. In the photoelectric converting apparatus of the above construction, the signal transfer among the pixel lines A, B, and C and the signal transfer among the charge transfer means a 1 to c 2 are executed by transfer gates T 7 to T 14 provided between the pixel lines A, B, and C and between the charge transfer means a 1 to c 2 . In the above constructional example, after the elapse of a predetermined storage period T 0 , by turning on/off the transfer gates respectively at three different timings, the photo charges generated by the pixel lines A, B, and C are vertically transferred to the charge transfer means a 1 to c 2 in a short time and, thereafter, they are horizontally transferred. In the photoelectric converting apparatus of the above construction, since only the transfer gates are present between the pixel lines, the distance d between the pixel lines can be reduced. However, in the known example, since the transfer of the signals from the pixel lines A, B, and C to the horizontal transfer sections a 1 to c 2 is executed through the photoelectric converting section (accumulation section) of each pixel line by using the vertical gates, the vertical transfer operations regarding the pixel lines A, B, and C are executed together at the same timing. Therefore, three pixel lines cannot be independently driven. EP-A-0173413 proposes a contact type colour image sensor having four rows of pixel electrodes, to provide three colour rows and a white row. Read-out electrodes connect respective pixel electrodes to common signal output lines, one common signal output line being provided for each row of pixel electrodes and the common signal output lines being provided two on each side of the set of four rows of pixel electrodes. The read-out electrodes for the inner rows pass between the pixel electrodes of respective outer rows. Each row of pixel electrodes has n pixel electrodes, at a pixel pitch p in the main scanning direction, and the rows of pixel electrodes are provided at a pitch q in the sub-scanning direction, the pitches p and q being related by a multiplier k so that q = p.k where k.n is a natural number larger than one. The signals on each common output line are provided to respective A/D converters. The digital values from the A/D converter for a first common output line are output directly, the digital values from the A/D converter for a second output line are output through a k.n long delay register, digital values output from the A/D converter for a third common output line are output through a 2k.n long delay register, and digital values output from the A/D converter for the last common output line are output through a 3k.n long delay register. The delay registers transmit signals synchronously with the same clock signal with the effect that read-out timing misalignment of the R, G, B, W signals for one image point are accurately compensated. SUMMARY OF THE INVENTION According to the present invention there is provided photoelectric conversion apparatus as set out in claim 1. The remaining claims set out optional features. In an embodiment, the accumulation of the signal charges in each of the photoelectric conversion lines and the transfer of the accumulated signal charges can be performed independently. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is an explanatory diagram showing an example of a construction of a photoelectric converting apparatus according to the present invention; Fig. 2 is a circuit diagram showing one circuit construction of the photoelectric converting apparatus; Fig. 3 is a timing chart showing the operation of a pixel line R as one pixel line of the photoelectric converting apparatus with the above circuit construction; Fig. 4 is a timing chart to independently drive pixel lines R, G, and B; Figs 5A and 5B are explanatory diagrams showing another embodiment to independently drive the pixel lines A, B, and C; Fig. 6 is a schematic constructional diagram of an example of an image reading apparatus; Fig. 7A is an explanatory diagram of a construction of a known photoelectric converting apparatus; and Fig. 7B is a partial enlarged diagram of the photoelectric converting apparatus. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail hereinbelow with reference to the drawings. Fig. 1 is an explanatory diagram showing an example of a construction of a photoelectric converting apparatus of the invention. As shown in the diagram, the pixel lines A, B, and C of a pixel line section 1 as a photoelectric conversion device line are connected to a vertical transfer/temporary storage section 2 through wirings, respectively. The storage section 2 is connected to each of horizontal transfer section constructing lines a, b, and c of a horizontal charge transfer section 3 through wirings, respectively. The vertical transfer/temporary storage section 2 and horizontal charge transfer section 3 construct a scanning circuit. In the above example of the construction, since the signal charges stored in each pixel line are transferred to the horizontal charge transfer section 3 through the wiring without passing through the other pixel lines, the signal charges can be sent independently of the other pixel lines. Fig. 2 is a circuit diagram showing one circuit construction of the photoelectric converting apparatus. As shown in the diagram, the pixel line section 1 is constructed by three lines of R (red), G (green), and B (blue). Photoelectric converters S 11 to S 32 of each pixel line are constructed by photo transistors. MOS transistors T 11 to T 32 are connected to bases of the photoelectric converters S 11 to S 32 of each of the pixel line section 1 of R, G, and B. Pulses  BRR ,  BRG , and  BRB are applied every pixel line of R, G, and B. The MOS transistors T 11 to T 32 are on/off controlled and a predetermined voltage V BG is applied to the bases of the photoelectric converters S 11 to S 32 . Emitters of the photoelectric converters S 11 , S 21 , and S 31 are connected to temporary storage capacitors C TR1 , C TG1 , and C TB1 through MOS transistors T R1 , T G1 , and T B1 and are also connected to a reset potential V VR through MOS transistors T RR1 , T RG1 , and T RB1 to execute the resetting operation. The temporary storage capacitors C TR1 , C TG1 , and C TB1 are connected to output signal lines R, G, and B through MOS transistors T SR1 , T SG1 , and T SB1 which are controlled by shift registers R, G, and B. In a manner similar to the above, emitters of the photoelectric converters S 12 to S 32 are connected to temporary storage capacitors C TR2 , C TG2 , and C TB2 through MOS transistors T R2 , T G2 , and T B2 and are also connected to MOS transistors T RR2 , T RG2 , and T RB2 to execute the resetting operation. The temporary storage capacitors C TR2 , C TG2 , and C TB2 are connected to the output signal lines R, G, and B through MOS transistors T SR2 , T SG2 , and T SB2 which are controlled by the shift registers R, G, and B. Pulses  VRR ,  VRG , and  VRB control the MOS transistors T RR1 , T RG1 , T RB1 , T RR2 , T RG2 , and T RB2 . Pulses  TR ,  TG , and  TB control the MOS transistors T R1 , T G1 , T B1 , T R2 , T G2 , and T B2 . Pulses  STR ,  STG , and  STB control the MOS transistors T SR1 , T SG1 , T SB1 , T SR2 , T SG2 , and T SB2 through the shift registers R, G, and B. The MOS transistors T R1 , T G1 , T B1 , T R2 , T G2 , and T B2 construct a vertical transfer gate section 2b. The temporary storage capacitors C TR1 , C TG1 , C TB1 , C TR2 , C TG2 , and C TB2 construct a temporary storage capacitor section 2a. The vertical transfer gate section 2b and the temporary storage capacitor section 2a construct the vertical transfer/temporary storage section 2. On the other hand, the MOS transistors T SR1 , T SG1 , T SB1 , T SR2 , T SG2 , and T SB2 construct a horizontal transfer gate section 3c. The output signal lines R, G, and B construct an output signal line section 3b. The shift registers R, G, and B construct a shift register section 3a. The shift register section 3a, the output signal line section 3b, and the horizontal transfer gate section 3c construct the horizontal charge transfer section 3. Fig. 3 is a timing chart showing the operation of the pixel line R as one of the pixel lines of the photoelectric converting apparatus of the above circuit construction. As shown in the diagram, when the pulse  TR is applied at time t 1 and the MOS transistors T R1 and T R2 as vertical transfer gates are turned on, the photo signals at the pixels of the pixel line R are transferred simultaneously to the temporary storage capacitors C TR1 and C TR2 . After that, the base potential in the photo transistor constructing section as a photoelectric converter is reset (complete reset) to V BG by applying the pulse  BRR at time t 2 . Further, by applying the pulse  VRR at time t 3 , the emitter potential is reset (transient reset) to V VR . The time which is required from the end of the transient reset to the supply of the next vertical transfer pulse  TR corresponds to the storage time of the signal charges which are subsequently read out. The photo signals which were transferred to the temporary storage capacitors at time t 1 are output to the output signal line R a bit at a time by the scanning pulse from the shift register R at time t 5 after the start clock  STR of the shift register R was applied at time t 4 . Although the operation of the pixel line R has been described above, the other pixel lines can be also operated at similar drive timings. In the embodiment, as mentioned above, since the outputs are scanned by using three independent scanning circuits of R, G, and B, there is no limitation in the drive timings of R, G, and B and the three pixel lines can be completely independently driven. Fig. 4 is a timing chart for independently driving the pixel lines R, G, and B. The pulses  BRR ,  BRG , and  BRB to execute the complete reset and the pulses  VRR ,  VRG , and  VRB to perform the transient reset are omitted for simplicity of the drawing. As shown in the diagram, in the embodiment, the time which is required from the supply of a vertical transfer pulse  T to the supply of the next vertical transfer pulse  T with respect to the pixel line B is set to be longer than those of the other pixel lines R and G (T 3 > T 1 , T 2 ). The storage time of the signal charges of B is longer than those of R and G. As mentioned above, in the embodiment, the storage time of the signal charges can be arbitrarily changed in accordance with the sensitivity or the like of the photo transistor constructing section as a photoelectric converter. In the above embodiment, although the photoelectric converter is constructed by the photo transistor, it can be also replaced by other photoelectric conversion device such as a photo diode. The temporary storage capacitors C TR1 , C TG1 , C TB1 , C TR2 , C TG2 , and C TB2 shown in Fig. 2 can be also omitted. Figs. 5A and 5B are explanatory diagrams showing another embodiment to independently drive the pixel lines A, B, and C. Fig. 5A is a schematic explanatory diagram. Fig. 5B is a timing chart. Even in Fig. 5B, only the pulses  TR ,  TG , and  TB are shown for simplicity of the drawing. As shown in Fig. 5A, it is assumed that the photoelectric conversion devices shown in Fig. 2 move at a constant velocity v and color image information of an original is read. For instance, the B pixels obtain the original information (information amount: TB 1 ) for the period of time from time t = 0 to time t = T 0 . Assuming that the distance between pixel lines is set to d, the original information which is obtained by the G pixels is input with only a delay time t = d/v (information amount: TG 1 ). Similarly, the original information which is obtained by the R pixels is input with only a delay time t = 2d/v (information amount: TR 1 ). As shown in Fig. 5B, the generation timings of the drive pulses  TG and  TR of G and R are phase-shifted by only a time t G (=d/v) and a time t R (=2d/v) (it is assumed that all of the periods T 0 of the pulses  TB ,  TG , and  TR are the same). Thus, the information amounts which are obtained from the original by the R, G, and B pixels are equal (TB 1 = TG 1 = TR 1 , TB 2 = TG 2 = TR 2 , .... In Fig. 5, although TB 1 , TG 1 , TR 1 are not equal to TB 2 , TG 2 , and TR 2 , it is also possible to set such that TB 1 , TG 1 , TR 1 = TB 2 , TG 2 , TR 2 ), so that the correct color information is derived. In this case, when the scanning velocity v of the photoelectric conversion device changes, t G and t R also change. However, in the embodiment in which the R, G, and B pixel lines can be independently driven, the phases can be easily controlled by changing the times t G and t R . An example of an image reading apparatus to which the invention is applied will now be explained. Fig. 6 is a schematic constructional diagram of an example of the image reading apparatus. In the diagram, an original 501 moves mechanically in the direction of an arrow Y relative to a reading section 505. An image sensor 504 as the photoelectric converting apparatus embodying the invention scans the original in the direction of an arrow X, so that an image is read. First, the light from a light source 502 is reflected by the original 501 and its reflected light is transmitted through an image forming optical system 503 and an image is formed onto the image sensor 504. Thus, carriers corresponding to the intensity of the incident light are accumulated into the image sensor 504 and are photoelectrically converted and are output as an image signal. The image signal is converted into the digital signal by an A/D converter 506 and is stored as image data into a memory provided in an image processing unit 507. The processes such as shading correction, color correction, and the like are executed. The processed image signal is transmitted to a personal computer 508 or a printer or the like. After completion of the image signal transfer by the scanning in the X direction, the original 501 undergoes relative movement in the Y direction. By repeating similar operations after that, optical information from the original 501 is converted into the electric signal and can be extracted as image information. As described in detail above, according to the photoelectric converting apparatus embodying the invention, the following advantages can be obtained. (1) Since three pixel lines can be independently driven, the charge storage periods of the pixel lines can be freely controlled and the phases of the operations of the pixel lines can be also shifted. (2) There is no need to provide any transfer gate among the pixel lines. The distance between pixel lines can be reduced as compared with that in the known example.

Claims: Photoelectric conversion apparatus comprising a plurality of photoelectric conversion lines (1) in which signals from each line can be read out to output means (3) outside the plurality of photoelectric conversion lines without being passed through an adjacent line, characterised by signal providing means for providing separate read-out control signals (TR, TG, TB) for said photoelectric conversion lines, said signal providing means being capable of providing said read-out control signals for different said photoelectric conversion lines at different times whereby it is possible for different said photoelectric conversion lines to be read at different times from each other and not necessarily read simultaneously, and in that the signal providing means is adjustable to vary the delay (t G , t R ) between reading different photoelectric conversion lines. Apparatus according to claim 1 comprising means for adjusting the signal providing means to vary the said delay in dependence on the speed of relative movement between the photoelectric conversion lines and an original to be read by the apparatus. Apparatus according to claim 1 or claim 2 in which the signal providing means is adjustable to vary the phase offset between reading different photoelectric conversion lines. Apparatus according to any one of claims 1 to 3 comprising respective output lines (3b) for signals read from respective photoelectric conversion lines, and scanning means (3a) for providing scanning signals for placing signals read from respective photoelectric conversion lines onto the respective output lines, the scanning means providing separate scanning signals for separate photoelectric conversion lines. Apparatus according to claim 4 in which the scanning means (3a) comprises separate shift registers for separate photoelectric conversion lines. Apparatus according to claim 5 in which the signal providing means provides separate start signals (STR, STG, STB) to the respective shift registers. Apparatus according to any one of claims 4 to 6, further having memory means (CTR, CTG, CTB) between said output lines (3b) and said photoelectric conversion lines (1). Apparatus according to claim 7 comprising read-out transistors (TR, TG, TB) for reading signals from the photoelectric conversion lines (1) to the memory means (CTR, CTG, CTB) in response to the read-out control signals (TR, TG, TB) and scanning transistors (TSR, TSG, TSB) for placing signals from the memory means (CTR, CTG, CTB) onto the output lines (3b) in response to the scanning signals. Apparatus according to claim 7 or claim 8, wherein said memory means comprises capacitors. Apparatus according to any one of the preceding claims in which the plurality of photoelectric conversion lines comprises a plurality of colour line sensors to form different colour signals in different colour line sensors. Apparatus according to claim 10, in which the plurality of colour line sensors include three colour line sensors to form R, G, and B signals respectively. Apparatus according to any one of the respective claims in which each of said plurality of photoelectric conversion lines comprises a plurality of pixels each of which comprises a transistor (S) for amplification. A photoelectric conversion method, in which an original is read using photoelectric conversion apparatus comprising a plurality of photoelectric conversion lines (1) in which signals from each line can be read out to output means (3) outside the plurality of photoelectric conversion lines without being passed through an adjacent line, the method comprising providing separate read-out control signals (TR, TG, TB) to separate said photoelectric conversion lines, and adjusting the delay between reading different photoelectric conversion lines in dependence on the speed of movement of the apparatus over the original.

Inventors: OGUCHI TAKAHIRO, OGUCHI, TAKAHIRO, OGUCHI, TAKAHIRO, C/O CANON KABUSHIKI KAISHA
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1990
Main classification: H04N1
IPC codes: H04N1, H01L27, H04N9, H04N3