Storage device for reversibly storing digital data on a multitrack storage medium, a decoding device, an information reproducing apparatus for use with such storage medium, and a unitary storage medium for use with such storage device, decoding device and/or information reproducing device

Abstract: Storage device for reversibly storing digital data on a multitrack storage medium, a decoding device, an information reproducing apparatus for use with such storage medium, and a unitary storage medium for use with such storage device, decoding device and/or information reproducing device. The disclosure describes a storage device and a decoding device for use with a medium which has a plurality of parallel storage tracks. Error protection is provided by a product code of C1 code words and C2 code words. C1 code words are each assigned to one storage segment in one storage track. C2 code words run recurrently andy cyclically through all tracks and also cross intersegment boundaries. Physical spacing of C2 code word symbols is substantially uniform in both coordinate directions. Storage requirements for decoding can be minimized.

Description: FIELD OF THE INVENTION The invention relates to a storage device for storing digital data on a multitrack storage medium. In particular, the medium may be a magnetic cassette tape that has a plurality of parallel tracks. Alternatively, the "tracks" could be successive revolutions of what is effectively a spiral on a disk, such as an optical recording disk. Storage of digital data is notoriously sensitive against mutilation, that may be operative both on the level of any arbitrary bit, or be represented by long strings of bits along a particular track that have a high error probability. BCH codes over finite fields have proven advantageous error protection vehicles, in particular Reed-Solomon codes defined for multi-symbol words, each symbol being an 8-bit element of a Galois field, the codes being systematic on the symbol level. The ordinary-skilled technician could do away with various ones of these restrictions without deviating from the general concept of the invention. In particular, the invention relates to a storage device for storing digital data on a storage medium with a first plurality of substantially uniform and contiguous storage tracks, under execution of an error protection encoding operation by means of a block code consisting of Cl-code words, in a first direction and of C2-code words in a second direction, said device having first encoding means for said first code to generate error protected C1 code words each assigned to a particular single track, second encoding means for said second code to generate error protected C2 code words each assigned to all of said first plurality of tracks, and means for separating the symbols of a code words. A device of this kind has been disclosed in Tanaka, et al, "Application of Generalized Product Code for Stationary-Head Type Professional Digital Audio Recorder", Transactions of the IECE of Japan, 1986, No.6, p.740-746, of which by way of example, Figure 8 is being considered. The reference proposes such two dimensional block code format as a sub-class of generalized product codes, that however, has lost the characteristics of a product code format, which have been defined in the exemplary text book references presented hereinafter. The present invention has considered the advantageous properties of a classical product code, both in terms of error protectivity and in terms of decoding effort, for realizing an appropriate degree of protection at a reasonable complexity of encoding and decoding and realizing such protection in a regular format. Now according to one of its aspects, the invention provides such device, characterized in that all user symbols and redundant symbols of the C1 code words and C2 code words have a uniform multibit size, in that said block code is a product code, in that each C2 code word has a number of symbols that is an exact multiplicity of said first plurality of tracks, and which symbols are assigned to said first plurality of tracks according to a multiply recurrent and uniform cycle along their particular C2 code words, and in that said device has physical disposition means for disposing each C2 code word so that among symbols of the latter C2 code word spacings between physically neighbouring symbols are substantially uniform in size and have non-zero components both along said tracks and across said tracks. In particular, the storage format so attained offers robustness against row errors that afflict a large fraction of the data on any single track and column errors, that could afflict a plurality of code symbols that in principle are written simultaneously, if writing skew is ignored. Furthermore, robustness against drop-out patches of the medium is so realized. By way of background, the following references on product codes are proposed: Richard E. Blahut, Theory and Practice of Error Control Codes, p.282-285, Addison-Wesley 1984 W.W.Peterson and E.J. Weldon, Error-Correcting Codes, p.131-133, MIT 1972. These references do not consider particular applicability for multitrack recording. Advantageously, among said non-zero components the cross-track component derives from a uniform cross track jump between successive symbols of said C2 code word which is an integer number of tracks modulo said first plurality, said integer number also being relatively prime to said first plurality. This allows for easy address calculations. Advantageously, among said non-zero components the along-track component derives from a uniform-along-track jump between successive symbols of said C2 code word. This further simplifies address calculation. Preferably, write means are provided for magnetically writing in parallel tracks that are tape tracks. By itself, fine quality tape allows so for high-density storage and high-rate transfer. Preferably, the write means interface to the plurality of tracks as mutually contiguous tracks. This makes relative positioning superfluous and further raises attainable storage density. Preferably, the first plurality of tracks is disposed on half of said tape and within said first plurality of tracks an outer edge track on said tape is fully filled with parity symbols that each pertain to an associated C2 code word. Outer tracks are slightly more susceptible to mutilation and in consequence, overall susceptibility is diminished. Preferably, each track has a sequence of blocks, each block containing a uniform integer number of C1 code words, and wherein said integer number is 2 and within any block its C1 code words are 2-interleaved. This raises the uniformity of the storage organization. Preferably, abstracted from tape skew the physical disposition of C1 words among said first plurality of tracks is mutually synchronous. This lowers requirements for buffering in the write electronics. Preferably, abstracted from tape skew the physical disposition of said blocks among said first plurality of tracks is mutually synchronous, and on each track a second plurality of blocks is contained in a tape segment of uniform size, a third plurality of tape segments is contained in a tape frame of second uniform size, said tape segments and tape frames being mutually synchronous among said first plurality of tracks, and any said C2 code word being fully contained in a single tape frame. This further raises the uniformity of storage organization. Preferably, mutually synchronous blocks among said tracks constitute a slice, and wherein each C2 code word is uniformly distributed over all slices of a frame. This further improves uniformity. Preferably, there is provided a RAM encoding memory accommodating storage of a fourth plurality of tape segments, to wit an input RAM segment for therein receiving user data of an intended tape segment, a further RAM segment series for therein storing user data of a corresponding set of intended tape segments and for therein encoding associated C1 and C2 code words and an output RAM segment for therefrom outputting a fully encoded tape segment. Whereas the C2 code words may be distributed over a plurality of RAM segments, and C1 code words over a single segment, the total storage capacity required is only two RAM segments more than the number covered by the extension of the C2 code words. Preferably, the first plurality is equal to 8. This is a good trade-off between high transfer rate and moderate apparatus complexity. Preferably, said C1 code is a (24, 20, 5) code and said C2 code is a (32, 26, 7) code. These codes, in particular as combined in a product code, provide immunity against a wide range of errors. Nevertheless, the mathematical complexity of executing correction and/or detection of errors remains simple. In particular, odd-distance codes were found to team up better than even-distance codes, even if the codes now have rather different distances. Preferably, each frame comprises 384 C2 code words. In this, simple organization and large capacity of storage are balanced. Preferably, the non-zero component across said tracks derives from a jump +5 modulo said first plurality. This allows for simple address processing. Preferably, the medium is a reversible storage medium. In addition to magnetics, also state of the art optical storage would be usefull. Preferably, the device would comprise reception means for an analog audio signal, analog to digital conversion means fed by said reception means for by A/D conversion providing at least a substantial part of said digital data for subsequent encoding by said product code. Direct audio to coded-data conversion provides an effective countermeasure to interference by external disturbances. Advantageously, such reader device comprises a multisegment RAM memory, filling means for sequentially filling a predetermined second plurality of RAM segments with data from said real or emulated storage medium, wherein any C1 code word is exclusively assigned to one single RAM segment, and any C2 code word is exclusively assigned to a single one multisegment RAM frame, in that any C2 code word runs with a uniform row jump and uniform column jump through said RAM frame modulo the dimensions of said RAM frame. This represents a relatively low requirement for storage capacity. Advantageously, each memory segment comprising its multisegment RAM memory, wherein each RAM segment accommodates a uniform third plurality of C1 code words that is uniformly distributed among said first plurality of tracks as relating exclusively to a single medium segment, so that any storage medium segment fits 1:1 on a RAM segment, and further provided with first decode means for upon filling of each memory segment directly activating decoding of any C1 code word available in said memory segment. Fast activation of the decoding diminishes the time lag between reading and reproducing of stored information. Advantageously, upon storage said C2 code words cross intra-memory segment boundaries up to a third plurality of memory segments but no other intra-memory segment boundaries, and said apparatus having second decoding means for after storing of said C2 code words in said third plurality of memory segments and decoding by said first decode means activating decoding said C2 code words. Such time lag by means of this stratagem is kept low as well. Advantageously, said memory accommodates in addition to said third plurality of memory segments, one further input segment for inputting data of one storage medium segment and one second further segment for outputting data of one already decoded storage medium segment. For example, a four-sgement frame now only requires a six-segment memory. The above advantages now clearly have their counterparts in the storage device mentioned earlier. The invention also relates to an information reproducing device and containing a decoding device as recited supra, comprising holding/driving means for said storage medium in the form of a magnetic tape, head means for time-sequentially accessing a stretch of locations on said tape, and audio reproduction means fed by said decoding device. Such device would represent a price-effective consumer entertainment apparatus for general use. In particular, the decoder part thereof could well be contained in a single-chip embodiment. The invention also relates to a magnetic tape for use with a decoding device as described supra, and comprising said first plurality of substantially uniform storage tracks, said tracks comprising a storage frame which is equally distributed over said parallel tracks that are single-sidedly disposed on one half of said a magnetic tape, said frame being protected by a symbol-correcting block product code as represented by C1 words and C2 words, each C1 word being disposed within exactly one of said tracks, each C2 word being disposed over all of said tracks in that said C2 word has a number of symbols that is an exact multiplicity of said first plurality, and which symbols are assigned to said plurality of tracks according to a multiply recurrent and uniform cycle along their particular C2 code words and in that physical spacing among neigbhouring symbols of the latter C2 word is substantially uniform and has non-zero components both along said tracks and across said tracks. The invention also relates to a storage medium as described supra and contained in a cassette that interfaces to an apparatus also described hereinbefore. Such cassette would still further rise the physical integrity of the storage. Various advantageous aspects are recited in dependent Claims. BRIEF DESCRIPTION OF THE DRAWING The invention will be explained in detail hereinafter, with respect to a preferred embodiment that is shown in the appended Figures. In particular, first the data format and associated decoding and, vice versa, encoding procedures are explained. Thereafter the error protection code format will be discussed in detail. Now, in the Figures: Figure 1 shows a main data tape frame format according to the invention; Figure 2 is a block diagram of a reader device according to the invention, that with few modifications changes to an encoding storage device; Figure 3 schematically shows RAM segment accessing in such device; Figure 4 shows the data mapping on the tape; Figure 5 shows the same in RAM; Figures 6, 6A show the disposition of a C2 word on tape; Figure 7 further illustrates the use of the present invention; Table 1 formalizes the mapping of user data on the tape. DESCRIPTION OF A PREFERRED EMBODIMENT Figure 1 exemplifies the main data allocation, that is user data plus associated redundancy data. Further, in this respect, Table 1 formalizes the mapping of user data onto the tape. The user bytes (or symbols) are numbered sequentially. Their internal organization is not considered; they could, however, derive from digitized single-channel or double-channel audio, video, or other. Each byte D has three indexes t, b, i, namely track number t in [0,7], tape block number b in [0,31], and symbol number within a block in [0,47]. The number of user main data bytes in a tape frame is 8192. The placement of these bytes according to their placement number u in [0,8191] is found with the formulae of Table 1. Use is made of two intermediate variables d, e, wheren e in effect is the segment number and d the number-within-the-segment in question. In addition 128 system information symbols may be accommodated to give a total of 8320 non-redundant symbols within the product code block. The RAM to be discussed hereinafter, has 32 columns of 384 rows each for accommodating 12288 symbols. The number of redundant symbols is thus 12288-8320=3968 symbols. This number is lower than the sum of the redundant symbols of each of the C1 code words and C2 code words because several redundant symbols are part of two code words. This in fact is the principal of a product code. Now, as shown in Figure 1, for storage on tape, eight tracks 0..7 are provided. The data, inclusive of redundant error-protection data, is carried in units called tape frames. Each tape frame, indicated by arrow 20, covers all eight tracks. Each tape frame is divided into 32 consecutive tape slices shown as columns. Each tape slice contains 8 tape blocks, that is one tape block for each track. Also, one tape frame is divided into four frame segments that each contain 8 consecutive slices of the tape frame in question. These frame segments have not been indicated in the Figure. One tape block 22 corresponds to 408 unmodulated main data bits, that are modulated into 510 channel bits. For brevity, the modulating into channel bits has not been detailed further and the consideration hereinafter only applies to the unmodulated bits. On the tape, corresponding tape blocks of different tracks are aligned as shown. Each tape block consists of a sync-pattern of 10 bits, a number-indication symbol of 8 unmodulated bits, and a parity symbol of 8 unmodulated bits which leaves 48 body symbols. The subsequent consideration restricts to the latter 48 symbols per block, 48x32x8=3x2 12 =12288 per frame. The code used will be discussed hereinafter. DESCRIPTION OF A DECODER APPARATUS Figure 2 is a block diagram of a decoder apparatus embodiment. The tape 30 is read simultaneously in eight parallel tracks by tape access mechanism 32 which also executes the demodulating. Block 34 driven by synchronization mechanism not shown, counts off bytes, segments, and frames. RAM 36 comprises six RAM segments or pages that are numbered 0-5. It is fed by counting block 34 that provides write addresses by successive incrementation and also gates the data to RAM 36. Likewise, counting block 38 gates data read out from RAM 36 unto user line 54 and provides read addresses by successive incrementation. In this way RAM 36 is a first-in-first-out buffer with respect to the user data. As symbolically shown, block 42 is the C1 decoder that bidirectionally accesses RAM 36 via its access facility 40. Likewise, block 46 is the C2 decoder that bidirectionally accesses RAM 36 via its own access facility 44. In this respect, Figure 3 schematically shows the segment-wise accessing of RAM 36 by write counter/gate mechanism 34. Inasmuch as time goes from left to right in the Figure, all six RAM-pages are filled or overwritten in cyclical sequence. The physical disposition of the segments in the RAM structure is of no consequence to the decoding organization. In Figure 3, row 62 shows the decoding operation by C1 decoder 42. Decoder 42 receives a synchronizing signal from counter/gate mechanism 34 on line 48 and in consequence, knows the instant on which a complete segment has been filled in RAM 36 and also its address (range). Now inasmuch as each C1 code word of 24 symbols (bytes) is completely contained within in one tape segment and each tape segment is one-to-one mapped on a single RAM segment, the C1 decoding can be effected directly on the most recently received tape segment. As shown in row 62, this leads to a cyclical sequence that is delayed by one segment interval with respect to row 60. Furthermore, inasmuch as each C2 code word of 32 symbols is completely contained within one tape frame of four tape segments and each tape frame by means of the segment mapping is one-to-one mapped on four consecutive RAM segments, the C2 decoding can be effected directly on the four segments after the last thereof has been received, provided that the C1 decoder has finished its operation (regardless of whether the correction has been successfull or not). In row 60, small arrows indicate the frame boundaries. As shown on row 64, the C2 decoding is effected during a single segment interval following the complete reception of the frame in question. As shown in Figure 2, C2 decoder 46 is also synchronized by counter/gate 35 via line 48, and moreover, receives "ready" signal from C1 decoder 42 on line 50. When the C2 decoder has finished its operation, line 52 may carry a "free" signal to output counter/gate 38. Alternatively, the latter is unconditionally synchronized via a signal on line 48. Row 66 shows that the operation of C2 decoder 46 is followed by the read access on four consecutive RAM segments that had been treated during the most recent operation of C2 decoder 46. Thus, the four tape segments received through interval 68 are outputted through interval 70. In consequence the whole arrangement of Figure 2 functions as an error correction FIFO with an incurred delay of five tape segment intervals. It is clear that six RAM segments are necessary and sufficient for the storage. If the C2 decoding were to take more time, for example two or three tape segment intervals, the storage requirements would amount to seven or eight RAM segments, respectively. In Figure 2 RAM 36 has a four-port facility. Inasmuch as decoders 42, 46 function alternatively, their respective operations may be mapped on a single hardware facility that is suitably programmed. Moreover, inasmuch as writing by counter/gate element 34, reading by counter/gate element 38 and decoding by decoders 42, 46 never take place on the same RAM segment, on a segment level RAM 36 may be limited to a one-port facility. The set-up described above may comprise a reset functionality not shown which is activated, for example, upon recognition of the correct accessing of the first frame. This may be signalled by the first frame start encountered after block headers have begun to show up correctly. Furthermore, as described infra, the C1 code words are confined to one respective block only. In consequence this could be used to a slight further acceleration in that C1 decoding would start directly after the associated block. Estimation of the operation has revealed that additional cost of a more complicated control arrangement would not outweigh additional benefits. The arrangement of Figure 2 has been described as relating to decoding, of data read from tape to be presented on user output 54. A rather similar arrangement could be used with respect to encoding, inasmuch as the C1 encoding would be segment-wise effected by block 42, after which the frame-wise C2 encoding would be effected by encoder 46. The changes to be implemented would be: line/element 32 should interface to a user, line 54 to the tape. Alternatively, line/element 32 is rendered bidirectional, as well as line 54, but the inputting to the RAM gets a multiplexer that is either fed by line 32 or by line 54. Conversely, the output of the RAM gets a demultiplexer to either line 54 or line 32. As another modification, the redundancy generating is somewhat easier than decoding, so elements 42, 46 could be simplified. For example, no feed-back operation is necessary, wherein an unexpected outcome, such as an uncorrectable error in a C2 word, would necessitate other measures to be taken. The combined symbol correcting codes yield a product code system. This means that for encoding the time sequence of encoding the two codes is inconsequential: after the user data of a whole segment has arrived in RAM, either the C1 code words could have their redundancy calculated first, or, alternatively, first the C2 code words. Conceptually, the user data of a product code can be visualized as a matrix. The redundancy consists of three parts: a. redundant symbols along the rows b. redundant symbols along the columns c. doubly redundant symbols along the redundant columns, which is identical to doubly the redundant symbols along the redundant rows. Further considerations as to the reading also apply to the writing. For simplicity, various electromechanical considerations have not been presented, such as the holding/driving of the tape, feedback looping with velocity, head construction. Details of RAM addressing will be described infra. DESCRIPTION OF THE ERROR PROTECTION FORMAT Figure 4 shows the data mapping on the tape, in particular one frame with its four tape segments A. . D, each tape segment having respective equal-sized fractions thereof disposed on each of eight tracks 0..7. Within each tape segment, two respective track segments have been shown hatched in such way that on each track one track segment has been shown hatched. Now, Figure 5 shows the data mapping of the same tape frame in four RAM segments A0, B0, C0, D0 wherein the total content of one tape segment has been mapped exclusively on the like-indicated RAM segment, such as A-to-A0. The two remaining RAM segments according to Figures 2, 3, may left out of consideration with respect to the tape frame in question, because they do not contribute to the product code of the frame now under consideration. It should be noted that whereas the vertical scale in Figure 4 (track numbers) corresponds to the horizontal scale in Figure 5 (memory columns within each respective RAM segment as shown at the lower edge), the horizontal scale in each tape segment of Figure 4 has been expanded vertically in Figure 5 for better clarity, as represented by the larger area of Figure 5 as compared to that of Figure 4. Now, the representation of Figure 5 has been chosen to illustrate the logical structure of the storage arrangement. In practice, physical constraints, in particular, available address ranges, may lead to a physical setup that is different, but which may be attained by an elementary address transposition. Now, first, Figure 5 shows the mapping of each of the hatched track segments of Figure 4 on a column of the corresponding RAM segment, while retaining the orientation of the hatching. The RAM as shown has 32 columns 0..31 and 384 (=8x48) rows (0..383), each location so numbered accommodating one symbol. As shown, the mapping is one to one, the column number with in the RAM segment being equal to (t*5)mod 8 + 8. The column number in the complete RAM is then found by adding 8 times the segment number, which for RAM segments A0, B0, C0, D0 is 0, 1, 2, 3, respectively. Always, t is the track number. For example, for t=5 in tape segment B, the column number in RAM sector B0 is (5x5)mod8=1, as shown by an arrow. The mapping in the other direction is the same inasmuch as track 1 is mapped on column 5, within RAM segment B0. Second, the disposition of the C1 code words in the RAM is considered. Now, each block, of 408 unmodulated bits, has two (2) C1 code words of 24 symbols each (and three other symbols, not relevant here). The two code words have a 2-interleave in that odd-numbered symbols belong to one code word and even-numbered symbols belong to the other. This also applies to the eight redundant symbols within each block, which are the last symbols of the block (right hand most in Figure 1) on the tape. In consequence, in RAM they fill the lowest eight rows of each set of 48 rows. Third, the disposition of a C2 code word in RAM is considered. Figure 5 shows one particular code word that starts with the symbol on row 0, column 0. Thereafter, the row jump is 48 and the column jump is one. In consequence, each next symbol relates to a different track. Further, each next symbol jumps by one block in the direction of the tape track. The cross track jump is plus (+) five tracks modulo 8 (without carry or borrow). For the one code word in question, all symbols have been highlighted in Figure 5 as dark squares. Transposition to other code words is effected by shifting all symbols over a uniform number of rows (with rotation between the upper and lower edges) and/or over a second uniform number of columns (with rotation between the left and right edges). In this respect, Figure 6 shows the disposition of the first 18 symbols of the C2 code word highlighted in Figure 5, each cross now representing one symbol of the block of 48 symbols in question. Each next symbol now is in a next tape block column, and shifted over five tape tracks (mod 8) without carry or borrow. For simplicity, the position of the respective symbols within their associated block has not been shown. As clearly visible, on a block basis the physical distance between neigbhouring code symbols is substantially uniform. In a typical embodiment, envisaged tape speed is 4.76 cms/sec at a bit rate of 96 kilobits per second. This results in a bit length of 0.495 micron. Track pitch was intended as 195 microns, which means that in such longitudinal recording the bit area is substantially shorter than wide. Now, each tape block has 510 channel bits which gives a block length of 253 microns, which means that the area covered by a block is 253x195 microns which is considered approximately square. Thus the uniform distance of Figure 6 would effectively translate to a substantially uniform distance between respective neighbouring code symbols of a C2 code word. In this respect, Figure 6A shows the center-to-center distances between neighbouring symbols of a C2 code word in the three possible relative dispositions. The symbols are shown as vertical bars within their blocks of which only the corners have been indicated by dots. The relative distances of 640, 780 microns relate as 1:1.22. Other relationships, such as up to 1:1.3 or even up to 1:1.4 could be considered as yielding a substantially uniform distance between nearest neighbours. The Figure takes into account that the code symbols within their respective blocks have identical positions. The uniform distance implies a good robustness of the code against scratches and other burst-type errors. In effect the C2 code, having a distance of 7, at six redundant symbols (n,k=32,26) may correct up to six erasure symbols per word. This applies in case the C1 code would have provided pointers to all mutilated symbols of the word in question. In that case a circle encompassing such six symbols in Figure 6 at 100% erasure therein would not cause breakdown of the error correction capability. In Figure 6 this would correspond to the width of some six blocks on a row, which is 1,5 millimeter, which is considered sufficient for almost every purpose. Even in case the lay-out were to be changed to disk-type storage, the same advantageous properties were realizable, provided that the ratio of the diameter of the outer track to that of the inner track were substantially equal to one. In practice, a ratio of 1-1 or even somewhat more would be readily acceptable. A further measure to increase robustness of the code format, is that track number 0 has been filled completely with redundant symbols of the C2 code; in the highlighted code word of Figure 5, this implies all code symbols (4) on the top row of the RAM memory, having symbol numbers 0, 8, 16, 24. The same applies to all other C2 code words inasmuch as the first symbol thereof is always assigned to the leftmost segment column. Furthermore, the other parity symbols have the following rank: for even-numbered C2 code words (0, 2 .. 382) they are positioned at symbols 7,23. For odd-numbered C2 code words (1, 3 .. 383) the further redundant words are positioned at symbols 15,31. This means that all those other redundant symbols are mapped on track 3, which is now 50% covered with parity symbols. The advantage of filling track 0 completely with redundant symbols can be seen as follows. The set of eight tracks discussed earlier, at about 1.2 millimeters wide, covers one half width of a 1/8" tape. For reverse use, a second set of tracks is provided in the same format the other half width of the tape. Now, both tracks 0 run at the outer edges of the recording track proper and thus, generally are somewhat more exposed to mutilating interference, tape wear, etcetera. Now in case the outer track be the only one mutilated, the remaining data integrity would be upheld, as signalled by correct performance of the C2 code, whereas the C1 code would signal irrepairibility for the outer track. Figure 7 illustrates the use of the present invention in its various embodiments and representations. Block 100 is a source for analog audio signals. This may be, for example an audio record player, a loud-speaker, or a naturally occurring audio source, such as an orchestra. Block 102 represents an audio input to the system, such as a microphone or wire connection, plus its associated audio amplification, filtering etcetera. Block 104 represents the analog to digital conversion of audio samples taken from element 102. Block 106 represents the encoding as referred to earlier, complete with digital processing provisions, encoding RAM. Block 108 represents a formatting element for the encoded data, thereby generating the tape segments. These can be outputted in various different ways, such as in parallel by 8 mode. Alternatively, such parallel 8-bit bytes may be serialized to single bit width for broadcast, cable or optical wave guide transmission. Block 110 represents the broadcast amplifier, broadcast medium and broadcast receiver combined. Alternatively, such elements may be adapted for cable or wave-guide use. Still more alternatively, magnetic head for writing and reading, respectively inclusive of the magnetomotoric storage on digital audio tape. The audio tape, or, alternatively, audio disk may be housed in a cassette of suitable box-like or envelope-like dimensions, shaped according to protective needs, storage requirements, accessibility and commercial promotivity. If required, read head(s) and write head(s) may be integrated or even combined into a single head or head set. Block 112 represents the decoder device together with decoding RAM. Block 114 represents an output mechanism, comprising D/A conversion, de-interleaving, amplification and loudspeaking as far as required. Block 116 represents a driving mechanism at the production side of the encoded data, for example as a tape drive. Block 118 represents a likewise organized driving mechanism at the reception side for the encoded data. In certain commercial organizations, such as a reversible recorder the driving mechanisms could be integrated to a single driving mechanism. For brevity, various constructional and organizational details have been foregone. It should be noted that the production side operates as if the reception side were present indeed, and as such emulates presence of the receiving side: it operates as if the receiving side were present. Likewise, the receiving side emulates the transmission side: it operates as if the transmission side were present.

Claims: A storage device for storing digital data on a storage medium with a first plurality of substantially uniform and contiguous storage tracks, under execution of an error protection encoding operation by means of a block code consisting of Cl-code words, in a first direction and of C2-code words in a second direction, said device having first encoding means for said first code to generate error protected C1 code words each assigned to a particular single track, second encoding means for said second code to generate error protected C2 code words each assigned to all of said first plurality of tracks, and means for separating the symbols of a code word, characterized in that all user symbols and redundant symbols of the C1 code words and C2 code words have a uniform multibit size, in that said block code is a product code, in that each C2 code word has a number of symbols that is an exact multiplicity of said first plurality of tracks, and which symbols are assigned to said first plurality of tracks according to a multiply recurrent and uniform cycle along their particular C2 code words, and in that said device has physical disposition means for disposing each C2 code word so that among symbols of the latter C2 code word spacings between physically neighbouring symbols are substantially uniform in size and have non-zero components both along said tracks and across said tracks. A device as claimed in Claim 1 wherein among said non-zero components the cross-track component derives from a uniform cross track jump between successive symbols of said C2 code word which is an integer number of tracks modulo said first plurality, said integer number also being relatively prime to said first plurality. A device as claimed in Claim 2, wherein the along-track component derives from a uniform-along-track jump between successive symbols of said C2 code word. A device as claimed in Claim 1, 2 or 3, and having write means for magnetically writing in parallel onto said tracks that are tape tracks. A device as claimed in Claim 4 wherein said write means interface to said plurality of tracks as mutually contiguous tracks. A device as claimed in Claim 5, wherein said first plurality of tracks is disposed on half of said tape and within said first plurality of tracks an outer edge track on said tape is fully filled with parity symbols that each pertain to an associated C2 code word. A device as claimed in any of Claims 1 to 6, wherein each track has a sequence of blocks, each block containing a uniform integer number of C1 code words. A device as claimed in Claim 7, wherein said integer number is 2 and within any block its C1 code words are 2-interleaved. A device as claimed in any of Claims 1 to 8, wherein abstracted from tape skew the physical disposition of C1 words among said first plurality of tracks is mutually synchronous. A device as claimed in Claim 7 or 8, wherein abstracted from tape skew the physical disposition of said blocks among said first plurality of tracks is mutually synchronous, and on each track a second plurality of blocks is contained in a tape segment of uniform size, a third plurality of tape segments is contained in a tape frame of second uniform size, said tape segments and tape frames being mutually synchronous among said first plurality of tracks, and any said C2 code word being fully contained in a single tape frame. A device as claimed in Claim 10, wherein mutually synchronous blocks among said tracks constitute a slice that has a single block per track, and wherein each C2 code word is uniformly distributed over all slices of a frame. A device as claimed in Claim 10 or 11 and having a RAM encoding memory accommodating storage of a fourth plurality of tape segments, to wit an input RAM segment for therein receiving user data of an intended tape segment, a further RAM segment series for therein storing user data of a corresponding set of intended tape segments and for therein encoding associated C1 and C2 code words and an output RAM segment for therefrom rom outputting a fully encoded tape segment. A device as claime din any of Claims 1 to 12, wherein said first plurality is equal to eight. A device as claimed in any of Claims 1 to 13, wherein said C1 code is a (24, 20, 5) code and said C2 code is a (32, 26, 7) code. A device as claimed in any of Claims 1 to 14, wherein each frame comprises 384 C2 code words. A device as claimed in any of Claims 1 to 15, wherein the non-zero component across said tracks derives from a jump +5 modulo said first plurality. A device as claimed in any of Claims 1 to 16, wherein said storage medium is a reversible storage medium. A device as claimed in any of Claims 1 to 17 further comprising reception means for an analog audio signal, analog to digital conversion means fed by said reception means for by A/D conversion providing at least a substantial part of said digital data for subsequent encoding by said product code. A decoding device for use with said storage device having a first plurality of substantially uniform tracks, as claimed in any of Claims 1 to 18, said device comprising access means for accessing said storage medium, internal storage means for accommodating all data contained within a first set of C1 code words and within a second set of C2 code words, said first and second set together constituting a smallest product code block, first decoding means for decoding said C1 code words in said first set, second decoding means for thereafter decoding said C2 code words in said second set, and said second decoding means having accessing means for in decoding any particular single C2 code word accessing said storage means as corresponding to physically on-medium positions that have substantially uniform neighbour-to-neighbour distances, any said distance having non-zero components both along said tracks and across said tracks, whilst the symbols of said C2 code word are assigned to all of said plurality of tracks according to a recurrent cycle along successive symbols of any particular C2 code word, in that any C2 code word has a number of symbols that is an exact multiplicity of said plurality of tracks. A decoding device for use with a device as claimed in any of Claims 1 to 19 or as part of a device as claimed in Claim 19, comprising a multisegment RAM memory, filling means for sequentially filling a predetermined second plurality of RAM segments with data from said real or emulated storage medium, wherein any C1 code word is exclusively assigned to one single RAM segment, and any C2 code word is exclusively assigned to a single one multisegment RAM frame, in that any C2 code word runs with a uniform row jump and uniform column jump through said RAM frame modulo the dimensions of said RAM frame. A decoding device as claimed in Claim 19 or 20, and comprising its multisegment RAM memory, wherein each RAM segment accommodates a uniform third plurality of C1 code words that is uniformly distributed among said first plurality of tracks as relating exclusively to a single medium segment, so that any storage medium segment fits 1:1 on a RAM segment, and further provided with first decode means for upon filling of each memory segment directly activating decoding of any C1 code word available in said memory segment. A decoding device as claimed in Claim 21, wherein upon storage, said C2 code words cross intra-memory segment boundaries up to a third plurality of memory segments but no other intra-memory segment boundaries, and said apparatus having second decoding means for after storing of said C2 code words in said third plurality of memory segments and decoding by said first decode means activating decoding said C2 code words. A decoding device as claimed in Claim 22, wherein said memory accommodates in addition to said third plurality of memory segments, one further input segment for inputting data of one storage medium segment and one second further segment for therefrom outputting data of one already decoded storage medium segment. An information reproducing apparatus containing a decoding device according to any of Claims 18 to 23, holding/driving means for said storage medium in the form of a magnetic tape, head means for time-sequentially accessing a stretch of locations on said tape, and audio reproduction means fed by said decoding device. A magnetic tape for use with a decoding device according to any of Claims 19 to 23 or with an apparatus as claimed in Claim 24, and comprising said first plurality of substantially uniform storage tracks, said tracks comprising a storage frame which is equally distributed over said parallel tracks that are single-sidedly disposed on one half of said a magnetic tape, said frame being protected by a symbol-correcting block product code as represented by C1 words and C2 words, each C1 word being disposed within exactly one of said tracks, each C2 word being disposed over all of said tracks in that said C2 word has a number of symbols that is an exact multiplicity of said plurality, of tracks, and which symbols are assigned to said plurality of tracks according to a multiply recurrent and uniform cycle along their particular C2 code word and in that physical spacing among neigbhouring symbols of the latter C2 word is substantially uniform and has non-zero components both along said tracks and across said tracks. A storage medium as claimed in Claim 25 wherein said frame for each of it tracks comprises a uniform number of blocks which under absence of tape skew are organized in synchronized slices, symbols of any particular C2 word observing a slice jump of one slice and a cross-track-jump of a uniform third number of tracks modulo the number of said plurality. A storage medium as claimed in Claim 26, wherein said blocks occupy substantially square areas on said tape. A storage medium as claimed in Claim 26, wherein each C2 word consists of a number of symbols that is equal to the number of blocks in any single-track part of a tape frame. A storage medium as claimed in Claim 28, wherein each block consists of a uniform number of C1 code words. A storage medium as claimed in Claim 29, wherein said C1 code words are 2-interleaved. A storage medium as claimed in any of Claims 25 to 30 and contained in a cassette that interfaces to an apparatus as claimed in Claim 24.

Inventors: LOKHOFF GERARDUS CORNELIS PETR, LOKHOFF, GERARDUS CORNELIS PETRUS
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1990
Main classification: G11B20
IPC codes: G11B20, G11B5