Photoelectric converting device

Abstract: A photoelectric converting device comprises a first semiconductor area of a first conductive type, a second semiconductor area of a second conductive type, and a third semiconductor area of the first conductive type. A charge is photoelectrically generated by the light incident on the second semiconductor area derived from the first semiconductor area. A fourth semiconductor area of the second conductive type is formed in contact with the second semiconductor area and having a higher impurity concentration than in the second semiconductor area. A fifth semiconductor area of the first conductive type is formed in contact with the fourth semiconductor area and having an impurity concentration approximately same as in the fourth semiconductor area. In the fourth and fifth semiconductor areas, the electron ionization rate α n , electron velocity v n and depletion layer width W satisfy a relation α n ·v n ·W > 1 or the hole ionization rate α p , hole velocity v p and depletion layer width W satisfy a relation α p ·v p ·W > 1.

Description: In the conventional art of the photoelectric converting device, there is for example known a device of bipolar transistor type. Fig. 9 shows, in a schematic cross-sectional view, an example of the conventional bipolar photoelectric converting device, in which there are provided a silicon substrate 1 of n⁻ or n⁺-type by doping of an impurity such as phosphorus (P), antimony (Sb) or arsenic (As); an n⁻-area 2 formed for example by an epitaxial process; a p-area 3 for accumulating photogenerated carriers; an n⁺-area 5 constituting an emitter for obtaining an output signal; an n⁺-area 7 constituting a channel stop or connected with the collector; an insulating film 100 for isolating the element; and an electrode 200 composed for example of polysilicon or metal. In such photoelectric converting device, various developmental efforts have been made to achieve a finer geometry and a higher level of integration, in order to respond to the requirement for compactization of the solid-state image sensor or the like employing such photoelectric converting device. However, such conventional photoelectric converting device, if made with a finer geometry, results in a reduced amount of photogenerated charge due to the diminished aperture ratio (i.e. ratio of effective light illumination area to area of device), leading to a lowered photosensitivity. In the conventional bipolar photoelectric converting device, the photosensitivity is represented, in approximate manner, by the following equation: Se = i p ·A s ·t s C bc wherein i p is the photoinduced current density per unit area; A s is the area of aperture; t s is the accumulation time, and C bc is the base-collector capacity. As will be apparent from the equation (1), the sensitivity Se decreases with the reduction of the aperture area A s . Hitherto, amplification has been afforded by avalanche breakdown under application of a high bias voltage. Such phenonemon however also introduces substantial noise. An example of an n-p-n bipolar avalanche transistor is given in A. Chin et al., Proc. IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, Ithaca, NY, 10th-12th August 1987, pages 255-264. In the transistor there described, the transistor has a double emitter (n⁺n), a heavily doped base (p⁺), and a heavily doped collector (n⁺). Notably a low doped superlattice (n⁻) is interposed between the base and collector regions of this transistor. It is also known to have both double emitter and double base structure. In C.Y. Chen et al., Appl.Phys. Lett. 40(6), 510 (1982) there is described a GaAs/Aℓ x Ga 1-x As depletion stop phototransistor having a double emitter (n⁺n) double base (p⁻p⁺) structure. Notably, the collector is lightly doped (n⁻). The lightly doped base layer ensures a high injection efficiency, whilst the heavily doped base layer reduces base resistance and early effect. The present invention is intended as a remedy to the problems aforesaid. Photoelectric conversion devices according to the present invention are defined in claims 1 and 2 appended. The preamble of claim 1 is directed to known features of a photoelectric conversion device such as acknowledged hereinbefore with reference to figure 9. In the photoelectric conversion devices of the present invention, the amount of generated charge is increased by amplifying the photoexcited current by electron hole collision ionization. Electron hole collision is promoted since an abrupt potential difference occurs at the junction of highly doped regions of opposite conductivity type. Under operative conditions the applied bias is chosen so that avalanche breakdown does not occur. For operation under these conditions the device parameters are determined to be such that the depletion width W at the aforesaid junction satisfies one of the following conditions: α n .V n .W> 1 (cm/sec), or α p .V p .W> 1 (cm/sec), respectively, where α n , α p are electron and hole ionization coefficients; v n , v p are electron and hole velocities, and said base region is of p-type or n-type respectively, and said applied bias voltage is less than the avalanche breakdown voltage of said collector region. Amplification is thus afforded without the disadvantage of increase in noise, which otherwise would occur in the event of avalanche breakdown. In the accompanying drawings: Fig. 1A is a schematic cross-sectional view of an example of the photoelectric converting device embodying the present invention; Fig. 1B is a potential chart along a line A-A′ in Fig. 1A; Fig. 1C is a potential chart along a line B-B′ in Fig. 1A; Fig. 2A is a partial magnified cross-sectional view of the device shown in Fig. 1A; Fig. 2B is a potential chart along a line C′-C in Fig. 2A; Fig. 3 is a chart showing the relation between N A and width of depletion layer and capacity in case of N D » N A ; Fig. 4 is a chart showing the relation between maximum depletion layer width at avalanche breakdown or maximum field and N A in case of N D » N A ; Fig. 5 is a schematic cross-sectional view of a photoelectric converting device constituting a second embodiment of the present invention; Fig. 6 is a schematic cross-sectional view of a photoelectric converting device constituting a third embodiment of the present invention; Fig. 7 is a chart showing the relation between electric field (V/cm) and carrier velocity v n , v p (cm/sec); Fig. 8 is a chart showing the relation between electric field (V/cm) and ionization coefficient α n , α p (cm⁻¹); and Fig. 9 is a schematic cross-sectional view of an example of the conventional bipolar photoelectric converting device. To facilitate further understanding of this invention, preferred embodiments thereof will be described below and reference will be made to the drawings. The following description is given by way of example only. The photoelectric converting device of the present invention can increase the amount of generating charge, by amplifying the photoexcited current by electron-hole collision ionization between the base and collector of the sensor cell, thereby improving the photosensitivity. Said collision ionization will be explained in the following. The electron-hole pair formation rate G by collision ionization in a strong electric field in a semiconductor is given by: G = α n .n.v n + α p .p.v p (cm⁻³.sec⁻¹) wherein α n is the electron ionization coefficient (cm⁻¹), αp is the positive hole ionization coefficient (cm⁻¹), n is the electron density (cm⁻³), p is the positive hole density (cm⁻³), v n is the electron velocity (cm/sec), and v p is the positive hole velocity (cm/sec.) Fig. 7 shows the relation between the electric field (V/cm) and the carrier velocity v n , v p (cm/sec). Also Fig. 8 shows the relation between the electric field (V/cm) and the ionization rate α n , α p (cm⁻¹). From Figs. 7 and 8, the values of α n , α p , v n and v p can be determined for a given electric field, so that G can be easily determined. For example for an electric field E = 3 × 10⁵V/cm (in case of a silicon pn junction), there is obtained α n v n = 10¹¹ sec⁻¹ so that the amplification rate by collision ionization is 10⁶ times per second with a depletion layer of 0.1 µm at the pn junction per unit area. [1st embodiment] In the following there will be explained an embodiment of the present invention, with reference to the attached drawings. Fig. 1A is a schematic cross-sectional view of the photoelectric converting device of the present embodiment, wherein same components as those in Fig. 9 are represented by same numbers. There are also shown a p⁺-area 4 in the base 3, and an n⁺-area 6 for forming a steep potential slope. Fig. 1B is a potential chart along a cross section A-A′ in Fig. 1A, showing the potential in the ordinate as a function of the distance in the abscissa. Fig. 1C is a potential chart along a cross section B-B′ in Fig. 1A, showing the potential in the ordinate as a function of the distance in the abscissa, as in Fig. 1B. The feature of the present invention lies in an abrupt potential difference in a p⁺n⁺ junction shown in Fig. 1B, giving rise to the amplification of the generated carriers. The potential shown in Fig. 1C is not different from that in the conventional bipolar transistor. In the following a more detailed explanation will be given of Fig. 1B. In the sensor cell of the present embodiment, an abrupt potential difference between a p⁺-area and an n⁺-area by the presence of an n⁺/p/p⁺/n⁺ structure mentioned above, and the depletion layer is extended to the p-area by forming the p⁺-area thinner. Among the electron-hole pairs generated by light absorption in the semiconductor, a major portion of the electrons in the p/p⁺-areas and in the depletion layer at the p⁺/n⁺ junction moves to the n⁺-area 5 by diffusion or drift, thereby contributing to the amplification of photoinduced carriers. On the other hand, among the positive holes, those generated in the depletion layer at the p⁺/n⁺ junction contribute to the amplification of the carriers. Two-dimensionally, the carriers which do not flow into the depletion layer of the n⁺-area 6 do not contribute to the amplification. Fig. 2A is a partial magnified cross-sectional view of Fig. 1A, wherein broken lines indicate extent of the depletion layers. At the pn⁻ junction between the p-area 3 and the n⁻-area 2, the depletion layer stretches itself in said n⁻-area 2, since the impurity concentration of the p-area 3 is made higher to satisfy a condition N p » N n . On the other hand, at the junction of the n⁺-area 6, p⁺-area 4 and p-area 3, the impurity concentration is about the same in said n⁺-area 6 and p⁺-area 4 and is lower in the p-area 3, but the depletion layer extends to the area 3 because the p⁺-area 4 is formed thin. Consequently the potential distribution along a cross section C′-C in Fig. 2A, approximately assumes a form shown in Fig. 2B, whereby the electrons generated in the p-area 3 can be collected in the n⁺-area 6 as indicated by arrows in Fig. 2A, and an effective carrier amplification can be achieved. Besides the base-collector capacitance is reduced drastically by the mutual connection, as shown in Fig. 2A, of the depletion layer extending from the area 6 and that extending from the area 2. This corresponds to a drastic decrease of C bc in the equation (1), so that the sensitivity is further improved. The depletion layer width W of a semiconductor pn junction is represented by the following equation: wherein ε s , is the dielectric constant of the semiconductor, q is the charge, N A is the concentration of p-impurity, N D is the concentration of n-impurity, V bi is the built-in voltage, and V R is the reverse applied voltage. In the equation (3), V bi + V R indicates the total potential V. Fig. 3 is a chart showing the relation between N A and depletion layer width or capacitance in case of N D » N A , with the total potential V taken as a parameter. Fig. 3 also shows the limit of avalanche. Fig. 4 is a chart showing the relation between N A and maximum depletion layer width at avalanche breakdown or maximum field in a similar case of N D » N A . Such limit condition is undesirable because of increase of noise , though the photosignal is also amplified. The device of the present invention, effecting carrier amplification under a strong electric field, is used in a voltage range lower than the voltage of avalanche breakdown. For example, in case of silicon, there is obtained E m = 6 × 10⁵ V/cm for N A = 10¹⁷ cm⁻³ from Fig. 4, and the device is used below the above-mentioned potential. The width of the depletion layer is about 0.4 µm. In the present embodiment, as the p⁺-area 4 and the n⁺-area 6 have approximately same impurity concentrations, the maximum width of the depletion layer is √2 times of that shown in Fig. 4. In the following there will be explained the amplification by collision ionization in the present embodiment. The ionization rate in a strong electric field in a semiconductor is represented by the following equation: α = A·exp[-b/ε] If the semiconductor is silicon, there are given A n = 3.8 × 10¹⁶ cm⁻¹ and b n = 1.75 × 10⁶ V/cm for electrons, and A p = 2.25 × 10⁷ cm⁻¹ and b p = 3.26 × 10⁶ V/cm (300°K) for positive holes. ε indicates the electric field (V/cm). Though the electric field in a pn junction has certain distribution, the average electric field E is related with the maximum electric field E max by: E max = 2E Consequently the carrier amplification product at the pn junction can be determined by selecting E in such a manner that the E max at the pn junction does not exceed E max shown in Fig. 4, and making an approximation that the carriers are accelerated with an average electric field E with a depletion layer width W. More specifically, W is determined by selecting N A = N D in the equation (3) (approximated as |p⁺| = |n⁺| in the present embodiment). Then, under a condition E = (V bi + V R )/W, α and v n are respectively determined from the equation (4) and Fig. 7. Thus the carrier amplification product (α n ·v n ·W) for electrons per unit area of pn junction can be determined. Table 1 shows examples of calculation of the current amplification product. As shown in this table, no amplification is obtained for a low impurity concentration and a low voltage (in case of α n ·v n ·W ≦ 1cm/sec). Consequently a higher impurity concentration is desirable, though it is limited by the breakdown voltage of the pn junction. On the other hand, noise increases in case of a high impurity concentration and a high voltage as explained before. Consequently limitation appears in a part of the impurity concentration of base and collector, and in the collector potential. The photocurrent density obtained by amplification can be represented as follows: i p = q·G·W = q (n·α n ·v n + p·α p ·v p )W (A/cm²) The photoelectric converting device of the present embodiment was prepared in the following manner: (1) On the n⁺-substrate 1, the n⁻-area 2 was formed by epitaxial growth. (2) The isolation area 100 and the n⁺-area 7 were formed for example by selective oxidation. (3) The p-area 3 constituting the photosensitive area (base) was formed by ion implantation, thermal diffusion etc. (4) After opening of the emitter contact, the polysilicon layer 200 was deposited, doped with an impurity and patterned. The n⁺-area 5 was formed by simultaneous thermal diffusion. (5) After photoresist patterning, boron and arsenic were implanted in the same areas and were heat treated to form the n⁺-area 6 and the p⁺-area 4. The p⁺-area 4 can be made deeper than the n⁺-area 6 either by the difference in diffusion speed of the impurities, or by the difference in penetration depth of the impurities in ion implantation. The photoelectric converting device thus prepared exhibited excellent photosensitivity in the functional test. [2nd embodiment] Fig. 5 is a schematic cross-sectional view of the photoelectric converting device constituting a second embodiment of the present invention. The device of the present embodiment is different from the conventional photoelectric converting device in the presence of a p⁺-area 4′ under the base area 3. Such n⁺/p⁻/p⁺/n⁺ structure also provided the effect of the present invention. [3rd embodiment] Fig. 6 is a schematic cross-sectional view of the photoelectric converting device constituting a third embodiment of the present invention. The device of the present embodiment is provided, in addition to the device of the foregoing 2nd embodiment, with a p⁺-area 10 under the emitter 5. In the photoelectric converting device of the present embodiment, the depletion layer of the p⁻-area 3 can be stopped by the p⁺-area 10. In this case the p⁻-area 3 can be composed of an i-layer with an extremely low impurity concentration. Thus the device of the present embodiment has an n⁺/p⁺/p⁻/p⁺/n⁺ structure or an n⁺/p⁺/i/p⁺/n⁺ structure. An excellent photosensitivity could also be obtained in such photoelectric converting device. Though an npn bipolar transistor is employed in the present embodiment, a photoelectric converting device of similar high sensitivity can also be obtained by employing a pnp bipolar transistor in the sensor cell. A high photosensitivity can be obtained with the pnp bipolar transistor, if the depletion layer between the base and the collector satisfies a condition α p ·v p ·W > 1 cm/sec. As explained in detail in the foregoing, the present invention enables amplification of the carriers generated by incident light, thereby significantly improving the photosensitivity of the photoelectric converting device. The present invention is particularly effective when the photoelectric converting device is miniaturized, photosensitivity equal to or larger than that in the conventional device can be obtained even if the aperture ratio is reduced.

Claims: A photoelectric conversion device comprising: an emitter region (5) of a first conductivity type; a base region (3,4) of a second conductivity type which is of opposite type to said first conductivity type, said base region (3,4) having a first portion (3) adjacent to said emitter region (5); and a collector region (1,2,7) of said first conductivity type, which collector region (1,2,7) has first and second portions (2, 1 & 7) of low and high dopant impurity concentration respectively, with said first portion (2) of low dopant impurity concentration being in immediate contact with said first portion (3) of said base region (3,4); which photoelectric conversion device is characterised in that: said base region (3,4) has a second portion (4) which is laterally spaced apart from said emitter region (5) and is of higher dopant impurity concentration than said first portion (3) of said base region (3,4); and said second portion (4) of said base region (3,4) forms a junction (4,6) with a highly doped region (6) of opposite conductivity type which is in immediate contact with said second portion (1,7) of said collector region, said second portion (4) of said base region (3,4) being thin enough that a depletion layer thereof shall extend into said first portion (3) of said base region (3,4). A photoelectric conversion device comprising: an emitter region (5) of a first conductivity type; a base region (3) of a second conductivity type which is of opposite type to said first conductivity type; and a collector region (1) of said first conductivity type, said photoelectric conversion device comprising further: a thin layer region (4′) of said second conductivity type located between said base region (3) and said collector region (1), which thin layer region (4′) has a higher dopant impurity concentration than said base region (3), forms with said collector region (1) a junction (1,4′) of two highly doped regions of opposite conductivity type, and is thin enough that a depletion layer thereof shall extend into said base region (3). A device as claimed in claim 2 wherein a layer (10) of said second conductivity type and of high dopant impurity concentration is interposed between said emitter region (5) and said base region (3). A device as claimed in claim 3 wherein said base region (3) is of intrinsic semiconductor material. A device as claimed in any preceding claim wherein said two highly doped junction regions (4,6; 4′1; 4′1) have substantially the same concentration of respective opposite conductivity type dopant impurities. Use of a device as claimed in any preceding claim under an applied bias voltage which is such that the depletion width W at said junction satisfies one of the two following conditions: α n .V n .W > 1 (cm/sec), or α p .V p .W > 1 (cm/sec), respectively, where α n , α p are electron and hole ionization coefficients; v n , v p are electron and hole velocities, and said base region is of p-type or n-type respectively, and said applied bias voltage is less than the avalanche breakdown voltage of said collector region.

Inventors: MORISHITA MASAKAZU C O CANON K, MORISHITA, MASAKAZU, C/O CANON KABUSHIKI KAISHA
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1990
Main classification: H01L31
IPC codes: H01L31