METHOD AND APPARATUS FOR MEASURING OF TRANSIENTS OF HIGH-FREQUENCY CIRCUITS BY SAMPLING

Abstract: Method and apparatus for measuring of transients of high-frequency active and passive circuits by sampling in different time-lag position. According to the invention the method is characterized by performing in each time-lag position a double sampling, generating from one of the samples the low-frequency counterpart signal and compensating the steady state value of said low-frequency counterpart signal by a signal generated from the other of the samples. In the apparatus having a sample and hold unit (3), an amplifier (5) and a filter (7) there are a demultiplexer (13) connected after said amplifier (5) and having two outputs (133, 134), one of said outputs (134) being connected to an input (52) of said amplifier (5) through a feedback unit (14), and a control unit (6, 10) for generating double timing signals for the sample and hold unit (3) and a control signal for said demultiplexer (13).

Description: METHOD AND APPARATUS FOR MEASURING OF TRANSIENTS OF HIGH-FREQUENCY CIRCUITS BY SAMPLING TECHNICAL FIELD The invention relates to a method and an apparatus for measuring of transients of high-frequen¬ cy active or passive circuits by sampling. BACKGROUND ART The conversion of analog signals into digital signals (A/D converters) and the conversion of digital signals into analog signals (D/A converters) are wide¬ ly used in electronic circuits. It is very important that the analog-digital and digital-analog conversions could be realized quickly and with minimal errors. In the case of a D/A converter the settling time (t cT ) characterizes the speed of the converter. Usually, the settling time is related to the leading and trailing edges of a pulse, for a value of - 1/2 LBS (LBS=Least Significant Bit) in the case, if output of the device is taking up suddenly zero and maximal value (U pc; ), respectively. The two settling times are shown in Fig.l for the case of a 12-bit D/A converter with 1 V output, where 1 LBS = λ V = 244 / uV. 4096 ' Nowadays D/A converters with a settling time within 10 nsec are available. Functional speed of operational amplifiers are characterized by their bandwidth, skew rate and/or settling time. After the settling time the output signal of the operation amplifier may de- viate from a nominal value by a value which lies with¬ in a given error limit. In the case of high-frequency operation amplifiers the settling time falls into the order of 10 πsec. Generally error limit amounts to - 1%, - 0,1%, -0,01%, supposing a 1 V signal to - 10 mV, - 1 mV, * 100 ,uV. The so-called Time Domain Reflectometry (TDR) is a known high- requency measuring method for testing coaxial cables, connectors, transitions, condensators , resistors, inductivities etc., i.e. active or passive two-terminal and four-terminal πet- works. The essential feature lies in that a signal with a short rise time, a so-called unit step signal is applied onto the two- or four-terminal network to be tested. It becomes possible to determine different parameters (scattering parameters, impedance, resist- ance, capacitance etc.) from the applied and reflect¬ ed signal. In consequence of a very low reflexion the reflected signal may have a low value, too. All these measuring methods need an accurate transient measurement of high-frequency analog signals, which can be performed by using known sampling tech¬ nology. In the sampling technique a high- requency signal to be measured is converted into a low-frequen¬ cy signal having a shape identical with that of the high-frequency signal. The sampling technique shall be described with reference to time diagrams of Fig. 2. Diagram 2a illustrates a high-frequency signal to be measured. Diagram 2b shows a train of pulses synchron¬ ized to phase positions of said signal (in this example to the positive zero-transitions). By selecting every second, third, generally n-th pulse of said train of pulses another train of sychronized pulses may be obtained, as shown in diagram 2c. After having delayed the pulses of diagram 2c in an order of succession by Δt, 2 Δt, ... XΔt , .... k Δt , a train of pulses as illustrated in diagram 2d is obtained wherein the pulses follow each other with an interval πT+Δt. This train of pulses controls the sampling. Diagram 2e shows an envelope curve of the sampled pulses gain¬ ed as a result of the sampling process, the envelope curve being a shape-preserving counterpart of the high- requency signal to be measured. Accordingly, the sampling method results in a time expansion of the signal the extent of which can be controlled by settling the parameter Δt . In Fig.3 the block diagram of the measure¬ ment of the settling time of a D/A converter by a known sampling oscilloscope is shown. The respective signal diagrams are illustrated in Fig. 4. Signal of an output 22 of a drive unit 2 is connected to digi¬ tal inputs 11 of the device 1 to be tested (diagram 4a). A starting signal is forwarded from a synchro¬ nous output 62 of a timing unit 6 to the input 21 of the drive unit 2. In such a manner synchronized state can be obtained easyly, generating of a separate synchronous signal becomes superfluous. The high- -frequency/low-frequency imaging will be carried out in a way as described earlier, by means of a sample and hold unit 3, a sampling generator 4 and a timing unit 6, in the proper order of sequence. The timing unit 6 produces time-lags Δt, 2Δt, 3Λt, ...XΔt, ...kΔt following properly each other, starting simultaneously the sampling generator 4. The train of sampling pulses thus generated is to be seen in diagram 4c. The high-frequency signal to be tested appears on the output 12 and arrives at the input 31 (diagram 4b). Imagined low- requency signal appears on the output 33 (diagram 4d). This signal cannot be used directly for measuring the settling time as amplitude of the transients to be tested falls - owing to earlier mentioned facts - into the order of magni- tude of 100 ,uV for the case of a 12-bit device 1 with Up,-. = I V output. As a consequence, amplification of the imagined low-frequency signal becomes imperative, this will be carried out by an amplifier 5. In order to be able to amplify the 100 ,uV input signal to a I V signal the amplifier 5 shall have an amplifica¬ tion of 80 dB. To avoid saturation of the amplifier 5 in the range to be tested in the course of the amplification the steady state voltage U FC , of the signal to be amplified has to be compensated by a circuit 5A. In such a manner we obtain a signal (diagram 4e) which passes a filter 7 and arrives at a screen 8 of an oscilloscope. Settling time +t eT caπ De determined by visual evaluation. In the course of measuring settling time - p, compensation of eventual offset- errors is needed. Some up-to-date digital oscillo¬ scopes are already provided with an internal micro¬ processor-aided signal evaluating unit 9 displaying settling time in digital form. Noise of the sampling system restricts the accuracy of measuring considerably, the more, it may render the measuring impossible. Noise of a sampling system with an upper frequency limit of 1 GHz falls into the range of the signal to be measured (- 1/2 LBS), as a matter of fact, it can be even higher. An averag- ing process used to be applied for noise reduction. That means that from one point repeatedly (often several thousands times) samples are taken and averag¬ ed. This is the task of the filter 7. Under sampling from one point it is meant that the time-lag XΛt in diagram 2d remains unchanged in the course of sampling from one point. In consideration that the average of noises equals to zero, imagined low- -frequency signals may be relieved of the majority of noises. However, certain low-frequency noises and disturbing signals persist. Upon the effect of averaging duration of high-frequency/low frequency imaging will be considerably prolonged, meanwhile compensation of the steady state value creeps away. As for measuring the settling time of D/A converters, it has been standardized when Up- value is consider¬ ed as stabilized (in comparison to which error limit - 1/2 LBS is given). Generally, this is higher than the fivefold of the settling time. That means that measuring can be carried out in an inspection time- -window only, which is larger than the fivefold of the settling time. Use of a large inspection time- -window reduces accuracy of time measurement. The signal to be measured must appear in the inspection time-window so that the 50% point of the leading or trailing edge of the pulse should fall into the in¬ spection time-window. It is obvious that in this case the amplifier 5 will be overdriven, that may result in error of measurement. DISCLOSURE OF THE INVENTION It is an object of the present invention to improve the described sampling technique so that the accuracy of the measurement be increased. The invention relates on the one hand to a method for measuring of transients of high-frequency circuits, in the course of which from a transient part of the signal to be measured a low-frequency counter- part signal is generated by sampling in different time-lag positions. The method is characterized by performing in each time-lag position a double sampl¬ ing, generating from one of the samples the low- -frequency counterpart signal and conpensating the steady state value of said low-frequency counterpart signal by a signal generated from the other of the samples. On the other hand, the invention relates to an apparatus for measuring of transients of high- -frequency circuit, comprising a sample and hold unit for receiving the high-frequency signal to be measured and to produce consecutive samples from said signal, an amplifier and a filter to produce a low-frequency counterpart signal from the samples, and a control unit to generate timing signals for the sample and hold unit. The apparatus is characterized by a demultiplexer connected after said amplifier and having two outputs, one of said outputs being connected to an input of said amplifier through a feedback unit, and a control unit for generat¬ ing double timing signals for the sample and hold unit and a control signal for said demultiplexer. BRIEF DESCRIPTION OF DRAWINGS Fig. 1 is a signal diagram explaining digital- ization . Fig. 2 shows signal diagrams demonstrating a known sampling method. Fig. 3 is a block schematic of a known measur- ing apparatus. Fig. 4 shows signal diagrams explaining the function of the apparatus according to Fig. 3. Fig. 5 is a block schematic of an embodiment of the apparatus according to the in¬ vention . Fig. 6 shows diagrams exampling the function of the apparatus according to Fig. 5. MOOES FOR CARRYING OUT THE INVENTION Fig. 5 shows the block schematic of an embodi¬ ment of the apparatus according to the invention. A device 1 to be tested, e.g. a digital-analog converter, has digital inputs 11 driven by an output 22 of a drive unit 2 and an analog output 12 connected to an input 31 of a sample and hold unit 3. The sample and hold unit 3 has a control input 32 connected to an out¬ put 42 of a sampling generator 4, an input 41 of which being connected to a first output 61 of a timing unit 6, and an output 33 connected to a positive input 51 of an amplifier 5, a negative input 52 of which being con¬ nected to a common terminal of a two-state switch 15. In state A the common terminal is connected to a po¬ tentiometer, in state B to an output of a feedback unit 14. The output 53 of the amplifier 5 is connect¬ ed to a signal input 131 of a demultiplexer 13, the control input 132 of which being connected to a first output 103 of a control unit 10. One output 133 of the demultiplexer 13 is connected through a filter 7 to a oscilloscope screen 8 and e.g. to an evaluating unit 9, the other output 134 is connected to an input of the feedback unit 14. The timing unit 6 has a second output 63 con¬ nected to the screen 8 and the evaluating unit 9,- and a third output 62 connected to an input 101 of the control unit 10, a second output 104 of which being connected to an input 64 of the timing unit 6, and a third output 102 of which being connected to an input 21 of the drive unit 2. The operation of the apparatus of Fig. 5 will be explained by references to the signal diagrams of Fig. 6. As it appears in Fig. 5 the output 62 of the timing unit 6 is not directly connected to the input 21 of the drive unit 2, but a control unit 10 is in¬ serted inbetweeπ. The control unit 10 fulfils a plu¬ rality of tasks. Synchronous starting signal comes from the output 62 of the timing unit 6 (diagram 6a). The control unit 10 forms the wawe-shaped signal - as to be seen in diagram 6b - from the aforementioned signal, which arrives through the output 102 to the input 21 of the drive unit 2. Said signal reacts upon the timing unit 6 through the output 104 of the cont¬ rol unit 10 and puts the sampling generator 4 into operation through the output 61 so that - without filtration (averaging) - in comparison to the positive leading edge of the synchronous signal appearing on the output 62 sampling should take place twice with identical time-lag of XΔt from the period of the high-frequency signal to be tested (diagram 6c). The first sampling yields the low-frequency counterpart of the high-frequency signal to be measured, this pro- ceeding used to be called imaging sampling. The second sampling gives the steady state value (Upς) of the high- requency signal to be measured, this is a com¬ pensating sampling. Both signals appear consecutively on the output 33 of the sample and hold unit 3 and after having been amplified by the amplifier 5 they are separated in demultiplexer 13, which is controlled by the control unit 10. The generated low- requency signal (see diagram 6e) appears on the output 133 of the demultiplexer 13, while the signal correspond¬ ing to the steady state value of the signal to be tested appears on the output~134 (diagram 6f). Now, if the latter signal is feed back through the feed- back unit 14 and switch 15 (set in position B) to the negative input 52 of the amplifier 5, the steady state value of the signal to be tested will be com¬ pensated automatically, accordingly, on the output 133 of the demultiplexer 13 a signal according to diagram 6g will appear. By means of this amplified low-frequency signal any required processing can be realized in a simple way. The method according to the invention shows several advantageous features. From all what has been said it is obvious that if sampling is carried out with a rate of 100 kHz, the interval between imaging and compensating sampling amounts to T = 10 ,usec. In consideration that the sampling method is used for testing high-frequency circuits (up to a maximal settling time of cca. 1 usec), it becomes obvious, that even at a settling time of 2 ,usec the stipula¬ tion relating to the stabilized character is fulfill¬ ed, in sense of which a signal can be considered as stabilized only, if it surpasses the fivefold of the settling time. The 10 /usec time interval depends only on the frequency of sampling, accordingly, meas¬ uring may be realized in the optimal inspection time window in dependence of the settling time. In such a manner accuracy of measuring can be increased. In case, if sampling is not carried out according to increasing time-lags Δt , 2 Δt, 3Δt, ...XΔt, ...kΔt but in a decreasing direction starting from the maximal time-lag (kΔt, ...XΔt, ...3Δt, 2Δt, At) the amplifier 5 will be satu¬ rated after measuring, only, as it is to be seen in diagram 6g. The most significant advantage of the solution according to the invention lies in that in addition to high-frequency noise suppression by known averaging (filter 7) by means of the feedback compensation the low-frequency noises and disturbing signals of the measuring system can be also compeπ- sated. In this way sensitivity of the measuring system can be increased by an order of magnitude, simultaneously accurate and stable compensation of the stabilized value can be achieved. While with known methods said operation used to be carried out manually by using a potentiometer, in sense of the invention this task is fulfilled automatically via the feedback circuit. Compensation of low-frequency noise and disturbing signals is carried out as follows. The essence lies in to carry out sampling in identical instant from the period being in compliance with the number of averaging. XΔt time-lag will be in¬ creased or decreased after having performed sampling in compliance with the number of average. With the solution according to the invention sampling is carried out at two occasions, on the first occasion low-frequency imaging is realized. In this case samples taken from one point are aver¬ aged and this signal is led to further processing. Filter 7 performs averaging. The other sampling is carried out in a point of the signal to be tested, where the signal is taking up always a steady state value. Deviance of the signal sampled from the said value refers to the presence of noise or disturbance on the signal having been sampled. By the feedback of this signal with proper time constant and pola¬ rity to the input 52 of the amplifier 5 low-fre¬ quency noises and disturbances can be eliminated.

Claims: C L A I S 1. A method for measuring of transients of high-frequency circuits, in the course of which from a transient part of the signal to be measured a low-frequency counterpart signal is generated by sampling in different time-lag positions, c h a r a c t e r i z e d by performing in each time-lag position a double sampling, generating from one of the samples the low-frequency counterpart signal and compensating the steady state value of said low- requency counterpart signal by a signal generated from the other of the samples. 2. An apparatus for measuring of transients of high-frequency circuits, comprising a sample and hold unit for receiving the high-frequency signal to be measured and to produce consecutive samples from said signal, an amplifier and a filter to pro¬ duce a low-frequency counterpart signal from the samples, and a control unit to generate timing signals for the sample and hold unit, c h a r a c ¬ t e r i z e d by a demultiplexer (13) connected after said amplifier (5) and having two outputs (133, 134), one of said outputs (134) being connect¬ ed to an input (52) of said amplifier (5) through a feedback unit (14), and a control unit (6, 10) for generating double timing signals for the sample and hold unit (3) and a control signal for said de¬ multiplexer (13). 3. The apparatus according to claim 2, c h a r a c t e r i z e d by a drive unit (2) for generating input test signals for the high-fre- quency circuit to be tested, said drive unit (2) being connected to said control unit (6, 10). 4. The apparatus according to claim 1 or claim 2, c h a r a c t e r i z e d by a two-state switch (15), in one of the states said input (52) of said amplifier (5) is connected through said feed¬ back unit (14) to said one output (134) of said demultiplexer (13), and in the other state said input (52) of said amplifier (5) is connected to a potentiometer.

Inventors: DAKA MIKLOS, SOMOGYI GYULA, SZALAY TIBOR, DAKA, MIKLOS, SOMOGYI, GYULA, SZALAY, TIBOR
Applicants: MIKI MERESTECHNIKAI FEJLESZTOE, MIKI MERESTECHNIKAI FEJLESZTOE VALLALAT
Application year: 1990
Main classification: G01R29
IPC codes: G01R13