Optical disk reproducing apparatus

Abstract: The present invention is concerned with an optical disk reproducing apparatus for reproducing digital data from an optical disk, such as an audio compact disk and, above all, with such apparatus in which a continuous playback output may be produced even when track jump should occur due to vibrations or the like. With the optical disk reproducing apparatus according to the present invention, digital data detected from an optical disk are sequentially written in a RAM for subsequent reading so that data stored in the RAM continue to be read even on the occurrence of the track jump to provide a continuous playback output. On the other hand, the optical disk is reproduced at an increased speed for a predetermined time period after the light spot irradiating the optical disk resets to its original position from track jump to replenish the RAM with digital data.

Description: This invention relates to an optical disk reproducing apparatus for reproducing digital data from a disk and, more particularly, to such apparatus in which a continuous playback output may be obtained despite the occurrence of track jumps due to vibrations or the like. In general, in a compact disk (CD), when a track jump occurs during reproduction due, for example, to vibrations of the pickup system, reproduction is discontinued or momentarily interrupted and may restart from some different position, which can be disturbing for the listener or necessitate a redundant operation, such as resetting the player to the correct point. The prior art practice for reducing such track jump has been to provide a mechanical damper in the CD player in an attempt to prevent the track jump due to vibrations, as disclosed for example in Japanese patent publication number 62-69897 (1987) However, the provision of such a mechanical damper to prevent track jumps, makes the player more complicated in structure and more expensive, increases its size and weight and renders future retrofitting or remodelling difficult. Moreover, when a strong impact is applied to the CD player, such impact cannot be wholly absorbed so that track jumps may occur despite the provision of the damper. An alternative proposal is to cope with the track jump by corresponding signal processing as disclosed in Japanese patent publication number 63-177321 (1988); however, the playback output in this case becomes discontinuous because the playback signal is not produced during track jump. It is a principal object of the present invention to provide an optical disk reproducing apparatus in which a continuous playback output may be obtained despite the occurrence of track jumps as a result of vibrations or the like. US-4,796,247 discloses an optical disk player involving a buffer memory into which data is read according to the preamble of claim 1. On occurrence of a track jump the optical head is allowed to settle down to a new track and at this point the disk is speeded up so as to refill the buffer memory. EP-A-0,260,722 also discloses an optical disk drive in which data is read into a buffer memory. On occurrence of a track jump the content of the memory is depleted and the disk is not speeded up to replenish the memory until it has been determined that the head has returned to the address immediately after the point from which it jumped. According to the present invention, there is provided an optical disk reproducing apparatus in which, in use, an optical disk is rotated at a first rotational speed on the basis of first master clock pulses and a light spot is irradiated onto said optical disk for reproducing digital data, comprising master clock generating means for generating first master clock pulses and second master clock pulses of a higher frequency than said first master clock pulses, memory means into and from which digital data detected from said optical disk are sequentially written and read out, respectively, said memory means comprising a RAM for storing said digital data in a predetermined address having a memory capacity capable of storing digital data read out during the time period at least necessary for said light spot to reset from a track jump; track jump detection means for detecting a track jump of said light spot during reproduction of data from said optical disk, resetting means for resetting said light spot to a position just ahead of said track jump, and control means for continuously reading out digital data stored in said memory means on the basis of said first master clock pulses on detection of a track jump by said track jump detection means, said control means causing rotation of said optical disk at a second speed higher than said first speed on the basis of said second master clock pulses for a predetermined period after resetting of said light spot by said resetting means for reproducing digital data from said optical disk and writing the reproduced digital data in said memory means on the basis of said second master clock pulses; characterised in that: said memory means further comprises write address generating means arranged selectively to receive said first or second master clock pulses for generating write addresses for writing in said RAM and read address generating means supplied with said first master clock pulses for generating read out addresses for reading from said RAM; and by address comparison means for comparing write addresses generated by said write address generating means with readout addresses generated by said readout address generating means and responsive to the difference therebetween to output a control signal for switching master clocks supplied to said write address generating means and for causing said control means to begin rotation of said disk at said second speed when said address difference falls below a predetermined value. Thus, with the optical disk reproducing apparatus according to the present invention, digital data detected from the optical disk rotating at a first speed on the basis of the first master clock pulses are sequentially written in memory means on the basis of the first master clocks so as to be read out and output after lapse of a time period not less than the time period at least necessary for the light spot to reset from a track jump. Hence, on the occurrence of track jumps by the light spot, digital data previously stored in the memory means are continuously read on the basis of the first master clock pulses to provide the playback output without interruptions. In addition, the optical disk is rotated for a predetermined time period after resetting of said light spot at a second speed higher than the above mentioned first speed on the basis of second master clock pulses having a higher frequency than that of said first master clock pulses for detecting digital data from the optical disk and writing the detected digital data in the memory means on the basis of the second master clocks. In this manner, the digital data read out from the memory means during the time period necessary for resetting from the track jump and hence depleted may be quickly replenished. The invention will be further described by way of non-limitative example with reference to the accompanying drawings, in which:- Figure 1 is a block diagram showing the construction of a CD player according to a first embodiment of the present invention. Figure 2 is a block diagram showing the construction of a memory section of the CD player shown in figure 1. Figure 3 is a time chart for illustrating the operation of the CD player shown in figure 1 on the occurrence of a track jump. Figure 4 is a block diagram showing the construction of a CD player according to a second embodiment of the present invention. Figure 5 is a block diagram showing the construction of the memory part of the CD player shown in figure 4. By referring to the drawings, two illustrative embodiments of the present invention applied to the CD player will be explained in detail. Figure 1 is a block diagram showing a CD player according to a first embodiment of the present invention. An optical pickup 1 directs a light spot on a compact disk or CD 3, rotated by a spindle motor 2, to detect the presence or absence of pits therein to generate RF detection signals. These RF detection signals are processed in a waveform shaping circuit 4 and thereby converted into digital data which are transmitted to a digital signal processing section 5 so as to be processed and converted into audio data. These audio data are supplied to a memory section 6 so as to be sequentially written and stored into a random access memory (RAM) provided in the memory section 6. The stored data are then sequentially read and transmitted to an analog signal processing 7 where they are converted by digital to analog (D/A) conversion into analog signals and output as stereo audio signals. In the digital signal processing section 5, subcodes of digital data detected from CD 3 are detected and the detection output is transmitted to a control section 8. Based on the detection output, the control section 8 monitors the state of detection of the CD 3 to control a servo section 9 accordingly to apply a servo to optimise the rotational speed of the spindle motor 2 or the state of tracking of the light spot. An optimum focusing servo is applied in accordance with focusing error signals, supplied from the optical pickup 1 to the servo section 9. The control section 8 outputs a mute signal which goes high when digital data cease to be produced regularly from CD 3 and a play signal which goes low when the CD player is operating in a playback mode. These mute and play signals are applied to a non-inverting input and an inverting input of an AND circuit 10 which then outputs to the memory section 6 of a track jump detection signal which goes high when digital data are not produced regularly during the reproducing operation of the CD player, that is when a track jump has occurred. The CD player is provided with two clock generators, that is a usual clock generator 11 generating first master clock pulses forming the basis of the normal reproducing operation and a fast clock generator 12 generating second master clock pulses having a frequency higher than in the first master clock pulses. The master clock pulses output from these clock generators 11, 12 are switchingly selected by a switching circuit 13 responsive to control signals supplied from the memory section 6 before being transmitted to the digital signal processing section 5 and thence to the memory section 6 and to the control section 8. The first master clock pulses from the usual clock generator 11 are supplied continuously to the memory section 6 and thence to the analog signal processing section 7 so as to form timing clocks for D/A conversion. Referring to figure 2, the memory section 6 includes a RAM 20 into and from which audio data supplied from the digital signal processing section 5 are written and read out, respectively, as well as a write address controller 21, a write address generator 22, a readout address generator 23, an address selector 24 and an address comparator 25 for generating write and readout address data supplied to RAM 20. The write address controller 21 is supplied from the AND circuit 10 with the above mentioned track jump detection signal and controls the operation of the write address generator 22 and the operation of the address selector 24 in accordance with the track jump detection signals. The first or second master clock pulse streams, supplied by way of the switching circuit 13, are supplied to the write address generator 22 from the digital signal processing section 5. The write address generator 22 generates write address data in timed relation with the selected master clock pulses which write address data are transmitted to the address selector 24 and the address comparator 25. The first master clock pulses, generated in the usual clock generator 11, are directly transmitted to the readout address generator 23. The generator 23 generates address data in timed relation with the first master clock pulses, which address data are transmitted to the address selector 24 and to the address comparator 25. Responsive to control signals supplied from the write address controller 21, the address selector 24 transmits the address data supplied form the address generators 22, 23 to RAM 20 Responsive to write address data from address selector 24, the RAM 20 sequentially writes and stores audio data supplied from the digital signal processing section 5 by way of data input buffer 26. Responsive to readout address data supplied from the address selector 24, the RAM 20 sequentially reads out and outputs the stored audio data to transmit these audio data via data output buffer 27 to the analog signal processing section 7. The RAM 20 is required to have such a memory capacity that the audio data stored therein can be continuously supplied to the analog signal processing section 7 at least during the time necessary for the light spot to reset from the track jump, as will be explained in more detail later. The address comparator 25 is responsive to the difference between address data supplied thereto from the address generators 22, 23 to transmit the control signal for the switching operation to the switching circuit 13. Referring to figure 3, the operation of the above described CD player will be explained for the case wherein the track jump of the light spot has occurred during reproduction from the CD 3. The time period T₁ shown in figure 3 shows the time period when the CD 3 is being reproduced regularly. In this case, the first master clock pulses generated in the usual clock generator 11 are supplied to the digital signal processing section 5 via switching circuit 13. Based on these first master clock pulses, the CD 3 is rotated at a first speed (normal playback speed) and, based on these first master clock pulses, digital data are reproduced from CD 3. Since the normal playback output is produced at this time from CD 3 as shown at A in figure 3, a track jump detection signal of a low (L) level indicating that a regular playback operation is being performed as shown at B in figure 3 is supplied to the write address controller 21. The write address controller 21 activates the write address generator 22 when the track jump detection signal is at the low level, as shown at C in figure 3. Since the first master clock pulses are supplied at this time to both the write address generator 22 and the readout address generator 23, address data synchronised to each other are generated at the address generators 22, 23. However, the readout address data formed in the readout address generator 23 become the same data as (ie, "catches up with") the write address data generated in the write address generator 22 after a delay of a predetermined time longer than the time period necessary for the light spot to reset from the track jump. When the track jump detection signal is at a low level, the write address controller 21 controls the address selector 24, as shown at E in figure 3, in such a manner that the write address data W generated in the write address generator 22 and the readout address data R generated at the readout address generator 23 will be transmitted alternately to RAM 20. In this manner, the audio data supplied to RAM 20 are written into the address indicated by the write address data, and are read out from locations determined by the readout address data so as to be output from RAM 20 after lapse of a time interval corresponding to the delay of the readout address data with respect to the write address data. When the CD player undergoes vibrations at time t₁ in figure 3 during reproduction from CD 3, and the light spot has jumped over a track or tracks, by way of track jumps, abnormalities are produced in the playback output from CD 3, shown at A in figure 3. On detecting such track jump of the light spot from the abnormalities of the playback output, the controller 8 controls the servo section 9 to reset the light spot to a position just ahead of the position at which the track jump has occurred. Simultaneously, the controller 8 generates a high (H) level track jump detection signal indicating the track jump of the light spot at the AND gate 10 as shown at B in figure 3 and transmits the high level signal to the memory section 6. When supplied with the above mentioned high level track jump detection signal, the write address controller 21 of the memory section 6 inactivates the write address generator 22 as shown at C in figure 3 to interrupt the generation of the write address data. On the other hand, the readout address generator 23 continues its operation, as shown at D in figure 3, on the basis of the first master clocks supplied from the usual clock generator 11. The write address controller 21 controls the address selector 24, as shown at E in figure 3, to discontinue the supply of the write address data to RAM 20 to supply only the readout address data to RAM 20. For this reason, since the time t₁ when the track jump has occurred, the abnormal audio data transmitted from the digital signal processing section 5 are not written into RAM 20. Only readout of the audio data previously written in RAM 20 before time t₁ is performed in the usual manner. Once the track servo has operated to reset the light spot to the correct position just ahead of track jump, at time t₂ in figure 3, normal playback output from CD 3 restarts, as shown at A in figure 3. This sets the track jump detection signal shown at B in figure 3 to a low (L) level indicating that track jump has not occurred. Thus, the write address controller 21 reinitiates the operation of the write address generator 22, as shown at B in figure 3, to generate the write address data, while controlling the address selector 24, as shown at E in figure 3, to transmit the write address data and the readout address data to RAM 20. As described hereinabove, no audio data are written in RAM 20 during the time interval T₂ between time t₁ and t₂ when the track jump has occurred, and only readout of the audio data previously stored in RAM 20 is performed. Hence, at time t₂, the readout address approaches to the most recent write address data, official search that there is then little audio data stored in RAM 20 which has not yet been read. In order to make up for this the address comparator 25 compares the write address data with the readout address data and transmits to the switching circuit 13 a control signal which goes high as shown at F in figure 3 when the difference between the write address and the readout address is less than a predetermined value to cause the second master clock from the fast clock oscillator 12 to be supplied to the digital signal processing section 5. In this manner, responsive to these second master clocks, rotation of the spindle motor 2 and data processing of digital data detected from the CD 3 are performed such that, for a period, the CD 3 is rotated at a second speed faster than the above mentioned first speed, that is, the usual playback speed, with the audio data being reproduced at an increased speed from CD 3. The above second master clock pulses are also supplied to the write address generator 22, so that the write address data are generated at higher than usual speed, such that the audio data detected from the CD 3 are written in RAM 2 at an elevated speed in response to these write address data. For this reason, the audio data read out during the track jump time T₂ and thus depleted are quickly replenished. When the difference between the write address data and the readout address data has increased to a predetermined value at time t₃ in figure 3, the output of the address comparator 25 is at the low (L) level, such that the first master clock output from the usual clock generator 11 is again transmitted to for example, the digital signal processing section 5 by means of the switching circuit 13. Thus, since time t₃, the various parts operate in the same manner as during time interval T₁ to reproduce from the CD 3, in the normal state. Meanwhile, during the time interval t₃ between t₂ and time t₃ when the audio data are reproduced from CD 3 by the second master clocks pulses, the first master clock pulses from the usual clock generator 11 are supplied to the readout address generator 23, so that the audio data stored in RAM 20 are read out in the usual manner. Similarly, the first master clocks are supplied to the analog signal processing section 7, so that the audio data read out from the RAM 20 are regularly converted into analog signals so as to be output continuously all the time. It will be seen that, with the CD player to which the present invention is applied, when the light spot has jumped over a track or tracks, as a result of vibrations or the like, the audio data may be continuously read out from RAM 20 to produce a continuous playback output. Moreover, by reading from the CD 3 at an elevated speed for a predetermined time interval T₃ following reversion of the light spot to a position just ahead of the track jump, audio data may be quickly replenished in the RAM 20 in readiness for the next track jump. For this reason, consecutive audio signals can always be continuously output even when the CD player is employed under the conditions in which track jumps are likely to occur frequently. Figure 4 shows in a block diagram a CD player according to a second embodiment of the present invention and figure 5 shows in a block diagram the construction of the memory section 6 in the CD player shown in figure 4. In figures 4 and 5, the same or equivalent parts as those shown in figures 1 and 2 are indicated by the same numerals as in figures 1 and 2, and only the parts or components different from figures 1 and 2 are explained for avoiding redundant description. With the CD player of the first embodiment, the track jump detection signal is generated from the play signal and the mute signal output from the controller 8 so as to be supplied to the memory section 6. However, with the CD player of the present second embodiment, a detection signal of the track jump of the light spot and the detection signal of the subcode of digital data detected from CD 3 are supplied from the controller 8 to the memory section 6, as shown in figure 4. An address memory 28 is included in the memory section 6, as shown in figure 5, so as to be supplied with the subcode detection signal The address memory 28 is adapted for latching write address data output from the write address generator 22, with the subcode detection signal as the latch timing signal. Hence, in case of the track jump of the light spot, the write address data just ahead of track jump when the subcode ceases to be detected are stored in the address memory section 28. The write address data which was current just ahead of track jump is supplied to the write address generator 22 by means of the write address controller 21, such that, when the light spot reverts from the track jump and the write address generator 22 is actuated again, audio data start to be output from this write address onwards. In this manner, after the light spot reverts from the track jump, audio data from the digital signal processing section 5 are written from the address just ahead of the preceding track jump, so that no unusual data are left in RAM 20 even if the interruption of the operation of the write address generator 22 is delayed. With the optical disk reproducing apparatus of the present invention, digital data reproduced from the optical disk are written in memory means so as to be read and output after lapse of a time interval not shorter than the time period necessary for the light spot to reset at least from track jump. Hence, on occurrence of a track jump, a continuous playback output may be obtained by continuously reading out and outputting digital data from the memory means. In addition, with the present optical disk reproducing apparatus, the optical disk is reproduced at an elevated speed for a predetermined period after reversion of the light spot to a position just ahead of the track jump, so that digital data may be quickly replenished in the above memory means in readiness for the next track jump. With such optical disk reproducing apparatus, a perpetually continuous playback output may be obtained even an occurrence of a track jump as a result of vibrations or the like so that the vibration damping mechanism may be simplified. The optical reproducing apparatus may be advantageously employed with portable CD players or CD players mounted on vehicles where sever vibrations are encountered.

Claims: An optical disk reproducing apparatus in which, in use, an optical disk is rotated at a first rotational speed on the basis of first master clock pulses and a light spot is irradiated onto said optical disk for reproducing digital data, comprising master clock generating means (11, 12) for generating first master clock pulses and second master clock pulses of a higher frequency than said first master clock pulses, memory means (6) into and from which digital data detected from said optical disk are sequentially written and read out, respectively, said memory means comprising a RAM (20) for storing said digital data in a predetermined address having a memory capacity capable of storing digital data read out during the time period at least necessary for said light spot to reset from a track jump; track jump detection means (8, 10) for detecting a track jump of said light spot during reproduction of data from said optical disk, resetting means (8) for resetting said light spot to a position just ahead of said track jump, and control means (8) for continuously reading out digital data stored in said memory means on the basis of said first master clock pulses on detection of a track jump by said track jump detection means, said control means causing rotation of said optical disk at a second speed higher than said first speed on the basis of said second master clock pulses for a predetermined period after resetting of said light spot by said resetting means for reproducing digital data from said optical disk and writing the reproduced digital data in said memory means on the basis of said second master clock pulses; characterised in that: said memory means further comprises write address generating means (22) arranged selectively to receive said first or second master clock pulses for generating write addresses for writing in said RAM and read address generating means (23) supplied with said first master clock pulses for generating read out addresses for reading from said RAM; and by address comparison means (25) for comparing write addresses generated by said write address generating means with readout addresses generated by said readout address generating means and responsive to the difference therebetween to output a control signal for switching master clocks supplied to said write address generating means and for causing said control means to begin rotation of said disk at said second speed when said address difference falls below a predetermined value. Apparatus according to claim 1 wherein said readout address generating means is normally operative to generate the same address as the write address generated by said write address generating means with a delay of a predetermined period longer than a time period necessary for said light spot to reset from track jump. Apparatus according to any one of claims 1 or 2 further comprising address storage means (28) including means for detecting control data recorded on said optical disk, said address storage means storing write addresses at the generating timing of said detection signal. Apparatus according to any one of the preceding claims wherein said track jump detection means is operative to monitor digital data detected from said optical disk to generate track jump detection signal when the regular detection data are not obtained. Apparatus according to any one of claims 1 to 4 further comprising an address selector (24) for selectively supplying said write addresses or readout addresses to said RAM, and write address control means (21) responsive to said track jump detection signal supplied thereto to generate control signals inhibiting writing into said RAM.

Inventors: HORI KATSUYA, WONG ALAN, YOSHIDA TADAO, HORI, KATSUYA, WONG, ALAN, YOSHIDA, TADAO
Applicants: SONY CORP, SONY CORPORATION
Application year: 1990
Main classification: G11B7
IPC codes: G11B19, G11B20, G11B7