Musical tone signal generating apparatus

Abstract: Disclosed is a musical tone signal generating apparatus for an electronic musical instrument. When waveforms of musical tones stared in PCM waveform memory (8) and generated from a tone generator (7) are switched to change a tone color in correspondence with a change in pitch by pitch designation switch section (5), waveforms are switched not simultaneously with a change in pitch but when waveform data corresponding to a loop end address is read out, and a value of the wave­ form falls within a predetermined range or a zero-­ crossing point is detected under the control of a CPU (1), thereby smoothly switching waveforms generated from the tone generator (7). The pitch is also changed at the above-mentioned timing to prevent generation of an unnecessary tone color upon switching. Furthermore, waveforms are switched by cross-fade control to more smoothly switch output waveforms.

Description: The present invention relates to a musical tone signal generating apparatus for an electronic musical instrument and, more particularly, to a musical tone signal generating apparatus which can smoothly switch an output musical tone waveform in correspondence with a change in designated pitch. Conventionally, a musical tone signal generating apparatus of a waveform-data read type is known. In this apparatus, waveform data is read out from a waveform data memory storing digital waveform data and a musical tone is generated like in a PCM system on the basis of pitch data designated in accordance with a pitch designation operation by operating a pitch designation switch or the like. In an electronic musical instrument adopting a musical tone signal generating apparatus of this type, when a pitch of a musical tone in generation is to be smoothly changed, e.g., when a legato, a pitch bend operation, a portamento operation, a slide (glissando) operation, or the like is executed, a pitch is changed by changing only a data reading speed (read frequency or an address increment speed) without changing waveform data read out from the waveform memory in correspondence with a musical tone in generation (a musical tone immediately before a pitch is changed). However, when musical tones are generated by reading out one recorded waveform in correspondence with pitches over a wide range, tone colors cannot be naturally changed in correspondence with a compass of musical tones unlike in an acoustic musical or natural instrument in accordance with a change in pitch. For example, when an instruction for producing a musical tone of a pitch C₅ is issued by, e.g., the legato while a musical tone of a pitch C₄ is read out and produced in a loop mode between loop start and end addresses, the same waveform data of the same loop portion as the pitch C₄ is directly used, and a read speed (read frequency) is merely changed in correspondence with the pitch C₅. Therefore, since waveform data before and after the legato is executed is left unchanged, a tone color is not naturally changed in correspondence with a compass unlike in an acoustic musical instrument. In particular, when a pitch is largely changed by, e.g., a pitch bend operation, an unnatural state is caused before and after a change in pitch. In order to prevent a change unnatural in tone color according to a change in pitch, a method called multisampling has been used. In this method, a waveform corresponding to one tone color is sampled and prestored in a memory in units of predetermined compasses (e.g., one octave), and the stored waveform is selectively read out and generated in accordance with a designated pitch in a reproduction mode. However, in a musical tone signal generating apparatus of this type, when a pitch is largely changed upon operation of a bender during generation of a musical tone, a tone color tends to be changed. When a pitch is changed beyond the predetermined compass, a waveform in a higher or lower compass adjacent to a compass of a waveform in generation is read out in correspondence with the designated pitch, and the waveform generated before the pitch is changed is switched to the waveform of the adjacent compass. However, memory spaces for storing waveforms in units of compasses are independent of each other for each waveform of a compass. Thus, when the waveforms are switched by changing addresses of independent memory spaces, the waveforms may become discontinuous. In practice, it is difficult to generate musical tones by connecting waveforms of adjacent compasses. For example, when a tone generation instruction of a pitch C₅ is issued by, e.g., the legato while a musical tone of a pitch C₄ is read out and produced in a loop mode between loop start and end addresses, a read speed is immediately changed in correspondence with the pitch C₅, and waveform data of the same loop portion as the pitch C₄ are read out. Therefore, when a pitch is changed, since quite different waveform data are generated in a loop period, and the waveform data are read out, a musical tone of an unnecessary tone color is instantaneously generated. EP-A-0 150 736 discloses a tone signal generating device for an electronic musical instrument having a waveshape generator, a function generator and an interpolator. The interpolator combines two weighted waveshapes generated by the waveshape generator and outputs a combined waveshape at a rate corresponding to the frequency of the waveshape of the musical tone. The waveshape generator generates the next two adjacent waveshapes when the value of an interpolation function generated by the function generator has reached a predetermined value. This known tone signal generation device is to effect changes of the time spectrum. US-A-4 352 312 discloses a system for interpolating harmonic structures of a waveform during the transient periods of the waveform. The electronic musical instrument comprising this system has more selectively actuable switches than sound production generators. In order to generate the desired notes of the musical scale, the harmonic structures of waveforms stored in a memory are interpolated during the transient period of the waveform. For this, the known system comprises plural memory units being subdivided in a number of sounds. The harmonic structures read out from the memory units are then interpolated and scaled by a waveform envelope in order to be fed to an audio amplifier. EP-A-0 114 123 is directed to a wave generating system in which a plurality of wave samples are respectively weighted by a plurality of wave functions generated in accordance with the plurality of wave samples. The weighted wave samples are then added to obtain the desired wave. For this, the known system comprises wave generators, wave function generators, multipliers and an adder for adding the outputs of the multipliers. Furthermore, a wave changing circuit is provided which changes the kind of each of the wave samples when the appertaining wave function becomes zero. US-A-4 635 520 discloses a tone waveshape forming device in which two waveshapes correponding to an attack portion and the portion succeeding the attack portion of a tone to be generated are stored in a waveshape memory. After reading out the attack portion waveshape, the other waveshape is repetitively read out in such a manner that an interpolation operation is performed in specified sections at the end and at the beginning of the waveshape. Thereby, the waveshapes can be connected together without abrupt changes. The present invention has been made to solve the conventional problems, and has as its object to provide a musical tone signal generating apparatus which can naturally change a tone color before and after a pitch is changed when an operation for smoothly changing a pitch of a musical tone in generation, such as a legato, a pitch bend operation, a portamento operation, a slide (glissando) operation, or the like is executed. According to the present invention, there is provided a musical tone signal generating apparatus according to claim 1. Therefore, according to the present invention, even if a pitch is changed, a waveform can be smoothly changed in correspondence with a change in pitch. Further improvements are mentioned in the subclaims. The musical tone signal generating apparatus according to the present invention can also smoothly change a tone color in accordance with an operation such as a legato for smoothly changing a pitch of a tone in generation. Since, according to the present invention, a changing operation of a tone color after a pitch change can be performed at a timing corresponding to a loop end address, a tone color can be naturally changed without generating a musical tone of an unnecessary tone color. The musical tone signal generating apparatus according to the present invention can be free from an unnecessary instantaneous change in tone color when a pitch is changed upon execution of an operation such as a legato for smoothly changing a pitch in generation. According to the present invention, there can be provided a musical tone signal generating apparatus which can smoothly change a pitch in correspondence with the legato or the pitch bend operation without instantaneously generating a musical tone of an unnecessary tone color. The musical tone signal generating apparatus according to the present invention can naturally change a tone color before and after a pitch is changed upon execution of a style of playing or an operation for smoothly changing a pitch of a musical tone in generation and can prevent an instantaneous unnecessary change in tone color when the pitch is changed. The invention can provide a musical tone signal generating apparatus which can attain a natural change in tone color before and after a pitch is changed in addition to change in a pitch, when a pitch changing operation for changing a pitch of a musical tone in generation is performed, and can provide a performance effect very suitable for a legato, a pitch bend operation, and the like. The musical tone signal generating apparatus can smoothly change waveforms in correspondence with a change in pitch when a waveform is changed to a waveform of another compass. According to the present invention, a waveform can be changed in accordance with a change in pitch, and tone color waveforms can be naturally connected. For those who are skilled in the art, other objects and features of the present invention will be easily understood from the description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings, in which: Fig. 1 is a block diagram of the entire circuit of an electronic wind instrument according to the first embodiment of the present invention; Fig. 2A shows storage areas in units of compasses in a PCM waveform memory 8; Fig. 2B shows musical tone signal waveforms corresponding to PCM waveform data stored in units of compasses; Figs. 3A and 3B are charts for explaining PCM waveform data read out in a loop mode at speeds corresponding to pitches C₄ and C₅, respectively; Figs. 4A and 4B are charts for explaining a pitch changing operation and a waveform data changing operation when a musical tone signal of a pitch C₄ is changed to a musical tone signal of a pitch C₅; Fig. 5 is a circuit diagram showing a detailed circuit arrangement of a PCM musical tone generator 7; Fig. 6 is a flow chart for explaining pitch change control processing for a musical tone in generation by a CPU 1; Fig. 7 is a circuit diagram showing a detailed circuit arrangement of a PCM musical tone generator 7 of an electronic wind instrument according to the second embodiment of the present invention; Fig. 8 is a flow chart for explaining pitch change control processing of a CPU 1 in the second embodiment; Fig. 9 is a block diagram of the third embodiment of the present invention; Fig. 10 is a block diagram of an address controller shown in Fig. 9; Fig. 11 is a waveform chart showing a waveform switching operation of the third embodiment; Fig. 12 is a flow chart showing an operation of the third embodiment; Fig. 13 is a block diagram showing a main part of the fourth embodiment of the present invention; Fig. 14 is a block diagram of the fifth embodiment of the present invention; Fig. 15 is a block diagram of an address controller shown in Fig. 14; Figs. 16A and 16B are waveform charts of the fifth embodiment of the present invention; Fig. 17 is a chart showing a compass relationship for explaining cross-fade in the fifth embodiment; and Fig. 18 is a flow chart showing an operation of the fifth embodiment of the present invention. Preferred embodiments of the present invention will be described hereinafter with reference to the accompanying drawings. <First Embodiment> Arrangement An arrangement of an electronic wind instrument according the first embodiment to which a musical tone signal generating apparatus of the present invention is applied will be described below with reference to the block diagram of Fig. 1. A CPU 1 controls the entire circuit shown in Fig. 1, and the entire circuit blocks will be described below based on the functions of the CPU 1. A voltage converter 3 converts breath data detected by a breath sensor 2 into an analog voltage value. The analog voltage value is converted to a digital value by an A/D converter 4 so that corresponding digital breath data is supplied to the CPU 1. The CPU 1 receives pitch data designated by a pitch designation operation at a pitch designation switch section 5, tone color control data associated with a tone color selected upon operation of a tone color selection switch 6-1 at a tone color/effect switch section 6, and pitch change control data appended by a pitch changing operation upon operation of a pitch bender 6-2 or a portamento setup switch 6-3. The CPU 1 sends musical tone control data based on these various data to a PCM musical tone generator 7. A PCM waveform memory 8 is divided into storage areas in units of a plurality of compasses, e.g., C₄ to B₄, C₅ to B₅, ..., C₈ to B₈,as shown in Fig. 2A, and prestores a plurality of PCM waveform data corresponding to an attack portion and a loop portion shown in the waveform chart of Fig. 2B. Note that the loop length of the loop portion is not limited to one period. For example, a loop portion corresponding to a plurality of periods may be stored. The PCM musical tone generator 7 has pairs of loop start and end address data (e.g., a and b , c and d , ..., i and j ; Fig. 2B) for reading out a loop portion of the PCM waveform data in units of compasses in a loop mode (repetitively), and an envelope generator for generating an envelope signal. The PCM musical tone generator 7 reads out PCM waveform data corresponding to a compass, to which pitch data received from the CPU 1 belongs, at a speed (frequency) corresponding to the pitch data, and generates digital data subjected to envelope control based on an envelope signal. The generator 7 then sends the generated digital data to a D/A converter 9. For example, when a note ON operation occurs upon a breath operation at the breath sensor 2 after a pitch C₄ is designated upon operation of the pitch designation switch section 5, the PCM musical tone generator 7 accesses a storage area (Fig. 2A) of waveform data, corresponding to a compass to which the pitch C₄ belongs, in the PCM waveform memory 8, and reads out an attack portion and then a loop portion between the loop start and end addresses a and b in a loop mode for a predetermined period of time t corresponding to the breath operation (Fig. 3A). Similarly, when a note ON operation occurs upon the breath operation after a pitch C₅ is designated, the PCM musical tone generator 7 reads out a loop portion between the loop start address c and the loop end address d in waveform data corresponding to a compass to which the pitch C₅ belongs (Fig. 3B). The D/A converter 9 converts digital data input from the PCM musical tone generator 7 into an analog tone signal. The analog tone signal is amplified by an amplifier 10, and the amplified signal is produced as a musical tone through a loudspeaker 11. A case will be examined below wherein a musical tone of a pitch C₅ is produced by a legato while a musical tone of, e.g,. a pitch C₄ is produced (the same applies to a case wherein a pitch bend effect is provided upon operation of a pitch bender or a case wherein a portamento effect is provided upon operation of a switch of the tone color/effect switch section 6) (Fig. 4B). As shown in Fig. 4A, in response to a note ON operation of a musical tone of the pitch C₄, the PCM musical tone generator 7 reads out waveform data in the PCM waveform memory 8 corresponding to a compass to which the pitch C₄ belongs at a read speed based on the pitch C₄, so that it reads out an attack portion and then a loop portion in a loop mode between the loop start and end addresses a and b . As shown in Figs. 4A and 4B, when a note ON operation of a musical tone of the pitch C₅ occurs by the legato during the loop operation, waveform data is switched to a new one corresponding to a compass to which the pitch C₅ belongs upon completion of read access of the currently looped waveform data, i.e., at a timing when waveform data at the loop end address b is read out. The new waveform data is then read out in a loop mode between the loop start and end addresses c and d of the new waveform data at a read speed based on the pitch C₅ (Fig. 2B). Therefore, waveform data read out from the PCM waveform memory 8 in correspondence with the pitch C₄ is quite different from waveform data read out from the PCM waveform memory 8 in correspondence with the pitch C₅. A detailed circuit arrangement of the PCM musical tone generator 7 will be described below with reference to Fig. 5. In Fig. 5, a pitch data register PD1 receives from the CPU 1 pitch data based on a pitch designation operation at the pitch designation switch section 5. A start address register SA receives from the CPU 1 a start address signal for reading out waveform data corresponding to a compass to which the pitch data belongs from the PCM waveform memory 8. A loop start address register LSA1 and a loop end address register LEA1 respectively receive from the CPU 1 a loop start address signal and a loop end address signal for reading out a loop portion of waveform data corresponding to a compass to which the pitch data belongs from the PCM waveform memory 8 in a loop mode. A gate G1 is an output gate which is connected to the output of the start address register SA, and is instantaneously enabled in response to a note ON signal to send the start address signal set in the start address register SA to a current address register CA. A gate G2 is normally enabled, and is instantaneously disabled in response to a note ON signal input through an inverter I1. A comparator CO receives a current address signal from a latch LA, and normally outputs a signal "1". A gate G3 is normally enabled in accordance with the signal "1" from the comparator CO. The address signal from the latch LA is fed back to the current address register CA through the normally ON gates G3 and G2, and is supplied to an adder AD. The address signal is added to pitch data set in the pitch data register PD1, as will be described later. A gate G4 is an output gate which is connected to the output of the pitch data register PD1, and is normally enabled in accordance with an output signal "0" supplied from a control circuit CT2 through an inverter I2. The gate G4 sends the pitch data set in the pitch data register PD1 to the adder AD. The adder AD adds the current address signal set in the current address register CA and the pitch data input through the gate G4 using clocks of a predetermined frequency, thereby incrementing the current address signal at a speed based on the pitch data. The sum from the adder AD is sequentially supplied to the latch LA. The latch LA sends the current address signal incremented at a speed based on the pitch data as a waveform data read address signal to the PCM waveform memory 8. A gate G5 is an output gate which is connected to the output of the loop end address register LEA1, and is normally enabled in accordance with an output signal "0" from the control circuit CT1. The gate G5 sends the loop end address signal to the comparator CO. The comparator CO compares the current address signal and the loop end address signal, and instantaneously outputs a coincidence signal "0" when it determines that the two signals coincide with each other. When the coincidence signal "0" is output from the comparator CO, the gate G3 is instantaneously disabled, and a gate G6 is instantaneously enabled in response to the coincidence signal "0" input through an inverter I4. A gate G7 is connected to the output of the loop start address register LSA1, and is normally enabled in accordance with an output signal "0" supplied from the control circuit CT 1 through an inverter I3. The gate G6 is enabled upon reception of the coincidence signal input from the comparator CO through the inverter I4, and supplies a loop start address signal set in the loop start address register LSA1 or a loop start address register LSA2 to the current address register CA as a loop start address signal for starting loop read access of a loop portion of waveform data through the normally ON gate G2. Thereafter, when the current address signal is incremented by the adder AD and the coincidence signal "0" is output from the comparator CO, the loop start address signal is input to the current address register CA, and is added to the pitch data input through the gate G4 by the adder AD to increment the address signal for reading out the waveform data in a loop mode. Thus, the address signal is sequentially sent to the PCM waveform memory 8. A pitch data register PD2 receives pitch data from the CPU 1. A gate G8 is an output gate which is connected to the output of the pitch data register PD2, and is normally disabled in accordance with an output signal "0" from a flip-flop at the output stage of a control circuit CT2. The flip-flop normally latches "0". When the control circuit CT2 receives a pitch change instruction signal from the CPU 1, a flip-flop at an input stage A2 of the circuit CT2 is set to output a signal "1". When the control circuit CT2 receives a coincidence signal from the comparator CO through the inverter I4, a flip-flop at an input stage B2 of the circuit CT2 is set to output a signal "1". More specifically, when the control circuit CT2 receives the pitch change signal, and then receives the coincidence signal, the flip-flop at the output stage latches a signal "1", and then resets the flip-flop at the input stage A2. The gate G4 is disabled, and the gate G8 is enabled. As a result, the changed pitch data is supplied from the pitch data register PD2 to the adder AD, and the current address signal is incremented at a speed based on new pitch data. As has been described above, every time the coincidence signal "0" is output from the comparator CO, the current address register CA receives the loop start address signal set in the loop start address register LSA1 as a current address signal, and an address signal for reading out waveform data in a loop mode is sent to the PCM waveform memory 8 through the latch LA. The loop start address register LSA2 and a loop end address register LEA2 respectively receive loop start and end address signals for reading out a loop portion of new waveform data in the PCM waveform memory 8 in a loop mode when read access is made while changing waveform data which is being read to another waveform data. Gates G9 and G10 are respectively connected to the outputs of the loop end and start address registers LEA2 and LSA2, and are normally disabled in accordance with an output signal "0" from the control circuit CT1. When the control circuit CT1 receives a waveform data change instruction signal from the CPU 1, the flip-flop at the input stage A1 is set to output a signal "1". Meanwhile, when the control circuit CT1 receives the coincidence signal from the comparator CO through the inverter I4, the flip-flop at the input stage B1 is set to output a signal "1". More specifically, after the control circuit CT1 receives the waveform change instruction signal, the flip-flop at the output stage outputs a signal "1" at an instance when the circuit CT1 receives the coincidence signal, and resets the flip-flop at the output stage B1. Thus, the gates G5 and G7 are disabled, and the gates G9 and G10 are enabled. As a result, the loop end address register LEA2 supplies the loop end address signal to the comparator CO through the gate G9, and the loop start address register LSA2 supplies the current address register CA through the gates G10, G6, and G2. Operation The operation of the electronic wind instrument according to the first embodiment will be described below with reference to Fig. 5 on the basis of the flow chart of Fig. 6 showing a pitch change control processing operation for a musical tone in generation by the CPU 1. This flow chart starts upon timer interrupt to a main flow (not shown). It is checked if a musical tone is being produced, i.e., if the PCM musical tone generator 7 is generating a musical tone signal (step S1). If YES in step S1, it is checked if a pitch change instruction is issued for a musical tone in generation by the legato, the pitch bend operation, or the like (step S2). If YES in step S2, pitch data associated with a changed pitch is set in a non-busy one of the pitch data registers PD1 and PD2 in the PCM musical tone generator 7, and a pitch change instruction signal is sent to the control circuit CT2 (step S3). It is then checked if a waveform assigned to a changed pitch is the same as one assigned to a current pitch (of a musical tone in generation) among waveform data stored in the PCM waveform memory 8 (step S4). If YES in step S4, only the pitch is changed, and the waveform need not be changed. It is then checked if the comparator CO outputs a coincidence signal (step S5). If NO in step S5, the processing in step S5 is repeated until the coincidence signal is output to determine YES in step S5. Thus, the control stands by until waveform read access progresses to the loop end address. If YES in step S5, the output gate G4 at the output side of the pitch data register PD1 is switched and disabled in response to the output signal from the control circuit CT2, and the gate G8 as an output gate of the pitch data register PD2 is enabled (step S6) to change a pitch of a musical tone in generation. It is checked if "1" is set in a flag F which is set to be "1" only when a waveform assigned in correspondence with a pitch is to be changed in a pitch changing operation (step S7). Since YES is determined in step S4 and a waveform to be read out need not be updated to a new waveform, NO is determined in step S7, and the control returns to the main flow. If NO in step S4, the assigned waveform must be switched to another waveform in a pitch changing operation. Thus, a loop start address of a switched new waveform is set in a non-busy one of the loop start address registers LSA1 and LSA2. In addition, a loop end address of the switched new waveform is set in a non-busy one of the loop end address registers LEA1 and LEA2. Furthermore, the CPU 1 sends a waveform change instruction signal to the control circuit CT1 to change a waveform (step S8). The flag F is set to be "1" to indicate that a waveform must also be changed when a pitch is changed (step S9). The flow then advances to step S5, and processing operations in steps S6 and S7 are similarly executed. Since YES is determined in step S7, gate switching control is executed for the PCM musical tone generator 7 (step S10). More specifically, the gate G7 as the output gate of the loop start address register LSA1 is disabled, and the gate G10 as the output gate of the loop start address register LSA2 is enabled. In addition, the gate G5 as the output gate of the loop end address register LEA1 is disabled, and the gate G9 as the output gate of the loop end address register LEA2 is enabled. The flag F is reset to prepare for the next pitch change instruction (step S11), and the control then returns to the main flow. If NO in step S1, since no musical tone is being produced, the control directly returns to the main flow. If NO in step S2, since no pitch change instruction is issued for a musical tone in generation, i.e., since a pitch changing operation by the legato need not be performed, the control also returns to the main flow. In this manner, according to the electronic wind instrument of the first embodiment, when a performance by the legato, the pitch bend operation using a pitch bender, or the portamento method using a portamento switch for smoothly changing a pitch of a musical tone is executed in generation during generation of the musical tone, if a waveform which is assigned to a pitch to be changed and is stored in the PCM waveform memory 8 need not be changed upon changing of a pitch, only the pitch is changed after read access up to the loop end address of the currently reading loop portion is completed; and if the waveform is to be changed upon changing of the pitch, not only the pitch but also the waveform are changed after read access up to the loop end address is completed. Therefore, in a performance for smoothly changing a pitch like in the legato, a tone color can be naturally changed before and after the pitch is changed without causing an instantaneous unnecessary change in tone color. <Second Embodiment> Arrangement An arrangement of an electronic wind instrument according to the second embodiment to which a musical tone signal generating apparatus of the present invention is applied will be described below. The block diagram of the entire electronic wind instrument is the same as Fig. 1 according to the first embodiment described above, and a detailed description thereof will be omitted. The detailed circuit arrangement of a PCM musical tone signal generator 7 in the electronic wind instrument of the second embodiment will be described below with reference to Fig. 7. In Fig. 7, the same reference numerals as in Fig. 5 in the first embodiment denote the same parts, and only a difference will be described below. A difference between the block diagrams of Figs. 7 and 5 is that only one pitch data register PD is arranged and does not have an output gate, and hence, there is no control circuit for switching-controlling the output gate of the pitch data register. More specifically, at an instance of reception of new pitch data from a CPU 1, the single pitch data register PD sends the new pitch data to an adder AD to cause it to immediately increment a current address signal from a current address register CA based on the new pitch data. Operation The operation of the electronic wind instrument according to the second embodiment will be described below with reference to Fig. 7 on the basis of the flow chart of Fig. 8 showing a pitch change control processing operation for a musical tone in generation by the CPU 1. In Fig. 8, the same step numbers as in Fig. 6 of the first embodiment designate processing steps having the same functions, and only a difference will be described below. A difference between the flow charts of Figs. 6 and 8 is that processing in step S6 in Fig. 6 is not performed in Fig. 8. More specifically, output gate switching processing of the pitch data register PD is not performed. During generation of a musical tone signal by a PCM musical tone generator 7, if it is determined in step S2 that an instruction for changing a pitch of the musical tone signal is received, changed pitch data is set in the pitch data register PD to change the pitch at that instance. Thereafter, processing operations in steps S7 to S11 described above are executed, and a waveform to be read out at a timing of a loop end address is changed as needed. When a performance for changing a pitch is made during generation of a musical tone, the electronic wind instrument according to the second embodiment immediately changes only the pitch, and then changes a waveform after read access up to the loop end address is completed if a waveform assigned to a pitch to be changed in the PCM waveform memory 8 must be changed according to a change in pitch. Therefore, according to the second embodiment, a tone color can be naturally changed before and after a pitch is changed. <Third Embodiment> Arrangement Fig. 9 is a block diagram of a musical tone signal generating apparatus for an electronic musical instrument according to the third embodiment of the present invention. An input circuit 20 comprises a pitch designation input section 22a, and a variable pitch input section 22b. If an electronic musical instrument of this embodiment is a keyboard instrument, the pitch designation input section 22a is a keyboard; if it is a wind instrument, a guitar, or the like, the section 22a is an input section such as corresponding switches or frets for inputting pitches. The variable pitch input section 22b is, e.g., a switch, a bender, various sensors, or the like for changing and inputting a pitch of a musical tone in generation, and for designating to switch a waveform of a pitch of a musical tone in generation. The outputs from the pitch designation input section 22a and the variable pitch input section 22b are input to a CPU 24 as a control circuit. The output from the CPU 24 is supplied to an address controller 26 and an envelope generator 28. The output from the address controller 26 is supplied to a waveform memory (waveform ROM) 30. The envelope generator 28 generates envelope data for changing an amplitude of an output musical tone along with a time. The waveform ROM 30 stores waveforms in units of predetermined compasses (e.g., in units of octaves), e.g., stores a waveform A, waveform B, ..., as will be described later. The output from the waveform ROM 30 is input to a multiplier 34 together with the output from the envelope generator 28. A detector 32 detects according to the output from the CPU 24 whether or not the output from the waveform ROM 30 falls within a predetermined range allowing waveform switching. The detection result of the detector 32 is supplied to the address controller 26 and causes it to update an address of waveform data. The product from the multiplier 34 is output to a latch 36, and is also supplied to a D/A converter 38. The analog signal output from the D/A converter 38 is amplified by an amplifier 40, and is output from a loudspeaker (not shown), or the like. Fig. 10 shows the arrangements of the address controller 26, the waveform ROM 30, and the detector 32. The output of the CPU 24 is coupled to loop start address registers LSA1 and LSA2, start address registers SA1 and SA2, a pitch register PD, loop end address registers LEA1 and LEA2, end address registers EA1 and EA2, a selector SE, and a change register CR, thereby inputting corresponding data. The outputs from the start address registers SA1 and SA2 are input to a current address register CA through gates G10 and G11 which are controlled by the output from the selector SE and a gate G1 which is ON-controlled by an output from an OR gate 42. The output from the current address register CA and the output from the pitch register PD are input to an adder AD. The sum from the adder AD is output to a latch LA1. A current address as the output of the latch LA1 is input to a comparator C0. The outputs from the loop end address registers LEA1 and LEA2 are input to the comparator C0 through gates G5 and G9 controlled by an output of the selector SE and via a latch LA2. As a result, the output from the comparator C0 goes to "1" when the current address is smaller than the loop end address; otherwise, it goes to "0". The current address as the output of the latch LA1 is input to the current address register CA through a gate G3 which is controlled by the output from the comparator C0, and a gate G2 which is ON-controlled via the OR gate 42 and an inverter I1 (to be described later) when a note ON signal (one-shot signal) from the CPU 24 is OFF (at low level). The output from the comparator C0 is input to one input terminal of an AND gate 44 and is also input to one input terminal of an AND gate 46 through an inverter I4. The other input terminal of the AND gate 44 receives the output from a comparator C1. The other input terminal of the AND gate 46 receives the output from the comparator C1 through an inverter I5. The comparator C1 receives the outputs from the end address registers EA1 and EA1 through gates G12 and G13 which are controlled by the output from the selector SE and via the latch LA2. The comparator C1 compares the outputs from the latches LA1 and LA2, and outputs "1" when the current address is smaller than the end address; otherwise, outputs "0". The AND gates 44 and 46 are connected to gates G14 and G15 so as to selectively supply the outputs from the loop start address registers LSA1 and LSA2 and the outputs from the current address register CA to the current address register CA, respectively. Therefore, in a loop address control mode, the outputs from the loop start address registers LSA1 and LSA2 are input to the current address register CA through a gate G7 and the gate G5, and through the gates G14 and G15 via a latch LA3. Note that the gates G10, G5, G12, and G7, and the gates G11, G9, G13, and G7 are ON-controlled by an output from the selector SE and an output from the selector SE through an inverter I2. The output from the current address register CA is supplied to the waveform ROM 30. The output from the waveform ROM 30 is supplied to comparators 48a and 48b of the detector 32. These comparators 48a and 48b respectively compare a peak value of a waveform read out from the waveform ROM 30 with threshold values of minimum and maximum values MIN and MAX. The comparison results of the comparators 48a and 48b are input to an AND gate 50, and the output from the AND gate 50 is supplied to one input terminal of an AND gate 52. The other input terminal of the AND gate 52 receives the output from the change register CR. The output from the AND gate 52 is supplied as a data latch signal to latches LA4, LA2, and LA3 through an OR gate 54. The data latch signal is also input to an OR gate 42 together with the note ON signal, and is also supplied to the change register CR as a reset signal. The OR gate 54 also receives the note ON signal, and in a note ON mode, the content of a register designated by the output from the selector SE is set in the latches LA3, LA4, and LA2. Operation The operation of the musical tone signal generating apparatus for an electronic musical instrument with the above arrangement will be described below with reference to the flow chart of Fig. 11. Assume that a desired pitch is designated and input by the pitch designation input section 22a. As a result, data (parameter) for reading out waveform data corresponding to the designated pitch and wave heigth threshold values (MAX, MIN) of a switching position for switching a waveform are set in the address controller 26 (step ST1). More specifically, the CPU 24 determines waveform data to be read out in correspondence with the designated pitch input by the pitch designation input section 22a. As a result, the CPU 24 sets a parameter corresponding to the designated pitch in the address controller 26 so as to read out the corresponding waveform data. When the designated pitch is present in a compass covered by the waveform A, LS A is set in the loop start address register LSA1 of the address controller 26; ST A , the start address register SA1; LE A , the loop end address register LEA1; and ED A , the end address register EA1. In addition, a selection signal "1" is set in the selector SE, and "0" is set in the change register CR. In order to determine a waveform peak value upon switching of a waveform on the basis of a designation input of the variable pitch input section 22b, minimum and maximum values (MIN, MAX) of a peak value are designated as threshold values of the peak value representing a range of allowing waveform switching at a waveform switching position, so that these values are ready to be output to the comparators 48a and 48b, respectively. In this case, the pitch register PD is set up with the designated specific pitch of the waveform A. The same setup is made as in the waveform A when a compass corresponding to a designated pitch is the waveform B or other waveforms. The CPU 24 outputs a musical tone generation instruction signal (note ON signal) to the address controller 26 and the envelope generator 28 (step ST2). When the note ON signal is output from the CPU 24, the gate G1 which is controlled by the note ON signal through an OR gate 42 is enabled in the address controller 26. Therefore, the output ST A from the start address register SA1 is input to the current address register CA through the gate G10 which is enabled in response to the selection signal from the selector SE. The output from the current address register CA is input to the adder AD together with the output from the pitch register PD. The sum is then output to the latch LA1. In response to the note ON signal, the OR gate 54 outputs a "1" signal, so that the contents of the registers LSA1, LEA1, and LE1, are set in the latches LA3, LA4, and LA2 through the gates G7, G9, and G12, respectively. As a result, a value which is incremented and stored in the latch LA1 is equal to a sum of the output of the current address register CA and the pitch value output from the pitch register PD at a predetermined timing (sampling period) by the adder AD. The output of the latch LA1 incremented by the pitch value is supplied to the comparator C0, and is also fed back to the current address register CA through the gate G3 which is controlled by the output of the comparator C0 and the gate G2. As a result of comparison between the output of the latch LA1 and the output LE A of the latch LA4, if the current address does not reach the loop end address LE A , the gate G3 is enabled in response to the output from the comparator C0. The gate G2 is enabled immediately after the gate G1 is enabled in response to the input note ON signal and the output from the start address register SA1 is input to the current address register CA. The current address stored in the latch LA1 is kept incremented by a loop of the latch LA1, the gates G3 and G2, the current address register CA, and the adder AD until the current address reaches the loop end address LE A . The current address is supplied to the waveform ROM 30 as a read address. Since the incrementing rate of the current address is determined by the output from the pitch register PD, pitch control is realized. When the output from the latch LA1 reaches the value LE A of the loop end address register LE1, the output from the comparator C0 disables the gate G3, and is input to one input terminal of each of the AND gates 44 and 46 through the inverter I4. The outputs from these AND gates 44 and 46 are determined by the output from the comparator C1. More specifically, the comparator C1 makes a comparison to determine if the current address latched by the latch LA1 has reached the output value ED A from the latch LA2. The output from the comparator C1 is input to the other input terminal of the AND gate 44, and is also input to the other input terminal of the AND gate 46 through the inverter I5. When the current address exceeds the loop end address LE A , i.e., when it falls within the range between the loop end address LE A and the end address ED A , the AND gate 44 outputs a loop end signal to enable the gate G14 to allow the output LS A already latched by the latch LA3 from the loop start address register LSA1 to pass through the gate G14. In this case, since no end signal is output from the AND gate 46, the gate G15 is kept disabled. More specifically, the output LS A of the latch LA3 is output to the current address register CA through the gates G14 and G2. Therefore, when the current address reaches the loop end address LE A , it returns to the loop start address LS A to form a loop interval (LS A to LE A ). In this manner, addressing is repeated with this interval to continuously output a musical tone. Therefore, of the waveform A between the start and end addresses ST A and ED A , a waveform portion between the start address ST A and the loop end address LE A is read out, and the loop interval up to the loop end address LE A is repetitively read out as long as a musical tone continues. When a musical tone is to be muted, a waveform portion up to the end address ED A is read out to end generation of a musical tone. In this case, for example, the address data output from the latch LA4 can be rewritten with a value indicating the end address ED A . When the current address reaches the end address ED A , a "0" output is supplied from the comparator C1 to enable the gate G15. As a result, the output from the current address register CA merely loops through the gates G15 and G2, and is no longer incremented. In this case, the gate G3 is disabled since the output from the comparator C0 goes to "0". During generation of a musical tone, a waveform read out from the waveform ROM 30 is supplied to the multiplier 34. A predetermined envelope generated by the envelope generator 28 which received the note ON signal from the CPU 24 is supplied to the multiplier 34. As a result, the waveform read out from the waveform ROM 30 is multiplied with the predetermined envelope generated by the envelope generator 28 by the multiplier 34, and the product is then output through a latch 36 or the like. After the note ON signal is output in step ST2, it is checked if a waveform (waveform A) is switched in response to an instruction to change a pitch of a musical tone in generation, i.e., a frequency upon operation of the variable pitch input section 22b (step ST3). The change in pitch is detected by monitoring the variable pitch input section 22b by the CPU 24. In step ST3, the same judgment is made until the pitch is considerably changed, i.e., a waveform of a musical tone in generation is switched. Although not shown, other processing is inserted between steps ST2 and ST3, as needed. For example, frequency change processing in a compass corresponding to a certain waveform is executed. In this case, corresponding pitch data can be sequentially input to the pitch register PD. If it is determined in step ST3 that the pitch is considerably changed and a waveform must be switched, the flow advances to step ST4, and a waveform address of waveform data to be switched (waveform B in this case) is set in the address controller 26. More specifically, as waveform data of the waveform B, LS B is set in the loop start address register LSA2; ST B , the start address register SA2; LE B , the loop end address register LE2; and ED B , the end address register EA2. In addition, a selection signal "0" different from that upon generation of a previous musical tone is set in the selector SE, i.e., a selection signal for ON-controlling the gates G6, G11, G9, and G13 is set in the selector SE through the inverter I2. In addition, the change register CR is set. As a result, the waveform is switched according to the output from the detector 32. More specifically, the detector 32 determines if the wave height value of the waveform data of the waveform in generation (waveform A) falls within a predetermined range. More specifically, the comparators 48a and 48b make comparisons to determine if the wave height value of the waveform data in generation which is sequentially read out from the waveform ROM 30 falls within the range between the wave height threshold values of the waveform switching position designated in step ST1 described above. If the comparators 48a and 48b detect the relation of MIN ≦ the wave height value of waveform data ≦ MAX, a switching enable signal is output to the AND gate 50. Note that the threshold values compared in the comparators 48a and 48b can be arbitrarily set or fixed. As the threshold values approach "0", unnaturalness upon switching (e.g., generation of noise) can be eliminated. The output from the AND gate 50 is input to the AND gate 52 together with the output from the change register CR. In this case, since the output from the change register CR is ON, the AND gate 52 outputs a data latch signal. Thus, the data latch signal is output from the AND gate 52 to the OR gate 42 and the latches LA2, LA3, and LA4 through the OR gate 54, and the address data of the waveform data of the waveform B to be switched are output to the corresponding latches. More specifically, ST B is transferred from the start address register SA2 to the current address register CA through the gates G11 and G1, LE B is transferred from the loop end address register LE2 to the latch LA4 through the gate G9, ED B is transferred from the end address register EA2 to the latch LA2 through the gate G13, and LS B is transferred from the loop start address register LSA2 to the latch LA3 through the gate G6, thereby outputting data of the waveform B. In this case, the data latch signal is output from the AND gate 52, and the change register CR is reset. For example, as shown in Fig. 12, the current waveform A of a musical tone in generation and the waveform B to be switched are stored in the waveform ROM 30, so that they start from a value "0" or a nearby value. Fig. 12 shows a waveform of one period. However, the waveforms A and B may consist of a plurality of periods. Before the end of the waveform A (time t c ), a pitch change instruction is issued from the CPU 24, and the change register CR is switched from "0" to "1". At the same time, address data indicating the waveform B to be switched are output to the corresponding latches, as described above. When the value of the waveform A falls within the range of the threshold values near "0" at time t₃, the data latch signal is output from the AND gate 52, and the waveform to be read out is switched to the waveform B. Thereafter, a musical tone is output with a pitch designated in a compass of the waveform B. In this manner, when different waveforms stored in the waveform ROM are switched, a waveform is switched if the value of waveform data of a musical tone in generation falls within the range of predetermined threshold value. Therefore the read timing of an optimal waveform can be smoothly changed according to a change in pitch by, e.g,. a portamento operation or a pitch bend operation. <Fourth Embodiment> In the above embodiment, a waveform is switched when a value of waveform data of a musical tone in generation falls within a range of predetermined threshold values. However, waveform data may be switched at a timing of reading out zero-level waveform data, i.e., a timing of reading out waveform data at a zero-crossing point (in Fig. 12, the loop end address coincides with one of zero-crossing points). Arrangement Fig. 13 is a block diagram of a detector as a principal part of this embodiment. In a simplest known method of detecting a zero-crossing point, it is checked if the positive/negative codes of two waveform data corresponding to two adjacent addresses of storage areas in a PCM waveform memory 30 are inverted. Assume that waveform data is digital data expressed by a complementary number of 2, its MSB (most significant bit) is a code bit, and when the MSB = "0", it indicates a positive value; when the MSB = "1", it indicates a negative value. As shown in Fig. 13, a detector 60 comprises an MSB detector 62 for detecting the MSB of waveform data in the waveform ROM 30, latches LA5 and LA6 for latching a code bit from the MSB detector, a latch LA7 for latching the output from the latch LA5, and a comparator C2 for comparing the outputs from the latches LA7 and LA6. Operation The code bit as the MSB of the waveform data from the waveform ROM 30 is latched by the latches LA5 and LA6. When the next waveform data is read out, new MSB data is latched by the latches LA5 and the LA6, and the latch LA7 latches the immediately preceding code bit previously latched by the latch LA5. The comparator C2 compares the contents of the latches LA6 and LA7, i.e., a code bit of waveform data currently read out from the waveform ROM 30 and the immediately preceding code bit. When a coincidence between the two bits is found, i.e., when a zero-crossing point is not detected, the comparator C2 outputs "0"; when a noncoincidence between the two codes is found, i.e., when a zero-crossing point is detected, it outputs "1". This output is input to the AND gate 52 of the address controller 26 shown in Fig. 10. When the output from the comparator C2 is "1", the waveform data switching operation is executed, as described above. In this manner, waveforms can be smoothly connected. <Fifth Embodiment> Arrangement Fig. 14 is a block diagram of a musical tone signal generating apparatus according to the fifth embodiment of the present invention. An input circuit 20 comprises a pitch designation input section 22a, and a variable pitch input section 22b. If an electronic musical instrument of this embodiment is a keyboard instrument, the pitch designation input section 22a is a keyboard; if it is a wind instrument, a guitar, or the like, the section 22a is an input section such as corresponding switches or frets for inputting pitches. The variable pitch input section 22b is, e.g., a switch, a bender, various sensors, or the like for changing and inputting a pitch of a musical tone in generation, and for designating to switch a waveform of a pitch of a musical tone in generation. The outputs from the pitch designation input section 22a and the variable pitch input section 22b are input to a CPU 24 as a control circuit. The output from the CPU 24 is supplied to a level controller 70 for cross-fade controlling a level of an amplitude of an output waveform according to the designated pitch (to be described later), and is also supplied to address controllers 26a and 26b and envelope generators 28a and 28b. The outputs from the address controllers 26a and 26b are respectively supplied to waveform memories (waveform ROMs) 30a and 30b. The envelope generators 28a and 28b generate data for changing an amplitude of an output musical tone along with time. The waveform ROMs 30a and 30b store waveforms including loop portions in units of predetermined compasses (e.g., in units of octaves). The output from the waveform ROM 30a is input to a multiplier 34a together with the output from the envelope generator 28a, and a product from the multiplier 34a is input to a multiplier 72a. The multiplier 72a receives the product from the multiplier 34a, and the output from the level controller 70. On the other hand, the output from the waveform ROM 30b is input to a multiplier 34b together with the output from the envelope generator 28b, and a product from the multiplier 34b is input to a multiplier 72b. The multiplier 72b receives the product from the multiplier 34b and the inverted output of the level controller 70 through an inverter 73. The products from the multipliers 72a and 72b are respectively supplied to latches 74a and 74b, and are then output to an adder 76. The sum from the adder 76 is output to a latch 36, and is then supplied to a D/A converter 38. The analog signal from the D/A converter 38 is amplified by an amplifier 40, and is then output from a loudspeaker (not shown). Fig. 15 shows, e.g., the address controller 26a. The output of the CPU 24 is connected to a loop start address register LSA, a start address register SA, a pitch register PD, a loop end address register LE, and an end address register EA. The output from the start address register SA is input to a current address register CA through a gate G1 which is controlled by the output from the CPU 24. The output from the current address register CA and the output from the pitch register PD are input to an adder AD. The sum from the adder AD is then output to a latch LA. A current address as the output of the latch LA is input to a comparator C0 together with the output from the loop end address register LEA. When the current address is smaller than the loop end address, the output of the comparator C0 goes to "1"; otherwise, it goes to "0". The output from the latch LA is input to the current address register CA through a gate G3 which is controlled by the output from the comparator C0 and a gate G2 which is ON-controlled through an inverter I1 when a note ON signal (one-shot signal) from the CPU 24 is OFF (at low level). The output from the comparator C0 is input to an AND gate 44 together with the output from a comparator C1 via an inverter I4. The comparator C1 compares the output from the latch LA and the output from the end address register EA. When the current address is smaller than the end address, the output of the comparator C1 goes to "1"; otherwise, it goes to "0". The output from the comparator C1 through an inverter I5 is input to an AND gate 46 together with the output from the comparator C0 through the inverter I4. The AND gates 44 and 46 are connected to gates G14 and G15 so as to supply the output from the loop start address register LSA and the output from the current address register CA to the current address register CA. Therefore, the output from the loop start address register LSA is input to the current address register CA through the gates G14 and G2. The detailed arrangement of the address controller 26a has been described above. Since the address controller 26b has the same arrangement as the controller 26a, a detailed description thereof will be omitted. Figs. 16A and 16B show waveforms stored in the waveform ROMs 30a and 30b. In this case, the waveform ROMs 30a and 30b alternately store waveforms of adjacent compasses in units of octaves. As will be described later, the waveform ROM 30a stores waveform data 2 and 4, and the waveform ROM 30b store waveform data 1 and 3 (Fig. 17). Figs. 16A and 16B show waveforms of adjacent compasses. Time is plotted along the abscissa, and an amplitude is plotted along the ordinate. ST₂, ST₁, LS₂, LS₂, LE₂, LE₁, ED₂, and ED₁ respectively indicate the start, loop start, loop end, and end addresses stored in the registers SA, LSA, LE, and EA. Attack portions with emphasized tone quality are included between the start addresses ST₂ and ST₁ and the loop start addresses LS₂ and LS₁, of the waveforms 2 and 1, as shown in Figs. 16A and 16B, and are also included between the start addresses and the loop start addresses of the waveforms 3 and 4. Fig. 17 shows the relationship among adjacent compasses. For example, a compass corresponding to pitches C₃ to B₃ is determined as the waveform 1, a compass corresponding to pitches C₄ to B₄ is determined as the waveform 2, a compass corresponding to pitches C₅ to B₅ is determined as the waveform 3, and a compass corresponding to pitches C₆ to B₆ is determined as the waveform 4. These items of waveform data are used for compasses designated by a low-key position (LK) and a high-key position (HK). More specifically, in the waveform 1, a pitch C₃ corresponds to LK1 and a pitch B3 corresponds to HK₁. Similarly, in the waveform 2, a pitch C₄ corresponds to LK₂ and a pitch B₄ corresponds to HK₂. The same applies to other waveforms. Each waveform is addressed by the start address (ST), the end address (ED), the loop start address (LS), and the loop end address (LE). A pitch between the pitches B₃ and C₄ is output under the cross-fade control so that the levels of the waveforms 1 and 2 cross each other. More specifically, as the level of the waveform 1 gradually increases or decreases, the level of the waveform 2 gradually decreases (or increases) accordingly. In this manner, an interval wherein levels of two adjacent waveforms are changed is determined as a cross-fade interval. In this case, the cross-fade interval is determined to be 100 ¢(cent) to have widths of 50 ¢ from a point at which levels (mixing ratios) of the adjacent waveforms are equal to each other. Note that in Fig. 17, a 100 ¢ interval between the pitches B₃ and C₄ is determined as the cross-fade interval. However, the width of this interval is not limited to 100 ¢. The inclination of the mixing levels representing that cross-fade control is made within 100 ¢ determined based on the output from the level controller 70. Operation The pitch designation input section 22a designates and inputs a desired pitch. As a result, data (Parameter) for reading out the waveform data corresponding to the designated pitch is set in the address controllers 26a and 26b (step A1). The CPU 24 determines one of the waveform data 1 to 4 to which the pitch designated and input by the pitch designation input section 22a belongs. In this case, since the waveform ROMs 30a and 30b alternately store waveform data of adjacent compasses in units of octaves, the CPU 24 also determines, based on the designated pitch, a waveform ROM from which a waveform is to be read out. Parameters corresponding to the designated pitch are set in the address controllers 26a and 26b so as to read out the corresponding waveform data. For example, if the designated pitch is present in the compass of the waveform 2, LS₂, ST₂, LE₂, and ED₂ are respectively set in the loop start address register LSA, the start address register SA, the loop end address register LE, and the end address register EA of the address controller 26a. If the designated pitch belongs to the compass of the waveform 1, LS₁, ST₁, LE₁, and ED₁ are respectively set in the loop start address register, the start address register, the loop end address register, and the end address register of the address controller 26b in the same manner as the address controller 26a. When another pitch designation is made, corresponding parameters are set in the address controller 26a or 26b so that data of the waveform 4 is read out by the address controller 26a or data of the waveform 3 is read out by the address controller 26b, and waveform data of non-adjacent compasses are read out in units of octaves. In this case, an input specific one of the pitches C₄ to B₄ of the waveform 2 is set in the pitch register PD. A maximum value of a level is set in the level controller 70 to maximize the amplitude of the waveform (step A2). More specifically, the multiplier 72a receives the maximum value from the level controller 70, and the multiplier 72b receives a minimum value (0) obtained by inverting the output from the level controller 70 by the inverter 73. The CPU 24 outputs a musical tone generation instruction signal (note ON signal) to the address controller 26a and the envelope generator 28a (step B3). Note that when the compass corresponding to the designated pitch is the waveform 1 or 3, the minimum value is set in the level controller 70 to output the waveform in the waveform ROM 30b at the maximum level. When the note ON signal is output from the CPU 24, the gate G1 is enabled and the output ST₂ is input from the start address register SA to the current address register CA in address controller 26. The output from the current address register CA is input to the adder AD together with the output from the pitch register PD. The sum from the adder AD is output to the latch LA. A value which is incremented and stored in the latch LA is equal to the sum of the output from the current address register CA and the pitch value output from the pitch register PD by the adder AD at a predetermined timing (sampling period). The output from the latch LA incremented by the pitch value is supplied to the comparator C0, and is fed back to the current address register CA through the gate G3 controlled by the output from the comparator C0 and the gate G2. As a result of comparison between the output from the latch LA and the output LE₂ from the loop end address register LE, if the current address does not reach the loop end address LE₂, the gate G2 is enabled by the output from the comparator C0. The gate G2 is enabled immediately after the gate G1 is enabled in response to the note ON signal and the output from the start address register SA is input to the current address register CA. Thus, the current address stored in the latch LA is kept incremented by a loop of the latch LA, the gates G3 and G2, the current address register CA, and the adder AD until the current address in the latch LA reaches the loop end address LE₂. The current address is supplied to the waveform ROM 30a as a read address. Since the incrementing rate of the current address is determined by the output from the pitch register PD, pitch control can be realized. When the output from the latch LA reaches the value LE₂ of the loop end register LE, the output from the comparator C0 disables the gate G3, and is input to one input terminal of each of the AND gates 44 and 46 via the inverter I4. The outputs from the AND gates 44 and 46 are determined by the output from the comparator C1. More specifically, the comparator C1 makes a comparison to determine whether or not the current address stored in the latch LA has reached the output value ED₂ from the end address register EA. This output is input to the other input terminal of the AND gate 44, and is also input to the other input terminal of the AND gate 46 through an inverter I5. When the current address falls within the range of the loop end address LE₂ and the end address ED₂, the AND gate 44 outputs a loop end signal to enable the gate G14 so as to allow the output LS₂ of the loop start address register LS to pass the gate G14. Since no end signal is output from the AND gate 46, the gate G15 is kept disabled. More specifically, the output LS₂ of the loop start address register LS is output to the current address register CA through the gates G14 and G2. When the current address reaches the loop end address LE₂, it returns to the loop start address LS2 to form a loop period (LS₂ to LE₂). In this manner, addressing in this loop period is repeated to continuously output a musical tone. Therefore, of the waveform 2 in Fig. 16A between the start and end addresses ST₂ and ED₂, a waveform portion between the start address ST₂ and the loop end address LE₂ is read out, and the loop period up to the loop start address LE₂ is repetitively read out according to a duration of a musical tone as long as the musical tone continues. When a musical tone is to be muted, a waveform portion up to the end address ED₂ is read out to end generation of a musical tone. In this case, for example, the content of the loop end address register LE can be rewritten with the end address ED₂. When the current address reaches the end address ED₂, a "0" output is supplied from the comparator C1 to enable the gate G15. As a result, the output from the current address register CA merely loops through the gates G15 and G2, and an address is no longer incremented. In this case, the gate G3 is disabled since the output from the comparator C0 goes to "0". During generation of a musical tone, waveform data read out from the waveform ROM 30a is supplied to the multiplier 34a. Predetermined envelope data generated by the envelope generator 28a which received the note ON signal from the CPU 24 is supplied to the multiplier 34a. As a result, the waveform data read out from the waveform ROM 30a is multiplied with the predetermined envelope data generated by the envelope generator 28a by the multiplier 34a, and the product is then output to the multiplier 72a. As described above, the maximum value is multiplied with the output from the multiplier 34a by the multiplier 72a, and the product is then output through the adder 76, the latch 36, and the like. After the note ON signal is output in step A3, it is checked if a control signal is input to change a pitch of a musical tone in generation, i.e., frequency by the variable pitch input section 22b (step A4). The change in pitch can be detected by monitoring the variable pitch input section 22b by the CPU 24. In step A4, the same judgment is made until the pitch is changed. Although not shown, other processing is inserted between steps A3 and A4, as needed. If the pitch is changed, it is checked if the pitch is changed upward or downward from the current pitch (step A5). If it is determined in step A5 that the pitch is changed downward, the flow advances to step A6 to check if the pitch is changed downward for the first time. If YES in step A6, the flow advances to step A7, and waveform addresses of the loop section of waveform data adjacent to the compass of the waveform 2 are set in the address controller 26b in this case. In this case, the address controller 26a is operated in the same manner as the address controller 26a to read out the loop period of waveform data adjacent to the compass of the waveform 2. Thus, waveform data of the loop period of the adjacent compass (waveform 1 in this case) is read out to the address controller 26a. Thus, the loop start address LS₁ is set in the start address register. In this case, waveform data in the loop period of the waveform 1 between the loop start address LS1 and the loop end address LE₁ shown in Fig. 16B is read out from the waveform ROM 30b. The waveform data of the loop period of the waveform 1 read out from the waveform ROM 30b by the address controller 26b is supplied to the multiplier 34b. Furthermore, a predetermined envelope data generated by the envelope generator 28b which received the note ON signal from the CPU 24 is supplied to the multiplier 34b. Thus, the predetermined envelope data generated by the envelope generator 28b is multiplied with the waveform data read out from the waveform ROM 30b by the multiplier 34b, and the product is then output to the multiplier 72b. If it is determined in step A6 that the pitch is changed for the second time or thereafter, the flow advances not to step A7 but to step A8. A change in pitch is determined in step A8. In this case, since the pitch of the low key LK₂ is C₄, it is checked if the pitch is present between the pitches B₃ and C₄, i.e., if LK - 100 ¢ ≦ pitch ≦ LK is satisfied. If NO in step A8, the flow advances to step A10 (to be described later). However, if YES in step A8, i.e., a pitch is continuously changed by a portamento or pitch bend operation, the flow advances to step A9 to mix waveforms under the cross-fade control. More specifically, the value of the level controller 70 is updated. Since the value of the level controller 70 is changed depending on a pitch, a mixing ratio of the waveform data 1 and 2 is determined depending on a pitch in this case. Therefore, if the pitch is C₄ or more, a musical tone is generated using only the waveform data 2, as described above. However, if the pitch is changed from C₄ toward B₃, the level of the waveform 2 is changed from the maximum value to the minimum value, while the level of the loop period of the waveform data 1 is changed from the minimum value to the maximum value, thus achieving the cross-fade control. Since the level controller 70 supplies its output to the multiplier 72b, and the multiplier 72b receives the output inverted by the inverter 73, if one level is increased, the other level is complementarily decreased. As a result, the level of a musical tone of the waveform 2 is decreased, and the level of a musical tone of the waveform 1 which consists of only the loop period and does not include an attack portion with emphasized tone quality is increased, that is, waveforms are switched, thus naturally changing musical tones. In this manner, every time a change in pitch is detected in step A4, steps A5, A6, A8, and A9 are executed, and a series of processing operations are repeated until step A10 is satisfied. In step A10, a change in pitch is judged again to check if a pitch ≦ LK2 - 100 ¢. In this case, when another waveform is switched after the cross-fade control is made in step A9, e.g., after a compass is switched from that of the waveform 2 to that of the waveform 1, YES is determined in step A10, and the flow advances to step A11. In this case, NO is determined in step A8, as a matter of course. In step A11, the previous address controller (26a in this case) is set OFF, i.e., initialized. Thereafter, the waveform 1 is output with the designated pitch. In contrast to this, if an upward pitch change is detected in step A5, the flow advances to step A12 to check if the pitch is changed upward for the first time. If YES in step A12, the flow advances to step A13, parameters are set in the address controller 26b to read out waveform data adjacent to the compass of the waveform 2, in this case, the waveform of the loop period of the waveform 3, and the note ON signal is output in the same manner as for the waveform 2. If NO in step A12, the flow advances not to step A13 but to step A14. In step A14, a change in pitch is determined. In this case, since the high key HK₂ is B₄, it is checked if a pitch is present between B₄ and C₅, i.e., if HK ≦ pitch ≦ HK + 100 ¢ is satisfied. If NO in step A14, the flow advances to step A16 (to be described later). However, if YES in A14, the flow advances to step A15 to perform mixing control under the cross-fade control. More specifically, the value of the level controller 70 is changed depending on the pitch. In this case, the mixing ratio of the waveform and the loop period of the waveform 3 is determined depending on the pitch. Therefore, as the pitch is changed from B₄ toward C₅, the level of the waveform 2 is changed from the maximum value to the minimum value, while the level of the waveform of the loop period of the waveform 3 to be mixed under the cross-fade control is changed from the maximum value to the minimum value. The level of a musical tone of the waveform 2 is decreased, and the level of a musical tone of the waveform of the loop interval of the waveform 3 is increased, thus switching the waveforms. In step A16, a change in pitch is judged in the same manner as in step A10. In this case, it is checked if the pitch ≧ HK2 + 100 ¢. After the cross-fade processing is executed to switch waveform to another one in step A15, i.e., after the compass is switched from that of the waveform 2 to that of the waveform 3, the flow advances to step A17. In step A17, the previous address controller (26a in this case) is set OFF, i.e., initialized. Thereafter, only the waveform data 3 is output with the designated pitch. When a pitch is changed outside a compass of a musical tone in generation, a musical tone is reproduced while executing the cross-fade processing between the waveform of a compass of a musical tone in generation and a waveform portion of a loop period of a waveform of the adjacent compass to be switched. For this reason, when a pitch is changed, waveforms can be smoothly switched in accordance with a change in pitch without reproducing a musical tone whose attack portion is emphasized. In the first to fifth embodiments, a plurality of items of PCM waveform data are stored in the PCM waveform memory by dividing areas. However, the PCM waveform memory may store only one PCM waveform data common to all the compasses. When a performance requiring a change in pitch is made during generation of a musical tone signal by the PCM musical tone generator 7, a pitch may be changed after read access of waveform data progresses to a timing of a loop end address as in the first embodiment without immediately changing the pitch as in the second embodiment. Thus, a pitch can be changed without causing an instantaneous unnecessary change in tone color. The present invention can be applied to any other apparatuses which express waveforms without using the PCM technique. For example, a differential PCM method, an adaptive differential PCM method, a delta modulation method, and the like may be employed. In the third and fourth embodiments described above, waveform data previously read out from the waveform ROM is determined as the waveform A, and waveform data to be switched is determined as the waveform B. However, the present invention is not limited to this. Arbitrary waveform data can be read out, as a matter of course. In the fifth embodiment described above, items of waveform data of adjacent compasses are alternately stored in two waveform ROMs in units of octaves. However, these waveform ROMs may store waveforms of all the compasses. In this case, for example, the address controller 26a can be started first for any compass. The two systems of musical tone generators are not limited to the embodiments described above, but may be realized by time-divisionally using two channels of a multichannel sound source. That is, at least two musical tone generation channels need only be prepared to generate one tone, and the structure of each musical tone generation channel is not limited. Envelope control by the envelope generator may be performed after the adder 76 in Fig. 14. In this case, one envelope generator can be used, thus further simplifying the arrangement.

Claims: A musical tone signal generating apparatus comprising: memory means (8, 30) for storing different waveform data in correspondence with a plurality of different tone ranges; pitch designation operation means (5, 20) for designating a pitch of a musical tone; waveform designation means (24) for designating, from said memory means (8, 30), waveform data corresponding to a tone range to which the pitch designated by said pitch designation operation means (5, 20) belongs; readout means (1, 26) for reading out the waveform data designated by said waveform designation means (24) at a speed corresponding to the pitch designated by said pitch designation operation means (5, 20); and musical tone signal output means (7, 34) for generating a musical tone signal on the basis of the waveform data read out by said readout means (26); characterized by further comprising: timing signal generation means (32, 60, CO), operative when a current pitch of a musical tone signal in generation is changed to a new pitch belonging to a new tone range different from a current tone range to which the current pitch belongs by said pitch designation operation means (5, 20), said timing signal generation means (32) including means for detecting whether or not a value of the waveform data read out from said memory means (8, 30) falls within a predetermined range, and outputting a switching timing signal when the value of the waveform data falls within the predetermined range; and switching means (CR, CT1) for causing said readout means (26) to read out waveform data corresponding to the new tone range to which the new pitch designated by said pitch designation operation means (5, 20) belongs in response to the switching timing signal generated by said timing signal generation means (32, 60, CO). An apparatus according to claim 1, characterized in that said pitch designation operation means (5, 20) comprises pitch designation means (22a) for designating a pitch corresponding to a scale, and variable input means (22b) for varying a pitch of a musical tone in generation. An apparatus according to claim 1 or 2, characterized in that said timing signal generation means (32) outputs the switching timing signal by detecting a timing when said readout means (24) reads out zero-level waveform data. An apparatus according to any of the preceding claims, characterized in that said memory means (8, 30) stores pulse-code modulated waveform data. An apparatus according to any of the preceding claims, characterized in that said switching means (CR) further includes readout speed switching means (CT2) for causing said readout means (1) to change from the speed corresponding to the current pitch designated by said pitch designating operation means (5) to the one corresponding to the new pitch in response to the switching timing signal from said timing signal generating means (CO). An apparatus according to any of the preceding claims, characterized in that each waveform data stored in said memory means (8) has a loop portion repeatedly read out. An apparatus according to claim 6, characterized in that said timing signal generation means (CO) outputs the switching timing signal when the waveform data at a loop end address is read out from said memory means (8). An apparatus according to any of the preceding claims, characterized in that said readout means (26) comprises two readout means (26a, 26b), one of said two readout means (26a, 26b) reading out current waveform data from said memory means (30), and the other of said two readout means (26a, 26b) from said memory means (30) on the basis of the control of said switching means (CR), amplitude control means (70) for gradually decreasing a value of the current waveform data read out by said one of said two readout means (26a, 26b) to zero, and gradually increasing a value of the new waveform data by the other of said two readout means (26a, 26b) in response to the switching timing signal generated by said timing signal generation means (32), and mixing means (76) for mixing the two waveform data after baing amplitude-controlled by said amplitude control means (70). An apparatus according to claim 8, characterized in that said pitch designation operation means (5, 20) comprises scale designation means (22a) for designating a pitch corresponding to a scale, and pitch varying means (22b) for varying a pitch of a musical tone in generation. An apparatus according to claim 8 or 9, characterized in that said memory means (8, 30) comprises first and second memory means (30a, 30b) for storing waveform data corresponding to adjacent tone ranges. An apparatus according to claim 8, characterized in that each waveform data stored in said memory means (8, 30) has an attack portion and a loop portion repeatedly read out and when said readout means (26) reads out new waveform data said waveform readout means reads out only the loop portion of the new waveform data.

Inventors: IBA AKIO C O PAT DEP DEV DIV H, TSUTSUMI KENICHI C O PAT DEP D, IBA, AKIO, C/O PAT. DEP., DEV. DIV. HAMURA R & D, TSUTSUMI, KENICHI, C/O PAT. DEP., DEV. DIV. HAMURA, Iba, Akio, c/o Pat. Dep., Dev. Div. Hamura R &amp; D
Applicants: CASIO COMPUTER CO LTD, CASIO COMPUTER COMPANY LIMITED
Application year: 1990
Main classification: G10H7
IPC codes: G10H1, G10H7