Semiconductor device having a package structure

Abstract: A silicon chip (1) is mounted on a heat dissipation body (5) and a carrier film (4) is inserted between a resin composition material (8). Each of input/output electrode portions of the silicon chip (1) is connected electrically to each of lead wires of the carrier film (4). The electrical connection between the silicon chip (1) and a circuit substrate (12) is carried out by the carrier film (4). The heat dissipation body (5) is exposed on a surface of the resin composition material (8). A fixing means (9) for fixing the resin composition material (8) is formed integrally to the resin composition material (8) or to the heat dissipation body (5). The resin composition material (8) is fixed to a circuit substrate (12) through the fixing means (9). The mechanical fixing between the resin composition material (8 ) and the circuit substrate (12) is carried out by the fixing means (9). A heat dissipation fin may be provided on the heat dissipation body (5).

Description: The present invention relates to a semiconductor device package according to the preamble of independent claim 1. Such a package is known from the proceedings of THE IEEE 1985 CUSTOM INTEGRATED CIRCUITS CONFERENCE, "An inexpensive high frequency, high power, vlsi chip carrier" by Ken Smith, pages 42ff, 1985. In particular, it relates to a package structure type semiconductor device, that may be suitably applied to a semiconductor device having a large number of input/output electrodes, e.g. more than 400, and a heat generation amount of above 5 W. Recently, in response to a demand for a high speeding-up of the execution time and a small scaling-up in the electronic computer, there makes a progress in a high integration and a large scaling-up for the semiconductor element which is provided in the electronic computer. In company with this, there has a tendency to increase in a number of input/output electrode portions per one unit of the semiconductor element and also to increase in a heat generation amount in the semiconductor element. As a structure for mounting a large number of the input/output electrode portions of the semiconductor element, there is known an QFP (Quad Flat Package) system in which the lead wires for the input/output electrode portions are provided through four direction sides of the semiconductor element. Such a package, further having a package member with protrusions, is known from R. Tummula et al., "Microelectronics Packaging Handbook", New York, US : Van Nostrand Reinhold, 1988, pages 531 and 533. Fixing means are not shown. In the above stated QFP system, until now a lead frame being formed by punching a metallic plate has been used as an input/output terminal or a lead wire. However, it cannot make much small a lead space in the above stated lead frame structure because of the mechanical punching manufacturing method. Therefore, recently an TAB (Tape Automated Bonding) system has been developed, in which a portion between the input/output electrode portion of the semiconductor element provided on the package member and an outside input/output terminal (a lead wire) portion is connected by a carrier film in which the lead wires are formed on a flexible substance film member of the carrier film. Since the carrier film can be shorten considerably a lead space (a space between adjacent two lead wires) in comparison with that of the above stated metallic plate lead frame, it is useful for the small scaling-up for the semiconductor element. Besides, in the package member of the semiconductor element, the package member using the resin composition material is increasing from aspect of the mass-production. The package member using the resin composition material has a small dielectric constant and also gives a little affect in the propagation for the electrical signal (a propagation delay). However, in generally the resin composition material has a small thermal conductivity, since the thermal resistance in the package member is made large, it has a problem about the encapsulating for the semiconductor element having the large heat generation amount. Then, as a method for encapsulating the semiconductor element having the large heat generation amount using the resin composition material, a package structure type semiconductor device, in which an insulated base body for mounting the semiconductor element is served as a heat dissipation plate, has been developed. According to employment of this structure, even in the semiconductor element having a comparative large heat generation amount of about 3 W (an upper limit), it is possible to obtain the package member using the resin composition material. For the small scaling-up of the semiconductor element having the large input/output electrode portion number, it is necessary to shorten the lead space. In the conventional method using the metallic plate lead frame, it has a limit in the lead space, also it is necessary to take a large area for the wiring enlargement portion, therefore it is impossible to make small the package structure size of the semiconductor device. There has been proposed a package structure semiconductor device. The package structure of this semiconductor device comprises a first outside terminal for electrically connecting an electronic component in which a chip is packaged and a wiring substrate, and a second outside terminal for supporting and fixing the electronic component. The first outside terminal and the second outside terminal are provided separately and distinctly. By this separated provision structure in the package structure type semiconductor device comprising the outside terminal for electrically connecting the electronic component and the support portion for supporting and fixing the electronic component, the number of the lead wires are increased through slenderizing the dimension of the lead wire for the electrical connection. (Japanese Patent Laid-Open Sho No. 216256/1987). However, in the package structure type semiconductor device which requires many input/output electrode portions through a higher integration, it is insufficient still even the above stated structure. Further, it is necessary to escape positively the heat generation, which increases in company with the higher integration and the larger scaling-up in the semiconductor element, toward the package member outside. Document US-A-4 132 856 discloses a process of forming a plastic encapsulated molded film carrier package. During manufacturing of the package the chip itself is placed on a metal heat sink, the electrical connections are constituted by a film carrier. Besides that the device comprises means for fixing it to a printed circuit board. It is the object of the present invention to provide a semiconductor device package wherein a high reliability of an electrical connection and a mechanical connection can be attained, the package preferrably being suitable for semiconductor elements having a high number of input/output electrodes, e.g. above 400, and a heat generation amount of above 5 W. This object is solved in accordance with the characterizing features of claim 1. Dependent claims are directed to preferred embodiments of the invention. According to the present invention, since the electrical connection between the semiconductor device and another circuit substrate is carried out by the carrier film, and further the mechanical fixing is carried out by the provision of the fixing means, respectively, the reliabilities on the electrical connection and the mechanical connection in the semiconductor device can be heighten, therefore the high density and the high integration in the semiconductor device can be attained. In particular, the semiconductor device having the high density and the high integration and having further the heat generation amount of more than 5 W can be provided. Further, in the present invention, by using the carrier film wiring, the electronic apparatus having the small propagation delay in the signal can be provided. Brief Description of Drawings: Fig. 1A is a cross-sectionally schematic view showing one embodiment of a semiconductor device according to the present invention; Fig. 1B is a top view showing one embodiment of the semiconductor device shown in Fig. 1A; Fig. 2A is a manufacturing process showing one embodiment of a semiconductor device according to the present invention, in which a semiconductor element is fixed to an insulated base body; Fig. 2B is a manufacturing process showing one embodiment of a semiconductor device according to the present invention, in which a semiconductor element and an insulated base body are inserted into a lower mold; Fig. 2C is a manufacturing process showing one embodiment of a semiconductor device according to the present invention, in which a carrier film being formed solder bumps is connected to a semiconductor element; Fig. 2D is a manufacturing process showing one embodiment of a semiconductor device according to the present invention, in which a semiconductor element, an insulated base body and a carrier film are inserted into between a lower mold and an upper mold, and an encapsulating resin composition material is filled between both molds; Fig. 2E is a manufacturing process showing one embodiment of a semiconductor device according to the present invention, in the state in which both molds are removed; Fig. 3 is a cross-sectionally schematic view showing an installation condition for a semiconductor device, which is obtained according to the manufacturing processes shown in Figs. 2A-2E, to a circuit substrate; Fig. 4 is a cross-sectionally schematic view showing another embodiment of a semiconductor device according to the present invention; Fig. 5 is a cross-sectionally schematic view showing a further embodiment of a semiconductor device according to the present invention; Fig. 6 is a cross-sectionally schematic view showing an electronic computer using semiconductor devices according to the present invention; Fig. 7 is a partially cross-sectional view showing one embodiment of a cross-flow board using in the electronic computer shown in Fig. 6; Fig. 8A is a cross-sectionally schematic view showing an installation method for another embodiment of a semiconductor device according to the present invention; Fig. 8B is a top view showing another embodiment of the semiconductor device shown in Fig. 8A; Fig. 9 is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; Fig. 10 is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; Fig. 11 is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; Fig. 12A is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; Fig. 12B is a top view showing one embodiment of the semiconductor device shown in Fig. 12A; Fig. 13 is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; Fig. 14 is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; Fig. 15 is a cross-sectionally schematic view showing an installation method for a further embodiment of a semiconductor device according to the present invention; and Fig. 16 is a plan view showing one embodiment of a carrier film. Description of the Invention: In the semiconductor device according to a preferred embodiment of the present invention, as shown in Figs. 1A and 1B, a semiconductor element 1 having a package structure is mounted on a heat dissipation body which comprises an electrically insulated base body 5, and a rear surface of the heat dissipation body is disposed on a surface of a package member, which is formed by an encapsulating resin composition material 8, so as to dissipate the heat. Input/output electrode portions of the semiconductor element 1 are connected electrically to a carrier film 4 by solder bumps 3 and the carrier film 4 is drawn toward the package structure outside. On the carrier film 4, wiring patterns or lead wires are formed with corresponding numbers to the number of the input/output electrode portions of the semiconductor element 1. Further, on the package member, besides the wiring patterns on the carrier film 4, a fixing means 9 is provided as a means for fixing the package member during the mounting of the package member on a wiring substrate such as a circuit substrate. By this fixing means 9, since it imposes no burden for supporting the package member on the carrier film 4, the carrier film 4 can form with an optional shape, and it can heighten the reliability on the electrical connection for the wiring substrate, accordingly it is possible to increase the number of the input/output electrode portions of the semiconductor element 1 in comparison with the conventional semiconductor device. Further, the heat dissipation body comprising the electrically insulated base body 5 may provide a heat dissipation fin 7 as shown in drawing. By this dissipation fin 7, since it can be improved more the heat dissipation characteristic, it is possible to mount the semiconductor element 1 having the large heat generation amount. The dissipation fin 7 may be formed on the electrically insulated base body 5 according to the joining by the adhesion agent etc. or may be formed integrally on the electrically insulated base body 5. Also, for attaining the higher heat dissipation effect, it is desirable to have the heat dissipation body having a good thermal conductivity more than that of the semiconductor element 1. In particular, it is desirable to have the thermal conductivity for the heat dissipation body of above 160 W/mK. As one material example for the heat dissipation body, there is an electrically insulated ceramics in which a main composition member thereof comprises an aluminum nitride, a silicon carbide, an aluminum oxide, and a beryllium oxide etc.. As one material example for the heat dissipation fin 7, it can use the above stated electrically insulated ceramics or a metallic ceramics. The lead wire, which is connected to the input/output electrode portion of the semiconductor element 1 and is provided on a flexible insulated substance member. The flexible insulated substance member (the carrier film) 4 means that the lead wires are formed with the wiring patterns in which the electrical conductive substance such as copper is formed on polyimide film etc. according to the prior method such as a printing, a vapor deposition or an etching, for example. The electrical connection for the carrier film 4 to the semiconductor element 1 and an outside terminal such as the wiring substrate (a circuit substrate) is carried out respectively through the formation of the solder bumps 3. As the package member of the semiconductor device in the present invention, the insulated resin composition material is preferably used. As an insulated resin composition material for the package member, an epoxy system resin composition material is used, such an epoxy system resin composition material is used generally as the package member for the semiconductor device. In particular, as a filler material for the epoxy system resin composition material, silica and quartz glass etc. are blended. In particular, since the ball type fusion silica can be blended more than 80 wt.%, it is preferred because the thermal expansion coefficient is low and the crack hardly occurs at an adhesion boundary to the semiconductor element 1. Also, the resin composition material having the low thermal expansion, except for the above resin composition material, or the rubber system resin composition material having the low young coefficient etc. may be used as the resin composition material for the package member in the present invention. As the method for exposing the rear surface of the face in which the heat dissipation body is mounted on the semiconductor element 1 at the side of the face of the above stated package member, it is carried out according to the manufacturing process shown in the flow-charts in Figs. 2A-2E. Further, besides the package member using the resin composition material, the package member may be composed of the metallic material or the ceramics. In such a case, it is necessary to expose the rear surface of the heat dissipation body being mounted on the semiconductor element 1 at the side of face of the package member similar to that of the package member using the resin composition material. In the present invention, the fixing means 9 for fixing the above stated package member to the wiring substrate is formed integrally on the package member, and the concrete example for the fixing means 9 will be explained in the latter stated various embodiments. Since the carrier film 4 is used as the electrical connection means for connecting the input/output electrode portions of the semiconductor element 1 to the outside terminals (lead wires) of the package member, the number of the input/output electrode portions can be increased widely. Since the rear surface of the heat dissipation body 7, in which the semiconductor element 1 is mounted, is exposed at the side of the face of the package member, the heat dissipation effect in the semiconductor element 1 having the large heat generation amount can be attained fully. In particular, even the heat dissipation body comprises the large weighted dissipation fin structure, since the heat dissipation body can fixed to the circuit substrate to be mounted by the fixing means 9, a high fixing and supporting reliability can be obtained. By this structure, since no load for supporting the package member to the carrier film 4 is burdened, the reliability for the electrical connection can be heighten effectively. Herein-after, the package structure type semiconductor device and the electronic apparatus using the package structure type semiconductor device in the present invention will be explained according to the concrete embodiments. Embodiment 1 Fig. 1A is a cross-sectional schematic view showing a semiconductor device having a package structure according to the present invention. Fig. 1B is an upper face view in the state in which a dissipation fin 7 is removed from the above stated Fig. 1A. A semiconductor element 1 comprising a silicon chip is fixed to an electrically insulated base body 5 with an adhesion layer 2. In this embodiment, the electrically insulated base body 5 comprises an electrical insulated heat dissipation body comprising an aluminum nitride (AℓN) sintering body. The thermal expansion coefficient of the AℓN sintering body is 3.4 x 10 -6 /°C, and is closely to the thermal expansion coefficient of the silicon chip which comprises the semiconductor element 1. The AℓN sintering body has hardly the occurrence of the thermal stress and is superior as the base body for mounting the semiconductor element 1. In particular, even a chip area of the large scale semiconductor element 1 is of more than 100 mm 2 , a joining reliability thereof can be obtained fully. Further, since the thermal conductivity of the AℓN sintering body has a large value of 200 W/mK, it is possible to transfer a heat, which generates during an operation of the semiconductor element 1, to the heat dissipation fin 7 which is made of a metallic material of aluminum and copper etc. or a high thermal conductivity ceramics etc., so that the semiconductor device having a high heat dissipation characteristic property can be obtained. For this reason, it is possible to mount the semiconductor element 1 having the heat generation amount of more than 5 W. Besides, in this embodiment, AℓN material is used as the electrically insulated base body 5, however it may use a silicon carbide (SiC) sintering body having a high thermal conductivity. SiC sintering body has the extremely high thermal expansion coefficient of 3.7 x 10 -6 /°C and the extremely high thermal conductivity of 270 W/mK, therefore the thermal resistance thereof can be made small. In particular, it is superior in the mechanical strength, the water-proof, and the chemical resistance, and it is superior as a base body material for the semiconductor element 1. As the base body material, besides of the above stated materials, the electrically insulated material having the thermal expansion coefficient similar to that of silicon and the thermal conductivity of more than 160 W/mK may be used. In the present invention, a rear surface of the semiconductor element mounting face of the electrically insulated base body 5 is constituted so as to expose toward a surface of the package member. The heat dissipation fin 7 is formed corresponding to the heat generation amount of the semiconductor element 1. In such a case, the heat dissipation fin 7 may be formed integrally with the electrically insulated base body 5 or the separately formed dissipation fin may be joined to the rear surface of the electrically insulated base body 5 as shown in Fig. 1A. Further, since about half portion of the surface of the package member is formed by ceramics, it is superior in the damp-proof in comparison with the package member being formed wholly by the resin composition material. Input/output electrode portions, which are formed in the surface of the semiconductor element 1, are connected electrically to inner ends of the printing pattern (lead wire), which are formed on the carrier film 4, through the solder bumps 3. As a method for electrically connecting the input/output electrode portions on the semiconductor element 1 and the lead wires of the carrier film 4 through the solder bumps 3, there has been known an CCB method (Control Collapse Bonding : United States Patent No. 3,429,040). This method is the electrically connecting method in which, so as to not flow out the fused solder, the electrical connection between the semiconductor element 1 and the carrier film 4 is carried out by the solder having a ball shaped and a constant dimension. Further, the other outer ends of the printing pattern (lead wire), which are formed on the carrier film 4, is made to appear the outside of the package member, so that the package structure is formed by encapsulating a resin composition material 8 with which the semiconductor element 1 is encapsulated integrally. By using the carrier film 4, it is possible to provide the semiconductor device having a large number (more than 400) of the input/output electrode portions of the semiconductor element 1. The carrier film 4, which is extruded toward the outside of the package structure, is connected to the input/output terminals of the circuit substrate on which the package structure is mounted. Since the above stated carrier film 4 has a low dielectric conductivity lower than that of the material in which a metallic thin film wiring is formed on the ceramics, there is few the delay in the propagation time on the electrical signal. The fixing means 9 in Fig. 1A and Fig. 1B are one example showing a fixing means for fixing the package member to another circuit substrate on which the above stated package structure is mounted. Through holes 9a provided on the fixing means 9, the mechanical fixing is carried out to fix to the circuit substrate by the screw fixing etc.. Further, as a fixing method, besides the above stated screw fixing, it may fix through the adhering method using the adhesion agent. As the above stated adhesion agent, it can use an epoxy system resin composition material. The lead frame in the conventional semiconductor device serves as the electrically connection and the supporting and fixing for the semiconductor device. There is the possibility of the reliability on the electrically connection because that the outside force adds to the package structure or, in case of the large weighted package member having the heat dissipation fin, the large burden force adds to the electrical portion. However, in the package member of the present invention, the unnecessary force does not add to the wiring pattern portion by the provision of the fixing means 9. Accordingly, the number of the input/output electrode portions can increase enough this part. Further, since the fixing means 9 are formed to extrude toward the outer side from the outer end portion of the carrier film 4, there has an effect for protecting the damage at the bent break-down etc. of the wiring pattern portion and thereby the handling can be improved. Next, one example of the manufacturing processes for the semiconductor device according to the present invention is shown in Figs. 2A-2E. Process (1) shown in Fig. 2A: The semiconductor element 1 is fixed by an Au/Si solder 2 to the electrically insulated base body 5 in which the surface thereof is polished to be flat. Further, the solder excluding the Au/Si solder may employ, however, it may use as the solder which has a higher melting temperature point than that of the solder bump 3. Process (2) shown in Fig. 2B: The rear surface of the electrically insulated base body 5, on which the semiconductor element 1 is mounted, is inserted into a lower portion mold 10 for encapsulating the resin composition material so as to expose toward the surface of the package structure after the resin composition material encapsulating. Process (3) shown in Fig. 2C: The carrier film 4 has a patterning wiring fitted to the input/output electrode portion disposition of the semiconductor element 1 in advance, and the solder bump 3, which is formed at the inner end lead wire portion of the carrier film 4, is connected to put a position with the input/output electrode portion of the semiconductor element 1 together by the solder bumps 3 through heating and melting. In this case, as the solder for the solder bump 3, it uses a solder having a melting temperature to not remelt the Au/Si solder, by which the above stated semiconductor element 1 is adhered to the electrically insulated base body 5. The electrical connection may be carried out before the insertion to the lower portion mold 10. Process (4) shown in Fig. 2D: The upper portion mold 11 for encapsulating the resin composition material 8 is installed, and the encapsulating resin composition material 8 is filled up into a mold being constituted of the upper portion mold 11 and the lower portion mold 10 through an injecting port G. The filling up of the resin composition material 8 is carried out through the ordinary transfer molding method. Further, when the injecting resin composition material 8 is a liquid state, it is carried out through the potting method. In this molding process by the encapsulating resin composition material 8, the fixing means 9 are formed integrally with the package member. In this embodiment of the present invention, the four fixing means 9 having the through holes 9a are formed at the four corner portions of the package member. The four fixing means 9 extend respectively toward the diagonal line. (see Fig. 1B). Process (5) shown in Fig. 2E: After the resin composition material 8 is heated at a predetermined temperature and is harden, by the removal of the molds 10 and 11 the resin composition material package structure type semiconductor device according to the present invention can be obtained. The semiconductor device obtained through the above stated processes, as shown in Fig. 3, is held temporarily at a predetermined position on a circuit substrate 12 and the fixing means 9 are fixed through the through hole 9a to the circuit substrate 12 by means of the screw. The outer end portion of the carrier film 4 is bent toward a side of the circuit substrate 12 and the electrically connection is obtained on a wiring pattern portion 13 on the circuit substrate 12, which is provided on the circuit substrate 12, by the solder etc.. In the above stated manufacturing processes, since the semiconductor element 1 is fixed to the electrically insulated base body 5 and further the carrier film 4 is sandwiched by the molds 10 and 11, the movement of the semiconductor element 1 and the carrier film 4 do not occur through the injection of the encapsulating resin composition material 8, therefore the electrical connection between the semiconductor element 1 and the carrier film 4 is not damaged. After the package structure assembly, the cooling (dissipation) fin 7 is joined by the adhesion agent and the solder etc. to the electrically insulated base body 5 which exposes toward the surface of the package member. Since the package member is fixed to the circuit substrate 12 through the fixing means 9, no force is added to the carrier film 4 for connecting the package member and the circuit substrate 12. Accordingly, it is possible to employ the heavy weight metallic fin member comprising such as copper. Embodiment 2 Fig. 4 is a cross-sectional schematic view showing another semiconductor device. A resin composition encapsulating type is semiconductor device having the package structure shown similar to the above stated Embodiment 1. The rear surface exposed from the package member of the electrically insulated base body 5, on which the semiconductor element 1 is mounted, is fixed toward a side of the circuit substrate 12. When the package member is mounted on the circuit substrate 12, a filling-up agent 15 such as the thermal conductive grease is applied to the surface of the exposed electrically insulated base body 5 and the package member is adhered to the circuit substrate 12. Thereby, the heat generated in the semiconductor element 1 is diffused to the circuit substrate 12 through the electrically insulated base body 5 and the heat is dissipated from the rear surface of the circuit substrate 12. In this case, it is preferred to provide a number of the metal layers or the metal layer having a high metal volume percent on the circuit substrate 12 so that the heat can be spread widely. Further, a copper plate 14 as the heat dissipation plate is provided closely to the rear surface of the circuit substrate 12, the heat dissipation effect can be heighten moreover. Further, it is possible to provide further a heat dissipation means, if necessary. Similar to the above stated Embodiment 1, the package member is fixed to the circuit substrate 12 through the fixing means 9 which are mounted separately against the wiring pattern portion. Further, as the thermal conductive grease, it may be used the grease to which the powder comprising a metal, an aluminum and a SiC (silicon carbide) etc. is blended. Embodiment 3 Fig. 5 is a cross-sectional schematic view showing another semiconductor device, similar to the Embodiment 1, the resin composition encapsulating type semiconductor device having the package structure is shown. A plurality of the semiconductor elements 1a and 1b are mounted on the electrically insulated base body 5. The heat generation amount in each of the semiconductor element 1a and 1b may differ by the respective semiconductor element. It is desirable to dispose the semiconductor element 1a having the largest heat generation amount, for example a logic LSI (Large Scale Integration), at a central portion of the package structure and to dispose the semiconductor elements 1b having the smallest heat generation amount, for example an DRAM (Dynamic Random Access Memory), at a peripheral portion of the package structure. Since the plurality of the semiconductor elements 1a and 1b are received in the single package member and are connected through the carrier film 4, the number of the input/output electrode portions of the semiconductor elements 1a and 1b can be made small toward the outside of the package member, further the propagation delay in the electrical signal across between the package structure can be small. Comparing to the conventional wiring method using the wire bonding method, the packaged wiring through the carrier film 4 can be manufactured easily and it is superior in the quality control aspect. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. In this embodiment of the present invention, the electrically insulated base body 5 having the wide area is used so as to mount the plurality of the semiconductor elements 1a and 1b. For this reason, the size of the package structure is made large and heavy. However, by the provision of the fixing means 9, the fixing means 9 are fixed to the circuit substrate 12, accordingly an unnecessary outside force does not add on the carrier film 4, and the reliability for the electrical connection can be heightened. Fig. 6 is a schematic perspective view in which the semiconductor devices according to the present invention are installed practically to the electronic computer. The semiconductor devices A shown in the above stated Embodiments are mounted with necessary numbers on plug-in card 16a or 16b which is formed respectively by a multi-layer circuit substrate. The plug-in card 16a and 16b are connected to a back board 18 through a connector means 17. In this practical installation, it is constituted of two stages comprising an upper portion plug-in card 16a group and a lower portion plug-in card 16b group. By a blower (not shown) provided on a lower portion of a casing of the computer, a cool air cools semiconductor devices A which are mounted on the lower portion plug-in card 16b group, and passes through a cross-flow board 19, and thereafter cools the semiconductor devices A which are mounted on the upper portion plug-in card 16a group. Fig. 7 is a partially cross-sectional schematic view showing the above stated cross-flow board 19. The cross-flow board 19 adjusts the non-uniformity in the temperature distribution of the cool air caused by cooling of the semiconductor devices A, which are mounted on the lower portion plug-in card 16b group, and send toward the upper portion plug-in card 16a group. Further, by the provision of another system duct in the cross-flow board 19, the refrigerant or the cool air passes through, and then the cross-flow board 19 is cooled. Therefore, it can cool effectively the semiconductor devices A which are mounted on the upper portion plug-in card 16a group. Further, as the semiconductor devices A, the logic package structure type semiconductor device, an VR (Vector Resistor) package structure type semiconductor device, the main memory package structure type semiconductor device, and the extension memory package structure type semiconductor device are mounted on the high integration logic plug-in card. As the logic package structure type semiconductor device, such a logic LSI (Large Scale Integration), VRLSI (Vector Resistor Large Scale Integration) are used, as the main memory package structure type semiconductor device, such an MS (Main Storage) module is used and as the extension memory package structure type semiconductor device, such an DRAM (Dynamic Random Access Memory) is used, respectively. These package structure type semiconductor devices are mounted on the circuit substrate through the surface practical installation method, the axial practical installation method, and the both sides practical installation method etc.. Accordingly, using devices according to the present invention, one can obtain an electronic computer having a small size and a large capacity compared with the conventional electronic computer. Embodiment 4 Fig. 8A is a cross-sectional schematic view showing the assembly method for another semiconductor device having the package structure, and Fig. 8B is a top view thereof. The semiconductor element 1 is fixed on the electrically insulated base body 5 similar to the Embodiment 1. The wiring pattern is formed on the carrier film 4 in advance and is connected to each of the input/output electrode portions of the semiconductor element 1 through the solder bumps 3, and the package member is constituted of an insulated cap 23 comprising the organic composition material such as an epoxy resin system composition material. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 having the through hole 9a is formed integrally with the insulated base body 5. Further, it is fixed to another circuit substrate through the fixing means 9 which are formed on one part of the insulated base body 5 in advance. Embodiment 5 Fig. 9 is a cross-sectional schematic view showing another semiconductor device having the package structure. The semiconductor element 1 is fixed on the electrically insulated base body 5 similar to the Embodiment 1 and has the electrical connection with the inner end (lead wire) portion of the carrier film 4. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the insulated cap 23. The semiconductor element 1 is covered by a gel member 22 so as to improve the damp-proof. The insulated cap 23 having the fixing means 9 to the circuit substrate is joined and encapsulating by an organic system adhesion agent 20. Since the electrically insulated base body 5 and the insulated cap 23 are constituted of ceramics, it is superior in the damp-proof as compared with the resin composition material package structure type semiconductor device. Embodiment 6 Fig. 10 is a cross-sectional schematic view showing another semiconductor device having the package structure. The semiconductor element 1 is fixed on the electrically insulated base body 5 similar to the Embodiment 1 and has the electrical connection with the carrier film 4. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. The package member has the convex shape fixing means 9 and is fixed tightly through inserting into concave portions 9b which are provided at the corresponding portion of a wiring enlargement substrate 25. The wiring pattern is enlarged in the wiring enlargement substrate 25 and connected to a plurality of pins 26 as the input/output electrode portions, which are disposed in the rear surface of the wiring enlargement substrate 25. The pins 26 are connected by inserting to a predetermined portion in the circuit substrate 12. In this embodiment of the present invention, in case that there are many input/output electrode portions of the semiconductor element 1, so as to make small the size of the package member, it is desirable to make narrow the wiring space of the electric wiring pattern in the carrier film 4. However, in a case that the wiring space of the electric wiring pattern in the carrier film 4 is narrow, there happens a difference between the wiring space of the electric wiring pattern of the carrier film 4 and the wiring space of the electric wiring pattern which is formed on the circuit substrate 12 for connecting the carrier film 4. In a case that there is a difference between the wiring space of the carrier film 4 and the wiring space of the circuit substrate 12, then the carrier film 4 and the circuit substrate 12 are connected each other, the wiring space of the electric wiring pattern of the carrier film 4 can adjust to meet the wiring space of the electric wiring pattern of the circuit substrate 12 utilizing the wiring enlargement substrate 25 according to this embodiment of the present invention. Further, it has a good compatibility by mounting the circuit substrate 12 through the pins 26. Embodiment 7 Fig. 11 is a cross-sectional schematic view showing another semiconductor device having the package structure. The semiconductor element 1 is fixed on the electrically insulated base body 5 similar to the Embodiment 1 and has the electrical connection with the wiring which is formed on the carrier film 4. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. At the peripheral edge portion in the electrically insulated base body 5 of the semiconductor device according to this embodiment, the encapsulating resin composition material 8 having an ⊐ shape portion 8a is formed. Therefore, there is no possibility that the electrically insulated base body 5 may come off from the package member. Embodiment 8 Fig. 12A is a cross-sectional schematic view showing another semiconductor device having the package structure. The semiconductor element 1 is fixed on the electrically insulated base body 5 similar to the Embodiment 1 and has the electrical connection with the carrier film 4. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. In this semiconductor device of this embodiment of the present invention, a plurality of penetrating holes 5a are formed on parts of the electrically insulated base body 5 as shown in Fig. 12B. The resin composition material 8, which has inserted in these penetrating holes 5a, has the anchor effect, so that there is no possibility that the electrically insulated base body 5 may come off the package member. Embodiment 9 Fig. 13 is a cross-sectional schematic view showing another semiconductor device having the package structure. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. A plurality of concave portions 5b are formed at parts of the semiconductor element mounting face of the electrically insulated base body 5 in the semiconductor device. The resin composition material 8, which has inserted in these concave portions 5b, has the anchor effect, therefore there is no possibility that the electrically insulated base body 5 may come off from the package member. Embodiment 10 Fig. 14 is a cross-sectional schematic view showing another semiconductor device having the package structure. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. Since the thickness of the electrically insulated base body 5 of the semiconductor device is made thick, it has a large heat dissipation effect because that the heat from the semiconductor element 1 is diffused fully in the electrically insulated base body 5. Embodiment 11 Fig. 15 is a cross-sectional schematic view showing another semiconductor device having the package structure. In this embodiment of the present invention, the surface of the electrically insulated base body 5 is exposed on the surface of the package member, and the fixing means 9 is formed integrally with the resin composition material 8. A metal layer is formed by the metallization at a face of the side of the semiconductor element 1 of the electrically insulated base body 5 in the semiconductor device. This metal layer is connected by a lead wire 24 for grounding which is formed on the carrier film 4. By this structure, it can obtain the semiconductor device having a stable characteristic against the voltage fluctuation etc.. Further, a metal plate, in which the face of the side of the semiconductor element 1 is processed insulatedly, may use in replace of the electrically insulated base body 5. Besides, one example of the carrier film 4 used in this embodiment is shown in Fig. 16. Fitting to the input/output electrode portions of the surface of the semiconductor element 1, the carrier film 4 forming the wiring pattern has the electrode pads corresponding the solder bumps 3 which are arranged regularly on the surface of the semiconductor element 1. Further, the carrier film 4 may be made of the multi-layer wiring structure. Embodiment 12 Similar to the Embodiment 1, the semiconductor element is fixed to the electrically insulated base body, the fixing for the circuit substrate of the package member in the semiconductor device having the electrical connection with the wiring pattern, which is formed on the carrier film, is carried out a resin composition material system adhesion agent. In the above stated embodiment, it carries out easily in the manufacture aspect in comparison with the screw-setting method for the fixing means 9 in the Embodiment 1.

Claims: A semiconductor device having a package structure comprising a heat dissipation body (5), a semiconductor element (1) having input/output electrode portions and being mounted on a first portion of the heat dissipation body (5), a package member (8) packaging the semiconductor element (1), the heat dissipation body (5) being disposed on a surface of the package member (8), a member (4) of flexible insulating substance being inserted into the package member (8) and also extending out of it and having lead wires (24) connected to the input/and output electrode portions of the semiconductor element (1), the lead wires (24) on the flexible insulating substance member (4) being directly electrically connectable to the wiring substrate (12), characterized in that the package member (8) has fixing means (9) fixing the package member (8) to a wiring substrate (12), the fixing means (9) extending outwardly from at least a portion of the package member (8) different from that portion of the package member (8) from which the flexible member (4) extends. A semiconductor device package according to claim 1, characterized in that the heat dissipation body (5) is an electrically insulated base body (5). A semiconductor device package according to claim 2, characterized in that the electrically insulated body (5) has a dissipation fin member (7) mounted on a surface of the electrically insulated base body (5). A semiconductor device package according to claim 3, characterized in that the electrically insulated base body has a thermal conductivity of above 160 W/mK at a room temperature, the semiconductor element has a heat generation amount of above 5 W, and the dissipation fin member cools the semiconductor element (1) so as to maintain a temperature of below 85 °C during an operation of the semiconductor element (1). A semiconductor device according to claim 1, characterized in that the package member is constituted of an insulated resin composition material. A semiconductor device package according to claim 5, characterized in that the heat dissipation body further has a dissipation fin member (7). A semiconductor device package according to claim 6, characterized in that the semiconductor element has more than 400 input/output electrode portions, and the semiconductor element has a heat generation amount of above 5 W. A semiconductor device package according to claim 2, characterized in that the electrically insulated base body comprises at least one of an aluminum nitride sintering body, a silicon carbide sintering body, an aluminum oxide sintering body and a beryllium oxide sintering body, said electrically insulated base body having a thermal conductivity of above 160 W/mK, the semiconductor element is a silicon chip member (1), the package member (8) is constituted of an epoxy system resin composition material, the insulated substance member is a carrier film member (4), and the fixing means (9) is formed on the package member (8). A semiconductor device package according to claim 8, characterized in that the package member (8) is an insulated cap member (23). A semiconductor device package according to claim 9, characterized in that the fixing means (9) is formed integrally with the insulated cap member (23). A semiconductor device package according to one of the claims 8 to 10, characterized in that a dissipation fin member (7) for dissipating heat generated in the electrically insulated base body (5) is provided on the electrically insulated base body (5).

Inventors: MIYOSHI TADAHIKO, OTSUKA KANJI, TANAKA AKIRA, YAMADA KAZUJI, MIYOSHI, TADAHIKO, OTSUKA, KANJI, TANAKA, AKIRA, YAMADA, KAZUJI
Applicants: HITACHI LTD, HITACHI, LTD.
Application year: 1990
Main classification: H01L23
IPC codes: H01L23, H01L21, H05K3