Plastic molded type semiconductor device

Abstract: A first high-power element chip (13) having high current consumption is mounted and fixed of a first bed portion (12) on a heat radiating fin (11) by soldering. A second high-power element chip (17) is mounted and fixed by high-temperature die bonding on a second bed portion (16) formed by denting a part of one end of a lead frame (15) made of a metal thin plate, and an insu­ lating paste (19) is filled between the lower surface of the second bed portion (16) and the upper surface of the first bed portion (12). In addition, a logic element chip (22) is mounted and fixed on one end of another lead frame (20) made of a metal thin plate by a conduc­ tive adhesive (23) such as a silver paste.

Description: The present invention relates to a plastic molded type semiconductor device, and more particularly, to a multichip plastic molded type semiconductor device. A multichip plastic molded type semiconductor device wherein a plurality of semiconductor chips are sealed in a package is conventionally known. As conventional multichip plastic molded type semiconductor devices, there are a semiconductor device wherein a plurality of logic element chips each having low current consumption are sealed and a semiconductor device wherein a plurality of high-power element chips each having high current consumption are sealed. However, in the conventional semiconductor device, semiconductor chips of different types such as a logic element chip and a high-power element chip cannot be sealed in the same package. In a conventional multichip semiconductor device, semiconductor devices to be sealed are classified by current consumption, and chips of the same type are sealed in one package due to the following reason. A high-power element chip having high current consumption must have a heat radiating fin for radiating heat generated from the chip, and the fin is used as a common mounting region (bed portion) for semiconductor chips. For this reason, in order to uniform chip potentials of a plurality of chips, chips of the same type must be mounted. If a logic element chip having low current consumption is mounted on the heat radiating fin serving as the bed portion, the logic element chip is influenced by heat generated from a high-power element chip to cause degradation of electric characteristics of the logic element chip or a change in its characteristics. In addition, the heat radiating fin serving as the bed portion is normally made of a conductive material such as a metal. Therefore, when a plurality of semiconductor chips are mounted on the heat radiating fin, these chips are difficult to be electrically isolated from each other. As a countermeasure to this, the semiconductor chips may be fixed on the heat radiating fin using an insulating substrate or an insulating paste. For example, in a multichip plastic molded type semiconductor device constituted by only a plurality of high-power element chips, the former method, i.e., the method using an insulating substrate, can be employed to a multichip plastic molded type semiconductor device constituted by only a plurality of high-power element chips. However, since the insulating substrate is used, production cost is increased. Thus, this method avoids to provide low-price products. On the other hand, in the latter method, since the insulating paste is used, an electrode cannot be extracted from the lower surface of the semiconductor chip. Since the high-power element chip generates a large amount of heat and an electrode must be extracted from the lower surface of the semiconductor chip, a fixing method by soldering or a eutectic die bonding method which has excellent ohmic characteristics and thermal conductive characteristics is used as a means for fixing a semiconductor chip on a bed portion. Contrast to this, in a logic element chip which generates a small amount of heat, in order to obtain an inexpensive product, bonding using a conductive adhesive is used. For this reason, if a multichip plastic molded type semiconductor device in which a high-power element chip and a logic element chip are hybridized is formed, an assembling process is complicated due to different die bonding methods for different types of chip, thereby increasing production cost. In addition, a conductive adhesive has poor thermal resistance to cause degradation of the adhesive and a change in properties of the adhesive. Even if one die bonding method is used, characteristics of the chips are degraded, and the production cost is increased. As described above, conventionally, a multichip plastic molded type semiconductor device in which a plurality of semicondutor chips of different types such as a high-power element chip and a logic element chip are sealed in a single package is difficult to be realized. In addition, in a multichip plastic molded type semiconductor device in which a plurality of high-power element chips are sealed, an insulating substrate must be used, and the product is expensive. High-power element chips of different types are difficult to be mounted in a single package. From FR-A-2 618 944 a resin molded semiconductor device is known, having a plate-like metal heat radiating fin whose upper surface serves as a first semiconductor chip mounting surface, a first semiconductor chip mounted to one portion of said upper surface of the fin, a lead frame comprising a plurality of thin terminal leads which are arranged with at least their inner ends generally parallel to and above the fin; one of the terminal leads having a plate-like inner end so as to provide a second semiconductor chip mounting surface at a second portion of said upper surface of the fin, said second semiconductor chip mounting surface being parallel to the fin; a second semiconductor chip bonded to the second semiconductor chip mounting surface using an electrically conductive adhesive; and electrically insulating member provided between the lowest surface of the bent portion of said one terminal lead and said upper surface to thermally bond said second semiconductor chip to said fin. The present invention has been made in consideration of the above points, and has as its object to provide a low-cost (low production cost) multichip plastic molded type semiconductor device wherein a plurality of high-power element chips of different types or a combination of a plurality of high-power element chips and at least one logic element chip can be mounted in a single package. According to the present invention, this object is solved by a plastic molded type semiconductor comprising: a plate-like metal heat radiating fin whose upper surface serves as a first semiconductor chip mounting surface; a first semiconductor chip mounted to one portion of said upper surface of the fin; a lead-frame comprising a plurality of thin terminal leads which are arranged with at least their inner ends generally parallel to and above the fin; one of the terminal leads having its inner end providing a second semiconductor chip mounting surface at a second portion of said upper surface of the fin, said second semiconductor chip mounting surface being parallel to the fin; a second semiconductor chip bonded to the second semiconductor chip mounting surface using an electrically conducting adhesive; an electrically insulating member which is provided between the lower surface of the inner end of said one terminal lead and said upper surface to thermally bond said second semiconductor chip to said fin, characterized in that said one terminal lead has its said inner end bent to come close to the fin. Fig. 1 is a sectional view showing an element structure of a plastic molded type semiconductor device according to an embodiment of the present invention; and Fig. 2 is a perspective view showing the outer appearance of the plastic molded type semiconductor device of the above embodiment. A plastic molded type semiconductor device according to an embodiment of the present invention will be described below with reference to the accompanying drawings. As shown in Fig. 1, a first high-power element chip 13 having high current consumption is mounted and fixed on a first bed portion 12 of a heat radiating fin 11 for mounting a semiconductor chip by, e.g., soldering. A solder material used for soldering the first high-power element chip 13 is represented by reference numeral 14 in Fig. 1. A part of one end of a lead frame 15 formed by, e.g., punching out a metal thin plate is bent, and a second high-power element chip 17 is mounted and fixed on a second bed portion 16 bent to come close to the heat radiating fin 11 by, e.g., high-temperature die bonding. For example, an Au-Si eutectic material used for the high-temperature die bonding is represented by reference numeral 18 in Fig. 1. For example, an insulating paste 19 is filled between the lower surface of the second bed portion 16 and the upper surface of the first bed portion (the heat radiating fin 11). For this reason, the second bed portion 16 and the first bed portion electrically insulated from each other. In addition, a third bed portion 21 is set in a predetermined region on one end of another lead frame 20 which is different from the above lead frame 15 and made of a metal thin plate. On the third bed portion 21, a logic element chip 22 having low current consumption is mounted and fixed by a conductive adhesive 23 such as a silver paste. Note that although only two lead frames are shown in Fig. 1, a required number of other lead frames (not shown) adjacent to the lead frames 15 and 20 are arranged. Wires (not shown) are connected to upper electrodes (not shown) of the semiconductor chips 13, 17, and 22. The chips are electrically connected to each other by these wires, and other lead frames different from the lead frames 15 and 20 are electrically connected to the chips by these wires. The resultant structure is entirely sealed by an insulating synthetic resin material (insulating plastic) to form a package 24. A plurality of lead frames 25 such as the lead frames 15 and 20 are led out from two side surfaces of the package 24 to oppose each other, as shown in Fig. 2. The semiconductor device according to this embodiment is a DIP (Dual In Line) type semiconductor device. In the plastic molded type semiconductor device with the above structure, the first high-power element chip 13 mounted on the first bed portion 12 of the heat radiating fin 11 and the second high-power element chip 17 mounted on the second bed portion 16 formed by denting the lead frame 15 can be electrically insulated from each other without using an insulating substrate. Heat radiating paths of the high-power element chips 13 and 17 are described as follows. Heat generated from the first power element 13 is radiated through the heat radiating fin 11, and heat generated from the second high-power element chip 17 is radiated through the heat radiating fin 11 and the lead frame 15. In this case, when the insulating paste 19 has excellent heat resistance and heat conductive characteristics, the present invention is further effective. In addition, since the high-power element chips 13 and 17 are mounted on the bed portions 12 and 16 electrically insulated from each other, different types of chips can be used as both the high-power element chips 13 and 17. Since the high-power element chips 13 and 17 are fixed by soldering or high-temperature die bonding using a eutectic material, electrodes and the like can be extracted from the lower surfaces of the high-power element chips 13 and 17. Thus, a multichip plastic molded type semiconductor device in which high-power element chips of plural types are sealed can be provided at a low production cost. In the above embodiment, the logic element chip 22 having low current consumption is sealed in addition to the high-power element chips 13 and 17. The logic element chip 22 can be sealed with the high-power element chips 13 and 17 by using the third bed portion 21 set on the lead frame 20. Conventionally, since adhesive properties of a conductive adhesive serving as a means for fixing a logic element chip are degraded due to a temperature and characteristics of the logic element chip are changed and degraded, the logic element chip is difficult to be mounted with a high-power element chip in a single package. As described above, according to the present invention, since the lead frame 20 is used as a bed portion, the logic element chip 22 is thermally and electrically insulated from the first and second bed portions 12 and 16 for mounting the high-power element chips 13 and 17. Thus, since the first and second bed portions for mounting the high-power element chips are thermally and electrically insulated from the third bed portion for mounting the logic element chip, both the logic element chip having low current consumption and the high-power element chip can be mounted in a single package. When high-power element chips of different types and a logic element chip are mounted in a single package, semiconductor devices ranging from a plastic molded type semiconductor device having a function of driving an electric driving part such as an electric motor to a high-performance plastic molded type semiconductor device such as a CPU having an arithmetic function can be provided. According to the present invention, even such a high-performance plastic molded type semiconductor device can be provided at a low production cost, i.e., a low price. Note that, in the above embodiment, the present invention is employed to a DIP plastic molded type semiconductor device but is not limited to the DIP type. For example, the present invention may be employed to an SIL (Single In Line) type semiconductor device. In addition, the present invention can be employed to semiconductor devices in which lead frames are extracted from three side surfaces of a package and in which lead frames are extracted from four side surfaces of a package, i.e., a QFP (Quad Flat Package) type, or the present invention can also be applied to other types of semiconductor devices than the above-described types. As described above, according to the present invention, there is provided a low-cost (low production cost) multichip plastic molded type semiconductor device wherein a plurality of different types of high-power element chips or a combination of a plurality of high-power element chips and at least one logic element chip can be mounted in a single package. Reference signs in the claims are intended for better understanding and shall not limit the scope.

Claims: A plastic molded type semiconductor comprising: a plate-like metal heat radiating fin (11) whose upper surface serves as a first semiconductor chip mounting surface; a first semiconductor chip (13) mounted to one portion (12) of said upper surface of the fin (11); a lead-frame comprising a plurality of thin terminal leads (15, 20) which are arranged with at least their inner ends generally parallel to and above the fin (11); one of the terminal leads (15) having its inner end providing a second semiconductor chip mounting surface (16) at a second portion of said upper surface of the fin (11), said second semiconductor chip mounting surface (16) being parallel to the fin (11); a second semiconductor chip (17) bonded to the second semiconductor chip mounting surface (16) using an electrically conducting adhesive; an electrically insulating member (19) which is provided between the lower surface of the inner end of said one terminal lead (15) and said upper surface (12) to thermally bond said second semiconductor chip to said fin (11), characterized in that said one terminal lead (15) has its said inner end bent to come close to the fin (11). A device according to claim 1, characterized in that a third semiconductor chip mounting portion (21) electrically and thermally insulated from said fin (11) is set on another one (20) of said plurality of leads (15, 20), and a third semiconductor chip (22) is mounted on said third semiconductor chip mounting region (21) through a conductive adhesive (23). A device according to claim 1, characterized in that said first semiconductor chip (13) and said second semiconductor chip (17) are high-power element chips each generating a relatively large amount of heat. A device according to claim 4, characterized in that said first semiconductor chip (13) and said second semiconductor chip (17) are different types of high-power element chips to which chip potentials need be independently supplied. A device according to claim 2, characterized in that said third semiconductor chip (22) is a logic element chip generating a relatively small amount of heat.

Inventors: ISHIGAMI TOSHIO C O INTELLECTU, ISHIGAMI, TOSHIO, C/O INTELLECTUAL PROPERTY DIV.
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1990
Main classification: H01L23
IPC codes: H01L23, H01L25, H01S5