Output stage for telephone interface circuit and telephone interface circuit

Abstract: An output stage of a telephone interface circuit comprises an output pair of operational amplifiers (A₁, A₂) controlled by a controlling operational amplifier (A₃) which has a non-inverting input terminal (+) connected to a source of signals. The inverting input terminal (-) and the output terminal of the controlling operational amplifier (A₃) are connected to a reference voltage (V REF ) through a constant current generator (I p ) and a first resistance (R₁), respectively. A second resistance (R₂) is connected between the output and inverting input terminals of the amplifier (A₃). Another resistance (R₄) is connected between the inverting input terminal and the constant current generator. A diode (D₁) and a Zener diode (D Z ) are connected in series between the constant current generator and the output terminal.

Description: The present invention relates to an output stage for a telephone interface circuit for connection between a telephone subscriber line and a telephone exchange. Such an output stage may be arranged to supply the subscriber line with a constant voltage at its terminals. The present invention also relates to a telephone interface circuit. A two-wire telephone line used to connect subscribers' telephones to a telephone exchange may be supplied by a continuous voltage generator in series with which are connected other generators of voltage signals such as speech band conversation signals, ringing signals and, if necessary, signals to indicate charging of subscribers. When the subscriber line is supplied with a constant voltage at its terminals, the fundamental requirements for the recognition of the weaker signals and accurate reproduction of their waveform even over long distances are the accuracy and constancy in time of the value of the supply voltage applied to the line. An increase in the accuracy and stability of the line supply voltage reduces the difficulties of designing and constructing the telephone system connected to it. JP-A-57188173 discloses an arrangement in which output amplifiers 2 and 3 are driven in antiphase by an amplifier 1 having inverting and non-inverting outputs. One of the output amplifiers (2) receives a DC reference voltage V+, whereas the other output amplifier (3) receives a DC reference voltage V₋. In modern monolithic integrated circuits known by the name SLIC ("Subscriber Line Integrated Circuit"), the generator of the continuous voltage supply to the subscriber line is generally made from a pair of operational amplifiers whose output terminals are coupled to the terminals of the line. The operational amplifiers are controlled in such a way that, in the absence of a signal, they maintain at their output terminals different potentials which are constant with respect to a reference potential and therefore supply a constant voltage to the line. By using operational amplifiers, a signal may be sent along the line simply by applying the signal to the non-inverting input of one of the two operational amplifiers, thus obtaining at the output the superimposition of a signal voltage on the continuous line supply voltage. Figure 1 of the accompanying drawings is a circuit diagram of an output stage, which may be a monolithic integrated circuit, for a telephone interface circuit, which may be used as mentioned previously for both the supply to a subscriber line and the sending of a signal along the line. First and second operational amplifiers A₁ and A₂ are connected between first and second terminals GND and V BAT of a supply voltage generator. Each of the operational amplifiers has a non-inverting input terminal, indicated by "+", an inverting input terminal, indicated by "-", and an output terminal which is connected to the inverting input terminal and forms a terminal for coupling to the subscriber line which is not shown in Figure 1. A third operational amplifier A₃ also has a non-inverting input (+), an inverting input (-), and an output terminal, connected to a signal source S, a reference voltage V REF through a constant current generator I p , and to the non-inverting input terminal of the operational amplifier A₁, respectively. The signal source S also represents the stages which precede the output stage and are used for the generation and amplification of signals. The reference voltage V REF maintains a potential somewhat higher than that of the GND terminal of the supply voltage generator, so that the constant current generator I p may operate correctly. The reference voltage may be produced by a second source of supply to the interface circuit. The output terminal of the operational amplifier A₃ is connected to the first terminal GND of the supply voltage generator through a first resistance R₁. A second resistance R₂ is connected between the inverting input terminal and the output terminal of the operational amplifier A₃. The non-inverting input terminal of the operational amplifier A₂ is connected to the first and second terminals of the supply voltage generator through a current generator V₁/R₁ and a third resistance R₃, respectively. The resistance R₃ may, however, also be connected to a reference voltage separate from the second terminal of the supply voltage. The voltage V₁ at the output of the operational amplifier A₃ is equal to the sum of the input signal voltage V in applied to the non-inverting terminal and the continuous voltage present across the resistance R₂: V 1 = V in - I p R 2 The current generator V₁/R₁ may be constructed, for example, as a current mirror circuit, so that it supplies a current whose instantaneous value is equal to that of the current flowing in the resistance R₁. Consequently, if R₃ = R₁, the voltage at the non-inverting input terminal of the operational amplifier A₂ is equal to the voltage V₁. Thus, the instantaneous voltage V L between the output terminals of the two operational amplifiers A₁ and A₂, with which voltage the subscriber line is supplied, is: V L = | V BAT | - 2I p R 2 + 2V in . The "battery voltage" V BAT is the supply voltage of the operational amplifiers A₁ and A₂, to whose output terminals the telephone line is connected. The value of the voltage V BAT is prescribed by the Telephone Authority as a design specification, and therefore the constant term 2I p R₂ is used to determine in a suitable way the value of the voltage applied to the line in the absence of signals. Since the telephone signals may have a voltage of the order of a number of volts (a typical value of | V BAT | may be 48 V), the voltage 2I p R₂ must also have a value of the order of a number of volts in order that the dynamics of the telephone signals may be maintained without difficulties. For this reason, the value of the voltage on the line depends to a not insignificant extent on the value of the constant current I p and of the resistance R₂. As stated previously, it is important for the efficiency of the whole system that the value of the supply voltage of the subscriber line should be as constant and accurate as possible, and therefore the value of the current I p must be kept constant even when the temperature varies and in the presence of jumps in the supply voltage of the interface circuit. Particularly when the circuit is of the monolithic integrated type, these requirements necessitate solutions in the form of complex circuits, with consequently higher costs of design and a greater occupation of integration area. According to a first aspect of the invention, there is provided an output stage as defined in the appended Claim 1. According to a second aspect of the invention, there is provided an output stage as defined in the appended Claim 4. According to a third aspect of the invention, there is provided a telephone interface circuit as defined in the appended Claim 5. Preferred embodiments of the invention are defined in the other appended claims. The invention will be further described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a circuit diagram of a known type of output stage as described hereinbefore; and Figure 2 is a circuit diagram of an output stage constituting an embodiment of the invention. The same references refer to corresponding parts in the figures. The output stage of Figure 2 differs from that of Figure 1 by the addition of a fourth resistance R₄, a diode D₁, and a Zener diode D z . As shown in Figure 2, the fourth resistance R₄ is connected between the inverting input terminal of the operational amplifier A₃ and the constant current generator I p and the diodes D₁, D z are connected in series between the output terminal of the operational amplifier A₃ and constant current generator I p . The cathode of the Zener diode D z and the cathode of the diode D₁ are connected to the constant current generator Ip and to the output terminal of the operational amplifier A₃, respectively. Alternatively, the anode of the diode D₁ and the anode of the Zener diode D z may be connected to the constant current generator I p and to the output terminal of the operational amplifier A₃, respectively, without altering the circuit operation. When producing an output stage in the form of a monolithic integrated circuit, however, the specialist in this field may encounter differences in convenience from the technological point of view. For the output stage of Figure 2: V 1 = V in - (V z + V D ) R 2 R 2 + R 4 where V z and V D are the voltages across the terminals of the diodes D z and D₁, respectively, with D z conducting in the reverse direction according to a characteristic of the Zener type and D₁ conducting in the forward direction. D z conducts in the reverse direction when: I p > V Z + V D R 2 + R 4 . Consequently, by appropriate specification of the constant current generator I p , taking into account the maximum possible variations of the value of the constant current and of the resistances R₂ and R₄, the output voltage V₁ may be kept independent of the current I p . Thus, greater precision of operation of the whole output stage is obtained, with consequent improved stability of the supply voltage supplied by the output stage to the subscriber line. There are consequent advantages for the planning and operation of the whole subscriber and exchange telephone system. Compared with the known output stage, the design of the output stage is simpler in circuit terms, because strict tolerances on the value of the constant current I p are not required. Further, when the output is embodied in monolithic circuit form, a larger integration area is not necessary, since the addition of another resistance, the diode and the Zener diode is completely compensated for by the greater simplicity of the circuit constituting the constant current generator I p . Moreover, the thermal coefficients of the two diodes are compensated, thus increasing the degree of independence of temperature variation.

Claims: An output stage for a telephone interface circuit for use between a subscriber line and a telephone exchange for supplying a substantially constant voltage to the line, the output stage comprising first and second operational amplifiers (A₁, A₂), each having a non-inverting input terminal (+), an inverting input terminal (-), and an output terminal connected to the inverting input terminal and for coupling to the subscriber line, the non-inverting input terminal (+) of the first operational amplifier (A₁) being connected to an output terminal of a third operational amplifier (A₃), which has a non-inverting input terminal (+) for coupling to a signal source (S) and an inverting input terminal (-) connected to a reference voltage (V REF ) through a constant current generator (I p ), the output terminal of the third operational amplifier (A₃) being connected to a first power supply terminal (GND) and to the inverting input terminal (-) of the third operational amplifier (A₃) through a first resistance (R₁) and a second resistance (R₂), respectively, the non-inverting input terminal (+) of the second operational amplifier (A₂) being connected to the first power supply terminal (GND) and a second power supply terminal (V BAT ) through a current generator (V₁/R₁) capable of supplying a current proportional to the current flowing in the first resistance (R₁), and a third resistance (R₃), respectively, characterised in that a fourth resistance (R₄) is connected between the inverting input terminal (-) of the third operational amplifier (A₃) and the constant current generator (I p ), and a diode (D₁) and a Zener diode (D z ) are connected in series between the output terminal of the third operational amplifier (A₃) and the constant current generator (I p ). An output stage as claimed in Claim 1, characterised in that the cathode of the diode (D₁) and the cathode of the Zener diode (D z ) are connected to the output terminal of the third operational amplifier (A₃) and to the constant current generator (I p ), respectively. An output stage as claimed in Claim 1, characterised in that the anode of the diode (D₁) and the anode of the Zener diode (D z ) are connected to the constant current generator (I p ) and to the output terminal of the third operational amplifier (A₃), respectively. An output stage for a telephone interface circuit for use between a subscriber line and a telephone exchange, comprising first and second operational amplifiers (A1, A2) having outputs for connection to the subscriber telephone line, and a third operational amplifier (A3) having an output coupled to a non-inverting input of the first operational amplifier (A1), to a first power supply terminal (GND) via a first resistance (R₁) and to an inverting input of the third operational amplifier (A3) via a second resistance (R₂), the inverting input of the third operational amplifier (A3) being connected to a constant current generator (I P ), characterised in that a further resistance (R4) is connected between the inverting input of the third operational amplifier (A3) and the constant current generator (I p ), and a zener diode (D₂) and a diode (D₁) are connected in series between the output of the third operational amplifier and the constant current generator (I p ). A telephone interface circuit characterised by including an output stage as claimed in any one of the preceding claims.

Inventors: LAGANA PAOLO, LARI FERDINANDO, PASETTI MAURO, SILIGONI MARCO, LAGANA, PAOLO, LARI, FERDINANDO, PASETTI, MAURO, SILIGONI, MARCO
Applicants: SGS THOMSON MICROELECTRONICS, SGS-THOMSON MICROELECTRONICS S.R.L.
Application year: 1990
Main classification: H04M19
IPC codes: H04Q3, H04M19