Method of processing substrate for semiconductor device

Abstract: A substrate suitable for use in a semiconductor device is prepared by subjecting the impurities in a substrate (1) at a lower concentration to diffusion, to form a more concentrated impurity layer at the opposed surfaces, and part of the thickness of the substrate is removed to expose a layer doped with the impurity at the lower concentration on one surface (B). The thus exposed surface is polished to provide the producting, having a varying concentration of impurities. The edges are bevelled at different angles (ϑϑ), before or after diffusion.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a method of processing a substrate for semiconductor device, and more specifically, to a method of beveling the substrate. Description of the Related Art Conventionally, a substrate for semiconductor device has been beveled so that the circumferential edges of the front and back surfaces thereof is made substantially symmetrical. This beveling process is usually carried out using a diamond grindstone having a U- or V-shaped groove edge provided around the outer circumference thereof in such a manner that the diamond grindstone is brought into contact with the substrate for semiconductor device and they are rotated about axes disposed in parallel each other, and thus the periphery of the substrate for semiconductor device is formed to a wedge-shaped cross section. Since the wedge-shaping is performed by the beveling process, it is called a beveled portion, which is relatively smaller in size in the case of a discrete semiconductor substrate as compared with that of a semiconductor substrate for integrated circuits (IC) and mainly intends to prevent the substrate for semiconductor device from being chipped off while it is handled in the fabrication of IC. This beveling is usually carried out in the fabricating processes of a substrate for semiconductor device just after a semiconductor monocrystal has been cut or after it has been further subjected to a lapping process. The beveling process is carried out at a relatively earlier stage of the fabricating process of the substrate for semiconductor device, because a grindstone having a grinding layer composed of relatively coarse fixed abrasive grains is used in the process, and thus the substrate is greatly damaged and coarse isolated grains are produced during the beveling process. A semiconductor discrete device is fabricated by a triple diffusion method, wherein, first, a substrate for semiconductor device cut off from a monocrystal is subjected to a grinding and/or etching process, and the dopant to form a collector region is diffused into the bulk of the substrate through both the surfaces at an elevated temperature. Next, about a half of the thickness of the substrate is ground and removed (hereinafter, referred to as half-off) from only one surface thereof, the inner low concentrated impurity layer (same as the impurity species and concentration of the monocrystal) of the substrate is exposed, the substrate is ground while accurately controlling the thickness (usually, referred to as x 1 ) of the low impurity layer, and further diffusions for base and emitter regions are performed through limited openings on the exposed surface to finally obtain the semiconductor discrete device. Since the beveling process is carried out to the substrate before it is subjected to diffusion or after it has been subjected thereto in the fabricating processes of the semiconductor discrete device, a technical problem arises in a conventional beveling method. Prior art will be described based on the description of, for example, Japanese Examined Patent Publication No. 6⊘-58579. Figure 3 shows a substrate 21 for semiconductor device having unsymmetrical beleved portions 21a and 21b respectively formed on the front and back surfaces thereof. The beveled portions 21a and 21b are formed using a rotary grindstone 22 shown in Figure 4. The beveled portion 21a and 21b of the substrate 21 for semiconductor device are arranged as follows. Assuming that the beveled portion 21a on the surface of the substrate from which a diffused layer has been ground and removed (hereinafter, referred to as a front surface) has a beveled width w 1 and a beveled depth of d 1 , and the beveled portion 21b on the back surface has a beleved width w 2 and a beveled depth d 2 , an arrangement is such that w 1 w 2 , d 1 d 2 , and the angle  1 between the inclining surface and the main surface of the beveled portion 21a of the front surface [ 1 = arc tan(d 1 /w 1 )] is equal to the angle  2 between the inclining surface and the main surface of the beveled portion 21b of the back surface [ 2 = arc tan(d 2 /w 2 )]. Note that, in this case, the beveled width w 2 of the beveled portion 21b of the back surface must be set to a prescribed value or a value larger than it to prevent the substrate 21 for semiconductor device from being chipped off through handling. According to this technology, a part of the beveled portions 21a and 21b is left on the front and back surfaces of the substrate 21 for semiconductor device even after the front and back surfaces of the substrate 21 for semiconductor device have been lapped to the levels A 1 and A 2 which are shallower than the beveled depths d 1 and d 2 , the front surface has been removed (half-off) to the surface B which is shallower than the beveled depth d 2 , and then the substrate has been polished, whereby the chip-off of the substrate 21 for semiconductor device can be effectively prevented in the following process. Nevertheless, the following problems arise in the prior art. The beveled angle  1 of the front surface must be a prescribed value or a value less than it, because the beveled depth d 1 of the front surface is made large so that a part of the beveled portion 21a is left after the substrate has been subjected to the half-off and polishing, and further the beveled portion 21b of the back surface has the beveled width w 2 which is set to a prescribed value or a value larger than it, as described above. Under these circumstances, if the beveled angle  1 of the front surface and the beveled angle  2 of the back surface are set to the same value, as described above, the wedge-like periphery of the substrate is made considerably sharp. As a result, the circumferential edge of the substrate 1 for semiconductor device are liable to be chipped off. Further, according to the substrate 21 for semiconductor device of the above technology, the beveled widths w 1 and w 2 of both the surfaces must be differently formed, and thus when a substrate 41 for semiconductor device (numeral 41 is used to discriminate this substrate from the substrate 21 for semiconductor device to which the beveled portions 21a and 21b have been formed) is processed to form the beveled portions 21a and 2lb, as shown in Figure 4, in such a manner that they are simultaneously formed by a grindstone 22 having the grinding surface which contour is predetermined to conform with the dimensional requirements of the periphery of the beveled substrate 21 for semiconductor device, the corner of the front surface having the larger beveled width is first abutted against the grinding surface 22a of the grindstone 22. Thereafter, the corner of the back surface having the smaller beveled width is next abutted against the grinding surface 22c of the grindstone 22. As a result, downward pressure from the grinding surface 22a is left not neutralized until after the corner of the front surface has gone toward the grinding surface 22a and the corner of the back surface is abutted against the grinding surface 22c. Therefore, the substrate 21 for semiconductor device is sometimes chipped off while it is in a beveling process. Reference is made to Brieger et al , IEEE Transactions on Electron Devices, Vol. ED-31, No. 6, June 1994, US-A-4 630 093 and US-A-3 495 138 as disclosures of asymmetric bevelling. Reference is also made to FR-A-2 531 108 and IBM Technical Disclosure Bulletin, Vol. 25, No. 9, Feb. 1993 as disclosures of chamfering or rounding peripheral edges of semiconductor wafers to prevent chipping thereof. Reference is made to EP-A-0 393 951 which is included in the state of the art according to Article 54(3) EPC. SUMMARY OF THE INVENTION It is an object of the present invention, which has been achieved taking into consideration the above problems arisen particularly in a beveling method applied to a substrate for semiconductor device to which collector diffusion has been finished or is not finished, that is, the substrate for a power transistor by so called the triple diffusion method, to provide a method of processing a substrate for semiconductor device capable of effectively preventing the substrate from being chipped off. Other objects and novel advantages of the present invention will be apparent from the following description and accompanying drawings of this specification. The above object is met by the process defined in claim 1. Before both surfaces of a substrate for semiconductor device are subjected to diffusion or after they have been subjected thereto, beveled portions are formed to have such a contour of the periphery of the substrate as a beveled depth of the surface to be half-offed (hereinafter, referred to as a front surface) of the substrate is made larger than that of the surface (hereinafter, referred to as a back surface) of the substrate, and an angle between an inclining surface and a main surface of the beveled portion of the front surface is made larger than that of the beveled portion of the back surface. The respective angles of the substrate mentioned above are set such that the front and back surfaces have substantially the same width. The beveled portions on the front and back surfaces are simultaneously formed by a grindstone having the grinding surface corresponding to the profile of the periphery of the substrate which is formed after the substrate has been processed. Since beveled portions are formed to have such a peripheral contour of the substrate as the angle between the inclining surface and the main surface of the beveled portion on the front surface is made larger than that of the beveled portion on the back surface, and a beveled depth of the front surface side is made larger than that of the back side surface, the strength of the circumferential edges is increased, whereby the substrate for semiconductor device is effectively prevented from being chipped off when it is in a beveling process itself. Further, there is an advantage in that when both surfaces of the substrate are successively subjected to diffusion, the occurrence of the chip-off of the substrate is greatly prevented in the handling of the substrate in the diffusion, or in the handling thereof when about a half of the front surface of the substrate is removed. Furthermore, since the beveled substrate for semiconductor device has the beveled portion properly left after half-off at the circumferential edge of the front surface thereof to prevent the substrate from being chipped off in the following process, the front surface has the same effect as that of the back surface. Further, since the beveled portions formed on both main surface of the substrate have the same beveled width, the beveled portions of the front and back surfaces are simultaneously formed by a grindstone having the grinding surface corresponding to the profile of the periphery of the substrate which is formed after the substrate has been processed. Since the corners of the front and back surfaces are simultaneously abutted against the grinding surface of the grindstone, the grinding operation of the substrate is simultaneously carried out and finished at both the edges. As a result, while the beveled portions are ground, pressure originated from one of the grinding surfaces being ground is always counterbalanced by that from the other grinding surface being ground, whereby the occurrence of strain due to grinding and the chip-off of the substrate for semiconductor device can be prevented during the operation. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a diagram showing the circumferential portion in the vicinity thereof of a substrate for a semiconductor device prepared according to the present invention; Figure 2 is a diagram showing a substrate for a semiconductor device in the vicinity of a grinding surface of a grindstone used to bevel off the circumferential edge of the substrate for a semiconductor device; and Figure 3 is a diagram showing the circumferential portion and the vicinity thereof of a conventional substrate for a semiconductor device. Figure 4 is a diagram showing a substrate for a semiconductor device in the vicinity of a grinding stone used in a conventional method. DESCRIPTION OF THE PREFERRED EMBODIMENTS An example of a method of processing the periphery of a substrate for a semiconductor device according to the present invention will be described below with reference to drawings. Figure 1 shows the state of the substrate for semiconductor device of the embodiment before it is subjected to a half-off process. In the figure, numeral 1 designates the substrate for semiconductor device, and beveled portions 1a and 1b are formed around the circumferential edges thereof. The substrate 1 for semiconductor device can be, for example, an intermediate member of a substrate used to form a discrete semiconductor device having the beveled portions 1a and 1b arranged unsymmetrically. More specifically, in the substrate 1 of this embodiment, the beveled portions 1a and 1b formed around the circumferential edges of the front and back surfaces have the same beveled widths w 3 and w 4 , and the beveled portions 1a and 1b are arranged such that they have different beveled depths d 3 and d 4 . The circumferential edges of the substrate provided with the beveled portions 1a and 1b are rounded with the radies of curvatuire of R1 and R2, respectively. These radii of curvature of R1 and R2 are formed simultaneously when the beveling process is carried out or by a mechanical and/or chemical erosion process independently of the beveling process. More specifically, the beveled depth d 3 of the front surface is set to such a value that permits a part of the beveled portion to be left after the substrate has been subjected to lapping, grinding for half-off, and polishing. The beveled depth d 4 of the beveled portion 1b is set to such a value that permits a part of the beveled portion to be left when it is lapped. On the other hand, the width w 4 of the beveled portion 1b of the back side is set to a value capable of preventing the chip-off of the substrate 1 or to a value larger than it. The beveled width w 4 is finally determined in relation to the beveled depth d 4 . Further, the front beveled width w 3 is made equal to the above beveled width w 4 . More specifically, they are set such that the beveled angle  3 of the front surface [ 3 = arc tan(d 3 /w 3 )] is larger than the beveled angle  4 of the back surface [ 4 = arc tan(d 4 /w 4 )]. No problem arises if the beveled angle  3 of the front surface is made larger than the beveled angle  4 of the back surface, as described above. This is because that since the accuracy of photolithography technology required in the fabricating process of a semiconductor integrated device is not required in the fabricating process of a discrete semiconductor device, it is sufficient only if the beveled portions can prevent the occurrence of chip-off due to a mechanical shock mainly caused in the fabricating process thereof, and a strict profile is not required thereto. Next, a method of processing the above substrate 1 for semiconductor device will be described with reference to Figure 2. First, an ingot of a silicon monocrystal is cut in round slices from a cylindrical crystal to provide a substrate 11 for semiconductor device having a prescribed thickness (numeral 11 is used to discriminate this substrate from the substrate 1 for semiconductor device to which the beveled portions 1a and 1b have been formed). Next, the beveled portions 1a and 1b are formed using a grindstone 2 shown in Figure 2. To describe here the grinding surfaces 2a, 2b, and 2c of the rotary grindstone 2 shown in Figure 2, the configuration of the grinding surfaces 2a, 2b, and 2c of the grindstone 2 has a geometrical agreement with the configuration of the periphery of the substrate 1. More specifically, the configuration of the grinding surface 2a, 2b, and 2c of the grindstone 2 is such that the circumferential edges of the substrate 1 of the embodiment fit therewith. When the above substrate 1 for semiconductor device is ground using this grindstone 2, the substrate 11 is gradually moved in the direction toward the rotary axis of the grindstone 2, while it is rotated in the direction opposite to that of the grindstone 2, whereby the beveled portions 1a and 1b are formed at the circumferential edges of the substrate 11. The substrate for a semiconductor device 1 is obtained as described above. The obtained substrate is processed, for example, as follows. For example, the front and back surfaces of the substrate for semiconductor device 1 are lapped until they reach levels A 1 and A 2 , respectively. Further, the front surface of the substrate for semiconductor device 1 is removed (half-off) until a level B is reached, and thereafter the half-off surface is polished. During the time of the course, the outermost rounded portions of the beveled portions 1a and 1b are left as they were. The following effects can be obtained by the manufacturing method of substrate 1. Since the angle  3 between the inclining surface and the main surface of the front beveled portion 1a (the beveling angle of the front surface) is made larger than the angle  4 between the inclining angle and the main surface of the back beveled portion 1b (the beveling angle of the back surface), the thickness of the tip of the periphery of the substrate for semiconductor device 1 is increased and thus the strength of the circumferential edge is increased by the increase in the thickness. As a result, the occurrence of chip-off of the substrate of semiconductor device 1 can be effectively prevented in processes the substrate encounters. Further, the beveled portions 1a and 1b formed on the front and back surfaces has the same widths w 3 and w 4 , and thus when the beveled portions 1a and 1b of the front and back surfaces are simultaneously formed using the grindstone having the grinding surfaces 2a, 2b, and 2c which will fit dimensionally the periphery of the substrate 1 for semiconductor device after it is finished, the edges of the front and back surfaces are simultaneously abutted against the grinding surfaces 2a and 2c of the grindstone 2, whereby the grinding operation thereof is simultaneously carried out and finished at both the edges. As a result, while the beveled portions 1a and 1b are ground, the pressure coming from one of the surfaces being ground is always counterbalanced by that of the other surface being ground, whereby the occurrence of strain due to grinding and the chip-off of the substrate for semiconductor device can be prevented during the operation. Further, according to the above manufacturing method, since the beveled portions 1a and 1b of the front and back surfaces are simultaneously formed by the grinder 2 having the grinding surfaces 2a, 2b, and 2c which is in a geometrical agreement to the profile of the circumferential edges of the substrate 1 for semiconductor device after it is finished, the edges of the front and back surfaces can be simultaneously abutted against the grinding surfaces 2a and 2c of the grindstone 2, and further the grinding operation is simultaneously carried on and finished. As a result, the occurrence of strain due to grinding and the chip-off of the substrate 1 for semiconductor device can be prevented. The effects provided by the typical inventions disclosed in this application will be simply described below. According to the present invention, when a substrate for semiconductor device used for a substrate for a discrete semiconductor device is bevelled, the depth of bevelling at the edge is larger than at the surface that is not removed; the angle between the bevelled surface and the main surface to be removed is larger than the angle of bevelling at the non-removed (back) surface. The bevelling is conducted before or after the dopant in the substrate precursor is subjected to diffusion. By comparison with a substrate in which the angles of bevelling are the same and the larger of the two different angles, the thickness of the periphery of the substrate is greater, and thus the strength of the circumferential edge of substrate is greater. Chipping is thus reduced or effectively prevented in processes prior to, during or after a half-off process. The bevelled portions formed on both main surfaces of the substrate precursor have the same width; thus, when the bevelled portions of the removed and non-removed surfaces are simultaneously formed by using a grindstone having a grinding surface geometrically complementing the profile of the periphery of the substrate which is formed, the edges of the removed and non-removed surfaces are simultaneously in contact with the grinding surface of the grindstone, so that the grinding operation is conducted and finished at both edges simultaneously. As a result, the forces exerted at the surfaces being ground are balanced, whereby the occurrence of strain due to grinding and chipping of the substrate can be reduced or prevented.

Claims: A method of processing a substrate for use in or as a semiconductor device, the substrate having opposed first and second surfaces and being doped with impurity, the method comprising: (a) subjecting the substrate to diffusion of impurity through both of its surfaces thereby concentrating the impurity at those surfaces; (b) before or after the diffusion, simultaneously bevelling the circumferential edge of both the first and second surfaces to provide first and second bevelled portions (1a,1b) inclined at an acute angle ( 3 , 4 ) below their respective surfaces, wherein the widths (w 3 ,w 4 ) of the first and second bevelled portions in a direction parallel to the first and second surfaces are equal, the angle of bevelling at the first surface is greater than that at the second surface, and the ends of the bevelled portions are separated at the outer periphery of the substrate by a thickness of at least one-third of the thickness (T) of the substrate; (c) removing substantially half the thickness of the substrate, from the first surface, to reveal a new surface having a lower concentration of impurity than either of the first and second surfaces; and (d) polishing the said new surface, wherein at least part of the first bevelled portion remains after steps (c) and (d). A method according to claim 1, wherein the first of the said angles is more than 30°, and the second of the said angles is from 15° to less than 30°. A method according to claim 2, wherein the first of the said angles is more than 35°. A method according to claim 2 or claim 3, wherein the second of the said angles is less than 25°. A method according to any preceding claim, wherein the ends of the bevelled portions are separated by a thickness of one-half of the initial thickness (T) of the substrate.

Inventors: KIMURA HIROKAZU, KIMURA, HIROKAZU, Kimura, Hirokazu, c/o Naoetsu Electronics Co.
Applicants: NAOETSU DENSHI KOGYO KK, SHINETSU HANDOTAI KK, NAOETSU ELECTRONICS COMPANY, SHIN-ETSU HANDOTAI COMPANY LIMITED
Application year: 1990
Main classification: H01L21
IPC codes: H01L29, H01L21, B24B9