Speech recognition system having speech registration function based on twice utterance of word

Abstract: In a speech recognition system where a speech analyzer (12) analyzes an input utterance to produce an input speech pattern which is memorized in an input memory (14) as a memorized input pattern, a pattern comparator (16) comparing the memorized input pattern with reference patterns previously memorized in a reference pattern memory (15) and producing pattern dissimilarities between them, and a speech deciding circuit (18) deciding the minimum pattern dissimilarity to thereby recognize the input utterance, a word is uttered twice during a registration mode in order to correctly register the speech pattern of the word the reference pattern memory (15). Speech patterns of the first and the second utterances of the word are memorized in the reference pattern memory (15) and the input memory (14) as first and second memorized patterns, respectively, which are compared with each other at the pattern comparator (16) to produce a pattern dissimilarity. A registration deciding circuit (19) is selectively coupled to the pattern comparator (16) during the registration mode and decides whether or not the pattern dissimilarity is larger than a predetermined reject value and permits one of the first and the second memorized patterns to be registered as a reference pattern into the reference pattern memory (15) when the pattern dissimilarity is not larger than the reject value.

Description: The present invention relates to a speech recognition system having a reference pattern memory for storing a plurality of reference speech patterns, and, in particular, to the storing of spoken words in the reference pattern memory. A known speech recognition system has an input device responsive to speech uttered as a speech input for converting the speech input into an electrical signal as an input speech signal representative of the speech input. A pattern analyzer receives the speech input signal and analyzes the input speech pattern representative of the speech input. An input memory receives and stores the input speech pattern signal as a memorized pattern. A pattern comparator compares the memorized pattern with each one of the reference speech patterns in the reference memory and produces pattern dissimilarities between the memorized pattern and the reference speech patterns. A speech deciding circuit receives and compares the pattern dissimilarities with one another and determines which one of the pattern dissimilarities is the smallest, in order to recognize the speech input. For registration of a spoken word in the reference pattern memory as one of the reference patterns, the pattern analyzer is switched over from the input memory to the reference pattern memory. Then the word is uttered and the speech is converted into the input speech signal at the input device. The pattern analyzer analyzes the input speech signal and produces the input speech pattern. The input speech pattern is supplied to and stored in the reference pattern memory as a reference pattern. Since the registration of a spoken word is carried out with only one utterance of the word, undesired sound or noise is also registered together with the speech if it occurs at the utterance of the word. As a result, an erroneous speech pattern is unfortunately registered. This makes recognition of the word incomplete. EP-A-0 135 046 describes a pattern storing arrangement for use in a speech recognition system. In use, at least three speech inputs are supplied in succession to a microphone. Each speech input is an utterance of a single word or a single succession of several words. The at least three speech inputs are intended to be identical to each other. The microphone, in response to a speech input, supplies an electrical signal to an analyzer that produces in response a speech pattern. The speech pattern consists of a sequence of feature vectors. Each vector has sixteen components. The sequence is made up of the succession of vectors produced one after the other at a frame period of about 20 milliseconds throughout the duration of the electrical signal. The at least three speech patterns are stored temporarily in a voice pattern memory. A similarity measure calculator calculates a similarity measure for each pair that can be selected from the at least three speech patterns. The similarity measure may be a distance representative of the dissimilarities of the two patterns concerned. A dynamic programming algorithm may be used. If the at least three speech patterns are identical, the calculated distances will each be zero. Assuming that in practices the distances are not all zero, a sum of the distances of each speech in turn from the others is calculated, so that there are at least three such sums. For example, if the distances between a first speech pattern, A1, and another three A2, A3 and A4, are respective D12, D13 and D14, then the sum for A1 is D1=D12+D13+D14. The four sums D1,D2,D3 and D4 are stored and a selector incorporating a comparator compares these sums, selects the smallest, and produces a signal indicative of the speech pattern having the smallest sum. A pattern storing unit responds to this signal by storing the indicated speech pattern as a reference pattern. According to one aspect of the present invention there is provided a method of registering a spoken word in a reference pattern memory of a speech recognition system, comprising steps of; producing a first speech signal for the word; analyzing said first speech signal to produce a first speech pattern representative of a pattern of said first speech signal; holding said first speech pattern as a first held pattern; producing a second speech signal for the same word; analyzing said second speech signal to produce a second speech pattern representative of a pattern of said second speech signal; holding said second speech pattern as a second held pattern; comparing said first and said second held patterns to produce a pattern dissimilarity between said first and said second patterns; comparing said dissimilarity with a predetermined maximum dissimilarity and (a) storing one of said first and said second speech patterns as a reference speech pattern in said reference pattern memory when said dissimilarity is smaller than said predetermined maximum dissimilarity and indicating completion of the operation for registration of the spoken word when said dissimilarity is smaller than said predetermined maximum dissimilarity; or (B) indicating retry of the operation for registration of the spoken same word when said dissimilarity is larger than said predetermined maximum dissimilarity. According to another aspect of the present invention there is provided a speech recognition system having means for registering a spoken word in a reference pattern memory means as a reference speech pattern during a registration mode, which comprises; input means responsive to a speech input for producing an input speech signal representative of said speech input, the input means producing a first and a second speech signal representative of a first spoken word and a second spoken word, respectively, which are repeated attempts to utter the same word during the registration mode; analyzing means coupled to said input means and responsive to each input speech signal for analyzing the input speech signal to produce an input speech pattern representative of a pattern of the input speech signal, the analyzing means being responsive to said first and second speech signals and analyzing said first and second speech signals to produce first and second speech patterns representative of said first and second speech signals, respectively; switch means coupled to said analyzing means for connecting the analyzing means to a selected one of an input memory means and said reference pattern memory means, the reference pattern memory means being selectively connected to the analyzing means for storing, as a first memorized pattern, one of said first and said second speech patterns which is applied from the analyzing means through the switch means during the registration mode, and the input memory means being selectively connected to said analyzing means for storing, as a second memorized pattern, another of said first and said second speech patterns which is applied from the analyzing means through the switch means during the registration mode; comparing means coupled to the reference memory means and the input memory means for comparing said first and second memorized patterns with each other to produce a pattern dissimilarity representing dissimilarity between said first and second memorized patterns; registration deciding means coupled to the comparing means for and adapted to compare said pattern dissimilarity with a predetermined maximum dissimilarity and to produce a registration signal for causing storing of one of said first and said second memorized patterns as a reference speech pattern in the reference pattern memory means when said pattern dissimilarity is smaller than said predetermined maximum dissimilarity, said registration deciding means producing a retry signal when said pattern dissimilarity is larger than said predetermined maximum dissimilarity; and retry indicating means responsive to the retry signal for indicating retry of the operation for registration of the spoken word. The invention will now be described by way of example with reference to the accompanying drawings, in which: Fig. 1 is a schematic block diagram view of a speech recognition system according to one embodiment of the present invention; Fig. 1a is a view illustrating an example of the reference pattern memory used in the system of Fig. 1; Fig. 2 is a schematic block diagram view of a pattern analyzer used in the system of Fig. 1; and Fig. 3 is a flow chart illustrating operation of a registration deciding circuit used in Fig. 1. Description of Preferred Embodiments The speech recognition system shown in Fig. 1 has a microphone 11 as an input device for converting an input speech utterance into an input speech signal. The input speech signal is applied to a pattern analyzer 12. The pattern analyzer 12 analyzes the input speech signal to produce an input speech pattern representative of the input speech signal, the frequency spectrum of the input speech signal being analyzed in known manner and converted into a feature vector as the input speech pattern. An example of the pattern analyzer 12 is illustrated in Fig. 2. The pattern analyzer 12 shown in Fig. 2 comprises a plurality of bandpass filters (sixteen filters shown at BPF1-BPF16) to which the input speech signal is applied, a plurality of lowpass filters (sixteen filters shown at LPF1-LPF16) coupled to the bandpass filters, respectively, a plurality of sample and hold circuits (sixteen circuits shown at S/H1-S/H16) coupled to the lowpass filters, respectively, a multiplexer (16ch MUX) coupled to the sample and hold circuits and an analog-digital convertor (A/D CONVERTOR). The input speech pattern is output by the analog-digital converter. Since this analyzer is well known in the art and since the present invention is not directed to the analyzer, no further description will be given of the analyzer. The pattern analyzer 12 is coupled to a switch 13 by which it can be selectively connected to an input memory 14 and a reference pattern memory (R.P.M.) 15. In a recognition mode of the system, the switch 13 is positioned to connect the pattern analyzer 12 with the input memory 14. The input memory 14 then receives the input speech pattern and stores the input speech pattern as a memorized pattern. The reference pattern memory 15 holds a plurality of reference speech patterns. A pattern comparator 16 reads the memorized pattern from the input memory 14 and also reads the reference speech patterns from the reference pattern memory 15 one after another. The pattern comparator 16 compares the memorized pattern with each one of the reference speech patterns and produces pattern dissimilarities, which are measures of the dissimilarities between the compared patterns. Since the pattern comparator itself is well known in the art and the present invention is not directed to the pattern comparator, no further description of the pattern comparator will be given here. The pattern comparator 16 may be a pattern comparator using the DP matching method is disclosed in US patent No. 4,882,756. The DP (Dynamic Programing) matching method is a typical one among various known techniques for the pattern comparison. A mode selector 17 is coupled to the pattern comparator 16 and selectively connects the pattern comparator 16 to one or the other of a speech deciding circuit 18 and a registration deciding circuit 19. During the recognition mode, the mode selector 17 connects the pattern comparator 16 with the speech deciding circuit 18. During the registration mode, the mode selector 17 connects the pattern comparator 16 with the registration deciding circuit 19. The speech deciding circuit 18 receives the pattern dissimilarities from the pattern comparator 16 through the mode selector 17 and determines which one of the pattern dissimilarities is the smallest, in order to recognize the input speech. The speech decision circuit 18 can be a comparator. That part of the system shown in Fig. 1 which comprises the microphone 11, the pattern analyzer 12, switch 13, the input memory 14, the reference pattern memory 15, the pattern comparator 16, and the speech deciding circuit 18 constitutes a known speech recognition system. In the known speech recognition system, the input speech is converted into the input speech signal at the microphone 11. The input speech signal is analyzed at the pattern analyzer 12 and converted to the input speech pattern. The input speech pattern signal is applied to the input memory 14 through the switch 13 and stored in the input memory 14 as the memorized pattern. The memorized pattern is compared with each of the reference speech patterns in the reference pattern memory 15 at the pattern comparator 16 and the pattern dissimilarities are produced. The pattern dissimilarities are processed at the speech deciding circuit 18 and the input speech is recognized. During the registration mode, the switch 13 is positioned to connect the pattern analyzer 12 with the reference pattern memory 15. Thus, the input speech pattern is registered as one of the reference patterns in the reference pattern memory 15. This registration operation has the problem as described in the preamble. According to the present invention, a spoken word to be registered is uttered twice, so that there is a first spoken word and a second spoken word. The first and the second spoken words are converted into first and second speech signals. The first and second speech signals are analyzed to produce first and second speech patterns. The first and second speech patterns are stored as first and second memorized patterns, in memories, respectively. The first and second memorized patterns are compared to produce a pattern dissimilarity (D) which is a measure of the dissimilarity between them. It is decided whether or not the pattern dissimilarity is larger than a predetermined acceptable maximum dissimilarity (R) which may be referred to as the reject value. When the pattern dissimilarity (D) is not larger than the predetermined acceptable maximum dissimilarity (R), one of the first and the second speech patterns is registered in the reference pattern memory as a reference pattern for the spoken word. On the other hand, when D is larger than R, no registration is carried out and a retry is indicated. In order to perform the above-described registration steps, the system shown in Fig. 1 further comprises the mode selector 17, the registration deciding circuit 19, and a controller 20. The controller 20 accommodates a registration key 21 and a recognition key 22 for selecting the registration mode and the recognition mode, respectively. When the recognition key 22 is operated, the controller 20 controls the switch 13 to connect the pattern analyzer 12 with the input memory 14 and also controls the mode selector 17 to connect the pattern comparator 16 with the speech deciding circuit 18. Then speech recognition is carried out in the known manner as described above. When the registration key 21 is operated, the controller 20 controls the mode selector 17 to connect the pattern comparator 16 with the registration deciding circuit 19. The controller 20 also controls the switch 13 to connect the pattern analyzer 12 with the reference memory 15 and thereafter, with the input memory 14. As a result, the first and the second speech patterns from the pattern analyzer 12 are applied to and stored in the reference pattern memory 15 and the input memory 14 as the first memorized pattern and the second memorized pattern, respectively. Referring to Fig. 1a, the reference pattern memory 15 comprises a plurality of locations #l to #n for storing a plurality of reference speech patterns, respectively. The first speech pattern is stored in a particular one of the locations #l to #n under control of the controller 20. The pattern comparator 16 reads out the first memorized pattern from the particular location in the reference pattern memory 15 under control of the controller 20 and also reads out the second memorized pattern from the input memory 14, and compares the first and the second memorized patterns to produce the pattern dissimilarity (D). The pattern dissimilarity is applied to the registration deciding circuit 19 (step 31 in Fig. 3) and is processed thereat. The registration deciding circuit 19 is formed of a comparator and has the predetermined acceptable maximum dissimilarity. The registration deciding circuit 19 compares the pattern dissimilarity (D) with the predetermined acceptable maximum dissimilarity (R) as shown at step 32 in Fig. 3. When the former (D) is not larger than the latter (R), the registration deciding circuit 19 delivers a registration signal to the controller 20 (step 33 in Fig. 3) and drives a registration indicator 23, as shown at step 34 in Fig. 3. The controller 20 controls the input memory 14 and the reference pattern memory 15 to store the second memorized pattern from the input memory 14 in the particular location of the reference pattern memory 15 as one of the reference speech patterns. Thus, the registration of the spoken word is completed and the completion is indicated by driving of the registration indicator 23. When the pattern dissimilarity (D) is larger than the predetermined acceptable maximum dissimilarity (R), the registration deciding circuit 19 delivers a reject signal to the controller 20 (step 35 in Fig. 3) and also drives the retry indicator 24, as shown at step 36 in Fig. 3. When the controller 20 receives the reject signal from the registration deciding circuit 19, the controller 20 controls the input memory 14 and the reference pattern memory 15 to transfer the second memorized pattern from the input memory 14 to the particular location in the reference pattern memory 15 as the first memorized pattern, and controls the switch 13 to maintain the connection of the pattern analyzer 12 with the input memory 14. Then a single utterance of the word is carried out to produce a retry speech input for the retry. The pattern of the retry speech input is applied to and stored in the input memory 14 as the second memorized pattern. Thereafter, the registration mode is continued as described until the registration is completed. In the embodiment shown in Fig. 1 and described hereinbefore, the registration indicator 23 and retry indicator 24 are directly driven by the registration deciding circuit 19. Alternatively, they may be controlled by the controller 20, as shown at 23' and 24'. The controller 20 then drives the registration indicator 23' and the retry indicator 24' in response to the registration signal and the reject signal from the registration deciding circuit 19, respectively. In a modification, when the controller 20 receives the registration signal from the registration deciding circuit 19, it may be arranged that the controller 20 controls the reference pattern memory 15 to register the first memorized pattern as one of the reference speech patterns. In response to the reject signal, the controller 20 does not access the input memory 14 and the reference pattern memory 15. Instead, the first and the second memorized patterns are maintained in the reference pattern memory 15 and the input memory 14, respectively. Then, the spoken word is uttered twice again to produce first and second speech inputs. The controller 20 controls the switch 13 to connect the pattern analyzer 12 with the reference pattern memory 15 and the input memory 14, alternatingly. Thereafter, the registering operation as described above is again carried out. In a further modification, the reference pattern memory 15 may comprise a reference memory area 15a for storing a plurality of reference patterns and a specific memory area 15b for storing the first speech pattern applied from the pattern analyzer 12 in the registration mode, as shown in Fig. 1. Then, in the registration mode, the comparator 16 reads the first memorized pattern from the specific memory area 15b under control of the controller 20 to compare it with the second memorized pattern. When the controller 20 receives the registration signal from the registration deciding circuit 19, the controller 20 controls the input memory 14 and the reference pattern memory 15 and stores the second memorized pattern from the input memory 14 in a particular location in the reference memory area 15a as one of the reference patterns. It may also be arranged that the controller 20 controls the reference pattern memory 15 alone and registers the first memorized pattern from the specific memory area 15b in the particular location in the reference memory area 15a. When the controller 20 receives the reject signal from the registration deciding circuit 19, the controller 20 controls the input memory 14 and the reference pattern memory 15 to transfer the second memorized pattern from the input memory 14 to the specific memory area 15b in the reference pattern memory 15 as the first memorized pattern prior to occurrence of a retry speech input. It may also be arranged so that the second memorized signal is not transferred to the specific area 15b from the input memory 14 but the first memorized signal is maintained as it was in the specific memory area 15b.

Claims: A method of registering a spoken word in a reference pattern memory (15) of a speech recognition system, comprising steps of; producing (11) a first speech signal for the word; analyzing (12) said first speech signal to produce a first speech pattern representative of a pattern of said first speech signal; holding (15) said first speech pattern as a first held pattern; producing (11) a second speech signal for the same word; analyzing (12) said second speech signal to produce a second speech pattern representative of a pattern of said second speech signal; holding (14) said second speech pattern as a second held pattern; comparing (16) said first and said second held patterns to produce a pattern dissimilarity between said first and said second patterns; comparing (19) said dissimilarity with a predetermined maximum dissimilarity and (a) storing one of said first and said second speech patterns as a reference speech pattern in said reference pattern memory (15) when said dissimilarity is smaller than said predetermined maximum dissimilarity and indicating (23) completion of the operation for registration of the spoken word when said dissimilarity is smaller than said predetermined maximum dissimilarity; or (b) indicating (24) retry of the operation for registration of the spoken word when said dissimilarity is larger than said predetermined maximum dissimilarity. A speech recognition system having means for registering a spoken word in a reference pattern memory means (15) as a reference speech during a registration mode, which comprises; input means (11) responsive to a speech input for producing an input speech signal representative of said speech input, the input means (11) producing a first and a second speech signal representative of a first spoken word and a second spoken word, respectively, which are repeated attempts to utter the same word during the registration mode; analyzing means (12) coupled to said input means (11) and responsive to each input speech signal for analyzing the input speech signal to produce an input speech pattern representative of a pattern of the input speech signal, the analyzing means (12) being responsive to said first and second speech signals and analyzing said first and second speech signals to produce first and second speech patterns representative of said first and second speech signals, respectively; switch means (13) coupled to said analyzing means (12) for connecting the analyzing means (12) to a selected one of an input memory means (14) and said reference pattern memory means (15), the reference pattern memory means (15) being selectively connected to the analyzing means (12) for storing, as a first memorized pattern, one of said first and said second speech patterns which is applied from the analyzing means (12) through the switch means (13) during the registration mode, and the input memory means (14) being selectively connected to said analyzing means for storing, as a second memorized pattern, another of said first and said second speech patterns which is applied from the analyzing means (12) through the switch means (13) during the registration mode; comparing means (16) coupled to the reference memory means (15) and the input memory means (14) for comparing said first and second memorized patterns with each other to produce a pattern dissimilarity representing dissimilarity between said first and second memorized patterns; registration deciding means (19) coupled to the comparing means (16) and adapted to compare said pattern dissimilarity with a predetermined maximum dissimilarity and to produce a registration signal for causing storing of one of said first and said second memorized patterns as a reference speech pattern in the reference pattern memory means (15) when said pattern dissimilarity is smaller than said predetermined maximum dissimilarity, said registration deciding means (19) producing a retry signal when said pattern dissimilarity is larger than said predetermined maximum dissimilarity; and retry indicating means (24) responsive to the retry signal for indicating retry of the operation for registration of the spoken word. A speech recognition system according to claim 2, characterised by control means (20) coupled to said registration deciding means (19) and responsive to said registration signal for controlling at least one of the input memory means (14) and the reference memory means (15) in order to store one of said first and said second memorized patterns as a reference speech pattern in the reference pattern memory means (15). A speech recognition system according to claim 3, characterised by key means (21) coupled to the control means (20) for selecting the registration mode by manual operation thereof, the control means (20) responding to manual operation of the key means (21) by controlling the switch means (13) to connect the analyzing means (12) to the reference pattern memory means (15) and the input memory means (14) alternately so that the first and second speech patterns are stored in the reference pattern memory means (15) and the input pattern memory means (14) as the first and second memorized patterns, respectively. A speech recognition system according to claim 4, characterised in that the reference pattern memory means (15) has a plurality of locations for memorizing a plurality of reference speech patterns, and the control means (20) is such as to cause the reference pattern memory means (15) to store the first speech pattern from the analyzing means (12) in a particular one of said locations in the reference memory means (15) as the first memorized pattern, and to cause the comparing means (16) to read said first memorized pattern from said particular location in the reference pattern memory means (15). A speech recognition system according to claim 5, characterised in that the control means (20) is such as to cause the input memory means (14) and the reference memory means (15) to transfer said second memorized pattern from the input memory means (14) to said particular location in the reference pattern memory means (15) as said reference pattern in response to said registration signal. A speech recognition system according to claim 4, characterised in that the reference pattern memory means (15) comprises a reference memory area (15a) and a specific memory area (15b), and the control means (20) is such as to cause the reference memory means (15) to store said first speech pattern from the analyzing means (12) in the specific memory area (15b) as said first memorized pattern, and to cause the comparing means (16) to read said first memorized pattern from the specific memory area (15b) of the reference pattern memory means (15). A speech recognition system according to claim 7, characterised in that the control means is such as to cause the reference memory means (15) to transfer said first memorized pattern from the specific memory area (15b) to the reference memory area (15a) as a reference pattern in response to said registration signal. A speech recognition system according to claim 7, characterised in that the control means is such as to cause the input memory means (14) and the reference memory means (15) to transfer said second memorized pattern from the input memory means (14) to the reference memory area (15a) in the reference pattern memory means (15) as a reference pattern in response to said registration signal. A speech recognition system according to claim 2, characterised by registration indicating means (23) responsive to said registration signal for indicating completion of registration of a spoken word. A speech recognition system according to claim 2, characterised in that the switch means (13) is constantly fixed to connect the analyzing means (12) to the input memory means (14) during a recognition mode, the input memory means (14) being then adapted to store, as a memorized pattern, said input speech pattern applied from the analyzing means (12) through the switch means (13), the reference pattern memory means (15) holds a plurality of reference speech patterns, the comparing means (16) is adapted to compare said memorized pattern with said reference speech patterns to produce pattern dissimilarities between said memorized pattern and said reference speech patterns, and in that the system further comprises; mode selecting means (17) connected to the comparing means (16) for connecting the comparing means (16) to the registration deciding means (19) during said registration mode but to a speech deciding means (18) during said recognition mode, the speech deciding means (18) being coupled to the comparing means (16) through the mode selecting means (17) for comparing said pattern dissimilarities with one another to select the smallest pattern dissimilarities, whereby speech input is recognized as the particular one of said reference speech patterns which gives the smallest dissimilarity. A speech recognition system according to claim 11, characterised by first key means (22) for selecting the recognition mode by manual operation thereof, and control means (20) coupled to the first key means (22) and responsive to said manual operation of the first key means (22) to cause the mode selecting means (17) to connect the comparing means (16) to the speech deciding means (18). A speech recognition system according to claim 12, characterised by second key means (21) for selecting the registration mode by manual operation thereof, and the control means (20) being coupled to the second key means (21) and responsive to said manual operation of the second key means (21) to cause the mode selecting means (17) to connect the comparing means (16) to the registration deciding means (19).

Inventors: SHIMADA KEIKO, SHIMADA, KEIKO, SHIMADA, KEIKO, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1990
Main classification: G10L5
IPC codes: G10L11, G10L15