Echo canceller having FIR and IIR filters for cancelling long tail echoes

Abstract: An echo canceller comprises a finite impulse response filter (6) connected to the incoming port of a hybrid (1), and a tail canceller (7) which includes an infinite impulse response filter (24; 40) having a multiplier (14; 33) for recursively multiplying an output digital symbol from the tapped-delay line (8) of the FIR filter with an attenuation coefficient R. A digital symbol from the IIR filter or one from the tapped-­ delay line (8) is multiplied with a tap-weight coefficient C i and summed with the outputs of tap-weight multipliers of the FIR filter to produce a replica of an echo symbol, which is subtracted from a digital symbol y n from the outgoing port of the hybrid (1), producing a residual echo symbol e n . The coefficient C i is derived from correlation between residual echo e n and a symbol from the tapped-delay line. In one embodiment, symbol from the tapped-delay line is further delayed (17) for a unit interval on the one hand, and multiplied (18) with coefficient R on the other, the difference between them being detected (19) and multiplied (20) with a coefficient K, which is either sgn(C i ) or 1/C i , to generate a multiplied difference. Correlation is detected (22) between the difference and residual echo e n to derive the coefficient R. In a second embodiment, symbol from the tapped-delay line is further delayed (36) for a unit interval and multiplied (37) with K to produce a delayed-­ multiplied symbol. Correlation is detected (35) between it and residual echo e n to derive the coefficient R.

Description: "Echo Canceller Having FIR and IIR Filters for Cancelling Long Tail Echoes" The present invention relates generally to echo cancellers for a digital communications system, and more particularly to an echo canceller capable of cancelling echoes having a long tail portion. Two-wire subscriber lines employing an echo canceller are known in the art. The echo canceller of this type has a nonrecursive, or finite impulse response (FIR) filter. Because of the finite number of tap weights, the whole shape of an echo cannot completely be cancelled if it has a long tail portion. A great number of tap weights must be required for complete cancellation of echoes. It is generally known that such a long-tail echo occurs due to the high-pass characteristic of a hybrid, or two-wire four-wire conversion circuit. A typical waveform of such long-tail echoes is one that adopts a negative exponential curve. While the main portion of such a waveform can be cancelled, the remaining tail portion lies outside the range of tap weight control of the FIR filter and remains uncancelled, causing residual echoes to accumulate if t > NT, where t is the length of an echo, T is a symbol interval and N is the number of tap weights. EP-A-0 281 101 (published on January 31, 1990) discloses an echo canceller which is capable of cancelling long-tail echoes. However, it needs two recursive filters (Infinite Impulse Response filter) to form a tail canceller in addition to a nonrecursive filter. It is therefore an object of the present invention to provide an echo canceller capable of cancelling long tail echoes with a simplified tail canceller. According to a first aspect of the invention, an echo canceller comprises a finite impulse response filter (FIR) and a tail canceller. The finite impulse response filter comprises a tapped-delay line connected to an incoming port of a hybrid, or two-wire four-wire conversion circuit, a plurality of first tap-weight multipliers connected respectively to the successive taps of the delay line for respectively multiplying successively delayed digital symbols with first tap-weight coefficients and an adder for summing the outputs of the first tap-weight multipliers. The tail canceller comprises an infinite impulse response filter having a second multiplier for recursively multiplying an output digital symbol from the tapped-delay line with a second, attenuation coefficient R. A third multiplier is included in the tail canceller for multiplying an output digital symbol of the IIR filter with a third, tap-weight coefficient C i and applying the multiplied output symbol to one input of the adder to cause it to produce a replica of an echo symbol which is subtracted from digital symbols supplied from an outgoing port of the conversion circuit, producing a residual echo symbol. A symbol appearing at the output end of the tapped-delay line is further delayed on the one hand, and multiplied with the second, attenuation coefficient R on the other. The difference between the delayed and multiplied symbols is detected and further multiplied with a coefficient K which varies as a function of the third, tap-weight coefficient C i to generate a multiplied difference. The first tap-weight coefficients of the FIR filter are derived from correlations between the residual echo symbol and the successively delayed digital symbols on the tapped-delay line. The second, attenuation coefficient R is derived from a correlation between the residual echo symbol and the multiplied difference. The third, tap-weight coefficient C i is derived from a correlation between the residual echo symbol and a digital symbol from the end of the tapped-delay line. According to a second aspect of the present invention, the tail canceller comprises a second multiplier which multiplies an output digital symbol from the end of the tapped-delay line of the FIR filter with a second, tap-weight coefficient C i , and an infinite impulse response filter having a multiplier for recursively multiplying the output of the second multiplier with a third, attenuation coefficient R and applying the multiplied output to one input of the adder to cause it to produce a replica of an echo symbol which is subtracted from digital symbols supplied from the outgoing port of the conversion circuit, producing a residual echo symbol. A digital symbol a n-N from the tapped-delay line of the FIR filter is further delayed and multiplied with the coefficient K to produce a symbol K × a n-N-1 . The second, tap-weight coefficient C i is derived from a correlation between the residual echo symbol and a digital symbol from the tapped-delay line, and the third, attenuation coefficient R is derived from a correlation between the residual echo symbol and the symbol K × a n-N-1 . The coefficient K is a signum function of coefficient C i , i.e., sgn(C i ) which is +1 when C i is greater than zero and -1 when C i is smaller than zero, or alternatively, the reciprocal of C i . The present invention will be described in further detail with reference to the accompanying drawings, in which: Fig. 1 is a block diagram of an echo canceller according to a first embodiment of the present invention; Figs. 2 and 3 are block diagrams of alternative forms of the first embodiment; Figs. 4A and 4B show details of the correlators of Fig. 1; Fig. 5 is a graphic representation of a computer simulation of the first embodiment; Fig. 6 is a block diagram of an echo canceller according to a second embodiment of the invention; and Fig. 7 is a graphic representation of a computer simulation of the second embodiment. Referring now to Fig. 1, there is shown an echo canceller according to a first embodiment of the present invention. The echo canceller is shown connected in a four-wire section of a two-wire four-wire conversion circuit, or hybrid 1 of a digital transmission system. Hybrid 1 has a two-wire port 2 connected to a non-repeatered transmission line (usually a subscriber line), an incoming two-wire port 3 for receiving an incoming digital symbol a n from the receive end of a repeatered transmission line and an outgoing two-wire port 4 at which an outgoing, echo-containing digital symbol y n appears. The echo canceller of this invention generally comprises a nonrecursive, or finite impulse response (FIR) filter 6 for cancelling a greater part of an echo and a tail canceller 7 which are cascaded from the incoming port 3 to produce a signal at the input of a subtractor 23 that cancels the whole waveform of an echo generated at the outgoing port 4 as a result of trans-hybrid coupling between the ports 3 and 4. The output of subtractor 23 represents a residual echo symbol e n , which appears at an output terminal 5 to which the transmit end of a non-repeatered transmission line is connected. FIR filter 6 includes a series circuit of delay elements, or shift registers 8-1 through 8-N for successively delaying an incoming digital symbol a n for interval T which is the reciprocal of the symbol rate of the digital signal, so that at given instant of time, a series of successively delayed digital symbols a n-1 , a n-2 , a n-3 ..... a n-N appear respectively at the outputs of shift registers 8-1, 8-2, 8-3, ... and 8-N. The input terminals of shift registers 8 are connected respectively to tap-weight multipliers 9-1 through 9-N respectively having tap-weight coefficients C₁ through C N . These tap-weight coefficients are supplied respectively from correlators 10-1 through 10-N which are connected to the inputs of shift registers 8-1∼8-N for detecting correlations between successively delayed digital symbols and residual echo symbol e n from subtractor 23 The output digital symbols from tap-weight multipliers 9-1∼9-N are summed by an adder 11. The output of shift register 8-N is supplied to the input of tail canceller 7 which comprises a recursive, or infinite impulse response filter 24 formed by an adder 12, a shift register 13 connected to the output of adder 12 to introduce a delay time T and a multiplier 14 which multiplies the output of shift register 13 with a loop attenuator coefficient R supplied from a correlator 22. Digital symbol a n-N from shift register 8-N is summed with the output of multiplier 14 to produce an output symbol u n which is supplied to a tap-weight multiplier 15 having a tap-weight coefficient C i supplied from a correlator 16. Correlator 16 detects correlation between residual echo symbol e n from subtractor 23 and digital symbol u n to adaptively control the tap weight of multiplier 15. The digital symbol C i × u n from multiplier 15 is supplied to adder 11 as an output digital symbol of tail canceller 7 and summed with the outputs of multipliers 9-1∼9-N of FIR filter 6. Alternatively, the input signal of correlator 16 can be taken from the output of shift register 8-N as illustrated in Fig. 2, instead of from the output of adder 12. The digital symbol a n-N from shift register 8-N is also supplied to a shift register 17 to produce a delayed symbol a n-N-1 as well as to a multiplier 18 to multiply a n-N by the loop attenuation coefficient R from correlator 22. A subtractor 19 is connected to the outputs of shift register 17 and multiplier 18 to generate a digital symbol representing the difference between the delayed symbol a n-N-1 and the multiplied symbol R × a n-N , i.e., a n-N-1 - R × a n-N . This output of subtractor 19 is multiplied by a multiplier 20 with a coefficient K which varies as a function of coefficient C i . Specifically, the coefficient K is a polarity signal "+1" or "-1" depending on the tap-weight coefficient C i from correlator 16. To this end, a signum function generator 21 is connected to the output of correlator 16 to derive the signal sgn(C i ), i.e., a polarity bit "1" if the output of correlator C i is greater than 0 or a polarity bit "-1" if C i is smaller than 0. Therefore, the output of multiplier 20 is represented by (a n-N-1 - R × a n-N ) or - (a n-N-1 - R × a n-N ), which is supplied to a first input of correlator 22 whose second input is supplied with the residual echo symbol e n from subtractor 23. Therefore, the tap-weight coefficient C i of multiplier 15 is adaptively controlled by the correlation between e n and u n and loop attenuation coefficient R of multipliers 14 and 18 is adaptively controlled by the correlation between e n and (a n-N-1 - R × a n-N ) sgn(C i ). Alternatively, the multiplier 20 can be controlled with the reciprocal of the tap-weight coefficient C i , i.e., 1/C i , derived by a circuit 25 as illustrated in Fig. 3, to apply a signal (a n-N-1 - R × a n-N )/C i to correlator 22. Details of correlators 16 and 22 are shown in Figs. 4A and 4B, respectively. In Fig. 4A, correlator 16 comprises a multiplier 50 which multiplies residual echo symbol e n from subtractor 23 with a symbol a n-N from shift register 8-N. The output of multiplier 50 is further multiplied by a multiplier 51 with an adjustment constant α i and supplied to a first input of an adder 52. A shift register 53 is connected to the output of adder 52 to delay its output symbol for a unit-time delay to produce a coefficient C i (n) and applies it to the second input of adder 52, producing a coefficient C i (n+1) = C i (n) + α i × e n × a n-N at the tap weight control input of multiplier 15. In Fig. 4B, correlator 22 comprises a multiplier 60 which multiplies residual echo symbol e n with the output of multiplier 20 which is represented by (a n-N - R (n) × a n-N ) sgn(C i (n) ). The output of multiplier 60 is further multiplied by a multiplier 61 with an adjustment constant α r and supplied to a first input of an adder 62. A shift register 63 is connected to the output of adder 62 to delay its output symbol for a unit-time delay to produce a coefficient R (n) and applies it to the second input of adder 62, producing a coefficient R (n+1) = R (n) + α r × e n (a n-N - R (n) × a n-N ) sgn(C i (n) ) at the tap weight control input of multiplier 14. The following is a quantitative analysis of the echo canceller of Fig. 1 that is supposed to cancel a negative exponential echo tail generated as a result of the low-frequency cut-off characteristic of hybrid 1. Assume that the following relation holds with respect to the incoming digital symbol a n : E[a n a n′ ] = a² δ nn′ where, a² represents the power of input digital symbol, δ nn′ represents Kronecker's delta. By denoting the echo's tail portion as h N+m = h N R₀ m m = 0, 1, ....., : 0 < R₀ < 1 where, h N : symbol value at t = NT; and R₀ : echo tail decaying factor, Since C i (n+1) and R (n+1) are given by, C i (n+1) = C i (n) + α i e n a n-N R (n+1) = R (n) + α r e n (a n-N-1 - R (n) a n-N ) sgn (C i (n) ) where, (n) represents the n-th corrected symbol value, the residual echo e n is given by: Note the first term of Equation (4) represents the error associated with the FIR filter 6. The expectations of the values C i (n) and R (n) are given by: C i (n+1) = C i (n) + α i a² (h N - C i (n) ) R (n) = R (n) + α i a² {h N R₀ - C i (n) R (n) - R (n) (h N - C i (n) ) }sgn(C i (n) ) ≅ R (n) + α r a² h N (R₀ - R (n) )sgn(h N ) = R (n) + α r a² |h N |(R₀ - R (n) ) Therefore, C i (n) = β i (n) C i (0) + (1 - β i (n) )h N R (n) = β r (n) R (0) + (1 - β r (n) )R₀ where, β i Δ 1 - α i a² , β r Δ 1 - α r a² |h N |, where 0<β i , β r <1. With n approaching infinity, the values C i (n) and R (n) respectively converge to the following: C i = C i (∞) = α i a² 1 - β i h N = h N R = R (∞) = α r a²|h N | 1 - β r R₀ = R₀ These values of convergence completely cancel the tail portion of echo and agree with the optimum values of solution. Convergence can be demonstrated for echoes having any tail portion by a computer simulation under condition that the low cut-off frequency of hybrid 1 corresponds to 1/200 of the symbol rate and that the main part of an echo is cancelled with FIR filter 6 having N = 32 taps, and the tail portion of the echo is assumed to have the following parameters: h N = -0.0118 R₀ = e -2π/200 = 0.96907 The input digital symbol is represented by a random sequence of binary +1 and -1 and the following initial values are used: C k (0) = 0 (where k=0, 1, .... N-1) C i (0) = 0 R (0) = 1 With the computer simulation, coefficients C i and R were converged respectively to -0.0118 and 0.96907. Fig. 5 illustrates how the average value of residual echo εΔE[e n ²] converges to a value lower than -120 dB Therefore, the echo canceller according to the first embodiment of this invention effectively cancels long-tail echoes using only one recursive filter 24. A further circuit simplification is achieved in a manner as shown in Fig. 6. In this modification, tail canceller 7A comprises a tap-weight multiplier 30 connected to the output of shift register 8-N, and an IIR filter 40 formed by an adder 31 having one input connected to the output of multiplier 30, a shift register 32 for delaying the output signal from adder 31 for a unit delay time T, and a second tap-weight multiplier 33 connected between the output of shift register 32 and the second input of adder 31. The tap weight of first multiplier 30 is controlled by a signal representing the tap-weight coefficient C i from a correlator 34 which detects correlation between residual echo symbol e n and the digital symbol a n-N appearing at the input of multiplier 30. The tap weight of second multiplier 33 is controlled by a signal representing the loop attenuation coefficient R supplied from a correlator 35 which detects correlation between the residual echo symbol and the output of a multiplier 37. The output of adder 31 is further connected to adder 11 where the output digital symbol of tail canceller 7A is summed with the outputs of tap-weight multipliers 9-1 to 9-N. Tail canceller 7A further includes a shift register 36 for delaying the digital symbol a n-N from shift register 8-N for a unit delay time T. A signum function generator 38 is connected to the output of correlator 34 to supply a polarity bit sgn(C i ) to multiplier 37. The output of the shift register 36 is multiplied with this polarity bit sgn(C i ) to supply a signal a n-N-1 sgn(C i ) to correlator 35 to detect correlation between a n-N-1 sgn(C i ) and e n . Correlators 34 and 35 are similar to correlators 16 and 22 of the previous embodiment, respectively. Therefore, the following relations result from the outputs of correlators 34 and 35: C i (n+1) = C i (n) + α i e n a n-N R (n+1) = R (n) + α r e n a n-N-1 sgn(C (n) ) Residual error is therefore given by: where, Π m (n) Δ R (n) R (n-1) ·····R (n-m+1) The first term of Equation (13) is the error of the nonrecursive filter, and h ℓ (ℓ = 0, 1, .....) represents the echo impulse response. The expectation values of C i (n) and R (n) are assumed as follows: C i (n+1) = (1 - α i a² )C i (n) + α i a² h N R (n+1) = {1 - α r a² C i (n-1) sgn(C n i )} R (n) + α r a² h N R h sgn(C i (n) ) ≅ (1 - α r a² | C i (n-1) |) R (n) + α r a² |h N | R h where, R h Δ h N+1 /h N , and 0 < 1 - α i a² , 1 - α i |h N | < 1. Therefore, with n approaching infinity, C i (n) converges to h N , and R (n) converges to R h . If the echo tail has a first order of decaying characteristic such as one below, h N+m = h N R₀ m (where m = 0, 1, .....) R (n) converges to R₀. The tail canceller 7A of Fig. 6 is also capable of completely cancelling the tail portion of an echo. Using the following parameters, h N = -0.0118 R₀ = e -2π/200 = 0.96907 C k (0) = 0, where k=0, 1, .... N-1 C i (0) = 0, R (0) = 15 16 = 0.9375 a computer simulation indicates that coefficients C i and R converge to -0.0118 and 0.96907, respectively, as illustrated in Fig. 7. The foregoing description shows only preferred embodiments of the present invention. Various modifications are apparent to those skilled in the art without departing from the scope of the present invention which is only limited by the appended claims. Therefore, the embodiments shown and described are only illustrative, not restrictive.

Claims: An echo canceller adapted for connection to the four-wire section of a two-wire four-wire conversion circuit (1), comprising: a finite impulse response filter (6) including a tapped-delay line (8-1 to 8-N) defining successive taps connected to an incoming port of said conversion circuit (1), a plurality of first tap-weight multipliers (9-1 to 9-N) connected respectively to said taps for respectively multiplying successively delayed digital symbols travelling along said tapped-delay line with first tap-weight coefficients (C₁ to C N ), and an adder (11) for summing the outputs of said first tap-weight multipliers; an infinite impulse response filter (24) including a shift register (13) and a second multiplier (14) for recursively multiplying an output digital symbol from said tapped-delay line (8-1 to 8-N) with a second, attenuation coefficient (R), said digital symbol having been delayed by said shift register (13); a third multiplier (15) for multiplying an output digital symbol of said infinite impulse response filter (24) with a third, tap-weight coefficient (C i ) and applying the multiplied output symbol to one input of said adder (11) to produce a replica of an echo symbol; a first subtractor (23) for subtracting said replica from digital symbols supplied from an outgoing port of said conversion circuit (1) to produce a residual echo symbol (e n ); a delay element (17) for further delaying a symbol appearing at one end of said tapped delay line; a fourth multiplier (18) for multiplying the symbol at said end of the tapped-delay line (8-1 to 8-N) with said second, attenuation coefficient (R); a second subtractor (19) for detecting a difference between the output of said delay element (17) and said fourth multiplier (18); means (20, 21; 20, 25) for multiplying the output of said second subtractor (19) with a coefficient (k) which varies as a function of said third, tap-weight coefficient (C i ); a plurality of first correlators (10-1 to 10-N) for detecting correlations between said residual echo symbol (e n ) and said successively delayed digital symbols and applying the detected correlations respectively to said first tap-weight multipliers (9-1 to 9-N) as said first tap-weight coefficients (C₁ to C N ); a second correlator (22) for detecting a correlation between said residual echo symbol (e n ) and the output of said multiplying means (20) and applying the detected correlation to the second multiplier (14) of said infinite impulse response filter as said second, attenuation coefficient (R); and a third correlator (16) for detecting a correlation between said residual echo symbol (e n ) and a digital symbol from said tapped-delay line or from an output of said infinite impulse response filter (24) and applying the detected correlation to said third multiplier (15) as said third, tap-weight coefficient (C i ). An echo canceller as claimed in claim 1, wherein said multiplying means (20, 21; 20, 25) includes means (20, 21) for generating a signum function of said third, tap-weight coefficient (C i ) and multiplying the output of said second subtractor (19) with said signum function, said signum function being representative of the polarity of said third tap-weight coefficient and being equal to +1 when said third tap-weight coefficient is greater than zero and -1 when said third tap-weight coefficient is smaller than zero. An echo canceller as claimed in claim 1, wherein said multiplying means (20, 21; 20, 25) includes means (20, 25, Fig 3) for generating a signal representative of the reciprocal of said third, tap-weight coefficient (C i ) and multiplying the output of said second subtractor (19) with said reciprocal representative signal. An echo canceller as claimed in any of claims 1 to 3, wherein said second correlator (16; Fig 4A) comprises: means (50, 51) for multiplying said residual echo symbol with the digital symbol from said tapped-delay line and an adjustment constant (α i ) to produce a corrected symbol; means (52) for summing said corrected symbol with a delayed symbol applied thereto to produce a summed symbol, the output of the summing means (52) being coupled to said second multiplier (15) as said second, attenuation coefficient; and means (53) for delaying the summed symbol for a unit time interval and supplying a symbol from the output of the summing means (52) to an input of the summing means as said delayed symbol. An echo canceller as claimed in any of claims 1 to 4, wherein said third correlator (22; Fig 4B) comprises: means (60, 61) for multiplying said residual echo symbol with the digital symbol from said tapped-delay line and an adjustment constant (α r ) to produce a corrected symbol; means (62) for summing said corrected symbol with a delayed symbol applied thereto to produce a summed symbol, the output of the summing means being coupled to said third multiplier as said third, tap-weight coefficient; and means (63) for delaying the summed symbol for a unit time interval and supplying a symbol from the output of the summing means (62) to an input of the summing means (62) as said delayed symbol. An echo canceller adapted for connection to the four-wire section of a two-wire four-wire conversion circuit (1), comprising: a finite impulse response filter (6) including a tapped-delay line (8-1 to 8-N) defining successive taps connected to an incoming port of said conversion circuit (1), a plurality of first tap-weight multipliers (9-1 to 9-N) connected respectively to said taps for respectively multiplying successively delayed digital symbols travelling along said tapped-delay line with first tap-weight coefficients, and an adder (11) for summing the outputs of said first tap-weight multipliers; a second multiplier (30) for multiplying an output digital symbol from one end of said tapped-delay line with a second, tap-weight coefficient (C i ); an infinite impulse response filter (40) including a shift register (32) and a third multiplier (33) for recursively multiplying the output of said second multiplier (30) with a third, attenuation coefficient (R), said output having been delayed by said shift register (32), and applying the multiplied output to one input of said adder (11) to produce a replica of an echo symbol; a subtractor (23) for subtracting said replica from digital symbols supplied from an outgoing port of said conversion circuit to produce a residual echo symbol; a delay element (36) for further delaying a symbol appearing at said end of the tapped delay line; means (37, 38) for multiplying an output symbol from the delay element with a coefficient which varies as a function of said second, tap-weight coefficient (C i ); a plurality of first correlators (10-1 to 10-N) for detecting correlations between said residual echo symbol and said successively delayed digital symbols and applying the detected correlations respectively to said first tap-weight multipliers (9-1 to 9-N) as said first tap-weight coefficients; a second correlator (34) for detecting a correlation between said residual echo symbol and a digital symbol from said tapped-delay line (8-1 to 8-N) and applying the detected correlation to said second multiplier (30) as said second, tap-weight coefficient (C i ); and a third correlator (35) for detecting a correlation between said residual echo symbol (e n ) and the output of said multiplying means (37, 38) and applying the detected correlation to the third multiplier (33) of said infinite impulse response filter (34) as said third, attenuation coefficient (R). An echo canceller as claimed in claim 6, wherein said multiplying means (37, 38) includes means for generating a signum function of said third, tap-weight coefficient (C i ) and multiplying the output of said delay element with said signum function, said signum function being representative of the polarity of said third tap-weight coefficient and being equal to +1 when said third, tap-weight coefficient is greater than zero and -1 when said third, tap-weight coefficient is smaller than zero. An echo canceller as claimed in claim 6 or 7, wherein said second correlator (34; Fig 4A) comprises: means (50, 51) for multiplying said residual echo symbol with the digital symbol from said tapped-delay line and an adjustment constant (α i ) to produce a corrected symbol; means (52) for summing said corrected symbol with a delayed symbol applied thereto to produce a summed symbol, the output of the summing means (52) being coupled to said second multiplier (30) as said second, tap-weight coefficient; and means (53) for delaying the summed symbol for a unit time interval and supplying a symbol from the output of said summing means (52) to an input of said summing means (52) as said delayed symbol. An echo canceller as claimed in any of claims 6 to 8, wherein said third correlator (35; Fig 4B) comprises: means (60, 61) for multiplying said residual echo symbol with the output of said multiplying means and an adjustment constant (α r ) to produce a corrected symbol; means (62) for summing said corrected symbol with a delayed symbol applied thereto to produce a summed symbol, the output of the summing means being coupled to said third multiplier as said third, attenuation coefficient; and means (63) for delaying the summed symbol for a unit time interval and supplying a symbol from the output the summing means (62) to an input of said summing means (62) as said delayed symbol.

Inventors: KOIKE SHIN ICHI C O NEC CORPOR, KOIKE, SHIN'ICHI, C/O NEC CORPORATION
Applicants: NIPPON ELECTRIC CO, NEC CORPORATION
Application year: 1990
Main classification: H04B3
IPC codes: H04B3