ENCODER

Abstract: An encoder comprising a circuit that detects abnormal condition of the encoder body, and a circuit which, when the encoder body is under abnormal condition, inverts and produces part of the output signals of the encoder body in response to an abnormal condition detect signal output from the abnormal condition detecting circuit, or which does not output part of the output signals of the encoder body. Therefore, any abnormal condition that occurs in the encoder body can be recognized from the external side.

Description: TECHNICAL FIELD The present invention relates to an encoder which is used to detect the position and velocity of an object. BACKGROUND ART Hitherto, for instance, a rotary encoder has been used to detect the revolution angle and revolution speed of a motor or the like; rotary encoders are mainly classified as incremental encoders and absolute encoders. In the incremental encoder generates pulses of the number corresponding to the number of divided sections which are obtained by dividing one revolution range of a motor or the like at regular intervals, and a signal processing circuit counts the number of pulses, so that the rotational position or revolution speed of the motor or the like can be determined. The incremental encoder ordinarily outputs pulse signals of two phases, A and B, having a phase difference of 90°; the direction of rotation (forward rotation or reverse rotation) of the motor or the like is discriminated by the phase relation (advance or delay). On the other hand, generally, one origin pulse (Z-phase pulse signal) is output during one revolution as a reference signal indicative of one revolution. The absolute encoder uses a code plate in which the absolute position in one revolution range of a motor or the like is expressed by a binary code. A parallel output type, an output type of A and B phases, and the like are known as output types. On the other hand, there are also an absolute encoder of the memory backup type in which the number of revolutions of a motor or the like is recorded by using a memory which uses a battery as a backup power source and an absolute encoder of the multi-rotation type in which an absolute position of one revolution or more of a motor or the like is also produced by using a reduction mechanism using a gear or the like. DISCLOSURE OF INVENTION The above-mentioned conventional encoders have the following drawbacks. In the case where an abnormality such that part of signals in the encoder are missing, the output signal generally become abnormal. However, whether an abnormality has occurred or not cannot be discriminated from the outside of the encoder. On the other hand, a case where no abnormality appears in the output signal also occurs on rare occasions. Further, even in the case where an instantaneous power failure has occurred, although the output signal generally becomes abnormal, such an abnormality of the output signal is usually momentary and, after that, the signal falsely becomes a normal signal. Consequently, the abnormality of the encoder cannot be detected from the outside. In the above cases, a runaway of the apparatus and, further, a breakdown of the apparatus are eventually caused. Particularly, in the multi-rotation type absolute encoder of the memory backup type using a battery, there is a drawback such that if the content of the memory is interfered with a disconnection of the battery or the like, the amount of errors increases and a serious problem is caused. US-A-4,600,835 discloses a pulse encoder having a circuit for diagnosing abnormalities such as the breaking of wire in LEDs or lowering of a power supply voltage, the pulse encoder comprising LEDs, a rotary lattice plate, a stationary lattice plate, light-receiving elements, and a driving unit for driving the electric signals from the light-receiving elements, the driving unit having a control terminal for controlling the output signal of the driving unit, wherein the anode of one of the LEDs connected to the ground is connected to the control terminal so that when the potential of the control terminal is lowered to a level lower than a predetermined value an alarm signal is output from the driving unit. JP-A-62-093618 discloses a system for detecting the abnormality of a pulse generator which can inform the abnormality of a pulse generator to the outside without using a special signal line, by reversing one pulse per rotation outputted from the pulse generator at the time of the abnormality of the pulse generator. A pulse generator of this system outputs one pulse (C-phase pulse) per one rotation and said pulse is subjected to waveform shaping by a waveform shaping unit. The C-phase pulse of which the waveform has been shaped is outputted through an exclusive circuit and a transistor. When abnormality is generated in the pulse generator, alarm output is generated to be inputted to the exclusive circuit and, therefore, the C-phase output being the output of the transistor is reversed. By this method, C-phase output 'H' inherently having only a predetermined pulse width becomes abnormally long and abnormality is detected at the point of time when said inherent predetermined pulse width is exceeded. US-A-4,079,251 discloses an absolute encoding system which is based on an incremental optical encoder which, together with a low power circuit technology and means for pulsing the light emitter(s) of the encoder (normally the largest power consuming device(s) in such a system) with a signal of low duty cycle and means for sampling the light detector outputs during the appropriate period of response to the emitted light pulses, produces an encoder system having extremely low internal power consumption allowing not only data retention but also data acquisition during periods of isolation from an external power supply by relying on its own relatively small battery-based power source. A bidirectional data bus is used to transmit position information to an external system, which system can also provide preset information to the encoder system. The present invention is as claimed in claim 1. It is an object of the invention to provide an encoder which can prevent a runaway and a breakdown of the apparatus by informing the occurrence of abnormality to the outside when an abnormality occurs. When an abnormality of the encoder main body is detected by the abnormality detecting circuit, either one of the pulse signals which were output from the encoder main body is inverted or the output of either one of the pulse signals is stopped, thereby enabling the abnormality of the encoder main body to be detected from the outside of the encoder main body. The operator can stop the apparatus and can prevent a runaway or a breakdown of the apparatus. On the other hand, by outputting the abnormality discrimination signal, the content of the abnormality can be known. Further, a command of a procedure corresponding to the abnormal state can be input from the outside. On the other hand, after completion of the procedure for the abnormal state, a reset signal is generated by using an operation to again turn on the power source and the abnormality detection signal can be also reset. BRIEF DESCRIPTION OF DRAWINGS Fig. 1 is a circuit diagram showing a construction of a first embodiment of an encoder of the invention; Fig. 2 is a constructional diagram of an encoder main body 1 in Fig. 1; Fig. 3 is a block diagram showing a construction of an abnormality detecting circuit 2 in Fig. 1; and Fig. 4 is a flowchart showing internal procedures of a microcomputer 21 in Fig. 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An encoder main body 1 is a portion corresponding to a conventional encoder and has a well-known construction comprising: a disk 12 attached to a shaft 11; LEDs 13; photodiodes 14; and comparators 15, 16, 17 as shown in Figs. 2A and 2B. The encoder main body 1 outputs pulse signals of an A phase, a B phase, and a Z phase. As shown in Fig. 3, the abnormality detecting circuit 2 comprises a microcomputer 21 (8051 or the like made by Intel Co., Ltd.) with a serial communicating function, a battery voltage detector 22, and an R-S type flip-flop 23. As shown in Fig. 4, the microcomputer 21 receives the pulse signals of the A, B, and Z phases which were output from the encoder main body 1 and checks to see if a signal dropout has occurred or not by discriminating whether an origin counted from the A-phase pulse signal and the B-phase pulse signal coincides with an origin indicative of the Z-phase pulse signal or not. On the other hand, the microcomputer 21 checks to see if a decrease in power source voltage of the memory backup battery of the encoder main body 1 has been detected by the battery voltage detector 22 and the R-S type flip-flop 23 has been set (alarm state) or not. If the signal dropout and/or the voltage drop of the battery power source are/is detected, an abnormality detection signal ALARM is set to the level "1" and an abnormality discrimination signal S₁ indicative of the content of the abnormality is serially output. After that, if an external command signal S₂ has been input from the outside, a procedure corresponding to the input external command signal S₂ is executed (for instance, the R-S type flip-flop 23 is reset). A selecting circuit 3 comprises AND gates 31 and 32, an OR gate 33, and an inverter 34. The inverter 34 inverts the logic level of the abnormality detection signal ALARM from the abnormality detecting circuit 2. The AND gate 31 receives the A-phase pulse signal and an output of the inverter 34. The AND gate 32 receives the abnormality discrimination signal S₁ and the abnormality detection signal ALARM. The OR gate 33 receives output of the AND gates 31 and 32. When the abnormality detection signal ALARM is set to the level "0", that is, when the encoder main body 1 is normal, the A-phase pulse signal is output. When the abnormality detection signal ALARM is set to the level "1", that is, when the encoder main body 1 is abnormal, the abnormality discrimination signal S₁ is output. A transceiver circuit 4 comprises; an inverter 43; a 3-state buffer 41 to input a signal from the outside; and a 3-state buffer 42 to output the B-phase pulse signal from the encoder main body 1. The 3-state buffer 41 is on/off controlled by the abnormality detection signal ALARM from the abnormality detecting circuit 2. The 3-state buffer 42 is on/off controlled by the inverted signal of the abnormality detection signal ALARM obtained through the inverter 43 from the abnormality detecting circuit 2. An exclusive OR circuit 5 receives the Z-phase pulse signal from the encoder main body 1 and the abnormality detection signal ALARM and outputs the Z-phase pulse signal when the abnormality detection signal ALARM is set to the level "0". When the abnormality detection signal ALARM is set to the level "1", the exclusive OR circuit 5 inverts the Z-phase pulse signal and outputs the inverted Z-phase pulse signal. The operation of the embodiment will now be described. When the encoder main body 1 operates normally, the abnormality detection signal ALARM which is output from the abnormality detecting circuit 2 is set to the level "0". Therefore, the A-phase pulse signal which was output from the encoder main body 1 is output through the AND gate 31 and OR gate 33 in the selector circuit 3. On the other hand, since the 3-state buffer 42 is turned on, the transceiver circuit 4 is set to the output mode and the B-phase pulse signal which was output from the encoder main body 1 is output from the transceiver circuit 4. Further, the Z-phase pulse signal which was output from the encoder main body 1 is output from the exclusive OR circuit 5. As mentioned above, when the encoder main body 1 operates normally, the pulse signals of A, B, and Z phases are output to a signal processing circuit (not shown) and the position or speed is detected. When the voltage of the memory backup battery then drops abnormally, this is detected by the battery voltage detector 22 and the R-S type flip-flop 23 is set. When the R-S type flip-flop 23 is set, the microcomputer 21 sets the abnormality detection signal ALARM to the level "1" and the abnormality discrimination signal S₁ indicative of the content of the abnormality is output. At this time, in the selector circuit 3, the output of the A-phase pulse signal is stopped by the AND gate 31 and, in place of it, the abnormality discrimination signal S₁ is output to the signal processing circuit through the AND gate 32 and OR gate 33. Therefore, the nature of the abnormality of the encoder main body 1 can be determined from the outside. On the other hand, when the abnormality detection signal ALARM is set to the level "1", the transceiver circuit 4 is set into the input mode, thereby enabling the serial external command signal S₂ to be input from the outside to the abnormality detecting circuit 2 by using a B-phase output signal line. When the external command signal S₂ is input, the microcomputer 21 executes procedures corresponding to the external command signal S₂ such that the cancelling of the abnormal state (reset of the R-S type flip-flop 23) and the presetting of the number of revolutions of the multi-rotation type absolute encoder (the initial value of number of revolutions which is counted is fiven from the outside) are instructed to the encoder main body 1 and the like. Further, when the abnormality detection signal ALARM is set to the level "1", the Z-phase pulse signal which was output from the encoder main body 1 is inverted by the exclusive OR circuit 5. Thus, in the case where an abnormality occurs in the encoder main body 1, the occurrence of the abnormality can be immediately detected from the outside. Although an example of the encoder having outputs of A, B, and Z phases has been described above, the invention can be also applied to other encoders (general absolute encoder). The output signal lines of the selector circuit 3, transceiver circuit 4, and exclusive OR circuit 5 can be used commonly with the output signal lines of the pulse signals of the respective phases. Therefore, the number of signal lines which are led to the outside of the encoder main body 1 is the same as that in a conventional encoder.

Claims: An encoder comprising an abnormality detecting circuit (2) for detecting an abnormality of an encoder main body (1) and outputting an abnormality detection signal (ALARM) indicating whether the encoder is normal or not and an abnormality discrimination signal (S₁) indicative of the nature of the abnormality, and a selector circuit (3) for receiving the abnormality discrimination signal (S₁) and a pulse signal (A) of a certain phase among the pulse signals (A,B) which the encoder main body generates, for outputting said pulse signal when the encoder is normal, and for outputting the abnormality discrimination signal in place of said pulse signal when the abnormality detection signal is output, characterized in that a transceiver circuit (4) is provided, which receives the pulse signal (B) of a phase different from the phase of the pulse signal (A) which is input to the selector circuit among the pulse signals, and when the encoder is normal, the transceiver circuit is set into an output mode and outputs on an output signal line said pulse signal (B) having the different phase, and when the abnormality detection signal is output, the transceiver circuit is set into an input mode, and when an external command signal (S₂) appears on said output signal line, the transceiver circuit receives the external command signal and outputs it to the abnormality detecting circuit; which, when it receives said external command signal, executes a procedure indicated by the external command signal.

Inventors: HIGASHI KOUICHI YASKAWA DENKI, HIGASHI, KOUICHI, YASKAWA DENKI MUSASHIRYOU
Applicants: YASKAWA DENKI SEISAKUSHO KK, KABUSHIKI KAISHA YASKAWA DENKI SEISAKUSHO
Application year: 1990
Main classification: G01D5
IPC codes: G01D3, G01D5, H03M1