Digital colour correction

Abstract: A digital colour corrector for a colour component of a video signal is operable to effect gamma, gain and black level correction. The gamma correction k is applied to a multiplier (20) receiving the input signal E. Black level correction B is applied to an adder (26), and further arithmetic circuits (22, 24, 28, 30) are provided together with gain correction A to implement the equation δE = [k.E + (A-B-k)].E + B which includes a good approximation of the gamma correction without the need to use log and anti-log circuits. The output δE represents an offset correction signal to be added to the original colour component signal.

Description: This invention relates to digital colour correction which may be used in colour video systems. In colour correction apparatus for adjustment of the primary colours, for example for use in video broadcasting applications, the controls generally include separate adjustments for gain, black level and gamma (described in greater detail below) for each of the three primary colours, namely red (R), green (G) and blue (B). Other controls may also be provided, such as luminance (Y) input gain, chroma input gain and overall output gain. Existing colour correction apparatus generally operates in the analog domain. In order to provide a digital implementation of such apparatus, it would be relatively simple to perform gain and black adjustments using digital hardware, since gain adjustment involves multiplication by a factor and black adjustment involves addition of a constant, both of which operations can be readily performed digitally. However, as will now be explained, gamma correction involves a non-linear function and this causes problems for digital implementation. The characteristic of picture display devices such as cathode ray tubes (CRTs) is non-linear, and it is therefore necessary within a television transmission system to compensate for this non-linearity at the transmitter. A typical input/output relationship for a CRT is shown in Figure 1 of the accompanying drawings, the characteristic being shown of signal voltage (VS) against light output (LO). The illustrated curve may be described by a power law, as follows: L = K.E γ where: L is the light output (LO) of the CRT K is a constant E is the signal voltage (VS) γ (gamma) is a constant. Hence, as will be seen in Figure 1 and is apparent from the equation (1), the light output increases more rapidly than the signal voltage. If the source of the video signals is assumed to be a monochrome camera having a linear input/output characteristic, then the effect of the CRT will be to stretch out changes in luminance in the highlight areas and to compress these changes in the low light areas. Therefore, in order to compensate for these effects, the transmitter must have the inverse law to that of the CRT; the term given to the process that produces this inverse law is gamma correction. An example of the combined effect of a camera and a gamma correction circuit is shown in Figure 2 of the accompanying drawings, which shows the relationship between the light on the camera tube (LC) and the transmitter output (TO). As will be apparent, the characteristic of Figure 2 compensates for the characteristic of Figure 1, and the overall effect is to produce a linear system. In any particular system, gamma will be a constant, typically between about 2.2 and 2.5. However, as a result of incorrect lighting conditions or the like, it may be necessary to vary the amount of gamma correction to be applied. In theory, one method of gamma correction would involve hardware implementation of the equation (1). In the analog domain, this could be achieved by using log and anti-log amplifiers with an interposed amplifier whose gain may be varied. Such an arrangement is shown in the block circuit diagram of Figure 3 of the accompanying drawings. An input signal x is applied to a log converter 10 whose output a is supplied to a gamma adjust amplifier 12. The gamma adjustment is set by the gain of the amplifier 12, and therefore if the gamma adjustment is to be changed, the gain of the amplifier 12 is changed. The output b of the amplifier 12 is fed to an anti-log converter 14 which produces an output signal y. It will be seen that the following relationships apply. y = e b = e γ.a = e γ.logx log y = γlog x.log e log y = log x γ y = x γ In order to implement the circuit of Figure 3 in hardware form, it would be necessary to use, for example, arrays of diodes so as to obtain the required log and anti-log characteristics. However, for colour correction purposes, it is difficult to match the diode arrays for the three colour RGB channels, and also, temperature stability is a problem. In a digital colour corrector, the circuit of Figure 3 could be implemented using programmable read only memories (PROMs) in which the log and anti-log characteristics have been mapped. However, the problem with this method would be truncation of the characteristic in order to enable a sensible word size to be used. According to the present invention there is provided a colour correction apparatus comprising: first multiplying means for receiving a colour component signal of a video signal and for multiplying the component signal by a first factor indicative of a desired gamma correction to produce a first multiplied signal; first summing means for adding a second factor to the first multiplied signal to produce a first summed signal, the second factor being indicative of the desired gamma correction, a desired gain and a desired black level; second multiplying means for multiplying the first summed signal by the colour component signal to produce a second multiplied signal; and second summing means for adding a third factor indicative of the desired black level to produce an offset correction signal to be added to the colour component signal. In a preferred embodiment of the invention, to be described in greater detail hereinafter, a digital colour corrector for a colour component of a video signal is operable to effect gamma, gain and black level correction. The gamma correction k is applied to a multiplier receiving the input signal E. Black level correction B is applied to an adder, and further arithmetic circuits are provided together with gain correction A to implement the equation δE = [k.E + (A-B-k)].E + B which includes a good approximation of the gamma correction without the need to use log and anti-log circuits. The output δE represents an offset correction signal to be added to the original colour component signal. In the preferred colour correction apparatus, an offset correction signal is generated by the apparatus for adding to the original signal thereby generating the resultant colour corrected output. Thus the original signal does not pass through the colour correction apparatus and this minimises distortion. The preferred colour correction apparatus can be used with both 4:2:2 component (as specified in CCIR Recommendation 601) and 4Fsc composite systems . In the case of the 4Fsc composite system, it is necessary to decode the input composite signal into R, G and B components to be supplied to the colour correction apparatus; the correction offset generated by the apparatus is then encoded back into composite form and added to the original composite signal. The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by Iike references, and in which: Figure 1 shows an input/output characteristic of a CRT; Figure 2 shows an input/output characteristic of a camera and transmitter; Figure 3 shows a circuit which can operate according to one method of gamma correction; Figure 4 is a schematic block diagram of colour correction apparatus according to one embodiment of this invention; Figure 5 is a schematic block diagram similar to that of Figure 4 but including further details; and Figure 6 is a more detailed block diagram of colour correction apparatus embodying this invention. As discussed above with reference to Figure 3, providing colour correction by implementation of the equation (1) causes problems, both in the analog and digital domains. Colour correction apparatus embodying this invention makes use of a different approach which avoids the need to implement log and anti-log functions. The theory underlining this approach will now be discussed. Let E be a gamma corrected signal voltage. E = U γ where U is the uncorrected signal voltage. In order to effect a change a in gamma, V = U γ+a = U γ . U a = E.(E (1/γ) ) a = E 1+a/γ If a is defined as a percentage of gamma, a = x.γ then V = E 1+x Therefore the variation in signal voltage V due to a change in gamma ΔV = E 1+x - E Using a square law approximation to the signal voltage variation due to a change in gamma ΔV' = k.E 2 + m.E where k and m are as derived below. The error in approximation e = ΔV' - ΔV = [k.E 2 + m.E] - [E (1+x) - E] In order for minimum error at black level and peak white (i.e. 0 and 1), let E = 1 and e = 0 Hence 0 = [k + m] - [1 - 1] and k = -m The error in approximation may be found by integration of e over the range 0 to 1 in order to determine k. Let -k 6 - 1 2+x + 1 2 = 0 k 6 = -2 + 2 + x 4 + 2.x k = 3.x 2 + x Hence δV = k.(E 2 - E) where: δV is an approximation to the variation in the signal voltage due to a change in gamma, E is the input voltage, k is a variable quantity. Thus the equation (2) provides an approximation of the signal voltage variation due to gamma change without involving log and anti-log functions. For correction of the black level and the gain in addition to the gamma, the black level offset B has to be added to form the corrected offset output, as does a further term based on the gain coefficient A. Since the black level is interactive with the gain coefficient A, it is necessary to subtract the black level offset B from the gain coefficient A before multiplication of the input signal E. Thus the further term to be added to form the offset output is (A-B).E, and the overall offset correction factor to be added to the input signal E so as to generate the colour corrected output may be expressed as: δE = k.(E 2 -E) + (A-B).E + B δE = k.E 2 - kE + (A-B).E + B δE = [k.E + (A-B-k)].E + B If α = A-B-k, then the equation (3) can be simplified to δE = (k.E + α).E + B Figure 4 shows a circuit embodying the present invention, in which the equation (4) is implemented in the digital domain. A first multiplier 20 receives the input signal and multiplies it by the factor k to produce a signal k.E which is applied to a first adder 22. The first adder 22 adds the factor α to the signal k.E to produce a summed output k.E + α. A second multiplier 24 multiplies this by the input signal E once more to produce an output (k.E + α).E which is supplied to a second adder 26. The second adder 26 adds the black level factor B, and this completes the equation (4) thereby producing the offset correction factor δE for adding to the input signal E. The circuit shown in Figure 4 is effective if the equipment includes microprocessor capability to derive the factor α from the factors A, B and k. Alternatively, the circuit shown in Figure 5 can be used and, since this circuit implements the equation (3) directly, there is no need to derive the factor α separately. The circuit shown in Figure 5 is similar to that of Figure 4 except that first and second subtracters 28, 30 are provided, the first subtracter 28 deriving a signal A-B from the factors A and B, and the second subtracter 30 deriving a signal A-B-k from the output A-B of the first subtracter 28 and from the factor k. The signal A-B-k is then applied to the first adder 22 for adding to the signal k.E from the first multiplier 20. A more developed circuit embodying the invention is shown in Figure 6, and this circuit is particularly suitable for implementation in gate array technology. As well as the first and second multipliers 20, 24 and the first and second adders 22, 26, the circuit includes five synchronously loadable registers (SLRs) 32 to 36 for the input signal E and for the factors k, α and B. Further registers 38 to 42 are provided between the arithmetic components. At the output of the second adder 26, a selective blanking circuit is provided, in the form of a register 44, a buffer amplifier 46 and an inverter 48. A blanking level signal BL is applied to an input of the buffer amplifier 46. The selective blanking circuit is provided to blank the output to a preset level when enabled so as to prevent parts of the video signal such as synchronisation pulses from being undesirably affected by the colour corrector circuit. When an enable signal is present at a blanking enable terminal 50, the register 44 is disabled and the buffer amplifier 46 is enabled thereby applying the blanking level signal BL to the output instead of the offset correction signal δE. The other parts of the circuit of Figure 6 operate in a similar manner to that of Figure 4, the registers 38 to 42 holding the outputs of the preceding components. The registers 41 and 42 provide a delay which corresponds to that provided by the registers 38 and 39. Whichever of the above-described colour corrector circuits is used, three of the circuits will need to be provided for processing digital colour component signals, one circuit for each component. As will be apparent from the above description, each of the colour corrector circuits embodying the present invention is arranged such that an offset signal is generated by the circuit and is added to the original signal so as to generate the resultant colour corrected output. Thus the original signal does not pass through the circuit, resulting in minimum distortion effects such as quantisation noise due to truncation at multiplier outputs, for example in RGB and YCbCr matrices provided in other parts of the equipment. Also, if colour correction is not required, the circuit can be switched out with no adverse effect on the original signal. The colour corrector circuits can be used in either component or composite video systems, such as the CCIR Recommendation 601 4:2:2 component and 4Fsc composite systems. In the case of composite systems, it is necessary to decode the input composite signal into three components for application to the three corresponding correction circuits. The correction offsets generated by these circuits are then encoded back into composite form and added to the original composite signal.

Claims: Colour correction apparatus comprising: first multiplying means (20) for receiving a colour component signal (E) of a video signal and for multiplying the component signal (E) by a first factor (k) indicative of a desired gamma correction to produce a first multiplied signal; first summing means (22) for adding a second factor (α) to the first multiplied signal to produce a first summed signal, the second factor (α) being indicative of the desired gamma correction, a desired gain and a desired black level; second multiplying means (24) for multiplying the first summed signal by the colour component signal (E) to produce a second multiplied signal; and second summing means (26) for adding a third factor (B) indicative of the desired black level to produce an offset correction signal (δE) to be added to the colour component signal (E). Apparatus according to claim 1, wherein the second factor (α) comprises a fourth factor (A) indicative of the desired gain minus the first and third factors (k,B). Apparatus according to claim 2, comprising first subtracting means (28) for subtracting the third factor (B) from the fourth factor (A) to produce a first subtracted signal (A-B), and a second subtracting means (30) for subtracting the first factor (k) from the first subtracted signal (A-B) to produce a second subtracted signal (A-B-k), the second subtracted signal forming the second factor (α) to be added by the first summing means (22). Apparatus according to claim 1, claim 2 or claim 3, comprising registers (SLR) associated with the inputs of each of the first and second multiplying means (20,24) and of each of the first and second summing means (22,26). Apparatus according to any one of the preceding claims, comprising a blanking circuit (44,46,48) for selectively blanking the offset correction signal (δE) to a predetermined blanking level (BL) at selected times.

Inventors: HARRADINE VINCENT CARL, HARRADINE, VINCENT CARL
Applicants: SONY CORP, SONY CORPORATION
Application year: 1990
Main classification: H04N9
IPC codes: H04N9