Package for a solid-state imaging device

Abstract: A semiconductor device having a semiconductor chip (14) packaged in a semicon­ ductor container, which operates in receiving visible light, near infrared light and ultraviolet light. The semiconductor device includes a lower plate (11) formed of a material which hardly transmits light, with high insulation resistance and high mechanical intensity and has a coefficient of linear expansion almost the same as that of the semiconductor chip (14), whereas the semiconductor chip (14) is mounted on said lower plate (11), a middle plate (12) comprising a single-layer or a multiple-layer wiring board, and an upper plate (16) formed of a material which hardly transmits light, with high insulation resistance and high mechani­ cal intensity and has a coefficient of linear expansion almost the same as that of the lower plate (11). The upper plate (11) comprises a window (22) for incident light at one part thereof, in which the lower plate (11) and the upper plate (16) are bonded with putting the middle plate (12) therebetween and an upper part of the upper plate (16) is sealed by a lid (18) formed of glass or a synthetic resin.

Description: FIELD OF THE INVENTION The present invention relates to a semiconductor device and more particularly to a package for a solid-state imaging device. BACKGROUND OF THE INVENTION Figure 16 is a partially exploded perspective view showing a conventional semiconductor device and figure 17 is a sectional view showing the same. In figure 16, reference numeral 1 designates a multi-layer ceramic plate formed of alumina (Al₂O₃), reference numeral 2 designates an image sensor chip diebonded to a bottom surface of the multiple-layer ceramic plate 1, reference numeral 3 designates a wire made of metal which electrically connects a pad 4 on the chip to an inner lead 5 on the multiple-layer ceramic plate 1, reference numeral 6 designates an outer lead electrically connected to said inner lead 5 by a multiple-layer wiring (not shown) in the multiple-layer ceramic plate, reference numeral 7 designates a light shielding plate preventing light from radiating to a part other than the image area 8, and reference numeral 9 designates a glass lid bonded to the multi-layer ceramic plate 1 by a resin. Operation will be described hereinafter. Incident light from an upper surface of the device passes through the glass lid 9. Then, only light passing through an opening of the light shielding plate 7 reaches the image area 8 on the image sensor chip 2. Then, an image signal is converted to an electrical signal by photo-electric effect. This electric signal is output to the outer lead 6 through the pad 4, the wire 3, the inner lead 5 and the multiple-layer wiring (not shown) of the multi-layer ceramic plate 1 made of alumina. According to the thus formed conventional semiconductor device, when the image sensor chip (coefficient of linear expansion α = 3.04 x 10⁻⁶ [° K ⁻¹]) 2 made of silicon is bonded to the multiple-layer ceramic plate (coefficient of linear expansion α = 6.8 x 10⁻⁶ [° K ⁻¹]) 1 made of alumina by using a thermosetting resin for diebonding at approximately 150 °C and they are cooled to a room temperature (25 °C), the semiconductor device is curved due to a difference between coefficients of linear expansion of silicon and alumina caused by a temperature difference generated by cooling, that is, curvature, which is convex when viewed with the silicon chip 2 positioned on the upper side, is generated. Figure 18 is a graph showing the relation between an amount of curvature and a distance from the chip center. As shown in figure 18, when the chip has an overall length of 85 mm, curvature of 200 µm is generated. Therefore, in the conventional semiconductor device, incident light from an optical system does not focus on the image area, so that the semiconductor device does not normally operate and internal stress in the chip is high at a room temperature and then reliability against the heat cycle and the like is low. It is generally known to reduce internal stress in a semiconducter chip by using a mounting substrate having a coefficient of linear expansion close to that of the semiconductor material of the chip. SUMMARY OF THE INVENTION The present invention was made in order to solve these problems and it is an object of the present invention to provide a semiconductor device in which curvature of a chip surface is little, incident light from an optical system focuses on an image area, a chip can normally operate, internal stress of the chip is low and reliability against a heat cycle and the like is sufficiently high. Other objects and advantages of the present invention will become apparent from the detailed description given hereinafter. A semiconductor device in accordance with the present invention comprises a lower plate formed of a material which hardly transmits light with high insulation resistance and high mechanical strength and has a coefficient of linear expansion almost the same as that of the semiconductor chip, a frame-like middle plate comprising a single-layer or a multiple-layer wiring board and an upper plate formed of a material which hardly transmits light with high insulation resistance and high mechanical strength and has a coefficient of linear expansion almost the same as that of the lower plate and having a window for incident light, in which they are bonded to each other and an upper part of the upper plate is sealed by a lid formed of glass or a synthetic resin. According to the present invention, since a lower plate and an upper plate of a semiconductor device are formed of a material which has high insulation resistance and high mechanical strength and coefficient of linear expansion almost the same as that of a semiconductor chip, and hardly transmits light, when they are bonded with putting a middle plate serving as a wiring board therebetween at a high temperature and then cooled to a room temperature (25 °C), one of shrinkage force on both sides of the middle plate emulates the other, with the result, that curvature of the chip surface is reduced and internal stress of the chip can be lowered. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a perspective view showing a semiconductor device in accordance with a first embodiment of the present invention; Figure 2 is a sectional view of figure 1; Figure 3 is an exploded perspective view of figure 1; Figure 4 is a perspective view showing a semiconductor device in accordance with a second embodiment of the present invention; Figure 5 is a sectional view of figure 4; Figure 6 is an exploded perspective view of figure 4; Figure 7 is a view showing a sectional structure of a semiconductor device in accordance with a third embodiment of the present invention; Figure 8 is a view showing a sectional structure of a semiconductor device in accordance with a fourth embodiment of the present invention; Figure 9 is a view showing a sectional structure of a semiconductor device in accordance with a fifth embodiment of the present invention; Figure 10 is a view showing a sectional structure of a semiconductor device in accordance with a sixth embodiment of the present invention; Figure 11 is a view showing a sectional structure of a semiconductor device in accordance with a seventh embodiment of the present invention; Figure 12 is an exploded perspective view showing a semiconductor device in accordance with an eighth embodiment of the present invention; Figure 13 is a sectional view taken along a line A - A′ in figure 12; Figure 14 is a graph showing an amount of curvature of a chip surface when the semiconductor device in accordance with the eighth embodiment of the present invention; Figure 15 is a graph showing an amount of curvature of a chip surface of the semiconductor device in accordance with the first embodiment of the present invention; Figure 16 is a partially exploded perspective view showing a conventional semiconductor device; Figure 17 is a sectional view of figure 16; and Figure 18 is a graph showing an amount of curvature of a chip surface of the conventional semiconductor device. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail with reference to the drawings. Figure 1 is a perspective view showing a semiconductor device in accordance with a first embodiment of the present invention and figures 2 and 3 are a sectional view and an exploded perspective view showing the same, respectively. In the drawings, reference numeral 11 designates a lower plate with a thickness of 1 mm which is formed of silicon carbide (SiC ; coefficient of linear expansion is 3.7 x 10⁻⁶[°K⁻¹]) and reference numeral 12 designates a middle plate having an inner lead 13 and formed of alumina (Al₂O₃ ; coefficient of linear expansion is 6.8 x 10⁻⁶ [°K⁻¹]). The middle plate 12 comprising three laminated layers each having a thickness of 0.5 mm. Reference numeral 14 designates an image sensor chip with a thickness of 0. 625 mm comprising a solid-state imaging device made of silicon (Si; coefficient of linear expansion is 3.04 x 10⁻⁶ [°K⁻¹]). It has a pad 15 and bonded on the lower plate 11. Reference numeral 16 is an upper plate with a thickness of 1.5 mm, formed of silicon carbide bonded on a middle plate 12. Reference numeral 17 designates a light shielding plate formed of stainless with a thickness of approximately 0.2 mm which is plated with delustering chrome and set in a frame-shaped trench on the upper plate 16. Reference numeral 18 designates a glass lid with a thickness of 1 mm which seals the frame part of the upper plate 16. Reference numeral 19 designates an aluminum wire with a diameter of 30 µm which connects the pad 15 on the image sensor chip 14 to the inner lead 13 on the middle plate 12 and reference numeral 20 designates an outer lead bonded to the middle plate 12. In addition, reference numeral 21 designates an image area formed on the image sensor chip and reference numeral 22 designates a rectangular opening for incident light provided at the upper plate 16. The middle plate 12 has a three layer structure and these three layers are baked together to be one plate. Each of the upper plate 16, the middle plate 12 and the lower plate 11 is mirror-ground on both surfaces and has a flatness of 20 - 50 µm over the whole surface. Then, the glass lid 18 and the upper plate 16, the upper plate 16 and the middle plate 12, the middle plate 12 and the lower plate 11, and the image sensor chip 14 and the lower plate 11 are bonded by solder or an adhesive material such as resin, respectively, so that they are integrally formed. Mirror grinding is performed for preventing the plate from curving before bonding and for reducing an amount of the adhesive material used in bonding. Next, operation thereof will be described in detail. Incident light from an upper surface of the device passes through the glass lid 18. Then, some light passes through an opening of the light shielding plate 17 and then reaches the image area 21 on the image sensor chip 14. Then, an image signal is converted to an electric signal. This electric signal is output to the outer lead 20 through the pad 15, the wire 19, the inner lead 13 and the multiple-layer wiring (not shown) of the middle plate 12 made of alumina. According to a structure of this embodiment, the lower plate 11 and the upper plate 16 are formed of silicon carbide which has a coefficient of linear expansion very close to that of silicon which constitutes the chip 14 and they are bonded at a high temperature with putting the middle plate serving as a wiring board therebetween and cooled to a room temperature (25 °C). One of shrinkage force on both sides of the middle plate caused by a temperature difference due to cooling operation emulates the other because the upper plate 16 and the lower plate 11 have the same coefficient of linear expansion, with the result that the curvature of the surface of the chip 14 is reduced. Figure 15 shows a result of simulation of the relation between an amount of curvature of the surface of the chip 14 and a distance from the center of the chip 14. As shown in figure 15, in case of a chip with a length of 85mm, the amount of curvature of the chip surface in a longitudinal direction is reduced to approximately 35 µm. The curvature of the chip is caused because the upper plate 16 has a window 22 for incident light and there is generated imbalance between the upper plate 16 and the lower plate 11. However, in this structure, curvature of approximately 35 µm has almost no problem when light from an optical system focuses on the chip 14 and the device normally operates. In addition, since the amount of curvature is small, internal stress of the chip is reduced and reliability against heat cycle is improved. Although the light shielding plate 17 is set in the trench on the upper plate 16 in this embodiment, this may be set in a trench formed on the middle plate 12. Figures 4, 5 and 6 show a perspective view, a sectional view and an exploded perspective view showing a structure of a semiconductor device in accordance with a second embodiment of the present invention, respectively. In these figures, the same references as in figure 1 designate the same parts. According to this embodiment, since the light shielding plate 17 is set on the middle plate 12, more specifically, on a top layer of the middle plate, the chip 14 can be arranged in the vicinity of the light shielding plate 17 and light incident on a part other than the image area 21 on the chip 14 is prevented, so that stray light can be reduced. As a result, performance of the device can be further improved. Although the light shielding plate 17 on the middle plate 12 and the glass lid 18 on the upper plate 16 are separately formed in the second embodiment, these can be formed in contact with each other. Figure 7 is a sectional view showing a semiconductor device in accordance with a third embodiment of the present invention. In figure 7, the same references as in figure 5 designate the same parts. According to this embodiment, the glass lid 18 on the frame of the upper plate 16 is provided in contact with the light shielding plate 17 set on the top layer of the middle plate 12. In this embodiment, weight of the device can be reduced and the device can be highly integrated, in addition to the effect in the second embodiment. Although the glass lid 18 and the light shielding plate 17 are arranged in contact with each other in the upper plate 16 in the first embodiment, the light shielding plate 17 may be set in a trench formed on a lower surface of the upper plate 16 apart from the glass lid 18 and it may be provided in the vicinity of the chip 14 as shown in figure 8 showing a fourth embodiment of the present invention. Alternatively, besides the structure shown in figure 8, the glass lid 18 may be provided in contact with the light shielding plate 17 set in the bottom surface of the upper plate 16 as shown in figure 9 showing a fifth embodiment of the present invention. As a result, weight of the device is reduced and the device can be highly integrated. In a case where it is necessary to increase an area of a brazing material at a root of the outer lead 20 bonded to the middle plate 12, the middle plate 12 should be thickly formed to have five layers and a die pad part of the lower plate 11 may be raised as shown in figure 10 showing a sixth embodiment of the present invention. The die pad part of the lower plate 11 is raised in order to easily perform wire bonding of the chip 14. In this embodiment, since the area for brazing the outer lead 20 is increased, tensile stress of the outer lead 20 is increased, with the result that reliability of the device is extremely improved. When the light interception is not necessary in the image sensor, the light shielding plate may be dispensed with as shown in figure 11 showing a seventh embodiment of the present invention. In a case where it is necessary to further reduce an amount of curvature of the chip surface, as shown in figure 12 showing an eighth embodiment of the present invention and in figure 13 which is a sectional view taken along a line A - A′ in figure 12, the semiconductor device in accordance with the present invention is positioned on a block 23, a surface thereof in contact with a back surface of a package being plain, and the semiconductor device is clamped to the block 23 by bolts 24 through holes on both ends of the package. As a result, the curvature can be reduced. According to this method, as shown in figure 14, an amount of curvature of the chip surface can be reduced to approximately 10 µm or less and curvature in the longitudinal direction of the chip is almost eliminated. Therefore, the semiconductor device in accordance with this embodiment has very small internal stress and high reliability of heat cycle and the like as compared with those in accordance with the first to seventh embodiments. Especially, the device in accordance with this embodiment is effective when this is used for a space environment, such as an artificial satellite which requires high performance. Although silicon carbide is used as a material of the lower plate 11 and the upper plate 16 in the above embodiments, a material which hardly transmits light with high insulation resistance and high mechanical intensity and has a coefficient of linear expansion close to that of material constituting the chip, for example aluminum nitride (AlN; coefficient of linear expansion is 4.3 x 10⁻⁶[°K⁻¹]) and the like may be used. In addition, the lower plate 11 and the upper plate 16 are not necessarily the same material and, for example the lower plate 11 may be formed of silicon carbide and the upper plate 16 may be formed of aluminum nitride, and vice versa. Although alumina of three-layer, four-layer or five-layer structure is used as the middle plate 12 in above-described embodiments, the material and the number of layers of the middle plate is not limited to this structure and, for example black aluminum nitride and the like may be used as its material. Although the glass lid is used as the lid 18 for an upper part of the frame on the upper plate in the above embodiments, a transparent synthetic resin plate may be used for it. In addition, although the linear image sensor is used as the semiconductor chip to be packaged in the above embodiments, an area image sensor may be used for it, which has the same effect. Although the flat type outer lead is shown in the above embodiments, this may be a dual in-line type, leadless type or leaded chip carrier type. According to the present invention, a semiconductor device which operates in receiving ultraviolet light, visible light and near infrared light comprises a lower plate and an upper plate formed of silicon carbide or aluminum nitride, a semiconductor chip mounted on the lower plate, and a middle plate comprising a single or a plurality of layers of wiring board through which the upper plate and the lower plate are bonded, in which the upper frame part of the upper plate is sealed by a lid made of glass or a synthetic resin and light is made incident from an opening provided in the upper plate. As a result, in the thus structured semiconductor device, there is almost no curvature in the longitudinal direction of the semiconductor chip such as a long image sensor chip at a room temperature, internal stress is small and performance and reliability are high. In addition, when a block is provided on a lower surface of the semiconductor device and the semiconductor device is fixed to this block, curvature in the longitudinal direction of the semiconductor chip is further reduced. As a result, there can be provided the semiconductor device having very high performance in which internal stress is small and reliability against a heat cycle is high. Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation.

Claims: A semiconductor device having a semiconductor chip (14) packaged in a container, which operates in receiving visible light, near infrared light and ultraviolet light, said container comprising a lower plate (11) formed of a material which hardly transmits light with high insulation resistance and high mechanical strength and which has a coefficient of linear expansion almost the same as that of said semiconductor chip (14); said semiconductor chip (14) being mounted on said lower plate (11); a frame-like middle plate (12) comprising a single-layer or a multiple-layer wiring board; and an upper plate (16) formed of a material which hardly transmits light with high insulation resistance and high mechanical strength and which has a coefficient of linear expansion almost the same as that of said lower plate (11) and having a window (22) for incident light at one part thereof, said lower plate (11) and said upper plate (16) being bonded together by means of said middle plate (12) provided therebetween and an upper part of said upper plate (16) is sealed by a lid (18) formed of glass or a synthetic resin. A semiconductor device as claimed in claim 1, characterized in that a light shielding plate (17) is set on an upper part of said semiconductor chip (14). A semiconductor device as claimed in claims 1 or 2, characterized in that a block (23) having a plain surface is set in contact with said lower plate (11) and said block (23) and said semiconductor device are fixed by bolts (24).

Inventors: HATTA MUNEO C O MITSUBISHI DEN, HATTA, MUNEO, HATTA, MUNEO, C/O MITSUBISHI DENKI KABUSHIKI K.
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1990
Main classification: H01L31
IPC codes: H01L31, H01L27, H01L23