Apparatus for reproducing a digital signal recorded on a magnetic tape

Abstract: A digital signal reproducing apparatus for reproducing a digital signal recorded on a magnetic tape from the magnetic tape running at a speed different from the speed at the time of recording by means of a head provided on a rotary drum (1), comprises: tape speed detecting means (10) for generating a tape speed signal (S2); drum speed detecting means for generating a drum speed signal (S1); clock signal generating means (5,7) for forming a clock signal from the reproduced signal which is reproduced by means of the head ; decoding means (6,8) supplied with the reproduced signal and the clock signal for decoding a data signal; and control means (9) supplied with the tape speed signal (S2) and the drum speed signal (S1) for controlling driving means (2) of the rotary drum (1) by supplying a rotation speed control signal (S3) so as to change the rotation speed of the rotary drum (1) in response to the speed of the magnetic tape when the speed of the magnetic tape became equal to or larger than a first value and for controlling the clock signal generating means (5,7) by fixing the rotation speed of the rotary drum (1) and supplying a clock control signal (S4,S5) so as to change the clock signal in response to the speed of the magnetic tape when the speed of the magnetic tape became equal to or larger than a second value.

Description: BACKGROUND OF THE INVENTION Field of the Invention This invention relates to a digital signal reproducing apparatus which is applied to a digital VTR. Description of the Prior Art There has been known a digital VTR which is configured to convert a composite color video signal into a digital signal and to record or reproduce it by means of a rotary head. In order to process a reproduced signal, a clock signal synchronizing with the reproduced signal is reproduced by a PLL (phase locked loop). In Fig. 1 showing a conventional arrangement, reference numeral 41 refers to an input terminal of the reproduced signal, numeral 42 defined by a broken line denotes the PLL, and numeral 43 designates a decoding circuit of an M square code. The PLL 42 is composed of a phase comparator circuit 44 and a VCO (voltage controlled oscillator) 45. The phase comparator circuit 44 compares the reproduced signal with an output signal of the VCO 45 and supplies its comparison output to the VCO 45 as a control signal. The PLL 42 limits the lock range to a narrow range in order to prevent a pseudo lock. An output signal (clock signal) of the PSS 42 and the reproduced signal are fed to-the decoding circuit 43, and decoding of the M square code is performed. The M square code is advantageous in that convergence of the spectrum of coded data is good and that no DC component is included as shown in Fig. 2. The PLL 42 is designed to have a narrow lock range 46 about the center frequency F0 of the spectrum. Decoding of the M square code requires a clock signal having a frequency twice the data rate. The digital VTR is operative not only in a normal playback mode, in which the tape speed is the same as that at the time of recording, but also in a variable speed playback mode, in which the tape speed is ± several times to ± decade times as compared with the speed in the normal playback mode (± means the tape running direction). Regarding the variable speed playback mode, an operation in which the tape speed is set in a range close to the normal playback speed, e.g., in the range of (-1 to +3) times is referred to as "variable", an operation in which the tape speed corresponds to the rotation speed of a jog dial is referred to as "jog", and an operation in which the tape speed is continuously variable in a range faster than the variable operation is referred to as "shuttle". The variable speed playback is used for the purpose of searching in a short time a desired one of video signals recorded on a tape. In order to prevent large changes in the data rate (frequency) of the reproduced signal during the variable speed playback, the conventional apparatus varies the number of revolutions of a head drum depending on the tape speed X. As shown in Fig. 3, the number of revolutions R of the drum is controlled, so that changes in the frequency Fp of the reproduced signal are limited to small values also when the tape speed of the variable speed playback is the maximum value ± 40. In Fig. 3, the range, in which the number of revolutions R of the drum is constant, corresponds to the variable range of the tape speed X during the variable operation and the jog operation. The method of varying the number of revolutions of the drum to prevent large changes in frequency of the reproduced signal involves such a problem that the drum rotating mechanism makes it difficult to extend the range of the variable speed playback. For example, in case of a variable speed playback at a tape speed of ± 100 times, it is difficult to prevent large changes in frequency of the reproduced signal by mere control of the number of revolutions of the drum. An apparatus for reading digital data from a magnetic tape is known from EP-A-0 319 218. It provides a system control unit for controlling both of the drum rotation and the read clock for the data in case of variable speed playback using a PLL circuit. OBJECTS AND SUMMARY OF THE INVENTION It is an object of the, invention to provide a digital signal reproducing apparatus capable of extending the range of the variable speed playback. The object is achieved by the features as set out in the claims. The above, and other, objects, features and advantages of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a conventional arrangement; Figs. 2 and 3 are schematic diagrams for use in explanation of the conventional arrangement; Fig. 4 is a block diagram of an embodiment of the invention; Fig. 5 is a block diagram showing one example of PLL; Figs. 6A and 6B are waveform diagrams for explanation of the PLL; Figs. 7A and 7B are schematic diagrams showing control operations of the embodiment of the invention; and Figs. 8 and 9 are block diagrams of an arrangement and a further arrangement of a control signal generating circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the invention is explained below, referring to the drawings. In Fig. 4, reference numeral 1 designates a head drum, and 2 denotes a drum motor portion for rotating the head drum 1. The drum motor portion 2 includes a drum motor and a servo circuit for rotating the drum motor at a proper speed and in a proper phase. The head drum 1 includes four head chips although not shown. First and second head chips are disposed adjacently, and third and fourth head chips are disposed adjacently. The first and third head chips are opposed at 180° intervals, and the second and fourth head chips are disposed similarly. Since a digital color video signal contains a large amount of information, one field thereof is divided into, for example, 3 segments so that each segment is formed of two parallel tracks by the first and second head chips or by the third and fourth head chips. In order to increase the recording density, the embodiment employs a slant azimuth recording, i.e., a recording method in which gaps of head chips forming adjacent tracks extend in different directions each other. Among output signals of the head chips attached to the head drum 1, output signals of head chips of one azimuth (called a "+ azimuth"), i.e., output signals of the first and third head chips, are fed to an equalizing circuit 3 whereas output signals of head chips of the other azimuth (called a "- azimuth") are fed to an equalizing circuit 4. An output signal of the equalizing circuit 3 is applied to a PLL 5 and a decoding circuit 6 for decoding an M square code. An output signal of the equalizing circuit 4 is supplied to a PLL 7 and a decoding circuit 8. The PLL's 5 and 7 produce clock signals which synchronize with the reproduced signal. The decoding circuits 6 and 8 are supplied with the clock signals, respectively, and carry out decoding of the M square code. A control signal generating circuit shown at 9 is provided, and it is supplied with a detection signal S1 indicative of the number of revolutions of the drum from the drum motor portion 2. The circuit 9 is also supplied with a detection signal S2 in response to the tape speed from a tape speed sensor 10. The number of revolutions of the drum can be detected by a magnetic rotation detector associated with the drum motor, and the detection signal S1 proportional to the drum revolution is formed. The tape speed sensor 10 may be, for example, a reel revolution detector which forms the detection signal S2 of a level proportional to the tape speed. The control signal generating circuit 9 gives the servo circuit of the drum motor portion 2 a control signal S3 for controlling the number of revolutions of the drum and control signals S4 and S5 for controlling reference frequencies of the PLL's 5 and 7. Fig. 5 shows an example of an arrangement of the PLL's 5 and 7 and their peripheral circuitries. Reproduced data from the equalizing circuit 3 are fed through an input terminal shown at 11 to an edge pulse generating circuit 12. Referring to Fig. 6, the edge pulse generating circuit 12 produces an edge pulse at the timing just after the rising and falling of the reproduced data. The edge pulse generating circuit 12 supplies the reproduced data to a latch 13 and supplies the edge pulse to a phase comparator circuit 15 of the PLL 5. A VCO 16 supplies its output signal to the phase comparator circuit 15 which, in turn, supplies its output signal to the VCO 16 as a control signal. The phase comparator circuit 15 produces a phase comparison output of a level depending on the phase difference between the edge pulse and the output signal of the VCO 16. The phase comparator circuit 15 includes a low pass filter acting on the comparison output. The VCO 16 produces a clock synchronizing with the edge pulse. The clock is fed to the latch 13, and it is taken out at an output terminal 19. The reproduced data are exerted from the latch 13 in synchronism with the clock, and they are taken out at an output terminal 14. The reproduced data and the clock are fed to the decoding circuit 6 as shown in Fig. 4. The phase comparator circuit 15 of the PLL 5 is supplied with the control signal S4 from an input terminal 17 through an amplifier 18. A DC offset in response to the control signal S4 is added to the comparison output signal of the phase comparator circuit 15. Therefore, the reference frequency of the PLL 5 is controlled depending on the level of the control signal S4. An output signal of the equalizing circuit 4 is fed to an input terminal 21. Concerning an output signal of the equalizing circuit 4, similarly to the output signal of the equalizing circuit 3 referred to above, there are provided the PLL 7 comprising a phase comparator circuit 25 and a VCO 26, a latch 23 for exerting the reproduced data in synchronism with a clock from the PLL 7 to an output terminal 24, and an amplifier 28 for amplifying the control signal from an input terminal 27. Fig. 7 shows control operations of this embodiment. The abscissas of Fig. 7 indicate the relative tape speed X. Assuming that the tape speed is 1 in the normal playback mode, the apparatus is so configured that the variable speed playback is possible, for example, from -100 times to +100 times the normal tape speed. Fig. 7A shows a variation characteristic of the number of revolutions R of the drum with respect to the tape speed X, and Fig. 7B shows a variation characteristic of the playback frequency Fp with respect to the tape speed X. In the recording system in which the color video signal of one field is divided into 3 segments (6 tracks) as referred to above, the number of revolutions R of the drum is set to the triple frequency (= 89.9 Hz) of the frame frequency in the normal playback mode. The frequency Fp of the reproduced data in the normal playback mode is, for example, 128.3 MHz. The number of revolutions R of the head drum with a rotary head attached thereto is held in the same number of revolutions as that of the normal playback mode when the tape speed X approximates the speed in the normal playback mode, e.g., when it is in the range from -5 to +5, so that large changes in the frequency Fp of the reproduced data are prevented in this range. In a range of the tape speed X beyond +5 until +77, the number of revolutions R is reduced in accordance with a speed-up of the tape speed. Similarly, in a range of the tape speed X beyond -5 until -75, the number of revolutions R is increased in accordance with a speed-up of the tape speed X. Relationship between the tape running direction and the rotating direction of the head drum (rotary head) determines the direction of increase or decrease of the number of revolutions R of the drum with respect to the tape speed X. The control of the number of revolutions R prevents large changes in the frequency Fp of the reproduced data. The frequency Fp of the reproduced data is equal to the value of the normal playback mode at limit values of the number of revolutions R of the drum as shown by a solid line 30 in Fig. 7B. In ranges of the tape speed over +77 or -75, the number of revolutions R of the drum is held in a constant value. The limit value of the number of revolutions R is restricted by a head drum rotating mechanism. For example, the number of revolutions of ( ± 32 Hz) may be the limit value with respect to the number of revolutions R of the normal playback mode (= 89.91 Hz). Under a constant value of the number of revolutions R of the drum, the frequency Fp of the reproduced data varies with the tape speed, and, for example, it varies approximately ± 10% at maximum of the value in the case of the nomal playback mode. The reference frequencies of the PLL's 5 and 7 are controlled by the control signals S4 and S5 so as to follow the variation in the frequency Fp, and the PLL's 5 and 7 can be locked to the reproduced data. When the rotary head obliquely runs across a track during the variable speed playback mode, variation in the frequency Fp of the reproduced data differs depending on the azimuth angle. Such a difference caused by the azimuth angle gets large as a deviation of the frequency Fp of the reproduced data increases. In Fig. 7B, a broken line 31A indicates such a frequency variation of the reproduced data from a - (minus) azimuth track whereas a broken line 31B indicates a frequency variation of the reproduced data from a + (plus) azimuth track. Therefore, the PLL's 5 and 7 are independently controlled by the control signals S4 and S5 from the control signal generating circuit 9. Since the control of the number of revolutions R of the drum provides a certain limitation to the variation in the frequency Fp of the reproduced data, the PLL's 5 and 7 can produce clocks in synchronism with the reproduced data under controls of the reference frequencies of the PLL's 5 and 7 in response to the tape speed X. The control signal generating circuit 9 is composed of a microcomputer, for example. The microcomputer generates the control signal S3 for controlling the number of revolutions from the tape speed indicated by the detection signal S2. The control signal S3 is exerted according to the characteristic shown in Fig. 7A. The reference frequencies of the PLL's 5 and 7 are varied depending on the relative speeds of the tape and the head. Therefore, the microcomputer of the control signal generating circuit 9 computes the relative speeds from a detection signal S1 concerning the number of revolutions and a detection signal S2 concerning the tape speed. Depending on the obtained relative speeds, the control signals S4 and S5 for the PLL's 5 and 7 are produced. Fig. 8 shows an example of the control signal generating circuit 9. The microcomputer shown at 32 forms the control signal S3 for the drum motor portion 2 and the control signals S4 and S5 for the PLL's 5 and 7 as referred to above. Since the drum motor portion 2 is composed of a digital servo, the control signal S3 in the form of a digital signal is formed. Since the control signals S4 and S5 for the PLL's 5 and 7 are analog signals, D/A converters 33 and 34 are provided to use their output signals as the control signals S4 and S5 through amplifiers 35 and 36. Fig. 9 shows another example of the control signal generating circuit 9. The microcomputer 9 forms a single digital control signal for controlling the reference frequencies of the PLL's, and it is fed to variable gain amplifiers 37 and 38. An output signal of the variable gain amplifier 37 is used as the control signal S4 for the PLL 5 provided in the + azimuth channel whereas an output signal of the variable gain amplifier 38 is used as the control signal S5 for the PLL 7 provided in the - azimuth channel. The arrangement of Fig. 9 has such advantages that a single D/A converter suffices it and that the microcomputer 32 need not calculate individual control signals for channels having different azimuth angles. The invention may also be used in program playback in which the tape speed is changed from the normal speed to adjust the playback period of time. Additionally, the invention may also be used in a digital VTR using a channel coding other than the M square code.

Claims: A digital signal reproducing apparatus for reproducing a digital signal recorded on a magnetic tape from the magnetic tape running at a speed different from the speed at the time of recording by means of a head provided on a rotary drum (1), comprising: tape speed detecting means (10) for detecting a running speed of the magnetic tape and for generating a tape speed signal (S2); drum speed detecting means for detecting a rotation speed of the rotary drum (1) and for generating a drum speed signal (S1); clock signal generating means (5,7) for forming a clock signal from the reproduced signal which is reproduced by means of said head; decoding means (6,8) supplied with the reproduced signal and the clock signal for decoding a data signal; and control means (9) supplied with the tape speed signal (S2) and the drum speed signal (S1) for controlling driving means (2) of the rotary drum (1) by supplying a rotation speed control signal (S3) so as to change the rotation speed of the rotary drum (1) in response to the speed of the magnetic tape when the speed of the magnetic tape becomes equal to or larger than a first value and for controlling said clock signal generating means (5,7) by fixing the rotation speed of the rotary drum (1) and supplying a clock control signal (S4,S5) so as to change the clock signal in response to the speed of the magnetic tape when the speed of the magnetic tape becomes equal to or larger than a second value. A digital signal reproducing apparatus according to claim 1, characterized in that said clock signal generating means (5,7) includes a PLL circuit having phase comparator means (15,25) and said phase comparator means (15,25) is controlled by the clock control signal (S4,S5) to change the clock signal. A digital signal reproducing apparatus for reproducing a digital signal recorded on a magnetic tape from the magnetic tape running at a speed different from the speed at the time of recording by means of a pair of heads having different azimuths provided on a rotary drum (1), comprising: tape speed detecting means (10) for detecting a running speed of the magnetic tape and for generating a tape speed signal (S2); drum speed detecting means for detecting a rotation speed of the rotary drum (1) and for generating a drum speed signal (S1); first and second clock signal generating means (5,7) for forming first and second clock signals (S4,S5) from first and second reproduced signals which are reproduced by means of said pair of heads having different azimuths; first and second decoding means (6,8) each supplied with one of the pair of reproduced signals and one of the pair of clock signals for decoding first and second data signals; and control means (9) supplied with the tape speed signal (S2) and the drum speed signal (S1) for controlling driving means (2) of the rotary drum (1) by supplying a rotation speed control signal (S3) so as to change the rotation speed of the rotary drum (1) in response to the speed of the magnetic tape when the speed of the magnetic tape becomes equal to or larger than a first value and for controlling said first and second clock signal generating means (5,7) by fixing the rotation speed of the rotary drum (1) and supplying first and second clock control signals (S4,S5) so as to change the first and second clock signals (S4,S5) in response to the speed of the magnetic tape when the speed of the magnetic tape becomes equal to or larger than a second value.

Inventors: ISOZAKI MASAAKI, MAKISE TETSURO, TAKANO KAZUHIRO, ISOZAKI, MASAAKI, MAKISE, TETSURO, TAKANO, KAZUHIRO
Applicants: SONY CORP, SONY CORPORATION
Application year: 1990
Main classification: H04N5
IPC codes: H04N5