Temperature-independent variable-current source

Abstract: This variable-current source comprises a differential stage (10) and a pair of voltage buffers (11,12) which respectively receive, at the input, a variable input voltage (V IN ) and a reference voltage (V REF ) and are connected at the output to the differential stage. Both buffers comprise a resistor (R₁,R₂) flown by a current which varies only as a function of the respective input voltage and of its resistance and therefore depends thermally exclusively on this resistance, and provide output voltages (V₁,V₂) which depend upon these currents, so that the output current generated by the differential stage (10) is temperature-­ independent.

Description: The present invention relates to a temperature-independent variable-current source. As is known, the need is often felt to generate a current which is correlated to a variable external voltage but is practically insensitive to the temperature variations which may affect the integrated circuit in which the source is physically comprised. It is sometimes also required that the variation range of the produced current be fixed and preset, thus ensuring that the value of the current is always comprised between a minimum value and a maximum value. Current sources adapted to generate a current which is variable as a function of an input voltage are known in various forms. For example, figure 1 illustrates a very simple diagram implementing a variable current source. In this circuit, which comprises a current mirror formed by a pair of transistors T₁ and T₂ (of which T₁ is diode-connected) both of which have their emitters connected to the power supply V CC , their bases connected to one another and their collectors which respectively define, through the resistor R, the input (contact pad 1) receiving the variable input voltage V IN and the output feeding the output current I O , the following is true: I X = V CC - V IN -V BE1 R where V BE1 is the base-emitter drop of the transistor T₁. The mirror structure, with T₁ = T₂, forces I O = I X so that by varying the input voltage V IN the output current I O varies accordingly. However, since V BE1 and R are temperature-dependent, I O has the following thermal drift: ∂ I O ∂ T = -∂V BE1 ∂ T · R - (V CC - V IN - V BE1 ) ∂ R ∂ T R² wherein the input voltage V IN is assumed to be temperature-independent. This equation generally yields a non-zero result, so that the described structure supplies an output current the value whereof varies according to the temperature. Another structure used to generate variable currents is shown in figure 2, and comprises a pair of transistors T₃ and T₄, the emitters whereof are coupled through the resistor R′; the bases of said transistors are respectively connected to the input voltage V IN and to a reference voltage V REF . The collector of T₄ is furthermore connected to the supply voltage V CC , the emitter of T₃ is connected to a fixed current source I and its collector defines the output which supplies the current I O . The following relations are true for this circuit: I Y = (V REF - V BE4 ) - (V IN - V BE3 ) R′ I O = I - I Y wherein V BE3 and V BE4 are the base-emitter drops of T₃ and T₄. By rewriting I Y , the following is obtained: inserting the law which links the collector current to the base-emitter drop of T₃ and T₄. The temperature-dependence of I Y , and therefore of I O , is thus evident, so that the desired temperature- cannot be achieved even with the structure shown in figure 2. Document US-A-3717777 discloses a simplified reference current source whose current output may be determined by a reference resistor and a reference voltage source. However, in this solution, the output current is dependent on the thermal coefficient of the reference resistor. Another solution is provided by document EP-A-0263572, wherein a voltage-controlled current source producing two output current signals is described. This current source comprises an input buffer and a reference buffer, each coupled separately to a current mirror and also coupled together by a transmitting resistor. Similarly to document US-A-3717777, the output current is dependent on the thermal coefficient of the transmitting resistor. Given this situation, the aim of the present invention is to provide a variable-current source which is truly temperature-independent. Within this aim, a particular object of the present invention is to provide a current source wherein the variation range of the output current is fixed and preset. An important object of the present invention is to provide a current source in which the dependence of the output current upon the input voltage can be adjusted according to the application and to the requirements. Not least object of the present invention is to provide a current source which is highly reliable, can be easily integrated without entailing complications and without requiring large silicon areas and which does not require, for its manufacture, devices or procedures different from those commonly in use in the electronics industry. This aim, the objects mentioned and others which will become apparent hereinafter are achieved by a temperature-independent variable-current source as defined in the accompanying claims. The characteristics and advantages of the invention will become apparent from the description of two preferred embodiments, illustrated only by way of non-limitative example in the accompanying drawings, wherein: figures 1 and 2 show prior current sources; figure 3 shows a first embodiment of the variable-current source according to the invention; and figure 4 shows a different embodiment of the current source according to the invention. Figures 1 and 2, which illustrate two known solutions which have already been described, are not described hereinafter. Reference should instead be made to figure 3, which shows the variable-current source according to the invention. As can be seen, the current source comprises a differential stage, generally indicated at 10, and a pair of voltage decoupling stages or buffers 11 and 12. In detail, the differential stage 10 comprises a pair of transistors T₉ and T₁₀ of the PNP type having their emitters mutually coupled and connected to a fixed current source element I and their bases defining the inputs 13 and 14 of the differential stage. The collector of T₉ defines the output of the current source which supplies the output current I O which is required to be variable but temperature-independent, whereas the collector of T₁₀, flown by the current I Z , is connected to the ground defining a reference potential line. The voltage buffers 11, 12 are equal, and each comprises a pair of transistors T₅, T₆ and T₇, T₈ respectively. The NPN-type transistors T₅, T₇ have their base terminals connected respectively to the input voltage V IN (as a function of which the output current is required to vary) and to a reference voltage V REF , their collector terminals connected to the supply line V CC , which defines a further reference potential line, and their emitter terminals connected to the base terminals of the transistors T₆, T₈, which have the opposite conductivity type with respect to T₅, T₇ and are therefore of the PNP type. The transistors T₆, T₈ are in turn connected, with their emitter terminals, to the supply voltage V CC through resistors R₁, R₂. Voltages V₁, V₂ are present on the emitter terminals of T₆, T₈ and, as will become apparent hereafter, are linked to the respective input voltages and are temperature-independent. Each buffer furthermore comprises a pair of transistors, respectively T₁₁, T₁₂ and T₁₃, T₁₄, which are identical to T₆, T₈, i.e. are of the PNP type, have the same emitter area and are integrated, if possible, physically proximate in the integrated circuit. T₁₁, T₁₂ and T₁₃, T₁₄ are diode-connected in series between T₆, respectively T₈, and the ground. The connection points between T₆ and T₁₁ and between T₈ and T₁₃ represent the outputs of the two buffers, feeding the voltages V₃ and V₄ which are supplied to the inputs 13 and 14 of the differential stage. Finally, each buffer comprises a further transistor T₁₅, T₁₆, respectively identical to T₅ and T₇, i.e. made with the same technology, of the NPN type, with the same emitter area, and are integrated, if possible, physically proximate to T₅ and T₇, respectively. T₁₅, T₁₆ are connected to the ground with their emitter terminals, to the intermediate point between T₁₁ and T₁₂ and between T₁₃ and T₁₄ with their base terminals, and to the emitter of T₅, respectively T₇, with their collector terminals. For the description of the operation of the current source according to the invention, assume that all the PNP transistors have equal area, like the NPN ones. Assume also that the voltages V IN and V REF are thermally stable voltages and that the current I is temperature-independent. For the buffer 11, the following is true: V₁ = V IN - V BE5 + V BE6 wherein V BE5 and V BE6 represent the base-emitter drop of the transistors T₅ and T₆. Except for second-order effects, such as the Early effect, which can be considered negligible, since T₆ and T₁₂ operate with the same collector current and are identical to one another, they have base-emitter drops which are equal to one another and to the base-emitter drop of T₁₅, due to the parallel connection between the base-emitter junctions of T₁₂ and T₁₅. Since T₅ and T₁₅, which have the same dimensions, are also flown by the same current, the following is consequently true: V BE5 = V BE15 = V BE12 . Consequently V₁ = V IN and similarly, for the buffer 12, V₂ =V REF Each of the two buffers furthermore generates a current which depends on the input voltage, thermally depends only on the value of R₁ and R₂ and is equal to: I₁ = V CC - V IN R₁ ; I₂ = V CC - V REF R₂ as well as an output voltage which depends on the value of the above mentioned respective current and on the temperature: For the differential stage 10, which is supplied by the fixed temperature-independent source element I and is driven by the voltages V₃ and V₄, the following relations are furthermore true: I = I O + I Z V EB10 - V EB9 = V₃ - V₄ where V BE9 , V BE10 are the base-emitter drops of T₉ and T₁₀ respectively. Furthermore and, replacing (5), (6) and (2) in (4), the following is obtained: and therefore, with simple passages, I O = I Z 2 I₂ I₁ Replacing the values of I Z , I₁ and I₂ obtained from (3) and (1) in this last equation, with simple passages the following is finally obtained: I O = I 1 + 2 V CC - V IN V CC - V REF 2 R₂ R₁ From (9) it can be immediately deduced that I O is temperature-independent in the entire range of variation of V IN . In fact, as mentioned, V IN , V REF and I are assumed to be thermally invariant, and the ratio R₁/R₂ also has this property if both resistors are obtained from the same kind of diffusion. In practice, as can be seen from (9), with the circuit illustrated in figure 3 I O depends quadratically on V IN . However, the dependence of I O can be modified in various manners, for example by appropriately choosing V REF , the ratio R₁/R₂, or by introducing a greater or smaller number of diodes in the voltage buffer 11, 12. By way of example, figure 4 illustrates a solution in which a cubic rather than quadratic dependence is obtained. As can be seen, the diagram of figure 4 substantially corresponds to that of figure 3, with the difference that three diodes are provided between the output of the buffers on which the voltages V₃, V₄ are taken and the ground, and precisely a further diode T₁₇ (T₁₈ in the case of the buffer 12) is provided between the collector of T₁₁ (T₁₃) and the emitter of T₁₂ (T₁₄). The following relations are therefore true for the embodiment illustrated in figure 4: Using these relations the following is obtained: I O ′ = I 1 + 3 V CC - V IN V CC - V REF 3 R₂ R₁ The number of diodes can naturally also be reduced so as to have only the diode T₁₂ and T₁₄. The response curve can also be changed by modifying the emitter area of T₉ and T₁₀. In this case, (5) and (6) become so that wherein A₉, A₁₀ are the emitter areas of T₉, T₁₀. As can be seen from the above description, the invention fully achieves the proposed aim and objects. A variable-current source has in fact been provided which can generate an output current which is truly temperature-independent in the entire range of variation of the input voltage. The fact is stressed that this result is obtained by virtue of the fact that the currents I₁ and I₂ from which the differential stage control voltages V₃, V₄ depend vary according to the temperature only through the value of the resistor R₁, respectively R₂, and that the differential stage has an output current which depends exclusively on the ratio of said resistors, if its inputs are connected to two identical buffer stages, so that by implementing said resistors with the same technology, their ratio and therefore the output current are temperature-independent. The current variation range is intrinsically limited by the presence of the differential stage, thus satisfying one of the demands often placed on this kind of circuit. The invention is furthermore circuitally simple and does not require modifications of the production processes. In the circuit according to the invention, the dependence between the control or input voltage V IN and the generated current I O can furthermore be easily dimensioned according to the required characteristics by acting on various parameters, in any case preserving the thermal stability of the output current. Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included for the sole purpose of increasing the intelligibility of the claims and accordingly such reference signs do not have any limiting effect on the scope of each element identified by way of example by such reference signs.

Claims: A temperature-independent variable-current source, comprising a differential stage (10) defining a first and a second input terminals (13,14) and at least one differential output terminal, characterized in that it comprises a first and a second buffer (11,12) which are identical to one another, each having an input terminal and an output terminal, said input terminals of said first and second buffers being connected respectively to a variable input voltage (V IN ) and to a reference voltage (V REF ), said output terminals of said first and second buffers being connected respectively to said first and second input terminals (13,14) of said differential stage (10), each of said buffers (11, 12) comprising: first means (T₅,T₇) generating a first voltage drop between said inputs of said buffers (11,12) and a control terminal second means (T₆,T₈) generating a second voltage drop between a first reference potential line and said input terminals of said differential stage (10) resistive means (R₁,R₂) interposed between said means for generating a second voltage drop and said first reference potential line; detecting means (T₁₂,T₁₄) for detecting said second voltage drop; first current source means (T₁₅,T₁₆) controlled by said detecting means so as to supply said first means (T₅,T₇) for generating a first voltage drop with a corresponding control current which forces said second means (T₆,T₈) for generating a first voltage drop to operate at a working point wherein said first voltage drop is equal in absolute value to said second voltage drop; said resistive means (R₁, R₂) defining a resistance and generating each a current (I₁,I₂) which varies as a function of the voltage on said input terminals of said buffers and thermally depends only on said resistance, and said output terminals of said buffers (11,12) providing output voltages (V₁,V₂) which depend on said currents (I₁,I₂), said output voltages being supplied to said differential stage to generate a temperature-independent current (I₀) at said differential output terminal. A current source, according to claim 1, characterized in that said differential stage (10) comprises a first and a second transistor (T₉,T₁₀) defining collector, base and emitter terminals, said emitter terminals being connected to one another and to second current source means (I), said base terminals defining said first and second input terminals of said differential stage, and said collector terminal of said first transistor defining said output terminal of said differential stage. A current source according to the preceding claims, characterized in that said first means for generating a first voltage drop are constituted by a third transistor (T₅,T₇) of a first conductivity type, having collector and emitter terminals interposed between said first and a second reference potential line, and a base terminal defining said input terminals, said third transistor (T₅,T₆) generating said first voltage drop between its base and emitter terminals. A current source according to claim 3, characterized in that said second means for generating a second voltage drop are constituted by a fourth transistor (T₆,T₈) of an opposite conductivity type having collector and emitter terminals respectively interposed between said second and said first reference potential line, and a base terminal connected to the emitter terminal of said third transistor (T₅,T₇), said fourth transistor (T₆,T₈) generating said second voltage drop between its base and emitter terminals. A current source according to claim 4, characterized in that said resistive means (R₁,R₂) are interposed between said emitter terminal of said fourth transistor (T₆,T₈) and said first reference potential line; said detecting means (T₁₂,T₁₄) being adapted to detect said second voltage drop of said fourth transistor and first current source means (T₁₅,T₁₆) being controlled by said detecting means so as to supply said third transistor (T₅,T₇) with a corresponding control current which forces said third transistor to operate at a working point wherein said first voltage drop is equal in absolute value to said second voltage drop of said fourth transistor, and to generate a temperature-independent voltage drop across said resistive means (R₁,R₂). A current source, according to the preceding claims 4 to 5, characterized in that said detecting means comprises a fifth transistor (T₁₂,T₁₄) connected in series to said fourth transistor (T₆,T₈) and flown by the same current, said fifth transistor having said opposite conductivity type and being equal in dimensions to said fourth transistor, so as to generate a base-emitter voltage drop which is equal to said second voltage drop, and in that said source means comprises a sixth transistor (T₁₅,T₁₆) connected in series to said third transistor (T₅,T₇) and flown by the same current, said sixth transistor having its base and emitter terminals connected in parallel to the base and emitter terminals of said fifth transistor, having said first conductivity type and being equal in dimensions to said third transistor, so as to generate a further base-emitter drop which is equal to said second voltage drop and a corresponding control current supplied to said third transistor. A current source according to claim 6, characterized in that said first reference potential line is a supply line (V CC ) and in that said second reference potential line is a ground line, said third transistor (T₅,T₇) having its collector terminal connected to said supply line and its emitter terminal connected to the collector terminal of said sixth transistor (T₁₅, T₁₆), said fourth transistor (T₆,T₈) having its emitter terminal connected to said supply line through resistive means and its collector terminal connected to the emitter terminal of said fifth transistor (T₁₂, T₁₄), said fifth transistor (T₁₂,T₁₄) having its base and collector terminals short-circuited and connected to the ground, said sixth transistor (T₁₅,T₁₆) having its base terminal connected to the emitter terminal of said fifth transistor and its emitter terminal connected to the ground. A current source according to the preceding claims 6 to 7, characterized in that each said buffer (11,12) further comprises at least one seventh transistor (T₁₁,T₁₃) which has its base and collector terminals short-circuited and its emitter terminal connected to said output terminal and its collector terminal connected to the emitter terminal of said fifth transistor (T₁₂,T₁₄). A current source according to the preceding claims 6 to 8, characterized in that each said buffer (11,12) further comprises a plurality of transistors (T₁₁,T₁₇;T₁₃,T₁₈) having short-circuited base and collector terminals and being connected in series between said output terminal (13,14) and the emitter terminal of said fifth transistor (T₁₂,T₁₄). A current source according to the preceding claims 2 to 6, characterized in that said first and second transistors (T₉,T₁₀) of said differential stage (10) have a preset area ratio for setting different output currents. A current source according to the preceding claims 9, characterized in that said third and sixth transistors (T₅,T₇,T₁₅,T₁₆) are of the NPN type and in that said first, second, fourth, fifth and seventh transistors (T₆,T₈-T₁₀,T₁₂,T₁₄), as well as possibly said plurality of short-circuited transistors (T₁₁,T₁₃,T₁₇,T₁₈) are of the PNP type.

Inventors: BETTI GIORGIO, GORNATI SILVANO, SACCHI FABRIZIO, ZUFFADA MAURIZIO, BETTI, GIORGIO, GORNATI, SILVANO, SACCHI, FABRIZIO, ZUFFADA, MAURIZIO
Applicants: SGS THOMSON MICROELECTRONICS, SGS-THOMSON MICROELECTRONICS S.R.L.
Application year: 1990
Main classification: G05F3
IPC codes: G05F3