Apparatus for detecting broadcast FM satellite waves

Abstract: An apparatus for receiving broadcast FM waves using an FM (Frequency Modulated) detector is disclosed in which an output signal level of an automatic gain controller (AGC) (17) is controllable so that when the C/N ratio is reduced and the output level of the automatic gain controller is reduced, the loop gain of a PLL type FM demodulator is accordingly reduced and response is delayed with the bandwidth being narrowed. Therefore, since delayed threshold extension is applied thereby, no signal noise, such as white points appearing on an image screen, will occur.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to an FM (frequency modulated) detector used in e.g., a satellite broadcast receiving apparatus. Background of the Art Since FM modulation signals are used for satellite broadcasting, an FM detector is incorporated into a satellite broadcast receiver. A PLL (Phase Locked Loop) type FM demodulator is generally used for such an FM modulator. In rainy weather the sensitivity and C/N (receiving Carrier to Noise) ratio of satellite antennas receiving FM modulation signals are often reduced. Under such conditions, since a threshold phenomenon occurs which becomes out of the lock-in range of the PLL, a threshold extension is applied to the FM demodulator to prevent such a threshold phenomenon from occurring. One way to accomplish this is to vary the bandwidth of a band-pass filter which limits the cut-off frequency of a low-pass filter, e.g., a PLL loop and a bandwidth input to the FM demodulator can he used. However, it is difficult to incorporate such a circuit in an FM satellite broadcast receiver due to the complexity of the structure. A known FM detector (SYMPOSIUM RECORD OF THE 15TH INTERNATIONAL T.V. SYMPOSIUM; Bern; 11th - 17th June 1987, pages 490 - 502; A.H. NEELEN: "An indoor unit for satellite TV") comprises a phase detector, which compares the phases of two input signals, a low pass filter, a voltage controlled oscillator controlled by the output of the low pass filter, a band pass filter, a AGC circuit and a AGC controller for controlling the gain of the AGC circuit. However, this FM detector comprises three complex integrated circuits to receive and demodulate broadcast TV signals. SUMMARY OF THE INVENTION It is an object of the present invention to provide an apparatus for detecting FM satellite broadcast waves and which incorporate an FM demodulator of the PLL-type which can control a threshold extension of the FM demodulator merely by adding a simple circuit. The above-described object can be achieved by providing a FM detector according to the claim 1. The foregoing and other objectives, features and advantages of the invention will be more readily understood upon consideration of the following detailed description of certain preferred embodiments of the invention, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a simplified circuit block diagram of a satellite broadcast receiving apparatus using an FM detector in a preferred embodiment according to the present invention. Fig. 2 is a wiring diagram of an AGC (Automatic Gain Control) circuit used in the FM detector shown in Fig. 1. Fig. 3 is a wiring diagram of a modified AGC (Automatic Gain Control) circuit used in the FM detector shown in Fig. 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Reference will hereinafter be made to the drawings in order to facilitate a better understanding of the present invention. Figs. 1 and 2 show a preferred embodiment of an FM detector applicable to a satellite broadcast receiving apparatus according to the present invention. In Fig. 1, a broadcast signal S BS derived from a broadcasting satellite I is an FM (Frequency Modulated) signal. The signal S BS (12 GHz band) is picked up from a BS (Broadcasting Satellite) antenna 2. The signal picked up from the BS antenna 2 is frequency down converted by an S-U converter 3, thereby providing a first intermediate frequency signal S IF1 having a frequency in the 1 GHz band. The signal S IF1 from the S-U converter 3 is supplied through a cable 4, a booster (amplifier) 5, and a cable 6 to a B-S tuner 7 where it is further processed to output a video signal. Within the B-S tuner 7 the signal S IF1 is supplied to a second mixer 9 via a first intermediate frequency amplifier 8. The second mixer 9 receives a local signal from a second local oscillator 10 and converts the first intermediate frequency signal S IF1 into a second intermediate frequency signal S IF2 of, e.g., 402.78 MHz. The second local oscillator 10 receives a control signal from a microcomputer 11. This control signal varies the frequency of the local signal to perform selection of the received channel. The second intermediate frequency signal S IF2 output from the second mixer 9 is supplied through a second intermediate frequency (IF) filter 12 to a second intermediate frequency amplifier 13. The output of the amplifier 13 is supplied to an automatic gain control circuit 14 (hereinafter, referred to as an AGC circuit) of the FM detector, denoted generally by the reference A. The FM detector A includes a series connection of an AGC circuit 14, a band pass filter (BPF) 15 which controls the band of the output of the AGC circuit 14, and a PLL type FM demodulator 16. An AGC control circuit 17 connected between the output of the band pass filter 15 and another input of the AGC circuit 14 controls the output level of the AGC circuit 14. The AGC circuit 14 is of the reverse type. The control for the base voltage of a gain controlling transistor (not shown) causes its output signal level to be held constant with respect to variation of the input signal voltage. The frequency band of the output signal of the AGC circuit 14 is limited by means of the bandpass filter 15. Its output is supplied to an FM detector (demodulator) 16. The FM demodulator 16 is constituted by a phase locked loop (PLL) circuit including a phase comparator 18, a low pass filter 19 (LPF) and a voltage controlled oscillator (VCO) 20. The phase comparator 18 compares the phase of the signal output from the band pass filter 15 with the phase of the signal output from the voltage controlled oscillator 20. The low pass filtered, demodulated signal is supplied to a video signal processing circuit 21, thereby demodulating the input second intermediate frequency signal S IF2 . The PLL type FM demodulator 16 has faster response characteristics as the loop gain K becomes larger and vice versa. If the loop gain becomes small, the response becomes slower and the bandwidth of the PLL demodulator becomes narrower. The AGC controller 17 receives the output of the band pass filter 15. When the output signal of the band pass filter 15 is compared with a reference signal, the comparison result becomes an output level control signal for the AGC circuit 14. The level of the reference signal is variable. A specific example of the AGC controller 17 is hereinafter described as shown in Fig. 2. The output signal of the band pass filter 15 is introduced into an input terminal t₁, in Fig. 2. The output signal is converted into a direct current by means of a diode D and a capacitor C, and the voltage is supplied to a non-inverting input terminal of an operational amplifier OP. An inverting (-) terminal of the operational amplifier OP receives a voltage +V divided by a divider network consisting of a resistor R₁, a resistor R₂, a resistor R₃, and a transistor T r as a reference signal. The base terminal of the transistor T r receives a threshold extension control signal from an external source via an input terminal t₂. It is noted that the control signal is usually at a low (LOW) level and an operator can select the level of the control signal to be a high (HIGH) level or alternatively, automatic detection of a reduction in the C/N value can cause a change to high level. The operational amplifier OP outputs a difference signal, comparing the levels of the reference signal and output signal of the band pass filter 15. The output signal of the operational amplifier OP is supplied to an output terminal t₃ which is connected to the base of the gain controlling transistor (not shown) of the AGC circuit 14. In operation, the satellite broadcast received by the BS antenna 2 is converted into the first intermediate frequency signal S IF1 via the S-U converter 3. The first intermediate frequency signal S IF1 is supplied to a second mixer 9 via the amplifier 5 and the first intermediate frequency amplifier 8. The second mixer 9 converts the first intermediate frequency signal into a second intermediate frequency signal S IF2 , which is then supplied to the AGC controller 14 via the second intermediate frequency filter 12 and the second intermediate frequency amplifier 13. The second intermediate frequency signal S IF2 supplied to the AGC controller 14 is then supplied to the FM demodulator 16 via the band pass filter 15 as a constant level signal and demodulated by the FM demodulator 16. Suppose that the C/N value of the satellite broadcast signal is reduced. In this case the control signal of the threshold extension is changed from the low level to the high level by operator selection, the transistor T r is turned ON so that the voltage level of the reference signal applied to the inverting terminal of the OP amplifier is changed from a high level to a low level and therefore the output level of the operational amplifier Op is increased. When the output signal of the operational amplifier OP becomes increased, the output level of the AGC controller 14 is reduced and the input signal level of the FM demodulator 16 is also accordingly reduced. The loop gain of the PLL in the FM demodulator 16 becomes reduced and its response becomes slower. Thus, the bandwidth of the PLL demodulator 16 becomes narrower. Consequently, the operation of the threshold extension is applied. When the threshold extension is applied, the trackability of the high frequency ranges becomes better and the multiplicity of white points on an image screen disappear so as to render the image screen legible. In the preferred embodiment, the reference signal applied to the inverting terminal of the operational amplifier OP is varied in two stages according to the turn-on state or turn-off state of the transistor T r shown in Fig. 2. If the resistor R₃ is a variable resistor or if a current (or voltage) source is used in place of the transistor T r , as shown in Fig. 3, the reference signal level can be changed linearly. Therefore, broader or finer control can be achieved according to the C/N ratio. More efficient control of threshold extension can be carried out by the addition of a simple circuit which controls the output level of the AGC controller 17. As described hereinabove about the linear operation of the circuit, since in the FM detecting apparatus in which the output signal of the AGC circuit 14 is input to the PLL FM demodulator 16, the output level of the AGC circuit 14 is controllable. When R₃ is a variable and T r is replaced by a current source, the circuit is able to operate linearly. Suppose that the circuit works linearly, and the C/N value signal is supplied to the threshold extension control signal terminal 12 in Fig. 3, then, when the C/N value is reduced, the level at terminal 12 in Fig. 3 is reduced, the output level of the AGC circuit 14 is increased and the loop gain of the PLL circuit 16 is reduced. Then, since the response becomes delayed and the band width of the PLL circuit 16 becomes narrower, then the operation of the threshold extension is soon applied and image noise, such as white points appearing on the image screen, disappear. It will fully be appreciated by those skilled in the art that the foregoing description has been made in terms of the preferred embodiment and various changes and modifications can be made without departing from the scope of the present invention which is to be defined by the appended claims.

Claims: An FM detector comprising: (a) a phase detector (18), having two input terminals, which compares the phases of two signals applied to the two input terminals and an output terminal; (b) a low pass filter (19) which is connected to the output terminal of the phase detector; (c) a voltage controlled oscillator (20) controlled by the output of the low pass filter and connected to supply a signal to a first one of the input terminals of the phase detector, (d) a band pass filter (15) (e) an AGC (Automatic Gain Control) circuit (14) connected in series through the band pass filter to a second one of the input terminals of the phase detector; and (f) an AGC (Automatic Gain Control) controller (17) connected to the second one of the input terminals of the phase detector and which supplies a signal to the AGC circuit (14) for controlling the gain of the AGC circuit, characterized in that the AGC controller (17) comprises an input terminal, an operational amplifier (OP) having non-inverting and inverting inputs, a diode (D) connected in series with the non-inverting input and the input terminal of the AGC controller, a reference voltage source (+V), a transistor (Tr), and a plurality of resistors (R1, R2, R3) connected in series across the reference voltage source to form a controllable voltage divider network which is connected to the inverting input to supply a controllable reference voltage thereto. An FM detector according to claim 1, wherein the AGC controller (17) is manually controlled. An FM detector according to claim 1, which further comprises a reference voltage circuit which supplies a reference voltage to the AGC controller. An FM detector according to claim 3, wherein the reference voltage circuit supplies a variable voltage to the AGC controller. An FM detector according to claim 1, which further comprises a FM receiver having (a) an input signal amplifier (8) supplied with incoming signals and outputting an amplified corresponding signal; (b) a microprocessor (11) for controlling station selection operations; (c) a local oscillator (10), connected to the microprocessor and controlled by it, for producing a VCO output signal; (d) a mixer (9) supplied with the output signal from the input signal amplifier and the VCO output signal for mixing them together and generating a corresponding output signal at an output terminal; (e) a filter (12) connected to the output terminal of the mixer; (f) an IF (Intermediate Frequency) amplifier (13) having an output terminal and being connected in series with the filter to the output terminal of the mixer; (g) the AGC circuit (14) connected to the output terminal of the IF amplifier; and (h) the band pass filter (15) connected in series between the AGC circuit and a second one of the input terminals of the phase detector. An FM detector according to claim 1, which further comprises a receiver of FM modulated video signals broadcast from a satellite having (a) an input signal amplifier (8) supplied with incoming signals and outputting an amplified corresponding signal; (b) a microprocessor (11) for controlling station selection operations; (c) a local oscillator (10), connected to the microprocessor and controlled by it, for producing a VCO output signal; (d) a mixer (9) supplied with the output signal from the input signal amplifier and the VCO output signal for mixing them together and generating a corresponding output signal at an output terminal; (e) a filter (12) connected to the output terminal of the mixer; (f) an IF (Intermediate Frequency) amplifier (13) having an output terminal and being connected in series with the filter to the output terminal of the mixer; (g) the AGC circuit (14) connected to the output terminal of the IF amplifier; (h) the band pass filter (15) connected in series between the AGC circuit and the first input terminal of the phase detector; and (i) the AGC controller (17) to the band pass filter to be supplied with the signal from the output of the band pass filter and which supplies a signal to the AGC circuit for controlling the gain of the AGC circuit.

Inventors: KOBAYASHI KOZO C O SONY CORPOR, MITA HIROYUKI C O SONY CORPORA, KOBAYASHI, KOZO, C/O SONY CORPORATION, MITA, HIROYUKI, C/O SONY CORPORATION
Applicants: SONY CORP, SONY CORPORATION
Application year: 1990
Main classification: H03D3
IPC codes: H04N7, H03D3