Still video camera

Abstract: A still video camera using a solid-state memory (12) device as the image recording medium, includes a plurality of data compression circuits (22,24) including a non-compression one, wherein one of the plurality of data compression circuits are selectively operated according to image data.

Description: This invention relates to still video cameras using a solid-state memory device as the image recording medium. Electronic still video cameras using a magnetic floppy disc as the image recording medium are known. In view of recent advances in the high storage and low cost unit production technique of semiconductor memories, a new type of still video camera which makes use of a semiconductor memory device as the image recording medium is regarded as promising. The image sensor of the still video camera, for example, the CCD type image sensor, even in the present state of art, has some five hundred thousand picture elements. In the near future, it is likely to realize an increase of the number of picture elements to one million or more. To store data of the great number of picture elements in the memory without deterioration, as one picture element takes 8 bits, for one frame of five hundred thousand picture elements, four megabits have to be used. To provide as high a capacity of image storage of 25 frames as that of the magnetic floppy disc, the number must be increased by a factor of twenty-five to one hundred megabits. However far the high storage capacity technique of semiconductor memories may advance, there can be demerits in cost, size and consumption of electric power. Reference is made to US Patent No 4,758,883 which discloses a still video camera comprising A/D conversion means for converting an output of image sensing means for digital form; a plurality of compression means for performing compression treatments on an output of said A/D conversion means; and memory means for storing an output of said plurality of compression means. An object of the present invention is to provide a still video camera capable of recording a large amount of image information in a limited memory capacity. According to the invention there is provided an image pickup apparatus in which an image signal, obtained through image pickup means for photoelectrically converting an image light coming from an object to be photographed, is compressed by compression means and is recorded on a recording medium, a compression mode of said compression means being variable, is characterised by setting means for setting said variable compression mode; and means for combining a signal representing the compression mode set by said setting means with said compressed signal, and recording the combined signal on the recording medium. For the given image data, the appropriate one of the compression modes can be selected and the data amount necessary to record can be reduced. Therefore, it becomes possible to efficiently utilise the image recording medium. The still video camera may be constructed in the following way (1) or (2): (1) A still video camera in which the video signal output from the image sensor is analog-to-digital-converted and further compressed, before it is written in a memory element attachable to and detachable from the camera body, is provided with memory means capable of writing and erasing by an electrical signal supplied from the outside of the camera and usable for writing programs for the above-described compression. (2) In the aforesaid way (1), a still video camera is provided with a memory element attachable to and detachable from the camera body, the memory element having programs for compression written therein, wherein by this memory element, the electrical signal from the outside of the camera is supplied. According to the arrangement of the aforesaid way (1), the program for compression can be altered by supplying the electrical signal from the outside of the camera. According to the arrangement of the way (2), the program for compression can be altered by attaching the memory element with the program for compression written therein to the camera body. Other objects and features of the invention will become apparent from the following written specification and drawings. Fig. 1 is a block diagram of the construction of an embodiment of the invention. Fig. 2 is a block diagram illustrating-the construction of the compression circuit. Fig. 3 is a block diagram illustrating the construction of the expansion circuit. Fig. 4 is a block diagram of another embodiment of the invention. Fig. 5 is a flowchart for the operation of the embodiment of Fig. 4. The present invention is next described in connection with embodiments thereof by reference to the drawings. Fig. 1 in schematic diagram shows an embodiment of the invention in which two compression modes can be selected to operate. A camera body 10 has a solid-state memory device 12 detachably attached thereto in which photographed images are recorded (stored). Light from an object to be photographed enters, through a photographic lens 14, an image sensor 16 where it is photoelectrically converted. The output of the image sensor 16 is converted to digital form by an A/D converter 18. A compression selecting circuit 20 determines selection of one of compression modes performed by compression circuits 22 and 24 to be applied to the data output from the A/D converter 18. Depending on the selection result, the compression selecting circuit 20 changes a switch 26 over between two positions, so that the output data of the A/D converter 18 is supplied to the selected one of the compression circuits 22 and 24. The compressed data by the compression circuit 22 or 24 is transferred to the solid-state memory device 12 where it is stored in a predetermined format. If the camera body 10 has only a recording function, the solid-state memory device 12 is then detached from the camera body 10 and attached to a reproduction apparatus (not shown) where the recorded images are reproduced. In Fig. 1, however, the reproducing function too is illustrated. When the images are reproduced from the solid-state memory device 12, data stored in the solid-state memory device 12 is read out and supplied to one of two expansion circuits 28 and 30 selected by a switch 26. The expansion circuit 28 or 30 performs the expansion process corresponding to the compression mode used in the recording. In more detail, the expansion circuit 28 expands the data compressed by the compression circuit 22, while the expansion circuit 30 expands the data compressed by the compression circuit 24. The image data restored by the expansion circuit 28 or 30 is converted to analog form by a D/A converter 32, and then to a video signal by a video circuit 34. It is to be noted that Fig. 1 is depicted with regard to the flow of image signals. Therefore, various kinds of switches for operation commands, a display device and further a control circuit for controlling the entirety, an electric power source circuit, etc., are omitted. Next, the compression process in the compression circuit 22 or 24 is explained in detail. The natural image has a very strong correlation between any adjacent two of the picture elements. So, taking the differences between the adjacent picture elements gives, in most cases, small values. In other words, compared with the use of the absolute values (of, for example, 8 bits) in storing (recording) the image, the use of their differences in the storage can largely compress the data amount. This compressing method is called the "DPCM". Besides this, there are another compressing methods as improved over the DPCM, one of which is to adaptively vary the non-linearity of the non-linear quantization circuit according to the image, namely, the ADPCM. Yet another method is by transforming the image into a frequency domain, with a larger weight on the coefficient of the low-frequency component and a smaller weight on the coefficient of the high-frequency component, (namely, for example, the discrete cosine transformation). Fig. 2 in block diagram shows the construction of a compression circuit employing the DPCM, and Fig. 3 in block diagram shows the construction of an expansion circuit for expanding the compressed data. Incidentally, their details are described on pp. 146-159 of "Digital Signal Processing of Image" by Keihiko Suibatsu published by Nikkan Kogyo Shinbun Co. Ltd. The circuit of Fig. 2 comprises a subtractor 40, a non-linear quantization circuit 42, a representative value setting circuit 44, an adder 46, a delay circuit 48 and a coefficient multiplier 50. The subtractor 40 subtracts the output of the coefficient multiplier 50 from the input of 8-bit image data. The non-linear quantization circuit 42 non-linearly quantizes the output of the subtractor 40. Thereby the image data of the input is compressed from the 8 bits to, for example, 3 bits. The 3-bit output of the non-linear quantization circuit 42 is the compressed data which is aimed at. The representative value setting circuit 44 reverts the 3-bit output of the non-linear quantization circuit 42 to a representative value of 8 bits. The adder 46 adds the output of the coefficient multiplier 50 to the output of the representative value setting circuit 44, i.e., the data (8 bits) of the representative value. The output of the adder 46 is delayed by one picture element by the delay circuit 48, concretely speaking, a data latch circuit, before it is supplied to the coefficient multiplier 50. The coefficient multiplier 50 multiplies the input by a constant coefficient, for example, 0.95, and supplies the multiplication result to the subtractor 40 and the adder 46 at the time of the inputting of the next data. By repeating such a procedure, the 8-bit data is compressed to the 3-bit data. The non-linear quantization circuit 42, the representative value setting circuit 44 and the coefficient multiplier 50 can be realized in the form of table transformation of ROM. So, high speed processing is possible. Next, the expansion circuit of Fig. 3 comprises a representative value setting circuit 52, an adder 54, a delay circuit 56 for delaying the input by one picture element and a coefficient multiplier 58. The representative value setting circuit 52 is similar to the representative value setting circuit 44 of Fig. 2, transforming the input data (3 bits) to a representative value of 8 bits. The adder 54 adds the output of the coefficient multiplier 58 to the output of the representative value setting circuit 52. The output of the adder 54 becomes the restored data which is aimed at. The delay circuit 56 is a data latch circuit similar to the delay circuit 48, delaying the output of the adder 54 by one picture element before it is supplied to the coefficient multiplier 58. The coefficient multiplier 58 multiplies the input by a constant coefficient, for example, 0.95. Its output is supplied to the adder 54. By such a loop process, the compressed data (3 bits) of the input is expanded to the original data of 8 bits. The discrete cosine transformation method as its details are described in pp. 179-195 of "Digital Signal Processing of Image" by Keihiko Suibatsu published by Nikkan Kogyo Shinbun Co. Ltd., is briefly explained as follows. At first, by the discrete cosine transformation, the image data is orthogonally transformed and the frequency components are taken out. These frequency components are multiplied by such a coefficient that the low-frequency component is left, while the high-frequency component is removed. By this, the image information can be compressed. When the frequency components of the image are sided to the lower one, good compression with less deterioration can be carried out. Next, the selection criterion by the compression selecting circuit 20 is explained. For simplicity, the compression circuits 22 and 24 themselves, or similar circuits, perform compression processing by each of the plurality of compressing methods, and whichever gives a less amount of data may be selected. If it is desired to speed up the selecting operation, a portion of the image, for example, the central one, only is subjected to the plurality of compression treatments. Based on the comparison of the data amounts, selection of one of the compression treatments may be made. Also, one of the compression circuits, say 22, employs a compression method which gives always a constant amount of compressed data, while the other compression circuit 24 employs another compression method which varies the amount of compressed data as a function of the image. So, from only the amount of data output from the compression circuit 24, which compression circuit 22 or 24 is to be selected may be determined. The compression circuits 22 and 24 may employ different compressing methods from each other. But the compressing methods may be the same, or quantitatively different in the compression characteristic. In the case of DPCM, for example, the quantizing characteristic of the non-linear quantization circuit 42 is changed. Though, in the above-described embodiment, the two compressing processes are selectively used, the invention is not confined to this and so includes a mode of non-compression and another mode of compression. Also, the image data is not only for black and white but also likewise for colors. Further, the selection of the compressing methods may otherwise be made not automatically but manually. As is easily understandable from the foregoing description, according to the invention, the amount of data of an image to be recorded can be compressed by the method suitable to the respective individual image, thereby giving an advantage of more efficiently utilizing the image recording medium. The invention is next described in connection with another embodiment thereof. Fig. 4 in block diagram shows another embodiment of the still video camera according to the invention, and Fig. 5 is a flowchart for the operation of this embodiment. In Fig. 4, the camera comprises a lens 61, a CCD 62 (solid-state image sensor) for converting an image formed thereon by the lens 61 to an electrical signal, a signal processing portion 63 for processing the signal output from the CCD 62, an A/D converter 64 for converting the signal output from the signal processing portion 63 to digital form, a data compressing portion 65 for compressing the digitized image signal, a connector 66, a memory cartridge 67 (memory element) detachably attached to the camera body, and a block 68 for controlling the entirety including a timing control circuit and a system control portion (hereinafter called the "system controller"). In the interior of the data compressing portion 65, a program ROM for determining the compressing method is incorporated. As this ROM, use is made of a rewritable EEPROM (Electrically Erasable Programmable Read-Only Memory). The memory cartridge 67 is available in types for photography and for a compression program. When the latter type is in use, the content of the EEPROM in the data compressing portion 65 is rewritten by the system controller 68 into the content of the compression program cartridge. Fig. 5 shows a flowchart for the operation of this embodiment. After initialization (step S101) has been done, when a memory cartridge is inserted (step S102), whether it is for photography or for compression programs is discriminated (step S103). If for compression programs, a compression code number representing the compression program is written (step S104) and the compression program is transferred to the EEPROM (step S105). When this has ended, the "end" display is presented (step S106). If it is for photography, an initiation of a shutter operation (step S110) is followed by writing the compression code number (step S111) and the photographed image data (step S112). In such a manner, the program for use in the compression of the video signal can be written and rewritten in the form of electrical signals by the cartridges from the outside of the camera. It should be noted that the camera may be provided with an input terminal for program, from which a program for compression is supplied in the form of an electrical signal by an adequate device, thus rewriting the program of the EEPROM of the data compressing portion 65. As has been described above, according to the present embodiment, the program for compression of the data in the camera may be altered by the electrical signal supplied from the outside of the camera. Therefore, a wide variety of compressing methods become selectively usable. Hence, the camera is made convertible to the newest data compression type. Further, when the object to be photographed is a flower, the camera can be made to operate with selection of one of the compressing methods which is most suited to the flower.

Claims: An image pickup apparatus (10) in which an image signal, obtained through image pickup means for photo-electrically converting image light coming from an object to be photographed, is compressed by compression means (65) and is recorded on a recording medium (12), a compression mode of said compression means being variable, characterised by: setting means for setting said variable compression mode; and means (66) for combining a signal representing the compression mode set by said setting means with said compressed signal, and recording the combined signal on the recording medium. An image pickup apparatus according to claim 1, characterised in that said setting means includes a memory cartridge (67) which stores a program for setting the compressing mode. An image pickup apparatus according to claim 2, characterised in that the compressing mode of said compression means is set by mounting the cartridge including said setting means, on the body (10) of said apparatus. An image pickup apparatus as claimed in claim 1, 2 or 3, characterised by: A/D conversion means (18) for converting an output of said image pickup means to digital form; a plurality of compression means including said variable compression mode for performing the respective different compression operations on an output of said A/D conversion means, selection means for selecting one of said plurality of compression means, and memory means (65) for storing an output of the selected one of said plurality of compression means. An image pickup apparatus according to claim 4, characterised in that said data compression means include DPCM or ADPCM or discrete cosine transformation. An image pickup apparatus according to claim 4 or 5, characterised in that said plurality of data compression means include those of the same compressing method but of different compressing characteristics from each other. An impage pickup apparatus according to claim 4, 5 or 6, characterised in that said compressing characteristics include non-compression. An image pickup apparatus according to any one of claims 4 to 7, characterised in that selection of one of said plurality of data compression means is controlled in accordance with the amount of data output from each of said plurality of data compression means. An image pickup apparatus according to any one of claims 4 to 8, characterised in that selection of one of said plurality of data compression means is controlled in accordance with the amount of data output from each of said plurality of data compression means corresponding to only a central portion of a picture. An image pickup apparatus according to any one of claims 4 to 9, characterised in that said memory means includes an EEPROM (65). An image pickup apparatus according to any one of claims 4 to 10, characterised in that the content stored in said memory cartridge includes an optimum compressing mode according to an object to be photographed.

Inventors: HORII HIROYUKI C O TAMAGAWA JI, KAWAMURA HIDEAKI C O TAMAGAWA, TAKAIWA KAN C O TAMAGAWA JIGYO, HORII, HIROYUKI, C/O TAMAGAWA JIGYOSHO, KAWAMURA, HIDEAKI, C/O TAMAGAWA JIGYOSHO, TAKAIWA, KAN, C/O TAMAGAWA JIGYOSHO
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1990
Main classification: H04N3
IPC codes: H04N5, H04N1, H04N7