Thyristor converter system with higher harmonics suppression

Abstract: A semi-conductor bridge converter for converting an AC power into a DC power with suppression of the higher harmonics generation comprises: semi-conductor converter circuit 7, control circuit 5A, and instrument transformers 40 through 42 and 80 and 81 for measuring the voltages and the currents at the source and the load side at node 4. On the basis of the outputs of these transformers, the control circuit 5A controls the the control delay angle of the thyristers of the semi-conductor converter circuit 7 such that the generation of the higher harmonics contents thereat is reduced minimum seen from the power system side.

Description: BACKGROUND OF THE INVENTION This invention relates to converter systems for converting AC power into DC power with supression of higher harmonics at the installation point. In the case where semiconductor converter circuits, such as inverters, bridge thyristor converters, thyrister motors utilizing cyclo-converters, etc., are coupled directly to power supply systems, higher harmonics generated by the converter circuits flow into the power system which ususally have smaller impedance, thereby generating a harmonic distortion in the source power supply. Thus, voltages having harmonic distortions are supplied to the loads connected to the power supply system. These higher harmonics may overheat the electrical components, especially capacitors, supplied therewith, sometimes giving rise to insulation failures. When, on the other hand, reactors are coupled in series with the capacitors for preventing the higher harmonics from flowing into the capacitors, abnormal noise or temperature rise may be observed in such reactors. For the purpose of reducing the damage caused by the higher harmonics, passive filters consisting of passive elements such as reactors and capacitors, or active filters consisting of active elements, are utilized. These filters, however, have some resistance, which increases insertion energy loss and thus reduces the efficiency of the system. Fig. 1 shows a conventional system for suppressing higher harmonics (EP-A-0254073). To an intermediate node point 4 between the power supply side 1 and a load side 2, coupled a branch line 3 for the higher harmonics suppressing system. The outputs of the instrument transformers 40, 41, and 42, which detect the voltage at the branch point, the load current at the side of the user load, and the current at the power system side, respectivly, are introduced to the measurement/monitor/control circuit 5, which measures and monitors the higher harmonics. A main filter circuit 6 connected to the node 4 for absorbing the higher harmonics is controlled by the control circuit 5. In the system of Fig. 1, the higher harmonics being generated from electrical components connected to the user load side 2 and flowing into the power supply side 1 are branched into the filter circuit 6 to be absorbed therein. Thus, the higher harmonics contents flowing into the power supply side 1 are reduced. This system for suppressing the higher harmonics is good per se, both in principle and in practical operation. However, the cost of installation may become substantial if such systems are to be provided for each one of the loads connected to the power supply system. Among the loads coupled to the power source, there are those which require fine waveform control that is effected by means of inverters, cyclo-converters, or the like. However, there are also loads with large inertia, such as electrical resistance heaters or electrolytic cell loads, for which small fluctuations does not matter and only the time integral of the power or that of current supplied thereto is significant for their operation. In the case of these loads, small fluctuations in the waveform have little effect on the operations thereof. Namely, if the loads are responsive only to the amount of heat or electric quantity which corresponds to the time integral of the power or current, the instantaneous flucutations in the waveforms are filtered and smoothed due to the integrating operation, and hence have no vital effect. SUMMARY OF THE INVENTION It is therefore a primary object of this invention to provide a simple and inexpensive converter system for converting an AC power supplied from an AC power source into a DC power supplied to a branch system load tolerant of high frequency deviation, wherein the generation of higher harmonics is effectively suppressed. According to the present invention, there is provided a converter system for higher harmonics suppression, adapted to be coupled between an AC power source and loads, said converter system comprising: measurement means for measuring electrical parameters at the power source side and the loads side; control circuit means, having inputs coupled to outputs of the measurement means and outputs coupled to high harmonic frequency absorption means, wherein the control circuit means is operative for controlling the high harmonic frequency absorption means to reduce higher harmonics contained in the power source side, the high harmonic frequency absorption means also being operative for converting the AC power supplied to DC power; characterised in that: the high harmonic frequency absorption means comprises semiconductor converter circuit means for receiving an output signal from the control circuit means; and a specific branch load having a large time constant in conjunction with the rest of said loads is arranged for being supplied with DC power from the semiconductor converter circuit means; wherein the control circuit means is operative for: (i) discriminating a delay angle and an overlap angle respectively representing a null level and rise time in the current waveform of the semiconductor converter circuit means; (ii) determining the high harmonic frequency components; and (iii) adjusting to desired values the delay angle and the overlap angle by controlling the semiconductor switching elements of the semiconductor converter circuit means so as to vary the power supplied to the branch load and so move the determined level of the high harmonic frequency components towards a target value. It is preferred that the control circuit means comprises: sample and hold circuit means for holding sample values of the electrical parameters measured at predetermined timing by the measurement means; multiplexer means coupled to the sample and hold circuit means, for multiplexing outputs of the sample and hold circuit means; and a microprocessor, coupled to the multiplexer means, for determining the control delay angle in response to the output of the multiplexer means. Further preferred features are set out in Claims 2 to 8. BRIEF DESCRIPTION OF THE DRAWINGS The novel features which are believed to be characteristic of this invention are set forth with particularity in the appended claims. This invention itself, however, both as to its organization and method of operations thereof, together with further objects and advantages thereof, may best be understood from the detailed description of the preferred embodiment in connection with the accompanying drawings, in which: Fig. 1 is a circuit block diagram of a conventional higher harmonics suppression system; Fig. 2 shows representative waveforms in a 3-phase thyrister bridge type converter circuit; Fig. 3 is a circuit block diagram of a thyrister converter system with higher harmonics suppression according to this invention; Fig. 4 is a circuit block diagram showing an implementation of the thyrister converter system of Fig. 3; and Fig. 5 is a flow chart showing the operation of the control circuit of converter system of Fig. 4, wherein Figs. 5(A) and 5(B) show the first and the second half of the operation procedure, respectively. In the drawings, like reference numerals represent like or corresponding parts or elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the principle of this invention is described by reference to Fig. 2, which shows the voltage and current waveforms of a 3-phase bridge type thyrister converter circuit (rectifier circuit) for rectifying an AC power into a DC power. In Fig. 2, curves W1 and W2 represent the first and the third phase source voltage, respectively; curve W3, the first phase line current, i.e., the current through a thyrister converter circuit element (an arm of the thyrister bridge circuit) corresponding to the first phase. As shown in Fig. 2, the first phase line current W3 is null during the delay time α (corresponding to the control delay angle α ) from the time point t1 at which the first and the third phase voltage waveforms W1 and W3 cross each other such that the magnitude of W1 become larger than that of W2. From the time point t2 at the end of the delay time α, the first phase line current W3 gradually increases during the rise time u (corresponding to the overlap angle u), to reach the stable constant value Id at the time point t3 at the end of the rise time u. In the case where the overlap angle u is not negligibly small, it is well known that the overlap angle u is expressed as follows: u = - α + cos -1 {cosα - (6XsId)/(π Ed 0 )} where: α is the delay angle; Id is the DC circuit current; Ed 0 is the average DC voltage under the no-load/no-control condition, which is equal to about 2.34 Vs; Xs is the reactance of the power supply side (i.e., the commutation reactance per phase); and Vs is the applied AC line voltage (i.e., the effective value of the source phase voltage). If, for the purpose of varying the output of the converter to the load side, the delay angle α or the value of the load itself is varied, the overlap angle u is stabilized to the value which satisfies the above equation (1). During these changes, the reactance Xs behind power source side can be regarded as substantially constant. Thus, taking the differential of the above equation (1), we obtain: {sin(u + α) - sin α}Δα = (6Xs/πEd 0 ){Id - (ΔEd 0 Id/Ed 0 )} from which, on the assumption that ΔEd 0 = 0, the following equation (2) is obtained: Xs = (π/6)Ed 0 (Δα/ΔId) {sin(u + α) - sin α} Thus, the reactance Xs of the power supply side can be determined by means of this equation (2) if the variation ΔId of the DC current Id corresponding to the variation of the load is known. By utilizing the value of the reactance Xs of the power supply side obtained as described above, the relation between the control delay angle α and the overlap angle u can be determined uniquely by means of the following equation (3): cos α - cos(α + u) = (6XsId)/(π Ed 0 ) Generally speaking, the higher harmonics contents (the ratios of the higher harmonics components with respect to the fundamental component) contained in the input waveform of the converter circuit consisting of the 3-phase thyrister bridge decrease as the overlap angle u increases. As is well known to those skilled in the art, the exact relation between the higher harmonics contents and the overlap angle u can be determined on the basis of Fourier analysis. It can thus generally be concluded that the higher harmonics contents decrease rapidly when the overlap angle u increases from 0 to 30 degrees. If the delay angle α is fixed to a predetermined value, the overlap angle u is determined by the state of the connected load (i.e., the values of the DC current Id and voltage Ed 0 ) and the state of the power supply side (i.e., the value of reactance Xs). Further, the higher harmonics contents can be calculated on the basis of the delay angle α and overlap angle u. Thus, as described above, in the bridge type converter circuit for rectifying AC into DC power, the overlap angle u is determined from the states of the load and the power source side, when the delay angle α is varied, and hence the higher harmonics contents can thereby be modified. When the overlap angle u and the delay angle α are controlled as described above, the input to the load, i.e., the amount of heat or the amount of electric quantity (i.e., electric charge), varies when observed with respect to short periods of time. The accumulative amount of heat or electric quantity, which is proportional to the time integral of the power or the current applied to the load, can be adjusted to a predetermined value required by the load, if the magnitude of the AC input is adjusted by means of an appropriate regulator means such as an IVR (induction voltage regulator). In the following, the method of this adjustment is described in the case where (1) the load is a resistance heater or incadescent lamp, and where (2) the load is a rectifier driven load. (1) In the case where the load is a resistance heater or an incadescent lamp, the adjustment and regulation of the amount of heat generated therein may be affected as follows. When a current including higher harmonics is supplied to the load, the input current I to the load may be expressed as follows: I = I 0 + I 1 sin(ωt + α 1 ) + I 2 sin (2ω t + α 2 ) + ················· + I n sin (nω t + α n ) Thus, the square of I is: On the other hand, the amount of heat W expressed in P.U. can be given as follows: Thus, wherein the second and the third integral term ranging over an interval which is an integral multiple nT of the period T, and hence both tend to zero. Consequently, W = {I 0 2 + (1/2)(I 1 2 + I 2 2 + ·········· + I n 2 )} nT wherein the amplitudes I 0 , I 1 , I 2 , ...., I n of the higher harmonics contained in the input can be determined uniquely. Hence, in the case where the load is a resistance heater, etc., the heat generated in the load can be adjusted only by adjusting the amplitudes of the input containing higher harmonics. (2) On the other hand, in the case where the load is a rectifying type load such as battery charger or an electrolytic cell, the adjustment and regulation of the accumulative amount of electric quantity (electric charge) supplied thereto may be affected as follows. As in the above case, the input current I to the load may be expressed as follows: I = I 0 + I 1 sin(ω t + α 1 ) + ····· + I n sin (nω t + α n ) Thus, the absolute value of I is: I = I 0 + I 1 sin(ω t + α 1 ) + ··· + I n sin (nω t + α n ) Consequently, the accumulative amount of electric quantity or the effective input C to the load is: wherein the n'th harmonic component C n of C is: Namely, since the original waveform is a composition of a DC component and even order harmonic components, the average thereof is equal to the integral of the DC components. Thus, Thus, the output C after enough number of periods T (exceeding n periods) is affected only by the amplitudes of the each harmonics contained in the input current. Further, each one of the harmonic components I 1 , ....., I n contained in the input current is determined uniquely. It can therefore be concluded that in the case where an electrochemical load is connected to the power source, the amount of electricity which is the effective input to the load can be regulated properly only by adjusting the amplitudes of the input. Fig. 3 shows a thyrister converter system with a means for suppressing higher harmonics according to this invention. As in the case of the system of Fig. 1, a branch 3 is connected to an intermediate point 4 between the feeder supply side 1 and a load side 2. The outputs of the instrument transformers 40, 41, and 42, which detect the voltage at the node point, the load current at the side of the user, and the current at the power system side, respectivly, are introduced to the measurement/monitor/control circuit 5A, which measures and monitors the higher harmonics as described hereinbelow. A semiconductor power supply device 7, e.g., a thyrister bridge type converter circuit connected to the node 4 supplies a power to the branch load 8 in response to the output of the control circuit 5A. The measurement/monitor/control circuit 5A determines, on the basis of the outputs of the potential transformer 40 and the current transformers 41 and 42, etc., the voltage and the currents containing higher harmonics which are present in the power; on the basis of these determinations, the control circuit 5A controls the thyrister converter circuit 7 when necessary. As a result of this, the electrical input applied to the load 8 becomes somewhat different from that which should have been introduced thereto under no control. However, when the power system under consideration is viewed as a whole, the input conditions which the load connected thereto requires is satisfied, such that the higher harmonics contents can substantially be reduced without affecting the intrinsic operations of the load, as described in detail hereinbelow. It is noted in particular that when the measurement/monitor/control circuit 5A has a precise control performance comparable to that of the active filter which has hitherto been used for higher harmonics suppression, the higher harmonics contents of current fed can be reduced sufficiently to magnitudes substantially equal to the nominal low levels. Fig. 4 shows an example of the instrumentation of the control circuit 5A, together with details of other circuit elements. As shwon in Fig. 4, the control circuit 5A comprises input terminals 50-1 through 50-5. To the input terminals 50-1 through 50-3 are introduced the outputs of the transformers 40 through 42, respectively; on the other hand, to the input terminals 50-4 and 50-5 are given the outputs of a potential transformer 80 and a current transformer 81 respectively, as described hereinbelow. Converters 51-1 through 51-5, coupled to the input terminals 50-1 through 50-5, respectively, convert the voltages and the currents inputted to the respective input terminals to corresponding voltages of appropriate magnitudes. The sample hold amplifiers 52-1 through 52-5, connected to the converters 51-1 through 51-5, respectively, hold and store therein at proper instance the respective outputs of the converters connected thereto. A multiplexer 53 connected to the sample hold amplifiers 52-1 through 52-5 switches over(i.e., successively changes over) the outputs of the analog outputs of the sample and hold amplifiers, so as to supply the multiplexed analog outputs of the sample hold amplifiers to the A/D converter 54. The A/D converter 54 converts into a corresponding digital output the multiplexed analog sample voltages received from the multiplexer 53. A microprocessor 55 receives this digital output from the A/D converter 54 and performs predetermined logical and arithmetic operations thereon. The ROM 56 stores, for example, the trigonometric functions table in a tabular data form, so as to offer an auxiliary memory means for the numerical operations of the microprocessor 55. An output interface 57, consisting of a so-called level-converter circuit, is provided for yielding via the output terminal 58 the results of the judgements of the microprocessor 55 obtained from the operations thereof. The above component parts 50 through 58 are comprised in the measurement/monitor/ control circuit 5A. Also as shown in Fig. 4, the thyrister bridge type converter circuit 7 comprises: a power converter circuit unit 70 utilizing thyristers or transistors as switching elements, and a control circuit unit 71. The control unit 71, having an input connected to the outut terminal 58 of the control circuit 5A, generates, in response to the result of the judgement of the microprocessor 55 received via the interface 57 and output terminal 58 of the control 5A, a wave-shaped pulse signal to control the converter firing circuit unit 70. Further, the control circuit unit 71 comprises another input coupled to a feedback from the load 8, etc. The potential transformer 80 and the currrent transformer 81 measure the voltage and the current supplied to the branch load 8, respectively. The outputs of these transformers 80 and 81 are given to the control circuit 5A via the input terminals 50-4 and 50-5, respectively. Fig. 5 is the flow chart showing the operations of the embodiment according to this invention as shown in Figs. 3 and 4, wherein Fig. 5(A) and Fig. 5(B) show the first and the second half, respectively. Thus, at step S1, the voltage Ed and the current Id at the output side of the thyrister converter circuit 7 are measured. Next, at step S2, from the instantaneous values of the voltages and currents which are taken into the microprocessor 55 of the control circuit 5A, the values thereof of the power supply side 1, the load side 2, and the branch load side 8 are measured, and the control delay angle α and the overlap angle u are determined. Further, at step S3, utilizing the voltage Ed and current Id as determined at step S1, and the delay angle a and the overlap angle u as determined at step S2, the reactance Xs of the power supply side 1 is estimated by means of the equation (2) above. At the next step S4, utilizing the waveform data obtained as described above, HHF (high harmonic frequency components), i.e., the higher harmonics contents (especially the 5th and 7th harmonic contents which are predominant) contained in the voltage and the current at power supply side 1 are calculated and determined. When the higher harmonics contents as determined at step S4 are larger than the predetermined target values thereof, appropriate set values of the delay angle α and the overlap angle u are selected on the basis of a numerical table which is calculated beforehand and is stored in the read-only-memory such as the ROM 56. It is noted in this connection that the relation between the higher harmonics contents and the control delay angle α and the overlap angle u can be determined, as described above, in a graphical form when the value of the reactance Xs is known. When it is judged that reductions of the higher harmonics contents to appropriate levels thereof can be efficient, the delay angle α of the power converter unit 70 is modified properly at step S5 in response to the output from the control circuit unit 71 in the thyrister converter circuit 7. Next, at step S6, the HHF or higher harmonics contents are discriminated as in the step S4. At next step 57, it is discriminated whether the higher harmonics contents as determined above are within predetermined allowable range. When the judgement at step S7 is acceptable, the voltage Ed and the current Id at the side of the load 8 are measured again at step S8; further, at the subsequent step S9, the time integral of the input variation to the load 8 is calculated. Furthermore, at step S10, it is discriminated whether or not the integral of the input variation to the load side as determined above is within a predetermined allowable limits. When the discrimination at step S10 is of no problem, the reactance Xs of the power source 1 is estimated again, thereby ending the series of operations. On the other hand, when the adjustment of the value of the delay angle α at step S5 is not appropriate, and hence the reductions of the higher harmonics contents to predetermined small levels could not be effected, the delay angle α should be readjusted. Thus, when it is determined at step S7 that the higher harmonics contents as measured are not within the predetermined allowable range, the control proceeds to step S12 where it is judged whether the values of the delay angle α and the overlap angle u satisfying the above equation (3) which reduce the higher harmonics contents below the predetermined levels can be found or not. If the condition at step S12 is met, the sequence goes back to the step S2 as described above. On the other hand, when the condition at step S12 is not met, the procedure goes over to step S13 where the adjustment at the power input side 1 is effected. Further, when the condition at step S10 and S12 are not met (i.e., when it is judged that the harmonics contents as determined are not within the allowable limits and besides the solution of delay angle α and angle of overlap u satisfying equation (3) can not be found), the procedure goes over to step S13 where the input adjustment at the power supply side 1 is effected. Generally, when there are no great variations at the power and load sides, the values of the delay angle α and the overlap angle u satisfying the above equation (3) can be determined such that higher harmonics contents are kept under predetermined levels and such that the integral of the input variation to the load 8 is maintained within allowable limits. When, however, there are great variations at the power source or the load side, the input adjustments by means of external source adjustment device are effected at step S13. And also, when there is some wave shape distortion in the supply voltage and current of the power system, more elaborate wave shape adjustment fitted to the distorted supply shall be employed in place of the above procedures. The technique for such an adjustment is already known as the control means of the active filters. Even in this case, the specific load is not affected by the output from the converter device, thus assuring the wave shape compensation of the input current and voltage fed to the converter system. The philosophy of this invention is applicable with the modification of the control means when the above distortion can not be ignored.

Claims: A converter system for higher harmonics suppression, adapted to be coupled to the intermediate point between an AC power source and loads, said converter system comprising: measurement means (41,42) for measuring electrical parameters at the power source side (1) and the loads side (2); control circuit means (5A), having inputs coupled to outputs of the measurement means and outputs coupled to high harmonic frequency absorption means (7,8), wherein the control circuit means is operative for controlling the high harmonic frequency absorption means to reduce higher harmonics contained in the power source side, the high harmonic frequency absorption means also being operative for converting the AC power supplied to DC power; characterised in that: the high harmonic frequency absorption means (7,8) comprises semiconductor converter circuit means (7) for receiving an output signal from the control circuit means (5A); and a specific branch load (8) having a large time constant in conjunction with the rest of said loads is arranged for being supplied with DC power from the semiconductor converter circuit means (7); wherein the control circuit means (5A) is operative for: (i) discriminating a delay angle (α) and an overlap angle (u) respectively representing a null level and a rise time in the current waveform of the semiconductor converter circuit means (7); (ii) determining the high harmonic frequency components; and (iii) adjusting to desired values the delay angle (α) and the overlap angle (u) by controlling the semiconductor switching elements of the semiconductor converter circuit means (7) so as to vary the power supplied to the branch load (8) and so move the determined level of the high harmonic frequency components towards a target value. A converter system for higher harmonics suppression according to Claim 1, wherein the control circuit means (5A) is operative for determining the delay angle (α) and the overlap angle (u) being determined in dependence on the reactance (Xs) of the power supply side (1), the values of voltage (Ed o ) and current (Id) supplied to the branch load (8). A converter system for higher harmonics suppression according to Claim 1, wherein the control circuit means (5A) is operative for determining the desired delay angle (α) and the overlap angle (u) from a memory (56) according to the departure of the high harmonic frequency components from a predetermined target. A converter system as claimed in Claim 1, wherein the reactance (Xs) is determined according to the following relation: Xs = (π/6)Ed 0 (Δ α/Δ Id){sin(u+α)-sinα}; where Δ α and Δ Id represents changes in the delay angle α and current Id. A converter system for higher harmonics suppression according to Claim 1, Claim 2 or Claim 3, wherein the determination as to whether the delay angle (α) and the overlap angle (u) are desirable or not involves judging whether these values satisfy the following relationship: cosα -cos(α+u) = (6XsId)/(πEd o ) A converter system as claimed in any preceding claim, wherein measurement means (41,42) comprises instrument transformers for measuring voltages and currents at the power source side (1) and the loads side (2). A converter system as claimed in any preceding claim, wherein the semiconductor switching elements comprise thyristers or transistors, carrying the specific loads having large time constants. A converter system as claimed in any preceding claim, wherein the control circuit means (5A) comprises: sample and hold circuit means (52-1 to 52-5) for holding sample values ofthe electrical parameters measured at predetermined time points by the measurement means; multiplexer means (53) coupled to the hold circuit means, for multiplexing outputs of the hold circuit means: and a microprocessor (55), coupled to the multiplexer means, for determining the control delay angle (α) in response to an output of the multiplexer means.

Inventors: FURO ISAO, IYODA ISAO, SUZUKI HIROSHI, TERADA MAKOTO, FURO, ISAO, IYODA, ISAO, SUZUKI, HIROSHI, TERADA, MAKOTO, FURO, ISAO, C/O MITSUBISHI DENKI K.K., IYODA, ISAO, C/O MITSUBISHI DENKI K.K., SUZUKI, HIROSHI, C/O MITSUBISHI DENKI K.K., TERADA, MAKOTO, C/O MITSUBISHI DENKI K.K.
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1990
Main classification: H02M1
IPC codes: H02J3, H02M1