Video signal processing for a camera device

Abstract: A digital camera apparatus has an analogue emphasis circuit (26) arranged such that when an output from a charge-coupled device (21) forming the imager and cooperating with a complementary colour, checkered pattern filter (10) is processed in a digital fashion, an analogue carrier chrominance signal component is emphasized (26) before being converted to a digital signal.

Description: This invention relates to digital camera apparatus. A solid-state colour imager is known in which a four colour filter made-up of the three complementary colours, cyan (CY), magenta (M) and yellow (Ye), plus green (G) arranged in a checkered pattern is combined with a solid state imager element. An example of such a solid-state imager is found in Japanese laid-open patent specification 59/161989. Figure 1 shows a colour filter 10 in which cyan and yellow filter elements 1c and 1y are alternately arrayed on row n, and magenta and green filter elements 1m and 1g are alternately arrayed on a row (n + 1). The rows then alternate between lines of cyan and yellow filter elements and rows of magenta and green filter elements. The pattern arrangement of the cyan and yellow filter elements in the rows n, (n + 2) and (n + 4) are the same, however, the pattern arrangements of the magenta and green filter elements in the rows (n + 1), (n + 3) and (n + 5) are opposite in phase, that is, they are offset by one filter element every row. In Figure 2, a solid-state colour imager system comprises an analogue system 20 and a digital signal processing system 30. In the analogue signal system 20, a solid state imager element 21 is provided in an opposing relation to the colour filter 10 that is formed as shown in Figure 1. The imager element 21 includes light receiving picture elements arranged in a two-dimensional manner, that is, in an X-Y matrix form, and transfer elements for transferring signal charges of respective picture elements, for example, when the imager element 21 is a charge-coupled device (CCD). An output signal from the imager element 21 is supplied through a correlative double sampling circuit 22 to an automatic gain control (AGC) amplifier 23. An output from the AGC amplifier 23 is sampled and held by a sample and hold circuit 24, and an output from the sample and hold circuit 24 is supplied to an analogue-to-digital (A/D) converter 25, in which it is converted into a digital signal of, for example, ten bits. In the digital signal processing system 30, the digital signal from the A/D converter 25 is supplied to a low-pass filter 31 and to a bandpass filter 32. An output from the low-pass filter 31 is supplied to a luminance signal processing circuit 33, in which it undergoes necessary signal processing, such as aperture correction and gamma correction. On the other hand, an output of the bandpass filter 32 is supplied to a matrix circuit 34, in which it is processed to provide three primary colour signals, red, green and blue (R, G and B). The red, green and blue primary colour signals are supplied to a colour signal processing circuit 35, in which they undergo necessary signal processing, such as white balance adjustment, gamma correction, encoding and hue correction. With this solid-state colour imager, since the signal processing is performed in a digital fashion as described above, it can be made compact in size and requires relatively low power. The output from the luminance signal processing circuit 33 and the output from the colour signal processing circuit 35 are supplied to digital-to-analogue (D/A) converters 36 and 37, respectively, wherein they are converted into an analogue luminance signal Y and an analogue colour signal C, respectively. In the operation of the colour solid-state imager described above, the light reflected from an object is spatially modulated by each of the filter elements of the colour filter 10 and each modulated light beam is photoelectrically converted by each respective light receiving element (not shown) of the imager element 21 and then sampled. In the sampling operation, a sampling frequency fsp is selected to be four times as high as the colour sub-carrier frequency fsc, for example, fsp may equal 14.3 MHz. Further, a repetitive frequency of the colour filter 10 is selected to be about half the sampling frequency fsp. In the odd-numbered field, two rows of the light receiving picture elements corresponding to the row n and the row (n + 1); the row (n + 2) and the row (n + 3); and so on, of the colour filter 10 are horizontally scanned at the same time sequentially to generate the photoelectric-converted outputs at every two columns. That is, the output signals are calculated at every four picture elements of two rows and two columns. In the even-numbered field, two rows of the light receiving elements corresponding to the row (n + 1) and the row (n + 2); the row (n + 3) and the row (n + 4) and so on of the colour filter 10 are horizontally scanned at the same time sequentially to generate the photoelectrically converted outputs at every two columns. The light receiving picture elements corresponding to the cyan and magenta filter elements 1c and 1m of the row n and the row (n + 1) derive signal components (B + G) and (R + B), respectively, and the light receiving picture elements corresponding to the yellow and green filter elements 1y and 1g derive signal components (R + G) and G, respectively, as shown in Figures 3A and 3B. Further, the light receiving elements corresponding to the cyan and green filter elements 1c and 1g of the row (n + 2) and the row (n + 3), respectively, derive signal components (B + G) and G, and the light receiving picture elements corresponding to the yellow and magenta filter elements 1y and 1m derive signal components (R + G) and (R + B), respectively, as shown in Figures 3C and 3D. In the horizontal scanning of the odd-numbered and even-numbered fields, a total sum Ss of the output signals generated at every four picture elements of two rows and two columns is expressed as: Ss = (2R + 3G + 2B). Thereafter, the signal is processed by the low-pass filter 31 and the resultant signal is a luminance signal that is uniform and compensates for any lens distortion. If a sum of the output signals of each of the columns is calculated at every four picture elements of two rows and two columns on the row n and the row (n + 1) in the odd-numbered field and a difference between the sum signals of each of the columns is calculated, then a differential signal Sdb is expressed as: Sdb = [(B + G) + (R + B)] - [(R + G) + G)] = 2B - G Similarly, if a sum of output signals of each of the columns is calculated at every four picture elements of two rows and two columns on the row (n + 2) and the row (n + 3) and a difference between the sum signals of each of the columns is calculated, then a differential signal Sdr is expressed as: Sdr = [(B + G) + G)] - [(R + G) + (R + B)] = - (2R - G) Moreover, the same differential signals Sdb and Sdr are obtained on the row (n + 1), the row (n + 2), the row (n + 3) and the row (n + 4) of the even numbered field. The differential signals, Sbd and Sdr, are sub-carrier chrominance signal components that are formed on the basis of the spatial modulation performed by the respective filter elements of the colour filter 10. The repetitive frequencies thereof become half of the sampling frequency fsp, that is, twice as high as the colour sub-carrier frequency fsc, for example, fsp may equal 7.16 MHz. Nevertheless, in this colour solid-state imager the level of the analogue carrier chrominance signal component supplied from the AGC amplifier 23 is decreased, for example, to 1/4 to 1/2 of the level of the luminance signal component, so that when the analogue signal is digitally converted by the A/D converter 25, even according to the linear quantization process, the accuracy of the carrier chrominance signal is about eight to nine bits for the standard input level equivalent, which is, for example, ten bits. Further, when a dynamic range that is three times as wide as the standard input level is maintained by the gamma correction circuit, the high-level region is compressed, so that with the standard input level the accuracy of the carrier chrominance signal component is decreased to about six to seven bits. As a result, fine gradation of the colour signal cannot be obtained and a so-called false contour occurs in the reproduced picture, in which there are step changes in the brightness of certain colours in place of the desired gradual change in brightness. Furthermore, a satisfactory signal-to-noise (S/N) ratio cannot be obtained due to the quantization noise produced by the analogue-to-digital conversion. According to the present invention there is provided a digital camera apparatus comprising: a colour filter assembly (10) in which colour filter elements of one primary colour and colour filter elements of three complementary colours are arranged in a plurality of rows and columns in a checkered pattern, said pattern comprising first rows along which colour filter elements of said primary colour and colour filter elements of one of said complementary colours are alternately arrayed and second rows along which colour filter elements of the remaining two of said complementary colours are alternately arrayed, said first rows alternating with said second rows; a solid-state imager element (21) having light receiving picture elements arranged in a two-dimensional array, wherein said primary and complementary colour filter elements and said light receiving picture elements are opposed to each other, and from which an analogue luminance signal component and an analogue carrier chrominance signal component are produced upon sampling at a sampling frequency (fsp) by horizontally scanning two adjacent rows of said light receiving picture elements simultaneously; and processing means (30) for digitally processing said analogue luminance signal component and said carrier chrominance signal component for producing a digital luminance signal and a digital chrominance signal; characterised by an emphasizing circuit (26) for emphasizing the level of the analogue chrominance signal near a frequency corresponding to one half of said sampling frequency (fsp) and in that said processing means digitally processes said emphasized carrier chrominance signal component. Thus an embodiment of the invention comprises a digital camera apparatus having analogue emphasis circuitry and includes a colour filter in which one primary colour filter element and three complementary colour filter elements are arranged in a checkered pattern, and a solid-state imager in which light receiving picture elements are arranged in a two-dimensional manner, wherein the filter elements and the light receiving picture elements are opposed to each other. The imager produces an analogue luminance signal component and an analogue carrier chrominance signal component, each of which results from horizontally scanning two rows of the light receiving picture elements simultaneously. These signal components are processed by a processing circuit in a digital fashion. This digital camera apparatus is further characterized by an emphasizing circuit for emphasizing the carrier chrominance signal component. The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which: Figure 1 is a plan view illustrating an arrangement of colour filter elements used in a known solid-state imager; Figure 2 is a schematic in block diagram form of a known solid-state colour imager; Figures 3A to 3D are diagrammatic representations showing respective colour signal components for explaining the operation of the imager of Figure 2; Figure 4 is a schematic in block diagram form of an embodiment of digital camera apparatus according to the present invention; and Figure 5 is a graphical representation of the characteristics of a main portion of the embodiment of Figure 4. Referring to Figure 4, in an analogue signal system, shown generally at 20E, an emphasizing circuit 26 is connected between an AGC amplifier 23 and a sample and hold circuit 24, and various constants of a matrix circuit 34 are varied accordingly, specifically, the gain constants are varied for de-emphasis. The remainder of the circuit arrangement of Figure 4 is the same as that of Figure 2. The emphasizing circuit 26 increases, or emphasizes, the level of the analogue carrier chrominance signal by, for example, 6dB near a frequency corresponding to one half the sampling frequency fsp, that is, near a frequency that is twice as high as the colour sub-carrier frequency fsc on the basis of the low frequency and the sampling frequency, as shown by the frequency characteristics response curve of Figure 5. Thus, the accuracy of the digital carrier chrominance signal component supplied from an A/D convertor 25 is increased by, for example, one bit, whereby fine gradation of colour difference signals can be maintained, the influence of quantization noise can be reduced, and the occurrence of false contour as described above can be reduced. Because the emphasizing circuit 26 emphasizes the analogue carrier chrominance signal component that results from simultaneously horizontally scanning the light receiving elements of two adjacent rows of the solid-state imager opposing the complementary colour checkered pattern filter, it is possible to provide a digital camera in which the quality of the resultant pictures will not be deteriorated due to the quantization of the colour signal.

Claims: A digital camera apparatus comprising: a colour filter assembly (10) in which colour filter elements of one primary colour and colour filter elements of three complementary colours are arranged in a plurality of rows and columns in a checkered pattern, said pattern comprising first rows along which colour filter elements of said primary colour and colour filter elements of one of said complementary colours are alternately arrayed and second rows along which colour filter elements of the remaining two of said complementary colours are alternately arrayed, said first rows alternating with said second rows; a solid-state imager element (21) having light receiving picture elements arranged in a two-dimensional array, wherein said primary and complementary colour filter elements and said light receiving picture elements are opposed to each other, and from which an analogue luminance signal component and an analogue carrier chrominance signal component are produced upon sampling at a sampling frequency (fsp) by horizontally scanning two adjacent rows of said light receiving picture elements simultaneously; and processing means (30) for digitally processing said analogue luminance signal component and said carrier chrominance signal component for producing a digital luminance signal and a digital chrominance signal; characterised by an emphasizing circuit (26) for emphasizing the level of the analogue chrominance signal near a frequency corresponding to one half of said sampling frequency (fsp) and in that said processing means digitally processes said emphasized carrier chrominance signal component. Apparatus according to claim 1 wherein a horizontal scanning output from said light receiving picture elements is supplied through an automatic gain control circuit (23) and a sample and hold circuit (24), for performing said sampling, to an analogue-to-digital converter (25), and said emphasizing circuit (26) is connected between said automatic gain control circuit (23) and said sample and hold circuit (24). Apparatus according to claim 1 wherein said carrier chrominance signal component processing circuit (30) includes a colour matrix circuit (34). Apparatus according to claim 2 wherein an output from said analogue-to-digital converter (25) is separated into a luminance signal component and a carrier chrominance signal component by a filter circuit (36, 37). Apparatus according to claim 2 wherein a repetitive frequency of said colour filter assembly (10), which results from spatial modulation by respective filter elements, is selected to be half the value of the sampling frequency of said sample and hold circuit (24).

Inventors: FUKUDA TOKUYA, MATSUMOTO HIROAKI, SENDA TETSUYA, FUKUDA, TOKUYA, MATSUMOTO, HIROAKI, SENDA, TETSUYA, FUKUDA, TOKUYA, PATENTS DIVISION, SONY CORP., MATSUMOTO, HIROAKI, PATENTS DIVISION, SONY CORP., SENDA, TETSUYA, PATENTS DIVISION, SONY CORP.
Applicants: SONY CORP, SONY CORPORATION
Application year: 1990
Main classification: H04N9
IPC codes: H04N9