Video special effects apparatus

Abstract: A video signal processing apparatus has an input terminal (1) receiving a real moving picture video signal, for example, from a video camera (11), a memory (4) for storing at least one field of the real moving picture video signal so as to form a still picture video signal, a key signal generator (12) which may be constituted by an additional memory (12) storing data characteristic of a key picture, and a circuit (13) responsive to reading of the data stored in the additional memory (12) for switching between the real moving picture video signal and the still picture video signal and thereby forming a mixed video signal therefrom.

Description: This invention relates to video signal processing apparatus, particulary, but not exclusively, for home video cameras. In a known home video camera, a binary value signal, for example representing characters, indicia and the like to be used in creating a title, is generated in advance and converted into a colour signal which is mixed with a real moving picture video signal so as to provide a mixed signal that may be displayed as a title picture. In such a camera, it is desirable to be able to mix other video signals as well as the generated binary value signal with the real moving picture video signal. Further, it has been proposed to reduce noise in a video signal by using a so-called field memory, for example, as disclosed in Japanese published patent JP-B-623639. An example of a previously-proposed noise reducing circuit employing a field memory is shown in Figure 1 in which a video signal Y applied to an input terminal 1 is supplied directly therefrom to an adder 2 having its output signal Y′ supplied to an output terminal 3 and also to a field memory 4. Further, a video signal Y D delayed, for example, one field period, by the field memory 4, is supplied to one input of a subtracter 5 which, at its other input receives the video signal Y applied to the input terminal 1. Thus, the video signal Y applied to the input terminal 1 is subtracted from the delayed video signal Y D , and the result of such subtraction, that is, (Y D - Y), is supplied to a coefficient generator 6. The generator 6 provides, as its output, a signal k (Y D - Y) in which k is a coefficient provided in the generator 6 and which is selected in response to the magnitude of the difference or output (Y D - Y) from the subtractor 5. Such output k (Y D - Y) from the generator 6 is supplied to another input of the adder 2 so that the signal Y′ appearing at the output of the adder 2, and hence derived at the output terminal 3, is expressed by the following noise reducing equation: Y′ = Y + k (Y D - Y) or Y′ = (1-k) Y + kY D Therefore, noise can be reduced by properly selecting the value of the coefficient k in response to the magnitude of the difference (Y D - Y) between the signal Y at the input and the delayed signal Y D . More specifically, the value of the coefficient k is selected so as to provide a characteristic substantially as shown in Figure 2, in which the inclination of the illustrated curve represents the coefficient k. In the characteristic curve shown in Figure 2, the portion corresponding to a relatively large magnitude of the difference (Y D - Y) corresponds to a real moving picture and, accordingly, the value of the coefficient k is decreased. On the other hand, a portion of the curve or graph shown in Figure 2 for a relatively small magnitude of the difference (Y D - Y) corresponds to a still picture and, accordingly, the coefficient k is then selected to be near 1.0, with the result that the amount of feedback through the field memory 4 is increased for reducing the noise in the output video signal. In a practical embodiment of the coefficient generator 6, the latter may include, for example, a read only memory (ROM) from which there are derived output data k(Y D -Y) in response to the application to the ROM of the value (Y D - Y) as address data therefor. In order to provide for varying the degree of noise reduction, the ROM may have a plurality of data patterns established therein which are selectively addressed. It will be appreciated that, in the noise reducing circuit of Figure 1, the field memory 4 thereof is used to mix video signals. If a so-called video image memory is employed as the field memory 4, such video image memory is generally arranged to generate data of a lower address from the inside of the memory in order to facilitate generation of address data at the outside of the memory, with data being written and/or read in units of, for example, 60 blocks. For the foregoing reason, if a so-called video image memory is used to mix the video signals in the noise reducing circuit, the signal cannot be readily rewritten in pixel units so that the video signals cannot be conveniently mixed. EP-A-0 092 075 and DE-C-37 26 521 disclose video signal processing apparatus in which a still picture signal is mixed with a moving picture video signal. According to the present invention there is provided a video signal processing apparatus comprising: means for providing a real moving picture video signal; an input terminal receiving said real moving picture video signal; memory means for storing therein at least one field of said real moving picture video signal so as to form a still picture video signal; means for generating a key signal; means responsive to said key signal for selectively switching between said real moving video signal and said still picture video signal so as to form a mixed video signal therefrom; and an output terminal to which said mixed video signal is supplied, characterised by: adding means having a first input receiving said real moving picture video signal from said input terminal, a second input and an output; subtracting means for subtracting said real moving picture video signal from an output signal of said memory means and providing a respective subtracted output; and coefficient generating means for multiplying said subtracted output by a selected coefficient and providing a multiplied signal to said second input of said adding means; and wherein said means for selectively switching between said real moving picture video signal and said still picture video signal establishes the values "1" and "0", respectively, for said selected coefficient. Thus an embodiment of the present invention preferably comprises means, such as an image pick-up device, for providing a real moving picture video signal which is supplied to an input terminal, a memory for storing therein at least one field of the real moving picture video signal so as to form a still picture video signal, means for generating a key signal, and means responsive to such key signal for selectively switching between the real moving picture video signal and the still picture video signal so as to form a mixed video signal supplied to an output terminal. The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which: Figure 1 is a block diagram of a known noise reducing circuit; Figure 2 is a graph illustrating an example of a characteristic of a coefficient generator used in the noise reducing circuit of Figure 1; Figure 3 is a block diagram of an embodiment of video signal processing apparatus according to the present invention; Figure 3A is a fragmentary block diagram showing a modification of the apparatus of Figure 3; Figures 4A to 4D are diagrams to which reference will be made in explaining the operation of the apparatus of Figure 3; Figure 5 is a block diagram of another embodiment of video signal processing apparatus according to the present invention; and Figures 6A to 6B are diagrams to which reference will be made in explaining respective wiping effects of a picture on a picture screen. Referring now to Figure 3, it will be seen that, in a first embodiment of a video signal processing apparatus according to the invention, a noise reducing circuit similar to that described previously with reference to Figure 1 is utilized. More specifically, in the embodiment of Figure 3, an input video signal Y, for example, from an image pick-up portion or element 11 of a video camera, is supplied through a single signal line to an input terminal 1 from which, as before, the video signal is supplied directly to respective inputs of an adder 2 and a subtracter 5. However, the video signal applied to the input terminal 1 in Figure 3 is also supplied to a binary memory 12 having a bit number which corresponds to the number of pixels or picture elements in, for example, one field of a video signal. As before, the output Y′ of the adder 2 is applied to the output terminal 3 and also to the field memory 4, and the output Y D from the field memory 4 is applied to a respective input of the subtracter 5 which, in turn, has its output (Y D - Y) applied to a coefficient generator 6. However, in the embodiment of Figure 3, the output of the generator 6 is supplied to one fixed contact 13a of a change-over switch 13 which further has a movable contact 13c alternately engageable with a fixed contact 13a or with another fixed contact 13b to which a signal representing the logic value "0" is supplied. The change-over switch 13 is controlled by a key signal KEY read out from the binary memory 12, and the movable contact 13c is connected to a respective input of the adder 2. Further, in the embodiment of Figure 3, the generator 6 is provided with a "through-mode" in which input address data are directly output from generator 6. Thus, when the generator 6 is in its through-mode, that is, the change-over switch 13 is positioned or conditioned by the key signal KEY to engage its movable contact 13c with the fixed contact 13a, it is the equivalent of providing the coefficient k of the generator 6 with the logic value "1". In such case, the previously described noise reducing equation (1) can be rewritten as: Y′ = Y + k(Y D - Y) Y′ = Y + Y D - Y Y′ = Y D Therefore, when the generator 6 is in its through-mode or the switch 13 engages its fixed contact 13a so that the coefficient k equals "1", the data output from the terminal 3 and contemporaneously written in the field memory 4 correspond to the data of the preceding field, that is, the data of the preceding field are stored in the field memory 4 and a still picture video signal is output at the terminal 3. On the other hand, when the switch 13 engages its movable contact 13c with the fixed contact 13b, this is the equivalent of providing the coefficient k of the generator 6 with the value "0". In such case, the noise reducing equation (1) is rewritten as: Y′ = Y + k(Y D - Y) Y′ = Y Therefore, the data being supplied to the input terminal 1 are contemporaneously outputted at the output terminal 3 and also contemporaneously written in the field memory 4, that is, data stored in the field memory 4 are replaced with new data whenever the switch 13 engages its fixed contact 13b. It will be appreciated that the switching operation of the change-over switch 13 is controlled in pixel units, that is, pixel-by-pixel, by the key signal KEY read from the memory 12. Thus, for each pixel, the movable contact 13c of the change-over switch 13 engages either the fixed contact 13a corresponding to k = "1", or the fixed contact 13b corresponding to k = "0". At any pixel for which movable contact 13c engages fixed contact 13a, that is, k = "1", the output Y′ of the adder 2 is equal to the delayed signal Y D from the field memory 4 (equation 2), so that the data being read from the memory 4 for the respective pixel are written again in the field memory 4. On the other hand, at any pixel for which the movable contact 13c of the switch 13 is made to engage the fixed contact 13b, that is, k = "0", the output Y′ of the adder 2 is equal to the input video signal Y for that pixel (equation 3). Therefore, only the video signal for the pixel at which the key signal KEY causes the switch 13 to engage its fixed contact 13b is written as new data in the field memory 4. It will be appreciated from the foregoing that, in the apparatus of Figure 3, data can be written and/or reading system of such field memory. The operation of the apparatus of Figure 3 will now be described with reference to Figure 4A to 4D. Initially, and as indicated at 10A in Figure 4A, the video camera is aimed at a black and white key picture 15 which, for example, defines a heart-shaped area 15a, and the corresponding binary values of the pixels representing the key picture 15 are stored in the memory 12. Then, as indicated at 10B in Figure 4B, the video camera is directed at a suitable scene, for example, a background of flowers as indicated at 16, while the change-over switch 13 is suitable controlled continuously to engage its movable contact 13c with the fixed contact 13a, with the result that the video image picked up by the video camera in the position 10B is stored as a still picture in the field memory 4. Thereafter, and as indicated at 10C in Figure 4C, the video camera is employed for providing a real moving picture video signal, for example, of moving figures 17, while the key signal stored in the memory 12 and corresponding to the key picture 15 is output from the memory 12 and used for controlling the change-over switch 13. As a result of the foregoing, a mixed video signal is obtained at the output terminal 3 for providing a mixed video picture, as shown in Figure 4D, and in which a real moving picture 17′ is superimposed, within the heart-shaped area 15′a, upon a still picture 16′. It will be apparent from the above described operation of the apparatus of Figure 3 that a still picture video signal stored in the memory 4 and a real moving picture video signal being provided by the video camera 10 are switched or alternated on the bases of the key signal KEY from the memory 12, so that the still and moving picture video signals are mixed by a simplified arrangement for transmission through a single signal line from the output terminal 3. Although the change-over switch 13 is controlled pixel-by-pixel, the field memory 4 may be a video image memory in which the writing and reading are performed block units. Further, the coefficient generator 6 and the change-over switch 13 may be respectively constituted by a multiplier and a ROM having data patterns of k = "1" and k = "0" which are selected in response to the key signal KEY and then employed in the multiplier for multiplying the input signal (Y D - Y). Furthermore, as shown in Figure 3A, a drop-out detector 12A for sensing a drop-out in the input video signal Y may be employed in place of the memory 12 to provide a drop-out detecting signal S D instead of the key signal KEY for controlling the change-over switch 13. In such case, the described video signal processing apparatus can be used as a drop-out compensating circuit in which the movable contact 13c of the switch 13 normally engages its fixed contact 13b to provide at the output terminal 3 an output signal Y′ corresponding to the input signal Y. On the other hand, when a drop-out is detected, the resulting drop-out detecting signal S D causes the movable contact 13c of the switch 13 to engage the fixed contact 13a with the result that the signal Y′ then appearing at the output terminal 3 corresponds to the signal Y D of the preceding field so as to compensate for the detected drop-out. If a video signal processing apparatus embodying this invention does not need to serve as a noise reducing circuit, such apparatus may be arranged as shown in Figure 5. In the apparatus of Figure 5, the video signal applied to the input terminal 1 is supplied directly to the fixed contact 13a of the change-over switch 13, and is also supplied through a switch 14 to an input of the field memory 4 which has its output connected to the fixed contact 13b. Further, the movable contact 13c of the switch 13 is connected to the output terminal 3 and the switch 13 is again controllable by a key signal KEY read from the memory 12 which has an input connected with the input terminal 1. Initially, a key picture, for example, a shown in Figure 4A, is picked by the image pick-up element or portion 11 of a video camera, and a corresponding key picture signal is written in the memory 12. Thereafter, the switch 14 is suitably closed while the video camera is directed at a background scene 16, as at 10B in Figure 4B, with the result that a corresponding still picture signal is written in the field memory 4. Finally, the switch 13 is controlled by the key signal KEY read out from the memory 12 while a real moving picture is picked up by the image pick-up portion 11 of the video camera, as at 10C in Figure 4C, with the result that a mixed video signal is obtained at the output terminal 3 for providing a mixed video picture, again as shown in Figure 4D, and in which a real moving picture 17′ is superimposed, with the heart-shaped area 15′a, upon a still picture 16′. It will be understood that, in the above described apparatus of Figure 5, the heart-shaped area 15a of the key picture may be increased or reduced in size, for example, as shown in dotted lines at 15b and 15c, respectively, in Figure 6A, by suitably controlling the read addresses of the memory 12, whereby a so-called wipe effect is achieved. Alternatively, a wipe effect, in which the key picture is moved laterally from left to right as shown in Figure 6B, or vertically upward or downward, can be similarly achieved by suitably controlling the read addresses of the memory 12. Furthermore, if the key picture is a simple geometric figure, as described above, the memory 12 may be replaced by a suitable key signal generator, such as, a ROM or the like which is addressed for providing the desired jay picture signal KEY for controlling the switch 13. In the embodiments of Figures 3 and 5, the input video signal applied to the input terminal 1 has been shown to be derived from the image pick-up portion or element 11 of a video camera 10. However, a video signal processing apparatus embodying the invention may be also incorporated in a video tape recorded (VTR), editing apparatus or the like, in which, for example, the input video signal is derived from a magnetic head or the like which reproduces a video signal recorded on a magnetic tape or other medium.

Claims: A video signal processing apparatus comprising: means (11) for providing a real moving picture video signal; an input terminal (1) receiving said real moving picture video signal; memory means (4) for storing therein at least one field of said real moving picture video signal so as to form a still picture video signal; means (12) for generating a key signal; means (13) responsive to said key signal for selectively switching between said real moving video signal and said still picture video signal so as to form a mixed video signal therefrom; and an output terminal (3) to which said mixed video signal is supplied, characterised by: adding means (2) having a first input receiving said real moving picture video signal from said input terminal, a second input and an output; subtracting means (5) for subtracting said real moving picture video signal from an output signal of said memory means (4) and providing a respective subtracted output; and coefficient generating means (6) for multiplying said subtracted output by a selected coefficient and providing a multiplied signal to said second input of said adding means (2); and wherein said means (13) for selectively switching between said real moving picture video signal and said still picture video signal establishes the values "1" and "0", respectively, for said selected coefficient. Apparatus according to claim 1 wherein said coefficient generating means (6) includes a read only memory (ROM) from which said coefficient is selectively read. Apparatus according to claim 2 wherein said coefficient generating means (6) further includes multiplier means. Apparatus according to claim 1 wherein said means (12) for generating a key signal includes an additional memory (12) in which there are written data characteristic of a key picture, and said data are repeatedly read from said additional memory (12) as said key signal for controlling said means (13) for selectively switching between said real moving picture video signal and said still picture video signal. Apparatus according to claim 1 wherein said memory means (14) is a field memory (4). Apparatus according to claim 1 wherein said means (11) for providing a real moving picture video signal includes an image pick-up element (11) of a video camera. Apparatus according to claim 1 wherein said means (12) for generating a key signal includes drop-out detecting means for sensing a drop-out in said real moving picture video signal applied to said input terminal; and in which said means (13) for selectively switching normally supplies said real moving picture video signal to said output terminal (3) and switches over to an output from said memory means (4) when said key signal corresponds to sensing of a drop-out by said drop-out detecting means (12). Apparatus according to claim 1 wherein said memory means (4) includes a field memory (4) and a switch (14) selectively closable for connecting said input terminal (1) to an input of said field memory (4) so as to store said still picture video signal therein; and wherein said means (13) for selectively switching includes a change-over switch (13) having first and second inputs connected directly to said input terminal and to an output of said field memory (4), respectively, and being alternately connected to said output terminal (3) in response to said key signal.

Inventors: IIJIMA KOJI C O PATENTS DIVISI, KOJIMA MASAAKI C O PATENTS DIV, KORI TERUHIKO C O PATENTS DIVI, TAKAHASHI TAKAO C O PATENTS DI, YOSHINO KAZUO C O PATENTS DIVI, IIJIMA, KOJI, C/O PATENTS DIVISION, KOJIMA, MASAAKI, C/O PATENTS DIVISION, KORI, TERUHIKO, C/O PATENTS DIVISION, TAKAHASHI, TAKAO, C/O PATENTS DIVISION, YOSHINO, KAZUO, C/O PATENTS DIVISION
Applicants: SONY CORP, SONY CORPORATION
Application year: 1990
Main classification: H04N5
IPC codes: H04N5