ABSOLUTE POSITION ENCODER

Abstract: A difference operation unit (6) calculates a difference DELTA Ci between the data of upper six bits of the interpolation data (D4) in a lower channel (e.g., a 4096 lambda channel) having a large number of cycles and the data of lower six bits of the interpolation data (D3) in an upper channel (e.g., a 256 lambda channel) having a small number of cycles. A corrected data operation unit (8) finds a corrected data Ci such that the difference becomes smaller than a predetermined value or becomes minimal. Using the corrected data Ci, the angle data correction units (3a to 3c) correct the interpolation data (D3) in the neighboring upper channel, and the upper four bits of interpolation data (D4' to D1') of the channels after corrected are synthesized in order to detect an absolute position of the rotary shaft.

Description: Technical Field This invention relates to an absolute position encoder and, more particularly, to an absolute position encoder capable of detecting, as an absolute position, the rotational position of a rotary shaft of a motor or the like which drives a machine tool, etc. Background Art In general, an absolute position encoder of this type has a rotary coding disk fixed to a rotary shaft and a plurality of slit arrays (channels) in accordance with binary notation or Gray binary notation provided in conformity with the resolution desired, and the rotational position of the rotary coding disk is detected as an absolute position by detecting, by means of a light-receiving element (photoelectric transducer element) an amount of light from a light-emitting element that has passed through each channel formed in the rotary coding disk and a stationary slit opposing each channel. In order to raise detecting precision (resolution), it is necessary to increase the number of channels. For example, in order to detect angular information in which one revolution is divided into 4096, i.e., 2¹², parts, it is required that the number of channels be 12 (a 12-bit code is necessary), thus necessitating a coding disk of a correspondingly large size. In order to avoid this problem, it has been considered to provide the rotary coding disk with sinusoidal patterns of a plurality of channels so as to obtain a plurality of sinusoidal outputs having different cycles per revolution (e.g., a pattern through which one cycle of a sinusoidal output is obtained per revolution is provided as a first channel, a pattern through which 16 cycles of a sinusoidal output is obtained per revolution is provided as a second channel, and a pattern through which 256 cycles of a sinusoidal output is obtained per revolution is provided as a third channel), interpolate the angular information in one wavelength of each channel 16 items at a time, and successively combine the interpolated data of each channel thus obtained, whereby the rotational position of the coding disk is detected as an absolute position. In such case, the number of channels for obtaining the same resolution is smaller than that needed in a case where the channels are formed in accordance with the abovementioned binary methods (e.g., in order to perform detection by dividing one revolution into 2¹² parts, three channels will suffice, as set forth above), thereby making it possible to reduce the size of the rotary coding disk. Fig. 2 exemplifies an absolute position encoder, as it is disclosed in JP-A-61131011 or JP-A-56096213, adapted to detect the angular information of such a rotary coding disk, in which the rotary disk used is formed to have plural channels of sinusoidal patterns the numbers of cycles whereof differ. Fig. 2 illustrates a case in which, in addition to the abovementioned first, second and third channels (represented by 1λ, 16λ and 256λ, respectively), there is provided a fourth channel (represented by 4096λ, by which a sinusoidal output of 4096 cycles is obtained), wherein the inputs are sinusoidal signals 1λsin, 16λsin, 256λsin and 4096λsin from the respective channels and cosinusoidal signals 1λcos, 16λcos, 256λcos and 4096λcos having an electrical phase difference of 90° relative to respective ones of the sinusoidal signals. By way of example, the cosinusoidal signals are obtained by using a light-receiving element to detect and photo-electrically convert light which has passed through a stationary slit electrically displaced by 90° from the stationary slit for the sinusoidal signals. Numerals 11 through 14 denote amplifiers for amplifying respective ones of the sinusoidal signals 1λsin through 4096 λsin, 21 through 24 analog switches for channel selection connected to the output sides of respective ones of the amplifiers 11 through 14, 16 through 19 amplifiers for amplifying the cosinusoidal signals 1λcos through 4096λcos, and 26 through 29 analog switches for channel selection connected to the output sides of respective ones of the amplifiers 16 through 19. Assume now with regard to detecting information relating to the angle of the rotary coding disk that switches 21 and 26 are turned on. In such case, after the sinusoidal signal 4096λsin and cosinusoidal signal 4096λcos from the signal detectors (the corresponding light-receiving elements) are amplified by the corresponding amplifiers 11, 16, the amplified signals pass through the switches 21, 26 and enter AD converters 31, 32, respectively. Each of the AD converters 31, 32 converts its input into digital data of a prescribed number of bits in conformity with the required resolution and supplies this digital data (so-called sine data X s and cosine data X c ) to a ROM 41 as address inputs (e.g., row-and-column address inputs). Values obtained by multiplying tan⁻¹(Xs/Xc) by a suitable constant are converted into binary numbers stored in the ROM 41 in accordance with designated addresses (an address is designated by the sine data X s and cosine data X c . More specifically, assume that the input sinusoidal signal 4096λsin is 0.5 V and that the cosinusoidal signal 4096λcos is also 0.5 V. In such case, these signals are each converted into a prescribed digital quantity, e.g., "0100" by the respective AD converters 31, 32 (i.e., the sine data X s and cosine data X c inputted to the ROM 4 are assumed to be "0100"). Accordingly, if such sine data and cosine data are entered as the address signals, the data in the ROM stored at the corresponding address will be a value (=1/8) converted into a binary number having a suitable number of bits, e.g., a 10-bit binary number "0010000000", the value (1/8) being obtained by multiplying tan⁻¹(1) = 45° by 1/36, which serves as a constant. From among this 10-bit stored data, the four higher-order bits, for example, namely "0010", are read out and latched in a latch circuit 51. In this case, angular information in one wavelength regarding the corresponding channel (i.e., 4096λ) is extracted as interpolated data divided into 16 parts. Next, the channel selection switches are changed over from 21, 26 to 22, 27, the sinusoidal signal 256λsin and cosinusoidal signal 256λcos which enter at this time are similarly converted into digital data by the AD converters 31, 32, the sine data and cosine data thus obtained are used as address signals for the ROM 41 to again read out 10-bit data corresponding to the address in the manner set forth above, and the data consisting of the four higher-order bits is latched in a latch circuit 52. Thereafter, and in similar fashion, the channel selection switches are successively changed over to 23, 28 and then to 24, 29, the sine data and cosine data obtained by AD-converting the entering signals 16sin, 16λcos and then 1λsin, 1λcos are successively used as address signals of the ROM 41 to read out the ROM data corresponding to these addresses, and the four higher-order bits of the read data are successively latched in latch circuits 53, 54. Thus, the channels (four channels in this case) are successively changed over, and ROM data read out using the two-phase input signals (the sinusoidal and cosinusoidal signals) of each channel as prescribed address data is successively latched in the latch circuits. By combining the data in the latch circuits, information indicative of the angle of the rotary coding disk can be detected by 16-bit data extending from the data (the data on the higher-order bit side) latched in the latch circuit 54 to the data ((the data on the lower-order bit side) latched in the latch circuit 51. In this case, the absolute position of the disk can be detected, with the number of divisions per revolution being 2¹⁶ (i.e., a resolution of 2¹⁶/revolution). Fig. 3 is a view for describing the absolute position data obtained by the foregoing operation. Let A₄ represent a hexadecimal numeric value of the four higher-order bits of interpolated data D₄ in the least significant channel (4096λ channel), A₃ a hexadecimal numeric value of the four higher-order bits of interpolated data D₃ in the 256λ channel, A₂ a hexadecimal numeric value of the four higher-order bits of interpolated data D₂ in the 16λ channel, and A₁ a hexadecimal numeric value of interpolated data D₁ in the most significant channel (1λ channel). In such case, the absolute position data is as follows, expressed in hexadecimal notation: A₁·16⁻¹ + A₂·16⁻² + A₃·16⁻³ + A₄·16⁻⁴ It should be noted that if a hexadecimal numeric value A i (i = 1 - 4) is expressed as follows using binary notation: A i = a i3 ·2³ + a i2 ·2² + a i1 ·2¹ + a i0 then the absolute position data may written as follows: a₁₃·2⁻¹ + a₁₂·2⁻² + a₁₁·2⁻³ + a₁₀·2⁻⁴ + a₂₃·2⁻⁵ + a₂₂·2⁻⁶ + a₂₁·2⁻⁷ + a₂₀·2⁻⁸ + ................................. + a₄₃·2⁻¹³ + a₄₂·2⁻¹⁴ + a₄₁·2⁻¹⁵ + a₄₀·2⁻¹⁶ Ideally, the sinusoidal signals 1λsin, 16λsin, 256λsin and 4096λsin in the respective channels are required to cross the zero line simultaneously at predetermined period, as shown in Fig. 4 (in which only 256λsin and 4096λsin are illustrated). More specifically, (i) with regard to two mutually adjacent channels, sinusoidal signals of the higher-order channel and lower-order channel are required to cross zero simultaneously every 16 cycles of the lower-order channel, and (ii) it is required that the sinusoidal signal and cosinusoidal signal of each channel possess an accurate phase difference of 90° in terms of the electric angle. However, (i) and (ii) cannot be satisfied at the outset owing to an error in forming the sinusoidal pattern in each channel. That is, as shown in Fig. 5, a phase error P E resides between the zero-cross points of the sinusoidal or cosinusoidal signals of mutually adjacent channels, and the phase between sinusoidal and cosinusoidal signals cannot be made exactly 90°. Consequently, the conventional practice is to provide means for adjusting, in analog fashion, the phases of the sinusoidal signal and cosinusoidal signal, which are the outputs of the light-emitting elements, use the adjusting means, while observing the sinusoidal signal of each channel by a synchroscope or the like, to effect adjustment in such a manner that the zero-cross point of the higher-order channel side (the longer period side) is made to coincide with the zero-cross point of the adjacent lower-order channel side (the shorter period side) at a predetermined period, then similarly advance the phase of the cosinusoidal signal on the longer period side to be 90° ahead of the sinusoidal signal, and thereafter perform adjustment in such a manner that the zero-cross points of the cosinusoidal signals of the mutually adjacent channels coincide. However, the analog adjustment is troublesome. Moreover, adjustment errors occur, as a result of which absolute position cannot be detected accurately. Accordingly, an object of the present invention is to provide an absolute position encoder in which phase can be adjusted digitally, automatically and so as to reduce adjustment error. Disclosure of the Invention The present invention provides an absolute position encoder in which sinusoidal and cosinusoidal signals are outputted in each of a plurality of channels having numbers of cycles that differ from one another, a prescribed number of items of position information are interpolated in one wavelength of each channel, and m higher-order bits of the interpolated data in each channel are combined to output an absolute position of a rotary coding disk. In the present invention, corrective data is obtained which will reduce, below a predetermined value, a difference between higher-order n-bit data in the interpolated data in a lower-order channel having a large number of cycles and lower-order n-bit data in the interpolated data in the adjacent higher-order channel having a small number of cycles, the interpolated data of the adjacent higher-order channel is corrected by the corrective data, and the m higher-order bits of the interpolated data of each channel after correction are combined to detect absolute position. Brief Description of the Drawings Fig. 1 is a block diagram showing the principal portions of an absolute position encoder according to the present invention; Fig. 2 is a block diagram for describing the principle of absolute position detection performed by an absolute position encoder; Fig. 3 is a view for describing the structure of absolute position data; and Figs. 4 and 5 are views for describing the background of the present invention. Detailed Description of a preferred Embodiment Described first will be the general features of an angle data correction method used in the absolute position encoder of the present invention. (i) If the zero-cross points of the sinusoidal signals of two mutually adjacent channels coincide every predetermined number of cycles (e.g., every 16 cycles) of the lower-order channel and (ii) the phases of the sinusoidal signal and cosinusoidal signal of the same channel are accurately displaced from each other by 90°, then the following will hold with regard to the interpolated data D1 - D4 (see Fig. 3) of the respective channels read out of the ROM 41 (Fig. 2): "Six-bit data B i starting from the (m+1)th bit (fifth bit) of the higher-order channel of two mutually adjacent channels and higher-order six-bit data A i+1 ' (i = 1, 2, 3) of the lower-order channel will coincide." In other words, the larger the phase shift of (i) and (ii), the larger will be the absolute value of the difference between the data B i and A i+1 '. In accordance with the present invention, therefore, (a) an initial value C i of corrective data is made zero, and a difference ΔC i is computed, at predetermined sampling times, between data B i in interpolated data D i of the higher-order channel and data B i+1 ' in interpolated data D i+1 of the lower-order channel; (b) C i + ΔC i is adopted as new corrective data ( Ci + ΔC i → C i ) if the absolute value of the difference is greater than a set value; (c) the interpolated data D i of the higher-order channel at the next sampling time is corrected ( D i + C i → D i ) by the corrective data C i , and similar processing is subsequently executed to obtain corrective data which will make the absolute value of the difference ΔC i less than a predetermined value; (d) corrective data is similarly obtained for all mutually adjacent channels; and (e) in detecting the absolute position of a rotary shaft, the interpolated data D i is corrected by the corrective data C i and the four higher-order bits of the interpolated data of the respective channels after correction is combined to generate and output data indicative of the absolute position of the rotary shaft. Fig. 1 is a block diagram showing the principal portions of an absolute position encoder according to the present invention. Numeral 1 denotes a ROM in which the interpolated data of each channel is stored. This ROM has the same construction as that of ROM 41 shown in Fig. 2 and has the same stored contents. Numerals 2a - 2d denote interpolated data memory units which store, at predetermined sampling times, the interpolated data (assumed to be 10-bit data) D₄, D₃, D₂, D₁ of the 1λ through 4096λ channels read out of the ROM 1. For the details of the interpolated data D i of each channel, see Fig. 3. Numerals 3a - 3c denote angle data correction units which, based on the corrective data C i between mutually adjacent channels, corrects the interpolated data D i of the higher-order channel in accordance with the following equation: D i + C i → D i ' (1) Numeral 4 denotes an angle data changeover unit for changing over and outputting the two items of interpolated data D i ', D i+1 ' of predetermined mutually adjacent channels when the corrective data C i between each of the mutually adjacent channels is obtained. Numeral 5a designates a higher-order six-bit output unit for outputting higher-order six-bit data A i+1 ' of the interpolated data D i+1 ' of the lower-order channel, and 5b designates a lower-order six-bit output unit for outputting lower-order six-bit data B i of the interpolated data D i ' of the upper-order channel. Numeral 6 denotes a subtracting arithmetic unit for calculating the difference ΔC i between data A i+1 ' and B i in accordance with the following equation: A i+1 ' - B i → ΔC i (2) Numeral 7 represents an error monitoring unit for checking to see whether the absolute value |ΔC i | of the difference ΔC i is less than a set value, 8 a corrective data arithmetic unit, and 9 a corrective data memory unit. The corrective data memory unit 8 updates the corrective data C i between the mutually adjacent channels in accordance with the following equation: C i + ΔC i → C i (3) and stores the updated data in the corrective data memory unit 9. Numeral 10 denotes an absolute position data output unit for combining the higher-order four bits A₁ - A₄ of the interpolated data D₁' - D₄' of respective channels, and for outputting 16-bit binary absolute position data. The overall operation of Fig. 1 will now be described. (a) Corrective data decision processing In corrective data decision processing, the initial values of the corrective data C₃, C₂, C₁ between all of the mutually adjacent channels are set to zero and decisions are made successively starting from the corrective data C₃ of the adjacent channel on the side of the least significant channel. The interpolated data D₁, D₂, D₃, D₄ of the respective channels is read out of the ROM 1 every predetermined sampling time and stored in the memory units 2a - 2d, just as in the conventional method of Fig. 2. (a) First, on the assumption that the lower-order channel is the 4096λ channel and the higher-order channel is the 256λ channel, the corrective operation of Eq. (1) is applied to the interpolated data D₃ of the higher-order channel at the predetermined sampling time to generate interpolated data D₃'. It should be noted that D₄ is regarded as being D₄' without a correction being applied to the interpolated data D₄ of the least significant channel. (b) Next, the angle data changeover unit 4 selects the interpolated data D4', D₃' of the lower- and higher-order channels after correction and outputs these data to the higher-order six-bit output unit 5a and lower-order six-bit output unit 5b, respectively. (c) The higher-order six-bit output unit 5a outputs higher-order six-bit data A₄' of the interpolated data D₄' of the lower-order channel, and the lower-order six-bit output unit 5b outputs lower-order six-bit data B₃' of the interpolated data D₃' of the higher-order channel. (d) The difference arithmetic unit 6 calculates the difference ΔC₃ between the data A₄' and data B₃ in accordance with Eq. (2) and inputs the difference to the error monitoring unit 7 and corrective data arithmetic unit 8. (e) The error monitoring unit 7 checks to determine whether the absolute value of the difference C₃ is less that the set value, and applies a corrective data update command REN to the corrective data arithmetic unit 8. (f) When the corrective data update command REN is generated, the corrective data arithmetic unit adopts C₃ + ΔC₃ as new corrective data ( C₃ + ΔC₃ → C₃ ) in accordance with Eq. (3) and stores the new corrective data in the corrective data memory unit 9. Thereafter, when the next sampling time arrives, processing from the aforementioned step (a) is repeated. When the difference ΔC₃ falls below the set value, the corrective data update command REN is not generated and the processing for setting the corrective data C₃ is ended. When the corrective data C₃ between the least significant channel and the channel adjacent thereto has been decided by the foregoing operation, the corrective data C₂ is subsequently decided using the interpolated data D₃, D₂ in the same manner, the corrective data C₁ is similarly decided using the interpolated data D₂, D₁, and corrective data decision processing is terminated. In the foregoing, the corrective data is decided by reading the interpolated data D₄ - D₁ of the respective channels out of the ROM every predetermined sampling time. However, an arrangement can be adopted in which the foregoing processing is executed to decide the corrective data without altering the interpolated data D₄ - D₁ of the respective channels at the predetermined times. (b) Absolute position data output processing In detecting the absolute position of the rotary shaft, the interpolated data D₁ - D₃ in the respective channels is corrected (D₄ is not corrected) by the corrective data C₁ - C₃ at the predetermined sampling times, and the interpolated data D₁' - D₄' of the respective channels is inputted to the absolute position data output unit 10. The latter combines the four higher-order bits of the interpolated data D₁' - D₄' on the respective channels just as in the prior-art method and outputs absolute position data expressed in the form of a 16-bit binary number. In the foregoing, it is so arranged that the processing for deciding the corrective data C i is terminated when |ΔC i | falls below the set value in the error monitoring unit 7. It is also permissible to adopt the following arrangement: Specifically, it can be so arranged that the corrective data C i is updated in accordance with Eq. (3) in a case where the absolute value |ΔC i | of the difference is smaller than that which prevailed one sampling instant earlier, whereas if the absolute value is larger than that which prevailed one sampling instant earlier, this value |ΔC i | one sampling earlier is regarded as being minimum and corrective data decision processing is terminated. Furthermore, though the foregoing is a case where the present invention is applied to an optical sensor, it can be applied also to a magnetic sensor. Further, though the foregoing describes a rotary-type absolute position encoder, applying the present invention to a linear-type detector such as a linear scale will make it possible to similarly construct a linear-type absolute position encoder. Thus, in accordance with the present invention, it is arranged to calculate the difference ΔC i between higher-order six-bit data of interpolated data in a lower-order channel and six-bit data starting from a fifth bit of interpolated data in a higher-order channel, obtain corrective data C i which will bring the difference below a predetermined value or minimize the corrective data, correct the interpolated data in the adjacent higher-order channel by the corrective data C i , and combine the four higher-order bits of the interpolated data of each channel after correction, thereby detecting the absolute position of a rotary shaft. As a result, phase can be adjusted digitally and automatically, and the phase adjustment can be performed so as to minimize adjustment error, thereby making possible high precise detection of absolute position.

Claims: An absolute position encoder having: a moving coding disk and a stationary disk that are formed so as to obtain sinusoidal and cosinusoidal outputs in each of a plurality of channels having numbers of cycles which differ from one another; AD converters (31, 32) for AD-converting the sinusoidal and cosinusoidal outputs in each channel in order to form position information indicative of the position of said moving disk; and a ROM (1, 41) in which outputs (X s , X c ) of the AD converters (31, 32) corresponding to the sinusoidal and cosinusoidal outputs of each channel are treated as a set and the sets are successively adopted as address information, a predetermined number of items of position information are interpolated in one wavelength of each channel and said interpolated data is stored in the ROM at a respective corresponding address thereof; absolute position of the moving coding disk being detected using m higher-order bits of the interpolated data in each channel; wherein said absolute position encoder is characterized by having: means for computing corrective data, which will make less than a predetermined value or minimize, a difference (ΔC i ) between higher-order n-bit data (A i+1' ) of interpolated data (D i+1 ) in a lower-order channel having a large number of cycles and n-bit data (B i ) starting from an (m+1)th bit of interpolated data (D i ) in an adjacent higher-order channel having a small number of cycles; correcting means (3a, 3b, 3c) for correcting the interpolated data in one of said adjacent channels by said corrective data; and means (10) for combining m higher-order bits of the interpolated data (D 1' - D 4' ) of each channel after correction to output the absolute position of the moving coding disk. An absolute position encoder according to claim 1, characterized in that said corrective data arithmetic means obtains the corrective data for every adjacent channel. An absolute position encoder according to claim 2, characterized in that said corrective data arithmetic means has an arithmetic unit (6) for obtaining the difference between the higher-order n-bit data of the interpolated data in the lower-order channel and n-bit data starting from the (m+1)th bit of interpolated data in the adjacent higher-order channel, a monitoring unit (7) for monitoring whether said difference has fallen below the predetermined value or has been minimized, and a corrective data updating unit (8) for updating the corrective data if the difference has not fallen below the predetermined value or has not been minimized. An absolute position encoder according to claim 3, characterized in that said corrective data updating unit (8) updates the corrective data in accordance with C + ΔC → C , where an initial value C of the corrective data is assumed to be zero and said difference is assumed to be ΔC, and updates the corrective data until the absolute value of ΔC falls below the predetermined value or is minimized. An absolute position encoder according to claim 1, characterized in that said moving coding disk is a rotary coding disk, the numbers of cycles of the sinusoidal and cosinusoidal outputs of the respective channels are 16⁰, 16¹, 16², 16³ ... per revolution, and m = 4.

Inventors: TANIGUCHI, MITSUYUKI F. MANSHON HASIMOMI 8-205
Applicants: FANUC LTD.
Application year: 1989
Main classification: G01D5
IPC codes: G01D5