Method and apparatus for driving display device

Abstract: In a display device such as a thin-film EL display device, etc. formed with a dielectric layer disposed between a plurality of scanning side electrodes (Y) and a plurality of data side electrodes (X) in the direction for them intersecting to each other, a modulation voltage (V M ) changed according to gradation display data is applied to the data side electrodes (X), and a positive or negative writing voltage (+V P , -V N ) is applied to the scanning side electrodes (Y) in a line order for a gradation display different in brightness. Binary coded signals corresponding to each gradation of a gradation display are used as the gradation display data, and the logical value of the binary coded signal is inverted according to the polarity of the writing voltage (+V p , -V N ). Thus, a common gradation display can be performed from one binary coded signal for both the negative driving that applies a negative writing voltage (-V N ) and the positive driving that applies a positive writing voltage (+V P ). As a result, only by adding a data conversion circuit (18) for inverting a binary coded signal, the function that converts the correspondence relation between the gradation to be displayed and the gradation display data depending on the negative driving or positive driving can be incorporated.

Description: This invention relates to a method and a device for ac driving a capacitive flat matrix display panel, e. g. a thin film EL display device or an LCD. A thin film EL element has e. g. the structure as it is shown in Fig. 1. Band-like transparent electrodes 2 are disposed in parallel to each other on a glass substrate 1. On this, a dielectric material 3a such as Y₂O₃, Si₃N₄, Al₂O₃, an EL material 4 composed of ZnS doped with e. g. Mn, and again a dielectric material 3b are laminated one above the other to a film thickness of 50 - 1000 nm by using a thin-film technique such as vacuum deposition or sputtering to make a three-layer structure. On it, band-like back electrodes 5 composed of Al are disposed in parallel to each other at a right angle to the transparent electrodes 2. As it is apparent from the voltage-brightness characteristics shown in Fig. 2, this capacitive thin-film EL element is driven by applying a relatively high voltage of about 200 V. One of the series of electrodes is used as series of data side electrodes, and the other series is used as a series of scanning side electrodes. Such a thin film EL display device is driven by the following method: a positive writing voltage, in a positive writing period, and a negative writing voltage, in a negative writing period are applied alternatingly to each of the scanning side electrodes, said positive and negative writing periods having the same predetermined temporal lengths; and a modulation voltage of a first variable temporal length, which temporal length determines the brightness level value of the pixel onto which said modulation voltage acts together with said writing voltage, is applied to each of the data side electrodes during said positive writing period, and a modulation voltage of the same value, but having a second length corresponding to the difference between said predetermined temporal length and the actual first variable temporal length is applied to the respective data side electrodes during the corresponding negative writing period. The positive writing voltage is selected to such a value that the threshold voltage for emission of light is not surpassed at a pixel receiving the positive writing voltage on its scanning electrode side, and the positive modulation voltage at its data electrode side. However, the threshold is surpassed when only the positive writing voltage is applied. In contrast, the negative writing voltage is selected to a value that the threshold voltage is surpassed when said negative writing voltage and the positive modulation voltage act on a pixel, whereas the threshold voltage is not surpassed when only the negative writing voltage acts on the pixel. Due to this selection of voltages, the time period in which the modulation voltage is not applied during the positive writing voltage is applied, and the period in which the modulation voltage is applied during the negative writing voltage is applied, have to be equal to have the same periods of a bright pixel in scanning periods with positive writing voltages as well as in scanning periods with negative writing voltages. That is, that the period during which a pixel is bright increases with an increase of the period of an applied modulation voltage during a period of negative writing voltage, however decreases during a period of positive writing voltage. However, incorporating the function that converts the relation of the gradation to be displayed and gradation display data according to negative driving and positive driving as described above to peripheral circuits and peripheral devices of a display device nullifies the wide use of those peripheral circuits and peripheral devices. So, the conversion function is generally shared by a driving circuit that directly applies a modulation voltage to the data side electrode so far. Therefore, a problem such that a driving circuit becomes complicated has been posed. In the above described driving method, the temporal average of the writing voltage is zero, whereas the temporal average of the modulation voltage is positive as positive voltages of variable and different lengths are applied both in periods of positive and of negative writing voltages. In contrast to such a driving method, driving methods are known, especially in driving LCDs, in which the temporal averages of both, the writing voltage and the modulation voltage are zero. An example for such a driving method is described in EP-A-0 051 521. It is the object of the present invention to provide a method for driving a capacitive display device with different brightness levels of its pixels, which method allows to use a driving device of simple construction. Further, it is the object of the present invention to provide such a driving device. The method and the device of the present invention are defined by claims 1 and 4, respectively. In the method of the present invention, the brightness level for each pixel is converted into a binary value. This binary value is used as it is during one of the writing periods, e. g. during the period in which the writing voltage is negative. In the other period, the complement of this binary value is calculated to determine the brightness. The complement of a binary value can be calculated by a modifying means of very simple construction. The data side driving means which uses the binary value, either the value as it is or the complement, works exactly in the same way during both writing periods. Therefore, also this driving means can have very simple construction. These and other objects, characteristics, and advantages of the invention will become more apparent in the detailed description and figures which follow. FIG. 1 is a partial cutaway view of a thin-film EL element: FIG. 2 is a graph showing the voltage - brightness characteristics of the thin-film EL element; FIG. 3 is a block diagram showing a schematic arrangement of a thin-film EL display device to which a driving method of one embodiment of the invention applies; FIG. 4 is a circuit diagram showing a specific arrangement of the data conversion circuit 18; FIG. 5 is a timing chart showing a schematic operation of the data conversion circuit 18; and FIG. 6 is a waveform diagram showing the voltage applied to the picture element of the thin-film EL display device. Preferred embodiments of the invention will now be described in detail with reference to the drawings. FIG. 3 is a block diagram showing a schematic arrangement of a thin-film EL display device to which a driving method of one embodiment of the invention applies. In FIG. 3, a display panel 6 is composed of thin-film EL elements. Its specific arrangement is the same as for the arrangement described for the prior art. So, description thereof is omitted here. A plurality of scanning side electrodes Y1, Y2, --, Ym-1, Ym (hereinafter, any scanning side electrodes are denoted by the symbol Y) arranged in the display panel 6 are connected to a scanning electrode driving circuit 7. A plurality of data side electrodes X1, X2, --, Xm-1, Xm (hereinafter, any data side electrodes are denoted by the symbol X) arranged in the direction at right angles to the scanning side electrodes Y1 - Ym, are connected to a data side electrode driving circuit 8. In the scanning electrode driving circuit 7, output ports 9 are each connected to each of scanning side electrodes Y1 - Ym. A negative writing voltage -V N is selectively applied in a first field of negative driving from a power supply 10a via the output port 9. In a second field of positive driving, a positive writing voltage -V P is selectively applied to each of scanning side electrodes Y1 - Ym from another power supply 10b via the output port 9. These output ports 9 are connected to a shift register 11. Scanning data S-DATA for specifying the scanning side electrodes Y1 - Ym in a line order is transferred to the shift register 11 in synchronization with a clock CLK3 input from the clock input terminal of the shift register 11, thereby turning on each output port 9 in the line order of the scanning side electrodes Y1 - Ym. On the other hand, in a data electrode driving circuit 8, an output port 12 which is a driving circuit, is connected to each of data side electrodes X1 - Xn, and the modulation voltage V M is selectively applied to each of data side electrodes X1 - Xn from a power supply 13 via output ports 12. Depending on the setting condition of each output port 12, each of data side electrodes X1 - Xn is clamped to the ground. These output ports 12 are connected to a comparator 14. This comparator 14 is connected to a shift register 16 via a latch circuit 15. The shift register 16 is a circuit for shifting in synchronization with the clock CLK1 input from its clock input terminal and transferring gradation display data of 4 bits that correspond to the data side electrode X1 - Xn. The gradation display data transferred by the shift register 16 is temporarily held in the latch circuit 15 by the latch signal LE, after which it is sent to the comparator 14. The comparator 14 has a function that determines the pulse width of a modulation voltage V M corresponding to gradation display data by comparing 4-bit parallel data provided from the counter 17 with the similarly 4-bit gradation display data provided from the latch circuit 15. A data conversion circuit 18 is a circuit for converting gradation display data sent from a data output circuit 20 as a 4-bit binary coded signal according to the negative driving time or positive driving time, and providing the converted gradation display data to the shift register 16. The binary coded signals sent to this circuit 18 as gradation display data are defined in correspondence with brightness levels of 16 steps to be displayed in a picture element. In FIG. 3, each picture element in the display panel 6 is equivalently shown by a capacitor. FIG. 4 is a circuit diagram showing a specific arrangerent of the data conversion circuit 18. In FIG. 4, input terminals IP0, IP1, IP2, and IP3 are terminals for inputting bits in each place of binary coded signals provided as gradation display data from a data output circuit 20. The input terminals IP0, IP1, IP2, and IP3 are respectively connected to one of the input terminals of a first EX-OR (exclusive logical AND) gate 19a, one of the input terminals of a second EX-OR gate 19b, one of the input terminals of a third EX-OR gate 19c, and one of the input terminals of a fourth EX-OR gate 19d. To the other input terminal of each of EX-OR gates 19a - 19d is connected to the input terminal IP that accepts the field switching signal N/P that becomes low in the first field of negative driving and becomes high in the second field of positive driving. The output terminals OP0, OP1, OP2 and OP3 of each of EX-OR gates 19a - 19d are connected to the shift register 16. A basic operation of a thin-film EL display device shown in FIG. 3 will now be described with reference to a timing chart shown in FIG. 5. In the shift register 16 of the data electrode driving circuit 8, converted 4-bit gradation display data sent from the data conversion circuit 18 is transferred in synchronization with the clock CLK1. This gradation display data is temporarily held in the latch circuit 15. Under this condition, when the clear signal CLR that has been input till that time in the comparator 14 and the counter 17 is released, the data side electrode X corresponding to the data of "0, 0, 0, 0" (= brightness level "0") among the display data held in the latch circuit 15 is clamped to the ground, and the data side electrodes X corresponding to data other than those, are all pulled up to a modulation voltage V M . Suppose that, for example, gradation display data "0, 0, 0, 0" (= brightness level "0"), "0, 0, 1, 0" (= brightness level "2"), "0, 1, 0, 0" (= brightness level "4") and "0, 1, 1, 1" (= brightness level "7") are provided to output ports 12 corresponding to data side electrodes X1, X2, Xn-1 and Xn of the data electrode driving circuit 8 respectively. At this time, the output ports 12 of the data side electrode X1 are clamped to the ground at the same time the clear signal CLR is released, and the modulation voltage V M from the output ports 12 becomes a waveform as shown in FIG. 5 (3). That is, the pulse width is set to zero. In the output ports 12 of the data side electrode X2, the count value of the clock CLK2 (see FIG. 5 (2)) counted by the counter 17 is compared with the display data "2" in the comparator 14. It is clamped to the ground at the time t2 when the count value became "2", and the modulation voltage V M of the pulse width shown in FIG. 5 (4) is set. Similarly, the output ports 12 of the data side electrode Xn-1 are clamped to the ground at the time t4 when the count value of the counter 16 became "4", and the modulation voltage V M of the pulse width shown in FIG. 5 (5) is set. For the output ports 12 of the data side electrode Xn, they are clamped to the ground at the time t7 when the count value of the counter 16 becomes "7", and the modulation voltage V M of the pulse width shown in FIG. 5 (6) is set. Accordingly, the modulation voltage V M of the pulse width corresponding to gradation display data "0", "2", "4" and "7" is applied to each of data side electrodes X1, X2, Xn-1, and Xn. On the other hand, in the scanning electrode driving circuit 7, while the clear signal CLR is released in the data electrode driving circuit 8, one of all output ports 9 turns on, and a negative writing voltage -V M or a positive writing voltage V P is applied to the one scanning side electrode Y that corresponds to the output port. In other words, a writing voltage -V M is applied in the first field of negative driving, and a writing voltage +V p is applied in the second field of positive driving. Repeated operation of the above in accordance with the line order of the scanning side electrode Y causes picture elements that lie at each of scanning side electrodes Y to emit light in the brightness according to the gradation display data or emit no light. As a result, on the whole, a screen having a gradation in brightness is displayed. In the basic operation described above, the following operation is performed in the data conversion circuit 18 shown in FIG. 4. That is, suppose that, for example, a binary coded signal "1, 0, 1, 1" equivalent to the brightness level "11" shown in table 1 is input to the data conversion circuit 18, then a high-level signal is input to the input terminals IP0, IP1, and IP3, and a low-level signal is input to the input terminal IP2. Since the field switching signal N/P input to the input terminal IP is low in the first field of negative driving, data input to the input terminals IP0 - IP3 are output as it is to the output terminals OP0 - OP3 of each of the EX-OR gates 19a - 19d. That is, the gradation display data "1, 0, 1, 1" input to the data conversion circuit 18 is sent to the shift register without modifications. In contrast to the above, since the switching signal N/P input to the input terminal IP in the second field of positive driving is at a high level, data such that the logical values input to the input terminals IP0 - IP3 are inverted, is output to the corresponding output terminals OP0 - OP3 of each of EX-OR gates 19a - 19d. That is, the gradation display data "1, 0, 1, 1" input to the data conversion circuit 18 is converted to " 1 , 0 , 1 , 1 " = "0, 1, 0, 0", and sent to the shift register 16. As is apparent from table 1, in this case, the gradation display data equivalent to tie brightness level "4" was converted to the gradation display data equivalent to the brightness level "11", and input to the shift register 16. FIG. 6 shows the waveform of the voltage applied to a corresponding picture element at this time. Of them, FIG. 6 (1) shows a waveform of a modulation voltage V M applied from the data side electrode X. FIG. 6 (2) shows the waveform of a writing voltage -V M , +V p applied from the scanning side electrode Y. FIG. 6 (3) shows the waveform of a voltage applied to a picture element. In this case, in the first field of negative driving, as shown in FIG. 6 (1), a modulation voltage V M of the pulse width equivalent to the gradation display data "1, 0, 1, 1" (brightness level "11") at the time of input to the data conversion circuit 18 is set. Since the writing voltage at this time is a negative voltage -V M as shown in FIG. 6 (2), the section corresponding to the pulse width of the modulation voltage V M becomes the section in which the writing voltage exceeds the light emission threshold voltage -Vth, and the brightness level "11" corresponding to the pulse width of the modulation voltage V M is displayed as it is. On the other hand, in the second field of positive driving, as shown in FIG. 6 (1), a modulation voltage V M of the pulse width equivalent to the gradation display data "0, 1, 0, 0" (brightness level "4") obtained by inverting the logical value of the gradation display data "1, 0, 1, 1" (brightness level "11") at the time of input to the data conversion circuit 18 is set. Since the writing voltage at this time is a positive voltage +V p as shown in FIG. 6 (2), in the waveform of the voltage shown in FIG. 6 (3), a voltage of a section in which the pulse width of the writing voltage V p is subtracted by the pulse width of the modulation voltage V M , i.e., the section equivalent to the pulse width of the modulation voltage V M in negative driving exceeds the light emission threshold voltage Vth. In this case, also, a brightness level "11" is displayed. That is, in both the negative driving and positive driving, a common brightness level corresponding to the gradation display data input to the data conversion circuit 18 is displayed. In the above operation, the case where gradation display data "1, 0, 1, 1" of a brightness level "11" is inverted to gradation display data "0, 1, 0, 0" of a brightness level "4" is described. The same relation of inversion correspondence holds for the other gradation display data. In table 1, for example, a relation of inversion correspondence holds between gradation display data "1, 1, 1, 1" of brightness level "15" and gradation display data "0, 0, 0, 0" of brightness level "0", between gradation display data "1, 1, 1, 0" of brightness level "14" and gradation display data "0, 0, 0, 1" of brightness level "1", and between gradation display data "1, 0, 0, 0" of brightness level "8" and gradation display data "0, 1, 1, 1" of brightness level "7". In this embodiment, a case in which the data conversion circuit 18 is incorporated in the data electrode driving circuit 8 is shown. However, the data circuit 18 may be arranged separately from the data electrode driving circuit 8. The scanning electrodes Y may be applied with voltages in such a way that, for example, a positive writing voltage +V p is applied to the odd-numbered scanning electrodes Y1, Y3 --- in one of the fields (first field), and a negative writing voltage +V N is applied to the even-numbered scanning electrodes Y2, Y4 ---. In the other field (second field), a negative writing voltage -V N is applied to the odd-numbered scanning electrodes Y1, Y3 ---, and a positive writing voltage +V p is applied to the even-numbered scanning electrodes Y2, Y4 ---. In this embodiment, a case in which gradation display is performed by a pulse width modulation method, is described, but it also applies to the case where gradation display is performed by an amplitude modulation method in addition to the above method. Furthermore, it also applies to other capacitive display devices such as a liquid crystal display device, etc. driven by ac in the same way as for the thin-film EL display device of the above embodiment.

Claims: A driving method for driving a display device formed by interposing a dielectric layer between a plurality of scanning side electrodes and a plurality of data side electrodes, whose intersections form a plurality of pixels; in which method a positive writing voltage (+V P ), in a positive writing period, and a negative writing voltage (-V N ), in a negative writing period are applied alternatingly to each of the scanning side electrodes, said positive and negative writing periods having the same predetermined temporal lengths; and a modulation voltage (V M ) of a first variable temporal length, which temporal length determines the brightness level value of the pixel onto which said modulation voltage acts together with said writing voltage, is applied to each of the data side electrodes during said positive writing period, and a modulation voltage (V M ) of the same value, but having a second length corresponding to the difference between said predetermined temporal length and the actual first variable temporal length is applied to the respective data side electrodes during the corresponding negative writing period; characterized in that said first variable temporal length is determined according to a binary value determining said brightness level value, and said second variable temporal length is determined according to the complement value of said binary value. A driving method according to claim 1, characterized in that the positive writing voltage is applied to all scanning side electrodes in one field, and the negative writing voltage is applied to all scanning side electrodes in the subsequent field. A method according to claim 1, characterized in that in a first field the positive writing voltage is applied to the odd numbered scanning side electrodes, and the negative writing voltage is supplied to the even numbered scanning side electrodes, and that the polarities are inverted with each subsequent field. A driving device for driving a display device formed by interposing a dielectric layer between a plurality of scanning side electrodes and a plurality of data side electrodes, whose intersections form a plurality of pixels; comprising a scanning side electrode driving circuit (7) for applying-alternatingly a positive writing voltage (+V P ), in a positive writing period, and a negative writing voltage (-V N ), in a negative writing period, to each of the scanning side electrodes, said positive and negative writing periods having the same predetermined temporal lengths; and a data side electrode driving circuit (8) for applying a modulation voltage (V M ) of a first variable temporal length, which temporal length determines the brightness level value of the pixel onto which said modulation voltage acts together with said writing voltage, to each of the data side electrodes during said positive writing period, and for applying a modulation voltage (V M ) of the same value, but having a second length corresponding to the difference between said predetermined temporal length and the actual first variable temporal length, to the respective data side electrodes during the corresponding negative writing period; characterized in that said data side electrode driving circuit comprises a means (20) for outputting the brightness level value for each pixel as a binary data value; a modifying means (18) receiving said binary value, for outputting said binary value as it is during a first writing period, and for forming its complement in the subsequent writing period; and a means (14 - 17) for outputting the modulation voltage during a period of time corresponding to the binary value outputted by said modifying means.

Inventors: KISHISHITA HIROSHI, KOKUHATA YOSHIYUKI, OHBA TOSHIHIRO, SAKAMOTO ATSUSHI, UEDE HISASHI, KISHISHITA, HIROSHI, KOKUHATA, YOSHIYUKI, OHBA, TOSHIHIRO, SAKAMOTO, ATSUSHI, UEDE, HISASHI
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1989
Main classification: G09G3
IPC codes: G09G3, H04N3, H05B33