PROCESS FOR MAKING METALLIZED HOLES IN A DIELECTRIC SUBSTRATE BY VACUUM DEPOSITION OF METALS AND THE PRODUCT OBTAINED THEREBY

Abstract: A process is described for making metallized holes in a dielectric substrate (1) which, after galvanic growth of the conductive paths (6, 7) delimited by photoresist (5) on the substrate (1), calls for a drilling phase of the substrate (1) and electrogalvanic creation of rivets (11) protruding beyond the edges of the holes (9) on the front of the substrate (1). Then follow the phases of completion of the conductive and resistive paths (13, 14; 15, 16) on the front, deposition of metals (17) on the back, reinforcement of the rivets (11) and galvanic growth of the back and of the metals (17) deposited inside the holes (9).

Description: The present invention relates to a process for making conducting connections in dielectric substrates by vacuum deposition of metals on the surface of and inside the through holes and the product obtained thereby, especially for application in hybrid integrated thin film circuits. To make low-resistance electrical connections between the two sides of a dielectric substrate of a hybrid microelectronic thin film circuit there is the known general technique of using as connection paths holes made at certain points of the substrate and coating the vertical walls of the holes with layers of metal connected to the circuit elements on the two sides of the substrate. In this manner connection is assured in an integrated and economical manner. The length of the connection between the two sides is reduced to the minimum so that the components welded on one side of the substrate, hereinafter called the front, are connected to the other side, hereinafter called the back, by the shortest possible path. The technique of conductive coating of the side walls of the holes is certainly simpler and more economical to perform industrially than the conventional technique which calls for making each individual connection with wires or metal strips inserted in the holes and welded to the two sides of the substrate. But the main problem is to establish how and in what phase of the hybrid thin film circuit production process to perform the operations creating the metallized holes. The most obvious and widely used method is to drill the substrate at the beginning of processing, i.e. when no metal deposits of any kind are present on the substrate. In this manner the metal layers deposited subsequently on both sides of the substrate also cover the walls of the holes already made. The main drawbacks of this method are the following. Once the substrates are drilled they can be used only for a specific type of circuit, i.e. requiring holes in those positions. Some equipment used in the fabrication of the hybrid thin film circuits uses the technique of suction and creation of vacuum to hold the substrates fixed to the supports, especially in the initial more delicate phases of galvanic growth of the conductive paths on the substrate. Said technique is not usable if the substrates are studded with holes. In photolithographic operations it is obligatory to use the holes as datum points for aligning masks with the substrate, giving rise to problems related to the mechanical precision with which the holes are located and the much higher optical precision of photolithography. One way of avoiding said drawbacks is for example the one set forth in Italian patent application filed 19 March 1986 under number 19803-A/86 (corresponding to EP-A-0238118) in which is claimed a process for making metallized holes in a substrate with conductive and resistive paths characterized in that it comprises in succession the following phases: drilling of a flat substrate with conductive and resistive paths; repeated washing, first coarse and then fine, of the drilled substrate to remove drilling debris and preparation of the circuit for the following treatment; drying of the circuit; deposition of a substance capable of aiding adhesion over the entire surface of the two faces of the metallized substrate; another drying of the circuit; chemical deposition of a thin layer of copper over the entire surface of the two faces of the substrate; another drying of the circuit; masking of the two faces of the substrate excepting the holes and the immediately adjacent areas; galvanic growth of copper in the areas not masked; removal of masking; chemical removal of the copper from the previously masked areas of the substrate. The main drawback of this process is that it requires numerous processing steps of chemical and electrogalvanic deposition to metallize the walls of the holes. Furthermore adherence of the metallization inside the hole is not optimal. Another known process is the one described in the article by R. J. Thompson, B. W. Whitaker "Conductive via processing utilizing RF sputtering and selective electro deposition for hybrid thin film circuits", Proceedings 1982 of the 32nd Electronic Components Conference, San Diego, California. According to said process the metal layers are deposited only on the front of the substrate and drilling is performed when the operations necessary for obtaining the thin film hybrid circuit have been completed only for this side. Conductive connection through the holes is secured during deposition of the metal layers on the back of the substrate. But thicker layers than those normally needed must be deposited. Furthermore the hole walls must be perfectly vertical and lastly special procedures must be used in the deposition system to assure that the metals deposited from the back reach during deposition the metallizations of the front which face the edge of the hole. It is inconceivable to deposit metal layers on the front also because the existing circuit would have to be protected in some way. Therefore the object of the present invention is to overcome the above drawbacks, especially those inherent in the process described in the above article, and indicate a process for making conducting connections in dielectric substrates by the vacuum deposition of metals on the surface and inside the through holes, the principal feature of which is the creation of conductive rivets protruding beyond the edge of the holes on the front of the substrate. The specific object of the present invention is a process for the making of metallized holes in a dielectric substrate as described in claim 1. Said rivets assure that the metal layers deposited on the back and inside the holes reach the front with ease, are welded with said rivets and thus assure electrical connection between the two sides of the holes even when the walls and edges of the holes are not perfect. The fundamental presence of the protruding rivets avoids the necessity of making thick metal vacuum deposits and using equipment with sophisticated movements to make the connections with the conducting paths on the front. The drilling phase follows the initial phase of deposition of uniform metal layers and galvanic growth of the conducting paths on the front of the substrate. This is an advantage for the following motives. The substrate can be used for different types of circuits. Furthermore the galvanic growth phase is the most delicate and determines the accuracy of transfer of the image in the photolithography phase and its spatial location on the substrate. As this phase is performed without holes, the above mentioned drawbacks are avoided as regards the difficulty of using suction and vacuum creation techniques to hold the substrates on the supports and it is possible to secure greater precision of the relative positions of the holes and the conductive paths on the circuit since alignment of the mask on the substrate is no longer affected by the holes. Other objects and advantages of the present invention will become clear from the following detailed description given purely as an explanatory nonlimiting example of the process which is the object of the invention and the main phases of which are illustrated in FIGS. 1 to 8 of the annexed drawings described below. With reference to FIG. 1 a flat substrate 1 of, for example, alumina or other material used typically as the substrate in thin film microelectronic technology, is covered on the front with a single or double layer of resistive metal 2, e.g. tantalium or compounds thereof with nitrogen and oxygen, followed by a metal adhesion layer 3, e.g. of titanium, and by a conductive layer 4, e.g. of palladium. Said layers are deposited in a vacuum chamber by one of the processes of the art known by the acronym PVD (Physical Vapor Deposition), e.g. the process described in U.S. Patent no. 4226932 granted 7 October 1980. On the back of the substrate no deposition is made. There is thus obtained a product which can be stored as a semifinished product. The semifinished product is then taken from storage and sent to further processing, e.g. to secure a thin film hybrid circuit having certain conductive and/or resistive paths in accordance with the known art. With reference to FIG. 2 the conductive layer 4 is first covered with a lacquer 5 photosensitive to ultraviolet radiation hereinafter called photoresist. It is then exposed with a mask, not shown in the figure, which reproduces the paths it is wished to create, developed and grown electrogalvanically with a conducting metal 6, e.g. gold, in the zones where the photoresist was removed during development. Either negative or positive photoresist may be used. The growth of conducting metal, indicated by the number 7 in the figure, is also performed as a datum point allowing perfect centering of the holes it is intended to make in the circuit. With reference to FIG. 3, after the growth phase the photoresist 5 is removed chemically or in plasma and the front is covered with a protective lacquer 8 and then drilled (e.g. by ultrasonic drill, laser, diamond-tipped milling cutter), securing through holes such as those indicated by reference number 9. The cross section of the holes may be of any form, e.g. round or elliptical. The protective lacquer 8 prevents deposition of processing residue and damage to the metals, especially those in the zones surrounding the hole edges, during drilling, which must be very accurate and precise. The protective lacquer 8 is then removed chemically and the product thus obtained is ready for the subsequent operations which will provide conductive metallization passing through the holes and recesses in accordance with the process described below which is the object of the present invention. With reference to FIG. 4 a cover is made with negative photoresist 10 which is then exposed with an appropriate mask, not shown in the figure, in such a manner that after development there remain rings of the metal 6 deposited on the front and coinciding with the holes. The letter D indicates the diameter of a ring made in the photoresist 10. The need to use a negative photoresist is dictated by the assurance that this type of photoresist can be completely removed from the inside of the hole by using the appropriate mask for exposure so that the ring is completely free from residual photoresist. In the next phase metal is grown galvanically in the zone unprotected by the photoresist 10, being careful to superimpose it on the metal 6 already deposited. A metal rivet 11 is thus generated as shown in FIG. 5 which protrudes toward the interior of the hole 9 because there is no photoresist to restrict its growth. Consequently the diameter of the hole is slightly reduced (by a few micron), where it coincides with the rivet, to approximately double the thickness of the grown metal. This protruding rivet assures securing reliably through the hole conductive connection with the back of the substrate. The negative photoresist 10 is then removed chemically and the conductive and resistive paths of the front are completed in accordance with the known art, e.g. described in Italian patent application no. 21126-A/86 filed 15 July 1986 (corresponding to EP-A-0256568) in which there is claimed a process for creating passive thin film circuits with resistive lines with different resistive layers formed by superimposing an upper layer with less resistivity on a lower layer with higher resistivity characterized in that it uses for the lower layer tantalium treated with a first dopant and for the upper layer titanium treated with a second dopant. In this manner there is secured the result shown schematically in FIG. 5 in which are shown a resistor 12 with its contacts 13, a conductive line 14 which connects the rivet 11. The substrate is brought back to the vacuum chamber and, as shown in FIG. 6, there are deposited on the back, using the PVD technique, an adhesion layer 15, e.g. of titanium, and a conduction layer 16, e.g. of palladium. Said layers also spread over the side walls of the hole until they meet at P the protrusion of the rivet 11 to form a reliable conductive contact on the front. The fundamental presence of the protruding rivet obviates the vacuum deposition of thick metal and the use of equipment with sophisticated movements to form the connections with the conductive paths of the front. The substrate is then removed from the vacuum chamber and the phase described in connection with FIG. 4 is repeated, i.e. deposition of negative photoresist, exposure with the same mask as in FIG. 4, development and galvanic growth of metal. As shown in FIG. 7, in this case the metal 17 also grows over the entire back side and inside the hole, these being conductive surfaces covered by the conduction layer 16, thus completing the ground plane on the back of the hybrid thin film circuit and providing a reliable conductive connection through the hole or recess in addition to perfect adherence of the metallization to the walls of the hole. Then removing the negative photoresist 10 there is secured the finished circuit or product as shown in FIG. 8 where the reference numbers indicate the same components as described above. If the circuit also calls for unmetallized holes they can be provided at the end of processing by a standard drilling and cutting process in accordance with the known art. It is clear that numerous variants of the process described are possible. For example in the phase described with reference to FIG. 7 it would be possible to deposit on the back negative photoresist and expose it with an appropriate mask in such a manner as to obtain a conductive path or particular integrated conductive forms on the back of the substrate. Variants are also possible in the type of conducting metal used to grow the layer 16 (FIG. 7), e.g. copper or silver. For the layer 17 (FIG. 7), combinations of copper, nickel or gold layers could be used.

Claims: Process for forming metallized holes in a dielectric substrate having conductive and/or resistive paths on one side, hereinafter referred to as the front, the other side being referred to hereinafter as the back, the process comprising basically the following steps in succession: (a) electrogalvanic growth of the conductive paths (6, 7) delimited by a first photosensitive lacquer (5) on said front, (b) drilling of the substrate (1) and forming of holes (9), (c) covering of the front with a second negative photosensitive lacquer (10) and development with a mask such as to form uncovered rings of said conductive paths (6) coinciding with the holes (9), (d) electrogalvanic growth of metal on the front and forming of metal rivets (11) protruding inside the holes (9) as extensions of said conductive paths (6), (e) removal of said second photosensitive lacquer (10) and completing of conductive paths (13, 14) and/or resistive paths (12), (f) deposition on the back of metals (15, 16) which also spread over the side walls of said holes (9) until they join electrically with the protrusions of said metal rivets (11), (g) covering of the front with a further layer of said second photosensitive lacquer (10) and development with said mask, and (h) electrogalvanic growth of metal (17) on the back, the side walls of the holes and the front in the zones not covered by said second photosensitive lacquer. Process in accordance with claim 1 characterized in that between said phases (a) and (b) said first photosensitive lacquer (5) is removed and said front is covered with a protective lacquer (8) which is then removed after said drilling phase (b). Process in accordance with claim 1 characterized in that in said phase (f) said deposition on the back is done in a vacuum and said metals constitute a first adhesion layer (15) followed by a first conduction layer (16). Process in accordance with claim 1 characterized in that after said phase (h) said second photosensitive lacquer (10) is removed. Process in accordance with claim 1 characterized in that said phase (a) is preceded by a vacuum deposition phase on said front of the substrate of metals which form a first resistive layer (2) followed by a second adhesion layer (3) and by a second conduction layer (4). Process in accordance with claim 5 characterized in that said first resistive layer (2) is formed of tantalium or its compounds with nitrogen and oxygen. Process in accordance with claims 3 or 5 characterized in that said first (15) and second (3) adhesion layers consist of titanium. Process in accordance with claims 3 or 5 characterized in that said first (16) and second (4) conduction layers consist of palladium. Process in accordance with claim 5 characterized in that said first resistive layer (2) is single or double. Process in accordance with claim 1 characterized in that said first photoresistive lacquer (5) is positive. Process in accordance with claim 1 characterized in that said first photosensitive lacquer (5) is negative. Process in accordance with claim 1 characterized in that said dielectric substrate (1) is alumina. Product obtained by the process set forth in the above claims, the product consisting of a hybrid circuit with conductive and resistive paths (12, 13, 14) on a substrate (1) having holes (9) around which there are metal rivets (11) protruding inside the holes on the front, the substrate being further provided with successive layers of covering metallization (15, 16) of the back and side walls of the holes so as to meet the protrusions of the rivets and conductive connections (17) between the back and front which extend between said rivets and said covering metallization.

Inventors: CAGNIN, TARCISIO, FERRARIS, GIAMPIERO
Applicants: SIEMENS TELECOMUNICAZIONI S.P.A.
Application year: 1989
Main classification: H05K3
IPC codes: H05K3, H05K1