AVALANCHE PHOTODIODE

Abstract: Disclosed is a semiconductor material avalanche photodiode of a separate multiplication and absorption region heterostructure design (SAM-APD). The improved SAM-APD of this invention has a plurality of floating guard rings (54), (56) and (58) which are separate about a central region (50) and doped in the opposite high concentration from that of the multiplication region (46a) in which they are positioned. These rings float in the sense that they have no contact with the metalized p-contact (52) of the photodiode and no direct contact with the current source. This structure results in an enhanced avalanche effect in the central region with limited undesirable edge breakdown.

Description: -i- AVAIANCHE PHOTODIODE Field of the Invention This invention relates to avalanche photodiodes, and more particularly, to improved heterostructure avalanche photodiodes having separate absorption and multiplication regions for application to long wavelength optical communication. Background of the Invention Fiber optics has gained prominence in telecommunications, instrumentation, cable T.V., network, and data transmission and distribution. Major application of fiber optics has been in the area of telecommunications. Over the last decade there has been a significant change-over from wires and co-axial cables to optical fibers for telecommunication systems and information services. This anticipated change is dictated by the benefits of improved technology as well as economics. Increasing cost and demand for high data rate or large bandwidth per transmission channels and the lack of available space in already congested conduits in every metropolitan area are a key reason in the change over from the wires to fiber optics. Additionally, fiber optical devices interface well with digital data processing equipment, and their technology is compatible with modern microelectronic technology. A key component of the modern optical fiber system is the photodetector. The function of the detector in a fiber optic communication link is to convert optical power into electrical response. The most common detector used in fiber applications is the photodiode, which acts as a converter of optica power to electrical current. The type of semiconductor photodiode commonly used for fiber optics application has a reverse bias p-n junction. —"-> ?i.- -~~'~~"~~ ' STF 1 h .„ "» -_- ** • 5 il. 4_.__--LI The two most commonly used photodetectors heretofore ar the p-i-n photodiode (p/intrinsic/n type conductivity) an the avalanche photodiode (APD) . Both types of photodiode are instantaneous photon-to-electron converters where ab sorbed photons generate hole-electron pairs to produce a electric current. The p-i-n (or pin) and avalanche photo diodes are actually modified p-n junction devices with addi tional layers at differing doping levels to produce eithe more efficient quantum conversion or avalanche gain throug ionization. Basically, a photon is absorbed in a relativel high E (electric) field region, where an electron-hole pai is created. This will produce current in the detector cir cuit. To obtain high quantum efficiency, the pin photodiod provides absorption in a relatively highly resistive centra intrinsic region. An alternative approach to the pin photodiode is one i which higher detector currents are created as a result of th avalanche gain effect, as in the case of the avalanche photo diode (APD) . In this case, a single electron-hole-pair ma generate hundreds of secondary electron-hole-pairs. Becaus these events occur at random and are of a statistical nature the noise generated in these devices can be a limiting facto on detectivity. In designing a solid state photodiode, ther is a trade off between quantum efficiency and the speed o response. For high quantum efficiency, the width of th intrinsic region of a pin device, for example, should b comparable to two or three times the absorption length o light in the material being used. For high speed response the device should be as thin as possible to minimize carrie transmit times. Silicon detectors operating at wavelength below 0.9 micrometers are capable of both high quantum ef ficiency (in excess of 50%) and fast response (less than 0. nanoseconds (ns) ) . At longer wavelengths, however, th absorption length in silicon rapidly increases, and othe materials must be used in the manufacture of a photodiode. Recently, a most successful device capable of achievin high sensitivity at a longer wavelength (between 0.9-1.6 micrometers) has been an APD having separate absorption an multiplication regions, known as a SAM-APD (separate absorp tion and multiplication-avalanche photodiode) . This devic was first successfully demonstrated using InGaAs/InP (indiuπt galium-arsenide/indium phosphide) heterostructures sensitiv to wavelengths as long as 1.65 micrometers in a mesa geometr in 1981. Unfortunately, mesa APDs have proven to be unreliable for use in practical systems applications, and it has become necessary to investigate the possible planar geometry struc¬ tures which might be compatible with the requirements of the SAM-APD device. The basic design concept of the SAM-APD is that the electric field in the wide band gap InP multiplica¬ tion region be large enough to induce carrier multiplication (and therefore photo current gain) while the field in the InGaAs absorbing region be low enough so that no tunnelling leakage currents are induced. These limits place stringent requirements on the epitaxial material layer thickness and dopings, particularly for the InP layer. In fact, the toler- ances for these parameters are so tight that normal planar geometries containing guard rings at the edges of the P-N junction which act to eliminate catastrophic edge breakdown effects are difficult to employ. Examples of such planar geometry attempts at producing heterojunction avalanche photodiodes include U.S. Patent 4,651,187 (dated March 17, 1987 to Sugimoto) and U.S. Patent 4,684,969 (dated August 4, 1987 to Taguchi) . Successful planar structures have been demonstrated which avoid the guard ring problem by utilizing a highly complex regrowth structure. One such example may be found in U.S. Patent 4,656,494 to Kobayashi (April 7, 1987). Kobay¬ ashi discloses a buried structure avalanche multiplication photodiode having a surface level between the multiplication region and the guard ring region. Essentially, the structure disclosed in Kobayashi consists of absorption layers followed by the multiplication region. Next, annular areas which will eventually contain the guard rings are etched away leaving a groove, such as mesa 31 of Figure 6(a) of Kobayashi whic penetrates deep into the absorbing region. A low concentra tion and conductivity type layer 4 is selectively grown o the surface of the removed portion of the n-InP layer 3 shown in Figure 5(e). The resulting structure has a fla parallel surface to the absorbing layer 2. This structure i complex to fabricate and may result in ' a potentially highl defected regrowth interface in the highest electric fiel regions of the device. Large leakage currents may resul from such a structure except when material growth and fabri cation conditions are held under the tightest possible con trol. Such devices are currently available in limited quan tities and at a high price. Another example of an avalanche photodiode which seek to improve performance by preventing edge breakdown and th multiplication of the surface leakage currents in the junc tion periphery is U.S. Patent 4,700,209 issued to Webb (Oc tober 13, 1987). The Webb patent introduces a central zon 32a which has n-type conductivity and contains an exces areal concentration of conductivity modifiers above t background concentration. The central zone 32a is always lesser extent than the cap region 36. The central zone spaced apart from the absorption and cap regions where acti multiplication occurs. By enhancing the activity within the central multiplic tion region of the avalanche photodiode, while preventi edge breakdown, an optical fiber system may be design having large repeater spacing for large capacity data tran mission. This factor alone would bring a substantial syst cost reduction. When future systems with improved avalanc photodiodes can be built operating in the region of 1.2 1.6 micrometers, a marked increase in repeater spacing expected. Also a total fiber loss of 0.2 dB/km is achieve Such results indicate that long wavelength APD detectors wi allow a fiber optic system to achieve a repeater spaci greater than 60 km at 1 gigabit per second using a sing mode fiber. Repeater spacing greater than 200 km may achieved where the laser operates at 1.55 micrometers. Therefore it is an object of this invention to provide a SAM-APD having high sensitivity and high reliability, but which is also easy to fabricate so that the final structure has low leakage currents with little tunneling or edge break¬ down effects. Summary of the Invention Disclosed herein is an avalanche photodiode, which comprises a substrate composed of a semiconductor material; a buffer region composed of the same first semiconductor mater¬ ial, the buffer being formed over the substrate. A ternary light-absorbing region is then formed over the buffer and is composed of a second semiconductor material which is doped with an impurity of a first conductivity type formed over the buffer region. A multiplication region is then formed over the absorbing region in the preferred embodiment and is composed of the first semiconductor material, doped with an impurity of the first conductivity type. The multiplication region forms a heterojunction with the light absorbing region and has its upper portion doped with a low concentra¬ tion of an impurity of the first conductivity type. The avalanche photodiode of this invention has a central region composed of the first semiconductor material, which is doped to a high concentration with an impurity of a second conductivity type. The central region is implanted or dif¬ fused onto the multiplication region. At least one floating ring region, composed of the first semiconductor material, is doped to the same high concentration as the central region with an impurity of the same second conducting type. The term "floating ring" as used in this application, refers to a doped region which has no physical contact or connection with an external current or voltage biasing source. The floating ring region is concentrically circling the central region at the top surface of the photodiode. This ring region has no direct contact to a source of electrical potential. In this manner, the floating ring region acts as a guard ring to prevent breakdown at the junction edge of the photodiode, thereby enhancing the gain and efficiency of the photodiod in the central region and away from the edges of the photo diode. The floating ring region may comprise a plurality o rings each of which encircles one another in the centra region. In addition to the floating ring region structure, th gain in efficiency of the photodiode may be enhanced by us of a thin slab region composed of the same first semiconduc tor material which is doped to a high concentration with a impurity of a second conductivity type. This slab region i juxtaposed between the central region and the multiplicatio region. Use of such a thin slab enhances the avalanch multiplication effect in the central region while reducin edge breakdown substantially. The improved SAM-APD of this invention may alternativel include a speed-up region which is positioned between th multiplication region and the absorption region and compose of a third semiconductor material. This speed-up region i comprised of a material whose bandgap is midway between tha of the first and second materials. The speed-up regio enhances device response at high frequency by facilitatin the flow of the carriers to the multiplication region. I order to operate efficiently, the avalanche photodiode o this invention should have at least two protective layer covering the top surface of the photodiode and surroundin the central region. A method of manufacturing the avalanche photodiode o this invention comprises the steps of epitaxially depositin the buffer region over the substrate. Both the buffer an substrate are of a first semiconductor material. A ternar absorption region of a second semiconductor material i epitaxially deposited over the buffer region and doped wit an impurity of the first conductivity type. A multiplicatio region may t hen be deposited on the absorption region. Th multiplication region is of a first semiconductor materia and doped with an impurity of the first conductivity type except at its upper surface where the multiplication region is doped with a low concentration of an impurity of the first conductivity type. A first diffusion barrier film (such as silicon nitride or silicon dioxide) is then deposited over the multiplication region defining by photolithography a diffusion window using photo-resist. The multiplication region is then doped and diffused in its upper surface with an impurity of a second conductivity type in a central region of the upper surface of the multiplication region. A plurality of concentric rings are then diffused and doped in the upper surface of the multiplication region surrounding the central region. These rings are composed of the same material and conductivity type as the central region. Alternatively, the rings can be diffused concurrently with the central region diffusion. After the rings are deposited in circling the central region, a second film over the first barrier film is deposited with the purpose of protecting the upper surface of the multi¬ plication region. A metal alloy is then thermally deposited as a conduc¬ tivity contact for the central region, a second film over the first barrier film is deposited with the purpose of protect¬ ing the upper surface of the multiplication region. A metal alloy is then thermally deposited as a conduc- tivity contact for the central region. The contact is not directly connected to the concentric rings; therefore, the concentric rings are allowed to float with respect to the central region potential. In this manner an avalanche photo¬ diode is completed which has reduced edge junction breakdown, which enhances the noise performance of the photodiode. The disclosed method of manufacturing may also include the step of epitaxially depositing a speed-up region of a third semi-conductive type of intermediate bandgap over the absorption region before the multiplication region is depos- ited. Additionally a thin slab region may be ion implanted or grown into the avalanche photodiode. This thin slab region is composed of the first semiconductor material doped to high concentration with an impurity of a second conductivit type, and sits between the sensor region and the multiplica tion region. In this manner additional enhancement of th gain in the central region may be achieved by the photodiode In summary, the avalanche photodiode of this inventio has a plurality of functional regions each layered one o another over a substrate. The uppermost layer is a multi plication region and made from a first semiconductive ater ial doped with an impurity of a first conductivity type. central region is doped with an impurity of a second con ductivity type. The central region is then surrounded by a least one guard ring of the same material and conductivit type as the central region. The guard ring does not contac any source of electric current. In this manner the photo diode has an avalanche effect that is substantially confine to the central region. Any breakdown occurring at the edg or periphery of the avalanche photodiode is substantiall reduced. In addition to the floating rings, a thin slab region o the first semiconductor material, which is doped with a hig concentration of impurity of the first conductivity type, i then ion implanted below the central region. In this manne the avalanche effect is further enhanced in the centra region. Brief Description of the Drawings Figure 1 is a cross-sectional view of a prior art e bodiment of an avalanche photodiode, having a mesa structu topped off by regrowth planar geometry. Figure 2 is a cross-sectional view of a preferred e bodiment of the avalanche photodiode of this inventio showing the heterostructure of the device having a plurali of planar layers grown one on top of another with guard rin used to enhance the avalanche effect at the heterojuncti between the central region 50 and the multiplication regi 46a. As an alternative embodiment. Figure 2 also shows t use of a thin slab 48 to enhance the avalanche effect in the central region 50. Figure 3 shows a top view of the configuration of the concentric guard rings which encircle the central region of the photodiode of this invention, taken along line III-III of Figure 2. Figure 4 shows the first step of epitaxial growth of the various layers of the heterostructure of the avalanche photo¬ diode of this invention, as the diode is being manufactured. Figure 5 shows a cross-sectional view of the second phase of manufacture wherein p-n junction formation and a protective coating is placed at the upper surface of the photodiode. Figure 6 shows further building and structure wherein the second protective coating 62 covers the upper surface after ion implantation of the central region 50 and the rings 54, 56, and 58 has occurred. Figure 7 is a prior art equipotential profile of a standard unguarded pin photodetector. Figure 8 is a prior art electric field distribution in the y-axis direction of the standard unguarded pin photode¬ tector of Figure 7. Figure 9 shows an equipotential profile of an avalanche photodiode having a single floating guard ring. Figure 10 shows the electric field potential of the avalanche photodiode shown in cross-section in Figure 9, where the photodiode has a single floating guard ring. Figure 11 shows an equipotential profile of the use of a slab region in the avalanche photodiode. Figure 12 shows an electric field profile in the y-axis direction of a slab avalanche photodiode, without the use of floating guard rings. Figure 13 shows current and voltage characteristics of the pin diode and the floating guard ring avalanche photo- diode. Figure 14 shows the effect of the guard ring " on the photocurrent voltage characteristics of the floating guard -lu¬ ring avalanche photodiode of this invention. Figure 15 shows a graphic representation of the equi potential distribution for a combined floating guard ring an slab region embodiment. Figure 16 shows a graphic representation of the electri field profiles for the combined floating guard ring and sla region embodiment shown in Figure 15. Detailed Description of the Preferred Embodiment Figure 1 shows a planar structure demonstrated in th prior art which avoids the use of standard large guard ring to prevent edge breakdown by using a highly complex regrowt structure for the photodiode 10, shown generally. Thi complex planar structure in the prior art consists of substrate such as InP (indium phosphide) having a high con centration of impurities which doped the substrate preferabl to make it an n+ type conductivity. Coating the underside o the substrate is a metalized n-contact 12. Above the sub strate 14 is the usual growth of n-InGaAs (indium galiu arsenide) layer 18, which is seated above a buffer region 1 of an indium phosphide material. The absorbing region 18 ma be coated with the speed-up region 22 made from indium galiu arsenide phosphide (InGaAsP) . The speed-up region helps t sweep away electrons from the absorption region 2 A the 24B but is not required for low frequency operation of the photo diode 10 of Figure 1. It will be noted that a mesa-like configuration i etched away from either side of the regions 24A and 24B. T annular area, which is to contain the guard rings 26, i etched away, leaving a groove penetrating nearly into t absorption region 18. The structure is placed back in growth reactor, where n-concentration or n-InP (indium pho phide) is regrown to fill the grooves resulting from the me etching. A two step diffusion of acceptors is conducted form the p-n junction with large radius guard ring lobes xtending into the regrown region. The central region 28 may be made from a p+ conductivi indium phosphide diffusion, w here the periphery section 29, on either side of central region 28 may be doped to a "p" concentration of acceptors. An anti-reflective coating 17 covers the top of the central region 28 where diffusion occurred. This top coating may also comprise an oxide layer deposited for passivation of the component. A p-type annular contact 15 is placed above the central region 28 and its annular lobes 29. While the foregoing planar structure is successfully demonstrated in the prior art, it is extremely complex to fabricate and has a potentially highly defective regrowth interface in the highest electric field regions of the inven¬ tion. This is expected to result in a large leakage current except only where the material growth and fabrication condi- tions are held under the tightest possible controls. Photo¬ diode devices manufactured like this are only available in limited quantities and at a high price. Until the invention disclosed by the applicant, competitive planar structures to that shown in Figure 1 have been unworkable or of critically high tolerance design characteristics which were largely unattainable. Figure 2 shows the new and simplified planar SAM-APD structure of this invention, as photodiode 30 of Figure 2. This structure avoids the necessity for, and problems in- herent in, regrown large radius guard rings to prevent edge breakdown. The structure of this invention has a substrate 38 made from InP (indium phosphide) with impurities and dopant added to make the substrate, a highly concentrated n+ conductivity type region. An n-contact 32 is annularly secured below the substrate 36, while an anti-reflective coating 34 provides a window into which incident light 38 may enter the photodiode. A buffer region 40 (n-type InP) is provided to prevent the migration of carriers from the sub¬ strate into the absorbing region 42. The ternary absorbing region 42 is manufactured from n- conductivity type InGaAs (indium galium arsenide) . Upon the absorption region 42 may be a speed-up region 44 made from a semiconductor InGaAsP (indiu -galium-arsenide phosphide) . Above the speed-up layer 44, or directly abov the ternary absorption region 42, is the main multiplicatio region 46A. The multiplication region 46A is an n-conduc tivity type InP multiplication region doped with a hig concentration of donors. A central region 50 of the photo diode of this invention has a p-type contact 52 seated abov the central region 50. In an alternative embodiment, a slab 48, is made fro highly doped n-f- conductivity indium phosphide. This slab i very thin and embedded at the underside of the central regio 50. In the preferred embodiment, the slab thickness is i the range of 1000-5000 Angstroms (1 A = 10~ 10 m) . The effec of the slab is to cause a rapid increase of the E-field i the central p-n junction, while leaving the curved edges o the junction unaffected. Hence, breakdown voltage in h central region is lowered to a value below that of the curve edge, eliminating edge breakdown. Large radius guard rings known to be used in the prio art to prevent edge breakdown may be eliminated. Instead the rings of this invention comprise one or more guard rings as shown at 54, 56 and 58, respectively. Rings 54, 56 and 5 are floating and manufactured of the same material and dope to the same extent as the central region 50; i.e., hig concentration p type conductivity impurities (p+) . The ring are "floating" since no direct current contact is made t them. It is noted t hat metal p-contact 52 does not directl engage any of the rings 54, 56 or 58, even though the meta contact 52 does contact the central region 50. A first diffusion barrier film 60 covers the uppe surface of the multiplication region 46B to allow p-typ doping of the central region 50 and the rings 54, 56 and 58 It will be noted that the upper portion of the multiplicatio region 46B has doping characteristics distinct from that i 46A. The multiplication region 46A is doped to an n con centration (to a free carrier concentration in the range o 10 15 /cm 3 ) , while the multiplication region 46A is doped to concentration 1 - 8 x 10 16 /cm 3 (n-type conductivity) . The doping and thickness of the multiplication region is adjusted to obtain a peak field of greater than 4.5 x 10 5 volts/cm, while the field at the interface between the multi- plication region 46A and the absorption region 42 (where there is no speed-up region for 44) can exceed the tunneling field value. After the floating guard rings have been dif¬ fused into the upper portion of the multiplication region 46B, a second deposition of a film 62 may be accomplished. Figure 3 shows a top view of the APD 30 of the preferred embodiment of this invention. The metal contact 52 is cen¬ tral to the photodiode 30. The region 50 shows the extent radially of the central region which is immediately below the metal contact 52, but not necessarily in view. The protec- tive layer 62 spreads across the top of the photodiode, divided by each of the rings, as indicated at a radius of 54', 56' and 58', respectively. It will be noted from viewing Figure 3 that the floating rings are equally spaced and concentric with the central region which extends out to the radius 50'. However, the spacing need not be equal whereby rings closer to the center can be spaced more closely together than rings farther out. Figures 4, 5 and 6 show the method, step by step, of fabricating the planar configuration SAM-APD 30 of this invention. Each of the regions, including substrate 38, buffer region 40, absorption region 42, optionally, speed-up region 44, and the lower 46A and upper 46B multiplication region are epitaxially deposited by epitaxial growth techni¬ ques. A first diffusion barrier film 60 is deposited in a plasma enhanced chemical vapor deposition unit. The dif¬ fusion barrier film is typically SiN x , often Si 3 N 4 . This first barrier film deposit is typically 700 to 1500 A thick and has a refractive index in the range of 1.95-2.10. A diffusion window is photolithographically defined, the si 3 N 4 is removed by Freon plasma etching and the resist is stripped using an oxygen plasma. In the preferred embodiment, zinc diffusion is used to form the p-type conductivity regions. The resulting dopant diffusion creates the central region 50 and each of the respective guard rings, 54, 56 and 58. After diffusion of the central region 50 and each of the guard rings 54, 56 and 58, a second Si 3 N " 4 deposition is done. This layer 62 (Figure 6) is used for confining the p+ contact to a small region in the center of the diffusion window immediately above the central region 50 in order to thorough¬ ly passivate the p-n junction. The completed structure containing the p-side contact 52 is shown at Figure 2. The p contact is made by thermally depositing AuZn in alloy form and annealed at 420 X C. Thermal deposition of AuSn layer on the back of the wafer provides an N contact 32 on the under¬ side. The foregoing description of fabrication does no include the speed-up layer 44 shown on Figure 2 and Figure 4. This layer 44 may be fabricated and incorporated as part o the overall APD 30 design. Figures 9-16 show the electric fields and equipotentia plots of fields produced by operational diodes at the surfac and into the depth of the diode, compared and contrasted wit prior art tests shown at Figure 7 and 8. Figure 7 shows a prior art equipotential profile of standard unguarded p-i-n InGaAs photodetector. Multiplica tion upper region 70 and lower region 76 is shown in heterostructure with an absorbing layer 74 of n-conductivit in the form of InGaAs material. The p-n junction is forme by the interface between the central region 78 of p doped In material interfacing with the multiplication region of the p i-n InGaAs photodetector. The graphic representation o Figure 7 shows an extending radius on the x-axis outward fro the center of the photodiode, while the y-axis is directe downward from the top of the diode into the central portion. Measurements of the equipotential profile field are made a central position 71 and perimeter position 72. As can b seen by reviewing Figure 8, the electric field distributio of the standard unguarded p-i-n InGaAs photodetector shows a electric field 71' at the central region which has a lesse strength than the electric field 72' of the periphery of the device. The distance between equipotential lines on Figure 7 is inversely proportional to the electric field along any given direction in the diode interior. Thus, the closer the line spacing, as shown on Figure 7, the higher the electric field. Figure 8 of the prior art design shows the electric field as measured along each of the lines 71 and 72 drawn parallel to the y-axis in Figure 7. It is clear from these Figures 7 and 8 that the unguarded structure has a sig¬ nificantly higher electric field at the junction edge than compared to the center or flat part of the junction. This field concentration is the well-known source of localized or edge breakdown in the p-i-n type structures, and as a result of the small radius of curvature at the p-n junction edge. Due to this effect, unguarded APDs are useless for low noise operation. From Figure 8, it is apparent that the E-field at the junction edge is approximately 1.7 times greater than at the junction center. In contrast to the prior art testing shown in computer simulated format of Figures 7 and 8, a computer calculated equipotential profile (subsequently verified by actual ex¬ perimentation) is shown at Figure 9 for the SAM-APD of this invention with a single floating guard ring 54. Although it is preferred that more than one guard ring be used, calcula¬ tions may be derived and good results obtained from a single floating guard ring 54 as shown in Figure 9. Figure 9 shows that, although the equipotentials are crowded at the outer edges of both a central p-n junction (or active junction) and the floating ring, the degree of this potential concentration is greatly reduced from that of the p-i-n diode. This fact is readily apparent from the field strength plot shown through computer simulation as in Figure 10. Here, the edge field had been reduced to within a factor of 1.3 of the central field. Plots 81', 82', 83' and 84' each correspond to a reading of the field strength shown along the vertical axis selected at 81, 82, 83 and 84 at various locations along the radius axis of the APD of this invention. It is important to note that a sizable reduction in edge field was accomplished using only a single floating ring. Since the preferred device has at least a double floating ring, it will more adequately guard the APD device. Further¬ more, the floating ring structure has a fabrication process almost identical to the p-i-n device since the active p-n junction region and the rings are all formed in a single diffusion step. Unlike other guard ring methods, the total fixed charge in the n-InP gain region located out of the junction is a constant, independent of the lateral position, along the x-axis. Thus, the requirement of multiplication in the absence of tunneling is strictly adhered to, independent of lateral position. In general, this condition is not met in standard, large lobe guard rings used, for example, in the silicon APD technology. The floating rings greatly reduce the electric field at the semiconductor-insulator interface parallel to the x-axis. This will eliminate the possibilit of surface breakdown along the typically "weak" interface, thereby enhancing the reliability and operation of the APD. Although the guard ring is not complete in a single rin structure, a significant reduction in edge fields is com¬ parable to that which is obtained in lobe ring devices. In order to strongly enhance breakdown in the central region 50 over the edge breakdown, one may use a slab-guarde APD. This structure, as shown in Figure 11, consists of standard p-i-n single diffused junction with an additiona thin slab of highly doped n InP adjacent to the centra region 50 of the diffused front. In simulation, the sla thickness is 1000 A, the doping (0.5 x 10 17 /cm 3 ) effect o the slab is to cause a rapid increase of the electric fiel in the central p-region, while leaving the curved edges o the junction unaffected. Hence, the breakdown voltage in th central region is lowered, eliminating edge breakdown. These results are easily seen in Figure 12, where th field in the central junction region 50 is equal to, o slightly higher than the edge fields. The graphic represen tation of the central field 91' corresponds to a measurement taken at verticle line 91 of Figure 11. In Figure 12, line (92') shows a reading of the electric field taken along line 92 of Figure 11. Here, the field at the edge 92' is shown to be equal to, or slightly higher than the edge field 91'. Thus, there is no significant edge breakdown effects in this device. This slab can be fabricated using either ion implan¬ tation, or expitaxial regrowth over a pre-etched central junction region 50. Due to the thinness, this etch and regrowth process should still result in a planar diode. The slab structure is somewhat more difficult to fabricate suc¬ cessfully than the floating ring device. Like the floating ring APD, the slab guarded design conforms to all the re¬ quirements of multiplication in the absence of tunneling which are primary to the operation of SAM-APDs. A most optimal design would be that shown at Figures 15 and 16 which combine the slab and floating ring concept. Where field strength readings are taken along verticle line 111, 112, 113 and 114 of Figure 15, extending from the upper surface of the alternative embodiment APD of this invention to the interior, the overall effect of the combined structure is shown in Figure 16. Field plots 111', 112', 113' and 114' show the results of the combined floating ring and slab design for an APD structure according to alternative embodi- ment of this invention. Figure 13 shows a comparison between the p-i-n conven¬ tional design and the floating guard ring APD heterostructure photodiode of this invention. Curve 101 shows the voltage versus current characteristics of a conventional p-i-n diode, while curves 103, 105 and 107 show results for the APD float¬ ing ring design of the preferred embodiment of this inven¬ tion. For all these devices, the breakdown voltage across the wafer varied from that of the typical p-i-n diodes (101) of about 20 volts to a maximum of 38 volts (107) for a few diodes. Microscopic examination of the APDs indicates that devices with a low breakdown voltage had defects in the ring structure in that the rings where poorly defined or broken. Conversely, the APDs with the highest breakdown voltage had apparently flawless geometries. The nearly double breakdown voltage of the APD of this invention over the conventional p- i-n design is a strong indication of the usefulness of the 5 guard rings for reducing "early" edge breakdown effects which dominate in conventional p-i-n structures. At low voltages, about half the breakdown voltage, the dark currents of the p-i-n and APD are comparable (InA) . There is no step increase in dark current when the depletion ICD region "punches through" the InP layer (46 of Figure 2) into absorption region 42, which is the characteristic of such heterostructure devices. It appears from testing that the junction effectively occurs in the absorption region for some of the devices tested, since if the junction were in the InP 15 multiplication layer 46, breakdown voltages as high as 70 V would be expected. First experimental tests did not indicate a breakdown region right at the p-n junction. In any event, even where breakdown was shown to be near the absorption layer, the inhibiting of edge breakdown effects brought on by 20 the isolated floating guard rings of this invention were significantly shown. Figure 14 shows the effects of the floating rings by illuminating the top surface of the APD near the center contact. A unique current voltage characteristic, with steps 25 in photocurrent at 7 volts and 14 volts is clearly apparent. These step increases in photocurrent are attributed to a increase in the photoresponse as the depletion region reache the first and then the outer ring. Each time the depletio region touches a ring at its inner surface, it immediatel 30 penetrates to the ring outer surface, since the ring i highly p-doped, and hence forms an equipotential surface. The sudden increase in depletion region width at the diod surface increases the light collection area, thereby result ing in a related increase in photocurrent. This is shown o 35 curve 102. Curve 100 shows the same characteristics with th light off, showing dark current normally present in th reverse bias for the photodiode. It is also observed that some photodiodes of the preferred design exhibit highest breakdown voltages with a photocurrent step very near to the breakdown. This might be an indication that a better guard ring may be achieved with a "staggered" structure, where the distance between the rings nearest the central active region is smaller than the dis¬ tance between the outer rings. A preferred embodiment which uses both the slab and floating guard rings has been disclosed for an APD device having a heterostructure. Additional embodiments envision the use of floating guard rings at the upper planar surface of the device alone. At least one guard ring will achieve enhanced central breakdown of an avalanche nature; however, it is recommended that more than one guard ring be used where each ring is equally spaced along an outward extending x axis from the center of the photodiode. While the preferred embodiment shows such an equally spaced guard ring configura¬ tion, alternative embodiments, having rings which are spaced other than equal between each other is intended to be covered by the disclosure of this invention. Therefore, the appended claims are respectfully intended to be interpreted to the full extent allowed by law, including equivalent alternative embodiments.

Claims: WHAT IS CLAIMED IS: 1. An avalanche photodiode, comprising: a substrate composed of a first semiconductor material; a buffer region composed of said first semiconductor material formed over said substrate; a ternary light absorbing region composed of a second semiconductor material and doped with an impurity of a first conductivity type formed over said buffer region; a multiplication region composed of said first se icon- ductor material, doped with an impurity of said first conduc¬ tivity type, having its upper portion doped with a first concentration of an impurity of said first conductivity type; and, forming a heterojunction with said light absorbing region; a central region composed of said first semiconductor material, doped to a second concentration with an impurity of a second conductivity type and implanted onto said multi¬ plication region, said second being greater than said first concentration; at least one floating ring region, composed of said first semiconductor material, doped to the same high con¬ centration as said central region with an impurity of said second type; said floating ring region concentrically encircling said central region at the top surface of said photodiode, said ring region having no direct contact to a source of electri¬ cal potential and being implanted into said multiplication region; whereby, said floating ring region acts as a guard rin preventing breakdown at the junction edge of the photodiode, enhancing the gain and efficiency of said photodiode, in sai central region. 2. The avalanche photodiode of Claim 1, including: a slab region composed of said first semiconducto material, doped to a third concentration with an impurity o a second conductivity type, said third concentration bein greater than said first concentration, said slab region juxtaposed between the central region and the multiplication region; whereby avalanche breakdown in said central region may be enhanced and junction edge breakdown substantially reduced. 3. The avalanche photodiode of claim 1, including a speed¬ up region, juxtaposed between the multiplication region and the absorption region, composed of a third semiconductor material; said speed-up region forming one heterojunction with said multiplication region and another heterojunction with said absorption region; wherein, said speed-up region enhances high frequency response by facilitating the flow of carriers to the multi¬ plication region. 4. The avalanche photodiode of claim 2, including a speed- up region, juxtaposed between the multiplication region and the absorption region, composed of a third semiconductor material; said speed-up region forming one heterojunction with said multiplication region and another heterojunction with said absorption region; wherein, said speed-up region enhances high frequency response by facilitating the flow of carriers to the multi¬ plication region. 5. The avalanche photodiode of Claim 1, including, at least two passivation layers covering the top surface of the photo¬ diode and surrounding said central region. 6. A method of manufacturing an avalanche photodiode, comprising the steps of: epitaxially depositing a buffer region of a first semi¬ conductor material over a substrate; epitaxially depositing a ternary absorption region of second semiconductor material, doped with an impurity of first conductivity type over said buffer region; epitaxially depositing a multiplication region, compose of said first semiconductor material and doped with an im purity of said first conductivity type except at its uppe surface (where said multiplication region is doped with a lo concentration of an impurity of said first conductivit type) , over said ternary absorption region; depositing a first diffusion barrier film over sai multipliation region, defining by photolithography a dif fusion window using a positive resist; diffusing and doping said upper surface of said multi pliation region with an impurity of a second conductivit type in a central region of said upper surface of the multi pliation region; diffusing and doping a plurality of concentric rings o said upper surface surrounding said central region, sai rings composed of the same material and conductivity type a said central region; depositing a second- diffusion barrier film over sai first barrier film, for protecting said upper surface of sai multiplication region and confining said central region t the center of said diffusion window; thermally depositing a metal alloy as a conductivit contact for said central region; said contact not connecte to said concentric rings; whereby said avalanche photodiode is complete which h an edge junction breakdown barrier to enhance the gain said photodiode. 7. The method of manufacturing an avalanche photodiode Claim 6, including the step of: epitaxially depositing a speed-up region of a thi semi-conductive type over said absorption region before sa multiplication region is deposited. 8. The method of manufacturing an avalanche photodiode of Claim 6, including: ion implanting a thin slab region, composed of said first semiconductor material and doped to a high concentra- tion with an impurity of a second conductivity type, between the central region and the multiplication region; whereby, said photodiode as manufactured has enhanced gain in the central region. 9. An avalanche photodiode, comprising: a multiplication region, a ternary light absorption region, a central region and a speed up region, said regions being disposed adjacent one another over a substrate; said multiplication region being made from a first se i- conductive material doped with an impurity of a first conduc¬ tivity type; said speed up region being disposed adjacent said multi¬ plication region and being comprised of a second semi-conduc¬ tor material; said absorption region being composed of a third semi- conductive material doped with an impurity of said first conductivity type; said absorption region being disposed adjacent said speed-up region; said central region being ion implanted in the upper surface of said multiplication region and being doped with an impurity of a second conductivity type, said central region surrounded by at least one guard ring of the same material and conductivity type; said guard ring not contacting a source of electronic current; whereby said photodiode has an avalanche effect confined to the central region. 10. The avalanche photodiode of Claim 9, including: a slab region of said first semiconductor material and doped with a high concentration of impurity of said first conductivity type, and being implanted below said central region; whereby said avalanche effect is enhanced.

Inventors: FORREST STEPHEN R, FORREST, STEPHEN, R.
Applicants: UNIV SOUTHERN CALIFORNIA, THE UNIVERSITY OF SOUTHERN CALIFORNIA
Application year: 1989
Main classification: H01L29
IPC codes: H01L31