Efficient coding method and its decoding method

Abstract: An efficient coding method of coding video signals, speech signals and the like at a lesser amount of bit rate and a decoding method of performing inverse transformation thereof for digital transmission or recording. In accordance with the present invention, in the coding method, a block made up of a plurality of input data for an input signal is used as an encoding unit, a maximum SX and a minimum SN of predictive errors corresponding to differences between the input data of the block and its prediction value are computed, a predetermined value larger than a data (SX - SN) is used as a divisor data OU, modulos E obtained by dividing the respective input data of the block by said divisor data OU are encoded, and additional codes including predictive error information on said data SX, SN and OU as well as encoded codes of said modulos E are both transmitted. In the decoding method, information (the maximum SX and minimum SN of predictive errors) on the predictive error presence range and the divisor data OU as a remainder are obtained directly or indirectly on the basis of the transmitted additional codes. As a result, offsets (integer multiple of the divisor data OU) obtained through divisor in the coding operation can be rightly and uniquely determined in the decoding operation and when the offsets are added to the transmitted modulos E, the input data can be perfectly reproduced. That is, any anomaly errors can be totally eliminated.

Description: BACKGROUND OF THE INVENTION The present invention relates to an efficient coding method of coding video signals, speech signals and the like at a lesser amount of bit rate and a decoding method of performing inverse transformation thereof for digital transmission or recording. There have been so far proposed various types of efficient coding methods. Of the coding methods, a DPCM system has such features that the circuit configuration is relatively simple and the reproduced signal is good in quality, though information compression efficiency is low. Recently, there has been suggested by Ramamoorthy, et al. a speech modulo-PCM (MPCM) system which is a new version of the DPCM system, in the following literatures [1] to [3]. Further, a new type of decoder for the MPCM applications has been presented in the following literature [4] by Hagiwara, et al. Literatures: [1] T. Ericson and V. Ramamoorthy, "Modulo-PCM: A new source coding scheme," in Conf., Int. Conf. Acoust., Speech, Signal Processing, ICASSP'79, Washington, DC, 1979, pp. 419-422. [2] V. Ramamoorthy, "Speech coding using Modulo-PCM with side information," in Conf. Rec., Int. Conf. Acoust., Speech, Signal Processing, ICASSP'81, Atlanta, GA, Mar. 1981, pp. 832-835. [3] V. Ramamoorthy, "A Novel Speech Coder for Medium and High Bit Rate Applications Using Module PCM Principles," IEEE Trans. Acounst., Speech, Signal Processing, Vol. ASSP33, pp. 356-368 Apr. 1985 [4] M. Hagiwara and M. Nakagawa, "A Decoder for Modulo-PCM," in The VIII-th Symposium on Information Theory and Its Applications, Nara, Japan, Dec., 5-7, 1985, pp. 517-522. The MPCM system, which has substantially the same circuit configuration as the DPCM system, is advantageous in that overload noise is not present, though granular noise is present as in the DPCM system. Explanation will be briefly made as to first the MPCM system. The basic arrangement of the MPCM system is shown in Fig. 7, which system comprises an MPCM coder and an MPCM decoder. The MPCM coder includes a modulo operator and a quantizer. In the drawing, reference symbol x k denotes an input signal for the k-th sample. The modulo operator has such a saw-tooth shaped input/output characteristics having an amplitude d as illustrated. An output of the modulo operator is expressed as ((x k )) = x k - d·[[x k ]] where (-d/2) ≦ ((x k )) < (d/2) and ((x k )) denotes a constant satisfying the equation (1). The quantizer receives the output ((x k )) of the modulo operator and quantizes it to an ℓ-bit signal as a transmission signal y k that is then transmitted to the MPCM decoder. In this way, the MPCM coder 'packs' an input speech signal within the amplitude (from -d/2 to d/2) for information compression, as shown by (b) in Fig. 8. This is equivalent, in the PCM system, to the transmission of only lower bits. The MPCM decoder, on the other hand, includes a first-order predictor which performs a calculation in accordance with the following equation (2) and predicts a value at the k-th sampling point from a value at the (k-1)-th sampling point, as shown in Fig. 9. where ρ is a prediction coefficient. The value is quantized according to such a characteristic as shown in Fig. 9 and multiplied by d to obtain an upper bit component d·[[x k ]] which has not been transmitted. The obtained upper bit component is added to the transmission signal y k to reconstruct the input signal of the coder. Explanation will next be made as to anomaly error which is a big problem in the MPCM system. When a difference Δx k = x k - x k-1 between input signals becomes larger in absolute value than d/2, it becomes impossible for the decoder to correctly predict the upper bit component d·[[x k ]]. As a result, many acute points (at which the waveform abruptly vary) appear in the waveform of the decoder output signal x and k as shown by (c) in Fig. 10. This is called anomaly error which is peculiar to the MPCM system. The anomaly error has been a big problem in the MPCM system to be minimized. To this end, Ramamoorthy et al. has proposed two types of methods for suppressing the generation of the anomaly error (refer to the literatures [2] and [3] already stated earlier), which methods 1 and 2 will be explained in detail. Method 1: A decoder is provided within a coder so that, when an anomaly error takes place in the decoder, this is detected and information for correcting the anomaly error is transmitted on another channel as side information. Method 2: Since a large prediction error provides a high frequency of generation of the anomaly error, input data are grouped into blocks each consisting of N samples and the maximum E mN of the absolute values of the prediction errors for each of the blocks is determined to control the modulo amplitude of the modulo operator and the quantizing steps of the quantizer in accordance with the determined maximum E mN . In actual applications, the maximum value E mN is quantized and multiplied by a predetermined coefficient to be used as a modulo amplitude d mN and the d mN is transmitted to the decoder as side information. Next, problems in the two methods will be examined in detail. In the case of the method 1, it is indefinite that an anomaly error occurs in which sample in the coded input data. For this reason, in order to completely remove the anomaly errors, correction information must be transmitted for each of the input samples. This is equivalent to an increase in the number of quantizing bits, which leads to a reduction in the coding efficiency. When the number of quantizing bits by the quantizer is large, the anomaly error generation frequency becomes small. Thus, the bit rate of a channel for transmission of side information can be made lower than in the case where correction information is transmitted for every sample, but it is impossible to fully eliminate the anomaly error. In the case of the method 2, the anomaly error generation frequency can be reduced by optimizing various sorts of parameters. However, since this method is affected by the quantization error of the quantizer and therefore the anomaly error cannot be basically removed, it is impossible to completely eliminate the anomaly error. Furthermore, there has been suggested by Hagiwara et al. a decoder which has a new decision circuit provided therein to correct anomaly errors without transmission of side information. Since this method cannot detect all the anomaly errors, however, it cannot also be fully remove the anomaly errors (refer to the literature [4]). Meanwhile, in the case where the input of the MPCM system is a video signal, the anomaly errors cause the visually remarkable deterioration of picture quality. For this reason, the MPCM system has not been so far intended for video signal applications. SUMMARY OF THE INVENTION It is an object of the present invention to provide a coding method and its decoding method which can solve the above problems in the prior art. According to a first aspect of the present invention there is provided a coding method in which a block made up of a plurality of input data, each of said input data representing an input value of a signal at a sampling point, is used as an encoding unit, said coding method comprising the steps of: generating prediction values for each block, each prediction value being based on at least a previous one of said input data; calculating predictive errors for each block, each error corresponding to a difference between said input value and its prediction value; detecting a maximum value SX and a minimum value SN of said predictive errors in each block; generating a divisor value for each block, said divisor value being larger than SX-SN and less than or equal to 2 M where M is an integer which satisfies a relationship 2 M-1 ≦ SX-SN < 2 M ; calculating modulo values, each corresponding to a remainder obtained by dividing said input value by said divisor value for each block; encoding said modulo values to obtain modulo codes for each block; and outputting for each block said modulo codes and additional codes which are generated on the basis of at least two of said maximum value, said minimum value and said divisor value. According to a second aspect of the present invention there is provided a decoding method for decoding received data coded by a coding method in which a block made up of a plurality of input data, each of said input data representing an input value of a signal at a sampling point, is used as an encoding unit, said coding having been carried out by a method in accordance with the first aspect of the invention; said decoding method comprising the steps of: obtaining modulo values Ei' by de-encoding received modulo codes for each block; obtaining at least two of a maximum value SX, a minimum value SN and a divisor value OU on the basis of received additional codes for each block; generating prediction values Pi' for each input data in each block, each based on at least one of already decoded data; determining integers Ni on the basis of said modulo values and said prediction values respectively and on the basis of at least two of said maximum value, said minimum value and said divisor value for each block, so that each of said integers satisfies a relationship OU˙Ni ≦ SX+Pi'-Ei'< OU˙ (Ni+1); and adding OU˙Ni to said modulo values for each block so as to obtain decoded data. The invention will be described now by way of example only, with particular reference to the accompanying drawings. In the drawings: Fig. 1 is a block diagram showing an arrangement of an efficient coder system used in a first embodiment of the present invention; Fig. 2 shows exemplary data in a block of one-dimensional array; Fig. 3 is a block diagram showing an arrangement of a decoder system used in the first embodiment; Fig. 4 is a block diagram showing the arrangements of an efficient coder and its decoder used in a second embodiment of the present invention; Fig. 5 shows diagrams for explaining the sequence of data to be extracted from a block and a predicting method; Fig. 6 is a graph for explaining how to make small the dynamic range of a predictive error; Fig. 7 is a block diagram showing an arrangement of the related art encoding/decoding MPCM system; Fig. 8 shows examples of operational waveforms of signals appearing (in a normal mode) in the related art MPCM system; Fig. 9 is a quantizing characteristic in a decoder used in the prior art MPCM system; and Fig. 10 shows other examples of operational waveforms of the signals appearing (at the time of generating an anomaly error) in the related art MPCM system. DESCRIPTION OF THE PREFERRED EMBODIMENTS Prior to detailed explanation of embodiments of the present invention, explanation will first be made as to the principle thereof. In the case where a plurality ( k ) of input data (D1, D2, ... and Dk) in the vicinity of a sampling position constitute a block as a coding unit, when the k input data are extracted on one-after-one basis from each of blocks to find differences therebetween, these differences are small due to the signal correlation and the dynamic range (a difference between the maximum and minimum) of these differences is smaller than the dynamic ranges of the input data in most blocks. The difference corresponds to a predictive error when a previous value has been predicted and thus it is hereinafter referred to as the predictive error Si. The present invention is intended to carry out coding more efficient than in the prior art, based on the fact that the dynamic range of the predictive error Si is smaller than the dynamic range of input data in most blocks. Assume that SX, SN and SDR denote the maximum, minimum and dynamic range of the predictive error Si in a block respectively. Then the following equation (1) is satisfied. SDR = SX - SN A divisor OU (corresponding to the modulo amplitude in the MPCM system) is defined as a predetermined value which meets the following relationship (2) and uniquely determined by the dynamic range SDR. OU > SDR Assuming that Ni and Ei denote a quotient and a remainder or modulo which are obtained by dividing an input data Di (i = 1, 2, ... and k) in a block by the divisor OU respectively, the following equation (3) is satisfied. Di = Ei + OU·Ni where O ≦ Ei < OU and Ni represents an integer. Reducing the equation (3), Ei is found to be Ei = Di - OU·Ni From the equation (4), the modulo Ei can also be considered to be a subtraction of the input data Di from an offset OU·Ni. The offset Ou·Ni is defined by Fi as follows, Fi = OU·Ni The dynamic range SDR of predictive errors is smaller than the dynamic range of input data in most blocks. Accordingly, when the divisor data OU is set to be small in the equation (2), the divisor data OU can be smaller than the input data dynamic range in most blocks. As a result, when the input data Di can be reproduced or reconstructed from the modulo data Ei, efficient coding can be realized by coding and transmitting the modulo data Ei in place of the input data Di, which is the coding method of the present invention. Explanation will be made as to how to find the input data Di from the modulo data Ei, that is, how to decode the modulo data Ei into the original input data Di. For the purpose of decoding the modulo data Ei into the input data Di, it is necessary to reproduce the offset value Fi = OU·Ni. Consider that Pi represents an estimate of the input data Di then the following relationship (6) is satisfied. Pi + SN ≦ Di ≦ Pi + SX where SX and SN are the maximum and minimum of the predictive errors as already explained above. Substituting the input data Di expressed by the equation (3) for the term Di in the relationship (6) results in Pi + SN - Ei ≦ OU·Ni ≦ Pi + SX - Ei Since the estimate Pi (i = 2, 3, ...) can be sequentially found from the decoded input data, it is only required that an estimate P1 or F1 (= OU·N1) or N1 be known in addition to the data SX, SN and OU. Because of previous-value prediction, the estimate P1 can be used as a data in the adjacent block which has been already decoded, and its transmission is not necessarily required. Accordingly, when the coder transmits the data SX, SN and OU on predictive error for each block together with the modulo data Ei, the offset Fi = OU·Ni can be uniquely determined in accordance with the relationship (7) and the data Di can be found by adding the determined data Fi to the modulo data Ei, thus completing the decoding operation. Further, when the coder transmits the data attached with any of P1, F1 and N1 for each block, each block in question can be coded and decoded independently of the other blocks and thus can be immune to transmission error, because the input data of other block are not used. The offset Fi can be uniquely determined because a difference between (Pi + SN - Ei) and (Pi + SX - Ei) is smaller than OU from the definition of OU. Thus, the data OU·Ni satisfying the following relationship (8) and the data OU·Ni satisfying the following relationship (9) correspond respectively to the offset Fi. OU·Ni ≧ (Pi + SN - Ei) > OU·(Ni - 1) OU·Ni ≦ (Pi + SN - Ei) < OU·(Ni - 1) In other words, the same offset Fi can be obtained in accordance with any of the relationships (7), (8) and (9). Since the modulo Ei is a remainder after a division of the input data Di by the divisor data OU, the modulo Ei is zero or larger than zero and smaller than the divisor data OU. Hence, the word length of the modulo data Ei is determined by the size of divisor data OU and becomes variable depending on the block unit. The number of bits necessary for representation of the data OU is expressed as log₂OU and thus the smaller the data OU is the smaller the necessary bit number is. Since the word length L of modulo data is an integer, however, even when a value smaller than 2 M satisfying the following relationship (10) is used as the divisor data OU, the word length L will not be changed and thus the coding efficiency will not be improved. 2 M > SDR ≧ 2 M-1 When 2 M is set to be the divisor data OU, however, there can be obtained various advantages that the bit number necessary for representation of the data OU can be made smaller, the circuit (for example, divider) for calculating the offset can be simplified, and so on. These advantages will be explained later more in detail. In the decoder, the data SX, SN and OU are necessary at the time of determining the offset Fi necessary for obtaining the data Di from the modulo data Ei, which has been already explained above. It is also similarly possible to transmit, together with modulo data Ei, the data OU and predetermined values SXX and SNN satisfying the following relationships (11) in place of the data SX, SN and OU, and to determine the offset Fi necessary for decoding with use of these data. SXX ≧ SX SNN ≦ SN SXX + SNN = OU This is because the following relationship (12) can be met. Pi + SNN ≦ Di ≦ Pi + SXX where the left equality sign is satisfied when SNN = SN and the right equality sign is satisfied when SXX = SX. The data SX, SN, SDR, OU, SXX and SNN are information on predictive error and thus will be generally called the predictive error information, hereinafter. In three-data combination SX, SN and OU or SXX, SNN and OU, one data can be determined from the remaining two data. Thus, it is only required to directly or indirectly transmit any two of the three data in the combination as the predictive error information. Further, since the divisor data OU can be uniquely determined from the predictive error dynamic range SDR, the data SDR (= SX - SN) in place of the divisor data OU may be transmitted as one of the predictive error information. Although explanation has been made as to the case where prediction is made for the previous value in the foregoing, higher-level prediction may be employed. According to the foregoing coding method, the predictive error information (SX, SN and OU) and modulo data obtained through coding operation become equal respectively to the predictive error information and modulo data obtained through the subtraction of a constant value corresponding to a multiple of the divisor data OU from all the input data Di in each block. This is because even if the constant value is subtracted from all the input data, the predictive error is the same and if the constant value is an integer multiple of the divisor data OU, the modulo data of the remainder after division thereof by the divisor OU is also the same. For this reason, a decoding method to be explained below is also possible. That is, in the case where all the modulo data Ei (i = 1, 2, ..., and k) in a block and the predictive error information (for example, SX and OU) are present, even when the input of the data F1 (or P1 or N1) as an initial value is not finished, decoding operation can preceed as F1 = 0 and the resultant data (Di - F1) is added to the initial value F1 obtained later to obtain the decoded data Di. Referring to Fig. 1, there is shown a block diagram of an efficient coder used in a first embodiment of the present invention. In the drawing, the coder includes an input terminal for input of a sampled, quantized video signal as an input data, a block divider 102 for dividing the screen of a picture displayed based on the video signal into small blocks and for outputting input data Di (i = 1, 2, ..., and 16) for each of the divided blocks, a delay circuit 103 for timing adjustment for delaying input data corresponding to one block by a predetermined time, a register 104 for holding leading one D1 of data of an output of the delay 103 with respect to each block, a predictor 105 comprising a register receiving an output of the block divider 102 and for outputting as an estimate Pi an input data previous by one, a subtracter 106 for subtracting the estimate Pi from the output of the block divider 102 to obtain predictive errors Si (i = 2, 3, ... and 16), a maximum/minimum detecting circuit 107 for finding a maximum SX and a minimum SN of the predictive errors Si received from the subtracter 106 for each block and for holding the maximum and minimum predictive errors of each block in its internal register and also outputting the maximum and minimum SX and SN, a subtracter 108 for subtracting the minimum SN from the maximum SX and outputting a dynamic range SDR of the predictive errors, a divisor generator 109 for receiving the dynamic range SDR from the subtracter 108 and outputting a divisor data OU, a modulo operator 110 for dividing an input data Di from the delay 103 by the divisor data OU to obtain a modulo data Ei (i = 2, 3, ..., and 16) corresponding a remainder as a result of the division, modulo encoder 111 for encoding the modulo data Ei according to the size of the divisor data OU, an output terminal 112 of the encoder Ci, a divisor data output terminal 113 of the divisor generator 109, an output terminal 114 for the maximum SX of the predictive errors, and an output terminal 115 for the leading data D1 in a block. The operation of the coder of the present embodiment having such an arrangement as mentioned above will be explained in the following. An input data (having an amplitude level of 0-255 and a word length of 8 bits) in the form of a sampled, quantized video signal is applied to the block divider 102 through the terminal 101. The block divider 102, which has a buffer memory provided therein, sequentially writes the input data into the buffer memory and at the same time, reads out the input data Di (i = 1, 2, ..., and 16) therefrom. The input data D1 firstly extracted from each block is held in the register 104 and then sent out from the terminal 115 as one of additional codes. The input data applied to the predictor 105 is converted to the estimate Pi and then supplied from the predictor 105 to the subtracter 106. The subtracter 106 subtracts the received estimate Pi from the input data Di and outputs the predictive error Si. The maximum/minimum detector 107 receives the predictive errors Si from the subtracter 106 and outputs the maximum SX and minimum SN of the received predictive errors Si in the associated block. The subtracter 108 receives the maximum SX and minimum SN from the detector 107, performs a subtraction thereof and outputs the predictive error dynamic range SDR. The dynamic range SDR is sent from the subtracter 108 to the divisor generator 109 and outputs the divisor data OU which satisfies the following relationship (10). OU = 2 M > SDR ≧ 2 M-1 Meanwhile, the input data Di adjusted at the delay 103 with respect to the timing is supplied to the modulo operator 110 which in turn divides the received data Di subjected to the timing adjustment by the divisor data OU and outputs the modulo data Ei (i = 2, 3, ..., and 16) corresponding to a remainder as a result of the division. Since the data OU is 2 M , the modulo data Ei smaller than the data OU can be all expressed with a word length of M bits and without any deterioration. Further, since the modulo data Ei will not exceed the input data Di, the word length of the data OU is 8 or less. The modulo encoder 111 encodes the received modulo data Ei with a bit number J (J = M when M < 9 and J = 8 when M = 9) determined by the size of the divisor data OU to generate a code Ci of variable length subjected to the encoding operation and then outputs the code Ci which is further output from the terminal 112. Because the modulo data Ei are not subjected, in the encoding operation, to any non-linear processings such as truncation of lower bits, the modulo data Ei is not deteriorated by the encoding operation. That is, this encoding operation corresponds to information preserving coding and thus modulo data Ei' obtained by decoding the encoded codes Ci coincides with the original modulo data Ei. The divisor data OU and the predictive error maximum SX as the predictive error information are output from the terminals 113 and 114 respectively as one of additional codes. Shown in Fig. 2 are examples of the input data Di, offset Fi, predictive error Si and modulo data Ei when one block is constituted by 16 picture elements in horizontal direction and one line in vertical direction. 16 input data in this block are the data D1, 112, 105, 113, 121, 136, 160, 175, 201, 207, 208, 199, 193, 176, 169, 178 and 190 and extracted in the sequential order from the data D1. In such a one-dimensional block configuration, it becomes unnecessary to provide a buffer memory in the block divider 102 and it is only required to provide within the predictor 105 a single register for holding input data previous by one therein, which results in that the arrangement of the coder can be simplified. The order of data to be extracted from a block of two-dimensional configuration and how to predict will be described later. Allowable upper and lower limits of the maximums SX in the generated predictive errors are 255 and -255 respectively and similarly allowable upper and lower limits of the minimums SN in the generated predictive errors are 255 and -255 respectively, so that the word length of the maximum and minimum predictive errors SX and SN must be 9 bits. Accordingly, the upper and lower limits of the predictive error dynamic range SDR are 510 and 0 respectively and thus the word length of the dynamic range SDR must be 9 bits. Thus, generally speaking, the divisor data OU also must have a word length of 9 bits. In the present embodiment, however, since the divisor data OU is set to be 2 M satisfying the relationship (10), the divisor data OU can be expressed with a word length of a less number of bits. That is, in place of directly transmitting the divisor data OU, it is only required to transmit a power M in 2 M . The power M can assume one of 0, 1, 2, ..., and 9 and thus the word length of the divisor data OU can be only 4 bits. In other words, the divisor data OU can be transmitted in the form of a 4-bit code M. The divisor data OU is uniquely defined by the predictive error dynamic range SDR so that the divisor generator 109 can comprise a ROM (read only memory) having 9 bit inputs and 4 bit outputs. However, since the divisor data OU is set to be 2 M , the divisor generator 109 may also comprise a simple logical circuit which detects the number of successive 0s in the bits of the data indicative of the dynamic range SDR from its uppermost bit. The modulo operator 110 for obtaining the modulo data Ei corresponding to the remainder after the division of the input data by the divisor data OU may also comprise, in general, a divider or a ROM. In the present embodiment, however, the divisor data OU corresponding to the divisor is set to be 2 M so that the modulo operator 110 can be realized with a simple logical circuit which extracts only lower J bits (J = M when M < 9 and J = 8 when M = 9) from the bits of the input data Di and sets the other bits at zero to generate the remainder or modulo Ei after the division by the data OU. The modulo encoder 111, which encodes modulo data Ei in terms of the bit number J determined by the size of the divisor data OU, can realize with a simple circuit which extracts only lower J bits from the modulo data Ei and which stops the output of the other unnecessary upper bits. Though the output format of the encoded codes Ci may be considered in various ways, the encoded codes Ci are output on a serial data basis in the present embodiment. In Fig. 1, though not illustrated therein, the output signals of the coder, that is, the additional codes (D1, SX and OU) and the encoded codes (C2, C3, ..., and C16) are once stored in a buffer memory and after completion of coding processing or the like for error correction, they are output onto a transmission line, for example, on a serial data basis. With the coder of the present embodiment, the total number of bits in the input data Di (i = 1, 2, ..., and 16) per one block is 128 (= 8 x 16) and the total number CD of output bits per one block corresponds to a sum of 21 bits (= 8 + 9 + 4) in the additional codes (D1, SX and OU) of fixed word lengths and 15·J bits in the encoded codes Ci of variable lengths, as follows. CD = 21 + 15·J The word lengths J of the encoded codes Ci is larger than zero and smaller than 8, but the predictive errors are small and the word lengths J becomes smaller than 7 due to the correlation of the input signal in most blocks. As a result, a relationship CD = 21 + 15·J < 128 is satisfied and an average bit number per one sample (one picture element) can be reduced. In the exemplary block shown in Fig. 2, the divisor data OU is 64 and thus the word length J of the code Ci becomes 6. Hence, the total output bit number CD of the coder in this block is 111 (< 128) in accordance with the equation (13) and the average bit number per one sample is reduced to about 6.9. Fig. 3 shows a block diagram showing the arrangement of a decoder used in the first embodiment of the present invention, which decoder performs inverse transformation opposed to in the coder of Fig. 1. The decoder of Fig. 3 includes an input terminal 201 for input of the codes Ci, an input terminal 202 for input of the divisor data OU, an input terminal 203 for input of the maximum predictive error SX, an input terminal 204 for input of the leading data D1 in each block, a modulo decoder 205 for performing inverse transformation opposite to in the modulo encoder 111 used in the efficient coder of Fig. 1, that is, for decoding the codes Ci to obtain the modulo data Ei, an adder 206 for receiving, as its one input, the maximum predictive error SX, a subtracter 207 for subtracting the modulo data Ei from an output received from the adder 206, an offset reproducer 208 for receiving an output of the subtracter 207 and the divisor data OU and for generating and supplying an offset Fi', an offset adder 209 for adding the offset Fi' to the modulo data Ei′ to obtain a decoded data Di', a switch 210 for receiving an output of the offset adder 209 and the data D1 from the terminal 204 and selecting one of the received inputs, a predictor 211 having the same arrangement as the predictor 105 in Fig. 1 and for receiving the decoded data Di' and for supplying the estimate Pi to the other input of the adder 206, a block resolver 212 which receives the decoded data Di' from the switch 210 and performs inverse transformation opposite to in the block divider 102 in Fig. 1, and an output terminal 213 for input of the decoded data. It is assumed that the input of the additional codes is followed by the input of encoded data and held in the decoder for one block period. Explanation will next be made as to the operation of the decoder system arranged as mentioned above. The input data D1 applied to the terminal 204 is supplied to the switch 210 and then as the already decoded data D1' without being subjected to any processing, to the block resolver 212 and also to the predictor 211. The data D1' is used, in the predictor 211, as an estimate P2' which is necessary for calculating the decoded data from the initial modulo data E2'. The switch 210, after outputting the input data D1, selects the input from the offset adder 209 and outputs the decoded data D2', D3', ..., and D16'. The encoded codes Ci (i = 2, 3, ..., and 16) applied to the terminal 201 are converted at the modulo decoder 205 into modulo data Ei' on the basis of the divisor data OU received from the terminal 202. The adder 206 receives the maximum predictive error SX from the terminal 203 and the estimate Pi' from the predictor 211, adds them together and then sends the addition result to a subtracter 207. The subtracter 207 subtracts the modulo data Ei' from the received addition result to obtain a data (Pi' + SX - Ei'). The offset reproducer 208 receives the subtraction result from the subtracter 207 and the divisor data OU from the terminal 202 to generate the offset Fi' (= OU· (Ni + 1)) satisfying the following relationship (9) OU·Ni ≦ (Pi' + SX - Ei') < OU·(Ni + 1) The offset adder 209 addes the offset Fi' received from the offset reproducer 208 to the modulo data Ei' from the modulo decoder 205 to generate the decoded data Di' (i = 2, 3, ..., and 16) and supplies the data Di' to the switch 210. The switch 210 gets all the decoded data Di' (i = 1, 2, ..., and 16) in the block and supplies them to the predictor 211 and also to the block resolver 212. The decoded data Di' applied to the block resolver 212 are extracted in the same order as the data obtained by sampling and quantizing the original video signal and are output from the terminal 213. The word length J of the encoded codes Ci applied to the terminal 201 on a serial data basis varies from block to block. Thus, in order to correctly extract the codes Ci, it is necessary to know the word length J. Since the word length J of the encoded codes Ci is determined by the power M (in 2 M ) indicative of the divisor data OU (J = M when M < 9 and J = 8 when M = 9), the encoded codes Ci can be corrected extracted and the modulo data Ei' can be obtained by attaching 0 to its upper bits. As a result, the modulo decoder 205 can be realized with such a simple circuit that comprises a shift register for serial-parallel conversion, a register for holding code data therein, a counter for counting the number of bits and a gate for attaching 0 to upper bits. The modulo encoder 111 in Fig. 1 is not subjected to any deterioration by the encoding operation and the modulo decoder 205 performs inverse transformation opposite to in the modulo encoder 111, so that the modulo data Ei' coincides with modulo data Ei. The module can be obtained by dividing the (Pi' + SX - Ei') of the output of the subtracter 207 by the divisor data OU and the offset Fi' (= OU·Ni) satisfying the relationship (9) by subtracting the obtained modulo from the output data (Pi' + SX - Ei'). In the present embodiment, the divisor data OU is set to be 2 M , so that the offset Fi' can be obtained only by setting all the lower M bits of the data (Pi' + SX - Ei') at 0. As a result, the offset reproducer 208 can be realized with use of a simple logical circuit. Since the modulo data Ei' and the estimate Pi' in the decoder system are equal to the modulo data Ei and the estimate Pi in the coder system of Fig. 1, the offset Fi' is also equal to the offset Fi and the decoded data Di' coincides with the input data Di. As has been explained in the foregoing, in accordance with the present embodiment, unlike the modulo-PCM (MPCM) system having a quantizer, there is not provided a quantizer, the modulo data is transmitted as coded as it is, the divisor data OU (modulo amplitude in the MPCM system) are set to be larger than the predictive error variation range (dynamic range), and further the divisor data OU and the information on the predictive error variation range are transmitted as the additional codes. As a result, any anomaly errors and quantization errors can be eliminated, that is, information preserving coding and its decoding can be realized, whereby the circuit configuration can be highly simplified. In the prior art, the divisor data (modulo amplitude) in the coding operation has been fixed or set to be a maximum of absolute values of predictive errors; whereas, in the present invention, the divisor data is determined by the predictive error variation range (dynamic range) so that the divisor in the coding operation can be made smaller than that in the prior art. Accordingly, in particular, in a block in which an input data is monotonously increased or decreased, coding can be realized more efficiently than the prior art. In the case where a video signal is used as an input signal, since rough picture image can be reproduced with use of only a part (the leading picture element data of the block) of the additional codes, so that coding suitable also for picture research can be realized. There is also considered such a coding method that, in place of an input data at a specific position in a block, an average value DA of the input data in the block is transmitted as one of the additional codes. In this case, its decoding is carried out by first decoding the coded signal under the condition of the initial value F1 = 0 of the offset and by computing an average value DB of the obtained data (Di - F1). The initial value F1 of the offset is obtained by subtracting the average value DB from the transmitted average value DA. The decoded data Di is obtained by adding the obtained initial value F1 to the data (Di - F1). In the case where all of k modulo data Ei are transmitted, even if a single error occurs in the modulo data, correction can be effected by using the average value DA. Further, when a video signal is input as an input signal, the rough information of the video signal can be displayed with use of only the average value DA and thus coding suitable for searching can be realized. When coded data on the transmission line are subjected to an error, or when a code error takes place on the transmission line, the error is not always propagated to the decoding of the next sample unlike the DPCM system. This is because the decision of the offset Fi in accordance with the relationships (7), (8) and (9) has a determination width determined by the maximum and minimum of the predictive errors. However, an error sometimes occurs in the decision of the offset Fi and the error of the offset Fi is propagated to decoded data following the error occurrence. Even under such a condition, since, the estimate Pi is obtained without using any data in the other blocks, i.e., by performing coding operation over each block independently, such an error will not be propagated up to the adjacent block. In addition, since the propagation of right decoded data and an error causes a difference between the right and wrong decoded data to correspond to an integer multiple of divisor data OU, such wrong data can be accurately corrected by judging a correlation between the wrong decoded data and the adjacent right decoded data. How to correct the wrong data will be explained. An error occurrence position can be detected with use of an error correcting code. Assume, for example, that a code error took place in the ninth modulo data in the diagram of Fig. 2(c) and this caused the offset Fi to be wrongly determined. This will result in that the tenth to sixteenth data subsequent to the ninth modulo data are also erroneously decoded. To avoid this, decoding is carried out by predicting in a direction opposite to in the coding operation starting from the seventeenth data (not shown in Fig. 2) corresponding to the leading data of the next block to which the error is not propagated. As a result, the sexteenth, fifteenth, ..., and tenth input data can be rightly decoded so long as a difference between the. seventeenth and sixteenth data does not exceed the predictive error dynamic range. In this connection, since the prediction direction is different from that in the coding operation and the sign of the predictive error is inversed, the minimum and maximum transmitted in the form of the additional codes must be used with their sign inversed. The ninth input data can be corrected with use of an average value of the eighth and tenth decoded data. When a predictive error in the block boundary (corresponding to a difference between the sixteenth and seventeenth data, in the example of Fig. 2) obtained through prediction using decoded data is in a zone outside the predictive error range determined by the additional codes, it can be judged that there is a high possibility of transmission error occurrence. When a transmission error is judged and thus the predictive error is out of the range, decoding can be achieved by predicting in a direction different from in the coding operation starting from a decode data within the next block in the same manner as mentioned above. The block of Fig. 2 has been of one-dimensional configuration. When the block is of two- or higher-dimensional configuration as in a video signal, such correction can be attained with use of decode data within a plurality of surrounding blocks. When a transmission error takes place in the additional codes indicative of the predictive error information, there is considered a correction method of using the additional codes of the adjacent block. There is also considered such a coding method that one of the adjacent blocks to be suitably used in correction is previously determined at the time of occurrence of a transmission error and this information is transmitted as one of the additional codes, in which case more suitable correction can be realized. The foregoing first embodiment, which is the variable-length coding method wherein the coding bit number varies from block to block, is suitable for such applications not requiring real-time transmission as, for example, file recording of stationary picture images, short-sentence voice signals and so on. Explanation will next be made as to a coding method of the present invention which is suitable for usual constant-bit-rate transmission line and first as to its principle briefly. One method of making constant the bit rate is to make constant the coding bit number for each block, that is, to set the predictive error dynamic range to be below a predetermined amount. In the present invention, an input signal is subjected to such a conversion as to set the predictive error dynamic range to be below the predetermined amount, to thereby obtain a converted input signal that is then subjected to an information preserving coding (which is the same as already mentioned in the foregoing embodiment) to obtain a coded output. The coded output is then subjected to a decoding operation (which is the same as already mentioned in the foregoing embodiment) to reproduce the converted input signal which in turn is then subjected to a conversion opposite to in the coding operation to thereby reproduce the input signal. The simplest way of obtaining the converted input signal is to multiply the input signal by a predetermined number for each block. When the input signal is multiplied by the predetermined number smaller than 1, the converted input signal having the smaller dynamic range can be obtained and the predictive error dynamic range of the converted input signal can be made smaller by substantially the predetermined number than the predictive error dynamic range of the input signal. This is because the processing of obtaining the predictive errors is linear. Referring to Fig. 4, there are shown, in a block diagram form, a coding and decoding system in accordance with a second embodiment of the present invention. The coding system functions to make constant the number of coding bits for each block. The coding and decoding system in Fig. 4 includes an input terminal 401 to which an input data as a sampled, quantized video signal (having a word length of 8 bits and a level of 0-255) is to be applied, an encoder 402 for making constant the number of coding bits for each block, a decoder 403 for performing inverse transformation opposite to the transformation of the encoder 402, and an output terminal 404 from which the decoded input signal in a block unit is to be output. More in detail, the encoder system 402 has a block divider (which is the same as the block divider 102 in Fig. 1), coefficient appliers 405, 406, 407 and 408 for multiplying the input signal by coefficients 1/2, 1/4, 1/8 and 1/16 respectively, coders 409, 410, 411 and 412 respectively having the same internal configuration as in Fig. 1 but with the block divider 102 being removed and for performing information preserving coding operation to output additional codes and encoded codes, a detector 413 for receiving from the coders 409 to 412 divisor data OU respectively indicative of the word length of the encoded code that is one of the additional code outputs of each of the coders 409 to 412 and for outputting conversion information, and a switch 414 for receiving outputs of the coders 409 to 412 and an output of the coefficient applier 408 and the conversion information from the detector 413 and, under control of the received conversion information, for selectively outputting, if present, one of the outputs of the coders 409 to 412 which reaches 4 bits in its encoded data word length and for selectively outputting, if not present, the output of the coefficient applier 408. The decoder system 403, on the other hand, has a block resolver 212 (which is the same as the block resolver 212 in Fig. 3), a decoder 415 having the same internal arrangement as in Fig. 3 but with the block resolver 212 being removed, a switch 416 for receiving an output of the decoder 415 and one of the encoded codes from the switch 414 and for outputting one of the received inputs under control of the conversion information transmitted from the detector 413, a switch 417 for selectively outputting one of predetermined coefficients under control of the conversion information transmitted from the detector 413, and a multiplier 418 for multiplying the reproduced conversion signal from the switch 416 by the selected predetermined coefficient received from the switch 417 for reproduction of the input signal. Explanation will next be made as to the operation of the encoder system 402 of the present embodiment arranged as explained above. In the encoder system 402, an input signal applied to the terminal 401 is divided on a block unit-data basis at the block divider 102 into block signals. The coefficient appliers 405 to 408 multiply the received block signal by the predetermined coefficients 1/2, 1/4, 1/8 and 1/16 and round the decimal fractions of their multiplication results respectively to generate conversion input signals (including the input signal) having word lenths of 8, 7, 6, 5 and 4, which conversion input signals are then sent to the coders 409 to 412 to be subjected to an information preserving coding operation respectively. The detector 413 detects one of the coders where the word length of the encoded code becomes 4 bits. The switch 414 is controlled by the output of the detector 413 to selectively output one of the encoded codes which becomes 4 bits in word length. The switch 414, if failing to detect any of the coders which becomes 4 bits in word length, selects the output of the coefficient applier 408 and outputs it as an encoded code as it is. Since it is necessary to transmit information (3 bits) to the decoder 403 to inform the decoder of one of the conversion input signals which has been encoded and transmitted, the information as the conversion information is included in the additional codes and transmitted. Assume that the lower limit value of the word lengths of the encoded codes is set to be 4 bits in the coder 409. Accordingly, the amount of information to be transmitted becomes a total of 80 bits, that is, 3 bits of conversion information for the additional codes, 8 bits (at least) of block leading data, a maximum of 9 bits (at least) of predictive error and 4 x 15 bits of encoded codes. Thus, the number of bits per one picture element becomes 5 bits in average. In the decoder system 403, the decoder 515 decodes the encoded data transmitted from the encoder system 402 to decode the conversion input signal in the encoder system without any error. The decoded conversion input signal from the decoder 415 is applied through the switch 416 to the multiplier 418 as its one input. The switch 417 selects and outputs one of the inverse conversion coefficients under control of the conversion information transmitted from the detector 413 for conversion of the decoded conversion input signal into the input signal. The multiplier 418 multiplies the conversion input signal by the selected inverse conversion coefficient received from the switch 417 to convert it into the input signal. The reproduced block input signal is resolved at the block resolver 212 so that a signal having the same data array as the input signal of the block divider 102 is output from the block resolver to the terminal 404. When the transmitted encoded data is determined to be the output of the coefficient applier 408 on the basis of the transmitted conversion information, since the encoded data corresponds to the conversion input signal per se, the encoded data is not passed through the decoder 415 and applied to the multiplier 418 through the switch 416. As has been explained above, when it is impossible, in encoding the input signal, to encode the input signal with the predetermined encode data word length, the input signal is multiplied by the predetermined coefficient to form the conversion input signal having a small predictive error dynamic range and then the obtained conversion input signal is encoded, whereby the encode data word length can be made constant. Since the coding operation of the conversion signal is the same as that of the first embodiment, that is, information preserving coding, no anomaly errors take place. When the input signal is large in predictive error dynamic range, the input signal is multiplied by the predetermined coefficient to be converted into the conversion input signal, which is then encoded, so that quantization becomes rough. Large ones of the predictive errors in the dynamic range mean sharply varying points (acute points) in the input signal. The sharply varying points in the signal, even when the quantization is rough, is immune to the signal deterioration, which results in that practical coding matching visual characteristics can be realized. For easy understanding of the present invention, the four coders 409 to 412 have been illustrated. However, most of the circuit parts in the second embodiment can be commonly used and thus the circuit scale of the second embodiment will not be increased remarkably. In the foregoing embodiments, the encoded data dynamic range is not fully efficiently utilized, because some allowance is provided so that, even when the predictive error dynamic range is expanded by the rounding error, this causes the predictive error dynamic range not to exceed the encoded data dynamic range. As a method of reducing the predictive error dynamic range, there is considered a method that non-linear conversion is carried out as shown in Fig. 6. In the drawing, white and black dots EP denote input signals before and after its conversion respectively. The drawing shows an example in which the maximum SX (= D i - D i-1 ) of predictive errors between input data D i-1 and D i at times (i - 1) and i occurs and a conversion input signal has + 1 and - 1 corresponding to the input data D i-1 and D i associated with the generation of the maximum SX. Thus, the maximum sx of predictive errors for the conversion input signal is 2-levels smaller than the maximum SX. In this way, by making slightly small or large some or all of input data associated with the generation of the maximum or minimum predictive error, the maximum and minimum predictive errors of the generated conversion input signal can be made slightly small, that is, non-linear processing of making small the predictive error dynamic range can be realized. Since the level change amount of the input data is suppressed to be small, the need for inverse conversion at the time of decoding can be eliminated. This non-linear conversion is valid when the predictive error dynamic range of the input signal is equal to or slightly larger than 2 to the power of N, or when it is desired to suppress an increase in the predictive error caused by the rounding error at the time of obtaining the conversion signal by multiplying the input signal by the conversion coefficient. This is because the setting of the predictive error dynamic range to be smaller than and close to 2 to the power of N means the efficient use of the encoded code dynamic range, i.e., the capability of reduction of the encoded code word length by 1 bit. The following is another example of reducing the predictive error dynamic range. That is, since the predictor in the coding system is a sort of low pass filter, the predictive errors can be regarded as the high frequency components of the input signal. Thus, a high frequency suppressing filter can be considered to reduce the predictive error dynamic range. For its decoding, a filter having a characteristic opposite to the high frequency suppressing filter is used. In this case, as the conversion information, codes indicative of the presence or absence of the filter or the characteristic thereof can be considered. The block may have a one-dimensional configuration (for example, 16 picture elements in horizontal direction and one line in vertical direction), a two-dimensional configuration (for example, 4 picture elements in horizontal direction and 4 lines in vertical direction), or a three-dimensional configuration extended between fields and frames. As another modification method, there can also be considered a method that coding is carried out within a field or a frame and a block is extended and encoded in a time-axis direction expressed in field or frame units. Generally speaking, a block consists of input data corresponding to sample positions continuous in horizontal or vertical direction, but the present invention is not limited to the particular configuration so long as a block consists of a plurality of strongly correlative input data. For example, in the case of an NTSC signal or the like, a block can also consist of input data corresponding to the sample positions of equiphase points. Although previous-value prediction has been carried out in the predicting method in all the foregoing embodiments, the present invention is not restricted to the particular method and may employ various other suitable prediction method. In the case where a block has a one-dimensional configuration, it is simplest to extract input data in a block in the input order and to use a data previous by one as one of an input data or decode data combination to be used in prediction. In the case where a block has a one- or more-dimensional configuration, the order of input data to be extracted and the combination of data to be used in prediction may be considered in various ways. Fig. 5 shows an example when a block is made up of 4 picture elements in horizontal direction and 4 lines in vertical direction. In the drawing, mark 0 represents a picture element, a number represents the order i of data to be extracted, and an arrowed solid-line means that a data from which the arrow line is directed, is used in predicting a data, into which the arrow line is directed. The smaller divisor data provides the higher coding efficiency but the efficiency varies depending on the correlation of the input data. Thus, there may be considered such a method as to use a plurality of coding methods and to output the output of more efficient one of the coding methods together with an additional code indicative of its predicting method attached to the system output. In the previous-value prediction, a signal providing a highest coding efficiency is such a signal that monotonously increases or decreases, because the predictive error dynamic range is smallest. Accordingly, there can be considered such a method that a plurality of different orders of input data to be extracted from the block are prepared and one of the orders which provides a smallest predictive error dynamic range is selected. In this case, a code indicative of the input-data extracting method (a sort of predicting method) is transmitted as one of the additional codes. Though the above prediction method has been an extrapolation prediction, an interpolation prediction may also be employed. For example, in the first embodiment, in which only the leading input data in each block is not encoded and transmitted as it is, so that a value obtained through linear interpolation with use of the leading data of each block is used as a predicted value and a difference between input data is used as a predictive error. In the interpolation prediction, unlike the extrapolation prediction, a sequentally decoded data is not used in prediction of the next data and thus no erroneous transmission takes place. In the case where high frequency components in an input signal are very large, there is valid a prediction method that one (for example, the leading data in the block) of input data of the input signal in a block at its specific position or an average value of all the data in the block is used as a prediction data for all the input data of the block. When the input signal has input data of 20, 30, 20, 30, ... repeated in this order, for example, the maximum SX and minimum SN of predictive errors in the previous-value prediction become 10 and -10 respectively and the dynamic range SDR is 20. Meanwhile, when the leading data 20 is used as a predicted value for all the input data of the same block, the maximum SX and minimum SN of the predictive errors becomes 10 and 0 respectively and the dynamic range SDR is 10 that is small. As has been explained in the foregoing, in accordance with the present invention, there can be provided an efficient coding method and its decoding method which enable efficient transmission without any anomaly errors with use of a simple arrangement, finding its practically useful applications.

Claims: A coding method in which a block made up of a plurality (k) of input data (Di), each of said input data representing an input value of a signal at a sampling point, is used as an encoding unit, said coding method comprising the steps of: generating prediction values (Pi) for each block, each prediction value being based on at least a previous one of said input data; calculating predictive errors (Si) for each block, each error corresponding to a difference between said input value and its prediction value (Pi); detecting a maximum value SX and a minimum value SN of said predictive errors (Si) in each block; generating a divisor value (OU) for each block, said divisor value being larger than SX-SN and less than or equal to 2 M where M is an integer which satisfies a relationship 2 M-1 ≦ SX-SN < 2 M ; calculating modulo values (Ei), each corresponding to a remainder obtained by dividing said input value by said divisor value (OU) for each block; encoding said modulo values (Ei) to obtain modulo codes (Ci) for each block; and outputting for each block said modulo codes (Ci) and additional codes which are generated on the basis of at least two of said maximum value SX, said minimum value SN and said divisor value (OU). A coding method according to claim 1, wherein each of said prediction values (Pi) is an input value represented by one of said input data in the same block which includes input data to be predicted. A coding method according to claim 1, wherein each of said prediction values (Pi) is an input value represented by one of said input data at a specific position in the same block which includes input data to be predicted. A coding method according to claim 1, wherein each of said prediction values (Pi) is an average value of said input data in the same block which includes input data to be predicted. A coding method according to claim 1, wherein said prediction values (Pi) are generated by an interpolation method. A coding method according to claim 1, wherein said divisor value (OU) is equal to 2 M . A coding method according to claim 1, wherein said additional codes include input data at a specific position in the block. A coding method according to claim 1, wherein said additional codes include a code representing an average value of said input data in the block. A decoding method for decoding received data coded by a coding method in which a block made up of a plurality (k) of input data (Di), each of said input data representing an input value of a signal at a sampling point, is used as an encoding unit, said coding having been carried out by a method in accordance with claim 1; said decoding method comprising the steps of: obtaining modulo values Ei' by de-encoding received modulo codes (Ci) for each block; obtaining at least two of a maximum value SX, a minimum value SN and a divisor value OU on the basis of received additional codes for each block; generating prediction values Pi' for each input data in each block, each based on at least one of already decoded data; determining integers Ni on the basis of said modulo values Ei' and said prediction values Pi' respectively and on the basis of at least two of said maximum value SX, said minimum value SN and said divisor value OU for each block, so that each of said integers Ni satisfies a relationship OU˙Ni ≦ SX+Pi'-Ei' < OU˙ (Ni+1); and adding OU˙Ni to said modulo values Ei' for each block so as to obtain decoded data (Di'). A decoding method according to claim 9, wherein each of said prediction values Pi' is an input value represented by one of said input data in the same block which includes input data to be predicted. A decoding method according to claim 9, wherein each of said prediction values Pi' is an input value represented by one of said input data at a specific position in the same block which includes input data to be predicted. A decoding method according to claim 9, wherein each of said prediction values Pi' is an average value of said input data in the same block which includes input data to be predicted. A decoding method according to claim 9, wherein said prediction values Pi' are generated by an interpolation method. A decoding method according to claim 9, wherein said divisor value OU is equal to 2 M . A decoding method according to claim 9, wherein said additional codes include input data at a specific position in the block. A decoding method according to claim 9, wherein said additional codes include a code representing an average value of said input data in the block. A decoding method according to claim 9, further comprising the additional step of generating, when an error has occurred at the decoded data in the block said prediction values Pi' in a direction different from that in said coding method by using, as starting data for predicting, the decoded data within a block adjacent to the block in which said error has occurred. A decoding method according to claim 9, further comprising the additional step of decoding, when an error has occurred at said additional codes in the block, said received data by using at least one of said additional codes within a block adjacent to the block in which said error has occurred. A decoding method according to claim 17, further comprising the steps of: calculating predictive errors (Si) as differences between respective values represented by the decoded data and said prediction values Pi' generated in said additional step; determining a predictive error range, within which said predictive errors (Si) will fall, on the basis of said additional codes in the block; and detecting an occurrence of a transmission error when at least one of said predictive errors has exceeded said predictive error range.

Inventors: KATO SHIRO, KATO, SHIRO
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1989
Main classification: H03M7
IPC codes: H03M7