Three-dimensional graphic processing apparatus

Abstract: A three-dimensional graphic processing apparatus includes n arithmetic ICs (10A to 10D) for performing linear interpolation calculations for each scan line of a triangle polygon to obtain intensity values and depth coordinate values of pixels, and two types of n memories (11A to 11D, 12A to 12D) for storing the calculation results. The n arithmetic ICs (10A to 10D) parallelly execute linear interpolation calculations of n different pixels successive on a single scan line of a single triangle polygon in one processing cycle. Each arith­ metic IC calculates for each of every n pixels in one processing cycle, and a corresponding one of the memories (11A to 11D, 12A to 12D) stores the calculation result.

Description: The present invention relates to a three-dimensional graphic processing apparatus for performing shading of a graphic pattern constituted by a plurality of polygons. In the field of three-dimensional graphic processing, Gouraud shading is well known as an algorithm for performing three-dimensional display by processing called shading. The three-dimensional shading display obtained by the Gouraud shading will be described below. First, information of a polygon is given. The contents of the information are three-dimensional coordinate values and a intensity value of each vertex of the polygon. For example, if the polygon is a triangle as shown in Fig. 1, information (x,y,z,I) containing three-dimensional coordinate values and a intensity value about a vertex A is (x1,y1,z1,I1), that about a vertex B is (x2,y2,z2,I2), and that about a vertex C is (x3,y3,z3,I3). Referring to Fig. 1, assuming that reference numeral 40 denotes a scan line parallel to the X coordinate axis, in order to perform shading, intensity values, X and Y coordinate values, and Z coordinate values representing the depths must be calculated for pixels along the scan line 40. An intensity value I and the Z coordinate value can be calculated by interpolation calculations. For example, an intensity value I4 of a pixel D at a three-dimensional coordinate point (x4,y4,z4) as an intersection point of the line 40 and a side BC of the triangle polygon can be obtained by an interpolation calculation of vertexes B and C, and a intensity value I5 of a pixel E at a three-dimensional coordinate point (x5,y5,z5) as an intersection point of the line 40 and a side AC can be obtained by an interpolation calculation of vertexes A and C. That is, the intensity values I4 and I5 are given by: I4 = I2( y4 - y3 y2 - y3 ) + I3( y2 - y4 y2 - y3 ) I5 = I1( y5 - y3 y1 - y3 ) + I3( y1 - y5 y1 - y3 ) An intensity value at an arbitrary pixel F on the line 40 can be obtained by an interpolation calculation of the intensity values I4 and I5. Also, Z coordinate values z4 and z5 representing the depths of the pixels D and E and a Z coordinate value at the arbitrary pixel F on the line 40 can be obtained by similar interpolation calculations. That is, the Z coordinate values z4 and z5 are given by: z4 = z2( y4 - y3 y2 - y3 ) + z3( y2 - y4 y2 - y3 ) z5 = z1( y5 - y3 y1 - y3 ) + z3( y1 - y5 y1 - y3 ) In this case, at pixels on one scan line parallel to the X coordinate axis, inclinations of Z coordinate values and those of intensity values with respect to X coordinate values are constant, respectively. In a conventional apparatus for performing the three-dimensional shading display, Z coordinate values and intensity values of pixels on each scan line are sequentially calculated by a single arithmetic IC per pixel. Calculation results are then written in a display memory to perform painting of a graphic pattern. An access speed of the memory, however, is lower than a calculation speed of the calculation IC, and a throughput of the entire apparatus is therefore determined by the access speed. Since the number of pixels constituting a three-dimensional graphic pattern is very large, shading requires a very long time in the conventional apparatus because an access speed of a memory is generally low. Prior art document "GRAPHICS INTERFACE ′82", 17 May 1982, Toronto, CA, pages 373-380, D. FUSSELL ET AL.: ′A VLSI-oriented architecture for real-time raster display of shaded polygons' (cf. specifically page 376, left column, line 14 - page 377, right column, line 31 and figures 2, 3 describes an apparatus for shading of triangles, recognizes the need for parallel processing, and proposes a parallel architecture. This apparatus processes separate triangles in parallel, where the calculations for successive pixels on a single scan line are performed by the same triangle processor. It is an object of the present invention to provide a three-dimensional graphic processing apparatus capable of executing shading of a three-dimensional graphic pattern at high speed. To solve this object the present invention provides a three-dimensional graphic processing apparatus as specified in claim 1. This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 is a view for explaining conventional painting of a polygon; Fig. 2 is a block diagram showing an arrangement of a three-dimensional graphic processing apparatus according to an embodiment of the present invention; Figs. 3 to 9 are views for explaining the apparatus of the embodiment; Fig. 10 is a block diagram showing an arrangement of a main part of the apparatus of the embodiment; Figs. 11 and 12 are flow charts for explaining an operation of the circuit shown in Fig. 10; and Figs. 13 and 14 are views for explaining another embodiment of the present invention. Embodiments of the present invention will be described below with reference to the accompanying drawings. As described above, at pixels on a scan line parallel to the X coordinate axis, inclinations of Z coordinate values and those of intensity values with respect to X coordinate values are constant, respectively. Therefore, Z coordinate values and intensity values of pixels on a single scan line can be calculated by calculating an inclination ΔZ of the Z coordinate values and an inclination ΔI of the intensity values and then sequentially adding these values. If the polygon is a triangle, a pattern obtained by connecting vertexes of the triangle always becomes a plane. Therefore, in the case of a triangle polygon, inclinations ΔZ of Z coordinate values and inclinations ΔI of intensity values on all scan lines are constant, respectively. An apparatus of the present invention is based on this principle. That is, in Fig. 2, reference numerals 10A, 10B, 10C and 10D denote arithmetic ICs for calculating an inclination ΔZ of Z coordinates and an inclination ΔI of intensity values on the polygon plane, calculating a Z coordinate value and a intensity value I of a point from which painting is started on each scan line parallel to the X coordinate axis and which is present on one of three sides defining the triangle polygon, and sequentially calculating Z coordinate values and intensity values I of different points on a single scan line, thereby performing shading and hidden surface removal. The arithmetic ICs 10A, 10B, 10C and 10D are assigned with numbers of 0, 1, 2 and 3, respectively. The Z coordinate values and the intensity values I calculated and subjected to hidden surface removal by the ICs, 10A, 10B, 10C and 10D are stored in four Z memories 11A, 11B, 11C and 11D, and four I memories 12A, 12B, 12C and 12D, respectively. Each of the ICs 10A, 10B, 10C and 10D outputs a write pulse for storing a calculation result to a corresponding one of each of the Z memories 11 and the I memories 12. Note that in the above hidden surface removal, a smallest Z coordinate value of a polygon is selected. A polygon subjected to the hidden surface removal is present closest on a display screen. In the apparatus having the above arrangement, a case wherein a triangle polygon having vertexes A (xa,ya,za,Ia), B (xb,yb,zb,Ib) and C (xc,yc,zc,Ic) as shown in Fig. 3 is to be painted by the Gouraud shading to perform shading will be described below. Assume that six scan lines are horizontally (in the X-axis direction) set in the triangle polygon to be painted as shown in Fig. 4. On each scan line, pixels inside the polygon are indicated by solid circles, and those outside the polygon are indicated by broken circles. Each pixel on each scan line is assigned with X-and Y-coordinate addresses. Z coordinate values and intensity values I of pixels in which two lower bits at the X-coordinate addresses represent numbers 0, 1, 2 and 3 are calculated by the arithmetic ICs 10A, 10B, 10C and 10D assigned with the numbers 0, 1, 2 and 3, respectively. The numbers 0, 1, 2 and 3 assigned to the respective pixels are written in the circles representing the pixels in Fig. 4 to be calculated by the ICs 10A, 10B, 10C and 10D. In the case of this triangle polygon, a processing cycle for executing calculations by the ICs 10A, 10B, 10C and 10D is performed twice or once, and a processing cycle for painting is performed twice or once for each scan line from the first scan line. That is, in a processing cycle 1 for a single scan line, Z coordinate values and intensity values of four successive pixels are parallelly calculated by the four arithmetic ICs 10A, 10B, 10C and 10D. At this time, each IC checks how far its calculation point is offset from a start point of linear interpolation on the X coordinate axis. This check is performed by comparing two lower bits at an address of an X coordinate of the start point of linear interpolation with the number assigned to each arithmetic IC 10. Each of the ICs 10A, 10B, 10C and 10D adds a correction value of intensity corresponding to a difference of the X coordinate shown in Fig. 5 to the calculated intensity value I of the painting start point (each pixel on a side AB of the triangle) on the scan line, and adds a correction value of a Z coordinate value corresponding to a difference of the X coordinate shown in Fig. 6 to a Z coordinate value of the start point. The arithmetic ICs check to which IC the painting start point on the scan line corresponds. On the basis of this check result, values shown in Fig. 7 are added as final correction values to the intensity values and Z coordinate values. In the next processing cycle 2, Z coordinate values and intensity values I of four successive pixels are parallelly calculated by the ICs 10A, 10B, 10C and 10D. At this time, each IC 10 adds 4ΔI and 4ΔZ to the intensity value and the Z coordinate value at each point calculated in the processing cycle 1. Such calculations are performed for each scan line, and calculation results are sequentially supplied to a corresponding one of each of the Z memories 11 and the I memories 12. The first scan line is painted as follows. First, each arithmetic IC 10 checks how far its calculation point is offset from a start point (vertex B) of linear interpolation on the X coordinate axis. In this case, since a calculation point of the IC 10A is the start point of the linear interpolation and a number represented by two lower bits at an address of an X coordinate and the number assigned to the IC 10A are both 0s, a difference between both the points on the X coordinate axis is 0. Similarly, differences between calculation points of the ICs 10B, 10C and 10D and the start point of the linear interpolation on the X coordinate axis are 1, 2 and 3, respectively. In addition, each IC 10 determines that a value of two lower bits at an address of an X coordinate of the painting start point is 0 on the first scan line and coincides with the number 0 assigned to the IC 10A. In this case, the ICs 10A, 10B, 10C and 10D add correction values 0, Δ, 2Δ, 3Δ in a column where the value of the two lower bits of the X coordinate is 0 in Fig. 7 to an intensity value and a Z coordinate value at the painting start point, respectively. Note that IC Nos. in Fig. 7 correspond to the numbers assigned to the ICs 10A, 10B, 10C and 10D. In the next processing cycle 2, the arithmetic ICs 10A, 10B, 10C and 10D parallelly add 4ΔI and 4ΔZ to the intensity values and the Z coordinate values of the respective points calculated in the processing cycle 1, thereby calculating intensity values I and Z coordinate values of four successive pixels. On the second scan line, each arithmetic IC 10 checks how far its calculation point is offset from a start point (D in Fig. 4) of linear interpolation on the X coordinate axis. In this case, a difference between a calculation point of the IC 10B, assigned with the number 1, for calculating the linear interpolation start point D and the start point D is 0. For this reason, the ICs 10A, 10B, 10C and 10D add correction values -Δ, 0, Δ and 2Δ in a column where the value of the two lower bits of the X coordinate is 1 in Fig. 7 to an intensity value and a Z coordinate value at the painting start point D, respectively. In the next processing cycle 2, the ICs 10A, 10B, 10C and 10D parallelly add 4ΔI and 4ΔZ to the intensity values and the Z coordinate values of the pixels calculated in the processing cycle 1, thereby calculating intensity values I and Z coordinate values of four successive pixels. On the third scan line, each arithmetic IC 10 checks how far its calculation point is offset from a start point (E in Fig. 4) of linear interpolation on the X coordinate axis. In this case, a difference between a calculation point of the IC 10C, assigned with the number 2, for calculating the linear interpolation start point E and the start point E is 0. For this reason, the ICs 10A, 10B, 10C and 10D add correction values -2Δ, -Δ, 0 and Δ in a column where the value of the two lower bits of the X coordinate is 2 in Fig. 7 to an intensity value and a Z coordinate value at the painting start point E, respectively. In the next processing cycle 2, the ICs 10A, 10B, 10C and 10D parallelly add 4ΔI and 4ΔZ to the intensity values and the Z coordinate values of the pixels calculated in the processing cycle 1, thereby calculating intensity values I and Z coordinate values of four successive pixels. On the fourth scan line, each arithmetic IC 10 checks how far its calculation point is offset from a start point (F in Fig. 4) of linear interpolation on the X coordinate axis. In this case, a difference between a calculation point of the IC 10D, assigned with the number 3, for calculating the linear interpolation start point F and the start point F is 0. For this reason, the ICs 10A, 10B, 10C and 10D add correction values -3Δ, -2Δ, -Δ and 0 in a column where the value of the two lower bits of the X coordinate is 3 in Fig. 7 to an intensity value and a Z coordinate value at the painting start point E, respectively. In the next processing cycle 2, the ICs 10A, 10B, 10C and 10D parallelly add 4ΔI and 4ΔZ to the intensity values and the Z coordinate values of the pixels calculated in the processing cycle 1, thereby calculating intensity values I and Z coordinate values of four successive pixels. In this manner, the intensity values I and the Z coordinate values of pixels on each scan line of the triangle polygon as shown Fig. 4 are calculated. Some of the pixels whose intensity values I and Z coordinate values are calculated as described above are present in the polygon to be painted, while the other pixels are present outside the polygon. In this case, Z coordinate values and intensity values I of the pixels present outside the polygon need not be stored in the Z memories 11 and the I memories 12. Storage of the Z coordinate values and the intensity values I is performed upon supply of write pulses from the ICs 10 to the Z memories 11 and the I memories 12. In this case, each IC 10 checks whether its calculation point is present in the polygon and outputs the write pulse only when the point is present in the polygon. This check is performed by each IC as follows. For example, if a processing cycle is a start cycle (i.e., the processing cycle 1 of any of the first to fourth scan lines in Fig. 4), it is compared two lower bits at an address of an X coordinate of start point of linear interpolation with the number assigned to each arithmetic IC. On the basis of this result, each IC outputs a write pulse in accordance with a rule shown in Fig. 8. When the first scan line is to be processed, a value of two lower bits of the start point of linear interpolation is 0. At this time, a column where the value of the two lower bits at the X coordinate is 0 in Fig. 8 is referred to. In this case, values of all the ICs are 1, and therefore all the ICs 10 output write pulses. On the second scan line, a value of two lower bits of the start point of linear interpolation is 1. At this time, a column where the value of the two lower bits at the X coordinate is 1 in Fig. 8 is referred to. In this case, the value of the IC having the number 0 is 0, and those of the other ICs are 1s. Therefore, the ICs 10B, 10C and 10D except for the IC 10A output write pulses. On the third scan line, a value of two lower bits of the start point of linear interpolation is 2. At this time, a column where the value of the two lower bits at the X coordinate is 2 in Fig. 8 is referred to. In this case, the ICs 10C and 10D corresponding to the numbers 2 and 3 output write pulses. On the fourth scan line, a value of two lower bits of the start point of linear interpolation is 3. At this time, a column where the value of the two lower bits at the X coordinate is 3 in Fig. 8 is referred to. In this case, only the IC 10D corresponding to the number 3 outputs a write pulse. Meanwhile, if a processing cycle is an end cycle (i.e., the processing cycle 2 of any of the first to fourth scan lines in Fig. 4), it is compared two lower bits at an address of an X cordinate of end point of linear interpolation with the number assigned to each arithmetic IC. On the basis of this result, each IC 10 outputs a write pulse in accordance with a rule shown in Fig. 9. When the first scan line is to be processed, a value of two lower bits of an end point of linear interpolation is 1. At this time, a column where the value of the two lower bits at the X coordinate is 1 in Fig. 9 is referred to. In this case, since values of the ICs having the numbers 0 and 1 are 1s and those of the other ICs are 0s, the ICs 10A and 10B corresponding to the numbers 0 and 1 output write pulses. Thereafter, to the fifth scan line, the ICs 10A and 10B corresponding to the numbers 0 and 1 output write pulses in the same manner as described above. If start and end cycles are simultaneously present as in the processing cycle 2 of the fifth or sixth scan line in Fig. 4, write pulses are output on the basis of values of logical AND products of the values of the rules shown in Figs. 8 and 9. That is, when the fifth scan line is to be processed, a value of two lower bits of the start point of linear interpolation is 0. At this time, a column where the value of the two lower bits at the X coordinate is 0 in Fig. 8 is referred to. In this case, values corresponding to all the ICs are 1s. A value of two lower bits of an end point of linear interpolation is then 1. At this time, a column where the value of the two lower bits at the X coordinate is 1 in Fig. 9 is referred to. In this case, values corresponding to the ICs having the numbers 0 and 1 are 1s. As a result of calculating logical AND products of the values of the rules shown in Figs. 8 and 9, therefore, values of the ICs having the numbers 0 and 1 become 1s, and the arithmetic ICs 10A and 10B output write pulses accordingly. When the sixth scan line is to be processed, a value of two lower bits of the start point of linear interpolation is 1. At this time, a column where the value of the two lower bits at the X coordinate is 1 in Fig. 8 is referred to. In this case, values corresponding to the ICs having the numbers 1, 2 and 3 are 1s. In this case, a value of two lower bits of the end point of linear interpolation is 1. At this time, a column where the value of the two lower bits at the X coordinate is 1 in Fig. 9 is referred to. In this case, values corresponding to the ICs having the numbers 0 and 1 are 1s. As a result of calculating logical AND products of the values of the rules shown in Figs. 8 and 9, therefore, a logical value corresponding to the IC having the number 1 becomes 1, and only the IC 10B outputs a write pulse accordingly. Fig. 10 is a block diagram showing an arrangement of a main part of each arithmetic IC used in the apparatus of the above embodiment. Referring to Fig. 10, reference numeral 21 denotes an arithmetic controller. The controller 21 receives information concerning one of the numbers 0, 1, 2 and 3 of the corresponding IC, the two lower bits at an address of the X coordinate, and a vertex of the triangle polygon. On the basis of these inputs, the controller 21 calculates correction values 0, ΔI, 2ΔI and 3ΔI of the intensity as shown in Fig. 5, correction values 0, ΔZ, 2ΔZ and 3ΔZ of the Z coordinate as shown in Fig. 6, an inclination ΔI′ of the intensity value I and an inclination ΔZ′ of the Z coordinate of the left side of the triangle polygon, an initial value Ii of the intensity and an initial value Zi of the Z coordinate of the arithmetic start point on each scan line, and values of the 4ΔI and 4ΔZ, and outputs the write pulse. If an input triangle polygon has a side BC parallel to the X coordinate axis as shown in Fig. 3, the controller 21 calculates the ΔI and ΔZ on the basis of the following equations, respectively: ΔI = Ia - Ib xa - xb ΔZ = za - zb xa - xb If an input triangle polygon has a side BC parallel to the X coordinate axis as shown in Fig. 3, the controller 21 also calculates the ΔI′ and ΔZ′ on the basis of the following equations, respectively: ΔI′ = Ia - Ib ya - yb ΔZ′ = za - zb ya - yb The initial values Ii and Zi of the intensity and the Z coordinate calculated by the controller 21 are supplied to and temporarily stored in registers 22 and 23, respectively. The correction values 0, ΔI, 2ΔI and of the intensity calculated by the controller 21 are supplied to and temporarily stored in a register 24. The correction values 0, ΔZ, 2ΔZ and 3ΔZ of the Z coordinate calculated by the controller 21 are supplied to and temporarily stored in a register 25. The inclinations ΔI′ and ΔZ′ of the intensity value I and the Z coordinate of the left side of the triangle polygon calculated by the controller 21 are supplied to and temporarily stored in registers 26 and 27, respectively. The values of 4ΔI and 4ΔZ calculated by the controller 21 are supplied to and temporarily stored in registers 28 and 29, respectively. In addition, the controller 21 performs read control of the values stored in the registers 22 to 29. Referring to Fig. 10, reference numeral 30 denotes a selector; 31, an adder/subtractor; 32 and 33, selectors; 34 and 35, registers for storing outputs from the selectors 32 and 33, respectively; and 36 and 37, adders. Operations of the selector 30, the adder/subtractor 31, the selectors 32 and 33, the registers 34 and 35, and the adders 36 and 37 are also controlled by the controller 21. An operation of the circuit having the above arrangement will be described below with reference to flow charts shown in Figs. 11 and 12. Note that an operation of a circuit consisting of the registers 22, 23, 24, 25, 26 and 27, the selector 30 and the adder/subtractor 31 will be called a side operation, and that of a circuit consisting of the registers 28, 29, 34 and 35, the selectors 32 and 33 and the adders 36 and 37 will be called a horizontal operation, for the convenience of description. First, the initial value Ii of the intensity at the vertex B of the polygon stored in the register 22 is supplied to the adder/subtractor 31. On the basis of input, the controller 21 designates a correction value of the intensity stored in the register 24. The correction value in the register 24 designated by the controller 21 is supplied to the adder/subtractor 31 via the selector 30. The adder/subtractor 31 performs addition or subtraction between the input initial value Ii of the intensity and the correction value read out from the register 24, thereby calculating a intensity value at a start point of a calculation according to the rule shown in Fig. 7. The calculated intensity value is stored in the register 34 via the selector 32. The initial value Zi of the Z coordinate at the vertex B of the polygon stored in the register 23 is then supplied to the adder/subtractor 31. On the basis of input, the controller 21 designates a correction value of the Z coordinate stored in the register 25. The correction value in the register 25 designated by the controller 21 is supplied to the adder/subtractor 31 via the selector 30. The adder/subtractor 31 performs addition or subtraction between the initial value Zi of the Z coordinate and the correction value read out from the register 25, thereby calculating a Z coordinate value at the calculation start point according to the rule shown in Fig. 7. The calculated Z coordinate value is stored in the register 35 via the selector 33. Thereafter, the horizontal operation is started. The horizontal operation will be performed as shown in Fig. 12. First, upon activation from the side operation, the adder 36 adds the value of 4ΔI stored in the register 28 to the initial value of the intensity stored in the register 34, and the addition result is supplied to the I memory. Similarly, the adder 37 adds the value of 4ΔZ stored in the register 29 to the initial value of the Z coordinate of the linear interpolation calculation stored in the register 35, and the addition result is supplied to the Z memory. Thereafter, in accordance with the rule shown in Fig. 8 or 9 or a logical AND product of the values of both the rules, the controller 21 generates a write pulse. Thereafter, an address of the X coordinate is incremented by four. At this time, if the address of the X coordinate is smaller than a coordinate at the right end of the scan line, the horizontal operation is determined to be Busy, and the flow returns to the start of the operation. Meanwhile, if the address of the X coordinate incremented by four is either equal to or larger than the coordinate at the right end of the scan line, it is determined that calculations of pixels on the scan line are completed. Therefore, an address of the Y coordinate is incremented by one to advance to the next upper scan line, and the Busy state of the horizontal operation is released. In this manner, intensity values and Z coordinate values of pixels on the first scan line are calculated. Intensity values and Z coordinate values of pixels on second and subsequent scan lines are calculated as follows. First, the intensity value Ii stored in the register 22 and the inclination ΔI′ of the intensity value stored in the register 26 are supplied to the adder/subtractor 31. The adder/subtractor 31 adds the values from the registers 22 and 26 to calculate a intensity value at a start point of a calculation on the next scan line. The calculated intensity value is stored in the register 22 again. After correction at the start point is performed using the value shown in Fig. 7, this corrected intensity value is supplied to the register 34 via the selector 32. Similarly, the Z coordinate value Zi stored in the register 23 and the inclination ΔZ′ of the Z coordinate value stored in the register 27 are supplied to the adder/subtractor 31. The adder/subtractor 31 adds the values from the registers 23 and 27 to calculate a Z coordinate value at the calculation start point on the next scan line. The calculated Z coordinate value is stored in the register 23 again. After correction at the start point is performed using the value shown in Fig. 7, this corrected Z coordinate value is supplied to the register 35 via the selector 33. Thereafter, the adder 36 sequentially adds the value of 4ΔI to the intensity value stored in the register 34 in each processing cycle. Similarly, the adder 37 sequentially adds the value of 4ΔZ to the Z coordinate value stored in the register 35 in each processing cycle. As described above, according the embodiment of the present invention, painting of a polygon for performing shading is parallelly executed using four arithmetic ICs, and a calculation result of each IC is stored in Z and I memories exclusive to the IC. Therefore, the processing speed is much higher than that of a conventional apparatus in which these calculations are performed using a single IC. For example, in order to paint a polygon consisting of 21 points as shown in Fig. 4, 21 processing cycles are required in a conventional apparatus, while only 10 cycles are necessary in the apparatus of the above embodiment. Since a graphic pattern to be subjected to shading generally consists of a very large number of polygons and a polygon consists of a very large number of pixels, a processing time can be largely shortened as a whole. The present invention is not limited to the above embodiment but can be variously modified. For example, in the above embodiment, four arithmetic ICs are used to parallelly calculate intensity values and Z coordinate values of pixels. Since the object of the present invention, however, can be achieved by two or more arithmetic ICs, the number of the arithmetic ICs may be any number more than one. For example, referring to Fig. 13, a triangle polygon consisting of 21 pixels as in Fig. 4 is parallelly processed using two arithmetic ICs. In this case, although 12 processing cycles are required, this number of the processing cycles is much smaller than conventional 21 cycles. Fig. 14 shows values corresponding to those in Fig. 7 obtained using two arithmetic ICs. In this case, since a difference between a start point of a linear interpolation and a calculation execution point of each arithmetic IC on the X coordinate axis is either 0 or 1, a correction value is any of 0, Δ or -Δ. As has been described above, according to the present invention, painting of each polygon is performed using two or more arithmetic ICs. Therefore, a three-dimensional graphic processing apparatus capable of executing painting of a three-dimensional graphic pattern at high speed can be provided.

Claims: A three-dimensional graphic processing apparatus comprising: n ( n is an integer of two or more) arithmetic circuits (10A - 10D) suitable for calculating intensity values and depth coordinate values of different pixels on a single scan line in a triangle polygon constituting a three-dimensional graphic pattern; and two sets of n memories (11A - 11D, 12A - 12D) for storing the intensity values and the depth coordinate values, respectively, of the pixels calculated by said n arithmetic circuits, characterized in that said n arithmetic circuits (10A - 10D) parallelly calculate intensity values and depth coordinate values of n different pixels successive on a single scan line in the triangle polygon within one processing cycle, and each of said arithmetic circuits calculates intensity values and depth values of every n pixels on a single scan line. An apparatus according to claim 1, characterized in that each of said n arithmetic circuits (10A - 10D) receives information about a triangle polygon, and in accordance with this information, calculates an intensity value inclination (ΔI) and a depth coordinate value inclination (ΔZ) in the triangle polygon, an intensity value inclination (ΔI′) and a depth coordinate value inclination (ΔZ′) on one side of the triangle polygon, and an initial intensity value (Ii) and an initial depth coordinate value (Zi) of a pixel present on a scan line to be calculated first. An apparatus according to claim 1, characterized in that each of said n arithmetic circuits (10A - 10D) calculates m types (m = 0, 1, 2, ..., n) of intensity value inclinations (mΔI) and depth coordinate value inclinations (mΔZ) using the intensity value inclination (ΔI) and the depth coordinate value inclination (ΔZ) in the triangle polygon calculated in accordance with the input triangle polygon information. An apparatus according to claim 1, characterized in that each of said arithmetic circuits (10A - 10D) calculates a difference between a calculation execution start point and a first pixel of the scan line on a horizontal coordinate axis, and corrects an intensity value and a depth coordinate value of the execution start point with values obtained by multiplying the horizontal coordinate difference with the intensity value inclination (ΔI) and the depth coordinate value inclination (ΔZ). An apparatus according to claim 1, characterized in that each of said arithmetic circuits (10A - 10D) checks whether a calculation execution point is present in the polygon to be subjected to shading in each processing cycle, and only when the point is present in the polygon, outputs a control signal which enables storage of a calculation result in a corresponding one of said memories (11A - 11D, 12A - 12D). An apparatus according to claim 1, characterized in that each of said n arithmetic circuits (10A - 10D) comprises: an arithmetic controller (21) for receiving information about a triangle polygon, a circuit number and a part of a horizontal coordinate address, and calculating, in accordance with these pieces of information, the intensity value inclination (ΔI) and the depth coordinate value inclination (ΔZ) in the triangle polygon, the intensity value inclination (ΔI′) and the depth coordinate value inclination (ΔZ′) on one side of the triangle polygon, the initial intensity value (Ii) and the initial depth coordinate value (Zi) of a pixel present on a scan line to be calculated first, and the m types (m = 0, 1, 2, ..., n) of intensity value inclinations (0, ΔI, 2ΔI, 3ΔI, 4ΔI) and depth coordinate value inclinations (0, ΔZ, 2ΔZ, 3ΔZ, 4ΔZ); first and second registers (22, 23) for storing the initial intensity value (Ii) and the initial depth coordinate value (Zi) on one side of the triangle polygon calculated by said arithmetic controller (21), respectively; third and fourth registers (24, 25) for storing m-1 types of intensity value inclinations (0, ΔI, 2ΔI, 3ΔI) and depth coordinate value inclinations (0, ΔZ, 2ΔZ, 3ΔZ) calculated by said arithmetic controller (21), respectively; fifth and sixth registers (26, 27) for storing the intensity value inclination (ΔI′) and the depth coordinate value inclination (ΔZ′) on one side of the triangle polygon calculated by said arithmetic controller (21), respectively; a first selector (30) for selecting the contents stored in said third and fourth registers (24, 25) and the contents stored in said fifth and sixth registers (26, 27); an adder/subtractor (31) for executing addition and subtraction between the contents stored in said third and fourth registers (24, 25) and an output from said first selector (30); a seventh register (28) for storing one intensity value inclination (4ΔI) of the m types of intensity value inclinations calculated by said arithmetic controller (21); a second selector (32) for receiving an output from said adder/subtractor (31); an eighth register (34) for storing an output from said second selector (32); a first adder (36) for adding the contents in said eighth register (34) with the contents in said seventh register (28); a ninth register (28) for storing one depth coordinate value inclination (4ΔZ) of the m types of depth coordinate value inclinations calculated by said arithmetic controller (21); a third selector (33) for receiving the output from said adder/subtractor (31); a tenth register (35) for storing an output from said third selector (33); and a second adder (37) for adding the contents in said tenth register (35) with the contents in said ninth register (29).

Inventors: AIKAWA TAKESHI C O PATENT DIVI, IKUMI NOBUYUKI C O PATENT DIVI, OHHASHI MASAHIDE C O PATENT DI, SAITO MITSUO C O PATENT DIVISI, AIKAWA, TAKESHI C/O PATENT DIVISION, IKUMI, NOBUYUKI C/O PATENT DIVISION, OHHASHI, MASAHIDE C/O PATENT DIVISION, SAITO, MITSUO C/O PATENT DIVISION
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1989
Main classification: G06T15
IPC codes: G06T15