Circuit for protecting input of semiconductor device

Abstract: An input protection circuit for an electronic circuit includes a switching means operable between ON state and OFF state for generating input for the electronic circuit, a first circuit responsive to an excess level of input for forming a grounding circuit across a first resistor for draining excess level input, a second circuit monitoring input from the switching means for detecting state of the switching means for producing ON/OFF signal depending upon the detected state of the switching means, the second circuit including a second resistor which forms a series circuit with the first resistor and the switching means while the switching means is in ON state. The switching means is operated to ON position for establishing the series circuit for setting the level of the input at a minimum level and to OFF position for blocking the series circuit for setting the level of the input at a maximum level. The second circuit is set a threshold level to be compared with the input level for detecting state of the switching means, the threshold level being set at a level higher than the minimum level and lower than the maximum level so as to assure detection of the state of the switching means.

Description: The present invention relates generally to a circuit for protecting an electronic circuit from environmental noise. More specifically, the invention relates to a protection circuit for an input of a semiconductor device fabricated as an integrated circuit (IC) chip. Electric Science Series, Technical Report of CMOS Application, pages 47 to 48, published on 1980, by Sanpo Shuppan, discloses a protection circuit for electronic circuit. The proposed circuit comprises a protection resistor, a capacitor and diodes for clamping voltage. The protection circuit is fabricated as an external circuit of the electronic circuit and interposed between an input signal source and input of the electronic circuit. The input signal source includes a pull-up resistor and a signal generating switch. A potential at a junction between the pull-up resistor and the signal generating switch, which potential is variable depending upon the position of the signal generating switch, serves as input for the electronic circuit. The protection circuit is generally designed for removing noise, such as surge voltage, electric wave destruction, chattering in switching, superimposing on the signal on a wiring connecting the signal source and the input of the electronic circuit. In the prior proposed protection circuit, the noise component is removed by filtering the signal to the input of the electronic circuit by a time constant determined by the capacity of the capacitor and the resistance of the protection resistor. Furthermore, the protection circuit is designed for protecting the electronic circuit from overcurrent and/or overvoltage which otherwise cause breakage of the electronic circuit. In practical application, the protection circuit will be required various performance. For example, in case of the protection circuit applied for an automotive electronic circuit, the following performances are required. 1) It is required to absorb several hundreds volts of surge energy which can be induced in various load. 2) It is required to remove wave destruction noise due to environmental electromagnetic wave or high frequency noise pulse due to surging. 3) As an additionally required performance of the protection circuit for the automotive electronic circuit, it is required to have a capacity of maintaining sufficiently high contact current, e.g. normally 1 mA to 2 mA for breaking oxidation layer which is provided for protecting wiring from shorting otherwise caused by vibration, temperature or humidity in the automotive use. Such protection circuit is very important for durability of the electronic circuit. In viewpoint of this, further high performance protection circuit has been required. Furthermore, for such protection circuit as an extra parts for fabricating the electronic circuit, reduction of the fabricating cost and size is extremely important task to achieve. In order to answer a requirement for reduction of size, there have been proposed to formulate the protection circuit as an integrated circuit (IC). This may particularly advantageous to employ IC type protection circuit in case a plurality of input signal sources are connected to the electronic circuit. On the other hand, in viewpoint of the production cost, it is preferred to fabricate the IC chip of the protection circuit as monolithic IC instead of hybrid IC, and is further preferred to be produced through ordinary CMOS standard process without requiring special process. In practically fabricating the protection circuit IC, it is preferred to incorporate the pull-up resistor in IC but to externally provide the protection resistor to which several hundreds volts is to be directly applied. For this purpose, there has been proposed CMOS protection circuit as IC circuit. In such CMOS protection circuit, the protection resistor is provided as an external components and the pull-up resistor is incorporated in the IC chip formulating part of the circuit on IC. Such prior proposed protection circuit is difficult to practically fabricate and to practically use. Namely, the resistance of the protection resistor has to be large enough to prevent the diodes in the protection circuit from causing latching-up of diodes in the protection circuit. Assuming the possible surge voltage is ± 300, and the current flowing through the diodes is greater than or equal to 100 mA, the required resistance R of the protection resistor can be illustrated by: 300 (V)/R ≦ 100 (mA) R ≧ 3 (kω) On the other hand, in order to assure breakage of the oxidation layer, the sum value of resistances of the protection resistor and the pull-up resistor is required to satisfy the following condition: Assuming the contact point current IC is greater than or equal to 1 mA and power source voltage is 5V, the sum value of the resistances of the protection resistor and the pull-up resistor is illustrated by: 5 (v) /(R + r) ≧ 1 (mA) R + r ≦ 5 (kω) From the foregoing formulae (1) and (2), the required resistance r of the pull-up resistor becomes smaller than or equal to 2 kω. As can be appreciated herefrom, in the certain application, it becomes necessary to set the resistance R of the protection resistor at a substantially greater value than that of the pull-up resistor. This makes it difficult to detect the state of the signal generating switch. Namely, when the signal generating switch is OFF, the input voltage becomes the source voltage Vcc and when the signal generating switch is ON, the input voltage becomes (R x Vcc)/(R + r). Therefore, when the resistance R of the protection resistor is greater than the resistance of the pull-up resistor, the voltage difference between the switch OFF state and ON state becomes smaller. This causes difficulty in setting threshold level for detecting ON and OFF states of the signal generating switch. This problem is particularly serious when a buffer circuit is provided. Namely, in normal case, the logical threshold voltage Vth of CMOS buffer circuit is set approximately half of the source voltage Vcc. This means that the input voltage has to be lower than half of the source voltage Vcc when the switch is in ON state in order to allow detection of the ON state of the switch. To this, when the resistance R of the protection resistor is set to be greater than the resistance r of the pull-up resistor, the input voltage at the ON state of the switch becomes greater than the threshold voltage Vth. Therefore, in such case, detection of the state of the signal generating switch becomes impossible. In order to solve this problem, the pull-up resistor has to be facilitated as external component of the IC chip. However, this is clearly increases production process and parts required for fabricating IC chip. In other approach, it may be possible to solve the above-mentioned problem by applying higher source voltage so as to increase the contact point current for assuring breakage of the oxidation layer. However, in normal case, the regulated power source for the electronic circuit is set at 5V, another high voltage power source becomes necessary for causing increasing of the cost and causing chip size bulky. A known protection circuit having clamping diodes respectively spanning an input terminal to a power supply source and ground, a capacitor connected between the input terminal and ground and a pull-up resistor connected to the input terminal is described in DE-A-3 611 956. It is an object of the present invention to provide a novel and practically useful input protection circuit for an electronic circuit which can solve the problem in the prior art without causing necessity of extra parts or extra process. The present invention provides an input protection circuit for an electronic circuit comprising: clamping diodes connected between an input terminal connected to an input signal source including a signal generating switch and a power source terminal and between the input terminal and a grounding terminal; a capacitor, one electrode of which is connected to the input terminal and the other electrode of which is connected to one of the power source terminal and the grounding terminal; a pull resistor for performing at least one of pulling-up and pulling down of the potential at the input terminal; a semiconductor switch disposed in parallel with the pull resistor for establishing and blocking a by-pass circuit by-passing the pull resistor; a buffer circuit connected to the input terminal; a sampling circuit connected to the output of the buffer circuit for sampling the buffer output over a predetermined sampling period; means for selectively operating sad semiconductor switch and the sampling circuit for maintaining the semiconductor switch at OFF position during sampling period of the sampling circuit and maintaining the semiconductor switch ON position in a period out of the sampling period; and a protection resistor disposed between the signal generating switch and the input terminal. The present invention will be understood more fully from the detailed description given herebelow and from the accompanying drawings of the preferred embodiment of the invention, which, however, should not be taken to limit the invention to the specific embodiment but are for explanation and understanding only. In the drawings: Fig. 1 is a circuit diagram of an input protection circuit for an electronic circuit Fig. 2 is a circuit diagram of a detector circuit incorporated in the input protection circuit of Fig. 1 Fig. 3 is a chart showing variation of voltage in the circuit of Fig. 2 Fig. 4 is a circuit diagram of another example of the detector circuit incorporated in the input protection circuit of Fig. 1 Fig. 5 is a chart showing variation of voltage in the circuit of Fig. 4 Fig. 6 is a circuit diagram of an input protection circuit for an electronic circuit, according to the present invention Fig. 7 is a timing chart showing waveforms of signals at various points in the circuit of Fig. 6 and Fig. 8 is a diagram of an integrated circuit of the input protection circuit, which illustrates actual implementation of the input protection circuit of Fig. 6. Referring now to the drawings, particularly to Fig. 1, an input protection circuit 21, is fabricated as an integrated circuit (IC). The input protection circuit 21 includes a capacitor 23 , a diodes 24 and 25 , a pull-up resistor 26 and a detector circuit 30 . The capacitor 23 is provided for removing high frequency noise. On the other hand, the diodes 24 and 25 are arranged for clamping voltage for protecting the electronic circuit from excessively high voltage. Though it is not essential, a sampling circuit 31 encircled by a broken line, can also be provided in the input protection circuit 21 . The input protection circuit 21 has an input terminal A connected to a signal generating switch 29 which serves as an input signal source, via a wiring connector 27 and an externally provided protection resistor 22 . On the other hand, the output terminal B of the input protection circuit 21 is connected to an electronic circuit 28 . It should be appreciated that Fig. 1 illustrates a single input protection circuit for one channel of input, it is possible to integrate a plurality of input protection circuits on a single IC chip. Therefore, Fig. 1 should be seen that the shown protection circuit is only part of the IC chip. It is advantageous to provide the sampling circuit 31 in the input protection circuit 21 for providing chattering noise removing effect. Namely, in case of IC chip, it is difficult to provide large capacity for the capacitor 23 . Because of limited capacity, filtering effect of the capacitor can become not satisfactory or incomplete. When filtering effect is not complete, chattering may be caused for superimposing chattering noise on the input signal. This can be successfully prevented by the sampling circuit 31 . The sampling circuit 31 performs comparing operation for comparing the instantaneous input signal with the given number of sampled immediately preceding input signals for outputting signal corresponding to the instantaneous input signal only when the input signals is maintained constant over a predetermined occurrences. By employing this, chattering which can be caused by implusive noise. The detector circuit 30 is provided for detecting state of the signal generating switch 29 based on the magnitude of current flowing through the protection resistor 22 and the pull-up resistor 26 . In practice, the detector circuit 30 detects the input signal level at the input terminal A equal to a voltage Vcc input from a power source due to blocking of the current by the signal generating switch 29 . In response to this, the detector circuit 30 makes judgement that the signal generating switch 29 is maintained at the OFF state to produce HIGH level (1) detector signal. The detector circuit 30 also detects the voltage drop at the input terminal A below a predetermined threshold level Vth to make judgement that the signal generating switch 29 is turned ON . In such case, the detector circuit 30 outputs LOW level (0) detector signal. The detector circuit 30 is set the threshold level Vth at a level of: Vth = K x Vcc where K is determined so that, when the resistance of the protection resistor 22 is R and the resistance of the pull-up resistor 26 is r, K satisfies the following formula: R/(R + r) < K < 1 and R > r Accordingly, from the foregoing formulae (3) and (4), the following formula can be established: (R x Vcc)/(R + r) < Vth < Vcc In the practical operation, when the signal generating switch is held at OFF position, the protection resistor 22 is maintained at blocked state. Therefore, the potential V off at the input terminal A at OFF state of the signal generating switch 29 is maintained at the source voltage Vcc . On the other hand, when the signal generating switch is in ON state, a grounding circuit via the pull-up resistor 26 , the protection resistor 22 and the signal generating switch 29 is completed to permit flow of the current therethrough. At this time, the magnitude of current I flowing across the input terminal A can be illustrated by: I = Vcc/(R + r) Therefore, the potential V on at the input terminal at the ON state of the signal generating switch, can be illustrated by: V on = (R x Vcc)/(R + r) As can be seen herefrom, the threshold level becomes higher than the potential V on at the ON state of the signal generating switch and lower than the potential V off at the OFF state of the signal generating switch. Therefore, detection of the state of the signal generating switch can be assured. In addition, since the resistance r of the pull-up resistor 26 is set at the smaller value than the resistance R of the protection resistor 22 , it satisfies the condition of R ≧ 3 kω (R + r) ≦ 5 kω r ≦ 2 kω Here, it is assumed that R is 3.3 kω and r is 1.5 kω. Since the foregoing formula (6) can be modified as: 3.3/(3.3 + 1.5) = 0.69 < K < 1 Therefore, 0.8 would be an appropriate value to set as K . Providing this, Id = 300 (v)/3.3 k = 91 mA < 100 mA Ic = 5 (V)/ 3.3 k = 1.04 mA > 1 mA Therefore, at ±300V of surge voltage, the Id can be maintained lower than or equal to safety level, i. e. 100 mA. Also, to the normal level voltage, i.e. 5V, satisfactorily high voltage (> 1 mA) for breaking the oxidation layer can be provided. As can be appreciated herefrom, according to the circuit described above, it can be achieved absorption of several hundreds volts of surge energy which can be induced in various load can be achieved. Furthermore, it becomes possible to remove wave destruction noise due to environmental electromagnetic wave or high frequency noise pulse due to surging. In addition, it becomes possible to have a capacity of maintaining sufficiently high contact current, e.g. normally 1 mA to 2 mA for breaking oxidation layer which is provided for protecting wiring from shorting otherwise caused by vibration, temperature or humidity in the automotive use. Fig. 2 shows one example of the detector circuit 30 to be employed in the foregoing input protection circuit set forth above. As seen from Fig. 2, an input terminal 41 is connected to the input terminal A of the input protection circuit 21 of Fig. 1 . On the other hand, the input terminal 41 is connected to the non-inverting input terminal of a comparator 43 . On the other hand, the inverting input terminal of the comparator 43 is connected to a junction between voltage dividing resistors R A and R B . The resistances of the resistors R A and R B are so selected to adjust the reference voltage V f generated at the junction at the level corresponding to the threshold level Vth . The output terminal of the comparator 43 is connected to an output terminal 42 of the detector circuit 30 . With the circuit construction set forth above, when the input ( V iH ) for the non-inverting input terminal via the input terminal 41 is higher than the reference voltage V f input to the inverting input terminal, the comparator 43 outputs the HIGH level signal as the switch OFF state indicative signal. The HIGH level output of the comparator 43 thus serves as switch OFF state indicative signal V OFF . On the other hand, when the input level via the input terminal 41 is lower than the reference voltage V f , the LOW level signal representative of the switch ON state is output from the comparator 43 . Therefore, the LOW level output of the comparator 43 serves as switch ON state indicative signal V ON . The output signal of the comparator 43 is output via the output terminal 42 as the detector signal. Fig. 4 shows another example of the detector circuit 30. In this shown example, the detector circuit 30 comprises CMOS inverter. The threshold level of the CMOS inverter is determined to satisfy the condition set forth above. The threshold level V LT of CMOS inverter is generally illustrated by the following formula: V LT = (Vcc + V Tp + V Tn x √β R )/(1 +√β R ) where V Tp is threshold voltage of P channel MOS transistor V Tn is threshold voltage of N channel MOC transistor and β R is a coefficient representative of the size of the transistor and can be illustrated by: β R ∝ {(W/L)n}/{(W/L)} where W is a width of gate of MOS transistor L is a width of channel of MOS transistor (W/L)n is a W/L ratio of N channel MOS transistor and (W/L)p is a W/L ratio of P channel MOS transistor. Generally, the process constants are determined so that the threshold level V LT becomes approximately half of the source voltage Vcc . As can be seen from the foregoing discussion, the logical threshold level can be adjusting V Tp , V Tn or β R . Therefore, the threshold level V LT can be appropriately adjusted in order to satisfy the foregoing condition. It should be noted that, in order to adjust V Tp and V Tn , it becomes necessary to adjust the concentration of impurity to be dopped in the channel region of the MOS transistors. Therefore, it would be more convenient to adjust the threshold level by adjusting β R by adjusting the size of the transistor. Namely, in order to satisfy the foregoing condition, the relationship (W/L)p > (W/L)n is established to set β R at smaller value to satisfy 0.5 < K < 1. Fig. 5 shows variation of the CMOS inverter according to variation of the input signal level. In Fig. 5 , line A shows original threshold level (approximately half of Vcc) of CMOS inverter and line B shows shifted threshold level to satisfy the foregoing condition. As can be seen herefrom, the shifted threshold level V LT is set between the input signal levels V OFF and V ON to assure detection of the switching state of the signal generating switch. Fig. 6 shows an input protection circuit for the electronic circuit according to the present invention. In the following discussion, the common elements to the foregoing first embodiment will be represented by the same reference numerals and neglected the detailed discussion in order to avoid redundancy and confusion. In the shown embodiment, the detector circuit in the former input circuit of Figure 1 is replaced in accordance with the present invention, with a buffer circuit 50 associated with an oscillator 51 , a switching circuit 52 and an inverter 53 . The oscillator 51 generates periodic signal for periodically triggering the sampling circuit 31 . Therefore, the periodic signal of the oscillator 51 controls sampling period of the sampling circuit 31 . The periodic signal is also fed to the switching circuit 52 via the inverter 53 for controlling ON and OFF of the switching circuit. Therefore, the switching circuit 52 is driven by the inverted periodic signal having opposite phase to that for the sampling circuit 31 . As can be seen from Fig. 6 , the switching circuit 52 is provided in parallel to the pull-up resistor 26 . Therefore, when the switching circuit 52 is turned ON, a shorting circuit for the pull-up resistor 26 is established. The buffer circuit 50 generally has a logical threshold level Vth which is half of the source voltage Vcc . Similarly to the former embodiment, the resistances R and r of the protection resistor 22 and the pull-up resistor 26 are determined so as to satisfy the following conditions: (r x Vcc)/(R + r) < (Vcc/2) and (Vcc/R) > Ic where Ic is necessary current for causing breakage of the oxidation layer at the connector 27 , e.g. higher than or equal to 1 mA. The former formula has to be satisfied so that the threshold level Vth can be set at an appropriate level in order to assure detection of ON and OFF states of the signal generating switch 29 . Namely, when the signal generating switching is in ON state, the input signal level at the input terminal A is held lower than the threshold level Vth when the former formula is satisfied. On the other hand, the latter formula has to be satisfied so as to assure breakage of the oxidation layer in the connector 27 for assuring electrical signal transmission. Fig. 7 shows waveforms at various points in the input protection circuit of Fig. 6. Fig. 7(a) shows waveform showing variation of potential at the input terminal while the switching circuit 52 is maintained at OFF state. The shown waveform occurs upon turning the signal generating switch 29 from ON state to OFF state. As can be seen from Fig. 7(a) , triangular spike noises are super imposed on the input signals, which triangular spikes are generated in various source. Fig. 7(b) shows the waveform of the periodic signal generated by the oscillator. The waveform of the output of the inverter 53 has opposite phase to the periodic signal of the oscillator 51 , as shown in Fig. 7(c) . While the inverter output is maintained at HIGH level, the switching circuit 52 is in ON state for showing the pull-up resistor 26 . Therefore, the source voltage Vcc is directly supplied to the protection resistor 22 . By alternating switch position between ON and OFF of the switching circuit 52 , the potential at the input terminal A varies as shown in Fig. 7(d) . As can be seen from Fig. 7(d) , the potential at the input terminal A becomes HIGH level irrespective of the switch position of the signal generating switch 29 while the switching circuit 52 is held ON. Therefore, by the effect of the switching circuit 52 , the potential at the input terminal A falls LOW only when the switching circuit 52 is held OFF and the signal generating switch 29 is held ON. The potential at the input terminal A is periodically sampled by the sampling circuit 31 in synchronism with the periodic signal of the oscillator 51 . The sampling circuit 31 performs comparing operation as set forth with respect to the former circuit of Fig. 1 so as to remove variation of the potential at the input terminal A caused due to alternation of the switch position of the switching circuit 52 . Therefore, as can be seen from Fig. 7(f) , the sampling circuit 31 extracts the factor showing ON and OFF state of the signal generating switch 29 . As can be seen from Fig. 7(f) , the output level of the sampling circuit 31 turns into HIGH level at a time t₂ with a delay time from a time t₁ at which the signal generating switch 29 is actually turned OFF. This delay corresponds to the number of periodic signals, which number corresponds to the number of sampled input signal data to be compared in the sampling circuit 31 . Fig. 7(e) shows current flowing through the protection resistor 22 . As can be seen, the current through the protection resistor 22 flows in a pulsatile form. While the signal generating switch 29 is held OFF, the circuit across the protection resistor 22 is held broken. Therefore, no current flows through the protection resistor 22 . When the switching circuit 52 is in ON state, current I₁ flows through the protection resistor 22 . On the other hand, when the switching circuit 52 is in OFF state, current I₂ flows through the protection resistor 22 and the pull-up resistor 26 . The current value of the currents I₁ and I₂ can be illustrated by the following equations: I₁ = Vcc/R I₂ = Vcc/(R + r) The current flowing through the protection resistor 22 thus varies between the maximum value I₁ and the minimum value I₂ across an average value I₀ The average current value I₀ is set at a value greater than a standard value, i.e. 1 mA. However, it is not essential to set the average current value I₀ at the greater value than the standard value. Namely, the oxidation layer has a property that the conductivity is maintained after once broken by greater current than the standard current, even when the current value drops below the standard value. Therefore, as long as the maximum current I₁ is greater than the standard value, the average value can be below the standard value. In the foregoing circuit while the sampling circuit 31 performs sampling of the input signals through the input terminal A , the switching circuit 52 is held OFF to establish the circuit through the pull-up resistor 26 and the protection resistor 22 . By this, the relatively large voltage variation is caused depending upon the switch position of the signal generating switch 27 and to adjust the potential at the input terminal A during On state of the signal generating switch 29 below the threshold level Vth (= Vcc/2). On the other hand, while the smapling circuit 31 is not active, the pull-up resistor 26 is by-passed for providing increased current for assure signal transmission through the connector 27 . Fig. 8 shows practical implementation of the input protection circuit of Fig. 6. The shown construction of the protection circuit is fabricated as IC chip. As can be seen Fig. 8 , the pull-up resistor 26 and the switching circuit 52 are formed by MOS transistors and practically implementing utilizing ON/OFF resistance thereof. It may also be possible to form the pull-up resistor 26 by diffusion resistor. On the other hand, the sampling circuit 31 is formed by D flip-flop 60 , JK flip-flop 61 and AND gate 62 . In addition, a delay element 63 is provided for providing a set-up hold time for the JK flip-flop 62 . As can be clear from this, according to the shown embodiment, all elements for formulating the input protection circuit can be fabricated through standard MOS process. Therefore, the production process can be simplified and thus can substantially reduce the production cost without degrading performance.

Claims: An input protection circuit for an electronic circuit comprising: clamping diodes (24, 25) connected between an input terminal (A) connected to an input signal source including a signal generating switch (29) and a power source terminal (Vcc) and between said input terminal (A) and a grounding terminal; a capacitor (23), one electrode of which is connected to said input terminal (A) and the other electrode of which is connected to one of said power source terminal (Vcc) and said grounding terminal; and a pull resistor (26) for performing at least one of pulling-up and pulling down of the potential at said input terminal (A), characterised by: - a semiconductor switch (52) disposed in parallel with said pull resistor (26) for establishing and blocking a by-pass circuit by-passing said pull resistor (26); a buffer circuit (50) connected to said input terminal; a sampling circuit (31) connected to the output of said buffer circuit (50) for sampling the buffer output over a predetermined sampling period; means (51) for selectively operating said semiconductor switch (52) and said sampling circuit (31) for maintaining said semiconductor switch (52) at OFF position during sampling period of said sampling circuit and maintaining said semiconductor switch (52) at ON position in a period out of said sampling period; and a protection resistor (22) disposed between said signal generating switch (29) and said input terminal (A). An input protection circuit according to claim 1, further characterised in that said means (51) for selectively operating said semiconductor switch (52) comprises an oscillator. An input protection circuit according to claim 1 or claim 2, further characterised in that said pull resistor (26) and said semiconductor switch (52) are formed as respective MOS transistors. An input protection circuit according to claim 1 or claim 2, further characterised in that said pull resistor (26) is a diffusion resistor. An input protection circuit according to any preceding claim, further characterised in that said sampling circuit (31) comprises a D flip-flop (60), a JK flip-flop (61) and an AND gate (62). An input protection circuit according to any preceding claim, further characterised in that the resistance (R) of the pull resistor (26) and the resistance (r) of the protection resistor (22) are chosen to satisfy the conditions (r x Vcc)/(R + r) < (Vcc/2) and (Vcc/R) > Ic where Vcc is the operating voltage of said power source terminal and Ic is the current necessary to cause breakage of an oxidation layer at a connector (27) connected to said protection resistor (22) at its terminal remote from said input terminal (A).

Inventors: ABE NORIYUKI, FUJIKI NORIO, KIMURA TAKASHI, ABE, NORIYUKI, FUJIKI, NORIO, KIMURA, TAKASHI
Applicants: NISSAN MOTOR, NISSAN MOTOR CO., LTD.
Application year: 1989
Main classification: H02H9
IPC codes: H02H9, H03K5