Power supply

Abstract: An inverter power supply with improved power factor comprises a source of low frequency AC voltage and an inverter having a pair of series connected first and second transistors controlled to alternately turn on and off at a high frequency for providing a high frequency AC voltage to a load. A diode-bride full-wave rectifier is connected to provide a DC voltage which is charged to at least one capacitor which in turn provides a DC voltage input to the inverter. An inductor, which counteracts the capative reactance of the capacitor for improving the power factor, is inserted in series with the AC voltage source across the input of the diode-bridge rectifier. The first and second transistors of the inverter also operate to interrupt or chop at the high frequency a current fed through the inductor from the AC voltage source so as to charge the capacitor through the rectifier by the inductor. During each one cycle of the AC voltage from the AC voltage source, the first and second transistors are both serve to chop the current through the inductor for charging the capacitor as well as to provide the current to the load. Further, the rectifier shares at least two diodes of the inverter for establishing a loop for charging the capacitor.

Description: TECHNICAL FIELD The present invention is directed to a power supply, and more particularly to an inverter AC power supply providing a high frequency AC voltage to a load with an improved power factor. BACKGROUND ART In an inverter AC power supply for use to drive such as discharge lamps and electric motors, it is required to smooth an input voltage applied to the inverter by the use of a capacitor. It is known that the capacitor acts as a reactive load with a high capative reactance and therefore reduces a power factor. To eliminate the adverse effect of the capacitor, an inductor or choke coil may be coupled with the capacitor to reduce the capative reactance of the capacitor. However, due to the fact that a source voltage for the inverter is normally a commercial line voltage of a relatively low frequency, the inductor or choke coil is limited to have a high inductance for such low frequency and therefore bulky, which unduly increases the size of the power supply and therefore should be avoided for compact design of the power source. To this end, it has been proposed to chop the voltage applied to the inverter input at a high frequency to thereby permit the use of a choke coil of less inductance and size. However, such chopping operation requires an additional switching circuit to the inverter circuit and therefore adds complexity to the overall power supply circuit with considerable duplication of components. For simplifying the circuit and reducing the number of components, U.S. Pat. No. 4,564,897 proposes to use common component both to the inverter and chopper operations. Unfortunately, the patent is found unsatisfactory as the common components are limited to only one of plural switching elements and there are still a greater number of other components required separately for the inverter and chopper operations. Therefore, it is most desirous to share not only one switching element but also the other components as many as possible for further reducing the number of duplicated components and therefore the size and cost of the power supply. To eliminate the above problem and deficiency, the present invention discloses an improved inverter power supply with the features of claim 1 and claim 2, resp. The present invention discloses still other advantageous features particularly for use with polyphase AC voltage source. These and still other objects and advantages will become more apparent from the following description of the embodiments of the present invention when taking in conjunction with the attached drawings. FIG. 1 is a circuit diagram of a power supply in accordance with a first embodiment of the present invention; FIG. 2 is waveform chart illustrating waveforms at several points in the above circuit; FIGS. 3A to 3D are respectively diagrams illustrating current flows in the operation of the circuit during a positive half cycle of an input AC voltage; FIGS. 4A to 4D are respectively diagrams illustrating current flows in the operation of the circuit during a negative half cycle of the input AC voltage; FIG. 5 is a circuit diagram illustrating a modification of the circuit of FIG. 1; FIG. 6 is a circuit diagram illustrating a second modification of the circuit of FIG. 1; FIG. 7 is a circuit diagram of a power supply in accordance with a second embodiment of the present invention; FIG. 8 is a circuit diagram of a modification of the circuit of FIG. 7; FIG. 9 is a circuit diagram of a switching regulator which is one application form of the present invention; FIG. 10 is a waveform chart illustrating waveforms at several point in the circuit of FIG. 9; and FIG. 11 is a circuit diagram of a power supply for use with a polyphase AC voltage source in accordance with a third embodiment of the present invention; FIGS. 12 and 13 are circuit diagrams respectively illustrating modifications of the third embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS First embodiment 〈FIGS. 1 to 4〉 Referring now to FIG. 1, there is shown a power supply in accordance with a first embodiment of the present invention. The power supply comprises an inverter 1 providing a high frequency AC voltage to a load which may include inductive reactance or capative reactance. For example, the power supply may be utilized to drive electric motors, discharge lamps, or may construct switching regulators. In the following description and drawings, the load is expressed as a resistive load RL for simplicity. The inverter 1 comprises a pair of first and second switching elements or bipolar transistors Q₁ and Q₂ , and a pair of first and second capacitors C₁ and C₂ which are connected in a half-bridge configuration with the load RL . First and second transistors Q₁ and Q₂ are controlled, as shown by respective control signals S₁ and S₂ in FIG. 2, to alternately turn on and off at a high frequency for switching the DC voltage developed across each of first and second capacitors C₁ and C₂ to provide a high frequency AC voltage, as shown by V RL in FIG. 2, to the load RL . First and second diodes D₁ and D₂ are connected in anti-parallel relation respectively to transistor Q₁ and Q₂ . The inverter 1 is supplied with a DC voltage from a full-wave rectifier 2 connected to a low frequency AC voltage source V s which is normally a commercial AC voltage of 50 or 60 Hz. Connected between the AC voltage source V s and the rectifier 2 is a low pass filter 3 composed of an inductor L₁ and a capacitor C₃ . The rectifier 2 is a diode bridge which comprises, in addition to first and second diodes D₁ and D₂ , third and fourth diodes D₃ and D₄ . The output of the rectifier 2 is supplied to the inverter 1 as being smoothed by capacitor C₁ and C₂ so as to provide a smoothed DC voltage to the inverter input. An inductor L₂ is inserted in series with the AC voltage source V s across the rectifier input so as to counteract the capative reactance of capacitors C₁ and C₂ for improving the power factor. The inductor L₂ is cooperative with first and second switching transistors Q₁ and Q₂ to provide an interrupted AC current I L2 , as shown in FIG. 2, which is rectified through the rectifier 2 and is supplied to charge capacitors C₁ and C₂ as being smoothed thereat. The above operation may be referred to as a chopper operation in contrast to the inverter operation in which first and second switching transistors Q₁ and Q₂ operate to switch the DC voltage of each of first and second capacitors C₁ and C₂ for providing the high frequency AC voltage to the load RL . In FIG. 1, the components effecting the above chopper operation are enclosed by a dotted block 4 which may be termed as a chopper circuit in contrast to the inverter circuit denoted by the dotted block 1 . From FIG. 1, it can be readily understood that the chopper circuit 4 and the inverter circuit 1 shares a large number of components and further that the inverter circuit 1 shares first and second diodes D₁ and D₂ with the rectifier 2 . Thus, the power supply circuit of the present invention can be constructed with a minimum number of components. The above chopper and inverter operations will be explained in detail with reference to FIGS. 2 to 4. During a positive half cycle of the AC voltage Vin from AC voltage source V s , first and second switching transistors Q₁ and Q₂ are made alternately conductive and non-conductive to repeat producing an inverter-alone [first chopper] mode alternated by an inverter-and-charge [second chopper] mode. The inverter-alone [first chopper] mode is a condition occurring in a time period, for example, between t₁ and t₂ of FIG. 2, in which condition first transistor Q₁ is conductive to establish a loop from the capacitor C₁ , transistor Q₁ , and load RL to flow a current I RL from capacitor C₁ through load RL in the direction by a dotted arrow in FIG. 3A. Also in this condition, another closed loop is formed to flow a current I L2 in the direction, as shown in FIG. 3B, from AC voltage source V s through inductor L₁ , inductor L₂ , third diode D₃ , transistor Q₁ , and back to AC voltage source V s , thereby storing an energy into inductor L₂ . As shown in FIG. 2, the current I L2 is increasing up to a level corresponding to an instantaneous AC voltage. Subsequently, when first transistor Q₁ becomes non-conductive and second transistor Q₂ is instead made conductive, the circuit comes into the inverter-charge [second chopper] mode which is a condition occurring in a time period of t₂ - t₃ of FIG. 2. In this condition, a loop is formed to include second transistor Q₂ , second capacitor C₂ , and load RL to flow from second capacitor C₂ a current I RL of opposite direction through the load RL , as indicated by a dotted arrow in FIG. 3C. Also in this condition, another loop is formed to release the energy of inductor L₂ through third diode D₃ , first and second capacitors C₁ and C₂ , second diode D₂ , and AC voltage source V s , as shown by an arrow X of FIG. 3D, to charge first and second capacitors C₁ and C₂ . At the same time, an additional loop is formed to flow a current from the inductor L₂ through third diode D₃ , first capacitor C₁ , load RL , and AC voltage source V s , as indicated by an arrow Y in the same figure. In this manner, during the positive half cycle of the AC voltage source V s , first transistor Q₁ serves both for the chopper operation of charging capacitors C₁ and C₂ and also for the inverter operation of providing the current I RL to the load RL , while second transistor Q₂ serves only for the inverter operation. During a negative half cycle of the AC voltage source V s , the above two modes are likewise repeated. For instance, when second transistor Q₂ is made conductive in a time period of t₅ - t₆ in FIG. 2, the circuit comes into the inverter-alone [first chopper] mode in which capacitor C₂ provides a current I RL to the load RL through second transistor Q₂, as shown in FIG. 4A. At the same time, AC voltage source V s supplies a current I L2 through the second transistor Q₂ , fourth diode D₄ , inductor L₂ in the direction as indicated by an arrow in FIG. 4B, to store the energy in the inductor L₂ . Likewise in the positive half cycle, the current I L2 is increasing to a level corresponding to an instantaneous voltage of the AC voltage source V s . Upon subsequent non-conduction of second transistor Q₂ and conduction of first transistor Q₁ indicated by a time period of t₆ - t₇, the circuit comes into the inverter-and-charge [second chopper] mode in which first transistor Q₁ acts to flow the current I RL from first capacitor C₁ to the load RL in the direction as indicated by an arrow in FIG. 4C to effect the inverter operation. At the same time, the energy stored in the inductor L₂ is released through AC voltage source V s , first diode D₁ , first and second capacitors C₁ and C₂ , and fourth diode D₄ , as indicated by an arrow X in FIG. 4D, to charge first and second capacitors C₁ and C₂ . Also at this occurrence, inductor L₂ causes a current to circulate though AC voltage source V s , load RL , second capacitor C₂ , fourth diode D₄ , and back to the inductor L₂ , as indicated by an arrow Y in the same figure. In this manner, the circuit operates in the negative half cycle of the AC voltage to likewise repeat the chopper and inverter operations, wherein first transistor Q₁ serves only for the inverter operation, but instead second transistor Q₂ serves both for the inverter and chopper operations. In this manner, first and second transistors Q₁ and Q₂ are equally utilized in one complete cycle of the AC voltage for the chopper operation and therefore share stress uniformly, whereby presenting a well balanced transistor configuration and enabling to use the transistor of the same characteristics for first and second transistors Q₁ and Q₂ . It is noted at this time that, as shown in FIG. 2, the current I L2 passing through inductor L₂ shows a sinusoidal envelop which is consistent with improving the power factor. It should be also noted that first and second diodes D₁ and D₂ serve to form the loops respectively in the positive and negative half cycles for charging both the first and second capacitors C₁ and C₂ in such a manner as to provide a smoothed DC voltage to the inverter input. Whereby, the inverter can successfully produce a high frequency AC load current with reduced ripples. By the provision of the low pass filter 3 between the voltage source V s and the inductor L₂ , an input current I in to the power supply circuit can be free from being influenced by the high frequency switching operation of the transistors and therefore can retain a continuous wave form to thereby reduce distortion factor. FIG. 5 shows a modification of the first embodiment which differs from the first embodiment only in that MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is utilized as first and second switching transistors Q₁ and Q₂ . The modification utilizes a parasitic diode intrinsic to the MOSFET as defining first and second diode D₁ and D₂ , thus further reducing the number of components or diodes. The operation and the other configuration are identical to the first embodiment. Therefore, like numerals are used to designate like components for an easy reference purpose. FIG. 6 shows another modification of the first embodiment in which first and second switching elements Q₁ and Q₂ are each of bipolar transistor having a base-emitter path bypassed by each of diodes D₁₁ and D₁₂ . Diodes D₁₁ and D₁₂ are connected in anti-parallel relation respectively to first and second switching transistors Q₁ and Q₂ . Each of diodes D₁₁ and D₁₂ is cooperative with a base-collector P-N junction of corresponding transistor to define each of the first and second diodes D₁ and D₂ which allows the reverse current flow across first and second switching transistors Q₁ and Q₂ . In this modification, the base-collector P-N junction can withstand most of the voltage applied across the transistor so that the additional diodes D₁₁ and D₁₂ may be of low voltage withstanding capability and therefore of less expensive. Thus, the modification makes the use of a base-collector P-N junction of the bipolar transistor to form the reverse current flow path only with the addition of the diodes D₁₁ and D₁₂ of low cost economy. Since the additional diodes D₁₁ and D₁₂ are utilized as conductive elements to bypass the base-emitter path of the transistor, they may be replaced by suitable impedance elements. The operation and other configuration are identical to those of the first embodiment and therefore like numerals are employed to designate like components. It is noted at this point that the first and second switching elements may be alternatively power MOSFET, SI(static induced) thyristor, or GTO (gate turn off) thyristor having the like junction capable of forming the first and second diodes. Second embodiment 〈FIG. 7〉 Referring to FIG. 7, there is illustrated a power supply in accordance with a second embodiment of the present invention, which is similar in configuration to the first embodiment except for particular capacitor location in the inverter. Like numerals are employed like components as in the first embodiment for an easy reference purpose. In this embodiment, first capacitor C₄ is connected across the series pair of first and second transistors Q₁ and Q₂ , while second capacitor C₅ is connected in series with a load RL across the first transistor Q₁ . In operation, when the first transistor Q₁ becomes conductive while the second transistor Q₂ is non-conductive during a positive half cycle of the AC voltage from voltage source V s , the voltage source V s flows a current of increasing magnitude through inductor L₂ , third diode D₃ , first transistor Q₄ and back to the voltage source V s to store energy into the inductor L₂ . At the same time, first transistor Q₁ also acts to flow a current from second capacitor C₅ through the load RL as indicated by a solid arrow in FIG. 7. Subsequently, when first transistor Q₁ becomes non-conductive and in stead second transistor Q₂ becomes conductive within the same cycle, the inductor L₂ release its energy through third diode D₃ , first capacitor C₄ , diode D₂ , and voltage source V s to charge first capacitor C₄ , thereby accumulating a smoothed DC voltage into first capacitor C₄ . At this occurrence, another current is caused to flow from inductor L₂ through third diode D₃ , second capacitor C₅ , load RL , and voltage source V s . Simultaneously, second transistor Q₂ operates to flow a current from first capacitor C₄ through second capacitor C₅ , load RL , and second transistor Q₂ in the direction indicated by a dotted arrow in FIG. 7. Thus, load RL receives a voltage which is a voltage V C4 accumulated in first capacitor C₄ minus a voltage V C5 in second capacitor C₅ . During a negative half cycle of the AC voltage from AC voltage source V s , when first transistor Q₁ becomes non-conductive and in stead second transistor Q₂ becomes conductive, voltage source V s supplies a current through second transistor Q₂ , fourth diode D₄ , inductor L₂ , and back to voltage source V s to store energy into inductor L₂ . At this occurrence, second transistor Q₂ operates to flow a current from first capacitor C₄ , second capacitor C₅ , load RL , second transistor Q₂ , and back to first capacitor C₄ to provide the load current as indicate by the dotted arrow. As stated previously, the voltage applied to load RL is the difference (V C4 -V C5 ) between voltage V C1 of first capacitor C₄ and voltage V C5 of second capacitor C₅ . Upon subsequent occurrence in which first and second transistors Q₁ and Q₂ becomes respectively conductive and non-conductive, inductor L₂ releases its energy through AC voltage source V s , first diode D₁ , first capacitor C₄ , and fourth diode D₄ to charge first capacitor C₄ , thereby accumulating a smoothed DC voltage in first capacitor C₄ . Also at this occurrence, first transistor Q₁ operates to flow a current from capacitor C₅ to load as indicated by the solid arrow in FIG. 7, applying the voltage V C5 of second capacitor C₅ to load RL . In this manner, first and second switching transistors Q₁ and Q₂ repeat alternately conductive and non-conductive for effecting the inverter operation of applying a high frequency AC voltage to load RL while at the same time effecting the chopper operation of charging capacitors C₄ and C₅ through inductor L₂ and diode-bridge rectifier of D₁ to D₄ in such a way as to provide the smoothed voltage to the inverter input. In this embodiment, the capacitance of second capacitor C₅ is selected such that the voltage V C5 accumulated in second capacitor C₅ is half the voltage V C4 of first capacitor C₄ [V C5 = ½ V C4 ] for providing a symmetrical high frequency AC voltage or current to load RL , as shown in FIG. 2. FIG. 8 illustrate a modification of the second embodiment which is similar in configuration to the second embodiment except that second capacitor C₅ is connected in series with load RL across second transistor Q₂ . The operation of the modification is identical to the second embodiment and is deemed unnecessary. Like components are designated by like numerals as in the second embodiment. It should be noted at this time that the second embodiment and the modification thereof may also utilize a MOSFET for each of first and second switching transistors Q₁ and Q₂ , as discussed in the modification of the first embodiment with reference to FIG. 5, or further may adopt the like switching element as discussed in the other modification of the first embodiment with reference to FIG. 6. FIG. 9 illustrates a switching regulator which is one application form of the present invention. The basic circuit configuration is identical to the first embodiment of FIG. 1, and therefore like components are designated by like numerals. In the circuit, an output transformer T f has its primary winding connected to the output of the inverter and has its secondary winding connected to a DC load Z d through several components. First and second switching transistors (FETs) Q₁ and Q₂ are controlled to alternately turn on and off with an all-off period therebetween in which they are simultaneously off. Such all-off period can be realized by varying the on-period or duty ratio with respect to each of the switching transistors Q₁ and Q₂ . When either of transistors Q₁ or Q₂ is on, the circuit provides a rectangular output pulse to DC load Z d . When, on the other hand, both of transistors Q₁ and Q₂ are off, the circuit provide a zero inverter output voltage V₀ during which period, a feedback diode D f is conductive to provide a zero output voltage V d to a DC output circuit including DC load Z d . Thus, the circuit can effect voltage control over the DC load Z d by using a PWM technique. FIG. 10 shows waveforms at several points of the circuit. As seen in FIG. 10, when transistor Q₁ is on within the positive cycle of the source voltage V in , a current I L2 through inductor L₂ will increases linearly to a level corresponding to source voltage V in . Upon subsequent turning off of transistor Q₁ , second diode D₂ is conductive to apply a voltage (V in - V c ) to inductor L₂ . Since the voltage (V in - V c ) is negative, the current I L2 through inductor L₂ will be reduced. When current I L2 is decreased to zero, second diode D₂ will be no longer conductive. At this occurrence, however, due to the presence of an inductor L d in the DC output circuit, a diode D f becomes conductive to provide to DC load Z d a resulting voltage V d having a waveform as seen in FIG. 10. Therefore, by suitably adjusting the time period in which transistors Q₁ and Q₂ are both made non-conductive, it is possible to control the mean value of the voltage V d and in turn the DC voltage V d0 applied to DC load Z d . The above technique can be equally utilized to control an AC load. Third embodiment 〈FIG. 11〉 Referring to FIGS. 11, there is shown a power supply in accordance with a third embodiment of the present invention. The power supply of this embodiment is to be operated by a three-phase AC voltage source for driving a load of greater power requirement. In the figure, a load L is connected to the inverter output through an output transformer T f . The circuit is identical to that of the first embodiment except for a rectifier configuration. Like numerals designate like components as in the first embodiment for an easy reference purpose. An additional pair of series connected fifth and sixth diodes D₅ and D₆ is connected in parallel with the series pair of third and fourth diodes D₃ and D₄ . The three phase voltage source (not shown) is coupled to a rectifier composed of diodes D₁ to D₆ with a first phase line L A connected through inductor L₂ to the point of connection between first and second switching transistors Q₁ and Q₂ (i.e. between first and second diodes D₁ and D₂ ), with a second phase line L B connected to the point of connection between third and fourth diodes D₃ and D₄ , and with a third phase line L C connected to a point of connection between fifth and sixth diodes D₅ and D₆ . Filter capacitors C₆ and C₇ are respectively inserted between first and second phase lines L A and L B and between first and third phase lines L A and L C . In this circuit, the additional pair of diodes D₅ and D₆ and inductor L₂ are cooperative with first and second diodes D₁ and D₂ and with first and second transistors Q₁ and Q₂ to form an identical circuit configuration to the first embodiment, thereby effecting the same chopper operation of charging capacitors C₁ and C₂ . Thus, the third phase line LC connected between diodes D₅ and D₆ sees a like sinusoidal current I₃ as obtained in the first embodiment. Likewise, the second phase line LB sees a sinusoidal current I₂ also because that diodes D₁ to D₄ , inductor L₂ , and transistors Q₁ and Q₂ form an identical circuit configuration to the first embodiment. With this result, first phase line L A sees a like sinusoidal current I₁ from the known relation that I₁ + I₂ + I₃ = 0 . Therefore, it is confirmed that the power supply of the circuit retains an improved power factor. FIGS. 12 and 13 show modifications of the third embodiment which differs in the number of inductors L₂ inserted between the three phase AC voltage source and the diode rectifier. The other configuration is identical to the third embodiment and therefore like numerals are employed to designate like components. These modifications are based upon the requirement that first, second, or third phase line L A , L B , L C could never see a short-circuit current when either of transistor Q₁ or Q₂ is turned on. Therefore, as seen in the above third embodiment, only one inductor L₂ is enough when inserted in the first phase line LA . Also, as seen in the modification of FIG. 12, inductors L₂ are required to be inserted respectively in second and third phase lines LB and LC . Alternatively, as seen in the modification of FIG. 13, inductors L₂ are required to be inserted respectively in all of first, second, and third phase lines L A , L B and L C . In the circuit of FIGS. 11 and 12, it is difficult to obtain balanced three phase sinusoidal waveforms for the input currents to the circuit due to the fact that current I₁ is not identical to current I₂ or I₃ . However, with the circuit of FIG. 13, it is easily possible to obtain such balanced three phase sinusoidal waveforms by suitably selecting the inductance of the three inductors L₂ . Although in the circuits of FIGS. 11 to 13, MOS transistor is utilized as first and second transistors Q₁ and Q₂ , it is of course possible to utilize bipolar transistor, MOSFET with a parasitic diode, SI(static induced) thyristor, or GTO (gate turn off) thyristor, as discussed in the previous embodiments and modifications. Further, it is also possible to modify the present embodiment into the arrangements disclosed in FIGS. 6, 7, and 8. It should be noted that the diodes utilized in the above modifications and modifications to form the full-wave rectifier can be replaced by a corresponding element or device having a unidirectional current path such as a reverse conducting SCR (silicon-controlled rectifier), and that the term "diode means" are utilized in the claims simply as representative of diode and such equivalent element or device. Therefore, the terms "diode means" should not be understood to be limited in a narrow sense to the diode itself and to refer generally to such unidirectional element or device. LIST OF REFERENCE NUMERALS 1 inverter 2 rectifier 3 low pass filter 4 chopper circuit Vs AC voltage source RL load Q₁ first switching transistor Q₂ second switching transistor D₁ first diode D₂ second diode D₃ third diode D₄ fourth diode D₅ diode D₆ diode D₁₁ diode D₁₂ diode C₁ first capacitor C₂ second capacitor C₃ capacitor C₄ first capacitor C₅ second capacitor C₆ filter capacitor C₇ filter capacitor L₁ inductor L₂ inductor T f transformer Z d DC load D f feedback diode L d inductor

Claims: A power supply comprising: a source of low frequency AC voltage (Vs); an inverter (1) comprising a pair of series connected first and second unidirectional switching elements (Q1, Q2) which are controlled to alternately turn on and off at a high frequency for switching an input DC voltage to provide a high frequency AC voltage to a load (RL), said first and second switching elements (Q1, Q2) being connected in an antiparallel relation respectively with first and second diodes (D1, D2), said first and second switching elements (Q1, Q2) defining therebetween a first point of connection; a full-wave rectifier (2) providing a DC voltage from said AC voltage source, said rectifier (2) being a bridge circuit comprising said series pair of said first and second diode means (D1, D2) and another pair of series connected third and fourth diode means (D3, D4) in parallel with said series pair of said first and second diode means (D1, D2), said third and fourth diode means (D3, D4) defining therebetween a second point of connection; capacitor means (C1, C2) supplied with a DC voltage through said full-wave rectifier (2) from said AC voltage source (Vs) to provide a DC voltage to said inverter input; inductor means (L1, L2) connected in series with said AC voltage source between said first and second points of connection; characterized in that said first and second switching elements (Q1, Q2) of said inverter (1) define a chopper which operates to repeat interrupting an AC voltage from said AC voltage source (Vs) so as to develop at said inductor means (L1, L2) a resulting voltage and allow said resulting voltage to be fed through said full-wave rectifier (2) for providing said DC voltage to said capacitor means (C1, C2). A power supply comprising: a source of low frequency polyphase AC voltage; an inverter comprising a pair of series connected first and second unidirectional switching elements (Q1, Q2) which are controlled to alternately turn on and off at a high frequency for switching an input DC voltage to provide a high frequency AC voltage to a load (L), said first and second switching elements (Q1, Q2) being connected in anti-parallel relation respectively with first and second diode means (D1, D2), said first and second switching elements (Q1, Q2) defining therebetween a first point of connection; a full-wave rectifier providing a DC voltage from said n phase AC voltage source, said rectifier comprising a pair of said first and second diode means (D1, D2) and n-1 pairs of third and fourth diode means (D3, D4; D5, D6), said diode means being connected in series across said pair of said first and second unidirectional switching elements (Q1, Q2) with their forward direction opposite to that of said first and second switching elements (Q1, Q2), said third and fourth diode means (D3, D4) in each pair defining therebetween a second point of connection; said n-phase AC voltage source connected to said first point of connection through a first phase line, and to said second points of connection in said n-1 pairs of said third and fourth diode means (D3, D4) respectively through a second phase line to a n-th phase line; capacitor means (C1, C2) supplied with a DC voltage through said full-wave rectifier from said AC voltage source to provide a DC voltage to said inverter input; inductor means (L2) inserted in at least one of said first to n-th phase lines such that said inductor means (L2) is connected in series with said n phase AC voltage source between said first point of connection and said second point of connection in each of said n-1 pairs of said third and fourth diode means (D3, D4); said first and second switching elements (Q1, Q2) of said inverter defining a chopper which operates to repeat interrupting an AC voltage from said n phase AC voltage source so as to develop at said inductor means a resulting voltage and allow said resulting voltage to be fed through said full-wave rectifier (2) for providing said DC voltage to said capacitor means (C1, C2). A power supply as set forth in claim 1 or 2, wherein said capacitor means comprises a pair of first and second capacitors (C1, C2) connected in series across said first and second switching elements (Q1, Q2) with each of said first and second capacitors (C1, C2) connected in series with said load (RL, L) across each of said first and second capacitors (C1, C2). A power supply as set forth in claim 1 or 2, wherein said capacitor means comprises a first capacitor (C1) connected across said pair of first and second switching elements (Q1, Q2) and further including a second capacitor (C2) which is connected in series with said load (RL, L) across one of said first and second switching elements (Q1, Q2). A power supply as set forth in claim 1 or 2, wherein said load comprises a rectifying-and-smoothing circuit and a DC load. A power supply as set forth in claim 1 or 2, wherein at least one of said first and second switching elements (Q1, Q2) is controlled to vary its on-time period. A power supply as set forth in claim 1 or 2, wherein each of said first and second switching elements is a MOSFET including a parasitic diode which defines each of said first and second diode means (D1, D2). A power supply as set forth in claim 1 or 2, wherein each of said first and second switching elements (Q1, Q2) is a bipolar transistor having a baseemitter path bypassed by a conductive element (D11, D12), said bipolar transistor having a base-collector P-N junction which is cooperative with said bypassing conductive element (D11, D12) to define each of said first and second diode means (D1, D2) anti-parallel with the bipolar transistor (Q1, Q2). A power supply as set forth in claim 8, wherein said conductive element (D11, D12) is a diode.

Inventors: MAEHARA MINORU, MITANI MASATAKA, TAKAHASHI ISAO, MAEHARA, MINORU, MITANI, MASATAKA, TAKAHASHI, ISAO
Applicants: MATSUSHITA ELECTRIC WORKS LTD, TAKAHASHI ISAO, MATSUSHITA ELECTRIC WORKS, LTD., TAKAHASHI, ISAO
Application year: 1989
Main classification: H05B41
IPC codes: H05B41, H02M7, H02M5