Semiconductor wafer and method of dividing it

Abstract: A semiconductor wafer (11) which comprises at least two semiconductor devices (15a, 15b,...), each surrounded by a scribe lane (14) which at least partially is covered by a metal film (13). In said metal film (13) a plurality of perforations (16) such as hloes, slots, slits, rectangles, squares, crosses etc are formed. According to the invention the distance between said perforations (16), in any direction, is not greater than about 7 to 10 microns. Thus, after separation of the semiconductor devices (15a, 15b), for example by sawing along the device lane, no metal shards larger than 10 microns will be present on the separated devices.

Description: FIELD OF THE INVENTION The invention relates to a semiconductor wafer which comprises at least two semiconductor devices, a scribe lane formed between the semiconductor devices, at least a portion of the scribe lane being covered with a metal film having voids formed therein which are uniformly distributed over the entire area of the metal film in the scribe lane. The invention also relates to a method of separating semiconductor devices from such a wafer. BACKGROUND OF THE INVENTION In the manufacture of semiconductor devices, a plurality of integrated circuits are simultaneously prepared in a semiconductor wafer through the use of conventional photolithographic techniques. Thus, for example, a wafer may contain up to 1000 or more separate integrated circuits which have been formed on the substantially planar surface area of the wafer according to conventional techniques in the art as, for example, by diffusing or otherwise forming predetermined patterns in a silicon body. It is also convenient to provide a plurality of secondary devices such as contact pads, test monitor devices, devices for measurement and alignment, etc. on the planar surface adjacent the outer parimeter of each integrated circuit or other semiconductor device. Each single integrated circuit is of relatively minute dimensions so that it is convenient to simultaneously form a plurality in a single wafer while marking the boundaries between the individual devices by scoring along perpendicular axes referred to as scribe lanes or streets. In accordance with techniques well known in the art, after a semiconductor wafer has been formed into interconnected semiconductor devices, the chips are tested to identify those which contain properly functioning properties and are satisfactory and those improperly formed or malfunctioning and unsatisfactory. As mentioned earlier, it is common practice to put test, measurement, alignment and die seal structures in the scribing lanes. After testing, adjacent satisfactory chips are left joined together while unsatisfactory chips are separated or the entire wafer is separated and the unsatisfactory chips are discarded. Separation (or dicing) may be performed by conventional techniques such as sawing or laser cutting along the scribe lane. The scribing step itself, while relatively simple, is not free of problems. For example, the wafer contains a substantial amount of metallization in the area ofthe scribe lanes which, when sawed or separated often leaves relatively large jagged pieces of metal commonly referred to as shards or slivers that remain attached to the edge or edges of the semiconductor device. Such shards of metal often turn or bend over the scribe lane or break off interfering with the intended properties of the devices, for example by contacting bonding wire or other wires in the device. Such contact often results in an unsatisfactory, malfunctioning device that must be discarded resulting in a lowered yield of semiconductor devices from the manufacturing process. One of the greatest problems of large scale integration of, for example, electronic circuits, is that of obtaining a high enough yield on each wafer of circuits to be commercially profitable. As the number of devices per circuit increases, the yield often decreases proportionally. It is therefore highly desirable to minimize the number of devices that must be discarded as unsatisfactory. Moreover, because the scribing process may itself produce unsatisfactory devices, improvements in this step are of increasing importance. In Japanese Patent Application Publication (Kokai) No. JP-A-56-43,740, there is described a method for providing a semiconductor wafer with metal coating in the scribing area which can be scribed with a reduced risk of bending of the metal film by providing at the scribe lane a metal coating having a strip-like configuration and a row of slits arranged along the center lines of the metal film and oriented perpendicularly to the center lines. According to the Kokai, it is possible to protect the wafer from deterioration of properties by the use of such slits in the scribe areas since, if portions of metal film are bent during the scribing operation, the dimensions of the bent portions are limited to the spaces between adjacent slits with the maximum length being equal to the length of the slits so that in case of bending, the bent portion cannot come into contact with bonding wires or pattern elements. Such a construction, while fine for certain applications, would not qualify the semiconductor devices produced for certain other applications, such as, for example certain applications which require that the device conform to military standards, wherein the dimensions of any metal or metal shards present on the device must meet certain minimum size standards. For example, certain U.S. government specifications require that in such devices, metal shards or turnover may not exceed 0.4 mil (10 microns) in any given dimension. The devices of the Japanese Kokai, however, produce shards that are generally 2 to 5 mils (50 to 200 microns) rendering such devices unusable for such applications and rejectable as unsatisfactory. Additionally, in the device described in the Japanese Kokai, great precision in performing the sawing or separation is required and there is little tolerance for variation in the scribe operation. Moreover, as illustrated in the drawing of the publication, metal shard formation appears to be of concern only in the corners of the devices, the slits appearing to be present in the corners only. An object of this invention is the provision of a simple method for increasing the yield of satisfactory semiconductor devices in semiconductor wafers. Another object of the invention is the provision of a semiconductor wafer which may be variably and flexibly scribed and tested. Another object of the invention is the provision of a semiconductor device comprising a metal film which may be scribed along multiple scribe lanes without producing metal shards or bent portions that exceed 0.4 mils (or 10 microns) in any dimension. Another object of the invention is to provide a method of scribing semiconductor wafers in which the dimensions of metal shards or bends resulting from the scribing are controllable, predetermined and pre-designed. These and other objects of the invention will be apparent from the description of the invention which follows. SUMMARY OF THE INVENTION In accordance with the invention the wafer mentioned in the opening paragraph is characterized in that the scribe lane has a width of about 200 µm, that the voids have a size of 25 to 50 µm and that the distance between adjacent voids in any direction is 10 µm or less. The voids may take the form of squares, rectangles, holes, slits, crosses, triangles and combinations thereof and may be formed by means conventional in the art such as for example by chemical etching, plasma etching or ion milling. BRIEF DESCRIPTION OF THE DRAWING. Fig. 1 is a plan view of a portion of a wafer containing a plurality of interconnected semiconductor devices of the invention illustrating the metal limiting means of this invention; Fig. 2 is a top plan view of a portion of a wafer containing a plurality of semiconductor devices of the invention illustrating an alternative arrangement of the metal limiting means of the invention; Fig. 2A is a magnified plan view of a portion of a metal limiting means of the invention; Fig. 3 is a plan view of a portion of a process control monitor containing the metal limiting means of the invention, and Fig. 4 is a plan view of a portion of a wafer containing a plurality of prior art interconnected semiconductor devices illustrating the scribe area. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS For comparison, there is illustrated in Figure 4, the device of the Japanese Kokai discussed hereinabove showing portion of a semiconductor wafer 1 with a metal film coating 2 which has a width of 150 microns and includes a 50 micron wide scribe area 3. Reference numeral 4 designates bonding pads of respective dice or chips and the coating 2 has a strip-like configuration which consists of continuous metal and film portions 29 and with a row of slits 32 arranged along the center line 5 of the coating. Each slit is perpendicular to the center line 5 and has a width of 10 microns. The dimensions of bent portions of metal are disclosed to be limited to the space 33 between adjacent slits which is not further defined and the maximum length of bent portions of metal is said to be equal to the length of the slits which also is not further defined. In actuality, such devices produce metal shards that far exceed the maximum limits tolerated by the present invention and are not suitable for use in applications where more stringent lower limits on metal shard dimensions are imposed. In the Kokai, the voids are located only along the center lines of the scribe lanes. In contrast, the voids formed in this invention are preferably dispersed across substantially the entire area of the metal in the scribe lanes or across the entire area of the secondary device or devices in the scribe lanes or in only a portion of any area of the scribe lane or secondary device. In any event, the distribution of the voids is substantially uniform and may be predetermined in the design of a suitable mask and/or photoresist or other imaging devices wherein patterns and/or predetermined configurations may be formed on a substrate by methods that are well known in the art. With reference to Figure 1, there is illustrated a portion of a semiconductor wafer 11 produced according to the invention. Component parts which are not essential to an understanding of the invention are not shown for the sake of clarity. Semiconductor wafer 11 has a surface 12 (which although not illustrated as such is preferably planar), a metal coating 13 with perpendicular scribing lanes 14 formed therein defining and/or delineating several semiconductor devices 15a, 15b, 15c, 15d, formed in the planar surface of the wafer. Scribing lanes 14 are coated with a metal film (which is preferably aluminum) patterned with a plurality of voids 16 which are areas devoid of metal film and may be of any shape desired, e.g. crosses and squares, irregularly shaped or round holes, elliptical slots or slits, rectangles, triangles and combinations thereof. Optionally the scribelanes may also contain process test monitors or other secondary devices for alignment, testing, measurement, and/or sealing, etc. of the semiconductor device. In such an event, the secondary devices will have the same metal coating and patterned voids as described hereinabove and may comprise all or a portion of said scribe lanes. For example, typically a scribing lane of the invention may be 200 microns in width and contain a process control monitor approximately 100 microns wide, the semiconductor device or chip being approximately 1000 microns wide and the saw cut being approximately 50 microns wide. The voids 16 however configured typically vary from 25 to 50 microns in width, depending on the size of the chip and are arranged so that the spaces 17 between them are no greater than a distance of about 7 to 10 microns in any direction. Thus, as illustrated in Figure 1, to separate the devices 15a, 15b, 15c, and 15d, a saw cut of about 40 microns or greater may be created at any point in the scribe lane 14 which is itself typically about 200 microns in width when a secondary device such as a bonding pad, scribe process control monitor, etc. is included within its boundaries and about 100 microns in width when such secondary devices are not incorporated. Upon effecting the saw cut and separation, because of the spacing between the various metal limiting means or voids 16, substantially all metal coating that is severed or bent during the scribing step will have a maximum size of 7 to 10 microns in any given dimension. This represents a dimension that is unlikely to interfere with or disrupt the function of the devices whereby the yield of semiconductor devices may be substantially increased. It will be seen that what has been described is an improved semiconductor wafer produced by an improved method for improving the yield of semiconductor devices therefrom.

Claims: A semiconductor wafer (11) which comprises at least two semiconductor devices (15a, 15b,...), a scribe lane (14) formed between the semiconductor devices (15a, 15b,...), at least a portion of the scribe lane (14) being covered with a metal film (13) having voids (16) formed therein which are uniformly distributed over the entire area of the metal film (13) in the scribe lane (14), characterized in that the scribe lane (14) has a width of about 200 µm, that the voids (16) have a size of 25 to 50 µm and that the distance between adjacent voids (16) in any direction is 10 µm or less. A semiconductor wafer as claimed in Claim 1, characterized in that the voids (16) are formed in the shape of squares, rectangles, holes, slits, crosses, triangles and combinations thereof. A semiconductor wafer as claimed in Claim 1 or 2, characterized in that the scribe lane (14) includes a process control monitor, alignment, testing or other processing device, said device also containing said voids (16). A method of separating semiconductor devices (15a, 15b,...) from a semiconductor wafer (11) comprising a plurality of semiconductor devices (15a, 15b,...), whereby a scribe lane (14) is formed between the semiconductor devices (15a, 15b,...), at least a portion of the scribe lane (14) is covered with a metal film (13) which then is provided with voids (16) uniformly distributed over the entire area of the metal film (13) in the scribe lane (14), after which the semiconductor wafer (11) is scribed in any direction along said scribe lane (14) to separate the devices (15a, 15b,...), characterized in that the scribe lane (14) has a width of about 200 µm, that the voids (16) have a size of 25 to 50 µm and that the distance between adjacent voids (16) in any direction is 10 µm or less. A method as claimed in Claim 4, characterized in that the voids (16) are formed in the shape of squares, rectangles, holes, slits, crosses, triangles and combinations thereof. A method as claimed in Claim 4 or 5, characterized in that the scribe lane (14) includes a process control monitor, alignment, testing or other processing device, said device is also provided with said voids (16).

Inventors: VOKOUN EDWARD RICHARD, VOKOUN, EDWARD RICHARD
Applicants: PHILIPS ELECTRONICS NV, PHILIPS ELECTRONICS N.V.
Application year: 1989
Main classification: H01L21
IPC codes: H01L21