Television apparatus with switching power supply

Abstract: An input signal (from 100) at a horizontal frequency is coupled to a deflection circuit (99) through an isolation transformer (T3) during a power-on operation but not during a power-off operation. A voltage (V LIN ) at a horizontal deflection frequency is developed in a linearity inductor (L LIN ) of the deflection circuit. The voltage in the linearity inductor is rectified to produce a rectified signal (V₁₂₁) that is coupled to an input terminal (110a) of a regulator oscillator (110) of a power supply. The rectified signal (V₁₂₁) is coupled to the regulator oscillator (110) in an electrically nonisolated manner with respect to electrical shock hazard isolation, and is electrically isolated by the transformer (T3) from the input signal (from 100). The regulator oscillator (110) generates trigger pulses (S c ) for controlling the switching operation of an SCR switch (200) of the power supply to produce an output supply voltage (B+) that energizes the deflection circuit (99). The regulator oscillator (110) is energized during both power-up and power-off operation and is responsive to the rectified signal (V₁₂₁) to cause the frequency of the trigger pulses (S c ) of the oscillator (110) to increase during power-off operation. The increased frequency causes the anode-to-cathode voltage of the SCR switch (200) to be small enough to prevent latching of the SCR switch during the power-off operation. By preventing SCR switch latching, audible parasitic vibrations in the power supply are avoided.

Description: The invention relates to a television apparatus comprising a switching power supply. A typical deflection circuit output stage of a television receiver includes a retrace resonant circuit, including a deflection winding and a linearity inductance, and a transistor switch. The output stage generates, in a secondary winding of a flyback transformer, a retrace pulse that is rectified for generating a power-up or run supply voltage for energizing the receiver circuitry. The output stage is energized by a B+ supply voltage that is coupled to a terminal of a primary winding of the flyback transformer. The B+ supply voltage is produced and regulated in a switching regulator. The switching regulator includes a switch such as, for example, an SCR switch having an input terminal that is coupled to an unregulated supply voltage. During normal power-up operation, the SCR switch is conductive from an instant that is controllable, occurring within each trace interval of a horizontal deflection cycle, and remains latched in a conductive state during the remaining part of trace. During retrace, the SCR switch is turned off in preparation for the following regulation cycle. Regulated B+ supply voltage is developed in a filter capacitor that is coupled via a filter inductance to an output terminal of the SCR switch. The filter capacitor supplies a load current that flows in the deflection circuit output stage during power-up operation. A control circuit of the regulator that includes an oscillator provides, in a given cycle of a first control signal, a trigger pulse that varies the instant when the SCR switch becomes conductive. The trigger pulse occurs at an instant that is controlled in accordance with the B+ supply voltage in a negative feedback manner such that the B+ supply voltage is maintained at a predetermined value. A turn-off winding of the flyback transformer, coupled between the unregulated supply voltage and the anode of the SCR, couples a retrace pulse to the anode of the SCR switch during each horizontal retrace interval to turn off the SCR switch during retrace. Thus, the oscillator of the control circuit is synchronized during the power-up operation by the retrace pulse. During a power-off operation the oscillator free runs. During the power-up operation, the timing of the trigger pulse that is produced by the oscillator varies in accordance with the B+ supply voltage in a negative feedback manner. In a power supply, embodying a feature of the invention, the control circuit is energized during both the power-up and power-off operations so as to obviate the need for switching off the unregulated supply voltage via an on/off power switch. On the other hand, a horizontal rate drive signal, provided to the deflection circuit output stage from a horizontal drive stage, ceases to occur during the power-off operation. Consequently, the generation of the deflection current and of the retrace pulses is prevented. The result is that the load current supplied from the filter capacitor is substantially reduced during the power-off operation. As explained before, the trigger pulses occur at a free running frequency, during the power-off operation. Any trigger pulse that occurs when the anode-to-cathode voltage of the SCR is insufficiently large to enable latching operation in the SCR switch, will, nevertheless, cause the SCR switch to be turned on in an unlatched mode of operation for an interval that is proportional to the pulse width of the trigger pulse. Assuming a constant width of the trigger pulse, it follows that, in the unlatched mode of operation of the SCR switch, the average current through the SCR switch is directly related to the free running frequency of the trigger pulses. Assume that, during the power-off operation, the frequency or the duty cycle of the trigger pulses is at such a low value that the average current in the SCR switch is smaller than the load current. Further assume that the load current is supplied entirely through the SCR switch. Therefore, the filter capacitor will discharge until attaining a level that will produce a sufficiently large anode-to-cathode voltage difference in the SCR switch for enabling latching operation. Thereafter, the SCR switch will be triggered by the next trigger pulse of the free running oscillator and the latching operation will occur in the SCR switch. Because the load current is small, the discharge time for obtaining such sufficiently large anode-to-cathode voltage difference that enables the latching operation might be equal to, for example, 160 miliseconds. Because retrace pulses are not present, during power-off operation, such latching operation will continue until the filter capacitor is again charged to a voltage that is equal to or greater than the unregulated supply voltage, causing the SCR switch to turn off. After the end of each latching operation, and until such interval of 160 miliseconds will have elapsed, the anode-to-cathode voltage of the SCR switch is again too small to enable the next latching operation. During the latching operation, a high amplitude, wide pulse of current flows in the SCR switch and, for example, in the filter inductance, such pulse is repetitive at a corresponding frequency of, for example, 6Hz. Such wide current pulses might produce an objectionable sound during power-off operation. The objectionable sound might be produced due to possible parasitic mechanical vibrations as a result of the wide pulse current in, for example, the inductance of the filter. Therefore, it may be desirable to prevent the filter capacitor from being discharged to a level that enables the undesirable latching operation in the SCR switch to occur, during the power-off operation. In accordance with an aspect of the invention, a second control signal having two states that are indicative of the power-off and power-up operations, respectively, in the television receiver, is applied to the control circuit for controlling the free running frequency of the oscillator of the control circuit during the power-off operation. The second control signal causes the free running frequency to increase in order to increase the conduction of the SCR switch when it operates in the turned-on unlatched mode. The conduction is increased so that the average current is sufficiently large to enable replenishing, during each trigger pulse, of all the filter capacitor charge that was lost during the interval that elapsed from the end of the immediately preceding trigger pulse. Because all the lost charge is replenished during each period of the trigger pulses, the filter capacitor voltage will be substantially at the same level at the end of each trigger pulse. Such level is sufficiently high to maintain the anode-to-cathode voltage of the SCR switch sufficiently low for preventing the latching operation of the SCR switch throughout the power-off operation. The result is that, advantageously, the aforementioned objectionable sound is eliminated. During power-up operation, the second control signal has no effect on the duty cycle of the SCR switch. On the other hand, during the power-off operation, the second control signal causes an increase in the duty cycle of the first control signal and, in turn, that of the SCR switch. Without the operation of the second control signal the duty cycle of the SCR switch might be lower than required to prevent the latching operation. Some television receivers have signal terminals for receiving, for example, external video input signals such as R, G and B input signals, that are to be developed relative to the common conductor of the receiver. Such signal terminals and the receiver common conductor may be coupled to corresponding signal terminals and common conductors of external devices, such as, for example, a VCR or a teletext decoder. To simplify the coupling of signals between the external devices and the television receiver, the common conductors of the receiver and of the external devices are connected together so that all are at the same potential. The signal lines of each external device are coupled to the corresponding signal terminals of the receiver. In such an arrangement, the common conductor of each device, such as of the television receiver, may be held "floating", or conductively isolated, relative to the corresponding AC mains supply source that energizes the device. When the common conductor is held floating, a user touching a terminal that is at the potential of the common conductor will not suffer an electrical shock. Therefore, it may be desirable to isolate the common conductor, or ground, of, for example, the television receiver, from the potentials of the terminals of the AC mains supply source that provide power to the television receiver. Such isolation is typically achieved by a transformer. The isolated common conductor is sometimes referred to as "cold" ground conductor. US-A- 4,680,511 to RCA, Fitzgerald et al., shows a switched mode power supply using a DC isolated control signal. US-A- 4,692,852 to RCA, Hoover, shows a switching power supply with raster width stabilization. WO-A-8704885 to Deutsche Thomson-Brandt, shows a switched mode power supply in which the operating frequency during the standby mode is half of its normal rate of operation. The invention is as set out in claim 1. The dependent claims relate to preferred embodiments. In the switching regulator of the power supply of the invention, the AC mains supply voltage is coupled directly to a bridge rectifier for producing an unregulated direct current (DC) input supply voltage that is, for example, referenced to a common conductor, referred to as "hot" ground, and that is conductively isolated from the cold ground conductor. As a result, the control circuit, the B+ supply voltage, the primary winding of the flyback transformer, the linearity inductance and the deflection winding are also referenced to the hot ground conductor. On the other hand, a portion of the driver stage that controls the switching operation of the deflection circuit transistor switch is, for example, referenced to the cold ground conductor. Likewise, an on/off control signal that may be generated by a remote control receiver for controlling the on/off operation of the receiver may also be referenced to the cold ground conductor. A driver transformer of the driver stage couples a switching, second control signal at the horizontal frequency from the portion of the driver stage, that is referenced to the cold ground conductor, to the deflection circuit transistor switch, that is referenced to the hot ground. The driver transformer provides the required isolation barrier between the hot ground and the cold ground conductors. The on/off control signal may be applied to the driver stage to enable the generation of the second control signal, during normal power-up operation, and to disable its generation during shut-down or power-off operation that disables the operation of the deflection circuit. In accordance with another aspect of the invention, the first control signal, namely the control signal that causes the free-running frequency of the oscillator of the control circuit to be above the audio range during the power-off operation, is produced from a voltage developed in the linearity inductor of the deflection circuit output stage. The first control signal is produced by an arrangement forming a signal path between the linearity inductor and the control circuit, which signal path is referenced to hot ground. Because the signal path is referenced to hot ground, the need for an additional hot-cold isolation arrangement for applying the power-up and power-off control information of the on/off control signal to the control circuit is, advantageously, obviated. A television apparatus embodying an aspect of the invention includes a source of an input signal at a frequency that is related to a deflection frequency. A deflection circuit output stage, including a deflection current linearity element that is responsive to the input signal, generates a first signal in the linearity element during a power-on operation but not during a power-off operation of the television deflection apparatus. A power-on/power-off control signal is produced from the first signal that exhibits a power-on state during the power-on operation and a power-off state during the power-off operation. A utilization circuit of the television apparatus is responsive to the power-on/power-off control signal that causes the utilization circuit to operate in a mode of operation that corresponds to the level of the control signal. In the drawings : FIGURE 1 illustrates a television power supply including a supply regulator embodying the invention; FIGURE 2 illustrates the control circuit of the supply regulator of FIGURE 1 that includes an oscillator; FIGURES 3a-3d illustrate waveforms useful in explaining the normal power-up operation of the circuits of FIGURE 1 and 2; and FIGURES 4a-4d illustrate free running operation of the oscillator of the control circuit of FIGURE 2. FIGURE 1 illustrates a portion of a television receiver incorporating a bridge rectifier 101 that rectifies a mains supply voltage V AC to produce a DC, unregulated voltage V UR . An output stage, or switch regulator 102, that includes a silicon controlled rectifier (SCR) switch, referred to herein as SCR 200, produces a regulated voltage B+ that is coupled to a winding W1 of a flyback transformer T1. An input terminal 102a of regulator 102 is coupled to unregulated voltage V UR Regulated voltage B+ is developed at an output terminal 102d of switch regulator 102. Winding W1 of transformer T1 is coupled to the collector electrode of a deflection switching transistor Q1 of a horizontal circuit output stage 99 operating at a horizontal rate f H . A control signal H r , at the horizontal rate f H , is developed at the base of transistor Q1, during a power-up operation. Signal H r is applied from a control circuit, referred to herein as a horizontal oscillator and driver 100, that is coupled to the base electrode of transistor Q1. Signal H r controls the switching of transistor Q1 for generating a deflection current i Y in a series arrangement of a deflection winding L y , a trace capacitor c t and a linearity inductor L LIN of horizontal output stage 99. A retrace voltage V w2 is produced in a conventional manner across a secondary winding W2 of transformer T1 in each retrace interval of each horizontal period H. Each retrace interval occurs immediately after transistor Q1 becomes nonconductive. A DC, run-mode supply voltage V+, that is, illustratively, +26 volts, is produced by rectifying voltage V w2 in a rectifier arrangement 104 that is coupled to winding W2. Voltage V+ is coupled to various circuits of the receiver, not shown, to provide them with a run supply voltage during power-up operation. Voltage B+ is coupled via a voltage divider, including resistors R s1 , R s2 and R s3 , to a control circuit 110, that is also referred to herein as regulator oscillator 110, that is energized during both power-up and power-off operations to provide a feedback voltage V IN at a terminal 110a. During power-up operation, control circuit 110 generates a signal S c at the horizontal rate f H and at a controllable phase that controls the instant, in each horizontal interval H, in which SCR 200 becomes conductive. The phase of signal S c varies in accordance with a difference between voltage V IN , that is proportional to voltage B+, and a reference voltage, not shown in FIGURE 1, that is produced in control circuit 110. The regulation provided by signal S c causes regulated voltage B+ to be at a predetermined DC voltage level such as, illustratively, +129 volts, during power-up operation. The anode of SCR 200 is coupled to unregulated voltage V UR via a winding W4 of transformer T1 . The cathode of SCR 200 is coupled to an end terminal 102c of a filter inductor L2. Output terminal 102d, the other end terminal of inductor L2, where regulated voltage B+ is developed, is coupled to winding W1 of flyback transformer T1. A filter capacitor C2 is coupled to output terminal 102d. Signal S c is coupled via a driver transformer T2 to the gate electrode of SCR 200. When a leading edge LE of signal S c of FIGURE 1, having a controllable phase as shown in the waveform of FIGURE 1, occurs, SCR 200 is triggered and becomes immediately conductive. During normal power-up operation, leading edge LE occurs at a time t 1a during a trace interval of each period H of a voltage V W4 that is developed across winding W4. During the interval in which SCR 200 is conductive, a current i L2 in inductor L2, that charge capacitor C2, increases. The rate of increase of current i L2 is determined by unregulated voltage V UR and by regulated voltage B+. At the end of horizontal trace, a time t 2a , shown in the waveform of FIGURE 1, a retrace pulse portion of voltage V w4 is developed. Voltage V W4 is developed by transformer action from voltage V R in retrace capacitor C r . Retrace pulse V W4 in winding W4 is poled in such a manner as to tend to reverse bias SCR 200 and to reduce the corresponding currents flowing in inductor L2. As a result of the negative rate of change of current i L2 in inductor L2, a voltage developed at end terminal 102c is decreased until a time t 3a of retrace pulse portion RT when a catch diode D2, that is coupled to end terminal 102c, becomes conductive. The operation of a diode, such as catch diode D2, is described in detail in U.S. Patent No. 4,163,926, entitled SWITCH REGULATOR FOR A TELEVISION APPARATUS, in the name of D.H. Willis. FIGURE 2 illustrates a detailed schematic diagram of regulator oscillator or SCR control circuit 110 of FIGURE 1. Similar numerals and symbols in FIGURES 1 and 2 indicate similar items or functions. During normal power-up operation, control circuit or regulator oscillator 110 of FIGURE 2 is synchronized by a retrace signal 49 developed at input terminal 102a of SCR 200 of FIGURE 1 from voltage V W4 . During shut-down or power-off operation, regulator oscillator 110 operates continuously as a free running oscillator and generates signal S c , as described later on. Both PNP transistor 53 of FIGURE 2 and NPN transistor 52 switch states at a rate established by trip level voltages for a control terminal 54. Control terminal 54 is coupled to the emitter of transistor 52 through a diode 59. A charging capacitor 55, that is coupled to a regulated +33 volt source, is charged through a controllable current source 56 comprising an NPN transistor 57 and a resistor 58, coupled in series. The junction of the capacitor 55 and the collector of transistor 57 form control terminal 54 that was mentioned before. The +33 volt source is produced across a zener diode Z33 (shown in Fig. 1) during both power-up and power-off operation. Complementary transistors 52 and 53 are coupled together in a latching arrangement. That is, the collector output terminal of transistor 53 is coupled to the base input terminal of transistor 52, and the collector output terminal of transistor 52 is coupled to the base input terminal of transistor 53, both transistors thereby forming a regenerative latch. Under continuous free-running oscillator conditions of regulator oscillator 110, that occur during power-off operation, as explained later on, when transistor 52 becomes conductive, current is drawn from the +33 volt source to the collector of transistor 52 through resistors 60 and 61, thereby turning on transistor 53. Part of the collector current of transistor 53 is then coupled to the base of transistor 52 through a resistor 62, thereby regeneratively turning on both transistors into saturated conduction. Similarly, when transistor 52 becomes nonconductive, both transistors regeneratively turn off. Operation of regulator oscillator 110 for one free-runing cycle will now be described. Consider an interval during which transistors 52 and 53 are nonconducting. The voltage at the base of the transistor 52 is determined by the resistance values of a voltage divider comprising resistor 63 in series with the parallel combination of resistors 64 and 62. In order for transistor 52 to become conductive, voltage V₅₄ must decrease below a lower trip voltage V L , which is two diode drops below the voltage at the base of transistor 52. Should voltage V₅₄ at terminal 54 decrease below level V L , transistors 52 and 53 would regeneratively turn on. When both transistors 52 and 53 are conductive, the voltage divider ratio changes. With transistor 53 in saturated conduction, resistor 63, rather than resistor 64, is now effectively paralleled by resistor 62, developing a new, more positive base voltage for transistor 52, and establishing an upper level trip voltage V H for control terminal 54. Should voltage V₅₄ at terminal 54 increase above level V H , transistors 52 and 53 would regeneratively turn off. FIGURES 4a and 4b illustrate idealized waveforms for voltage V₅₄ at control terminal 54 and the collector voltage of oscillator transistor 53 during continuous free-running operation of regulator oscillator 110 that occurs during power-off operation of the power supply. During power-off operation, regulator oscillator 110 of FIGURE 1 is energized but horizontal output stage 99 is disabled. Consider voltage V₅₄ of FIGURE 2 during the interval, beginning somewhat after time T₁. Transistors 52 and 53 are turned off, and capacitor 55 is charging from the +33 volt source at a constant rate determined by the base voltage of transitor 57 of controllable current source 56. The voltage at terminal 54 is thus a decreasing sawtooth. At time T₂, voltage V₅₄ has decreased to its lower trip voltage level V L , causing transistors 52 and 53 to regeneratively turn on. The collector of transistor 53 is coupled to one of output terminals B-B through a diode 65. A primary winding T2a of transformer T2 of FIGURE 1 is coupled between terminals B-B. A discharge path of capacitor 55 comprises the terminal of capacitor 55 coupled to the +33 volt source, the emitter-collector path of transistor 53, diode 65, winding T2a coupled across terminals B-B, and the other terminal of capacitor 55. To prevent current source 56 from undesirably charging capacitor 55 during the capacitor discharging interval, the collector of transistor 53 is coupled to the emitter of transistor 57 through a resistor 77. When transistor 53 conducts, transistor 57 is cut off, disabling current source 56 during the discharge interval. As illustrated in FIGURE 4a, beginning at time T 2' voltage V₅₄ at terminal 54 comprises an increasing sawtooth. At time T 3' voltage V₅₄ has increased to its upper trip voltage level V H . Transistors 52 and 53 regeneratively turn-off, and the next charging cycle begins. As represented by the collector voltage of transistor 53, illustrated in FIGURE 4b, during the approximate interval T₂-T₃, an output signal is coupled to regulator oscilator 110 output terminals B-B to provide gating current to turn-on the regulator SCR 200 of FIGURE 1. The actual time width of interval T₂-T₃ of FIGURES 4a-4b is relatively unimportant provided sufficient SCR gating current of a sufficient duration is coupled to SRC 200 of FIGURE 1 to turn it on. In normal power-up operation, regulator oscillator 110 is not left continuously free-running as in power-off operation but is synchronized with horizontal deflection. The charging rate of capacitor 55 of FIGURE 2 is varied depending upon the magnitude of the feedback voltage V f coupled to a feedback terminal 101 for varying the turn-on instant and conduction angle of SCR 200 of FIGURE 1. FIGURES 3a-3d illustrate waveforms useful for explaining normal power-up operation of control circuit 110 of FIGURES 1 and 2. Similar numerals and symbols in FIGURES 1, 2 and 3a-3d indicate similar items or functions. At the beginning of the retrace interval at time t₁ of FIGURES 3a, negative going retrace pulse 49 of FIGURE 2 is coupled from input terminal 102a to the base electrode of transistor 53 through a resistor 149 and a capacitor 150 that causes transistor 53 to become conductive. Therefore, capacitor 55 becomes immediately afterward substantially discharged. After time t₂, the beginning of trace, capacitor 55 begins to charge at a rate determined by the voltage at the base of transistor 57 of current source 56. Voltage V₅₄ decreases until lower trip voltage V L is reached at time t₄. At time t₄, the oscillator transistors regeneratively turn on, resulting in a gating signal S c(2) being generated and coupled to SCR 200 to turn on the SCR, as illustrated in FIGURE 3c. Regulator oscillator 110 then continues in a free-running mode and, as illustrated in FIGURE 3d, several charge-discharge cycles may occur before another synchronizing retrace pulse 49 is coupled to terminal 102a at time t₅. In this way, the free-running mode, unlike in the power-off operation, is interrupted by synchronizing retrace pulse 49. Thus, as illustrated in FIGURE 3c, in the subsequent free-running mode after time t₄, and prior to the next retrace pulse 49, another SCR 200 gating signal S c may be coupled to the SCR. The number of additional gating signals will depend upon such factors as the position of the turn-on instant t₄ within the horizontal trace interval and the charging and discharging rates established for capacitor 55. Such additional turn-on gating signals are of relatively little consequence, since the SCR remains in a conductive state as long as the current through the SCR is above its holding current level. To provide regulation, the turn-on instant t₄ is varied within the trace interval by varying the charge rate of capacitor 55 through a varying voltage at the base of transistor 57. Transistor 57 base voltage is the proportioned value of feedback voltage V f coupled to the base of transistor 57 through a voltage divider comprising resistors 70 and 71. An error amplifying transistor 43 has a base electrode that is coupled to feedback signal V IN that is representative of voltage B+ via an input resistor 43a. Collector load resistors 43b, 70 and 71 form a load resistance at the collector of transistor 43. A zener diode Z43 that is coupled to the emitter of transistor 43 determines the threshold voltage of the inverting amplifier that includes transistor 43. Amplified error voltage V f that is developed at a terminal 91, at the collector of transistor 43, is coupled to the base electrode of transistor 57. After time t₂, the beginning of trace, capacitor 55 begins to charge at a rate determined by the voltage at the base of transistor 57 of current source 56. The voltage V₅₄ decreases until the lower trip voltage V L is reached at time t₄. At time t₄, the oscillator transistors regeneratively turn on, resulting in gating signal S c(2) being coupled to SCR 200 to turn the SCR on, as illustrated in FIGURE 3c. Should the regulated B+ voltage at terminal 102d of FIGURE 1 decrease, for example, the inverted feedback voltage V f of FIGURE 2 increases causing the base voltage of transistor 57 to also increase. The current magnitude of current source 56 increases, increasing the charge rate of capacitor 55. As illustrated in FIGURES 3d and 3c by the dotted waveforms V₅₄ and S c(1) , the lower trip voltage level V L is reached at an earlier instant t₃, generating a gating pulse S c(1) at the earlier instant t₃, as required for proper regulation. A user initiated command to enable shut-down or power-off operation of the television receiver causes remote receiver 120 of FIGURE 1 to generate an on/off control signal ON/OFF at an "OFF" state that is applied to driver 100. After power-off command occurs, the operation of signal on/off causes switching signal H r at the base electrode of transistor Q1 to be removed. Therefore, horizontal output stage 99 is disabled and supply voltage V+ is not generated. Also, retrace pulse V W4 in winding W4 of transformer T1 is not generated. Consequently, retrace signal 49 that, in normal power-up operation, synchronizes regulator oscillator 110, is not generated during the power-off operation that follows. Because regulator oscillator 110 is energized from voltage V UR also during the power-off operation, regulator oscillator 110 free runs continuously, as described before. Assume that, in a given interval that occurs during the power-off operation, the magnitude of the anode-to-cathode voltage of SCR 200 is smaller that the minimum required for enabling latching operation in SCR 200. In this case, any trigger pulse of free running control signal S c that occurs when the anode-to-cathode voltage of SCR 200 is insufficiently large to enable latching operation in SCR 200, will, nevertheless, cause SCR 200 to turn on in an unlatched mode. In each such period of signal S c , SCR 200 will be turned on for an interval that is proportional to the pulse width of the trigger pulse or, for example, to interval T₂-T₃ of FIGURE 4b. The pulse width of each trigger pulse is constant. It follows that for a given anode-to-cathode voltage difference in SCR 200 of FIGURE 1, operating in the turned-on unlatched operation, the average value of current i SCR200 through SCR 200 is directly related to the frequency of the trigger pulses. Further assume that, in the aforementioned given interval during the power-off operation, the free running frequency of the trigger pulses is so low that the average value of current i SCR200 in SCR 200 in each period of the trigger pulses is smaller than a load current i L in resistor R S1 . Additionally, assume that the load current i L is supplied entirely through SCR 200. Therefore, filter capacitor C2 would discharge by load current i L until attaining a voltage level that produces a sufficiently large anode-to-cathode voltage difference in SCR 200, such as 10 volts, for enabling the latching operation. Thereafter, SCR 200 will be triggered by the next trigger pulse produced by free running oscillator 110 and the latching operation will occur in SCR 200. Because load current i L is small, the discharge interval for obtaining such sufficiently large anode-to-cathode voltage difference that enables the latching operation in SRC 200 may be equal to, for example, 160 milliseconds. Since retrace pulses V W4 are not present during the power-off operation, such latching operation will continue until filter capacitor C2 is again charged to a voltage that is equal to or greater from unregulated supply voltage V UR , causing the SCR 200 to turn off. At the end of each such latching operation, the anode-to-cathode voltage of SCR 200 is again insufficiently large to permit the next latching operation until the next interval of 160 milliseconds has elapsed. The latching operation might produce a high amplitude, wide pulse of current i SCR200 flowing in SCR 200 and in filter inductor L2 that is repetitive at a corresponding frequency of approximately 6Hz. Such wide current pulses might produce an objectionable sound during power-off operation. The objectionable sound might be produced due to possible parasitic mechanical vibrations as a result of the wide pulses current in, for example, inductor L2. Such sound may be objectionable if it occurs during the power-off operation when the user does not expect any sound to come from the turned-off television receiver. Therefore, it may be desirable to prevent filter capacitor C2 from being discharged to a level that enables the undesirable latching operation in the SCR 200, during the power-off operation. In accordance with an aspect of the invention, a signal V₁₂₁ that is derived from a voltage V LIN developed in linearity inductance L LIN of FIGURE 1 is applied to a transistor Q2, operating as a switch, that is coupled to terminal 110a of regulator oscillator 110. Conduction of transistor Q2 causes voltage V IN to be zero, which increases the frequency of signal S c , during the power-off operation, to the maximum value, in a manner that is described later on. The absence of signal V₁₂₁ causes the free running frequency of signal S c to increase in order to increase the frequency of the trigger pulses to enable replenishing, during each trigger pulse, of all the charge in filter capacitor C2 that was lost during the interval that elapsed from the immediately preceding trigger pulse of signal S c . Because all the charge lost is replenished during each period of the trigger pulses, voltage B+ in filter capacitor C2 will be maintained substantially at the same level at the end of each trigger pulse. Such level of voltage B+ is sufficiently high to maintain the anode-to-cathode voltage of SCR 200 sufficiently low for preventing the latching operation of the SCR switch from occurring throughout the power-off operation. The result is that, advantageously, the aforementioned objectionable sound is eliminated, as explained in detail in US-A-4,866,525 entitled, A Television Apparatus Power Supply issued 12 September 1989 to Rodriguez-Cavazos et al. During power-up operation, signal V₁₂₁ causes transistor Q2 to be non-conductive, so as to have no effect on the switching of the SCR 200. On the other hand, during the power-off operation, the absence of signal V₁₂₁ causes transistor Q2 to conduct, which increases the frequency of signal S c and, in turn, the conduction of SCR 200. The way signal V₁₂₁ is produced and utilized is further explained below. During normal power-up operation, AC voltage V LIN at the frequency f H is developed in linearity inductor L LIN . A capacitor C121a and a resistor R121 form a series arrangment that is coupled in parallel with inductor L LIN and that dampens ringing in inductor L LIN . During a portion of retrace, capacitor C121a is charged by a positive going retrace pulse of voltage V LIN . At the end of such retrace pulse portion, as the retrace pulse of voltage V LIN becomes smaller, capacitor C121a, that is already charged, produces a negative pulse voltage of a bipolar signal V 121a at a cathode of a diode D121 that is coupled between resistor R121 and capacitor C121a. Diode D121 and a filter capacitor C121b form a negative peak detector 121 that prqduces signal V₁₂₁. The loading effect of detector 121 on inductor L LIN , is, advantageously, substantially insignificant. Therefore, detector 121 substantially does not affect deflection current. Signal V₁₂₁, that is negative during power-up operation, is produced at the anode of diode D121 and is coupled through a resistor R122a to the base of transistor Q2. A protection diode D122 coupled between the base and the emitter electrodes of transistor Q2 prevents the base-emitter reverse voltage in transistor Q2 from exceeding the forward voltage of diode D122. In accordance with a feature of the invention, negative signal V₁₂₁ causes transistor Q2 to be nonconductive throughout normal power-up operation. On the other hand, throughout power-off operation, negative signal V₁₂₁ is not generated and a resistor R122b that is coupled between the +33 volt supply and the base of transistor Q2 causes transistor Q2 to be conductive. Transistor Q2 of FIGURE 1 operates as a conductive switch throughout the power-off operation and as a nonconductive switch throughout the normal power-up operation. The collector of transistor Q2 is coupled to input terminal 110a of control circuit 110 where voltage V IN is developed and causes voltage V IN to be zero during power-off operation. Therefore, the rate of change of voltage V₅₄ of FIGURE 2 becomes substantially higher than if voltage B+ were permitted to control the level of voltage V IN during the power-off operation. The result is that control circuit 110 will produce signal S c of FIGURE 1 at a free-running frequency that is at the maximum. Therefore, as explained before, the aforementioned objectionable sound is eliminated. Had voltage B+ been permitted to control the level of voltage V IN during the power-off operation, the frequency of signal S c might have been at a minimum during at least a portion of each of the aforementioned 160 milisecond intervals. Regulator oscillator 110, transistor Q2, linearity inductance L LIN , switch regulator 102 and linearity inductor L LIN are each referenced to a common ground conductor HG that is conductively coupled to mains supply voltage V AC and that is referred to herein as hot ground conductor HG. On the other hand, each of remote receiver 120 and horizontal oscillator and driver 100 of the television receiver is referenced to a common ground conductor CG that is conductively isolated from hot ground conductor HG and that is referred to herein as cold ground conductor CG. The conductive isolation between the hot and the cold ground conductors is accomplished, in part, by energizing remote receiver 120 and driver 100 from a voltage 78 produced in a conventional manner that is conductively isolated from hot ground conductor HG. Voltage 78 is produced during both the power-off and the power-up operations. In accordance with another aspect of the invention, signal V₁₂₁ that is applied to regulator oscillator 110 and to regulator switch 102 through transistor Q2 is generated from voltage V LIN developed across inductor L LIN via a signal path that is referenced to hot ground conductor HG. The signal path includes capacitor C121a and detector 121 that are, each conductively coupled to hot ground conductor HG. Signal V₁₂₁ that is referenced to hot ground conductor HG has two levels that correspond to the "OFF" state and to an "ON" state, respectively, of on/off control signal ON/OFF that is referenced to cold ground conductor CG. The "power-up" state of signal V₁₂₁ is obtained from horizontal rate signal H r that is generated only during the power-up operation. Signal H r is a transformer coupled signal that is coupled across the hot-cold barrier formed by transformer T3. In this way, advantageously, on/off control signal ON/OFF is applied to transistor Q2 via transformer T3 that maintains the hot-cold barrier. Transformer T3 is the same transformer used for supplying signal H r to deflection switch transistor Q1, as described before. Consequently, the need for an additional circuit element for applying the two states of on/off control signal ON/OFF across such hot-cold barrier is obviated. Advantageously, extracting the on/off information from voltage V LIN is accomplished without adversely affecting deflection current i y .

Claims: A television apparatus with a switching power supply, comprising: first means (100) for generating a first deflection rate signal (output of 100) during a normal Run operation of said television apparatus, but not during a Standby operation thereof; coupling means (T3) having a first portion (primary) that is electrically DC coupled to said first signal (output of 100), and a second portion (secondary) that is DC isolated from said first portion with respect to electrical shock hazard isolation, for coupling said first signal to said second portion to develop in said second portion a second signal (Hr) which is generated during a normal Run operation but not during a Standby operation; a deflection switch (Q1) coupled to said second portion (secondary) of said coupling means (T3) and being switched in response to said second signal (Hr) during said normal Run operation but not during said Standby operation for generating a deflection current (iy) in a deflection winding (Ly) and a linearity inductance (LLIN) during said normal Run operation; third means (121) responsive to a signal (VLIN) produced in said linearity inductance (LLIN) for generating a Run/Standby control signal (V121) that is DC isolated from said first signal (output of 100) and that is in a Run state (negative) as long as said second signal (Hr) is being generated during said Run operation and that is in a Standby state (zero) as long as said second signal (Hr) is not being generated during said Standby operation; and an oscillator (110) of the switching power supply DC isolated a from said first signal (output of 100) for being energized during both Run and Standby operations to generate an oscillating signal (Sc) during both operations, said oscillator being DC coupled and responsive to said control signal in order to control the frequency of said oscillating signal and being placed in a Run mode of operation when said control signal (V121) is in said Run state and being placed in a Standby mode of operation when said control signal is in said Standby state. A television apparatus according to Claim 1 characterized in that said oscillator (110) is DC coupled to an input AC mains supply voltage (VAC). A television apparatus according to Claim 2 characterized in that said linearity inductance (LLIN) generates a first level (negative) of said Run/Standby control signal (V121) when the switching in said deflection switch (Q1) occurs and a second level (zero) when the switching operation in said deflection switch (Q1) is disabled. A television apparatus according to Claim 3 characterized in that said third means (121) comprises a peak detector. A television apparatus according to Claim 4 characterized by an R-C network (R121,C121a) coupled between said linearity inductance (LLIN) and said detector (121) for generating a bipolar signal (V121a) that is coupled to an input terminal of said detector (121). A television apparatus according to Claim 5 characterized by a regulator switch (200) for coupling an input supply voltage (VUR) to a load, during a portion of a given periodic interval that is determined in accordance with said first signal (output of 100) to generate an output supply voltage (B+) at a level that varies in accordance with said oscillator signal (Sc), wherein said oscillator (110) comprises a regulator oscillator that is energized during both said Run operation and during said Standby operation for generating said oscillator signal (Sc) during both said Run and said Standby operations such that during said Run operation said switching signal (Sc) varies in accordance with a feedback signal (Vin) that is representative of said output supply voltage (B+) that, in turn, causes a duty cycle of said regulator switch (200) to vary in a negative feedback loop manner for regulating said output supply voltage (B+), wherein said Run/Standby control signal (V121) is coupled in said feedback loop for controlling the frequency of said oscillator signal (Sc) during said Standby operation in a manner that does not affect the frequency of said first signal (output of 100) during said Run operation. A television apparatus according to Claim 6 characterized in that said coupling means (T3) forms a barrier isolation that DC isolates said first signal (output of 100) from said deflection switch (Q1), wherein said third means (121) and said regulator oscillator (110) form a signal path that is interposed between said regulator switch (200) and said deflection switch (Q1) said signal path being DC isolated from said first signal (output of 100) and DC coupled to said second portion (secondary) of said coupling means (T3).

Inventors: RODRIGUEZ-CAVAZOS ENRIQUE, STEPHENS JOSEPH CURTIS, RODRIGUEZ-CAVAZOS, ENRIQUE, STEPHENS, JOSEPH CURTIS
Applicants: THOMSON CONSUMER ELECTRONICS, THOMSON CONSUMER ELECTRONICS, INC.
Application year: 1989
Main classification: H04N5
IPC codes: H04N5, H04N3