Semiconductor device

Abstract: A semiconductor device having a current blocking layer (15) and confinement current passing part (14, 18) formed on a semiconductor layer, and an electrode metal layer (19) disposed on said current blocking layer (15) and confinement current passing part (14,18), wherein the current blocking layer (15) is made of semiconductor material, and the contact resistance of current blocking layer (15) and electrode metal layer (19) is higher than the contact resistance of electrode metal layer (19) and semiconductor layer, and/or the resistivity of the current blocking layer (15) is higher than that of the semiconductor layer.

Description: This invention relates to an improved structure of the electrode portion in a semiconductor device possessing a current blocking layer. As a current confinement means in a semiconductor device, it is known to form a confinement current passing part in an insulation film of SiO₂, SiN x or the like, and to evaporate an electrode metal layer thereon. For example, in the semiconductor laser device shown in Fig. 7, an n-type InP-clad layer 2, InGaAsP active layer 3, p-type InP-clad layer 4, and InGaAsP contact layer 5 are sequentially grown on the upper surface of an n-type InP substrate 1, and an SiO₂ insulation film 6 is evaporated on the InGaAsP contact layer 5. A part of the SiO₂ insulation film 6 is removed by etching so as to expose the surface of the InGaAsP contact layer 5, thereby forming a confinement current passing part or window 9, and then a p-type electrode metal layer 7 is evaporated on the surface of InGaAsP contact layer 5 and on the SiO₂ insulation film 6, and an n-type electrode metal layer 8 is evaporated on the lower surface of the n-type InP substrate 1. In the case of such a semiconductor laser device, by applying a voltage between the p-type electrode metal layer 7 and the n-type electrode metal layer 8, the current passes only through the confinement current passing part 9 formed through the SiO₂ insulation film 6 and flows to the n-type electrode metal layer 8, and this current emits light in passing through the InGaAsP active layer 3. This light emitting portion is equal to or larger than the confinement current passing part or window 9. In such prior art, however, the following technical problems are left unsolved. That is, the coefficient of thermal expansion of the insulation film 6 of SiO₂, SiN x or the like is smaller by one or two digits than the coefficient of thermal expansion of a compound semiconductor, and along with the temperature rise when injecting current, the stress is concentrated on the end portion of the dielectric film 6, and a defect occurs in the contact layer 5. This defect propagates to the active layer 3 along the crystal axis of a semiconductor crystal, and deteriorates the light emission efficiency of the semiconductor laser device. Document "Planar Surface Buried Heterostructure InGaAsp/InP Lasers with Hydride VPE-Grown Fe-Doped Highly Resistive current-blocking layers", S. Sugou et al., Electronic Letters, Vol. 22, No. 23 of November 6, 1.986, pages 1214-1215, discloses a semiconductor device comprising an active semiconductor layer formed on a semiconductor substrate, a further semiconductor layer formed over the active semiconductor layer, a first current blocking region having a confinement current passing part, a second current blocking region comprising a layer of dielectric insulation material formed over the first current blocking region and having a window larger in area than the confinement current passing part, and an electrode layer formed over the window to contact the first current blocking region and to pass current to said active semiconductor layer through the confinement current passing part, the electrical resistance between the first current blocking region and the electrode layer being higher than the electrical resistance between the electrode layer and said further semiconductor layer and/or the resistivity of the first current blocking region being higher than the resistivity of said further semiconductor layer. In accordance with this invention, there is provided a semiconductor device having the above-cited features, and being characterised in that the first current blocking region comprises a layer formed on the surface of said further semiconductor layer. In this semiconductor device, the resistance value r b of the first current blocking layer or semiconductor itself is expressed in equation (1) below, supposing its resistivity to be ρ, area to be S and thickness to be ℓ, and the contact resistance r c between the first current blocking layer and the electrode layer is expressed in equation (2), supposing the resistance value per unit area between the two to be R and contact area to be S. r b = ρ·ℓ/S (1) r c = R/S (2) Therefore, the total resistance value r between the electrode layer and first current blocking layer, or the confinement current passing part and its underlying semiconductor layer is expressed as r b + r c . Meanwhile, the contact resistance between the current blocking layer or confinement current passing part and its underlying semiconductor layer appears to be a problem, but it is the mutual contact resistance of semiconductors and therefore can be ignored. In the semiconductor device according to the invention, a confinement current is injected from the electrode layer to the active semiconductor layer, via the confinement current passing part of the current blocking layer and the underlying semiconductor layer. In this case, the current blocking layer is made of such a semiconductor material that its contact resistance value r₁ with the electrode layer is higher than the resistance r₂ between the electrode layer and said further semiconductor layer, and/or that the resistivity ρ₁ of the current blocking layer is higher than the resistivity ρ₂ of that semiconductor layer, and moreover the coefficient of thermal expansion of the current blocking layer is the same as the coefficient of thermal expansion of that semiconductor layer, therefore, if a temperature rise should occur in the semiconductor device when injecting current, internal stress and defect hardly occur, and deterioration of characteristics of the semiconductor device is scarcely noted. Incidentally, in the semiconductor device of the invention, if the contact resistance value r₁ (or resistivity ρ₁) is not sufficiently higher than the resistance value r₂ (or resistivity ρ₂) and the area S1 of the window in the insulation layer is greater than the area S2 of the confinement current passing part, it is difficult to restrict the leakage current to the confinement current passing part, and it is hard to achieve a sufficient current confinement. For example, in the case of a semiconductor device measuring 500 µm by 500 µm, with the inner diameter of the current confinement part of 25 µm, the ratio S1/S2 reaches as far as 10³ approximately, and to achieve r₁/r₂ of approximately 10³ by raising the purity of the current blocking layer, the technical difficulty is extremely high. In the semiconductor device of the invention, since the majority of the first current blocking layer is covered by the insulation film of SiO₂, SiN x or the like in the semiconductor device of the specific invention, S1 can be substantially decreased. In other words, in the case of the invention, an insulation film possessing a current confinement window of area S1 greater than the window S2 of the first current blocking layer, is positioned between the current blocking layer and the electrode metal layer. Explaining this in the aforementioned relation, the area of the current confinement window in the insulating layer is S1 and the area of the confinement current passing part is S2, and for example it is possible to set the relation of S1/S2 < 10, or when set as r₁/r₂ = 10 , the leakage current can be reduced. A known example of r₁/r₂ = 10 is described in detail in The Bell System Technical Journal, Volume 62, Number 1, pages 1 to 25 (January 1983), "InGaAsP LEDs for 1.3-µm Optical Transmission". In this publication, it is mentioned, for example, that R InP /R InGaAs can be set at 7 to 8 as the current blocking layer. Furthermore, in the device of the invention, if a stress is caused in the semiconductor material inside the current confinement window of the insulation film due to current injection, the stress concentrated portion at this time is sufficiently outside of the confinement current passing part that no defect is formed in the confinement current passing part, and no non-light emitting portion is formed, and the reliability of the semiconductor device is further enhanced. Some of the embodiments of semiconductor device according to this invention will now be described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a sectional view of the first embodiment of the semiconductor device of the invention, Figs. 2 (A), (B), (C) are principal process drawings for fabricating the semiconductor device in Fig. 1, Fig. 3 is a sectional view showing a second embodiment of the semiconductor device of the invention, Fig. 4, Fig. 5 are plan view and sectional view showing a third embodiment of the semiconductor device of the invention, Fig. 6 is a sectional view of essential parts showing a fourth embodiment of the semiconductor device of the invention, Fig. 7 is a sectional view showing a conventional semiconductor device, Fig. 8 is a explanatory drawing showing the result of a current passing test of the semiconductor device (LED) of the invention, and Fig. 9 is a explanatory drawing of dark lines formed in a conventional semiconductor device (LED). First, the semiconductor device shown in Fig. 1 is explained. In Fig. 1, numeral 11 denotes an n-type InP substrate having an InP buffer layer, 12 is an InGaAsP active layer formed on the n-type InP substrate 11, and 13 is an InP (or ZnInP)-clad layer formed on the InGaAsP active layer 12. On the InP-clad layer 13, in its middle part, a mesa-shaped InGaAsP contact layer 14 is formed, and around this mesa-shaped InGaAsP contact layer 14, an n-type InP (or Fe-doped InP, non-doped InP)-buried layer 15 is formed, and on this n-type InP buried layer 15, an insulation film 16 made of silicon dielectric such as SiN₂, SiO₂ and amorphous Si is formed. In this arrangement the opening in the middle of the silicon insulation film 16 forms a first current confinement window 17 and a second current confinement window 18 is formed through the buried layer 15. The area of the first current confinement window 17 is greater than the area of the second current confinement window 18. Moreover, in order to cover the upper surfaces of the silicon insulation film 16, n-type InP-buried layer 15, and InGaAsP contact layer 14, a p-type electrode metal layer 19 of Ti, Pt, Au or their alloy is provided on these surfaces, while an n-type electrode metal layer 20 made of the above conductive metals is disposed on the lower surface of the n-type InP substrate 11. Referring then to Fig. 2 (A), (B), (C), an example of fabrication of the semiconductor device shown in Fig. 1 is explained below. First, as shown in Fig. 2 (A), on the n-type InP substrate, an InP buffer layer (not shown), InGaAsP active layer 12, InP-or ZnInP-clad layer 13, InGaAsP contact layer 14, and SiO₂ etching mask 10 are sequentially formed. In this case, the crystal by crystal growth means such as LPE, VPE, MOCVD and MBE, while the SiO₂ etching mask 10 is formed through, for example, sputtering means. Next, as shown in Fig. 2 (B), by patterning by the technique of photolithography, the undesired parts of the InGaAsP contact layer 14 and SiO₂ etching mask 10 are removed. Afterwards, as shown in Fig. 2 (C), an n-type-buried layer 15 such as InP or Fe-doped InP, non-doped InP is formed in the etching portions formed at both sides of the mesa-shaped InGaAsP contact layer 14 through the crystal growth means mentioned above. In this case, since the upper surface of the InGaAsP contact layer 14 is covered with SiO₂ etching mask 10, the layer of InP is not formed on the upper surface, and therefore the InGaAsP contact layer 14 is buried into the n-type InP-buried layer 15. Thereafter, from the upper surface of the InGaAsP contact layer 14 from which the SiO₂ etching mask 10 is removed to the upper surface of the n-type InP-buried layer 15, a silicon insulation film 16 such as SiN x , SiO₂ and amorphous Si is formed by sputtering, and after opening a window in the middle part of the silicon insulation film 16, p-type electrode metal layers 19 of Ti, Pt, Au or the like are evaporated on the upper surfaces of the InGaAsP contact layer 14, n-type InP-buried layer 15 and silicon insulation film 16, and similarly an n-type electrode metal layer 20 of the same metal conductor is evaporated on the lower surface of the n-type InP substrate 11. In this way, the semiconductor device as shown in Fig. 1 is obtained. In such laminate structure of the semiconductor device, no large step difference of over 1 µm is formed between the middle and periphery of the p-type electrode metal layer 19, and breakage of the p-type electrode metal layer 19 due to step difference does not occur, and still more only by inverting the conductive type of the InP-buried layer 15 from that of the InP-clad layer 13, a current confinement effect by P-N junction can be achieved in this buried layer 15. In the semiconductor device in Fig. 1, when a voltage is applied between the p-type electrode metal layer 19 and the n-type electrode metal layer 20, the injection current is constricted within the range of second current confinement window 18, and the specified portion of the InGaAsP active layer 12 corresponding to it emits light. In such semiconductor device, should defects X occur in the semiconductor layer near the inner circumference of the first current confinement window 17 in the silicon insulation film 16, such defects X are located outside the substantial stenotic current passing part by the second current confinement window 18, and hence no non-light emitting part is formed within this light emitting region. Next is described the semiconductor device shown in Fig. 3. In Fig. 3, numeral 21 denotes an n-type InP substrate, 22 is an n-type InP-clad layer, 23 is an InGaAsP active layer, 24 is a p-type InP-clad layer, 25 is a p-type InGaAsP contact layer, 26 is a high resistance InP-blocking layer, and 27 is an SiO₂ dielectric film, and these layers and films are formed in the specific sequence and at specific positions on the n-type InP substrate 21. In this constitution, a first current confinement window 28 is formed on the SiO₂ dielectric film 27, and a second current confinement window 29 is formed on the InP blocking layer 26. In the relative position of the first current confinement window 28 and the second current confinement window 29, the window area of the first current confinement window 28 is wider than the window area of the second current confinement window 29. Furthermore, on the upper surface of the semiconductor layer grown on the n-type InP substrate 21, a p-type electrode metal 30 made of Ti, Pt, Au or their alloy is disposed, while on the lower surface of the n-type InP substrate, an n-type electrode metal layer 31 of the same metal conductor is disposed. An example of fabricating the semiconductor device shown in Fig. 3 is explained below. First, through the crystal growth means, n-type InP-clad layer 22, InGaAsP active layer 23, p-type InP-clad layer 24, p-type InGaAsP contact layer 25, and InP-blocking layer 26 are sequentially formed on an n-type InP substrate 21 by epitaxial growth, and an SiO₂ insulation film 27 is formed on the InP-blocking layer 26 by sputtering. Next, through the etching means using a fluoric etchant, a first current confinement window 28 with window diameter of 30 µm is opened in the SiO₂ insulation film 27, and a second current confinement window 29 with window diameter of 30 µm in the InP-blocking layer 26, and the SiO₂ insulation film 27 is further etched to widen the window diameter of the first current confinement window 28 to 40 µm. Afterwards, on the upper surface of the semiconductor layer grown on the n-type InP substrate 21, a p-type electrode metal layer 30 is evaporated, while an n-type electrode metal layer 31 is evaporated on the lower surface of the n-type InP substrate 21, thereby obtaining the semiconductor device in Fig. 3. In the semiconductor device in Fig. 3, when a voltage is applied between the p-type electrode metal layer 30 and the n-type electrode metal layer 31, same as in the above embodiment, the injection current is contracted within the range of the second current confinement window 29, and a specified portion of the InGaAsP active layer 23 corresponding to it emits light. In such semiconductor device, should defects X occur inside of the first current confinement window 28 in the SiO₂ insulation film 27, such defects X are located outside the substantial confinement current passing part by the second current confinement window 29 and are also remote from the light emitting portion by as far as about 5 µm, and hence no non-light emitting portion will be formed within the light emitting region. Incidentally, in the semiconductor device in Fig. 3 according to this embodiment, when an electric current of 150 mA was passed for 5000 hours at 160°C as shown in Fig. 8, the change in power was not more than 5%, and no dark line (non-light emitting portion) was found. By contrast, in the conventional semiconductor device (Fig. 7), when an electric current of 100 mA was passed for 20 hours at 160°C, the power deterioration was over 10%, and multiple dark lines corresponding to the crystal plane 100 were formed in the light emitting part as shown in Fig. 9. Another semiconductor device is shown in Figs. 4, 5. In Figs. 4, 5, numeral 41 is an n-type InP substrate, 42 is an InGaAsP active layer, 43 is an InP clad layer, 44 is a p-type InGaAsP gap layer, 43 is an InP clad, 44 is a p-type InGaAsP cap layer, 45 is an InP-blocking layer, and 46 is an SiO₂ insulation film, and these layers and films are formed on the n-type InP substrate in a specific sequence and at specific positions. The InGaAsP active layer contains a cross type optical waveguide 51 possessing four branching ends 47, 48, 49, 50, and a p-type Zn diffusion region 52 is provided in the p-type InGaAsP gap layer 44 and InP-blocking layer 45. A first current confinement window 53 is formed in the SiO₂ insulation film 46, and a second current confinement window 54 in the InP-blocking layer 45. In the relative relation of the first confinement window 53 and the second current confinement window 54, the window area of the first current confinement window 53 is wider than the window area of the second current confinement window 54. Furthermore, on the upper surface of the semiconductor layer grown on the n-type InP substrate 41, a p-type electrode metal layer 55 and an electrode 56 for control current made of Ti, Pt, Au or their alloy are disposed, while an n-type electrode metal layer 57 of the same metal conductor is provided or the lower surface of the n-type InP substrate 41. The semiconductor device shown in Figs. 4, 5 is a current injection type photo switch. In the case of such semiconductor device, an electric current of 10 kA/cm² is injected in stripes in the cross part of the optical waveguide 51 so as to provide this cross part with light reflectivity (cross part carrier high density = refractive index drop), or when current injection is reduced or stopped to recover the light transmissivity of the cross part. When the cross part possesses light reflectivity, the light entering the optical waveguide 51 from the branch end 47 is reflected in the cross part to be emitted from the branch end 48, and, to the contrary, when the cross part possesses light transmissivity, the light entering the optical waveguide 51 from the branch end 47 is allowed to pass (penetrating through the cross part) to be emitted from the branch end 49. The semiconductor device shown in Figs. 4, 5 can be used as a current injection type photoswitch in the whole field of OEIC in combination with FET, LED. LD, etc. The semiconductor shown in Fig. 6 is described below. In Fig. 6, numeral 61 denotes an InP semi-insulated substrate doped with Fe, 62 is an n-type InGaAsP channel layer formed on this InP semi-insulated substrate 61, 63 is a non-doped InP-blocking layer formed on the n-type InGaAsP channel layer 62, and 64 is an SiO₂ insulation film formed on the InP-layer 63, and these layer and films are formed on the InP semi-insulated substrate 61 in a specific sequence and at specific positions. In this constitution, a p-type Zn diffusion region 65 is provided in the n-type InGaAsP channel layer 62, and a first current confinement window 66 is formed in the SiO₂ insulation film 64 and a second current confinement window 67 in the InP-blocking layer 63. In the relative relation of the first current confinement window 66 and second current confinement window 67, too, the window area of the first current confinement window 66 wider than the window area of the second current confinement window 67. On the upper surface of the semiconductor layer laminated on the InP semi-insulated substrate 61, an electrode metal layer 68 made of Ti, Pt, Au or their alloy is disposed. The semiconductor device shown in Fig. 6 is a FET, and when a bias voltage is applied to a specific portion of such semiconductor device with the terminals of source, gate and drain being connected, the carriers flow through the n-type InGaAsP channel layer 62 in a specified direction, and the current flows from the source side to the drain side, and in this embodiment in Fig. 6, the first current confinement window 66 and second current confinement window 67 are similarly disposed, so that the reliability of the source electrode and drain electrode when a large current flows in and out can be enhanced. In the semiconductor device of the specific invention, as stated herein, the current blocking layer is made of semiconductor material, and the electric characteristic (resistance) of this current blocking layer is properly determined in the relative relation with the electrode metal layer, so that the reliability of quality and characteristics may be enhanced, while the product yield may be also improved. Furthermore, in the semiconductor device of the invention, since a silicon dielectric film possessing a current confinement window wider in window area than the current confinement window of the current blocking layer is intervening between the current blocking layer and electrode metal layer, deterioration of characteristics due to the defects introduced into the semiconductor layer may be avoided more securely.

Claims: A semiconductor device comprising an active semiconductor layer (12) formed on a semiconductor substrate (11), a further semiconductor layer (13) formed over the active semiconductor layer (12), a first current blocking region (15) having a confinement current passing part (14), a second current blocking region (16) comprising a layer of dielectric insulation material formed over the first current blocking region (15) and having a window (17) larger in area than the confinement current passing part (14), and an electrode layer (19) formed over the window (17) to contact the first current blocking region (15) and to pass current to said active semiconductor layer (12) through the confinement current passing part (14), the electrical resistance between the first current blocking region (15) and the electrode layer (19) being higher than the electrical resistance between the electrode layer (19) and said further semiconductor layer (13) and/or the resistivity of the first current blocking region (15) being higher than the resistivity of said further semiconductor layer (13), characterised in that the first current blocking region (15) comprises a layer formed on the surface of said further semiconductor layer (13).

Inventors: FUKUSHIMA TORU C O YOKOHAMA LA, OGAI MIKIO C O YOKOHAMA LAB, TAKABAYASHI TSUNEHISA C O YOKO, FUKUSHIMA, TORU C/O YOKOHAMA LAB.,THE FURUKAWA, OGAI, MIKIO C/O YOKOHAMA LAB., TAKABAYASHI, TSUNEHISA C/O YOKOHAMA LABORATORY
Applicants: FURUKAWA ELECTRIC CO LTD, THE FURUKAWA ELECTRIC CO., LTD.
Application year: 1989
Main classification: H01S3
IPC codes: H01S5, H01L33