Wideband amplifier

Abstract: An amplifier (10) comprising a plurality (18,20, ... 22) of stacked current mirrors, each having an input and a common terminal, provides an output amplified current in response to receiving an input current at first and second inputs. A current source (24) supplies a direct current to the input of the first one of the current mirrors while the input and the common terminal is also coupled to the first and second inputs of the amplifier. The common terminal of each preceding current mirror is coupled to the input of the next proceeding current mirror whereby the sum of the input and output currents of the preceding amplifier is sourced to the input of the proceeding current mirror. An output of the last one of the plurality of current mirrors is coupled to the output (16) of the amplifier.

Description: Background of the Invention The present invention relates to amplifiers and, more particularly, to high frequency wideband amplifiers suited to be manufactured in monolithic integrated circuit form. The art is replete with high frequency amplifiers. Generally, most high frequency amplifiers have been fabricated using discrete components. Many of these prior art amplifiers require large component count, transformers and are expensive. In addition, such high frequency amplifiers require high power consumption and are not suited for use with battery operated power supplies. Presently, there is a need for an integrated linear wideband amplifier the gain and phase of which are consistent and predictable and which can be operated from a battery voltage while providing relatively high output power and low current drain. GB-A-2 086 682 and US-A-3 611 171 describe a wideband amplifier using stacked current mirrors, where a driving source is connected to the input of a first current mirror. Summary of the Invention Accordingly, it is an object of the present invention to provide an improved amplifier. It is another object of the present invention to provide an improved high frequency wideband amplifier suited to be manufactured in integrated circuit form. Still another object of the present invention is to provide an integrated amplifier circuit which may be battery operated while having high output power and low current drain. In accordance with the above and other objects there is provided an amplifier comprising at least first and second current mirrors each having an input, an output and a common terminal and a current source for supplying a current to the input of the first current mirror; the input and the common terminal of the first current mirror being coupled to inputs of the amplifier for receiving a differential input signal while the output is coupled to power supply conductor; the input of the second current mirror being coupled to the common terminal of the first current mirror, the output of the second current mirror being coupled to an output of the amplifier and the common terminal being coupled to a second power supply conductor. Brief Description of the Drawings Fig. 1 is a partial block and schematic diagram of the amplifier of the present invention; and Fig. 2 is a schematic diagram illustrating the amplifier of the preferred embodiment. Detailed Description of the Preferred Embodiment Turning to Fig. 1 there is shown wideband amplifier 10 of the present invention which is suited to be manufactured in integrated circuit form. Amplifier 10 is illustrated as comprising a plurality of current mirrors 18, 20 and 22 each having an input (shown by the semicircle), an output and a common terminal. Although amplifier 10 is illustrated as having n current mirrors the novelty of the present invention is found in stacking first and second current mirrors in the manner to be described. First current mirror 18 is shown as having its input and common terminal coupled to inputs 12 and 14 respectively to which is received a differential input current I in . In addition, current source 24 supplies a direct current I dc to the input of current mirror 18. The output of current mirrors 18 and 20 (via leads 30 and 32), as well as current source 24, are coupled to a first power supply conductor to which is supplied V cc . V cc may be a battery voltage. The common terminal of current mirror 18 is coupled to the input of current mirror 20 while the common terminal of the latter is coupled to the input of current mirror 22. As illustrated, a plurality of current mirrors may be stacked between the common terminal of current mirror 20 and the input of n th current mirror 22 with each having their common terminals coupled to the input of the next proceeding current mirror as illustrated by current mirrors 20 and 22. Current mirror 22, being the last stage of the stacked current mirror stages, has its common terminal coupled to a second power supply conductor 28 to which is supplied a ground reference potential. The output of current mirror 22 is coupled to output 16 of amplifier 10 via lead 34. Each of the current mirrors will provide a current at its output which is a multiple of the supplied input current. For example, the output current at lead 30 from current mirror 18 is equal to: (I dc + I in )(n1) (1) where n1 is the multiplication factor of current mirror 18, as is understood. Thus, the input current supplied to the input of current mirror 20 from the common terminal of current mirror 18 can be shown to be equal to: I dc (n1+1) + I in (n1) (2) Similarly, the output of current mirror 20 provided at lead 32 is equal to: [I dc (n1+1) + I in ](n2) (3) where n2 is the multiplication factor of current mirror 20. Thus, the output current, Io, provided at output 16 may be shown to be equal to: [I dc (n1+1)+I in (n1)](n2+1) ... (n n-1 +1)(n n ) (4) Basically, then, the sum of the input and output currents of each preceding current mirror stage become the input current to the next following current mirror stage. Each preceding current mirror stage effectively presents a high output impedance current source to the following current mirror stage. Because the amplifier 10 is driven differentially, as is seen in Fig. 2, the input of current mirror 18 appears as a common emitter rather than as a common collector input to the driving source. This results in good matching between the input impedance of amplifier 10 and the driving source to the amplifier. As is evidence by the above equations, the stacked current mirrors 18...22 are utilized to build up the gain of amplifier 10. Referring now to Fig. 2, a complete schematic of amplifier 10 is illustrated wherein like components thereof are designated by the same reference numbers used in Fig. 1. It is apparent to those skilled in the art that amplifier 10 is suited to be manufactured in integrated circuit form using conventional low power bipolar integrated circuit processes. In the present case, amplifier 10 is comprised of three current mirror stages (n=3) that are stacked in the manner shown in Fig. 1. Relating back to the above, current mirror 18 is formed by diode connected transistor 40 and transistor 42 the connection therebetween being well known in the art. Transistor 40 functions as a semiconductor diode having its collector and base electrodes interconnected to the control or base electrode of transistor 42. The collector of transistor 40 acts as the input of the current mirror and is coupled both to input 12 and current source 24. The first or emitter electrodes of transistors 40 and 42 are interconnected at the common terminal of the current mirror while the collector or second electrode of transistor 42 (the output of the current mirror) is buffered via the collector-emitter conduction path of transistor 44 from power supply conductor 26, the base of the latter being coupled to a terminal at which a bias potential V B is provided. Transistors 46 and 48 function as the current mirror 20 with the collector of transistor 46 (the input of the current mirror) being coupled to the common terminal of the preceding current mirror). The bases of transistors 46 and 48 are interconnected with the emitter of transistor 50 and resistor 62. The collector of transistor 48 provides the output of the current mirror and is buffered from supply by cascoded transistors 44, 56 and 58. Similarly, transistor 50 which has its collector coupled to the emitter of transistor 56 and its base coupled to input 14 buffers current mirror 20 from voltage swings to effectively increase the frequency response of transistor 48. The third current mirror is illustrated as comprising diode connected transistor 52 and transistor 54 connected together in substantially the same manner as previously described in reference to first current mirror 18. Again, the output of the current mirror (the collector of transistor 54 is buffered from the output 16 of amplifier 10 by cascoded transistor 60 which can be switched on or off by an appropriate signal applied at terminal 64. Although amplifier 10 has been described above as having output 16 coupled to the collector of transistor 54 of current mirror 22, it is to be understood that an output of amplifier 10 can be taken from the common terminal of the aforementioned current mirror instead of the latter being coupled to conductor 28. Hence, what has been shown and described is a novel amplifier utilizing stacked current mirrors for amplifying a differentially applied input current. The sum of the input and output currents of each preceding stacked current mirror provides the input current source to the input of the next proceeding stacked current mirror.

Claims: An amplifier (10) responsive to a differential input signal applied to first (12) and second inputs (14) for providing an output signal at an output and including a plurality of stacked current mirrors (18, 20....22) each having an input, an output and a common terminal wherein the common terminal of each preceding current mirror is coupled to the input of the next proceeding current mirror and the output of the last one of the current mirrors is coupled to the output of the amplifier, and a direct current source (24) providing a current to the input of the first one of the current mirrors; characterised by conducting means for coupling the input and common terminal of the first one of the current mirrors to said first (12) and second inputs (14) of the amplifier respectively and a buffer stage (60) coupled between the output of the last one of the current mirrors to the output of the amplifier. The amplifier of claim 1 wherein said plurality of current mirrors includes said first (18), said last (22) and a second (20) current mirror, said input of said second current mirror (20) being coupled to said common terminal of said first current mirror (18) and said common terminal of said second current mirror (20) being coupled to said input of said last current mirror (22), said outputs of said first and second current mirrors being coupled to a first power supply conductor. The amplifier of claim 1 or claim 2 wherein said first current mirror (18) includes: first semiconductor diode (40) coupled between said input and said common terminal; and a first transistor (42) having first, second and control electrodes, said first electrode being coupled to said common terminal, said second terminal being coupled to said output and said control electrode being coupled to said input. The amplifier of claim 2 wherein said second current mirror (20) includes: a first transistor (46) having first, second and control electrodes, said second electrode being coupled to said input thereof; circuitry (50) for coupling said second electrode of said first transistor (46) to said control electrode thereof; and a second transistor (48) having first, second and control electrodes, said first electrodes of said first and second transistors being coupled to said common terminal thereof, said control electrode being coupled to said control electrode of said first transistor and said second electrode being coupled to said output thereof. The amplifier of claim 1, 2, 3 or 4 wherein said last current mirror (22) includes: a second semiconductor diode (52) coupled between said input and said common terminal; and a fourth transistor (54) having first, second and control electrodes, said first electrode being coupled to said common terminal, said second terminal being coupled to said output and said control electrode being coupled to said input.

Inventors: MAIN WILLIAM ERIC, MAIN, WILLIAM ERIC
Applicants: MOTOROLA INC, MOTOROLA, INC.
Application year: 1989
Main classification: H03F3
IPC codes: H03F3, H03F1