BIASING NETWORK FOR INTEGRATED PAIRS OF AMPLIFIERS INTERNALLY COMMUTABLE FROM A SINGLE-ENDED TO A BALANCED CONFIGURATION AND VICEVERSA

Abstract: In an integrated amplifier comprising at least a pair of operational amplifiers (A1,A2) which may be connected in a single-ended configuration to form a stereo amplifier or alternatively in a bridge configuration to increase the output dynamics which may be obtained, a single constant current generator (I3) generating a current having a value which is twice the value of the bias current of the input stages of the two operational amplifiers (A1,A2), connected between an inverting input (IN2) of one of the two operational amplifiers and ground, allows to cancel the offset voltage without contributing to increase in any appreciable way the noise level at the inputs and without the signal applied to the input terminals of the integrated amplifier causing modula­ tion problems.

Description: BACKGROUND OF THE INVENTION 1. Field of the invention The present invention relates to integrated amplifiers and in particular to integrated devices comprising a pair of amplifiers or a plurality of pairs amplifiers which may be internally connected in a single-ended (stereo) configuration or in a balanced (bridge) configuration and vice-versa. 2. Description of the prior art Lately integrated circuits containing one or more pairs of operational amplifiers have been developed which may be internally connected, by applying certain biasing voltages to one of the pins of the integrated circuit, in a single-ended configuration or in a balanced or bridge configuration. The possibility of changing the configuration of two integrated amplifiers is particularly useful in the field of audio amplifiers and allows, by utilizing the same integrated device, the realization of bridge configured audio amplifiers theoretically capable of supplying to the loudspeaker of the sound reproduction system a peak voltage equal to twice the value of the supply voltage, or as it is often the case in lower quality apparatuses, single-ended or stereo configured audio amplifiers having an output dynamics equal to the supply voltage, achieving a somewhat reduced power dissipation and requiring a lesser number of amplifying stages. Prior Italian Patent Application No. 83641 A/87 of July 15, 1987 and European Patent Application No. 88830392.2 of September 28, 1988, in the name of the present Applicant, disclose several integrated devices of this kind. Naturally each pair of integrated amplifiers, commutable in one or the other configuration commonly by means of integrated analog switches, share biasing networks, feed-back and interconnection networks which are formed normally by passive integrated circuit components. One problem of these internally configurable integrated pairs of amplifiers is the control of the offset voltage and of the noise level of the amplifiers. By considering for example the circuit diagram of Fig. 1 showing a pair of integrated amplifiers A1 and A2, commutable in a single ended or in a bridge configuration and by noting that the respective input resistances Ri and Ri', which are assumed substantially equal, are commonly much larger than the respective gain resistances Rf1, Rf2 and Rf1', Rf2', it is easily demonstrated that (by assuming equal the ratios Rf1/Rf2 and Rf1'/Rf2') the gain (Vout/Vin) of the two stages (noninverting stage A1 and inverting stage A2) is given by: G = (1 + Rf1 Rf2 ) = (1 + Rf1' Rf2' ) The bias current of the operational amplifiers A1 and A2 is indicated in the diagram of Fig. 1 with I and, for simplicity's sake, it is assumed equal for all the four inputs. This bias current does not generate significant voltage drops across the gain resistances Rf1, Rf2, etc., while generates nonnegligeable voltage drops across the input resistances Ri and Ri', the value of which is typically at least two orders of magnitude larger than the value of the parallel of the two resistances Rf1 and Rf2. Being Vp the bias voltage, in a stereo (single-ended) configuration the following relations are satisfied: Vout1 = (Vp + I x Ri) x G Vout2 = (Vp - Ri'' x I) x G from which an offset voltage is derived, given by: ΔVout = 2G x I x Ri If the two integrated amplifiers A1 adn A2 were connected in a bridge configuration (with the two input terminals IN1 and IN2 connected in common, the following relations are satisfied: Vout = (Vp + I 2 x Ri) x G Vout2 = (Vp - (I + I 2 ) x Ri'') x G and the offset voltage is given by: ΔVout = 2G x I x Ri This offset voltage is excessive in many cases. According to a known solution depicted in Fig. 2, two current generators I1 and I2, respectively connected between the non inverting input and ground and between the inverting input and ground, are employed. This solution has the drawback of requiring two current generators, but above all the generator I1 connected between the noninverting input of the amplifier A1 and ground is subject to modulation by the input signal which is applied to the IN1 terminal. This may cause harmonic distorsion of the input signal and of the output signal in a measure as large as the series resistance of the input signal source. Another type of known bias network theoretically capable of ensuring a null offset is depicted in the dia gram of Fig. 3, wherein: Ri2 = Ri and Ri1 = Ri'' It is possible to demonstrate that with such a circuit the offset is theoretically null by connecting as well as by disconnecting the input terminals IN1 and IN2. This is possible so far as each input of the operational amplifiers A1 and A2 has the same resistance causing the same voltage drop. Consequently the two outputs Vout1 and Vout 2 assume the same potential. Such a bias network has a disadvantage due to the fact that the resistances Ri1 and Ri2, which are not per se indispensable to the operation of the amplifier except for the offset problem, greatly increase the noise level at the inputs of the amplifiers, as it is well known to the technician. OBJECTIVES OF THE INVENTION Objective of the present invention is to provide a bias network for configurable integrated pairs of amplifiers which besides permitting the elimination of the offset voltage is exempt of the drawbacks of the antioffset bias networks of the prior art in respect to the noise performance of the amplifiers. BRIEF DESCRIPTION OF THE DRAWINGS In the annexed drawings, Figures 1, 2 and 3 , as already described above, depict circuit diagrams showing the condition which generates an offset voltage and the bias networks of the prior art for counterbalancing such an offset voltage. Figure 4 is a circuit diagram showing the bias network for integrated pairs of amplifiers which may be internally commuted from a single-ended configuration to a bridge configuration and viceversa object of the present invention. DESCRIPTION OF THE INVENTION With reference to the circuit diagram of Fig. 4 and in accordance with the present invention, between the inverting input of the amplifier A2 and ground is connected a current generator I3 which delivers a current 2I equal to twice the value of the bias input current I of the operational amplifiers A1 and A2. In a single-ended configuration of the two amplifiers, the output voltages at the respective output terminals OUT 1 and OUT 2 are given by: Vout1 = (Vp + I x Ri) x G Vout2 = (Vp - (I - 2I) x Ri'') x G = (Vp + I x Ri'') x G and therefore: Vout1 = Vout2 In a bridge configuration, with the two input terminals IN1 and IN2 connected in common, the output voltages are given by: Vout1 = (Vp + Ri x I 2 ) x G Vout2 = (Vp - Ri'' (I - I 2 - 2I)) x G = (Vp + Ri'' x I 2 ) x G and therefore also in this case: Vout1 = Vout2 Clearly as per the stated objective, an efficacious nullification of the offset voltage is achieved, in accordance with the present invention, by means of a single current generator I3 connected between the inverting input of amplifier A2 and ground. This solution is remarkably advantageous in respect to the known solutions. The problem relative to the modulation by an input signal of the current delivered by the current generator directly connected to the input terminal for controlling the offset according to the prior art is substantially overcome. Moreover the circuit of the present invention for controlling the offset does not negatively affect in any substantial way the conditions relative to the input noise level as it was the case with one of the prior art techniques as discussed above.

Claims: An input bias network for an integrated pair of operational amplifiers, which may be internally commuted from a single-ended to a bridge configuration and viceversa to form a desired amplifier circuit, capable of preventing generation of an offset voltage and comprising a constant voltage source connected through a first resistance (Ri) to a noninverting input of a first operational amplifier of said pair and constituting a first input terminal of the circuit, and connected directly to a noninverting input of a second amplifier of said pair, the inverting input of which is connected through a second resistance (Ri') to a second input terminal of the circuit, said constant voltage source forcing the passage of a substantially identical bias current through the inverting inputs and noninverting inputs of both said operational amplifiers, characterised in that a constant current generator (I3) generating a current the value of which is twice the value of said bias current is connected between the inverting input of said second operational amplifier and a ground node of the circuit. An integrated amplifier having two input terminals and two output terminals and comprising a pair of operational amplifiers each having a noninverting input, an inverting input and an output, the noninverting input of a first operational amplifier being directly connected to a first input terminal of the integrated amplifier, the inverting input of a second operational amplifier being connected to a second input terminal through a first resistance, the outputs of said operational amplifiers being connected respectively to said two output terminals of the amplifier, an input bias network comprising a constant bias voltage source connected through a second resistance to the noninverting input of said first operational amplifier and connected directly to the noninverting input of said second operational amplifier for forcing a bias current through the inputs of said two operational amplifiers, the operational amplifiers being functionally connectable in a single-ended or in a bridge configuration by utilizing individually the two input terminals or the two input terminals connected in common to form a single input terminal, respectively, characterised in that a constant current generator (I3) generating a current having a value which is twice the value of said bias current imposed through the inputs is connected between the inverting input of said second operational amplifier and a common ground node of the integrated amplifier.

Inventors: BOTTI, EDOARDO
Applicants: SGS-THOMSON MICROELECTRONICS S.R.L.
Application year: 1989
Main classification: H03F3
IPC codes: H03F3