TESTING OF ANALOGUE CIRCUITS IN SEMICONDUCTOR DEVICES

Abstract: A semiconductor device comprising an array of analogue circuits and components configured on individual tiles (17) arranged in rows and columns includes strips (18, 20) of conductive material extending between the circuits and components, with analogue switches (22) enabling individual analogue circuits and components to be connected in turn to associated test equipment (24) to test the integrity of the circuits and components. The strips (18, 20) are preferably of polysilicon or metal. The invention includes a method of testing such devices.

Description: TESTING OF ANALOGUE CIRCUITS IN SEMICONDUCTOR DEVICES This invention relates generally to the testing of analogue circuits of semiconductor devices. Semiconductor devices which incorporate analogue/digital arrays are known, notably arrays made by the BiCMOS process. One such known device made by ' the BiCMOS process consists of two distinct sections , one of which is a digital CMOS compact array and the other of which is an analogue tile array with analogue I/O buffers. The analogue section may comprise for example from 96 to 672 tiles depending upon the array size. In such an array 4 tiles are generally required to construct a basic operational amplifier for example. The arrangement of the tile structure inside such an array is shown by way of example in Fig. 1. The digital array is indicated at 10 and the analogue tile areas at 12. Analogue I/O pads 13 run along the bottom edge of the chip and also cover the height of the analogue tile region down two sides. These analogue I/O buffers may be constructed from both CMOS and bipolar devices, allowing a wide range of circuit configurations to be implemented. One 8 tile column 14 of analogue tiles is shown enlarged, and one single analogue tile 16 from that column is shown enlarged again to illustrate the layout of individual components, namely transistors, resistors and capacitors. Surrounding the tiled region is a power bus structure. In the manufacture of such semiconductor devices it is necessary that the device should be tested to establish that the various circuits are functioning correctly. The testing of the analogue section of the device presents fundamentally different test requirements as compared with the testing of the digital circuits. A typical analogue test may include checks on amplitude, phase and noise. It is an object of the present invention to enable analogue circuits within a semiconductor device to be tested more quickly and easily than heretofore. It is a further object of the present invention to enable a semiconductor device having an array of analogue tiles to be tested column by column by strobing test equipment from column to column across the array. In accordance with the present invention there is provided a semiconductor device comprising an array of analogue circuits and components, characterised by the provision of strips of conductive material extending between said circuits and components to enable said circuits and components to be connected to associated test circuit means. Also in accordance with the invention there is provided a semiconductor device comprising an array of analogue circuits and components arranged on tiles which are set in columns, characterised by strips of conductive material extending between said tiles and between analogue circuits and components on said tiles, to enable said circuits and components to be connected to associated test circuit means. The conductive strips extending through and between the analogue tiles of a column preferably comprise lines of polysilicon, metal or other low-resistance interconnect material. Preferably, the lines of polysilicon or other material are connected through analogue switches to particular analogue circuits within the tiles of the associated column. Also in accordance with the invention there is provided a method of analogue testing of a semiconductor device having an array of analogue circuits and components, which comprises providing strips of conductive material extending between said circuits and components, connecting said strips to associated test circuit means, and connecting individual ones of said circuits and components to said test circuit means via said strips in turn to effect testing thereof. One example of a device in accordance with the invention is shown in Fig. 2 of the drawings. This is a blow-up of a single . analogue tile 17 to expose the individual components. Here the tile is shown as comprising: 6 NPN bipolar transistors 3 P-channel MOS transistor pairs 1 N-channel MOS transistor pair 1 capacitor 2 mask programmable resistor areas Analogue functions are constructed by the interconnection of devices within a tile or number of tiles to form a specific type of circuit. For test purposes, in accordance with the invention, conductive strips 18 and 20 of polysilicon, metal or other low-resistance interconnect material extend in a sinuous manner through each tile and between the tiles to enable access to be gained to the analogue circuits within a column of tiles. One conductor strip is a force conductor and the other is a sense conductor. Analogue switches, schematically indicated ' for example at 22, are provided at appropriate positions along the length of the conductors 18, 20 to connect them to particular components or to appropriate points in the analogue circuits through which they extend. The actual connections between the switches " and the circuits or components are not shown. These analogue switches may be MOS gates for example, each consisting of a transistor or pair of transistors configured as a switch, so that associated test equipment can be connected in turn to the respective circuits and components of the analogue array. The conductor strips 18, 20 of any one column are connected to an output, e.g. a pin, to which test circuitry 24 can be connected, so that the test circuitry 24 can be strobed from output to output to check the integrity and functioning of the circuits within the respective columns. This enables a rapid check to be carried out on the analogue circuits. If desired, a pair of conductive strips, such as 18 and 20, can extend over more than one column of tiles. The test circuitry 22 can be a simple dc source and measurement system. By testing in this way one can have a high confidence level that the analogue section of the device will work after packaging. The majority of analogue tests can only be carried out successfully to functional specifications once the semiconductor device has been packaged. In " order to speed up probe testing, the tests carried out on analogue functions can be restricted to identifying gross failures.

Claims: CLAIMS : 1. A semiconductor device comprising an array of analogue circuits and components, characterised by the provision of strips of conductive material extending between said circuits and components to enable said circuits and components to be connected to associated test circuit means. 2. A semiconductor device comprising an array of analogue circuits and components arranged on tiles which are set in columns, characterised by strips of conductive material extending between said tiles and between analogue circuits and components on said tiles, to enable said circuits and components to be connected to associated test circuit means. 3. A semiconductor device according to claim 1 or 2, which includes analogue switch means associated with said strips and by which the analogue circuits and components are connected to the strips. 4. A semiconductor device according to any preceding claim, in which the strips are of polysilicon. 5. A semiconductor device according to any of claims 1 to 3, in which the strips are of metal. 6. A semiconductor device according to any preceding claim, which includes a plurality of pairs of said strips, with one strip of each pair being a force conductor and the other strip of each pair being a sense conductor. 7. A semiconductor device according to any preceding claim, which is a chip having both a digital section and a separate analogue section, the analogue section comprising a plurality of individual tiles arranged in rows and columns and with analogue I/O buffers at the periphery of the tiled region. 8. A method of analogue testing of a semiconductor device having an array of analogue circuits and components, which comprises providing strips' of conductive material extending between said circuits and components, connecting said strips to associated test circuit means, and connecting individual ones of said circuits and components in turn to said test circui - means via said strips to effect testing thereof. 9. A method according- to claim 8, wherein the circuits and components are arranged in columns, and the circuits and components are tested column by column by strobing the test circuit means across the columns.

Inventors: WALLER DAVID LEONARD, WALLER, DAVID, LEONARD
Applicants: LSI LOGIC EUROP, LSI LOGIC EUROPE PLC
Application year: 1989
Main classification: G01R31
IPC codes: G01R31, H01L21