FINE FEATURED ELECTRICAL CIRCUITS

Abstract: A method of forming electrical circuits is described by the process of electroless deposition of conductive material onto a substrate having receptive and non-receptive areas such that the conductive material is deposited on the receptive areas and not on the non-receptive areas thereby forming a desired conductor pattern, comprising sequentially the steps of: i) taking a substrate comprising a receptive body (1) formed of insulating material receptive to, or treatable so as to be receptive to, electroless deposition of conductive material; and a non-receptive covering (2, 6) of insulating material overlying the receptive body; ii) removing material by stepwise machining through the depth of the non-receptive covering by ultra-violet induced ablation so as to expose the receptive body in the form of a desired conductor pattern; and iii) electrolessly depositing conductive material (11) on the exposed receptive body to form the conductor pattern. Further layers of receptive material (14, 15) and non-receptive material (16, 17) may be applied to allow further circuit layers to be made. An excimer laser is a suitable source of ultraviolet radiation.

Description: Fine Featured Electrical Circuits This invention relates to the manufacture of electrical circuits and is particularly, though not exclusively, applicable to the manufacture of flexible electrical circuits. It is known to produce electrical circuits by electroless deposition of conductive metal onto receptive areas of a substrate, the non-receptive areas not allowing deposition of conductive metal (see for example European Patent Specification No. 0273376). Such methods require many process steps requiring careful selection of materials for their chemical properties since aggressive reagents are used to dissolve either metal or photoresists. It is also known (European Patent Specification No. 0256428) to form a substrate by moulding a non-receptive material to overlie a material treatable to be receptive leaving exposed elevated areas of the treatable material on which electroless deposition may occur. This however results in deposited conductor standing proud of the surrounding surface. United Kingdom Patent Specification No. 1261578 discloses a method of producing a circuit board by the steps of:- i) using an insulating board of catalysed base material; ii) providing a non-catalysed layer on the insulating board, which layer will not retain metal when placed in an electroless metal depositing bath; iii) removing the non-catalysed layer from the base material over those areas which are to accommodate the metallic conductor; and iv) depositing copper on the exposed areas of the catalysed base material in an electroless deposition bath. The means described for removing the non-catalysed layer include mechanical machining (e.g. milling or drilling) and, in an unexemplified statement, laser beams, UV radiators, hot bulbs, ultrasonic radiators, chemical etchants. It is also known to use an ultra-violet laser such as an excimer laser to remove polymeric or glass materials (see May 1987 edition of Laser Focus/Electro-Optics, published by Penn Well Publishing Company; and, "Excimer Lasers: An emerging technology in the Electronics Industry", T. Znotins,. D. Poulin, J. Reid of Lumonics Inc; a paper presented at the IPC Fall Meeting, October 1987 in Chicago, Illinois). Such lasers have very useful characteristics for electronics processing not all of which have been fully appreciated before now. Firstly they remove material by a non-thermal ablative process that does not give rise to undesirable degradation of surrounding material as thermal processes (such as use of C0 2 lasers) can do. Secondly ultra-violet radiation is strongly absorbed by polymeric and glass materials and so does not penetrate such materials very far, this means that the ablative effect is limited to a thin skin on the surface of an exposed object (the thickness of this layer varies from material to material and with the UV flux but is typically 0.1 - 0.5 μm thick). Thirdly such ultra-violet lasers do not affect copper or other metal layers on polymeric substrates unless the metal layer is very thin (e.g. less than 3μm). Fourthly, to have this ablative non-thermal effect a critical radiation intensity must be exceeded for the material to be processed. If the radiation intensity is below this critical intensity the energy is deposited as heat. This allows the use of masks, having a high critical intensity (such as most metals), to give imagewise processing of materials having a lower critical intensity. This is in contradistinction to the conventional use of e.g. C0 2 lasers which x write' using a focused spot. This imagewise processing allows short processing times. The applicants have realised that the techniques of electroless deposition and stepwise machining (such as ultra¬ violet radiation processing provides) can be combined to give a technology for forming electrical circuits that involves fewer process steps and allows much finer conductors to be made than is conventionally the case. The step-by-step ablation provided by ultra-violet lasers allows very precise stepwise depth control of material removal and this precision has not been realised or exploited before. Further they have realised that scanning of a line of ultra-violet laser radiation is advantageous in that it allows lasers of low UV flux to be used without the problems of overlap or discontinuity provided by scanning of a spot of ultra-violet laser radiation. Accordingly the present invention provides a method of forming electrical circuits by the process of electroless deposition of conductive material onto a substrate having receptive and non-receptive areas such that the conductive material is deposited on the receptive areas and not on the non-receptive areas thereby forming a desired conductor pattern, comprising sequentially the steps of:- i) taking a substrate comprising a receptive body formed of insulating material receptive to, or treatable so as to be receptive to, electroless deposition of conductive material; and a non-receptive covering of insulating material overlying the receptive body; ii) removing material by stepwise machining through the depth of the non-receptive covering by ultra-violet induced ablation so as to expose the receptive body in the form of a desired conductor pattern; and iii) electrolessly depositing conductive material on the exposed receptive body. Further features of the invention are apparent from the claims and the following description. The invention is illustrated by way of example in the following description with reference to the drawings in which:- Figs. 1-3 comprise a series of sectional views illustrating the manufacture of a circuit in accordance with the invention; Figs. 4-9 comprise a series of sectional views illustrating the manufacture of a double-sided circuit in accordance with the invention; Fig. 10 shows in sectional view an intermediate step in manufacturing a multi-layer circuit in accordance with the invention . In F ig . 1 a substrate f or a c ircuit i s provided comprising a base 1 of a material receptive to the electroless depositi on of metal . A suitable material is a polyethersulphone seeded with a palladium catalyst. Such can be obtained from LNP Engineering Plastics of Wilmington , De laware , under the trade mark VICTREX (PES) 3609ML20 ( CATALYTIC ) (Trade Mark) . Overlying this is a layer 2 of a material non-receptive to electroless deposition of metal . Suitable materials include :- an unseeded polyethersulphone such as (VICTREX ( PES ) supplied by ICI Americas Inc. , of Wilmington, Delaware; a polyimide such as KAPTON (TM) , supplied by El Dupont de Nemours and Company; polyethyleneterephthalate ; or indeed any material that proves ablatable under UV radiation and is compatible with other processing steps used. An alternative material comprises a pair of KAPTON layers sandwiching a catalysed polyimide layer. Attachments of the layers to each other may be by means of adhesive, by in situ polymerisation, or by mechanical attachment such as by heat fusing of the layers. Many other suitable materials and arrangements may be envisaged. Fig. 2 shows the substrate of Fig. 1 after exposure to an- excimer laser (such as a KrF/Ar filled QUESTEK 2840 (Trade Mark) supplied by Questek, of Billerica, Massachusetts, which gives ultra-violet radiation of a wavelength 248nm). The exposure is through a mask (not shown) which may either be full-size and in contact with the substrate, or a greater-than-full-size mask with optical reduction to the desired size. The latter option may be preferable since:- i) the masks are easier to make, having coarser features than the final product: ii) if a full sized mask is in contact with the substrate localised damage can occur both mechanically and due to heat conducted from the mask to the substrate: and iii) using a greater-than-full-size mask allows the mask to be made of materials having a lower critical radiation intensity than the material of the substrate. An alternative to using a mask is to use a hologram to produce either a spot to be tracked over a circuit path, or even to produce an image of a circuit directly. The exposure to UV radiation through a mask results in holes or trenches 3 being formed in the layer 2 to expose the base material 1. By using ultra-violet radiation processing it is possible to machine down stepwise through layer 2 to the surface of base 1 in steps of e.g. 0.1 - 0.5μm at a time. By reducing the intensity of radiation to just above a critical threshold intensity for the material of base l it is possible to provide the bottom 4 of trench 3 with a roughened finish suitable for mechanical keying to deposited conductor. For polyimide materials the critical threshold intensity is «0.75 Jem "2 . Above this threshold a clean cut results; below it imperfections are left, somewhat volcano-like in form. Tables 1 and 2 below show respectively the cutting time and imperfection densities obtained on cutting 75μm thick polyimide films when imaging an area 40mm x 40mm. Table 1 Fluence (Jem -2 Cutting time (mins) 0.32 5.0 0.40 5.5 0.53 6.0 0.64 7.0 0.75 8.0 Ta le 2 Fluence (Jem "2 ) Im erfection ensity (nos.cro -2 '.) 0.32 3000 0.40 1800 0.53 800 0.64 150 0.75 0 The imperfections produced are, as mentioned above, volcano-like in form comprising steep sided cones standing proud of the surface; sometimes the peaks of the cones are slumped to one side giving a hooked appearance that further improves adhesion. Formation of these imperfections is presumed to be due to a shadowing effect; impurities or regions of improved chemical bonding at the surface not ablating and forming a mask for material below. Fig. 3 shows the results of electroless deposition of e.g. copper in the machined substrate of Fig. 2 to form a conductor 5. The conductor 5 may be applied using conventional electroless deposition apparatus as is available from Cirquip Limited, of Leamington Spa, England. For the deposition solution a suitable electroless deposition system comprises a Macudep 54 or Macudep 900 (Trade Marks) system supplied by MacDermid GB Ltd.,of Telford, England. It is noteworthy that using this process it is possible to produce conductors having " narrow widths (e.g. 20-50μm) and having straight sidewalls. Also because of the fine controllability of electroless deposition it is possible to deposit conductor to lie flush with the surface of layer 2. This is important for multi-layer circuits since it allows further layers to be applied simply without the need for special pressing techniques (coating by conformally bonding). Referring to Figs. 4 - 9 a process is shown for making a double layer flexible circuit. In Fig. 4 a substrate is shown comprising a base 1 and covering layer 2, the base 1 being in the form of a sheet approximately 15μm thick and having a lower covering layer 6. Both covering layers 2 and 6 being approximately lOμ thick. In a first machining step (by excimer laser) through holes 7 (Fig. 5) are formed through the substrate where vias are required from a top circuit layer to a lower circuit layer. Fig. 6 shows the substrate after two further machining steps in which surface 2 and 6 are machined (by excimer laser) to form holes or trenches 8,9 respectively for top and bottom circuit layers. Figs. 7 and 8 show the progress of electroless deposition of conductor 10 on the layer 1 which can lead to the formation of conductor 11 comprising the conductors of the top and bottom layers, and vias therebetween, as an integral whole and lying flush with the surface of layers 2 and 6. Fig. 9 shows the circuit with applied covercoats 12 and 13 of suitable insulating material (e.g. polyimide or polyether sulphone). The covercoats 12 and 1 can be machined through by further ultra-violet machining to expose conductor 11 where contacts are required. By further exposure to ultra-violet radiation the completed circuits can be cut away from unwanted substrate. Since the metal conductor 11 will not be affected by the ultra-violet radiation these two steps (exposing conductor 11 and cutting free from unwanted substrate) may be combined as one step. Figure 10 shows a route to further multi-layering of circuits. By applying further layer pairs 14, 16 and 15, 17 of receptive and non-receptive materials to layers 2 and 6 respectively of the circuit of Fig. 8 further machining steps allow extra circuit layers to be formed in an analogous manner. It is to be noted that since metals (e.g. copper) do not ablate in the same way as the polymeric materials of the substrate it is possible to machine down to copper to make vias or contacts with no fear of destroying already formed conductors. In the above reference has been made to materials being receptive to electroless deposition of copper. This term must be taken as including materials which by an intermediate chemical, photochemical, physical or other process can have their surface primed to receive electroless deposition of any conductor material. Although this process of forming circuits can be used on substrates of any thickness economically a substrate of about 75μm is about the greatest thickness that can sensibly be used for flexible circuits. By virtue of the whole of the receptive body being receptive or treatable to be receptive the machining step need not be accurate to finish at the original surface of the receptive body as would be the case were, for example, the material of EP 0273376 used. It is also possible however to have an extremely thin receptive area and machine accurately to that layer. A suitable way of providing a thin layer is to use a receptive adhesive to join two non-receptive covercoats. The adhesive can be made receptive by incorporating submicron particles of palladium doped clays. To obtain a high enough UV flux at the substrate the optical system can be arranged to produce a line of sufficient width to cover the mask, and hence the circuit, that is scanned over the mask. This has the advantage over a spot scanning system that only a single pass over the mask is required so that problems of overlap or discontinuity are avoided. Provided that the pulse rate of the UV laser and the scanning rate of the line are chosen appropriately each area to be ablated will receive the same flux and so will be cut to the same depth. As mentioned above contact masks may be used (made of stainless steel or the like) but these have disadvantages in that the size of feature attainable is limited by the size of feature that can be formed on the mask; and further, damage to the substrate may result both through mechanical contact and due to heating of the mask by the ultra-violet radiation. Alternatively an optically reduced mask may be used. This has the advantages that:- i) Feature size attainable is a function of both the feature size of the mask and of the degree of optical reduction. This means that relatively course features on the mask can be imaged as fine features on the substrate. This simplifies the production of masks, ii) Since optical reduction is used the flux at the mask is reduced below that at the substrate and so materials of a lower critical intensity than the substrate may be used as mask materials. Often such materials are easier to handle in making masks. For example a metal on glass or quartz mask may be used. Suitable metals include chromium, copper and aluminium. No damage is shown for masks of copper on glass and aluminium on glass when UV intensities of <0.13Jcm~ 2 and <0.26Jcm "2 respectively are used. For a 10 x optical reduction the experienced flux would be of the order of about »0.07Jem" . The size of feature obtainable is a function of the overall size of circuit since the definition is controlled by the geometry of the optics. For example for one tested geometry the optics broke down for angles of incidence of UV radiation greater than 4° which meant that for a 7cmx7cm circuit feature sizes of «40μm were attainable: for a 2cmx2cm circuit feature sizes of «20μm were attainable. Of course improving optics may result in much improved feature definition. Of course for relatively coarse features (say, >l00μm) a direct contact mask may be preferable as it allows larger circuit areas to be made and also damage from the mask is less of a problem if the features concerned are coarser. Thus it is possible to envisage that one piece of apparatus could be used in at least two modes:- i) Direct contact mask to produce large circuits having features of the same scale as the features attainable for the mask material; ii) optically reduced mask allowing features finer than are attainable for mask materials to be attained on limited sized circuits. It is readily apparent from the above that all the conventional requirements of conductor lines, pads and vias can be made using the process of the invention.

Claims: CLAIMS 1. A method of forming electrical circuits by the process of electroless deposition of conductive material onto a substrate having receptive and non-receptive areas such that the conductive material is deposited on the receptive areas and not on the non-receptive areas thereby forming a desired conductor pattern, comprising sequentially the steps of:- i) taking a substrate comprising a receptive body formed of insulating material receptive to, or treatable so as to be receptive to, electroless deposition of conductive material; and a non-receptive covering of insulating material overlying the receptive body; ii) removing material by stepwise machining through the depth of the non-receptive covering by ultra-violet induced ablation so as to expose the receptive body in the form of a desired conductor pattern; and iii) electrolessly depositing conductive material on the exposed receptive body to form the conductor pattern. 2. A method as claimed in Claim 1 in which in a machining step the substrate is exposed to ultra-violet radiation below a critical threshold intensity for the receptive body, whereby exposed surfaces of the receptive body are roughened to provide mechanical keying for deposited conductive material. 3. A method as claimed in Claim 1 or Claim 2 in which ultra-violet induced ablation is used to form one or more holes passing through the receptive body whereby conductors formed on opposed surfaces of the receptive body can be linked by conductors formed in said one or more holes. 4. A method as claimed in any preceding claim in which subsequent to electroless deposition of conductive material on the exposed receptive body to form a conductor pattern a further body of receptive material and further non-receptive covering is applied to the circuit and a further conductor pattern is formed in the further body of receptive material making electrical contact with said conductor pattern by the steps of:- i) removing material by stepwise machining through the depth of the further non-receptive covering by ultra¬ violet induced ablation so as to expose the further receptive body in the form of a desired conductor pattern, ii) removing material by stepwise machining through the depth of the further receptive material so as to expose the conductor pattern where electrical contact is required, and iii) electrolessly depositing conductor material on the exposed further receptive body and on the conductor pattern. 5. An electrical circuit formed by the method of any of Claims 1 to 4 in which features of <50μm width are provided. 6. A substrate for use in the method of any of Claims 1 to 4 comprising a body of insulating material receptive to, or treatable to be receptive to, electroless deposition of conductive material; and a non-receptive covering of insulating material overlying the receptive body, the substrate having an overall thickness small enough that the substrate and an applied circuit will be flexible. 7. A substrate as claimed in Claim 6 in which the thickness of the receptive material is >15μm; the thickness of the non- receptive covering is >10μm; and the overall thickness of the substrate is <75μm. 8. A material comprising a receptive body of insulating material, and a non-receptive covering of insulating material overlying one side of the receptive body and for use in the method of Claim 4, and which is sufficiently thin that a circuit formed by the method of Claim 4 and using the material will be flexible. 9. Apparatus for use in the method of any of Claims l to 4 and comprising an ultra-violet laser, a mask, and an optical reduction system whereby the features of the mask may be reduced onto the substrate. 10. Apparatus as claimed in Claim 9 in which the mask has a critical radiation intensity less than that of the substrate. 11. Apparatus for use in the method of any of Claims l to 4 and comprising optical means to produce a line of ultra-violet laser radiation of sufficient width to cover the mask, and hence the circuit,- the line being scanned over the mask when in use.

Inventors: BETTERIDGE IAN ARTHUR, GUEST PETER ANTHONY, BETTERIDGE, IAN, ARTHUR, GUEST, PETER, ANTHONY
Applicants: MORGAN MATERIALS TECHNOLOGY LI, MORGAN MATERIALS TECHNOLOGY LIMITED
Application year: 1989
Main classification: H05K3
IPC codes: H05K3