FREQUENCY RESPONSE DETECTION APPARATUS

Abstract: An apparatus for detecting frequency response of audio signals of left and right channels. The audio signals of the left and right channels are alternately introduced at a predetermined periodic rate with intervals of a predetermined duration (T2) between time of signal introduction, the introduced audio signals are detected after being divided into a plurality of frequency band signals by band-pass filters (5₁-5₅), and one of the deteoted outputs is in turn relayed selectively. During the above described intervals of predetermined duration (T2), an ouptut end of the detection device is grounded and the gain of the band-pass filters (5₁-5₅) are made substantially equal to zero in synchronism with the timing of the grounding.

Description: The present invention relates to a frequency response detection apparatus, and more specifically to an apparatus for detecting frequency response of audio signals. Apparatuses for detecting frequency response such as the spectrum analyzer are designed in which the audio band is divided into a plurality of frequency bands, and the signal level is detected for each of the plurality of frequency bands. Such apparatuses are provided with means for dividing the audio signal into a plurality of frequency band signals, means for respectively detecting the frequency band signals, and means for switching and in turn relaying one of the detection output signal. The relayed detection output signal is treated by an A/D (analog to-digital) conversion process, and then used as a drive input signal of a two-dimensional display means such as an LED (light-emitting diode) display device so that the detected frequency response is displayed as the frequency spectrum. In the case where the frequency response is detected for each of the audio signals of the L (left) and R (right) channels with this type of frequency response detection apparatus, a circuit having the above described construction is provided separately for each of the left and right channels. Therefore, there inevitably is an increase in number of the circuit elements constituting the apparatus, and increases in the cost result. Hence, it is conceivable to detect the frequency response of each of the audio signals of L and R channels by a time-division process in order to use the circuit commonly for the signals of both channels. In this case, however, it is necessary that the frequency response can be surely detected for each of the channels. ELEKTOR, vol. 9 (1983) no. 6, pp.6-38 to 6-44 Canterbury, GB, describes a frequency response detection apparatus in which combined left and right channels are divided into a plurality of frequency bands. The peak levels are detected and the levels fed sequentially by a multiplexer to respective columns of a display which is controlled by a second multiplexer. US-A-4492917 describes an audio signal level display device in which the left and right channels are fed to separate parts of a filter bank, or are summed and fed to both parts of the filter bank. The present invention has been made under these circumstances, and an object of the present invention is to provide a frequency response detection apparatus which is capable of surely detecting the frequency response for each of the channels. The present invention provides a frequency response detection apparatus comprising: input means for alternately introducing left and right audio channel signals at a predetermined periodic rate, intervals of a predetermined duration being interposed between signal introduction periods; frequency analysing means for dividing said audio signals introduced by said input into a plurality of frequency band signals; detector means for respectively detecting said plurality of frequency band signals; reset means for grounding an output end of said detector means in said intervals of a predetermined duration; and a relay switch means for relaying in turn one of detected output signals of said frequency band signals, wherein said frequency analysing means includes a plurality of band-pass filters provided correspondingly to said plurality of frequency band signals and a control means for making the gain of at least one of the band-pass filters substantially equal to zero in synchronism with reset timings of said reset means. The invention will be further described by way of example, with reference to the accompanying drawings, in which: Figure 1 is a circuit diagram showing an embodiment of the frequency response detection apparatus according to the present invention; and Figures 2A through 2C are waveform diagrams showing the circuit operation of the apparatus shown in Figure 1. The preferred embodiment of the present invention will be specifically explained with reference to the accompanying drawings hereinafter. Figure 1 shows the embodiment of the present invention. In figure 1, audio signals of the L and R channels are supplied to an input circuit 2 through input terminals 1L and 1R of the L and R channels. The input circuit 2 includes an amplifier 3, resistors R₁ and R₂ connected in series between the input terminals of the amplifier 3, a switch SW₁ connected between a common junction of the resistors R₁ and R₂ and ground, resistors R₃ and R₄ connected in series between the input terminal 1R and the input terminal of the amplifier 3, and a switch SW₂ connected between the common junction of the resistors R₃, R₄ and ground. In accordance with switch control signals (a) and (b) respectively shown in Figures 2A and 2B issued from the controller 4, the switches SW₁ and SW₂ are controlled on and off, so that the input circuit 2 alternately introduces the audio signals of the channels L and R every predetermined period T₁ excluding intervals of a predetermined duration T₂ between the times of signal introduction. The audio signals of the L and R channels introduced by the input circuit 2 are divided by means of BPF (Band Pass Filters) 5₁ through 5₅ for respective frequency range, forming n band frequency signals. Each of the BPFs 5₁ through 5₅ consists of, taking example of the BPF 5₁, an operational amplifier OP whose non-inverting input terminal is grounded, resistors R₅ and R₆ connected in series between the output end of the amplifier 3 and ground, capacitors C₁ and C₂ whose one ends are commonly connected to a junction of the resistors R₅ and R₆ and whose other ends are connected to the output end and the inverting input of the operational amplifier OP respectively, and a resistor R₇ connected between the other ends of the capacitors C₁ and C₂. A transistor Q is connected in parallel with the resistor R₇, and driven to turn on during the predetermined time period T₂ by a reset signal (c), which is generated by the controller 4 and supplied to its base through a resistor R₈, as illustrated in Figure 2C. The n band frequency signals which have been divided by the BPFs 5₁ through 5₅ are respectively rectified and smoothed out by detectors 6₁ through 6 n which are made up of a diode D and a capacitor C₃. Between the output end of the detectors 6₁ through 6 n and ground, there are respectively provided switches SW₃ which are driven to turn on by the above-described reset signal (c). Each detection output signal of the detectors 6₁ through 6 n are respectively supplied to input terminals ch₁ through ch n of a repeater switch circuit 7. To the repeater switch circuit 7, a channel designation code signal (d) having binary digits whose number is equal to the number of channels is supplied in order from the controller 4 with a periodicity determined by the internal clock. The repeater switch circuit 7 selectively relays, in turn, one of the detection output signals supplied to the input terminals ch₁ through ch n which is designated by this channel designation signal. The detection output signal selected by the repeater switch circuit 7 is converted to a digital signal by an A/D converter 8, and supplied to the display drive circuit (not shown). The display drive circuit drives, for example, LED display devices of L and R channels alternately in accordance with the A/D conversion output signal in synchronism with the above-described switch control signals (a) and (b). The operation of the above-described circuit will be explained hereinafter. The audio signals of L and R channels are alternately introduced at predetermined intervals T₁ with the constant periods T₂ remained between the signal introduction periods as a result of on-off control of the switches SW₁ and SW₂ by the switch control signals (a) and (b) illustrated in Figures 2A and 2B. The introduced audio signals of the L and R channels are respectively divided, according to the frequency band, into n band frequency signals. These signals are detected in the detector circuits 6₁ through 6 n and supplied to the A/D converter circuit 8 after switched in turn and relayed by the repeater switch circuit 7. As mentioned above, the audio signals of L and R channels are introduced alternately while constant periods T₂ are interposed between the signal introduction periods. In this constant period T2, the output end of the detectors 6₁ through 6 n are grounded as the switch SW₃ is switched on by the reset signal (c) generated at the controller 4. With this operation, leaking of the band frequency signal of one channel to the other channel is prevented. However, because of the transitional response between the band frequency of each BPF 5₁ through 5 n and the switching between the L and R channels, there can be a state where the detection output is generated after the switch SW₃ is turned off, although the switching of the channel has been completed. In other words, even though switching between the L and R channels are performed with the audio signal of only one channel inputted, the display of level can appear on the display device of the opposite channel. Hence, according to the present invention, the transistor Q is connected in parallel with each resistor R₇ of the BPF 5₁ through 5 n , and the transistor Q is driven by the reset signal (c). As the transistor Q is turned on, the resistor R7 is short-circuited, to reduce the gain of the BPFs 5₁ through 5 n substantially to zero, so that the electric charge of the capacitor C₁ is discharged to ground through the transistor Q and the operational amplifier OP at once, and the electric charge of the capacitor C₂ is discharged to ground through the operational amplifier OP at once. Thus, the leaking of the band frequency signal of one channel to the other channel is surely prevented. In the above embodiment, the transistor Q is provided for every resistor R₇ of the BPFs 5₁ through 5 n , and the transistor is driven to turn on by the reset signal (c). However, since the speed of response to the switching between the L and R channels is faster in higher frequency bands, the problem described above will not arise in those frequency bands. Therefore, it is practically sufficient to provide the transistor Q in parallel with the resistor R₇ of the BPFs of only the low frequency bands, for example of the BPFs 5₁ and 5₂, and to turn the transistors Q on by the reset signal (c). As explained in the foregoing, according to the present invention, the frequency response detection apparatus is configured to alternately introduce the audio signals of L and R channels with a predetermined periodicity while interposing intervals of a constant duration between the signal introduction periods, so that the band-pass filters and the detection means are commonly used, and a control operation is performed so that the output end of the detection means is grounded during the constant period and so that the gain of the band-pass filter is reduced to zero in synchronism with the timing of grounding. Therefore, the circuit construction of the apparatus is simplified and the reduction in cost and space of the apparatus is enabled, while detection of the frequency response is surely performed for the signal of each channel.

Claims: A frequency response detection apparatus comprising: input means (2,4) for alternately introducing left and right audio channel signals at a predetermined periodic rate, intervals of a predetermined duration being interposed between signal introduction periods; frequency analysing means (5) for dividing said audio signals introduced by said input (2,4) into a plurality of frequency band signals; detector means (6) for respectively detecting said plurality of frequency band signals; reset means (4,(c)) for grounding an output end of said detector means (6) in said intervals of a predetermined duration; and a relay switch means (7) for relaying in turn one of detected output signals of said frequency band signals, wherein said frequency analysing means (5) includes a plurality of band-pass filters provided correspondingly to said plurality of frequency band signals and a control means (4,(c),Q) for making the gain of at least one of the band-pass filters substantially equal to zero in synchronism with reset timings of said reset means (4,(c)). An apparatus as set forth in claim 1, wherein each of said band-pass filters comprises an operational amplifier (OP) having a grounded non-inverting input terminal, a first resistor (R₅) having a first end to which said audio signal being introduced is applied, first and second capacitors (C₁,C₂) each having first and second ends, said first ends of said first and second capacitors (C₁,C₂) being commonly connected to a second end of said first resistor (R₅), and said second ends of said first and second capacitors (C₁,C₂) being connected respectively to an output end and to an inverting input terminal of said operational amplifier (OP), and means (4,(c),Q,R₈) for short-circuiting across a second resistor (R₇) connected between said second ends of said first and second capacitors (C₁,C₂).

Inventors: FUJIMOTO, HIDEKI C/O PIONEER OHMORI PLANT
Applicants: PIONEER ELECTRONIC CORPORATION
Application year: 1989
Main classification: G01R23
IPC codes: G01R23