Digital printers

Abstract: An arithmetic frequency synthesizer (24) for generating a bit clock frequency for the flying spot scanner of a digital printer includes means for loading a pseudo-random offset value, accm i , into its accumulator at the start of each scan. The offset values for successive scans pseudo-randomly vary within a range 0 ≦ accm i < N for all bit clock frequencies required for normal operation of the printer. Thus, the offsets psuedo-randomly phase shift the phase transitions of the bit clock sufficiently to prevent periodic variations in the bit clock duty cycle from spatially aligning with each other in the process direction during the printing of adjacent scan lines. In a printer having a prismatic scanner, a different predetermined pseudo-random offset value is advantageously provided for each facet of the prism (12), whereby the offset value for any given facet can be retrieved from a table look-up memory under the control of a scan counter or the like to be applied to the frequency synthesizer alone or as an initial offset for a polygon signature correction value for the given facet.

Description: This invention relates to variable frequency bit clock generators for digital printers and, more particularly, to methods and means for improving the perceived quality of images printed by printers which employ arithmetic frequency synthesizers for generating their bit clocks. Arithmetic frequency synthesizers, such as described in US-A- 4,766,560 are well suited for use as adjustable-frequency bit clock generators for digital printing, because they provide linear frequency control over a wide dynamic range. They characteristically include an accumulator for recursively accumulating an R-bit long binary input word having a time-dependent value N at a preselected, stable reference frequency F R so the most-significant bit (MSB) of the accumuland (i.e., the word accumulated by the accumulator) oscillates at a frequency F BC (herein referred to as the "bit clock frequency") that is given for any value of N within the range -2 R-1 ≦ N < 2 R-1 by: F BC = F R N 2 R US-A-4,766,560 discloses a suitable implementation for such an arithmetic frequency synthesizer. As is known, digital printing conventionally is carried out by providing a reflective, multifaceted prism which is rotated about its central axis to sweep one or more intensity-modulated light beams repeatedly across a photosensitive record medium in a fast scan (i.e., line scan) direction while the record medium is advancing in an orthogonal slow scan (i.e., process) direction, such that the beam or beams scan the record medium in a raster pattern. Each of the light,beams is intensity modulated in accordance with a serial data sample stream at a rate determined by a bit clock frequency, whereby the individual picture elements ("pixels") of the image represented by the data samples are printed on the record medium in positions more or less precisely determined by the bit clock. Digital printers ordinarily have start-of-scan detectors for resynchronizing their bit clocks at the beginning of each scan, thereby reducing pixel positioning errors caused by bit clock phase jitter. Thus, when an arithmetic frequency synthesizer is employed as a bit clock generator for such a printer, its accumulator typically is synchronously initialized from a zero or "cleared" state in response to a start-of-scan pulse at the start of each scan, thereby limiting the phase jitter of the bit clock, F BC , it generates to ± one half the period of the reference clock frequency, F R . US-A-4,766,560 teaches that the value N of the input word for the accumulator of such frequency synthesizer can be varied as a function of time for adjusting the bit clock frequency, F BC , as required to compensate for (1) variations in the angular speed at which the prism is rotated ("motor hunt errors"), (2) variations in the angular speed at which different facets of the polygon sweep the incident light beam or beams across the record medium ("polygon signature errors"), and/or (3) variations in the linear speed at which the light beam or beams sweep across different segments of the scan lines ("scan non-linearity errors"). Polygon signature errors and scan non-linearity errors essentially are time-invariant for a given printer, while the motor hunt errors normally vary at low frequency. The phase transitions of the bit clock generated by an arithmetic frequency synthesizer span an integral number of reference clock cycles. Unfortunately, however, unless the value N of the input word for the accumulator happens to be an integral power of two (i.e., N = 2 K , where K is an integer), the spacing of the bit clock phase transitions more or less periodically vary by ± one half the period of the reference clock frequency. Therefore, whenever the accumulator input word value N is not an integer power of two (i.e., N ≠ 2 K ), the duty cycle of the bit clock tends to vary periodically at a moderately high frequency. Periodic duty cycle variations of the bit clock F BC for a digital printer are troublesome because an ordinary observer is able to detect very small, spatially periodic imperfections in printed images. For example, when lines are printed parallel to the process direction at a high spatial frequency, an observer is likely to detect almost any minor variations in the duty cycle of those lines if the duty cycle variations are essentially aligned in the process direction from scan line-to-scan line. That, unfortunately, is precisely the alignment that tends to be caused by periodic variations in the duty cycle of a bit clock generated by an arithmetic frequency synthesizer. For that reason, in accordance with the present invention as defined by the appended claims, an arithmetic frequency synthesizer for generating a bit clock for the flying spot scanner of a digital printer includes means for loading a pseudo-random offset value, accm i , into its accumulator at the start of each scan. The offset values for successive scans pseudo-randomly vary within a range 0 ≦ accm i < N for all bit clock frequencies required for normal operation of the printer. Thus, the offsets pseudo-randomly phase shift the phase transitions of the bit clock sufficiently to prevent periodic variations in the bit clock duty cycle from spatially aligning with each other in the process direction during the printing of adjacent scan lines. In a printer having a prismatic scanner, a different predetermined pseudo-random offset value advantageously is provided for each facet of the polygon, whereby the offset value for any given facet can be retrieved from a table look-up memory under the control of a scan counter or the like to be applied to the frequency synthesizer alone or as an initial offset for a polygon signature correction value for that particular facet. Additional features and advantages of this invention will become apparent when the following detailed description is read in conjunction with the attached drawings, in which: Figure 1 is a simplified schematic diagram of a laser printer, and Figure 2 is a block diagram of an arithmetic frequency synthesizer which incorporates this invention to generate a pseudo-randomly phase-shifted bit clock for the printer shown in Fig. 1. Turning now to the drawings, and at this point especially to Fig. 1, there is a more or less conventional digital printer 11 having a reflective, multi-faceted prism 12 which is rotated about its central axis, as indicated by the arrow 13, by a motor 14 to sweep an incident, intensity-modulated light beam 15 cyclically in a fast scan or "line scanning" direction across a photosensitive record medium 16. The record medium 16, in turn, is advanced simultaneously in an orthogonal slow scan or "process" direction, so the light beam 15 exposes it in accordance with a raster scanning pattern. As illustrated, the record medium 16 is coated on a drum 17 which is rotated about its longitudinal axis, as indicated by the arrow 18, but this is only one of its many possible configurations. As a general rule, the light beam 15 is supplied by a laser 21 and is intensity-modulated in accordance with data samples which are serially applied to a modulator 22 at a rate which is determined by the frequency of a bit clock that is applied to a scan buffer 23 or the like by n adjustable-frequency bit clock generator 24. The data samples represent individual dots of a halftone image or pixels of a simple image (collectively referred to herein as "pixels"), so the rate at which they are applied to the modulator 22 is controlled by the bit clock generator 24 to control the positioning of the pixels on the record medium 16. Referring to Fig. 2, it will be seen that the bit clock generator 24 is an arithmetic frequency synthesizer having a R-bit wide accumulator 32 for recursively accumulating a R-bit wide input word of time-varying value N. To perform the accumulation, the accumulator 32 comprises a dual inlet, R-bit wide adder 33 having its outlet returned to one of its inlets by a R-bit wide register 34 which is clocked at a predetermined reference frequency, F R . The input word is applied to the other inlet of the adder 33, so the most-significant bit (MSB) of the accumuland of the accumulator 32 oscillates at the bit clock frequency F BC given by equation (1) above. The accumulator 32 is idle from the conclusion of each scan to the beginning of the next one, because its register 34 is cleared during such "flyback" periods. For example, the register 34 suitably is cleared during the flyback time of the scanner by a low ("0") logic level signal, CLEAR, that is asserted and deasserted by a flip-flop 35 in response to an end-of-scan pulse, which is supplied by a line length counter 37, and a start-of-scan (SoS) pulse, which is supplied by a start-of-scan detector (not shown), respectively. Each scan line of the printed image conventionally is composed of a predetermined number of pixels (or dots in the case of a halftone image), so the counter 37 is selected to rollover and supply an end-of-scan pulse each time it accumulates an equivalent number of bit clock pulses. The start-of-scan detector, on the other hand, characteristically is positioned a short, fixed distance from the lead edge of the scan field to supply a start-of-scan pulse for reinitializing the frequency synthesizer 24 at the start of each scan cycle. As previously pointed out, the arithmetic frequency synthesizer 24 generates a bit clock F BC at a frequency determined by the value N of the input word for its accumulator 32 during the printing of each of the scan lines of an image. In practice, the value N of this word may be varied as a function of time to adjust the bit clock frequency as required to compensate for motor hunt errors, polygon signature errors, and/or scan non-linearity errors. However, it will be recalled that scan non-linearity errors are time-invariant from scan-to-scan for all facets of the prism, while polygon signature errors are time-invariant for all scans by any given facet of the prism. Consequently, even if the bit clock frequency, is varied to compensate for either or both of those errors, there still is the risk that periodic duty cycle variations of bit clock frequency, will result in readily-observable printing irregularities or "defects." Indeed, there is an appreciable risk that printing defects will occur even if the frequency of the bit clock is varied to compensate for motor hunt errors because motor hunt errors typically have a relatively low frequency. Therefore, in accordance with the present invention, provision is made for preloading a pseudo-random offset value, accm i , into the accumulator 32 at the beginning of each scan cycle. These offsets pseudo-randomly vary from scan-to-scan within a range of 0 ≦ accm i < N for all bit clock frequencies that are required for normal operation of the printer 11 (Fig. 1). Accordingly, they pseudo-randomly phase shift the bit clock phase transitions for neighboring scan lines, while only slightly reducing the pixel positioning precision of the printer 11. Specifically, the bit clock phase shift caused by the psuedo-random offsets is limited to ± one-half reference clock period, so they reduce the phase precision of the bit clock from a best case tolerance of ± one-half reference clock period to a slightly looser tolerance of ± one reference clock period. In keeping with one of the more detailed features of this invention, a predetermined pseudo-random offset value advantageously is provided for each facet of the prism, whereby the acumulator 32 is initialized with the same offset value for all scans by any given facet. In that event, the offsets for the respective facets of the prism may be employed as floating references for computing the signature correction values which are needed to compensate for the signature errors of the individual facets. The advantage of doing that is that signature compensation then can be provided without further reducing the pixel positioning precision of the printer 11 (Fig. 1). For example, the offset values for the respective facets of the prism may be stored in a table look-up memory 41 to be retrieved in cyclical sequential order at the scan rate of the scanner under the control of a scan counter 42 that is incremented by the start-of-scan pulses. The present invention inhibits the ordinary periodic duty cycle variations of arithmetically synthesized bit clocks from being a significant source of defects in images printed by digital printers under the control of such a bit clock. Digital printers typically employ flying spot scanners having multi-faceted, rotary prisms, so it will be recalled that predetermined, pseudo-random offsets, when preloaded into the accumulator of an arithmetic frequency synthesizer, may vary from facet-to-facet of such a prism, but be time-invariant for each of its facets. That, in turn, permits signature compensation to be provided for the respective facets of the prism, without requiring any relaxation of the pixel-positioning precision of the printer. Typically, a word length of approximately twenty bits (R=20) gives an arithmetic frequency synthesizer sufficient frequency resolution for quality printing, but the present invention may be employed with frequency synthesizers operating with longer or shorter words.

Claims: A digital printer including: an arithmetic frequency synthesizer (24) having an accumulator (32) for recursively accumulating a R-bit long word of value N, where -2 R-1 ≦ N < 2 R-1 , to provide an accumuland with a most-significant bit oscillating at a bit clock frequency proportional to the value N; means (22) coupled to the frequency synthesizer for modulating a light beam (15) at the bit clock frequency in accordance with data samples representing an image; and a scanner (12, 14) for repeatedly scanning the modulated light beam across a photosensitive record medium (16) to form the image on the record medium by raster scanning, characterised by means (23) coupled to the frequency synthesizer for preloading pseudo-random offset values into the accumulator for successive scans, the offset values pseudo-randomly varying from scan-to-scan within a range 0 ≦ accm i < N, where accm i is the offset value for any given scan, whereby the bit clock is pseudo-randomly phase shifted from scan-to-scan without significantly affecting its frequency. The digital printer of Claim 1, wherein the scanner includes a multi-faceted rotary reflective prism (12) optically aligned so that one after another of its facets sweep the modulated light beam across the record medium as the prism rotates, and the value N of the word accumulated by the accumulator varies as a function of time for adjusting the bit clock frequency. The digital printer of Claim 2, whereineach of the facets of the prism has a known signature error, and the printer includes means for adjusting the value N of the word prior to each scan to include a correction value selected to compensate for the signature error of the facet by which the scan is to be performed. The digital printer of Claim 3, wherein a predetermined pseudo-random offset value, including a signature correction value, is preloaded into the accumulator for each scan by each facet of the prism, whereby signature compensation is provided for the prism without significantly affecting the phase or frequency of the bit clock.

Inventors: CURRY DOUGLAS N, CURRY, DOUGLAS N.
Applicants: XEROX CORP, XEROX CORPORATION
Application year: 1989
Main classification: G06K15
IPC codes: B41J2, G06K15, H04N1, H04L7