Electronic package

Abstract: An electronic package (10) including a first circuitized substrate (11) (e.g., printed circuit board), a second, flexible circuitized substrate (15) (e.g., polyimide), an electronic device (17) (semiconductor chip) and a metallic (e.g., aluminum) heat sink member (19) joined to the first substrate to provide a cover for the package's internal components. A predetermined quantity of liquid material (21) (e.g. wax or oil) is located between a defined surface of the chip and a correspond­ ing internal surface of the heat sink member during assembly of the package, this material possessing a surface tension sufficient to create a suction force between the device and heat sink so as to elevate the device in a spaced position from (e.g., above) the first circuitized substrate during said assembly. Should a liquid material such as oil be utilized, this material remains in the liquid state during package operation to continuously provide the defined suction force sufficient to maintain the device at the elevated position. If a material such as wax is used, this material becomes solidified and remains so during package operation to thus maintain the device in elevated position by adhesion. Improved heat dissipa­ tion for the package and ease of assembly thereof is thus possible.

Description: The invention relates to electronic packages and more particularly to such packages which utilize circuitized substrates designed for having semiconductor chips mounted thereon. Electronic packages having circuitized substrates, whether of the flexible or rigid variety, are known, with examples being defined in US-A-4 092 697 and US-A-4 415 025 (both employing rigid, ceramic substrates) and US-A-4 231 154 (employing a flexible thin film substrate). As will be further understood from the teachings herein, the invention is most particularly directed to packages as defined above wherein a heat-sinking cover member is utilized. Such a cover is also described in both US-A-4 092 697 and US-A-4 415 025 and desired in many such electronic packages to provide positive heat dissipation from the package during operation thereof. Understandably, such heat escape is essential in packages of this type to promote the operational life thereof. FR-A-2179103 discloses an integrated circuit package comprising a flexible insulating foil which has conductor tracks to which a semiconductor element is connected. A cooling element which preferably extends in the longitudinal direction of the foil is connected to the rear side of the semiconductor element but does not cover the ends of the conductor tracks remote from the semiconductor body. The cooling member comprises raised portions which extend against the foil and are soldered or welded to metallized contact places on the foil. The longitudinal ends of the cooling member may be provided with bent connection portions which also serve as abutments, for example, during the connection in a slot-like aperture of a mounting panel or on an insulating substrate. This document discloses in Fig. 8 and the respective description the connection of a semiconductor device as shown in Fig. 7 to an insulating substrate comprising current conductors. The conductor tracks on the folded parts are soldered to corresponding current conductors of the substrate. The cooling member comprises bosses which are connected to metallized contact places on the foil and the longitudinal ends of the bent portions of the cooling member constitute abutments so that the foil parts bear against the substrate. The connection between the cooling member and the semiconductor may be carried out by means of a solder or a conductive glue. The cooling member is provided with at least two raised portions extending to against the foil which only is provided with metal conductor tracks. US-A-4 567 505 discloses an electronic package comprising two bodies such as an integrated circuit and a heat sink which are maintained in a low stress and high thermal conductance abutment by pressure from capillary attraction. A surface of one of the bodies is provided with grooves preferably having reentrant surfaces. A surface of the other body is brought into abutment with the grooved surface with a liquid therebetween which partially fills the grooves. The grooves act as reservoirs for excess liquid so that a minimum thickness liquid interface is achieved, and the grooves enable trapped gas to escape out the open ends thereby preventing voids between the two bodies. Importantly, the groove geometry enforces a well-defined attractive force between the two surfaces due to the liquid surface tension. The invention as claimed solves the problem of how to improve the heat escapement of an electronic package utilizing circuitized substrates and heat-sinking cover members as identified above. In accordance with the invention, there is provided an electronic package as claimed in claim 1 comprising a first circuitized substrate having at least one layer of circuitry thereon, a second circuitized substrate of flexible nature including at least one layer of circuitry thereon electrically connected to the first circuitized substrate, and an electronic device having first and second opposing surfaces, the circuitry on the second, flexible circuitized substrate being connected to designated locations on the second opposing surface of the device. The device is oriented at a spaced, elevated position from the first circuitized substrate. The package further includes a heat sink member having a surface facing the electronic device, and a predetermined quantity of material positioned between and in contact with both the first surface of the electronic device and the surface of the heat sink facing the device. The material forms a meniscus possesses a surface tension sufficient to create a suction force between the electronic device and the heat sink to maintain the electronic device in the spaced, elevated relationship from the first circuitized substrate during operation of the electronic package. Advantageous embodiments are defined by the dependent claims. As defined herein, the package of the instant invention provides for such heat escapement on an enhanced basis through the direct contact between the package's chip and heat-sinking cover wherein the chip is maintained at an elevated position above a first, circuitized substrate. Such an elevated arrangement assures protection of the chip during package assembly as well as reducing both the time and costs for such assembly. Such chip elevation should also further promote heat escape from the package during operation. For a better understanding of the present invention, together with other and further objects, advantages and capabilities thereof, reference is made to the following disclosure and appended claims in connection with the drawings, in which: FIG. 1 is a side elevational view, in section, of an electronic package in accordance with a preferred embodiment of the invention; FIG. 2 is a much enlarged, partial view of the package of FIG. 1 more clearly illustrating the elevated position of the chip and the direct connection between the chip and the heat-sinking cover; and FIG. 3 is a partial perspective view illustrating the preferred means of electrically connecting the inner leads of the invention's flexible, circuitized substrate to the bottom surface of the invention's chip. In FIG. 1, there is shown an electronic package 10 in accordance with a preferred embodiment of the invention. Package 10 includes a first circuitized substrate 11 having at least one layer of circuitry 13 thereon, a second circuitized substrate 15 of flexible nature electrically connected to first substrate 11, an electronic device (semiconductor chip) 17 electrically connected to second substrate 15 and located in an elevated position above substrate 11, a heat sink member 19 joined to the first substrate 11 and providing a cover for package 10, and a predetermined quantity of material 21 positioned between and in contact with heat sink member 19 and device 17 to thus assure direct contact therebetween to provide enhanced heat dissipation for the invention during operation thereof. As understood from the following, material 21 may be in either a liquid (as shown in FIGS. 1 and 2) or solidified state in the final, assembled package (and during operation thereof). In either instance, however, material 21 is in liquid state during initial assembly so as to facilitate such assembly. As defined below, material 21, if in liquid form in final state, forms a surface tension on the respective surfaces of member 19 and device 17 sufficient to create a suction force between member 19 and device 17 so as to uniquely maintain the device at the illustrated, elevated position during package operation using such force. If in a liquid state (e.g., an oil) in the assembled, final package configuration (and operation), material 21 exerts the defined herein suction force during both said assembly and operation of package 10. If in a solid state (e.g., a wax) in the final, assembled package, material 21 exerts the defined herein suction force only during package assembly (to "lift" the device and attached flexible substrate 15 to the desired elevation), and thereafter, being solidified, maintains the device in this elevated position by adhesion. Furthermore, if material 21 is in a liquid state in the final package, it does not act as an adhesive but, as stated, uniquely maintains the semiconductor device at its elevated position through the suction force defined herein. Understandably, this capability represents a significant feature of the invention. First substrate 11 is preferably a printed circuit board having an insulative (e.g., epoxy) body portion 23 with a formed metallic (e.g., copper) layer of circuitry 25 located on a top surface 27 (FIG. 2) thereof. Circuitry 25 includes individual conductive segments (as shown) spacedly located on surface 27 and which may be formed on substrate 11 using any one of a number of conventional circuit forming techniques (e.g., photoetched from blanket metal foil. First substrate 11 is preferably of rigid construction. Specifically, the body portion 23 thereof, is of an epoxy or similar material as preferred, and preferably possesses a thickness (dimension "t" in FIG. 1) of at least 0,7 mm (0.030 inch). Known substrates having thicknesses up to about 5 mm (0.200 inch) are acceptable. Second circuitized substrate 15, as stated, is of a flexible nature and includes an insulative portion 29 of organic dielectric material (e.g., polyimide) having a defined layer of circuitry 31 (e.g., chrome-copper-chrome) thereon. As shown, circuitry 31 is located on an upper surface of the polyimide material and serves to interconnect circuitry 25 on first substrate 11 with respective contact locations on the bottom.surface of semiconductor chip 17. Substrate 15 is electrically connected to circuitry 25 using any one of a number of conventional connection techniques e.g., soldering, wherein at least one solder ball 32 is used for each of the individual segments 3 (FIG. 3). As better shown in FIG. 3, second circuitized substrate 15 includes a plurality of individual conductive segments 33 located on the polyimide in accordance with a defined pattern. This pattern in -turn defines first and second arrays 35 and 37 (FIG. 2) of individual projecting end portions for these segments. The first arrays 35, as depicted in the drawings, are electrically connected to respective contact locations on the lower surface 41 of semiconductor chip 17 preferably using a conventional technique (e.g., thermal compression bonding). The opposing ends of each segment 33 thus serve to form the second arrays 37, each of which are individually connected (i.e., using the aforementioned solder ball technology) to a designated, respective one of the conductive segments 25 located on surface 27 of substrate 11. As also shown in FIG. 3, the polyimide material 29 for substrate 15 defines an opening 43 therein having the described first array 35 of projecting end segments extending therein. Chip 17 is thus located relative to opening (or window) 43 in the manner shown in FIG. 3. As stated, second circuitized substrate 15 is flexible in nature. By this term is meant that the polyimide and circuit elements, taken together, possess an overall thickness of only about 75 µm (0.003 inch). Such a capability on the part of substrate 15 represents a significant aspect for purposes which are understood from the description provided herein. Heat sink member 19, as shown in FIGS. 1 and 2, is preferably metallic (e.g., aluminum or copper) and is sealed to substrate 11 using a known sealing technique (e.g., a flowed and subsequently cured epoxy 51). If body portion 23 is of ceramic, sealant 51 may be a low temperature brazing or solder material. As shown, heat sink 19 is sealed to substrate 11 about the outer periphery thereof to thus provide a cover for the internal components (i.e., chip 17, second substrate 15) shown in FIG. 1. Heat sink 19 further includes a curvilinear interior surface 53 which curves in a direction toward substrate 11 (convexly downward in FIG. 1). Heat sink 19 includes a silicon insert 55 centrally located therein relative to the adjacent semiconductor chip 17 (FIGS. 1 and 2). As shown in FIGS. 1 and 2, semiconductor chip 17 is oriented in a spaced, elevated position (at a predefined height as indicated by the dimension "eh" in FIG. 2) from the upper surface 27 of first substrate 11. As stated, this occurs during package assembly and is facilitated by the suction force created by the liquid wax or oil material. This represents a significant aspect of the instant invention in that it allows direct connection between chip 17 and the curvilinear surface 53 of heat sink 19 to thus provide enhanced heat escapement for the finished package 10 during operation thereof. As stated above, such heat escapement is essential in packages of this type to assure an appropriate operating life therefor. Elevating chip 17 in the manner defined herein also facilitates assembly of package 10 in that it enables placement of the defined heat sink on first substrate 11 and sealing thereof without potential harm to the chip. Understandably, placement of the heat sink on substrate 11 could result in damage to the chip as might be caused by compression thereof between surfaces 53 and 27. The dimension "eh" thus provides sufficient tolerance to prevent such compression and possible corresponding destruction or damage to the relatively delicate semiconductor chip. In a preferred embodiment, dimension "eh" is preferably within the range of from about 25 µm (0.001 inch) to about 100 µm (0.004 inch). Chip 17 may be selected from known chips in the art (e.g., CMOS), and as depicted in the drawings, includes the aforementioned lower surface 41 and an upper surface 57 on the opposite side thereof. As shown in FIG. 2, both of these surfaces are substantially planar as is typical in devices of this type. The chip's planar upper surface 57 aligns with and is retained against the curvilinear surface 53 of heat sink 19. As stated above, package 10 includes a predetermined quantity of the aforementioned material 21 positioned between and in contact with surface 57 of chip 17 and surface 53 of heat sink 19 to uniquely provide a means whereby chip 17, as attached to the flexible substrate 15, is maintained at the defined elevated position above first substrate 11 during operation of package 10. Material 21, if in liquid state during package operation, is preferably an oil possessing a surface tension sufficient to create a suction force (F in FIG. 2) between chip 17 and heat sink 19 to assure that the chip is maintained in the illustrated position during package assembly and operation. Examples of suitable materials which maintain the liquid state during package operation include highly refined mineral oil, silicone oils, or others, such as those currently utilized in vacuum diffusion pumps (e.g., mixed 5 ring polyphenylether or perfluoropolyether). If wax is the selected material 21, it is applied to surface 57 of chip 17 in heated liquid form but, as stated, will assume solidified form after assembly (and thus during package operation). Material 21, whether oil or wax, is applied to either/both surfaces 53 or 57 during assembly of package 10 prior to sealing of heat sink 19 to the first substrate 11. The chip, with flexible substrate attached, is then "lifted" to effect engagement with the heat sink's internal surface. As described, locating chip 17 at this elevated position during such sealing prevents damage to the chip as might be caused by compression between the heat sink and lower substrate members. It has been determined that a suction force F within the range of about 5 mN (0.5 gram) to about 15 mN (1.5 gram), and ideally about 10 mN (1.0 gram), is required to maintain a chip of the type defined herein at the described elevated position when utilizing the other components (i.e., flexible circuitized substrate 15) as also defined herein. As shown in FIG. 2, material 21, when in liquid form, forms a meniscus between chip 17 and heat sink 19. As also shown in FIG. 2, this meniscus possesses a concave configuration about the upper peripheral edge of the chip. This configuration is deemed necessary in order to assure the sufficient suction force as defined herein. The quantity of liquid material 21 deemed adequate to provide the described surface tension and resulting suction force is an amount sufficient to fill a gap (dimension "d") of approximately two micrometers (microns) at the outer edge of chip 17. That is, the distance "d" in this outer edge about the entire periphery of chip 17 and the corresponding, adjacent location on surface 53 is about two microns. In one embodiment (using the aforementioned CMOS chip and polyimide substrate), it was determined that a quantity of 0.1 microliter of liquid material was acceptable. Suction between chip 17 and heat sink 19 is further enhanced using the aforedefined silicon insert 55 and providing this insert with a plurality of capillary slots therein, which are of longitudinal configuration and run in a substantially parallel orientation across the curvilinear surface 53 of the insert. As shown in FIG. 2, slots 63 run toward and away from the viewer the desired length thereof. Preferably, slots 63 each possess an overall length within insert 55 sufficient to exceed the outer dimensions of chip 17 by about 2,5 mm (0.10 inch). In addition, each slot preferably possesses an outer width of only about 1 or 2 microns. Utilization of the described silicon insert is desired in order to assure provision of slots having these relatively fine dimensions. Provision of slots of said dimensions within a metallic (e.g., copper or aluminum) heat sink is not readily possible. Insert 55 may be securely positioned within heat sink 19 using known means (e.g., solder). In order to even further assure positive suction between chip 17 and the invention's heat sink member, the curvilinear surface 53 of the silicon insert 55 preferably possesses a roughness characteristic sufficient to increase the surface tension of liquid material 21 therealong. Preferably, this roughness is less than about 1.0 micron. There has thus been shown and described an electronic package wherein the package's electronic device (semiconductor chip) is maintained in direct contact against the package's heat sink member in a unique manner such that enhanced heat dissipation for the package is attainable. Furthermore, the invention as defined herein provides for ease of manufacture of such a package while also assuring prevention of damage to the relatively delicate semiconductor chip.

Claims: An electronic package (10) comprising: a first circuitized substrate (11) having at least one layer of circuitry (13, 25) thereon; a second circuitized substrate (15) of flexible nature including at least one layer of circuitry (31) thereon electrically connected to said first circuitized substrate; an electronic device (17) having first (57) and second (41) opposing surfaces, said circuitry (31) on said second, flexible circuitized substrate (15) being connected to designated locations on said second surface (41) of said device (17), said device being oriented in a spaced, elevated position from said first circuitized substrate (11); whereby said circuitry (31) on said second circuitized flexible substrate (15) includes first and second arrays (35, 37) of projecting end portions, said first array (35) being electrically connected to said electronic device (17) and said second array (37) being electrically connected to selected portions of said layer of circuitry (13, 25) on said first circuitized substrate (11), and said second flexible substrate (15) defines an opening (43) therein, said first array (35) of said projecting end portions of said circuitry projecting into said opening, said electronic device (17) thereby being oriented relative to said opening; a heat sink member (19) sealed to said first circuitized substrate (11) about the outer periphery thereof to provide a cover for said second circuitized substrate (15), said electronic device (17) and said at least one layer of circuitry (13, 25) on said first circuitized substrate (11), said heat sink member (19) comprising a silicon insert (55) centrally located therein relative adjacent to the electronic device (17), the remainder of said heat sink member (19) being metallic, and said silicon insert (55) including a surface (53) facing said first surface (57) of said electronic device, wherein said surface (53) of said silicon insert (55) is of curvilinear configuration curving in a direction towards the electronic device and includes a plurality of capillary slots (63) therein, whereas said first surface (57) of said electronic device (17) is of substantially planar configuration; and a predetermined quantity of material (21) positioned between and in contact with both said first surface (57) of said electronic device and said surface (53) of said silicon insert (55), said material providing a suction force between said electronic device and said heat sink member to maintain said electronic device in said spaced, elevated relationship from said first circuitized substrate during operation of said electronic package. The package according to any one of the preceding claims wherein said material is oil or wax. The package according to any one of the preceding claims wherein the distance (eh) of the spacing between said first substrate (11) and said electronic device (17) in said elevated position is within the range of from about 25 µm to about 100 µm. The package according to any one of the preceding claims wherein said surface (53) of said silicon insert (55) possesses a roughness of less than 1 micron.

Inventors: JONES ALAN LYTTON, SNYDER KEITH ALAN, JONES, ALAN LYTTON, SNYDER, KEITH ALAN
Applicants: IBM, INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1989
Main classification: H01L23
IPC codes: H01L23, H05K7