TRANSFORMER HAVING SYMMETRICAL PUSH-PULL WINDINGS

Abstract: A transformer (201) includes a push-pull winding wherein each side is divided at its centerpoint and leads are brought out for switching devices (204) or rectifiers (205) so that leads from the source voltage and to the loads are separate from the switching devices and rectifiers which may be located for optimal circuit topology. The winding may be of coaxial wire for improved performance and floating capacitors (208) or floating snubbers (206) may cross couple the terminals where the switches (204) and rectifiers (205) are connected.

Description: TRANSFORMER HAVING SYMMETRICAL PUSH-PULL WINDINGS BACKGROUND OF THE INVENTION This invention relates to trans ormers, and in particular to high frequency power transformers. The construction of conventional transformers is well known. Usually each winding is wound start to finish and terminated at the ends. Split or centertapped windings are usually used for designs using push-pull circuitry. U. S. Patent 4,665,357, entitled "Flat Matrix Transformers" by Herbert and issued May 12, 1987 teaches the art of matrix transformers. U. S. Patent application Ser No. 187,931 "High Frequency Matrix Transformers" teaches embodiments of the matrix transformer which are particularly well adapted for use in high frequency switch mode power supplies. Both U. S. Patent 4,665,357 and U. S. Patent Application Serial No. 187,931 are assigned to the same assignee as the present invention and are incorporated herein by reference. SUBSTITUTESHEET SUMMARY OF THE INVENTION This invention teaches that the push-pull windings of a transformer can be symmetrically divided with respect to the input and/or the output terminals of the transformer. This works particularly well with matri transformers. This invention also teaches the use of floating capacitors or snubbers, cross coupled at the dividing terminals. This invention also teaches the use of coaxial windings in a symmetrically wound push-pull transformer. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic representation of a transformer having symmetrical primary and secondary push pull windings. Figure 2 is a schematic representation of a matrix transformer having symmetrical push-pull windings. Figure 3 is a schematic representation of a transformer having symmetrical coaxial push-pull windings Figure 4 is a diagrammatic representation of a matrix transformer having symmetrical coaxial push-pull windings. Figure 4P shows the primary winding of the matrix transformer of Figure 4. Figure 4S shows one section of the secondary winding of the matrix transformer of Figure 4. Figure 5A shows the primary winding of the transformer of figure 4 stretched out to more clearly sho the coaxial terminations., Figure 5B shows an alternate termination for th winding of Figure 5A. Figure 6A shows the secondary winding of the transformer of figure 4, stretched out to more clearly show the coaxial terminations. Figure 6B shows an alternate termination for th winding of figure 6A. Figure 7 shows representative (idealized) waveforms for a symmetrical push-pull transformer as migh be used in an inverter circuit. Figure 8 shows representative (idealized) waveforms for a symmetrical push-pull transformer as migh be used in an inverter circuit having pulse width modulated drive for voltage control. Figure 9 shows a transformer having symmetrical push-pull windings and floating capacitors, with several alternative switching means. Figure 10 shows a transformer having symmetrical push-pull windings and floating capacitors, drawn differently to call attention to the floating capacitor connections. Figure 11 shows a portion of a primary circuit of a matrix transformer having coaxial windings and floating capacitors, drawn to call attention to the floating capacitor connections. Figure 12 shows a matrix transformer having coaxial windings, in which the windings are in grooves in two blocks of ferrite or the like. Figure 12P shows the primary winding of the transformer of figure 12. Figure 12S shows the secondary winding of the transformer of figure 12. Figure 13 shows a symmetrical push-pull matrix transformer with a push-pull secondary. Figure 13A shows a schematic of figure 13. Figure 14 shows a symmetrical matrix transformer used in a forward converter and having an active reset. Figure 14A shows a schematic of figure 14. Figure 15 shows a symmetrical matrix transformer used in a forward converter. Figure 15A shows a schematic of figure 15. Figure 16 shows a partial diagram of a coaxial push-pull primary winding. Figure 16A is a portion of the diagram of figure 16. Figure 17 shows a "through the bore" gate drive for a symmetrical push-pull transformer. Figure 17A is a portion of the diagram of figure 17. Figure 18 shows another embodiment of "through the bore" gate drive also showing other signals going "through the bore". Figure 19 shows another embodiment of "through the bore" gate drive, with logic power also going "throug the bore". Figure 20 is a pictorial sectional view of an embodiment of a symmetrical push-pull matrix transformer having fully coaxial windings with through the bore gate drive. Figure 20A is an end view of one element of the transformer of Fig. 20 and shows further detail. Figure 20B is a fragmentary view of a symmetrical push-pull matrix transformer and shows another embodiment. Figure 21 is a schematic diagram of a symmetrical push-pull full wave bridge circuit. Figure 22 is a schematic diagram of a symmetrical push-pull matrix transformer having floating capacitors and showing an alternate location for input power. Figure 22.1 is a schematic diagram of a symmetrical push-pull matrix transformer having an offset gate drive voltage input. Figure 22.2 is a schematic diagram of a symmetrical push-pull matrix transformer having a gate drive voltage input offset from the winding midpoint and the supply voltage. Figure 23 shows another embodiment for a full bridge matrix transformer. Figure 24 shows a circuit for limiting transient voltage in a symmetrical push-pull matrix transformer. Figure 25 shows a circuit for voltage regulation in a symmetrical push-pull matrix transformer. Figure 26 shows that entire circuit within a block of ferrite. Fig. 26A is a cross-sectional view of the circuit embodiment of Fig. 26 including a cover taken along the line A-A. Fig. 26B is a cross-sectional view of one element of the circuit embodiment of Fig. 26 along the line B-B. Figure 27 shows a fully coaxial winding can be approximated with a nested series of "U" channels. Figures 28 and 28A-D show a pair of elements of a matrix transformer suitable for surface mounting. Figure 29 shows a matrix transformer having a coaxial push-pull winding. Figure 30 shows another embodiment of a matrix transformer having coaxial push-pull windings. Figure 31 shows a matrix transformer having a push-pull winding with floating capacitors. Figure 32 shows a circuit wherein a positive or negative boost voltage can be derived from a symmetrical push pull primary winding. Figures 33A-C show the derivation circuits comprising the circuit of figure 34. Figure 34 shows a symmetrical push-pull secondary having an inductor and floating capacitors. Figure 35 shows , an inductor for the secondary circuit of figure 34. Figure 36 shows a one-to-two ratio step up symmetrical push-pull coaxial matrix transformer. Figure 37 is a schematic diagram of a symmetrical transformer used in a dual forward converter. Figure 38 is a schematic of a symmetrical transformer used as a forward converter. Figure 39 is a schematic of a symmetrical transformer used in a full wave forward converter. Figure 40 shows an implementation of the secondary circuit of Figure 38 as a picture frame matrix transformer with symmetrical windings and floating capacitors. Figure 38.1 relates the components of figure 40 to the schematic of figure 38. Figure 41 shows an implementation of the secondary circuit of Figure 37 as a picture frame matrix transformer with symmetrical windings and floating capacitors. Figure 42 is a schematic representation of a picture frame matrix transformer having an offset symmetrical push-pull winding. Figures 43 a-d show possible orientations for an offset symmetrical push-pull winding in a picture frame matrix transformer. Figure 44 is a schematic representation of a picture frame matrix transformer having superimposed offset symmetrical push-pull windings. Figure 45 is a schematic representation showing one set of drivers for all FET's of the transformers arrangement shown in Fig. 44. Figure 46 illustrates a common supply voltage through the bore to power the buffers at each FET gate. DESCRIPTION OF THE PREFERRED EMBODIMENTS Figure 1 is a schematic representation of a transformer having symmetrical push-pull windings. The concept of the symmetrical - winding does not differ for transformers of different size, style, construction, material or application, and is applicable to any or all of them. The various design features of the transformer are generally optimized for each application. A transformer circuit using a push-pulll winding generally has a centertapped winding with the centertap being taken to one side of the power source. The ends of the windings are returned to the other side of the power source through switching means such as transistors, one for each side. The switching means are operated alternately to provide an alternating excitation for the transformer. Further, the switching means may be operated with a controlled duty cycle to provide pulse width modulated voltage control. A push-pull secondary winding is frequently used for full wave rectification. The complete circuit has additional elements which are well understood to one familiar with the art and include elements such as input and output filters, control circuitry, snubbers and so forth. The transformer of figure 1 is wound on a core 101. The core can be of any construction used in the manufacture of transformers. A primary winding 102 and a secondary winding 103 are wound on the core using usual materials of construction and usual manufacturing techniques. Switching means 104a,b, shown for illustration as field effect transistors, and rectifiers 105a,b shown as diodes, although not part of the transformer itself complete the essential features of this circuit. Throughout this specification many embodiments of the invention are described with circuit elements such as FET's, transistors, switches, capacitors, inductors, resistors and the like. These circuit elements are for illustration and not as limitations, and in all cases, the novel features of the transformers and the circuits can be used irrespective of the external circuits or the choice of components. Winding designations such as "primary" or "secondary" are also used as illustration and not as a limitation. Windings can be used differently in differen applications and may be designated differently as a convenience. The primary winding 102 is divided (centertapped) as a usual push-pull winding would be and the centertap is taken to the positive {+) power source. Each side of the push-pull winding 102 is then divided an the switching means 104a,b are connected as shown. The ends of the primary winding 102 are then connected and returned to the ground side of the power source resulting in four sections 102a,b,c,d of the primary winding 102. Dots are used conventionally to show polarity. Because the push-pull excitation is a series circuit of the voltage source, the transformer winding an the switching means,in theory the location of the switching means can be anywhere along the series circuit. Frequently the switching means is at the negative (-) side of the power source for ease in biasing transistor switches. For the purpose of this specification and the claims, a "divided push-pull winding" is defined a push- pull winding which has been divided at a point other than at the ends of the winding for the purpose of connecting a switching means or a rectifying means in series with the winding. For the purpose of this specification and the claims, a "symmetrically divided push-pull winding" or a "symmetrical push-pull winding" is defined as a divided push-pull winding in which each side of the push-pull winding is divided at a point which is half way between the centertap of the push-pull winding and the end of the winding. One advantage of a divided push-pull winding is that the terminations to the power source are made directly to the transformer winding, and, if an input filer is used, it can be tightly coupled to the input without the involvement of the switching transistors. Also, the leads to the switching transistors can be located away from the input leads and even on the opposite side of the transformer. Similar considerations apply to the secondary. When primary winding 102 is symmetrically divided, that is, the sections 102a,b,c,d of the push-pull primary winding 102 are equal, (each section has the same number of turns), the voltage on the windings exhibits some interesting and beneficial relationships. In accordance with the well known design formulae pertaining to transformers, the voltage of each turn is the same, and relates to change of flux within the core 101. Therefore, the voltage across each section 102a,b,c,d of the primary winding 102 will relate one to the other as the number of turns in each, and if the number of turns is equal, the voltage will be equal (neglecting voltages due to the winding impedance and the current). With equal primary sections 102a,b,c,d, it can be seen that the voltage on the non-dot end of the first section 102a with respect to ground will be equal to the voltage on the non-dot end of the third section 102c with respect to the positive + input. This means that the voltages at these two points have alternating (AC) components which are equal, and the voltages are offset by a fixed, direct (DC) component which is equal to the input voltage. The same relationship exists between the dot end of the second section 102b with respect to the dot end of the fourth section 102d. (This is shown in more detail in Figures 8 and 9, discussed below). Similarly, the secondary winding 103 is shown divided into sections 103a,b,c,d. The output voltage +,- is taken directly from the transformer terminations, and the rectifiers 105a,b are connected between the sections 103a,b,c,d as shown. The transformer having equally divided primary and secondary winding sections is shown for illustration and not as a limitation. Each of the several features can be used in other combinations and arrangements as dictated by each design case. In particular, the design of the primary and the secondaries are fairly independent. The terms "primary" and "secondary" are arbitrary and for different applications the windings may be interchanged. A symmetrical push-pull winding design might be used in one or several but not all of the windings. Also, the even division of the sections has characteristics which may be used to advantage in some circuits while other circuits may be optimum with a different division. A push-pull winding may be divided at more than one place essentially making a series circuit that has more than one switch. If care is taken, the voltage at each will be proportionally less. This invention teaches a way of using the voltage relationship existing in the windings of the transformer as an additional tool in the implementation and optimization of designs. Figure 2 shows a matrix transformer having symmetrical push-pull windings. The transformer has ten cores 201a,b,c-j upon which a primary winding 202 and a secondary winding 203 have been wound. The secondary winding 203 comprises five parallel paths 203a,b-e in the manner of a matrix transformer. Switching means 204a,b switch alternately to provide the alternating excitation for the transformer cores 201a,b,c-j. Rectifiers 205a,b,c-j are used to provide a direct current output. Additional components are shown for illustration to provide a more complete example as might be used in a pulse width modulated power supply. Output filter chokes 207a,b-e and output filter capacitors 208a,b-e are used to remove most of the ripple voltage from the output power. Capacitors 2ø6a,b are connected between the transformer primary winding terminations to the switching means 204a,b illustrated as field effect transistor. As shown, the capacitors 206a,b are connected from the drain of each field effect transistor to the source of the other. Capacitors so located are called "floating capacitors". An analysis similar to the example of figure 1 shows that each capacitor 206a,b will have a direct (DC) component which is equal to the input voltage +,- applied to the primary winding and an alternating (AC) component which is the same and in phase at each end, thus cancelling. Ideally, the voltage on the capacitors 206a,b would be a DC voltage equal to the input voltage with no AC component of voltage. In a practical circuit, transients and parasitic impedances generate significant non-ideal voltages and capacitors 2ø6a,b are used to control them. Figure 3 shows a transformer having symmetrical push- pull windings in which coaxial wire is used for the windings. The transformer is wound on a core 3øl which may be of conventional design. A primary winding 302 and a secondary winding 303 is wound on the core 301 to comprise a transformer. Switching means 304a,b, illustrated as field effect transistors, are used to provide the alternating excitation for the core 301 and rectifiers 305a,b are used to provide a direct current output. Snubbing circuits, each comprising a resistor 307a,b, 309a,b and a capacitor 306a,b, 308a,b respectively, are used to control transient voltages and are located where the nominal AC components are minimal. Snubbing circuits so located are called "floating snubbers". The primary winding 302 and the secondary winding 303 are made using coaxial wire. The inner and the outer (shield) conductors both are both used as "windings" and are inherently equal in length. Therefor windings so constructed are symmetrically divided which gives the transformer superior characteristics at higher frequencies and provides good coupling between the two sides of each push-pull winding. As shown, the shield (outer conductor) of the coaxial wire of the primary winding 302 is connected to the minus (-) side of the power source and is taken through the transformer winding as a winding to the sources of the field effect transistors 304a,b. In the portion of the coaxial wire which is external to the transformer, the drain connection of each respective field effect transistor 304a,b is returned via the center conductor through the same coaxial shield connected to source terminal but as the winding 302 enters the transformer, the center conductor of each respective coaxial wire is crossed to and carried in the shield of the other. Within the transformer, the center conductor follows a different route than its shield, otherwise the currents would balance and there could be no net ampere turns. The center conductor of both of the coaxial wires are then returned to the positive (+) side of the power source. The coaxial wire of the secondary 303 is routed similarly. The shield (outer conductor) of the coaxial wire is a winding of the transformer and so will have a varying voltage potential along its length and with respect to ground. This voltage must be considered and suitable insulation must provided as necessary. The transformer of figure 4 is a matrix transformer having symmetrical push-pull windings made of coaxial wire. Transformer cores 401a,b,c-p are wound and interconnected as a matrix transformer with a primary winding 402 and a secondary winding comprising four paths 403a,b-d which are paralleled, observing polarity, in the manner of a matrix transformer. (Output filters for each of the four parallel paths 403a,b-d can be used as shown in the transformer circuit of figure 2). The primary winding is a symmetrical push-pull winding, and switching means 404a,b shown as field effect transistors are used between the symmetrical sections of the push-pull primary to provide the alternating energization for the cores 401a,b,c-p. The primary winding 402 and the secondary winding 403a,b-d are made using coaxial wire. This gives the transformer superior characteristics at higher frequencies, and provides good coupling between the two sides of each push-pull winding. As shown, the shield of the coaxial wire of the primary winding 402 is connected to the minus-side of the power source, and is taken through the transformer winding as a winding to the sources of the field effect transistors 404a,b. In the portion of the coaxial wire which is external to the transformer, the drain connection of each respective field effect transistor 404a,b is returned via the center contuctor through the same coaxial shield connected to its sources but as the winding 402 enters the transformer, the center conductor of each coaxial wire is crossed to the center conductor carried in the shield of the other. This wiring cross over is necessary because the current must pass through the transformer in the opposite direction. The center conductor of both of the coaxial wires are then returned to the positive (+) side of the power source. The coaxial wire of the each of the parallel secondaries 403a,b-d is routed similarly. Rectifiers 405a,b-h convert the secondary output to a direct current. The primary winding 402 is shown more clearly in figure 4p. One section 403a of the secondary winding is shown more clearly in figure 4S. Although not shown, the coaxial wires must be insulated. With the use of good quality sleeving, very high dielectric isolation from the primary to the cores and to the secondary winding is obtainable. Capacitors 406a,b are taken from the center wire (+) to the shield (-) of each half of the primary winding 402. When fairly large, good quality capacitors are used at this location, the power factor of the input current is very good. When such capacitors are used in a pulse width modulated power supply operating on the order of a fifty percent duty cycle, the ripple current on the input is essentially a finewave at two times the switching frequency, and the ripple current is small compared to the DC current, on the order of 10% (ten percent), with no additional filtering on the input. A phantom outline of a current transformer 407 shows one possible location that it can be connected to the primary, if one is used, to sense primary current in the switching means 404a,b, as might be done if current mode control is used. It is understood that a complete power supply circuit would require additional components such as a control circuit, output filtering, snubbing and so forth. The design of such circuits are well understoo by one skilled in the art. The transformer of figure 4 is shown by way of example and not limitation wherein several features are shown schematically for drawing simplicity as well as one possible layout. For instance, each winding is shown as a single turn winding whereas there is no such limitation Using the primary winding as an example, instead of starting at one end, dividing at the other and returning to the starting end, each half of the divided push-pull primary can continue, returning to the starting end of th transformer through the other side of the transformer. I this case, the switching means is located near the input power terminations and the primary has two full turns, it being understood that the coaxial wire has two conduction paths. Multiple passes up and down the cores could be used for larger ratios the only restriction being that when all the windings are considered in all of the cores, taking note that the center wire and the shield are each conductors in the transformer, the end result must be a valid matrix transformer. Note too that the starts and ends of the windings do not need to be at the physical ends of the matrix transformer. The starts and ends can be anywhere as long as the division for the switching means is symmetrically located. Note too that there are many possible layouts and physical arrangements for matrix transformers. Matrix transformers can be made with a plurality of parallel primaries as well. If isolated transistor drives are used and other precautions are taken, "parallel" primaries can be placed in series or parallel. One use of series or parallel primaries is for a power supply that operates with either 120 or 240 volts input, depending on connections. Figure 5A shows the primary winding of the transformer of figure 4, stretched out to more clearly show the coaxial terminations and the floating capacitors. The phantom lines represent the boundary of the transformer itself. Figure 5B shows an alternate termination which is functionally equivalent to Figure 5A. Figures 6A and 6B show similar features as illustrated in Figures 5A and 5B as they apply to the secondary windings. Although not shown, floating capacitors can be installed in the secondaries exactly the same way as they are in the primary. Figures 7A-H illustrate voltage waveforms at various nodes within a transformer having symmetrical push-pull windings as illustrated in Figure 71. The schematic will be recognized as the transformer of Figure 1 with additional notations to correlate with the waveforms. Although idealized, the waveforms help to understand the operation of the transformer. A full duty cycle squarewave is used to excite the core and squarewave which results if switching means 104a,b are alternatively switched on and off with equal pulse widths and there is no time when both switches are off. Note in particular that the voltage waveform on node A is the same as the voltage waveform on node D, off set by a fixed offset equal to the V + input voltage. Similarly, B is the same as C, H is the same as E and G i the same as F. This relationship shows that a floating capacitor can be used between these nodes. The capacitor whether it is in the primary or the secondary, ideally ha no current flowing at the switching frequency. With real or non-idealized voltage waveforms, there are voltage transients due to switching transients and parasitic impedances. The floating capacitors help t control these. For some applications, a resistor is used in series with the capacitor to make a floating snubber. For the purpose of this specification and the claims, a "floating capacitor" is defined as a capacitor which is used in a transformer having symmetrically divided push-pull windings and which is installed between points which have nominally the same waveform but a different DC potential. For example, referencing the schematic and waveforms of Figures 7A-I , such points are from point A to point D from point B to point C; fro point H to point E and from point G to point F. For the purpose of this specification and the claims, a "floating snubber" is defined as a floating capacitor having a series resistor, for snubbing. A floating snubber can be used anywhere that a floating capacitor can be used. Figures 8A-H illustrate voltage waveforms at various nodes within a transformer having symmetrical push-pull windings as illustrated in Figure 81, and which transformer circuit is used with a pulse width modulated control to control the output voltage, v. The schematic will be recognized as the transformer of Figure 1 with notations for correlation with the waveforms and with the addition of an output filter comprising an inductor 807 and a capacitor 808. It can be seen that the waveform at node A is the same as the waveform at node D and also that the waveform at node B is the same as the waveform at node C. Thus floating capacitors or floating snubbers can be used between these points, respectively. However, due to the influence of the output . filter inductor 807, no such relationship exists in the secondary. While a snubber could be installed, it does not function as a floating snubber and has a waveform across it which is the difference between the voltages at node I and node J, which is the inductor voltage. The AC component is two times the switching frequency. Figure 9A shows a transformer which is essentially similar to the transformer of figure 1. The schematic is rearranged to show the windings and from a different perspective but, if one carefully traces the circuit, the windings 902 and 903 are found to be the same as the corresponding windings 102 and 103 of the transformer of figure 1. , Diodes 907a,b are shown in parallel with the switches 904a,b and provide a reverse conduction path following the turn-off of the switch on the other side. For example, when switch 904a opens, there is a voltage reversal due to the stored energy in the circuit inductances and diode 907b becomes forward biased. The diodes are present, in a manner of speaking, in the transformer circuit of figure 1 if the field effect transistors have a parasitic body diode as is usually the case. Alternative switches for 904a,b are illustrated respectively in Figures 9b-d. Figure 9b illustrates switching means 904al as a field effect transistor showing the parasitic diode in phantom. Figure 9c illustrates switching means 904a2 as a field effect transistor having a series Schottky rectifier 909a and a parallel reverse diode 907a. The circuit of Figure 9C is used when it is necessary to prevent the body diode of the field effect transistor from conducting. Figure 9d illustrates switching means 904a as a bipolar transistor having a parallel diode 907a to prevent reverse breakdown of the transistor. Other switching means exist and new ones will doubtless be discovered and the foregoing are shown as illustrations rather than, limitations. SUBSTITUTESHEET The transformer of figure 10 is also similar to the transformer of figure 1, but again drawn differently to show the transformer from a different perspective and it will be seen that the windings 1002 and 1003 are similar to the windings 102 and 103 of the transformer of figure 1. This schematic shows more clearly the relationship of the floating capacitors 1006a,b and 1008a,b to the power source and output. Figure 11 is a diagrammatic representation of a portion of the primary winding 1102 of a matrix transformer having coaxial windings and floating capacitors 1106a,b. (Cores, for reference, are shown in phantom. ) Comparing the diagram of Figure 11 with the schematic of any of the transformers having floating capacitors, it is seen that this diagram represents the primary circuit when both switching means are "off". Figure 12 shows a matrix transformer having symmetrically divided coaxial windings. The primary winding 1202 and the secondary windings 1203a,b-d are wound on a core 1201. The core 1201 comprises two similar pieces of ferrite or the like having grooves therein to receive the windings 1202 and 1203a,b-d. The two halves of the core 1201 with the windings therein are placed together so as to form a complete flux path around the windings. SUBSTITUTESHEET Figure 12P shows the primary winding 1202 of th transformer of figure 12. Figure 12S shows the secondary windings 1203a,b,c,d. Figure 13 shows a matrix transformer having a symmetrical push-pull primary 1302 with floating capacitors 1306a,b. Two FET's 1304a,b are alternatively switched on and off to provide the push-pull excitation. Ten cores 130a-e couple to a secondary circuit generally desigated 1303. It is preferable to locate the floating capacitors 1306a, b as close as possible to the FET's 1304a,b as illustrated rather than the location shown in Fig. 4. A current transformer 1311-1312 couples the primary 1302 and is used for current mode control. A first core 1311 couples the primary 1302 and has a winding 1312 which , for instance, has ten turns around the core 1311 and one turn through a second core 1313. The second core has a winding 1314 which, for instance, has 15 turns, the whole together comprising a current transformer ratio one to 150. (A current transformer should not be left open circuited). It is preferable to locate the current transformers 1311, 1312 and 1313 as shown rather than the location of current transformer 407 as illustrated in Fig. 4. The secondary circuit 1303 of the transformer of figure 13 is a push-pull secondary comprising five parallel push-pull secondary segments 1303a-e, push-pull rectifiers 1308 a-e, 1309a-e, inductors 1307a-e and capacitors 1310a-e. When wired as shown, the whole comprises a buck converter. Figure 13A is a schematic of the circuit of figure 13. Figure 14 shows a matrix transformer having a symmetrical push-pull primary winding 1402 using FET's 1404a,b and floating capacitors 1406a,b.. Ten cores 1401a-j couple a secondary circuit generally designated 1403 and comprising five parallel secondary segments 1403a-e each of which are single turn windings, ten push- pull rectifiers 14ø8a-e and 1409a-e, five inductors 1407a- e and five capacitors 1410a-e. The circuit as a whole is a forward converter having active reset. Figure 14A is a schematic of the circuit of figure 14. Figure 15 is similar in most respects to the circuit of figure 14 apart from the replacement of the active reset FET 1404b with a diode 1514. The diode 1514 clamps reverse voltage transients. When operating at lower flux densities, active resetting is not needed if there is sufficient flux capacity between the maximum flux level and the remnant flux level. This relationship is known to those familiar with the art. Figure 15A is a schematic of the circuit of figure 15. Although the input voltage terminals are illustrated in Figures 15 and 15a as being applied to the primary winding 1502 at one end of the transformer, it will be seen from Figure 22 and its discussion that the SUBSTITUTESHEET input votlage may be applied anywhere along the primary winding including across the floating capacitors 1106a an 1107b in Figure 15 and 1506a and 1506b in Figure 15a. Figure 16 is a diagram of a portion of a primary circuit 1602 of a coaxial symmetrical push-pull matrix transformer having floating capacitors 1606a,b and wound on ten cores 1601a-j. Figure 16A shows one of the cores, core 1601h of figure 16, with a portion of the primary winding 1602 and one of the floating capacitors 1606b. Flux 1611 in the core 1601h is shown with conventional dot-cross notation and induced voltage potential 1617 developed across the core is shown with plus and minus polarity indication. The capacitor charging current I indicated generally 1616 is also shown as arrows. As can be readily seen, flux 1611 in the core 1601h induces an equal voltage 1617 in any winding passing through the core as is required by Faraday's law. This relationship is familiar to those skilled in the art. Because the induced voltage potential is a common mode voltage it cannot create a charging or discharging potential on the capacitor 1606b. Further, the capacitor current 1616 flows equally in opposite directions through the core 1601h. It therefore has zero net ampere-turns and thus cannot cause a flux change in the core 1601h. The foregoing relationship for core 16ølh holds in all of the cores 1601a-j. Figure 17 shows a circuit for illustrating one method of driving the gates of the FET's 1704a,b of a symmetrical push-pull matrix transformer. The respective gates 1714a,b of the FET's 1704a,b are driven by voltage potential carried on wires 1721a,b which pass through the cores 1701a,h. The respective sources 1715a,b of the FET's 1704a,b are returned through the primary 1702 to ground reference potential. Two driver buffers 1720a,b provide the driving potential for the gates 1714a,b. FET's are shown in Figure 17 as an illustration rather than limitation And base current for bipolar transistors can be similarly driven. Therefore the teachings of the invention are applicable to any voltage or current controlled switching or regulating device. Figure 17A illustates a partial circuit which shows that any potential induced in the primary 1702 or the gate drive lead 1721b is a common mode voltages si ilarily demonstrated in figure 16A. Therefore, ground referenced driver buffers 1720a,b drive the respective gates 1714a,b of the FET's 1704a,b despite the large voltage excursions seen by these devices in operation (reference is made to figure 7 and 8). Figure 18 shows another embodiment of a circuit for driving the gates of FET's as described in connection with figure 17 and which is a further example. The respective buffer drivers 1820 a,b are located proximate to the FET's 1804a,b. A control device 1825 drives the SUBSTITUTESHEET buffers 1820a,b "through the bore", that is, voltage driving potentials are carried by conductors. Resistors 1818a,b and resistors 1819a,b are attenuation networks and provide noise immunity. Figure 18 also shows that a signal can be returned through the bore as well. Amplifiers 1822a,b return data to the control device 1825 through the bore via leads 1823a,b. For example, the FET's 1804a,b could be current sensing FET's and the data returned could be the current. In figure 18, the control device 1825 is powered from the input voltage. The buffer drivers 1820a,b and the amplifiers 1822a,b are driven from their respective floating capacitors 1806a,b and the "floating", capacitors 1806a,b have a potential which is nominally the input voltage. In the manner explained in Figure 16A, each of the drivers and sensing circuits has the same common mode potential for all of its "through the bore" interconnections and common circuits even though there may be large voltage differences from one to the other. Figure 19 shows another embodiment of a circuit for driving the gates of FET's as described in figure 18. The buffer drivers 1920a,b are driven by a respective twisted pair 1921a,b which pair could also be shielded. Also, the buffer drivers 1920a,b are powered "through the bore" from Vcc logic power on lead 1912. Floating capacitors 1916a,b provide local filtering and energy storage. Figure 20 shows a cutaway diagram of a symmetrical push-pull primary winding using through the bore gate drives. A primary circuit 2002 comprises an outer conductor 2002, and two inner conductors 2002a,b. The two inner conductors 2002a,b are common at the minus input terminal and are taken to the respective sources "S" of FET's 2004a,b. The respective drains "D" of the FET'S 2004a,b return to the input through the outer conductor 2002c, as shown. Floating capacitors 2006a,b complete the primary circuit. Ten cores 2001a-j are used and a portion of the secondary cicruit is shown as 2003a and b. The inner conductors 2002a,b of the primary circuit 2002 are also tubular, and contain "through the bore" wires 2021a,b to drive the respective gates "G" of the FET's 2004a,b. For optimum low inductance in the primary circuit 2002, it is seen that the outer conducto 2002c is continued on each side (perhaps as printed wiring board conductors), and provides a mounting surface and electrical contact for the floating capacitors 2006a, and the FET's 2004a,b. The mounting surface of FETs is customarily common to the drain. In each side, the respective inner conductor 2002a,b is taken across and electrically connected to the top surface of the floating capacitors 2ø06a,b, (making a good electrical connection) then crossing over (but insulated one from the other) to the source "S" of the opposite FET. The inside wires 2ø21a,b then are connecte to the gates "G". On the left side of the transformer as viewed in Figure 20, the gate drives can be brought to drivers (not shown) in coaxial conductors having ground referenced shields. Figure 20A shows the fully coaxial primary and secondary conductors taken along the line A-A of Figure 20 with a core 2001h surrounding the whole. Though not shown, electrical insulation is necessary, and is understood to separate the conductors 20ø2b,c, 2003 a,b and 2021b. Figure 20B shows an alternative embodiment using a buffer driver 2020 in the manner disclosed in figure 18. A schematic diagram of a symmetrical push-pull full wave bridge circuit is illustrated in Fig. 21 wherein each switching device in a symmetrical push-pull primary winding is replaced with a series pair of switching devices and a plus(+) and minus (-) power supply voltage is used. The symmetrical push-pull bridge circuit includes N-channel FETs 2102 and 2104 which respective drain terminal potentials are ground reference to 2V. P- channel FETs 2106 and 2108 have voltages at their respective drain terminals equal to ground reference to 2V. With both FETs on one side turned on (2102 and 2106 or 2104 and 2108), the source terminals will be at ground potential and fixed by the symmetry of the transformer. When both FET's on one side are turned off, the source SUBSTITUTESHEET voltage is indeterminate but it may be fixed to ground without effecting performance. Accordingly, the source terminals of the FETs 2102-2108 may be connected together and to ground reference potential 2110. The circuit of Fig. 21 also includes floating capacitors 2112 and 2114 as explained above. An optional capacitor divider circuit indicated in phantom and comprising capacitors 2116 and 2118 may be used to stabilize the ground reference potential with respect to the plus (+) and minus (-) voltage input or could create a common reference potential for the FET drives if none existed. Normally, in a matrix transformer embodiment the symmetrical switching FET's are located and as illustrated on the opposite side of the transformer from the input power voltage. This location is often desirable to isolate any switching noise from the line voltage and it usually happens if the primary has an odd number of turns (1, 3, 5, etc.). When there is an even number of turns, the FET switches are located at the power source . The winding of a symmetrical push-pull matrix transformer having floating capacitors has a constant DC voltage potential between the windings at any point in the transformer. Any differences in the DC potential from core to core are common mode voltages in both windings. In an isolated circuit, the location of a reference is arbitrary. Referring to Fig. 22, the input voltage is applied to points A and B of the symmetrical push-pull primary winding. If an isolated DC volt meter is applied at points C and D, the voltage potential measured is the same potential as applied to points A and B. This is tru anywhere in the transformer circuit up to and including across the floating capacitors 2202 and 2204. The voltag can be applied to point C and D and in fact to any corresponding points in the circuit including the terminals of either of the floating capacitors as illustrated in phantom in Fig. 22. Accordingly, the location of the applied voltage is transparent to the circuit operation. If point D is arbitrarily called a reference, the relative voltages within the circuit are unaffected. The "through the bore" gate drive as disclosed above is able to interject the gate drive with reference to the negative terminal because there is a common mode voltage everywhere to the gate and the source of the FET. This remains true if the voltage source is offset as illustrated in Fig. 22.1. However, caution must be exercised as the impedance of the two paths are now somewhat different. Accordingly, the "through the bore" gate drives referenced to ground reference potential can be located wherever the ground reference is located and the gate drive voltage can be applied wherever the ground reference is located as illustrated in Fig. 22.1. Since there are common mode voltages throughout the symmetrical push-pull matrix transformer, the source to source winding is a common reference throughout the transformer and will have only common mode voltages differences from point to point. As illustrated in Fig. 22.2, this lead 2221 may be used anywhere as an isolated reference to monitor the state of the other windings. Accordingly, any point on this winding can be used as an injection point for the gate drive as long as it is referred to the source to source winding. Fig. 22.2 shows an isolated gate drive injecting a "through the bore" gate drive at a point offset both from the winding midoint and from the supply voltage. This feature is very important in that it allows the circuitry to be kept tight and the leads short which is possible since all the components are not piled up or concentrated in the same physical location. Figure 23 shows another embodiment of the symmetrical full bridge winding circuit shown in Figure 21 and which has characteristics similar to the full bridge drive. The operation of a full bridge drive is familiar to one skilled in the art. A primary winding 2302 has terminals A-D and couples four cores 2301a-d. Switching FETs 2304a-d each have a voltage potential across its terminals equal to a maximum of the input voltage in the manner of a full bridge drive and the floating capacitors 2306a-d each see half the line voltage potential. The primary winding 2302 can be traced easily and the nominal current paths are shown by arrows for reference. If terminals,B and C are made common and referenced to ground as shown, the full bridge connecti can be used with equal positive and negative voltage potentials at terminals A and D respectively. If terminals B and C are left connected to each other but otherwise not connected to ground or other references, a voltage applied to A is returned through the circuit to It is also possible to connect terminals B to A and C to for operation at one half the voltage. Close inspection reveals that the symmetrical full bridge is actually equivalent to two separate, parallel symmetrical push-pul windings which can be used in series or in parallel. Because the two circuits are separable, one can be displaced clockwise or counterclockwise (with respect to the cores and the other circuit). This allows the FETs to be located in two different locations to reduce circui crowding, ease assembly and provide better heat spreading Figure 24 shows a primary circuit 2402 which is a symmetrical push-pull primary circuit with floating capacitors 2406a,b. Two NPN transistors 2404a,b provide the push-pull excitation to drive primary windings 2402a- d. The base drive (not shown) has resistors 2409a,b to limit current. Close inspection reveals that the circui comprising primary section 24ø2d and transistor 2404a is an emitter follower circuit. An emitter follower and the comparable FET circuit, the source follower, are familiar to one skilled in the art. It is therefore readily apparent that the voltage across the primary section 2402d cannot exceed the voltage on the base of the transistor 2404a (ignoring base-emitter drop). A clamping circuit comprising diodes 2408a,b and a zener diode 2407 limits the base voltage of either transistor 2404a,b. If the input voltage exceeds two times the zener voltage, the transistors 2404a,b will be forced into their linear operating modes during their respective ON times thus limiting the voltage imposed upon the transformer windings. Care must be taken in selecting the safe operating characteristics of the devices and is understood by one skilled in the art. Figure 25 shows a matrix transformer in which the teachings of the circuit of figure 24 have been adapted to provide linear regulation of an output voltage V 0 with respect to a reference Vref. (Vo is understood to be the output of a secondary circuit, not shown, which could be any one of many possible designs). An amplifier 2507, acting through diodes 2508a,b clamps the base of whichever transistor 2504a,b, is "ON". The circuits of figures 24 and 25 can be used to provide over voltage protection. In particular, in contrast to accommodating higher voltage with smaller and smaller pulse widths in a pulse mode power supply, the peak inverse voltage of the secondary rectifiers and othe circuits is limited. In a power supply where pulse mode regulation is the only method of regulation, the peak inverse voltage is 2 times the input voltage divided by the turns ratio. The method circuit of figure 25 could be used to provide voltage regulation, or with suitable control, current limiting or voltage amplification. Regulation in the circuit of figure 25 could be driven "through the bore" if the common mode is taken into account, but the clamping circuit of figure 24 relies upon the ground referred actual voltage. Figure 26 shows that an entire converter circuit can be integrated into a single special core structure having various flux paths defined to form a magnetic circuit. A circuit 2600, the details of which are unimportant but generally comprising a transformer which could be a matrix transformer as shown and perhaps one or more inductors, as shown and with various cavities for mounting components which components could be hybrid circuits or discrete devices, both of which devices are shown for illustration and conductors for interconnection, the whole being self contained, and may include an essentially unbroken peripheral flux path. A bottom core part 2601 contains the circuit 2600. A cover 2611 closes the assembly and provides a return path for the various magnetic circuits. Alternatively, two parts in the manner of 2601 could match. It might, for instance, be desirable to put a primary circuit in one half and a secondary circuit in the other half so different compatible matches could be made. The core 2601 with its cover 2611 or mating other half (not shown) is essentially closed except for input power leads 2602 and output power bus 2603, and possible heat sinking means shown in figure 26A as 2609and figure 26B as 2610 (which preferably are insulated from the circuit). A metal cover 2613 (shown partially) could cover the whole, to further seal it and provide shielding. During test and repair, smaller magnetic return paths could be used to provide an unobstructed view for probing. Figures 26A and B show representative sections to further clarify the core illustration. The heat sinking method is taught in U. S. Patent application serial no 07/187,931, entitled "High Erequency Matrix Transformer" filed April 29, 1988, the specification of which is hereby incorporated by reference. Figure 27 shows that fully coaxial windings can be replaced by nested "U" sections for ease of assembly. A core 2701 with its cover 2702 might, for instance be part of a matrix transformer. Instead of a fully coaxial winding, nesting "U" section conductors 2703, 2704 and 2705 can be used, suitably insulated, of course. These can be laid into the channel in the core 2701 in turn with the inner conductor 2706 being laid in last, for instance. SUBSTITUTE SHEET If desired, other conductors (not shown) could be laid in also, perhaps for "through the bore" drive or monitoring. Figure 28 shows an assembly which could be used in a matrix transformer and which could be surface mounted. An obvious variation could have pins for through-the-board mounting. Cores 2801a,b contain secondary conductors 2803a,b which are formed as a secondary circuit having four terminations shown as J terminals suitable for surface mount installation which surface mounting is familiar to one skilled in the art. Both secondary sections 2803a,b couple both cores 2801a,b, and could be wired as push-pull windings, but could also be wired in other configuration since the terminals are not dedicated. Figures 28A-C are various views and sections for clarification of Figure 28. Primary windings 2802a,b would usually pass through a number of similar assemblies to make a complete matrix transformer. Figure 28D shows a variation using wires which could terminate, for example, in a printed circuit board. "Primary" and "secondary" are used arbitrarily for illustration, not as a limitation, and could be used differently in another application. Figure 29 shows the primary circuit 2902 comprising the cores 2901a-f and transistors 2904a,b suitable for a matrix transformer. While not a symmetrical push-pull circuit, the coaxial windings of the invention are used. The center conductor and outer conductor are crossed at mid point to keep the impedance equal in both halves of the primary 2902. Figure 30 shows another primary circuit 3002 comprising cores 3001a-h and transistor switches 3004a,b suitable for a matrix transformer. While not a symmetrica push-pull circuit, the coaxial windings of the invention are used. This embodiment could be used for a forward converter in which case rectifier 3005 is substituted fo one of the transistors 3004a or b. A suitable interconnection is shown in phantom to replace transistor 3004a with diode 3005. Figure 31 shows a primary circuit 3102 comprising cores 3101a-h and switching FET's 3104a,b suitable for a push-pull primary for use in a matrix transformer. Although not connected as a symmetrical push-pull primary, floating capacitors 3106a,b are used. The common return 3102b from the FETs is the same as the negative input terminal also referenced 3102b. There should be minimum physical spacing in this circuit which circuit is shown spread out for drawing clarity only. (This is generally true of any circuits carrying AC, pulsed or time varying currents). Figure 32 shows that rectifiers 3310a,b and an optional capacitor 3311 can be used to generate a higher positive voltage of approximately one and one half times the input voltage. Also, rectifiers 3313a,b and capacito 3312 can be used to generate a negative voltage of approximate magnitude of one half of the input voltage. The other components not specifically called out are the familiar symmetrical push-rpull primary circuit of a transformer and those skilled in the art will readily understand this circuit with reference to figures 7 and 8. The circuit of Figure 32 could be used in a complete transformer to generate auxiliary voltages (as long as they are not needed to start operation), or the circuit could operate as an autotransformer. It is obvious, too, that taps or extended windings could be used to generate other voltages as an autotransformer. The use of series inductors with the capacitors would enable pulse mode control. Figures 33A-C are shown and discussed to develop the circuit of figure 34. Figure 33A shows a symmetrical push-pull secondary 3303 driving an L-C filter output comprising inductor 3307 and capacitor 3306 as might be used for a buck converter. Figure 33B shows that it is equivalent to divide the filter 3307 into two coupled inductors 3307a and 3307b and being a series circuit, the inductors 3307a,b can be moved next to the rectifiers 3308a,b as shown in figure 33C without affecting operation as long as the coupling between the inductor halves 3307a and b is good. In Figure 34, each inductor, corresponding to inductors 3307a,b of figure 33C, is further divided as 3407a-d. Once the inductors are proximate to the SUBSTITUTESHEET rectifiers, floating capacitor 3406a,b can be used because the transformer terminal voltage is now fixed. For the circuit of figure 34 to work well, the inductors must be well coupled. Figure 35 shows that the inductors can be optimally coupled by using coaxial windings 3507a-d. As shown by the dot convention, all currents flow in the same direction constrained by the rectifiers 3508a,b. At the rectifiers, the conductors are switched, inner to outer and vice versa, so that the impedances are equal. The floating capacitors 3506a,b are shown to relate this inductor circuit schematically to figure 34. Figure 36 shows the inductor of figure 35 used in a matrix transformer having two parallel symmetrical push-pull primaries 3602a,b with floating capacitors 3605a-d. The various parts of the circuit can be understood by relation to earlier examples in this specification. Figure 37 shows a transformer having a symmetrical push-pull primary 3702 with floating capacitors 3705a,b, the various parts of which can be understood by reference to the forgoing parts of this specification. The secondary circuit 3703 is in many respects similar to a push-pull secondary circuit. It is in actuality two forward converter circuits together, each operating on one half of the primary push-pull cycle by virtue of the different polarities present in the secondary windings. Inductor 3709a, with rectifiers 3708a,b and floating capacitor 3706a comprise one forward converter filter circuit. , The inductor 3709a is charged when secondary winding segments 3703a and 3703d are positive. The remainder of the circuit can be understood by similarity and by reference to the forgoing specification. The advantage of the circuit of figure 37 is that the inductors 3709a,b are not coupled and the use of floating capacitors 3706a,b is possible in the secondary. Figure 38 is another embodiment of the circuit of figure 37 which is like the more familiar forward converter and which circuit still allows the use of floating capacitors 3806a,b. Figure 39 is another embodiment of the invention. This circuit has the advantage of allowing the use of floating capacitors 3906a,b in the secondary, and having only one inductor 3907. A disadvantage is that the conduction path has two rectifiers in series. Figure 40 shows a picture frame matrix transformer secondary circuit using a circuit similar to the circuit of figure 38. The picture frame matrix transformer is further explained in U. S. Patent application ser no. , entitled "Picture Frame Matrix Transformer",filed March 29, 1989, the specification of which is hereby included by reference. The primary winding is not shown but any primary winding suitable for ' SUBSTITUTESHEET a picture frame matrix transformer may be used and may be a symmetrical push pull winding with floating capacitors. Figure 40 is better understood by reference to figure 38.1, in which parts like the parts of figure 40 are related to the reference numbers of figure 38. Note in figure 38.1 many of the lead lengths are excessive. The art of making picture frame transformers teaches that, in adjacent sections, like nodes can be substituted in the interconnection. As long as the pattern is continued and closes upon itself, each wire substituted carrying similar current at similar potential for the one substituting it, the interconnection is valid. By correlation to figure 38.1, figure 38 and the foregoing specification, the operation of the circuit of figure 40 can be understood. In a like manner, figure 41 is the picture frame matrix transformer embodiment of the secondary circuits shown in figure 37. Offset symmetrical push-pull windings maybe used with flat matrix transformers to achieve optimal componen placement for high performance and good heat dissipation. Fig. 42 illustrates a matrix picture frame transformer having an offset symmetrical push-pull winding generally designated 4202. It is seen that the power and ground terminals 4204 and 4206 respectively can be offset. Figs. 43a-d shown four possible orientations for an offset symmetrical push-pull winding and a picture frame matrix transformer. Although only four orientations are illustrated, others are obviously possible. The offset symmetrical push-pull windings illustrated in Figs. 43a-d may also be wired in a single set of elements making up the picture frame matrix transformer and the input terminations would lie in the same orientation. Fig. 44 illustrates the offset symmetrical push-pull windings being located in the same picture frame matrix transformer and being connected to the same voltage source. It should be obvious that some of the windings will have the same voltage potential and when these are identified, they may be replaced with a common wire which has a larger diameter as illustrated in Fig. 44. It will be seen that the wires 4402 and 4404 represent the windings having the same potential. Although the transformer of Fig. 44 appears to be somewhat complex, it permits paralleled Fets to drive the picture frame matrix transformer with low inductance short connections yet they are spaced far apart to obtain optimum heat distribution. Thus, the heat spreading characteristics of the paralleled secondaries can be extended to the primary windings. "Through" the bore gate drive may also be used with the superimposed offset symmetrical push-pull windings and an arrangement is illustrated in Fig. 45. One pair of drivers can drive all four sets of FET's because the common mode voltages cancel in the source leads and the gate drive leads. It goes without saying that attention must be paid to drive impedances. It woul also be preferable to use a buffer at each gate. In addition to driving the gates "through the bore", a commo voltage supply can also be taken "through the bore" to power the buffer drivers as illustrated in Fig. 46. A transformer including a matrix transformer having symmetrical push-pull windings embodying the present invention has been described above in several preferred embodiments. It will be recognized that numerous changes and modifications may be made by those skilled in the art without departing from the spirit and scope of the invention and therefore the invention has been described by way of illustration rather than limitation.

Claims: WE CLAIM ; 1. A high frequency power transformer comprising; a matrix transformer including a plurality of interdependent magnetic elements arranged in a matrix and havi at least two windings interconnecting the interdependent magnetic elements so that each of the windings comprises at least one current carrying conductor path between and through the interdependent magnetic elements, one of said at least two windings comprising a primary circuit and anther of said at least two windings comprising a secondary circuit; each winding comprising at least one current carryin conductor including a first and a second end, and at least one of said windings comprising a symmetric push-pull winding. 2. A high frequency transformer as defined in clai 1 wherein said at least one symmetrical push-pull winding is a symmetrically divided push-pull winding comprising four winding sections. 3. A high frequency transformer as defined in claim 2 wherein two of said four sections are coupled by first switching means and the other two of said four sections are coupled by second switching means. 4. A high frequency transformer as defined in claim 3 wherein said first and second switching means are located at one end of said matrix transformer. 5. A high frequency transformer as defined in claim 4 wherein one of said two sections is coupled to one of said other of said two sections and forming a first terminal and the other of said two sections is coupled to the other of said othe of said two sections and forming a second terminal. 6. A high frequency transformer as defined in claim 5 wherein a first reference voltage potential is connected to said first terminal and a second reference voltage potential is connected to said second terminal, said first and second terminals being located at an end opposite to said one end of said matrix transformer. 7. A high frequency transformer as defined in claim 5 wherein each of said four sections of said symmetrically divided push-pull winding has an equal number of turns and said sections are phased such that the dot end of said one of said two sections is connected to the non-dot end of said one of sai other of said two sections and the non-dot end of said other of said two sections is connected to the dot end of said other of said other of said two sections. 8. A high frequency transformer as defined in claim 7 further comprising: a first snubber circuit being connected between the non-dot end of said one of said two sections and the non-do end of said other of said other of said two sections, and a second snubber circuit being connected between the dot end of said other of said two section and the dot end o said one of said other of said two sections. 9. A high frequency transformer as defined in claim 7 further comprising: a first floating capacitor; a second floating capacitor; said first floating capacitor being connected between the non-dot end of said one of said two sections and th non-dot end of said other of said two sections, and said second floating capacitor being connected between the dot end of said other of said two sections and the dot end of said one of said other of said two sections. 10. A high frequency transformer as defined in claim 9 further comprising said first and second switching means bein field effect transistor (FET) devices having source, drain and gate terminals, said first and second floating capacitors being connected respectively across the source and drain terminals of said FETs. 11. A high frequency transformer as defined in claim lø further including means coupled to the respective gate terminals of said FETs for providing gate driving signals to alternately turn-on and turn-off said FETs to excite said transformer. 12. A high frequency transformer as defined in claim 1 wherein said at least one symmetrical push-pull winding comprises a coaxial wire comprising an outer shield and an inne conductor. 13. A high frequency transformer as defined in claim 10 furhter including said at least two windings comprising said primary and secondary circuits being coaxial wire having an inner conductor and an outer shield, said inner conductor of said one of said two sections crosses over and is connected to said inner conductor of said one of said other of said two sections and said inner conductor of said other of said two sections crosses over and is connected to said inner conductor of said other of said other of said two sections, said crossovers being made outside said tranformer and in proximity to said first and second switching means. 14. A high frequency transformer as defined in claim 13 further comprising said transformer haivng a plurality of parallel secondary circuits. 15. A high frequency transformer as defined in clai 14 wherein said parallel secondary circuits further comprise symmetrically divided push-pull windings each of said parallel circuits comprising four winding sections. 16. A high frequency transformer as defined in clai 9 further comprising: a first terminal coupled to one end of one of said first and second floating capacitors for connecting a fir voltage reference potential to the transformer, and a second terminal coupled to the other end of said one of said first an second floating capacitors for connecting a second voltage reference potential to the tranformer. 17. A high frequency transformer as defined in clai 11 further comprising: a first terminal coupled to one end of one of said first and second floating capacitors for connecting a fir voltage reference potential to the transformer; a second terminal coupled to the other end of said one of said first and second floating capacitors for connecting a second voltage reference potential to the transformer, and said gate coupling means being external from the transformer. 18. A high frequency transformer as defined in claim 11 further comprising said gate coupling means being internal t the transformer and passing through said interconnected magneti elements. 19. A high frequency transformer as defined in claim 11 wherein said at least one symmetrical push-pull winding is a symmetrically divided push-pull winding having a plurality of divisions and forming a plurality of winding sections. 20. A high frequency power transformer comprising: a matrix transformer including a magnetic core, said magnetic core comprising a first and second plate of magnetic material, each of said plates having major surfaces wherein one major surface of each of said plates has grooves fo receiving windings, each of said windings comprising at least one current carrying conductor path between and through said first and second plates, said major surfaces of each plate bein in a face-to-face relationship with one another and providing a path, said windings further comprising a primary winding and a secondary winding, each of said primary and secondary windings further comprising a symmetrically divided push-pull coaxial winding.

Inventors: CEBRY STEVEN E, HERBERT EDWARD, REPP JOHN D, CEBRY, STEVEN, E., HERBERT, EDWARD, REPP, JOHN, D.
Applicants: FMTT INC, FMTT, INC.
Application year: 1989
Main classification: H02M3
IPC codes: H01F19, H01F30, H02M3, H02M7