An active matrix type liquid crystal display

Abstract: An active matrix type liquid crystal display device comprising a substrate on which picture element electrodes which are arranged in a matrix, TFTs which are respectively disposed in the vicinity of each picture element electrodes, and capacitor electrodes each of which is opposed to one portion of each of the picture element electrodes for producing an additional capacitor are formed. A dielectric lamination structure consisting of three insulating layers is formed between the picture element electrode and the capacitor electrode. The dielectric lamination structure includes a gate insulating layer formed on the gate electrode of the TFT and the capacitor electrode, and a protective insulating layer formed on the TFT.

Description: BACKGROUND OF THE INVENTION 1. Field of the invention: This invention relates to an active matrix type liquid crystal display device in which thin-film transistors are used as non-linear switching elements, and more particularly to an active matrix type liquid crystal display device in which additional capacitors are formed. 2. Description of the prior art: In an active matrix type liquid crystal display device, thin-film transistors (TFTs) are used as switching elements for driving picture elements. It is common to form an additional capacitor for each picture element in order to improve the display quality. See for example, EP-A-0288011, which is state of the art under Article 54(3) EPC for the designated States DE, FR, GB. Figures 3 and 4 show a substrate of a conventional active matrix type liquid crystal display device, known from JP-A-1-217325. On the substrate, TFTs and additional capacitors are formed. A plurality of gate bus lines 2 are formed in parallel and horizontally in Fig. 3, and a plurality of source bus lines 3 are formed vertically in the figure on an insulating substrate 7 (Fig. 4). In the vicinity of each intersection of the gate bus lines 2 and source bus lines 3, a TFT 5 is formed. Each TFT 5 drives a picture element electrode 4 which is disposed in each region surrounded by two adjacent gate bus lines 2 and two adjacent source bus lines 3. Under the picture element electrode 4, a capacitor electrode 6 is formed. Between the substrate of Fig. 3 and an opposing substrate (not shown), a liquid crystal material is sealed to construct a display device. Each picture element electrode 4 constitutes a picture element. The structure of the substrate of Fig. 3 will be described in more detail with reference to Fig. 4 which is a sectional view taken along line IV-IV of Fig. 3. The gate electrode 8 of the TFT 5 and the capacitor electrode 6 are formed on the surface of the insulating substrate 7. The gate electrode 8 is one part of the gate bus line 2. The gate electrode 8 and capacitor electrode 6 can be formed simultaneously, and made of the same material. An anodic oxidation film 9 is formed on each of the gate electrodes 8 and capacitor electrodes 6. A gate insulating layer 10 is formed on the anodic oxidation films 9 and the remaining surface of the insulating substrate 7. The TFT 5 further comprises an i-amorphous silicon (a-Si) film 11, an insulating film 12, n⁺-a-Si films 13, a source electrode 14a, and a drain electrode 14b which are laminated on the gate insulating layer 10. The source electrode 14a and drain electrode 14b are made of the same material as that of the source bus lines 3, and formed simultaneously with the source bus lines 3. The picture element electrode 4 is formed on the gate insulating layer 10, and electrically connected to the drain electrode 14b. In the above-mentioned structure, a dielectric layer consisting of the anodic oxidation film 9 and the gate insulating layer 10 is formed between the picture element electrode 4 and the additional capacitor electrode 6, so that the picture element electrode 4 and the capacitor electrode 6 constitute an additional capacitor which is connected in parallel to the capacitor caused by the liquid crystal. This additional capacitor stores charges when the TFT 5 is ON to drive the picture element electrode 4, and substantially retains the voltage applied to the electrode 4 until the next frame scanning period. In a conventional active matrix type liquid crystal display device having such a configuration, the picture element electrode 4 is electrically insulated from the capacitor electrode 6 by the dielectric layer consisting of the anodic oxidation film 9 and the gate insulating layer 10. It is often that a pinhole is formed in the dielectric layer due to various reasons such as that a foreign body is mixed into the dielectric layer. In such a case, the picture element electrode 4 disposed on the dielectric layer falls into electrical continuity with the capacitor electrode 6 formed under the dielectric layer. This causes that, when the TFT 5 connected to the picture element electrode 4 is ON, a current leaks from the picture element electrode 4 to the capacitor electrode 6 to cause a display defect. In a conventional active matrix type liquid crystal display device, therefore, the existence of a pinhole in the two-layered structure between the picture element electrode 4 and the additional capacitor electrode 6 causes an inferior production yield. SUMMARY OF THE INVENTION This invention provides an active matrix type liquid crystal display device having a substrate and an array of display elements disposed on said substrate, each display element comprising: a picture element electrode; a switching element provided adjacent to the picture element electrode and connected to the picture element electrode; a protective insulating layer disposed over the switching element; a capacitor electrode opposed to a part of the picture element electrode, the capacitor electrode and the picture electrode forming a capacitor; and a laminated dielectric structure disposed between the capacitor electrode and the picture element electrode, the laminated dielectric structure comprising two electrically insulating layers; characterised in that: said protective insulating layer extends between the picture element electrode and the capacitor electrode to thereby provide a further electrically insulating layer between the picture element electrode and the capacitor electrode. In a preferred embodiment, the switching element is a thin-film transistor, the gate electrode of said thin-film transistor and said capacitor electrode are disposed on said substrate, and a gate insulating layer is formed on both said gate electrode and said capacitor electrode, said gate insulating layer being one of said two insulating layers. In a preferred embodiment, an anodic oxidation film is formed on said capacitor electrode, said anodic oxidation film being one of said two insulating layers. In a preferred embodiment, the picture element electrode is disposed on said protective insulating layer. In a preferred embodiment, the picture element electrode is electrically connected to the drain electrode of said thin-film transistor, through a contact hole which is formed in said protective insulating layer. Thus, the invention described herein makes possible the objectives of (1) providing an active matrix type liquid crystal display device in which there is no current leakage between a picture element electrode and a capacitor electrode; (2) providing an active matrix type liquid crystal display device which can effectively prevent the occurrence of a display defect; and (3) providing an active matrix type liquid crystal display device which can be manufactured in high yield. BRIEF DESCRIPTION OF THE DRAWINGS This invention may be better understood and its numerous objects and advantages will become apparent to those skilled in the art by reference to the accompanying drawings as follows: Figure 1 is a partial sectional view of a substrate used in an embodiment of the invention. Figure 2 is a plan view showing one portion of the substrate used in the embodiment. Figure 3 is a plan view showing one portion of a substrate used in a conventional display device. Figure 4 is a sectional view taken along line IV-IV of Fig. 3. DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the invention is shown in Figs. 1 and 2. Figure 2 is a partial plan view of a substrate used in the embodiment, and Fig. 1 is a sectional view taken along line I-I of Fig. 2. On an insulating substrate 27, a plurality of gate bus lines 22 are formed in parallel and horizontally in Fig. 2, and a plurality of source bus lines 23 are formed vertically in the figure. In the vicinity of each intersection of the gate bus lines 22 and source bus lines 23, a TFT 25 is formed. Each TFT 25 drives a picture element electrode 24 which is disposed in each region surrounded by two adjacent gate bus lines 22 and two adjacent source bus lines 23. Under the picture element electrode 24, a capacitor electrode 26 is formed. On the surface of the insulating substrate 27, a gate electrode 28 of the TFT 25 and a capacitor electrode 26 are formed. The gate electrode 28 is one part of the gate bus line 22. The gate electrode 28 and capacitor electrode 26 can be formed simultaneously, and made of the same material. The above-mentioned parts of the structure of the preferred embodiment may be the same as those of the device of Fig. 3. An anodic oxidation film 29 is formed on each of the gate electrode 28 and capacitor electrode 26. A gate insulating layer 30 is formed on the anodic oxidation films 29 and the remaining surface of the insulating substrate 27. In the region above the gate electrode 28, an i-a-Si film 31 and n⁺-a-Si films 33 are laminated on the gate insulating layer 30. The n⁺-a-Si films 33 are electrically separated by an SiN x insulating film 32 formed on the i-a-Si film 31. A source electrode 34a and a drain electrode 34b are formed on the n⁺-a-Si films 33, respectively. The source electrode 34a and drain electrode 34b are made of the same material as that of the source bus lines 23, and formed simultaneously with the source bus lines 23. The structure including the films 31, 32 and 33 and electrodes 28, 34a and 34b constitute the TFT 25. One end portion of the drain electrode 34b extends over the gate insulating layer 30. A protective insulating layer 35 is formed to cover the TFT 25 and the gate insulating layer 30. The picture element electrode 24 is formed on the protective insulating layer 35, and electrically connected to the drain electrode 34b through a contact hole 40 which is formed in the protective insulating layer 35. In the substrate of the embodiment having the above-described structure, a three-layered dielectric laminated structure consisting of the anodic oxidation film 29, the gate insulating layer 30 and the protective insulating layer 35 is formed between the picture element electrode 24 and the capacitor electrode 26, so that an additional capacitor is formed by these two electrodes 24 and 26 and the three-layered dielectric laminated structure. Since the additional capacitor comprises the three-layered dielectric laminated structure, the insulation between the picture element electrode 24 and the capacitor electrode 26 will not easily fail as compared with that of the prior art which has a two-layered dielectric structure as mentioned above. Therefore, the possibility of producing electrical continuity between the picture element electrode 24 and the capacitor electrode 26 which is caused by a pinhole can be greatly reduced. A production process of the preferred embodiment will be described. On the insulating substrate 27 such as a glass plate, a thin layer of a metal such as Ta, Al, or Ti is deposited in the thickness of 2000 - 4000 Å by the sputtering or electron beam deposition technique. This thin metal film is patterned to form simultaneously the gate electrode 28 and the capacitor electrode 26. Then, the surface of the gate electrode 28 and the capacitor electrode 26 is subjected to anodic oxidation to make the anodic oxidation film 29 thereon. The thickness of the anodic oxidation film 29 ranges from 1000 Å to 3000 Å. Thereafter, SiN x is deposited by a plasma CVD technique to form the gate insulating layer 30 (thickness: 2000 - 5000 Å), As a result, a two-layered dielectric lamination consisting of the anodic oxidation film 29 and the gate insulating layer 30 is formed. Furthermore, a semiconductor film of a-Si and an insulating film of SiN x are successively deposited, and then patterned by the photolithographic technique to form the a-Si film 31 and the SiN x insulating film 32. Then, a semiconductor film of n⁺-a-Si is deposited, and then patterned by the photolithographic technique to form the n⁺-a-Si films 33. A metal such as Ti, Mo or W is deposited by the sputtering or electron beam deposition technique, and patterned by the Photolithographic technique to form the source electrode 34a and the drain electrode 34b. The protective insulating layer 35 made of SiN x is deposited in the thickness of 2000 - 6000 Å by the plasma CVD technique, and the contact hole 40 is opened in the layer 35 by the photolithographic technique. Thereafter, a transparent conductive film which is mainly composed of indium oxide is deposited by the sputtering or electron beam deposition technique, and patterned to form the picture element electrode 24 which is electrically connected to the drain electrode 34b through the contact hole 40. In the substrate thus produced, the three-layered dielectric laminated structure which consists of the anodic oxidation film 29, the gate insulating layer 30 and the protective insulating layer 35 is disposed between the capacitor electrode 26 and the picture element electrode 24, thereby forming an additional capacitor. The protective insulating layer 35 may be made of another insulating material such as SiO₂ in place of SiN x .

Claims: An active matrix type liquid crystal display device having a substrate (27) and an array of display elements disposed on said substrate (27), each display element comprising: a picture element electrode (24); a switching element (25) provided adjacent to the picture element electrode (24) and connected to the picture element electrode (24); a protective insulating layer (35) disposed over the switching element (25); a capacitor electrode (26) opposed to a part of the picture element electrode (24), the capacitor electrode (26) and the picture electrode (24) forming a capacitor; and a laminated dielectric structure disposed between the capacitor electrode (26) and the picture element electrode (24), the laminated dielectric structure comprising two electrically insulating layers (29, 30); characterised in that: said protective insulating layer (35) extends between the picture element electrode (24) and the capacitor electrode (26) to thereby provide a further electrically insulating layer between the picture element electrode (24) and the capacitor electrode (26). A device according to claim 1, wherein said switching element is a thin-film transistor (25), the gate electrode (28) of said thin-film transistor and said capacitor electrode (26) are disposed on said substrate (27), and a gate insulating layer (30) is formed on both said gate electrode and said capacitor electrode, said gate insulating layer (30) being one of said two insulating layers. A device according to claim 2, wherein an anodic oxidation film (29) is formed on said capacitor electrode (26), said anodic oxidation film (29) being one of said two insulating layers. A device according to claim 1, 2 or 3, wherein said picture element electrode (24) is disposed on said protective insulating layer (35). A device according to claim 2, 3 or 4, wherein said picture element electrode (24) is electrically connected to the drain electrode of said thin-film transistor (25), through a contact hole (40) which is formed in said protective insulating layer.

Inventors: HIBINO YOSHITAKA, HIROBE TOSHIHIKO, KATO HIROAKI, HIBINO, YOSHITAKA, HIROBE, TOSHIHIKO, KATO, HIROAKI
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1989
Main classification: G02F1
IPC codes: H01L27, G02F1, G09F9, G09G3, H01L21, H01L29