A circuit arrangement for compensating for the thermal drift of a phase detector

Abstract: The invention relates to a circuitry for the compensation for the temperature drift of a phase detector (1) in a phase-locked loop which comprises a phase detector (1), a loop filter (2) and in the feedback branch a voltage con­ trolled oscillator (3) coupled to the phase detector (1). According to the invention the phase detector (1) is pro­ vided with a differential output (I and II), which is coupled to the input terminals (- and +) of the operational amplifier (4) in the loop filter (2), whereby the common-­ mode temperature drift of the phase detector (1), appearing in the input poles of the operational amplifier, is sub­ stantially eliminated in the output of the amplifier (Uout).

Description: The invention relates to DC-level temperature drift of an analog phase detector of a PLL (phase-locked loop) in accordance with the preamble of Claim 1. The phase difference between the incoming signals remaining constant, the output level will drift as the temperature changes. In a PLL, detrimental temperature drift appears also in the loop filter and in the voltage-controlled oscillator VCO. A PLL can be used for FM signal detection in FM-IF intermediate-frequency circuits. In a phase-locked loop, Figure 1, the thermal drifts of the different functions jointly offset the average frequency of the VCO to the degree that the loop cannot be caused to lock or that maintaining it locked becomes a problem. This happens especially when the loop filter has been calibrated as a narrow-band filter and when the level of the incoming IF signal decreases from its nominal value. This situation appears, for example, when the receiver is listening to nothing but noise and the amplitude of the output signal of the limiter-amplifier remains deficient. In theory it is possible to make each block of the PLL fully stable with respect to the temperature, but in reality there always appears temperature drift to some degree. At its simplest the loop filter of a PLL comprises only resistors and capacitors. In that case there may in principle appear thermal drift in the loop only in the phase detector or the VCO. The following compensation methods can be used with respect to temperature drifts: A: If the temperature drifts of the different blocks are inverse to each other, the problem is eliminated. This, however, on the condition that the temperature coefficients change linearly or that the non-linearities are mirror images of one other. It is to be expected that at a great temperature change (range of change approximately 100 °C) the coefficients do not completely annul one another. In this case the loop's remaining locked or becoming locked will constitute a problem at the extreme temperatures. This is also seen as a distortion of the detection result. B. The necessary offset voltage can be summated into the loop filter to compensate for the drift errors caused by the temperature. The precision requirement of the offset voltage becomes a problem if the drift errors are in the same direction. The most common method of compensation in PLL circuits has so far been the solutions according to point A. On the other hand, very few PLL-IF circuits are available commercially, and so there are not very many alternative examples. According to experience, at the extreme values of the operating temperature the remaining of the circuit locked and its locking constitute a problem at low signal levels. Known from US-A-4 302 732 is a phase-locked loop circuitry in which a phase detector compares two digital signals and outputs a digital signal indicative of a phase difference between the two input signals. The output signal is passed through both an inverting amplifier and a non-inverting amplifier and is supplied to the differential inputs of an operational amplifier. Such differential combining of the inverted and non-inverted amplified signals serves to eliminate undesired DC voltage components produced by circuit imbalances as a result of temperature variations. This document exhibits the basic structure as used in the present invention. US-A-4 055 814 discloses a phase-locked loop wherein a reference voltage is applied to one input of a differential amplifier. This reference voltage serves as a reference level to keep the phase error signal output by the differential amplifier at zero as long as a certain phase relationship between two digital input signals of a phase detector is maintained. In an article entitled "Monolithic phase-locked loops - analogs do all the work of digitals, and much more", EDN, Vol. 22, no. 16, September 5, 1977, pages 59-64, Enjeti Murthi describes some applications of phase-locked loops of both analogue and digital type in the field of FM demodulators. The object of the invention is to find a circuit arrangement by means of which temperature drift effects occurring in a phase-locked loop are compensated for in a simple and economical manner. According to the invention, the problem which has been set is solved by using a circuit arrangement which is characterized in what is disclosed in greater detail in the characterizing clause of Claim 1. In the circuitry according to the invention, the temperature drift of the phase detector is not visible in the output of the loop filter, and so the thermal drift of the VCO in principle remains the only error factor. The operational amplifier itself causes a new offset temperature drift, but this drift is an order of magnitude smaller than the drift of the phase detector. The circuitry according to the invention provides as an additional feature the possibility of convenient control of the VCO. The invention is described below with the aid of an embodiment example and a drawing relating to it, in which Figure 1 is a block diagram of the wiring of the phase-locked loop, and Figure 2 depicts a phase-locked loop having the circuitry according to the invention. The phase-locked loop in Figure 1 comprises a phase detector 1, a loop filter 2, and a voltage-controlled oscillator VCO 3. An intermediate-frequency signal IFin is applied to the input of the phase detector 1. The output signal of the FM demodulator is Uout. In the stable state the phase difference between the signal IFin and the output signal Fvco of the VCO is 90°. In Figure 2 in the circuit arrangement according to the invention the output of the phase detector 1 of the PLL is differential, and an operational amplifier 4 is used in the loop filter 2. In the present invention, the basic property of the differential amplifier to reject a common-mode signal is exploited. When the output I of the phase detector 1 changes along with the temperature in, for example, a more positive direction, the output II also changes in the same direction by the corresponding amount. Since the changes are common-mode signals from the viewpoint of the differential amplifier, the operational amplifier 4 will not amplify the change. The best result is achieved in the rejection ratio of the common-mode signal if the resistances R of the circuitry are equal in value. On the other hand, when the phase difference between the input signals IFin and Fvco of the phase detector 1 changes, the levels of the outputs I and II change in the inverse direction, and the operational amplifier 4 amplifies this change in the phase difference. The loop filter 2 can be divided into the feedback branches of the operational amplifier symmetrically, which is represented in the figure by blocks 2a and 2b. In the circuitry according to the invention, the temperature drift of the phase detector 1 does not show in the output of the loop filter 2, and so the thermal drift of the VCO 3 in principle remains the only error factor. The operational amplifier 4 itself causes a new offset temperature drift, but this drift is an order of magnitude smaller than the drift of the phase detector 1. The circuitry according to the invention provides as an additional feature the possibility to control the VCO 3 conveniently via the non-inverting input of the operational amplifier 4 by using the voltage Uref. If the phase difference between the inputs of the phase detector 1 is 90° (when the loop is locked, the phase difference between the signals IFin and Fvco is 90°), the voltage difference between the outputs I and II is zero. In this case the output voltage of the loop filter 2 is precisely the same as the voltage Uref, and the output Uout follows directly the change in the voltage Uref. The potential of the voltage Uref does not affect the compensation for the thermal drift of the phase detector 1. By control of the voltage Uref, the VCO 3 can be tuned to its average frequency and, on the other hand, this control voltage can also be used for compensating for the thermal drift of the oscillator. The controls can be implemented as program control with the aid of a D/A transformer (not shown), in which case the tuning of the loop to its average frequency and the compensation for the drift can be automatic. The differential amplifier can be made of transistor pairs, or a ready-made operational amplifier can be used in it. Whether the choice is a differential amplifier or transistor pairs depends completely on the application chosen, but a simple construction is achieved with an operational amplifier integrated in advance. If the circuitry is integrated on the same chip in the PLL, the operational amplifier is designed so as to be sufficiently good with respect to common-mode rejection, by using the necessary number of transistors and matched transistor pairs.

Claims: A phase-locked loop circuitry adapted to realize an FM demodulator, comprising: an analogue phase detector (1) for receiving an FM intermediate frequency signal (IFin) on one input, a loop filter unit (2a, 2b, 4) coupled to an output stage of said phase detector (1) and comprising an operational amplifier (4) having an inverting and a non-inverting input each of which is coupled to one of two differential outputs (I, II) of said output stage of said phase detector (1), and a voltage-controlled oscillator (3) responsive to an output signal (Uout) of said loop filter unit (2a, 2b, 4) and coupled to said phase detector (1) in a feedback branch, whereby common-mode temperature activity of said phase detector (1) appearing in the input values of said operational amplifier (4) is substantially eliminated in an output signal (Uout) thereof, wherein a reference voltage (Uref) is connected to one of said inverting and non-inverting inputs of said operational amplifier (4) for tuning the average frequency of said voltage-controlled oscillator (3) and compensating for thermal drift thereof. A phase-locked loop circuitry according to claim 1, characterized that said loop filter unit further comprise a loop filter implemented symmetrically in the feedback branches of said operational amplifier. A phase-locked loop circuitry according to claims 1 or 2, characterized in that said reference voltage is program-controlled via a D/A transformer.

Inventors: NYQVIST JOUNI, NYQVIST, JOUNI
Applicants: NOKIA MOBILE PHONES LTD, NOKIA MOBILE PHONES LTD.
Application year: 1989
Main classification: H03L7
IPC codes: H03L7