Self equalizing multi-stage radio frequency power amplifier

Abstract: Linearity and efficiency of a radio frequency two-stage power amplification device (10) are increased by employing two tuned circuits 16 and 18 in a driver stage (12) and two tuned circuits (22 and 24) in a high power stage (14). After selecting elements of tuned circuits (22 and 24) in order to optimize the high power stage (14) for efficiency, linearity and power output, elements are selected for tuned circuits (16 and 18) in order to cause the intermodulation output components associated with the driver stage (12) to have a 180° phase angle relative to the intermodulation output com­ ponents associated with the individual high power stage (14). This phase angle relationship will cause the intermodulation output component products from the driver and high power stages (12, 14) to cancel.

Description: The present invention relates to a radio frequency power amplifier circuit having a driver stage coupled to a high power stage, each stage having intermodulation distortion output components, comprising circuit means for internally defining the intermodulation distortion components of the output of the driver stage such that said components are 180° out of phase with the intermodulation distortion components of the output of the individual high power stage whereby the intermodulation distortion component outputs of the two stages will subtract from or cancel each other. The invention relates further to a method of combining stages of a multi-stage solid-state radio frequency power amplifier together in order to eliminate intermodulation components which are attributable to the outputs of each of the individual stages, comprising the step of tuning the driver stage such that the intermodulation components which are produced are of an alternate phase angle than the intermodulation components produced in the individual high power stage such that the intermodulation output components of the stages will subtract from each other or cancel. Such a circuit and respective method are known from document DE-A-31 33 673. This document discloses a pre-equalizer circuit for compensation of amplifier non-linearities in television signal transmitter. Compensation is provided in the intermediate frequency domain. For this purpose, the pre-equalizer provides two parallel paths of auxiliary amplifiers. One path produces the same usefuls signals, and intermodulation products, as the subsequent amplifier, whereas the other path generates only the useful signals, but at the double amplitude, and opposite phase, as the first path. The summation of the two paths signals reveals the useful signals, and the intermodulation products, at opposite phase. Thus, when fed to the non-linear amplifier which produces the useful signals and the intermodulation products at the same phase, the intermodulation products will cancel out, and the useful signals will be amplified. In general, multi-stage radio frequency power amplifiers are used in a wide variety of communications and other electronic applications. These amplifiers are made up of two or more cascaded amplifier stages, each of which increases the level of the signal applied to the input of that stage by an amount known as the stage gain. The multi-stage amplifier output is therefore a replica of the input signal increased by the product of the stage gains. Ideally the input to output transfer of each stage would be linear; a perfect replica of the input signal, increased in amplitude, would appear at the amplifier output. Practical amplifiers, however, have a degree of non-linearity in their transfer characteristic. This non-linearity results in the distortion of the output signal so that it is no longer a perfect amplified replica of the input. One manifestation of this distortion is the creation of spurious signal components, known as intermodulation products, at frequencies which did not exist at the original input. These intermodulation components have a deleterious effect on the performance of the system employing the power amplifiers. Two principal approaches have previously been used to increase linearity and thereby reduce the generation of intermodulation products. The first is the class A operation of each of the amplifier stages. This class of operation features the highest linearity but is often impractical because of its very poor efficiency and high thermal dissipation characteristics. The second conventional approach is the employment of separate linearizer circuits. Feed-forward, feed-back, and pre-distortion linearizers are conventionally utilized for this application. This concept of separate linearizer circuits for compensation purposes is, for example, discussed in document EP-A-243 898. Various compensation paths of an auxiliary circuit (which is connected in series with the amplifier) produce the same second and third order non-linearities as the amplifier; their outputs are fed - with negative sign - to a summation point. This document deals specifically with the extension of this compensation scheme for various different frequencies or frequency bands, basically by providing frequency-dependent transfer functions of the different compensation paths in the auxiliary circuit. However, this compensation method is still focused on a one-stage amplifier and does not use the charactics of a multi-stage amplifier. A further compensation circuitry employing the conventional separate linearizer approach is disclosed in document EP-A-289 130. Three "pre-distortion circuits", arranged in parallel, are provided in front of a RF power amplifier. These pre-distortion circuits are specifically designed to compensate at a particular frequency band each, and a selection switch under control of a selection control unit actuates the pre-distortion circuit corresponding to the actual operating frequency of the RF power amplifier. This document further discloses a method of measuring the non-linear characteristics of the RF power amplifier, in order to determine the circuit layout, and the component values, of the pre-distortion circuits. Two RF tones at slightly different frequencies (such that intermodulation products are generated), are applied to the power amplifier. Its output signal is fully transformed, and amplitude and phase distortion are determined. Such separate linearizer approach suffers from several significant disadvantages. It significantly increases the cost of the amplifier and requires complex tuning and alignment to track the inherent variations of the amplifier over time and environmental changes. Additionally, the degree of linearization possible with a multi-stage amplifier is limited by the non-linear combination of the distortions generated by each stage. In view of this, it is an object of the present invention to improve the circuit and the method mentioned at the outset such that the inherent disadvantages of the conventional approaches discussed insofar are overcome. According to the circuit specified at the outset this object is achieved in that circuit means comprises two tuned circuits connected to a transistor in the driver stage, said tuned circuits having elements with values chosen to cause intermodulation component outputs of said driver stage to cancel with intermodulation component outputs of the high power stage. According to the method specified at the outset this object is achieved by the following step: tuning a high power stage for efficiency, linearity and power output; wherein said driver state includes at least one transistor, with an input and output tuned circuit connected thereto, and wherein the step of tuning the driver stage includes the selection of element values for said input tuned circuit of the driver stage and values for said output tuned circuit of the driver stage in order to cause the phase angles of the intermodulation distortion output components associated with said driver stage to be at a 180° angle relative to the distortion output components of the individual high power stage. Thus, the amplifier is designed so that the intermodulation components generated in each pair of cascaded stages are of opposite phase. In this manner the intermodulation components will combine subtractively thereby reducing the component level over the range of operation of the amplifier. According to the teachings of the present invention, linearity and distortion of the radio frequency multi-stage power amplifier is improved by employing circuit means for internally causing the intermodulation output components associated with the individual stages to be 180° out of phase thereby resulting in cancellation. The method to be utilized in eliminating the intermodulation output components associated with this multi-stage radio frequency power amplifier employs generally two steps. In the first step, the high power output stage is optimized for efficiency, linearity, and power output. This optimization procedure incorporates the following steps: (1) selection of the amplifier device (transistor); (2) selection of the amplifier device bias voltages; (3) design of the input and output tuned matching circuits; and (4) design of the bias circuits. After this optimization is completed, step two employs the appropriate selection of values of elements defining the input and output tuned circuits associated with the driver stage of the multi-stage radio frequency power amplifier. By appropriate element selection of these tuned circuits, the intermodulation output components associated with the driver stage will be out of phase with the high power stage intermodulation components. The various advantages of the present invention will become apparent to those skilled in the art by reading the following specification and by reference to the drawings in which: FIG. 1 is an electronic schematic circuit diagram of a two stage radio frequency power amplification device made in accordance with the teachings of the preferred embodiment of this invention; FIG. 2 is a graphical illustration helpful in understanding the tuning of the output stage in accordance with the teachings of the preferred embodiment of the invention; FIG. 3 is a graphical illustration of the output power level and associated intermodulation power level and phase angle of the driver stage after tuning in accordance with the teachings of this invention; and FIG. 4 is a graphical illustration of the power level and phase angle associated with the intermodulation components of the output and driver stages of the amplifier for a given output power signal after the method of this invention has been performed. Turning now to FIG. 1, a two stage amplifier 10 having a driver stage 12 and a high power output stage 14 is illustrated. Radio frequency signals are input into amplifier 10 through capacitor C 4 . The purpose of C 4 is to act as a direct current block. Further traversing the device, the signal then goes through the first input tuned circuit 16 associated with the driver stage 12. This input tuned circuit 16 consists of inductor L 5 , and capacitors C 5 and C 6 . Transistor T 2 amplifies the input signal and passes it to the input of the output tuned circuit 18. Direct current voltage V bb is impressed on resistor R 1 . The combination of resistors R 1 , R 2 , and R 3 along with capacitor C 1 acts to bias transistor T 1 . Voltage appears at the collector of T 1 and is transferred to the base of transistor T 2 for biasing purposes. This transfer of collector voltage from transistor T 1 is effectuated by means of inductors L 1 and L 3 . Capacitors C 2 , C 3 , act as alternating current shunts to ground. The collector of transistor T 2 is biased by direct current voltage V cc via inductors L 2 and L 4 . Capacitors C 7 and C 8 act as alternating current shunts to ground. The output tuned circuit 18 associated with the driver stage 12 is defined by inductor L 6 , and capacitors C 9 and C 10 . Capacitor C 11 acts as a direct current block and connects the output of the driver stage to the circulator device 20. The circulator provides radio frequency isolation between the driver stage 12 and the high power stage 14 of the radio frequency power amplifier 10. The output of the circulator device is connected to capacitor C 12 which acts as a direct current block. The output of capacitor C 12 goes into a hybrid circuit designated as H 1 . This hybrid circuit takes the single ended output of capacitor C 12 and converts this output to a balanced signal. The output of hybrid circuit H 1 serves as the dual input to the input tuned circuit of the high power output stage 14. The input tuned circuit 22 associated with the high power stage 14 is made up of inductors L 7 and L 8 and capacitors C 16 and C 17 . The amplification device associated with the high power stage is a push-pull dual transistor arrangement of T 4 and T 5 . Transistor T 3 is biased by means of resistors R 4 , R 5 , and R 6 , direct current voltage V bb , and capacitor C 13 . The output voltage associated with the collector of transistor T 3 is transferred to the base of transistors T 4 and T 5 for biasing purposes. The voltage associated with the collector of transistor T 3 is transferred to the base of transistor T 4 by means of inductors L 10 and L 15 . Capacitors C 14 and C 15 shunt any undesired alternating current to ground. The transfer of voltage from the collector of transistor T 3 to the base of transistor T 5 is accomplished by inductors L 9 and L 15 . Direct current voltage V cc is transferred to the collectors of transistors T 4 and T 5 for biasing purposes. This transfer of voltage to the collector of transistor T 4 is accomplished by inductors L 16 and L 11 . Capacitors C 20 and C 21 shunt any undesired alternating current to ground. The transfer of voltage from voltage source V cc to the collector of transistor T 5 is accomplished by means of inductors L 12 and L 16 . The output tuned circuit 24 associated with this high power stage 14 includes inductors L 13 and L 14 and capacitors C 18 and C 19 . The output signal of this output tuned circuit 24 is then connected to a hybrid circuit H 2 . Hybrid circuit H 2 converts the signal from a balanced type signal to a single ended signal. The output of hybrid H 2 is then connected to capacitor C 22 for direct current blocking purposes. The output of capacitor C 22 is the radio frequency power output signal associated with the two stage radio frequency power amplification device 10. The method of the present invention can best be understood by way of a simplified example. With reference to FIG. 1, one would select element values for inductors L 7 , L 8 , L 14 , and L 13 along with element values for capacitors C 16 , C 17 , C 18 , and C 19 in order to maximize the power output, efficiency, and linearity of the high power stage 14 of this radio frequency power amplifier. In practice this is accomplished by applying an input test signal made up of two equal amplitude sine waves whose frequencies are slightly offset to the high power output stage 14. As the power level of the input is increased, the level of the output signal and intermodulation components are measured. The results of a typical measurement are shown in FIG. 2 as curve set 1. As an example, the required output power, which is specified by the application, is also indicated in the figure. Other tuning and bias conditions will provide the same output power for different levels of input power, direct current to radio frequency conversion efficiencies, and carrier to intermodulation power ratios as indicated in the figure as curve sets 2 and 3. For each selection of element values for the input and output tuned circuits 22, 24 of the high power stage 14, the intermodulation power as a function of input power relationship shows a null as input power is increased. The phase of the intermodulation products for input levels below the null is opposite to the phase above the null as portrayed by the "+" and "-" symbols in FIG. 2. As the high power stage is optimized for higher output power, the null shifts to the right and the intermodulation characteristic behaves as shown in FIG. 2. The tuning of the high power stage is based on selecting the best compromise between the direct current to radio frequency conversion efficiency and the carrier to intermodulation power ratio. This tuning results in placing the null to the right of the point where the output signal reaches the required output power level. Using this criterion, the tuning corresponding to curve 2 would be selected, since the intermodulation null is to the right of this point where the output signal reaches the required output power level. Once these elements have been selected and the efficiency, linearity, and power output of the stage 14 has been optimized one would then select element values for the input and output tuned circuits 16, 18 of the driver stage 12. These circuits are comprised of inductors L 5 and L 6 and capacitors C 5 , C 6 , C 9 , and C 10 . The values of these elements are chosen to cause the intermodulation distortion output components associated with the driver stage 12 to be at a 180 o phase angle from the intermodulation distortion output components associated with the high power stage 14. These intermodulation output components of the driver stage 12 will cancel the intermodulation output components in the high power stage 14. This cancellation of intermodulation output components will result in the overall radio frequency power amplification device 10 having a greater linearity and greater efficiency than before. In practice this is accomplished by having the driver stage amplifier initially designed and characterized using the same procedure as the output stage. The family of signal input, output, and intermodulation characteristics for the various tunings and bias condition is determined. The tuning and bias condition selected for the driver state is that which produces the necessary output power with the intermodulation power null to the left of the desired operating point as shown in Fig. 3. Thus, the intermodulation products resulting from the driver stage are in phase opposition to those of the output stage over the operating region. Note the null to the left of the operating point. The resultant operational characteristics of the two stage amplifier is shown in FIG. 4. For power input levels between the two nulls the output intermodulation components of the two stage amplifier will be reduced or eliminated because the associated intermodulation output components of the driver (input) stage and the output stage are of opposite phase in this region of operation as indicated by the "+" and "-" symbols. The following Table I sets forth representative values and descriptions of some of the elements of device 10 that have provided satisfactory results. 1.) Driver Stage Item Description/Value T 2 MRA 0204-60VH C 5 2.6 p.f. C 6 18 p.f. L 5 16 n.h. C 9 71 p.f. C 10 7.5 p.f. L 6 13.5 n.h. 2.) Output Stage T 4 MRT 0204-110V T 5 MRT 0204-110V C 16 18 p.f. C 17 82 p.f. L 7 7 n.h. L 8 7 n.h. C 18 150 p.f. C 19 30 p.f. L 13 13 n.h. L 14 13 n.h. In view of the foregoing, it can be appreciated that the present invention enables the user to achieve high linearity and high efficiency of his multi-stage radio frequency power amplifier device by selecting values for internal components associated with the device.

Claims: A radio frequency power amplifier circuit having a driver stage (12) coupled to a high power stage (14), each stage (12, 14) having intermodulation distortion output components, comprising: circuit means for internally defining the intermodulation distortion components of the output of the driver stage (12) such that said components are 180° out of phase with the intermodulation distortion components of the output of the individual high power stage (14) whereby the intermodulation distortion component outputs of the two stages (12, 14) will subtract from or cancel each other, characterized in that the circuit means comprises two tuned circuits (C 5 /L 5 /C 6 , C 9 /L 6 /C 10 ) connected to a transistor (T 2 ) in the driver stage (12), said tuned circuits (C 5 /L 5 /C 6 , C 9 /L 6 /C 19 ) having elements with values chosen to cause intermodulation component outputs of said driver stage (12) to cancel with intermodulation component outputs of the high power stage (14). The circuit of claim 1, characterized in that the circuit means further comprises: two tuned circuits (C 16 /L 7 /C 17 , C 18 /L 13 /L 14 /C 19 ) connected to at least one transistor (T 4 , T 5 ) in the high power stage (14), said tuned circuits (C 16 /L 7 /L 8 /C 17 , C 18 /L 13 /L 14 /C 19 ) having elements with values chosen to optimize the high power stage (14) for efficiency, linearity, and power output. The circuit of claim 1 or 2, characterized in that said circuit means comprises bipolar transistors (T 1 - T 5 ). The circuit of claim 1 or 2, characterized in that said circuit means comprises FET-transistors. The circuit of any of claims 2 through 4, characterized in that said tuned circuits (C 5 /L 5 /C 6 , C 9 /L 6 /C 10 ; C 16 /L 7 /L 8 /C 17 , C 18 /L 13 /L 14 /C 19 ) each comprises an inductive capacitive network. The circuit of any of claims 1 through 5, characterized in that said high power stage (14) comprises a push-pull amplifier (T 4 , T 5 ). The circuit of any of claims 1 through 6, characterized in that said driver stage (12) and said high power stage (14) of said radio frequency amplifier (10) are connected together by means of a circulator device (20). The circuit of any of claims 1 through 7, characterized by hybrid circuit means (H 2 ) connected to the output of said high power stage (14) to convert an output signal of said high power stage (14) from balanced to single ended and, hybrid circuit means (H 1 ) connected to the input of said high power stage (14) to balance the input signal. The circuit of any of claims 2 through 8, characterized by biasing means (R 1 /C 1 /R 2 /T 1 /C 2 /L 1 /C 3 /L 3 /L 2 /C 7 /L 4 /C 8 ) connected to the transistor (T 2 ) for biasing the transistor (T 2 ). The circuit of any of claims 1 through 9, characterized by capacitive circuit means (C 4 , C 11 ) connected to the input and to the output of the driver stage (12) to block direct current. The circuit of any of claims 1 through 10, characterized by capacitive circuit means (C 12 , C 22 ) connected to the input and to the output of the high power stage (14) to block direct current. The circuit of any of claims 6 through 11, wherein said push-pull amplifier (T 4 , T 5 ) is a dual transistor push-pull amplifier circuit (T 4 , T 5 ), characterized by biasing means (R 4 /C 13 /R 5 /T 3 /R 6 /C 14 /L 15 /C 15 /L 9 /L 10 /C 20 /L 16 /C 21 /L 11 /L 12 ) for biasing the transistor (T 4 , T 5 ) in the dual transistor push-pull amplifier circuit (T 4 /T 5 ) . A method of combining a driver state (12) and a high power state (14) of a multistage solid state radio frequency power amplifier (10) together in order to eliminate intermodulation components which are attributable to the outputs of each of the individual stages (12, 14), comprising the following step: tuning the driver stage (12) such that the intermodulation components which are produced are of an alternate phase angle than the intermodulation components produced in the individual high power stage (14) such that the intermodulation output components of the stages (12, 14) will subtract from each other or cancel, characterized by the step of tuning the high power stage (14) for efficiency, linearity and power output, wherein said driver stage (12) includes at least one transistor (T 2 ), with an input and output tuned circuit (16, 18) connected thereto, and wherein the step of tuning the driver stage includes the selection of element values for said input tuned circuit (16) of the driver stage (12) and values for said output tuned circuit (18) of the driver stage (12) in order to cause the phase angles of the intermodulation distortion output components associated with said driver stage (12) to be at a 180° angle relative to the distortion output components of the individual high power stage (14). The method of claim 13, characterized in that said high power stage (14) includes at least one transistor (T 4 , T 5 ) with an input and an output tuned circuit (22, 24) connected thereto. The method of claim 14, characterized in that said step (a) includes selecting element values of said input and output tuned circuits (22, 24) in order to optimize the efficiency, linearity and power output of said high power stage (14).

Inventors: BERMAN ARNOLD L, HAHN CARL J III, WACHS MARVIN R, BERMAN, ARNOLD L., HAHN, CARL J., III, WACHS, MARVIN R.
Applicants: HUGHES AIRCRAFT CO, HUGHES AIRCRAFT COMPANY
Application year: 1989
Main classification: H03F1
IPC codes: H03F3, H03F1