Method for fabricating multilayer circuits

Abstract: The invention is directed to a method for fabricating multilayer circuits on rigid substrates using conventional dielectric green tape and thick film conductive pastes while maintaining excellent X-Y dimensional stability.

Description: The invention relates to a method for fabricating multilayer circuits using dielectric green tapes to achieve electrical isolation between the layers. An interconnect circuit board is the physical realization of electronic circuits or subsystems from a number of extremely small circuit elements electrically and mechanically interconnected on a substrate. It is frequently desirable to combine these diverse type electronic components in an arrangement so that they can be physically isolated and mounted adjacent one another in a single compact package and electrically connected to each other and/or to common connections extending from the package. Complex electronic circuits generally require that the circuit be constructed of several layers of conductors separated by insulating dielectric layers. The conductive layers are interconnected between levels by electrically conductive pathways through the dielectric called vias. Such a multilayer structure allows a circuit to be more compact. One well known method for constructing a multilayer circuit is by sequentially printing and firing thick film conductors and insulating dielectrics on a rigid insulative substrate such as alumnia. The alumina substrate provides mechanical support and also X-Y dimensional stability and facilitates registration to the patterned thick film conductors and dielectric layers. However, the thick film process has a disadvantage in that printing through a screen mesh can result in pinholes or voids in the dielectric layer which can cause shorting between conductor layers. If a thick film dielectric is formulated to allow sufficient flow of the paste during the printing operation and thus to minimize the tendency to form pinholes, then the maintenance of small vias is likely to be compromised by the flow of dielectric paste into the via hole. Also, the repetitive printing and firing steps for each layer are time consuming and expensive. Another prior art method for constructing multilayer circuits is that of co-firing a multiplicity of ceramic tape dielectrics on which conductors have been printed with metallized vias extending through the dielectric layers to interconnect the various conductor layers. (See Steinberg, U.S. Patent 4,654,095.) These tape layers are stacked in registry and pressed together at a preselected temperature and pressure to form a monolithic structure which is fired at an elevated temperature to drive off the organic binder, sinter the conductive metal and densify the dielectric. This process has the advantage that firing need only be performed once, thus saving fabricating time and labor and limiting the diffusion of mobile metals which could cause shorting between conductors. However, this process has the disadvantage that the amount of shrinkage which occurs on firing may be difficult to control. This dimensional uncertainty is particularly undesirable in large complex circuits and can result in misregistration during subsequent assembly operations. On the other hand, Vitriol and Brown in U.S. Patent 4,645,552 disclose a process for constructing a multilayer circuit on a rigid substrate which is similar to the thick film process described above in the way that circuit layers of conductors and dielectrics are sequentially added to the circuit and fired. The circuit is fabricated on a rigid, dimensionally stable substrate by a sequence of steps such as the following: (a) forming a conductor pattern on a dimensionally stable substrate; (b) forming via holes in a dielectric green tape; (c) laminating the green tape onto the substrate in registry with the conductor patterns; (d) firing the substrate, conductor and green tape; (e) metallizing the top surface of the dielectric tape and filling the vias; and (f) repeating steps (b) and (e) until the multilayer structure is complete. Such a process eliminates some of the disadvantages of the thick film multilayer circuit fabrication process because the risks of pinholes and via closure are eliminated due to the fact that green tape is used as a dielectric insulating layer and mechanically punched vias are employed. However, there is a risk that the flexible tape will be distorted in handling after via formation, which may cause misregistration with the conductor pattern on the substrate. Rellick, in U.S. Patent 4,655,864, discloses a dielectric green tape suitable for lamination onto a rigid substrate. This green tape is used in a process which is similar to the thick film process described above in the way that circuit layers of conductors and dielectric are sequentially added to the circuit and fired. By using a dielectric in tape form, the risk of pinholes and via closure inherent in the thick film process are eliminated. The tape is comprised of glass and refractory oxides dispersed in an organic binder and is especially suitable for laminating onto rigid substrates. The method for forming a multilayer interconnect structure disclosed in this patent, however, also contemplates forming vias in the dielectric tape before lamination with the attendant disadvantages discussed above. FR-A-2 330 246 discloses a method for the fabrication of multilayer circuits comprising the sequential steps of: A) providing a dimensionally stable electrically insulative substrate (reference sign 1 in figure 1); B) applying to this substrate a patterned conductive layer 2, C) firing the patterned conductive layer, D) laminating to the fired patterned conductive layer and exposed areas of the substrate a layer of dielectric green tape 3, E) firing the laminated dielectric green tape layer, F) forming vias 4 in selected positions through the dielectric layer in registration with the patterned conductive layer 2, G) filling the vias in the fired dielectric tape layer with a conductive metallization 5, H) firing the filled vias in the dielectric tape layer, I) applying a patterned conductive layer 6 to the fired dielectric green tape layer in registry with the vias therein, J) firing the patterned conductive layer, and K) in the event the multilayer circuit requires more than two layers having conductive patterns, repeating the sequence of steps D) to J). The general purpose of the invention is to provide a new and improved method for fabricating multilayer circuits using conventional thick film conductive metallizations and dielectric green tapes in such manner that excellent X-Y dimensional stability of the layers is obtained during firing. The method of the invention is comprised of a basic procedure, in which a plurality of alternating thick film conductive layers and laminated dielectric green tape layers containing vias filled with conductive metallization is sequentially fired. In the basic procedure, the method begins by printing a patterned conductive layer onto an electrically insulative substrate. In a first aspect, the invention is directed to a method for the fabrication of multilayer circuits comprising the sequential steps of: (a) providing a dimensionally stable electrically insulative substrate (1), (b) applying to the substrate (1) a patterned conductive layer (2), (c) firing the patterned conductive layer (2), (d) laminating to the fired patterned conductive layer (2) and exposed areas of the substrate (1) a layer of dielectric green tape (3), (e) forming vias (4) in selected positions through the layer of dielectric green tape (3) in registration with the fired patterned conductive layer (2) of step (c), (f) filling the vias (4) in the dielectric green tape layer (3) with a conductive metallization, (g) co-firing the filled vias (4) in the dielectric tape layer (3), (h) applying a patterned conductive layer (5) to the fired dielectric green tape layer (3) in registry with the vias (4) therein, (i) firing the patterned conductive layer (5), and (j) in the event the multilayer circuit requires more than two layers having conductive patterns, repeating the sequence of steps (d) through (i) until the desired number of circuit layers has been obtained. Alternatively, step (g) is eliminated and the dielectric green tape layer (3), via fill metallizations and overlying patterned conductive layer (5) are co-fired in step (i). It will be recognized that in laminating green tape layers to the underlying conductive layers, the green tape is also laminated to at least a selected portion of the underlying substrate, fired tape layers or conductive patterns. This is a function of specific circuit design. Figure illustrates schematically the sequential steps of the above-described invention. One of the many advantages of the method of the invention is that it can be carried out using conventional thick film conductive materials and dielectric green tapes as well as the conventional techniques for applying these materials to the formation of electrical circuitry. Thus the conductive layers or metallizations can be formed from conventional thick film conductive pastes comprised of finely divided particles of conductive metal or metal oxide dispersed in an organic medium having appropriate rheology for screen printing application. Such printable thick film pastes may also contain finely divided particles of inorganic binder. After being printed in an appropriate circuit pattern, the conductive thick film layer is fired to effect volatilization of the organic medium and sintering of the solids components. The intervening insulating (dielectric) layers are formed by laminating in registry with the underlying conductive layers one or more layers of dielectric green tape. Dielectric green tapes are comprised of finely divided dielectric materials such as barium titanate, alumina or glass dispersed in a polymeric matrix which is pyrolyzable when the laminated tape is fired in either an oxidizing or nonoxidizing atmosphere. Upon firing, the polymeric matrix is pyrolyzed (burned out) and the dielectric material is sintered and/or densified. Such thick film conductor compositions and dielectric green tapes and the methods of applying them are well known in the electronic materials art. Most frequently, the inorganic substrates used for the invention will be electrically insulative ceramic materials such as alumina and beryllia. A conditio sine qua non of all substrate materials to be used in the invention is that they must be rigid when formed into thin layers (e.g., 600 microns) and they must be dimensionally stable. That is, they should not undergo any substantial degree of bowing when they are fired and, most importantly, they must possess extreme stability in the X-Y plane. Most frequently, the substrates used for the invention will be made from electrically insulative ceramic materials such as alumina. However, in some instances, substrates can be used which are made from heat-conductive metals or from ceramic-coated metals such as porcelainized steel. Vias in the green tape layers can be filled by either two methods. In one technique, the vias are filled by screen printing a thick film conductive paste directly into the vias. In another method, the vias are filled during screen printing of an overlying conductive layer by flow of the thick film layer into the vias. The method of the invention can be used to prepare multilayer circuits containing, for example, 15-20 conductive layers. Green tapes will usually have thicknesses of from about 50 to 400 microns. Referring now to Figure 1 of the drawing, in step (a), a rigid ceramic substrate 1 made from alumina is provided. In step (b), a patterned conductive layer 2 is provided by screen printing a conductive thick film paste onto the surface of the substrate, and in step (c) it is fired in air at 850°C. Following application and firing of the conductive layer, a layer of dielectric green tape 3 is laminated over the patterned conductive layer 2 and exposed areas of the substrate at a temperature of 50°C and a pressure of 4,1 MPa (600 psi) for about 10 minutes. In step (e), vias 4 are formed in the green tape 3 by ablation with a laser beam. The vias 4 in the dielectric tape 3 are filled with a conductive metallization in step (f) and co-fired in step (g). In step (h), a patterned thick film conductive layer 5 is screen printed in registry with the fired vias 4 in the underlying dielectric layer 3 and the conductive layer is fired [step (i)]. When steps (d) through (i) are repeated one time, a multilayer element having three separate conductive layers is formed as shown in the figure [step (j)]. Alternatively, step (g) can be eliminated so as to co-fire the via fill metallization with the conductor layer above it in step (i). During the firing steps, the organic medium from the thick film paste or the polymeric binder from the ceramic green tape is removed by volatilization and the inorganic binder and alumina in the tape are sintered. Using this process, vias are formed in the green tape when the tape is firmly adhered to a rigid substrate, thus preventing flexing and stretching of the tape during the via formation process and improving accuracy of via placement relative to underlying conductor lines. Furthermore, with via formation occurring after the tape dielectric has been laminated to the substrate, the risk of distorting of the via holes during the lamination process is eliminated. Via formation after the tape is laminated can be accomplished by such processes as laser ablation or mechanical trepanning.

Claims: A method for the fabrication of multilayer circuits comprising the sequential steps of: (a) providing a dimensionally stable electrically insulative substrate (1), (b) applying to the substrate (1) a patterned conductive layer (2), (c) firing the patterned conductive layer (2), (d) laminating to the fired patterned conductive layer (2) and exposed areas of the substrate (1) a layer of dielectric green tape (3), (e) forming vias (4) in selected positions through the layer of dielectric green tape (3) in registration with the fired patterned conductive layer (2) of step (c), (f) filling the vias (4) in the dielectric green tape layer (3) with a conductive metallization, (g) co-firing the filled vias (4) in the dielectric tape layer (3), (h) applying a patterned conductive layer (5) to the fired dielectric green tape layer (3) in registry with the vias (4) therein, (i) firing the patterned conductive layer (5), and (j) in the event the multilayer circuit requires more than two layers having conductive patterns, repeating the sequence of steps (d) through (i) until the desired number of circuit layers has been obtained. The method of claim 1 in which step (g) is eliminated and the dielectric green tape layer (3), via fill metallizations and overlying patterned conductive layer (5) are co-fired in step (i).

Inventors: RELLICK JOSEPH RICHARD, RELLICK, JOSEPH RICHARD
Applicants: DU PONT, E.I. DU PONT DE NEMOURS & COMPANY INCORPORATED
Application year: 1989
Main classification: H01L21
IPC codes: H05K3, H01L21, H05K1