FM tuner having phase locked loop FM demodulation circuit

Abstract: An FM tuner including an PLLFM demodulation circuit (13a) is disclosed, which selectively employs one of two BPFs (7, 8) with different extraction bandwidths as IFBPF. This FM tuner is configured such that by employing a relationship between a lock range and an input signal level of the PLLFM demodulation circuit (13a), an optimum value of the lock range of the demodulation circuit (13a) is set for a bandwidth of an input signal, even if any of the BPFs (7, 8) is selected. When the BPF (8) with a narrower bandwidth is selected as the IFBPF, a signal to be inputted to the PLLFM demodulation circuit (13a) is attenuated to decrease the level of the input signal of the demodulation circuit (13a) lower than that when the other BPF (7) with a larger bandwidth is selected as the IFBPF, thereby reducing a lock range width of the PLLFM demodulation circuit (13a).

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates generally to FM (frequency modulation) tuners including PLLFM demodulation circuits employing a PLL (Phase Locked Loop), and more particularly, to an FM tuner having bandpass filters of an intermediate frequency stage with variable extraction bandwidths. Description of the Background Art A receiver for television and radio broadcasting includes a tuner for selecting a desired transmission to demodulate a transmitted signal by being tuned in to a carrier frequency thereof. Particularly, an FM tuner included in a receiver for receiving FM broadcasting generally includes a high frequency amplifying circuit portion comprising a high frequency amplifier for amplifying a received FM signal of a high frequency, and a mixer for converting a frequency band of the FM signal amplified by the high frequency amplifier into an IF (an intermediate frequency band) based on an oscillation frequency of a local oscillator. The FM tuner further includes BPFs (Band-pass Filters) for extracting a predetermined band component from the FM signal frequency-converted in the mixer, an IF amplifying portion for amplifying the FM signal of the band extracted by the BPF to a fixed level, and an FM demodulation circuit for demodulating the FM signal amplified by the IF amplifying portion. A so-called PLLFM demodulation circuit employing the PLL is widely used as the FM demodulation circuit. The PLL is employed for a precise frequency follow. Fig. 1 is a schematic block diagram of the PLL. Referring to this figure, the PLL is a closed loop comprising a phase comparator 100, an LPF (Low Pass Filter) 101 and a VCO (Voltage Controlled Oscillator) 102. The VCO is an oscillator having its oscillation frequency varied in accordance with an input voltage. An operation of the PLL will now be described. In the case that a frequency of an output f₀ of the VCO 102 coincides with that of an input wave f₁, and a predetermined relationship is established between a phase of the output f₀ of the VCO 102 and that of the input wave f₁, the frequency of the output f₀ is stable because of no change in an output of the LPF 101. However, an output of the phase comparator 100 changes with a change in the input wave f₁ and is filtered by the LPF 101 to be outputted as a control voltage of the VCO 102. Accordingly, the frequency of the output f₀ of the VCO 102 changes and coincides again with that of the input wave f₁ to be stable. That is, an input frequency is locked in the PLL. Therefore, the output of the LPF 101, i.e., the control voltage of the VCO 102 changes in accordance with the change in the frequency of the input f₁ of the PLL. Thus, an FM signal to be demodulated is inputted to the PLL as the input wave f₁, so that the control voltage of the VCO is derived as an FM detected output, in the PLLFM demodulator. The PLL cannot perform such a lock operation as above for input waves of all the frequencies. That is, the PLL has a so-called lock range, namely, a specific input frequency range, in which while the PLL is stable, namely, at a phase locked state that the frequency of the input wave is equivalent to that of an output wave, the phase locked state can be maintained even with a moderate change in the frequency of the input wave. The lock range of the PLL is determined by characteristics of the phase comparator, the LPF, the VCO or the like included in the PLL. Therefore, the PLLFM demodulation circuit employing the PLL has the lock range determined by characteristics of the phase comparator, the LPF, the VCO or the like included therein, and thus if the frequency of an input signal is within this lock range, the VCO in the PLL operates in accordance with an instantaneous frequency of the input signal, so that FM demodulation is carried out. However, if the frequency of the input signal is out of the lock range, the VCO in the PLL does not follow the instantaneous frequency of the input signal, so that the FM demodulation is not carried out. That is, the PLLFM demodulation circuit serves as a filter for selectively demodulating only those of input signals, of which frequencies are within the lock range. Thus, the lock range of the PLLFM demodulation circuit in the FM tuner is set to an optimum value for a bandwidth of the BPF at the IF stage so that unnecessary frequency components and noise are removed from the input signals to the PLLFM demodulation circuit by this filter function. In the FM tuner having the PLLFM demodulation circuit as described above, the bandwidth BW of the BPF provided at a preceding stage of the IF amplifying portion (hereinafter referred to as IFBPF) is set to aim Carson band W (= 2·f m + Δf + f′) determined by a maximum modulation frequency f m , a frequency deviation Δf and an energy diffusion signal frequency f′ of an FM signal to be inputted, in order to extract a band in which electric power of the FM signal is substantially concentrated. Therefore, the bandwidth of the IFBPFs varies depending on an FM signal to be transmitted to the FM tuner including the IFBPFs. Accordingly, one of the FM tuners which receive various kinds of FM signals having different maximum modulation frequencies, frequency deviations Δf and energy diffusion frequencies f′, is configured such that the bandwidth of the IFBPFs can be switched in accordance with the frequency of a received signal. Since, in a broadcast frequency of a satellite broadcast having been in greater use, for example, a signal is transmitted as an FM signal with its maximum modulation frequency fm, frequency deviation Δf, energy diffusion frequency f′ and the like varying depending on the type of a transponder installed in a communication satellite, a DBS (Direct Broadcast Satellite) tuner for receiving the satellite broadcast includes a plurality of BPFs having different bandwidths as the IFBPFs. The BPF to be employed is switched to another in accordance with the received signal. However, due to a problem concerning the cost, in a conventional FM tuner with the IFBPFs having variable bandwidths, the lock range of the PLL demodulation circuit is set to an optimum value for the bandwidth of one of the BPFs, which is especially associated with performance of the FM tuner. In the case of such an FM tuner that the bandwidth of the IFBPFs can be switched to 30MHz and to 15MHz, for example, the lock range of the PLL demodulation circuit can only be set to an optimum value corresponding to one of the bandwidths of the BPFs, i.e., 15MHZ or 30MHz, thereby causing the following problems. Fig. 2 is a schematic diagram for illustrating disadvantages of the conventional FM tuner including the PLLFM demodulation circuit as described above. Referring to this figure, in case that the lock range of the PLLFM demodulation circuit is optimized for the bandwidth 30MHz of the IFBPFs to be set to the frequency f₂ to f₃, for example, the lock range of the PLLFM demodulation circuit does not attain an optimum value because it is too large for the bandwidth of the IFBPFs when the bandwidth of the IFBPFs is switched to 15MHz. In detail, the optimum value of the lock range of the PLL demodulation circuit should be f₂ to f₃ in the bandwidth of 30 MHz and be f₄ and f₅ in the bandwidth of 15 MHZ. In the case that the lock range of the circuit is optimized for the larger bandwidth (30 MHz), and the bandwidth of the IFBPFs is switched to the smaller value at this time, unnecessary signals of f₂ to f₄ and of f₅ to f₃ are demodulated by the PLL demodulator. Therefore, if the lock range of the PLLFM demodulation circuit is optimized for the larger bandwidth of the IFBPFs, the lock range is too large for the bandwidth of the input signal (the bandwidth of the IFBPF) when the bandwidth of the IFBPFs is switched to the smaller one. Accordingly, the PLLFM demodulation circuit no longer serves as a filter, and thus becomes susceptible to such as noise and to interference due to a signal of an adjacent channel. In order to eliminate these problems, it is necessary to make signals and noises of unrequired frequency components included as low as possible in the FM signal to be outputted from the IFBPFs. To fill this requirement, a filter needs to be employed as the IFBPF, which has such a characteristic that a gain for an input signal shows an extremely sharp decrease when the frequency of the input signal drops out of the bandwidth to be extracted. However, the use of such a filter with a superior characteristic causes an increase in cost. Again referring to Fig. 2, in the case that the lock range of the PLLFM demodulation circuit is optimized for the bandwidth 15MHz of the IFBPFs to be set to the frequency f₄ to f₅, for example, contrary to the above case, there is no problem as in the above case when the bandwidth of the IFBPFs is selected to 15MHz; however, when the bandwidth is selected to 30MHz, the lock range of the PLLFM demodulation circuit does not attain an optimum value because it is too narrow for the bandwidth of the input signal. If the lock range is extremely too narrow for this bandwidth, it sometimes becomes narrower than the bandwidth of the IFBPFs. In further detail, if the lock range of the PLLFM demodulation circuit is too narrow for the bandwidth 30MHz of the IFBPFs, a portion of the signal components extracted by the IFBPFs is not demodulated because it is out of the lock range of the PLLFM demodulation circuit. Accordingly, in this case, the same phenomenon occurs as in the case that the bandwidth of the IFBPFs is narrower than an optimum value corresponding to a received signal, namely, the above described Carson band, and thus even necessary signal components are removed in the IFBPFs. That is, due to an inadequate bandwidth of the IFBPFs, so-called truncation noise occurs in a demodulated signal. This noise is caused by distortion occurring in the modulated signal because a portion of the signal components required for demodulation with no distortion occurring in the modulation circuit is not demodulated in the demodulation circuit. If the FM signal to be demodulated is a video signal, the truncation noise appears, as a noise, on a picture to be reproduced by the demodulated signal, thereby degrading the quality of the reproduced picture. Thus, in the case that the lock range of the PLLFM demodulation circuit is optimized for the narrower bandwidth of the IFBPF, the lock range is too narrow for the bandwidth of the input signal (the bandwidth of the IFBPFs) when the bandwidth of the IFBPFs is selected to the larger one, thus resulting in occurrence of the truncation noise. As has been described, in the conventional FM tuner having the IFBPFs with a variable bandwidth, it is impossible to optimize the lock range of the PLLFM demodulation circuit for all the bandwidths of the IFBPFs without introducing a high cost. SUMMARY OF THE INVENTION It is an object of the present invention to provide an FM tuner capable of accurately demodulating each of a plurality of FM signals with different Carson bands. It is another object of the present invention to provide an FM tuner capable of reducing noise included in demodulated signals. It is a further object of the present invention to provide an FM tuner including an IFBPF having a variable bandwidth and a PLLFM demodulation circuit, being able to set an optimum lock range of the PLLFM demodulation circuit for each of all the bandwidths of the IFBPF. It is a still further object of the present invention to provide an FM tuner, without introducing a high cost, which includes an IFBPF having a variable bandwidth and a PLLFM demodulation circuit, and is able to set an optimum lock range of the PLLFM demodulation circuit for all the bandwidths of the IFBPF. The present invention is defined by claim 1. The features of the preamble of claim 1 are known from US-A-3 346 815. In the FM tuner including the PLLFM demodulation circuit according to the present invention, a lock range width of the phase locked loop of the demodulating means is not fixed as in the conventional tuner, but is selected to an optimum value corresponding to the bandwidth of the signal extracted by the filter means. According to a preferred embodiment, the filter means comprises a plurality of bandpass filters for extracting the signals with different bandwidths, and selecting means for selecting one of the plurality of bandpass filters. According to a preferred embodiment, the lock range means comprises input signal level switching means for switching the level of an input signal to be transmitted to the PLL demodulating means in accordance with the bandwidth of the bandpass filter selected by the selecting means. In general, the lock range of the phase locked loop of the PLL demodulating means changes depending on the level of the input signal to be applied to the PLL demodulating means. Therefore, according to the described preferred embodiment in which the level of the input signal to be applied to the PLL demodulating means is switched depending on which one of the plurality of bandpass filters is selected, it is possible to select the lock range of the phase locked loop of the demodulating means in accordance with the bandwidth of the selected bandpass filter. According to a preferred embodiment, the input signal level switching means comprises a first path for transmitting therethrough an FM signal with a bandwidth extracted by the filter means directly to the PLL demodulating means, a second path for attenuating or amplifying the FM signal with the bandwidth extracted by the filter means and transmitting the attenuated or amplified FM signal to the PLL demodulating means, and means responsive to a selecting signal from the selecting means for enabling either the first path or the second path. The second path may comprise an attenuator or an amplifier, both implemented in simple circuit configurations which are conventionally known. Therefore, according to the above preferred embodiment employing the attenuating or the amplifying second path, it is possible to select the lock range of the phase locked loop of the PLL demodulating means in accordance with the bandwidth of the selected bandpass filter merely by addition of the input signal level switching means of a simple circuit configuration to the conventional FM tuner including the PLLFM demodulation circuit. According to a preferred embodiment, the PLL demodulating means comprises a phase comparator, a voltage controlled oscillator, and a loop filter provided between an output of the phase comparator and an input of the voltage controlled oscillator. According to a preferred embodiment, the lock range means comprises gain control means for switching a gain of the loop filter in accordance with the selected bandwidth of the filter means. In general, the lock range of the phase locked loop of the PLL demodulating means varies with a loop gain thereof, which generally also depends on the gain of the loop filter for outputting a control voltage of the voltage controlled oscillator. Therefore, even according to the above preferred embodiment in which the gain of the loop filter is changed in accordance with the selected bandwidth of the filter means, it is possible to select the lock range of the phase locked loop of the PLL demodulating means in accordance with the selected bandwidth of the filter means. According to a preferred embodiment, an FM tuner according to the present invention further comprises: amplifying/converting means for amplifying an FM signal and converting the band of the amplified signal from a high frequency band into an intermediate frequency band; the filter means comprising a first filter for extracting a first bandwidth portion from the FM signal converted into the intermediate frequency band by the amplifying/converting means, second filter means for extracting a second bandwidth portion with a bandwidth narrower than that of the first bandwidth portion from the FM signal converted into the intermediate frequency band by the amplifying/converting means, and selecting means for selecting the first filter or the second filter; the PLL demodulating means comprising a phase locked look having a lock range optimized for the bandwidth of the first bandwidth portion, for demodulating an FM signal by employing this phase locked loop; and the lock range means comprising means for applying the first bandwidth portion to the PLL demodulating means while the first filter is being selected by the selecting means, and for attenuating the second bandwidth portion so that the lock range of the phase locked loop is optimized for the bandwidth of the second bandwidth portion, and applying the attenuated second bandwidth portion to the PLL demodulating means while the second filter is being selected by the selecting means. According to this tuner, the lock range of the phase locked loop of the PLL demodulating means is optimized for the selected bandwidth of the filter means, either when the second filter with the narrower bandwidth is selected by the selecting means or when the first filter with the wider bandwidth is selected. According to the present invention, since the lock range of the PLLFM modulation circuit is always set to an optimum value for all the bandwidths of the IFBPF, the problems which has arisen in the conventional tuner including the PLLFM demodulation circuit for switching only the IFBPF are reduced, that is, noise caused by signals of the bands not to be demodulated, influence of the interfering radiowaves and truncation noise. According to a preferred embodiment, the lock range means includes means for signal level control in the signal path to the demodulating means or within the demodulating means itself. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram illustrating a configuration of a PLL; Fig. 2 is a diagram illustrating disadvantages in a conventional FM tuner including a PLLFM demodulation circuit; Fig. 3 is a schematic block diagram of an FM tuner according to one embodiment of the present invention; Fig. 4 is a graph illustrating a relationship between an input signal level and a lock range of a PLLFM demodulation circuit; Fig. 5 is a graph illustrating a relationship between the input signal level and a lock range width of the PLLFM demodulation circuit; Fig. 6 is a circuit diagram illustrating a detailed example of an input signal level switching circuit in Fig. 3; Fig. 7 is a schematic block diagram of an FM tuner according to another embodiment of the present invention; and Fig. 8 is a circuit diagram illustrating a detailed example of a loop filter in Fig. 7. DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in detail with reference to the figures. Fig. 3 is a schematic block diagram of an FM tuner according to an embodiment of the present invention. Referring to this figure, this FM tuner comprises a high frequency amplifying circuit portion being the same as the conventional one, which comprises an input terminal 1 for receiving a high frequency FM signal of a satellite broadcast or the like received through an antenna (not shown), a first high frequency amplifier 2, a BPF 3, a second high frequency amplifier 4, a mixer 5, and a local oscillator 6, which are connected to the input terminal 1. This FM tuner further comprises first and second IFBPFs 7 and 8 for extracting a predetermined band component from an output of the mixer 5, first and second IF amplifiers 9 and 11 for amplifying outputs of the IFBPFs 7 and 8, a PLLFM demodulation circuit 13a for demodulating an FM signal to be outputted from the IF amplifier 11, and an FM detection output terminal 14 supplied with a signal demodulated by the PLLFM demodulation circuit 13a (an FM detected output). A demodulated signal provided to the FM detection output terminal 14 is applied to a video terminal and an audio terminal of a home TV or the like (not shown) via a signal processing circuit portion (not shown) such as of a de-emphasis circuit. The first and second IFBPFs 7 and 8 are provided between an output of the mixer 5 and an input of the first IF amplifier 9 through switches SW₁ and SW₂. The switches SW₁ and SW₂ are controlled by a control signal to be applied to a control terminal 10 which will be described later, and selectively connect the IFBPF 7 or 8 between the mixer 5 and the first IF amplifier 9. The IFBPF 8 extracts a signal with a frequency range narrower than the frequency range extracted by the IFBPF 7, with a frequency approximately equal to a center frequency of a band component extracted by the IFBPF 7 employed as a center frequency. That is, an extracting bandwidth wb of the IFBPF 8 is narrower than that of the IFBPF 7, wa. Therefore, the bandwidths of the IFBPFs are selectable in accordance with operation of the switches SW₁ and SW₂. This FM tuner further comprises an AGC (Automatic Gain Control) detection circuit 12 and a comparator 17, which are usually provided to make constant the level of an FM signal to be inputted to the demodulation circuit. The level of a portion of a signal amplified by the second IF amplifier 11 is detected by the AGC detection circuit 12 and compared with a predetermined reference voltage Ref in the comparator 17. If the level of a detection output level of the AGC detection circuit 12 is lower than the reference voltage Ref, the comparator 17 operates to increase a gain of the first IF amplifier 9. Conversely, if the level of the detection output of the AGC detection circuit 12 is higher than the reference voltage Ref, the comparator 17 operates to decrease the gain of the first IF amplifier 9. As a result, the level of the FM signal amplified by the first and second IF amplifiers is kept constant. That is, the level of the FM signal to be demodulated by the PLLFM demodulation circuit 13a is determined by the reference voltage Ref of the comparator 17. Switching of the switches SW₁ and SW₂ is carried out via an external switch not shown. In detail, the control terminal 10 is connected to the external switch via a control portion (not shown) of a microcomputer or the like, so that when a user selects the external switch, in response to this selection, a control signal for determining a connection state in the switches SW₁ and SW₂ is inputted from the control portion to the control terminal 10. The foregoing configuration is the same as that of the conventional FM tuner including the PLLFM demodulation circuit. However, unlike the conventional one, this FM tuner comprises an input signal level switching circuit 15 as a significant feature of the present embodiments of the invention, which is provided between the second IF amplifier 11 and the PLLFM demodulation circuit 13a. The input signal level switching circuit 15, which serves to change the level of an input signal to be applied to the PLLFM demodulation circuit 13a, comprises an attenuator 16 and switches SW₃ and SW₄ for performing a switching operation ganged with the above switches SW₁ and SW₂ in response to the control signal from the control terminal 10. The switches SW₃ and SW₄ connect an output of the second IF amplifier 11 directly to or via the attenuator 16 to the PLLFM demodulation circuit 13a. The level of the FM signal to be demodulated by the PLLFM demodulation circuit 13a, which is determined by the reference voltage Ref in the comparator 17, is set in accordance with a lock range of the PLLFM demodulation circuit 13a. This is due to the fact that the lock range of the PLLFM demodulation circuit varies depending on the level of an input signal. Fig. 4 is a graph illustrating a relationship between the input signal level and the lock range of the PLLFM demodulation circuit. As shown in this figure, the lock range of the PLLFM demodulation circuit changes depending on the input signal level thereof, and thus the higher is the input signal level , the larger is the lock range with respect to a center frequency, while the lower is the input signal level, the smaller is the lock range with respect to the center frequency. Fig. 5 is a graph illustrating a relationship between the input signal level and a lock range width of the PLLFM demodulation circuit 13a. As can be seen from the figure, the lock range width increases in proportion to an increase in the input signal level. Symbols A and B in this figure represent optimum lock ranges of the PLLFM demodulation circuit 13a for the respective bandwidths of the IFBPFs 7 and 8 in Fig. 3, while symbols a′ and b′ represent the input signal levels of the PLLFM demodulation circuit 13a corresponding to the respective optimum lock ranges A and B thereof for the respective bandwidths of the IFBPFs 7 and 8. In this embodiment, an output signal level of the second IF amplifier 11 is set to an input signal level of the PLLFM demodulation circuit 13a, which corresponds to an optimum lock range width of the modulation circuit 13a for a band extracted by the IFBPF 7 with the larger bandwidth. Meanwhile, attenuation of the attenuator 16 is set to such a value that the output signal level of the second IF amplifier 11 is attenuated to the input signal level of the PLLFM demodulation circuit 13a, corresponding to the optimum lock range width thereof for a band extracted by the IFBPF 8 with the narrower bandwidth. That is to say, in this embodiment, the output signal level of the second IF amplifier 11 is set to the level a′ in Fig. 5, and the attenuator 1b is set to attenuate an applied signal by a difference X between the input signal levels a′ and b′ in Fig. 5. Since the FM tuner of this embodiment has such configuration as above, the FM signal which is received through the antenna and provided to the input terminal 1 is amplified, similarly to the conventional one, by the first high frequency amplifier 2, the BPF 3 and the second high frequency amplifier 4, and then converted in frequency by the mixer 5 and the local oscillator 6 to have a portion of band components thereof extracted by the IFBPF 7 or 8. Further, the FM signal of the band extracted by the IFBPF 7 or 8 is amplified to a fixed level by the first and second IF amplifiers 9 and 11, and then, unlike the conventional one, inputted to the PLLFM demodulation circuit 13a via the input signal level switching circuit 15. The PLLFM demodulation circuit 13a demodulates only a band component within the lock range at this point, out of the applied FM signal, and provides the demodulated component to the FM detection output terminal 14. A detailed description will be given on the internal connection state of the switches SW₁-SW₄ and on the operation of this FM tuner. First of all, the control signal applied to the control terminal 10 causes the internal connection state of the switches SW₁ and SW₂ to be set so that the IFBPF 7 with the larger bandwidth wa is connected between the mixer 5 and the first IF amplifier 9. Ganged with this setting, the internal connection state of the switches SW₃ and SW₄ is set so as to connect an output of the second intermediate frequency amplifier 11 directly to an input terminal of the PLLFM demodulation circuit 13a (in the case that the internal connection state of the switches SW₁-SW₄ is denoted with the solid line in the figure). The lock range of the PLLFM demodulation circuit 13a is now already optimized for a bandwidth wa of the IFBPF 7. Therefore, since the lock range of the PLLFM demodulation circuit 13a is optimized for a bandwidth of the FM signal to actually be inputted to the PLLFM demodulation circuit 13a, in this case, demodulation is performed under preferable conditions. On the other hand, the control signal applied to the control terminal 10 causes the internal connection state of the switches SW₁ and SW₂ to be set so that the IFBPF 8 with the narrower bandwidth wb is connected between the mixer 5 and the first IF amplifier 9. Ganged with this, the internal connection state of the switches SW₃ and SW₄ is set so that the attenuator 16 is connected between the second IF amplifier 11 and the PLLFM demodulation circuit 13a (in the case that the internal connection state of the switches SW₁-SW₄ is denoted with the broken line in the figure). At this time, the bandwidth wb of the IFBPF 8 is selected as a bandwidth of a signal to be applied to the PLLFM demodulation circuit 13a by the switches SW₁ and SW₂. Since the bandwidth wb of the IFBPF 8 is here set to be smaller than that wa of the IFBPF 7, the lock range width of the PLLFM demodulation circuit 13a at this time needs to be set to the value (indicated by the designation B in Fig. 5) smaller than the value (indicated by the designation A in Fig. 5)when the bandwidth wa of the IFBPF 7 is selected. That is, in the case that the filter to determine the bandwidth of the input signal of the modulation circuit 13a is switched from the IFBPF 7 to the IFBPF 8, the level of the signal to actually be inputted to the modulation circuit 13a should also change from the value a′ to b′ in Fig. 5, depending on the change in the optimum lock range of the modulation circuit 13a. Meanwhile, the switches SW₃ and SW₄ at this time cause the output signal of the second IF amplifier 11 to be inputted via the attenuator 16 to the PLLFM demodulation circuit 13a. The attenuator 16 is here set to attenuate by the difference X in Fig. 5, the signal to be inputted to the PLLFM demodulation circuit 13a, i.e., the level of the output signal of the second IF amplifier 11. Therefore, in the case that the bandwidth of the signal to be inputted to the modulation circuit 13a is switched to the bandwidth of the IFBPF 8, the level of the signal to be inputted to the modulation circuit 13a from the attenuator 16 is attenuated from the value a′ to b′ shown in Fig. 5. Thus, the lock range of the PLLFM demodulation circuit 13a is also optimized for the bandwidth of the FM signal to actually be inputted to the modulation circuit 13a, so that demodulation is still carried out under the preferable conditions. Fig. 6 is a circuit diagram illustrating one example of the detailed configuration of the input signal level switching circuit 15, performing the above described functions. Referring to this figure, the control signal applied to the control terminal 10 is applied to the cathodes of diodes D1 and D2 via a resistor R5, to the anode of a diode D3 via a resistor R6, and to the anode of a diode D4 via a resistor R7. When the control signal is at the low level, the diodes D1 and D2 are rendered conductive, while the diodes D3 and D4 are rendered non conductive. Therefore, an output of the second IF amplifier 11 inputted to the connecting point of the resistors R1 and R2 provided between a voltage supply V c and the ground is, in this case, inputted as it is, from the connecting point of the resistors R3 and R4 to the PLLFM demodulation circuit 13a via the diodes D1 and D2. Conversely, when the control signal is at the high level, the diodes D1 and D2 are rendered non-conductive, while the diodes D3 and D4 are rendered conductive. Therefore, in this case, the output of the second IF amplifier 11 is inputted to the connecting point of resistors R8 and R9 constituting the attenuator 16 via the diode D3 and a capacitor C1, and is taken out from the connecting point of the resistors R8 and R10 constituting the attenuator 16. That is, the output of the second IF amplifier 11 is divided in voltage by the resistors R8 and R10 to be attenuated. An output of the attenuator 16 is inputted to the PLLFM demodulation circuit 13a via a capacitor C2 and the diode D4. According to the input signal level switching circuit with the above described configuration, the level of the input signal of the PLLFM demodulation circuit 13a is switched to 2 values depending on the level of the control signal applied to the control terminal 10. Therefore, in the case of employing the input signal level switching circuit with the above configuration as the input signal level switching circuit 15 in Fig. 3, the switches SW₁ and SW₂ in Fig. 3 are also configured to operate by receiving direct current potentials of the low level (e.g., the ground potential) and of the high level (e.g., the potential of the voltage supply V c ), as a control signal. In general, the switches SW₁ and SW₂ also employ elements such as a relay and a diode controllable by a direct current voltage. According to this embodiment as described above, even if the optimal lock range width of the PLLFM demodulation circuit is designed for the bandwidth of the input signal when the larger bandwidth of the IFBPF is selected, the lock range width of the modulation circuit becomes smaller due to performance of the attenuator when the narrower bandwidth of the IFBPF is selected. Thus, the lock range width is automatically switched to an optimum value for the bandwidth of the input signal to be applied to the modulation circuit at this time. Although the above described embodiment is concerned with the case of switching the bandwidth of the IFBPF to two stages, the described embodiments are also applicable to the case of switching the bandwidth to three or more stages. That is, in such case, the input signal level switching circuit may comprise a plurality of attenuators (corresponding to the number of the bandwidths of the IFBPFs in detail) with different attenuations, for example, thereby selectively switching any of these attenuators in accordance with the bandwidth of the selected IFBPF to connect a selected one of the attenuators between an input terminal of the PLLFM demodulation circuit and an output terminal of the second IF amplifier. As a matter of course, the respective attenuations of these attenuators should be set so as to optimize the lock range of the PLLFM demodulation circuit for the respective bandwidths of the IFBPFs to be selected, thereby to change the level of the signal to be inputted to the modulation circuit. Moreover, the plurality of attenuators may be replaced with a single attenuator with variable attenuation. If employing the fact that the lock range of the PLLFM demodulation circuit changes depending on the input signal level as described above, the lock range width of the PLLFM demodulation circuit can always be kept at the optimum value for the bandwidth of the input signal to be inputted to the modulation circuit in spite of the switching in the bandwidths of the IFBPFs, by changing the input signal level of the modulation circuit so that the lock range of the modulation circuit is optimized for the bandwidth of the selected IFBPF. In the embodiment shown in Fig. 3, the output level of the second IF amplifier is set so that the lock range of the PLLFM demodulation circuit is optimized for the output of the IFBPF with the larger bandwidth; however, it may also be set so that the lock range is optimized for the output of the other IFBPF with the narrower bandwidth. In this case, the reference voltage Ref of the comparator 17 may be set so that the output level of the second IF amplifier 11 in Fig. 3 becomes equal to the level b′ in Fig. 5, and the attenuator may be replaced by an amplifier for amplifying the input signal level by the difference X in Fig. 5, as means for changing the level of the input signal to be applied to the PLLFM demodulation circuit 13a. That is, when the IFBPF with the narrower bandwidth is selected, the input signal level switching circuit transmits an output of the second IF amplifier to the PLL demodulation circuit as it is. Conversely, when the IFBPF with the larger bandwidth is selected, the output of the second IF amplifier is amplified by the difference X by an amplifier in the input signal level switching circuit and then transmitted to the demodulation circuit. All the described Embodiments utilize the fact that the lock range width of the PLLFM demodulation circuit changes depending on the input signal level thereof. In general, the lock range width of the PLLFM demodulation circuit increases as the loop gain of the PLL constituting the demodulation circuit increases. The loop gain of the PLL also depends on the gain of the low pass filter (see Fig. 1) included therein. Therefore, it is possible to change the lock range of the PLLFM demodulation circuit by changing the gain of the low pass filter. Fig. 7 showing another embodiment of the present invention, is a schematic block diagram of an FM tuner employing the above described method of changing the lock range width of the PLLFM demodulation circuit. Referring to this figure, the FM tuner according to this embodiment, unlike the one shown in Fig. 3, does not include the input signal level switching circuit 15 in Fig. 3 but a PLLFM demodulation circuit 13b being directly controlled by the control signal from the control terminal 10. The PLLFM demodulation circuit 13b, unlike the one in Fig. 3, comprises a phase comparator 130, a VCO 132, a loop filter 131 gain-controlled by the control signal to be applied to the control terminal 10. The loop filter 131 corresponds to the LPF 101 in Fig. 1. The loop filter 131 decreases the gain due to a control signal employed in the case that the switches SW₁ and SW₂ select the IFBPF 8 with the narrower bandwidth, while it increases the gain due to a control signal employed in the case that the switches SW₁ and SW₂ select the IFBPF 7 with the larger bandwidth. The remaining portion of this FM tuner is the same as that of the FM tuner shown in Fig. 3. Fig. 8 is a circuit diagram illustrating a detailed example of the configuration of the loop filter 131. Referring to this figure, the loop filter 131 in the PLLFM demodulation circuit 13b comprises a resistor R1 provided between an output terminal of the phase comparator 130 and an input terminal of the VCO 132, and a series connection of a capacitor C3, resistors R2 and R3, which are provided between the input terminal of the VCO 132 and the ground. The loop filter 131 further comprises a resistor R4 and a diode D5 provided between a connecting point of the resistors R2 and R3 and the control terminal 10, and between the connecting point and the ground, respectively. A control signal from the control terminal 10 is applied via the resistor R4 to the diode D5. An output of the phase comparator 130 is filtered by an integrating circuit formed of the resistor R1 and the capacitor C3. When the control signal attains the high level, the diode D5 becomes conductive and then the resistor R2 is grounded via the diode D5. Thus, a discharge from the capacitor C3 is carried out via the resistor R2 in this case. On the other hand, when the control signal attains the low level, the diode D5 becomes non-conductive, and thus the discharge from the capacitor C3 is carried out via the resistors R2 and R3. Accordingly, the gain of the loop filter 131 in the case of the high level of the control signal is lower than that in the case of the low level thereof. Namely, the lock range width of the PLLFM demodulation circuit 13b in the case of the high level of the control signal is narrower than that in the case of the low level thereof. Thus, according to this embodiment, in order to adapt the lock range of the PLLFM demodulation circuit 13b to the bandwidth of the selected IFBPF, the switching level of the switches SW₁ and SW₂ is set so that a conduction state of the diode D5 is switched in accordance with the switching in the internal connection state of the switches SW₁ and SW₂ in Fig. 7. That is, the switches SW₁ and SW₂ receive the control signal of the low level to select the IFBPF 7 with the larger bandwidth, while it receives the control signal of the high level to select the IFBPF 8 with the narrower bandwidth. Resistance values of the resistors R2 and R3 are set so that the lock range width of the PLLFM demodulation circuit 13b is switched to the value A or B in Fig. 5 in accordance with a change in the gain due to ON/OFF of the diode D5. As aforementioned, the same effect as in the case of the previous embodiments can be accomplished also by controlling the PLLFM demodulation circuit itself in accordance with the change in the bandwidths of the IFBPFs.

Claims: A frequency modulation tuner (FM tuner) for receiving and demodulating a frequency modulated signal (FM signal), said tuner including filter means (7,8) for receiving a band-converted frequency modulated signal derived from said FM signal and for extracting therefrom a bandwidth portion of a selectable bandwidth, and a phase locked loop (PLL) demodulating means (13a,13b) for demodulating the extracted bandwidth portion, characterised by lock range means (15,131) for varying the lock range of the PLL demodulating means to correspond with the selected bandwidth of the filter means (7,8). An FM tuner according to claim 1, wherein said filter means (7,8) comprises a plurality of bandpass filters (7,8) for extracting signals with different bandwidths, and means (SW₁,SW₂) for selecting one bandpass filter out of said plurality of bandpass filters (7,8). An FM tuner according to claim 2, wherein said lock range means (15) comprises input signal level switching means (16, SW₃, SW₄) for switching the level of an input signal to be transmitted to said PLL demodulating means (13a,13b) in accordance with the bandwidth of said bandpass filter (7,8) selected by said selecting means (SW₁, SW₂). An FM tuner according to claim 3, wherein said input signal level switching means (16,SW₃,SW₄) comprises a first path (SW₃,SW₄) for transmitting therethrough an FM signal with a bandwidth extracted by said filter means (7,8) directly to said PLL demodulating means (13a), a second path (16,SW₃ SW₄) for attenuating or amplifying the FM signal with the bandwidth extracted by said filter means (7,8) and transmitting the attenuated or amplified FM signal to said PLL demodulating means (13a), and means (SW₃,SW₄) responsive to a selecting signal from said selecting means (SW₁,SW₂) for enabling said first path (SW₃,SW₄) or said second path (16,SW₃,SW₄). An FM tuner according to claim 4, wherein said second path (16,SW₃,SW₄) comprises an attenuator (16). An FM tuner according to claim 4, wherein said second path comprises an amplifier. An FM tuner according to claim 2, wherein said PLL demodulating means (13a,13b) comprises a phase comparator (130), a voltage controlled oscillator (132), and a loop filter (131) provided between an output of said phase comparator (130) and an input of said voltage controlled oscillator (132). An FM tuner according to claim 7, wherein said lock range means (131) comprises gain control means (D5) for switching a gain of said loop filter (131) in accordance with the selected bandwidth of said filter means (7,8). An FM tuner according to claim 1, comprising amplifying/converting means (2,3,4,5,6) for amplifying said FM signal and converting the band of the amplified signal from a high frequency band into an intermediate frequency band; said filter means comprising a first filter (7) for extracting a first bandwidth portion from the FM signal converted into the intermediate frequency band by said amplifying/converting means (2,3,4,5,6), a second filter (8) for extracting a second bandwidth portion with a bandwidth narrower than that of said first bandwidth portion from the FM signal converted into the intermediate frequency band by said amplifying/converting means (2,3,4,5,6), and selecting means (SW₁,SW₂) for selecting said first filter (7) or said second filter (8); said PLL demodulating means (13a) comprising a phase locked loop having a lock range optimized for the bandwidth of said first bandwidth portion, for demodulating an FM signal; and said lock range means (15) comprising means (SW₃,SW₄) for applying said first bandwidth portion to said PLL demodulating means (16,SW₃,SW₄), while said first filter (7) is being selected by said selecting means (SW₁,SW₂), and for attenuating the second bandwidth portion so that the lock range of said phase locked loop is optimized for the bandwidth of said second bandwidth portion, and applying the attenuated second bandwidth portion to said PLL demodulating means (13a), while said second filter (8) is being selected by said selecting means (SW₁,SW₂). An FM tuner according to claim 1, wherein said lock range means (15,131) includes means for signal level control in the signal path to the demodulating means or within the demodulating means itself.

Inventors: HORI MAKOTO, HORI, MAKOTO
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1989
Main classification: H03D3
IPC codes: H03L7, H04B1, H03D3