Method of driving a liquid crystal display

Abstract: The invention provides a method of driving a liquid crystal display having a plurality of scanning electrodes (Y1 to Y8), a plurality of signal electrodes (X1 to X6), and pixels formed at intersections of the scanning electrodes and the signal electrodes. The method comprises applying a scanning voltage successively to each of the scanning electrodes in respective selection periods, and in each selection period applying a selecting voltage to those signal electrodes on which pixels are selected and a non-­ selecting voltage to those signal electrodes on which pixels are not selected for providing a display. In accordance with the invention, the voltage applied to the signal electrodes is altered within each selection period.

Description: The present invention relates to a method of driving a liquid crystal display. A known method for driving a liquid crystal display will be described with reference to Figure 20. As shown in Figure 20 (a), a liquid crystal display has signal electrodes X1, X2 and X3 and scanning electrodes Y1, Y2 and Y3, which intersect one another. The intersections of the scanning electrodes and the signal electrodes which are shown hatched represent unselected pixels. Those intersections which are not shown hatched represent selected pixels. The waveforms of voltages applied to the signal electrodes X1, X2, X3 are indicated by VX1, VX2, VX3, respectively, in Figures 20 (e), 20 (f) and 20 (g), respectively. The waveforms of voltages applied to the scanning electrodes Y1, Y2, Y3 are indicated by VY1, VY2, VY3, respectively, in Figures 20 (b), 20 (c) and 20 (d), respectively. A scanning voltage applied to each of the scanning electrodes in turn is denoted by VY, and non-selecting and selecting voltages applied to the signal electrodes are denoted by VX and -VX, respectively. When the scanning electrode Y1 is scanned, the scanning voltage VY is applied to the electrode Y1, while no voltage is applied to the electrodes Y2 and Y3. At this point, the pixel on the scanning electrode Y1 which lies at the intersection with the signal electrode X1 is a selected pixel, and the selecting voltage -VX is applied to the signal electrode X1 for selecting this pixel. Those pixels which are located at the intersections of the scanning electrode Y1 and the signal electrodes X2 and X3 are unselected pixels, and the non-selecting voltage VX is, therefore, applied to the signal electrodes X2 and X3. Since the voltage applied to each pixel is equal to the difference between the voltage applied to the scanning electrode, Y1, and the voltage applied to the respective signal electrodes, X1, X2 or X3, a voltage (VY + VX) is applied to the intersection of the signal electrode X1 and the scanning electrode Y1. Likewise, a voltage (VY - VX) is applied to the intersections of the signal electrodes X2 and X3 and the scanning electrode Y1. Since no voltage is applied to the scanning electrodes Y2 and Y3, a voltage VX or -VX is applied to each pixel on these scanning electrodes. During the next selection period, the scanning electrode Y2 is scanned, and the above described pixel selection process is performed for the electrode Y2. Then, similar selection processes are carried out for all of the remaining scanning electrodes. That is, during each selection period, the voltage (VY + VX) is applied to each selected pixel, and the voltage (VY - VX) is applied to each unselected pixel, on the scanning electrode being scanned. At the same time, a voltage -VX or VX is applied to each pixel on all the other scanning electrodes. Therefore, the effective value of the voltage applied to each selected pixel becomes higher than the effective value of the voltage applied to each unselected pixel. As a result, the selected pixels are made visible. When a matrix liquid crystal display having a large area is driven by this prior art technique, cross talk takes place between both kinds of electrodes because of the capacitance of the scanning and signal electrodes and the resistance of the wiring. The resulting noise voltage changes the effective value of the voltage applied to the pixels. In particular, with reference to Figure 21, when a pixel existing at the intersection of a signal electrode and a scanning electrode applied with the scanning voltage VY is selected, a selecting voltage -VX is applied to the signal electrode. When this pixel is not selected, a voltage VX is applied to the signal electrode. When the signal voltage changes from -VX to VX or vice versa, noise 70 is produced at the scanning electrode because of the capacitive coupling between the scanning electrode and the signal electrode. Therefore, the effective value of the voltage applied to the pixel deviates from a correct value. The magnitude of the noise may not vary significantly from location to location throughout the liquid crystal display provided that the electrodes have uniform resistance and that the capacitance between the electrodes is uniform. In this case, the noise may not bring about a substantial change in contrast causing a deterioration in the quality of the displayed image, digits or characters. However, when the signal voltage at the electrode X1 (Figure 21 (a)) induces noise 70 (Figure 21 (b)) at the scanning electrode, the signal voltage at the electrode X2 (Figure 21 (c)) induces noise 71 (Figure 21 (d)) at the scanning electrode, and the signal voltage at the electrode X3 (Figure 21 (e)) induces noise 72 (Figure 21 (f)) at the scanning electrode, the noise generated along the scanning electrode is the sum of the noise produced by each of the signal electrodes intersecting the scanning electrode. Therefore, depending on the pattern of segments of displayed digits or characters, the noise either cancels itself out, e.g. the noise 70 and 71 cancel one another out as shown in Figure 21 (g), or is super imposed, e.g. the noise 70 is super imposed on the noise 71 as shown in Figure 21 (h), to produce greater noise. This increases local contrast variations due to the pattern of segments of the display digits or characters. Noise caused by the cross talk may thus either cancel out or be super imposed inside the liquid crystal display, depending on the pattern of the displayed segments. This gives rise to local contrast variations in the liquid crystal display, and hence to a deterioration in the quality of the display presented. It is an object of the present invention to provide a method of driving a liquid crystal display, which homogenises the noise generated by cross talk between the scanning and signal electrodes irrespective of the pattern of segments of digits or characters being displayed, whereby to reduce local variations in contrast and improve the display quality. In an article entitled "A Pocket-Size Liquid-Crystal TV Display" by Kaneko, Kawakami and Hanmura, in the Proceedings of the SID, Vol 23/1, 1982, there is disclosed a multi-matrix liquid crystal display panel in which four vertical signal line electrodes combine to produce four pixels corresponding to one horizontal scanning electrode. The scanning voltage applied to the scanning electrodes in turn is of one of two kinds depending upon whether selection or non-selection is to be achieved. Both kinds of waveform have two levels of voltage. The voltage waveform applied to the signal electrodes has four voltage levels. In GB-2067332-A, there is disclosed an electro-optical display device having a common electrode with a plurality of selectable electrodes associated therewith. There is no scanning of the common electrode, but an alternating votlage is applied thereto. According to the present invention, there is provided a method of driving a liquid crystal display device having a plurality of scanning electrodes and a plurality of signal electrodes, the electrodes intersecting with pixels formed at intersections, the method comprising applying a scanning voltage successively to each of the scanning electrodes during respective selection periods, the scanning voltage being constant in each selection period, and during each selection period applying two voltages successively to each of the signal electrodes one of which in the case of a selected pixel, is a selecting voltage and the other of which is an other voltage. The alteration of the voltage applied to each signal electrode during each selection period has the advantage of homogenising noise transmitted from the signal electrodes to the scanning electrodes irrespective of the display pattern. In this way, local contrast variation due to noise can be reduced. The invention will be described further, by way of example, with reference to the accompanying drawings, in which:- Figure 1 is a diagram showing the waveforms of scanning voltages applied to scanning electrodes of a matrix liquid crystal display in a method of driving the display according to the present invention; Figure 2 is a diagram showing the waveforms of signal voltages applied to signal electrodes of the display; Figure 3 is a diagram showing the waveforms of voltages applied to the associated pixels of the display; Figure 4 is a diagram showing one example of a display provided by the matrix liquid crystal display; Figure 5 is a diagram showing the waveform of a signal voltage applied when the method according to the invention is used and the manner in which cross talk noise is produced; Figure 6 is a diagram similar to Figure 5, but representing the case when the prior art method is used; Figure 7 is a circuit diagram of a drive circuit for the signal electrodes for implementing the method according to the invention; Figure 8 is a timing chart illustrating the operation of the circuit shown in Figure 7; Figure 9 is a diagram showing the waveforms of signal voltages applied to signal electrodes of a matrix liquid crystal display in a second embodiment of the method according to the invention; Figure 10 is a diagram showing the waveforms of voltages applied to the associated pixels of the display in the second embodiment of the method; Figure 11 is a diagram showing the waveform of a signal voltage applied when the second embodiment of the method is used and the manner in which cross talk noise is produced; Figure 12 is a circuit diagram of a drive circuit for the signal electrodes for implementing the second embodiment of the method according to the invention; Figure 13 is a timing chart for illustrating the operation of a drive circuit for the signal electrodes for implementing the second embodiment of the method; Figure 14 is a diagram showing the waveforms of signal voltages applied to signal electrodes of a matrix liquid crystal display in a third embodiment of the method according to the invention; Figure 15 is a diagram showing the waveforms of voltages applied to the associated pixels of the display in the third embodiment of the method; Figure 16 is a timing chart for illustrating the operation of a drive circuit for the signal electrodes for implementing the third embodiment of the method; Figure 17 is a diagram showing changes in the waveform of a signal voltage applied to a signal electrode for providing a gradated display in a modification of the method according to the invention; Figure 18 is a circuit diagram of a drive circuit for a matrix liquid crystal display for providing a gradated display; Figure 19 is a diagram showing the signals applied to and generated within the drive circuit of Figure 17; Figure 20 is a diagram illustrating the prior art method of driving a liquid crystal display; and Figure 21 is a diagram showing the manner in which cross talk noise is produced when the prior art method is used. All the examples of the novel liquid crystal display described herein use a liquid crystal display cell having 640 signal electrodes and 200 scanning electrodes. Figure 1 shows the waveforms of scanning voltages applied to scanning electrodes Y1 and Y2 of a matrix liquid crystal display as shown in Figure 4 in a first example of the method according to the invention. Figure 2 shows the waveforms of signal voltages applied to signal electrodes X3 and X4 of the display, and Figure 3 shows the waveforms of the voltages applied to pixels Y1X3 and Y1X4 derived from the scanning and signal voltages. A display is thereby provided as shown in Figure 4, where hatched intersections of the signal and scanning electrodes represent unselected pixels and where intersections which are not hatched represent selected pixels. In Figure 1 to 3, VO - V1 = V1 - V2 = V3 - V4 = V4 - V5 = 1.51 V, and V2 - V3 = 14.16 V. Further, in Figures 1 to 3, each of a plurality of selection periods t0 is composed of an interval t1 and an interval t2, where t1 = 60 micro-seconds and t2 = 10 microseconds. Referring to Figure 2, during a period FR1, either a selecting voltage V5 or a non-selecting voltage V3 is applied to each signal electrode in the interval t1. In the interval t2, a voltage V4 is applied. Therefore, the voltage obtained from the scanning voltage and the signal voltage and applied to the associated pixels, when a particular scanning electrode is not being scanned, is equal to V4 - V3 or V4 - V5 in the interval t1 and to 0 in the interval t2, as shown in Figure 3. During a period FR2, either a selecting voltage V0 or a non-selecting voltage V2 is applied to each signal electrode in the interval t1, as shown in Figure 2. In the interval t2, a voltage V1 is applied. Therefore, the voltage obtained from the scanning and signal voltages and applied to the associated pixels, when a particular scanning electrode is not being scanned, is V1 - V0 or V1 - V2 in the interval t1 and is 0 in the interval t2. Thus, when a pixel is not selected, the non-selecting voltage is not applied continuously to the signal electrode throughout the period t0, but is altered to a reference voltage in an interval t2 of this period. Similarly, when a pixel is selected, the selecting voltage is not applied continuously to the signal electrode during the period t0, the selecting voltage again being altered to the reference voltage in an interval t2 of this period. Whether or not a pixel is made visible depends on the effective value of the voltage applied to the pixel and on a threshold voltage of the liquid crystal material. Thus, a pixel will not be selected if the voltage applied to the pixel becomes 0V (due to the application of the reference voltage to the associated signal electrode) in an interval within the selection period t0 but does not exceed the threshold voltage of the liquid crystal material. Similarly, a pixel will be selected if the voltage applied to the pixel becomes 0V in an interval within the selection period t0 and does not go below the threshold voltage of the liquid crystal material. Figure 5 shows noise generated by cross talk between the signal electrodes and the scanning electrodes, as well as the signal voltage waveforms. Figure 5 (a) shows the waveform of the voltage applied to the signal electrode X4. Figure 5 (b) shows noise generated in the scanning electrode as a result of cross talk at the pixel X4Y1. Figure 5 (c) shows the waveform of the voltage applied to the signal electrode X3. Figure 5 (d) shows the noise generated in the scanning electrode Y1 as a result of cross talk at the pixel X3Y1. Figure 6 shows the waveforms of the signal voltages employed in the prior art method, as well as the noise generated by cross talk between the signal electrodes and the scanning electrodes. Figure 6 (a) shows the waveform of the voltage applied to the signal electrode X4 in this case. Figure 6 (b) shows the lack of noise produced in the scanning electrode Y1 as a result of cross talk at the pixel X4Y1. Figure 6 (c) shows the waveform of the voltage applied to the signal electrode X3. Figure 6 (d) shows the noise produced in the scanning electrode Y1 as a result of cross talk at the pixel X3Y1. As can be seen from these two Figures, when the prior art method is employed, noise is generated along the signal electrodes, because a row including alternately selected and unselected pixels on a signal electrode (the signal electrode X3 in Figure 4) differs from a row of successively unselected pixels (the signal electrode X4 in Figure 4) in the manner in which noise is transmitted from the signal electrode to the scanning electrode as a result of cross talk, whereby the pixels X3Y1 and X4Y1 differ in transmittance. On the other hand, when the method according to the invention is utilised, the manner in which noise is transmitted from the signal electrode to the scanning electrode as a result of cross talk does not differ between the case in which a signal electrode (the signal electrode X3 in Figure 4) includes alternately arranged selected and unselected pixels and the case in which a signal electrode (the signal electrode X4 in Figure 4) includes successively arranged unselected pixels. That is, the magnitude of the noise 73 is equal to the magnitude of the noise 74 in the present invention and, therefore, no noise is produced along the scanning electrode. The pixel X3Y1 is thus identical in transmittance with the pixel X4Y1. Figure 7 is a diagram of a circuit for driving the signal electrodes according to the method of the present invention, and Figure 8 is a timing chart illustrating the operation of the circuit shown in Figure 7. In Figure 7, a data input terminal 2 receives data for determining whether each pixel is to be activated or not to provide a display. A shift register 8 receives and sends out the data under the control of a clock signal from a shift clock input terminal 1. A latch circuit 9 converts the data from serial form into parallel form, and retains the data therein, the latch circuit being controlled by signals received at a latch signal input terminal 3. The drive circuit further comprises a level shifter 11 for switching the power supply system, a circuit 12 for generating the signal voltages for application to the signal electrodes, an inverting terminal 6 for AC driving of these signal voltages, a power supply 7 for energising the liquid crystal material, and a terminal 13 for supplying the signal voltages to the signal electrodes. Voltages (a) and (b) (Figure 8) are applied to voltage input terminals 4 and 5, respectively. When the data retained in the latch circuit 9 is at a high level, the voltage (a) is selected. When the data is at a low level, the voltage (b) is selected. Depending on the selected voltage, signal voltage (c) or (d) is delivered by the circuit 12. The signal voltage (c) is applied as a selecting voltage to the pixels during the period FR1. The voltage (d) is applied as a non-selecting voltage to the pixels during the period FR1. A variation of the above method will now be described with reference to Figures 9 to 12. Figure 9 shows the waveforms of signal voltages applied to the signal electrodes X3 and X4 in this example. The waveform of the voltage applied to each scanning electrode is the same as that shown in Figure 1. Figure 10 shows the waveforms of the voltages applied to the pixels Y1X3 and Y1X4 and derived from the scanning voltages and the signal voltages to obtain the display shown in Figure 4 as before. In Figures 9 and 10, V0 - V1 = V1 - V2 = V3 - V4 = V4 - V5 = 1.49 V, and V2 - V3 = 14.10 V. The selection period t0 is composed of intervals t1 and t2, where t1 = 65 micro-seconds and t2 = 5 micro-seconds. In the present example, when a pixel is selected, a non-selecting voltage is applied to the associated signal electrode in the interval t2. When a pixel is not selected, a selecting voltage is applied to the signal electrode in the interval t2, by contrast with the first embodiment of the invention described above. Figure 11 shows the waveforms of signal voltages employed when this embodiment of the method according to the invention is used, as well as noise transmitted from the signal electrodes to the scanning electrodes as a result of cross talk. Figure 11 (a) shows the waveform of the voltage applied to the signal electrode X3. Figure 11 (b) shows noise transmitted from the signal electrode X3 to the scanning electrode Y1 due to cross talk at the pixel X3Y1. Figure 11 (c) shows the waveform of the voltage applied to the signal electrode X4. Figure 11 (d) shows how cross talk produced at the pixel X4Y1 results in noise transmitted from the signal electrode X4 to the scanning electrode Y1. As can be understood from these Figures, when the present example of the method according to the invention is employed, the noise transmitted from each signal electrode to the scanning electrode is effectively the same both in the case in which pixels are alternately selected and unselected along a signal electrode (the signal electrode X3 in Figure 4) and in the case in which successive pixels are unselected along a signal electrode (the signal electrode X4 in Figure 4). That is, the noise 75 is identical in magnitude with the noise 77. The noise 76 is identical in magnitude with the noise 78. Therefore, no cross talk is generated along the signal electrodes, and the pixels X3Y1 and X4Y1 are identical in transmittance. A drive circuit as shown in Figure 12 is employed in this instance and is arranged to generate signal voltages (c), (d) as shown in Figure 13. The operation of the circuit shown in Figure 12 is essentially the same as the operation of the circuit illustrated in Figure 7. In the present embodiment, when a pixel is selected, a non-selecting voltage is applied to the signal electrode in the interval t2. When a pixel is not selected, a selecting voltage is applied to the signal electrode in the interval t2, unlike the first embodiment described above. Therefore, this embodiment has the advantage that the interval t2 can be made shorter than in the first embodiment, but it is necessary to adjust the interval t2 in such a way that the manner in which cross talk noise is transmitted from the signal electrode to the scanning electrode does not differ between the case where the pixels are alternately selected and unselected on the signal electrode and the case where successive pixels are unselected. A third embodiment of the invention will now be described with reference to Figures 14 to 16. Figure 14 shows the waveforms of signal voltages applied to the signal electrodes X3 and X4 in the third embodiment. The waveform of the voltage applied to each scanning electrode is the same as in Figure 1. Figure 15 shows the waveforms of the voltages applied to the pixels Y1X3 and Y1X4 and derived from the scanning voltages and the signal voltages to obtain a display as shown in Figure 4. In Figures 14 and 15, V0 - V1 = V1 - V2 = V3 - V4 = V4 - V5 = 1.45 V, and V2 - V3 = 13.85 V. Further, the selection period t0 is composed, on the one hand, of intervals t3, t4 and, on the other hand, of intervals t5, t6, where t4 = t5 = 10 micro-seconds, and t3 = t6 = 60 micro-seconds. In the present example, when a pixel is selected, a non-selecting voltage is first applied to the associated signal electrode in the interval t5. Then, a selecting voltage is applied to the signal electrode in the interval t6. When a pixel is not selected, a non-selecting voltage is first applied to the associated signal electrode in the interval t3, and then a selecting voltage is applied to the signal electrode in the interval t4. Thus, the instant in each selection period at which a switch is made from the non-selecting voltage to the selecting voltage differs according to whether a respective pixel is selected or not selected, and this is irrespective of the pattern of displayed segments on the liquid crystal display. It is unlikely, therefore, that noise resulting from cross talk and transmitted from the signal electrodes to the scanning electrodes will cancel out. Rather, the noise will be uniformly present on the scanning electrodes. The pixels X3Y1 and X4Y1 are thus identical in transmittance. When the first and second embodiments of the method according to the invention are used, the pixels X4Y1 and X4Y2 may produce a slight difference in transmittance. However, when the present embodiment of the method is employed, the pixels X4Y1 and X4Y2 can be made identical in transmittance. The drive circuit for the signal electrodes for implementing the present embodiment of the method is substantially the same as the circuit shown in Figure 7, with the circuit being arranged to receive and generate signals as shown in Figure 16. Voltages (a) and (b) as shown in Figure 16 are applied to terminals 4 and 5, respectively. When the display data retained in the latch circuit 9 is at a high level, the voltage (a) is selected. When the data is at a low level, the voltage (b) is selected. Depending on the selected voltage, a signal voltage having the waveform (c) or (d) is delivered, the signal voltages (c) and (d) being applied to selected pixels and unselected pixels, respectively, during the period FR1. In the third embodiment described above, when a pixel is selected, a non-selecting voltage is applied to the signal electrode in the interval t5 and then a selecting voltage is applied to the signal electrode in the interval t6. When a pixel is not selected, the non-selecting voltage is applied to the signal electrode in the interval t3 and then the selecting voltage is applied to the signal electrode in the interval t4. It has been found that similar advantages can be obtained by applying a reference voltage to the signal electrode in the intervals t5 and t4 instead. The present invention can also be applied to a liquid crystal display for providing a gradated display, using a pulse width modulation technique. Figure 17 shows how the waveforms of the signal voltages may be varied utilising pulse width modulation, for providing the gradated display, the changes occurring in one selection period t0 within the period FR1. It is assumed that, when the grey level is 0, the effective voltage applied to each pixel is at its highest and that, as the grey level increases, the effective voltage applied to each pixel decreases. A difference is created between the selecting voltage and the non-selecting voltage for grey levels 0 and 3. Although any of the embodiments of the invention described above may be adapted to provide the gradated display, in the present instance the embodiment described with reference to Figures 14 to 16 is modified such that the timing at which a switch is made from a selecting voltage to a non-selecting voltage for a non-selected pixel and the timing at which a switch is made from the selecting voltage to the non-selecting voltage for a selected pixel are made different for every grey level. Therefore, noise generated by cross talk occurs uniformly at every grey level and does not depend on the pattern of the segments displayed on the liquid crystal display. Consequently, the display quality can be maintained at a high level. When pulse width modulation is utilised, the invention can be applied independently of the number of grey levels. A drive circuit for the signal electrodes of a liquid crystal display for providing a gradated display is shown in Figure 18, and the signals arising at different portions of the circuit are shown in Figure 19. Referring initially to Figure 19, Figure 19 (a) shows a frame signal FR, Figure 19 (c) shows the general waveform SEG of a signal voltage applied to one of the signal electrodes in the display, Figure 19 (d) shows the waveform COM of a scanning voltage applied to one of the scanning electrodes in the display, and Figure 19 (i) to 19 (p) show the waveforms 0(H) to 7(H) of respective modified signal voltages applied according to grey level to one of the signal electrodes during a selection period t0 for selecting an associated pixel. Scanning voltages having the same waveform as those employed in prior art pulse width modulation methods are applied to the scanning electrodes. That is, when a scanning voltage is applied to some of the scanning electrodes, a reference voltage is applied to the other scanning electrodes. The signal voltages are pulse width modulated according to grey level as described above. The reference point for pulse width modulation of the signal voltages lies at an intermediate point in the selection period t0 as can be seen from Figures 19 (i) to 19 (p). As shown, the pulses in the selecting voltage corresponding to low grey levels lie within the pulses in the selecting voltage corresponding to high grey levels. In the pulse width modulation method according to the present embodiment, the pulse widths of the selecting voltage pulses are varied on both sides of the leading edge of a signal U/D shown in Figure 19 (h), which signal provides a basis for the variation in pulse width as described below. A phase difference (Δt1, Δt2) between signals LP (Figure 19 (b)) and RES (Figure 19 (f)) is used to generate very short pulses for grey levels 0 and 7. This phase difference can be varied at will according to the characteristics of the liquid crystal cell. Thus, during any selection period, both the selecting voltage and the non-selecting voltage are always applied to the respective signal electrodes whatever grey level is required. In this way, cross talk noise is generated uniformly irrespective of grey level and independently of the pattern of segments displayed on the liquid crystal display. Hence, the display quality can be maintained at a high level. The drive circuit illustrated in Figure 18 will now be described. The drive circuit comprises a shift register 41, a sample/hold circuit 42, a latch circuit 43, a level shifter 47, and a signal voltage generating circuit 48, all of which are known. The shift register 41 produces a signal which causes the sample/hold circuit 42 to accept gradated display data sent from a controller. The sample/hold circuit 42 accepts data corresponding to one pixel at a time. The data about gradation is temporarily stored in the sample/hold circuit 42, which consists of a plurality of latches. All of the stored data is transmitted to the latch circuit 43 at the beginning of a respective selection period in response to an output signal from an inverter 50, which is generated following receipt of a pulse of a signal LP at a terminal LP. The signal LP has a period equal to one half of the selection period t0 but a phase difference detection circuit 49 prevents the inverter 50 from producing its output signal in response to pulses from the signal LP when applied at an intermediate point in a selection period. The gradation data stored in the latch 43 is applied to a first de-coder 45 and a second de-coder 44 incorporated in a pulse width modulation circuit. The de-coders 44 and 45 correspond to a respective bit of the output from the signal generating circuit 48. Each of the de-coders consists of a series-parallel combination of NMOS transistors and PMOS transistors. The two de-coders produce respectively a setting output and a re-setting output for selectively controlling the output from the signal generating circuit 48. The outputs from the first and second de-coders are selectively delivered by transistors 53 and 52, gated by the output Q from a flip-flop 59, to a loop 65 comprising a NAND gate 54 and an inverter 55. The output impedance of the inverter 55 is quite high as compared with the outputs from the first and second de-coders and, when either of the first and the second de-coders conducts, the state of the loop 65 is urged to follow the output from the conducting de-coder. The loop 65 is re-set by a PMOS transistor 51 at the beginning of each selection period, which makes the outputs from the signal generating circuit 48 non-selecting outputs although this is not essential to the invention. Next, clock pulses GCP (Figure 19 (g)) for gradation weighting are applied to an up/down counter 46 corresponding to LS191. The output Q from the flip-flop 59 discriminates between the operation performed in the first half of each selection period and the operation performed in the second half. When the output Q is at a high level, which it is in the first half of each selection period, the up/down counter 46 acts as an up counter in response to the clock pulses GCP and operates the first de-coder 45. When the output Q is at a low level, the counter 46 acts as a down counter in response to the clock pulses GCP and operates the second de-coder 44. When the first de-coder 45 is first caused to conduct according to data concerning gradation, i.e. the counter output complementary to the data for display is applied to the first de-coder 45, the output from the NAND gate 54 becomes 1 and is retained in this state. When the second de-coder is caused to conduct, the output from the NAND gate 54 becomes 0 and is retained in this state. In this way, once either the first or second de-coder produces its output signal, the condition is then maintained. The output from a NAND gate 62 is also applied to the NAND gate 54. Whenever the output from the gate 62 is an OFF signal, the output from the NAND gate 54 results in the generation of a selecting voltage during the period Δt2. As described already, the signal LP does not induce latch action at this point. Whenever the output from the NAND gate 62 is an ON signal, the PMOS transistor 51 causes the NAND gate 54 to produce an output for generating a non-selecting voltage at the beginning of a selection period during the period t1. Since the first de-coder is conducting at this time, the non-selecting voltage is allowed to be delivered from the signal voltage generating circuit 48 only during the period Δt1. The periods Δt1 and Δt2 are determined according to the phase difference between the signals LP and RES by the phase difference detection circuit 49. Whether an internal signal is produced or not depends on the relationship between the timing when the signal LP rises and the timing when the signal RES rises. In particular, when the signal LP rises earlier than the signal RES, a signal representing the period Δt2 is delivered. When the reverse situation takes place, a signal representing the period Δt1 is delivered. The periods Δt1 and Δt2 can be controlled independently. If the relation Δt1 = Δt2 holds, the phase difference detection circuit 49 can, of course, be made much simpler than the circuit 49 shown in Figure 18. Consequently, a pulse width modulated output based around an intermediate point in each selection period is obtained as shown in Figure 19. This output is converted into the signal voltage SEG by the signal voltage generating circuit 48 via the level shifter 47 to activate the liquid crystal material to generate the display. The drive circuit shown in Figure 18 is capable of producing 8 grey levels in conformity with the signals shown in Figure 19. However, other numbers of grey levels can easily be displayed by increasing or decreasing the number of series connected transistors in each of the first and second de-coders. As described, the invention provides a method of driving a liquid crystal display, which may comprise a pair of base sheets having a layer of a liquid crystal material sandwiched between the two base sheets, and pixels formed at the intersections of scanning electrodes and signal electrodes. The described method involves applying a scanning voltage successively to the scanning electrodes, applying a selecting voltage to the signal electrodes which lie on the scanning electrodes applied with the scanning voltage and on which selected pixels exist, and applying a non-selecting voltage to the signal electrodes on which unselected pixels exist, to provide a display. During each selection period, the voltage applied to each signal electrode is varied. Cross talk noise transmitted from the signal electrodes to the scanning electrodes is thus made homogeneous, which greatly reduces local contrast variations dependent on the pattern of displayed segments. Hence, the readability and the quality of the display are improved.

Claims: A method of driving a liquid crystal display device having a plurality of scanning electrodes (Y1 to Y8), and a plurality of signal electrodes (X1 to X6), the electrodes intersecting with pixels formed at the intersections, the method comprising applying a scanning voltage successively to each of the scanning electrodes during respective selection periods, the scanning voltage being constant during each selection period, and during each selection period applying two voltages successively to each of the signal electrodes, one of which, in the case of a selected pixel, is a selecting voltage and the other of which is an other voltage, and the one which, in the case of a non-selected pixel, is a non-selecting voltage and the other of which is an other voltage. A method as claimed in claim 1, in which the other voltage, in the case of both selected and non-selected pixels, is an intermediate voltage between the selecting voltage and the non-selecting voltage. A method as claimed in claim 1, in which the other voltage, in the case of a selected pixel, is the non-selecting voltage, and, in the case of a non-selected pixel, is the selecting voltage. A method as claimed in claim 3, in which the change between selecting and non-selecting voltages is at different times in the case of selected and non-selected pixels. A method as claimed in claim 3, in which the time of change between the two voltages applied to a pixel is varied depending upon the gray level for the corresponding pixel. A method as claimed in claim 1, in which the selecting voltage has a pulse width variable in accordance with the gray level for the corresponding pixel.

Inventors: IMAMURA YOICHI, MOMOSE YOICHI, SAKURAI YOICHI, IMAMURA, YOICHI, MOMOSE, YOICHI, SAKURAI, YOICHI
Applicants: SEIKO EPSON CORP, SEIKO EPSON CORPORATION
Application year: 1989
Main classification: G09G3
IPC codes: G02F1, G09G3