THERMAL PRINTING CONTROL CIRCUIT

Abstract: A thermal printing control circuit includes a first shift register (104) for receiving and storing a series of serial printing image data (D) to be printed by a plurality of thermal print elements, a second register, constituted by a plurality of registers (105-109) for storing contents of the first shift register (104) by parallelly and sequentially shifting and receiving the contents thereof, for storing printing history data of a plurality of cycles of the thermal print elements, and a logic circuit (140) for performing a logic operation by using the printing history data of the plurality of cycles of the plurality of thermal print elements, the printing history data being stored in the second shift register (105-109), and externally supplied control timing signals (T o , T A , T B , T C , T D ) and for generating drive signals representing voltage waveforms to be applied to the plurality of thermal print elements.

Description: The present invention relates to a thermal printing control circuit and, more particularly, to a heat control circuit of a thermal printing head. A thermal printing head comprises a plurality of print elements constituted by resistors arrayed in a line in correspondence with dots to be printed. Each print element is heated by applying a voltage pulse thereto for a short period of time at the timing for printing a corresponding dot. The dot is printed on print paper by keeping the print element at a temperature higher than the heat-sensitive temperature of the print paper for a certain period of time. Then, the heat of the print element is naturally dissipated upon removal of the voltage pulses and the temperature of the print element is dropped below the heat-sensitive temperature. The above operation is repeated each time a dot is printed. Recently, as the printing speed of a printer is considerably increased, several problems have been posed in heat control of the above-described printing head. "Thermal Printhead Drive Circuit for High Speed Pinting", IBM Technical Disclosure Bulletin, vol. 24, No. 1B, June 1981, pp. 646 - 648 describes a countermeasure for solving the problem of insufficient temperature rise caused by a decrease in duty cycle of an applied pulse due to high printing speed. In contrast to the above problem, in a recent high-speed thermal printer, when, for example, linear printing is performed, since heating of print elements is successively repeated, heat of the print head is accumulated and the printing thickness of the dot is increased. This gradually causes unclear printing, thus posing another problem. US-A-4 364 063 describes a thermal recording apparatus in which a line of thermal resistive elements are selectively driven according to recording signals. By changing the width of the drive signal for each thermal resistive element overheating of an element and unevenness of the recording density should be avoided. This thermal recording apparatus comprises a plurality of thermal resistive elements which are placed in one line. Recording signals are serially supplied to a shift register which has a capacity corresponding to the number of elements. After the recording signals of one line have been completely stored in the shift register they are supplied to latch circuits in parallel. Furthermore, recording signals stored in the shift register are outputted in series and supplied to a second shift register. The second shift register stores the recording signals of the previous line. The outputs of the first shift register (9) and the second shift register are compared bit by bit in a comparator which produces modified recording signals which are stored in the first shift register instead of the presently received recording signals. Latch circuits latch the modified recording signals. Drive circuits are connected to the latch circuits and supply drive signals to the respective thermal resistive element. If successive 1 signals occur in any particular bit, i.e. any thermal resistant element, then the turn on time is changed from (T1 + T2) to T1 to prevent burn out of the corresponding thermal resistive element. The turn on time is the time during which the drive circuit supplies the current to the respective thermal resistive element. US-A-4 524 368 describes a drive circuit for a thermal sensitive recording apparatus with a thermal head comprising a plurality of heater elements. The circuit is provided with four line buffers into which printing data are successively written by line. A selector is supplied for selecting one of the line buffers. When the printing data is being written into the first line buffer, the fourth line buffer stores the printing data for the line onto which printing or recording is going to be made next, the third and second buffers store the printing data for the previously printed line, and the line before the previously printed line, respectively. The printing data are inputted into an X(i) operator for operating the state of heat of storage. The operation output signals of the X(i) operator are supplied to a T(i) operator for computing thermal energy to be applied to individual heater elements to thereby set the width of pulse to be applied to each of the heater elements in accordance with the computation. The T(i) operator determines the respective pulse width for the line onto which recording is going to be performed by using three kinds of data, namely, the operation output signals of output signals of a pulse width memory storing the respective pulse width for the line before, and a black dot signal produced from a counter, The black dot signals represent the number of black dots by a ratio thereof occupying the line being printed now. Pulse width signals determined for the respective heater elements are then supplied to a thermal-head pulse-voltage application circuit. For computing the heat storage state the X(i) operator uses table information stored in a ROM The T(i) operator finds the pulse width for the respective heater elements for the line before, by the output signals supplied from the pulse width memory The pulse width T(i1) for the line onto which recording is now going to be performed are obtained from the heat storage state X(i) determined for the respective heater elements. The thus obtained pulse widths are corrected so as to finally determine the pulse width T(i2). US-A-4 574 293 describes a compensation for heat accumulation in a thermal head. According to the teaching of D3 the energy to be applied to a heating element is controlled by taking into account the energy applied to the heating element one scan period before as well as the effect of heat accumulated in heating elements surrounding the heating element, and then the energy thus controlled is recorrected taking into consideration the temperature change in the thermal head base plate or the change in printing time between lines. The information representing temperature of the thermal head base plate is typically calculated based on the resistance value of a thermistor normally provided in the thermal head. The heat history information X(i) for each picture element is determined on the basis of the neighbouring picture elements in the scan line currently being printed and in the two lines printed before. Certain weight values are used. The heat history information X(i) is used for correcting the heating pulse width Ti-1. In addition, the information Ki representing the base plate temperature of the thermal head is used for correcting the heating pulse width. No proper countermeasure for solving this problem has yet been proposed by any prior art. It is an object of the present invention to eliminate the drawbacks of the above-described prior art and provide a thermal printing control circuit for preventing changes in printing thickness due to the accumulated heat of a print head even in a continuous, high-speed printing operation. A thermal printing control circuit according to the present invention comprises the features of claim 1. Brief Description of the Drawings Figs. 1A, 1B, 2, 3, 4, and 5 are timing charts for explaining analysis in the present invention; Fig. 6 is a block diagram showing an arrangement of an embodiment of the present invention; Fig. 7 is a block diagram showing an detailed arrangement of part of logic circuit in fig. 6; and Fig. 8 is block diagram showing a connection circuit in which a plurality of circuits each of which is shown in Fig. 7 are connected to each other. Detailed Description of the Preferred Embodiment Prior to description of an embodiment of the present invention, logical and experimental analysis made by the present inventor will be described below. Figs. 1A and 1B show a relationship between driving of one print element and generation of heat. Figs. 1A and 1B respectively show changes in temperature of the print element and the applied voltage as a function of time. Referring to Figs. 1A and 1B, when a voltage pulse with a voltage V is applied to a print element for a time interval between time t₀ and time t w , the temperature of the element is raised from T c to T p . From the results of experiments, the operation during this time interval is considered as a primary delay response with respect to a step input signal having a time constant determined by the specific heat (heat capacity) of a printing head. When the voltage pulse is removed at time t w , a heat dissipation/cooling period starts. This heat dissipation operation is also a primary delay response. The heat dissipation/cooling period continues untill next pulse application time t₀'. Assuming that the heat-sensitive temperature of an ink film or heat-sensitive paper used in combination with the thermal printing head is T s in Fig. 1A, then a heat energy component having a temperature higher than T s is proportional to an area Ee of a hatched portion in Fig. 1A. Accordingly, the heat energy which is generated by the print element and contributes to dot printing can be kept constant by controlling the area Ee to be always constant thereby to keep constant the printing thickness of dot on the ink film or film heat-sensitive paper. In order to realize this, when the period of voltage application is short, i.e., high-speed printing is performed, the period of voltage application must be variable, and, therefore, voltage application and removal times t₀, t w , t₀', and t w ' must be controlled so as to keep the areas of the hatched portions in first and second cycles constant as shown in Figs. 1A and 1B. The detailed analysis about the conditions for determing the above times will be described below. Fig. 2 shows primary delay response curves T UP and T DOWN in voltage application and heat dissipation periods of a print element. Referring to Fig. 2, assume that the temperature of a printing head is T c at time t 0 when voltage application to a print element is started. The temperature of the printing head is dropped to T c while the heat is dissipated after the immediately preceding voltage application is finished. This temperature T c is called an accumulated heat temperature. Assume that: x: a temperature of the print element at voltage application time t₀, i.e., T c ; y: a voltage application time interval (t w - t₀) where t w is voltage application end time; Ee: effective heat energy (proportional to the area Ee of a portion having a temperature higher than the heat-sensitive temperature T s ) for heat-sensitive paper or an ink film; τ : heat generation and heat dissipation time constants (identical to each other); T s : a heat-sensitive temperature; T p : a peak temperature; T M : a saturation temperature, i.e., a convergent temperature when voltage application is continued for a long period of time; t₁: time when the curve T UP crosses the heat-sensitive temperature T s ; and t₂: time when the curve T DOWN crosses the heat-sensitive temperature T s . If the origin of time t is t₀, i.e., t₀ = 0, the curve T UP in a voltage application period can be represented as a primary delay response curve in response to a step input as follows: Similarly, the response curve T DOWN in a heat dissipation period can be represented by: Therefore, the area Ee defined by the curves T UP and T DOWN , and an alternately long and short dashed line representing the heat-sensitive temperature T s can be given by: Ee = T M (y - t₁) - T s (t₂ - t₁) (3) Accordingly, the conditions for keeping the area Ee constant regardless of the accumulated temperature T c , i.e., x, in other words, the heat control conditions according to the principal idea of the present invention are those satisfying dEe/dx = 0. According to equation (3), That is, Since T M ≠ 0 and T P - T s ≠ 0 are established, the following equation is given: Therefore, y = τ·log(T M - x) + C (6) If x = 0, i.e., a printing time interval without accumulated heat is y = n, the constant C is determined, and hence: Since T UP = T p when t = t w , according to equation (1), From equations (7) and (8), Therefore, a substitution of equation (9) into equation (2) yields: Accordingly, if an optimal printing time period at a time point after a lapse of time t from the start of the preceding voltage application is y' and a printing time period in the initial cycle is y, then, the following equation is obtained: That is, the optimal time period for the voltage application y' in the current cycle is determined by an elapsed time (t - y) from the voltage application end timing t w in the preceding cycle according to equation (11). However, it is not practical to perform printing control while calculation of equation (11) is performed because it requires a long processing time. Therefore, equation (12) is obtained by approximating the elapsed time (t - y) with (t - n): In addition, since the duty cycle for each dot is usually constant in a printing period, if its printing cycle time is t c and the number of cycles without voltage application (i.e., cycles in which the paper is kept blank) from the preceding printing period is C y , a time interval when printing is not performed can be represented by: Cy·t c Therefore, an optimal voltage application time interval immediately after printing is not performed for the number C y of cycles can be given by substituting t = C y ·t c into equation (12): In this case, since τ, n, and T c are normally constants, a relationship between C y and y' can be calculated by using equation (13). Therefore, the voltage application time interval y' is calculated in advance by using the values τ, n, and T c experimentarily obtained with respect to the number C Y of cycles from one to, e.g., four or six values, and calculation results are stored in a control circuit as a table of correspondence between C y and y', so that printing time intervals are controlled by utilizing the stored values in a printing operation, thereby performing a stable printing operation without an accumulated heat of the printing head. In the above-described analysis, attention has been paid on only one print element of the printing head, and only the voltage application history of the print element head has been considered. In practice, for example, even if a voltage is not applied to a given print element for a long period of time, when a voltage is continuously applied to its adjacent print element, the given print element is influenced by the heat generation of the adjacent print element. Fig. 3 is a view for explaining the principle of control when the voltage application history data of two pairs of print elements on both sides of a print element to which a voltage is to be applied are considered. Referring to Fig. 3, each of 5 x 5 rectangles is a dot to be printed by a corresponding print element. Each column corresponds to five print elements, and rows respectively correspond to a current cycle, a cycle which is one ahead of the current cycle, a cycle which is two ahead thereof, a cycle which is three ahead thereof, and a cycle which is four ahead thereof, in the order from the lowermost row. A cross-hatched dot a₀ is taken into consideration. In the above-described analysis, the voltage application time of the dot a₀ is determined by using only the voltage application history data of dots a₁ to a₄ which are in the same column as the dot a₀ and are one to four ahead of the current cycle. In the present invention, however, a two-dimension control function is introduced so that a further reliable printing operation can be realized. More specifically, the aforementioned consideration of the influence of the voltage application history of a print element in the one to four preceding cycles on the voltage application time interval of the print element in the current cycle is also expanded to the two pairs of print elements on the both sides of the print element corresponding to the dot a₀. That is, as shown in Fig. 3, four dot groups adjacent to the dot a₀, i.e., one dot denoted by reference symbol A, three dots denoted by reference symbol B, three dots denoted by reference symbol C, and five dots denoted by reference symbol D are defined, each dot group is weighted, and the voltage application history data of each group is obtained as a factor for determining the voltage application time of the dot a₀ of interest. Fig. 4 shows a voltage waveform to be applied to the print element to print the dot a₀ when no voltage was applied to any of the dot groups A to D throughout the past four cycles. The voltage is applied during all time intervals t₀, t A , t B , t C , and t D . If a voltage was applied to any one of the dot groups A to D, voltage application is not performed during a corresponding time interval t A , t B , t C , or t D . For example, if voltages were applied to the dot groups A and C in the past, a pulse waveform to be applied in the current cycle can be given as shown in Fig. 5. Note that the length of the time interval t A to the time interval t D corresponds to the pulse width determined by equation (13). However, it is changed to an experimental value so as to realize optimally clear printing without departing from the present invention. A printing control circuit for performing pulse width control based on the above analysis according to an embodiment of the present invention will be described below. Fig. 6 is a block diagram showing the embodiment of the present invention. Referring to Fig. 6, serial data D for every drive cycle of a print head is supplied to input terminal 101 in synchronism with a clock input CLX to an input terminal 102. This serial data D is temporarily stored in a shift register 104. This input operation is performed simultaneously with a printing operation to be described later. A plurality of registers 105, 106, 107, 108, and 109 constitute a shift register. The shift register 104 is connected to the register 105. When all the one-cycle serial data D is input to the shift register 104, a shift pulse SFT is supplied from input terminal 103 to the registers 104 to 109. Then, the contents in the shift registers 104, 105, 106, 107, and 108 are respectively shifted to the registers 105, 106, 107, 108, and 109. As a result, the data to be currently printed is set in the register 105, and the data before one, two, three, and four cycles are set in the registers 106, 107, 108, and 109, respectively. At this time, input of data for the next cycle to the shift register 104 is started. The registers 105 to 109 are connected to a logic circuit 140 through data buses 110 to 114. With this arrangement, the contents in the registers 105 to 109 are input to the logic circuit 140. Fundamental timing signals T₀, T A , T C , and T D corresponding to the time intervals t₀, t A , t B , t C , and t D shown in Figs. 4 and 5 are input to input terminals 120, 121, 122, 123, and 124 of the logic circuit 140, respectively. The logic circuit 140 performs a logic operation on the basis of the fundamental timing signals T₀ to T D and the contents of the registers 105 and 109, obtains a signal waveform corresponding to a voltage pulse to be applied to a corresponding print element, and outputs the obtained signal waveform from a corresponding one of output terminals 130 to 139. Assume that the position of each dot of the groups A to D in Fig. 3 is represented by (n-i), (n-j) where n indicates that a dot of interest whose applied voltage is to be obtained is located at nth position from the left end position of the register, i indicates that each dot of the groups A to D is a dot of a cycle which is i ahead of the current cycle of the dot of interest, and j indicates that each dot of the groups A to D belong to a jth column from the column including the dot of interest to the left. When a dot is located in a jth column from the column including dot of interest to the right, j has a negative value. The state of each dot of the groups A to D is represented by R n-i,n-j . When a dot is printed, a value of 1 is given, and when a dot is blank, a value of 0 is given. For example, R n-1,n-2 represents the printing state of a dot of one cycle before the dot of interest and separated by two dots therefrom to the left. By representing each dot in this manner, the waveforms shown in Figs. 4 and 5 can be represented as a set of t₀ to t D by using fundamental timing signals T₀, T A , T B ... T D input to the input terminals 120 to 124, as follows: t₀ = R n,n ·T₀ (14) t A = R n,n ·( R n-1,n )·T A (15) t B = R n,n ·( R n-2,n + R n-1,n-1 + R n-1,n+1 )·T B = R n,n ·( R n-2,n ·R n-1,n-1 ·R n-1,n+1 )·TB (16) t C = R n,n ·( R n-2,n-1 ·R n-3,n ·R n-2,n+1 )·T C (17) t D = R n,n ·( R n-2,n-2 ·R n-3,n-1 ·R n-4,n ·R n-3,n+1 ·R n-2,n+2 )·T D (18) Therefore, if the waveform shown in Figs. 4 and 5 is T, then T = t₀ + t A + t B + t C + t D (19) Fundamental timing signals T₀,T A ,T B ,T C ,T D are normally set in order that a total of time for hatched portions in Figs. 4 and 5 corresponding to logic value of "1" are approximately equal to the time tw in the above equation (13). Thus, accumulated heat at the printing head is usually minimized or neglected so as to perform stable printing. Fig. 7 shows part of the logic circuit 140 according to the embodiment. Referring to Fig. 7, when attention is paid to a cross-hatched portion, logic represented by equations (14) to (19) is realized by logic gates 141 to 149. A voltage waveform to be applied to a print element corresponding to the dot of interest is output from an output terminal (130 + m), where m = 0 to 9. The logic circuit 140 shown in Fig. 7 corresponds to only one bit of the shift register. In practice, however, logic circuits each having the same arrangement as described above are prepared for all the print elements of the printing head, i.e., all the bits of the shift register 105. Since in practice, each logic circuit is constituted by an LSI, a plurality of LSIs connected to each other are used. In the circuit shown in Fig. 7, LSIs must store two excessive bits each in the terminal portions of the shift registers thereof. Fig. 8 shows a connection circuit satisfying the above requirement. Referring to Fig. 8, reference numerals 201 and 202 respectively denote LSIs. Assuming that the LSIs can control N-bit print elements, then each register must have a size of N + 2 bits. This is because, as shown in Fig. 8, in order to control Nth bit, data of bits 203, 204, 205, and 206 are required. The Nth data of the LSI 201 is input to the lowermost shift register of the LSI 202, and is sequentially shifted to the right. In this case, an (N-2)th output of the LSI 201 is input to the leftmost bit of the shift register of the LSI 202. This is because (N+1)th data of the LSI 202 corresponds to the leftmost bit of a print element to be controlled by the LSI 202, and the LSI requires data having the same contents as those of the (N-l)th- and Nth-bit data are required for heat control data for this (N+1)th bit. With the above-described arrangement, a printer having an arbitrary printing width can be realized by serially connecting a plurality of LSIs. As has been described above, the present invention comprises a logic circuit for determining the drive time of each print element of the printing head in consideration of the heat dissipation state of each print element in a non-drive period. Therefore, accumulated heat can be minimized even when the printing head is continuously used for a long period of time, and hence high-quality, clear printing patterns can be obtained even when a high-speed printing operation is performed.

Claims: A thermal printing control circuit having at least one printing control means comprising: a first serial/parallel shift register (104) for receiving and temporarily storing a series of serial image data to be serially printed; a plurality of second parallel registers (105-109) having several stages for parallelly storing parallel data output of said first register, for storing the state of each dot (R n-i, n-j ) of several past lines of image data, wherein n indicates the position of a dot of interest whose applied voltage is to be obtained, i indicates the cycle ahead of the current cycle of the dot of interest and j indicates the position of a dot relative to the dot of interest, and a thermal printing head having thermal print elements corresponding to respective bits of printing data to be printed which are stored in a register at the first stage (105) of said second registers; characterized by a first logic gate (140) receiving a plurality of fundamental timing signals (T₀, T A , T B , T C, T D ) sequentially inputted via input terminals (120-124), said several past lines of data stored in said second registers (105-109) and printing data to be printed and performing a logic operation for determining time intervals (t₀, t A , t B , t C t D ) in accordance with the following equations so that heat balance at the thermal print elements is effected: t₀ = R n,n ·T₀ t A = R n,n ·( R n-1,n )·T A t B = R n,n ·( R n-2,n + R n-1,n-1 + R n-1,n+1 )·T B = R n,n ·( R n-2,n ·R n-1,n-1 ·R n-1,n+1 )·TB t C = R n,n ·( R n-2,n-1 ·R n-3,n ·R n-2,n+1 )·T C t D = R n,n ·( R n-2,n-2 ·R n-3,n-1 ·R n-4,n ·R n-3,n+1 ·R n-2,n+2 )·T D a second logic gate for further determining the total time for the application of a voltage to said dot of interest represented in the following equation: T = t₀ + t A + t B + t C + t D A thermal printing control circuit according to claim 1 further comprising: a plurality of said printing control means, and a connecting means for connecting said printing control means.

Inventors: DEGUCHI, HISASHI C/O SUSUMU CO., LTD., FUKUSHIMA, ITARU, OKAMOTO, TAKASHI C/O SUSUMU CO., LTD.
Applicants: NEC CORPORATION, SUSUMU INDUSTRIAL CO., LTD.
Application year: 1988
Main classification: B41J2
IPC codes: G06K15, B41J2, H04N1