COMPARATOR CIRCUIT

Abstract: A comparator circuit comprising a differential amplifier (2) supplied with a reference signal (V ref ) and an input signal (V in ), a resonant-tunneling transistor (3) having a base supplied with an output signal of the differential amplifier (2) a collector connected to a first power supply source (V cc ) via a resistor (1), and an emitter connected to a second power supply source (V ee ), is provided, and therefore, it is possible to simplify a circuit configuration of the comparator circuit and to improve an operation speed of the comparator circuit by outputting an output signal from a connection portion between the resistor and the collector of the transistor. The comparator circuit utilises the differential negative resistance characteristic of the resonant-tunneling transistor.

Description: The present invention relates to a comparator circuit. Generally, a comparator circuit comprises a differential amplifier and a plurality of transistors. The differential amplifier is supplied with an input signal and a reference signal and compares the input signal and the reference signal, and the transistors of the comparator circuit are supplied with a clock signal for outputting a digital signal from an output signal of the differential amplifier. When the input signal is lower than the reference signal, a low level clock signal is output from the comparator circuit, and when the input signal is higher than the reference signal, a high level clock signal is output from the comparator circuit. That is, the change of the output pulse of such a comparator circuit can be produced by a small difference in level between the input signal and the reference signal. However, the existing comparator circuit has several problems; for example, the existing comparator circuit needs a plurality of transistors, such as traditional bipolar transistors or field effect transistors, and thus the configuration of the existing comparator circuit tends to become complex and the operation speed thereof is too slow. Further, the existing comparator circuit also needs a clock signal for outputting the output pulse from a small difference in level between the input signal and the reference signal, and therefore the output signal of the existing comparator circuit is not output until the clock signal has changed. The problems of the existing comparator circuit will be explained below in detail. Recently, a resonant-tunnelling transistor having a resonant-tunnelling barrier for injecting electrons has been developed. This type of transistor includes the so-called resonant-tunnelling hot-electron transistor and resonant-tunnelling bipolar transistor, and has negative differential resistance characteristics and a high-speed of operation. US-A-3 176 152 discloses a current switching circuit having the features of the preamble of accompanying claim 1. EP-A-0 177 374 discloses a high-speed semiconductor device including a hot electron transistor (HET) which includes a heterojunction emitter, base, collector, and a superlattice means between the emitter and the base. According to the present invention, there is provided a comparator circuit comprising:- a first power supply means; a second power supply means; a resistor connected to said first power supply means; a differential amplifier arranged to be supplied with a first input signal and a second input signal; a transistor having a base operatively connected to said differential amplifier for receiving an output signal of said differential amplifier, a collector operatively connected to said first power supply means via said resistor, and an emitter operatively connected to said second power supply means; and an output terminal operatively connected to a connection portion between said collector of said transistor and said resistor, for outputting an output signal of said comparator circuit; characterised in that:- said transistor is a resonant-tunnelling transistor comprising an emitter layer, a base layer, a collector layer, a well layer including a sub-band formed between said emitter layer and said base layer, a first barrier layer having a specific thickness to enable tunnelling of charge carriers and formed between said well layer and said emitter layer, and a second barrier layer having a specific thickness to enable tunnelling of charge carriers and formed between said well layer and said base layer; said resonant-tunnelling transistor having negative differential resistance characteristics including a peak current value and a valley current value in the characteristic of collector current against base-emitter voltage; and in that said differential amplifier is adjusted to provide an output voltage as a first base-emitter voltage, lower than a voltage value corresponding to said peak current value, so that the collector current of said transistor flows, when said differential amplifier outputs a low-level signal, and to provide an output voltage as a second base-emitter voltage, higher than a voltage value corresponding to said valley current value, so that the collector current of said transistor does not flow, when said differential amplifier outputs a high-level signal. An embodiment of the present invention may provide a comparator circuit which comprises a differential amplifier supplied with a reference signal and an input signal, a resonant-tunnelling transistor having a base supplied with an output signal of the differential amplifier, a collector connected to the first power supply means via a resistor, and an emitter connected to the second power supply means, by which it is possible to simplify the circuit configuration and improve the operation speed of the comparator circuit by outputting an output signal from a connection portion between the resistor and the collector of the transistor. Reference is made, by way of example, to the accompanying drawings, wherein:- Fig. 1 is a circuit diagram illustrating one example of an existing comparator circuit; Fig. 2 is a diagram for explaining an operation of the comparator circuit shown in Fig. 1; Figs. 3a and 3b are views representing a structure and an energy state of a resonant-tunnelling hot-electron transistor made of GaAs/AlGaAs; Fig. 3c is a view representing an energy state of a resonant-tunnelling bipolar transistor made of GaAs/AlGaAs; Figs. 4a, 4b and 4c are graphs illustrating energy states of the resonant-tunnelling hot-electron transistor shown in Fig. 3a; Fig. 5 is a graph illustrating the characteristics of the resonant-tunnelling hot-electron transistor shown in Fig. 3a; Figs. 6a and 6b are views representing a structure and an energy state of a resonant-tunnelling hot-electron transistor made of GaInAs/(AlGa)InAs; Fig. 7 is a basic circuit block diagram illustrating a comparator circuit embodying the present invention; Fig. 8 is a circuit diagram illustrating one embodiment of a comparator circuit according to the present invention; Fig. 9 is a graph illustrating a characteristic of a resonant-tunneling transistor used in a comparator circuit according to the present invention; and, Fig. 10 is a diagram for explaining an operation of the comparator circuit shown in Fig. 8. For a better understanding of the preferred embodiments, the problems of the related art will be first explained. Figure 1 is a circuit diagram illustrating one example of an existing comparator circuit. As shown in Fig. 1, for example, an existing comparator circuit comprises a differential amplifier 102 and a plurality of transistors 131 - 134. The differential amplifier 102 includes two resistors 121, 122 and two transistors 123, 124. The collectors of the transistors 123 and 124 are supplied with a high level power supply potential V cc via the resistors 121 and 122 respectively, the emitters of the transistors 123 and 124 are commonly connected to a collector of the transistor 133; the base of the transistor 123 is supplied with an input signal V in , and the base of the transistor 124 is supplied with a reference signal V ref . An output signal V OUT is produced from the connection portion between the collector of the transistor 124 and the resistor 122, and an inverted output signal V OUT is produced from the connection portion between the collector of the transistor 123 and the resistor 121. The output signal V OUT is applied to the base of the transistor 131 and the collector of the transistor 132, and the inverted output signal V OUT is applied to the collector of the transistor 131 and the base of the transistor 132. Further, the emitters of the transistors 131 and 132 are commonly connected to the collector of the transistor 134. The base of the transistor 133 is supplied with a clock signal CLK, and the base of the transistor 134 is supplied with an inverted clock signal CLK . The emitters of the transistor 133 and 134 are connected to a low level power supply (for example, an earth GND) via a resistor 104. Figure 2 is a diagram for explaining an operation of the comparator circuit shown in Fig. 1. When the input signal V in applied to the differential amplifier 102 is higher than the reference signal V ref , as clearly shown in Fig. 2, a latch operation is started and the output signal V OUT is changed from a lower output pulse to an upper output pulse in the existing comparator circuit shown in Fig. 1. Therefore, the change of the output pulse can be produced by a small difference in level between the input signal V in and the reference signal V ref . In the existing comparator circuit as described above, a problem arises in that the circuit configuration has a tendency to become complex, for example, the differential amplifier 102 is constructed by a plurality of transistors 131 - 134, etc. Furthermore, the clock signal CLK is necessary in the existing comparator circuit to produce the change of the output pulse from a small difference in level between the input signal V in and the reference signal V ref . Additionally, in the existing comparator circuit, when the relationship of the signal level between the input signal V in and the reference signal V ref is inverted, the output pulse of the output signal V OUT is not changed until the next pulse signal of the clock signal CLK is output, and thus a problem arises in that the operation speed of the existing comparator circuit is too slow. Next, a description will be given of the principle of a resonant-tunneling transistor (RTT) having a resonant-tunneling barrier for injecting electrons. This resonant-tunneling transistor includes a resonant-tunneling hot-electron transistor (RHET) and a resonant-tunneling bipolar transistor (RBT), and has negative differential resistance characteristics and a high speed operation. Figure 3a is a sectional view of a semifinished RHET device made of GaAs/AlGaAs, and Fig. 3b is a graph of an energy band of the RHET device in Fig. 3a. In Fig. 3a, the resonant-tunneling transistor device consists of a collector electrode 38, and n⁺-type GaAs collector layer 31 formed on the collector electrode 38, a non-doped impurity Al y Ga 1-y As (e.g., Y = 0.3) collector side potential barrier layer 32 on the collector layer 31, an n⁺-type GaAs base layer 33 on the potential barrier layer 32, a superlattice layer 34, and n⁺-type GaAs emitter layer 35, an emitter electrode 36, and a base electrode 37. The superlattice layer 34 consists of an Al x Ga 1-x As barrier layer 34A₁, a non-doped impurity GaAs quantum well layer 34B, and an Al x Ga 1-x As barrier layer 34A₂. The superlattice layer 34 functions as an emitter side potential barrier. In this specification, the superlattice is defined such that at least one quantum well is provided therein. In Fig. 3a, a plurality of quantum wells may be formed. In Fig. 3b, reference E c represents a bottom of a conduction-energy band, and E x an energy level of a sub-band at the quantum well. Referring to Figs. 4a, 4b and 4c, the principle of the operation of the resonant-tunneling transistor device will be described. Figure 4a is a graph of an energy band of the RHET device shown in Fig. 3a. When a voltage V BE between the base layer 33 and the emitter layer 35 is lower than 2·E x /q, wherein q represents a charge of carriers, or is too low, for example, approximately zero volts. In Fig. 4a, although a voltage V CE exists between the collector layer 31 and the emitter layer 35, electrons at the emitter layer 35 cannot reach the base layer 33 by tunneling through the superlattice layer 34, since the base-emitter voltage V BE is almost zero. Therefore, a level of an energy E FE , namely a quasi-Fermi level E x at the sub-band. Accordingly, a current does not flow between the emitter layer 35 and the collector layer 31. Reference Φ c represents a conduction-band discontinuity. Figure 4b is a graph of an energy band of the RHET device, when the base-emitter voltage V BE is approximately equal to 2·E x /q. In Fig. 4b, the energy level E FE at the emitter layer 35 is substantially equal to the energy level E x of the sub-band at the quantum well layer 34B. As a result, due to a resonant-tunneling effect, electrons at the emitter layer 35 are passed through the superlattice layer 34 and injected in the base layer 33. The potential of the injected electrons, for example, 0.3 eV, is converted to kinetic energy, bringing the electrons to a "hot" state. The hot electrons are ballistically passed through the base layer 33 and reach the collector layer 31, and as a result, a current flows between the emitter layer 35 and the collector layer 31. Figure 4c is a graph of an energy band of the RHET device shown in Fig. 3a, when the base-emitter voltage V BE is higher than 2·E x /q. In Fig. 2c, the energy level E FE at the emitter layer 35 is higher than the energy level E x of the sub-band at the quantum well layer 34B. The resonant tunneling effect does not occur, and the electrons are not introduced from the emitter layer 35 to the base layer 33. Consequently, the current flowing into the RHET device is reduced. On the other hand, by decreasing the barrier height of the barrier layer 34A, adjacent to the base layer 33 to a suitable value, the electrons may be directly tunneled through the barrier layer 34A₂ adjacent to the emitter layer 35, and as a result, a certain amount of collector current may flow. Figure 3c is a graph representing an energy band of a resonant-tunneling bipolar transistor (RBT) made of GaAs/AlGaAs. The RBT consists of an emitter layer of n⁺-type GaAs, a base layer of p⁺-type GaAs, and a collector layer of n⁺-type GaAs. The emitter layer includes a superlattice having at least one quantum well with a sub-band energy E x . The base layer and the collector layer are PN-joined. The RBT also applies a resonant-tunneling effect and the principle of the operation thereof is similar to that of the RHET, and therefore, an explanation thereof is omitted. Figure 5 is a graph illustrating the characteristics of the RHET device set forth above. In Fig. 5, the abscissa indicates the base-emitter voltage V BE and the ordinate indicates the collector current I c . Curves C₁, C₂, C₃ and C₄ represent the characteristics when the collector-emitter voltage V CE are representatively 2.5 volts, 2.0 volts, 1.5 volts and 1.0 volt. The curves indicate N-shaped differential negative-resistance characteristics. The present invention uses this feature to realize a comparator circuit. Figures 6a and 6b are views representing a structure and an energy state of a resonant-tunneling hot-electron transistor made of GaInAs/(AlGa)InAs. The GaInAs/(AlGa)InAs RHET has a preferable characteristic to that of the GaAs/AlGaAs RHET described above. In Fig. 6a, the resonant-tunneling transistor device consits of an InP substrate 60, an n-type GaInAs collector layer 61 formed on the substrate 60, an (Al 0.5 Ga 0.5 ) 0.48 In 0.52 As collector barrier layer 62 formed on the collector layer 61, an n-type GaInAs base layer 63 formed on the collector barrier layer 62, a superlattice layer 64, an n-type GaInAs emitter layer 65, an emitter electrode 66, a base electrode 67, and a collector electrode 68. The superlattice layer 64 consists of a quantum well layer 64B and two barrier layers 64A₁ and 64A₂; the quantum well layer 64B being sandwiched between the two barrier layers 64A₁ and 64A₂. For example, the quantum well layer 64B acting as the hot electron injector is formed as a 3.81 nm Ga 0.47 In 0.53 As layer, and the two barrier layers 64A₁ and 64A₂ are formed as 4.4 nm Al 0.47 In 0.53 As layers respectively. Furthermore, the base layer 63 is 25 nm and 100 nm thick and has a carrier concentration of 1 x 10¹⁸ cm⁻³, and the collector barrier layer 62 is 200 nm thick with a 6 nm compositional graded stepwise layer to reduce quantum mechanical reflections. Note, the Γ - L valley separation energy of the GaInAs/(AlGa)InAs RHET is higher than that of the GaAs/AlGaAs RHET (0.30 eV). That is, in this GaInAs/(AlGa)InAs RHET device, the Γ - L valley separation energy of Ga 0.47 In 0.53 As is about 0.55 eV and is high enough for practical use. Now, preferred embodiments of the present invention will be described. Figure 7 is a basic block diagram of a comparator circuit embodying the present invention. As shown in Fig. 7, a comparator circuit comprises a first power supply means V cc , a second power supply means V ee , a resistor 1, a differential amplifier 2, a resonant-tunneling transistor 3, and an output terminal V OUT . The resistor 1 is connected to the first power supply means V cc . The differential amplifier 2 is supplied with a reference signal V ref and an input signal V in . The resonant-tunneling transistor 3 has a base, a collector, and an emitter. The base of the transistor 3 is operatively connected to the differential amplifier 2 for receiving an output signal of the differential amplifier 2; the collector of the transistor 3 is operatively connected to the first power supply means V cc via the resistor 1; and the emitter of the transistor 3 is operatively connected to the second power supply means V ee . The output terminal V OUT is operatively connected to a connection portion between the collector of the transistor 3 and the resistor 1 for outputting an output signal of the comparator circuit. Figure 8 is a circuit diagram of one embodiment of a comparator circuit according to the present invention. As shown in Fig. 8, a comparator circuit of the present invention comprises a differential amplifier 2 and one resonant-tunneling transistor 3. This resonant-tunneling transistor (RTT) is, for example, an RHET or an RBT as described above. The characteristic of the resonant-tunneling transistor, for example, GaInAs/(AlGa)InAs RHET, is shown in Fig. 9. The resonant-tunneling transistor has a characteristic such that the collector current against a base-emitter voltage is increased, decreased, and again increased. The collector current exhibits a pronounced peak due to resonant-tunneling. For example, in the GaInAs/(AlGa)InAs RHET shown in Fig. 9, the peak collector current 2.8 x 10⁴ A/cm² and the peak-to-valley ratio reaches 15.0. The differential amplifier 2 includes two resistors 21, 22 and two transistors 23, 24; the collectors of the transistors 23 and 24 are supplied with a high level power supply potential V cc via the resistors 21 and 22 respectively, and the emitters of the transistors 23 and 24 are commonly connected to one end of the resistor 4. Further, the base of the transistor 23 is supplied with a reference signal V ref , and the base of the transistor 24 is supplied with an input signal V in . In the above description, the other end of the resistor 2 is connected to a low level power supply (for example, an earth GND). Note, the resistors 1, 21, 22 and 24 are made of metal silicide or metal nitride by a sputtering method, to protect a heterostructure of the resonant-tunneling transistor 3. If these resistors 1, 21, 22 and 24 are made by an ion implanation method, the heterostructure of the transistor 3 is destroyed. The output signal produced by the connection portion between te collector of the transistor 23 and the resistor 21 is applied to the base of the resonant-tunneling transistor 3. Note, the output signal level of the differential amplifier 2 is changed to a high level and a low level. Referring to Fig. 9, the high output signal level of the differential amplifier 2 is higher than the voltage of the valley 12, and the low output signal level of the differential amplifier 2 is lower than the voltage of the peak 11. Note, the voltage of the valley 12 is almost equal to the voltage of the peak 11, which is inidicated as the reference V BEO of the characteristic curve of the transistor 3 shown in Fig. 9. Referring to Fig. 8, the collector of the resonant-tunneling transistor 3 is supplied with the high level power supply potential V cc via a resistor 1, and the emitter of the transistor 3 is supplied with a potential higher by a potential level V₁ than the earth potential GND. An output signal V OUT is produced from the connection portion between the resistor 1 and the collector of the transistor 3. As described above, a comparator circuit of the present invention can be simply formed by only a few elements, and the clock signal CLK is not needed. Furthermore, the response time of the comparator circuit can be further shortened by using RHET's, RBT's or HEMT's having a high speed operation ability as the transistors 23 and 24 of the differential amplifier 2. Note, it is, of course, understood that the transistors of the comparator circuit can be formed by the same type transistors, e.g., RBT's. In case where the transistors 23 and 24 are RHETs or RBTs, it should be noted that the base emitter voltage thereof should be limited to the voltage range lower than the voltage of the negative resistance. Figure 10 is a diagram for explaining an operation of the comparator circuit shown in Fig. 8. In the comparator circuit shown in Fig. 8, when the input signal V in applied to the differential amplifier 2 is lower than the reference signal V ref , the transistor 23 of the differential amplifier 2 is switched ON and the collector of the transistor 23 is at the low level. Next, the base of the resonant-tunneling transistor 3 becomes low level (that is, the base-emitter voltage is lower than the potential V BEO ) and the collector current flows, so that the output signal V OUT is at the low level. Conversely, when the input signal V in applied to the differential amplifier 2 is higher than the reference signal V ref , the transistor 23 of the differential amplifier 2 is switched OFF and the collector current of the transistor 23 does not flow, and therefore, the collector of the transistor 23 is at the high level, i.e., high level power supply potential V cc . Next, the base of the resonant-tunneling transistor 3 is at the high level (that is, the base-emitter voltage is higher than the potential V BEO ) and the collector current does not flow. Consequently, the output signal V OUT is at the high level (the high level power supply potential V cc ). Note, when the input signal V in is higher than the reference signal V ref , the output signal (the base-emitter voltage of the transistor 3) of the differential amplifier 2 is almost at the level of the valley 12 of the characteristic curve of the transistor 3 shown in Fig. 9. In this way, in the comparator circuit of the present embodiment, when the level between the input signal V in and the reference signal V ref is changed, the output signal V OUT can be changed instantaneously. Further, the operation speed of the resonant-tunneling transistor 3 is very fast and the elements of the circuit very few, and therefore, the response time is very short. In accordance with the present invention as described above, the comparator circuit comprises a differential amplifier arranged to be supplied with a reference signal and an input signal, a resonant-tunneling transistor having a base arranged to be supplied with an ouptut signal of the differential amplifier, a collector connected to the first power supply means via the resistor, and an emitter connected to the second power supply means. Therefore, it is possible to simplify the circuit configuration of the comparator circuit and to improve an operation speed of the comparator circuit by outputting an output signal from a connection portion between the resistor and the collector of the transistor. A comparator circuit embodying the present invention may be used as or included in an analog-to-digital converter.

Claims: A comparator circuit comprising:- a first power supply means (V cc ); a second power supply means (V ee ); a resistor (1) connected to said first power supply means; a differential amplifier (2) arranged to be supplied with a first input signal (V ref ) and a second input signal (V in ); a transistor (3) having a base operatively connected to said differential amplifier for receiving an output signal of said differential amplifier, a collector operatively connected to said first power supply means via said resistor, and an emitter operatively connected to said second power supply means; and an output terminal (V out ) operatively connected to a connection portion between said collector of said transistor and said resistor, for outputting an output signal of said comparator circuit; characterised in that:- said transistor (3) is a resonant-tunnelling transistor comprising an emitter layer (35, 65), a base layer (33, 63), a collector layer (31, 61), a well layer (34B, 64B) including a sub-band formed between said emitter layer (35, 65) and said base layer (33, 63), a first barrier layer (34A2, 64A2) having a specific thickness to enable tunnelling of charge carriers and formed between said well layer (34B, 64B) and said emitter layer (35, 65), and a second barrier layer (34A1, 64A1) having a specific thickness to enable tunnelling of charge carriers and formed between said well layer (34B, 64B) and said base layer (33, 63); said resonant-tunnelling transistor having negative differential resistance characteristics including a peak current value and a valley current value in the characteristic of collector current against base-emitter voltage; and in that said differential amplifier (2) is adjusted to provide an output voltage as a first base-emitter voltage, lower than a voltage value corresponding to said peak current value, so that the collector current of said transistor (3) flows, when said differential amplifier (2) outputs a low-level signal, and to provide an output voltage as a second base-emitter voltage, higher than a voltage value corresponding to said valley current value, so that the collector current of said transistor (3) does not flow, when said differential amplifier (2) outputs a high-level signal. A comparator circuit as claimed in claim 1, wherein said resonant-tunnelling transistor (3) comprises a resonant-tunnelling hot-electron transistor. A comparator circuit as claimed in claim 1, wherein said resonant-tunnelling transistor (3) comprises a resonant-tunnelling bipolar transistor. A comparator circuit as claimed in claim 1 or 2, wherein said resonant-tunnelling transistor (3) comprises a GaAs/AlGaAs heterostructure. A comparator circuit as claimed in claim 1 or 2, wherein said resonant-tunnelling transistor (3) comprises a GaInAs/(AlGa)InAs heterostructure. A comparator circuit as claimed in any preceding claim, wherein said differential amplifier (2) comprises transistors (23, 24) which are the same type as said resonant-tunnelling transistor (3). A comparator circuit as claimed in any preceding claim, wherein said resistor (1) is made of metal silicide or metal nitride by a sputtering method. A comparator circuit as claimed in any preceding claim, which is used as an analog-to-digital converter.

Inventors: IMAMURA, KENICHI, TAGUCHI, MASAO
Applicants: FUJITSU LIMITED
Application year: 1988
Main classification: H03K5
IPC codes: H03K5, H01L29