FIELD EMISSION DEVICES

Abstract: In a method of forming a field-induced emission device, a cathode (3) is provided on a substrate (4), for example by etching away the substrate to leave a pointed projection. The projection may be covered with a metallic layer (5) to enhance the field-induced cathode emission. A first insulating layer (7) is formed over the substrate, with an aperture therein corresponding to the cathode position. An apertured control grid layer (9) is formed over the first insulating layer and an apertured second insulating layer (15) is formed thereon. A tunnel (18) formed by the apertures in the insulating and conductive layers is filled with a plug (19) of soluble material. An anode strip (21) is formed on the second insulating layer (15) and over the plug, and the plug is then dissolved through gaps at the edges of the anode strip, thereby leaving an unsupported area of anode strip over the cathode. The tunnel (18) may then be evacuated or may be filled with gas and the gaps at the edges of the anode strip will then be sealed to retain the vacuum or gas. If a diode structure is required, the control grid layer and the second insulating layer will be omitted. A switching device may be constructed by associating a number of the cathodes on the substrate with a common control grid and a common anode. The anode, grid and cathode structures may be so dimensioned as to form a transmission line.

Description: This invention relates to vacuum and gas-filled valve devices in which electrons are emitted from a cold cathode by virtue of a field emission process. US-A-4 578 614 discloses a field-emitter switching device in which cathode, grid and anode structures are formed on a substrate, such that the structures are substantially coplanar. This device is a vacuum integrated-circuit type device made with VMOS and planar semiconductor device processing technology. EP-A-0 234 989 discloses a switching device comprising a substrate, an insulating layer and a grid electrode successively formed on said substrate, and an anode layer disposed over and spaced from the grid layer. US-A-4 008 412 describes a thin-film field-emission electron source comprising a first anode and a needle-like emitter arranged very closely to the first anode. There is an insulating layer between the first anode and a substrate which is constructed as one body with the emitter. From JP-A-53-121 454, a thin-film field-emission electron source is known comprising a needle-like emitter formed on a substrate within a hole of a first insulating layer formed on the substrate and within a corresponding aperture of an electron ray drawing out electrode formed on the first insulating layer. A second insulating layer and a control electrode having also corresponding apertures are successively formed on this structure. Over the past thirty years, semiconductor device technology has replaced vacuum valve technology for all but the most specialised electronic applications. There are many reasons for the preference for semiconductor devices. For example, they have a higher operating speed than vacuum devices, they are more reliable, they are considerably smaller and they are cheaper to produce. Furthermore, their power dissipation is much lower, particularly when compared with thermionic vacuum devices which require a considerable amount of cathode heating power. However, it has become apparent that at least in one respect vacuum valve devices are greatly superior to devices based on solid state materials. The vacuum devices are far less affected by exposure to extreme or hostile conditions, such as high and low temperatures. Because the band gaps of useful semiconductors are necessarily of the order of lev and many other interband excitations are lower than this, excitation of intrinsic carriers occurs at temperatures only slightly above room temperature. This severely modifies the characteristics and the performance of semiconductor devices. In addition, the electron occupancy of the traps and other defect states which determine the properties of semiconductor structures is extremely temperature sensitive. The problems become increasingly acute with the trend towards smaller semiconductor devices and higher integration density. Vacuum devices, on the other hand, suffer to a much smaller extent from such problems. The density of the conduction electrons which are responsible for thermionic and field emission processes is not dependent on temperature, and because the devices have barriers with large work functions, thermal activation requires a temperature of at least 1000°K. Furthermore, it is now recognised that the most important of the previously-accepted advantages of semiconductor devices, namely their integrability and their cheapness of manufacture, derive largely from the small size of the devices rather than from their solid state nature. Hence, if vacuum devices were made in a micron size range, such devices could be insensitive to environment, whilst being as small and fast as current semiconductor devices. Indeed, it is possible that such vacuum devices could be made to operate even faster than semiconductor devices, since the ultimate speed of the electrons in vacuo would be the speed of light, whereas that in a semiconductor device is limited to a considerably lower value by scattering or by phonon emission. Although some recent work has been done on thermionic devices, it is likely that field emission devices will prove more successful, because the field emission effect is less dependent upon temperature. We have previously proposed a method of forming a vacuum device in which cathode, grid and anode structures are formed on a substrate, such that the structures are coplanar and the electron flow is substantially parallel to the substrate (cf. EP-A-0 260 075). The fabrication of such a device is simple to achieve, but the device suffers from the disadvantage that the electron path is long, which may result in a loss of operational efficiency in the device. Furthermore, large-scale integration of such devices is limited, because only a relatively low packing density can be achieved due to the flat electrode configuration. It is an object of the present invention to provide an improved field-induced emission device which allows a higher packing density. According to one aspect of the invention there is provided a method of forming a field-induced emission device, comprising forming a cathode body on a substrate; forming thereover an electrically-insulating layer having an aperture therein through which the cathode body is revealed; filling the aperture with a plug of soluble material; forming a strip of electrically-conductive material on the insulating layer and extending across the plug; and dissolving the plug from beneath the conductive strip to leave a portion of the strip suspended across the aperture and spaced from the cathode body, to act as an anode. An electrically-conductive layer may be disposed between the substrate and the conductive strip, the conductive layer being provided with an aperture therethrough, the apertures in the conductive and insulating layers being substantially coaxial, whereby the edge of the conductive layer around its aperture acts as a control electrode. According to another aspect of the invention there is provided a field-induced emission valve device for electrical conduction between a cathode body and a single anode, comprising a substrate; the cathode body formed on the substrate; an electrically insulating layer deposited over the substrate and having an aperture therethrough through which the cathode body is revealed; and a strip of electrically-conductive material supported by the insulating layer and extending across the aperture and spaced from the cathode body, to act as the single anode; wherein the cathode body is structured for field-induced electron emission therefrom at an anode-cathode voltage less than will cause breakdown of the insulating layer. According to a further aspect of the invention there is provided a switching device according to claim 21. Due to the small size of individual devices which can be achieved by the invention, a large number of the devices, for example 10⁶ or 10⁸ devices, may be fabricated on a single 10cm diameter silicon wafer. Large-scale integration may therefore be achieved with directly, resistively or capacitively coupled arrays of devices. Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:- Figures 1 - 12 show schematic cross sections through a device in accordance with the invention, at respective stages in the manufacture of the device; Figure 13 is a schematic plan view of a cathode metallisation layer; Figures 14 and 15 are schematic plan views of the device before and after deposition of an anode layer; Figure 16 is a schematic cross section through an alternative form of device in accordance with the invention, Figure 17 is a schematic partly cut away cross section through a number of field-emission devices in accordance with the invention forming a switching device, and Figure 18 is a schematic cross section through an alternative form of switching device. Referring to Figures 1 and 2, a first operation in a method of manufacturing a field-induced emission device comprises forming a cathode body of pyramid shape projecting from a silicon substrate. The pointed shape of the cathode body is conducive to field-induced emission from the cathode. The cathode body is formed by firstly growing a thin silicon dioxide layer on a substrate 1, masking a rectangular pad area, and etching away the unmasked parts of the silicon dioxide layer to leave a rectangular pad 2 of silicon dioxide immediately over the desired position for the cathode body. This pad acts as a mask for subsequent wet etching of the silicon substrate, using a conventional crystallographic etch. By this process a tapered, generally pyramid-shaped body 3 is left projecting from the remaining part 4 of the substrate 1. The pad 2 is then removed in hydrofluoric acid. Although the silicon may itself be suitable for use as a cathode, it may be preferable to coat the silicon with a thin layer 5 (Figure 3) of a metal, such as refractory tungsten or molybdenum or a composite layer comprising a plurality of metal layers. The metal or composite layer 5 is deposited over the cathode body 3, the layer being shaped, by masking after deposition, followed by etching to remove the unmasked areas to leave a bond pad region 6 (Figure 13) connected to the cathode body 3 by a strip 27. Alternatively, the layer 5 may be so structured by masking before deposition followed by removal of surplus metal with the mask. The metal cathode coating 5 enhances the field-induced electron emission of the cathode body, protects it from contamination and provides a more mechanically stable emission surface. The bond pad region 6 provides low resistance means by which an electrical bias potential can be applied to the cathode. A layer 7 of insulating dielectric (Figure 4) is next deposited over the metallisation 5 by a chemical vapour deposition process. The layer preferably comprises an undoped layer of borophospho silicate glass (BPSG) of, say, 0.2 - 0.5 µm thickness, covered by a 1-2 µm layer of doped BPSG. Such a layer is initially non-planar, but a degree of surface smoothing is achieved by heating the device in a furnace at 900°C to 950°C in a steam atmosphere. Alternatively, or additionally, planarisation may be achieved by applying supplementary planarising coatings, as a resist or spin-on glass material, and by using a controlled etch back technique. Provided that the rate of etching of the planarising coating matches that of the underlying BPSG layer, a planarised surface will result. During the etching process, particularly if the cathode body has not been metallised, it must be ensured that the tip 8 of the cathode is not exposed to the etchant, as this could remove the sharp point at the tip and thereby degrade the emission characteristic of the cathode. A control grid lying in the same plane as the tip of the cathode body is next formed. A polysilicon layer 9 (Figure 5) is deposited over the BPSG layer 7, and the layer 9 is then doped to reduce its sheet resistance. The layer 9 is then shaped (Figures 6 and 14) by etching, to form it into a rectangular frame 10 encircling the cathode, and a bond pad region 11 connected to the frame 10 by a strip 12. The frame 10 of the polysilicon layer 9 has an aperture 13 symmetrically disposed around the tip 8 of the cathode 3. Using the frame 10 as a mask, a region 14 of the oxide layer 7 around the cathode body is etched away (Figure 7) using a hydrofluoric acid dip. At the same time, the oxide layer is removed from over the cathode bond pad region 6. The device is then cleaned and a further composite layer 15 (Figure 8) of undoped and doped (BPSG) oxide is deposited and planarised. If necessary, the surface may then be smoothed further by controlled etching, as described above. The layer 15 is then masked by a resist layer 16 (Figure 9) having an aperture 17 therethrough, symmetrically disposed over the tip 8 of the cathode. The aperture 17 is preferably smaller than the aperture 13 in the polysilicon grid layer 9. Dry and wet etching processes are then used to form a tunnel ("lift shaft") 18 down through the oxide layer 15 to the cathode body 3, and to uncover the edge of the polysilicon grid layer 9 around the cathode tip. At the same time, the oxide layer 15 is removed from over the cathode and grid bond pad regions 6 and 11. The resist layer 16 is then removed and the device is again cleaned. A thick layer of a resist or of photosensitive polyimide is deposited over the surface. Optimisation of the resist coating technique, the choice of resist material, i.e. its solids content and its viscosity, and control of the baking procedure, will result in a planarised layer. A number of coatings may be required in order to improve the surface planarity and to achieve the required spacing between the grid layer 9 and the subsequently-formed anode. A mask is then used to lithographically define a circular plug 19 of the resist filling the interior of the tunnel 18 (Figure 10). The diameter of the portion of the plug above the oxide layer 15 is larger than the diameter of the aperture in that layer. A layer of metal 20 (Figure 11) of, say, 1 µm thickness is then deposited, by evaporation or sputtering, over the layer 15 and over the plug 19. Lithographic masking of the required anode area is followed by dry etching to define an anode strip 21 (Figures 12 and 15). The width of the strip is such that the plug is exposed at opposite edges 22, 23 of the strip. During the operation, metallic bonding pads are formed over the bond pad regions 6 and 11. The remaining resist material is then removed from over the layer 15, and the resist plug 19 is removed from beneath the anode, via the gaps at the edges 22 and 23, by soaking the device in fuming nitric acid. This results in the anode strip 21 bridging the tunnel 18 as shown in Figure 12. The strip 21 is self-supporting. The unsupported span of the anode strip may be, say, 0.4 - 5 µm. The wall of the tunnel 18 and the associated layers are then cleaned, using O₂ ashing or ultraviolet-generated ozone, to remove any organic residues therefrom. The device thus formed is a vertically-configured triode, with the anode spaced from the grid and the cathode, and with an open passage therebetween. It will be apparent, however, that the grid layer 9 and the insulating layer 15 could be omitted, so that a diode structure is formed. It would, alternatively, be possible to deposit one or more additional insulating layers and electrode layers before depositing the anode, to provide a multi-grid structure. The apertures through the successive insulating and electrode layers might then be staggered so that there is no direct line-of-sight path between the cathode and the anode. This would help to prevent ion bombardment of the cathode. As the tunnel 18 in the above-described device is not sealed (due to the apertures at the edges 22 and 23 of the anode strip 21), the device requires an auxiliary evacuated environment for its operation. The need for such environment can be eliminated by closing those gaps. This may be achieved by depositing a further layer 24 of metal, for example, aluminium, (Figure 16) over the anode and the underlying insulating layer 15, in a vacuum environment. That layer would then be shaped, by masking and etching, to redefine the anode and to isolate the bond pads from each other and from the anode. Although in the above-described embodiments only a single set of cathode, grid and anode structures is provided, it would clearly be possible to form many of such sets of structures simultaneously on a single substrate. Such sets could readily be connected in parallel, in order to achieve a desired current rating, by merely leaving the metallisation 5, the grid layer 9 and the anode layer 20 continuous over the whole area of the device. Alternatively, those layers could be segmented, to provide many separate diodes or triodes, which could be integrated by interconnection as in conventional integrated circuits, thereby allowing the fabrication of a wide variety of circuits. Furthermore, the ability to seal off the tunnel, complete with its own vacuum environment, affords the possibility of easily integrating such devices with conventional integrated circuits without the need for any additional vacuum enclosure. Although the above embodiment makes use of a silicon substrate, with its well characterised etching properties, to construct the cathode body, any metallic or doped semiconducting material which can be etched to give a cone-shaped cathode body could be used. In particular, a silicon on sapphire substrate or a single crystal tungsten substrate could be used, to allow similar etching of the cathode body. A potential advantage here is that isolation of individual devices is achieved through the insulating sapphire substrate. The above embodiment provides one or more devices, each of which comprises a single cathode body associated with a single grid electrode and an anode. However, a device might alternatively comprise a plurality of cathode bodies associated with a single grid electrode and a single anode, or alternatively a plurality of cathode bodies, a plurality of grid electrodes, one for each cathode body or group of cathode bodies, and a single anode associated with all of the cathode bodies. The above description relates to field-induced emission devices wherein the device is contained in an evacuated enclosure or wherein the tunnel 18 is evacuated and is sealed by the layer 24 to avoid the need for such enclosure. Alternatively, the device could operate in a gas-filled enclosure or the tunnel 18 could be gas-filled and then sealed. The initial emission would then still be field-induced, but this would give rise to a gas discharge within the device. Again, a number of grid layers and associated insulating layers could be provided, and in the case of gas-filled devices the above-mentioned staggering of the successive grid apertures to reduce ion bombardment could become more important. Referring to Figure 17, a switching device 25 incorporates a number of vacuum or gas-filled devices as described above, in effect incorporated in a transmission line structure. In this case a substrate 26 is provided with one or more rows of cathode bodies 27. A strip grid line 28 is insulated from the cathode bodies by an apertured insulating layer 29, and an elongate anode layer 30, formed, for example, of tungsten, is spaced from the grid line by depositing a support layer on the grid line, depositing the anode layer on the support layer, and then dissolving the support layer. In a gas-filled device an insulating layer may be provided beneath the anode, which layer may be selectively formed to confine the gas discharge away from the tips of the cathode bodies. There are two alternative ways of forming the switching device. Either the anode layer 30 can be connected to the cathode structure 26,27, as shown at the left hand side of the figure, to form an untriggered switch, or the anode layer can be insulated from the cathode structure by the insulating layer 29, as shown at the right hand side, to form a triggered switch. In the case of the triggered switch configuration, a signal to be switched is connected between the anode and the cathode. A voltage is applied between the grid layer 28 and the cathode structure 26,27 from a source 32 to initiate field emission from the cathode to the grid, and the signal path is closed by the resulting current flow. The effective impedance of the transmission line can be made to approximate to 50Ω by designing the size of the anode/grip gap (i.e. the thickness of the support layer to be dissolved) and the width of the grid line to be approximately equal. In the case of the untriggered switch, the anode and cathode structures are interconnected to form, in effect, an outer sheath around a central grid line. In this case,the widths of the anode, cathode and grid structures, and the anode/grid and grid/cathode spacings, are preferably all made comparable to each other to provide an approximately 50Ω impedance. The untriggered switch relies on the signal, applied between the grid electrode and the combined outer anode-cathode structure, being of sufficient magnitude to initiate field emission between the cathode bodies 27 and the grid electrode. Another triggered switch configuration, which could have a higher current handling capacity than the above-described switches, is shown schematically in Figure 18. In this case, an insulating support layer 33 has an anode layer 34 deposited on one of its major surfaces. A conductive line 35 is formed on the opposite surface of the support layer 33. A pit 36 is then formed through the layer 33 by a laser or by etching or other erosion process, down to the anode layer 34. A cathode/grid structure 37, similar to that described above, is then inverted so that its cathode bodies 39 point towards the anode layer, and its grid layer 38 is bonded to the line 35. The anode layer 34 and the grid layer 38 constitute a groundplane and a track, respectively, of a microstrip transmission line. Field-induced electron emission from the cathode bodies 39 is controlled by the cathode-grid voltage. Electrons emitted into the pit 36 provide a low impedance signal path between the grid and anode layers.

Claims: A method of forming a field-induced emission device, comprising the following steps : forming a cathode body (3) structured for field-induced electron emission therefrom on a substrate (1); forming thereover an electrically-insulating layer (7) having an aperture (14) therein through which the cathode body is revealed; filling the aperture with a plug (19) of soluble material; forming a strip (21) of electrically-conductive material on the insulating layer and extending across the plug; and dissolving the plug from beneath the conductive strip to leave a portion of the strip suspended across the aperture and spaced from the cathode body, to act as an anode. A method as claimed in Claim 1, characterised in that the cathode body (3) is formed by selectively etching away part of the thickness of the substrate (1). A method as claimed in Claim 1 or Claim 2, characterised in that the cathode body (3) tapers in a direction away from the substrate (1). A method as claimed in any preceding claim, characterised in that at least one metallic layer (5) is deposited over the cathode body (3) before deposition of the insulating layer (7). A method as claimed in any preceding claim, characterised in that the plug (19) is formed of a photo-sensitive material. A method as claimed in any preceding claim, characterised in that an electrically-conductive layer (9) is formed between the substrate (1) and the conductive strip (21) and insulated therefrom to act as a control electrode. A method as claimed in Claim 6, characterised in that the conductive layer (9) is provided with an aperture (13) therethrough, substantially in alignment with the aperture (14) in the insulating layer (7), whereby the edge of the conductive layer around its aperture acts as the control electrode. A method as claimed in Claim 7, characterised in that a plurality of said electrically-conductive layers are provided before the conductive strip (21) is formed, each conductive layer forming a separate control electrode. A method as claimed in Claim 8, characterised in that the apertures through the electrically-conductive layers overlap each other but are mutually staggered so that there is no direct line-of-sight path between the conductive strip (21) and the cathode body (3). A method as claimed in any one of Claims 6-9, characterised in that the or each conductive layer (9) is formed of polysilicon. A method as claimed in Claim 10, characterised in that after deposition of the polysilicon layer (9), doping of the polysilicon is effected. A method as claimed in any preceding claim, characterised in that the dissolved plug material leaves the aperture (14) via at least one gap (22,23) between the conductive strip (21) and the insulating layer (7,15). A method as claimed in Claim 12, characterised in that, after removal of the dissolved plug material, the aperture (14) vacated by the plug (19) is evacuated or gas-filled, and the or each gap (22,23) is sealed by an additional layer (24) formed thereover to retain the vacuum or gas. A field-induced emission valve device for electrical conduction between a cathode body (3) and a single anode, comprising a substrate (4); the cathode body (3) formed on the substrate; an electrically-insulating layer (7) deposited over the substrate and having an aperture (14) therethrough through which the cathode body is revealed; and a strip (21) of electrically-conductive material supported by the insulating layer and extending across the aperture and spaced from the cathode body, to act as the single anode; wherein the cathode body is structured for field-induced electron emission therefrom at an anode-cathode voltage less than will cause breakdown of the insulating layer. A device as claimed in Claim 14, characterised by an electrically-conductive layer (9) disposed between the substrate (1) and the conductive strip (21) and insulated therefrom to act as a control electrode. A device as claimed in Claim 15, characterised in that the conductive layer (9) has an aperture (13) therethrough substantially in alignment with the aperture (14) in the electrically-insulating layer (7), whereby the edge of the conductive layer (9) around its aperture is to act as the control electrode. A device as claimed in Claim 14, characterised by a plurality of spaced-apart electrically-conductive layers disposed in a stack between the substrate (1) and the conductive strip (21) to act respectively as control electrodes. A device as claimed in Claim 17, characterised in that each electrically-conductive layer has an aperture for the passage of electrons therethrough in flowing between the cathode body (3) and the single anode; and wherein the successive apertures in the stack are offset relative to each other to avoid a direct line-of-sight path between the single anode and the cathode body. A device as claimed in any one of Claims 14-18, characterised in that the cathode body (3) tapers in a direction away from the substrate (1). A device as claimed in any one of Claims 14-19, characterised in that the or each said aperture (14) is evacuated or gas-filled and the vacuum or gas is sealed therein. A vertically-integrated switching device, comprising a substrate (26); a plurality of cathode bodies (27) formed on a surface of the substrate; an electrically-insulating layer (29) deposited over said surface of the substrate and having a plurality of apertures therethrough through which the cathode bodies are revealed; a strip grid line (28) of electrically-conductive material supported by the insulating layer to act as a control electrode and having apertures therein corresponding to the apertures in said insulating layer; and a layer (30) of electrically-conductive material integrated on said surface of the substrate, extending across the apertures, disposed over and spaced from the control electrode to act as an anode; wherein the substrate, the control electrode and the anode are so dimensioned and spaced as to form at least a section of a transmission line; and wherein the cathode bodies are structured for field-induced electron emission therefrom at a cathode-control electrode voltage less than will cause breakdown of the insulating layer. A device as claimed in Claim 21, characterised in that the anode layer (30) and the cathode bodies (27) are electrically interconnected, whereby the switching device is to be rendered conductive by a signal which is to be switched and which is applied between the control electrode (28) and the anode/cathode circuit. A switching device as claimed in Claim 21, characterised by a second insulating layer (33) between the strip grid line (28) and the anode, which has at least one aperture (36) such that with the or each aperture (36) of the second insulating layer (33) each time a plurality of the cathode bodies (39) are associated, whereby the or each aperture provides an emission path from the associated plurality of cathode bodies to the anode (34).

Inventors: CADE, NEIL ALEXANDER, LEE, ROSEMARY ANN, SAMARAKONE, NANDASIRI
Applicants: THE GENERAL ELECTRIC COMPANY, P.L.C.
Application year: 1988
Main classification: H01J1
IPC codes: H01J9, H01J1, H01J21