Discharge lamp driving circuit

Abstract: A discharge lamp driving circuit includes a chopper with a first switching circuit and an inverter with a second switching circuit. The copper and inverter are connected to a dc voltage source V₁ and controlled to produce a composite lamp driving current Ia composed of a high frequency alternating current interrupted by a dc current in order to keep the discharge lamp 10 free from an acoustic resonance. The chopper and the inverter are arranged to have at least one common switching elements in their first and second switching circuits.

Description: TECHNICAL FIELD The present invention is directed to a discharge lamp driving circuit, and more particularly to a circuit for operating a high-pressure gaseous discharge lamp without causing a harmful acoustic resonance. BACKGROUND ART There has been a growing demand for a discharge lamp operating circuit which is operated at a higher frequency in order to reduce the weight and bulk of the ballasting inductor. On the other hand, it is also known that discharge lamps, particularly high-pressure discharge lamps such as mercury high pressure lamps and sodium vapor lamps suffer from unstable discharge arcs que to "acoustic resonance" when operated at certain high frequencies. U.S. Pat. No. 4,291,254 with correspondance GB-A-2,045,554, proposed to select a stable frequency for avoiding such "acoustic resonance". However, such stable frequency is seen only in a limited range and differs from different kinds of lamps, thus reducing the flexibility of circuit design. Further, it is known that an extreme high frequency drive, for example, over 100 KHz may be effective for elimination of the "acoustic resonance", but this eventually results in considerable switching losses and noises which are not acceptable for the lamp operation. To this end, there has been proposed in Japanese Patent Publication (KOKAI) No. 60-262392 to drive the lamp by a composite lamp driving current having a repeating cycle of an alternating current interrupted by a dc current. This patent is based upon the finding that the repetitive interruption of the alternating current by the dc current can restrain the occurrence of the "acoustic resonance", even the alternating current is in a frequency range which would otherwise cause the "acoustic resonance". In this sense, this patent is advantageous in selecting a lamp drive frequency without having to consider the "acoustic resonance". Notwithstanding this advantage, the patent has a certain drawback in that two independent switching circuits, i.e., chopper and inverter circuits, are required for providing the dc current and the alternating current, respectively. This requires duplication of switching elements with consequent complexity in incorporating the respective drivers in circuits for the duplicated switching elements, thus eventually resulting in increased cost and bulk of the physical circuit assembly. DISCLOSURE OF THE INVENTION The present invention eliminates the above problem by commonly utilizing at least one switching element for chopper and inverter switching circuits and provides an improved discharge lamp driving circuit with simplified circuit arrangement. It is therefore a primary object of the present invention to provide an improved discharge lamp driving circuit which is simple in configuration, yet preventing the acoustic resonance as well as assuring to make compact the physical arrangement of the circuit. An improved discharge lamp driving circuit in accordance with the present invention comprises a dc (direct current) voltage source, chopper means, and inverter means. The chopper means comprises a first switching circuit which is coupled to the dc voltage source to provide therefrom a periodically interrupted current and smooth the same for producing a smoothed dc current.The inverter means comprises a second switching circuit which is also coupled to the dc voltage source for producing therefrom a high frequency alternating current. Included in the circuit is control means which is connected to the chopper means and the inverter means in order to apply to the discharge lamp a repeating cycle of a composite lamp driving current composed of the high frequency alternating current supplied from the inverter means and is interrupted by the smoothed dc current supplied from the chopper means. A characterizing feature of the present invention resides in that the first and second switching circuits of the chopper and inverter means are arranged to have at least one common switching element which operates both in producing the dc current and the high frequency alternating current. With this result, the circuit configuration can be considerably simplified with consequent reduction in cost and bulk of the device. In a preferred embodiment, the chopper means is configured in a bridge arrangement to apply to the discharge lamp the smoothed dc current which is reversed in polarity from one cycle to the subsequent cycle of the composite lamp driving current. Thus, the deterioration of lamp electrodes can be reduced to a minimum, thereby giving rise to an enhanced life time of the discharge lamp. The lamp driving circuit of the present invention can be broadly classified into two types with and without a transformer which operates to apply the high frequency alternating current to the discharge lamp. In the former type, the first switching circuit of the chopper means comprises at least one switching element common to the second switching circuit of the inverter means. The common switching element is coupled in series circuit with an inductor and a parallel combination of the discharge lamp and a bypass capacitor of which series circuit is connected across the dc voltage source. During a first period of time, the common switching element is controlled to turn on and off at a first high frequency to produce the interrupted current which is smoothed by the first inductor and of which high frequency component is bypassed through the bypass capacitor for giving the smoothed dc current to the discharge lamp within each cycle of the composite lamp driving current. The second switching circuit of the inverter means comprises a pair of first and second switching elements at least one of which is common to the first switching circuit of the chopper means. The first and second switching elements are connected in series across the dc voltage and is connected in circuit with a dc blocking capacitor and the transformer with a primary winding and a secondary winding which is inserted in series relation with the discharge lamp and in parallel relation with the bypass capacitor. The blocking capacitor is connected in series with the primary winding of the transformer and in parallel with one of the first and second switching elements to form therewith a series oscillating circuit. During a second period of time alternating with the above first period of time, the first and second switching elements are controlled to alternately turn on and off at a second frequency to provide a high frequency alternating current in the series oscillating circuit as repeating to charge and discharge the dc blocking capacitor, whereby inducing the corresponding high frequency alternating current in the circuit of the secondary winding and the discharge lamp to drive the discharge lamp by such high frequency alternating current within each cycle of the composite lamp driving current. In the other type of the circuit without the transformer, the first and second switching circuits of the chopper and inverter means commonly includes a pair of first and second switching elements arranged in a half- or full-bridge configuration with a pair of capacitors or with a pair of like switching elements.The bridge has its input ends connected across the dc voltage source and has its output ends connected across a series circuit composed of an inductor and a parallel combination of the discharge lamp and a bypass capacitor. During a first period of time, one of the first and second switching elements is controlled to turn on and off at a first frequency with the other switching element being kept turned off to provide a dc current which is smoothed by the inductor and is removed of its high frequency component by the bypass capacitor for feeding the smoothed dc current to the discharge lamp within each cycle of the composite lamp driving current. During a second period of time alternating with the first period of time, the first and second switching elements are controlled to alternately turned on and off at a second high frequency in such a manner as to provide to the discharge lamp said high frequency alternating current within each cycle of said composite lamp driving current.The second high frequency is determined to be lower than the first high frequency to such an extent that the second high frequency alternating current is supplied to the discharge lamp within each cycle of the composite lamp driving current while allowing the second high frequency component to be substantially fed to the discharge lamp without being bypassed through the bypass capacitor. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a discharge lamp driving circuit illustrating one basic version in accordance with the principle of the present invention; FIG. 2 is a waveform chart illustrating a composite lamp driving current in a conceptual form obtained in the present invention; FIG. 3 is a circuit diagram of a discharge lamp driving circuit in accordance with a first embodiment of the present invention; FIG. 4 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 3; FIG. 5 is a waveform chart illustrating a composite lamp driving current in a conceptual form obtained in the circuit of FIG. 3; FIG. 6 is a circuit diagram of a modification of FIG. 3; FIG. 7 is a circuit diagram of a second embodiment of the present invention; FIG. 8 is a timing diagram of waveforms illustrating the operation of the four switching transistors shown in FIG. 7 FIG. 9 is a timing diagram of waveforms illustrating another operation of the four switching transistors shown in FIG. 7 in accordance with a modification of the second embodiment; FIG. 10 is a waveform chart illustrating a lamp driving current in a conceptual form obtained by the switching operation of FIG. 9; FIG. 11 is a circuit diagram of a third embodiment of the present invention; FIG. 12 is a timing diagram of waveforms illustrating the operation of the four switching transistors shown in FIG. 11; FIG. 13 is a timing diagram of waveforms illustrating another operation of the four switching transistors shown in FIG. 11 in accordance with a modification of the third embodiment; FIG. 14 is a circuit diagram of a fourth embodiment of the present invention; FIG. 15 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 14; FIG. 16 is a waveform chart illustrating a composite lamp driving current in a conceptual form obtained by the switching operation of FIG. 15; FIG. 17 is a circuit diagram of a fifth embodiment of the present invention; FIG. 18 is a timing diagram of waveforms illustrating the operation of the three switching transistors shown in FIG. 17; FIG. 19 is a circuit diagram of a sixth embodiment of the present invention; FIG. 20 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 19; FIG. 21 is a circuit diagram of a seventh embodiment of the present invention; FIG. 22 is a circuit diagram of an eighth embodiment of the present invention; FIG. 23 is a timing diagram of waveforms illustrating the operation of the two switching transistors shown in FIG. 22; FIG. 24 is a circuit diagram of a ninth embodiment of the present invention; FIG. 25 is a circuit diagram of a tenth embodiment of the present invention; FIG. 26 is a timing diagram of waveforms illustrating the operation of the four switching transistors shown in FIG. 25; and FIG. 27 is a timing diagram of waveforms illustrating another operation of the four switching transistors shown in FIG. 25 in accordance with a modification of the tenth embodiment. MODES FOR CARRYING OUT THE INVENTION Referring now to FIG. 1, one version of a discharge lamp driving circuit in accordance with the present invention is shown in a general form for easy understanding of the principle of the present invention. The circuit comprises a switching section 1 which is connected across a dc voltage source V₁ and includes at least two switching elements or transistors collectively indicated in FIG. 1 as S . The switching section 1 has a first pair of output ends 1a and 1b between which is connected a series circuit of an inductor L₁ and a parallel combination of a discharge lamp 10 and a bypass capacitor C₁ . Also provided at the switching section 1 is a second pair of output ends 1c and 1d between which is connected a circuit of a dc blocking capacitor C₂ and a transformer T with a primary winding L₂₁ and a secondary winging L₂₂ . The secondary winging L₂₂ is coupled in series with the discharge lamp 10 in parallel relation with the bypass capacitor C₁ . The switching section 1 is controlled, during a first period of time T DC ( t₁ - t₂ ), to repetitively interrupt the dc voltage at a first high frequency for providing a chopped voltage between the first pair of output ends 1a and 1b . The chopped voltage is then smoothed by the inductor L₁ and has its high frequency component bypassed through the bypass capacitor C₁ to thereby feed a smoothed dc current I DC to the discharge lamp 10 during the first period T DC , as shown in FIG. 2 which shows a composite lamp driving current Ia in a conceptual waveform. During a second period of time T HF ( t₂ - t₃ ) alternating with the first period of time T HF , the switching section 1 is controlled to repetitively interrupt the dc voltage at a second high frequency in order to repeat producing a voltage between output ends 1c and 1d and shorting the same. While the positive voltage is developed across the output ends 1c and 1d , the voltage is applied through the dc blocking capacitor C₂ to the primary winding L₂₁ of the transformer T so as to flow a current in one direction in the primary winding L₂₁ as charging the blocking capacitor C₂ . Upon subsequent shorting between the output ends 1c and 1d , the blocking capacitor C₂ discharges to feed an opposite current through the primary winding L₂₁ . Consequently, the above repetition of developing the voltage and shorting between the output ends 1c and 1d will induce an alternating current with the second high frequency at the secondary winding L₂₂ of the transformer T such that the resulting high frequency alternating current is caused to circulate through the closed loop of the lamp 10 and the bypass capacitor C₁ as it is blocked by the inductor L₁ , whereby providing to the lamp the high frequency alternating current I AC during the second period of time T HF , as shown in FIG. 2. In this manner, the switching section 1 provides a repeated cycle of a composite lamp driving current composed of the high frequency alternating current I AC interrupted by the dc current I DC . With this result, the lamp 10 can be kept free from causing an acoustic resonance or instable lamp operation even if the alternating current has a high frequency which might cause such acoustic resonance when utilized alone. The second frequency of the alternating lamp current may be suitably selected to be equal to or different from the first frequency at which the switching section 1 is operated to chop the dc voltage. With the circuit arrangement of FIG. 1, it is possible to share at least one switching element in the switching section 1 which operates both in a chopper mode for providing the dc current I DC and in an inverter mode of providing the high frequency alternating current I AC . It is also noted in this connection that other components can be commonly and effectively utilized in the above two different operation modes. For example, the bypass capacitor C₁ , which acts to bypass the high frequency component of the dc current in the chopper mode, serves to complete the closed loop with the secondary winging L₂₂ and the discharge lamp 10 to effectively apply to the discharge lamp 10 the alternating voltage developed at the secondary winding L₂₂ in the inverter mode. Also the inductor L₁ , which smoothes the chopped voltage in the chopper mode, serves to block the high frequency voltage and prevent it from being applying to the circuit other than the closed loop, thereby applying the high frequency voltage effectively to the discharge lamp 10 in the inverter mode. Further, the secondary winding L₂₂ of the transformer T , which develops the high frequency voltage as a power source in the inverter mode, can serve to block the high frequency component of the chopped voltage in the chopper mode, assisting to bypass the high frequency component through the bypass capacitor C₁ . The discharge lamp 10 may be a high pressure gaseous discharge lamp such as mercury high pressure discharge lamp with metal halogen additives, sodium vapor lamp, and the like, or may be a low pressure lamp. The present invention is now discussed in more detail with reference to preferred embodiments. Like numerals designate like parts throughout the following embodiments for easy reference. First embodiment 〈FIGS. 3 to 5〉 In this embodiment, the circuit comprises a pair of first and second switching transistors Q₁ and Q₂ which are cooperative with a pair of capacitors C₃ and C₄ to form a half-bridge having its input ends connected across a dc voltage source V₁ . Connected across the output ends of the half-bridge is a series circuit composed of an inductor L₁ and the parallel combination of a discharge lamp 10 and a bypass capacitor C₁ . The first and second switching transistors Q₁ and Q₂ are cooperative with the series circuit to form a chopper which provides a dc current to the discharge lamp 10 . A transformer T is incorporated in the circuit with its primary winding L₂₁ connected in series with a dc blocking capacitor C₂ across the second switching transistor Q₂ and with its secondary winding L₂₂ inserted in series with discharge lamp 10 and in parallel with the bypass capacitor C₁ . The series connection of the primary winding L₂₁ and the blocking capacitor C₂ is cooperative with the first and second switching transistors Q₁ and Q₂ to form an inverter or series oscillating circuit which provides a high frequency alternating current to the discharge lamp 10 . As discussed in the below, the first and second switching transistors Q₁ and Q₂ are controlled to provide repeating cycles of a composite lamp driving current composed of the dc current fed from the chopper and the high frequency alternating current from the inverter, as shown in FIG. 5. Typical values for the above circuit are as follows. The voltage of the dc voltage source V₁ is 280 V, the bypass capacitor C₁ has a capacitance of 0.22 µF, the inductor L₁ has an inductance of 0.2 mH, the primary winging L₂₁ has an inductance of 0.5 mH, and the blocking capacitor C₂ has a capacitance of 0.1 µF. The first and second switching transistors Q₁ and Q₂ are operated at 40 KHz both in the chopper and the inverter mode. The operation of the chopper is now explained with reference to FIG. 4. During each first period of time T DC alternating with a second period of time T HF one of the first and second switching transistors Q₁ and Q₂ is controlled to turn on and off at a first high frequency while the other switching transistor is kept turned off. For example, during the first period of time T DC ( t₁ - t₂ ) of FIGS. 4 and 5, the first switching transistor Q₁ repeats turning on and off at a frequency of 40 KHz while the second transistor Q₂ is kept turned off. When the first transistor Q₁ is on, the capacitor C₃ will discharge a current through a route of the first switching transistor Q₁ , secondary winding L₂₂ , discharge lamp 10 , and inductor L₁ . When the first transistor Q₁ is turned off, the inductor L₁ acts to maintain a continuous flow of current in the same direction. Thus, the dc current from the capacitor C₃ is smoothed by the inductor L₁ and has its high frequency component bypassed through the bypass capacitor C₁ so as to feed the smoothed dc current to the discharge lamp 10 . During the first period of time T DC ( t₃ - t₄ ), the second switching transistor Q₂ turns on and off at the same frequency while the first switching transistor Q₁ is kept turned off, thereby producing the like dc current but in opposite polarity, as shown in FIG. 5. With this provision of reversing the polarity of the dc current from one cycle to the subsequent cycle of the composite lamp driving current, the discharge lamp 10 can have an elongated operation life. The second period of time T HF in which the inverter is active to provide the high frequency alternating current is initiated by driving to turn on and off one of the switching transistor which is kept turned off in the previous first time of period while keeping the other switching transistor turning on and off. For example, in the second period of time T HF ( t₂ - t₃ ), the second switching transistor Q₂ , which has been off in the previous first time of period T DC , begins to turn on and off while the first switching transistor Q₁ continues to turn on and off. During this period, the first and second switching transistors Q₁ and Q₂ are alternately turned on and off with a dead-time therebetween, in which both of the switching transistors are simultaneously off, in order to provide the high frequency alternating current. The inverter operation in this period is explained in terms of the repeating sequence of the following four consecutive occurrences 1) to 4), as indicated in FIG. 4. At the first occurrence 1), the second switching transistor Q₂ is turned on while the first switching transistor Q₁ is off such that the blocking capacitor C₂ which has been charged due to the previous turning on of first switching transistor Q₁ will begin discharging to cause a current to flow through the primary winding L₂₁ , second switching transistor Q₂ , and back to the blocking capacitor C₂ . At the second occurrence 2) in which both of the first and second switching transistors Q₁ and Q₂ are off, the primary winding L₂₁ in turn causes the current to continuously flow through a first diode D₁ , dc voltage source V₁ , blocking capacitor C₂ and back to the primary winding L₂₁ . At the third occurrence 3), the first switching transistor Q₁ is on while the second switching transistor Q₂ is off so that the capacitor C₃ discharges its energy, causing a current to flow in the opposite direction through the first switching transistor Q₁ , primary winding L₂₁ , blocking capacitor C₂ , capacitor C₄ , and back to the capacitor C₃ . At the fourth occurrence 4) where both of the first and second switching transistors Q₁ and Q₂ are off, the primary winding L₂₁ acts to maintain the continuous flow of current through a second diode D₂ , blocking capacitor C₂ , and back to the primary winding L₂₁ . In this sense, the first and second diodes D₁ and D₂ , which are connected in antiparallel relation respectively to the first and second switching transistors Q₁ and Q₂ , provide first and second bypass routes for continuously flowing the instantaneous currents discharged from the primary winding L₂₁ at the second and fourth occurrences in which both of the switching transistors Q₁ and Q₂ are off. Likewise, in the next second period of time T HF ( t₄ - t₅ ) which is initiated by turning on and off the first switching transistor Q₁ which has been on in the previous first time of period T DC , the first and second switching transistors Q₁ and Q₂ are controlled to alternately turn on and off to produce the high alternating current through the primary winding L₂₁ . In this manner, during each second period of time T HF , the high frequency alternating current continues to flow through the primary winding L₂₁ to thereby induce at the secondary winding L₂₂ the corresponding high frequency alternating current which circulates through the closed loop of the secondary winding L₂₂ , discharge lamp 10 , and the bypass capacitor C₁ as the inductor L₁ acts to block such high frequency alternating current, whereby driving the discharge lamp 10 by thus obtained high frequency alternating current, as shown in FIG. 5. It is noted at this connection that the second frequency is determined so that the inductor L₁ blocks such high frequency alternating current from circulating through the closed loop of the secondary winding L₂₂ , discharge lamp 10 , and bypass capacitor C₁ . Due to the above the circuit arrangement, the first and second switching transistors are commonly utilized both in the chopper mode of providing the dc current and in the inverter mode of providing the high frequency alternating current to the discharge lamp. In brief, the inverter mode of providing the high frequency alternating current is terminated by deactivating one of the switching transistors, which in turn immediately initiates the chopper mode of providing the dc current to the discharge lamp. Thus, by repeating the above operations, the high frequency alternating current can be repetitively interrupted by the dc current, as shown in FIG. 5, to thereby inhibit the occurrence of the acoustic resonance which would be otherwise develop due to the high frequency lamp driving. The ratio of the period T DC to the period of one complete cycle ( T DC + T HF ) of the composite lamp driving current may be suitably selected depending upon the kind of discharge lamp utilized for prevention of the acoustic resonance, as the suitable ratio will vary with different kinds of lamps. Modification of the first embodiment 〈FIG. 6〉 This modification shows a circuit arrangement which is identical to that of FIG. 3 except that the dc blocking capacitor C₂ is inserted between the primary winding L₂₁ and the connection of the capacitors C₃ and C₄ . The circuit provides the like composite lamp driving current of FIG. 5 by the like switching operations of FIG. 4, but in which each of the capacitors Q₃ and Q₄ is additive to the blocking capacitor C₂ to act as a voltage source to provide the high frequency alternating current during the second period of time T HF . The other functions are identical to those of the first embodiment. In other words, during the second period of time for providing the high alternating current, the capacitors Q₃ and Q₄ can be made mainly responsible for producing the high frequency alternating current, while the blocking capacitor C₂ is responsible for blocking the dc current. Accordingly, the constant of the blocking capacitor C₂ can be determined relatively freely without taking into account for utilizing it as the voltage source for the alternating current, thus giving rise to an improved design flexibility of the circuit. Typical values for this circuit when operated on the dc voltage V₁ of 280 V are as follows. C₁ = 0.22 µF, L₁ = 0.22 mH, L₂₁ = 0.9 mH, and C₂ = 0.01 µF. The first and second switching transistors Q₁ and Q₂ are operated at 40 KHz and 60 KHz, respectively in the chopper mode and the inverter mode. Second embodiment 〈FIGS. 7 and 8〉 Referring to FIG. 7, a second embodiment of the present invention is shown to be identical to the first embodiment of FIG. 3 except for utilizing additional third and fourth switching transistors Q₃ and Q₄ which are coupled with the first and second switching transistors Q₁ and Q₂ to form a chopper circuit of full-bridge configuration with third and fourth diodes D₃ and D₄ connected in antiparallel relation to the third and fourth switching transistors Q₃ and Q₄ , respectively. Thus, as shown in FIG. 8, the one of the two diagonally disposed pairs of switching transistors Q₁ , Q₄ , and Q₂ , Q₃ is rendered to be active while the other pair is inactive during the first period of time T DC providing the dc current to the discharge lamp 10 . For example, during the first period of time T DC ( t₁ - t₂ ), the first switching transistor Q₁ is controlled to turn on and off at a first high frequency with the fourth switching transistor Q₄ being kept turned on, while the second and third switching transistors Q₂ and Q₄ are kept turned off. In this manner the switching transistors are controlled to provide the dc lamp current which is opposite in polarity from the period t₁- t₂ to the period t₃ - t₄ . In the inverter mode of providing the high frequency alternating current, or in the second period of time T HF ( t₂ - t₃ , t₄ -t₅ ), the first and second switching transistors Q₁ and Q₂ are controlled in the same manner as in the first embodiment while the third and fourth switching transistors Q₃ and Q₄ are kept turned off, during which the first and second switching transistors Q₁ and Q₂ are cooperative with the primary winding L₂₁ and the blocking capacitor C₂ to oscillate an alternating current through the primary winding L₂₁ and the blocking capacitor C₂ , as repeating the four occurrences which are similar to those discussed with reference to the first embodiment but differ in that the dc voltage V₁ will supply an energy to the series oscillating circuit of the primary winding L₂₁ and the blocking capacitor C₂ when lhe first switching transistor Q₁ is on and the second switching transistor Q₂ is off. Modification of the second embodiment 〈FIGS. 9 and 10〉 The modification of the second embodiment utilizes the same circuit arrangement of FIG. 7, but operates the first and second switching transistors Q₁ and Q₂ as shown by the timing diagram of FIG. 9. As seen from FIG. 9, in the chopper mode of providing the dc current during the first period of time T DC ( t₁ - t₂ , t₃ - t₄ ), both of the first and second switching transistors Q₁ and Q₂ are operative to alternately turn on and off such that during this period T DC the discharge lamp 10 receives, in addition to the smoothed dc voltage from the dc voltage source V₁ , the induced voltage developed at the transformer T due to the oscillation in the circuit of the primary winding L₂₁ and the blocking capacitor C₂ . Thus, the resulting dc lamp current may take the form of FIG. 10 in which the high frequency component is superimposed on the smoothed dc current ( t₁ - t₂, t₃ - t₄ ). Third embodiment 〈FIG. 11 and 12〉 Referring to FIGS. 11 and 12, a third embodiment of the present invention is shown to comprise the same like circuit as in the second embodiment except that the blocking capacitor C₂ has its one end connected to the connection between the third and fourth switching transistors Q₃ and Q₄ . The switching transistors Q₁ to Q₄ are controlled to turned on and off in accordance with a timing diagram of FIG. 12 to provide the like composite lamp driving current as shown in FIG. 5 for the first embodiment. In the chopper mode, the two diagonally disposed switching transistors, for example, Q₁ and Q₄ , are controlled to turn on and off in a synchronized manner while the other two switching transistors, for example, Q₂ and Q₃ are kept turned off during each first period of time T DC in order to provide the dc current to the discharge lamp 10 . Due to the synchronous operation of the diagonally disposed switching transistors Q₁ , Q₄ and Q₂ , Q₃ in the chopper mode, the inductor L₁ acts upon the subsequent turning off of the all switching transistors to cause the instantaneous dc current to continuously flow through a closed loop to the dc voltage supply V₁ , thus feeding back the energy thereto. For example, when all of the switching transistors are turned off immediately after the first and fourth switching transistors Q₁ and Q₄ being turned on, the inductor L₁ cause the current to flow through the diode D₃ , dc voltage source V₁ , diode D₂ , secondary winding L₂₂ , discharge lamp 10 and back to the inductor L₂₁ . On the other hand when all the switching transistors are turned off after the second and third switching transistors Q₂ and Q₃ being simultaneously turned on, the instantaneous current from the inductor L₂₁ flows through the discharge lamp 10 , the secondary winding L₂₂ , diode D₁ , dc voltage source, diode D₄ , and back to the inductor L₂₁ . In the inverter mode of providing the high frequency alternating current during the second period of time T HF ( t₂ - t₃ , t₄ - t₅ ), the two switching transistors, for example, Q₁ and Q₄ in one diagonally disposed pair are controlled to simultaneously turn on and off while the switching transistors Q₂ and Q₃ in the other pair are controlled to simultaneously turn on and off in an alternating manner therewith. Thus, the alternating current appears in the series oscillating circuit including the primary winging L₂₁ and the blocking capacitor C₂ with no substantial direct current being caused to flow through the discharge lamp 10 and the inductor L₁ , whereby inducing at the secondary winding L₂₂ the high frequency alternating current which circulates the closed loop of the secondary winding L₂₂ , discharge lamp 10 , and bypass capacitor C₁ . Also in the inverter mode, when all the switching transistors are simultaneously turned off, the primary winding L₂₁ acts to fed back its accumulated energy to the dc voltage V₁ through the diodes D₃ and D₂ or the diodes D₁ and D₄ . Modification of the third embodiment 〈FIG. 13〉 A modification of the third embodiment utilizes the same circuit of FIG. 11 but in which the switching transistors Q₁ to Q₄ are controlled in a somewhat different manner from the third embodiment. As shown in FIG. 13, the difference is seen in that, during first period of time T DC (chopper mode), the first switching transistor Q₁ is controlled to turn on and off while the fourth switching transistor Q₄ is kept turned on ( t₁ - t₂ ), and the third switching transistor Q₃ is controlled to turn on and off while the second switching transistor Q₂ is on ( t₃ - t₄ ). Thus, upon the turning off of the first switching transistor Q₁ , the switching transistor Q₄ is cooperative to the diode D₂ to form a closed loop including the inductor L₁ for circulating therethrough the current which is otherwise fed back to the dc voltage source V₁ through the diodes D₃ and D₂ as seen in the third embodiment. Likewise, upon turning off of the third switching transistor Q₃ , the second switching transistor Q₂ is cooperative with the diode D₄ to circulate the current which is otherwise fed to the dc voltage source V₁ through the diodes D₁ and D₄ as seen in the third embodiment. Fourth embodiment 〈FIGS. 14 to 16〉 A fourth embodiment of the present invention comprises first and second switching transistors Q₁ and Q₂ connected across the dc voltage source V₁ with first and second diodes D₁ and D₂ connected in antiparallel respectively with the first and second switching transistors Q₁ and Q₂ . The inductor L₁ is connected in series with a parallel combination of the discharge lamp 10 and bypass capacitor C₁ , which series-parallel combination is connected in parallel with the second switching transistor Q₂ . Also included in the circuit is the transformer T of which primary winding L₂₁ is connected in series with the dc blocking capacitor C₂ across the second switching transistor Q₂ . The secondary winding L₂₂ is inserted in series with the discharge lamp 10 in parallel with the bypass capacitor C₁ . In this circuit, the chopper is defined by the first switching transistor Q₁ , and the series-parallel combination of the inductor L₁ , discharge lamp 10 , bypass capacitor C₁ , as enclosed in dotted lines CH in FIG. 14. Also, as enclosed in phantom lines IV in the figure, the inverter is defined by, in additions to the above components common the to the chopper, the second switching transistor Q₂ and the series circuit of the primary winding L₂₁ and the blocking capacitor C₂ , and the secondary winding L₂₂ . In operation, the first and second switching transistors Q₁ and Q₂ are controlled in a manner as shown in FIG. 15 to provide a composite lamp driving current of FIG. 16. That is, in the chopper mode during the first period of time T DC ( t₁ - t₂ and t₃ - t₄ ), the first switching transistor Q₁ is driven to turn on and off at a first high frequency to provide the chopped dc voltage which is smoothed by the inductor L₁ and of which the high frequency component is bypassed through the bypass capacitor C₁ to allow the flow of the resulting smoothed dc current to the discharge lamp 10 . In the inverter mode during the second period of time T HF ( t₂ - t₃ ), the first and second switching transistors Q₁ and Q₂ are driven to alternately turn on and off with a dead-time therebetween at a second high frequency, which may be equal to or different from the first high frequency, to cause an oscillating current through the circuit of the primary winding L₂₁ and the blocking capacitor C₂ as repeating to charge and discharge the blocking capacitor C₂ in the same manner as effected in the previous embodiments. Thus, there is developed at the secondary winding L₂₂ the induced current which will circulate through the closed loop of the secondary winding L₂₂ , discharge lamp 10 , and the bypass capacitor C₁ as the inguctor L₁ acts to block such high frequency alternating current. In the inverter mode, the current flowing to the inductor L₁ is kept at a minimum by suitably selecting the values for the inductor L₁ , bypass capacitor C₁ , the secondary winding L₂₂ , and the driving frequency or the second frequency at which the first and second switching transistors Q₁ and Q₂ are operated. Fifth embodiment 〈FIGS. 17 to 19〉 The discharge lamp driving circuit comprises the first and second switching transistors Q₁ and Q₂ connected across the dc voltage source V₁ with first and second diodes D ₁ and D₂ connected in antiparallel relation respectively to the first and second switching transistors Q₁ and Q₂ . A third switching transistor Q₃ is connected in series with the inductor L₁ and the parallel combination of the discharge lamp 10 and the bypass capacitor C₁ across the first switching transistor Q₁ . The transformer T is connected in circuit with its primary winding L₂₁ connected in series with the blocking capacitor C₂ across the second switching transistor Q₂ and with its secondary winding L₂₂ inserted in series with the discharge lamp 10 and in parallel with the bypass capacitor C₁ . In this embodiment, the chopper is defined by the second and third switching transistors Q₂ and Q₃ , the series-parallel circuit of inductor L₁ , discharge lamp 10 and bypass capacitor C₁ , as enclosed in the dotted lines CH in FIG. 17, while the inverter is defined by, in addition to the second switching transistor Q₂ , the parallel combination of discharge lamp 10 and bypass capacitor C₁ common to the chopper, the transformer T and the blocking capacitor C₂ , as enclosed in phantom lines IV in the figure. These switching transistors Q₁ , Q₂ , and Q₃ are controlled in accordance with a timing chart of FIG. 18 so as to provide the like composite lamp driving current as seen shown in FIG. 16 of the fourth embodiment. That is, in the chopper mode during the period T DC ( t₁ - t₂ and t₃ - t₄ ), the second switching transistor Q₂ is driven to turn on and off at a first high frequency while the first and third switching transistors Q₁ and Q₃ are turned off and on, respectively, whereby providing the smoothed dc current to the discharge lamp 10 in the same manner as in the fourth embodiment. In the inverter mode during the period T HF ( t₂ - t₃ ), the first and second switching transistors Q₁ and Q₂ are driven to alternately turn on and off with a dead-time therebetween at a second high frequency which may be equal to or different from the first high frequency, in order to produce an high frequency alternating current through the primary winging L₂₁ and consequently circulate the resulting high frequency alternating current through the closed loop of secondary winding L₂₂ , discharge lamp 10 , and bypass capacitor C₁ , in the same manner as seen in the previous fourth embodiment. In the inverter mode, the third switching transistor Q₃ is kept turned off so that the discharge lamp 10 will not receive the current directly from the blocking capacitor C₂ or from the dc voltage source V₁ . Sixth embodiment 〈FIGS. 19 and 20〉 Referring to FIG. 19, a sixth embodiment of the present invention is shown to comprise the first and second switching transistors Q₁ and Q₂ which are coupled with a pair of capacitors Q₃ and Q₄ in a half-bridge configuration having its input ends connected across the dc voltage source V₁ . First and second diodes D 1A and D 2A are connected in antiparallel relation to the first and second switching transistors Q₁ and Q₂ , respectively. Included in the circuit is a diode network composed of a series combination of diodes D₁₁ and D₁₂ and another series combination of diodes D₂₁ and D₂₂ . These series combinations are connected in parallel with one another between the first and second switching transistors Q₁ and Q₂ . Another first diode D 1B is connected in series with diode D₂₁ in antiparallel relation to the first switching transistor Q₁ . Likewise, another second diode D 2B is connected in series with diode D₂₂ in antiparallel relation to the second switching transistor Q₂ . A series circuit of a first inductor L₁ and the parallel combination of discharge lamp 10 and bypass capacitor C₁ is connected between the output ends of the half-bridge or between the connection of diodes D₁₁ and D₁₂ and the connection of capacitors C₃ and C₄ . Also included in the circuit is the transformer T with its secondary winging L₂₂ connected in series with the discharge lamp 10 in parallel with the bypass capacitor C₁ and with its primary winding L₂₁ connected in parallel with a capacitor C₅ . The parallel combination of the primary winding L₂₁ and capacitor C₅ is connected in series with a second inductor L₃ and a blocking capacitor C₂ between the connection of capacitors C₃ and C₄ and the connection of diodes D₂₁ and D₂₂ . In the above circuit, the capacitors C₃ and C₄ are charged from the dc voltage V₁ and in return supplies to the discharge lamp 10 the like composite lamp driving current of FIG. 5 as the first and second switching transistors Q₁ and Q₂ are driven in accordance with a timing diagram of FIG. 20. In the chopper mode effected during the period T DC ( t₁ - t₂ and t₃ - t₄ in FIG. 20), one of the first and second switching transistors Q₁ and Q₂ is driven to turn on and off at a first high frequency while the other switching transistor is kept turned off, in order to provide across the output ends of the half-bridge the chopped voltage from one of the corresponding capacitors C₃ and C₄ . The chopped voltage is smoothed by the first inductor L₁ and has its high frequency component routed through the bypass capacitor C₁ , whereby applying the resulting smoothed dc current to the discharge lamp 10 . Such smoothed dc current has the polarity which is reversed from the period of t₁ - t₂ to the period of t₃ to t₄ . The above chopper operation can be explained in terms of the following repeated sequence. For example, in the period T DC of t₁ - t₂ , when the first transistor Q₁ is on while the second switching transistor Q₂ is off, the capacitor C₃ supplies a current which flows through first switching transistor Q₁ , diode D₁₁ , first inductor L₁ , discharge lamp 10 , secondary winding L₂₂ , bypass capacitor C₁ , and back to the capacitor C₃ . Upon the subsequent turning off of the first switching transistor Q₁ , the first inductor L₁ acts to maintain the continuous flow of the current through the discharge lamp 10 , secondary winding L₂₂ , bypass capacitor C₁ , capacitor C₄ , diode D 2A , and back to the first inductor L₁ . During the period T DC of t₃ - t₄ , upon the turning on of the second switching transistor Q₂ , the capacitor C₄ supplies a current which flows through secondary winding L₂₂ , discharge lamp 10 , bypass capacitor C₁ , first inguctor L₁ , diode D₁₂ , second switching transistor Q₂ , and back to capacitor C₄ . Upon the subsequent turning off of the second switching transistor Q₂ , the first inductor L₁ causes the current to continuously flow therefrom and through diode D 1A , capacitor C₃ , secondary winding L₂₂ , discharge lamp 10 , and back to the first inductor L₁ . With the provision of the half-bridge configuration, the loag circuit including the discharge lamp 10 receive one-half of the voltage of the dc voltage source. For successfully bypassing the high frequency component of the chopped voltage through the bypass capacitor C₁ without causing an unstable lamp operation and at the same time without requiring the capacitor C₁ and the secondary winding L₂₂ to become bulky, the first high frequency, the inductance of the first inductor L₁ , and the capacitance C₁ of the bypass capacitor C₁ may be selected such that the combined impedance of the lamp 10 and the secondary winding L₂₂ is to be 3 to 10 times that of the bypass capacitor C₁ . In the inverter mode during the period T HF ( t₂ - t₃ and t₄ - t₅ ), the first and second switching transistors Q₁ and Q₂ are controlled to alternately turn on and off with a dead-time therebetween at a second high frequency to provide a high frequency alternating current to the discharge lamp 10 as repeating the following four occurrences 1) to 4). At the first occurrence 1), for example, as indicated in the period of t₂ - t₃ in FIG. 20 in which the second switching transistor Q₂ is turned on while the first switching transistor Q₁ is off, the capacitor C₄ is cooperative with blocking capacitor C₂ to flow a current mainly through primary winding L₂₁ , capacitor C₅ , second inductor L₃ , blocking capacitor C₂ , diode D₂₂ , second switching transistor Q₂ , and back to capacitor C₄ . At the second occurrence 2) in which both of the first and second switching transistors Q₁ and Q₂ are simultaneously off, the second inductor L₃ is cooperative with the primary winding L₂₁ to release the accumulated energy to continuously flow the current mainly through blocking capacitor C₂ , diode D 1B , capacitor C₃ , primary winding L₂₁ , capacitor C₅ , and back to the second inductor L₃ . At the third occurrence 3) in which the first switching transistor Q₁ is on while the second switching transistor Q₂ is off, the capacitor C₃ is cooperative with the blocking capacitor C₂ to flow a current in the opposite direction mainly through first switching transistor Q₁ , diode D₂₁ , blocking capacitor C₂ , second inductor L₃ , primary winding L₂₁ , capacitor C₅ , and back to the capacitor C₃ . At the fourth occurrence 4) in which both of the first and second switching transistors Q₁ and Q₂ are off, the second inductor L₃ is cooperative with the primary winding L₂₁ to maintain the continuous flow of the current mainly through primary winding L₂₁ , capacitor C₅ , capacitor C₄ , diode D 2B , blocking capacitor C₂ , and back to the second inguctor L₃ . In this connection, the diodes D 1B and D 2B , which are connected in antiparallel relation respectively to the first and second switching transistors Q₁ and Q₂ , provide first and second bypass routes for continuously flowing the instantaneous currents released from the second inductor L₃ and the primary winding L₂₁ at the second and fourth occurrences in which both of the switching transistors Q₁ and Q₂ are off. Likewise, in the next second period of time T HF ( t₄ - t₅ ) which is initiated by turning on and off the first switching transistor Q₁ which has been active in the previous first time of period T DC , the first and second switching transistors Q₁ and Q₂ are controlled to alternately turn on and off to produce the high alternating current through the primary winding L₂₁ . In this manner, during each second period of time T HF , the high frequency alternating current continues to flow the primary winding L₂₁ to thereby induce at the secondary winding L₂₂ the corresponding high frequency alternating current which circulates through the closed loop of the secondary winding L₂₂ , discharge lamp 10 , and bypass capacitor C₁ as the inductor L₁ blocks such high frequency alternating current, whereby driving the discharge lamp 10 by thus obtained high frequency alternating current. It should be noted at this point that during the above inverter mode the first and second switching transistors Q₁ and Q₂ are driven at the second high frequency which is higher than the first high frequency at which they are driven in the above chopper mode, such that the first inductor L₁ block the second high frequency to thereby allow only a minute current to divert into the circuit of first inductor L₁ and capacitor C₁ . It should be also noted that, during the chopper mode, the above diode network of diodes D₁₁ , D₁₂ , D₂₁ , and D₂₂ acts to prevent the current from diverting into the inverter circuit of blocking capacitor C₂ , second inductor L₃ , and primary winding L₂₁ since the diode network acts to maintain the voltage of the blocking capacitor C₂ once it is charged up to one-half of the voltage of the dc voltage source V₁ . To explain the diode network operation in detail with reference to the occurrences during the chopper operation T DC , diodes D₁₂ and D₂₁ are cooperative to block the current from diverting into the inverter circuit when the first switching transistor Q₁ is on while the second transistor is off; diodes D₁₁ , D₁₂ , D₂₁ , and D₂₂ are cooperative to block the same when both of the first and second switching transistors are off; and diodes D₁₁ and D₂₂ are cooperative to block the same when the second switching transistor Q₂ is on while the first switching transistor Q₁ is off. With this arrangement of blocking the current from diverting into the inverter circuit during the chopper operation T DC , no substantial alternating current is induced at the secondary winging L₂₂ to thereby keep the smoothed dc current free from any ripple which would otherwise be superimposed thereupon in the absence of the diode network and would certainly result in unstable lamp operation. In this embodiment, the discharge lamp 10 may be ignited with the addition of an L-C resonant starter circuit for inducing an increased ignition voltage across the secondary winging L₂₂ while providing the high frequency alternating current to the discharge lamp 10 by the operation of the inverter. It is also effective to utilize a pulse-width-modulation technique for controlling the output of the circuit while monitoring the condition of the lamp 10 by means of the lamp current or the lamp voltage. The period T HF of the high frequency alternating current within one cycle ( T HF + T DC ) of the composite lamp driving current may differ from differing discharge lamps utilized, but is found, for example, for a typical 80 W mercury-arc lamp having a rated lamp voltage of 115 V, to be preferably less than 20 % of the one cycle in order to prevent the acoustic resonance and assure a stable lamp operation. In this instance, the one cycle ( T HF + T DC ) is preferably between several milliseconds and several tens of microseconds for the purpose of restraining flicker and noises. The first and second switching frequencies can be suitably selected in relation to the inductances and capacitances of the circuit. For example, when first inguctor L₁ , the bypass capacitor C₁ , second inductor L₃ , blocking capacitor C₂ , capacitor C₅ are selected to have respective values that L₁ = 0.2 mH, C₁ = 0.1 µF, L₃ = 0.2 mH, C₂ = 0.15 µF, and C₅ = 0.033 µF for driving the above mercury-arc lamp with the dc voltage source V₁ of 280 V, the first and second switching transistors Q₁ and Q₂ are operated respectively at 40 KHz during the period T DC and respectively at 80 KHz during the period T HF for providing the composite lamp driving current as indicated in FIG. 5. Seventh embodiment 〈FIG. 21〉 A seventh embodiment of the present invention has the similar circuit arrangement to that of the sixth embodiment except that the chopping operation is effected only by the first transistor Q₁ . That is, in the chopper mode, only the first switching transistor Q₁ is driven to turn on and off, while in the inverter mode, both of the first and second switching transistors Q₁ and Q₂ are driven to operate in the same manner as in the sixth embodiment, thus providing the composite lamp driving current as seen in FIG. 16 The like diode network composed of diodes D₁₁ , D₁₂ , D₂₁ , and D₂₂ is also included to prevent the diversion of the undesired current between the series circuit of first inductor L₁ , discharge lamp 10 , bypass capacitor C₁ , and secondary winding L₂₂ , and the inverter circuit of blocking capacitor C₂ , second inductor L₃ , and primary winging L₂₁ . Eighth embodiment 〈FIGS. 22 and 23〉 Referring now to FIG. 22, an eighth embodiment of the present invention is shown to comprise first and second switching transistors Q₁ and Q₂ connected in series across a dc voltage source V₁ with first and second diodes D₁ and D₂ connected in antiparallel relation to the first and second switching transistors Q₁ and Q₂ , respectively. The first and second switching transistors Q₁ and Q₂ are coupled with capacitors C₃ and C₄ in a half-bridge configuration of which input ends are connected to the dc voltage source V₁ . Connected between the output ends of the half-bridge is a series circuit of an inductor L₁ and a parallel combination of a discharge lamp 10 and a bypass capacitor C₁ . The first and second switching transistors Q₁ and Q₂ are controlled in accordance with a timing chart of FIG. 23 to provide the like composite lamp driving current as shown in FIG. 5, as repeating the chopper and inverter functions. In the chopper mode defined within the period T DC ( t₁ - t₂ , t₃ - t₄ ) of FIG. 23, one of the first and second switching transistors Q₁ and Q₂ is driven to turn on and off at a first high frequency while the other switching transistor is kept turned off in order to provide a chopped voltage supplied from the corresponding one of the capacitors C₃ and C₄ . The chopped voltage is then smoothed by the inductor L₁ and of which high frequency component is bypass through the bypass capacitor C₁ , thus providing the resulting smoothed dc current to the discharge lamp 10 . As apparent from FIG. 23, the first and second switching transistors Q₁ and Q₂ are alternately made active from one cycle to the subsequent cycle to thereby reverse the polarity of the dc current applied to the discharge lamp 10 in a repeated manner. Such polarity reversal is not essential and therefore only one of the switching transistors Q₁ and Q₂ may be made active in the chopper mode of providing the dc current. In the inverter mode defined within the period T HF ( t₂ - t₃ , t₄ - t₅ ), the first and second switching transistors Q₁ and Q₂ are driven to alternately turn on and off with a dead-time therebetween at a second high frequency which is lower than the first high frequency, such that the discharge lamp 10 receives a resulting high frequency alternating current as the circuit repeats the following four occurrences 1) to 4), as indicated in FIG. 23. At the first occurrence 1) in which the first switching transistor Q₁ is off and the second switching transistor Q₂ is on, the capacitor C₄ discharges and causes a current to flow therefrom mainly through the discharge lamp 10 , inductor L₁ , second switching transistor Q₂ , and back to the capacitor Q₄ . At the second occurrences 2) in which the first and second switching transistors Q₁ and Q₂ are simultaneously off, the inductor L₁ acts to continuously flow the current therefrom mainly through diode D₁ , capacitor C₃ , discharge lamp 10 , and back to the inductor L₁ . At the third occurrence 3) in which the first switching transistor Q₁ is on while second switching transistor Q₂ is off, the capacitor C₃ discharges and causes a current to flow therefrom in the opposite direction through first switching transistor Q₁ , inductor L₁ , discharge lamp 10 , and back to the capacitor C₃ . At the fourth occurrence 4) when first and second switching transistors Q₁ and Q₂ are simultaneously off, the inductor L₁ act to maintain the continuous flow of the current therefrom through discharge lamp 10 , capacitor C₄ , diode D₂ , and back to the inductor L₁ . In the above circuit, the inductance of L₁ is selected to have such a value that the second high frequency of the inverter operation will not be lowered to audio frequency. In this connection, the first high frequency of the chopper operation is selected to be higher than the second high frequency by such an extent as to increase the impedance of the inductor L₁ which limits the current flowing through the discharge lamp 10 . Typical values for the components of the above circuit are, for instance, that C₁ = 0.7 µF, L₁ = 0.1 mH when V₁ = 140 V and that Q₁ and Q₂ are driven to operate at 100 KHz the chopper mode and at 30 KHz in the inverter mode. Ninth embodiment 〈FIG. 24〉 A ninth embodiment of the present invention utilizes a dc voltage source comprising a diode bridge DB connected to an ac voltage source V AC through a filtering circuit FT . The lamp driving circuit of the present embodiment is similar to that of the eighth embodiment except that the output of the dc voltage source DB is connected across the first switching transistor Q₁ through a second inductor L₂ . Thus, in the chopper mode, only the first switching transistor Q₁ is driven to turn on and off in order to provide the smoothed dc current to the discharge lamp 10 in the manner as described with reference to the eighth embodiment. The inverter operation of the circuit is identical to that of the eighth embodiment. In this sense the first switching transistor Q₁ is commonly utilized both in the chopper and inverter modes. The characterizing feature of the present embodiment resides in that, in the chopper mode, the first switching transistor Q₁ is cooperative with the second inductor L₂ and diode D₂ to act as a positive booster for increasing the magnitude of the voltage acting to the series circuit of capacitors C₃ and C₄ . That is, the energy accumulated in the second inductor L₂ during the chopping operation is additive to the dc power source DB to apply the resultant added voltage to the capacitors C₃ and C₄ for charging the same at the high frequency up to the voltage higher than that of the ac voltage source V AC . Also with this result, the input current I AC can take the form of a sine wave, thereby making it possible to have an improved power factor of more than 90 %. Tenth embodiment 〈FIGS. 25 and 26〉 A tenth embodiment of the present invention is similar to the eighth embodiment except that another pair of switching transistors Q₃ and Q₄ is incorporated as replacing the pair of capacitors C₃ and C₄ to form a full-bridge configuration with diodes D₃ and D₄ connected in antiparallel relation to the switching transistors Q₃ and Q₄ . These four switching transistors Q₁ to Q₄ are driven in accordance with a timing chart of FIG. 26 to provide the like composite lamp driving current as shown in FIG. 5. In the chopper mode defined within the period of T DC ( t₁ - t₂ ) during which the second and third switching transistors Q₂ and Q₃ are off, the first switching transistor Q₁ is turned on and off at a first high frequency while the fourth switching transistor Q₄ is kept turned on in order to provide from the dc voltage V₁ a chopped voltage which is smoothed by the inductor L₁ and of which high frequency component is bypassed through the bypass capacitor C₁ , thereby providing to the discharge lamp 10 the smoothed dc voltage. Also in the chopper mode defined within the period of T DC ( t₃ - t₄ ) during which the first and fourth switching transistor Q₁ and Q₄ is off, the third switching transislor Q₃ is driven to turn on and off at the first frequency while the second switching transistor Q₂ is kept turned on, thereby providing the smoothed dc voltage of the opposite polarity in the like manner as above. In the inverter mode defined within the period T HF ( t₂ - t₃ ), the first and fourth switching transistors Q₁ and Q₄ are driven to turn on and off at a second high frequency, which is lower than the first high frequency, in synchronism with one another and in an alternate manner with the second and third switching transistors Q₂ and Q₃ turning on and off in synchronism with one another, thus providing the resulting high frequency alternating current to the discharge lamp 10 the high frequency alternating current. In the inverter mode defined within the period T HF ( t₄ - t₅ ), these four transistors Q₁ to Q₄ are operated in the opposite manner to provide the like high frequency alternating current to the discharge lamp 10 . The second frequency, at which the switching transistors Q₁ to Q₄ are operated to provide the high frequency alternating current during the period T HF ( t₂ - t₃ and t₄ - t₅ ), is selected such as to cause a resonance in the series circuit of bypass capacitor C₁ and inductor L₁ , enabling to apply a high voltage sufficient to operate the discharge lamp stably. Typical values for the components of the above circuit are, for instance, that C ₁ = 0.7 µF, L₁ = 0.1 mH when V₁ = 140 V and that Q₁ and Q₂ are driven to operate at 100 KHz in the chopper mode and at 30 KHz in the inverter mode. Modification of tenth embodiment 〈FIG. 27〉 The circuit of FIG. 25 of the tenth embodiment may be operated in accordance with a timing chart of FIG. 27 for providing the like composite lamp driving current to the discharge lamp. In this modification which is identical to the tenth embodiment except for the switching operation in the chopper mode. That is, during the period T DC ( t₁ - t₂ ), the first and fourth switching transistors Q₁ and Q₄ are driven to simultaneously turn on and off, and during the period T DC ( t₃ - t₄ ) the second and third switching transistors Q ₂ and Q₃ are driven to simultaneously turn on and off. With this result, upon the simultaneous off of the paired transistors, the energy stored in the inductor L₁ in the previous turning on of the switching transistors is allowed to flow back to the dc voltage V₁ through the corresponding two of the diodes D₁ to D₄ . For example, when the switching transistors Q₁ and Q₄ are simultaneously off after being turned on during the period T DC of t₁ - t₂ , the inductor L₁ causes an instantaneous current to flow therefrom through diode D₃ , dc voltage source V₁ , diode D₂ , discharge lamp 10 , and back to the inductor L₁ . And when the second and third switching transistors Q₂ and Q₃ are off after being turned on, the inductor L₁ acts to maintain the continuous flow of an instantaneous current in opposite direction therefrom through discharge lamp 10 and bypass capacitor C₁ , diode D₁ , dc voltage source V₁ , diode D₄ and back to the inductor L₁ . LIST OF REFERENCE NUMERALS 10 discharge lamp V₁ dc voltage source Q₁ - Q₄ switching transistors C₁ bypass capacitor C₂ blocking capacitor C₃ - C₅ capacitor L₁, L₃ inductor T transformer L₂₁ primary winding L₂₂ secondary winding Ia lamp current D₁ - D₄ diode D₁₁, D₁₂, D₂₁, D₂₂ diode D 1A , D 1B , D 2A , D 2B diode V AC ac voltage source FT filter circuit DB diode bridge CH chopper IV inverter

Claims: A discharge lamp driving circuit comprising: a dc (direct current) voltage source; chopper means comprising a first switching circuit which is coupled to said dc voltage source to provide therefrom a periodically interrupted current and smooth the same for producing a smoothed dc current; inverter means comprising a second switching circuit which is coupled to said dc voltage source for producing therefrom a high frequency alternating current; control means connected to said chopper means and said inverter means to apply to said discharge lamp a repeating cycle of a composite lamp driving current composed of said high frequency alternating current interrupted by said smoothed dc current; characterised by said chopper means and said inverter means having in their first and second switching circuits at least one common switching element. A discharge lamp driving circuit as set forth in claim 1, wherein said chopper means is configured to apply said smoothed dc current while reversing the polarity thereof from one cycle to the subsequent cycle of said composite lamp driving current. A discharge lamp driving circuit as set forth in claim 1, wherein the first switching circuit of said chopper means comprises said at least one common switching element (Q₁,Q₂) which is coupled in series circuit with an inductor (L₁), said dc voltage source (V₁), and a parallel combination of said discharge lamp (10) and a bypass capacitor (C₁), said switching element being driven to turn on and off at a first high frequency during a first period of time to produce said interrupted current which is smoothed by said first inductor (L₁) and is removed of its high frequency component by said bypass capacitor (C₁) in order to apply said smoothed dc current to said discharge lamp (10) within each cycle of said composite lamp driving current; the second switching circuit of said inverter means comprising a pair of first and second switching elements (Q₁,Q₂) at least one of which is common to said first switching circuit, said first and second switching elements being connected in circuit with a dc blocking capacitor (C₂) and a transformer (T) with a primary winding (L₂₁) and a secondary winding (L₂₂) which is inserted in series relation with said discharge lamp and in parallel relation with said bypass capacitor (C₁); said first and second switching elements (Q₁,Q₂) being connected in series circuit across said dc voltage source with the series circuit of said dc blocking capacitor (C₂) and the primary winding (L₂₁) being connected across one of said first and second switching elements (Q₁,Q₂) to form therewith a series oscillating circuit; said first and second switching elements (Q₁,Q₂) being controlled to alternately turn on and off at a second high frequency during a second period of time alternating with said first period of time in order to provide a high frequency alternating current at said series oscillating circuit as repeating to charge and discharge said dc blocking capacitor (C₂), whereby inducing said high frequency alternating current in the circuit of said secondary winding (L₂₂) and said discharge lamp (10) to provide said high frequency alternating current to said discharge lamp (10) within each cycle of said composite lamp driving current. A discharge lamp driving circuit as set forth in claim 1, wherein said first switching circuit of said chopper means comprises a single pair of first and second chopper switching elements (Q₁,Q₂) and a pair of first and second capacitors (C₃,C₄) arranged in a half bridge configuration having its input ends connected across said dc voltage source and having its output ends connected across a series circuit of an inductor (L₁) and a parallel combination of said discharge lamp (10) and a bypass capacitor (C₁); one of said first and second chopper switching elements (Q₁,Q₂) being controlled to repetitively turn on and off at a first high frequency while the other switching element is kept turned off during a first period of time in order to provide to said discharge lamp within each cycle of said composite lamp driving current the dc current which is smoothed by said inductor (L₁) and is removed of its high frequency component by said bypass capacitor (C₁), said first and second chopper switching elements (Q₁,Q₂) being controlled to alternately turn off at said first high frequency with one of them being driven to repetitively turn on and off so as to change the polarity of said smoothed dc current applied to said discharge lamp (10) from one cycle to the subsequent cycle of said composite lamp driving current; said second switching circuit of said inverter means comprising a pair of first and second inverter switching elements (Q₂,Q₃) at least one of which is common to said first switching circuit, said first and second switching elements being connected in circuit with a dc blocking capacitor (C₂) and a transformer (T) with a primary winding (L₂₁) and a secondary winding (L₂₂) which is inserted in series relation with said discharge lamp (10) and in parallel relation with said bypass capacitor (C₁); said first and second chopper switching elements (Q₁,Q₂) being connected in series circuit across said dc voltage source with the series circuit of said dc blocking capacitor (C₂) and the primary winding (L₂₁) being connected across one of said first and second chopper switching elements to form therewith a series oscillating circuit; said first and second inverter switching elements being controlled to alternately turn on and off at a second high frequency during a second period of time alternating with said first period of time in order to provide a high frequency alternating current at said series oscillating circuit as repeating to charge and discharge said dc blocking capacitor (C₂), whereby inducing said high frequency alternating current in the circuit of said secondary winding (L₂₂) and said discharge lamp (10) to provide said high frequency alternating current to said discharge lamp within each cycle of said composite lamp driving current. A discharge lamp driving circuit as set forth in claim 4, wherein said oscillating circuit includes first and second diodes (D₁,D₂); said first diode (D₁) connected across said first switching element (Q₁) in antiparallel relation therewith to form a first bypass route for a first instantaneous current which is discharged from said primary winding (L₂₁) immediately after the simultaneous turning off of said first and second switching elements (Q₁,Q₂) occurring after said first and second switching elements being simultaneously turned off and on, respectively, whereby allowing said first instantaneous current to continuously flow through said oscillating circuit in one direction through said first bypass route; said second diode (D₂) being connected across said second switching element (Q₂) in antiparallel relation therewith to form a second bypass route for a second instantaneous current which is discharged from said primary winding (L₂₁) immediately after the simultaneous turning off of said first and second switching elements occurring after said first and second switching elements (Q₁,Q₂) being simultaneously turned on and off respectively, whereby allowing said second instantaneous current to continuously flow through said oscillating circuit in the opposite direction through said second bypass route. A discharge lamp driving circuit as set forth in claim 5, further including a diode network connected in circuit between said first switching circuit of said chopper means and said second switching circuit of said inverter means in such a manner as to prevent said dc blocking capacitor (C₂) from repeating to be charged and discharges during the first period of time . A discharge lamp driving circuit as set forth in claim 1, wherein said first and second switching circuits commonly includes a pair of first and second switching elements (Q₁,Q₂) arranged in a bridge configuration having its input ends connected across said dc voltage source and having its output ends connected across a series circuit of an inductor (L₁) and a parallel combination of said discharge lamp (10) and a bypass capacitor (C₁); one of said first and second switching elements (Q₁,Q₂) being controlled to turn on and off at a first frequency with the other switching element (Q₂) being kept turned off during a first period of time to provide to said series circuit a dc current which is smoothed by said inductor (L₁) and is removed of its high frequency component by said bypass capacitor (C₁) for feeding said smoothed dc current to said discharge lamp within each cycle of said composite lamp driving current; said first and second switching elements (Q₁,Q₂) being controlled to alternately turn on and off during a second period of time alternating with said first period of time in such a manner as to provide to said discharge lamp said high frequency alternating current with a second high frequency within each cycle of said composite lamp driving current. A discharge lamp driving circuit as set forth in claim 7, wherein said second high frequency is lower than said first high frequency at which said switching elements (Q₁,Q₂) are turned on and off for producing said smoothed dc current so that said high frequency alternating current at said second frequency is allowed to be substantially fed to said discharge lamp (10). A discharge lamp driving circuit as set forth in claim 1, wherein said first switching circuit of said chopper means comprises a pair of first and second switching elements (Q₁,Q₂) and a pair of first and second capacitors (C₃,C₄) which are arranged in a half-bridge configuration having its input ends connected across said dc voltage source and having its output ends connected across a series circuit of an inductor (L₁) and a parallel combination of said discharge lamp (10) and a bypass capacitor (C₁); each one of said first and second switching elements (Q₁,Q₂) being controlled to turn on and off at a first high frequency with the other switching element being kept turned off during a first period of time to provide to said series circuit a dc current which is smoothed by said inductor (L₁) and is removed of its high frequency component by said bypass capacitor (C₁) in order to provide said smoothed dc current to said discharge lamp (10) while reversing the polarity thereof from one cycle to the subsequent cycle of said composite lamp driving current; said first and second switching elements (Q₁,Q₂) being controlled to turn on and off during a second period of time alternating with said first period of time to provide said high frequency alternating current with a second high frequency to said series circuit of said inductor (L₁) and the parallel combination of said discharge lamp (10) and said bypass capacitor (C₁); said second high frequency being lower than said first high frequency to such an extent that said second high frequency alternating current is supplied to said discharge lamp (10) within each cycle of said composite lamp driving current while allowing said second high frequency component to be fed substantially to said discharge lamp without being substantially bypassed through said bypass capacitor (C₁).

Inventors: NAGASE HARUO, SATOMI AKIRA, NAGASE, HARUO, SATOMI, AKIRA
Applicants: MATSUSHITA ELECTRIC WORKS LTD, MATSUSHITA ELECTRIC WORKS, LTD.
Application year: 1988
Main classification: H05B41
IPC codes: H05B41