OUTPUT AMPLIFIER

Abstract: An output amplifier for pulse generators comprises a first bipo­ lar transistor amplifier stage (4) and a second gallium arsenide field-effect (GaAs FET) transistor stage (5). The GaAs FET transistor amplifier stage (5) is used to generate high output swing and fast transition times over a wide frequency band, whereas the bipolar tran­ sistor amplifier stage (4) provides high gain and compensation of the GaAs anomalies.

Description: This invention relates to an output amplifier for high output swing and for operation at least at fast transition times in pulse generators, comprising a first linear amplifier stage using bipolar transistors and receiving an internal pulse signal, wherein said first amplifier stage includes a differential amplifier with differential inputs and outputs, and a second amplifier stage which is controlled by the output of said first amplifier stage, said second amplifier stage including two transistors, each being coupled to one output of said differential amplifier. and whose control electrodes are connected together to a constant voltage source. It is a major problem in pulse generator technology to provide pulses with very fast (variable) rise and/or fall times (fast transition times). The limiting factor in most applications is the output amplifier which receives a pulse signal internally generated (internal pulse signal). It is already known to use bipolar technology for an output amplifier of the type described above. In such a bipolar output amplifier, a first bipolar transistor stage may receive the pulse signal internally generated. This first stage may be a differential amplifier, the outputs of said differential stage being connected to a second bipolar transistor amplifier stage. Said second stage comprises bipolar transistors which are able to generate an output signal with the required output swing, i.e. the necessary maximum/minimum output amplitude. An example of such prior art amplifier is described in Tietze/Schenk, Halbleiterschaltungstechnik 3. Aufl. Heidelberg 1974, p. 413 and Fig. 14.9. This reference depicts a bipolar-only cascode amplifier, wherein the first amplifier stage is wired as a differential amplifier. Most commonly, pulse generators have to provide an output swing of 10 V (volts). For medium output bandwidths (medium transition times of the generated output pulses), bipolar transistors are suitable. Unfortunately, this does not apply for very fast transition times, e.g. transition times of 0.6 ns (nanoseconds) and below. Upon such fast transition times, which correspond to a bandwidth of 1.0 GHz (Gigahertz), the collector-emitter breakdown voltage is in the range of 6 V and therefore not applicable for output swings of 10 V. This is one of the reasons that pulse generators with adjustable amplitudes, rise times and offsets were not yet designed to generate the very fast transition time mentioned above. Output amplifiers based on other technologies than bipolar technology are unsuited for the application described above. For example, an output amplifier on the exclusive basis of gallium arsenide field-effect transistors suffers from very small gain. This small gain does not allow feedback loops to compensate the amplifier for temperature effects and for linearization. A further disadvantage is the so-called "droop effect", i.e. the high frequency gain is different from the low frequency gain (one should keep in mind that commercial pulse generators allow adjustment of the pulse repetition rate, i.e. the output amplifier has to be a broadband amplifier, from direct current to the maximum frequency). It is also already known to replace the bipolar transistor in the second amplifier stage by a power MOSFET transistor, cf. US 4,528,520 which depicts an output amplifier for a cathode ray tube. The MOSFET provides higher output swing without deteriorating the high frequency characteristic. However, the circuit of this reference is not operative at the required very high frequencies (e.g., its transition frequency is considerably smaller than the transition frequency of a GaAs FET). Further, the single-path design of this CRT amplifier is not suited for very high frequencies. United States Patent US 4,121,169 further depicts an audio amplifier circuit with bipolar transistors in a first stage and field-effect transistors in a second stage (cf. particularly Fig. 7). However, due to the different objective - the prior art circuit is intended to reduce output signal deformation -, the bipolar transistors are operated as emitter followers and therefore provide only unity voltage gain. Such would be meaningless in the present invention, where the bipolar transistors are intended to provide a high amplitude, i.e. high gain. Further, the gate potential of the FETs is not constant. This is no problem in the application shown there, as the circuit is fully switched anyway - i.e. the output swing is constant -, but makes it unusable in an application (like the present invention) where the output amplitude is proportional to the input amplitude. It is a major objective of the present invention to provide an output amplifier of the type described above with even improved characteristics and which is particularly suited for pulse generators. Specifically, the output amplifier should provide a swing of 15 V and transition times of 0.6 ns. According to the invention, this problem is solved in that said first linear amplifier stage provides high gain, that the two transistors in said second amplifier stage are gallium arsenide field-effect transistors in common-gate configuration and that said first amplifier stage is connected with said second amplifier stage via a current multiplier stage, preferably with adjustable multiplication factor. An output amplifier according to the present invention therefore comprises a first differential bipolar transistor amplifier stage receiving internal pulse signals and a second amplifier stage being controlled - via a multiplier stage - by the output of said first bipolar amplifier stage and comprising two gallium arsenide field-effect transistors (GaAs FETs) which are coupled to the outputs of said differential amplifier, respectively, and which are wired as a common gate stage. The characteristics of GaAs FETs as such are mentioned in "Improvement of the Drain Breakdown Voltage of GaAs Power MESFET's by a Simple Recess Structure", IEEE Transactions on Electron Devices, Vol. ED-25, No.6, June 1978. Although an output amplifier comprising only GaAs FETs has a very small gain, its characteristics allow output amplitudes of approximately 15V. As the parasitic capacitances of the GaAs FET devices are rather small, the GaAs FET stage can further generate pulses with very small transition times. The invention proposes a "differential design", i.e. the bipolar amplifier is a differential amplifier followed by two GaAs FETs in the second stage. The inputs receive two internal signals complementary to each other. The differential amplifier is used for linear amplification (as the GaAs stage has only a low gain); it may further comprise one or more feed-back loops, e.g. feedback resistors, for the purpose of linearization. It also compensates for the GaAs anomalies, in particular the droop effect. It is further an important contribution of the present invention that the two GaAs FETs cascaded to the bipolar stage are wired as a common gate stage with a constant voltage source connected to the respective gates of the GaAs FETs. This allows further increase of the transition times at high amplitudes, in particular as the gate currents compensate each other, i.e. there is no compensation current. Basically, a common base stage is already known from the reference Tietze/Schenk, see above. Further, the multiplier stage connecting said first bipolar amplifier stage and said second (GaAs FET) amplifier stage may be used to adjust the amplitude of the output pulses. Thus, the combination of a first differential bipolar transistor amplifier stage with a second GaAs FET amplifier stage comprising two GaAs FETs wired as a common gate stage provides an output amplifier which may generate pulses with fast transition times and high output swing (high output amplitudes) as cannot be obtained by the prior art. In a preferred embodiment, said first bipolar amplifier stage comprises a voltage-to-current converter for the purpose of impedance matching (the input of this portion of the first amplifier stage is a high-impedance input, whereas it has a low-impedance output). Preferably, said voltage-to-current converter is a bipolar transistor wired as an emitter follower. In contrast thereto, the second (GaAs FET) amplifier stage may be wired as a current-to-voltage converter. In another preferred embodiment, said first and second amplifier stages are chips which are mounted on a common hybrid, e.g. in thick or thin film technology. It is not possible to integrate both bipolar and gallium arsenide technology on a single chip; on the other hand, the leads between the chips should be as short as possible to avoid additional delays caused by the lead capacitance together with the input impedance of the following portions (lead capacitance and input impedance operate as low-pass circuits). Therefore, it is the most feasible solution to mount both chips on a common hybrid. In the accompanying drawings, a preferred embodiment of the present invention is shown. More features and advantages of the invention may be recognized from the following description in which these drawings are explained. In the drawings, Fig. 1 is a block diagram of an output amplifier, Fig. 2 depicts a simplified amplifier circuit and Fig. 3 is a detailed diagram of an output amplifier with differential inputs. Figs. 1 and 2 are used to explain the concept of a combined bipolar/GaAs FET amplifier; the invention is depicted and explained with reference to Fig. 3. In the block diagram shown in Fig. 1, an output amplifier for a pulse generator is outlined in general as 1. An internal pulse signal is fed to the amplifier at input terminal 2; the output signal OUT is generated at output terminal 3. The output amplifier consists of two stages or portions, a (first) bipolar stage 4 and a (second) GaAs FET stage 5. Second stage 5 provides signals with fast transition times and, at the same time, high output swing, whereas first (bipolar) stage 4 provides high gain and compensates for the GaAs FET anomalies (e.g. droop effect or temperature drift). Fig. 2 depicts a simplified schematic diagram of the output amplifier. The bipolar stage (cf. Ref. No. 6) comprises a voltage-to-current converter 7 receiving an internal pulse signal U in at input terminal 8. Voltage-to-current converter 7 provides impedance matching and amplification. Its output is fed via line 9 to the GaAs FET stage (cf. Ref. No. 10). Said GaAs FET stage comprises a gallium arsenide field-effect transistor 11 which is wired as a common gate transistor. Its gate is connected with a D.C. voltage source 12. A further (adjustable) D.C. voltage U off is fed via resistor 13 to its drain. D.C. voltage U off is used to adjust the offset of the generated output signal U out (on line 14). Preferably, bipolar stage 6 and GaAs FET stage 10 are both chips which are mounted on a common hybrid. Resistor 13 is a 50 Ohm resistor. If the output (line 14) is also terminated with a 50 Ohm resistor, the output signal provided by the output amplifier is 5 V pp (Volts peak-to-peak), whereas, when the output is left open, the amplitude of the output signal is 10 V. Fig. 3 depicts a detailed circuit diagram of an output amplifier with differential inputs. The first (bipolar) amplifier stage receives two internal pulse signals U in1 and U in2 at input terminals 15 and 16. These signals are complementary to each other as indicated by 17 and 18. Capacitor 19 is used to bypass resistor 20 with respect to alternating current signals. Therefore, resistor 20 causes a level shift of the direct current component of the incoming signal U in1 , whereas the alternating current component is bypassed via capacitor 19. Incoming signal U in1 is then fed to the base of NPN transistor 21, said base also being connected with constant current source 22. The emitter of transistor 21 is further connected to constant current source 48. Transistor 21 is wired as an emitter follower and operates as an impedance matching circuit. It has a high-impedance input and a low-impedance output. Capacitor 23, resistor 24, NPN transistor 25 and constant current sources 26 and 27 operate in the same manner. The emitters of transistors 21 and 25 are connected via lines 28 and 29 to the inputs of a differential amplifier which is outlined in general as 30. This differential amplifier consists of two transistors 31 and 32, two resistors 33 and 34 and a constant current source 35. Resistors 33 and 34 are 10 Ohm resistors. Differential amplifier 30 is used for linear amplification of the difference between U in1 and U in2 ; the feedback resistors are further used for linearization, in particular with respect to the GaAs FET anomalies. The outputs of differential amplifier 30 (lines 36 and 37) are fed to multiplier stage 38. This multiplier stage may be designed using any suitable technology, whereby the multiplication factor is adjustable to vary the output amplitude. A signal fed to input terminal 39 provides this multiplication factor. The outputs of multiplier stage 38 are fed via lines 40 and 41 to a common gate stage consisting of two gallium arsenide field-effect transistors 42 and 43. The gates of these GaAs FET transistors are connected with a constant voltage source 44. Their drains are connected via resistors 45 and 46 (both 50 Ohm resistors) with a variable voltage U off which may be varied to adjust the signal offset. Output signals OUT₁ and OUT₂ - which are complementary to each other - are present at terminals 47 and 49 which are connected to the respective drain terminals of GaAs FET transistors 42 and 43. These GaAs FET transistors operate as current-to-voltage converters with an amplification over a very broad frequency band. If - as indicated by 50 Ohm resistors 50 and 51 - the output is terminated with a load of 50 Ohms, the output voltage OUT₁ is - assuming a transistor current (of GaAs FET 42) of 200 mA - 5 Volts as resistors 45 and 50 represent a parallel circuit with respect to the high frequency components. The same applies to output voltage OUT₂ (resistors 46 and 51). If, on the other hand, the outputs are left open, the output voltage (OUT₁ or OUT₂, respectively) is 10 Volts; this output voltage must be provided by GaAs FET transistor 42 (or 43).

Claims: Output amplifier for high output swing and for operation at least at fast transition times in pulse generators, comprising a) a first linear amplifier stage using bipolar transistors (31,32) and receiving an internal pulse signal (U in ), wherein b) said first linear amplifier stage includes a differential amplifier (30) with differential inputs and outputs, c) a second amplifier stage which is controlled by the output of said first amplifier stage, d) said second amplifier stage including two transistors, each being coupled to ones output of said differential amplifier (30), and whose control electrodes are connected together to a constant voltage source, characterized in that e) said first linear amplifier stage provides high gain, f) the two transistors in said second amplifier stage are gallium arsenide field-effect transistors (42,43) in common gate configuration, and that g) said first amplifier stage is connected with said second amplifier stage via a current multiplier stage (38), preferably with adjustable multiplication factor. Output amplifier according to claim 1, characterized in that said first amplifier stage comprises voltage-to-current converters, preferably emitter followers (21,25). Output amplifier according to at least one of the preceding claims, characterized in that said second amplifier stage is wired as a current-to-voltage converter. Output amplifier according to at least one of the preceding claims, characterized in that said first and second amplifier stages are chips mounted on a common hybrid, e.g. in thick or thin film technology.

Inventors: BERKEL, WERNER
Applicants: HEWLETT-PACKARD GMBH
Application year: 1988
Main classification: H03K5
IPC codes: H03F3, H03K19, H03K5, H03F1