Pressure connection type semiconductor device

Abstract: According to the present invention, one surface of a temperature compensator (2) is arranged to face the surface of a first electrode (1c) which is formed on one surface of a semiconductor element(1) while one surface of a first external electrode (3) is arranged to face the other surface (2b) of the temperature compensator (2). A second external electrode (14) is arranged in a space region which is defined by a through hole (2a) of the temperature compensator (2) and a cavity (3a) of the first external electrode (3), to face the surface of a second electrode (1b). An insulator (13) is interposed between the outer side surface of the second external electrode (14) and the inner side surfaces of the cavity (3a) and the through hole (2a) so that the second external electrode (14) is located in prescribed positional relation to the first external electrode (3) and the temperature compensator (2). Thus, there is no possibility that any misregistration is caused between the temperature compensator (2), the first external electrode (3), the second external electrode (14) and the insulator (13), whereby the temperature compensator (2) and the second electrode (1b) can be correctly and easily aligned with the first electrode (1c) and the second external electrode (14), respectively.

Description: The present invention relates to a semiconductor device, and more particularly, it relates to a pressure-connection type semiconductor device such as a thyristor or a high-power transistor. Japanese Patent Laying-Open Gazette No. 79669/1987 discloses a conventional semiconductor device of this type. According to the Japanese publication, the cathode contacts with a metal electrode plate, which in turn contacts the semiconductor element. The contact areas of the cathode are made smaller than the corresponding areas of the metal electrode plates. This structure avoids deformation of the cathode, even when the metal electrode plates are not properly centered. The European patent application EP-A-0 220 698 discloses a GTO thyristor comprising island-shaped emitter zones. The surface not covered with emitter zones serves as the basis region and is covered with a gate electrode. The gate electrode is located at a central position of the semiconductor body and contacts same through a metal contact disc. This contact disc is located in a cavity or bore of the cathode electrode. The contact disc is insulated by an insulation sleeve and is urged to the semiconductor element by a spring. Fig. 1 is a sectional view showing another semiconductor device according to the prior art, similar to that of JP-A-62 079 669. Referring to Fig. 1, a thyristor element 1 is provided in the form of a disc, wherein a gate electrode 1b and a cathode electrode 1c are provided on the lower surface of a semiconductor substrate 1a in inner and outer peripheral regions, respectively. An anode electrode 1d is provided on the upper surface of the semiconductor substrate 1a. A doughnut-shaped temperature compensator 2 is pressed against the cathode electrode 1c to get electrically in contact only with that. An external cathode electrode 3 is pressed against the temperature compensator 2 to get electrically in contact only with that. Further, a discoidal external anode electrode 4 is pressed against the anode electrode 1d to get electrically in contact only with that. A flange 5a is provided on the outer peripheral region of the external cathode electrode 3, while a flange 5b is provided on the outer peripheral region of the external anode electrode 4. An insulating sleeve 6 couples these flanges 5a and 5b with each other, to thereby integrally couple the external cathode electrode 3 with the external anode electrode 4 while maintaining an electrically insulated state. A disc spring 7 and an insulator 8, the configuration of which is shown in Fig. 2, are received in this order in a cavity 3a defined in a central portion of the external cathode electrode 3. A gate lead 10 is inserted in a through hole 8a defined in an upper central portion of the insulator 8 and an insulating tube 9. The first end of the gate lead 10 is pressed against the gate electrode 1b to provide electrical contact by the spring force of the disc spring 7 through the insulator 8, while the second end thereof is electrically connected with a gate terminal 11. The assembly sequence of the semiconductor device shown in Fig. 1 is as follows: First, the gate lead 10 is inserted into the through hole 8a of the insulator 8 and the insulating tube 9, to thereby form an assembly A . Then the disc spring 7 and the assembly A are introduced in this order into the cavity 3a of the external cathode electrode 3, and the temperature compensator 2 is placed on the upper surface of the external cathode electrode 3. Further, the thyristor element 1 is so arranged that the temperature compensator 2 faces the cathode electrode 1c and that an end of the gate lead 10 faces the gate electrode 1b. Finally, the external anode electrode 4 is placed on the anode electrode 1d of the thyristor element 1, and the flanges 5a and 5b are coupled with each other by the insulating sleeve 6 while externally applying pressure to the external cathode electrode 3 and the external anode electrode 4. Fig. 3 illustrates the positional relation between the temperature compensator 2, the external cathode electrode 3, the insulator 8 and the gate lead 10. As shown in Fig. 3, a clearance is defined between the insulator 8 and the gate lead 10 since the bore diameter a of the through hole 8a of the insulator 8 is larger than the outer diameter b of the gate lead 10, whereby misalignment may be caused between the insulator 8 and the gate lead 10. Similarly to the above, another clearance is defined between the insulator 8 and the external cathode electrode 3 since the inner diameter c of the cavity 3a of the external cathode electrode 3 is larger than the outer diameter d of the insulator 8, whereby misalignment may be caused between the external cathode electrode 3 and the insulator 8. Further, still another clearance is defined between the temperature compensator 2 and the insulator 8 since the inner diameter e of a through hole 2a provided in the central portion of the temperature compensator 2 is larger than the outer diameter d of the insulator 8, whereby misalignment may be caused between the temperature compensator 2 and the insulator 8. In other words, the conventional semiconductor has no function of relatively positioning the temperature compensator 2, the external cathode electrode 3, the insulator 8 and the gate lead 10. Thus, misregistration may be caused between these elements. When the temperature compensator 2, the external cathode electrode 3, the insulator 8 and the gate lead 10 are dislocated as shown in Fig. 4, for example, the lower surface of the gate electrode 1b (Fig. 1) cannot correctly face the first end of the gate lead 10, while the lower face of the cathode electrode 1c (Fig. 1) cannot correctly face the upper surface of the temperature compensator 2, to thereby disable any correct pattern alignment. Similar problems are also caused in a static induction thyristor, a gate turn-off thyristor, a high-power transistor and the like. Particularly in such devices, improvement in degree of integration and increase in bore diameter of semiconductor elements, which have been required in recent years, are difficult to attain if the aforementioned clearances are defined. With improvement in the degree of integration and increase in bore diameter of the semiconductor elements, numbers of gate electrodes etc. provided on the semiconductor elements are increased too, so that the number of portions requiring alignment have also increased, whereas it is still difficult to correctly align all of these portions and elements. A semiconductor device is provided according to the present invention as defined in Claim 1. Accordingly, a principal object of the present invention is to provide a semiconductor device which can correctly and easily perform alignment between the first electrode of the semiconductor element and the temperature compensator and between the second electrode of the semiconductor element and the second external electrode. These and other objects, and advantages of the present invention will become more apparent from the following detailed description of embodiments when taken in conjunction with the accompanying drawings. Fig. 1 is a sectional view showing a conventional semiconductor device; Fig. 2 is a perspective view of an insulator, which is an element for the semiconductor device shown in Fig. 1; Fig. 3 illustrates a positional relation between a temperature compensator, an external cathode electrode, an insulator and a gate lead of the semiconductor device shown in Fig. 1; Fig. 4 illustrates exemplary positional relation between the temperature compensator, the external cathode electrode, the insulator and the gate lead of the semiconductor device shown in Fig. 1 in the case of a misregistration; Fig. 5 is a sectional view showing a first embodiment of a semiconductor device according to the present invention; Fig. 6A is a perspective view showing an assembly, which is an element for the semiconductor device shown in Fig. 5, in a state before assembling; Fig. 6B is a perspective view showing the assembly which is completely assembled; Fig. 7 is a sectional view of the semiconductor device shown in Fig. 5 in a state before assembling; and Fig. 8 is a sectional view showing another embodiment of a semiconductor device according to the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 5 is a sectional view showing a semiconductor device according to an embodiment of the present invention. Referring to Fig. 5, the thyristor element 1 is similar in structure to that of the prior art shown in Fig. 1. In correspondence to the gate electrode 1b, the through hole 2a is defined in a central portion of a temperature compensator 2 and the cavity 3a is defined in an upper central portion of the external cathode electrode 3, respectively. The inner diameter of the through hole 2a is preferably smaller than that of the cavity 3a, while the former may be identical to the latter. The upper surface of the external cathode electrode 3 faces the lower surface of the temperature compensator 2, while the external cathode electrode 3 is pressed against the temperature compensator 2 to be electrically in contact only with that. A space region defined by the through hole 2a and the cavity 3a is adapted to receive a disc spring 7, an insulating plate 12 and a substantially cylindrical insulator 13, being C-shaped in section and having an outer diameter equal to the inner diameter of the space region, in this order. Thus, the outer side surface of the insulator 13 is brought into close contact with the inner side surfaces of the through hole 2a and the cavity 3a. In place of the insulator 13 whose outer diameter is equal to the inner diameter of the space region, an elastic insulator having an outer diameter larger than the inner diameter of the space region may be employed so as to be fitted with pressure in the space region. In this case, the outer side surface of such an insulator is further strongly adhered to the inner side surfaces of the through hole 2a and the cavity 3a. An assembly B (Fig. 6B), which is assembled along the procedure shown in Fig. 6A, is fitted with pressure into the insulator 13. Thus, the bottom surface of an external gate electrode 14 forming the assembly B is upwardly urged by spring force of the disc spring 7 through the insulating plate 12, so that the upper surface thereof is pressed against the gate electrode 1b to get electrically in contact with that. The temperature compensator 2, which is doughnut-shaped similarly to that of the prior art, is pressed against the cathode electrode 1c to get electrically in contact only with that. The discoidal external anode electrode 4 is pressed against the anode electrode 1d to get electrically in contact with that. Further, the flange 5a is provided on the outer periphery of the external cathode electrode 3, while the other flange 5b is provided on the outer periphery of the external anode electrode 4. These flanges 5a and 5b are coupled with each other by the insulating sleeve 6 while externally applying pressure onto the external cathode electrode 3 and the external anode electrode 4, to thereby integrally couple the external cathode electrode 3 with the external anode electrode 4, whereas there is an electrically insulated state between the external cathode electrode 3 and the external anode electrode 4. As will be understood from the above description, the substantially cylindrical insulator 13 being C-shaped in section and having an outer diameter equal to or larger than the inner diameter of the space region defined by the through hole 2a of the temperature compensator 2 and the cavity 3a of the external cathode electrode 3, is fitted with pressure into the space region in this embodiment, whereby the insulator 13 is adhered to the external cathode electrode 3 as well as to the temperature compensator 2. Thus, there is no clearance between the insulator 13 and the external cathode electrode 3 or the temperature compensator 2. Further, the assembly B (Fig. 6B) is fitted with pressure into the insulator 13, whereby the insulator 13 is adhered to the external gate electrode 14 forming the assembly B . Thus, there is no clearance between the insulator 13 and the external gate electrode 14. Namely, the insulator 13 locates the external gate electrode 14 in prescribed positional relation to the temperature compensator 2 and the external cathode electrode 3. Therefore, there is no possiblity that any misregistration might be caused between the temperature compensator 2, the external cathode electrode 3, the insulator 13 and the external gate electrode 14, whereby the gate electrode 1b and the cathode electrode 1c can be easily and correctly aligned with the external gate electrode 14 and the temperature compensator 2, respectively. Fig. 7 is a sectional view illustrating the semiconductor device shown in Fig. 5 in a state before assembling. The semiconductor device shown in Fig. 5 is assembled in the following manner: First, an O-ring 15 is mounted in an annular groove 14a of the external gate electrode 14 and a gate lead 16 is inserted into the insulating tube 9 as shown in Fig. 6A, to thereby form the assembly B shown in Fig. 6B. Before completion of the assembly B , the inner diameter of the O-ring 15 is preferably set to be smaller than the outer diameter of the external gate electrode 14 in the portion of the annular groove 14a. Further, it is necessary to set the outer diameter of the O-ring 15 to be larger than the inner diameter of the insulator 13 upon completion of the assembly B . Further, the insulating sleeve 6, the external cathode electrode 3, the flanges 5a and 5c and a gate pipe 17 are respectively brazed by silver solder (not shown) or the like, to thereby form an assembly C . In addition, the external anode electrode 4 and the flange 5b are brazed by silver solder (not shown) or the like, to thereby form an assembly D . The disc spring 7, the insulating plate 12 and the insulator 13 are introduced in this order into the cavity 3a which is defined in the central portion of the external cathode electrode 3. A part (external gate electrode 14) of the assembly B is fitted with pressure in the insulator 13, while a part of the gate lead 16 not covered with the insulating tube 9 is inserted into the gate pipe 17. The insulator 13 is engaged into the through hole 2a of the temperature compensator 2, while a lower surface 2b of the temperature compensator 2 is placed on an upper surface 3b of the external cathode electrode 3. Further, the thyristor element 1 and the assembly D are arranged in this order on the temperature compensator 2, then the outer peripheries of the flanges 5b and 5c are arcwelded with external applying pressure to the external cathode electrode 3 and the external anode electrode 4. Finally, the forward portion of the gate pipe 17 is welded to form a gate terminal 11 (Fig. 5). Thus, the semiconductor device is so assembled that the thyristor element 1, the temperature compensator 2, the external cathode electrode 3, the external gate electrode 14 and the external anode electrode 4 are pressure-connected with each other. The O-ring 15 is employed in order to improve adhesion between the insulator 13 and the external gate electrode 14. Although the above embodiment has been described with reference to a center gate type semiconductor device (Fig. 5), the present invention is not restricted to this but also applicable to a ring gate type semiconductor device which is shown in Fig. 8 using similar components as above. Further, although the semiconductor element is implemented by the thyristor element 1 in the above embodiment, such a semiconductor element may be prepared by a static induction thyristor, a gate turn-off thyristor or a high-power transistor. Namely, the present invention can be applied to the static induction type thyristor et al., wherein a gate electrode and a cathode electrode (or source or emitter electrode) can be easily and correctly aligned with an external gate electrode and a temperature compensator, respectively.

Claims: A semiconductor device, comprising: a semiconductor element (1) having a first electrode (1c) and a second electrode (1b) provided on first and second regions of a first surface, respectively; a first external electrode (3) having a cavity (3a) in a region facing the second electrode (1b); a temperature compensator (2) provided with through-hole (2a) in a region facing the second electrode (1b) and having one surface arranged to contact the surface of the first electrode (1c) wherein one surface (3b) of the first external electrode (3) is arranged to contact another surface (2b) of the temperature compensator (2) ; a second external electrode (14) arranged in a space region defined by aligning the cavity (3a) and the through-hole (2a) of the temperature compensator and contacting a surface of the second electrode (1b); an insulator (13) located on the inside of the cavity (3a) and formed as a cylindrical member interposed between the outer side of the second external electrode (14) and the inner side of the cavity (3a) and pressure connection means (5a, 5b, 7) for applying pressure to the semiconductor element (1) and the first external electrode (3) in order to pressure-connect the first electrode (1c) and the second electrode (1b) to the semiconductor element (1) and for applying pressure between the second electrode (1b) and the second external electrode (14) ; characterized in that the through-hole (2a) of the temperature compensator (2) and the cavity (3a) of the first external electrode (3) are of equal inside diameter; the cylindrical insulator (13) is formed as a resilient member being C-shaped in section, and is also interposed between the outer side of the second external electrode (14) and the inner side of the through-hole (2a); wherein the outer diameter of the insulator (13), when disassembled, is larger than the inner diameter of said space region, so that the insulator (13), when assembled, is press-fit into the space region; the second external electrode (14) is provided with an annular groove (14a) positioning a snap-fit O-ring (15), said O-ring (15) interposed between the outer side surface of the second external electrode (14) and the inner side surface of the insulator (13); wherein the pressure connection means (5a, 5b, 7) provide pressure-contact junction surfaces between the first electrode (1c) and the temperature compensator (2). The device according to Claim 1, wherein the second external electrode (14) has a cylindrical shape and is tapered at its one end towards the second electrode (1b). The device according to Claim 1 or 2, wherein the second external electrode (14) is connected to the outside by means of a lead (16) which is inserted into an insulating tube (9).

Inventors: TOKUNOH FUTOSHI, TOKUNOH, FUTOSHI
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1988
Main classification: H01L23
IPC codes: H01L23, H01L29, H01L21