RESONANT TUNELLING BARRIER STRUCTURE DEVICE

Abstract: A resonant tunnelling barrier (RTB) structure device (e.g., diode), having a large peak-to-valley current density (Jp/Jv) ratio, comprises an InP substrate (1) and a RTB structure. THe RTB structure consists of a first doped layer (5) of InP or In 0.53 Ga 0 .47 As, a first barrier layer (2) of Al x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.51 + 0.05x), a well layer (4) of InP or In z Ga 1-z As (0.52 ≦ z ≦ 0.54), a second barrier layer (3) of the AlGaAsSb, and as econd doped layer (6) of InP or In z Ga 1-z As. All of the layers are lattice-matched to InP.

Description: The present invention relates to a compound semiconductor device, and more particularly, to a resonant tunnelling barrier (RTB) structure device having a negative differential resistance characteristic caused by a resonant tunnelling phenomenon in a superlattice structure. The negative differential resistance characteristic is an useful phenomenon which can be applied to a detector or oscillator having an ultrahigh frequency, an ultrahigh speed new functional transistor, and the like (see, for example, T. INATA et al: Excellent Negative Differential Resistance of InAlAs/InGaAs Resonant Tunnelling Barrier Structures Grown by MBE, Jpn. J. Appl. Phys. Vol. 25, No. 12 (1986), pp. 983 - 985). Resonant tunnelling barrier structure devices such as a resonant tunnelling barrier (RTB) diode, a resonant tunnelling bipolar transistor (RBT), and a resonant tunnelling hot electron transistor (RHET), have been proposed: For example, EP-A-0177374 (corresponding to U.S. Patent No. 4712121) discloses a type of RHET. When the resonant tunnelling barrier (RTB) structure is used in a semiconductor element (i.e., diode or transistor), the RTB must have high peak current density (Jp) of more than 1 x 10⁵ A/cm² and a large peak-to-valley current density (Jp/Jv) ratio of more than 10, but good values of these properties at room temperature can not be obtained as long as the RTB structure is lattice-matched to a semiconductor substrate. The following values were obtained by lattice-matched RTB structure diodes. Where the RTB structure is made of AlAs/GaAs/AlAs structure (wherein AlAs indicates barrier layers and GaAs indicates a well layer sandwiched between the barrier layers) lattice-matched to a GaAs substrate, Jp = 4 x 10⁴ A/cm², Jp/Jv = 3.5. Where the RTB structure is an In 0.52 Al 0.48 As/In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As structure lattice-matched to an InP substrate, Jp = 4.8 x 10⁴ A/cm², Jp/Jv = 5.5. In these cases, the Jp/Jv ratios were relatively small, but when a strained layer resonant tunnelling barrier structure is made of AlAs/InGaAs/AlAs (on an InP substrate), which structure does not meet the lattice-matching condition, a high Jp/Jv ratio of 14 was obtained at room temperature. The strained layer RTB structure belongs to the strained layer superlattice structure group, and it is assumed that such a high Jp/Jv ratio is obtained because a difference (ΔEc) between the conduction band bottoms of AlAs and InGaAs is large (1.2 eV or more), which form high potential barriers. Nevertheless, there is a difference (of about 4%) between the lattice constants of AlAs and InGaAs in the strained layer RTB structure, so that a large lattice strain occurs at the interfaces therebetween and internal stresses occur in each of the AlAs layers and the InGaAs layer. Therefore, when a semiconductor device including the strained layer RTB structure is operated for a long period, problems such as a deterioration of the interfaces and disappearance of a valley peak, can occur. Namely, the device tends to have a short service life. The coinventors (T. Inata and S. Muto) of the present application proposed a resonant tunnelling semiconductor device including an RTB structure comprising first and second barriers of (In 0.52 Al 0.48 As) z (In 0.53 Ga 0.47 As) 1-z , (0 < z ≦ 1), and a well layer of In 1-y Ga y As, (0.48 ≧ y ≧ 0.46), lattice-matched to an InP substrate (in EP-0256759-A corresponding to U.S. Serial No. 081340). In this case the barrier layers are made of a quaternary compound semiconductor InAlGaAs lattice-matched to InP. According to this invention an RTB structure device comprises an InP substrate (1); and a resonant tunnelling barrier sturcture formed above the InP substrate and consisting of at least two barrier layers of Al x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.51 + 0.05x), at least one well layer of InP or In z Ga 1-z As (0.52 ≦ z ≦ 0.54) sandwiched between the barrier layers, and two doped layers of InP or In z Ga 1-z As holding of the barrier layers and the well layer between them, the barrier layers well layer and doped layers being lattice-matched to the InP of the substrate. The present invention provides an RTB structure device having negative differential resistance characteristics in which a maximum (peak) current density Jp and a maximum/minimum (peak-to-valley) current density (Jp/Jv) ratio are high and lattice-matched to an InP substrate. The RTB structure can be a single-quantum well structure or a multi-quantum well structure. When the single-quantum well structure is adopted the RTB structure device comprises an InP substrate; a first doped layer of InP or In z Ga 1-z As (0.52 ≦ z ≦ 0.54) formed on the InP substrate and lattice-matched to InP; a first barrier layer of AL x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.51 + 0,05x) formed on the high concentration doped layer and lattice-matched to InP; a well layer of InP or In z Ga 1-x As y Sb 1-y formed on the first barrier layer and lattice-matched to InP; a second barrier layer of Al x Ga 1-x As y Sb 1-y formed on the well layer and lattice-matched to InP; and a second doped layer of InP or In z Ga 1-z As formed on the second barrier layer and lattice-matched to InP. When the multi-quantum well structure is adopted, the barrier layers and the well layers are stacked one upon the other, as shown in Figures 11 and 12 of EP-A-017734 (U.S. Patent No. 4712121). Particular embodiments of a semiconductor device in accordance with this invention will now be described with reference to the accompanying drawings, in which:- Figure 1 is a diagram showing the energy gap and lattice constant for III-V compound semiconductors; Figure 2 is a schematic energy band diagram of an RTB structure; Figure 3A is a schematic energy band diagram of the RTB structure comprising AlAsSb barrier layers and an InGaAs well layer; Figure 3B is a schematic energy band diagram of the RTB structure comprising AlAsSb barrier layers and an InP well layer; Figure 4A is a schematic energy band diagram of the RTB structure comprising GaAsSb barrier layers and an InGaAs well layer; Figure 4B is a schematic energy band diagram of the RTB structure comprising GaAsSb barrier layers and an InP well layer; Figure 5 is a schematic sectional view of an RTB structure device according to the present invention; Figure 6 is a schematic energy band diagram of the RTB structure device of figure 5, under a non-bias condition; Figure 7 is a current-voltage characteristic diagram of the RTB structure device of Figure 5; Figure 8A is a schematic energy band diagram of the RTB structure device of Figure 1 at a valley voltage; and Figure 8B is a schematic energy band diagram of the RTB structure device of Figure 1 at a peak voltage. Referring to Fig. 1, the Al x Ga 1-x As y Sb 1-y of the barrier layers of an RTB structure according to the present invention is lattice-matched to the InP of a substrate and is located as shown by a bold solid line A. When the mole fraction "x" is equal to 1, the barrier layer is made of AlAs 0.56 Sb 0.44 as indicated at point B in Fig. 1, but when "x" is equal to 0, the barrier layer is made of GaAs 0.51 Sb 0.49 as indicated at point C. The In z Ga 1-z As indicated at point D is lattice-matched to the InP and there is a range of "z" of from 0.52 to 0.54 depending on the growing methods. The value of "z" of 0.53 is most preferable. A typical energy band diagram of the RTB structure comprising the barrier layers and a well layer sandwiched therebetween, under a nonbias condition, is illustrated in Fig. 2. In the combination of the AlAs 0.56 Sb 0.44 barrier layers (x = 1) and the In 0.53 Ga 0.47 As well layer and doped layers, an energy difference (ΔEc ΓΓ ) between the conduction band bottoms of the AlAsSb (in a direct transition condition) and InGaAs is calculated to be 1.6 eV or more, as shown in Fig. 3A. In the combination of AlAs 0.56 Sb 0.44 barrier layers and the InP well layer and doped layers, a energy difference (ΔEc ΓΓ ) between the conduction band bottoms of the AlAsSb and InP is also calculated to be 1.35 eV or more, as shown in Fig. 3B. But, since the AlAs 0.56 Sb 0.44 is an indirect transition type semiconductor, the negative differential resistance characteristics are influenced by the energy difference (ΔEc ΓX ) between the conduction band bottoms of the AlAsSb (at an indirect transition condition) and the InGaAs, which is 0.9 eV or more, as shown in Fig. 3A. In the combination of AlAs 0.56 Sb 0.44 and InP, an energy difference (ΔEC ΓΓ ) therebetween is 0.65 eV or more, as shown in Fig. 3B. This energy difference is relatively large. As the Al content of the Al x Ga 1-x As y Sb 1-y barrier layers is reduced, i.e., the mole fraction "x" becomes smaller, the energy difference (ΔEc) between the conduction band bottoms of the barrier layers and the In 0.53 Ga 0.47 As or InP layers is decreased, and the Jp/Jv ratio is lowered. When the mole fraction "x" of the Al x Ga 1-x As y Sb 1-y becomes 0.35, the AlGaAsSb is changed from a indirect transition type semiconductor to a direct transition type semiconductor. Namely, when "x" is within a range of 0.35 to 1, the AlGaAsSb is an indirect transition type semiconductor, and this range is preferable in view of a barrier height, i.e., the energy difference (ΔEc) for the Jp/Jv ratio. When the mole fraction "x" becomes equal to 0, i.e., the barrier layer is made of GaAs 0.51 Sb 0.49 without Al, the energy difference (ΔEc ΓΓ ) between the conduction band bottoms of the GaAsSb and the In 0.53 Ga 0.47 As or InP is about 0.5 eV (Fig. 4A) and about 0.25 eV (Fig. 4B), respectively. These energy differences are relatively small. But, since the GaAsSb is a direct transition type semiconductor device, the RTB structure device comprising the GaAsSb barrier layers has a good negative differential resistance characteristic such as a Jp/Jv ratio of 10 or more at 77K. The Al included in the AlGaAsSb barrier layer has a strong reactivity and is easily contaminated, and thus a disadvantage exists in that large-scale mass-production growth methods, such as the MBE (molecular-beam epitaxy) method using gas sources and the MOCVD (metalorganic chemical vapor deposition) method, are not suitable for an epitaxial growth of the AlGaAsSb layer. But, as the GaAsSb barrier layer does not contain Al, this disadvantage does not exist. Concerning the epitaxial growth of the quaternary compound semiconductor of Al x Ga 1-x As y Sb 1-y , if a liquid phase epitaxial growth is adopted, AlGaAsSb lattice-matched to InP is not obtained because of a wide miscibility gap in this system. In this case, since the atom size of As is very different from that of Sb, the Al x Ga 1-x As y Sb 1-y having optional values of "x" and "y" can not be grown. Note, it is possible to epitaxially grow the Al x Ga -x As y Sb 1-y having the desired composition by an MBE method. An RTB structure device according to the present invention is now explained. Referring to Fig. 5, a diode having an RTB structure according to the present invention comprises an InP substrate 1 and an RTB structure formed on the substrate 1 and consisting of barrier layers 2 and 3 of Al x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.51 + 0.05x) lattice-matched to InP, a well layer 4 of In 0.53 Ga 0.47 As or InP sandwiched between the layers 2 and 3 and doped layers 5 and 6 holding the barrier layers 2 and 3 therebetween. To prevent a diffusion of impurities to the barrier layers 2 and 3 from the doped layers 5 and 6, spacer layers 5a and 6a of undoped In 0.53 Ga 0.47 As or InP are formed between the barrier layers and doped layers, respectively. Furthermore, to provide an ohmic contact with metal electrodes 7 and 8, contact layers 9 and 10 of heavily doped In 0.53 Ga 0.47 As or InP are formed between the InP substrate 1 and the doped layer 5 and on the doped layer 6, respectively. The RTB structure diode of Fig. 5 is produced in the following manner. On the InP substrate 1, the contact layer 9, the doped layer 5, the spacer layer 5a, the barrier layer 2, the well layer 4, the barrier layer 3, the spacer layer 6a, the doped layer 6, and the contact layer 10 are successively epitaxially grown by an MBE method using metal sources, to lattice-match these layers to InP. As shown in Fig. 5, the laminated layers are selectively etched by a suitable etching method, to expose the contact layer 9. The whole exposed surface is covered with a protective layer 11 of, e.g., SiO₂ , and the layer 11 is selectively etched to open contact holes on the contact layers 9 and 10, respectively. Then the metal electrodes 7 and 8 of, e.g., Au, are formed, to fill the contact holes and to make ohmic contact with the contact layers 9 and 10. The electrodes 7 and 8 are connected to a means 13 for applying a voltage to the diode. Figure 6 shows a conduction energy-band diagram of the RTB structure diode of Fig. 1 under a nonbias condition (i.e., when no voltage is applied across the metal electrodes 7 and 8). A quantum well of the well layer 4 is sandwiched between two barriers of the barrier layers 2 and 3. When a voltage is applied across the metal electrodes 7, 8 and is increased, a current-voltage characteristic (negative differential resistance characteristic) of the RTB structure diode is obtained, as shown in Fig. 7. In the drawing, a curved line has a peak point P and a valley point V. As the applied voltage is increased, the current (or current density) is first increased to a maximum value (peak current Ip or Jp) at a peak voltage Vp, and then decreased to a minimum value (valley current Iv or Jv) at a valley voltage Vv. For a voltage larger than Vv, the current is increased exponentially to the voltage. The condition energy-band diagram of the RTB structure under bias conditions at points V and P are shown in Figs. 8A and 8B, respectively. In these drawings, "Eo" indicates a first resonant level for the electron in the wall layer 4. Example 1 The RTB structure diode of Fig. 1 was formed of the following parts: In this case, the well layer 3, doped layers 5 and 6, and contact layers 9 and 10 were lattice-matched to InP, and the barrier layers was made of AlAs 0.56 Sb 0.44 , which was selected from Al x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.56 + 0.05x) for lattice-matching to InP. The obtained RTB structure diode was tested at room temperature to obtain the current-voltage characteristics. The diode had a peak current density Jp of 10⁴ A/cm² and a peak-to-valley current density ratio Jp/Jv of 10 or more. Example 2 Another RTB structure diode having a structure shown in Fig. 5 was formed of the following parts. Note, the difference of Example 2 from Example 1 is a change of the In 0.53 Ga 0.47 As of the well layer, doped layers, spacer layers, and contact layers to InP. The obtained RTB structure diode at room temperature had a peak current density Jp of 10 A/cm² and a Jp/Jv of 10 or more. The RTB structure lattice-matched to InP according to the present invention obtained a Jp/Jv ratio of 10 or more at room temperature, which is about twice as large as that of a conventional RTB structure of the lattice-match type. The RTB structure having such a good negative differential resistance characteristics can be used between an emitter and a base of a hot electron transistor (HET) to form a RHET. Such a RHET is described in U.S. Patent No. 4712121. When GaAs 0.51 Sb 0.49 (x = 0) is adopted for the barrier layer of Al x Ga 1-x As y Sb 1-y , the obtained RTB structure has characteristics similar to those of a conventional RTB structure of a lattice-match type. But, Al is not used, and this brings an advantage in that the RTB structure can be produced by mass-production methods such as the MBE method using gas sources, and the MOCVD method. It will be obvious that the present invention is not restricted to the above-mentioned embodiments and that many variations are possible for persons skilled in the art without departing from the scope of the invention. For example, although the above-mentioned quantum-well structure has a symmetrical structure in which the composition (i.e., barrier height) and the thickness (i.e., barrier width) of the barrier layers are the same, it is possible to adopt a asymmetrical structure in which the composition and/or the thickness of one of the barrier layers are different from the other barrier layer.

Claims: A resonant tunnelling barrier structure device comprising: an InP substrate (1); and a resonant tunnelling barrier structure formed above the InP substrate, characterized in that said structure consists of at least two barrier layers (2, 3) of Al x Ga 1-x As y Sb 1-y (0 ≦ x ≦ 1, y = 0.51 + 0.05x), at least one well layer (4) of InP or In z Ga 1-z As (0.52 ≦ z ≦ 0.54) sandwiched between the barrier layers (2, 3), and two doped layers (5, 6) of InP or In z Ga 1-z As holding the barrier layers (2, 3) and the well layer (4) between them, the barrier layers (2, 3), the well layer (4), and the doped layers (5, 6) being lattice-matched to the InP of the substrate (1). A device according to claim 1, wherein the resonant tunnelling barrier structure further comprises two undoped spacer layers (5a, 6a) of InP or In z Ga 1-z As, formed between the doped layers (5, 6) and the barrier layers (2, 3) respectively. A device according to any one of the preceding claims, wherein the mole fraction "x" in said barrier layers (2, 3) is from 0.35 to 1. A device according to any one of the preceding claims, further comprising a first contact layer (9) of InP or In z Ga 1-z As formed between the InP substrate (1) and the first doped layer (5), a second contact layer (10) of InP or In z Ga 1-z As formed on the second doped layer (6), a first electrode (7) formed on the first contact layer (9), a second electrode (8) formed on the second contact layer (10), and a means (13) for applying a voltage across the first (7) and second (8) electrodes.

Inventors: INATA, TSUGO, MUTO, SHUNICHI, SUGIYAMA, YOSHIHIRO, TAKEUCHI, ATSUSHI
Applicants: FUJITSU LIMITED
Application year: 1988
Main classification: H01L29
IPC codes: H01L29, H01L21