Error correction using look-up tables

Abstract: A method and apparatus is disclosed for correcting up to two byte errors in encoded uncorrected data in records of a predetermined length. As illustrated, the records are subblocks of a block in a multi-level error correction code format. The data is read from a storage device and corrected by decoding and processing four syndromes of error (S₁, S₂, S₃, S₀) that are generated by means disclosed in the prior art. These syndromes are decoded in response to uncorrected errors in any one record by computing vectors (P, Q, and R), which are functions of the four syndromes. Binary numbers (u and v) are then determined from these vectors by table look-up to enable calculation of one value (d) from the sum of the binary numbers for determining error locations. Another value (t), mathematically related to the one value, is then determined by table look-up and the error location values (y and z) are determined by calculating the offset of binary numbers (u,v) from the other value (t). Finally, error patterns (E y and E z ) are determined by table look-up.

Description: This invention relates to a method and apparatus for correcting errors in encoded uncorrected data using an implementation involving look-up tables for decoding syndromes of error indicative of at least two errors in the data. The following references disclose basic theories and various methods and arrangements for correcting errors in storage devices: W. W. Peterson, Error-Correcting Codes , M.I.T. Press, 1961; R. C. Bose and D. K. Ray-Chaudhuri, "On a class of error-correcting binary group codes", Inf. Control 3, pp. 68-69, 1960; I. S. Reed and G. Solomon, "Polynomial codes over certain finite fields", J. Soc. Indust. Appl. Math 8, pp. 300-304, 1960; and R. T. Chien, "Cyclic decoding procedures for Bose-Chaudri Hocquenghem codes", IEEE Trans. Inf. Theory, Vol. IT10, pp. 357-363, 1964. In copending EP-A-0 218 413, there is disclosed a two-level error correction code structure in an improved multibyte error-correcting subsystem. Data is formatted on a disk track into a number of subblocks, each within a respective block. There are also two sets of three subblock check bytes C₁, C₂ and C₃. One set is associated with the even phase and the other with the odd phase, thus providing interleaved codewords. With this arrangement, the first level of correction (of subblock errors) is done on-the-fly at the storage device after being delayed one subblock, and the data is sent to the storage director for correction of any second level (block) errors. This on-the-fly correction is suitable only for systems operating in an asynchronous environment. The second (block) level correction is carried out using one additional check byte C₀ for each phase at the end of the block. The aforementioned copending application discloses hardware in a disk storage device that receives uncorrected data in real time and generates three first-level syndrome bytes and one second-level syndrome byte (corresponding to each phase). The first-level syndromes are decoded at the device into error pattern and error location information that is transmitted to a storage director. The aforementioned application describes how the system functions if there are no errors in any subblock, and how errors are corrected if there is not more than one error per subblock and if there is more than one error per subblock. More specifically, syndromes S₁, S₂, S₃ corresponding to each phase associated with a particular subblock codeword are held in a local memory. They are retained for further processing at the block level if that particular subblock's syndromes were not all zeros and no nonzero error pattern was generated by a first level decoder. The local memory also retains the identification of an uncorrected subblock as subblock identifier "f". At the end of the block, a second level syndrome, S₀, from a second level syndrome generator and the first level syndromes S₁, S₂, S₃ for subblock f from the local memory are processed by a second level decoder to correct two errors in subblock f. There is a need for a less expensive, yet efficient, arrangement for so doing. Accordingly, the present invention provides a method of correcting two byte errors in encoded uncorrected data in records of a predetermined length read from a storage device by decoding and processing four error syndromes, the method comprising: responsive to two errors in any one record, decoding the syndromes by computing vectors which are functions of the four syndromes; calculating two binary numbers from the vectors by table look-up; calculating one value from the sum of the binary numbers for the purpose of determining the locations of the two errors; determining another value, having a specific mathematical relation to the one value, by table look-up; and calculating values identifying the locations of the errors by calculating the offset of the binary numbers from the other value. Accordingly, the present invention also provides an apparatus for correcting two byte errors in encoded uncorrected data in records of a predetermined length read from a storage device by decoding and processing four syndromes of error, by the method as claimed in any preceding claim, comprising: means responsive to two errors in any one record for decoding the syndromes by computing vectors which are functions of the four syndromes; means, including log and antilog look-up tables, for calculating two binary numbers from the vectors; and means, including the binary numbers for calculating one value from the sum of the binary numbers for the purpose of determining the locations of the errors; means for determining another value, having a specific mathematical relation to the one value; and means for calculating values identifying the locations of the errors by calculating the offset of the binary numbers from the other value. Hereinafter, there is disclosed a method and apparatus for correcting up to two byte errors in encoded uncorrected data in records of a predetermined length (such as a preidentified subblock of a block in the case of a multi-level error correction code format). The data is read from a storage device and corrected by decoding and processing four syndromes of error (S₁, S₂, S₃, S₀) that are generated by means disclosed in the aforementioned copending application. These syndromes are decoded in response to uncorrected errors in any one record by computing vectors P, Q and R, which are functions of the four syndromes. Binary numbers u and v are then calculated from these vectors by table look-up to enable calculation of a value of d from the sum of the binary numbers toward determining error locations. A value t, having a specific mathematical relation to the value of d, is then determined by table look-up and the error location values y and z are calculated from the offset of binary numbers u and v from the value t. Finally, the error patterns E y and E z are determined by table look-up. As illustrated, and more specifically, errors in encoded uncorrected data in a disk storage device are corrected using a multiple level error correction code formatted into a block containing a number of subblocks. During a read operation, first level syndromes of error (S₁, S₂, S₃) for each subblock and an additional second level syndrome (S₀) common to all subblocks of the block are generated by hardware in the storage device. The first level syndromes are decoded by table look-up to provide first level error pattern and location information. The second level syndromes are decoded by computing vectors that are functions of the first and second level syndromes. The second level error locations and error patterns are determined by software or firmware using look-up tables. Any correction of errors, if needed, is done later by sending error information in a deferred mode. The present invention will be described further by way of example with reference to a preferred embodiment thereof as illustrated in the accompanying drawings, in which: Fig. 1 illustrates a data format of a disk track that embodies a two-level code structure; and Fig. 2 is a block diagram of the first and second level correcting portions of an ECC apparatus of one embodiment of the invention showing flow of the data and depicting the hardware resident in the storage device and software resident in the storage director. Fig. 1 illustrates the data format of a disk track that embodies a two-level code structure. As illustrated, data is recorded along a track 11, formatted into a plurality of fixed or variable length blocks 12. Each block 12 is divided into fixed length subblocks 14. As illustrated, each subblock 14 comprises two interleaved codewords 18, 19. Each codeword 18, 19 comprises 48 data byte positions and three subblock check bytes C₁, C₂, C₃. Each block 12 thus comprises subblocks, each having 96 (two pairs of 48) data byte positions and three pairs of subblock check bytes C₁, C₂, and C₃. In addition, four check bytes CR₁-CR₄ for data integrity checking after ECC correction and one pair of check bytes C₀ for second level error correction are appended to the end of each block 12 in a block check byte area 15. The manner in which the error correction check bytes C₁-C₃ in each subblock 12 and check bytes CR₁-CR₄ and C₀ at the end of each block 12 are determined and produced forms no part of the present invention. The reader is referred to the aforementioned copending application, for a detailed explanation. In the following description of this invention, all process steps will be described for one of the two phases (even or odd); however, it is to be understood that the same steps and process are repeated for the other phase. Referring now to Fig. 2, data from a data processing system (not shown) is sent via a control unit or storage director 20 to storage disk 21 of a disk storage device 100 for writing on a track which is formatted as shown in Fig. 1. In the writing and transfer of this data, three sets of check bytes C₁, C₂ and C₃ are developed for each subblock by an ECC encoder 22. Block check byte C₀ (and data integrity check bytes CR₁-CR₄) are also developed by encoder 22. A subblock formatter 22A appends check bytes C₁, C₂ and C₃ to each corresponding subblock. A block formatter 22B appends block check byte C₀ (as well as data integrity check bytes, CR₁-CR₄) at the end of the block. The formatted data is then recorded on storage disk 21. Computation and processing of the data integrity check bytes CR₁-CR₄ forms no part of the present invention and is described in U. S. Patent 4,703,485, issued October 27, 1987. In the readback process, the read data are checked by coding equations (1), (2), (4) and (5) in the aforementioned copending application in order to develop the syndromes of error in the conventional manner. Subblock check bytes C₁, C₂ and C₃ are associated with syndromes S₁, S₂ and S₃, while block-level check byte C₀ is associated with the S₀ syndrome byte. The subscript numbers assigned to the syndromes, e.g., S₀, S₁, etc., are related to the particular T matrix employed to generate the respective check characters. Specifically, S₀, which is developed from C₀, corresponds to a conventional parity check byte. S₃, on the other hand, is developed from C₃ which is generated in accordance with logic that involves multiplying the input byte by a matrix T³ . Syndromes S₁ and S₂, which correspond to check bytes C₁ and C₂, respectively, are similarly generated, using logic which involves matrices T¹ and T², respectively. Such logic for syndrome generation is well known and forms no part of the present invention. During the readback process, uncorrected data is read from disk 21 to a first level syndrome generator 23 and a second-level syndrome generator 25 which generate first-level syndrome bytes S₁, S₂, S₃ for each subblock and a second-level syndrome S₀ common to all subblocks of the block. The syndrome bytes S₁, S₂, S₃ are transmitted to a first level decoder 24 in storage director 20 for decoding into error pattern data. The software-implemented decoding process for decoder 24 is described below in a separate section entitled "First Level Decoding Process". Briefly, a nonzero value for S₁, S₂ or S₃ indicates an error. If a subblock has only one byte in error, its location x and error pattern E x , as determined by decoder 24, will be supplied to the software 26 for correction of the appropriate byte fetched from subblock buffer 27. After correction, this byte is restored into buffer 27. The error pattern E x will also be stored in local memory 28 for each of the subblocks that obtained first-level correction of one error. The second-level syndrome S₀ will be modified by software at 29 to include the error pattern information E x corresponding to all of the corrected subblocks. When decoder 24 has received a nonzero value for S₁, S₂ or S₃ and is unable to correct the subblock, it indicates the presence of more than one error in the subblock by providing a subblock identifier f to the local memory 28. The unprocessed syndromes S₁, S₂ and S₃ for subblock f are also passed on to the local memory for later processing by the second-level decoder. Second-level decoding software 30 will combine syndrome S₀ with the syndromes S₁, S₂, S₃ from local memory 28 and convert these combined inputs by table look-up into outputs y and z indicative of the error locations and E y and E z indicative of the error patterns. These outputs y, z, E y , E z will be combined with the identifier f of the subblock in error for causing the bytes in error B y and B z to be corrected. The second-level error correction software 31 fetches the subblocks from the buffer 27 and delivers corrected data by providing correction of bytes B y and B z of subblock f using the error location information y,z and error patterns E y and E z . The basic two-level ECC scheme, as described in the aforementioned copending application has n subblocks in a block with N bytes in each subblock. The capability at the first level of decoding provides correction of up to one byte error in each of the subblocks. The capability, including the second level of decoding provides correction of up to two-byte errors in one subblock and one-byte error in all other subblocks in a block. The basic error event is a "byte in error". A burst error may cause correlated errors in adjacent bytes; however, sufficient interleaving is assumed to effectively randomise these errors. With appropriate interleaving, all bytes are assumed equally likely to be in error as seen by the error correction code (ECC) scheme. Each byte contains a preselected number of bits m; the corresponding operations for the error correction code will be carried out in a finite field, GF(2 m ), of 2 m elements. As illustrated, m is 8 and the finite field, GF(2⁸), has 256 elements. Mathematical Background -- Logarithms of Field Elements Let G(x) denote a primitive polynomial of degree 8 with binary coefficients. G(x) = g₀ ⊕ g₁x ⊕ g₂x² ⊕ ... ⊕ g₇x⁷ ⊕ x⁸ The companion matrix of the polynomial G(x) is defined as the following nonsingular matrix: The matrix T i denotes T multiplied by itself i times and all numbers reduced modulo-2. The matrices T, T² , T³ , ..., T²⁵⁵ are all distinct, and T²⁵⁵ is the identity matrix, which can also be written as T⁰. These 255 matrices represent (2⁸-1) nonzero elements of GF(2⁸). Let a denote the primitive element of GF(2⁸). Then T i represents the nonzero element a i for all i. The zero element is represented by the 8x8 all-zero matrix. The sum and product operations in GF(2⁸) are, then, defined by the modulo-2 matrix-sum and matrix-product operations, using these matrix representations of the field elements. The elements of GF(2⁸) can also be represented by the 8-digit binary vectors. The square matrices in the above representation are very redundant. In fact, each matrix can be uniquely identified by just one of its columns (in a specific position), which can very well be used for representation of the corresponding field element without ambiguity. In particular, the first column of each 8x8 matrix in the above set is the commonly used 8-digit vector representation of the corresponding field element. This establishes a one-to-one correspondence between the set of all nonzero 8-digit vectors and the set of T i matrices representing the field elements a i . Thus, each nonzero 8-digit vector S corresponds to a unique integer i (0 ≦ i ≦ 254) which can be regarded as its logarithm to the base a. Appendix A.1 is a table of logarithms which maps all field elements into powers of a. Appendix A.2 is a table of antilogarithms which maps integer powers of a into corresponding field elements. These tables were generated, using the following companion matrix T as the representation for the base element a: With the help of these tables, the product A₁ x A₂ (of the two elements represented by 8-digit vectors A₁ and A₂) can be computed as follows: A₁ = a i 1 Use log table: log a A₁ = i₁ A₂ = a i 2 Use log table: log a A₂ = i₂ A₁ x A₂ = a i 1 +i 2 Add (modulo-255): i = i₁ + i₂ a i = A Use antilog table: log -1 / a i = A Each table requires a memory of 8x256 bits in which the word number or memory location expressed as 8-bit vector is the input vector. The stored 8-bit vector in that memory location represents the logarithm and the antilogarithm corresponding to the input vector in the two tables, respectively. Note that A=0 (the all-zero vector) cannot be processed using the log and antilog tables. Thus, it should be treated as a special case as follows: Multiplication by zero always produces zero and division by zero should not be permitted. First-Level Decoding Process: Single Error Correction As illustrated herein, decoding of first level errors can be accomplished using a software method involving table look-up operations. A nonzero value for S₁, S₂ or S₃ indicates the presence of error. Assume the subblock has only one byte (byte x) in error; then the read byte B and x corresponds to the written byte B x as B = B x ⊕ E x where E x is the error pattern in the byte x. When the subblock has only one byte (byte x) in error, the syndromes are related to E x as S₁ = T x E x S₂ = T 2x E x S₃ = T 3x E x Equations (2), (3) and (4) are viewed as relations among field elements in GF(2⁸). In particular, the matrix multiplication of the type T i B represents the product of field elements a i and @, where a i is represented by the first column of matrix T i , and @ is represented by the column vector B. The product operation in GF(2⁸) has been discussed above, with reference to the log and antilog tables (Appendices A.1 and A.2 respectively) to the base a, where a is a primitive field element. With the help of these tables, the error-position or location value x can be computed from Equations (2), (3) and (4) as follows: x = (log a S₂ - log a S₁) modulo-255 Also x = (log a S₃ - log a S₂) modulo-255 The error pattern E x can be computed from Equations (2) and (5) as: E x = log -1 a (log a S₁ - x) modulo-255 All terms in Equations (5) and (6) are 8-digit binary sequences. In modulo-255 computations, subtraction of an 8-digit binary number is equivalent to addition of its complement. For this, it is convenient to use an 8-digit binary adder with end-around carry, in which the 8-digit all-ones sequence (value 255) represents the number zero, and a high-order carry (value 256) is equivalent to the number one. Each computation of x requires two references to the log table (Appendix A.1) and one modulo-255 subtract operation. Similarly, the computation of E x requires one reference to the antilog table (Appendix A.2). The byte B x is then corrected as B and x + E x . Note that, if S₁ = S₂ = 0 and S₃ ≠ 0, the error is in check byte C₂. In Equation (5), x is computed two ways, the result of which must be the same or else there is more than one byte in error. Also, if S₁ ≠ S₂ and S₁ or S₂ is zero, there is more than one byte in error. The subblock in that case has errors but remains uncorrected through the first level processing. Such subblock is identified by the subblock number f and the corresponding syndromes S₁, S₂, S₃ are stored in local memory and passed on for later second level processing. Second-Level Decoding Process: Two-Error Correction Assume only one subblock contains two bytes in error denoted by y and z with error patterns E y and E z , respectively. The syndromes S₀, S₁, S₂ and S₃ are related to E y and E z as follows: S₀ = E y ⊕ E z S₁ = T y E y ⊕ T z E z S₂ = T 2y E y ⊕ T 2z E z S₃ = T 3y E y ⊕ T 3z E z The first level processing for the corresponding subblock will have detected these errors as a multiple error. With S₁, S₂ and S₃ available at the subblock-level, the subblock-level processing of syndromes will not miscorrect these errors as a one-symbol error E x in position x. Appendix B explains the theory behind the decoding algorithm used to decode the combined set of subblock and block-level syndromes for two-symbol errors. Firstly, vectors P, Q and R are obtained. As illustrated, they are 8-digit constants which are functions of the syndromes S₀, S₁, S₂, and S₃, as given by: P = (S₂ x S₂) ⊕ (S₃ x S₁) Q = (S₂ x S₁) ⊕ (S₃ x S₀) R = (S₀ x S₂) ⊕ (S₁ x S₁) where x denotes the product operation of the field elements in GF(2⁸), and the field elements are represented by binary 8-digit vectors. The product operation can be realised using hard-wired logic or through the use of log and antilog tables in GF(2⁸). Note that P, Q, and R are necessarily nonzero when two bytes of the subblocks are in error and both are data bytes. In contrast, when the two bytes in error include a check byte C₁ or C₂, this is indicated by P = 0 and R = 0, respectively. Assume now that there are exactly two erroneous bytes in one of the subblocks. The error-location values y and z are two unique solutions of i in the equation: T -2i P ⊕ T -i Q = R where P, Q, and R are functions of the syndromes S₀, S₁, S₂, and S₃, as given by Equations (11) to (13). For each of the two solution values of i, the error pattern is given by: E i = R/(T 2i S₀ ⊕ S₂) The proof of this appears in Appendix B. Decoding of the combined set of subblock and block-level syndromes for two-symbol errors can be accomplished using a software method involving table look-up operations. Vectors P, Q and R are computed from syndromes S₀, S₁, S₂ and S₃, using the log and antilog tables of Appendices A.1 and A.2, respectively. This requires, at the most, eighteen references to the tables in memory, six binary-add (modulo-255) operations, and three vector-add (modulo-2) operations. The error-location values y and z can be obtained through a simple table look-up procedure. The table and the theory behind this procedure appear in Appendix C. The error-location values y and z are obtained through the following four-step procedure. Step 1: Obtain two binary numbers u and v from vectors P, Q, and R, using log and antilog tables Appendices A.1 and A.2, respectively, where u = (log a P - log a Q) modulo-255 v = (log a R - log a Q) modulo-255 Step 2: Calculate the value d from the sum of the two binary numbers as a step toward determining the locations of the two errors, as follows: d = (u + v) modulo-255 Step 3 : Obtain the value t, having a specific mathematical relation to value d, from the table of Appendix C.1. Step 4 : Obtain error-location values y and z by calculating the offset of the binary numbers from the value t, as follows: y = (u - t) modulo-255 z = (t - v) modulo-255 All terms in Equations (16) to (20) of the above procedure are 8-digit binary sequences undergoing modulo-255 add or subtract operations. The procedure requires four table look-up operations, four modulo-255 subtract operations, and one modulo-255 add operation. In this procedure, an invalid value of d (the one with no entry in Appendix C.1) or an invalid error location value for y or z (greater than m+1) indicates an uncorrectable error involving three or more bytes in error. The error pattern E y can be computed using the log and antilog tables (Appendices A.1 and A.2, respectively) in accordance with Equation (15), in which matrix multiplication T 2y S₀ is replaced by the corresponding field element given by the product a 2y x S₀ of two field elements. The error pattern E z can be computed similarly, using Equation (15) or alternatively from Equation (9) , which gives: E z = S₀ ⊕ E y The subblock error correction is then accomplished by correcting bytes B y and B z with error patterns E y and E z . While the embodiment, as illustrated, assumed a two-level code structure in which a one-byte error in a codeword is correctable at the first level and a two-byte error in a codeword is correctable at the block level, it should be understood that the method and apparatus may be used to correct two byte errors in any single or multi-level code structure. It should also be recognised that the disclosed method and apparatus will also operate to decode the syndromes for two-byte errors in a record of a predetermined number of bytes, in which each byte contains a preselected number of bits. Also, while the method and apparatus, as disclosed, correct errors in encoded uncorrected data in a magnetic disk storage device, they are equally applicable to data stored in a tape or optical storage device and to data buffered for transmission or at reception. Finally, it should be understood that, if preferred, in lieu of the software implementation herein described, decoding of first level (single) errors may be accomplished by hardware, such as that disclosed in U.S. Patent 4,525,838, issued June 25, 1985. It will therefore be understood by those skilled in the art that the foregoing and other applications and/or implementations may be made to the method and apparatus herein described without departing from the scope of the appended claims. APPENDIX B Theory for Decoding Two-Symbol Errors This Appendix B provides the background for the decoding algorithm for two-symbol errors. This is derived from the well-known prior art method called Chien Search in decoding the generalised BCH code, which is described in the Chien paper cited above in the "Background Art" section. Assume that there are exactly two erroneous bytes in one of the subblocks. The following proof will establish that error-location values y and z are two unique solutions of i in the equation: T -2i P ⊕ T -i Q = R where P, Q and R are functions of syndromes S₀, S₁, S₂ and S₃, as given by Equations (11)-(13). The error patterns E i for i=y or i=z each satisfies the following equation: R = (T 2i S₀ ⊕ S₂) ⊗ E i Proof :The syndromes are expressed as functions of the two errors in Equations (7)-(10). These equations are rewritten here as: S₀ = E y ⊕ E z S₁ = T y E y ⊕ T z E z S₂ = T 2y E y ⊕ T 2z E z S₃ = T 3y E y ⊕ T 3z E z Combining appropriate equations from (B-3) through (B-6), we have: T y S₀ ⊕ S₁ = (T y ⊕ T z )E z T y S₁ ⊕ S₂ = T z (T y ⊕ T z )E z T y S₂ ⊕ S₃ = T 2z (T y ⊕ T z )E z Matrix Equations (B-7), (B-8), and (B-9) are relations among field elements in GF(2⁸) represented by matrices. In particular, the matrix multiplication of the type T i B represents the product of field element a i and @, where a i is represented by the first column of matrix T i , and @ is represented by the column vector B. In view of this interpretation, Equations (B-7), (B-8), and (B-9) yield the following relationship: (T y S₀ ⊕ S₁) ⊗ (T y S₂ ⊕ S₃) = (T y S₁ ⊕ S₂)² where ⊗ denotes the product of corresponding elements in GF(2⁸). The Equation (B-10) can be rearranged into the following matrix equation: T 2y R ⊕ T y Q ⊕ P = 0 In these equations, P, Q and R are column vectors given by: P = (S₂ ⊗ S₂) ⊕ (S₃ ⊗ S₁) Q = (S₂ ⊗ S₁) ⊕ (S₃ ⊗ S₀) R = (S₀ ⊗ S₂) ⊕ (S₁ ⊗ S₁) Thus y is one of the solutions for i in the equation T -2i P ⊕ T -i Q = R By exchanging the variables y and z in the above process, it can be shown that z is the second solution for i in Equation (B-15). Equation (B-2) for each error pattern can be verified by direct substitution of values for R, S₀, S₁ and S₂. Both sides of Equation (B-2) reduce to the expression: (T 2y ⊕ T 2z ) (E y ⊗ E z ) thereby completing the proof. APPENDIX C Table Look-up Solution for Two Error Locations In Appendix B, it was shown that the error locations y and z for two errors in a subblock can be determined by solving for i in Equation (B-1). That equation is rewritten here as: T -2i P ⊕ T -i Q = R The constants P, Q and R are functions of syndromes S₀, S₁, S₂ and S₃, given by Equations (B-12)-(B-14), respectively. We can obtain logarithms of P, Q and R from the log-antilog tables of Appendices A.1 and A.2. p = log a P q = log a Q r = log a R Then the matrix Equation (C-1) can be rewritten as a relation among field elements in GF(2⁸) as follows: a -2i. a p ⊕ a -i. a q = a r Multiplying both sides of Equation (C-5) by a p-2q , we obtain: a (-2i+2p-2q) ⊕ a (-i+p-q) = a (r+p-2q) Substituting t for (-i+p-q) in Equation (C-6), gives a 2t ⊕ a t = a (r+p-2q) and i = (u)-t, where u = p-q The right-hand side of Equation (C-7) is a known field element a d , in which the exponent d is: d = u + v, where u = p-q, and v = r-q A table look-up solution is then provided for Equation (C-7) which can be rewritten as: a t (a t ⊕ a⁰) = a d Using this expression, each value of t (from 0 to 254) can be related to a value of d. Note that some values of d are absent in this relationship, and that each valid value of d corresponds to two values of t. For a given value of d, if t = t₁ is one of the solutions of Equation (C-10), then it is apparent that t = t₂ is also a solution where: a t 2 = a t 1 ⊕ a⁰ Substituting t = t₁ in Equation (C-10) and then using (C-11), a t 1 . a t 2 = a d Thus, d = t₁ + t₂ From equations (C-8), (C-9) and (C-13), the following two error location values i₁ and i₂ are obtained: i₁ = u-t₁ i₂ = u-t₂ = t₁-v Appendix C.1 relates each valid value of d to one of the two values of t. Values of d are listed in ascending order for easy reference as addresses of an 8x256-bit memory. The corresponding value of t is stored in memory as an 8-bit binary number. The all-zeros vector (invalid value shown by dashes in the table) is stored at addresses corresponding to the invalid values of d, and is so interpreted. In case of two errors, the computed value of d fetches one of the two values for t from Appendix C.1. With this one value of t, Equations (C-14) and (C-15) provide the two values of i as the error locations y and z. An invalid value of d fetches t = 0 from Appendix C.1, which is interpreted as an uncorrectable error involving three or more bytes of the codeword.

Claims: A method of correcting two byte errors in encoded uncorrected data in records of a predetermined length read from a storage device by decoding and processing four error syndromes (S₀, S₁, S₂, S₃), the method comprising: responsive to two errors in any one record, decoding the syndromes by computing vectors (P, Q, R) which are functions of the four syndromes; calculating two binary numbers (u, v) from the vectors by table look-up; calculating one value (d) from the sum of the binary numbers for the purpose of determining the locations of the two errors; determining another value (t), having a specific mathematical relation to the one value, by table look-up; and calculating values (y, z) identifying the locations of the errors by calculating the offset of the binary numbers from the other value. A method as claimed in claim 1, including computing the patterns of the errors by table look-up. A method as claimed in claim 2, including using log and antilog tables for computing the vectors from the four syndromes and computing the error patterns. A method as claimed in any preceding claim wherein each syndrome consists of b binary bits, and: the binary numbers u and v are calculated from the vectors by table look-up, as u = (log a P - log a Q) modulo-(2 b -1) v = (log a R - log a Q) modulo-(2 b -1); and the binary number d is the binary number d = (u + v) modulo-(2 b -1). A method as claimed in claim 4, including determining a value t, having a specific mathematical relation to value d, from a look-up table wherein the value of d for each of (2 b -1) values of t is predetermined by computing the value of d using an expression which will provide for each valid value of d two values of t; and in the case of two errors, fetching from the computed value of d one of the two values of t for the purpose of determining the locations of the errors. A method as claimed in claim 5, wherein the value t, corresponding to value d, is obtained from a look-up table of t vs. d in a d = a t (a t + a o ); and error location values y and z, are determined as y = (u-t) modulo-(2 b -1); and z = (t-v) modulo-(2 b -1). A method as claimed in any of claims 4 to 6, wherein the vectors P, Q and R are computed from the four syndromes using a log a S = i log table and an antilog table a i = S in GF(2 b ), where GF (2 b ) represents a finite field of 2 b elements. A method as claimed in claim 7, wherein error patterns E y and E z are calculated using the log and antilog tables, as E y = R/(T 2y S₀ + S₂); and E z = S₀ + E y A method as claimed in claim 7, wherein b is 8 and modulo-(2 b -1) is therefore modulo-255. Apparatus for correcting two byte errors in encoded uncorrected data in records of a predetermined length read from a storage device by decoding and processing four syndromes of error, by the method as claimed in any preceding claim, comprising: means responsive to two errors in any one record for decoding the syndromes by computing vectors which are functions of the four syndromes; means, including log and antilog look-up tables, for calculating two binary numbers from the vectors; and means, including the binary numbers for calculating one value from the sum of the binary numbers for the purpose of determining the locations of the errors; means for determining another value, having a specific mathematical relation to the one value; and means for calculating values identifying the locations of the errors by calculating the offset of the binary numbers from the other value. Apparatus as claimed in claim 10, incorporating means, including the log and antilog tables, for computing error patterns of the two errors. Apparatus as claimed in claim 10 or 11, incorporating means, including the log and antilog tables, for computing the vectors from the four syndromes.

Inventors: PATEL ARVIND MOTIBHAI, PATEL, ARVIND MOTIBHAI
Applicants: IBM, INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1988
Main classification: H03M13
IPC codes: H03M13, G11B20