Battery feed circuit

Abstract: A battery feed circuit including a main battery feed part and its peripheral circuits provided in a line circuit of a switching system. The peripheral circuits include the following: first, a means for forming a low impedance with respect to in-phase signals, simply realized by a capacitor (30); second, a bias circuit (2) able to suppress the entry of power source noise and easily switch magnitudes of bias voltages and polarities, realized by a bias voltage generating means, a buffer means, and an AC bypass capacitor; third, a battery feed current control circuit (3-A to 3-D) able to suppress overflow of battery feed current when the distance to the subscriber is short, which detects an overcurrent component above a predetermined value, and, in accordance with same, changes the bias voltage; fourth, a battery feed current supervising circuit (4-A,4-B) able to detect current in both the forward and reverse directions, realized by an emitter-follower pair and a voltage/current converting resistor; fifth, a circuit (5-A,5-B) for detecting bidirectional battery feed currents at a high precision, which is formed by forward direction and reverse direction current detection means provided with (V BE ) cancelling means; and sixth, an overcurrent protection circuit (6-A,6-B), which changes the voltage applied between the inputs (+,-) of a transconductance amplifier forming the main battery feed part in accordance with an excess voltage.

Description: BACKGROUND OF THE INVENTION 1. Field of the invention The present invention relates to a battery feed system according to the preamble of claim 1. A system of this kind is known from IEEE Journal of Solid State Circuits, SC-16, no. 4, (1981), pages 261-266; Aull, D.W. et al.: "A high voltage IC for a transformerless trunk and subscriber line interface." In general, battery feed circuits are placed at the switching system side for the principal purpose of supplying DC current through subscriber lines (line A and line B) to the subscriber telephone terminal equipment to operate the same. These battery feed circuits are connected to the terminals of the line A and line B forming the above subscriber lines, so they must be designed so that the input impedance with respect to the AC signal seem from the line A and line B becomes a predetermined value. This input impedance is divided into two types (Z DT , Z CT ) and must satisfy the following conditions: [1] A high AC impedance Z DT with respect to a differential signal (voice signal), [2] A low AC terminating impedance Z CT with respect to the in-phase signal (AC induction and other undesired AC signals), [3] A value of the DC battery feed resistor able to supply the DC current required by the telephone, for example, several hundred ohms. The AC terminating impedance Z DT with respect to the differential signal is preferably a high one so as to prevent attenuation of the same. On the other hand, the AC terminating Z CT with respect to the above in-phase signal is preferably a low one to cause extreme attenuation of the same. Further, in recent years, the conditions for in-phase signals have become severer and a demand has arisen for prevention of distortion in the voice signals even when the in-phase signal current becomes larger than the DC battery feed current. 2. Description of the Related Art As related art, mention may be made of Japanese Unexamined Patent Publication (Kokai) No. 75-42263. This satisfies the above conditions [1] and [2], but cannot deal with the above-mentioned recent trends, i.e., the demands for prevention of distortion in voice signals even when the in-phase signal current becomes larger than the DC battery feed current. The reasons for this is that the battery feed circuit shown in the publication is comprised of a PNP transistor with a collector connected to line B and NPN transistor with a collector connected to line A, the former PNP transistor only transmits a DC current from its collector, and the latter NPN transistor only absorbs the DC current from its collector, i.e., conductance of the DC current in the reverse direction is not possible. Therefore, a battery feed circuit which can not only handle DC current to line A and line B in the forward direction, but also handle DC current in the reverse direction has become necessary in practice. That is, a bidirectional battery feed circuit has become necessary. This bidirectional battery feed circuit will become needed more and more in the market in the future. Various methods are conceivable for realizing a battery feed circuit. As one example, there has been proposed a bidirectional battery feed circuit using a transconductance amplifier. This is shown as Fig. 2 on page 262 of the IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-16, NO. 4, AUGUST 1981 (details given later). However, battery feed circuits share peripheral circuits (for example, bias circuits) and function in the line circuit, so even if a bidirectional battery feed circuit per se could be realized, it would have no practical significance. From DE-A-2 654 495 a battery feed circuit is known in which a voltage between the tip and ring is detected to control a feed current. SUMMARY OF THE INVENTION Therefore, the present invention has as its object the provision of a bidirectional battery feed system wherein bidirectional battery feed free of noise and fulfilling input impedance conditions mentioned above may be realized by a comparatively simple circuit arrangement. This object is solved as defined in the characterizing part of claim 1. To achieve the above-mentioned object, the present invention provides a bidirectional battery feed circuit with compatible peripheral circuits, specifically a low impedance (with respect to the in-phase signal) forming means, a bias circuit, a battery feed current control circuit, a battery feed current supervising circuit, a battery feed current detection circuit, and a protection circuit for when the battery feed current becomes overcurrent. BRIEF DESCRIPTION OF THE DRAWINGS The above object and features of the present invention will be more apparent from the following description of the preferred embodiments with reference to the accompanying drawings, wherein: Fig. 1 is a circuit diagram of the bidirectional battery feed circuit introduced in the publication; Fig. 2 is a view showing the basic structure of a battery feed circuit provided with a low impedance forming means according to the present invention; Fig. 3 is a view showing one embodiment of a battery feed circuit provided with a low impedance forming means according to the present invention; Fig. 4 is a DC equivalent circuit of the battery feed circuit shown in Fig. 2; Fig. 5 is a differential signal equivalent circuit of the battery feed circuit shown in Fig. 2; Fig. 6 is an in-phase signal equivalent circuit of the battery feed circuit shown in Fig. 2; Fig. 7 is a view showing an example of a conventional general bias circuit; Fig. 8 is a block diagram showing the principle of the bias circuit according to the present invention; Fig. 9 is a circuit diagram showing an embodiment of the bias circuit according to the present invention; Fig. 10 is a circuit diagram showing in more detail the circuit of Fig. 9; Fig. 11 is a circuit diagram showing in still more detail the circuit of Fig. 10; Fig. 12 is a view showing the concept of a general battery feed circuit; Fig. 13 is a view showing an example of a general battery feed system; Fig. 14 is a graph showing the relationship of the load resistance R₁ and the battery feed current I; Fig. 15 is a view showing the principle blocks and peripheral circuits of the battery feed current control circuit according to the present invention; Fig. 16 is a graph for explaining the operation of the battery feed current control circuit according to the present invention; Fig. 17 is a view showing an example of the battery feed current control circuit and peripheral circuits according to the present invention; Fig. 18 is a graph for explaining the unbalance mode; Fig. 19 is a view illustrating a general switching system; Fig. 20 is a circuit diagram showing one example of a conventional supervising circuit; Fig. 21 is a view showing principal portions of the battery feed current supervising circuit according to the present invention; Fig. 22 is a view showing one embodiment of the battery feed current supervising circuit according to the present invention; Figs. 23(1), (2), (3), (4), and (5) are views showing the detection currents and the processed waveforms thereof accompanying in-phase signals; Figs. 24(1), (2), (3), (4), and (5) are views showing the detection current and its processed waveforms accompany ground fault accident; Fig. 25 is a view showing one example of a current mirror circuit (inflow type); Fig. 26 is a view showing one example of a current mirror circuit (outflow type); Fig. 27 is a view showing an example with even more terminals as in Fig. 26; Fig. 28 is a view illustrating a general switching system; Fig. 29 is a view showing one example of a battery feed current detection circuit not using an operational amplifier; Fig. 30 is a view showing an equivalent circuit at the time of reverse direction detection; Fig. 31 is a view showing the principle and construction of the battery feed current detection circuit according to the present invention; Fig. 32 is a view showing an embodiment of a battery feed current detection circuit according to the present invention; Fig. 33 is a view showing key portions of a known battery feed circuit; Fig. 34 is a view showing the principal and construction of an overcurrent protection circuit according to the present invention; Fig. 35 is a view of the principle and structure showing an overcurrent protection circuit provided at the line B side as well; Fig. 36 is a view for explaining the principle of the operation of the present invention; Fig. 37 is a circuit diagram showing an embodiment of the overcurrent protection circuit and a battery feed circuit according to the present invention; and Fig. 38A and Fig. 38B are views showing an example of a battery feed circuit system according to the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS As mentioned above, the present invention provides specific proposals on the peripheral circuits shared by a bidirectional battery feed circuit. In this case, the bidirectional battery feed circuit itself may be thought to be realizable by various means, but with the peripheral circuits referred to in the present invention, the bidirectional battery feed circuit itself may be freely designed in structure and is not particularly limited. Therefore, the bidirectional battery feed circuit disclosed in the publication is introduced merely as an example. Figure 1 is a circuit diagram of the bidirectional battery feed circuit introduced in the publication. In the figure, the battery feed circuit is comprised of a first transconductance amplifier 10, a second transconductance amplifier 20, and a feedback control circuit 50 and supplies DC current to the so-called line A 41 and line B 42 linked with the subscriber telephones TEL through battery feed terminals OUT1 and OUT2. The first and second transconductance amplifiers 10 and 20 have the same construction and are comprised of operational amplifiers 16 and 26 and various resistor groups. Further, they are provided with bias input terminals B1 and B2, control input terminals CNT1 and CNT2, and the above-mentioned battery feed terminals OUT1 and OUT2. Note that the above-mentioned resistors include first to fifth resistors (11 to 15) for the first transconductance amplifier 10 and first to fifth resistors (21 to 25) for the second transconductance amplifiers 20. The battery feed circuit shown in Fig. 1 is shown in Fig. 2 of page 262 of the publication IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-16, NO. 4, AUGUST 1981 and is provided with, as basic elements, a pair of transconductance amplifiers (10 and 20) and a feedback control circuit (50). The transconductance amplifiers are shown in Fig. 3 of the same page of the publication and are equivalent in function to a constant current source. Therefore, they satisfy the above-mentioned condition [1] (high impedance with respect to differential signal) and condition [3] predetermined DC battery feed resistance). However, the above-mentioned condition [2] (low impedance with respect to in-phase signal) cannot be satisfied with the transconductance amplifiers alone. Therefore, to obtain a low impedance with respect to the in-phase signals, the practice has been to introduce the feedback control circuit 50 and to apply its output to the already mentioned control input terminals CNT1 and CNT2 (Fig. 1). In the already mentioned conventional example (Japanese Unexamined Patent Publication (Kokai) No. 57-42263), the PNP transistor could only transmit the DC current and the NPN transistor could only absorb the DC current, i.e., the circuit was not a bidirectional battery feed circuit. However, the operational amplifiers (16 and 26) inherently can both transmit current from their outputs and absorb the same, so it does not matter if the in-phase signal current becomes larger than the DC battery feed current. In the battery feed circuit of Fig. 1, the feedback control circuit 50 is introduced and, first, the middle point voltage between the line A 41 and line B 42 is detected by the resistors 51 and 52. The differential signal appears as the waveforms d1 and d2 in Fig. 1, so the differential signal component is not detected as the middle point voltage. However, the in-phase signal appears as the waveforms c1 and c2 in the figure, so the middle point voltage is detected as the waveform m. The middle point voltage m is applied to the non-inverting input of a non-inverting amplifier 53 which takes V BB /2 (V BB is the power source voltage for the amplifiers 16 and 26) as its inverting input. The output is applied to the control input terminals CNT1 and CNT2. By this, the in-phase signal current, which is the external AC induction, can be alternately absorbed in the transconductance amplifiers 16 and 26. As mentioned above, the battery feed circuit (Fig. 1) requires a larger sized feed back control circuit 50 comprised of middle point voltage detection resistors 51 and 52 and a non-inverting amplifier 53, so there is the problem that that circuit becomes large in size and complicated. The present invention was made in consideration of these problems and provides a bidirectional battery feed circuit which substantially does not require a feed back control circuit. That is, it provides an extremely simple circuit as a low impedance (with respect to the in-phase signal) forming means. Figure 2 is a view showing the basic structure of a battery feed circuit provided with a low impedance forming means according to the present invention. In the figure, the above-mentioned feedback control circuit (50 in Fig. 1) is eliminated and, in its place, a capacitor 30 coupling a control input terminal CNT1 and control input terminal CNT2 is provided. In operation, briefly speaking, the situation is equivalent to one where the capacitor 30 is nonexistent as seen with respect to the in-phase signals, so the desired low impedance with respect to the in-phase signals is realized. Further, the state is the same in the case as seen with respect to the DC battery feed current. On the other hand, with respect to the differential signals, the capacitor 30 seems to be divided in two and its middle point is equivalent to being connected to the virtual earth, so the desired high impedance is achieved with respect to the differential signals. Therefore, just a single capacitor is provided and it becomes possible to eliminate the above-mentioned complicated feedback control circuit 50 and V BB /2 power source (details on operational principle will follow). Figure 3 is a view showing one embodiment of a battery feed circuit provided with a low impedance forming means according to the present invention. Basically, it has the same circuit structure as that in Fig. 2, but the operational amplifiers 16 and 26 are provided at their outputs 19 and 29 with buffer circuits 60 and 65 comprising emitter followers. Note that a corresponding buffer circuit has been disclosed in, for example, U.S. Patent No. 4387273. By this, even if in-phase signals considerably larger than the battery feed current intrude, they can be sufficiently processed. Further, the bias input terminals B1 and B2 have applied thereto predetermined voltages divided by the three voltage dividing resistors 71, 72, and 73. Note that the input/output part of the voice signals V can be suitably selected, but this figure shows an example where a transformer 74 is provided at the illustrated position and this used for input and output of the voice signals V. Looking at the above-mentioned buffer circuits 60 and 65, the former if comprised of PNP transistor 61 and NPN transistor 62 (both emitter coupled transistors) and a resistor 63, while the latter buffer circuit 65 is comprised of the PNP transistor 66, the NPN transistor 67 (both emitter coupled transistors), and the resistor 68. In-phase signals C1 and c2 larger than the DC battery feed current at one instant are shown by hatching in the figure. c1 is absorbed by the PNP transistor 61 and c2 by the PNP transistor 66. At the next instant, the polarities of the in-phase signals c1 and c2 are switched, whereupon next a current corresponding to c2 flows in from the NPN transistor 62 and a current corresponding to c2 flows in from the NPN transistor 67. Note that the original DC battery feed current continuously flows by the route, in the figure, from the earth E (0V) to a → b → c → d → e → V BB (-48V). Next, the operational principle of the battery feed circuit having the low impedance forming means of Fig. 2 will be explained with reference to Fig. 4, Fig. 5, and Fig. 6. Figure 4 is a DC equivalent circuit of the battery feed circuit shown in Fig. 2 and shows that a desired DC battery feed resistance is obtained. Note that the resistances R of the resistors are set in advance so that the relationship of R₁₅ << R₁₂, R₁₁ (suffixes 11, 12, and 15 show that resistances are for resistors 11, 12, and 15, same below) is satisfied. For the DC battery feed, the capacitor 30 (Fig. 2) substantially does not exist. The nonexistence of the capacitor 30 means the same thing as nonexistence of the resistors 14 and 24 (Fig. 2). Here, looking at the first transconductance amplifier 10 side, the DC current I A flowing in there is expressed by: I A = [V A x R₁₂/(R₁₂+R₁₁)] ÷ R₁₅ The reason why the current I A is expressed by this formula (1) is as follows: In Fig. 2, the capacitor 30 displays an infinitely larger impedance with respect to the DC current, so substantially is nonexistent (OPEN), while the resistor 14 (which is connected to the infinitely large impedance) is in an OPEN state at one end. Therefore, the resistor 14 has no effect at all in the circuit and substantially is nonexistent. For this reason, only the resistor 13 is connected between the output terminal and inverting input terminal of the operational amplifier. The resistor 13 feeds back the output signal as it is to the inverting input terminal, but the input current of the operational amplifier is extremely small, so the voltage drop of the resistor 13 cannot be ignored (at current zero, only the voltage signal is fed back). Therefore, the value of the resistor 13 may be zero ohms (short-circuit), i.e., it may take the form of a voltage follower. In Fig. 4, when the voltage of V A is applied to the circuit, the voltage V X between the OUT1 and the noninverting input become the value divided by R₁₁ and R₁₂ and V X = R₁₂/(R₁₁+R₁₂) x V A . As to the the voltage of the noninverting input, since the output of the potential follower appears as it is, V X is applied to the two ends of the resistor 15. Now, since R₁₅ << R₁₂, R₁₁, I A = (V X /R₁₅) = [R₁₂/(R₁₁+R₁₂) x V A ] ÷ R₁₅ Here, the DC equivalent resistance R A [=V A /I A ], using the above formula (1), becomes R A = V A /I A = V A /[V A x R₁₂/(R₁₂+R₁₁) ÷ R₁₅] = [(R₁₁+R₁₂) x R₁₅]/R₁₂ As clear from formula (2), if the three resistors 11, 12, and 15 are suitably set, the desired resistance R A (for example, several 100 ohms) can be obtained (satisfying the previously mentioned condition [3]). Further, the precision of the resistance R A is improved by raising the precision of the resistances of these resistors. On the other hand, the DC equivalent resistance R B can be similarly set for the second transconductance amplifier 20 too, as expressed by the following formula: R B = [(R₂₁+R₂₂) x R₂₅]/R₂₂ Figure 5 is a differential signal equivalent diagram of the battery feed circuit shown in Fig. 2. With respect to the differential signal, the circuit is equivalent to one with two capacitors 30′ arranged in series about a virtual earth E for the AC component. The capacity of the capicitors 30′, if the capacity of the capacitor 30 in Fig. 2 is C ab , is C ab x 2. This equivalent circuit is formed because the differential signals d1 and d2 of line A and line B fluctuate symmetrically up and down in the figure. Here, if C ab is selected to be sufficiently large with respect to the resistances R₁₄ and R₁₅ of the resistors 14 and 24, i.e., R₁₄, R₂₄ >> 1/2 π f C ab where, f is the lowest frequency of the differential signal then the voltage applied to the capacitors 30′ becomes substantially zero. By using this, first, the voltage of the point shown by V+ in the figure may be expressed by: V+ = V in x R₁₁/(R₁₂+R₁₁) where, V in is the voltage appearing at OUT1 but V+ becomes equal to V- by a so-called imaginary short-circuit of the operational amplifier 16, so the voltage V- at the inverting input (-) becomes: (V₀-V-)/R₁₃ = (V- -0)/R₁₄ where, V₀ is the voltage of the output of the operational amplifier 16 -0 of the right side numerator expresses that the voltage across the capacitors 30′ becomes zero, as mentioned earlier. By this formula (6), we get: V₀ = [(R₁₃+R₁₄)/R₁₄] x V- From this formula (7) and the above-mentioned formula (5) (V+ = V-), the current I A [= (V in -V₀)/R₁₅] comes to be expressed by: I A =V in /R₁₅ [(R₁₂+R₁₁)/R₁₁ -(R₁₃+R₁₄)/R₁₄] Here, if the reistances of the resistors 11, 12, 13, and 14 are set in advance so that R₁₁ = R₁₄ and R₁₂ = R₁₃, then I A of the above-mentioned formula (8) becomes I A = 0. I A = 0 means that a high impedance with respect to the differential signal is realized (the above-mentioned condition [1] is satisfied). Figure 6 is an in-phase signal equivalent circuit of the battery feed circuit shown in Fig. 2. When in-phase signals (c1 and c2) enter, the voltage V+ of the noninverting input (+) of the operational amplifier 16 in the first transconductance amplifier 10 and the voltage V- of the inverting input (-) change by the illustrated waveforms. These changes are exactly the same at the side of the second transconductance amplifier 20 as well. This being the case, absolutely no voltage appears across the capacitor 30 with respect to the in-phase signals. That is, with respect to the in-phase signals, the capacitor 30 substantially does not exist. As a result, the in-phase signal equivalent circuit becomes the same as the DC equivalent circuit shown in Fig. 4 and the impedance corresponding to the DC battery feed resistance (for example, several hundred ohms) becomes the impedance with respect to the in-phase signals, whereby a low value can be obtained (satisfying the above-mentioned condition [2]). As mentioned above, according to the present invention, a bidirectional battery feed circuit provided with a low impedance forming means which is simplified compared with the circuit of Fig. 1 can be realized. Next, an explanation will be made of the bias circuit, particularly the bias circuit for supplying a bias voltage to the bidirectional main battery feed part provided at the line circuit of the switching system. This battery feed circuit includes an operational amplifier as shown in Fig. 1. A predetermined bias voltage must be applied to the main battery feed part to make the operational amplifier operate normally. The bias circuit supplies this bias voltage. Figure 7 is a view showing an example of a conventional general bias circuit. The bias circuit 80 in the figure has therein three resistors 71, 72, and 73 (see Fig. 3) and obtains bias voltages V B1 and V B2 by so-called resistor voltage division. In this case, the voltage which is divided is the power source voltage V BB applied commonly to the main battery feed part 5. Note that the main battery feed part 5 is provided with bias input terminals B1 and B2 (see Fig. 3) for receiving the supply of the bias voltages V B1 and V B2 and the battery feed terminals OUT1 and OUT2 (see same figure) for feeding a predetermined direct current and operates the subscriber telephones TEL through the line A 41 and line B 42. The input-output portion (transformer etc.) of the voice signals was shown in Fig. 3, so mention thereof is omitted. With the general bias circuit 80 shown in Fig. 7, the power source (V BB ) is directly connected to the bias input terminals B1 and B2, so the noise generated by the power source enters into the main battery feed part as it is and thus causes the problem of deteriorated speech quality. Further, there is the problem that it is not easy to freely reset the bias voltage in accordance with need. Still further, there is the problem that it is impossible to perform reverse battery feed. Reverse battery feed means to make the current flow in the opposite direction (A→B) from the usual flow of DC current from line B 42 to line A 41 and is used, for example, in the case of provision of high grade service such as automatic call termination. However, reversal of the direction of the current itself was made possible by the bidirectional battery feed circuit explained earlier. The second aspect of the present invention was made in consideration of these problems and provides a bias circuit for a bidirectional battery feed circuit free from entry of power source noise into the main battery feed part and enabling easy change of the bias voltage. Note that the operational amplifier in the main battery feed part 5 has an inherent noise elimination ability and no power source noise enters from the same itself. Figure 8 is a block diagram showing the principle of the bias circuit according to the present invention. The bias circuit 80 in the present invention is comprised of a bias voltage generating means 81 having a high output impedance, a buffer means 83 having a low output impedance which receives the bias voltage V B generated at the output point 82 and supplies the same to the main battery feed part 5, and an AC bypassing capacitor 84 which is connected between the output point 82 and the earth E. Note that the figure shows the bias circuit connected to one of the line A 41 side or the line B 42 side, but this may be connected to both of the line A 41 side and the line B 42 side. The operation will be described below. The bias voltage generating means 81 has a high output impedance. That is, the output point 82 becomes a high impedance. The high impedance of the output point 82 is used and a capacitor 84 connected between the output point 82 and the earth E to selectively make just the AC component low impedance. As a result, the noise entering from the power source (V BB ) is suppressed by the capacitor 84. On the other hand, a buffer means 83 having a low output impedance is provided so as to return the bias voltage V B appearing at the output point 82, which become high output impedance, to the low output impedance, and supply the same to the bias input terminals B1 and B2. Figure 9 is a circuit diagram showing an embodiment of the bias circuit according to the present invention. As shown in the figure, the bias circuit 80 according to this embodiment has the bias voltage generating means 81, having a high output impedance comprised of a current source 91 and a resistor 92 and, with these intermediate connecting points, forms an output point 82. Further, the buffer means 83 having a low output impedance is comprised by a voltage follower circuit 94. The AC bias circuit 84 is connected to the illustrated portion. One end of the bias voltage generating means 81, i.e., one end of the current source 91, is connected to the power source (voltage V BB ) common to the main battery feed part (5 in Fig. 7). Normally, V BB is -48V. On the other hand, one end of the resistor 92 has connected thereto a reference voltage source of a voltage V BR . This V BR is lower by 2 to 3V from the earth voltage (0V) and is held at a constant value between -2 to -3V. The current I B flowing between these power sources (V BB to V BR ) is desirably small so as to achieve low power consumption, so use is made of a resistor 92 with a high resistance value. If this resistance value 92 is R₉₂, then the bias voltage V B ) becomes a value dropped in voltage by exactly I B x R₉₂ from V BR and is applied to the bias input terminal B (B1 or B2 in Fig. 7) through the voltage follower circuit 94. Figure 10 is a circuit diagram showing in more detail the circuit of Fig. 9 and shows a bias circuit comprised so as to be suited for reverse battery feed. For the reverse battery feed, the bias circuit of Fig. 9 is provided at both the line A side and the line B side. The constitutional elements of the line B side which correspond to constitutional elements of the line A side are given the same reference numerals with dashes. Note that the voltage follower circuits 94 and 94′ forming the buffer means 83 and 83′ are shown as being specifically comprised of operational amplifiers. On the other hand, the current sources 91 (Fig. 9) and 91′ are comprised, as illustrated, of current mirror circuits (CM1 and CM2) 101 and 101′ and reference current generating means 102. The reference current I B from the reference current generating means 102 is supplied to either of the line A side or the line B side by the current switching means 103. Normally, it is connected to the contact a of the line A side and is connected to the contact b only during reverse battery feed. The current mirror circuits serve to enable inflow (or outflow) to the second terminals 105 and 105′ of a current equal to the current flowing in (or flowing out from) the first terminals 106 and 106′. Using their properties, a bias current (equal to the afore-mentioned reference current I B ) is generated to be conducted to the resistors 92 and 92′. During normal battery feed (i.e., not reverse battery feed), the current I B flows in through the contact a of the current switching means 103 to the first terminal 106 of the current mirror 101, and the bias current I B flows to the resistor 92 (resistance value R₉₂). As a result, a bias voltage V B1 of a value dropped by exactly I B x R₉₂ from the reference voltage source V BR (-2 to -3V) is obtained at the output point 82. The reference current I B is suitably set in accordance with what degree of bias voltage is to be set (since R₉₂ is a fixed value). In this case, at the line B side, no current flows to the first terminal 106′ of the current mirror circuit 101′ and , therefore, no bias current I B flows to the second terminal 105′ either. Therefore, the voltage V BR (-2 to -3V) of the reference voltage source appears as it as as the bias voltage V B2 . Conversely, during reverse battery feed, the current switching means 103 is switched to the contact b. By this, the current I B flows to the resistor 92′ and the bias voltage at the line B side drops to V BR - I B x R 92′ , and, at the line A side, no current flows to the resistor 92 and the bias voltage V B1 rises to V BR . The reverse battery feed is realized by this. Figure 11 is a circuit diagram showing in still more detail the circuit of Fig. 10. Portions corresponding to those in Fig. 10 are given the same reference numerals. In Fig. 11, the current mirror circuits 101 and 101′, the reference current generating means 102, and the current switching means 103 are shown in further detail. The reference current generating means 102 is comprised of the current mirror circuit 111 (where current flows out from the first and second terminals), the transistor 112, and the resistor 113 (resistance value R r ). By this construction, the current I B flowing from the transistor 112 becomes I B = V BB /R r and a current equal in amount to the current I B is supplied to the current switch comprised of the pair of transistors 114 and 115. The transistors 115 and 114 are supplied at their bases with an N/R (Normal/Reverse) input and threshold input V th . During normal battery feed, N/R = "H" (high" and a current I B flows to the transistor 114 side. During reverse battery feed, N/R = "L" (low), and the current I B flows to the transistor 115 side. To set the bias voltage V B1 (V B2 ) to the desired value, the ratio of the resistance value R₉₂ of the resistor (92 (92′) and the resistance value R r of the above-mentioned resistor 113 is suitably selected. Normally, the power source voltage V BB (-48V) is not completed fixed and is accompanied by some fluctuation. Therefore, it is preferably to have the bias voltage also change in accordance with that fluctuation. In the circuit of Fig. 11, the current I B is determined by the power source voltage V BB and the resistor 113 (V BB / R r ), so the fluctuation of the V BB becomes the fluctuation of the I B and amount of the voltage drop of the resistor 92 (92′) also changes, so the bias voltage can automatically follow fluctuations in the V BB . The power source voltage V BB is subjected to not only the above-mentioned DC variation, but, since it is a circuit which uses -48V, is also subjected to AC noise. The mirror circuits 101 and 101′ output current proportional to the current input, and the noise of the common point V BB is not applied to the current output. That is, the mirror circuits have high output impedances with a constant current source. On the other hand, the current flowing in the resistor 113 is subjected to noise due to fluctuations in the V BB . This value is given by V BBN /R r (where V BBN is the noise voltage of V BB ). The noise current produced here passes through the mirror circuit 111 and the current switching means 103 to be applied to the mirror circuit 101 (101′). This current is biased to the earch E by the AC bypass circuit 84 (84′), and the voltage generated at the point 82 (82′) is sufficiently suppressed. Note that the voltage V BR of the reference voltage source is set to a voltage lower from the earth by a predetermined voltage (2 to 3V), so V BR itself will not fluctuate. In this case, V BR may be produced using a plurality of diodes connected in series. According to the aspect of the present invention mentioned above, a bias circuit is realized which is free from entry of power source noise into the main battery feed part and a bias circuit is realized which enables easy setting of the bias voltage and further easy handling of reverse battery feed. Next, an explanation will be given of a battery feed current control circuit, particularly a battery feed current control circuit for control of the battery feed current from a bidirectional battery feed circuit provided in a line circuit of a switching system. As mentioned earlier, the battery feed circuit in general includes an operational amplifier. A predetermined bias voltage must be applied to the battery feed circuit to make the operational amplifier operate normally. The bias circuit is provided to supply this bias voltage. The bias circuit normally sets the line B side to a value several volts lower than the earth (0V) and sets the line A side to a value several volts higher than the power source voltage (-48V) (opposite cases too). The existence of this bias voltage of several volts creates a need for the battery feed current to be controlled in accordance with the distance of the telephone lines (lines A and B) to the subscriber telephones. Figure 12 is a view showing the concept of a general battery feed system. In the figure, TEL is a subscriber telephone, and R L is the resistance of the telephone line and the telephone TEL, i.e., a so-called load resistance. The battery feed circuit performs the battery feed operation with respect to the load resistance R L . The DC battery feed resistance is, for example, 220 ohms. Note that the I in the figure is the DC battery feed current and V BB is a power source voltage of, for example, -48V. In Fig. 12, no mention is made of the bias voltage at all. In principle, battery feed is possible without a bias voltage. However, looking at the battery feed circuit, the following may be said in general. The battery feed circuit, to be connected to the terminals of line A and line B forming the above-mentioned telephone, must be designed so that a predetermined value is attained for the input impedance with respect to the AC signal viewed from the line A and line B. This input impedance may be roughly classified into two types and the conditions [1], [2], and [3] mentioned earlier must be satisfied. Further, as mentioned earlier, in recent years, increasingly severe conditions have been imposed on in-phase signals. It is demanded that no distortion be caused in the voice signals even if the in-phase signal becoming larger than the DC battery feed current I. The in-phase signal becoming larger than the DC battery feed current I means the current I will flow in the reverse direction than normal. To enable the flow of such a reverse current, the practice has been to set the bias voltage to within several volts (for example, 2V). Figure 13 is a view showing an example of a general battery feed system. The bias voltage mentioned above, set to within several volts, is illustrated as a battery of -2V (line B side) and +2V (line A side). A point to note in the figure is that the DC battery feed resistance has become, for example, 100 ohms, smaller than the bias-less case of Fig. 12 (220 ohms → 100 ohms). The reason for this is based on the fact that the resistance must be made smaller to make up for the reduction in the battery feed current I to the telephone TEL. Figure 14 is a graph showing the relationship of the load resistance R₁ and the battery feed current I. The longer the length of the telephone line, the greater the R L , but if the R L of the maximum length envisioned is, for example, 1900 ohms, the minimum guaranteed value of the battery feed current at that time would be set to, for example, 20 mA. This 20 mA is ensured by the resistance reduced to 100 ohms in Fig. 13. HOwever, the shorter the length of the telephone lines of the subscribers, the more ther R L in the graph shifts to the left in the figure. The battery feed current I rises sharply in proportion to 1/R L (chain-dot curve P). Therefore, there is the inconvenience of too much battery feed current flowing to the short distance subscribers. To eliminate this inconvenience, it has been attempted to correct the characteristics of the battery feed current I in the graph to the solid curve Q. That is, the battery feed current I is suppressed to about, for example, 50 mA for short distance subscribers. By this, the inconvenience of too much battery feed current is eliminated. Based on the above, attempts have been made in the prior art to make the battery feed resistance (corresponding to the 100 ohm values in Fig. 13) in the main battery feed part variable so as to control the magnitude of the battery feed current I in accordance with the magnitude of the load resistance R L . However, there were the problems that the main battery feed part became complicated in internal structure in order to satisfy simultaneously the above-mentioned conditions [1], [2], and [3] and the technique for changing the battery feed resistance was difficult in practice. The third aspect of the present invention was made in consideration of the above problems and provides a battery feed current control circuit which can limit the current to about 50 mA easily and without trouble and which can be easily provided with other optional functions such as reverse battery feed and balance/unbalance mode functions. Figure 15 is a view showing the principle blocks and peripheral circuits of the battery feed current control circuit according to the present invention. As the peripheral circuits, a main battery feed part 5 and bias circuit 80 are shown. The main battery feed part 5 is provided with bias input terminals B1 and B2 which receive bias voltages V B1 and V B2 (Fig. 10) from the bias circuit 80 and battery feed terminals OUT1 and OUT2 for transmitting the battery feed current I to the telephones TEL through the line A 41 and the line B 42. Further, reference numerals 15 and 25 in the main battery feed part 5 show the previously mentioned battery feed resistors. An explanation of the input-output portion of the voice signals (transformers etc.) is omitted (see Fig. 3). The battery feed current control circuit 200 according to the present invention is comprised of a detection means for detecting the battery feed current I, a detection means 220 for detecting the amount of overcurrent (I-I th ) when the battery feed current I is over a predetermined value I th , and a bias voltage control means 230 which changes the bias voltages V B1 and V B2 from the bias circuit 80 in accordance with the amount of overcurrent (I-I th ). The operation will be explained below. As mentioned earlier, in the prior art attempts have been made to change the battery feed current I by changing the resistance values of the battery feed resistors 15 and 25 in Fig. 15, but in the present invention, the bias voltages V B1 and V B2 are changed so as to change the battery feed current I. This enables easy realization of the circuit and further enables realization of optional functions. Figure 16 is a graph for explaining the operation of the battery feed current control circuit according to the present invention. The top half corresponds to the graph of Fig. 14. The bottom half shows that the bias voltage V B is controlled by the present invention. The voltage (0V) of the earth E is shown by the chain-dot line E. The power source voltage V BB is made to match the horizontal axis. The closer the subscriber in distance, the smaller the load resistance R L and the greater the battery feed current I, but by the battery feed current control circuit 200, once I rises above a predetermined value I th , at least one of the bias voltage V B2 of the line B side and the bias voltage V B1 of the line A side is changed to bring the two closer and reduce the battery feed current I through control. Figure 16 shows the case where both of V B1 and V B2 are brought closer. Figure 17 is a view showing an example of the battery feed current control circuit and peripheral circuits according to the present invention. First, looking at the overall construction of the circuit of the figure, the main battery feed part 5 is shown as simply the battery feed resistors 11 and 12, the battery feed terminals OUT1 and OUT2, and the bias input terminals B1 and B2. The bias circuit 80 is shown by the constitutional elements given the reference numerals used in Fig. 11. The battery feed current detection means 210 is shown by the constitutional elements given the reference numerals 211 to 215. The overcurrent detection means 220 is shown by the constitutional elements given the reference numerals 221 to 224. Further, the bias voltage control means 230 is shown by the constitutional elements given the reference numerals 231 to 237 and 36 to 39. The battery feed current detection means 210 may be one which is able to find the magnitude of the battery feed current I, but in this embodiment, the voltage drop caused at the detection resistors 214 and 215 by the current I is converted into current values by the voltage/current converters (VI) 211 and 212 and the results are mixed by a current mixer (CMIX) 213 for use as the detection current i. This i is proportional to the battery feed current I. This detection current i is made to flow out from the first terminal (224) of the current mirror circuit 222 (right top of figure). Note that the voltage/current converters 211 and 212 are provided at the line A side 41 and the line B side 42 and the results are mixed by the mixer 213 so as to cancel the in-phase signals mentioned earlier. The detection current i is applied to the first terminal (224) of the sixth current mirror circuit (CM6) 222 forming part of the overcurrent detection means 220. A constant current source 221 is connected to the second terminal (223) and a constant current i th proportional to the above-mentioned predetermined value I th of the battery feed current I is made to flow out at all times. When the battery feed current I exceeds the predetermined value I th by the overcurrent amount ΔI (=I-I th ), an overcurrent Δi (=i-i th ) is produced corresponding to the same. This Δi is a control factor for the bias voltage control, i.e., the battery feed current control. Note that current mirror circuits are employed because they are in themselves high in output impedance and are effective for suppressing the entry of power source noise into the bias circuit side. The above-mentioned overcurrent Δi is processed as follows for the control of the bias voltage. First, the overcurrent ₋i is drawn into the first terminal 234 of the fifth current mirror circuit (CM5) forming part of the bias voltage control means 230. A current equal in amount to the Δi is used as the control current i c and drawn into the second terminal 232 to change the current and voltage state in the bias circuit 80. The bias circuit 80 has on the bias voltage control means 230 side a third current mirror circuit (CM3) 111 forming the current source, a transistor 112, a resistor 113, and a buffer transistor 133 and has on the main battery feed part 5 side a first current mirror circuit (CM1) 101, a resistor 92, and a voltage follower circuit 94 (all for the line A) and the same constitutional elements 101′, 92′, and 94′ (all for the line B). Looking at the line A 41 side, the reference voltage source of the reference voltage V BR is connected to one end of the resistor 92. This V BR is held to a constant value between -2 to -3V, which is 2 to 3V lower than the earth voltage. Here, if the resistance value of the resistor 92 is R₉₂, the value dropped in voltage by I B x R₉₂ from V BR becomes the bias voltage V B1 and is applied to the bias input terminal B1 through the voltage follower circuit 94. The current I B at this time is the current which flows into the second terminal 105 of the current mirror circuit 101 and is equivalent to the current which flows into the first terminal 106. The current which flows into the first terminal 106 is the current I B which passes through the transistor 114 (the transistor 115 is off) and is transmitted from the second terminal 116 of the third current mirror circuit 111. This current is equal to the current produced at the first terminal 117 side. This is the current which lows through the transistor 112 and has a magnitude of V BB /R₁₃₉ (R₁₃₉ being the resistance value of the resistor 139). The above explanation was made with reference to the line A 41 side. On the line B 42 side, the transistor 115 is off and no current at all flows to the first terminal 106′ of the second current mirror circuit 101′, so no current either flows to the second terminal 105′, there is no voltage drop at the resistor 92′, and the voltage V BR becomes the bias voltage V B2 as it is. This state is equivalent to the state in the lower half of the graph of Fig. 16 where V B1 and V B2 are held to predetermined constant values (when I is smaller than I th ). Here, if the load resistance R L becomes smaller and the battery feed current I becomes larger than I th by ΔI, the aforementioned control current i c is drawn into the bias voltage control means 230. Therefore, the current I B from the current mirror (CM3) 111 is reduced to I E - i c . the reduced current I B - i c reaches the current mirror circuit 101 from the transistor 114 and the voltage drop at the resistor 92 becomes smaller than before by i c x R₉₂. That is, the bias voltage V B1 rises by i c x R₉₂ (see rise of V B1 in Fig. 16). On the other hand, looking at the bias voltage V B2 side, the third terminal 233 of the fifth current mirror circuit (CM5) 231 receives an inflow of a current (Δi, that is, equilivalent to i c ) flowing out from the first terminal 237 of the fourth current mirror circuit (CM4) 235 via the transistor 139. Therefore, i c flows out from the second terminal 236 of the current mirror circuit 235, passes through the transistor 136 (the transistor 137 is off), and flows into the current mirror circuit 101′ in the bias circuit 80. Therefore, a voltage drop of i c x R 92′ occurs at the resistor 92′ (resistance value of R 92′ ) causing a fall in V B2 of the graph of Fig. 16. The above explanation was on the basic operation of the battery feed current control circuit. In addition, the reverse battery feed and balance-unbalance mode functions can be handled. Reverse battery feed, as mentioned earlier, refers to the reversal of the direction of the current (A→B) from the normal flow of the DC battery feed current I from the line B 42 to the line A 41 and is used in the case of provision of high grade services such as automatic termination. To reverse the current I, a current switch is formed by the transistors 114 and 115 and these selectively made on and off by an N/R (normal/reverse) input. During normal (N) battery feed, N/R = "L" and the transistor 114 is on (the transistor 115 is off). During reverse (R) battery feed, the transistor 115 is on (the transistor 114 is off) and the levels of V B1 and V B2 in the graph of Fig. 16 are reversed. To handle this reverse battery feed, in the bias voltage control means 230 too, transistors 136 and 137 forming a current switch are formed. The previously mentioned current i c flowing through the transistor 136 is switched to the transistor 137 during the reverse battery feed (the transistor 136 is turned off). Next, the balance-unbalance mode means the mode of making the bias voltages V B1 and V B2 balanced or unbalanced. The operations explained above were all for the balance mode. Figure 18 is a graph for explaining the unbalance mode and corresponds to the above-mentioned Fig. 3. In the graph of Fig. 17, the bias voltages V B1 and V B2 are changed in the same way, but in the unbalance mode of Fig. 18, the bias voltage V B2 is left as is and the bias voltage V B1 alone is raised so as to suppress the battery feed current I to the predetermined value I th . To realize this unbalance mode, making the explanation with reference to the case of a normal battery feed, the current flowing through the transistor 114 need only be made from I B -i c at the afore-mentioned balance mode to I B -2i c . That is, it is only necessary to raise the amount of voltage rise by the resistor 92 from i c x R₉₂ to 2i c x R₉₂. On the other hand, on the line B side, it is only necessary to change the current flowing into the current mirror circuit 105′ at the balance mode to zero. That is , it is only necessary to make the voltage drop due to the resistor 92′ zero. Therefore, the transistors 138 and 139 forming a current switch are provided and selectively turned on and off by the U/B (unbalance/balance) input. In the balance mode, the U/B input is "L", the transistor 139 is on, and the transistor 138 is off, so the conditions are the same as the previous explanation of operation. On the other hand, when U/B becomes "H" and the unbalance mode is entered, the transistor 138 turns on and the transistor 139 turns off. After the transistor 139 turns off, the previously mentioned current flowing out from the first terminal 237 of the current mirror circuit (CM4) 235 (Δi, that is, equivalent in amount to i c ) becomes 0 and the current supplied to the current switch (136 and 137) becomes zero. By this, the above-mentioned condition of making the voltage drop by the resistor 92′ zero is satisfied. Since the transistor 138 turns on along with the transistor 139 turning off, the control current from the current mirror 111 becomes the sum of the i c flowing in to the third terminal 233 of the current mirror 231 and the i c flowing into the second terminal 232 thereof originally, i.e., doubles to 2i c . Therefore, the current flowing through the transistor 133 and the transistor 134 (during normal battery feed) falls from the I B -i c of the balance mode to I B -2i c . This results in the previously mentioned condition of making the current I B -2i c satisfied and forms the unbalance mode. In the unbalance mode, it is possible to create a considerably large voltage gap between the bias voltage V B1 of the line A and the power source voltage V BB and, in the case of Fig. 18, to raise the level with respect to the power source voltage V BB (-48V) to, for example, -24V. This causes a decline in the power consumption at the battery feed circuit etc. However, with reduction from -48V to -24V (reduction of voltage value) by resistor voltage division, a power loss (heat generation) is caused by the voltage dividing resistors, so this is meaningless. Therefore, to reduce the value from -48V to -24V, it is necessary to use a low power loss type converter such as a so-called DC-DC converter. As mentioned above, according to the present invention, it is possible to control the battery feed current relatively simply without further control of the main battery feed part and is possible to suppress overflow of battery feed current caused in the case of short distance subscribers. Further, it is possible to easily realize reverse battery feed and balance/unbalance mode functions. Next, an explanation will be made of a battery feed current supervising circuit, more particularly a battery feed current supervising circuit for supervising the battery feed current from a battery feed circuit provided in a line circuit of a switching system. A battery feed current supervising circuit (below, referred to as just a supervising circuit) supervises the battery feed circuit from a main battery feed part so as to detect, together with a scanner (SCN), an off-hook state, on-hook state, or dialing pulse and detect, together with an alarm equipment (ALM), a ground fault, false connection to the battery, and other abnormalities. In addition, it detects when the battery feed current is too large (for example, when the distance to the subscriber is short) and suppresses the current and performs a wide variety of other functions. The most important portion of the supervising circuit is the portion which detects the battery feed current, but it is necessary to detect not only the forward direction current, but also the reverse direction current. This is because, as mentioned before, it is necessary to guarantee that the normal voice signal does not deteriorate in quality even if the in-phase signal current becomes larger than the battery feed current. Therefore, it is not only necessary that the battery feed circuit itself can perform bidirectional battery feed in both the forward and reverse directions, but also that the supervising circuit can perform bidirectional current detection in both the forward and reverse directions. Further, it is necessary to perform current detection in the forward and reverse directions even when considering performing reverse battery feed. Figure 19 is a view illustrating a general switching system in which the main battery feed part 5 sends a battery feed current I to a subscriber telephone TEL via the line A 41 and the line B 42 from the battery feed terminals OUT1 and OUT2. The main battery feed part 5 includes an operational amplifier and, for its suitable operation, receives a bias voltage from a bias circuit 80 by the bias input terminals B1 and B2. Note that the input-output portion of the original voice signal AC is suitably selected. In the figure, the portion drawn as a transformer at the right of the bias circuit 80 is used as the input-output portion. The battery feed current supervising circuit is the block represented by the reference numeral 300 and is provided at its input portion with detection resistors 311 and 312 through which the battery feed current I is passed. As mentioned earlier, the supervising circuit 300 performs various functions in cooperation with the other group of equipment. The other group of equipment is shown as the scanner 170, alarm equipment 180, etc. Figure 20 is a circuit diagram showing one example of a conventional supervising circuit and shows just the line A side. The line B side has the same construction. As shown in the figure, the conventional supervising circuit 300 is comprised of two transistors Q1 and Q2, a constant current source CI, a detection resistor 311, and a voltage/current converting resistor 321. At the periphery are the main battery feed part 5, battery feed terminal OUT1, and line A 41 shown in Fig. 19. When a normal forward direction battery feed current I f flows to the detection resistor 311, the voltage V generated there is detected by the transistor Q1 by a high impedance. The emitter-base voltage is compensated by the transistor Q2, then the above-mentioned voltage V is generated at the emitter of the transistor Q2. As a result, a detection current i f proportional to the voltage V flows to the voltage/current converting resistor 321. This is further applied to the cooperating group of equipment 170, 180, etc. Note that the power source voltage V BB is, for example, -48V and tha a current always flows from the constant current source CI to keep the transistor Q1 in constant operation. Further, i f is given by the following formula: i f = R₃₁₁/R₃₁₂ x I f where, R₃₁₁ and R₃₁₂ are the resistance values of the resistors 311 and 312, respectively. In the supervising circuit of Fig. 20, the detection current i f flows from the collector of the transistor Q2 through the emitter for the desired supervision. However, there is a large AC induction. When, based on this, the in-phase signal current becomes larger than the battery feed current I, a current I r flows in the reverse direction. In this case, the transistor Q2 must pass a reverse detection current i r . However, the transistor can only pass current one way, so i r cannot be detected. Even if separate transistors Q1 and Q2 or the like were provided in parallel for passing current in the reverse direction, there would be a limit to the range of the voltage V in practice and thus this would not be practical. In the end, there is a problem of difficult detection of current in both the forward and reverse directions in conventional supervising circuits. The fourth aspect of the present invention was made in consideration of this problem and provides a battery feed current supervising circuit which can handle battery feed current in both the forward and reverse directions. Figure 21 is a view showing principal portions of the battery feed current supervising circuit according to the present invention. In the figure, the battery feed current supervising circuit 300 is comprised of a battery feed current detecting means 320, which forms the major part of the circuit, and a detection current processing means 330, which performs the required processing on the detection current detected there for supervision. The battery feed current detection means 320 is comprised of a first operational amplifier 322 and second operational amplifier 323 with noninverting inputs connected to the two ends of the detection resistor 311, respectively, a first emitter follower circuit 324 comprised of an NPN transistor 325 and PNP transistor 326 having commonly connected first bases and commonly connected first emitters connected to the output of the first amplifier 322, a second emitter follower circuit 327 comprising an NPN transistor 328 and PNP transistor 329 having commonly connected second bases and commonly connected second emitters connected to the output of the second amplifier 323, and a voltage/current converting resistor 321 which is connected between the commonly connected first emitters connected to the inverting input of the first operational amplifier 322 and the commonly connected second emitters connected to the inverting input of the second operational amplifier 232 and which converts the voltage between the first and second emitters to current. This means obtains a forward direction detection current i f through the NPN transistor 328 and PNP transistor 326 and obtains a reverse direction detection current i r through the PNP transistor 329 and NPN transistor 325 and supplies these detection currents i f and i r to the detection current processing means 330. The operation thereof is as follows: When a normal forward direction battery feed current I f flows, voltages V₀ and V₁ (V₁>V₀ are generated across the detection resistor 311 These voltages V₀ and V₁ appear at the two ends of the converting resistor 321 (resistance R₃₂₁) as they are through the first and second operational amplifiers 322 and 323 having high impedances. Here, the V₁-V₀/R₃₂₁ detection current i f [= R₃₁₁/R₃₂₁ x I f ] is obtained through the transistors 328 and 326 at the first and second emitter follower circuits 324 and 327. In general, an emitter follower circuit does not have a voltage gain, but has a high current gain and further has a collector connected directly to the power source. In the present invention, the collector is not directly connected to the power source, but is directly connected to the current processing means 330. On the other hand, when the reverse direction battery feed current I r is flowing, the voltages V₀ and V₁ appearing across the detection resistor 311 reverse to V₁<V₀ and the detection current flowing to the converting resistor 321 inverts from i f to i r . At this time, a detection current i r flows through the transistors 325 and 329 at the first and second emitter follower circuits 324 and 327. Figure 22 is a view showing one embodiment of the battery feed current supervising circuit according to the present invention. The portion shown in Fig. 21 as the battery feed current detection means 320 is shown not only on the line A 41 side, but also on the line B 42 side as 320′. The input portion detection resistor is shown by 311′. The forward direction detection currents i fa and i fb and the reverse direction detection currents i ra and i rb are given to the detection current processing means 330 by the detection means 320 and 320′ on the line A side and the line B side. The detection current processing means 330 is provided with seven current mirror circuits (CM1 to CM7) 410 to 470. These perform the required addition and subtraction operations and further supply the added or subtracted detection current through the absolute value circuits (ABS1 and ABS2) 510 and 520 and the comparator circuits 530 and 540 to the scanner (SCN) and the alarm equipment (ALM). Here, the significance of the addition and subtraction operations of the current mirror circuits 410 to 470 will be clarified. Addition and subtraction operations are required when the harmful previously mentioned in-phase signal current becomes too large so as to eliminate the same. Figures 23(1), (2), (3), (4), and (5) are views showing the detection currents and the processed waveforms thereof accompanying in-phase signals. Figure 23(1) shows the superposition of an excessively large in-phase signal current exceeding i b on the DC battery feed current on the line B 42 side (detection current i b ) and the appearance of the reverse direction detection current i rb and the forward direction detection current i fb . Figure 23(2) shows the superposition of the excessively large in-phase signal current on the DC battery feed current on the line A 41 side (detection current i a ) and the appearance of the forward direction detection current i fa and the reverse direction detection current i ra . These in-phase signal current components would hinder accurate supervision of the battery feed current, so processing is performed to extract just the pure battery feed current component (i a +i b ) as shown in Fig. 23(5). For this processing, first the forward direction detection currents of the line A 41 side and the line B 42 side are added. This addition operation (i fa +i fb ) gives the processed waveforms of Fig. 23(3). In these processed waveforms, the protruding waveforms of u, v, and w (undesired waveforms) correspond to the u, v, and w of Figs. 23(1) and (2). Next, the reverse direction detection currents of the line A 41 side and the line B 42 side are added. This addition operation (i ra +i rb ) gives the processed waveforms of Fig. 23(4). The processed waveforms are the above-mentioned undesired waveforms u, v, w, etc. Therefore, the waveforms of Fig. 23(4) are removed from the waveforms of Fig. 23(3) to extract the desired battery feed current component of Fig. 23(5). Looking at this as addition/subtraction processing, it is equivalent to the operation: (i fa +i fb ) - (i ra + i rb ) This operation is performed by the detection current processing means 330. The first nomial of the above formula (9), that is, (i fa +i fb ), is output as the sum of the currents flowing from the second terminals 412 and 422 of the current mirror circuits 410 and 420 in Fig. 22, whil the second nomial of the above formula (9), i.e., - (i ra +i rb ), is output as the sum of the currents flowing into the second terminals 462 and 472 of the current mirror circuits 460 and 470. Note that the current mirror circuits cause current equal in amount of the currents flowing out of or into the first terminals 411 to 471 to flow out or or into the corresponding second terminals 412 to 472. SImilarly, they cause currents equal to those to flow out from the third terminals 413, 423, and 443 and into the third terminal 473. Therefore, (i fa +i fb ) - (i ra + i rb ) appears at the port 560, which corresponds to Fig. 23(5). The absolute value of the current of the port 560 is obtained at the absolute value circuit 510. When the comparator circuit 530 detects that it is larger than a predetermined set value, it is deemed that there is a battery feed current. The absolute value is taken at the absolute value circuit 510 (same for 520) to handle reverse battery feed. Figure 24(1), (2), (3), (4), and (5) are views showing the detection current and its processed waveforms accompanying ground fault accidents. The figures show the example of a ground fault accident occurring on the line A 41 side. The current at the time of the ground fault accident appears at the port 550 of Fig. 22 and is output through the absolute value circuit 520 (to enable application to resistor battery feed too) and the comparator circuit 540 to drive the alarm equipment ALM. In Fig. 24(1), the battery feed current component is 0 (i b = 0), but only the in-phase signal conponent is visible. In Fig. 24(2), the in-phase signal component is superimposed and i fa and i ra are formed. The difference between the forward direction currents (i fa - i fb ) is obtained, the waveform of Fig. 24(3) is obtained, and the in-phase signal component is stressed. Further, the difference between the reverse direction currents (i rb - i ra ) is taken (see Fig. 24(4)), applied to the waveform of Fig. 24(3), and the in-phase signal component further stressed (see Fig. 24(5)). This waveform of (5) enables detection of the occurrence of ground faults . These are detected by the operation: (i fa - i fb ) + (i rb - i ra ) The first nomial in formula (2), i.e., (i fa - i fb ), is found by the combination of the current i fa from the third terminal 413 of the current mirror circuit 410 in Fig. 22 and the current i rb ) to the second terminal 452 of the current mirror circuit 450, while the second nomial, i.e., (i rb - i ra ), is found by the combination of the current i rb from the third terminal 443 of the current mirror circuit 440 in Fig. 22 and the current i ra to the third terminal 473 of the current mirror circuit 470. These appear at the port 550. when the comparator circuit 540 detects that the absolute value (by the circuit 520) exceeds a predetermined value, the alarm equipment ALM is notified. Figure 25 is a view showing one example of an inflow type current mirror circuit, and Fig. 26 is a view showing one example of an outflow type current mirror circuit. Figure 27 is a view showing an example with even more terminals as in Fig. 26. The construction is the same, however, as in Fig. 25 even when the number of terminals is increased. As mentioned above, according to the present invention, a battery feed current supervising circuit is realized which can handle not only forward direction but also reverse direction battery feed current. Next, an explanation will be made of a current detection circuit, more particularly a battery feed current detection circuit for detecting the battery feed current from a bidirectional battery feed circuit provided in a line circuit of a switching system. The battery feed current detection circuit cooperates with a normal battery feed current supervising circuit to supervise the battery feed current from the main battery feed part so as to detect the off-hook state, on-hook state, and dialing pulses together with the scanner (SCN) and to detect ground faults, false connection to the battery, and other abnormalities together with the alarm equipment (ALM). In addition, it detects when the battery feed current is to large (for example, when the distance to the subscriber is short) and suppresses the current and performs a wide variety of other functions. In the battery feed current detection circuit, it is necessary to detect not only the forward direction current, but also the reverse direction current. This is because, as mentioned before, it is necessary to guarantee that the normal voice signal does not deteriorate in quality even if the in-phase signal current becomes larger than the battery feed current. Further, it in necessary to perform current detection in the forward and reverse directions even when considering performing reverse battery feed. Figure 28 is a view illustrating a general switching system in which the main battery feed part 5 sends a battery feed current I to a subscriber telephone TEL via the line A 41 and the line B 42 form the battery feed terminals OUT1 and OUT2. The main battery feed part 5 includes an operational amplifier and, for its suitable operation, receives a bias voltage from a bias circuit 80 by the bias input terminals B1 and B2. Note that the input-output portion of the original voice signal AC is suitably selected. In figure, the portion drawn as a DC blocking capacitor and a transformer connected to the terminals OUT1 and OUT2 is used as the input-output portion. The battery feed current detection circuit according to the present invention is the block represented by the reference numeral 600 (corresponding to 320 in Fig. 21) and is provided at its input portion with detection resistors 311 and 312 through which the battery feed current I is passed. The detection circuit 600 performs various functions in cooperation with the detection current processing means etc. and drives, for example, the scanner 170, alarm equipment 180, etc. This battery feed current detection circuit 600 was shown by reference numeral 320 in Fig. 21 and is realized by a forward and backward direction battery feed current detection circuit. The circuit 320 in Fig. 21, however, has as essential elements the operational amplifiers 322 and 323. However, in general, operational amplifiers require capacitors for internal compensation. The creation of capacitors on LSIs invites an increase in the chip area. Further, operational amplifiers have many transistors and other elements and the chip area thus further increases. Therefore, it would be ideal if a battery feed current detection circuit could be assembled without operational amplifiers. Figure 29 is a view showing one example of a battery feed current detection circuit not using an operational amplifier. In the figure, reference numerals 311, 41, 5, and 320 mean the same as mentioned earlier. When a forward direction battery feed current I f flows to the detection resistor 311, the voltages V₀ and V₁ appear at the two ends. One end of the resistor 311, as illustrated, is a low impedance end, i.e, is connected to the output of the operational amplifier OP forming the main battery feed part 5 (Fig. 28). To the emitter of the PNP transistor 32 is connected in series the diode connected NPN transistor 33. Further, this is connected to a constant current source 36 for supplying a bias current. The collector of the PNP transistor 32 is connected to the minimum potential power source V BB . By the flow of current to the PNP transistor 32, the base thereof monitors the voltage V₁ of the detection resistor 311 by high impedance. The voltage V₁ of the resistor 311 is added with the base-emitter voltages V BE of the transistors 32 ad 33 and applied to the base of the NPN transistor 34. Here, if the V BE s of the PNP transistors 32 and 35 are considered substantially equal and the V BE s of the NPN transistors 33 and 34 are considered substantially equal, the voltage V₁ of the resistor 311 appears as it is at one end (right end in the figure) of the monitor resistor 31 and a forward direction detection current i f flows to the resistor 31. The magnitude of the same is: i f = (R₃₁₁/r₃₁) I f where, R₃₁₁ and r₃₁ are the resistance values of the resistors 311 and 31, respectively. The battery feed current I f can be detected from this i f . In the circuit of Fig. 29, the voltage across the resistor 311 is normally a very small 1V or less. Therefore, fluctuations in the base-emitter voltages V BE of the transistors cannot be ignored for detection accuracy. Note was taken of the fact that PNP type transistors generally exhibit uniform V BE s and that NPN type transistors also exhibit generally uniform V BE s so as to cancel the variance among transistors of the same conductivity type (PNP for PNP types and NPN for NPN types). The transistors for cancelling variance are transistors 33 (for cancelling 34) and 35 (for cancelling 32). However, the introduction of these cancelling transistors itself is known from, for example, Japanese Unexamined Patent Publication (Kokai) No. 61-62268. The battery feed current detection circuit shown in Fig. 29 can be assembled without operational amplifiers and thus achieve the desired object. However, in this circuit, it is only possible to detect the forward direction battery feed current I f , so this cannot be applied to a circuit for both the forward and reverse directions. Therefore, the assignee previously tried to add the wired PNP transistor 37 shown by the dotted line in Fig. 29 so as to obtain a reverse direction detection current i r corresponding to the reverse direction battery feed current i r . Figure 30 is a view showing an equivalent circuit at the time of reverse direction detection. This is the same as Fig. 29 but with the top and bottom reversed. Therefore, the operational amplifier OP of the main battery feed part 5 is placed at the top to make the direction of the battery feed current I r flowing through the detection resistor 311 match that of the I f of Fig. 29. The magnitude of the reverse direction battery feed current I r in this case is found by the reverse direction detection current i r from: i r = (I r x R₃₁₁-2V BE )/r₃₁ However, the numerator in the above formula has the nomial of 2V BE (sum of the voltages V BE of the PNP transistors 32 and 37) left therein, so the circuit of +Fig. 30 cannot be used due to lack of precision. In the end, there is the problem that the desired battery feed current detection circuit cannot be realized by just adding a reverse direction detection circuit system to the battery feed current detection 20 shown in Fig. 29. A fifth aspect of the present invention provides a battery feed current detection circuit which enables one to obtain, for both the forward and reverse directions, a high precision detection current by cancelling the variance in the V BE s of the transistors and without use of any operational amplifiers. Figure 31 is a view showing the principle and construction of the battery feed current detection circuit according to the present invention. The first detection means 641 monitors the voltage across the ends when a forward direction battery feed current I f flows to the detection resistor 311 and applies the result to the first monitor resistor 645. By this, a forward direction detection current i f is produced at the resistor 645. The first detection means 641 does not include any operational amplifiers at all and is comprised of an PNP transistor and NPN transistor. The internal first cancelling means 643 cancels the V BE of the transistors. On the hand, the second detection means 642 monitors the voltage across the ends when a reverse direction battery feed current I r flows to the detection resistor 311 and applies the result to the second monitor resistor 646. By this, a reverse direction detection current i r is produced at the resistor 646. The second detection means 642 does not include any operational amplifiers at all and is comprised of an PNP transistor and NPN transistor. The internal second cancelling means 644 cancels the V BE of the transistors. In general, there is the preconception of sharing a monitor resistor for both the forward and reverse directions. As explained in reference to Fig. 29 and Fig. 30, means could not be introduced to cancel the V BE of the transistors in a system for detecting the reverse direction battery feed current I r . The present invention provides two separate monitor resistors to handle both the forward direction and the reverse direction. These are the resistor 645 and resistor 646. As a result, a means for cancelling the V BE of the transistors can be easily assembled in the detection means, more particularly the second detection means 642. Therefore, by just the simple assembly of NPN transistors and PNP transistors, it becomes possible to completely cancel the V BE s of the transistors and detect the battery feed current in both the forward and reverse directions. Figure 32 is a view showing an embodiment of a battery feed current detection circuit according to the present invention. In the figure, reference numerals 641 and 642 are the first detection means and second detection means shown in Fig. 31. A forward direction detection current i f and a reverse direction detection current i r are produced, respectively, when a forward direction battery feed current I f and a reverse direction battery feed current I r flow to the detection resistor 311. Therefore, the first detection means 641 monitors the voltage V R across the detection resistor 311 and applies this V R as is to the first monitor resistor 645. This construction includes the PNP transistor 411 and the NPN transistor 412 and, to cancel the V BE s of the transistors, a first cancelling means 643, that is, an NPN transistor 431 connected in the form of a diode and a PNP transistor 432 connected in the form of a diode. The V BE of the transistor 411 is cancelled by the transistor 432, while the V BE of the transistor 412 is cancelled by the transistor 431. Reference numeral 361 is a constant current source for supplying bias current which supplies base current for he transistor 412, produces the V BE of the transistor 431, and places the transistor 411 in the operational state. The above construction resembles that of Fig. 29, but in the present invention a second detection means 642 is provided separately. In the second detection means 642, the voltage V R across the detection resistor 311 is monitored and supplied as is to the second monitor resistor 646. This construction includes the PNP transistor 421 and the NPN transistor 422 and, to cancel the V BE s of the transistors, a second cancelling means 644, that is, an NPN transistor 441 connected in the form of a diode and a PNP transistor 442 connected in the form of a diode. The V BE of the transistor 421 is cancelled by the transistor 442, while the V BE of the transistor 422 is cancelled by the transistor 411. Reference numeral 362 is a constant current source for supplying bias current which supplies base current for the transistor 422 and produces the V BE of the transistors 441 and 442. In the second detection means 642, it is verified that the voltage V R across the detection resistor 311 (when I r is being passed) appears across the second monitor resistor 646. If the voltage across the resistor 646 is V₃ and V₄, then the following stand: V₃ = V₀ + V BEP1 + V BEN1 - V BEN2 V₄ = V₀ -V R + V BEP2 Here, V BEP1 and V BEP2 are the V BE s of the PNP transistors 442 and 421, respectively, and V BEN1 and V BEN2 are the V BE s of the NPN transistors 441 and 422, respectively, where V BEP1 ≒ V BEP2 and V BEN1 ≒ V BEN2 . Subtracting formula (12) from formula (11) (with a reverse direction battery feed current I r flowing and V₃ > V₄), the following stands: V₃ - V₄ = V BEP1 + V BEN1 -V BEN2 + V R - V BEP2 Substituting into formula (13) the above V BEN1 ≒ V BEN2 and V BEP1 ≒ V BEP2 , the following is obtained: V₃ - V₄ = V R From this, it is understood that the voltage V R across the detection resistor 311 appears as it is across the second monitor resistor 646 (V₃ - V₄) without any interposition of V BE . As mentioned above, according to the present invention, it is possible to detect the forward direction and reverse direction battery feed current at a high precision without use of any operational amplifiers. Finally, an explanation will be made of an overcurrent protection circuit, particularly an overcurrent protection circuit provided in a bidirectional battery feed circuit in a line circuit of a switching system. The battery feed circuit naturally must be protected against the overcurrent flowing in the line A and the line B. Therefore, a function must be given of suppressing overcurrent while satisfying the previously mentioned conditions [1], [2], and [3]. Here, the overcurrent is produced at the time of ground fault accidents and false connection to a battery. In particular, there are often ground fault accidents at the line A side connected to the power source of -48V. Figure 33 is a view showing key portions of a known battery feed circuit. This shows in more detail, for example, the main battery feed part 5 of Fig. 7. Therefore, the operation is substantially the same as the previously described operation. To facilitate the explanation, however, we will start from Fig. 33. The circuit is comprised by the line A side operational amplifier OP a , the transistor Q a , and the resistors R a1 and R a2 and the line B side operational amplifier OP b , the transistor Q b , and the resistors R b1 and R b2 . The operation on the line A side and line B side are the same. Looking at the line A side, when the control current i a is passed, a voltage of R a2 x i a is generated across the resistor R a2 . This voltage appears as it is across the resistor R a1 by an imaginary short-circuit of the operational amplifier OP a . As a result, a DC battery feed current I a [=(R a2 x i a )/R a1 ] flows to the subscriber telephone TEL. The overcurrent protection is realized by making the voltage appearing across the resistor R a1 smaller at the time of detection of an overcurrent. For this, the voltage appearing across the resistor R a2 is made smaller. For example, a shunt resistor is provided in advance at the resistor R a2 and, when an overcurrent is detected, is connected in parallel to the R a2 . Alternatively, the control current i a is adjusted to make i a smaller. Note that the circuit of Fig. 33 is disclosed in, for example, Japanese Unexamined Patent Publication (Kokai) No. 57-42263. However, the battery feed disclosed in Japanese Unexamined Patent Publication (Kokai) No. 57-42263 satisfies the previously mentioned conditions [1], [2], and [3], but is unable to cope with the afore-mentioned recent trend of demands for preventing distortion in the voice signals even when the in-phase signal current becomes larger than the DC battery feed current. The reason why is that the battery feed disclosed in the publication is comprised of a PNP transistor with a collector connected to line B and an NPN transistor with a collector connected to the line A. The former PNP transistor can only send out DC current from its collector, and the latter NPN transistor can only absorb DC current from its collector, so reverse feed of DC current is not possible. This problem may be eliminated by the use of a bidirectional battery feed circuit, preferably by the use of the bidirectional battery feed circuit shown in Fig. 2. When providing an overcurrent protection circuit for the battery feed circuit of Fig. 2, there is the problem that the overcurrent protection function explained in Fig. 33 cannot be applied as is. The reason for this is that the type of battery feed circuit shown in Fig. 2 and the type of battery feed circuit shown in Fig. 33 are completely different. The final aspect of the present invention provides an overcurrent protection circuit suitable for a bidirectional battery feed circuit constructed using transconductance amplifiers. Figure 34 is a view showing the principal and construction of an overcurrent protection circuit according to the present invention. The circuit being protected from overcurrent, i.e., the battery feed circuit, is as shown in Fig. 2. The overcurrent protection circuit is shown by reference numeral 700 on the line A side. Note that a circuit the same as the overcurrent protection circuit 700 may be provided at a similar portion of the line B side to further increase the overcurrent protection effect. However, in principle, it is sufficient to provide one at just the line A side to obtain an overcurrent protection effect against ground faults. Figure 35 is a view of the principle and structure showing an overcurrent protection circuit provided at the line B side as well. Portions corresponding to those in Fig. 34 are given the same reference numerals or symbols. The overcurrent protection circuit 700 in Fig. 34 is comprised of voltage generating means 720 and 730 and switch means 740 and 750. As illustrated, these are connected in series as pairs of 720 and 740 and 730 and 750 between the noninverting input 17 and inverting input 18 of the operational amplifier. The voltage generating means 720 and 730 generate a predetermined set voltage. On the other hand, the switch means 740 and 750 are selectively controlled to be on and off by the overcurrent detection means 220. The voltage generating means 720 and 730 are provided with double polarities so as, as mentioned before, to enable handling of cases where the in-phase signal current becomes larger than the DC battery feed current. Further, this is to enable handling of reverse battery feed for high functions (reversing I a and I b ). Figure 36 is a view for explaining the principle of the operation of the present invention. By applying a predetermined constant voltage +V L , the DC battery feed current +I a is restricted. Alternatively, by applying a predetermined constant voltage -V L , -I a is restricted. When +I a is restricted, the switch means 740 is turned on and when the -I a is restricted, the switch means 750 is turned on. Which to turn on it determined by the overcurrent detection means 220. The overcurrent detection means 220 is shown in Fig. 15. The magnitude I a of +I a or -I a is found by: I a = R₁₂/R₁₁ x V L /R₁₅ The resistances are set so that R₁₂ = R₁₃ and R₁₁ = R₁₄. R₁₁, R₁₂... are resistance values of the resistors 11, 12, ... (shown in Fig. 2), and V L is the magnitude of the predetermined constant voltage (afore-mentioned +V L , -V L ). Transconductance amplifiers are inherently provided with functions for converting voltage to current. If the voltage V L is suppressed to a certain constant value, the current I a corresponding to V L is suppressed to a certain constant value and an overcurrent suppression function is exhibited. Figure 37 is a circuit diagram showing an embodiment of the overcurrent protection circuit and a battery feed circuit according to the present invention. As mentioned before, it is not necessary to have an overcurrent protection circuit at both the line A and line B side, but this embodiment shows an overcurrent protection circuit 700′ at the line B side as well (Fig. 35). These circuits 700 and 700′ are the same in circuit construction, so the explanation will be made for just the circuit 700. The voltage generating means (720 and 730 in Fig. 34 and Fig. 35) forming the overcurrent protection circuit 700 is comprised of a diode bridge 800. The switch means (740 and 750 in Fig. 34 and Fig. 35) forming the same circuit 700 is comprised of a single transistor switch 900. At the sides of the diode bridge 800 are provided diodes, the forward voltage drop of the diodes (and the on voltage of the transistor 900) forms a predetermined constant voltage (V L in Fig. 36). Therefore, if V L is large, the diodes at the sides are connected in series in multiple stages. By the introduction of the diode bridge 800, the following two advantages are obtained: The first advantage is tha the two switch means 740 and 750 of Fig. 34 are replaced by a single transistor switch 900. This is based on the full-wave rectifying action of the diode bridge. The second advantage is that whether the direction of the overcurrent I a is forward or reverse, it can be handled by the single diode bridge 800. The diode bridge performs automatic inversion of the current direction. As a result, the switch means can be the single transistor switch 900, i.e., ther is no need to provide a separate forward direction switch means 740 and reverse direction switch means 750 as shown in Fig. 34 and Fig. 35). Further, looking at this from the standpoint of the overcurrent detection means 640, no matter what the direction of the flow of the overcurrent, of an overcurrent flows, it is sufficient to pass the detection current i o , so the trouble of differentiating and outputting on-off control currents to the switch means 740 and the switch means 750 as in Fig. 34 and Fig. 35 is eliminated. If the detection current i o flows and the overcurrent I a flows, the major portion of I a passes through the resistors 12 and 11 to flow to the bias input terminal B1 and through the resistor 15 to flow to the operational amplifier 16, but the current which passes through the resistors 15, 13 and 14 passes through the diode 801, the transistor switch 900 (which is turned on by the i o ), and the diode 802 to reach B1. Here, the sum of the forward direction voltage drop (2V F ) of the diodes 801 and 802 and the collector-emitter saturation voltage (V CEsat ) of the transistor switch 900 forms the previously mentioned constant voltage V L . Conversely, if the detection current i o flows and the overcurrent I a flows, the major portion of I a passes through the resistors 12 and 11 to flow to the battery feed terminal OUT1 and flows out from the operational amplifier 16, but the current which passes through the resistors 14 and 13 passes from B1 through diode 804, the transistor switch 900 (which is turned on by the i o ), and the diode 803 to reach OUT1. Here, the sum of the forward direction voltage drop (2V F ) of th diodes 804 and 803 and the collector-emitter saturation voltage (V CEsat ) of the transistor switch 900 forms the previously mentioned constant voltage V L . Therefore, The battery feed current I a or I a restricted by V L flows and it is possible to protect the battery feed circuit from overcurrent. As mentioned above, according to the present invention, an overcurrent protection circuit is realized which is suitable for a bidirectional battery feed circuit of a type where pairs of transconductance amplifiers are coupled by capacitors. The main battery feed part and the group of its peripheral circuits explained above do not exist independently, but in practice are assembled into a single unit to form a single battery feed circuit. Figure 38A and Fig. 38B are views showing an example of a battery feed circuit system according to the present invention. Note that the same reference numerals or symbols are given for elements equivalent to those mentioned earlier. In Fig. 38A and 38B, 1-A and 1-B correspond to parts of the battery feed circuit portion shown in Fig. 2, 2 corresponds to part of the bias circuit portion shown in Fig. 11, 3-A, 3-B, 3-C, and 3-D correspond to parts of the battery feed current control circuit shown in Fig. 17, 4-A and 4-B correspond to the battery feed current supervising circuit shown in Fig. 22, 5-A and 5-B correspond to the battery feed current detection circuit shown in Fig. 31, 6-A and 6-B correspond to part of the overcurrent protection circuit shown in Fig. 37. In Fig. 38A and Fig. 38B, CM means a current mirror circuit, and SEL a selector. Note that 3-B, 4-B, and 5-B are common portions in a single battery feed circuit, as are 3-A, 4-A, and 5-A. As explained in detail above, according to the present invention, a bidirectional battery feed circuit is realized by a structure suited for practical application.

Claims: A battery feed system for feeding a DC battery current through first and second subscriber lines (41, 41) to a subscriber telephone (TEL) comprising: a first transconductance amplifier means (10), having a first bias input terminal (B1), a first control input terminal (CNT1) and a first battery feed terminal (OUT1) and including a first operational amplifier (16) operatively connectable to said first subscriber line (41) and operatively connected to said first battery feed terminal (OUT1), for providing the DC current to one (41) of said frist and second subscriber lines (41, 41); a second transconductance amplifier means (20) having a second bias input terminal (B2), a second control input terminal (CNT2) and a second battery feed terminal (OUT2) and including a second operational amplifier (26) operatively connectable to said second subscriber line (42) and operatively connected to said second battery feed terminal (OUT2), for providing the DC current to the remaining one (42) of said first and second subscriber lines (41, 42); a low impedance forming means (30) for providing a low impedance for in-phase signals applied to said first and second transconductance amplifier means (10, 20) and for providing a high impedance for differential signals applied to said first and second transconductance amplifier means (10, 20) connected to said first and second control input terminals (CNT1, CNT2); a bias circuit means (80) for supplying a bias voltage (VB1, VB2) to said first and second bias input terminals (B1, B2); and a battery feed current control means (200; 210, 220, 230) for controlling a battery feed current (I) generated by said bias voltage (VB1, VB2) of said bias cicuit means (80); characterized in that said low impedance forming means (30) is a capacitor means (30), operatively connected between said first and second control input terminals (CNT1, CNT2); and said battery feed current control means (200; 210, 220, 230) comprises: a battery feed current detection means (210) for detecting a magnitude of said battery feed current (I); an overcurrent detection means (220) for detecting an overcurrent component (ΔI = I - I th ) when said magnitude of said detected battery feed current (I) rises above a predetermined set value (I th ); and a bias voltage control means (230) for controlling said bias voltage (VB1, VB2) generated by said bias circuit means (80) in accordance with said detected overcurrent component (ΔI = I - I th ) such an increase of said overcurrent component (ΔI = I - I th ) effects a decrease of said bias voltage (VB1, VB2) in order to reduce the increase of battery feed current (I). A battery feed system according to claim 1, wherein said bias circuit means (80) comprises: a bias voltage generating means (81, 81′) having an output with high output impedance for generating said bias voltage (VB1, VB2); a low output impedance buffer means (83, 83′) for receiving the bias voltage (VB1, VB2) and for supplying the bias voltage (VB1, VB2) to said first and second bias input terminals (B1, B2); and an AC bypass capacitor means (84, 84′) operatively connected between the outputs of said bias voltage generating means (81, 81′) and earth potential (E) for filtering the outputs of said bias voltage generating means (81, 81′). A battery feed system according to claim 2, wherein said bias voltage generating means (81, 81′) comprises: a first current source (91) operatively connectable to a power source (V BB ) and operatively connected to the output of said bias voltage generating means (81, 81′); a first resistor (92) having an end operatively connected to a reference voltage source (V BR ) and another end operatively connectable to said one output of said bias voltage generating means (81, 81′); a second current source (91′) operatively connectable to said power source (V BB ) and operatively connected to another output of said bias voltage generating means (81, 81′); and a second resistor (91′) having an end operatively connected to said reference voltage source (V BR ) and another end operatively connectable to said another output of said bias voltage generating means (81, 81′). A battery feed system according to claim 3, wherein said buffer means (83, 83′) comprises: a first buffer means (83) for buffering a signal supplied to said first bias imput terminal (B1); and a second buffer means (83′) for buffering a signal supplied to said second bias input terminal (B2); and said AC bypass capacitor menas (84, 84′) comprises: a first and second AC bypass capacitors (84, 84′) respectively connected between a corresponding output of said bias voltage generating means (82, 82′) and earth potential (E). A battery feed system according to claim 4, wherein said first and second current sources (91, 91′) comprise: a reference current generating means (102) for producing a reference current approximately equal in value to a bias current (I B ) to be passed through a respective of said first and second resistors (92, 92′); a current switching means (103) for selectively switching said reference current; and first and second current mirror circuits (101, 101′) each having an output operatively connected to a corresponding input of said first and second buffer means (83, 83′) and each having an input operatively connected to a corresponding output (a, b) of said current switching means (103). A battery feed system according to claim 5, wherein said reference current generating means (102) comprises: a third current mirror circuit (111) operatively connected to said current switching means (103) through one terminal; a third resistor (113) connected in series between said third current mirror circuit (111) and said power source potential (V BB ); and a transistor (112) connected in series with said third resistor (113) having a base operatively connectable to said earth potential (E). A battery feed system according to claim 5 or 6, wherein said current switching means (103) comprises a common emitted current switch which includes a pair of transistors (114, 115) operatively connected between said reference current generating means (102) and a corresponding of said first and second current mirror circuits (101, 101′). A battery feed system according to claim 4, wherein said first and second buffer means (83, 83′) respectively comprise first and second voltage follower circuits (94, 94′). A battery feed system according to one of the preceeding claims, wherein said battey feed current detection means (210) includes: a means (211 - 215) for providing a detection current (i) proportional to said battery feed current (I); and wherein said overcurrent detection means (220) comprises: a first current mirror circuit (222) operatively connected to receive at a first terminal (224) said detection current (i) and to provide at a second terminal (223) a current proportional to said detection current (i); and a constant current means (221) operatively connected to said second terminal (223), for providing a constant current (i th ) proportional to said predetermined set value (I th ) of said battery feed current (I) and wherein a difference current (Δi = i - i th ) between said detection current (i) and said constant current (i th ) is proportional to said overcurrent component (ΔI = I - I th ). A battery feed system according to claim 9, wherein said bias voltage control means (230) comprises: a second current mirror circuit (231) operatively connected to receive at a first terminal (234) said difference current (Δi) and to receive a second terminal (232) a control current (i c ) equal in value to said difference current (Δi), and operatively connected to receive at a third terminal said control current (i c ); and a third current mirror circuit (235) operatively connected to provide at a first terminal (237) a current to said third terminal (233) of said second current mirror (231) and to provide at a second terminal (236) a current equal in value to said current (i c ) provided to said third terminal (233), wherein said second terminal (236) of said third current mirror circuit (235) and said second terminal (232) of said second current mirror circuit (231) draw said control current (i c ) from the bias current (I B ) of said bias circuit means (80) so as to correspondingly change the bias voltage (VB1, VB2) outputted therefrom. A battery feed system according to claim 10, wherein said bias voltage control means (230) further comprises: first and second transistors (138, 139) as a common emitter current switch, wherein said first transistor (139) is operatively connected to said first terminal (237) of said third current mirror circuit (235) and to said third terminal (233) of-said second current mirror circuit (231); and said second transistor (138) is operatively connected to said third terminal (233) of said second current mirror circuit (231) and to said bias circuit means (80) so as to provide thereto said control current (i c ) received at said second termial (232) of said second current mirror circuit (232). A battery feed circuit according to claim 10, wherein said bias voltage control means (230) further comprises: another first and second transistors (136, 137) as another common emitter current switch, wherein said first and second transistors (136, 137) are operatively connected in common to said second termial (236) of said third current mirror cicuit (235) and respectively to said bias circuit means (80); and a means (N/R) for selecting the bias voltage to be either of a normal or reverse bias voltage (VB1, VB2) and accordingly controlling said first and second transistors (136, 137). A battery feed system according to one of the preceeding claims, further comprising a battery feed current supervising circuit (300) including: first and second battery feed current detection means (320, 320′) for respectively detecting battery feed currents through said subscriber lines (41, 42); and a detection current processing means (330) for processing and supervising said detected battery feed currents. A battery feed system according to claim 13, wherein said detection current processing means (330) is operatively connected to receive four detection currents (i fa , i ra , i fb , i rb ), a forward direction detection current and a reverse direction current on each of said subscriber lines (41, 42); and wherein said detection current processing means (330) comprises: an addition - subtraction means (CM1 - CM7) for adding and subtracting predetermined combinations of said four detection currents (i fa , i ra , i fb , i rb ) and using results of said adding and subtracting for supervising. A battery feed system according to claim 14, wherein said addition - subtraction means (CM1 - CM7) comprises: a plurality of current mirror circuits (CM1 - CM7) so as to add a predetermined two (i fa , i ra ) of said four detection currents (i fa , i ra , i fb , i rb ) and to subtract another predetermined two (i fb , i rb ) of said four detection currents (i fa , i ra , i fb , i rb ). A battery feed system according to claim 15, wherein said detection current processing means (330) further comprises: first and second absolute value means (510, 520) operatively connected to said addition - subtraction means (CM1 - CM7) for providing signals corresponding to an absolute value of said signals added and subtracted, respectively, and for performing said supervision by detecting when the output of said absolute value exceeds a predetermined set value. A battery feed system according to claim 13, wherein each of said first and second battery feed current detection means (320, 320′) comprises: a detection resistor (311) operativly connectable to receive a corresponding battery feed current (I); a voltage/current converting resistor (321); first and second operational amplifiers (322, 323) having their non-inverting inputs operativey connected across said detection resistor (311); first and second emitter follower circuits (324, 327) having emitter-coupled NPN transistors and PNP transistors (325, 326; 328, 329) and having their bases operatively connected to the outputs of said first and second operational amplifiers (322, 323), respectively; wherein said coupled-emitters are operarively connected to the inverting inputs of said first and second operational amplifiers (322, 323) and across said voltage/current converting resistor (321), respectively. A battery feed system according to claim 1, wherein said battery feed current detection means (210) comprises: a detection resistor (311, 311′) operatively connectable to receive said battery feed current of said respective subscriber line (41, 42); a first detection means (641) for detecting a forward direction battery feed current (I f ); and a second detection means (642) for detecting a reverse direction battery feed current (I r ). A battery feed system according to claim 18, wherein said first detection means (641) comprises: a first NPN transistor (412), and a first PNP transistor (411); and wherein said second detection means (642) comprises a second NPN transistor (422), and a second PNP transistor (421). A battery feed system according to claim 19, wherein said first NPN transistor (412) and second NPN transistor (422) are operatively connected to receive a forward direction detection current (i f ) and a reverse direction detection current (ir), respectively. A battery feed system according to claim 20, wherein said first detection means (641) includes a first cancelling means for cancelling the base-emitter voltage of said first NPN and PNP transistors (411, 412), said first cancelling means comprising: a third NPN transistor (431) operatively connected as a diode in series to said first PNP transistor (411); a third PNP transistor (432) operativey connected as a diode in series to said first NPN transistor (412); and a first current source means (361) for supplying a bias current which supplies a base current to said first NPN transistor (412) and generates a base-emitter voltage of said third PNP and NPN transistors (431, 432); and wherein said second detection means (642) includes a second cancelling means for cancelling the base-emitter voltage of said second NPN and PNP transistors (421, 422), said second cancelling means comprising: a fourth NPN transistor (441) connected as a diode, a fourth PNP transistor (442) connected as a diode and in series with said fourth NPN transistor (441), and a second current source means (362) for supplying a bias current which supplies a base current to said second NPN transistor (422) and generates a base-emitter voltage of said fourth NPN and PNP transistors (441, 442); wherein said series-connected fourth NPN and PNP transistores (431, 442) are operatively connected between the base of said second NPN transistor (422) and one terminal of said detection resistor (311) and the bases of said first and second PNP transisotrs (411, 421) are connected to the other terminal of said detecting resistor (311). A battery feed system accoring to claim 18, wherein said first detection means (641) comprises: an NPN transistor (421), and a PNP transistor (411), a first cancelling means (361, 431, 432) for cancelling the base-emitter voltages of said NPN and PNP transistor (411, 412), a first monitor resistor (645) for monitoring a voltage in response to a forward direction battery feed current (I f ) being passed and for applying said current (I f ) to said first resistor (645) so as to produce a forward direction detection current (i f ); and wherein said second detection means comprises: an NPN transistor (422), a PNP transistor (421), a second cancelling means (362, 441, 442) for cancelling the base-emitter voltage of said NPN and PNP transistors (421, 422), a second monitor resistor (646) for monitoring a voltage in response to a reverse direction battery feed current (I r ) being passed and for applying said current (I r ) to said second monitor resistor (646) so as to produce a reverse direction detection current (i r ). A battery feed system according to claim 1, further comprising: an overcurrent detecting means (220) for detecting excessive battery feed current; an overcurrent protection means (700) for protecting against excessive battery feed current by said overcurrent detection means (220), said overcurrent protection means (700) comprising: first and second voltage generating means (720, 730), operatively connected across inputs of said first operational amplifier (16), for generating a predetermined constant voltage (+/- V L ); and first and second switch means (740, 750) for selectively connecting said first and second voltage generating means (720, 730) to said first operational amplifier (16) based upon said detection by said overcurrent detection means (220). A battery feed system according to claim 23, wherein said first and second voltage generating means (720, 730) each comprise a diode bridge (800), wherein said first and second switch means (740, 750) each comprise a transistor switch (900) operatively connected to pass a current rectified by corresponding ones of said diode bridge (800), and said transistor switch (900) is switched based upon said detection by said overcurrent detection means (220). A battery feed system according to claim 23, wherein said overcurrent protection means (700) comprises: third and fourth voltage generating means (720′, 730′), operatively connected across inputs of said second operation amplifier (26), for generating the predetermined constant voltage (+/- V L ); and third and fourth switch means (740′, 750′) for selectively connecting said third and fourth voltage generating means (720′, 730′) to said second operational amplifier (26) based upon said detection by said overcurrent detection means (220). A battery feed system according to claim 25, wherein said third and fourth voltage generating means (729′, 730′), each comprise a diode bridge (800′), wherein said third and fourth switch means (740′, 750′) each comprise a transistor switch (900′) operatively connected to pass a current rectified by corresponding ones of said diode bridge (800′), and said transistor switch (900′) is switched based upon said detection said overcurrent detection means (220). A battery feed system according to claim 1, wherein each of said first and second transconductance amplifier means (10, 20) comprises: (1) a first resistor (11, 21) operatively connected between the corresponding bias input termials and an input of the corresponding operational amplifier; (2) a second resistor (12, 22) operatively connected between the battery feed terminal and the input of the corresponding operational amlifier; (3) a third resistor (13, 23) operatively connected between the output of an another input of the corresponding operational amplifier; (4) a fourth resistor (14, 24) operatively connected between the corresponding control input terminal and another input of the corresponding operational amplifier; and (5) a fifth resistor (15, 25) operatively connected between the corresponding battery feed terminal and the output.

Inventors: KINOSHITA KAZUMI, TAKATO KENJI, TOJO TOSHIRO, YAMAMOTO YUZO, KINOSHITA, KAZUMI, TAKATO, KENJI, TOJO, TOSHIRO, YAMAMOTO, YUZO
Applicants: FUJITSU LTD, FUJITSU LIMITED
Application year: 1988
Main classification: H04M19
IPC codes: H04M19