A display device comprising an electron emission element

Abstract: A multi type electron emission element comprises a plurality of electrodes formed on a deposition surface of an insulating material and each having a conical portion of a single crystal, an insulating layer formed on the deposition surface and having openings respectively centered on the conical portions, and a deriving electrodes, part of which is formed near at least the conical portions, the deriving electrode being formed on the insulating layer.

Description: BACKGROUND OF THE INVENTION: Field of the Invention The present invention relates to a display device comprising electron emission elements. Related Background Art Hot cathode electron emission elements have been frequently utilized as conventional electron emission sources. Electron emission utilizing hot electrodes has large energy loss by heating, and preheating is undesirably required. In order to solve these problems, several cold cathode electron emission elements have been proposed. Of these elements, a field effect electron emission element for emitting electrons by electric field emission is available. A typical example of the field effect electron emission element is shown in a partial sectional view of Fig. 1, and steps in manufacturing this electron emission element are shown in Figs. 2A to 2D. As shown in Fig. 1, each conical electrode 19 made of Mo (molybdenum) or the like is formed on a substrate 21 of, e.g., silicon. An insulating layer 20 such as an SiO 2 layer has an opening. This opening is centered on the electrode 19. A deriving electrode 18, part of which is formed near the conical portion is formed on the insulating layer 20. In the electron emission element having the above structure, a voltage is applied between the substrate 21 and the electrode 18, electrons are emitted from the conical portion having a high field intensity. The above electron emission element is manufactured by the following steps. As shown in Fig. 2A, the insulating layer 20 as an oxide film (e.g., an SiO 2 film) is formed on the substrate 21 of, e.g., Si. The Mo layer 18 is formed by electron beam epitaxy, and an electron beam resist such as PMMA (polymethyl methacrylate) is spin-coated on the Mo layer 18. The resist film is irradiated with an electron beam and is patterned. The resist is partially removed with isopropyl alcohol or the like, thereby selectively etching the Mo layer 18 and hence forming a first opening 22. After the electron beam resist is completely removed, hydrofluoric acid is used to etch the insulating layer 20, thereby forming a second opening 23. As shown in Fig. 2B, the substrate 21 is slightly inclined by an angle  while being rotated about an axis X, and an Al layer 24 is formed on the upper surface of the Mo layer 18. In this case, aluminum is also deposited on the side surface of the Mo layer 18. By controlling the deposition rate of aluminum, the diameter of the first opening 22 can be arbitrarily reduced. As shown in Fig. 2C, Mo is vertically deposited by electron beam epitaxy on the substrate 21. In this case, molybdenum is deposited on the Al layer 24 and the substrate 21 as well as the side surface of the Al layer 24. The diameter of the first opening 22 can be gradually reduced when deposition of the Mo layer progresses. When the diameter of the first opening 22 is reduced, the deposition area of the metal (Mo) deposited on the substrate 21 is reduced. Therefore, a substantially conical electrode 19 is formed on the substrate 21. Finally, as shown in Fig. 2D, by removing the deposited Mo layer 25 and the deposited Al layer 24, an electron emission element having the substantially conical electrode 19 is prepared. A display device comprising a plurality of electron emission elements is known from EP-A-0 172 089. The electron emission elements include electrodes which have a conical portion as described above and a deriving electrode formed on an insulating layer which has openings for receiving the conical portions. The electrons emitted from the conical portions of the emission electrodes energize a phosphor unit which is formed to oppose the electrodes with their conical portions so that images are formed. Further, US-A-3970 887 discloses an electron emission device employing electron emission electrodes consisting of a single crystal material. SUMMARY OF THE INVENTION It is an object of the invention to provide an improved display device the electron emission electrodes of which have a high dielectric breakdown voltage. The object of the invention is achieved by a display device according to claim 1. An essential feature of the display device according to the invention is that the electron emission electrodes are formed on a deposition surface of an amorphous substrate and that the conical portions of the electron emission electrodes consist of a single crystal. Further objects, features, and advantages of the invention will be discussed in detail with regard to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS: Fig. 1 is a schematic partial sectional view showing part of a conventional field effect electron emission element; Figs. 2A to 2D are schematic partial sectional views for explaining the steps in manufacturing the element shown in Fig. 1; Figs. 4A to 4D are schematic partial sectional views for explaining the steps in manufacturing a multi type electron emission element suitable for a display device according to the present invention; Figs. 5A to 5C are partial perspective views of Figs. 4A, 4C, 4D, respectively; Figs. 6A to 6E are schematic partial sectional views for explaining the steps in manufacturing another multi type electron emission element; Fig. 7 is a schematic perspective view of a matrix type multi electron emission element; Fig. 8A and 8B are views for explaining selective deposition; Fig. 9 is a graph showing changes in nucleation densities of the deposition surfaces of SiO 2 and silicon nitride as a function of time; Figs. 10A to 10C are views for explaining a method of forming a single crystal; Figs. 11A and 11B are perspective views of the substrate in Figs. 10A and 10C, respectively; Figs. 12A to 12C are views for explaining another method of forming a single crystal; Fig. 13 is a graph showing the relationship between the flow rate ratio of NH 3 to SiH 4 and the composition ratio of Si to N in the formed silicon nitride film; Fig. 14 is a graph showing the Si/N composition ratio and the nucleation density; Fig. 15 is a graph showing the relationship between the Si ion doping amount and the nucleation density; Figs. 16 A to 16D are schematic partial sectional views for explaining the steps in manufacturing another electron emission element suitable for a display device according to the present invention; Fig. 17 is a schematic partial sectional view for explaining the step in manufacturing an element emission element according Figs. 16A to 16D; Fig. 18 is a schematic perspective view for explaining wiring of the electron emission element described above; Figs. 19A to 19F are schematic partial sectional views for explaining the steps in manufacturing another electron emission element; Fig. 25 is a schematic view of a first electron emission device; Fig. 26 is an equivalent circuit diagram of the first electron emission device; Fig. 27 is a schematic view of a second electron emission device; Fig. 28 is a timing chart for explaining the second electron emission device; Fig. 29 is a schematic view of a third electron emission device; Fig. 30 is an equivalent circuit diagram of the third electron emission device in electron emission operation; Fig. 31 is a timing chart for explaining the operation of the third electron emission device; Figs. 32A to 32F are schematic partial view sectional views for explaining the steps in manufacturing another electron emission element suitable for a display device according to the present invention; Fig. 33 is a schematic partial sectional view for explaining the step in manufacturing an electron emission element according to Figs. 32A to 32F; Fig. 34 is a schematic partial sectional view for explaining another electron emission element; Fig. 35 is a schematic perspective view for explaining wiring of the electron emission element described above; Fig. 36A is a schematic view showing another electron emission element; Fig. 36B is a partial enlarged view of the a portion in Fig. 36A; Fig. 37 is a timing chart for explaining the operation of this electron emission element; Fig. 38 is an equivalent circuit diagram of an element emission portion in a multi type electron emission element suitable for a display device according to the present invention; Figs. 39A and 39B are timing charts showing voltages applied to electrodes arranged in a matrix form; Fig. 40 is a schematic sectional view of a display device according to the present invention; Figs. 41A is a partial enlarged view of an electron emission portion in Fig. 40A; Fig. 41B is a plan view of the electron emission portion in Fig. 40A; Fig. 42 is a view showing assembly of the electron emission portion; Fig. 43 is a schematic view for explaining the electron emission control operation by a matrix of wiring lines and deriving electrodes; Fig. 44 is a view for explaining the operation of the display device shown in Fig. 40; Fig. 45 is a schematic partial sectional view of another display device according to the present invention; Fig. 46 is an energy band diagram of a metal-semiconductor junction; Fig. 47 is an energy band diagram on the semiconductor surface; Fig. 48 is a schematic partial sectional view for explaining another electron emission element suitable for a display device according to the present invention; Fig. 49 is a view for explaining the operation of the element shown in Fig. 48; Fig. 50A is an energy band diagram in an equilibrium state of the element in Fig. 48; and Fig. 50B is an energy band diagram when the element in Fig. 48 is operated. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS: Preferred embodiments of the present invention will be described with reference to the accompanying drawings. Figs. 4A to 4D are schematic partial sectional views for explaining the steps in manufacturing a multi type electron emission element suitable for a display device according to the present invention, and Figs. 5A to 5C are partial perspective views of Figs. 4A, 4C, 4D, respectively. As shown in Fig. 4A, an oxide substrate 201 made of an insulating material such as SiO 2 is patterned by photoetching or the like to form a plurality of cylindrical recesses 202 each having a diameter of about 0.5 to 100 µ. As shown in Fig. 4A, grooves are formed between the recesses 202 of the respective arrays. As shown in Fig. 4B, nucleus formation bases 203 such as Si or Si 3 N 4 are respectively formed on bottom surfaces (deposition surfaces) of the recesses 202. As shown in Fig. 4C, single nuclei formed in the nucleus formation bases 203 are used as centers to grow a single crystal such as Mo, W, or Si, thereby forming conical electrodes 204 each having a desired size and a conical portion. As shown in Fig. 5B, the electrodes 204 aligned in-each array are commonly connected by a wiring layer 206 formed throughout the corresponding groove formed in the oxide substrate 201. A method of forming the single crystal will be described in detail later. In this embodiment, the bottom surfaces of the recesses 202 of the oxide substrate 201 serve as deposition surfaces, and the side wall portions of the recesses 202 are made of an insulating member. The insulating member may be formed on the deposition surface in another process by using the same material as that of the deposition surface or a material different therefrom. Finally, as shown in Figs. 4D and 5C, a metal plate 205 serving as a deriving electrode having a plurality of openings formed by etching is adhered to the oxide substrate 201 such that the centers of the openings are respectively aligned with the centers of the recesses 202, thereby preparing a multi type electron emission element. In the multi type electron emission element described above shown in Fig. 5C, a voltage is applied between the metal plate 205 and the desired wiring layer 206 such that the potential of the metal plate 205 is higher than that of the desired wiring layer 206, a strong electric field is generated by the conical portions of the corresponding electrodes 204, and electrons are emitted therefrom. In the multi type electron emission element described above, if the metal plate 205 is divided into strips to constitute a matrix with the electrode wiring layers 206, a matrix type multi electron emission element can be prepared. Fig. 7 is a schematic perspective view of a matrix type multi electron emission element. Referring to Fig. 7, metal plates 205 1 to 205 4 and electrode wiring layers 206 1 to 206 4 are arranged in a matrix form. If a voltage is applied between desired ones of the metal plates 205 1 to 205 4 and desired ones of electrode wiring layers 206 1 to 206 4 , a point, line, or surface electron emission source can be obtained. In the method of manufacturing the above element, the electrode 204 with a conical portion is formed on the oxide substrate 201. However, an oxide film 201a may be formed on an underlying substrate to prepare the same electron emission element as described above. In the above embodiment, the metal plate 205 as the deriving electrode is adhered to the substrate. However, the deriving electrode may be formed by depositing a metal layer such as an Mo layer. Figs. 6A to 6E are schematic partial sectional views for explaining the steps in manufacturing another multi electron emission element. As shown in Fig. 6A, an oxide film 201a such as an SiO 2 film is formed on an underlying substrate 207 such as an Si substrate, and recesses 202 are formed in the oxide film 201a in the same manner as in Fig. 4A. As shown in Figs. 6B and 6C, nucleus formation bases 203 and electrodes 204 having conical portions and a desired size are formed in the same manner as in Figs. 4A and 4B. As shown in Fig. 6D, a resist is filled in the recesses 202 and a metal layer 208 such as an Mo. layer is formed on the resist and oxide substrate 201. A photoresist 209 is coated on the metal layer 208 and exposed and etched to form openings 210. Finally, as shown in Fig. 6E, the metal layer 208 are etched to form openings and the resist pattern is removed to prepare a multi electron emission element. If the metal layer 208 is divided into strips to constitute a matrix electrode structure in the same manner as in the metal plates 205 1 to 205 4 shown in Fig. 7, a matrix type multi electron emission element can be prepared. In the above embodiment, the electrode 204 with the conical portion is determined by the conditions such as the oxide substrate 201 (oxide film 201a) constituting the deposition surface, the nucleus formation bases 203, the material of the deposition material, and the deposition conditions. The size of the conical portion can be determined independently of the sizes of the recesses 202 and the openings 210, thereby preventing dimensional variations caused by variations in sizes of the recesses 202 and the openings 210. The position of the electrode 204 with a conical portion can be determined by the position of the corresponding nucleus formation base 203. The electrode 204 can be formed at a desired position with high precision. As a result, a plurality of electron emission ports of the multi type electron emission element can be formed at fine pitches with uniformity. Since the single crystal can be easily formed using the nucleus formation base as its center (to be described later), wide material selection can be allowed without considering crystallinity or the like between the deposition material and the deposition surface. For example, unlike in the conventional case wherein it is difficult to grow a single crystal on an insulating substrate such as an amorphous substrate, a single crystal can be formed on the insulating substrate, and a large element area can be assured. Therefore, the method of the present invention is very effective to prepare a multi type electron emission element. In addition, the shapes of the conical portions as electron emission portions can be uniformly and sharply formed to obtain a high field intensity. Therefore, variations in initial operating voltages can be prevented, and electron emission efficiency can be further improved. As shown in Fig. 6, the deposition surface can be formed on an underlying substrate of a desired material. For example, a deposition surface is formed on a substrate having high heat dissipation efficiency, and circuit reliability can be greatly improved. It is easy to prepare an electrode with a conical portion by using a single crystal according to the above method. The conductivity of the electrode with the conical portion can be improved. The electron emission portion as the conical portion can be matched with the crystal surface of a predetermined structure to improve a Schottky effect and electron emission efficiency. At the same time, a plurality of electrodes each with a conical portion are formed on the deposition surface of the insulating material, thereby improving electrical insulation. Therefore, crosstalk between the adjacent electrodes can be prevented. A method of growing a single crystal on a deposition surface will be described below. A method of selectively depositing a film on the deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substrate by utilizing differences of factors between the materials which determine nucleus formation. These factors are surface energy, deposition coefficients, elimination coefficients, surface diffusion rates, and the like, all of which are associated with thin-film formation process. Figs. 8A and 8B are views for explaining selective deposition. As shown in Fig. 8A, a thin film 212 having different factors than those of a substrate 211 is formed thereon at a desired portion. When deposition of a thin film made of a proper material under proper deposition conditions is performed, a thin film 213 is formed on only the thin film 212, as shown in Fig. 8B, but the thin film 213 is not formed on other regions of the substrate 212. By utilizing this phenomenon, the thin film 213 can be grown in a self-aligned manner. Unlike the conventional process, photolithography techniques using a resist can be omitted. Materials subjected to selective deposition are SiO 2 for forming the substrate 211, Si, GaAs, or silicon nitride for forming the thin film 212, and Si, W, GaAs, or InP for forming the thin film 213. Fig. 9 is a graph showing changes in nucleation densities and the deposition areas of SiO 2 and silicon nitride as a function of time. As is apparent from the above graph, the nucleation density on SiO 2 is saturated below 10 3 cm -2 immediately after the deposition and is kept substantially unchanged after 20 minutes. However, the nucleation density on silicon nitride (Si 3 N 4 ) is temporarily saturated at ∼4 x 10 5 cm -2 and is not changed within 10 minutes. However, subsequently, the nucleation density is rapidly increased. In this measurement, the films were deposited by CVD at a pressure of 175 Torr (23275 Pa) and a temperature of 1,000°C in an atmosphere where SiCl 4 gas is diluted with H 2 gas. In addition, SiH 4 , SiH 2 Cl 2 , SiHCl 3 , or SiF 4 gas may be used as a reaction gas, and the pressure, temperature and the like are controlled to obtain the same effect as described above. The above deposition may be performed by vacuum deposition. In this case, a nucleus is formed on SiO 2 without problems. By adding HCl gas into the reaction gas, nucleus formation on SiO 2 is further suppressed to prevent formation of SiO 2 on Si. The above phenomenon depends on differences between the adsorption coefficients, the elimination coefficients, and the surface diffusion coefficients of Si and those of SiO 2 and silicon nitride. Si atoms are reacted with SiO 2 to produce silicon monoxide (SiO) having a high vapor pressure. SiO 2 itself is etched by silicon monoxide. Such an etching phenomenon does not occur on silicon nitride (T. Yonehara, S. Yoshioka, and S. Miyazawa, Journal of Applied Physics 53, 6839, 1982). If materials for the deposition surface are selected as SiO 2 and silicon nitride, and a deposition material is selected as silicon, a sufficiently high nucleation density difference can be obtained as shown in the graph in Fig. 9. SiO 2 is preferable as a material for the deposition surface. However, even if SiO x is used, a satisfactory nucleation density difference can be obtained. The materials are not limited to the ones described above. The sufficient nucleation density difference is 10 2 times or more the nucleation density, as is apparent from Fig. 9. Materials to be exemplified later can be used to satisfactorily form deposition films. Another method of obtaining the above nucleation density difference is to form a region containing an excessive amount of Si and N by locally ion-implanting Si and N on SiO 2 . By utilizing the above selective deposition method and preparing a sufficiently fine heterogeneous material pattern having a sufficiently high nucleation density than that of the material of the deposition surface so as to allow growth of only the single nucleus, a single crystal can be grown at a position where the fine heterogeneous material pattern is present. Since selective growth of the single crystal is determined by electron state on the deposition surface, and in particular a dangling bond state, a material having a low nucleation density (e.g., SiO 2 ) need not be a bulk material but may be formed on any material or a substrate, thereby constituting only the deposition surface. Figs. 10A to 10C are views showing a method of forming a single crystal, and Figs. 11A and 11B are perspective views of the substate of Figs. 10A and 10B, respectively. As shown in Figs. 10A and 11A, a thin film 215 having a low nucleation density so as to allow selective deposition is formed on a substrate 214, and a heterogeneous material having a high nucleation density is formed on the thin film 215. These films are patterned by photolithography to obtain a pattern 216 of the heterogeneous material. The size and the crystal structure of the substrate 214 can be arbitrarily determined. A substrate having active elements can also be used. The heterogeneous material pattern 216 includes a denatured area containing an excess amount of Si and N and obtained by ion-implanting Si and N in the thin film 215. A single nucleus of a thin film material is formed in only the heterogeneous material pattern 216 according to proper deposition conditions. That is, the heterogeneous material pattern 216 must be a micropattern enough to allow growth of only a single nucleus. The size of the heterogeneous material pattern 216 is less than several microns depending on the types of materials. The nucleus keeps the single crystal structure and grown as a single crystal island 217. In order to obtain the island 217, conditions for inhibiting nucleus formation on the thin film 215 must be determined. The single crystal island 217 is further grown with the heterogeneous material pattern 216 as its center while maintaining the single crystal structure. As shown in Fig. 11C, a single crystal cone 217a is obtained. Since the thin film 215 as a material of the deposition surface is formed on the substrate 214, the substrate 214 as a support target can be formed by any material. In addition, even if the substrate 214 has active elements and the like, a single crystal can be easily formed thereon. In the above embodiment, the material for the deposition surface is selected as the thin film 215. However, a substrate made of a material having a low nucleation density which allows selective deposition may be used without modification, and a single crystal may be formed in the manner described above. Figs. 12A to 12C are views for explaining another method of forming a single crystal. As shown in Figs. 12A to 12C, a heterogeneous material 216 is micropatterned on a substrate 215 of a material having a sufficient low nucleation density and allowing selective deposition. A single crystal can be formed in the same manner as in Fig. 9. (Example) A practical method of forming a single crystal will be described below. SiO 2 is used as a deposition surface material for a thin film 215. In this case, a quartz substrate may be used. Alternatively, an SiO 2 film may be formed on a substrate of a metal, a semiconductor, a magnetic material, a piezoelectric material, or an insulating material by sputtering, CVD, or vacuum deposition. SiO 2 is preferable as the deposition surface material. However, SiO x may be used wherein x is variable. A silicon nitride layer (Si 3 N 4 layer) or a polycrystalline silicon layer as a heterogeneous material is deposited on the SiO 2 layer 215 by low-pressure epitaxy. The silicon nitride layer or the polycrystalline silicon layer is patterned with a conventional photolithographic technique or a photolithographic technique using an X-ray, an electron beam, or an ion beam, thereby obtaining a heterogeneous material micropattern 216 having a size of several microns or less and preferably ∼1 µm or less. Subsequently, by using a gas mixture of HCl, H 2 , and SiH 2 Cl 2 , SiCl 4 , SiHCl 3 , SiF 4 , or SiH 4 , Si is selectively grown on the substrate 214. In this case, the substrate temperature is 700 to 1,100°C and a pressure is about 100 Torr (13300Pa). Within a period between 10 minutes and 20 minutes, single crystal Si 217 is grown by using as its center the heterogeneous material micropattern 216 of silicon nitride or polycrystalline silicon. By setting optimal growth conditions, the size of the Si 217 is increased from the size of the heterogeneous material to several tens of microns of single crystal 217a. (Composition of Silicon Nitride) In order to obtain a sufficiently high nucleation density difference between the deposition surface material and the heterogeneous material as described above, the material is not limited to Si 3 N 4 . The composition of silicon nitride may be changed. In plasma CVD wherein SiH 4 gas and NH 3 gases are decomposed in an RF plasma to obtain a silicon nitride film at a low temperature, a flow rate ratio of NH 3 gas to SiH 4 gas is changed to greatly change the composition ratio of Si to N contained in a silicon nitride film to be deposited. Fig. 13 is a graph showing the relationship between the Si/N composition and the NH 3 /SiH 4 flow rate ratio. The deposition conditions for the graph in Fig. 13 are given as follows: an RF output was 175 W; a substrate temperature was 380°C; and an SiH 4 gas flow rate was fixed to be 300 cc/min while the NH 3 gas flow rate was changed. When the NH 3 /SiH 4 gas flow rate ratio is changed to 4 to 10, the Si/N composition in the silicon nitride film is changed to 1.1 to 0.58 according to the Auger electrospectoscopy. The composition of the silicon nitride film formed under the conditions that SiH 2 Cl 2 and NH 3 gases were used at a low pressure of 0.3 Torr (39,9 Pa) at a temperature of about 800°C was similar to Si 3 N 4 (S1/N = 0.75) as a stoichiometrical ratio. A silicon nitride film prepared by heating Si in ammonia or N 2 at a temperature of about 1,200°C (thermal nitrification) has a composition similar to a stoichiometical ratio since film formation is performed in a thermal equilibrium state. When the Si nucleus is grown by using silicon nitride as a deposition surface material having a higher nucleation density than that of Si, a nucleation density difference occurs due to its composition ratio. Fig. 14 is a graph showing the relationship between the Si/N composition ratio and the nucleation density. As is apparent from this graph, when the composition of the silicon nitride film is changed, the Si nucleation density grown on the silicon nitride film is greatly changed. In this case, the nucleation conditions are given such that the pressure of SiCl 4 gas reduced to 175 Torr (23275 Pa) and SiCl 4 is reacted with H 2 at 1,000°C, thereby producing Si. The phenomenon in which the nucleation density is changed by the silicon nitride composition greatly influences the pattern size of silicon nitride as the heterogeneous material pattern which is formed to be sufficiently fine enough to allow growth of the single nucleus. That is, unless silicon nitride having a composition for a high nucleation density is finely patterned, a single nucleus cannot be formed. The nucleation density and the optimal silicon nitride pattern size for selecting the single nucleus must be selected. In deposition conditions for obtaining a nucleation density of, e.g., 10 5 cm -2 , selection of a single nucleus is allowed by the silicon nitride size of 4 m or less. (Formation of Heterogeneous Material by Ion Implantation) In order to obtain a large nucleation difference for Si, N, P, B, F, Ar, He, C, As, Ga, Ge ions or the like can be locally implanted on the surface of the layer of SiO 2 as a deposition surface material having a low nucleation density to form a denatured region on the SiO 2 deposition surface. This denatured region may serve as a deposition surface material having a high nucleation density. For example, a resist is formed on the surface of the SiO 2 layer and is exposed with a desired mask pattern, developed and dissolved to partially expose the surface of the SiO 2 layer. Subsequently, SiF 4 gas is used as a source gas, and Si ions are implanted in SiO 2 at a dose of 1 x 10 16 to 1 x 10 18 cm -2 and an acceleration voltage of 10 keV. The projection range is 114 Å (114 x 10 -8 m) The concentration of Si reaches ∼10 22 cm -3 on the surface of the SiO 2 layer. The region doped with ions is amorphous. In order to form a denatured region, ions may be implanted using a resist as a mask. By using focused ion beam technique, a focused Si ion beam may impinge on the surface of the SiO 2 layer without using a resist mask. After ion implantation is completed, the resist pattern is removed to form a denatured region containing an excessive amount of Si on the SiO 2 surface. Si is then epitaxially grown on the SiO 2 deposition surface having the denatured region. Fig. 15 is a graph showing the injection quantity of Si ions and the nucleation density. As is apparent from Fig. 15, when the injection quantity of Si + is increased, the nucleation density is increased accordingly. By forming the sufficiently fine denatured region, the denatured region can serve as a heterogeneous material for allowing growth of a single nucleus. As a result, a single crystal can be grown as described above. Formation of sufficiently fine denatured region, i.e., micropatterning, can be achieved by a resist pattern or a focused ion beam spot. (Si Deposition Methods Excluding CVD) In addition to CVD for forming a single crystal by utilized Si nucleus formation, another method can be utilized wherein Si is evaporated by an electron gun in a vacuum (< 10 -6 Torr) and (1,33 x 10 -4 Pa) is deposited on a heated substrate). In particular, MBE (Molecular Beam Epitaxy) for depositing Si in a high vacuum (< 10 -9 Torr), (1,33 x 10 -7 Pa) the Si ion beam is reacted with SiO 2 at a substrate temperature of 900°C, and no Si nucleus is formed on SiO 2 (T. Yonehara, S. Yoshioka, and S. Miyazawa, Journal of Applied Physics, 53, 10, P. 6839, 1983). Single Si nuclei were perfectly and selectively formed in silicon nitride micropatterns sprinkled on SiO 2 by utilizing the above phenomenon and single crystal Si was grown. In this case, the deposition conditions were as follows: the vacuum was 10 -8 Torr (1,33 x 10 -6 Pa) or less; the Si beam intensity was 9.7 x 10 14 atoms/cm 2 ·sec; and the substrate temperature was 900°C to 1,000°C. In this case, a reactive product as SiO having a very high vapor pressure is formed by a reaction SiO 2 + Si → 2SiO↑. SiO 2 itself is etched by Si by this evaporation. However, no etching phenomenon occurs on silicon nitride, and nucleus formation and deposition occur. In addition to silicon nitride as a deposition surface material having a high nucleation density, a tantalum oxide (Ta 2 O 5 ), a silicon nitride-oxide (SiON), or the like can be used to obtain the same effect as described above. These materials can be finely formed and serve as the heterogeneous material, so that a single crystal can be grown using the heterogeneous material as its center. (Growth of Tungsten Single Crystal) Tungsten is used in place of Si. Tungsten nucleus formation does not occur on SiO 2 , but tungsten can be deposited as a polycrystalline film on Si, WSi 2 , PtSi, Al, or the like. However, according to the method of forming a single crystal according to the present invention, the single crystal can be easily grown. More specifically, Si, WSi 2 , PtSi, or Al is deposited on glass, quartz or a thermal oxide film containing SiO 2 as a major constituent in a vacuum and is patterned by photolithography to obtain a micropattern having a size of several microns or less. Subsequently, the resultant structure is placed in a reaction furnace heated to 250 to 500°C. A gas mixture of WF 6 and H 2 gases is supplied to the furnace at a pressure of about 0.1 to 10 Torr (13,3 to 1330 Pa). in this case, the flow rate of WF 6 is 75 cc/min, and the flow rate of H 2 is 10 cc/min. Tungsten is produced as represented by reaction formula WF 6 + 3H 2 → W + 6HF. In this case, tungsten is rarely reacted with SiO 2 , and strong bonds are not formed therebetween. Therefore, nucleus formation does not occur and film deposition does not occur accordingly. A tungsten nucleus is formed on Si, WSi 2 , PtSi, or Al. In this case, only single tungsten nuclei are formed. Such a nucleus continuously grows on SiO 2 in the lateral direction to a single crystal region because tungsten is not subjected to nucleus growth and cannot be grown as a polycrystal. Combinations of the deposition surface materials, the heterogeneous materials, and deposition materials are not limited to the ones exemplified in the above embodiments. Any combination can be employed if a sufficient high nucleation density difference can be obtained. A single crystal can be formed in the case of a compound semiconductor such as GaAs or InP subjected to selective deposition according to the present invention. In the multi type electron emission element according to the embodiment as described above in detail, the plurality of electrodes each having a conical portion formed on the deposition surface is made of a single crystal. The conductivity of the electrode with the conical portion can be improved. The electron emission portion as the conical portion is matched with the crystal surface having a predetermined structure, thereby improving the Schottky effect and electron emission efficiency. In addition, the plurality of electrodes each with a conical portion are formed on the deposition surface consisting of an insulating material, so that electrical insulation can be improved and crosstalk between the adjacent electrodes can be prevented. According to the method of manufacturing the above multi type electron emission element, the single crystal can be deposited on a material which cannot conventionally allow the growth of the single crystal thereon due to crystallinity or the like. The selection range of the single crystal materials can be greatly widened, and a large area of a single crystal can be obtained. In addition, the shapes of the electron emission portions can be uniform and sharp to obtain a higher field intensity. Variations in initial operating voltage can be prevented, and electron emission efficiency can be further improved. Furthermore, the position of the electrode with the conical portion can be determined by the position of the fine heterogeneous material pattern and can be arbitrarily determined. In addition, the shapes of the plurality of electrodes each with the conical portion can be determined by the conditions such as the materials of the constituting targets and deposition conditions. The size of the electrode with the conical portion can be easily controlled, and the dimensional variations can be minimized. As a result, the plurality of electron emission ports of the multi type electron emission elements can be formed at fine pitches with uniformity. According to the method described above, the deposition surface can be formed on an underlying substrate of a desired material, thus improving element reliability. Figs. 16A to 16D are schematic partial sectional views for explaining the steps in manufacturing another electron emission element suitable for a display device according to the present invention. As shown in Fig. 16A, an oxide substrate 301 of SiO 2 as an amorphous insulating material is photoetched to form a recess 302. As shown in Fig. 16B, a single crystal of Mo, W, Si, or the like is grown with a single nucleus as its center in a nucleus formation base 303 of Si, Si 3 N 4 or the like on the bottom surface (i.e., a deposition surface) of the recess 302. An electrode 4 with a conical portion having a desired size is formed. A method of forming the single crystal will be described later. In this embodiment, the bottom surface of the recess 302 of the oxide substrate 301 serves as the deposition surface, and the side wall surface of the recess 302 serves as an insulating member. The insulating member may be formed on the deposition surface in a separate process using the same material as that of the deposition surface or a material different therefrom. As shown in Fig. 16C, a resist is filled in the recess 302, and a metal layer 305 such as an Mo layer is formed on the resist and the oxide substrate 1. In addition, a photoresist 306 is applied to the metal layer 305, exposed with light and etched in this photoetching process, thereby forming an opening 307. Finally, as shown in Fig. 16D, an opening is formed in the metal layer 305 by etching, and a metal layer 305 serving as a deriving electrode is formed. The resist pattern is removed, and an electron emission element is thus prepared. In the above method, the electrode with the conical portion is formed on the oxide substrate 301. However, an oxide film 301a may be formed on an underlying substrate to prepare an electron emission element in the same manner as described above. Fig. 17 is a schematic partial sectional view of an electron emission element according to Figs. 16A to 16D. As shown in Fig. 17, an oxide film 301a is formed on an underlying substrate 308 of Si, and a recess 302 is formed in the oxide film 301a, thereby forming the electron emission element on the Si underlying substrate. The subsequent steps are the same as those in Figs. 16B to 16D, and a description thereof will be omitted. Fig. 18 is a schematic perspective view for explaining a wiring pattern of the electron emission element shown in Figs. 16A to 17. As shown in Fig. 18, in the electron emission elements manufactured in Figs. 16A to 17, a connection terminal is formed such that an electrode 304 with a conical portion is formed on the bottom surface of the recess 302, a groove is formed in the oxide substrate 301 or an oxide film 301a, and a wiring layer 309 is formed in the groove. The connecting terminal is connected to the electrode 304 with the conical portion. A voltage is applied from a power source 310 to a junction between the wiring layer 309 and the metal layer 305 to cause electron emission. In the above embodiment, the metal layer such as an Mo layer is formed as the deriving electrode during the process. However, a metal plate having an opening may be adhered to the oxide substrate 301 or the oxide film 301a after the groove is formed. In the method described in Figs. 16A to 17, the electrode 304 with the conical portion is determined by conditions such as the oxide substrate 301 (oxide film 301a) constituting the deposition surface, the nucleus formation base 303, the material of the deposit, and the deposition conditions. The electrode with the conical portion can be formed independently of the sizes of the recess 302 and the opening 307. Therefore, variations in electrode size can be prevented. The position of the electrode 304 with the conical portion is determined by the position of the nucleus formation base 303. Therefore, the electrode 304 with the conical portion can be formed at a desired position. Since the single crystal can be formed with the nucleus formation base 303 as its center (the details will be described later), wide material selection is allowed without considering crystallinity or the like between the deposition material and the deposition surface. For example, unlike in the conventional case, a single crystal can be formed on an amorphous substrate, and perfect electrical insulation is also allowed. A large area of a single crystal is assured. In addition, the shapes of the electron emission portions as the conical portions can be made uniform and sharp to obtain a higher field intensity. Variations in initial operating voltage can be prevented and electron emission efficiency can be further improved. As shown in Fig. 17, the deposition surface can be formed on an underlying substrate of a desired material. For example, the deposition surface is formed on a substrate having high heat dissipation efficiency, and therefore, element reliability can be improved. According to the above method, the electrode with the conical portion can be easily manufactured, and the conductivity of the electrode with the conical portion can be improved. The electron emission portion as the conical portion can be matched with the crystal surface having a predetermined structure. The Schottky effect and electron emission efficiency can be improved. A method of growing a single crystal on a deposition surface will be described below. Selective deposition for selectively depositing a film on the deposition surface will be described. Selective deposition is a method of selectively forming a thin film on a substrate by utilizing differences of factors of the materials. These factors includes surface energy, deposition coefficients, elimination coefficients, surface diffusion rates and determine formation of the nucleus during the thin film formation process. As described above, according to the above electron emission element, the electrode having a conical portion thereon and formed on the deposition surface can consists of a single crystal. The conductivity of the electrode with the conical portion can be improved. In addition, the electron emission portion as a conical portion can be matched with the crystal surface having a predetermined structure, thereby improving the Schottky effect and electron emission efficiency. According to the method of manufacturing the above electron emission element, unlike in the conventional case, a single crystal can be formed on a substrate which does not allow formation of the single crystal thereon due to crystallinity or the like. Therefore, the single crystal material selection range can be widened. By properly selecting the material of the substrate, the single crystal can be perfectly electrically insulated from the substrate. A large area of the single crystal can be assured. The shapes of the electron emission portions can be made uniform and sharp to obtain a higher field intensity. Therefore, variations in initial operating voltage can be suppressed, and electron emission efficiency can be further improved. Since the position of the electrode with the conical portion can be determined by the position of the fine heterogeneous material pattern, the electrode with the conical portion can be precisely formed at a desired position. The shape of the electrode with the conical portion can be determined by conditions such as the materials of the constituting targets and the deposition conditions. The size of the electrode can be easily controlled. Variations in size of the electrode can be prevented. As a result, the plurality of electron emission ports of the multi type electron emission element can be formed at fine pitches with uniformity. According to the above method, the deposition surface can be formed on an underlying substrate of a desired material. For example, the deposition surface is formed on a substrate having high heat dissipation efficiency, and element reliability can be improved. Figs. 19A to 19F are schematic partial sectional views for explaining the steps in manufacturing another electron emission element. As shown in Fig. 19A, an insulating layer 402 consisting of an insulating material such as SiO 2 is formed on a substrate 401 consisting of a conductive material (including a semiconductor) such as Si. As shown in Fig. 19B, a recess 403 is formed in the insulating layer 402 by photoetching. As shown in Fig. 19C, an opening 404 is formed in the bottom surface of the recess 403 in the insulating layer 402. As shown in Fig. 19D, a nucleus formation base 405 as a heterogeneous material such as Si or Si 3 N 4 is micropatterned on the bottom surface of the recess 403. As shown in Fig. 19E, a single crystal 406 such as an Mo, W, or Si single crystal is formed with a single nucleus as its center formed in the nucleus formation base 405. A method of forming this single crystal will be described later. When the single crystal 406 is grown, a single crystal 407 is simultaneously grown on the exposed portion of the conductive material in the opening 404. As shown in Fig. 19F, the single crystal 406 is grown and connected to the single crystal 407, thereby forming an electrode 408 with a conical portion 408. Deposition coefficients of single crystal atoms of the material of the single crystal 406, the material of the nucleus formation base 405, the conductive material of the substrate 401, and the material of the insulating layer 402 are given as K, L, M, and N. The following condition must be satisfied: K > L > M > N If the conductive material of the substrate 1 is a material satisfying condition L > M, the single crystal 406 is grown with the nucleus formation base 405, and then the single crystal 407 is grown from the opening 407. The single crystal 406 can be grown with a conical shape unique to the single crystal. After the single crystal 406 is connected to the single crystal 407, the crystal 406 is continuously grown while keeping the shape of the conical portion. However, if condition K > M > L > N is given and the conductive material of the substrate 401 is a material satisfying condition L < M, the single crystal in the opening 404 is grown first. Therefore, it is difficult to form the single crystal 406 with a conical portion while being centered on the single nucleus formed in the nucleus formation base 405. In this case, growth of the single crystal 407 must be suppressed. For example, the opening 404 must be a hole having a very small diameter and the thickness of the insulating layer is increased, thereby reducing the number of single crystal atoms reaching the surface of the exposed conductive material. Alternatively, the opening 404 must be filled with a resist until the single crystal 406 reaches a predetermined size. Thereafter, the single crystal 407 is grown. Finally, an electrode layer such as an Mo layer is formed on the insulating layer 402 and is patterned by photolithography to form an opening 410 above the conical portion of the electrode 408, and an electrode layer 409 serving as a deriving electrode is formed, thereby preparing an electron emission element. The crystal formed on the conductive material surface is exemplified by a single crystal. However, this embodiment is also applicable to a polycrystal. In the electron emission element manufactured by the method described above, the electrode with the conical portion is connected to the conductive material surface through the opening formed in the insulating layer. Therefore, a wiring density and hence a packing density of the element can be increased, and element reliability can be improved. According to the above method in this embodiment as described above, the electrode with the conical portion is connected to the conductive material surface as follows. That is, the crystal is deposited on the exposed conductive material surface in the opening formed in the insulating layer. The electrode with the conical portion of the crystal grown centered on the single nucleus formed in the fine heterogeneous material pattern connected to the conductive material surface. In this case, additional connection process can be omitted and a simple electrical connection can be facilitated. The sufficiently fine heterogeneous material pattern having a sufficiently higher nucleation density than that of the material of the insulating layer and allowing the growth of only the single nucleus is formed on the insulating layer. The single crystal is grown centered on the single nucleus grown in the heterogeneous material pattern. According to this method, the electrode 408 with the conical portion is determined by conditions such as the insulating layer 402 constituting the deposition surface, the nucleus formation base 405, the material of the deposit, and the deposition conditions. The electrode 408 can be formed in dependently of the sizes of the recess 403 and the opening 410 of the electrode layer 409. Variations in sizes of the electrodes 408 can be suppressed. The position of the electrode 408 with the conical portion can be determined by the position of the nucleation formation base 405, and therefore the position of the electrode 408 can be arbitrarily determined with high precision. As a result, the plurality of electron emission ports of the multi type electron emission element can be determined at fine pitches with uniformity. The shapes of the electron emission portions as conical portions can be made uniform and sharp to obtain a high field intensity. Variations in initial operating voltage can be suppressed and electron emission efficiency can be further improved. Unlike in the conventional case, the single crystal can be deposited on the insulating layer which conventionally does not allow formation of the single crystal thereon due to crystallinity or the like. Electrical insulation can be greatly increased, and a large area of the single crystal can be assured. The conductivity of the electrode with the conical portion can be improved, and the electron emission portion as the conical portion can be matched with the crystal surface having a predetermined structure, thereby improving the Schottky effect and electron emission efficiency. A method of forming the above single crystal on the insulating layer will be describe below. Selective deposition for selectively forming a film on a deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substrate by utilizing differences of factors of the materials. These factors are surface energy, deposition coefficients, elimination coefficients, and surface diffusion rates and determine nucleus formation during thin film formation. According to the electron emission element as described above, the electrode with the conical portion is electrically connected to the conductive material surface through the opening formed in the insulating layer. The electrode with the conical portion can be electrically insulated from the substrate, and a wiring density and connection reliability can be improved. According to the method of manufacturing the electron emission element described above, the electrode with the single crystal conical portion can be electrically connected to the conductive material surface in the following manner. The single crystal is deposited on the exposed conductive material surface in the opening formed in the insulating layer and is grown centered with the single nucleus formed in the fine heterogeneous material pattern. Therefore, the electrical connected between the electrode with the conical portion and the conductive material surface can be performed by an easy process. Fig. 25 is a schematic view of a first electron emission device employable in a display device according to the present invention. As shown in Fig. 25, a nucleus formation base 603 of Si or Si 3 N 4 is formed on a deposition surface of an oxide substrate 602 consisting of an amorphous material such as SiO 2 . A single crystal of Mo, W, Si, or the like is grown centered on a single nucleus formed in the nucleus formation base 603, thereby forming an electron emission electrode 604 having a desired size and a conical portion. In general, it is difficult to form a single crystal on an insulating material, but such formation can be achieved by a method to be described later. A voltage application electrode 601 is formed on the lower surface of the oxide substrate 602 consisting of an insulating material. The voltage application electrode 601 opposes an electron emission electrode 604. A deriving electrode 607 which increases the field intensity at the conical portion and serves as a charge supply means is formed above the electron emission electrode 604. The deriving electrode 607 is formed such that an insulating layer having an opening corresponding to the electron emission region of the electron emission electrode 604 is formed on the oxide substrate 602, and a metal plate having a corresponding opening is formed on the insulating layer. A target 605 to be irradiated with electrons emitted from the emission electrode is arranged above the deriving electrode 607. A power source 505 is connected between the target 605 and the voltage application electrode 601 such that the potential of the target 605 is higher than that of the electrode 601. The ON/OFF operation of the power source 606 is controlled by a switching means 611. Power sources 608 and 609 are connected in parallel with each other between the deriving electrode 607 and the voltage application electrode 601. The power source 608 is operated such that the potential of the deriving electrode 607 is higher than that of the voltage application electrode 601. The power source 609 is operated such that the potential of the voltage application electrode 601 is higher than that of the deriving electrode 607. The power sources 608 and 609 are switched by a switching means 610. The operation of the electron emission device having the above arrangement will be described below. The power source 606 is operated by the switching means 611 to apply a voltage between the target 605 and the voltage application electrode 601. The power source 608 is operated by the switching means 610 to apply a voltage between the deriving electrode 607 and the voltage application electrode 601. Potential differences are generated between the electron emission electrode 604, the target 605, and the deriving electrode 607. Electrons are emitted from the electron emission electrode 604 (electron emission operation). In this case, the electron emission portion is mainly a conical portion of the electron emission electrode 604 which has a high field intensity. By this electron emission, positive charge is accumulated on the electron emission electrode 604, and the field intensity is weakened. The amount of electron emission is reduced, and electrons are finally no longer emitted. The power source 609 is operated by the switching means 610 to apply a reverse voltage (discharge voltage) between the deriving electrode 607 and the voltage application electrode 601. At the same time, the voltage having applied to the target 605 is set to 0 V by the switching means 611. Electrons are emitted from the deriving electrode 607 to the electron emission electrode 604. The emitted electrons are coupled to the positive charge accumulated on the electron emission electrode 604 to cancel the positive charge. Therefore, the electron emission electrode 604 can emit electrons (discharge operation). The above electron emission and discharge operations are repeated to emit electrons. Fig. 26 is an equivalent circuit diagram of the device shown in Fig. 25 during the electron emission operation. Referring to Fig. 26, a resistor 612 is equivalent to the target 605 and the electron emission electrode 604. A resistor 613 is equivalent to the electron emission electrode 604. A capacitor 614 is equivalent to the electron emission electrode 604, the oxide substrate 602, and the voltage application electrode 601. A power source 615 is equivalent to the power source 606 for applying a voltage between the voltage application electrode 601 and the target 605 and the power source 608 for applying a voltage between the voltage application electrode 601 and the deriving electrode 607. The magnitude of the voltage applied between the target 605 and the electron emission electrode 604 with respect to the application voltage from the power source 615 during the electron emission operation will be calculated. A resistance RA of the resistor 612 is given as follows if the emission current density is 10 A/cm 2 , a voltage from the power source 615 is 100 V, and a cross section of the electron emission portion of the electron emission electrode 604 is given as 1 µm 2 : RA = 10 9 (Ω) A resistance RS of the resistor 613 is given as follows if a resistivity ρ is 10 Ω·cm, the average length ℓ. of the electron emission electrode 604 is 1 µm, and the cross section S is given as 1 µm 2 : RS = ρ·ℓ/S = 10 4 (Ω) If a capacitance C of the capacitor 614 is given as follows under the conditions that the thickness t of the oxide substrate 602 is 1,000 Å (1 x 10 -7 m) the electrode area S is 10 µm 2 , and the specific dielectric constant εs is 4: C = εs·ε 0 ·S/d = 3.6 x 10 -18 If the operating frequency is given as 1,000 MHz, an impedance (Z) by the capacitor 614 is given as follows: Z = 5 x 10 7 (Ω) Under these conditions, a ratio of the voltage applied between the target 605 and the electron emission electrode 604 to the voltage supplied from the power source 615 is given as follows: |Z|/|RA + RS + Z| < 1/10 The voltage applied between the target 605 and the electron emission electrode 604, that is, the voltage for allowing electron emission is not so greatly influenced by the capacitor. In the first electron emission device as described above, electrons are supplied from the charge supply means and can be emitted from the electron emission electrode arranged independently of the insulating surface. Therefore, the dielectric breakdown voltage can be greatly increased. The wiring layer need not be formed along the surface of the insulating material or wiring by forming a though hole in the insulating layer on the conductive substrate need not be performed. Therefore, the packing density can be greatly increased. The electron emission electrode 604 need not consist of a single crystal but can consist of a polycrystal if a conical portion can be formed. However, if the electron emission electrode 604 consists of a single crystal, the electrode can have a conical shape unique to the single crystal. The shape of the electron emission portion is made uniform and sharp. Any tapering technique need not be utilized, and a higher field intensity can be obtained with uniformity. Variations in initial operating voltage can be prevented and electron emission efficiency can be improved. In the above method, a micropatterned heterogeneous material region having a sufficiently higher nucleation density than that of the material of the deposition surface and allowing the growth of only the single nucleus is formed on the deposition surface, and the crystal is grown centered on the single nucleus grown in the heterogeneous material region. This method can also be applied to other methods when a polycrystal or the like is used. When the method of growing the crystal centered on the single nucleus grown in the heterogeneous material region is used, the following advantages can be obtained. (1) The shape of the electron emission electrode with a conical portion is determined by the conditions such as the deposition surface, the heterogeneous material, the material of the deposit, and the deposition conditions. The size of the conical portion can be easily controlled. Therefore, a conical portion having a desired size can be formed, and variations in its size can be prevented. (2) Since the position of the electron emission electrode with a conical portion can be determined by the position of the heterogeneous material region, the electrode can be formed at a desired position with high precision. In addition, the plurality of electron emission ports in the multi type electron emission element can be uniformly set at fine pitches. (3) Unlike in the conventional case, a single crystal can be formed on an amorphous insulating substrate, and an electron emission element having a high dielectric breakdown voltage can be provided. (4) The element can be formed by the conventional semiconductor fabrication process and can be highly integrated by the easy process. A second electron emission device using the above method will be described below. Fig. 27 is a schematic view of the second electron emission device. The same reference numerals as in Fig. 25 denote the same parts in Fig. 27. As shown in Fig. 27, nucleus formation bases 603 1 to 603 3 of Si, Si 3 N 4 or the like are formed on a deposition surface of an oxide substrate 602 consisting of an amorphous material such as SiO 2 . Single crystal regions of Mo, W, Si, or the like are grown centered on single nuclei formed in the nucleus formation bases 603 1 to 603 3 . Electron emission electrodes 604 1 to 604 3 each having a desired size and a conical portion are formed (the number of electron emission electrodes is not limited to three). Voltage application electrodes 601 1 to 601 3 are formed on the lower surface of the oxide substrate 602 consisting of an insulating material so as to oppose electron emission electrode 604 1 to 604 3 . A deriving electrode 607 which increases the field intensity of the conical portions and serves as the charge supply means is formed above the electron emission electrodes 604 1 to 604 3 . A target 605 to be irradiated with electrons emitted from the electron emission electrodes 604 1 to 604 3 is arranged above the deriving electrode 607. A power source 606 is arranged between the voltage application electrodes 601 1 to 601 3 through a switching means 611, a pulse generator 616, and a selective switching device 617 such that the potential of the target 605 is higher than that of the voltage application electrodes. A voltage applied to the target 605 is controlled by the switching means 611. Power sources 608 and 609 are connected in parallel to each other between the deriving electrode 607 and the voltage application electrodes 601 1 to 601 3 through a switching means 610, a pulse generator 616, and a selective switching device 617. The power source 609 is operated such that the potential of the voltage application electrodes 601 1 to 601 3 is lower than that of the deriving electrode 607. The power source 609 is operated such that the potential of the voltage application electrodes 601 1 to 601 3 is higher than that of the deriving electrode 607. The power sources 608 and 609 are switched by the switching means 610. During the electron emission operation, the selective switching device 617 sequentially switches the pulses generated by the pulse generator and applies the pulses sequentially to the voltage application electrodes 601 1 to 601 3 . During the discharge operation, a discharge voltage is applied from a reset unit 620 to the voltage application electrodes 601 1 to 601 3 commonly connected thereto. The reset unit 620 commonly connects the voltage application electrodes 601 1 to 601 3 during the discharge operation. During the electron emission operation, the reset unit 620 applies a prebias voltage to the OFF voltage application electrodes, thereby preventing crosstalk between the adjacent electrodes. A controller 618 supplies control signals to the reset unit 620, the selective switching device 617, the pulse generator 616, the switching means 611, and the switching means 610 and controls switching timings and pulse generation timings. The control signals output from the controller 618 are controlled by control information stored in a memory 619. The operation of the second electron emission device having the above arrangement will be described below. Fig. 28 is a timing chart for explaining the operation of the second electron discharge device. Referring to Fig. 28, an interval t2 is an electron emission operation interval. During this interval, the power source 606 is operated by the switching means 611 to apply a voltage V3 to the target 605. The voltage application electrodes 601 1 to 601 3 are sequentially set at 0 V by the selective switching device 617. As described above, the reset unit 620 applies a prebias voltage V4 to an OFF voltage application electrodes. The power source 608 is operated by the switching means 610 to apply a voltage V1 to the deriving electrode 607. Assume that a selected electrode, i.e., the ON electrode is the voltage application electrode 601 1 . The voltage V3 is applied between the voltage application electrode 601 1 and the target 605, and the voltage V1 is applied between the deriving electrode 607 and the electrode 601 1 . An electric field which is sufficiently high to perform electron emission is applied between the electron emission electrode 604 1 and the target 605. Electrons are then emitted from the electron emission electrode 604 1 . In this case, the prebias voltage V4 is applied to the nonselected or OFF voltage application electrodes 601 2 and 601 3 . A sufficiently high electric field enough to perform electron emission is not applied between the electron emission electrode 604 1 and the target 5, no electron emission is performed. In this manner, the voltages are sequentially applied to the voltage application electrodes 601 2 and 601 3 , and electrons are sequentially emitted from the electron emission electrodes 604 2 and 604 3 . If there are three or more voltage application electrodes i.e, the voltage application electrodes 601n where n > 3, the voltage pulses having the same waveform can be sequentially applied to the subsequent voltage application electrodes after the electrode 601 3 during the interval t2. As described above, when positive charges are accumulated on the electron emission electrodes 604 1 to 604 3 by electron emission. During the corresponding electron emission operation intervals, the field intensities are weakened and the amounts of electron emission are decreased. As a result, the electrons are no longer emitted. An interval t1 is a discharge operation interval. The voltage application electrodes 601 1 to 601 3 are commonly connected and set at 0 V by the reset unit 620. The power source 609 is operated by the selective switching device 617 and the switching means 610 to apply a voltage -V2 to the deriving electrode 607. The target 605 is set at 0 V by the switching means 611. In this case, a high voltage V2 is applied between the deriving electrode 607 and the voltage application electrodes 601 1 to 601 3 such that the potential of the electrodes 601 1 to 601 3 is higher than the electrode 607. A sufficiently high electric field for electron emission is applied between the electron emission electrodes 604 1 to 604 3 and the deriving electrode 607. Electrons are emitted from the deriving electrode 607. The emitted electrons are coupled to the positive charges accumulated on the electron emission electrodes 604 1 to 604 3 to cancel the positive charges. Therefore, the electron emission electrodes 604 1 to 604 3 can emit the electrons. Thereafter, electron emission is performed in the next electron emission operation interval. In this manner, the electron emission operation and the discharge operation are alternately repeated to emit electrons. In the second electron emission device as described above in detail, the electrons are supplied from the charge supply means to allow emission of electrons from the electron emission electrodes independently formed on the insulating surface. Therefore, the dielectric breakdown voltage can be greatly increased. Electrical insulation between the adjacent electrodes can be greatly improved. Therefore, this embodiment is suitable for an electron emission device having a plurality of electron emission sources uniformly formed at fine pitches. In addition, a wiring layer need not be formed along the insulating material surface, or a through hole need not be formed in an insulating layer formed on a conductive substrate, thereby greatly increasing the packing density of the device. In the above embodiment, the voltage pulses are time-divisionally applied to the plurality of voltage application electrodes to apply voltage components between the voltage application electrodes and the target, thereby performing electron emission operations. In this case, the circuit arrangement having a larger number of electron emission electrodes can be simplified. For example, a voltage is applied to the switching means 611 in synchronism with selection timings of the voltage application electrodes 601 1 to 601 3 in Fig. 27, electrons can be emitted from the desired electron emission electrode. Selection signals need not be supplied to the voltage application electrodes. As shown in the first and second electron emission devices, if the deriving electrode is formed to increase the field intensity of the electron emission electrode and also serves as the charge supply means, a separate charge supply means need not be arranged, thereby simplifying the circuit arrangement. A third electron emission device employable in a display device according to the present invention will be described below. Fig. 29 is a schematic view of the third electron emission device. The same reference numerals as in the first electron emission device of Fig. 25 denote the same parts in the third electron emission device, and a detailed description thereof will be omitted. The arrangement of the third electron emission device is substantially the same as that of the first electron emission device. The deriving electrode as a charge supply means, the power sources 608 and 609, and the switching means 610 are omitted (however, if the deriving electrode 607 is arranged so as to receive a positive voltage, electron emission efficiency can be improved). A substrate 621 is not a perfect insulating substrate but a semiconductive substrate which allows a leakage current. When electrons are emitted in the electron emission operation, the lost charge component is supplied from a voltage application electrode 601 to the opposite electron emission electrode through the substrate 621 consisting of a semiconductive material. A semiconductive material may be a metal such as Pd and a semiconductor material such as In 2 O 3 , ZnO, or SnO 2 . The substrate 621 can consist of only a semiconductive material. However, it is preferable to form a thin substrate in favor of a high-speed charge supply operation. A conductive film is generally formed on an insulating substrate. When the above materials are formed into films, their sheet resistances are given as follows: about 10 2 to 10 7 Ω/□ for Pd; about 10 2 to 10 8 Ω/□ for In 2 O 3 ; about 10 2 to 10 8 Ω/□ for ZnO; and about 10 2 to 10 8 Ω/□ for SnO 2 . The manufacturing conditions for forming SnO 2 on a glass substrate by reactive sputtering are given below: (1) Sputtering Apparatus SPF-312H (Nichiden Anelba K.K.) (2) Manufacturing Conditions Target SnO 2 (99.9%) (Furuuchi Kagaku K.K.) Sputtering Gas O 2 (100%) RF Power 400 W Sputtering Pressure 5 x 10 -3 Torr (665 x 10 -3 Pa) Substrate Temperature 200°C Deposition Time 20 minutes (3) Annealing Condition 300°C, 1 hour (N 2 atmosphere) An SiO 2 film having a thickness of about 500 to 1,000 Å (10 -7 m) can be formed on a glass substrate under the above conditions. Fig. 30 is an equivalent circuit diagram of the above electron emission device during electron emission operation. The same reference numerals as in Fig. 26 denote the same parts in Fig. 30, and a detailed description thereof will be omitted. Referring to Fig. 30, an equivalent source 607 applies a voltage between the voltage application electrode 601 and the target 605 since the deriving electrode 607, the power sources 608 and 609, and the switching means 610 are omitted. An equivalent resistor 622 represents the semiconductive material subjected to current leakage and is connected in parallel with a capacitor 614. Fig. 31 is a timing chart for explaining the operation of the third electron emission device described above. As shown in Fig. 31, when a pulsed voltage from the equivalent source 615 is applied between the voltage application electrode 601 and the target 605 during an interval t3, the potential of the electron emission electrode 604 is increased. When the electrons are emitted from the electrode 604, its potential is further increased. This potential is increased until a potential difference between the target 605 and the electron emission electrode 604 is zero. Therefore, the potential is kept at a predetermined value. In this case, the voltage of both sides of the capacitor 614 is increased by a time constant defined by the resistance of the resistors 612, 613, and 622 and the capacitance of the capacitor 612. When the potential difference between the target 605 and the electron emission electrode 604 is reduced and electron emission is completed, the equivalent source 615 is kept OFF during an interval t4. In this case, the OFF target 615 is electrically disconnected from the electron emission electrode 604, and a current is not supplied therebetween. That is, the resistance of the equivalent resistor 612 is substantially infinite. As described above, since the substrate 621 consists of a semiconductive material, the charge in the capacitor is discharged through the equivalent resistor 622. The intervals t3 and t4 are properly set so as to correspond to the time required for charging and discharging, electron emission can be continuously performed. A fourth electron emission device used for the method of the present invention is substantially the same as the second electron emission device of Fig. 27, except that the deriving electrode 607 as a charge supply means, the power sources 608 and 609, and the switching means 610 are omitted (however, if the deriving electrode 607 is formed so as to receive the positive voltage, electron emission efficiency can be improved), and that the substrates consists of a semiconductive material, and a detailed description thereof will be omitted. During the electron emission operation, when a voltage having the same waveform as in the timing chart of Fig. 28 is applied to the target 605 and the voltage application electrodes 601 1 to 601 3 , electron emission can be continuously performed. The discharge operation of this device is the same as that of the third electron emission device, and a detailed description thereof will be omitted. In this case, during an interval t3, a sufficient period of time is required to discharge the charges from the respective electrodes. A method of forming a single crystal on a deposition surface will be described below. Selective deposition for selectively depositing a film on the deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substrate by utilizing differences of factors of the materials. These factors are surface energy, deposition coefficients, elimination coefficients, and surface diffusion rates and determine formation of the nucleus during the thin film formation process. According to the above electron emission method, the lost charge from the electron emission electrode during the electron emission operation is replenished after the electron emission operation. The electron emission electrode can thus be formed on the insulating layer, and dielectric breakdown voltage of the device can be increased. A wiring layer need not be formed along the surface of the insulating layer, or a through hole need not be formed in an insulating layer on a conductive substrate. Therefore, the packing density of the device can be greatly increased. In the first electron emission device, the electrons are supplied from the charge supply means after the electron emission operation, and the isolated electron emission electrode formed on the insulating surface can continuously emit the electrons. Therefore, the dielectric breakdown voltage can be greatly increased. The amount of charge to be supplied to the electron emission electrode can be arbitrarily set, and the time required for discharge can also be arbitrarily set. In the second electron emission device, the electrons are supplied from the charge supply means after the electron emission operation and the electrons can be continuously emitted from the plurality of isolated electron emission electrodes on the insulating surface. The dielectric breakdown voltage can be greatly increased. Electrical insulation between the adjacent electrodes can be improved. This device is suitable for an electron emission device having a plurality of electron emission sources uniformly formed at fine pitches. In addition, the amount of charge supplied to the electron emission electrodes can be arbitrarily set, and the time required for discharge can also be arbitrarily set. Furthermore, the voltage is time-divisionally applied to the plurality of voltage application electrodes to apply voltage between the voltage application voltages and the target, thereby performing electron emission. In this case, a circuit arrangement having a larger number of electron emission electrodes can be simplified, the number of constituting components can be reduced, and the packing density can be increased. In the first and second electron emission devices, if the deriving electrode is arranged to increase a field intensity of the electron emission electrode and is used as the charge supply means, a separate charge supply means need not be formed, thereby simplifying the circuit arrangement. In the third electron emission device, the electron emission electrode is formed on a semiconductive material, the charge lost during the electron emission operation of the electron emission electrode can be supplied through the semiconductive material. The dielectric breakdown voltage can be increased. In addition, a special charge supply means need not be formed, and the device arrangement can be simplified. In the fourth electron emission device, the plurality of electron emission electrodes are formed on a semiconductive material. The charge lost during the charge emission operation of the plurality of electron emission electrodes can be supplied through the semiconductive material. The dielectric breakdown voltage can be increased. Electrical insulation between the adjacent electrodes can be improved. This device can be suitably applied to an electron emission device having a plurality of electron emission sources uniformly formed at fine pitches. A special charge supply means need not be arranged, and the device arrangement can be simplified. Figs. 32A to 32F are schematic partial sectional views for explaining the steps in manufacturing another electron emission element suitable for a display device according to the present invention. As shown in Fig. 32A, a nucleus formation base 702 of a heterogeneous material such as Si or Si 3 N 4 is formed on a deposition surface of a substrate 701 consisting of an amorphous insulating material such as SiO 2 . As shown in Fig. 32B, a single crystal of Mo, W, Si, or the like is grown centered on a single nucleus formed in the nucleus formation base 720. An electrode 703 having a desired size and a conical portion is formed. In the following description, the crystal formed on the deposition surface is a single crystal. However, the crystal formed on the deposition surface is not limited to the single crystal but can be extended to a polycrystal. A method of forming the single crystal will be described in detail later. An insulating material such as a polyimide resin film or an acrylate film is deposited on the electrode 703 with the conical portion and the substrate 701. As shown in Fig. 32C, an electrode layer 705 such as an Mo layer is formed on the insulating layer 704. A photoresist 706 is applied to the electrode layer 705 and exposed to form an opening immediately above the conical portion of the electrode 703. As shown in Fig. 32D, the electrode layer 705 is etched to form an opening 707. As shown in Fig. 32E, the insulating layer 704 is selectively etched through the opening 707 to form an opening 708, so that at least the conical portion of the electrode 703 is exposed. Finally, as shown in Fig. 32F, the photoresist 706 is removed to prepare an electron emission element. In the above method, the electrode 703 with a conical portion is formed on the SiO 2 substrate 701. However, an amorphous SiO 2 film 701a may be formed on an underlying substrate to prepare an electron emission element in the same manner as described above. Fig. 33 is a schematic partial sectional view showing a step of forming another electron emission element using the method of Figs. 32A to 32F. Referring to Fig. 33, an amorphous film 701a is formed on an Si underlying substrate 709. A nucleus formation base 702 is formed on the amorphous film 701a, thereby forming the electron emission element on the Si underlying substrate. The subsequent steps are the same as those in Figs. 32B to 32F, and a detailed description thereof will be omitted. As described with reference to the method of manufacturing the electron emission devices in Figs. 32A to 33, an electrode with a conical portion serving as an electron emission portion is centered on a single nucleus formed in a micropatterned heterogeneous material region and is formed on a clean surface. An insulating layer and a deriving electrode thereon are sequentially formed to obtain the electrode with the conical portion of a single crystal substantially free from crystal defects. The shapes of the conical portions as the electron emission portions can be made uniform to result in an increase in field intensity. Variations in initial operating voltage can be minimized. As shown in Fig. 33, the deposition surface can be formed on the underlying substate of a desired material. For example, the deposition surface may be formed on a substrate having high heat dissipation efficiency, thereby improving device reliability. A sufficiently micropatterned heterogeneous material region which has a sufficiently higher nucleation density than that of the material of the deposition surface and allows growth of only the single nucleus is formed on the deposition surface. The crystal is grown centered on the single nucleus grown in the heterogeneous material region. According to this method, the electrode 703 with the conical portion is determined by conditions such as the insulating layer 704 constituting the deposition surface, the nucleus formation base 702, the material of deposit, and the deposition conditions. The size of the electrode 703 is determined independently of the size of the opening 707. Variations in sizes of the electrodes 703 can be prevented. The position of the electrode 703 can be determined by the position of the nucleus formation base 702. The electrode 703 can be formed at a desired position with high precision. As a result, the plurality of electron emission ports of the multi type electron emission element can be formed at fine pitches with uniformity. The electrode with the conical portion can be easily formed by the single crystal. The conductivity of the electrode with the conical portion can be improved, and the electron emission portion as the conical portion can be matched with the crystal surface having a predetermined structure, thereby improving the Schottky effect and electron emission efficiency. A method of growing the single crystal on the deposition surface will be described below. Selective deposition for selectively forming a film on a deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substate by utilizing differences of factors of the materials. The factors are surface energy, deposition coefficients, elimination coefficients, surface diffusion rates, and the like and determine the formation of the nucleus in the thin film formation process. According to the method described in detail above, an electrode with a conical portion serving as an electron emission portion is centered on a single nucleus formed in a micropatterned heterogeneous material and is formed on a clean surface. An insulating layer and a deriving electrode thereon are sequentially formed to obtain the electrode with the conical portion of a single crystal substantially free from crystal defects. The shapes of the conical portions as the electron emission portions can be made uniform to result in an increase in field intensity. Variations in initial operating voltage can be minimized. Furthermore, the deposition surface can be formed on the underlying layer of a desired material. For example, the deposition layer can be formed on a substrate having high heat dissipation efficiency, and device reliability can be greatly improved. Fig. 34 is a schematic partial sectional view showing another element emission element. Referring to Fig. 34, an insulating layer 802 of an amorphous insulating material such as SiO 2 is formed on a substrate 801 of Si or the like. The insulating layer 802 is photoetched to form a recess 807. In this embodiment, a bottom surface 807a of the recess 807 serves as the deposition surface, and the side wall surface consisting of the insulating member, and these are formed in a single process. However, the insulating member may be formed on the deposition surface in a separate step. The material of the insulating member may be the same as that of the deposition surface or may consist of a material different therefrom. A nucleus formation base 803 consisting of a heterogeneous material such as Si or Si 3 N 4 is formed on the bottom surface 807a (deposition surface) of the recess 807. A single crystal such as an Si single crystal is grown, centered on the single nucleus formed in the nucleus formation base 803. A conductive member 804 with a conical portion is formed, and a heat-resistive conductive film 805 is formed on the conductive member 804, thereby preparing an electrode 808 with a conical portion. The material of the conductive member 804 is not limited to a specific one if a predetermined current can flow therethrough. The conductive material may be thus a semiconductor or a conductor. A method of forming the single crystal of the conductive member will be described later. The heat-resistive conductive film 805 consists of W, LaB 6 , or the like and is formed on the conductive member 804 in accordance with a desired manufacturing method. For example, in order to form a film on a conductive member of an Si single crystal, CVD is performed to cause the following chemical reaction on the Si single crystal: Si + WF 6 → W + SiF 4 so that a W film is formed on the Si single crystal film. A deriving electrode 806 is formed near the conical portion of the electrode 808 above the insulating layer 802. The deriving electrode 806 can be formed as follows. The recess 807 is filled with a resist, and a metal layer such as an Mo layer is formed on the resist layer and the insulating layer 802. The metal layer is photoetched to form an opening near the conical portion of the electrode 808. Finally, the resist film is removed. In the above embodiment, the deposition surface material is not limited to the insulating material. A semiconductor material or a conductor material may be used. However, if an insulating material is used, the dielectric breakdown voltage can be increased. In the above embodiment, the insulating layer 802 is formed on the substrate 801 to constitute the deposition surface. However, the surface of an insulating substrate may serve as the deposition surface. Fig. 35 is a schematic perspective view for explaining wiring of the electron emission element of this embodiment. Referring to Fig. 35, wiring of the above electron emission element can be performed as follows. After the electrode 808 having a conical portion is formed on the bottom surface 807a of the recess 807, a groove is formed in the insulating layer 802. A wiring layer 809 is formed in the groove and is connected to the electrode 808 with the conical portion. A voltage is applied between the wiring layer 809 and the deriving electrode 806 such that the potential of the deriving electrode 806 is higher than that of the wiring layer 809, and electron emission can be performed. In the above arrangement, the deriving electrode 806 is formed such that the metal layer such as an Mo layer is etched in the process. However, a metal plate with an opening can be adhered to the insulating layer 802 after the groove is formed. In the above electron emission element, the electrode with the conical portion comprises the conductive member with the conical portion and the heat-resistive conductive film formed thereon. The electron emission portion can be constituted by the conductive film having high heat resistance to prevent deformation of the conical portion caused by melting with heat. In addition, most of the electrode with the conical portion is made of the conductive member having high conductivity, thereby preventing unnecessary heat generation. The conductive member preferably consists of a single crystal in favor of its conductivity. However, the material of the conductive member is not limited to the single crystal but can be a polycrystal or the like. The method of forming the conductive member is not limited to the method of growing the single crystal described above. Although the method shown in Fig. 1 may be utilized, the single crystal growing method of forming a micropatterned heterogeneous material having a sufficiently higher nucleation density than that of the deposition surface so as to allow formation of only the single nucleus, and growing the crystal by using the single nucleus as its center has the following advantages. (1) The shape of the electrode with the conical portion is determined by the deposition surface, the heterogeneous material, the material of the conductive member, and the deposition conditions. The electrode with the conical portion can be formed independently of the sizes of the openings of the insulating member and the deriving electrode. Therefore, an electrode with a conical portion having a desired size can be formed, and variations in its size can be prevented. (2) Since the position of the electrode with the conical portion can be determined by the position of the heterogeneous material region. The electrode with the conical portion can be formed at a desired position with high precision. A multi type electron emission element can be formed such that its plurality of electron emission ports can be uniformly determined at fine pitches. (3) Since the electrode with the conical portion has a conical shape unique to the single crystal and the shapes of electron emission portions are made uniform and sharp. Therefore, an additional tapering technique need not be used, and the field intensity can be uniform and high. Variations in initial operating voltage can be prevented, and electron emission efficiency can be improved. (4) Unlike the conventional case, the single crystal can be easily formed on the amorphous insulating substate, thereby providing an electron emission element having a high dielectric breakdown voltage. (5) Since the electron emission element can be formed by the conventional semiconductor fabrication process, a high packing density can be achieved by the easy process. A method of growing the single crystal on the deposition surface will be described below. Selective deposition for selectively forming a film on a deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substate by utilizing differences of factors of the materials. The factors are surface energy, deposition coefficients, elimination coefficients, surface diffusion rates, and the like and determine the formation of the nucleus in the thin film formation process. Fig. 36A is a schematic view showing an electron emission device using still another method of the present invention, and Fig. 36B is an enlarged view of the a portion in Fig. 35A. Fig. 37 is a timing chart for explaining the operation of the electron emission device shown in Figs. 36A and 36B. As shown in Fig. 36A, a voltage application electrode 902 of a metal (e.g., Al, Ta, Mo, or W) or a semiconductor (e.g., Si) is formed on a substrate 901. An insulating layer 903 consisting of an insulator such as Al 2 O 3 , Ta 2 O 5 , or SiO 2 and having a thickness of 50 to 150 Å is formed on the voltage application electrode 902. As shown in Fig. 36B, nucleus formation base 909 consisting of a material different from that of the insulating layer 903 is formed on the insulating layer 903 at position opposite to the electrode 902. A single crystal such as an Si single crystal is centered on the single nucleus formed in the nuclear formation base 909 to obtain an electron emission electrode 907 having a size of about 50 to 10,000 Å (5 x 10 -9 to 10 -5 m) and a substantially conical portion. A metal layer 904 consisting of Al, Au or Pt is formed on the insulating layer 903 and is connected to the electron emission electrode 907. The material of the electrode 907 is not limited to the single crystal but may be replaced with a polycrystal. However, if the single crystal is used, the conductivity and electron emission efficiency of the electrode 907 can be improved. In general, it is difficult to form a single crystal on the surface of the insulating material. However, according to the method of forming the single crystal as described above, the single crystal can be easily formed on the insulating layer. Note that a method of forming the electron emission electrode 907 will be described later. An insulating layer 905 consisting of SiO 2 , Si 3 N 4 , or polyimide resin and having an opening centered on the electrode 907 is formed on the metal layer 904. A deriving electrode 906 having an electron emission port is formed on the insulating layer 905. When a predetermined voltage is applied between the electrode 902 and the metal layer 904, the electrode 902 can be rendered conductive with the electrode 907 by a tunneling effect. In this case, a voltage is applied from a power source 911 to the deriving electrode 906 such that the potential of the electrode 906 is high. A voltage is applied from a power source 910 to a target 908 such that the potential of the target 908 is high. Electrons are emitted from the conical portion of the electrode 907. In the electron emission device having the above arrangement, the voltage applied to the electrode 902 and the voltage applied to the metal layer 904 are controlled to emit the electrons at a desired timing. As shown in Fig. 36A, a pulse generator 913 is connected to the electrode 902, and a pulse generator 912 is connected to the metal layer 904. As shown in Fig. 37, a negative voltage V1 is applied to the electrode 902 and a voltage of 0 V is applied to the metal layer 904 during an interval t1. In this case, the potential difference (V1 - 0) is set to be a value exceeding a predetermined value, the electrons pass through the insulating layer 903 by the tunneling effect and are emitted from the conical portion of the electron emission electrode 907. A negative voltage V2 (> V1) is applied to the electrode 902 and a negative voltage V3 is applied to the metal layer 904 during an interval t2. If a potential difference (V3 - V2) is set to be a value below a predetermined value, electron tunneling is prevented, and the electrodes 902 and 907 are rendered nonconductive. When the negative voltage V1 is applied to the metal layer 904 and the potential difference (V3 - V1) is set to be a value smaller than a predetermined value, tunneling is prevented. The electrical disconnection between the electrodes 902 and 907 is maintained. Electron emission control by the pulsed voltages described above can be suitably applied to a matrix type multi electron emission device having a plurality of electron emission sources. Fig. 38 is an equivalent circuit diagram of an electron emission portion in the multi type electron emission device employable in a display device according to the present invention. Figs. 39A and 39B are timing charts for explaining timings of voltages applied to the electrodes arranged in the matrix form. Referring to Fig. 38, diodes 914 1 to 914 33 have an MIN structure comprising electrodes 902, the insulating layer 903 and the electron emission electrodes 907. When a predetermined voltage is applied to set the selected metal layer at a high potential by arbitrarily selecting the electrodes 902 1 to 902 3 and the metal layers 904 1 to 904 3 , the diodes at the desired positions are turned on. As shown in Figs. 39A and 39B, a voltage V1 is applied to the electrode 902 1 and a voltage of 0 V is sequentially applied to the metal layers 904 1 to 904 3 during an interval t4. In this case, the diodes 914 11 , 914 12 , and 914 13 are sequentially turned on. During intervals t5 and t6, the diodes are sequentially turned on in an order from the diode 914 21 to the diode 914 33 . In this case, a deriving electrode 906 as shown in Fig. 36 is commonly provided to the electron emission electrodes 907 11 907 33 (not shown) connected to the metal layers 904 1 to 904 3 . When a voltage is applied between the deriving electrode 906 and the target 908 such that the potential of the electrodes 907 11 to 907 33 is higher than that of the target 908, electrons are emitted from the conical portions of the electrodes 907 11 to 907 33 coupled to the diodes 914 11 to 914 33 . A method of forming the electron emission electrode 907 will be described below. The single crystal growing method of forming a micropatterned heterogeneous material having a sufficiently higher nucleation density than that of the deposition surface so as to allow formation of only the single nucleus, and growing the crystal by using the single nucleus as its center has the following advantages. (1) The shape of the electrode with the conical portion is determined by the deposition surface, the heterogeneous material, the material of the conductive target, and the deposition conditions. The electrode with the conical portion can be formed independently of the sizes of the openings of the insulating member and the deriving electrode. Therefore, an electrode with a conical portion having a desired size can be formed, and variations in its size can be prevented. (2) Since the position of the electrode with the conical portion can be determined by the position of the heterogeneous material region. The electrode with the conical portion can be formed at a desired position with high precision. A multi type electron emission element can be formed such that its plurality of electron emission ports can be uniformly determined at fine pitches. (3) Since the electrode with the conical portion has a conical shape unique to the single crystal and the shapes of electron emission portions are made uniform and sharp. Therefore, an additional tapering technique need not be used, and the field intensity can be uniform and high. Variations in initial operating voltage can be prevented, and electron emission efficiency can be improved. (4) Unlike the conventional case, the single crystal can be easily formed on the amorphous insulating substate, thereby providing an electron emission element having a high dielectric breakdown voltage. (5) Since the electron emission element can be formed by the conventional semiconductor fabrication process, a high packing density can be achieved by the easy process. A method of growing the single crystal on the deposition surface will be described below. Selective deposition for selectively forming a film on a deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substate by utilizing differences of factors of the materials. The factors are surface energy, deposition coefficients, elimination coefficients, surface diffusion rates, and the like and determine the formation of the nucleus in the thin film formation process. Fig. 40 is a schematic partial sectional view for explaining a display device according to the present invention. Fig. 41A is an enlarged view of an electron emission portion of the display device shown in Fig. 40, and Fig. 41B is a plan view of the electron emission portion. As shown in Figs. 40 and 41A, a plurality of nucleus formation bases 1002 consisting of a heterogeneous material such as Si 3 N 4 are formed on an oxide substrate 1001 of an amorphous insulating material such as SiO 2 constituting a deposition surface. The nucleus formation bases 1002 are spaced apart from each other at equal intervals. A single crystal such as an Mo, W, or Si single crystal is grown centered on each single nucleus formed in the corresponding nucleus formation base 1002. Electrodes 1007 each having a conical portion and a desired size can be formed. The conical portion of each electrode 1007 serves as the electron emission portion. The deposition surface excluding the heterogeneous material surface serves as a surface on which the nucleus is not formed. Therefore, growth of the single crystal in a region excluding the area centered on the nucleus formation base 1002 can be prevented. A method of forming the single crystal will be described later. An insulating layer 1005 consisting of SiO 2 or the like and having an opening centered on each electrode 1007 is formed, and a tray-like recess centered on the electrode 1007 is formed on the insulating layer 1005. A metal layer such as an Mo layer is formed in the recess to prepare a deriving electrode 1003. An insulating layer 1006 consisting of SiO 2 or the like is formed on the deriving electrode 1003. As shown in Fig. 41B, a pair of electrodes 1004 1 and 1004 3 and a pair of electrodes 1004 2 and 1004 4 are formed on the insulating layer 1004 2 and 1004 4 . A phosphor unit 1008 is formed above the electrodes 1007 and includes unit areas 1009 each consisting of a matrix of three rows and three columns, and each column or row consists of R, B and B phosphors. Adjacent unit areas are spaced apart from each other by a predetermined gap. The unit areas 1009 are formed in accordance with pitches of the electrodes 1007 so as to respectively oppose the electrodes 1007. In the above embodiment, the deriving electrode 1003 is formed in the process for forming the metal layer such as the Mo layer. However, a metal plate having openings may be adhered to the insulating layer 1005 after the insulating layer 1005 is formed. The operation of the display device having the above arrangement will be described below. Fig. 42 is a view showing assembly of the electron emission portion of the display device shown in Fig. 40. The electrodes 1004 1 and 1004 3 and the electrodes 1004 2 and 1004 4 are omitted for illustrative convenience. Fig. 43 is a schematic view for explaining electron emission operation of wiring lines and deriving electrodes which are arranged in a matrix form. Fig. 44 is a view for explaining the operation of the display device shown in Fig. 40. As shown in Fig. 43, the wiring lines of the electron emission portions can be formed such that each electrode 1007 having a conical portion is formed on the deposition surface, a groove is formed in the insulating layer, and a wiring layer (corresponding to the wiring line in Fig. 43 10010 is formed in the groove. The wiring layer 10010 is connected to the deriving electrode 1003. A voltage from a power source V3 is applied between the wiring layer 10010 and the deriving electrode 1003 such that the potential of the deriving electrode 3 is higher than that of the wiring layer 10010, and electrons are emitted from the conical portion of the electrode 1007. Electron emission control between the wiring layer 10010 and the deriving electrode 1003 is performed such that 0 V is sequentially applied to the wiring lines 10010 1 to 10010 4 , transistors are respectively 5 connected to the deriving electrodes 1003 1 to 1003 4 , and voltage signals are input to to a desired deriving electrode at a desired timing, thereby emitting electrons from the electrode 1007 at an arbitrary position. When a voltage is applied between the selected electrode 1007 and the phosphor unit 1008 such that the potential of the phosphor unit 1008 is higher than that of the selected electrode 1007, the emitted electrons pass through the electrodes 1004 1 and 1004 3 and the 5 electrodes 1004 2 and 1004 4 and are emitted onto the corresponding unit area 1009 in the phosphor unit 1008. At this time, when a predetermined voltage from a power source V2 is applied between the electrodes 1004 1 and 1004 3 , the electron can be deflected in the Y direction in Fig. 44. When a predetermined voltage from the power source V1 is applied between the electrodes 1004 2 and 1004 4 , the electron is deflected in the X direction in Fig. 44. In the display device having the arrangement described above, the amount of electron emission is controlled by control of voltage applied to the wiring layer 10010 and the deriving electrode 1003. The electrons can be emitted at a desired position of each phosphor area constituting the unit area 1009 by voltages applied to the electrodes 1004 1 and 1004 3 and the electrodes 1004 2 and 1004 4 . In the above embodiment, the electrode with the conical portion need not consist of a single crystal but may be made of a non-monocrystalline material such as a polycrystal. However, if the electrode with the conical portion consists of a single crystal, the shapes of the electron emission portions can be made uniform and sharp. An additional tapering technique need not be utilized, and the field intensity can be increased with uniformity. Variations in initial operating voltage can be prevented, and the conductivity and electron emission efficiency can be improved. The single crystal growing method of forming a micropatterned heterogeneous material having a sufficiently higher nucleation density than that of the deposition surface so as to allow formation of only the single nucleus, and growing the crystal by using the single nucleus as its center has the following advantages. (1) The shape of the electrode with the conical portion is determined by the deposition surface, the heterogeneous material, the material of the conductive member, and the deposition conditions. An electrode with a conical portion having a desired size can be formed, and variations in its size can be prevented. (2) Since the position of the electrode with the conical portion can be determined by the position of the heterogeneous material region. The electrode with the conical portion can be formed at a desired position with high precision. A multi type electron emission element can be formed such that its plurality of electron emission ports can be uniformly determined at fine pitches. (3) Unlike the conventional case, the single crystal can be easily formed on the amorphous insulating substate, thereby providing an electron emission element having a high dielectric breakdown voltage. In addition, since the amorphous insulating substrate is relatively inexpensive and can be formed in a large area, a display device having a large area can be easily formed. (4) Since the electron emission element can be formed by the conventional semiconductor fabrication process, a high packing density can be achieved by the easy process. Still another embodiment of the present invention will be described below. In this embodiment, a conical portion of an electrode consists of at least a semiconductor crystal formed by nucleus growth and a material having a low work function to obtain a display device of a low voltage, thereby improving electron emission efficiency. The semiconductor crystal may be a p- and/or n-type semiconductor crystal. A p-type semiconductor crystal and a material having a low work function are used to emit electrons in the following description. The principle of the electron emission operation will be described below. Fig. 46 is an energy band diagram of a metal-semiconductor junction. Fig. 47 is an energy band diagram on the surface of the p-type semiconductor. As shown in Fig. 46, in order to obtain an NEA state wherein a vacuum level Evac is lower than the energy level of a conduction band Ec of the p-type semiconductor, a material for decreasing a work function  m must be formed on the surface of the semiconductor. A typical example of such a material is an alkali metal, and in particular Cs, Cs-O, or the like. If the state in which the work function  m on the semiconductor surface is low, and further the NEA state is obtained, electrons injected into the p-type semiconductor can be easily emitted, thereby obtaining an electron emission element having high electron emission efficiency. The junction between the p-type semiconductor and the material having a low work function is reverse-biased to set the vacuum level Evac to a level lower than that of the conduction band Ec of the p-type semiconductor. As a result, a larger energy difference ΔE than the conventional energy difference can be easily obtained. Even if the vacuum level Evac is higher than the energy level of the conduction band Ec of the p-type semiconductor in an equilibrium state, the NEA state can be easily obtained by using a chemically stable material having a relatively high work function  m but being defined as a low-work function material. The electron emission structure described above is used in an arrangement similar to a field effect electron emission element to obtain a low-voltage element and hence improve electron emission efficiency. It is possible to prepare an electron emission element by using an n-type semiconductor crystal and a material having a low work function, as described by Philips J. Res. 39, 59 - 60, 1984. The single crystal growing method of forming a micropatterned heterogeneous material having a sufficiently higher nucleation density than that of the deposition surface so as to allow formation of only the single nucleus, and growing the crystal by using the single nucleus as its center has the following advantages. (1) The single nucleus consisting of the heterogeneous material is formed in only the nucleus formation surface, and the nucleus is not formed on the deposition surface region serving as the surface on which the nucleus is not formed. Therefore, the conical portion of the electrode consists of only a single crystal. The facet unique to the single crystal can be used as a conical portion of the electron emission portion. (2) The shape of the electrode with the conical portion is determined by the manufacturing conditions such as the deposition surface, the heterogeneous material surface, the material of the electrode, and the deposition conditions. Therefore, an electrode having a desired size can be formed, and its variations can be prevented. (3) The position of the electrode having the conical portion is determined by the position of the heterogeneous material surface. The electrode with the conical portion can be formed at a desired position with high precision. (4) Unlike in the conventional method, a single crystal can be easily formed on an amorphous insulating surface. (5) The electron emission element can be formed according to the conventional semiconductor fabrication process, and its packing density can be increased by the easy process. Still another electron emission element suitable for a display device according to the present invention will be described in detail with reference to Figs. 49 to 50(B). Fig. 48 is a schematic partial sectional view of this electron emission element. Fig. 49 is a view for explaining the operation of the electron emission element. Referring to Figs. 48 and 49, a nucleus formation base 1102 consisting of a heterogeneous material such as Si 3 N 4 is formed on an oxide substrate 1001 consisting of an amorphous insulating material such as SiO 2 and constituting a deposition surface. A single crystal such as an Si single crystal is grown centered on a single nucleus formed in each nucleus formation base 1102 while an n-type impurity is doped therein. An n-type semiconductor region 1109 is formed. An p-type semiconductor region 11010 is formed on the n-type semiconductor region 1109 while an p-type impurity is doped. The p-type semiconductor region 11010 has a facet unique to the single crystal. A 100-A thick low work function material region 11011 consisting of CsSi or the like is formed on the p-type semiconductor region 11010 to prepare an electrode 11013 with a conical portion serving as an electron emission portion. A preferable low work function material has a work function of 2.5 eV or less and can be exemplified by Li, Na, K, Rb, Sr, Cs, Ba, Eu, Yb, or Fr. If stabilization of the low work function material region 11011 is taken into consideration, an alkali metal silicide such as CsSi or RbSi may be used. A method of forming the single crystal will be described later. The n-type semiconductor region 1109 of the electrode 11013 is connected to a conductive layer 1103 formed on the oxide substrate 1101. An insulating layer 1104 consisting of SiO 2 or the like and having an opening centered on the electrode 11013 formed on the conductive layer 1103 is formed. A conductive layer 1105 connected to the p-type semiconductor region 11010 is formed on the insulating layer 1104. An insulating layer 1106 is formed on the conductive layer 1105. A conductive region 1108 connected to the low work function material region 1109 is formed on the insulating layer 1106. An insulating layer 1107 is formed on the insulating layer 1106 except for the conductive region 1108, and a deriving electrode 11012 is formed on the insulating layer 1107. In the element having the above structure, a voltage V2 is applied between the n- and p-type semiconductor regions 1109 and 11010 such that the potential of the p-type semiconductor region is higher than that of the n-type semiconductor region. A reverse biasing voltage V1 is applied between the p-type semiconductor region 11010 and the low work function material region 11011. A voltage V3 is applied between the p-type semiconductor region 11010 and the deriving electrode 11012 such that the potential of the deriving electrode 11012 is higher than that of the p-type semiconductor region 11010. Under these conditions, electrons can be emitted from the surface of the low work function material region 11011. The above operation will be described below. Fig. 50A is an energy band diagram in a equilibrium state, and Fig. 50B is an energy band diagram when the element is operated. As shown in Fig. 49, when the forward biasing voltage V2 is applied to the p-n junction and a reverse biasing voltage V1 is applied between the p-type semiconductor region 11010 and the low work function material region 11011, the energy band is changed as shown in Fig. 50B to obtain the NEA state in which the vacuum level Evac is lower by ΔE from that of the conduction band Ec of the p-type semiconductor region 11010. For this reason, the electrons injected from the n-type semiconductor region 1109 to the p-type semiconductor region 11010 are emitted from the surface of the low work function material region 11011, and therefore high electron emission efficiency with a larger ΔE than that of the conventional case can be obtained. In order to increase ΔE by reverse biasing, the metal material is not limited to Cs or Cs-O which has a small work function. However, the material can be selected from a wide material range including alkali metals and alkali earth metals. A stabler material can be selected. A positive voltage is applied to the deriving electrode 11012 in this embodiment, so that a decrease in work function by the Schottky effect occurs. Therefore, a larger amount of electron emission can be obtained. The single crystal growing method of forming the p- and n-type semiconductor regions by forming a micropatterned heterogeneous material having a sufficiently higher nucleation density than that of the deposition surface so as to allow formation of only the single nucleus, and growing the crystal by using the single nucleus as its center has the following advantages. (1) The shape of the electrode with the conical portion is determined by the deposition surface, the heterogeneous material, the material of the conductive member, and the deposition conditions. The electrode with the conical portion can be formed independently of the size of the opening of the deriving electrode. Therefore, an electrode with a conical portion having a desired size can be formed, and variations in its size can be prevented. (2) Since the position of the electrode with the conical portion can be determined by the position of the heterogeneous material region. The electrode with the conical portion can be formed at a desired position with high precision. A plurality of electron emission ports of the electron emission portions can be uniformly determined at fine pitches. (3) Since the p-type semiconductor region has a conical shape unique to the single crystal and the shape of the electron emission portion can be made uniform and sharp, an additional tapering technique need not be used. The field intensity can be uniform and high, variations in initial operating voltage can be prevented, and the conductivity of the electrode with the conical portion can be improved. Therefore, electron emission efficiency can be improved. (4) Unlike the conventional case, the single crystal can be easily formed on the amorphous insulating substate, thereby providing an electron emission element having a high dielectric breakdown voltage. (5) Since the electron emission element can be formed by the conventional semiconductor fabrication process, a high packing density can be achieved by the easy process. A method of growing the single crystal on the deposition surface will be described below. Selective deposition for selectively forming a film on a deposition surface will be described below. Selective deposition is a method of selectively forming a thin film on a substate by utilizing differences of factors of the materials. The factors are surface energy, deposition coefficients, elimination coefficients, surface diffusion rates, and the like and determine the formation of the nucleus in the thin film formation process.

Claims: A display device comprising a plurality of electron emission electrodes (1007) formed on a deposition surface of an amorphous substrate (1001), said plurality of electrodes being responsible for the formation of images on a display unit and having a conical portion consisting of a single crystal, a deriving electrode (1003) formed on an insulating layer, said insulating layer being formed on said deposition surface and having openings receiving said conical portions and a phosphor unit (1008) formed to oppose said electrode (1007) with said conical portions, wherein said phosphor unit (1008) is energized with electrons emitted from said electrodes (1007) and wherein said phosphor unit (1008) has plural phosphor areas (1009) arranged so that one phosphor area corresponds to one electron emission electrode.

Inventors: ICHIKAWA TAKESHI, KANEKO TETSUYA, OKUNUKI MASAHIKO, SHIMODA ISAMU, SUZUKI AKIRA, TAKEDA TOSHIHIKO, TSUKAMOTO TAKEO, YONEHARA TAKAO, ICHIKAWA,TAKESHI, KANEKO,TETSUYA, OKUNUKI,MASAHIKO, SHIMODA,ISAMU, SUZUKI,AKIRA, TAKEDA,TOSHIHIKO, TSUKAMOTO,TAKEO, YONEHARA,TAKAO
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1988
Main classification: H01J31
IPC codes: H01J1