HIGH VOLTAGE GENERATING APPARATUS FOR TELEVISION EQUIPMENT

Abstract: The high voltage generating apparatus includes a flyback transformer (2) to be employed in television equipment and has a circuit for stabilizing a high voltage output. This circuit comprises an additive voltage generating coil (21), a reference voltage generating circuit (3), a voltage detector (9), a comparison amplifier (22), a switching circuit (23) and a voltage multiplying rectifier circuit (42). The reference voltage generat­ ing circuit (3) generates an inclined voltage in the flyback time of the horizontal deflection cycle and the voltage detector (9) detects a mode of the high voltage output. The comparison amplifier (22) compares an inclined voltage and a detection voltage and generates a control signal. The switching circuit (23) operates with the control signal. With this operation, an additive voltage generated by the additive voltage generating coil (21) is supplied to the high voltage coil (12) of the flyback transformer (2) through the voltage multiplying rectifier circuit (42). The voltage to be supplied compensates the voltage fall if the high voltage output and accordingly the high voltage output is stabilized.

Description: The present invention relates to a high voltage generating apparatus for supplying a high voltage to an anode of a cathode-ray tube, particularly a high voltage generating apparatus provided with a circuit for stabilizing a high voltage output. Figure 1 shows a conventional high voltage generating circuit. This high voltage generating circuit is provided with a horizontal deflection output circuit 1 and a flyback transformer 2. The horizontal deflection output circuit 1 comprises a horizontal output transistor 4, a damper diode 5, an oscillation capacitor 6, a horizontal deflection coil 7 and a S-shaped compensation capacitor. The horizontal output transistor 4 receives a voltage pulse transmitted from the horizontal drive circuit to perform switching and applies a sawtooth wave current to the horizontal deflection coil 7 in cooperation with the damper diode 5. On the other hand, the oscillation capacitor and the horizontal deflection coil 7 generates a flyback pulse with their ocsillating action and supply it to the flyback transformer. The flyback transformer 2 is made up with a low voltage coil 11 and a high voltage coil 12 mounted on the core 10 and one end of the low voltage coil 11 is connected to the collector of the horizontal output transistor 4 and the other end of said coil 11 is connected to the power supply 13. The high voltage side of the high voltage coil 12 is connected to the anode of the cathode-ray tube through the high voltage rectifying diode 14 and the other end of said coil 12 is connected to the ABL (Automatic Brightness Limiter). This flyback transformer 2 boosts the flyback pulse voltage supplied from the horizontal deflection output circuit 1 and supplies the boosted output (output voltage) to the anode 16 of the cathode-ray tube. Generally, as shown in Figures 1 and 3, the high voltage coil 12 is wound in multiple layers. If the coils of all layers are wound in the same count of turns, same winding width and same winding pitch and the end of the coil of each layer and the beginning of the coil of the next layer are connected with a diode 17 to have the same polarity, the potential difference is zero in terms of the alternating current between the coils of layers. Accordingly, the electric insulation between layers can be taken into consideration only as to the potential difference of the direct current and it is easy because heat generation due to dielectric loss need be taken into account. If the high voltage coil is wound in multiple layers, the distance between the low voltage coil 11 and the high voltage coil 12 can be smaller than that of other section coils wound on the bobbin and the finish outside diameter of the high voltage coil can be small. Consequently, said high voltage coil 12 is advantageous in that its leakage inductance can be small. For this reason, the flyback transformer 2 employing the high voltage coil wound in multiple layers is widely used. However, in case the high voltage coil 12 is only wound in multiple layers, the output current I H flowing from said coil 12 to the anode 16 of the cathode-ray tube 15 as shown in Figure 4 suddenly reduces in the range of 0 to 200µA and this phenomenon is unfavorable. In recent years, a fixed resistor 18 and a variable resistor 20 are arranged in series connection between the high voltage output side (the anode side of the cathode-ray tube) and the grounding side to divide a current as much as approximately 10% of output current I H as shown in Figure 1 and sudden reduction of said output current is prevented as shown in Figure 5. In other words, as shown in Figures 4 and 5, if the tolerance range of reduction of current I H is set to 0 to 1000µA, the output impedance Z₀₁ is Z₀₁ = (27 - 25) kV/1000µA = 2MΩ as known from Figure 4 as far as the means for shunting current I H is not provided, whereas the output impedance Z₀₂ is Z₀₂ = (26.1 - 24.9)kV/1000µA = 1.2MΩ as known from Figure 5 as far as the means for shunting current I H is provided, thus the output impedance has been substantially improved. Nowaday, however, the demands have been more and more emphasized for improvement of the definition and precision of the cathode-ray tube 15 and further reduction of the output impedance. Moreover, the means which does not incur power loss in such reduction of the output impedance is strongly demanded but a method for shunting current I H through the fixed resistor 18 and the variable resistor 20 as described above has been unable to meet these demands and has not been accepted by the market. Further, GB-A-1059 720 dicloses a high voltage generating apparatus comprising a flyback transformer having two secondary coils between which the secondary winding of an auxiliary transformer is provided, the two-part primary winding of which is connected in series with the emitter-collector path of a semiconductor device which is controlled by the voltage applied to its control electrode from the tapping of a voltage divider between high-tension voltage terminal and earth. Stabilisation of high-tension voltage is effected by controlling the semiconductor device in such a manner that when the high-tension voltage diminishes a corresponding increase in the amplitude of the auxiliary voltage of the auxiliary transformer is produced, which voltage will be added to the voltage developed in the main high-tension (secondary) coil. An object of the present invention is to provide a high voltage generating apparatus provided with a circuit for stabilizing the output voltage from the flyback transformer. Another object of the present invention is to provide a high voltage generating apparatus for stabilizing an output voltage by supplying a voltage from an additive voltage generating coil which compensates a fall of the output voltage from the high voltage coil of the flyback transformer due to a variation of load. Another further object of the present invention is to provide a high voltage generating apparatus adapted to actuate a switching circuit in the flyback time of the horizontal deflection current, thus eliminating the effect of switching noise to rasters. The high voltage generating apparatus in accordance with the present invention comprises a flyback transformer, a reference voltage generating circuit, a voltage detection circuit, an additive voltage generating coil, a switching circuit, a comparison amplifier and a voltage multiplying rectifier circuit. The flyback transformer comprises a low voltage coil and a high voltage coil, and a current supplied from the horizontal deflection output circuit is supplied to the low voltage coil and a flyback pulse voltage generated by the high voltage coil is rectified by the rectifying circuit and supplied to the anode of the cathode-ray tube. The reference voltage generating circuit comprises a square wave output circuit and an integration circuit and a square wave signal is generated from the square wave output circuit in accordance with the control voltage generated from the control voltage generating coil and this signal is integrated by the integration circuit to generate an inclined voltage in the flyback time of the horizontal deflection cycle. A high voltage supplied to the anode of the cathode-ray tube is detected by the voltage detection circuit and supplied with the inclined voltage to the comparison amplifier. This amplifier outputs a control pulse signal which has a pulse width equal to a period during which the inclined voltage is larger than the detection voltage. The switching circuit is connected between the additive voltage generating coil which is mounted on the core of the flyback transformer to generate an additive voltage and the voltage multiplying rectifier circuit and supplies the additive voltage to the high voltage coil through the voltage multiplying rectifier circuit when the control transistor included in the switching circuit is on. The control transistor is actuated by an operation of the drive transistor, which operates with a control signal. The duration time of the control signal becomes long when the voltage supplied to the anode of cathode-ray tube falls due to a variation of the load and the additive voltage generated when the ON time of the control transistor is extended is supplied to the high voltage coil to stabilize the output voltage. The magnitude of additive voltage and the number of boosting steps of the voltage multiplying rectifier circuit are determined taking into account of magnitude of expected variation of the load and a reverse withstand voltage characteristic of the control transistor. Preferably, a switching control circuit which controls the operation time of the switching circuit is provided. This current allows to limit the operation of the switching circuit to the flyback time of the horizontal deflection cycle and prevent intrusion of switching noise into the flyback time. Further preferably, a discharging circuit for discharging an electric charge in the capacitor of the voltage multiplying rectifier circuit is provided to prevent an excessive voltage from being applied to the control transistor when the load largely varies. Figure 1 is a circuit diagram of the conventional high voltage generating apparatus, Figure 2 is a view of the half section of the conventional flyback transformer in which a high voltage coil is wound in layers, Figure 3 is a connection diagram of the high voltage coil shown in Figure 2, Figure 4 is a characteristic diagram showing the relationship between the voltage and the current applied to the anode of cathode-ray tube, Figure 5 is a characteristic diagram showing the relationship between the output voltage and the current of the high voltage generating apparatus provided with a means for shunting the output current as shown in Figure 1, Figure 6 is a circuit diagram showing a preferred embodiment of the high voltage generating apparatus in accordance with the present invention, Figure 7 is a waveform diagram of various parts of the circuit diagram shown in Figure 6, Figures 8 to 10 are respectively an explanatory diagram explaining the operation of the voltage multiplying rectifier circuit, Figure 11 is a circuit diagram showing another preferred embodiment of the apparatus according to the present invention, Figure 12 is a waveform diagram of various parts of the circuit diagram shown in Figure 11. Figure 13 is a circuit diagram showing another further preferred embodiment of the apparatus in accordance with the present invention, and Figure 14 is a waveform diagram of various parts of the circuit diagram shown in Figure 13. Figure 6 is a circuit diagram showing a preferred embodiment of the present invention. The same circuit parts as those in Figure 1 are given the same symbols to avoid duplicated descriptions. A characteristic point of this embodiment differing from the example shown in Figure 1 is that a reference voltage generating circuit 3, a voltage detector 9, an additive voltage generating coil 21, a comparison amplifier 22 and a switching circuit 23 are provided. Said additive voltage generating coil 21 is mounted on the core 10 of the flyback transformer 2 while being insulated from other coils. An input tap 19 is provided at the beginning part of the coil 21, and the first output tap 24 and the second output tap 25 are provided at the end part (winding end side) of said coil 21. The first output tap 24 outputs an additive voltage generated by said coil 21. The second output tap 25 is provided at a position where the coil is wound as many times as the specified count of turns from the position of the first output tap 24. The amount of winding of this second output tap 25 is set to the count of turns of winding for compensating the voltage drop due to the resistor 26 to be connected to said second tape 25, that is, the count of turns for generating the voltage corresponding to the voltage drop of the resistor 26. On the other hand, an end of the fixed resistor 28 is connected to the high potential side of the high voltage coil 12 (the cathode of the high voltage rectifying diode 14) and the other end of said resistor 28 is series-connected to the variable resistor VR F , fixed resistor 29, variable resistor VR S , fixed resistor 30 and variable resistor VR₁ in order to form the voltage detector 9 for the output voltage E H . The other end of the variable resistor VR₁ is connected to the reference potential line (the ground in the diagram). Said variable resistor VR₁ detects the output voltage E H and this detected voltage e₇ is applied to the first input terminal of the comparison amplifier 22. Said reference voltage generating circuit 3 comprises the control voltage generating coil 31, rectifier 34, square wave output circuuit 35 and integration circuit 36. The control voltage generating coil 31 is mounted on the core 10 of the flyback transformer at the low voltage side while being insulated from other coils and generates a control current similar to the flyback pulse waveform shown in Figure 7(a). An end of the oscillation capacitor 32 is connected to the high potential side (winding end side) of this control voltage generating coil 31 and the low potantial side (winding start side) of said coil 31 is connected to the other end of the oscillation capacitor 32 through the resistor 33 to form the oscillation circuit. The connection of the oscillation capacitor 32 and the resistor 33 are connected to the ABL. The oscillation circuit including the oscillation capacitor 32 oscillates with a control current generated by said control voltage generating coil 31 and generates a current waveform having a cycle approximately two times the flyback time Tr. The voltage e₃ across the resistor 33 presents the oscillation current produced from the oscillation circuit. The waveform (Figure 7(b)) of this voltage e₃ is similar to the waveform of said oscillation current. This voltage e₃ is denoted as e₃ = i₃ x R₃ if the oscillation current is i₃ and the resistance value of resistor 33 is R₃. The anode of the rectifier 34 (diode in the diagram) is connected to the connections of said control voltage generating coil 31 and the resistor 33 and the cathode side of said rectifier 34 is connected to the first input terminal of the square wave output circuit 35. The second input terminal of the square wave output circuit 35 is connected to the ABL. Said rectifier 34 half-wave rectifies the waveform of voltage e₃ appearing across the resistor 33 to pick up a positive component of voltage e₃ (Figure 7(c)) and adds this half-wave rectified voltage e₄ to the square wave output circuit 35. This square wave output circuit 35 generates a square wave voltage (for the purpose of the present specification, the square wave includes not only rectangular waveforms but also right square waveforms) for which the cycle as shown in Figure 7(d) is equal to 1/2 of the flyback time from said half-wave rectified voltage. In this embodiment, this circuit 35 comprises a saturation type amplifier and saturatedly amplifies the half-wave rectified voltage to obtain the square wave voltage e₅ shown in Figure 7(d). This square wave can also be obtained by amplifying the half-wave rectified voltage e₄ through a common amplifier and clipping the heading of the amplified output waveform in the clipping circuit. The square wave voltage e₅ output from the square wave output circuit 35 is supplied to the integration circuit 36. This integration circuit 36 integrates square wave voltage e₅ over the period from the beginning of flyback time Tr to 1/2 of flyback time Tr and generates a waveform which has a peak at a position corresponding to 1/2 of the flyback time and rises toward the right side as shown in Figure 7(e). In this case, the integration is not carried out for the time of 1/2 Tr to Tr and the waveform of the voltage is therefore declined toward the right side from the peak position due to discharging from the capacitor of the integration circuit, and the triangular wave voltage e₆ with the peak at the position of 1/2 Tr as a whole is generated in the flyback time Tr. This triangular waveform of the voltage maintains a fixed shape even in any flyback time Tr. This triangular wave voltage e₆ is supplied to the second input terminal of comparison amplifier 22. The comparison amplifier 22 compares the triangular wave voltage e₆ and the detected voltage e₇ supplied from the variable resistor V R1 of said voltage detector 9 (Figure 7(e)) and supplies the control signal e₈, which has a zero voltage only for the range Δt where the triangular wave voltage e₆ exceeds the detected voltage e₇ (range t₁ ∼ t₂ and t₅ ∼ t₆ in the figure) and a positive level voltage in the other period including the scanning time, to the switching circuit 23. The switching circuit 23 comprises a drive transistor 37, a diode 38, a resistor 26, a control transistor 40 and a diode 41. The drive transistor 37 is connected to the output terminal of the comparison amplifier 22 at its base, the common connection of the low potential side of the additive voltage generating coil 21, and the ABL at its emitter and the cathode of the diode 38 at its collector, respectively. The anode of the diode 38 is commonly connected to the base of the control transistor 40 and an end of the resistor 26, and the other end of the resistor 26 is connected to the second output tap 25 of the additive voltage generating coil 21 and the collector of the control transistor 40 is connected to the first output tap 24 of said coil 21. The emitter of transistor 40 is connected to the input side of the voltage multiplying rectifier circuit 42 (the voltage doubling circuit in the figure). The diode 41 is connected between the emitter and the collector of the control transistor with its cathode faced to the collector. This diode 41 is for admitting the reverse current from the emitter to the collector of transistor 40. Accordingly, if the transistor 40 is a transistor such as, for example, a bipolar transistor through which a reverse leaking current flows, the diode 41 is not always required and can be omitted. This switching circuit 23 supplies the pulse voltage e₁₀ as shown in Figure 7(g) to the voltage multiplying rectifier circuit 42 when the control signal e₈ has a zero voltage. Said voltage multiplying rectifier circuit 42 comprises the first to third diodes 43, 44 and 45 and the first to third capacitors 46, 47 and 48. The anode of said first diode 43 is connected to the emitter of said second transistor 40, the cathode of said diode 43 is connected to the anode of the second diode 44 and the cathode of said diode 44 is connected to the anode of the third diode 45 to form the series-connected system of diodes. The cathode of this third diode 45 is connected to the low potential side of the high voltage coil 12. An end of the first capacitor 46 is connected to the emitter of said transistor 40 and the other end of said capacitor 46 is connected to the connection of the cathode of the second diode 44 and the anode of the third diode 45. An end of the second capacitor 47 is connected to the connection of the cathode of the first diode 43 and the anode of the second diode 44 and an end of the third capacitor 48 is connected to the cathode of the third diode 45 and the other ends of the second capacitor 47 and the third capacitor 48 are connected to the ABL. The third capacitor 48 is not essential at all and can be omitted, depending on the case. The anode of diode 50 is connected to this ABL and the cathode of diode 50 is connected to the connection of the first diode 43 and the second diode 44. This cathode may be connected to the connection of the second diode 44 and the third diode 45. The following describes the stabilizing operation of the output voltage E H as described in the above embodiment. When the high voltage current I H flows in the anode of the cathode-ray tube, the output voltage E H falls and the voltage e₇ detected by the voltage detector 20 also accordingly falls. If this detection voltage e₇ falls, said detection voltage e₇ is lower than the peak position of the triangular wave voltage e₆ produced by the integration circuit 36 as shown in Figure 7(e) and said triangular wave voltage e₆ exceeds the detection voltage e₇ in the Δt range of the flyback time. Figure 7(e) shows an example case where the detection voltage e₇ detected in the flyback time of t₄ ∼ t₇ is lower than the detection voltage e₇ detected in the flyback time of t₀ ∼ t₃, and the Δt range, that is, the range of zero voltage of the control voltage e₈ to be output from the comparison amplifier 22 will be larger as the detection voltage e₇, that is, the output voltage E H falls. (Figure 7(f)) The following describes the circuit operation when the control signal e₈ is supplied to the switching circuit 23, referring to the equivalent circuits shown in Figures 8 to 11 partly extracted from the circuit shown in Figure 6. Since a zero voltage is supplied to the base of the drive transistor 37 in the flyback time of t₁ ∼ t₂, said transistor 37 turns off. On the other hand, the voltage e′₂ which appears at the second output tap 25 of the additive voltage generating coil 21 is supplied to the base of control transistor 40 through the resistor 26 and said transistor 40 turns on. Accordingly, as shown in Figure 8, the current i₁ flows from the first output tap 24 of the additive voltage generating coil 21 through the control transistor 40 and said current i₁ is divided into the current i₄ which passes through the first capacitor 46, current i₃ which passes through the first diode 43, second diode 44, third diode 45 and third capacitor 48 in sequence and current i₂ flowing from the first diode 43 to the second capacitor 47. In this case, current i₄ is extremely small and therefore omitted in the following description. With current I₂, a voltage as shown below is produced at the second capacitor 47. In this case, C₄₇ is the static capacitance of the second capacitor 47. Similarly, a voltage e₄₈ as shown below is produced at the third capacitor 48. where, C₄₈ is the static capacitance of the third capacitor 38. The polarities of these voltages e₄₇ and e₄₈ are as shown in the related drawing. In the flyback time of t₂ ∼ t₅, a positive voltage e₈ is supplied to the base of drive transistor 37, transistor 40 comes to have 0V. Accordingly, said transistor 40 turns off. Since the voltage e₂ which appears at the first output tap 24 of the additive voltage generating coil 21 is negative for the scanning time of t₃ ∼ t₄ in this period of time, the voltage of the second capacitor 47 becomes larger than the voltage of said first output tap 24. Accordingly, as shown in Figure 9, the current i₆ flows from the second capacitor 47 toward the first output tap 24 and the voltage as shown below is provided at the first capacitor 46. e₄₆ = (1/C₄₆ ) ∫i₆ dt (3) where, C₄₆ is the static capacitance of the first capacitor 46. In the formula (3), time t is not shown because the starting and stopping timing of the current i₆, which begins to flow when the voltage e₄₇ of the second capacitor 47 becomes e₂ (equal to the voltage of the first output tap) and stops flowing when the voltage e₄₆ of the first capacitor 46 becomes e₄₆ = e₄₇ + E N , varies with Δt and is unstable. The output current I H when the control transistor turns off flows as shown in Figure 10. When the flyback time begins again, the control voltage becomes zero again, the drive transistor 37 turns off and the control transistor 40 turns on. Consequently, as shown in Figure 6, the current i₁ flows from the first output tap 24 to the control transistor 40, and this current i₁ is divided into the current i₄ which passes through the first capacitor 46, third diode 45 and third capacitor 48 in sequence and the current i₂ flowing from the first diode 43 to the second capacitor 47. Consequently, a voltage as shown below is charged in the third capacitor 48. Subsequently, a similar cycle is repeated. If the Δt time is fixed, the voltage E₄₈ which is charged in the third capacitor is as shown below e₄₈ = 2 {Cl/C₄₈) ∫ ▵t / 0 i₂ dt + E N } (5) In this case, E N is the negative component of the waveform of voltage e₂ as shown in Figure 7(h). In the formula (5), the conditions of relationship as given below are satisfied. When Δt = 0, E₄₈ = 2E N (6) Δt = 0 means that the detection voltage e₇ is equal to the peak value of triangular wave voltage e₆. In this case, the output voltage E N does not fall and the current I H is zero. When Δt ≒ Tr, E₄₈ = 2(E₂ + E N ) (7) where, E₂ is the positive component of the waveform of voltage e₂ as shown in Figure 7(h). When Δt coincides with the flyback time Tr in Figure 6, the first output voltage e₂ is doubled and supplied to the high voltage coil 12. The voltage multiplying rectifier circuit 42 functions as the voltage doubling circuit. Generally, E₂ is approximately 10E N and E N is nearly negligible. Thus, as Δt varies from 0 to Tr, the voltage to be supplied to the high voltage coil 12 varies from 0 to 2E₂ (actually, from 2E₂₂ to 2(E₂₂ + E₂)), and the output voltage E H is fully controlled. In the present invention, if the maximum load variation of output voltage E H is defined as ΔE H and the voltage multiplying rectifier circuit 42 is adapted for n times, it is preferable that the condition given below is satisfied. nE₂ ≧ ΔE H (8) In this case, the voltage E₂ is as shown below. E₂ = (1/n) ΔE H (9) The number of turns of winding of the additive voltage generating coil 21 should be determined so that said voltage E₂ is produced at the first output tap 24 of said coil 21. In the circuit shown in Figure 6, since the voltage multiplying rectifier circuit 42 is adapted to the doubled voltage (n = 2), the condition of 2E₂ ≧ ΔE H is satisfied. The count of turns of winding of the coil 21 is determined to satisfy E₂ = (1/2) ΔE H . In some cases, it is necessary to supply an output current for circuit operation even when the output voltage E H becomes large beyond the range of compensation. In this embodiment, the object is achieved by providing the diode 50 in which the anode is connected to the ABL and the cathode is connected to the connection of the cathode of the first diode 43 and the anode of second diode 44. Figure 11 shows another preferred embodiment of the present invention. The same parts as those in Figure 6 are given the same symbols and the description is omitted. The reference voltage generating circuit 3 comprises the control voltage generating coil 31, rectifier 60, square wave output circuit 61, fixed resistor 62 and integration circuit 36. The square wave output circuit 61 comprises the amplifier 35 and the clipping circuit 63. The control voltage generating coil 31 is mounted on the core 10 of flyback transformer 2 while being insulated from other coils and generates the control voltage e₁₂ of the flyback pulse waveform. The high potential side (winding end side) of this control voltage generating coil 31 is connected to the reference potential (grounding in the figure) and the low potential side (winding start side) of said coil 31 is connected to the minus terminal of the amplifier 35 through the fixed resistor 62. The plus terminal of the amplifier 35 is connected to the reference potential (grounding in the figure) and the diode 60 is connected between the plus terminal and the minus terminal of the amplifier 35 with the minus terminal connected to the cathode. If the input terminal of the amplifier 35 is formed by the base of the transistor, the diode 60 is unnecessary since the input waveform is rectified by the equivalent diode between the base and the emitter of that transistor. Said diode 60 rectifies the voltage e₁₂ produced at the control voltage generating coil 31 to cut off the negative component and inputs only the positive component of voltage e₁₂ to the inversion input terminal, that is, the minus terminal of the amplifier 35. The amplifier 35 amplifies this input voltage and the output obtained to the clipping circuit 63. The clipping circuit 63 clips the top portion of the voltage waveform amplified by said amplifier 35, produces the voltage e₁₃ of a square wave the pulse width of which is the flyback time Tr as shown in Figure 12(b) and supplies this voltage to the integration circuit 36. This integration circuit 36 integrates said square wave voltage e₁₃ over the period of flyback time Tr to generate a waveform which has the minimum value at the beginning point of the flyback time and the peak value at the end point of the flyback time and rises to the right side as shown in Figure 12(c). In this case, the integration is not carried out in the range exceeding the flyback time Tr and therefore the voltage e₁₅ of triangular wave (sawtooth waveform) which is declined from the peak point to the right side due to discharging from the capacitor of the integration circuit and peaked at the end point of flyback time Tr as a whole is produced. This triangular waveform of the voltage maintains a fixed shape in any flyback time Tr. This triangular wave voltage e₁₅ is supplied to the second input terminal of the comparison amplifier 22. The comparison amplifier 22 compares the triangular wave voltage e₁₅ and the detection voltage e₇ supplied from the variable resistor V R1 of said voltage detector 9 (Figure 12(c)) and supplies the control signal having the voltage which is a zero voltage only for the Δt range (t₃ ∼ t₅ range and t₇ ∼ t₉ range in the figure) where the triangular wave voltage e₁₅ exceeds the detection voltage e₇ and a positive voltage of a fixed level in the other time range including the scanning time to the inversion amplifier 64. And the output signal e₁₈ whose positive and negative polarities are inverted by the inversion amplifier 64 is supplied to the switching circuit 23. The switching circuit 23 comprises a drive transistor 56, a drive transformer 51 and a control transistor 40. The base drive transistor 56 is connected to the output terminal of inversion amplifier 64 and the emitter of said transistor 56 is connected to the reference potential line as well as one-side terminals of the resistor 57 and the capacitor 58 and the negative side of the drive power supply 54. Other terminal sides of said resistor 57 and said capacitor 58 are commonly connected to the cathode of diode 59 and the anode of said diode 59 is commonly connected to the collector of drive transistor 56 and the high potential side (winding end side) of the primary coil 52 which forms the drive transformer 51. These resistor 57, capacitor 58 and diode 59 form the snapper circuit. The low potential side (winding start side) is connected to the positive side of the drive power supply 54 through the resistor 53. Meanwhile, the low potential side (winding start side) of the secondary coil 55 of the drive transformer 51 is connected to the base of the control transistor 40 and the high potential side (widing end side) of said coil 55 is commonly connected to the emitter of control transistor 40 and the anode of diode 41. The emitter of said transistor 40 serves as the output terminal of the switching circuit 23 and is connected to the input terminal of the voltage multiplying rectifier circuit 42. The collector of the control transistor 40 and the cathode of diode 41 are connected to the output tap 24 of the additive voltage generating coil 21. The low potential side of the additive voltage generating coil 21 is connected to the ABL through the input tap 19. This switching circuit 23 supplies the pulse voltage e₂₂ shown in Figure 12(j) to the voltage multiplying rectifier circuit 40 when the control signal e₁₇ has a zero voltage, in other words, the output signal e₁₈ from the inversion amplifier 64 has a positive voltage. The transistor 66 serving as the switching control circuit is connected to the input terminal of the switching circuit 23. The base of transistor 66 is connected to the negative input terminal of said amplifier 35 and the emitter of said transistor 66 is connected to the emitter of drive transistor 56, and the collector of transistor 66 is connected to the base of drive transistor 56. The following describes the operation of the switching circuit. Since the detection voltage e₇ is larger than the triangular wave voltage e₁₅ in the time t₁ ∼ t₃ of the flyback time Tr even though the detection voltage e₇ is smaller than the peak value of triangular wave voltage e₁₅, the inversion amplifier 64 applies the zero voltage e₁₈ to the base of drive transistor 56. Consequently, said drive transistor 56 is turned off and the collector voltage e₂₀ of drive transistor 56 (Figure 12(g)) becomes a positive voltage. Accordingly, a sufficient amount of current does not flow from the drive power supply 54 to the primary coil 52 of the drive transformer 51, and the base voltage e₂₁ of the control transistor 40 (Figure 12(h)) comes to have a low potential and therefore the control transistor 40 is turned off. Accordingly, the additive voltage e₂₂ is supplied from the additive voltage generating coil 21 to the voltage multiplying rectifier circuit 42. (Figure 12(j)) Since the detection voltage e₇ is smaller than the triangular wave voltage e₁₅ in the time t₃ ∼ t₄ of the flyback time Tr, the waveform of control signal e₁₇ falls at t₃ to have a zero voltage and accordingly the inversion amplifier 64 supplies the positive voltage e₁₈ to the base of the drive transistor 56. Consequently, said drive transistor 56 turns on and the current flows from the drive power supply 54 to the primary coil 52. A positive pulse e₂₁ is supplied to the base of control transistor 40 through the secondary coil 55 and said control transistor 40 turns on. In this case, a flyback pulse e₂ of approximately 1000V (Figure 12(i)) is generated at the output terminal of the additive voltage generating coil 21 and this additive voltage e₂ is applied from the output tap 24 to the collector of the control transistor 40. Accordingly, the transistor 40 turns on in the time t₃ ∼ t₄ (Δt₁ time) and the waveform component e₂₂ of additive voltage e₂ in that period of time (Figure 12(j)) is applied from the emitter of said control transistor 40 to the voltage multiplying rectifier circuit 42. In the time t₄ ∼ t₅, the control signal of e₁₅>e₇ is establiched as in case of said range t₃ ∼ t₄. However, the time t₄ ∼ t₅ is included in the scanning time and therefore the transistor 66 turns on, a negative voltage component E N of additive voltage e₂ is applied to the collector of control transistor 40 and said control transistor 40 turns off. Accordingly the voltage e₂₂ applied from the emitter of transistor 40 to the voltage multiplying rectifier circuit 42 becomes zero. In the time t₅ ∼ t₆, the relationship of e₇>e₁₅ is obtained, the drive transistor 56 and the control transistor 40 are turned off and the voltage e₂₂ applied to the voltage multiplying rectifier circuit 42 becomes zero. As described above, when the detection voltage e₇ is between the minimum voltage and the peak value voltage of triangular wave voltage e₁₅, the switching circuit 23 operates only for Δt time to apply the additive voltage e₂₂ to the voltage multiplying rectifier circuit 42. In this case, the duration of Δt₁ time becomes longer and the operation time of the circuit 23 becomes longer as the output voltage E N becomes lower, and accordingly, the voltage e₂₂ applied to the voltage multipying rectifier circuit 42 becomes larger. When the detection voltage e₇ is equal to or larger than the peak value of triangular wave voltage e₁₅, in other words, the output voltage E N does not fall, the triangular wave of voltage e₁₅ and the waveform of voltage e₇ do not intersect each other and therefore a pulse of control signal e₁₇ is not generated and said signal e₁₇ shows a positive fixed level voltage over the flyback time Tr to the scanning time T H . Consequently, the output voltage e₁₈ from the inversion amplifier 64 becomes zero and the drive transistor 56 and the control transistor 40 are turned off and the additive voltage e₂₂ is not applied to the voltage multiplying rectifier circuit 42. When the detection voltage e₇ is lower than the minimum voltage of the triangular wave of the triangular wave voltage e₁₅, the control signal e₁₇ comes to have a zero voltage over the overall period of the flyback time and the scanning time. On the other hand, the voltage e₁₉ is as shown in Figure 12(f) and therefore the transistor 66 is turned off in the flyback time Tr and the peak value component E₂ of flyback pulse e₂ is applied to the voltage multiplying rectifier circuit 42. The operation of the transistor 40 of the switching circuit 23 is automatically turned off since the collector voltage becomes a negative voltage E N when the scanning time starts even if the voltage e₂₁ is supplied to the base of said transistor 40. Figure 13 shows a further preferred embodiment obtained by improving the embodiment shown in Figure 11. Accordingly, the same parts as those shown in Figures 6 and 11 are given the same symbols and the description is omitted. The switching control circuit 67 comprises the first transistor 66, second transistor 68 and differentiation circuit 69. The collectors of both transistors 66 and 68 are commonly connected to the base of said drive transistor 56 and the emitters of both transistors 66 and 68 are commonly connected to the emitter of said drive transistor 56. The base of the first transistor 66 is connected to the negative input terminal of said amplifier 35 and the base of the second transistor 68 is connected to the output end of the clipping circuit 63 through the differentiation circuit 69. The discharging circuit 70 comprises the diode 71 and the resistor 72. One end of resistor 72 is connected to the low potential terminal 19 of the additive voltage generating coil 21 and the other terminal is connected to the anode of diode 71. The cathode of diode 71 is connected to the emitter of control transistor 40. The following describes the operation of the control transistor 40 when the transistor 68 of switching control circuit 67 operates. The differentiation circuit 69 differentiates the output voltage e₁₃ from the clipping circuit 63 and applies the differential output e₂₃ shown in Figure 14(k) to the base of the second transistor 68. The second transistor 68 turns on when the voltage e₂₃ exceeds the operating voltage V BE between the base and the emitter as shown in Figure 14(m). This ON time is the time from the beginning of the flyback time Tr to Δt BE . When the transistor 56 turns on, the drive transistor 56 is turned off and the control transistor 40 is turned off. On the other hand, when the Δt BE time expires, the voltage e₂₃ falls below E BE , the second transistor 68 is turned off, the drive transistor 56 turns on, the pulse current I B flows in the base of control transistor 40 (Figure 14(n)), and said transistor 40 is turned on for a fixed time t c . Consequently, the voltage of the hatched part of the additive voltage e₂ (Figure 14(1)) corresponding to the time t c is supplied to the voltage multiplying rectifier circuit 42. Thus, if the control transistor 40 is turned on by shifting the rise timing Δt BE where the control transistor 40 is turned on, by the output voltage e₂₃ of the differentiation circuit 69, a large additive voltage e₂₂ can be supplied to the high voltage coil through the voltage multiplying rectifier circuit even when a common small drive transformer 51 is used and such problems as heat generation etc. resulting from increasing the capacity of said drive transformer 51 can be effectively solved. In this case, the control transistor 40 is not kept on for the overall period of flyback time Tr and is kept off for the time during which the second transistor 68 is kept on and therefore the maximum time for which the control transistor 40 can be kept on is limited to Δt₃ shown in Figure 14. Thus, by limiting the ON time of the control transistor 40, heat generation from the said transistor 40 and said drive transformer 51 can be reduced and power consumption can be saved, and an object for stabilizing the output voltage E H can be achieved by the drive transformer 51 of a smaller capacity. The following describes the operation of the discharging circuit 70. Generally, the control transistor 40 is turned off when the screen of the cathode-ray tube suddenly changes from a bright picture to a dark picture, in other words, the output current changes from an approximate maximum value to zero. When the control transistor 40 is turned off, electric charge on the second capacitor 47 and the third capacitor 48 of the voltage multiplying rectifier circuit 42 is immediately discharged through the high voltage coil 12 but the first capacitor 46 is charged with the anode of diode 45 to be plus in Figure 14 and therefore a disadvantage that the discharging route for electric charge is closed occurs. If the discharging route is thus closed, the first capacitor 46 remains charged with the maximum voltage and the sum of the maximum charged voltage and the additive voltage e₂ is applied to the control transistor 40 and a voltage larger than a reverse withstand voltage is applied to the control transistor 40 to result in a problem of breakage of said transistor 40. The discharging circuit 60 is provided to prevent such problems. In other words, provision of this discharging circuit 60 allows quick discharging of electric charge on said first capacitor 46 through the route passing through the resistor 72, diode 71, first capacitor 46, and third diode 45 in sequence when the control transistor 40 is turned off. The current flows in said discharging circuit 60 in both periods of the flyback time and the scanning time and the power loss at the resistor due to the flow of this current is somewhat a problem. In the flyback time, however, even if the resistance value of the resistor 72 is set to 50kΩ, the impedance of the voltage multiplying rectifier circuit 42 is more than 100MΩ when the control transistor 40 is turned off and, for this reason, the resistance value of resistor 72 is sufficiently smaller than the corresponding impedance and power consumption by the resistor 72 can be almost ignored. On the other hand, the current flows through the diode 41 in the scanning time. In this case, when the peak value of additive voltage e₂ generated by the additive voltage generating coil 21 is approximately 1000V, the negative voltage component E N of voltage e₂ is approximately 100V and, when the resistance value of resistor 72 is 50kΩ, the power loss at said resistor 72 is small as approximately 0.2W which is negligible. As described above, when output current I H flows and the output voltage E H falls, the additive voltage corresponding to the fall of the output voltage E H is supplied to the high voltage coil through the voltage multiplying rectifier circuit and a voltage corresponding to the fall of voltage is replenished to the high voltage coil and thus the output voltage is stabilized and the picture distortion can be prevented effectively. The operation of the control transistor which replenishes the additive voltage to the high voltage coil is carried out in the flyback time of the horizontal deflection cycle and accordingly there is no fear of switching noise of the switching circuit which appears on the picture.

Claims: A high voltage generating apparatus for television equipment to supply a high voltage to an anode (16) of a cathode-ray tube (15), comprising (a) a flyback transformer (2) which is provided with a low voltage coil (11) and a high voltage coil (12) on a magnetic core (10), which boosts a flyback pulse to be supplied to said low voltage coil (11) and generates a high voltage, (b) an additive voltage generating coil (21) which is mounted on said magnetic core (10) to generate an additive voltage, (c) a reference voltage generating circuit (3) which generates an inclined voltage in a flyback time of a horizontal deflection cycle, said circuit (3) including a control voltage generating coil (31) which is mounted on said magnetic core (10), (d) a voltage detector (9) which detects a rectified output voltage of said high voltage coil (12) and obtains a detection voltage, (e) a comparison amplifier (22) which compares said inclined voltage and said detection voltage and outputs a control voltage with a pulse width corresponding to a time when said inclined voltage is larger than said detection voltage, (f) a switching circuit (23) which has a drive transistor (37,56) which operates with said control voltage and a control transistor (40) which operates in dependence upon the operation of said drive transistor (37) and outputs an additive voltage of said additive voltage generating coil (21), and (g) a voltage multiplying rectifier circuit (42) which is connected between said high voltage coil (12) and said switching circuit (23) and rectifies and multiplies said additive voltage by a factor N (N is an integer lager than 1). A high voltage generating apparatus for television equipment in accordance with Claim 1, wherein said reference voltage generating circuit (3) comprises a square wave output circuit (35,61) which outputs a square wave voltage based on a control voltage generated by a control voltage generating coil (31) and an integration circuit (36) which integrates a square pulse voltage output from said square wave output circuit (35,61). A high voltage generating apparatus for television equipment in accordance with Claim 2, wherein said square wave output circuit (61) comprises an amplifier (35) and a clipping circuit (63). A high voltage generating apparatus for television equipment in accordance with claim 2, wherein a series circuit of a capacitor (32) and a resistor (33) is connected between both terminals of the control voltage generating coil (31) to form an oscillation circuit. A high voltage generating apparatus for television equipment in accordance with Claim 2, wherein said control voltage generating coil (31) is provided with a rectifier (34) for rectifying a control voltage generated. A high voltage generating apparatus for television equipment in accordance with Claim 2, wherein said square wave output cicuit (35,61) outputs a square pulse with a pulse width almost qual to the flyback time and said integration circuit (36) integrates said pulse for said flyback time. A high voltage generating apparatus for television equipment in accordance with Claim 1, wherein said switching circuit (23) comprises a drive transistor (37) the emitter of which is connected to a reference voltage terminal and the base of which is connected to an output terminal of said comparison amplifier (22) and a control transistor (40) the collector of which is connected to said additive voltage generating coil (21), the emitter of which is connected to an input terminal of said voltage multiplying rectifier circuit (42) and the base of which is connected to the collector of said drive transistor (37) through a bias circuit (38). A high voltage generating apparatus for television equipment in accordance with Claim 1, wherein said switching circuit (23) has a drive transistor (56) for entering a control signal to the base, a control transistor (40) the collector side of which is connected to an output terminal of said additive voltage generating coil (21) and a drive transformer (51) for regulating a drive output of said drive transistor (56) and supplying said regulated output to said control transistor (40), a terminal of the primary coil (52) of said drive transistor (56) and the other terminal of said primary coil (52) being connected to the emitter of the drive transistor (56) through a drive power supply (54), and a terminal of the secondary coil (55) of said drive transformer (51) being connected to the emitter of the control transistor (40) and the other terminal of said secondary coil (55) being connected to the base of said control transistor (40). A high voltage generating apparatus for television equipment in accordance with Claim 1, wherein a switching control circuit (66,67) which is connected to the base of said drive transistor (37,56) to control the operation time of Said switching circuit (23) is provided. A high voltage generating apparatus for television equipment in accordance with Claim 9, wherein said switching control circuit includes a transistor (66) the collector of which is connected to the base of the drive transistor and the base of which is connected to a negative input terminal of the square wave output circuit (35,61). A high voltage generating apparatus for television equipment in accordance with Claim 9, wherein said switching control circuit (67) includes the second transistor (68) the collector of which is connected to the base of the drive transistor (56) and the base of which is connected to an output terminal of the square wave output circuit (35,61) through a differentiation circuit (69). A high voltage generating apparatus for television equipment in accordance with Claim 1, comprising a discharging circuit (70) which is connected to an input terminal and a reference potential terminal of the voltage multiplying rectifier circuit (42). A high voltage generating apparatus for television equipment in accordance with Claim 12, wherein said discharging circuit (70) comprises a series circuit of a diode (71) and a resistor (72).

Inventors: IKEUCHI, HIROSHI, IMAMURA, NOBUAKI
Applicants: MURATA MANUFACTURING CO., LTD.
Application year: 1988
Main classification: H04N3
IPC codes: H04N3, G05F1