Method of manufacturing a semiconductor device having a trench isolation region,

Abstract: The present invention provides a method of manufacturing a semiconductor having a trench region (25, 55). After an etching process for forming a trench region (25, 55) in a substrate (23, 53), the corners of the trench region are covered with a polycrystalline layer (27, 57). The structure is subjected to an oxidation treatment. As the polycrystalline layer covers the corners roundly, the corners are oxidized roundly. As a result, semiconductor islands (302, 502) having rounded corners are achieved.

Description: This invention concerns a method of manufacturing a semiconductor device. More particularly, this invention relates to a method of forming an improved trench region for the purpose of isolation of semiconductor elements formed in a semiconductor substrate. Conventionally, a trench method using trenches filled with a dielectric material and a polycrystalline silicon layer is used for the separation of semiconductor elements. Fig. 1 shows an example of a conventional trench method. At first, an insulating layer 3 of sufficient thickness to serve as a mask layer for a following etching process is formed on the surface of the epitaxial growth layer 2 of P type (or N type) formed on the semiconductor substrate 1 of N type (or P type). The insulating layer 3, e.g., a silicon oxide layer, is selectively removed by conventional photo-etching techniques to expose the surface of the layer 2 where a trench region is to be formed, as shown in Fig 1A. Next, an etching process is carried out to form trench regions 5 using the insulating layer 3 as the mask. The depth of the trench regions 5 is chosen approximately equal to the depth of an isolation region to be formed. In this condition, an ion-implantation process, using dopant of the same conductivity type to the substrate 1, is carried out to form a channel stopper region (not illustrated) beneath the trench region to reduce a parasitic MOS effect. Next, an oxidation treatment is carried out to form an insulating layer 4 , e.g., a silicon oxide layer, for the purpose of protection and partial filling of the trench regions 5 . Next, a polycrystalline layer is formed to fill and cover the trench regions 5 , completely. Next, an etching process is carried out to remove any excess polycrystalline layer above the top of the trench regions 5(FIG 1C) . Then, an oxidation treatment is carried out to form an insulating layer 7 on the top surface of the polycrystalline layer 6 to get a flat surface as shown in FIG 1D . In this way, insulated island regions 201 , 202 and 203 are achieved. In this conventional process, at the formation of the thick insulation film 4 , e.g., between 8000 nm (8,000Å) and 1000 nm (10,000Å), great stress is applied to the corner of the trench region 5 . In particular, since the corners are sharp, stress concentration occurs at the corners. This stress causes crystal defects 19 in the island regions 201 , 202 and the substrate 1 , as shown in FIG 1E . To reduce the stress during the formation of the thick insulating layer, another process using a thin insulating film has been used. FIG 2 shows an example using a thin insulating film 12 , e.g., less than 200 nm (2000Å). FIG 2A shows a state after the formation of insulated island regions 11 and 14 . However, in the case where a thick insulating layer 16 , such as a field oxide layer, is successively formed, wedge-shaped insulating regions are formed at the corners of the island regions 11 and 14 , as illustrated by numeral 17(FIG 2B) . Thus, stress is applied to the corners of the epitaxial layers 11 and 14 , and crystal defects also are created. FIG 3 shows an improved conventional process to reduce the stress concentration at the corners of the trench region by rounding the corners thereof. After forming the trench region in a semiconductor substrate 20 as illustrated in FIG 3A , an insulating layer 21 is formed, as illustrated in FIG 3B . Next, the insulating layer 21 is removed, as illustrated in FIG 3C . As the insulating layer 21 is formed by the reaction of oxygen diffused into the substrate 20 with the material, e.g., silicon, of the substrate 20 , the boundary between the insulating layer 21 and the substrate 20 is determined by the profile of the diffused oxygen. As the constant density line of the diffused oxygen at the corners is round, the formation of a rounded corner would be expected. However, at the formation of the insulating layer 21 , stress is also applied to the substrate. The more the stress is applied, the slower the growth rate of the insulating layer becomes. As the stress concentration occurs at the corners, the growth rate of the insulating layer at the edge of the corners is slower than that at other portions. As a result, a sharp portion is formed at the corner of the trench region, as illustrated in FIG 3D . This process is also insufficient to round the corner. In the case where a trench capacitor( not illustrated) is formed in the trench region, the sharp portion causes a concentration of the electric field . It is known from US-A-4 621 414 to form a polycrystalline layer only partially filling a trench and rounding the corners of said trench and to partially oxidise the layer. It is also known to completely oxidise but not remove such a layer, as described in US-A-4 666 556. The formation of a trench in a semiconductor device comprising two substrates sandwiching an intermediate layer is described in Technical Digest of International Electron Devices Meeting, 1986 Dec. 7-10, 1986, pp 210-213. Accordingly, an object of this invention is to provide a method for effectively rounding the corner of the trench region. Thus, the present invention provides a method of manufacturing a semiconductor device having a trench isolation region, comprising the steps of: preparing a semiconductor substrate having a surface; forming a trench region in said surface of the substrate, having corners at the intersections of said trench region with said surface; forming a polycrystalline layer over said surface covering the corners of, and only partially filling said trench region, totally oxidizing the polycrystalline layer converting said polycrystalline layer into the oxidised layer, thereby rounding the corners of said trench region by oxidation and only partially filling the trench region, characterized by removing the oxide layer, thereby leaving said trench with rounded corners. As the corners of the trench region are rounded, a thick insulating film can be formed without causing stress concentrations towards the corners of the trench region. Furthermore, the rounded corners reduce the electric concentration when a trench capacitor is formed at the trench region. Thus, the break down voltage of the trench capacitor is increased. Embodiments of the invention will now be described in more detail and by way of example only with reference to the accompanying drawings, In which : - Figs. 1A to 1D are cross-sectional views sequentially illustrating the steps of one conventional process, and Fig lE is a partial enlarged cross-sectional view of Fig 1D. Figs 2A and 2B are cross-sectional views sequentially illustrating the steps of another conventional process. Figs 3A to 3C are cross-sectional views illustrating the steps of another conventional process, and FIG 3D is an enlarged cross-sectional view illustrating the corners of the trench region. FIGS 4A to 4F are cross-sectional views sequentially illustrating the steps of an embodiment of the invention. An embodiment of this invention is illustrated in FIGS 4A to 4F . At first, a semiconductor substrate 24 of a first conductivity type, e.g., P type or N type is prepared. On the semiconductor substrate 24 , an epitaxial layer 23 of a second conductivity type, e.g., N type or P type, is formed. The thickness of the epitaxial layer is chosen, e.g., between 1 to 2 µm. Next, an insulating oxide layer 22 is formed by conventional oxidation treatment. The insulating layer 22 is partially removed to selectively expose the surface of the epitaxial layer 22 , as illustrated in FIG 4A , using a photo-etching process. Next, an etching process is carried out to form trench regions 25 , as shown in FIG 4B . The depth of the trench region is chosen approximately equal to the depth of an isolation region to be formed. In this etching process, it is preferable to use a dry etching process such as reactive ion etching (RIE) using the remaining insulating layer 22 as a mask, rather than a wet etching process using, e.g., HF and HNO 3 , so as to prevent side etching. Next, the remaining insulating layer 22 is removed. Then a polycrystalline layer 27 is deposited over the surface by chemical vapor deposition (CVD). In this case, because of the property of the polycrystalline layer of covering the corner roundly, the corner of the trench region after the formation of the polycrystalline layer 27 becomes round. To get a good coverage of the polycrystalline layer at the corners of the trench region 25 , a low pressure CVD(LPCVD), e.g., under a reduced pressure of about 19,99 Pa (150m Torr), is preferable. The thickness of the polycrystalline layer 27 should be chosen considering the width of the trench region 25 . For example, when the width of the trench region 25 is between 1 and 1.5 µm, the thickness of the polycrystalline layer 27 is selected between a few hundred Å and 300 nm (3,000 Å). Next, an oxidation treatment is carried out to convert the polycrystalline layer 27 into an insulating oxide layer 28 to fill partially the trench regions 25 , as shown in FIG 4D . In the case where the insulating oxide layer 28 fills the trench regions 25 completely, great stress occurs within the trench regions 25 . Therefore, great stress is applied to the epitaxial layer 23 from the side thereof. Thus, it is preferable to fill the trench regions 25 partially with the insulating oxide layers 28 . In this step, a part of the substrate 24 and the epitaxial layer 23 is also oxidized. As the corners of the trench region are covered roundly with the polycrystalline layer 27 , the stress concentrations at the corners during the formation of the insulating oxide layer 28 are reduced. Thus, the oxidation of the corners of epitaxial layer 23 , during the oxidation process of the polycrystalline layer 27 , is done substantially according to the oxygen profile diffused into the epitaxial layer 23 . As the oxygen profile at the corners of the epitaxial layer 23 is round, the corners of the epitaxial layer after the oxidation become round. Then, the insulating oxide layer 28 is removed by an etching process, e.g., wet etching using HF etchant, as shown in FIG 4E . As the corners of the epitaxial layer 23 are oxidized roundly, the shape of the corners after the removal of the insulating oxide layer 28 is round. Next, oxidation treatment is carried out to form an insulating oxide layer 29 serving as a protection layer of the trench region 25 and as a field oxide layer. In this oxidation treatment, as the corners of the epitaxial layer 23 are round, the stress towards the corners at the oxidation treatment is reduced. Thus, the corners are oxidized roundly in accordance with the profile of the oxigen diffused into the epitaxial layer 23 without causing stress concentrations at the corners. The thickness of the insulation layer 29 is chosen between 800 and 1000 nm (8,000 and 10,000 Å), for example. Next, a polycrystalline layer of sufficient thickness to fill the trench region is deposited by a CVD process. It is preferable to choose a thickness of the polycrystalline layer of more than 1.2 to 1.5 times the width of the trench region after the formation of the insulating oxide layer 29 to obtain a flat surface. Next, an etching process, e.g., a plasma etching process, is performed to remove the excess polycrystalline layer over the insulating layer 29 . Next, an oxidation treatment is carried out to form an insulating oxide layer 31 at the surface of the polycrystalline layer 30 , as shown in FIG 4H . In this way, epitaxial island regions 301 , 302 and 303 are achieved. Successively, circuit elements are formed in these island regions (not illustrated).

Claims: A method of manufacturing a semiconauctor device having a trench isolation region, comprising the steps of : preparing a semiconductor substrate (23,24) having a surface; forming a trench region (25) in said surface of the substrate (24) having corners at the intersections of said trench region (25) with said surface; forming a first polycrystalline layer (27) over said surface covering the corners of, and only partially filling said trench region (25); and totally oxidizing said polycrystalline layer (27) converting said polycrystalline layer into an oxidized layer (28) thereby rounding said corners of the trench region (25) by oxidation and only partially filling said trench region (25); characterized by removing the slide layer thereby leaving said trench with rounded corners. A method as claimed in claim 1, characterised by comprising the additional steps of: forming an insulating layer (29) to fill partially said trench region (25) having rounded corners; and forming a second polycrystalline layer (30) over said insulation layer (29) to fill said trench region (25) completely. A method as claimed in any preceding claim, characterised in that the step of forming said first polycrystalline layer (27) includes the step of low pressure chemical vapor deposition. A method as claimed in any preceding claim, characterised in that the step of forming said trench region (25) includes the step of anisotropic etching.

Inventors: KINOSHITA HIROSHI, MIYASHITA NAOTO, SONOBE HIRONORI, TAKAHASHI KOUICHI, KINOSHITA, HIROSHI, MIYASHITA, NAOTO, SONOBE, HIRONORI, TAKAHASHI, KOUICHI, KINOSHITA, HIROSHI C/O PATENT DIVISION, MIYASHITA, NAOTO C/O PATENT DIVISION, SONOBE, HIRONORI C/O PATENT DIVISION, TAKAHASHI, KOUICHI C/O PATENT DIVISION
Applicants: TOSHIBA KK, KABUSHIKI KAISHA TOSHIBA
Application year: 1988
Main classification: H01L21
IPC codes: H01L27, H01L21