A METHOD OF DEMULTIPLEX PROCESSING OF INFORMATION AND EQUIPMENT FOR PERFORMING THE METHOD

Abstract: A method in the reception of a group of information signals and a receiver for use in the performance of the method, where the information signals are transmitted serially and propagate in a receiver along a first energy propagation path having tabs for respective signals in the group. The information signals are amplified in response to the intensity of the signal received to a predetermined level, and one of the information signals is selected to serve as a combination signal, which is transmitted further on along a second energy propagation path and is combined with at least some of the information signals in the group. Further, the selection may be limited to take place only when a predetermined bit pattern in the group is observed via additional tabs on the first signal propagation path and when a predetermined period of time has elapsed since the preceeding selection.

Description: A method of demultiplex processing of information and equipment for performing the method The invention concerns a method of converting a plurality of information signals transmitted in serial form along an energy propagation path to information signals in parallel form. The invention also concerns a receiver for performing the method as well as use of a logic circuit element, in particular in connection with the receiver of the invention. A known method is based on the use of shift registers, where the serial information is entered stepwise with a certain cycle time, and then the register is scanned in parallel when all storage locations are filled. The rate of the serial to parallel conversion is thus restricted partly by the internal time delays of the shift register and partly by the synchronous, cyclic control of the shift register. In another method a plurality of information signals propagating in serial form along an energy propagation path with predetermined mutual distances is converted to information signals in parallel form, in that the energy state at a plurality of locations along the energy propagation path is registered at points of time represent¬ ing the difference between the arrival times of a pair of information signals at a pair of respective locations along the energy propagation path. Such a method is known for example from the USA Patent Specification 3 763 31-8. However, the latter prior art is vitiated by the drawback that an additional transmission line must be available for transmitting a synchronization signal in order for the receiver to receive the information correctly. This means that transmitter and receiver must be adjusted carefully with respect to each other, which excludes coupling of a larger number of transmitters and receivers to a common transmission bus, i.e. a so-called point-to-multipoint system. Another embodiment of this method is known from PCT No. PCT/DK87/00023, where a plurality of flag signals is transmitted on the energy propagation path together with the information signals, and where one of the flag signals is received and initiates the generation and transmission of a detection signal for use in the actuation of detector means, which register the energy state at predetermined locations on the energy propagation path. This embodiment entails that external synchronization is superfluous, which is an advantage in point-to-multipoint systems. However, the receiver, which converts serial information to parallel information, has a number of drawbacks. For example, a noise pulse may be perceived as a flag signal, which causes conversion at a wrong time and has the consequence partly that the receiver passes on a parallel signal of random value, partly that the receiver may be occupied by an error conversion when a serial signal proper arrives. This problem is difficult to avoid because the arriving serial signals have a varying amplitude depending upon the position of the transmitter station, so the receiver must be capable of responding to arriving signals with a somewhat varying amplitude. Therefore, a noise signal may be confused with a signal from a remote transmitter. The varying signal levels are also a problem in the actual detection of the bit pattern in the arriving serial signal since a low level may be confused with a high level, and vice versa. The object of the invention is to provide an improved embodiment of the abo e known methods, it being desirable partly to obtain a timewise well-defined actuation signal, partly correct detection of the bit pattern received. This object is achieved using one of the received signals directly as actuation signal, so that the detection time will be well-defined with respect to the data information, and by observing a number of measures which result in uniform signal levels in the receiver irrespective of the position of the transmitter. This involves amplification of the signal immediately on reception to a predetermined level as well as a specified embodiment of the signal paths in the receiver so that all bits in the received data signal are detected with the same amplitude. Thus, the measures are important for the conversion actuation as well as the amplitudewise precision of detection. Further, the detection means are actuated only when a predetermined bit pattern is observed on reception so in practice the probability of noise signals initiating conversion may be disregarded. When the circuit described in the introductory portion of claim 13 for processing binary information represented by an oscillation or absence of the same, respectively, is used, a new logic family is obtained which involves a large number of advantages, for example that the system will be very noise immune, that the power consumption is very small, and that it is possible to work with heretofore unknown rates. The invention will be explained more fully below with reference to the drawing, in which Fig. 1 shows a known multiplexer/demultiplexer system (PCT/DK87/00023) , Fig. 2 shows a preferred time function for a data signal according to the invention, Fig. 3 shows an embodiment of the demultiplexer Figs. 4-6 show a diagram, a transconductance and truth table for an ASK-ANDgate according to the invention, respectively, Fig. 7 shows an amplitude control circuit according to the invention, Fig. 8 shows an adjustable amplifier according to the invention, Fig. 9 shows a preferred embodiment of the demultiplexer according to the invention, and Fig. 10 shows coupling of several systems to a point to multipoint system with i.a. optical transmission path. Fig. 1 shows an embodiment of a data transmission system according to the prior art. Parallel information from a data processing unit 35 is to be converted to serial information for transmission on an energy propagation path 36 (it is preferred if the energy propagation paths in the system are provided by microstrips) . For this prpose there is provided an energy propagation path 37, which consists of a plurality of microstrip loops, such as loops 38-42, each of which has a tab 43-47, respectively which is connected to holding circuits 53-57, respectively, via respective microwave switches 48-52. The holding circuits 53, 54, 55 contain predetermined information values which, upon transmission, are to represent a flag signal propagating ahead of the actual data signal originating from the unit 35. The microwave switches 48, 49 and 50 are switched on in turn by means of a signal which propagates from the unit 35 via an energy propagation path 61, so that information representing charges will be transferred to the tabs 43, 44 and 45, respectively. These charges will immediately propagate in opposite directions along the energy propagation path 37, so that, according to the superposition principle, a plurality of flag signals will be generated, propagating partly in a direction to a ' rd an amplifier 58, partly toward a reflection-free termination 59. The signal is transferred from the amplifier 58 via a directional coupler 60 to the microstrip 36. It will then be readily appreciated how the parallel information from the unit 35 is converted to serial information, the parallel information being transferred from the unit 35 to the holding circuit 56-57, with the unit 35 generating a control pulse on a microstrip 61, said control pulse propagating toward all the microwave switches. The serial-to-parallel conversion of the signal thus transmitted takes place in that the serial information is transferred from the microwave strip 20 via a directional coupler 21 to an amplifier 22, the directional coupler 21 being reflection-free terminated at 23. The output signal of the amplifier 22 is limited so that signals having a predetermined maximum amplitude are transmitted to an energy propagation path 24, which consists of a plurality of loops, for instance the loops 25 and 26, each of which has a tab, such as 27 and 28, which are connected via respective microwave switches 29 and 30 to holding circuits 31 and 32, respectively. The microwave switches are responsive to a control pulse propagating on a microwave strip 33, which is produced by a circuit 34. The circuit 34 integrates the arriving signal and transmits, upon detect-ion of the first flag signal, a control pulse along the microstrip 33. Since the output signal of the amplifier 22 is limited, the transmission of the control pulse will not be well-defined since the signal is restricted depending upon the size of the original signal so that, the actual integration of the signal in the circuit 34 is thus not a ti ewise reliable basis for the transmission of the control pulse. The control pulse propagates along the microstrip 33 and arrives first at the microwave switch 30 and eventually at the microwave switch 29. Since the microwave switches 48, 49, 50, 51, ...52 are actuated in said order, the generated serial information signal 63, which propagates in the direction indicated by the arrow, will be slightly expanded, corresponding to the propagation time for the pulse of the microstrip 61. When the loops 25, ..26, exhibit uniform signal propagation time, and this corresponds to the propagation time along the loops 38 ...42, the information signals 63 will be transferred exactly on time to the holding circuits 31 ...32 as a result of. the compression caused by the propagation of the pulse on the microstrip 33 with a certain time delay, so that the microwave switch 30 is actuated slightly before the microwave switch 29 is actuated. However, this presupposes that the control pulse propagating along the microstrip 33 is transmitted at the right time. Fig. 2 shows a preferred time function for an information signal which may be processed according to the invention. The modulation form is ASK (ASK: Amplitude Shift Keying), where logic high is represented by a sine wave and logic low by a DC-voltage in the same period. The advantage of this modulation form is that the frequency spectrum is propagating along a centre frequency f which is equal to the transmitted bit rate. This entails that the circuit elements in the system do not have to be capable of coping with all frequences right down to DC, but only have to be capable of transferring signals in the frequency rεq s ion from 0.5 fc to 1.5 fc,' i.e. a band width equal to • ~ - around f . As will be seen from the time function of the ASK signal in Fig. 2, each group of data bits 4-11 is surrounded by a plurality of flag bits, for example so that a fixed frequency of flag bits 1,2 and 3 (here with the values high, low and high) is transmitted before the data bits, and a flag bit 12 (here with the low value) is transmitted after the data bits. As will appear from the following the number of flag bits may be varied just as their logic level may be selected within certain limits, depending upon the physical dimensions of the demultiplexer. Fig. 3 shows a block diagram of an embodiment of the de¬ multiplexer of the invention. The function of this circuit corresponds in principle to what was explained in connection with Fig. 1. The demultiplexer is composed of microstrip transmission lines 101, 105, 108, 122, 126, 127 and 129; microstrip directional couplers 102 and 109-116; microwave amplifiers (MMIC: Monolitic Microwave Integrated Circuits) 103, 104, 106A, 125, 128, 130-137 and 162 , which are commercially available ICs and amplify 10 dB in the relevant frequency region, 0.5 f to 1.5 f where f is equal to the transmitted bit rate;; ASK-AND gates 138-145 ,whose function and structure are described more fully in connection with Fig. 4; amplitude control circuits 107 and 123, whose function and structure are described in connection with fig. 7; adjustable amplifiers 106 and 124 whose function and structure are described more fully in connection with fig. 8; envelope detectors 146-153, comparators 154-161 deciding whether the respective envelope detectors have received an ASK-signal which is logic high; as well as a onostable multivibrator 163. Assuming that a data signal-as shown in Fig. 2 propagates from the left toward the right on the transmission line 101, part of the signal will be decoupled in the directional coupler 102, am ' plified in the amplifiers 103 and 104, and then it is divided in two which are added to the amplitude control circuit 107 and the adjustable amplifier 106, respectively. The microstrip transmission line 105 is used as a delay line, so that the amplitude control circuit 107 will have time to adjust the amplification for the adjustable amplifier 106 before the signal arrives at the input of the amplifier. The delay is of an order corresponding to about half a bit. The amplitude of the flag bit 1 arrived first is thus detected in the amplitude control circuit 107 simultaneous¬ ly with the delay of the signal in the transmission line 105, discontinuation of the amplification of amplifier 106 and amplification of the ASK data signals (flag bit and data bit) to a predetermined level when these pass the amplifier 106. The signal is amplified additionally in the amplifier 106A, and the output signal from this thus has a well-defined peak-peak amplitude provided that the amplitude of the signal originally received is within certain limits. This is important owing to correct demultiplexer function. The data signal then propagates along the transmission line 108 and is decoupled to amplifiers 130-137 through the microstrip directional couplers 109-116. When flag bit 1 arrives at the end of the transmission line 108, the signal splits. One part passes the adjustable amplifier 124, while the other part, after a delay in the transmission line 122 corresponding to about half a bit, actuates the amplitude control circuit 123 and hereby reduces the amplification of the adjustable amplifier 124 (which takes place in terms of time while flag bit 2 passes the amplifier), so that this does not transmit the following bits in the data signal. Flag bit 1 is amplified additionally in the amplifier 125 and passes the first input terminal on a plurality of ASK-AND gates 138-145. The microstrip circuits in the demultiplexer are geometrically so arranged that the respective data bits 4-11 - via the respective directional couplers 116-109 and amplifiers 130-137 - arrive on the other input terminal of the ASK-AND gates while flag bit 1 passes the associated, first input terminal. The data bits 4-11 are thus combined with flag bit 1 in the respective ASK-AND gates 138-145, which will be described in more detail in connection with Figs. 4-6. Assuming that data bit 4 is logic high, a sign wave of the frequency f will be transmitted from the output of the ASK-AND c gate 138. This- signal is detected by detector 146, which transmits a DC signal of about 1 volt. This DC level is detected by a comparator 154, which has a standardized output level and is capable of responding at a rate of about one eighth of f . On its propagation path along the transmission line 126 flag bit 1 is thus combined with data bit 4 in ASK-AND gate 138 with bit 5 in gate 139, with bit 6 in gate 140, ... and with bit 11 in gate 145, so that the DC level of these data bits can be detected on the outputs of the respective comparators 154-161. After the combination, flag bit 1 continues partly upwardly and actuates the amplitude control circuit 107 so that the amplification in the adjustable amplifier 106 will again be maximum, and partly via a delaying transmission line 127 and an amplifier 128 downwardly and actuates the amplitude control circuit 123, so that the amplification in the adjustable amplifier 124 will again be maximum. The microstrip transmission lines are so dimensioned that these events take place simultaneously with flag bi 12 passing the amplifier 106 and the amplifier 124, respectively, following which the de¬ multiplexer is ready .to receive the next data signal. The output signal from the amplitude control circuit 123 is passed further on via a wide-band amplifier 162 to a onostable multivibrator 163 for transmission of a rated RECEIVE signal. The monostable multivibrator 163 has a delay so that the RECEIVE signal is transmitted when all data bits 4-11 are available on the outputs of the comparators 154-161. This delay may optionally be provided in another manner, for example by insertion of a delaying microstrip transmission line between the amplitude control circuit 123 and the amplifier 162. Fig. 4 shows the diagram of an AND gate which may be used For ASK signals. With this gate, logic operations may be performed on RF signals, which provides quite new possibilities of constructing data processing circuits, for example the demultiplexer in question, which operates with heretofore ' unknown rates. The use of ASK modulated RF signals has therefore given rise to the development of a quite new logic family, called RF logic. This logic family has primarily the advantage that the potential working rate is very high - only limited by the MESFET transistors used, which can today operate at about 50 GHz. Another important advantage is that the logic elements only use energy when a logic high level passes (as mentioned before, a high level is defined as a single sine oscillation, while logic low level is defined by a DC level) which reduces the classic heat problems of high rate data processing.Moreover, the use of ASK modulated RF signals has the advantage that the logic elements only have to be capable of transmitting signals in the frequency reg a ion 0.5 fc to 1.5 fc. Noise and interference siq y nals usually range from DC to 1 GHz. At transmission rates for example at fc = 2.4 GHz it will be seen that the used frequency spectrum is above- the frequency spectrum where the greater part of noise and interference signals is present. Then, both the transmitted signals and the logic elements fitted in the receiver will practically not be disturbed by noise and interference signals. The ASK signals used are useful for transmission over long distances on optical cables and on co-axial cables. The circuit in Fig. 4 corresponds■ to the ' AND gates 138-145 in Fig. 3. The function is explained below with reference to Fig. 5, which shows the transconductance for a two-input GaAsMESFET transistor Ql. The AND gate has two inputs 15 and 16 and an output 17. When there is no ASK signal on the input (or if an ASK signal whose logic level is low, i.e. no oscillation, is received on one of the inputs), the drain-source current will be zero. This is obtained in that the inputs are biased with a DC-voltage so that the gate-source DC voltages are so low that the transconduc ance is zero. Thus, with a correct selection of bias a truth table as shown in Fig. 6 may be obtained. This means that only when two sine waves (logic high signal) are received simultaneously on the inputs 15 and 16, will the transistor Ql conduct in part of the positive half period of the signals applied.Owing to the AC coupling (see Fig.4) and the band-pass characteristic of the gate (which transfers signals in the frequency region 0.5 to 1.5 f ),the sine waves - applied to the two inputs 15 and 16 - will be reproduced as a single wave on the output 17. Fig. 7 shows a diagram of an amplitude control circuit which may be used i.a. in the demultiplexer as outlined in Fig. 3 at the reference numerals 107 and 123. The circuit is used for adjusting the amplification of an adjustable amplifier. More generally, within RF logic, the circuit may be used as a converter between RF logic and DC logic since the circuit may be considered as an RS flip-flop where the R and S inputs may be actuated by means of ASK signals, while the output will transmit a corresponding. DC,;s:ignal . It should be mentioned, however, that the output voltage of the circuit varies in proportion to the amplitude of the ASK signal applied to the R and S input, respectively, so that the circuit operates analogously to all signal levels below a certain level. The amplitude control circuit has two inputs 65 and 66 and an output 67. A high logic level ASK signal, received on the input 65, causes C13 to be charged via R13 and CR11 - on condition of a sufficient amplitude, i.e. a zero-to-peak voltage higher than Vbias - so that the output voltage on output 67 is increased. Correspondingly, a logic high ASK signal on input 66 reduces the voltage on the out ut' 67.. The circuit is so dimensioned that it is capable of responding to a single sine ave having the frequency f . ' c Fig. 8 shows an adjustable amplifier intended for use together with an amplitude control circuit. Fig. 3 shows the circuit with reference numerals 106 and 124. The amplifier is constructed around a two-input GaAsMESFET transistor Q21. The signal input is AC coupled via C21 to the first gate on Q21. The DC bias to this gate is supplied via R22. The amplitude control input is connected to. the other gate Q21 which is in turn de¬ coupled by means of C22 and R21. Changes on this other gate on Q21 cause a change in the amplification from signal input to signal output. The amplifier is so dimensioned that the processed frequency region ranges from 0.5 f Fig. 9 shows an improved embodiment of the demultiplexer, where some additional directional couplers 117 and 118 are added on the right side of the transmission line 108, said additional directional couplers serving to decouple flag bits 1 and 3 (both logic high level, see Fig. 2), so that it can be decided with very great certainty that a data signal propagates down through the transmission line 108. Parts of the circuit, which is identical with the circuit in Fig. 3, have the same reference numerals as elements in Fig. 3. Flagbit 1 is first decoupled in the directional coupler 118 and amplified in the amplifier 120. Flagbit 3 is decoupled somewhat delayed with respect to this in the directional coupler 117 and amplified in the amplifier 119. Since the transmission line from the amplifier 120 to the AND gate 121 is longer than from the amplifier 119, flagbit 1 and 3 arrive at the same time in the AND gate 121 in which they are combined to a single sine wave, which arrives at the amplitude control circuit 123 via the transmission line 122 so that the amplification is reduced in the adjustable amplifier 124. The microstrip circuits are so dimensioned that in terms of time this reduction takes place immediately after flagbit 1 has passed the amplifier 124, i.e. while flagbit 2 passes the amplifier (flagbit 2 has logic low level), see Fig. 2). ' The addition of further directional couplers thus reduces the risk of error conversion since a data signal is now recognized at a predetermined combination of flagbits. The rest of the circuit in Fig. 9 corresponds to the circuit described previously in connection with Fig. 3. Fig. 10 shows a communication system using demultiplexers according to the invention. A multiplexer transmits data signals via a directional coupler on the transmission line. The signal may be transmitted between the individual signals via co-axial cables or for example light con¬ ductors. The demultiplexer decouples the signal by means of a directional coupler. It should be mentioned that the demultiplexer scans the data signal while it passes, so that the scanning does not affect the transmission rate since the signal is not delayed. Owing to the transmission form ASK RF signals combined with RF logic, it may be imagined that a demultiplexer scans a signal, adds or changes bits and passes the signal further on, practically without delaying the signal.

Claims: P a t e n t C l a i m s 1. A method in the reception of a group of information signals transmitted serially and propagating in a receiver along a first energy propagation path having tabs for respective signals in the group, c h a r a c t e r i z e d by amplifying the information signals in response to the intensity of the signal received to a predetermined level, and selecting one of the information signals to serve as a combination signal which is transmitted further on along a second energy propagation path and is combined with at least some of the information signals in the group 2. A method according to claim 1, c h a r a c t e r i z e d in that the selection takes place only when a predetermined bit pattern in the group is observed via additional tabs on the first signal propagation tabs and when a pre¬ determined period of time has elapsed since the preceεding selection. - 3. A method according to claim 2, c h a r a c t e r i z e d in that the predetermined period of time is established by means of a delaying signal propagation path. 4. A receiver for performing the method according to claim 1 and comprising a first energy propagation path for information signals, said path having a plurality of tabs for respective information signals and detectors which are connected to respective tabs and are responsive to a trigger signal which is transmitted from a trigger circuit to the detectors in sequence, c h a r a c t e r i z e d in that the trigger circuit is a transmitting circuit which is connected to the first energy propagation path and is adapted to allow a single information signal serving as a combination signal to pass to a second energy propagation path and to block subsequent information signals for a predetermined period of time, and that the first propagation energy path comprises a delay path whose one end is coupled to a microwave transmission line and to an adjusting circuit, and whose other end is connected to the series of signal tabs along the energy propagation path via an adjustable amplifier which is controlled by. said adjusting circuit. 5. Circuit according to claim 4, c h a r a c t e r i z e d in that the predetermined period of time is established by means of a delaying signal propagation path. 6. A circuit according to claim 4 or 5, c h a r a c t e r i z e d by additional tabs on the first energy propagation path, said additional tabs being connected to the trigger circuit which is adapted to transmit the combination signal only when a predetermined bit pattern in the group of information signals is observed via the additional tabs. 7. A circuit according to claims 4-6, c h a r a c t e r i z e. d in that said signal tabs comprise a plurality of evenly distributed directional couplers, each of which is connected to one input of an associated gate circuit, and that the other input of said gate circuit is connected to tabs along the second energy propagation path whose input is connected to the output of the said transmitting circuit. 8. A circuit according to any of claims 4-7, c h a r a c t e r i z e d in that the coupling coefficient for said directional couplers increases in a direction away from ' the adjustable amplifier so that uniform signal amplitudes are obtained. 9. A circuit according to any of claims 4-8, c h a r a c t e r i z e d in that the second energy propagation path is a stepped microstrip which is stepped opposite each tab to the respective gate circuits. 10. A circuit according to any of claims 4-9, c h a r a c t e r i z e d in that the output of the gate circuits is connected to respective resonator and integrating detector circuits. 11.A circuit according to any of claims 4-10, c h a r a c t e r i z e d in that the output end of the second energy propagation path is connected to the adjust¬ ing circuit. 12. A circuit according to any of claims 4-11, c h a r a c t e r i z e d in that the first energy propagation path is provided as a meander line where the first tab and the additional tabs are placed on their respective sides of the meander line. 13. Use of an electric circuit adapted to generate an output signal, serving as binary information, in response to input signals, at least one of said input signals representing binary information, c h a r a c t e r i z e d in that the binary information is represented by a fundamental oscillation, having a frequency corresponding to a bit frequency, and absence of such a fundamental oscillation, respectively, and that the amplitude ' of :tihe fundamental oscillation is within a control voltage range where a semi-conducting component in the circuit exhibits great transconductance. 14. An electric circuit for the use stated in claim 11, said circuit comprising a transistor with two inputs and one output, c h a r a c t e r i z e d in that the inputs are AC coupled and DC-biased, and that the output is AC-coupled and is adapted to support an oscillation at that said bit frequency.

Inventors: BORUP GOTTLOB, PEDERSEN FLEMMING HELSTED, BORUP, GOTTLOB, PEDERSEN, FLEMMING, HELSTED
Applicants: BBN COMMUNICATIONS A S, BBN COMMUNICATIONS A/S
Application year: 1988
Main classification: H04L5
IPC codes: H03G3, H04J3, H04L5