Miniature thermoelectric converters

Abstract: A thermoelectric semiconductor multicouple array comprises a substrate of semi-insulating material 10, alternate n-type and p-type strips or legs ion implanted into said substrate and connected together electrically in series, and terminal means 11 connected to said series-connected strips or legs. The array may be incorporated in an integrated circuit chip. A method of making such thermoelectric semiconductor multicouple arrays is also disclosed.

Description: The present invention relates to miniature thermoelectric converters in the form of thermoelectric semiconductor multicouple arrays which can be employed both for generating electricity when a temperature difference is applied across the thermocouples (generating mode) and for maintaining a temperature stability when a current is passed through them (refrigerating mode). As at present constructed a thermoelectric semi-conductor multicouple array consists of a large number of alternate n-type and p-type semiconductor elements which are joined so as to form junctions. The multicouples are then arranged electrically in series and thermally in parallel so as to form a module. In conventional semiconductor thermocouples electrical power is generated at relatively high values of current and low voltages with the series connection of thermocouples providing the required voltage build-up to operate electronic/electromechanical devices. The power output from a thermocouple is approximately proportional to the cross-sectional area of the thermoelement and inversely proportional to the element length. Consequently in low power generation, elements of small cross-sectional area and with a large ratio of length to cross sectional area are required. However, the brittle nature of thermoelectric semiconductor material prevents it from being machined into sections of less than about 30 thousandths of an inch (.075 millimetres), which limits their length to cross sectional area ratio. The publication SCP and Solid State Technology, Vol. 8, No. 2, February 1965, pages 18-22, New York; G. Abowitz et al. : "Thin Film Thermoelectrics", discloses the idea of a thermoelectric generator for low power generation in electronic circuits. The formation of the generator includes the deposition, as thin films, of alternate n-type and p-type strips or legs by vacuum evaporation onto a substrate to form p-n junctions electrically connected in series. The publication describes the n-type films as comprising doped alloys of Bi₂ Te₃ and Bi₂ Se₃; the p-type films as comprising doped alloys of Bi₂ Te₃ and Sb₂ Te₃; and the substrate as an insulating material, for example, a standard glass microscope slide or a Al₂ O₃ film. JP-A-58 112 377 relates to a semiconductor thermocouple arrangement. One arrangement disclosed comprises a disk formed p-type semiconductor substrate on the surface of which an impurity such as phosphorus is doped, for example, by an ion implantation method, to form a plurality of L-shaped n-type regions which extend radially from a generally central region. A plurality of complementary L-shaped connectors are evaporated onto the substrate between the n-type L-shaped regions. The L-shaped connectors alternate with the L-shaped n-type regions such that the n-type regions are connected in series. The n-type and connector series has connected thereto terminal electrodes via which a resultant thermo electromotive force can be obtained from the arrangement. It is an object of the present invention to provide an improved miniature thermoelectric semiconductor multicouple array and a method for the manufacturing of such an array. The array may consist of several thousand elements with each possessing an extreme length to cross-sectional area ratio. This enables low levels of power to be produced at relatively high voltages. From one aspect the invention provides a thermoelectric semiconductor multicouple array comprising a substrate carrying alternate n-type and p-type strips or legs which form p-n junctions electrically connected in series, and terminal means connected to said series-connected strips or legs, wherein the substrate is of semi-insulating material, and wherein the n-type and p-type strips or legs are ion implanted into the substrate so as to be disposed within the substrate. The invention further provides an integrated circuit chip incorporating such a thermoelectric semiconductor multicouple array. From another aspect the invention provides a method of making a thermoelectric semiconductor multicouple array which comprises providing a substrate with alternate n-type and p-type strips or legs which form p-n junctions electrically connected in series wherein the method includes the steps of forming a surface of a semi-insulating substrate material, ion implanting a first plurality of strips or legs of one conductivity type through a first mask onto said surface, and ion implanting a second plurality of strips or legs of the opposite conductivity type through a second mask onto said surface so that said second strips are disposed alternately between said first strips. Contact members may be applied at the ends of said interconnected strips. The surface of semi-insulating material is preferably a surface of a sheet or wafer of that material and a plurality of such sheets each bearing an array of semiconductor thermocouples may be stacked side-by-side to form a module. A suitable semi-insulating material would be, for example, an undoped semi-insulating semiconductor which when doped n- or p-type by ion implantation exhibits good thermoelectric properties, such as gallium-aluminium-arsenide or silicon germanium alloy strips deposited onto an insulating oxide layer. The invention will now be further described, by way of example, with reference to the accompanying drawings in which:- Figure 1 illustrates diagrammatically a prior art form of thermoelectric semiconductor multicouple array, Figure 2a illustrates diagrammatically one embodiment of device according to the invention, Figure 2b illustrates a stack of devices as shown in Figure 2a; and Figure 3 is a flow diagram illustrating a preferred method of forming thermoelectric semiconductor multicouple arrays according to the invention. Referring to Figure 1 there is shown a known construction of a thermoelectric semiconductor multicouple array comprising a large number of alternate n-type and p-type semiconductor elements or legs joined alternately by conductors 1 so as to form junctions electrically connected in series. The structure forms a module from which an output voltage can be derived via the terminals 2 when a temperature difference is applied across the module. However, such a construction has a relatively poor ratio of length to cross-sectional area for the thermocouple legs typically of the order of one to ten per centimetre. The construction according to the present invention overcomes this difficulty by enabling the thermocouple legs to have a very high ratio of length to cross-sectional area of the order of a thousand per centimetre whereby low power levels at relatively large output voltages can be obtained. On preferred embodiment of the invention is shown in Figure 2 which comprises a substrate sheet 10 of gallium aluminium arsenide in which are ion implanted alternate n-type and p-type strips which are electrically connected in series. Electrical connections 11 are made to the ends of the series-connected strips. In practice several thousand such thermocouple elements having an extreme length to cross-section ratio can be accommodated on a substrate one centimetre square. Back etching of the substrate may be employed to minimise thermal shunting of the active elements. As shown in Figure 2b a plurality of such sheets 10 can be stacked side-by-side to form a module. Figure 3 is a flow diagram illustrating a preferred method of forming thermoelectric semiconductor multicouple arrays according to the invention. A 2 millimetre square substrate sheet 10 of gallium aluminium arsenide or other suitable semi-insulating material has the thermocouple n-type and p-type legs ion implanted thereon through suitable masks which may be produced by computer aided design. Up to 100 thermocouples may be fabricated on a 2 millimetre square gallium aluminium arsenide chip. Three sets of masks are employed, one 12 for use during silicon ion implantation of the n-type legs of the thermocouples, another 13 for use during beryllium ion implantation of the p-type legs of the thermocouples and a further mask 14 for use during the metallisation process of forming the contact pads 15. These may be a deposit of gold/germanium for n-type and of zinc/tin for p-type. The thermocouple legs may have a cross-section of about 2µm by 5µm. As is well known to persons skilled in the art, the electrical connections between the n-type and p-type strips may also be formed by the metallisation process. The method of fabrication according to the invention allows thermocouples to be made with an extreme ratio of length to cross-sectional area enabling relatively large voltages to be generated at relatively low power. Moreover this method of fabrication enables very large numbers of miniature thermocouples to be incorporated in an integrated circuit chip thereby providing a built-in source of electrical power or a temperature stabilising capability.

Claims: A thermoelectric semiconductor multicouple array comprising a substrate (10) carrying alternate n-type and p-type strips or legs which form p-n junctions electrically connected in series, and terminal means (11) connected to said series-connected strips or legs, characterised in that the substrate is of semi-insulating material, and in that the n-type and p-type strips or legs are ion implanted into the substrate so as to be disposed within the substrate. An array as claimed in claim 1, in which the semi-insulating material is a substrate of gallium aluminium arsenide. An array as claimed in claim 1, in which the semi-insulating material comprises silicon germanium strips deposited onto an insulating oxide layer. An array as claimed in claim 2, in which the n-type strips or legs are ion implanted with silicon. An array as claimed in claim 2, in which the p-type strips or legs are ion implanted, with beryllium. An array as claimed in any preceding claim, in which the semi-insulating material is in the form of a sheet or wafer and a plurality of such sheets or wafers each bearing an array of semiconductor thermocouples are stacked side-by-side to form a module. An integrated circuit chip incorporating thermoelectric semiconductor multicouple array as claimed in any preceding claim. A method of making a thermoelectric semiconductor multicouple array which comprises providing a substrate (10) with alternate n-type and p-type strips or legs which form p-n junctions electrically connected in series characterised by the steps of forming a surface of a semi-insulating substrate material (10), ion implanting a first plurality of strips or legs of one conductivity type through a first mask (12) onto said surface, and ion implanting a second plurality of strips or legs of the opposite conductivity type through a second mask (13) onto said surface so that said second strips are disposed alternately between said first strips. A method as claimed in claim 8, including the further step of applying contact members (15) at the ends of said interconnected strips. A method as claimed in claim 8 or 9, in which the surface of semi-insulating material is in the form of a sheet or wafer and a plurality of such sheets or wafers each bearing a said array are stacked side-by-side and interconnected together. A method as claimed in claim 8 or 9, in which the surface of semi-insulating material is part of an integrated circuit chip.

Inventors: ROWE DAVID MICHAEL, ROWE, DAVID MICHAEL
Applicants: BRITISH GAS PLC
Application year: 1988
Main classification: H01L35
IPC codes: H01L35