BANDGAP VOLTAGE REFERENCE CIRCUIT WITH AN NPN CURRENT BYPASS CIRCUIT

Abstract: A temperature compensated bandgap voltage reference circuit employs an npn transistor based bypass circuit to maintain a constant collector current within the reference circuit. This bypass circuit draws a nominal current from the bandgap voltage reference circuit. The value of this current is set by a bias circuit responsive to changes in the supply voltage. As the supply voltage changes, the bias circuit varies the conductance of a bypass transistor to draw more or less current and thereby maintain the collector current within the reference circuit constant.

Description: The present invention is directed to voltage reference circuits, and in particular to bandgap voltage reference circuits for use with emitter coupled logic (ECL) and analog circuits. Most ECL and analog logic gates require an appropriate voltage reference for proper operation. For example, some of these types of circuits require a voltage supply that must be substantially temperature-independent. One type of reference circuit that is typically employed to provide an appropriate voltage level is referred to as a bandgap voltage reference circuit. This circuit is so named because it provides an output voltage that is approximately equal to the bandgap voltage of silicon. To facilitate an understanding of the objectives of the present invention, the details of a conventional bandgap voltage reference circuit will first be described. Referring to Figure 1, a typical reference circuit includes a transistor 10 having an emitter connected to a supply voltage VEE by means of a resistor 12. By way of example, the supply voltage VEE might have a nominal potential of about -4.5 volts relative to a ground potential VCC. The collector of the transistor 10 is connected to the ground potential by means of a resistor 14 and the collector-emitter path of a transistor 16. A diode connected transistor 18 has its common collector/base connected to the base of the transistor 10 by means of a resistor 20. The emitter of the transistor 18 is directly connected to the supply voltage VEE, and its collector/base is also connected to the ground potential VCC by means of a resistor 22 and a transistor 24. Another transistor 26 also has its emitter directly coupled to the supply voltage VEE and its collector connected to the ground potential VCC by means of a voltage divider comprising resistors 28 and 30. The base of the transistor 26 is connected to the collector of the transistor 10. The bases of the transistors 16 and 24 are connected to the junction of the resistors 28 and 30 in the voltage divider. A compensation capacitor 31 is connected between the base and collector of the transistor 26 to provide stable operation. In operation, the transistors 10, 18 and the resistors 12, 22 form a logarithmic current source in which the current density in the emitter of the transistor 10 is less than that of the transistor 18 because of the voltage developed across the resistor 12. The temperature variation of the collector current in the transistor 10 can be suitably adjusted through proper selection of the values for the resistors 12 and 22. The transistor 26 senses the temperature-dependent voltage that is developed across the resistor 14 and controls the current through the voltage divider 28, 30. The divided voltage developed across the resistors 28 and 30 is applied to the bases of the transistors 16 and 24. A temperature compensated output voltage VCS is produced at the emitter of the transistor 24. The output voltage VCS is greater than the supply voltage VEE by an amount equal to the base emitter voltage of the transistor 26 (V BE26 ) plus the voltage across the resistor 14 (V R14 ). Under ideal conditions, any change in the supply voltage VEE should result in a corresponding change in the output voltage VCS. In other words, the value (VEE - VCS) should always remain constant. In practice, however, this condition does not occur with the circuit shown in Figure 1. For example, if the supply voltage VEE becomes more negative, to increase the absolute value of VEE - VCC, this increase in voltage develops across the resistor 30, causing an increase in current through this resistor. This condition causes a corresponding increase in the collector current of the transistor 26, resulting in an increase in its base-emitter voltage (V BE26 ). Since the output voltage VCS is dependent upon V BE26 , the difference between the supply voltage VEE and the output voltage VCS will not remain constant. For example, at room temperature the ratio of the change in VCS to the change in VEE might be around 0.98. Ideally, this ratio should be 1. To overcome this problem, the collector current in the transistor 26 must be maintained constant. In the past, one approach towards maintaining a constant collector current has been to substitute a pnp transistor current source for the resistor 30. The pnp transistor conducts in inverse proportion to the supply voltage changes, to thereby maintain a constant current through the collector of the transistor 26. Alternatively, it has been proposed to place a pnp transistor in shunt across the resistor 28, to keep the current through this resistor constant. These approaches which employ pnp transistors to maintain a constant current through the collector of the transistor 26 are not well suited for use in ECL circuits. More particularly, conventional ECL fabrication techniques are optimized for the production of good npn transistors, and result in the production of relatively poor quality pnp transistors. Typically, a pnp transistor produced by a conventional ECL process has a gain of 1 or less. Thus, the reliability of the pnp constant current source becomes process dependent in ECL circuits. It is desirable to avoid this drawback associated with previous approaches to providing a constant difference between the supply and output voltages. In accordance with the present invention, which is defined in claim 1 and in claim 2, a temperature compensated bandgap voltage reference circuit employs a current bypass circuit to maintain a constant collector current within the reference circuit. This bypass circuit draws a nominal current from the bandgap voltage reference circuit. The value of this current is set by a bias circuit responsive to changes in the supply voltage. As the supply voltage changes, the bias circuit varies the conductance of a bypass transistor to draw more or less current and thereby maintain the collector current within the reference circuit constant. The bypass circuit utilizes only npn transistors. Therefore, it can be readily incorporated into ECL bandgap reference circuits with good results. It is to be noted that a voltage reference circuit of the type defined in the preamble of each of claims 1 and 2 is known from JP 59-224923. Figure 1 is a schematic circuit diagram of a prior art bandgap voltage reference circuit; Figure 2 is a schematic circuit diagram of a bandgap voltage reference circuit incorporating a bypass circuit in accordance with the present invention; Figure 3 is a schematic circuit diagram of an alternate embodiment of the invention; Figure 4 is a schematic circuit diagram of an embodiment similar to Figure 3 which produces a temperature-related output voltage. To facilitate an understanding of the present invention and its applications, it is described with reference to bandgap voltage reference circuits that are employed in connection with ECL logic circuits. It will be appreciated, however, that the practical applications of the invention are not limited to this particular area of use. Referring to Figure 2, a bandgap voltage reference circuit 32 incorporating the present invention has a configuration similar to the conventional circuit illustrated in Figure 1. A bypass circuit 34 is connected to the voltage reference circuit 32 to maintain a constant current in the collector of the transistor 26. The bypass circuit includes an npn transistor 36 whose collector is connected to the junction of the resistors 28 and 30 in the reference circuit. The emitter of the transistor 36 is connected to the supply voltage VEE by means of a resistor 38 that is related in value to the resistor 30. The conductance of the transistor 36 is controlled by a bias circuit comprising a series of diode connected transistors 40 and a bias resistor 42. In operation, the bypass circuit maintains a constant collector current in the transistor 26. At a nominal supply voltage, the bypass transistor 36 draws a nominal current whose magnitude is established by the bias circuit. In this bias circuit, the diodes 40 are referenced to the ground potential VCC, and changes in the supply voltage VEE are reflected across the bias resistor 42. The number of diodes 40 for the bias circuit is selected to provide a temperature coefficient for the biasing of the transistor 36 that will match the temperature coefficient of the voltage at the junction of the resistors 28 and 30. Preferably, the number of diodes is also chosen so as to keep the voltage at the base of the bypass transistor 36 sufficiently low to prevent saturation of the transistor. If the resistance value of the resistor 38 is approximately equal to that of the resistor 30, a change in the supply voltage VEE will induce similar current changes through each of the resistors 38 and 30 and through the collector of the bypass transistor 36. Preferably, the bypass transistor 36 has a gain ( ) of approximately 1. Thus, when the supply voltage VEE increases to cause an increase in the current through the resistor 30, the bypass transistor 36 will draw the excess current, to ensure that the collector current of the transistor 26 remains constant. As a result, the output voltage VCS will accurately track changes in the supply voltage VEE to maintain a constant reference. Table 1 below illustrates simulated results that were obtained with an embodiment of the prior art circuit of Figure 1. In particular, the second, third and fourth columns of the table indicate the output voltage VCS that is obtained for three different values of supply voltage VEE at three different temperatures. The righthand column in the table indicates the ratio of the change in the output voltage to the change in the supply voltage for each temperature. As indicated previously, this ratio should ideally be equal to 1. Table 2 below indicates similar results that were obtained with an embodiment of the circuit of Figure 2, which had the same component values for the bandgap reference circuit but which included a bypass circuit in accordance with the present invention. From the results shown in this table, it can be seen that even in the worse case condition, i.e. the relatively high temperature of 125°C, the ratio of the change in the output voltage to the change in the supply voltage improves from 0.978 to 0.995. An alternative, preferred embodiment of the invention is illustrated in the schematic circuit diagram of Figure 3. Elements of this circuit which correspond to those in the circuit of Figure 2 are identified with the same reference numeral. In the circuit of Figure 2, the emitter of the transistor 24 serves as the output terminal for the circuit. In the circuit shown in Figure 3, however, this node is not used to drive the output terminal. Rather, a different output driver is provided by means of a transistor 46 whose base is connected to the collector of the bypass transistor 36. The collector of this output transistor 46 is connected to the ground potential VCC, and its emitter is connected to the supply voltage VEE by means of diode configured transistors 48 and a resistor 50. An output voltage is obtained from an output line 52 connected to the emitter of the transistor 46. It will be appreciated that the voltage on this line is greater than the voltage at the emitter of the transistor 24 (the output terminal in the circuit of Figure 2) by an amount equal to the base-emitter voltage of a transistor. To provide a voltage drop equal to this amount, satellite nodes formed by npn transistors 54, 56 and 58 are connected to the output line 52. The voltage VCS1, VCS2, etc. at the emitter of each satellite transistor corresponds to the voltage VCS appearing at the emitter of the transistor 24, and thus will have a temperature coefficient which is the same as that of the output voltage produced by the circuit of Figure 2. In a further variation of the invention shown in the circuit of Figure 3, a transistor 60 is connected between the base of the bypass transistor 36 and the negative power supply VEE. The base of this transistor is connected to the base of the diode-connected transistor 18 to form a current mirror, along with the resistor 22. The current through the transistor 60 reflects the current through the transistor 18, so that the bias to the base of the transistor 36 has the same temperature coefficient as the output voltage VCS. A compensation capacitor 62 is connected between the base and collector of the transistor 60 to provide stability. This further feature shown in the circuit of Figure 3 provides improved results over a relatively large supply voltage range. Values of VCS for a particular embodiment of the prior art circuit of Figure 1, over a supply voltage range of -4.0 to -5.8 volts, are shown in Table 3 below for two different temperatures: It is to be noted that the particular embodiment that was used to produce the results of Table 3 had different component values than the embodiment used in the Table 1 data, thus accounting for the difference in VCS at -4.5 volts. A bandgap voltage reference circuit having the same component values as the circuit used in the example of Table 3, but including a bypass circuit according to Figure 3 provided the following results shown in Table 4: As can be seen, the embodiment of Figure 3 provides superior results. Another advantage of the circuit shown in Figure 3 is that it can be readily used to provide either a temperature-independent or a temperature-dependent supply voltage. More particularly, the circuits as shown in each of Figures 1 and 2 provide a substantially temperature-independent output voltage. In some applications, however, a fixed temperature coefficient is desired for the output voltage VCS. Such a result can be accomplished in each of the circuits of Figures 1, 2 and 3 by connecting a resistor between the base of the transistor 26 and the negative supply voltage VEE. Such a resistor is shown at 64 in the circuit of Figure 4. This resistor provides a negative temperature coefficient for the reference voltage generating circuit that produces the output voltage VCS. However, the presence of such a resistor presents certain difficulties when it is used with the circuit of Figure 1 or Figure 2. In the circuit of Figure 1, the effect of supply voltage variation on the output voltage VCS is exacerbated, i.e., becomes even smaller. More particularly, since the base-emitter voltage of the transistor 26 varies in dependence upon the supply voltage, as described previously, the current through a resistor in shunt with the base and emitter of the transistor will also vary. Therefore, the temperature coefficient provided by the resistor will vary with supply voltage. In the circuit of Figure 2, it may be difficult to adjust the temperature coefficient of the bypass circuit to match that of the output voltage VCS without saturating or cutting off the bypass transistor 36. Thus, it would be difficult to achieve a temperature dependent bias voltage with adequate rejection of supply voltage variations. However, in the circuit of Figure 4, with the current mirror, the bias to the transistor 60 will reflect the same temperature coefficient as the output voltage VCS. Thus, an accurate temperature dependent voltage can be obtained without adversely affecting the operation of the bypass circuit. It will be appreciated that the bypass transistor 36 in each embodiment of the invention will experience a similar phenomenon as the transistor 26 in the prior art circuit of Figure 1, i.e. as the supply voltage changes its collector current will change, causing a corresponding increase or decrease in its base-emitter voltage. If the bypass resistor 38 is exactly equal in magnitude to the resistor 30 of the voltage reference circuit, this effect could limit the accuracy with which the output voltage tracks the supply voltage. To improve the operation of the circuit, it has been found that the value of the bypass resistor 38 should be slightly less than that of the resistor 30. More particularly, the ohmic value of the resistor 38, R₃₈, should have the following relationship to the ohmic value of the resistor 30, R₃₀: where: VEE is the expected change in supply voltage, V be is the change in the base-emitter voltage of the transistor 36, over the range of supply voltage variation; and V is the change of the voltage at the base of the transistor 36 relative to VCC over the range of supply voltage variation. It has been found that, when the values of the resistors 38 and 30 have this relationship, the ratio of changes in the output voltage VCS to changes in the supply voltage are improved even beyond the results indicated in Table 2, for example. From the foregoing, it can be seen that the present invention provides a bypass circuit that enables the collector current in the bandgap voltage reference circuit to be maintained constant. Since the bypass circuit only requires the same type of transistors as those found in the reference voltage circuit, i.e. npn transistors, it is well suited for fabrication by conventional ECL fabrication techniques, which are optimized for the production of these types of transistors. It will be appreciated by those of ordinary skill in the art that the present invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The presently disclosed embodiments are therefore considered in all respects to be illustrative and not restrictive. The scope of the invention is indicated by the appended claims rather than the foregoing description, and all changes which come within the meaning and range of equivalents thereof are intended to be embraced therein.

Claims: A bandgap voltage reference circuit for producing an output voltage that is related to a power supply potential, comprising a first npn transistor (26) having an emitter connected to said power supply potential (VEE) and a collector connected to a second potential (VCC) by means of a first resistance (30); a second npn transistor (10) having an emitter connected to said power supply potential by means of a second resistance (12) and a collector connected to a base of said first transistor; a third resistance (14) for connecting said collector of said second transistor to said second potential; an output terminal (VCS, 52) operatively coupled to at least one of the collector of said first transistor and said third resistance to produce an output voltage that differs from said power supply potential by an amount related to a base-emitter voltage of said first transistor plus a voltage across said third resistance; and a bypass circuit (34) including an npn bypass transistor (36) having a collector connected to a junction between said first resistance and the collector of said first transistor and a bias circuit (40, 42, 60) connected to a base of said bypass transistor, characterized by a bypass resistor (38), having a value which is approximately the same as, or slightly less than, the value of said first resistance (30), connecting the emitter of said bypass transistor (36) to said power supply potential (VEE) for adjusting the current through the collector of said bypass transistor (36) in accordance with changes in said power supply potential to thereby maintain the current through the collector of said first transistor (26) substantially independent of changes in said supply potential and that said bias circuit (34) includes a current mirror (60) connected to the base of said bypass transistor (36) to provide a bias current having a temperature coefficient corresponding to that of said output voltage (VCS). A bandgap voltage reference circuit for producing an output voltage that is related to a power supply potential, comprising a first npn transistor (26) having an emitter connected to said power supply potential (VEE) and a collector connected to a second potential (VCC) by means of a first resistance (30); a second npn transistor (10) having an emitter connected to said power supply potential by means of a second resistance (12) and a collector connected to a base of said first transistor; a third resistance (14) for connecting said collector of said second transistor to said second potential; an output terminal (VCS, 52) operatively coupled to at least one of the collectors of said first transistor and said third resistance to produce an output voltage that differs from said power supply potential by an amount related to a base-emitter voltage of said first transistor plus a voltage across said third resistance; and a bypass circuit (34) including an npn bypass transistor (36) having a collector connected to a junction between said first resistance and the collector of said first transistor and a bias circuit (40, 42, 60) connected to a base of said bypass transistor, characterized by a bypass resistor (38), having a value which is approximately the same as, or slightly less than, the value of said first resistance (30), connecting the emitter of said bypass transistor (36) to said power supply potential (VEE) for adjusting the current through the collector of said bypass transistor (36) in accordance with changes in said power supply potential to thereby maintain the current through the collector of said first transistor (26) substantially independent of changes in said supply potential, and that said bias circuit includes a plurality of diodes (40) connected in series between the base of said bypass transistor (36) and said second potential (VCC) and having a temperature coefficient which matches that of the voltage at said junction. The reference circuit of claim 2, characterized in that said bias circuit further includes a bias resistor (42) connected between the base of said bypass transistor (36) and said supply potential (VEE).

Inventors: COHAN, JAY L., MENON, SURESH M.
Applicants: NATIONAL SEMICONDUCTOR CORPORATION
Application year: 1988
Main classification: G05F3
IPC codes: G05F3