PROTECTION CIRCUIT FOR BATTERY FEED CIRCUIT

Abstract: A protection circuit for a battery feed circuit used in a switching system. The protection circuit is comprised of: a supervising circuit (11) for detecting an abnormal current flowing through a battery feed resistor (R₁); and a voltage limiting circuit (12) for clamping a voltage across the battery feed resistor (R₁) when the abnormal current is detected. Further, a control circuit (13) is employed for stopping an operational amplifier (OP₁) when the abnormal current is detected. The operational amplifier (OP₁) constitutes a conventional battery feed circuit and is connected, at the output thereof, with the base of a battery feed transistor (Q₁) connected between a subscriber's line and the battery feed resistor (R₁).

Description: 1. Field of the Invention The present invention relates to a protection circuit for protecting a battery feed circuit in a line circuit from a ground fault and a false connection. In a battery feed circuit, if a ground fault or a false connection occurs in a subscriber's line, an overcurrent flows in the battery feed circuit and, for example, burning occurs. Accordingly, a protection circuit is fitted to the battery feed circuit to protect the same when a ground fault or false connection occurs, by limiting the amount of overcurrent flowing there-through. 2. Description of the Related Art A prior art protection circuit is realized by inserting a well known limiting resistor between the subscriber's line and the battery feed circuit, only when a fault such as ground fault or false connection is detected, and another prior art protection circuit is realized by a plurality of auxiliary power transistors, connected in parallel with a main battery feed transistor, to cope with an overcurrent. These two prior arts, however, have disadvantages in that, the protection circuit requires a large space for accommodating the same, and the number of discrete electric parts is increased. It should be noted that, since the protection circuits are mounted in a great number of the line circuits for each subscriber, the smaller the size and the lower the number of parts, the better. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a protection circuit for a battery feed circuit, which protection circuit can be miniaturized in the form of an integrated circuit (IC). According to the invention, there is provided a protection circuit for a battery feed circuit of the type comprising: an A line and a B line as subscriber's lines through which a DC current is supplied to a telephone terminal equipment; battery feed resistors connected to respective subscriber's lines; battery feed transistors connected, at each emitter, to respective said battery feed resistors; operational amplifiers connected, at each output, to said battery feed transistors, at each base, for applying predetermined voltages at respective emitters of said battery feed transistors, said protection circuit characterised by both a supervising circuit and a voltage limiting circuit, both cooperating with at least one of said A line and B line, said supervising circuit being operable to detect an abnormal current flowing through at least said battery feed resistors to produce a first control signal, and said voltage limiting circuit being responsive to said first control signal, to clamp a voltage across a corresponding battery feed resistor to a fixed value, so that the battery feed current from said battery feed resistor is limited to a desired level. The above object and features of the present invention will be more apparent from the following description of the preferred embodiments with reference to the accompanying drawings, wherein: Fig. 1 is a block diagram of a protection circuit according to a first embodiment of the present invention; Fig. 2 is a detailed circuit diagram of the first embodiment shown in Fig. 1; Fig. 3 is a block diagram of a protection circuit according to a second embodiment of the present invention; Fig. 4 is a detailed circuit diagram of the second embodiment shown in Fig. 3; Fig. 5 is a circuit diagram of an example of an application of the second embodiment of the present invention; Fig. 6 is a circuit diagram of an example of the supervising circuit; Fig. 7 is a circuit diagram of another type of battery feed circuit; Fig. 8 is a block diagram including a control circuit according to the present invention and an operational amplifier; Fig. 9 is a circuit diagram showing an example of an operational amplifier control circuit according to the present invention; Fig. 10 is a detailed circuit diagram of an operational amplifier and a control circuit thereof shown in Fig. 9; Fig. 11 is circuit diagram representing a battery feed circuit; Fig. 12 is a schematic circuit diagram showing the circuit of Fig. 11 in which a B line ground fault has occurred; Fig. 13 is a general circuit diagram of a battery feed circuit containing a protection circuit for a B line false connection; Fig. 14 is a detailed circuit diagram of an operational amplifier containing a protection circuit for the B line ground fault; Fig. 15 shows another type voltage clamping diode; Fig. 16 is a circuit diagram representing a part of the circuit shown in Fig. 5; and, Fig. 17 depicts a circuit arrangement of a protection circuit without a resistor component. DESCRIPTION OF THE PREFERRED EMBODIMENTS Figure 1 is a block diagram of a protection circuit according to a first embodiment of the present invention. In Fig. 1, R₁ denotes a battery feed resistor for determining a DC current supplied to the subscriber's line. The resistor R₁ is connected to a power source (not shown) via a battery feed transistor Q₁. The base of the transistor Q₁ is connected to the output of an operational amplifier OP₁ , one of the inputs of which is connected to an intermediate connecting point between resistors R₂ and R₃ for determining an AC impedance of the battery feed circuit. Moreover, a voltage limiting circuit 12' for the resistor R₁ is employed, which is controlled by a supervising circuit 11. Namely, if a fault occurs and an overcurrent is generated, the overcurrent is detected at the resistor R₁ by the supervising circuit 11, and the circuit 11 commands the circuit 12' to clamp the voltage across the resistor R₁ at a predetermined voltage. Figure 2 is a detailed circuit diagram of the first embodiment shown in Fig. 1. In Fig. 2, only a protection circuit for a protection against a ground fault is illustrated for brevity, but a protection circuit for protection against a false connection also can be mounted. In Fig. 2, in addition to the supervising circuit 11 and the voltage limiting circuit 12′ comprised of transistors Q₂₂ through Q₂₄ and resistor R₂₄ , a battery feed circuit 10 is illustrated, which is mounted in a corresponding line circuit for a related telephone terminal equipment T connected via the subscriber's lines, i.e., the A line and the B line. The battery feed circuit 10 has a symmetric construction with respect to the A and B lines, and therefore, the following explanation will be made with reference mainly to the circuit part of the A line, i.e., the bottom half portion of the Figure. Resistors R₁₂ and R₁₃ (B line side) comprising a voltage divider are connected between a ground GND and the B line. Similarly, for the A line, resistors R₂₂ and R₂₃ are connected between a power source V BB , e.g., -48 V, and the A line. When the telephone terminal T is in the off-hook state, a DC current flows from the ground GND to the power source V BB via the resistors R₁₂ and R₁₃ , the telephone terminal T, and the resistors R₂₃ and R₂₂. Accordingly, a voltage V B appears at the intermediate connecting point between the resistors R₂₃ and R₂₂. On the other hand, the battery feed transistor Q₂₁ is connected, via the battery feed resistor R₂₁ , between the A line and the power source V BB . The connection point V B is connected to a noninverting input terminal (+) of the operational amplifier OP₂₁ , the inverting input terminal (-) of which is connected to the emitter of the battery feed transistor Q₂₁ and the base of which is connected to the output of the amplifier Q₂₁. At the operational amplifier OP₂₁ , a voltage equal to the voltage V B appearing at the noninverting input (+) develops at the inverting input (-), due to an imaginary short, and thus the same voltage appears as V A at the emitter of the transistor Q₂₁ , to obtain V A = V B . The battery feed transistor Q₂₁ works as a current source in which a current defined by V B /R₂₁ flows through the transistor Q₂₁ as shown by I A , i.e., I A = V B /R₂₁. When viewed from the A line side, and disregarding the resistors R₂₂ and R₂₃ , the resistance value, i.e., R A , of the battery feed circuit 10 is expressed as follows, where V₁ denotes a voltage of the A line. R A = V₁/I A Since the voltage V B is expressed as V B = V₁ x R₂₃/(R₂₂ + R₂₃), R A can be rewritten as R A = R₂₁ x (R₂₂ + R₂₃)/R₂₃ which means that a DC resistance value of the battery feed circuit 10 is constant. This is also true for the B line side. Namely, the DC resistance value, at the B line side, of the battery feed circuit 10 is made equal to the constant value of the A line side by a suitable circuit arrangement. In this case, the DC resistance values of the A and B line sides are usually made equal and selected to be a relatively low value, such as about 200 Ω. When a speech signal is generated at the telephone equipment terminal T, an AC voltage differentially appears between the A and B lines. That is, when the voltage on the A line is increased or decreased, the voltage on the B line is decreased or increased, respectively. The AC voltage across the A and B lines is divided by the resistors R₂₂ and R₂₃ and produces a voltage V b at the intermediate connecting point therebetween. The voltage V b induces an AC voltage V b at the inverting input (-) of the operational amplifier OP₂₁. On the other hand, the AC voltage on the B line is divided by the resistors R₁₂ and R₁₃ to produce a voltage V b '. The voltage V b ' is applied to the non-inverting input (+) of an operational amplifier OP₁₁ to, produce an identical AC voltage V b ' at the inverting input (-) thereof. Accordingly, the AC voltages appearing at the emitters of the battery feed transistors Q₂₁ and Q₁₁ are identical to those appearing on the A and B lines, respectively, and thus an AC current (speech current) does not flow through the transistors Q₂₁ and Q₁₁. Therefore, the respective AC impedances are defined by the resistors R₂₂ and R₂₃ (A line side) and the resistors R₁₂ and R₁₃ (B line side), respectively, to obtain a relatively high constant value, such as several tens of kΩ. In Fig. 2, the voltage limiting circuit 12' is comprised of three transistors connected in series, each having the same conductivity type (a NPN type is used in Fig. 2). The first transistor is a saturation transistor having a resistor between the base and the emitter thereof, the base receiving a first control signal, i.e., a detection current I₀. The second and third transistors are each connected in the form of a diode. If a ground fault does not occur at the A line, a detection current I₀ , i.e., a first control signal, is not provided from the supervising circuit 11. Accordingly, in the voltage limiting circuit 12', a current does not flow through the transistor Q₂₂ , but if a ground fault does occur at the A line side, the current I A is increased. The supervising circuit 11 detects the thus increased current I A by watching the voltage across the resistor R₂₁ and producing the detection current I₀. Accordingly, the transistor Q₂₂ is saturated and the internal resistance value is reduced. Therefore, the voltage V B is determined by both the base-emitter voltages (V BE ) of the transistors Q₂₃ and Q₂₄ , each connected in the form of a diode, whereby V B = 2 x V BE is obtained, and thus the current I A is determined as I A = 2 x V BE /R₂₁. Suppose that the voltage limiting circuit 12', comprised of the transistors Q₂₂ , Q₂₃ and Q₂₄ and the resistor R₂₄ , is not included, and in addition R₂₃ = R₂₂ stands, then V B = V BB /2 is obtained. In this case, the current I A is equal to V BB /2 x R₂₁ and larger than a rated current value. Under this condition, the transistor Q₂₁ and the resistor R₂₁ may be damaged by burning. In the circuit of Fig. 2, this possibility is eliminated because the voltage limiting circuit 12' is employed. If a false connection occurs, i.e., the power source V BB comes into contact with the B line, a voltage limiting circuit identical to the above-mentioned circuit 12' will protect the battery feed transistor Q₁₁ and resistor R₁₁ from damage by burning. Next, a protection circuit according to a second embodiment of the present invention will be explained. Regarding the protection circuit (11, 12') of the first embodiment shown in Figs. 1 and 2, the voltage limiting circuit 12' is directly incorporated into a portion at which the high impedance against the AC voltage is created. Accordingly, during protection against the ground fault, the voltage across the resistor R₂₃ is limited by the circuit 12', and therefore, the AC impedances at the A and B lines are unbalanced. This condition is worsened because the unbalance impedances induce an oscillation inside the battery feed circuit 10, and this undesired oscillation current is superimposed onto the DC current I A . The protection circuit according to the second embodiment of the present invention eliminates the above-mentioned problem of undesired oscillation. Figure 3 is a block diagram of a protection circuit according to a second embodiment of the present invention. As shown in Fig. 3, the protection circuit of the second embodiment is comprised of the aforesaid supervising circuit 11, a voltage limiting circuit 12 which is slightly different from the aforesaid circuit 12', and an operational amplifier control circuit 13. The supervising circuit 11 detects the voltage across the battery feed resistor R₁ to produce a first control signal and a second control signal, I₀ and I S , respectively. The voltage limiting circuit 12 is connected between both ends of the battery feed resistor R₁ to limit the voltage across the battery feed resistor R₁ in accordance with the first control signal I₀ (detection current), and the operational amplifier control circuit 13 stops the operation of the amplifier OP₁ in accordance with the second control signal I S , i.e., a stop control current. When a fault such as a ground fault or false connection, occurs, an overcurrent flows and the voltage across the resistor R₁ becomes large. This large voltage is detected by the supervising circuit 11 which then produces the first and second control signals I₀ and I S . Upon receiving the signal I₀ , the circuit 12 operates to limit the voltage across the resistor R₁ , and the control circuit 13 operates to stop the operation of the operational amplifier OP₁ in response to the second control signal I S , and thus the current flowing through the resistor R₁ is reduced. Accordingly, the resistor R₁ and the transistor Q₁ , both defining the DC current resistance value, are protected. In the above arrangement, the voltage limiting circuit 12 is not directly connected with the resistors R₂ and R₃ , both defining the aforesaid AC impedance, and accordingly, the AC impedance is not varied by the addition of the circuit 12. Therefore, an imbalance in the AC impedance between the A and B lines is not created, and thus a deleterious oscillation is not generated in the battery feed circuit. Figure 4 is a detailed circuit diagram of the second embodiment shown in Fig. 3. It should be understood that the protection circuit of Fig. 4 is designed to cope with, for example, a ground fault, and members identical to those explained before are given the same reference numerals or symbols (as for all later figures). The voltage limiting circuit 12 is comprised of a first saturation transistor receiving, at the base thereof, the first control signal I₀ , a second transistor connected in the form of a diode, both of which have the same conductivity type and are connected in series, and a third transistor having another conductivity type, the base of which is connected with the emitter of the battery feed transistor, and these three series-connected transistors are connected between the subscriber's line and the base of the battery feed transistor. Specifically, the voltage limiting circuit 12 is comprised of transistors Q₂₅ and Q₂₆ , both of which are NPN type, a PNP type transistor Q₂₇ , and resistors R₂₅ and R₂₇. The transistors Q₂₅ through Q₂₇ are inserted between the A line and the base of the battery feed transistor Q₂₁ , and the transistor Q₂₆ is connected in the form of a diode. Further, the base of the transistor Q₂₇ is connected to the emitter of the transistor Q₂₁. The operational amplifier control circuit 13 is connected between the supervising circuit 11 and the operational amplifier OP₂₁. The operation of the battery feed circuit 10 shown in Fig. 4 is substantially the same as that of the corresponding circuit shown in Fig. 2. When a ground fault does not (see broken line GND) occur on the A line, the supervising circuit 11 does not provide a current I₀ , and accordingly, a current does not flow through the transistor Q₂₅ , and thus there is no operational change in the battery feed circuit 10. Conversely, if a ground fault does occur on the A line, the battery feed current I A is increased, and the related increase is detected as an increased voltage across the battery feed resistor R₂₁ which then produces the current I₀. Accordingly, the transistor Q₂₅ is saturated and the internal resistance value thereof is reduced. Therefore, the voltage V A at the battery feed resistor R₂₁ is limited to the sum of the base-emitter voltages V BE26 and V BE27 of the corresponding transistors Q₂₆ and Q₂₇. In this case, the ground fault current I G is expressed as I G = V A /R₂₁ = (V BE26 + V BE27 )/R₂₁ As explained previously, where R₂₂ = R₂₃ stands and the transistors Q₂₅ through Q₂₇ and the resistor R₂₅ are omitted, the ground fault current I G equals V BB /2xR₂₁ , which is larger than the rated current value. Conversely, in Fig. 4, the ground fault current I G is made small . In this case, the output current of the operational amplifier OP₂₁ is very large, and therefore, the base current I BE21 of the transistor Q₂₁ and the current flowing through the transistors Q₂₅ through Q₂₇ become large. In a condition where the currents I B ₂₁ and I Q are not limited, even if the supervising circuit 11 supplies the detection signal I₀ to the transistor Q₂₅ , the transistor Q₂₅ remains nonsaturated, and accordingly, the voltage V A at the resistor R₂₁ is not reduced, and thus it is not possible to limit the ground fault current I G . To avoid the above-mentioned condition, during a protection against a ground fault, the supervising circuit 11 produces a second control signal, i.e., a stop control current I S , and supplies that signal to an operational amplifier control circuit 13. Accordingly, the circuit 13 makes a current source OFF, which current source supplies power to the operational amplifier OP₂₁ , and thus, during the protection against a ground fault, the operation of the operational amplifier OP₂₁ is stopped. In the above-mentioned operation, the currents I B21 and I Q are made small and the ground fault current I G is limited by the transistors Q₂₅ through Q₂₇ to the current I₀ flowing through the resistor R₂₅. In this case, the resistor R₂₇ (as for a resistor R₁₇ in Fig. 5) maintains the battery feed transistor Q₂₁ in an active state, and the base current of Q₂₁ flows through resistor R₂₇. Namely, the resistor R₂₇ acts as a hold resistor for holding the transistor Q₂₇ in an active state. Use of the circuit shown in Fig. 4 ensures that an imbalance in the AC impedance between the A and B line is not created, since the transistors Q₂₅ through Q₂₇ as the voltage limiting circuit are not connected to the resistors R₂₂ , R₂₃ (as in Fig. 2) but to the base of the transistor Q₂₁ , and accordingly, the aforesaid undesired oscillation is not induced in the battery feed circuit. Figure 5 is a circuit diagram of an example of an application of the second embodiment of the present invention. In this example, the protection circuit can cope with not only a ground fault on the A line, but also with a false connection of the B line to the power source V BB , e.g., -48 V. In Fig. 5, reference numeral 12-1 is a voltage limiting circuit which contains transistors Q₁₅ , Q₁₆ , and Q₁₇ and resistors R₁₅ and R₁₇ , and reference numeral 13-1 represents an operational amplifier control circuit. In Fig. 5, the construction and the operation of the battery feed circuit 10 for the A and B lines are substantially the same as those explained before with reference to Figs. 2 and 4. Also, the construction and the operation of the voltage limiting circuit 12-2, containing the transistors Q₂₅ , Q₂₆ , Q₂₇ and the resistors R₂₅ and R₂₇ , and the control circuit 13-2, are identical to those explained before with reference to Fig. 4. The voltage limiting circuit 12-1 comprised of the transistors Q₁₅ , Q₁₆ , Q₁₇ and the resistors R₁₅ and R₁₇ is used for protection against an overcurrent produced when a false connection occurs. As shown in the Figure, the transistors Q₁₅ through Q₁₇ are connected between the B line and the base of the transistor Q₁₁ , the transistor Q₁₆ is connected in the form of a diode, and the transistor Q₁₇ is connected, at the base thereof, with the emitter of the battery feed transistor Q₁₁. In Fig. 5, when a false connection does not occur, a detection current I₀₁ is not absorbed by the supervising circuit 11, and accordingly, a current is not provided from the transistor Q₁₅ , and thus there is no change in the operation of the battery feed circuit 10. Conversely, if a false connection occurs on the B line, the battery feed current I A1 is increased, and this increase is detected as an increased voltage across the battery feed resistor R₁₁ by the supervising circuit 11, which absorbs the detection current I₀₁. Accordingly, the transistor Q₁₅ is saturated and the internal resistance value thereof reduced. Therefore, the voltage V A1 across the resistor R₁₁ is limited to the sum of the base-emitter voltages V BE16 and V BE17 of the respective transistors Q₁₆ and Q₁₇. In this case, a false connection current I C is expressed as follows. I C = V A1 /R₁₁ = (V BE16 + V BE17 ) /R₁₁ A current I C , when the transistors Q₁₅ through Q₁₇ and the resistor R₁₅ are omitted, is V BB /2xR₁₁ (when R₁₂ = R₁₃) and is larger than the rated current value. Nevertheless, in the circuit of Fig. 5, the current I C is reduced to the above defined value, and thus the purpose of the present invention is realized. In this case, as already mentioned, the supervising circuit 11 must also supply a second control signal, i.e., a stop control current I S1 , to the control circuit 13-1, at the same time as the detection current I₀₁ is absorbed by the circuit 11, so that the circuit 13-1 makes a current source OFF, which current source supplies power to the operational amplifier OP₁₁ , and thus, the operation of the amplifier OP₁₁ is stopped. When the circuit shown in Fig. 5 is used, an imbalance in the AC impedance between the A and B line sides is not created, since the transistors Q₁₅ through Q₁₇ as the voltage limiting circuit are not connected to the resistors R₁₂ , R₁₃ (as in Fig. 2) but to the base of the transistor Q₁₁ , and accordingly, the aforesaid undesired oscillation is not induced in the battery feed circuit during the protection against a false connection. Figure 6 is a circuit diagram of an example of the supervising circuit. Reference characters R₁₁ and R₂₁ denote the aforesaid battery feed resistors, Q₃₁ through Q₃₉ are transistors, R₃₃ , R₃₄ and R₃₅ are resistors, and M a1 , M a2 , M a3 and M b1 , M b2 and M b3 are current mirror circuits. When a ground fault occurs, an overcurrent flows through the battery feed resistor R₂₁ , and in response to this overcurrent, a voltage which is the same as the voltage across the battery feed resistor R₂₁ is generated, via the transistors Q₃₂ and Q₃₄ , at the resistor R₃₄ forming an emitter circuit of the transistor Q₃₄. The generated voltage causes the mirror circuit M a2 to be made ON and output a current I₁ therefrom. An identical current I₁ is output therefrom to the mirror circuit M b1 , and accordingly, the circuit M b1 is made ON and an identical current is given to M b1 . This current flows via the transistor Q₃₅ and creates a voltage drop across the resistor R₃₅ , and this voltage drop is composed with a threshold voltage V th at a comparator comprised of the transistors Q₃₈ and Q₃₉. When the current I₁ exceeds the threshold voltage V th , a signal is output to the mirror circuit M a3 to make the M a3 ON and thus output the detection current I₀₂. The current I₀₂ is supplied, as explained with reference to Figs. 4 and 5, to the voltage limiting circuit 12 upon the detection of a ground fault. When a false connection occurs, an overcurrent flows through the battery feed resistor R₁₁ and a voltage which is the same as the voltage across R₁₁ is generated, via the transistors Q₃₁ and Q₃₃ , at the resistor R₃₃ forming the emitter circuit of the transistor Q₃₃. This generated voltage causes a current I₂ to flows from the mirror circuit M a1 , and a current I₂ identical to the above current I₂ is output, via the transistor Q₃₆ , to the mirror circuit M b2 . Accordingly, a current I₂ is output via the transistor Q₃₇ to the mirror circuit M b2 to produce a voltage drop across the resistor R₃₅. When the voltage drop exceeds the threshold voltage V th at the comparator (Q₃₈ , Q₃₉), a current flowing through the transistor Q₃₉ is drawn from the mirror circuit M a3 , an identical current is output to the mirror circuit M b3 , and a current I₀₁ is obtained. The current I₀₁ is output, as previously explained in Fig. 5, to the voltage limiting circuit 12-1 when a false connection occurs. The ON-OFF control of the operational amplifiers OP₂₁ and OP₁₁ can be effected by the second control signals, i.e., the stop control currents, which can be produced in the same manner as the aforesaid currents I₀₁ and I₀₂ , which stop control currents are output to the respective control circuits 13-1 and 13-2, which make the corresponding current sources OFF to stop the operation of the operational amplifiers. Figure 7 is a circuit diagram of another type of battery feed circuit. The battery feed circuit is equipped with resistors R₄₁ , R₄₂ , R₄₃ , and R₄₄ and a capacitor C₀. The battery feed circuit of Fig. 7 contains the protection circuit shown in Fig. 2. The supervising circuit 11 issues an indication to an operator that a short-circuit exists in the battery feed circuit. According to the indication, the operator starts the restoration of the circuit from a ground fault or a false connection condition. Note, the restoration per se is not the object of the present invention. Next, a detailed explanation of the operational amplifier control circuit will be given. The inventors experimented with two methods of realizing the function of the operational amplifier control circuit 13 of Fig. 4 (same as the circuits 13-1 and 13-2 of Fig. 5). Namely, in one method, they connected a limiting resistor in series with the output of the operational amplifier, and in the other method, they cut off the power source (V CC , V BB ) for the operational amplifier; i.e., when the operational amplifier is to be stopped, the power source is cut off. The first method, had a defect in that the limiting resistor was not suitable for practical use; since such a limiting resistor must have a considerably high resistance, and such a high resistance value element is not easily fabricated in a large scale integration circuit (LSI). The second method, had a defect in that the manufacturing process became complicated, since first a relatively wide power line must be partially removed and then an analog switch must be inserted into the removed part. Further, it is not preferable to cut off the power line, since the thus cut power line is liable to induce noise. Under the above circumstance, the present inventors proposed a control circuit (13, 13-1, 13-2) which can smoothly stop or limit the output current of the operational amplifier and can be constructed with a simple design. Figure 8 is a block diagram of a control circuit according to the present invention and an operational amplifier. In the figure, the operational amplifier OP₁ (same for OP₁₁ and OP₂₁) includes a differential input stage 21, a high gain amplifier stage 22, an output stage 23, and a current source 24 providing a driving current I D for driving the above-mentioned three stages 21, 22, and 23. The driving current I D can be made ON or OFF by a current stopping means 30. The current stopping means 30 corresponds to the aforesaid operational amplifier control circuit 13 (13-1,13-2) and receives the second control signal, i.e., the stop control current I S (see I S in Fig. 4, and I S1 , I S2 in Fig. 5). The operational amplifier OP₁ is supplied with a driving current from the current source 24 and then performs the required operational amplifying function. Taking this into consideration, the driving current I D from the current source 24 is stopped to stop the operation of the operational amplifier per se, and thus the current stopping means 30 is incorporated into the well known operational amplifier OP₁. Accordingly, the operation of the operational amplifier can be smoothly stopped without using the aforesaid limiting resistor at the output of the operational amplifier or inserting the aforesaid analog switch into the power line (V CC , V BB ). Figure 9 is a circuit diagram of an operational amplifier incorporating an example of an operational amplifier control circuit according to the present invention. A well known differential input stage 21 is comprised of transistors Q₄₆ and Q₄₇ , a well known high gain amplifier stage 22 is comprised of transistors Q₄₂ , Q₄₈ , and Q₄₉ , and a well known output stage 23 is comprised of transistors Q₄₀ and Q₄₁. Further, a well known current source 24 is provided with a constant current source 24-1, comprised of a current mirror circuit 41, and a current supply element 24-2 connected therewith via a current line L₁. The supply element 24-2 is provided with a current mirror circuit 42. The constant current source 24-1 contains a diode D₁ which produces the aforesaid driving current I D having a value which is determined by a division of the forward voltage of the diode D₁ by the resistance value of a resistor R₅₀. The driving current I D is given to each of the stages (21, 22, 23), via the current supply element 24-2, to drive the same. The current stopping means 30, i.e., the operational amplifier control circuit 13 (13-1, 13-2), is schematically shown as a bypassing means 31. The bypassing means 31 is made conductive by the second control signal, i.e., the stop control current I S , to bypass the current flowing through an input transistor Q₅₁ of the current mirror circuit 41. Accordingly, the driving current I D flowing through an output transistor Q₅₀ is also stopped, and thus the operation of the operational amplifier OP₁ is stopped. Figure 10 is detailed circuit diagram of an operational amplifier and control circuit of Fig. 9. Namely, as shown in Fig.10, the bypassing means 31 of Fig. 9 is specifically realized as a transistor Q₅₂ , to which the stop control current I S is input at the base thereof, to saturate the transistor Q₅₂ , and thus the collector-emitter voltage V CE is reduced, for example, to about 0.1 V through 0.2 V. Accordingly, the aforesaid forward voltage, usually about 0.7 V, of the diode D₁ is not applied to the resistor R₅₀ , and thus the driving current I D is not generated. As a result, the operation of the operational amplifier OP₁ is stopped by the stop control current I S . Note, a commercially available operational amplifier is not equipped with an external terminal suitable for connection with the bypassing means 31 (transistor Q₅₂ and resistor R₅₂), and thus it is advisable to prefabricate the bypassing means 31 during the LSI process of the related circuit. Further, the LSI package should be provided with an input terminal (pin) for receiving the current I S . Next, the case of a B line ground fault will be discussed. Although it appears that there no problem arises in the case of an occurrence of a B line ground fault, in practice, a problem arises due to the presence of the operational amplifier OP₁ (OP₁₁), as explained below. Figure 11 is simple circuit diagram representing a battery feed circuit. The battery feed circuit 10 is substantially the same as that described previously. Figure 12 is a schematic circuit diagram representing the circuit of Fig.11 in which a B line ground fault has occurred. In Figs.11 and 12, the characters Q₁₁ , OP₁₁ , B, T, A, V CC , V BB and GND represent the same elements as in previous Figures. In the battery feed circuit 10, if a B line ground fault occurs, the circuit is in the state shown in Fig. 12. Usually, the dynamic range in the voltage of the operational amplifier OP₁₁ is smaller than the positive power source voltage to be actually applied to the OP₁₁ , and accordingly, a voltage higher than the ground level is used for the positive power source voltage to obtain an operational margin, which higher voltage is, for example, +5 V, i.e., V CC . Due to the higher voltage V CC , the output voltage of the operational amplifier OP₁₁ becomes higher than the ground level by a base-emitter voltage V BE11 of the transistor Q₁₁ , and accordingly, a positive voltage, sent from the base to the collector of the Q₁₁ , appears. This produces an undesired current flowing from the output of the OP₁₁ to the ground GND connected to the collector of the Q₁₁. Also, an undesired current flowing from the base to the emitter of the Q₁₁ is generated. These undesired currents may damage the battery feed transistor Q₁₁. The above-mentioned problem can be solved by the same measure as mentioned before with regard to the operational amplifier control circuit, i.e., the insertion of a high resistance element between the transistor Q₁₁ and the output of the amplifier OP₁₁. But it is very difficult to suitably set the resistance value in relation to the driving ability of the transistor Q₁₁ , and further, such a high resistance value is not suitable for an LSI circuit. The protection circuit for limiting the current through the battery feed transistor Q₁₁ , which does not produce the disadvantage mentioned above, will be described below with reference to Figs. 13 and 14. Figure 13 is a general circuit diagram of a battery feed circuit containing a protection circuit for a B line false connection. In the figure, all members, other than a ground level clamping means, are the same as those mentioned before. The clamping means can be specifically realized as a diode (referenced by D₂), i.e., a voltage clamping diode. The transistor Q₄₀ of the output stage 23 (Fig. 9) is grounded, at the base thereof, by the voltage clamping diode for D₂. Alternatively, instead of the diode D₂ , a transistor, connected in the form of a diode, can be used (described hereinafter), and thus the output voltage of the output stage 23 can be limited to suppress the aforesaid undesired current. As well known, the voltage, applied to the base of the Q₄₀ , can be lower than the voltage across the diode D₂ , i.e., the output voltage V₀ of the amplifier OP₁₁ is made lower than the voltage across the diode D₂ by the base-emitter voltage of the transistor Q₄₀. Therefore, the voltage V₀ is limited to the ground level, and the undesired current produced from the transistor Q₁₁ is stopped, even if the B line is erroneously grounded. Figure 14 is a detailed circuit diagram of an operational amplifier containing a protection circuit for the B line ground fault. Note, the operational amplifier of Fig.14 is slightly different from that disclosed before, but the function thereof is substantially the same as previously described. In the operational amplifier OP₁₁ of Fig.14, reference numeral 25 represents a bias generating circuit for the output stage 23, which circuit 25 is comprised of transistors Q₅₄ and Q₅₆. The base of the transistor Q₄₀ is connected to the ground GND by the voltage clamping diode D2 , to limit the potential at a point "a". Accordingly, the voltage potential at the point "a", relative to the ground GND, is lower by the forward voltage V F . Note, this voltage V F is usually about 0.6 V through 0.7 V, when a silicon diode is used. The output voltage V₀ of the amplifier OP₁₁ can be expressed as follows. V₀ ≦ V a - V BE40 where V BE40 denotes the base-emitter voltage of the transistor Q₄₀ , and V a is a voltage at the point "a". If the value V BE40 is equal to the formed voltage V F , the output voltage V₀ of the amplifier OP₁₁ can be made lower than zero volt, by suitably setting the transistor Q₄₀ and the diode D₂. Accordingly, the output voltage V₀ of the amplifier OP₁₁ does not become higher than the ground level, even if a B line ground fault occurs, which prevents the generation of the aforesaid undesired current of the transistor Q₁₁. Figure 15 shows another type voltage clamping diode wherein the ground level clamping means is fabricated by a transistor Q₆₀ connected in the form of a diode. The transistor Q₆₀is an NPN type and the emitter thereof is grounded, and the base and the collector thereof are connected to each other. The base-emitter voltage is utilized as the clamping voltage, which is usually about 0.6 V through 0.7 V, when silicon is used. If the transistors Q₄₀ and Q₆₀ have the same base-emitter voltage V BE , the output voltage V₀ can be set lower than zero volt. Accordingly, a same conductivity type transistor as the transistor Q₄₀ is used, i.e., the NPN transistor Q₆₀. As is well known, transistors of the same conductivity type exhibit almost the same base-emitter voltage, on the same IC chip. Finally, a circuit arrangement for ensuring protection against a B line false connection will be described below. The protection has already been explained with reference to Fig. 5. Figure 16 is a circuit diagram representing a part of the circuit shown in Fig. 5, and all members thereof, except for a detection circuit 51, have been already explained. Note, the detection circuit 51 has also been disclosed as the circuit of Fig. 6, except for the addition of the current mirror circuit M b3 . When a false connection occurs on the B line side of the subscriber's line, an overcurrent flows through the battery feed resistor R₁₁ and the voltage thereacross is increased. In this case, the voltage at a point "b" is made higher than the voltage level of V BB by a voltage drop produced across a resistor component contained in the false connection, which resistor component is schematically expressed by a character "r" in Fig. 16. The detection circuit 51 detects the voltage across the battery feed resistor R₁₁ and the first control signal, i.e., the detection current I₀₁ , is output therefrom. A current, identical to I₀₁ flows through a transistor Q₆₂ , and through a transistor Q₆₃ , and thus the transistor Q₁₅ is saturated. Accordingly, a voltage V R across the resistor R₁₁ is expressed as follows: V R = V BE16 + V BE17 + V CE15(SAT) , where V BE16 and V BE17 denote the base-emitter voltages of the corresponding transistors Q₁₆ and Q₁₇ , and V CE15(SAT) is a collector-emitter saturation voltage of the transistor Q₁₅. Therefore, the current flowing through the resistor R₁₁ is limited to the value expressed as follows. I R = (V BE16 + V BE17 + V CE15(SAT) )/R₁₁ As mentioned above, if a false connection occurs, due to the resistor component r, the collector-emitter voltage V CE63 of the transistor Q₆₃ can be fully maintained, so that the mirror circuit M b3 can operate normally. Conversely, if the false connection occurs when the resistor component is omitted, the voltage at the point "b" of Fig. 16 becomes substantially equal to the voltage of V BB . In this case, the collector-emitter voltage V CE63 of the transistor Q₆₃ cannot be fully obtained, and thus the mirror circuit M b3 cannot operate normally. Accordingly, it is not possible to saturate transistor Q₁₅ , and thus the transistor Q₁₅ cannot operate to limit the voltage V R across the battery feed resistor R₁₁. Namely, an overcurrent continues to flow. From the above viewpoint, the present inventors further propose a circuit arrangement of the protection circuit which will firmly suppress an overcurrent even if a false connection occurs, which false connection does not include the resistor component (r). Figure 17 depicts a circuit arrangement of a protection circuit to cope with a false connection not including a resistor component. The difference between Fig. 17 and Fig.16 is that the order of arrangement of the transistors Q₁₅ - Q₁₆ - Q₁₇ in Fig.16 is changed to Q₁₆ - Q₁₅ - Q₁₇ in Fig.17. When the false connection occurs and the resistor component (r = 0) is not included, the collector-emitter voltage of the transistor Q₆₃ comprising the mirror circuit M b3 becomes nearly equal to the base-emitter voltage of the transistor Q₁₆ connected in the form of a diode. The voltage across the battery feed resistor R₁₁ , when an overcurrent flows therethrough, is detected by the detection circuit 51, and the thus-detected current I₀₁ is output to the transistor Q₆₂ comprising the mirror circuit M b3 . An identical current I₀₁ is output through the transistor Q₆₃ to saturate transistor Q₁₅. The voltage V R across the battery feed resistor R₁₁ is limited by the sum of the base-emitter voltages of the respective transistors Q₁₇ and Q₁₆ and the collector-emitter saturation voltage of the transistor Q₁₅. The transistor Q₁₅ is saturation transistor, and the resistor R₁₅ connected between the base and emitter of Q₁₅ is used to divert a surplus current which is not needed for the saturation of Q₁₅. The transistor Q₁₆ is connected between the B line and the transistor Q₁₅ , and thus the transistors Q₁₆ , Q₁₅ , and Q₁₇ operate to limit the voltage across the resistor R₁₁ in accordance with the detection current I₀₁ flowing through the mirror circuit M b3 . Under normal conditions, the voltage across the resistor R₁₁ is low, and accordingly, the detection current I₀₁ is not produced from the detection circuit 51, and therefore, a current does not flow through the transistors Q₆₂ and Q₆₃ , and thus the transistor Q₁₅ is not saturated, and the voltage across the resistor R₁₁ is not limited. When a false connection occurs on the B line which does not include a resistor component (r = 0), an overcurrent flows through the resistor R₁₁ and the voltage thereacross is increased, and thus the detection current I₀₁ is supplied to the transistor Q₆₂. At this time, the voltage at the point "b" is substantially equal to the base-emitter voltage of the transistor Q₁₆ connected in the form of a diode, and accordingly, the collector-emitter voltage can be fully ensured. Therefore, a current, identical to the I₀₁ flowing through the Q₆₂ , also flows through the transistor Q₆₃ , and thus the transistor Q₁₅ is saturated. Note that, as mentioned previously, the operation of the aforesaid operational amplifier (not shown in Fig. 17) is stopped by turning the current source (24-1) thereof OFF under the control of the aforesaid control circuit (13-1). Further, the voltage V R across the battery feed resistor R₁₁ is expressed as: V R = V BE17 + V BE16 + V CE15(SAT) , where V BE17 and V BE16 denote the base-emitter voltages of the transistor Q₁₇ and Q₁₆ , and V CE15(SAT) is the collector-emitter saturation voltage of the transistor Q₁₅. Therefore, the battery feed current I R flowing through the resistor R₁₁ is limited as I R = (V BE17 + V BE16 + V CE15(SAT) )/R₁₁. This is the same as the I R obtained in the circuit of Fig.16, when a false connection includes the resistor component r. As explained above in detail, the present invention provides a protection circuit for a battery feed circuit in a switching system. The protection circuit can counteract a ground fault and/or false connection to limit an overcurrent flowing through each battery feed resistor. The protection circuit can be fabricated as an IC, and therefore, the protection circuit can have a very small size and a low power consumption.

Claims: A protection circuit for a battery feed circuit of the type comprising: an A line and a B line as subscriber's lines through which a DC current is supplied to a telephone terminal equipment (T); battery feed resistors (R₁₁,R₂₁) connected to respective subscriber's lines; battery feed transistors (Q₁₁,Q₂₁) connected, at each emitter, to respective said battery feed resistors; operational amplifiers (OP₁₁,OP₂₁) connected, at each output, to said battery feed transistors, at each base, for applying predetermined voltages at respective emitters of said battery feed transistors, said protection circuit characterised by both a supervising circuit (11) and a voltage limiting circuit (12') both cooperating with at least one of said A line and B line, said supervising circuit (11) being operable to detect an abnormal current flowing through at least said battery feed resistors (R₁₁,R₂₁) to produce a first control signal (I₀), and said voltage limiting circuit (12') being responsive to said first control signal, to clamp a voltage across a corresponding battery feed resistor to a fixed value, so that the battery feed current from said battery feed resistor is limited to a desired level. A protection circuit as set forth in claim 1, wherein said voltage limiting circuit (12') is connected between one of said subscriber's lines and one of the input terminals of a corresponding operational amplifier (OP₂₁), for clamping the voltage therebetween at a fixed value. A protection circuit as set forth in claim 1, wherein said voltage limiting circuit (12) is connected between one of said subscriber's lines and the base of the corresponding said battery feed transistor (R₂₁), for clamping the voltage therebetween at a fixed value. A protection circuit as set forth in claim 3, wherein an operational amplifier control circuit (13) is further included and receives a second control signal (I S ) issued when said supervising circuit (11) detects said abnormal current flowing through at least one of said battery feed resistors (R₁₁,R₂₁) to stop the operation of the corresponding said operational amplifier (OP₂₁). A protection circuit as set forth in claim 4, wherein at least one hold resistor (R₂₇) is employed for holding said battery feed transistor (Q₂₁) in an active state after the stoppage of said operational amplifier. A protection circuit as set forth in claim 1, wherein the protection circuit is mounted at said A line side as a protection against a ground fault. A protection circuit as set forth in claim 1, wherein the protection circuit is mounted at said B line side as a protection against a false connection with a battery. A protection circuit as set forth in claim 2, wherein said voltage limiting circuit (12') is comprised of three transistors (Q₂₂, Q₂₃,Q₂₄) having the same conductivity and connected in series, the first transistor (Q₂₂) is a saturation transistor receiving, at the base thereof, said first control signal (I₀) and having, between the base and emitter thereof, a resistor (R₂₄), and each of the remaining second and third transistors (Q₂₃,Q₂₄) is connected in the form of a diode. A protection circuit as set forth in claim 3, wherein said voltage limiting circuit (12') is comprised of a first saturation transistor (Q₂₅) receiving, at the base thereof, said first control signal, a second transistor (Q₂₆) connected in the form of a diode, both transistors being of the same conductivity type and connected in series, and a third transistor (Q₂₇) having another conductivity type, the base of which is connected with the emitter of said battery feed transistor (Q₂₁). A protection circuit as set forth in claim 4, wherein said operational amplifier (OP₂₁) to be controlled by said operational amplifier control circuit (13), has known members, i.e., a differential input stage (21), a high gain amplifier stage (22), an output stage (23), and a current source (24), which supplies a driving current to the above-mentioned three stages, and said operational amplifier control circuit (13) includes a current stopping means (30) for making said driving current ON and OFF, for energizing and stopping the operational amplifier, respectively. A protection circuit as set forth in claim 10, wherein said current source comprises a constant current source comprised of a current mirror circuit (41), said current stopping means is comprised of a bypassing means (31) connected in parallel with an input transistor (Q₅₁) of the current mirror circuit, and the operation of said operational amplifier is stopped when the bypassing means (31) is made conductive. A protection circuit as set forth in claim 11, wherein said bypassing means (31) is comprised of a transistor switch (Q₅₂), the base of which receives said second control signal (I S ) for turning ON said bypassing means. A protection circuit as set forth in claim 10, wherein said operational amplifier (OP₁) contains near an output stage thereof, a ground level clamping means (D₂) for clamping the output voltage of the output stage at the ground level, so that an undesired current is prevented from flowing through said battery feed transistor, which current is induced when a ground fault occurs on said B line. A protection circuit as set forth in claim 13, wherein said ground level clamping means is comprised of a voltage clamp diode (D₂) connected between a ground terminal and a base of a transistor (Q₄₀), which transistor is one of a pair of transistors (Q₄₀,Q₄₁) forming said output stage and disposed at a positive power source side. A protection circuit as set forth in claim 14, wherein said voltage clamp diode is comprised of a transistor connected in the form of diode, which transistor and said transistor of said pair of transistors have the same conductivity type, and these transistors and other transistors for forming said operational amplifier are fabricated on the same IC chip. A protection circuit as set forth in claim 9, wherein said first saturation transistor (Q₂₅) is sandwiched by said second and third transistors (Q₂₆,Q₂₇), so that the first transistor (Q₂₅) can be saturated when a false connection between the B line and the battery occurs and a resistor component (r = 0) is not included therein.

Inventors: KINOSHITA, KAZUMI, TAKATO, KENJI, TOJO, TOSHIRO, YAMAMOTO, YUZO
Applicants: FUJITSU LIMITED
Application year: 1988
Main classification: H04M3
IPC codes: H04M3, H02H9, H04M19