Liquid crystal display device

Abstract: A liquid crystal display device comprising a plurality of thin film transistors formed on a transparent insulating substrate (1), in which each of the thin film transistors is composed of a gate electrode (2) formed on the transparent insulating substrate (1), a semiconductor film (4) formed on the gate electrode (2) by the mediation of a gate insulation film (3), a protective insulating film (5) formed on the semiconductor film (4), and a metal thin film (13) and a transparent conductive film (10), in this order, laminated on the protective insulating film (5) to provide a source electrode (6) and a drain electrode (11).

Description: BACKGROUND OF THE INVENTION The present invention relates to a liquid crystal display device comprising thin film transistors, and relates specifically to the structure of the thin film transistor. In recent years, in active-matrix liquid crystal display device, studies have been actively carried out on the active-matrix substrates wherein thin film transistors (hereinafter referred to as TFT) are formed in a matrix arrangement on an insulating substrate. Semi-conductor materials used for TFT include poly Si (polycrystalline silicon), a-Si (amorphous silicon), Te, and CdSe and others. An example of the structure of the field effect TFT using a-Si which is employed in the liquid crystal displying apparatus is shown by a plan view in Fig. 4 and a cross-sectional view in Fig. 5. Fig. 5 shows a cross-section taken along line B-B in Fig. 4. A gate electrode 21 of about 1000 - about 4000 Å in thickness is formed on a transparent insulating substrate 20 such as a glass substrate, and a gate insulating film 22 of about 100 - about 5000 Å in thickness, an a-Si film 23 of about 100 - about 2000 Å in thickness, and a protective insulating film 24 of about 1000 - about 6000 Å in thickness are laminated thereon consecutively without breaking vacuum by the plasma CVD method. Next, the protective insulating film 24 is patterned, and a P (phosphorus)-doped n⁺-a-Si film 25 of about 100 - about 1000 Å in thickness and a source-drain metal film 26 are laminated, and patterning is performed to form a source electrode 27 and a drain electrode 28 (the protective insulating film 24 is provided to protect the a-Si film 23 from an etchant in performing the n⁺-a-Si film 25 patterning). Furthermore, a pixel electrode 29 is formed in contact with the drain electrode 28. Thus, as is obvious from rig. 4, a TFT and a pixel are formed at each point of intersection of a gate electrode line 30 and the source electrode 27 in an array shape. Generally, in the active matrix substrate using TFTs, TFT of each point of intersection is driven by a line sequential method. This means that a scanning signal is inputted from one gate electrode line to be scanned, and a data signal is inputted from each source electrode line. The TFT is operated by the respective inputted signals and controls ON/OFF of a current flowing into the drain electrode, and selects the state of turn-on or turn-off of the pixel electrode connected to the drain electrode. The total number of TFTs connected to the pixel electrodes is large. For example, there are 87,500 pieces of TFTs in a 250 x 350 matrix. If a defect is produced among a large number of TFTs, a point defect is produced inevitably, and the yield rate of the display device is reduced. A possible cause of the point defect is that an electrical connection breaks between the drain electrode and the source electrode, or in reverse, an electric short-circuit takes place in the channel part, and thereby the TFT cannot be controlled and normal display cannot be performed. The TFT having the above-mentioned structure has a deficiency in that after patterning to form the source electrode 27 or the drain electrode 28, for example, using Ti, over-etching occurs on the step part (as shown by a mark X in Fig. 4) extending onto the gate electrode line 30, and thereby increasing the resistance of the source electrode 27 or the drain electrode 28 or a break in the electrical connection of the source electrode 27 or the drain electrode 28 is caused, and therefore a point defect is likely to be produced. The present invention has been achieved in light of the above-mentioned circumstances, and has as its purpose to provide a liquid crystal display device capable of improving the yield rate and the reliability of the TFTs. SUMMARY OF THE INVENTION The present invention provides a liquid crystal display device comprising an array of display elements each connected to a respective one of a corresponding array of thin film transistors, each said transistor comprising: a gate electrode formed on a transparent insulating substrate of the device; an insulation film which covers the substrate and the gate electrode; a semiconductor film formed on said insulation film so as to extend over the gate electrode; a protective insulating film formed on said semiconductor film so as to extend over the gate electrode; respective doped semiconductor layers formed on either side of the gate electrode for the source and drain of the transistor, each doped layer extending over an edge of the protective insulating film so as to contact a portion of the semiconductor film and a portion of the protective insulating film, with a gap between the doped layers on the protective insulating film; and source and drain electrodes which each comprise a respective metal thin film formed on the associated doped layer, characterised in that: each of said source and drain electrodes further comprises a respective transparent conductive film laminated on said metal thin film. For the semiconductor film in the present invention, a semiconductor material such as amorphous silicon or polycrystalline silicon is used. Also, for the metal thin film forming the source electrode and the drain electrode, a Ti film or Mo film of about 1000 - about 5000 Å in thickness is preferably used. Furthermore, for the transparent conductive film laminated on the metal thin film, an indium tin oxide film of about 500 - about 3000 Å in thickness is preferred. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a magnification of the structure of the present invention showing a plan view of its surface. Fig. 2 is a cross-sectional view taken along line A-A in Fig. 1 Fig. 3 is a cross sectional diagram showing the sequential nature of the manufacturing process of the present invention. Fig. 4 is a view equivalent to Fig. 1 of a conventional example. Fig. 5 is a cross-sectional view taken along line B-B in Fig. 4. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS It is preferable that the liquid crystal display device of the present invention is an active-matrix type. The active-matrix liquid crystal display device provides a plurality of transparent electrodes disposed on a transparent insulating substrate in a matrix fashion to form pixels in which a thin film transistor is connected to each one of the transparent electrodes. Two or more thin film transistors can be connected to one transparent electrode. In this case, it is preferable that each source electrode in the thin film transistors be independently connected to an exterior circuit, through which the inspection of characteristics of each thin film transistor can be easily conducted. Referring to Fig. 1 and Fig. 2, numeral 1 designates a transparent insulating substrate, for example, a glass substrate. Numeral 2 designates a gate electrode, which is formed in part of a gate electrode line 18 which has a predetermined size of width, for example, about 15 µm, and is formed in a belt shape on the transparent insulating substrate 1. An amorphous silicon film (hereinafter referred to as a-Si film) 4 being a semiconductor film and a protective insulating film 5 are laminated in the above-mentioned order on a gate insulating film 3, for example, made from silicon nitride which is provided so as to cover the gate electrode 2. Numeral 6 designates a source electrode, which is provided on the protective insulating film 5 and is formed integrally with a source electrode line 7 formed at a right angle to the gate electrode line 18. The source electrode 6 is formed by having a Ti film 9 of metal thin film and a transparent conductive film 10 laminated in order as stated above, on a phosphorus-doped n⁺-a-Si film 8 laminated on the protective insulating film 5. Similarly, a drain electrode 11 is formed by having a Ti film 13 of metal thin film and a transparent conductive film 14 laminated as in the order stated above on a phosphorus-doped n⁺-a-Si film 12 laminated on the protective insulating film 5 opposite to the source electrode 6. The Ti films 9 and 13 may be replaced by Mo films. Also, for the respective transparent conductive films 10 and 14, ITO (Indium Tin Oxide) films are preferred. A thin film transistor 15 is formed as described above. Numeral 16 designates a pixel electrode, and the transparent conductive film 14 constituting the drain electrode 11 is extended to the pixel region, and is laminated on the gate insulating film 3 extended likewise to the pixel region. Numeral 17 designates a protective film interposed between the source wiring 7 and the gate electrode line 18. Next, description is made on one example of the manufacturing process of this embodiment in reference to Fig. 3. First, the gate electrode 2 of about 1000 - about 4000 Å in thickness is formed on the transparent insulating substrate 1. Then, the gate insulating film 3 of about 1000 - about 5000 Å in thickness, the a-Si film 4 of about 100 - about 2000 Å in thickness, and the protective insulating film 5 of about 1000 - about 6000 Å in thickness are consecutively laminated on the gate electrode 2 by the plasma CVD method without breaking vacuum, and thereafter the protective insulating film 5 is patterned by etching (Fig. 3(a)). Next, as shown in Fig. 3(b), the phosphorus-doped n⁺-a-Si film 8 of about 100 - about 1000 Å in thickness and a Ti source drain metal layer 9 of about 1000- about 5000 Å in thickness for forming the source electrode 6 and the drain electrode 11 are laminated. Thereafter, as shown in Fig. 3(c), the n⁺-a-Si film 8 and the source drain metal layer 19 are patterned to form into the Ti films 9 and 13 constituting the source electrode 6 and the drain electrode 11, respectively. Finally, as shown in Fig. 3(d), the transparent conductive film is laminated and thereafter patterned to form into the transparent conductive films 10 and 14 constituting the source electrode 6 and the drain electrode 11, respectively, and thus the pixel electrode 16 is formed. This process is used to form the pixel electrode. By forming the source electrode 6 and the drain electrode 11 of the thin film transistor 15 with a two-layered film of the Ti film and the transparent conductive film used for the pixel electrode 16 as described above, even if a pattern disconnection takes place in either of the Ti films 9 and 13 in the step part (as shown by a mark X in Fig. 1) extending onto the gate electrode line 18, this defect is repaired by patterning the source electrode 6 and the drain electrode 11 in the subsequent pixel forming process, and thereby the probability of causing the point defect is reduced. In addition, in the above-mentioned embodiment, we are describing only one thin film transistor and one pixel electrode, but it is needless to say that the above-mentioned configuration is formed in a matrix fashion to configurate a liquid crystal display device for an active-matrix display. Therefore, in accordance with the present invention, the rate of producing point defects due to broken electrical connections in the source electrode and the drain electrode is reduced, and thereby a liquid crystal display device capable of improved yield rates and reliability to a great extent is obtainable.

Claims: A liquid crystal display device comprising an array of display elements each connected to a respective one of a corresponding array of thin film transistors (15), each said transistor comprising: a gate electrode (2) formed on a transparent insulating substrate (1) of the device; an insulation film (3) which covers the substrate (1) and the gate electrode (2); a semiconductor film (4) formed on said insulation film (3) so as to extend over the gate electrode (2); a protective insulating film (5) formed on said semiconductor film (4) so as to extend over the gate electrode (2); respective doped semiconductor layers (8, 12) formed to either side of the gate electrode (2) constituting the source and drain of the transistor, each doped layer extending over an edge of the protective insulating film (5) so as to contact a portion of the semiconductor film (4) and a portion of the protective insulating film (5), with a gap between the doped layers on the protective insulating film; and source and drain electrodes (6, 11) which each comprise a respective metal thin film (9, 13) formed on the associated doped layer (8, 12), characterised in that: each of said source and drain electrodes (6, 11) further comprises a respective transparent conductive film (10, 14) laminated on said metal thin film (9, 13). A liquid crystal display device in accordance with claim 1, wherein the semiconductor film (4) is of amorphous silicon, the metal thin film (9, 13) is of titanium, and the transparent conductive film (10, 14) is of indium tin oxide. A liquid crystal display device in accordance with claim 1, wherein the semiconductor film (4) is of amorphous silicon, the metal thin film (9, 13) is of molybdenum, and the transparent conductive film (10, 14) is of indium tin oxide. A liquid crystal display device in accordance with any one of claims 1 to 3, wherein the metal thin film (9, 13) has a film thickness of about 1000 - about 5000 Å, and the transparent conductive film (10, 14) has a film thickness of about 500 - about 3000 Å. A liquid crystal display device in accordance with any one of the preceding claims, wherein the transparent conductive film (14) of the drain electrode (11) is continuous with an electrode (16) of the associated display element.

Inventors: KATO HIROAKI, KATO, HIROAKI
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1988
Main classification: G02F1
IPC codes: H01L21, G02F1, H01L29, H01L27