Photoelectric converting apparatus

Abstract: In a photoelectric converting apparatus having a plurality of photosensors (S d , S f , S₁...S n ) divided into an opening portion (S₁-S n ) and a light shielding portion (S d & S f ), a carrier eliminating structure (S f ) to block the inflow of photosignals from the opening portion is provided between the photosensor in the light shielding portion (S d ) and the photosensors in the opening portion (S₁). The photosensor consists of a photoelectric converting transistor having a control electrode region (103) to accumulate the carriers generated by the light excitation. The carrier eliminating structure has the same constitution as that of the photosensor. The potential of the control electrode region (103) is fixed to a constant potential so as to attract the carriers from the opening portion.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a photoelectric converting apparatus having a plurality of photosensors which are divided into a light receiving portion and a light shielded portion. Related Background Art Fig. 1 is a schematic constitutional diagram of a conventional photoelectric converting apparatus having the dark output compensating function. In the diagram, a sensor section 1 comprises cells S 1 to S n in the light receiving portion to perform the photoelectric conversion and a cell S d in the light shielded portion to obtain a dark reference output. Signals of the cells are sequentially output by a scan section 2 and input to a dark output compensation section 3. The dark output compensation section 3 subtracts a dark reference signal amount of the cell S d from the signals of the cells S 1 to S n and outputs. Since the output of the sensor cell S d in the light shielded portion corresponds to a dark current of the sensor cell, by subtracting the dark reference signal amount of the cell S d from the signals of the cells S 1 to S n , the noise components by the dark current are eliminated. Thus, the photoelectric conversion signal which accurately corresponds to the incident light can be derived. A clamping circuit can be used as the dark output compensation section 3, or it is also possible to use a sample and hold circuit to hold the dark reference signal of the cell S d and a difference circuit to obtain the differences between the dark reference signal and the signals of the cells S 1 to S n . Fig. 2 is a schematic cross sectional view of the sensor section 1 in the foregoing conventional apparatus. In the diagram, the sensor cells S d and S 1 to S n are formed in a line in an n - layer 701 with device separating regions 702. Each cell has a p region 703 to accumulate the carriers generated by the light excitation. A light shielding film 704 is formed on the cell S d , thereby constituting a light shielded portion. However, the foregoing conventional photoelectric converting apparatus has a problem such that when the strong light enters the light receiving portion, the carriers leak from the light receiving portion to the light shielded portion and exert an adverse influence on the dark reference output. Namely, as shown in Fig. 2, when the strong light enters and the excess carriers (in this case, holes) are accumulated in the p region 703 of the cell S 1 in the light receiving portion, these excess carriers 705 flow out to the side of the n - layer 701 and flow into the p region 703 of the adjacent cell S d in the light shielded portion. Thus, the dark reference output of the cell S d changes and the foregoing accurate dark output compensation cannot be performed. A base storage type photosensor is known from EP-A-0132076. A photosensor device having a light shielded portion is known from US-A-4293877. US-A-4300163 proposes a solid-state imaging apparatus in which an imaging unit has a light receiving section comprising a two-dimensional array of photodiodes, and a light shielded section comprising a single line of optically-shielded photodiodes. It is proposed that in place of the one line or row of the optically-shielded photodiode array as illustrated in US-A-4300163, two lines of shielded photodiode arrays may be arranged in the case of interlace scanning. SUMMARY OF THE INVENTION According to the present invention there is provided photoelectric converting apparatus as set out in claim 1, and a photoconversion method as set out in claim 10. The remaining claims set out optional features. An embodiment of the invention provides a photoelectric converting apparatus in which the signals of photosensors in the light receiving portion are not mixed into the dark reference signal from the light shielded portion. By providing the means to eliminate excess carriers between photosensors of the light receiving portion and the dark signal sensor of the light shielded portion, the leakage of the photosignals from the light receiving portion is blocked and a dark signal output can be derived from the dark signal sensor in the light shielded portion which is not influenced by the light. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic constitutional diagram of a conventional photoelectric converting apparatus having the dark output compensating function; Fig. 2 is a schematic cross sectional view of a sensor section 1 in the above conventional apparatus; Fig. 3 is a schematic cross sectional view of an embodiment of a photoelectric converting apparatus according to the present invention; Fig. 4 is a cross sectional view taken along the line A-A in the embodiment shown in Fig. 3; Fig. 5A is an equivalent circuit diagram for explaining the fundamental operation of the photoelectric converting cell; Fig. 5B is a voltage waveform diagram showing the operation of the circuit of Fig. 5A; Fig. 6 is a schematic circuit diagram of an embodiment using the photoelectric converting cells; Fig. 7 is a timing chart showing an example of timings for respective pulses which are output from a driver 77; Fig. 8 is a schematic circuit diagram in the second embodiment of a photoelectric converting apparatus according to the invention; Fig. 9 is a schematic cross sectional view of an example of a photoelectric converting cell; Fig. 10 is an equivalent circuit diagram for explaining the fundamental operation of the photoelectric converting cell; Fig. 11 is a schematic circuit diagram in the third embodiment of the invention using the photoelectric converting cells; and Fig. 12 is a timing chart showing an example of timings for respective pulses which are output from the driver 77. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail hereinbelow with reference to the drawings. Fig. 3 is a schematic cross sectional view of an embodiment of a photoelectric converting apparatus according to the invention. Fig. 4 is a cross sectional view taken along the line A-A in Fig. 3. In Figs. 3 and 4, an n - layer is formed on an n type substrate 101 by an epitaxial growth. The cells S d , S 1 , S 2 , ..., S n and an excess carrier eliminating cell S f are formed in a line in the n - layer so as to be separated from each other by device separating regions 116. The excess carrier eliminating cell S f is located between the cell S d and the cell S 1 . The n - layer serves as a collector region 102 in each cell. A p base region 103 is formed in each cell. An n + emitter region 104 is formed in each p base region 103. Thus, an npn type bipolar transistor is formed. A p + region 105 is formed in the p base region 103. A p + region 106 is formed in the n - layer 102 at a constant distance. Further, a gate electrode 108 is formed through an oxide film 107. In this manner, a p channel MOS transistor for resetting (hereinafter, referred to as a reset Tr) is constituted. The reset Tr may be obviously replaced by an n channel MOS transistor. An insulative film 109 is formed on the bipolar transistor and reset Tr. An electrode 110 joined to the p + region 106 and an emitter electrode 111 joined to the n + emitter region 104 are formed, respectively. Further, an insulative film 112 is formed on the insulative film 109. The portion excluding the light receiving portion is covered by a light shielding film 113. The light shielding film 113 is formed over the cells S d and S f , thereby constituting the light shielded portion. The other cells S 1 to S n constitute the light receiving portion. On the other hand, a collector electrode 114 is formed on the back surface of the substrate 101. In this apparatus, the incident light is converted into the electric signals by the cells S 1 to S n . A dark reference signal for dark output compensation is derived from the cell S d . The inflow of the excess carriers to the dark reference cell S d is blocked by the cell S f formed between the light receiving portion and the cell S d . The p base region 103 in the excess carrier eliminating cell S f in the embodiment is fixed to a potential V fx of a collector potential V cc or less. Therefore, even if the excess holes accumulated in the p base region 103 of the cells S 1 to S n overflowed, they are attracted to the p base region 103 of the cell S f and do not reach the dark reference cell S d . Namely, even if the strong light had entered the photoelectric converting cells in the light receiving portion and the excess carriers flowed out from the p base region 103 to the collector side, the correct dark reference output can be always obtained from the dark reference cell S d . Further, in the embodiment, since the excess carrier eliminating cell S f has the same constitution as those of the other cells, any special manufacturing process is unnecessary to form the cell S f . On the other hand, since the cells of the same constitution are arranged, this embodiment is also advantageous with respect to noise. Although the case of the photoelectric converting cell using the npn type bipolar transistor has been described in the embodiment, the invention can be obviously easily applied to a photoelectric converting cell using a field effect transistor, an electrostatic induction transistor, or the like which has a region to accumulate the carriers. The operation of the photoelectric converting cell in the embodiment will now be explained. Fig. 5A is an equivalent circuit diagram for explaining the fundamental operation of the foregoing photoelectric converting cell. Fig. 5B is a voltage waveform diagram showing the operation of the circuit of Fig. 5A. In Fig. 5A, the photoelectric converting cell is equivalent to a circuit in which the p base region 103 of the npn type bipolar transistor is connected to a drain of a reset Tr 5. A pulse  res is input to the gate electrode 108 of the reset Tr 5. A constant voltage V bg (e.g., 2 V) is properly applied to the source electrode 110 of the reset Tr 5. The emitter electrode 111 is connected to a terminal 115 through an n channel MOS transistor 8. A pulse  vrs is input to a gate electrode of the transistor 8. A voltage which is sufficiently lower than the voltage V bg or an earth voltage is properly applied to the terminal 115. First, in the accumulation operation, a potential V b of the p base region 103 is set into a floating state at an initial positive potential and the emitter region 104 is set into a floating state at the zero potential, respectively. The positive voltage V cc is applied to the collector electrode 114. On the other hand, the gate electrode 108 of the reset Tr 5 is set to a positive potential. The reset Tr 5 is set to the OFF state. When the light enters the photo sensitive portion in this state, as many carriers (in this case, holes) as the quantity of light are accumulated in the p base region 103. At this time, since the p base region 103 is set to the initial positive potential, when the carriers are accumulated by the light excitation, the signal corresponding to the accumulated carriers is simultaneously read out to the emitter side in the floating state, so that a photoelectric conversion output is obtained. Namely, in this embodiment, the reading operation is executed simultaneously with the accumulation operation. The operation to extinguish the carriers accumulated in the p base region 103 will now be described. As shown in Fig. 5B, since the negative voltage pulse  res is first applied to the gate electrode 108 of the reset Tr 5, the reset Tr 5 is turned on (for a period of time T 1 ). Thus, the potential V b of the p base region 103 is set to the constant voltage V bg irrespective of the voltage which has been accumulated so far, i.e., independently of the illumination of the incident light. The constant voltage V bg is set to a value which is sufficiently higher than a base residual potential V k after completion of the carrier extinguishing operation. For example, V bg = 2V. Next, the transistor 8 is turned on by the positive voltage pulse  vrs . The earth voltage at the terminal 115 or a voltage sufficiently lower than V bg is applied to the emitter electrode 111 through the transistor 8 (for a period of time T 2 '). The positive voltage pulse  vrs can be also obviously applied earlier so as to be present continuously after the leading (falling) edge of the pulse  res (for a period of time T 2 ). Thus, the holes accumulated in the p base region 103 are recombined with the electrons injected from the n + emitter region 104 into the p base region 103, so that the holes are extinguished. As already mentioned above, the potential V b of the p base region 103 is set to the potential V bg which is sufficiently higher than the residual potential V k irrespective of the accumulated potential for the period of time T 1 . Therefore, after the elapse of the period of time T 2 or T 2 ', the potential V b of the p base region 103 is set to the constant potential V k independently of the intensity of the illuminance. On the other hand, after completion of the period of time T 2 or T 2 ', the pulse  vrs ends to turn off the transistor 8, so that the emitter electrode 111 is set into the floating state. The operation mode enters the foregoing accumulation or readout operation. As mentioned above, by providing the period of time T 1 when the potential of the p base region 103 is set to the constant potential V bg , the potential V b of the p base region 103 can be set to the constant value V k at the end of the extinguishing operation for the period of time T 2 or T 2 '. Therefore, the non-linearity of the photoelectric converting characteristics and the after image phenomenon when the illuminance is low can be completely prevented. On the other hand, since the potential of the p base region 103 is not controlled by a capacitor, reduction and variation in output due to the capacitor do not occur. Fig. 6 is a schematic circuit diagram of the embodiment using the foregoing photoelectric converting cells. The cells S d , S f , and S 1 to S n in the embodiment are arranged in a line as shown in Fig. 3. In Fig. 6, the gate electrode 108 of the reset Tr 5 of each of cells S d and S 1 to S n is commonly connected to a terminal 70. A pulse  res is input to the terminal 70. On the other hand, the source electrodes 110 are commonly connected to a terminal 72. The voltage V bg is applied to the terminal 72. However, the potential of the p base region 103 of the excess carrier eliminating cell S f is fixed to V fx . For this purpose, the reset Tr 5 is always held in the ON state and the voltage V fx is applied to the source electrode 110. Or, an electrode is directly connected to the p base region 103 and the voltage V fx is applied to this electrode. The emitter electrodes 111 of the respective cells are connected to the ground through the transistor 8. The gate electrodes of the transistors 8 are commonly connected to the terminal 71. The pulse  vrs is input to the terminal 71. Further, the emitter electrode, 111 of each cell is connected to a capacitor C t for accumulation through a transistor 11. Each capacitor C t is commonly connected to an output line 20 through each transistor 12. A gate electrode of each transistor 11 is commonly connected to a terminal 73. A pulse  t is input to the terminal 73. A gate electrode of the transistor 12 is connected to an output terminal of a shift register 13. The transistors 12 are sequentially turned on by the shift register 13. The shift register 13 is made operative by a shift pulse  sh which is input from a terminal 79 and the high level position is successively shifted. The output line 20 is connected to an output terminal 76 through an output amplifier 15. An input of the output amplifier 15 is connected to a terminal 74 through a transistor 14. The constant voltage V bh is applied to the terminal 74. On the other hand, a pulse  hrs is input to a gate electrode 75 of the transistor 14. Each of the foregoing pulses , and the constant voltages V bg , V fx , and V bh are supplied from a driver 77. The driver 77 outputs each pulse at the timing responsive to a clock signal from an oscillator 78. The operation of the embodiment will now be described hereinbelow with reference to Fig. 7. Fig. 7 is a timing chart showing an example for the timings of the respective pulses which are output from the driver 77. In Fig. 7,  t(A) and  t(B) represent timings for different reading methods. The case of the  t(A) will be first described. By setting the pulse  res to the low level at time t 2 after the pulses  t and  vrs were set to the high level at time t 1 , all of the reset Tr 5 (in this case, the p channel MOS transistors) are turned on, thereby setting the potential of the p base region 103 of each cell to the constant potential V bg . On the other hand, since the  t is at the high level, the transistor 11 is in the ON state and the charges in the capacitor C t are eliminated through the transistors 11 and 8. When the pulse  res then ends (rises) at time t 3 , since the pulse  vrs is still held at the high level, the carriers accumulated in the base are gradually recombined and extinguished as already mentioned above. The amount of residual carriers in the base at time t 4 in each cell (excluding the cell S f ) is always equal irrespective of the amount of carriers which were present in the base before time t 2 . When the  vrs falls at time t 4 , the emitter electrode 111 of each cell is connected to the capacitor C t through the transistor 11. The foregoing accumulation and readout operations are executed until the  t falls at time t 6 . Namely, as the carriers excited by the light in the cells S 1 to S n are accumulated in the base, the carriers corresponding to the accumulated amount are then accumulated into the capacitors C t , respectively. At this time, even if the excess carriers flowed out from the base to the collector side by the strong light, they are attracted to the p base region of the excess carrier eliminating cell S f and do not reach the dark reference cell S d . When the  t falls at time t 6 , the transistors 11 are turned off and the signals photoelectrically converted in the cells S 1 to S n and the dark reference signal of the dark reference cell S d are accumulated and stored into the capacitors C t , respectively. Although the output from the cell S f is also accumulated into the capacitors C t , this output is ignored at the following stage in this embodiment. Next, the operations to sequentially take out the information accumulated in the capacitors C t and to serially output are executed. First, by applying one pulse  hrs at time t 7 , the transistor 14 is turned on, thereby eliminating the charges remaining in the stray capacitance of the output line 20. Subsequently, by applying one pulse  sh at time t 8 , the scan of each transistor 12 by the shift register 13 is started. When one transistor 12 is turned on, the charges accumulated in the capacitor C t corresponding to this transistor are taken out to the output line 20 and output from the output terminal 76 to the outside through the amplifier 15. Immediately after that, the transistor 14 is turned on by the  hrs and the output line 20 is cleared. The above-mentioned signal take-out operations are successively executed at the timings of the shift pulses  sh with respect to the cells S d to S n . The signals photoelectrically converted for the time interval from time t 4 to time t 6 and the dark reference signal can be sequentially output. After all of the signals accumulated in the capacitors C t were taken out, the carrier extinguishing operation for the period of time from t 1 to t 4 , the accumulation and readout operations for the period of time from t 4 to t 6 , and the signal take-out operation after time t 7 are again repeated in accordance with this order. The readout operations in the case of the  t(B) are the further improved operations of those in the case of the  t(A) . Namely, the  t is set to the low level for the period of time from t 4 to t 5 . Thus, the carriers generated in the base of each cell due to the light excitation are accumulated into each cell without being accumulated into the capacitor C t . The signals which were accumulated in the cells are respectively transferred to the capacitors C t by the  t in the period of time from t 5 to t 6 . According to this method, it has been confirmed by the experiments that the output level was improved by 20 to 30 % and the variation in sensitivity was also remarkably reduced as compared with those in the case of the  t(A) . On the other hand, although the  vrs has been set to the high level for the period of time from t 1 to t 3 , it can be also set to the low level. In such a case, there are effects such that the current flowing between the base and the emitter of the cell can be cut out for the period of time from t 1 to t 3 and the electric power consumption is reduced. In this manner, each signal of the cells S d , S f , and S 1 to S n is serially output as an output signal V out from the terminal 76 of the amplifier 15 to the outside. The noise components by the dark current are eliminated by the dark output compensation section 3 described in Fig. 1. In this case, the output of the cell S f is ignored in the dark output compensation section 3. Although the case of the line sensor has been described in the above embodiment, the same shall also apply to an area sensor. It is sufficient to use a constitution in which a plurality of line sensor sections are arranged. As explained in detail above, in the photoelectric converting apparatus according to the first embodiment of the invention, by providing the carrier eliminating means between the cells S 1 to S n of the light receiving portion and the cell S d of the light shielded portion, the leakage of the photosignals from the light receiving portion is blocked and an output which is not adversely influenced by the light can be obtained from the sensor in the light shielding portion. Therefore, for example, the correct dark reference signal can be obtained from the sensor in the light shielded portion. The accurate dark output compensation of the photoelectric conversion output, peak detection output, or the like can be executed. Fig. 8 is a schematic circuit diagram of the photosensors S 1 to S n in photoelectric converting apparatus as shown in Figs. 1 to 7 in a second embodiment of the invention. In the diagram, a sensor section 201 is constituted by arranging a plurality of photosensors in a line or like an area as shown in Fig. 1. In this example, the sensor section 201 comprises the n photosensors S 1 to S n arranged in a line. The light shielded photocells S d and S f are not shown. It is desirable that the photosensor having two or more output terminals of the readout signal is used. The readout signals of the photosensors are sequentially taken out by a scan section 202 and output as signals V out to the outside through an amplifier 203. On the other hand, to detect the peak value or mean value of the readout signals, the output terminals of the sensors are connected to a common line 204 through switching transistors. Every three of gate electrodes of the switching transistors are commonly connected. Transistor groups Q 1 to Q m are constituted as examples of selecting means. It is obviously possible to constitute the transistor groups by commonly connecting a desired number of gate electrodes. The gate electrodes of each of the transistor groups Q 1 to Q m are commonly connected, respectively. By inputting selection pulses  1 to  m , each transistor group is turned on or off. A detection signal of the peak value, mean value, or the like appearing on the common line 204 is transmitted through an amplifier 205 and output as a signal V de to a gain control circuit or the like. With this constitution, a desired transistor group can be turned on by the selection pulses  1 to  m and the photosensors in a desired portion can be used to measure the light. For example, by setting the pulses  1 and  2 to the high level to turn on only the transistor groups Q 1 and Q 2 , the peak value or mean value can be detected by the readout signals of the photosensors S 1 to S 6 . The sensor section 201 in the embodiment is not limited to the line sensor. The invention can be also similarly applied to an area sensor with a constitution such that a plurality of line sensors are arranged. In this case, each section of the photosensors S 1 to S n in the sensor section 201 corresponds to each column in the area and comprises a plurality of photosensors. A practical example of the photosensors is shown and the third embodiment using these photosensors will now be described. First, a structure of the photoelectric converting cells which are used in this embodiment and the fundamental operation will be explained. Fig. 9 is a schematic cross sectional view of an example of the photoelectric converting cells. In the diagram, the same parts and components as those shown in Fig. 4 are designated by the same reference numerals. The n + emitter region 104 and an n + emitter region 104a are formed in the p base region 103, thereby constituting an npn type bipolar transistor of a double emitter structure. An emitter electrode 111a is formed in correspondence to the emitter region 104a. Although the case of the photoelectric converting cell using the npn type bipolar transistor has been shown, the photoelectric converting cell can also use for instance a field effect transistor or an electrostatic induction transistor. Fig. 10 is an equivalent circuit diagram for explaining the fundamental operation of the foregoing photoelectric converting cell and differs from Fig. 5A with respect to only a point that the cell in Fig. 10 has the emitter electrode 111a. The drive voltages are similar to those in Fig. 5B. Fig. 11 is a schematic circuit diagram in the third embodiment of the invention using the foregoing photoelectric converting cells and the same parts and components as those shown in Fig. 6 are designated by the same reference numerals. The emitter electrodes 111a of the cells are connected to the common line 204 through the transistor groups Q 1 to Q m each consisting of two transistors. Selection pulses  p1 to  pm are input to the gate electrodes of the transistor groups, thereby turning on or off each transistor group. On the other hand, the common line 204 is connected to the input terminal of the amplifier 205 and is also connected to the ground through a transistor 206 for resetting. A pulse  cp is input to the transistor 206. The operation in this embodiment will be described hereinbelow with reference to Fig. 12. Fig. 12 is a timing chart showing an example of the timings for the respective pulses which are output from the driver 77. In this example, the case where the cells S 1 and S 2 were selected for peak detection will be described. As explained hereinafter, the cells can be easily selected by the selection pulses  p1 to  pm . In Fig. 12,  t(A) and  t(B) denote the timings for the different reading methods, respectively. The case of the  t(A) will be first described. By setting the  res to the low level at time t 2 after the pulses  t and  vrs and selection pulses  p1 to  pn were set to the high level at time t 1 , all of the reset Tr 5 are turned on, thereby setting the potential of the p base region 103 of each cell to the constant potential V bg . On the other hand, since the  t is at the high level, the transistor 11 is in the ON state. The charges in the capacitor C t are eliminated through the transistors 11 and 8. Further, since the transistor groups Q 1 to Q m and transistor 206 are turned on, the charges on the common line 204 are eliminated. Next, when the  res falls at time t 3 , since the  vrs and  p1 to  pm and  cp are still at the high level, the carriers accumulated in the base are gradually recombined and extinguished as already mentioned above. The amount of carriers remaining in the base at time t 4 is always equal with respect to all of the cells irrespective of the amount of carriers which have remained in the base before time t 2 . Next, since the cells S 1 and S 2 are designated as the sensors for peak detection, the selection pulse  p1 is held at the high level and the  vrs ,  p2 to  pm , and  cp are set to the low level at time t 4 . Thus, the emitter electrode 111 of each cell is connected to the capacitor C t through the transistor 11 and at the same time, only the emitter electrodes 111a of the selected cells S 1 and S 2 are connected to the common line 204 through the transistor group Q 1 . The foregoing accumulation and readout operations are executed until the  t falls at time t 6 . Namely, as the carriers generated in the cells S 1 to S n by the light excitation are accumulated in the base, the carriers as many as the accumulated amount are accumulated into the capacitors C t , respectively. At the same time, the peak value of the readout signals of the cells S 1 and S 2 appears on the common line 204 and is output as a peak output V pk through the amplifier 205. The peak output V pk is input to the gain control circuit and used to adjust the gain when the output signal V out is processed. The peak output V pk is also input to a control circuit and used to adjust the accumulation periods of the cells S 1 to S n . When the  t and  p1 fall at time t 6 , the transistors 11 are turned off and the signals photoelectrically converted by the cells S 1 to S n are accumulated and stored in the capacitors C t , respectively. Next, the operations to sequentially take out the information accumulated in the capacitors C t and to serially output them are executed. First, by applying one pulse  hrs at time t 7 , the transistor 14 is turned on, thereby eliminating the charges remaining in the stray capacitance of the output line 20. Subsequently, by applying one pulse  sh at time t 8 , the scan of each transistor 12 by the shift register 13 is started. When one transistor 12 is turned on, the charges accumulated in the corresponding capacitor C t are taken out to the output line 20 and output from the output terminal 76 to the outside through the amplifier 15. Immediately after that, the transistor 14 is turned on by the  hrs and the output line 20 is cleared. The foregoing signal take-out operations are sequentially executed at the timings of the shift pulses  sh with respect to the cells S 1 to S n . The signals photoelectrically converted for the time interval from t 4 to t 6 are successively output as the output signals V out to the outside. After all of the signals accumulated in the capacitors C t were taken out, the carrier extinguishing operation for the period of time from t 1 to t 4 , the accumulation, readout, and peak value detecting operations for the period of time from t 4 to t 6 , and the signal take-out operation after time t 7 are again repeated in accordance with this order. In this embodiment, the peak value can be detected in a real time manner by use of the readout signals of the cells which were arbitrarily selected. On the other hand, each time the output operation was finished, the cells can be also easily selected by the selection pulses  p1 to  pm . The readout operations in the case of the  t(B) are the further improved operations of those in the case of the  t(A) and are substantially similar to those described in the timing chart shown in Fig. 7. Therefore, their detailed descriptions are omitted. The signals of the cells S 1 to S n are serially output as the output signals V out from the terminal 76 of the amplifier 15 to the outside. Even in the case of constituting an area sensor, it is sufficient to perform the foregoing operations in the case of the line sensor by the vertical scan every line and constitutions of the transistor groups and the like are similar to that in this embodiment. Although the case of the peak value detection has been described in this embodiment, in the case of detecting the mean value, it is sufficient to add the capacitor for accumulation to the emitter electrode llla of each cell and to turn on the transistor group designated by the selection pulses  p1 to  pm after completion of the accumulation period. With this constitution, the mean value of the readout signals from the selected cells appears on the common line 204. As described in detail above, in the photoelectric converting apparatus according to the second and third embodiments of the invention, by providing the selecting means which can select the photosensors in a desired portion, the sensor section to perform the light measurement such as peak value detection, mean value detection, or the like can be arbitrarily switched. The optimum peak value, mean value, or the like adapted to process the readout signals can be derived.

Claims: Photoelectric converting apparatus comprising: a semiconductor photosensor section having a light receiving portion, comprising a plurality of light signal photosensors (S 1 to S n ) to provide signals in accordance with incident light, and a light shielded portion, comprising a dark signal photosensor (S d ) to provide a dark reference signal; and means (3) to compensate the signals from the said light signal photosensors (S 1 to S n ) for the dark reference signal from the said dark signal photosensor (S d ), wherein said semiconductor photosensor section has means (S f ) to eliminate excess carriers generated by incident light in said light receiving portion, located between the said dark signal photosensor (S d ) and the said light signal photosensors (S 1 to S n ), said means (S f ) to eliminate excess carriers comprising a semiconductor region (103) to receive excess carriers and means (105, 106, 108, 110) to apply a bias (V fx ) to said semiconductor region (103) whereby, when said bias (V fx ) is applied, said semiconductor region (103) receives excess carriers while the said light signal photosensors (S 1 to S n ) accumulate signals in accordance with incident light and flow of photosignals from the said light receiving portion to the said dark signal photosensor (S d ) is blocked; and said means (3) to compensate the signals from the light signal photosensors (S 1 to S n ) is arranged to ignore the signal output from said means (S f ) to eliminate excess carriers. Apparatus according to claim 1 which comprises means (11, 12, 13, 14) to read output signals from the said dark signal photosensor (S d ), the said means (S f ) to eliminate excess carriers, and the said light signal photosensors (S 1 to S n ). Apparatus according to claim 1 or claim 2 in which the apparatus further comprises means (77) to apply said bias (V fx ) to said semiconductor region (103). Apparatus according to any one of claims 1 to 3 in which each of the said photosensors (S d , S 1 to S n ) comprises a photoelectric converting transistor having a control region (103) to accumulate carriers generated by light excitation, and the means (S f ) to eliminate excess carriers comprises a transistor having the same constitution as the said photoelectric converting transistors of the said photosensors (S d , S 1 to S n ), the said semiconductor region (103) to receive excess carriers providing a control region for the transistor. Apparatus according to claim 4 in which each of the said photosensors (S d , S 1 to S n ) further comprises a reset MOS transistor (5; 105, 106, 108) electrically connected to the control region (103) of the photoelectric converting transistor of the photosensor. Apparatus according to claim 5 in which the means (105, 106, 108, 110) to apply a bias (V fx ) in the said means (S f ) to eliminate excess carriers comprises a reset MOS transistor (5; 105, 106, 108), having the same constitution as the reset MOS transistors of the photosensors (S d , S 1 to S n ), connected to the said semiconductor region (103) to receive excess carriers. Apparatus according to claim 5 in which the means to apply a bias (V fx ) in the said means (S f ) to eliminate excess carriers comprises an electrode directly connected to the semiconductor region (103) to receive excess carriers. Apparatus according to any one of the preceding claims in which the means (S f ) to eliminate excess carriers is provided in the light shielded portion. Apparatus according to any one of the preceding claims in which the light receiving portion comprises a plurality of lines, each of said lines comprising: a light receiving portion comprising a plurality of light signal photosensors; a respective light shielded portion comprising a dark signal photosensor; and a respective means to eliminate excess carriers provided between said dark signal photosensor and said light signal photosensors. A method of operating the apparatus of any one of the preceding claims for photoconversion, said method comprising: reading a plurality of signals in accordance with incident light from the plurality of light signal photosensors (S 1 to S n ) in the light receiving portion of said apparatus and reading a dark reference signal from the dark signal photosensor (S d ) in the light shielded portion of said apparatus; compensating the said signals in accordance with incident light for the said dark reference signal; and applying a bias (V fx ) to the semiconductor region (103) of said apparatus, whereby said semiconductor region (103) receives excess carriers while the said signals in accordance with incident light are accumulated by the light signal photosensors (S 1 to S n ) and flow of photosignals from said photosensors (S 1 to S n ) to said dark signal photosensor (S d ) is blocked, no signal read from the means (S f ) to eliminate excess carriers of said apparatus being used for compensating the said signals in accordance with incident light.

Inventors: NAKAMURA YOSHIO, SUGAWA SHIGETOSHI, TANAKA NOBUYOSHI, UENO ISAMU, NAKAMURA, YOSHIO, SUGAWA, SHIGETOSHI, TANAKA, NOBUYOSHI, UENO, ISAMU
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1988
Main classification: H01L27
IPC codes: H04N3, H01L27