Circuit breaker

Abstract: When a current of a distribution line is increased to about two times of a rated current of a circuit breaker (201), the circuit breaker (201) is operated to open the distribution line with a comparatively long time lag such as 100 seconds by a long time-lag tripping circuit (77) of the circuit breaker (201), on the other hand, in case that a current of 80 - 90 % of the rated current have continuously flowed before the current is increased as mentioned above, the time lag which is set in the long time-lag tripping circuit is shortened.

Description: The present invention relates generally to a circuit breaker according to the pre-characterizing part of the claim. Particularly the present invention relates to a circuit breaker having an over-current tripping device. A circuit breaker in the prior art is disclosed, for example, in the Japanese Published Unexamined Patent Application Sho 60-32211 or Japanese Utility Model Sho 55-29931. In these prior art circuit breakers, when an over-current flows in distribution lines of an electric power by accident of an electrical equipment which is connected to the distribution lines or the distribution lines itself, the over-current is detected by a current transformer which is mounted on the distribution lines. The detected signal of the current transformer is inputted to a processing circuit, and when the current exceeds a predetermined value of the current, an output signal is issued and is applied to a timer circuit. The timer circuit outputs an output signal after a predetermined time period. The output signal is applied to the gate of a thyristor, and an over-current tripping coil is excited by turn-ON of the thyristor, and thereby the contacts of the circuit breaker are opened. A circuit block diagram of a circuit breaker the present invention starts from is shown in FIG. 4. Referring to FIG. 4, a current transformer 21 is mounted on an alternating current distribution line 11. An output signal of the current transformer 21 is rectified by a full-wave rectifier 30. A voltage regulating circuit 500 is connected across a positive output terminal 31 and a negative output terminal 32 of the rectifier 30 through a resistor 40 for detecting a current flowing to the voltage regulating circuit 55. The voltage regulating circuit 500 is provided with a center terminal 5c which is grounded. Therefore, the voltage regulating circuit 500 outputs a positive voltage +V at a terminal 5a and a negative voltage -V at a terminal 5d with respect to the center terminal 5c. A differential amplifier 60 is composed of an operational amplifier 63 and resistors 64, 65, 66 and 67. A voltage across both the terminals of the resistor 40 is converted to a signal which is produced across the ground and the output terminal of the differential amplifier 60. A timer circuit 70 is composed of a long time-lag tripping circuit 170, a peak value converting circuit 210, an effective value converting circuit 211, a short time-lag tripping circuit 220 and an instant tripping circuit 230. The output signal of the operational amplifier 63 is applied to the peak value converting circuit 210, the effective value converting circuit 211 and the instant tripping circuit 230. The output signal of the peak value converting circuit 210 is applied to the short time-lag tripping circuit 220, and the output signal of the effective value converting circuit 211 is applied to the long time-lag tripping circuit 170. The respective output terminals of the long time-lag tripping circuit 170, the short time-lag tripping circuit 220 and the instant tripping circuit 230 are connected together, and are coupled to a terminal 70a of a switch 55. The other terminal of the switch 55 is coupled to a coil of a switch 120. A tripping coil 80 is connected between the positive terminal 31 of the rectifier 30 and one terminal 80A of the switch 120. The other terminal 80b of the switch 120 is coupled to the negative terminal 5d of the voltage regulating circuit 500. A shut-off mechanism 100 is driven by the tripping coil 80 which is activated by closure of the switch 120, and a contact 201 is opened by the shut-off mechanism 100. An operation inhibiting circuit 50 is connected across the positive output terminal 5a and the negative output terminal 5d of the voltage regulating circuit 500. When the output voltage of the voltage regulating circuit 500 is lower than a predetermined value, the switch 55 is opened to inhibit operation of the shut-off mechanism 100. A voltage which is induced in the current transformer 21 by an alternating current flowing through the distribution line 11 is rectified by the full wave rectifier 30. The output current of the rectifier 30 flows to the voltage regulating circuit 500 and to the resistor 40, and a constant DC voltage is issued from the voltage regulating circuit 500. Thus, the full wave rectified current corresponding to the current 1a of the distribution line 11 flows through the voltage regulating circuit 500 and the resistor 40. The positive voltage +V and the negative voltage -V are issued from the respective terminals 5a and 5d of the voltage regulating circuit 40 with respect to the grounded center terminal 5c. The electric power for the differential amplifier 60 is supplied by the voltage regulating circuit 500, and a voltage Vin across both the terminals of the resistor 40 is inputted to the respective input terminals of the differential amplifier 60 through the resistors 64 and 66, respectively. The output signal of the differential amplifier 60 is applied to the instant trlpping circuit 230 and also to the short time-lag tripping circuit 220 through the peak value converting circuit 210, and also to the effective value converting circuit 211. An output voltage Ex of the effective value converting circuit 211 is applied to the long time-lag tripping circuit 170. In the above-mentioned timer circuit 70, as shown in FIG. 6, the instant tripping circuit 230 activates the shutoff mechanism 100 with a short time lag of 20 msec when a large current which is larger than a current I H flows. The short time-lag tripping circuit 220 activates the shutoff mechanism 100 with a time lag of 100 msec when a current which is lower than the current I H but is higher than a current I M flows. The long time-lag tripping circuit 170 activates the shutoff mechanism 100 with a time lag of 100 sec when a current I L which is lower than the current I M but is higher than a rated current I L flows. FIG. 5 is the circuit block diagram of the long time-lag tripping circuit 170 in the conventional circuit breaker. The output voltage Ex is inputted to a comparator 35 of the long time-lag tripping circuit 170. When the output voltage Ex is equal to a reference voltage Ey of a reference voltage setting circuit 37, a switch 36 which is operated by the output of the comparator 35 is opened, and electric charge into a capacitor 38 is started. For instance, when the current flowing on the distribution line 11 is 200 amperes, if the output voltage Ex is 0.5 V, the reference voltage Ey of the reference voltage setting circuit 37 is set to 0.6 V. Then, when the output voltage Ex of the effective value converting circuit reaches 0.6 V, the switch 36 of the comparator 35 is opened, and electric charge to the capacitor 38 is started. In the above mentioned case, the current flowing on the distribution lines is estimated to 240 amperes. On the other hand, the output voltage Ex is applied to a voltage-current converting circuit 44 and is converted to a current Ib. In the voltage-current converting circuit 44, the current Ib is in proportion to the square of the output voltage Ex. For example, when the voltage Ex is 0.5 V, the current Ib is 1 µA, and when the voltage Ex is 1 V, the current Ib becomes 4 µA. When the voltage E1 of the capacitor 38 exceeds a reference voltage E2 of a reference voltage setting circuit 42 for setting a time period in long time-lag tripping operation, an output signal is issued from the comparator 41. The time period is 100 sec when the current Ia of the distribution line 11 is two times of the rated current, for example as shown in FIG. 6. For example, in case that a current of 80% of the rated current flows continuously, the circuit breaker is not tripped. However, the wires of the distribution lines are heated by the current. In the above mentioned state, when the current is increased to two times of the rated current, as mentioned above, the circuit breaker is tripped after 100 seconds. Whereas, the wires are considerably heated by the continuous current of 80% of the rated current, and the wires are further heated in high temperature by the current of two times of the rated current during the additional time period of 100 seconds. Thus the wire is liable to be damaged by unexpected temperature rise. It is thus an object of the present invention to provide a circuit breaker wherein a time lag in a long time-lag tripping operation of a tripping device is shortened in case that a current which is substantially equal to a rated current flows during a long time period prior to increase of the current above the rated current. Solution of this object is achieved by what is claimed in the claim. The circuit breaker in accordance with the present invention thus comprises: a first switch for opening or closing a distribution line; a current transformer for detecting a current of said distribution line; a rectifier for rectifying a detected signal of said current transformer; a voltage regulating circuit connected across a positive terminal and a negative terminal of said rectifier; detecting means for detecting an output current of said rectifier; a differential amplifier for amplifying said output of said detecting means; a timer circuit for producing a time lag corresponding to said current of said distribution line; a second switch to be operated by an output of said timer circuit; a tripping coil connected to said second switch for driving said first switch, wherein said timer circuit comprises: a first reference voltage setting circuit for issuing a first reference voltage for setting a rated current of said circuit breaker; a second reference voltage setting circuit for issuing a second reference voltage which is lower than said first reference voltage; a first comparator for comparing an output voltage of said differential amplifier with said first reference voltage; a voltage-current converter for converting said output voltage of said differential amplifier to a current; a capacitor for charging said current from said voltage-current converter; a current leaking means connected in parallel to said capacitor; a third reference voltage setting circuit for issuing a reference voltage for setting a time lag in a long time-lag tripping operation; and a second comparator for comparing a terminal voltage of said capacitor with said reference voltage of said third reference voltage setting circuit. According to the present invention this circuit breaker is furthermore characterized by a third comparator for comparing said output voltage of said differential amplifier with said second reference voltage; a third switch connected in parallel to said capacitor and to be opened by an output of said first comparator; a bias power source disposed in series with said third switch; and a fourth switch connected in parallel to said capacitor and to be opened by an output of said third comparator. The following is a more detailed description of the present invention to be taken in conjunction with the accompanying drawings, in which: FIG.1 is a circuit block diagram of an embodiment of a circuit breaker in accordance with the present invention; FIG. 2 is a circuit block diagram of a long time-lag tripping circuit in the embodiment; FIG.3 is a graph showing operation of the embodiment; FIG.4 is the circuit block diagram of the conventional circuit breaker; FIG.5 is the circuit block diagram of the long time-lag tripping circuit in the conventional circuit breaker; and FIG.6 is the graph showing operation of the conventional circuit breaker. A block diagram of an embodiment of the circuit breaker in accordance with the present invention is shown in FIG.1. Referring to FIG.1, a current transformer 21 is mounted on an alternating current distribution line 11. An output signal of the current transformer 21 is rectified by a full-wave rectifier 30. A voltage regulating circuit 500 is connected across a positive output terminal 31 and a negative output terminal 32 of the rectifier 30 through a resistor 40 for detecting a current flowing to the voltage regulating circuit 500. The voltage regulating circuit 500 is provided with a center terminal 5c, which is grounded. Therefore, the voltage regulating circuit 500 outputs a positive voltage +V at a terminal 5a and a negative voltage -V at a terminal 5d with respect to the center terminal 5c. A differential amplifier 60 is composed of an operational amplifier 63 and resistors 64, 65, 66 and 67. A voltage across both the terminals of the resistor 40 is converted to a signal which is produced across the ground and the output terminal of the differential amplifier 60. A timer circuit 77 is composed of a long time-lag tripping circuit 270, a peak value converting circuit 210, an effective value converting circuit 211, a short time-lag tripping circuit 220 and an instant tripping circuit 230. The output signal of the operational amplifier 63 is applied to the peak value converting circuit 210. the effective value converting circuit 211 and the instant tripping circuit 230. The output signal of the peak value converting circuit 210 is applied to the short time-lag tripping circuit 220. and the output signal of the effective value converting circuit 211 is applied to the long time-lag tripping circuit 270. The respective output terminals of the long time-lag tripping circuit 270, the short time-lag tripping circuit 220 and the instant tripping circuit 230 are connected together, and are coupled to a terminal 70a of a switch 55. The other terminal of the switch 55 is coupled to a coil of a switch 120. A tripping coil 80 is connected between the positive terminal 31 of the rectifier 30 and one terminal 80A of switch 120. The other terminal 80b of the switch 120 is coupled to the negative terminal 5d of the voltage regulating circuit 500. A shut-off mechanism 100 is driven by the tripping coil 80 which is activated by closure of the switch 120, and a contact 201 is opened by the shut-off mechanism 100. An operation inhibiting circuit 50 is connected across the positive output terminal 5a and the negative output terminal 5d of the voltage regulating circuit 500. When the output voltage of the voltage regulating circuit 500 is lower than a predetermined value, the switch 55 is opened to inhibit operation of the shut-off mechanism 100. FIG.2 is a circuit block diagram of the long time-lag tripping circuit 270. Referring to FIG.2, an output voltage Ex of the effective value converting circuit 211 is applied to the respective input terminals 35c and 35d of comparators 35a and 35b. A switch 36a is operated by the output of the comparator 35a, and a switch 36b is operated by the comparator 36b. A reference voltage Ey of a reference voltage setting circuit 37a is applied to an input terminal 35e of the comparator 35a. A voltage Ez which is a voltage made by diving by the reference voltage Ey by means of resistors 48 and 49, is applied to an input terminal 35f of the comparator 35b. Each one terminal of the switches 36a and 36b is connected together and is coupled to an input terminal E1 of the comparator 41. The other terminal of the switch 36a is grounded through a bias power source 45. The bias power source 45 is composed of a battery 47 which is grounded at its negative terminal and an oppositely poled diode 46 which is coupled by its cathode to the positive terminal of the battery 47. The other terminal of the switch 36b is grounded. A capacitor 38 and a resistor 39 are connected between the input terminal E1 of the comparator 41 and the ground. A voltage-current conversion circuit 44 is connected between the input terminal 35c of the comparator 35a and the input terminal E1 of the comparator 41. A reference voltage power source 42 for setting a long time-lag is coupled to an input terminal E2 of the comparator 41. Operation of the embodiment is elucidated hereafter. A voltage which is induced in the current transformer 21 by an alternating current flowing on the distribution line 11 is rectified by the full wave rectifier 30. The output current of the rectifier 30 flows to the voltage regulating circuit 500 and the resistor 40, and a constant DC voltage is issued from the voltage regulating circuit 500. Thus, the full wave rectified current corresponding to the current 1a of the distribution line 11 flows to the voltage regulating circuit 500 and to the resistor 40. The positive voltage +V and the negative voltage -V are issued from the respective terminals 5a and 5d of the voltage regulating circuit 40 with respect to the grounded center terminal 5c. The electric power for the differential amplifier 60 is supplied by the voltage regulating circuit 500, and a voltage Vin across both the terminals of the resistor 40 is inputted to the respective input terminals of the differential amplifier 60 through the resistors 64 and 66, respectively. A gain A of the differential amplifier 60 is given by The output signal of the differential amplifier 60 is applied to the instant tripping circuit 230, through the peak value converting circuit 210 to the short time-lag tripping circuit 220 and through the effective value converting circuit 211 to the long time-lag tripping circuit 270. FIG.3 is a graph showing operation of the circuit breaker in accordance with the present invention. Referring to FIG.3, when a current flowing in the distribution line 11 exceeds the current I H , a voltage Vin corresponding to the current of the voltage regulating circuit 500 increases and an output voltage Vout of the differential amplifier 60 significantly increases. Consequently, the instant tripping circuit 230 is immediately activated, and the switch 120 is closed within 20 milliseconds. The current range which is larger than the current I H is named "current range of instant tripping". When the current of the distribution line 11 is smaller than the current I H but is larger than a current I M as shown in FIG.3, the short time-lag tripping circuit 220 is activated, and the switch 120 is closed within 100 milliseconds. The current range between the current I M and I H is named "current range of short time-lag tripping". When the current of the distribution line 11 is smaller than the current I M but is larger than a current I L shown in FIG.3, the long time-lag tripping circuit 270 is activated as shown hereafter. Referring to FIG.2, the output voltage Ex from the effective value converting circuit 211 is inputted to the comparators 35a and 35b. When the output voltage Ex reaches a reference voltage Ez of the reference voltage setting circuit 37b, the switch 36b is opened by the output of the comparator 35b. Then, the capacitor 38 is charged by the output current Ib of the voltage-current converting circuit 44. In this time, since the switch 36a is closed, the terminal voltage E1 of the capacitor 38 does not exceed the voltage E1 of the power source circuit 45. Since the voltage E1 of the power source circuit 45 is lower than the output voltage E2 of the reference voltage setting circuit 42, the output terminal of the comparator 41 remains on a low level. When the current Ia of the distribution line 11 is 200 A, which is a rated current of the circuit breaker, for example, the output voltage Ex of the effective value converting circuit 211 is set to 0.5 V, and the reference voltages Ey and Ez of the reference voltage setting circuit 37a and 37b are set to 0.6 V and 0.4 V, respectively. In this case, when the output voltage Ex of the effective value converting circuit 211 reaches 0.4 V, the switch 36b of the comparator 35b is opened and charge of the capacitor 38 is started. In the above-mentioned condition, when the current Ia flowing the distribution line 11 is 160 A, which is 80 % of the rated current 200 A, the distribution line 11 is gradually heated. However, the distribution line 11 is not damaged by heating since the current is lower than the rated current of the circuit breaker. The output voltage Ex is 0.4 V (80 % of 0.5 V), and the switch 36b of the comparator 35b is opened. Therefore, the capacitor 38 is charged by the output of the voltage-current converting circuit 44. Subsequently, when the current Ia of the distribution line 11 is increased to 400 A which is double as large as the rated current 200 A, for instance, the output voltage Ex of the effective value converting circuit 211 becomes 1 V, and exceeds the reference voltages Ey and Ez. Consequently, the switch 36a is opened. The output current Ib of the voltage-current converting circuit 44 flows in the capacitor 38 because of the open state of the switch 36a. Since the capacitor 38 is already charged until the voltage E1 of the power source circuit 45, the capacitor 38 is further charged so that the terminal voltage of the capacitor 38 reaches the output voltage Ex from the voltage E1. When the voltage E1 of the capacitor 38 exceeds the voltage E2 of the reference voltage setting circuit 42, the output signal of the comparator 41 turns to high level, and the switch 120 is closed. Consequently, the tripping coil 80 is activated, and the contact 201 is opened through the shut-off mechanism 100. As mentioned above, when the current of the distribution line 11 is increased to 200 % of the rated current from 80 % of the rated current, the voltage E1 of the capacitor 38 is already retained to the voltage E1 which is equal to the voltage of the power source circuit 45. Therefore, a time period wherein the voltage E1 exceeds the reference voltage E2 of the reference voltage setting circuit 42 is shortened. As a result, the time-lag in the long time-lag tripping operation is also shortened as shown by a dotted line in the graph of FIG.3. On the other hand, when the current 1a of the distribution line 11 is rapidly increased to a value twice as large as the rated current from a comparatively low current, both the switches 36a and 36b are simultaneously opened. Since the voltage E1 of the capacitor 38 is retained to zero until opening of the switches 36a and 36b, a long charging time is required. Therefore, the circuit breaker is operated by the long time-lag operation which is similar to the operation as shown in FIG.6 as shown by the solid line in the graph of FIG.3. In the above-mentioned case, the distribution line 11 is not heated by the low current prior to increase of the current. On the contrary, in case that the current of 80% of the rated current has been flowing before increase of a double of the rated current and hence the distribution line 11 has been considerably heated, the time lag of the long time-lag tripping operation is shortened in comparison with a state which is not heated, and thereby unexpected trouble is effectively prevented. In case that the current 1a of the distribution line 11 is comparatively small such as 10 % - 20 % of the rated current, the output voltage of the voltage regulating circuit 500 is low and operation of the timer circuit 70 is liable to be unstable. In order to prevent mal-operation of the timer circuit 77 in the above-mentioned state, the switch 55 of the operation inhibiting circuit 50 is opened, and thereby closing operation of the switch 120 is blocked. In the embodiment, the effective value converting circuit 211 can be replaced by the peak value converting circuit 210. Although the invention has been described in its preferred form with a certain degree of particularity, it is understood that the present disclosure of the preferred form may be changed in the details of construction and the combination and arrangement of parts without departing from the scope of the invention as claimed.

Claims: A circuit breaker comprising: a first switch (201) for opening or closing a distribution line (11); a current transformer (21) for detecting a current (Ia) of said distribution line (11); a rectifier (30) for rectifying a detected signal of said current transformer (21); a voltage regulating circuit (500) connected across a positive terminal (31) and a negative terminal (32) of said rectifier (30); detecting means (40) for detecting an output current of said rectifier (30); a differential amplifier (63) for amplifying said output of said detecting means (40); a timer circuit (77) for producing a time lag corresponding to said current (Ia) of said distribution line (11); a second switch (120) to be operated by an output of said timer circuit (77); a tripping coil (80) connected to said second switch (120) for driving said first switch (201), wherein said timer circuit (77) comprises: a first reference voltage setting circuit (37a) for issuing a first reference voltage (Ey) for setting a rated current of said circuit breaker; a second reference voltage setting circuit (37b) for issuing a second reference voltage (Ez) which is lower than said first reference voltage (Ey); a first comparator (35a) for comparing an output voltage (Ex) of said differential amplifier (63) with said first reference voltage (Ey); a voltage-current converter (44) for converting said output voltage (Ex) of said differential amplifier (63) to a current (Ib); a capacitor (38) for charging said current (Ib) from said voltage-current converter (44); a current leaking means (39) connected in parallel to said capacitor (38); a third reference voltage setting circuit (42) for issuing a reference voltage (E2) for setting a time lag in a long, time-lag tripping operation; and a second comparator (41) for comparing a terminal voltage (E1) of said capacitor (38) with said reference voltage (E2) of said third reference voltage setting circuit (42), characterized by a third comparator (35b) for comparing said output voltage (Ex) of said differential amplifier (63) with said second reference voltage (Ez); a third switch (36a) connected in parallel to said capacitor (38) and to be opened by an output of said first comparator (35a); a bias power source (45) disposed in series with said third switch (36a); and a fourth switch (36b) connected in parallel to said capacitor (38) and to be opened by an output of said third comparator (35b).

Inventors: ISHII KAZUHIRO C O FUKUYAMA SE, ISHII, KAZUHIRO C/O FUKUYAMA SEISAKUSHO
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1988
Main classification: H01H71
IPC codes: H02H3