TERRAIN MAP MEMORY MATRIXING

Abstract: A novel memory system (10) for use with aircraft which utilize warning and advisory systems such as ground proximity warning systems, and warning systems whose warning criteria are modifiable as a function of the topographical characteristics associated with specific geographical areas over which the aircraft is flying. In accordance with the invention topographical data for specific geographical regions is mapped into various individual memory devices (EPROM's 20-1 through 20-16) and powering only one device at a time by means of a decoder (40) whereby the power dissipation of the entire memory system is limited to that of only one memory device regardless of the number of memory devices in the system.

Description: TERRAIN MAP MEMORY MATRIXING BACKGROUND OF THE INVENTION Field of the Invention This invention relates generally to systems utilized in aircraft warning or advisory systems which utilize a large group of discrete non-volatile semi¬ conductor memory devices for storing topographical data which is used for generating warnings and advi¬ sories unique to the particular terrain that is being passed over, and more particularly to a method and apparatus for reducing the quiescent and operating power consumption of the overall group of memory de¬ vices by selectively powering less than the total number of memory devices, and utilizing at any given time only preselected devices containing the topographi¬ cal data defining the terrain in the vicinity of the aircraft. DESCRIPTION OF THE PRIOR ART Various systems that provide warnings or advisory indications in the event of hazardous flight conditions are known. Among such systems are systems generally known as ground proximity warning systems for aircraft that serve to monitor the flight condi¬ tions of an aircraft and provide a warning if flight conditions are such that inadvertent contact with the ground is imminent. Among the flight conditions moni¬ tored by such systems are radio altitude and rate. barometric altitude and rate, airspeed and flap and gear positions. The aforementioned parameters are monitored, and an advisory indication or a warning is generated when the relationship between the aforemen- tioned conditions or parameters are such that ground impact is likely to occur. Typical examples of such systems are disclosed in United States patent Nos. 3,715,718; 3,936,796; 3,958,218; 3,944,968; 3,947,808; 3,947,810; 3,934,221; 3,958,219; 3,925,751; 3,934,222; 4,060,793; 4,030,065; 4,215,334 and 4,319,218, all assigned to the same assignee as the assignee of the present invention. While the above-described systems provide advisory and warning signals in the event of proximity to terrain, such systems generate warnings based solely on flight conditions of the aircraft, and do not uti¬ lize navigational information. Consequently, the sensitivity of such systems must be adjusted as a compromise to provide adequate warnings when a hazard- ° us flight condition exists without generating fault or nuisance warnings when there is no danger, regard¬ less of the type of terrain over which the aircraft is flying. In order to optimize the warning criteria for various terrain, the warning criteria must be adjusted as a function of terrain. In one system, such an adjustment is accomplished by modifying the warning envelopes according to the terrain which is unique to the particular geographical areas that the aircraft is flying over. Such a system is disclosed in a copending patent application. Serial No. 06/560,073 filed on December 9, 1983, now U.S. patent No. 4,675,823 f assigned to the same assignee as the assignee of the present application. In the last-mentioned system, topographical data for the entire world is stored in discrete non¬ volatile memory onboard the aircraft. The aircraft navigational system determines the aircraft location. The location information is input into the warning system and used to modify the warning and advisory systems to be responsive to the particular topographi- cal data that is unique to the geographical area over which the aircraft is presently flying. Because air¬ craft can fly anywhere in the world, it is desirable to store in memory on the aircraft topographical data for the entire world. Although the entire world is subdivided into smaller areas and topographical data is stored in a form that is optimized for each area, a substantial amount of memory storage space is never¬ theless required. Depending on the topographical memory mapping utilized, ten or more 1 megabit memory devices may be required. Such devices consume approxi¬ mately 400 milliwatts each during quiescent conditions, or about 4 watts for a ten device system. This re¬ presents a substantial portion of the total power dissipated by the warning system, and places serious limitations on the power that can be dissipated by the microprocessor and other components that cooperate with the memory devices. Thus there exists a need to provide a means for reducing the power consumption of memory devices used in conjunction with aircraft advisory and warning systems whose warning criteria are established or altered as a function of topographi¬ cal data. SUMMARY OF THE INVENTION Thus, it is an object of the present inven- tion to provide a memory system for use in aircraft instrumentation systems that overcomes many of the disadvantages of prior art memory systems. It is another object of the present invention to provide a memory for use with aircraft warning and advisory systems responsive to topographical data that overcomes the disadvantage of high power consump¬ tion. It is another object of the present invention to divide the world into geographical regions and memory map each region in a particular fashion such that less than all of the memory devices need to be powered at any given time. It is yet another object of the present invention to selectively power up memory devices cor¬ responding to specific geographical regions to reduce the overall power consumption of the total memory system. Briefly, in accordance with a preferred embodiment of the present invention, the world or geographic area of interest is subdivided into regions which are further subdivided into latitude bands and longitude bands. Data defining topographical features of these regions is then mapped into a memory system onboard an aircraft. In the preferred embodiment, topographical data corresponding to one region is mapped into one memory device of the memory system. Thus, when the aircraft is flying over that particular region, only that particular memory device is powered up. The other memory devices containing data corres¬ ponding to other regions are powered down, effectively decreasing their power consumption to zero. Thus, at any one particular time, the power consumption of the totality of memory elements is substantially equal to the power dissipation of one device, thus greatly reducing the microprocessor loading. DESCRIPTION OF THE DRAWINGS These and other objects and advantages of the present invention will become readily apparent upon consideration of the following detailed descrip¬ tion and attached drawing wherein: FIG. 1 is a map of the world divided into a plurality of geographic regions by the system according to the present invention; FIG. 2 is a functional block diagram of the memory system according to the present invention; and FIG. 3 is a functional block diagram of an aircraft warning system utilizing the present invention. DETAILED DESCRIPTION OF THE DRAWING While this invention is susceptible of embodi¬ ment in many different forms, there is shown in the drawing, which will herein be described in detail, a preferred embodiment of the invention. It should be understood, however, that the present disclosure is to be considered as an exemplification of the princi¬ ples of the invention and is not intended to limit the invention to the specific embodiment illustrated. Referring to FIG. 1, the world or other geographic area of interest is divided into a plurality of regions. As illustrated in FIG. 1, there are six¬ teen separate regions shown. These regions are shown as rectangles of various sizes. These zones or regions and their sizes are selected by determining which areas contain terrain features that could pose a hazard to an overflying aircraft or which would require a warning envelope modification. As illustrated, the regions correspond to specific longitude and latitude bands. For example. Region 8 corresponds to latitude 0-15° East and longitude 0-90° North. As can be seen from FIG. 1, the world is divided up into rectangular regions of various sizes. A zone or region having a large number of closely spaced terrain features of interest, such as, for example, a mountainous area, would generally cover a smaller geographic area than a zone or region that is relatively flat. As illustrated, the smallest area shown corresponds to Region 5 which comprises 15 de¬ grees of latitude and 45 degrees of longitude. It is further illustrated that the smallest latitude band is 15 degrees which corresponds to Regions 2, 3, 4, 5, 6, 8 and 9. The smallest longitude band corresponds to 30 degrees of longitude as illustrated for Region 12. Although the world is shown divided into sixteen regions, any number of regions is within the breadth and scope of the present invention. Moreover, it is also contemplated that the width or the size of the longitude and latitude bands may be less or greater than that illustrated. For instance, in a copending application Serial No. 06/560,073, filed on December 9, 1983, assigned to the same assignee as the present invention, the latitude bands are further subdivided into a plurality of zones which may be further divided into regions. The size of the zone or region would be dependent upon whether or not the topographical characteristics of the geographic area necessitate a change in a warning system. Topographical data for each of the areas shown in FIG. 1 is memory mapped into a memory system generally designated by the reference numeral 10, containing a plurality of memory devices, each desig- nated by the reference numeral 20, as shown in FIG. 2. In the preferred embodiment, topographical data corresponding to one area shown in FIG. 1 is mapped into one of the sixteen memory devices 20, the devices 20 being captioned 20-1 through 20-16 in the illus- trated embodiment. Thus memory elements 20-1 through 20-16 would contain topographical data corresponding to geographic regions 1 through 16, respectively, shown in FIG. 1. There are sixteen memory devices illustrated; however, more or fewer memory elements may be used depending upon the particular division of the world into geographical areas and also the number of divisions. For instance, rather than mapping topo¬ graphical data for the entire world into the onboard aircraft memory system, if the aircraft will not be operating world-wide it is contemplated that in such an instance only the particular geographic region of interest need be mapped. Topographical data defining this particular region may require, for example only 5 to 10 memory devices. It is contemplated that such a situation would also be well within the breadth and scope of the present invention. Referring to FIG. 2, there is shown a plur¬ ality of memory devices 20, switches 30 and a decoder 40. As illustrated, each memory device has a capacity of one megabit. To access the one million memory locations available within each such memory device it is necessary to use at least a twenty bit address from a microprocessor (not shown) . Use of less than a twenty bit address would render some of the storage space in each memory device unaddressable. Thus each of the sixteen memory devices shown would be connected to twenty address lines of the microprocessor (not shown) . In the system illustrated, since at least a twenty bit address is required, this would neces¬ sitate a 16 bit microprocessor that has a 24 bit ad¬ dress bus and a 32 bit address register, such as a Motorola M68000. Thus 20 of the 24 address lines would have to be connected to each of the memory de¬ vices to provide access to all of the available storage locations. Although the twenty address lines are only shown connected to device 20-13, it should be understood that the twenty address lines would be con¬ nected to each of the devices. The memory devices illustrated must be non¬ volatile, because if volatile devices were used, the voluminous amount of topographical data would be lost whenever the memory devices were powered down. Also, because geographical features remain relatively con¬ stant, and changes only upon the occurrence of a natural disaster or upon the erection of a man-made structure, it is contemplated that only read only memories (ROMS) be used for the discrete memory devices shown in FIG. 2. Various devices including programm¬ able read only memories (PROMS) , including ultraviolet ray eraseable PROMS (EPROMS) , electrically eraseable — Q— PROMS (EEPROMS) may be used as the memory devices 20. It is further contemplated that the invention would also be applicable to what is known in the art as shadow RAMS. Shadow RAMS are random access memories 5 which are volatile but which have a non-volatile back¬ up such as an EPROM. Although the term ROM will be used to hereinafter describe the invention, it should be understood that this would include ROMS, PROMS, EPROMS, EEPROMS and shadow RAMS. 0 Each ROM 20 contains a plurality of pins for input and output connections to the device. One of the pins is used to apply electrical power to the device. This pin is illustrated in FIG. 2 and identi¬ fied as P. As shown, the pin P of each of the ROMS 5 is connected to a switch 30, preferably a FET switch. Also connected to each switch is a source of electrical power necessary for proper operation of the ROM. A source of 5 volts DC is shown. As heretofore stated, powered up ROMS can o dissipate approximately 400 milliwatts or more each during a quiescent state. For the system illustrated in FIG. 2 this would result in a total power dissipa¬ tion of about 6.4 watts for the sixteen memory elements. This would amount to about one-third of the total 5 power which can be safely dissipated within the packag¬ ing constraints of a 2 MCU size warning computer, and would thus seriously constrain design. In the system disclosed, each element is powered up individually while the others are discon- Q nected from the power source. For instance, if the aircraft were flying over Region 4, then only device 4 would be powered up. The remaining devices would - all be disconnected from the power source by the switches 30. Since an aircraft would be in only one region at one time, this would dictate that only one memory device need be powered up at a time. Thus the maximum power dissipation of the entire memory system would be limited to that of one device. In the case as illustrated, this would reduce the power dissipation by a factor of 16. Each memory device 20 would be addressed as required. As heretofore stated with the use of one megabit memory devices a minimum of twenty address lines are required to address all of the available locations in each memory device. This necessitates at least a 16 bit microprocessor which contains a 24 bit address bus and a 32 bit address register. Since twenty of the address lines are required to address the memory locations in the memory devices, this leaves a total of four address lines to be used for addressing the individual memory devices. The twenty lower order address lines, for example Al through A20, would be tied to the individual memory devices 20, and used to address memory locations within those devices. The rest of the address lines can be used to address the particular memory elements. Normally ROMS have a plurality of chip select (CS) inputs which are mask programmable. What this means is that the purchaser can specify each chip select input to be responsive to a "1" or a "0". Thus a particular ROM will be selected when the appropriate combination of l's and 0's is presented to the CS inputs. The higher order address lines of the address bus are utilized for addressing the individual memory devices, for example lines A24 down to A20. As is known by those skilled in the art addressing of the individual memory devices can be done by appropriately selecting the chip select inputs and tying them to the higher order address lines such that for particular addresses applied to the address bus by the micropro¬ cessor, one and only one memory element will be selected and addressable. In prior art systems all memory elements are normally powered up at all times. In accordance with the present invention, there are several alterna¬ tives for selectively powering up individual memory devices 20. One such alternative is to treat each of the switches 30 as a chip select. Each switch 30 would then be tied to one of the higher order address line along with the chip select inputs as heretofore described for each memory element. Thus to select a particular memory device 20, the appropriate chip select combination would be applied to that device, and the switch 30 connecting that device to the source of electrical power would be energized. Another embodiment contemplates utilizing a 4 to 16 bit line decoder 40, such as a Motorola MC14514B to select the switches 30 and thus the memory devices 20. Such a decoder accepts a 4 bit binary input to generate a high output on one of the 16 output ports depending on the input. In this embodiment four higher order address lines from the microprocessor are input to the decoder 40. Each of the sixteen output ports is connected to and controls a single switch 30. A particular one of the switches 30 is selected by applying the appropriate code to the four inputs of the decoder 40. For example, if a binary address of 1101 is presented to the decoder 40 input, the memory element 20-13 would be powered up. The switches 30 can be embodied in a wide variety of commercially available devices. One such device is a semiconductor switch, such as a Motorola MC14066B. As shown, such switches have three terminals, input 31, output 32 and control 33. A logical "1" at the control terminal 33 will turn the switch on and a logical "0" at the control terminal 33 will turn the switch off. The novel memory system is adaptable for use in many systems. One such system is illustrated in FIG. 3. In FIG. 3, signals representative of lon¬ gitude and latitude of an aircraft are received from an aircraft navigation system 42. These signals are applied to a location search logic circuit identified 5 in FIG. 3 as a logic block 44. The location search logic circuit is described in detail in a copending application No. 06/560,073 filed on December 9, 1983, which has heretofore been incorporated by reference. In such a system, topographical data is stored in the 10 memory system by longitude and latitude. Generally, the location search logic circuit individually compares the present longitude data with preselected longitude bands stored in memory to determine the longitude band within which the aircraft is presently located. 15 The location logic circuit then compares the latitude data with preselected latitude bands to ascertain the current latitude band of the aircraft. Thus, topo- graphiσa data corresponding to the current location of the aircraft is determined. A signal represen- o tative of topographical data which corresponds to the current aircraft location is then applied to the memory system 10. According to a novel aspect of the present invention only one memory device 20 will be selected and powered up which corresponds to the current air- 5 craft location. Thus it should be apparent that a unique memory means for use with aircraft warning and advisory systems is disclosed. The memory means and the method for mapping the topographical data are readily adapt- Q able to conventional design practices and standard manufacturing components. Moreover, while the inven¬ tion is described in conjunction with specific embodi¬ ments, it should be apparent that there are alterna¬ tives, modifications and variations which will be apparent to those skilled in the art in light of the foregoing description. Accordingly, it is intended to cover all such alternatives, modifications and variations that fall within the spirit and broad scope of the appended claims. I claim:

Claims: 1. A method for memory mapping topographical data for use with vehicle control or warning systems responsive to vehicle position for reducing memory power consumption comprising the steps of: (a) dividing the topography into a plurality of regions; (b) associating one of a plurality of memory devices with a particular region; (c) mapping topographical data associated with a particular region into one or more memory de¬ vices; and (d) selectively powering only the one or more memory devices associated with a single one of said regions to reduce memory power consumption. 2. The method as recited in claim 1, wherein said predefined area comprises the earth. 3. The method as recited in claim 1 wherein said plurality of regions corresponds to sixteen re¬ gions. 4. The method as recited in claim 1 wherein said regions are defined by their corresponding lon¬ gitudes and latitudes. 5. The method as recited in claim 1 wherein said regions are unequal in area. 6. The method as defined in claim 1 wherein there is an equal number of memory devices associated with latitudes greater than or equal to 0° North as there are for latitudes less than 0° South. 7. A method for memory mapping topographical data for a geographic region of interest for use with vehicle control and warning systems responsive to vehicle position comprising the steps of: (a) dividing the geographic region into a plurality of geometric shapes; (b) correlating each shape with a discrete memory device; (c) mapping topographical data correlating to each said region contained within each geometric shape into an associated memory device; and (d) selectively powering each discrete memory means so as to reduce the quiescent power con¬ sumption to that of an individual memory device. 8. The method as recited in claim 7 wherein said geometric shapes comprise rectangles. 9. The method as recited in claim 8 wherein said rectangles are of different sizes. 10. A memory apparatus for reducing the power consumption of a plurality of memory means com¬ prising: a plurality of memory means each having power connections extending therefrom; and means coupled to said power connections for selectively energizing a predetermined number of memory means. 11. The apparatus as recited in claim 10 wherein said predetermined number is less than the total number of memory means. 12. The apparatus as recited in claim 10 wherein said predetermined number is one. 13. The memory apparatus as recited in claim 10 wherein said quiescent power consumption for said plurality of memory means is substantially zero. 14. The memory apparatus as recited in claim 10 wherein said operating power consumption of said plurality of memory means is substantially equal to the power consumption of less than the total power consumption for all of the individual memory means. 15. A memory apparatus containing topo¬ graphical data having reduced power consumption for use with aircraft control and warning systems respon¬ sive to aircraft position comprising: (a) a plurality of discrete memory devices each adaptable to receiving electrical power; and (b) switching means coupled to said plur¬ ality of discrete memory means adaptable to selectively coupling individual memory elements to a source of electrical power. 16. The apparatus as defined in claim 15 further including addressing means coupled to said switching means for selectively addressing one or more memory elements. 17. The apparatus as recited in claim 15 wherein said memory elements comprise Read Only Memory (ROM) devices. 18. The apparatus as recited in claim 15 wherein said memory elements comprise programmable ROM's or (PROM's) 19. The apparatus as defined in claim 15 wherein said memory elements comprise ultraviolet ray erasable PROMS (EPROMS) . 20. The apparatus as defined in claim 15 wherein said memory elements comprise electrically erasable PROMS (EEPROMS) . 21. An apparatus with memory mapped topo¬ graphical data having reduced power consumption com¬ prising: (a) A plurality of memory elements having power connection for receiving a source of electricity; (b) a plurality of switches, wherein each switch is coupled to a discrete memory element and to said source of electricity, adaptable to being selec¬ tively coupled to said source of electricity; and (c) selection means for cooperating with said plurality of switches and. selecting one or more switches in response to a predetermined input. 22. The apparatus as recited in claim 21 wherein said selection means comprises a decoder means having input ports and output ports for selecting switches in response to predetermined inputs thereto.

Inventors: GROVE MICHAEL M, GROVE, MICHAEL, M.
Applicants: SUNDSTRAND DATA CONTROL, SUNDSTRAND DATA CONTROL, INC.
Application year: 1987
Main classification: G06F13
IPC codes: G01C21, G05D1, G06F1, G11C7, G11C8