Display device

Abstract: The liquid crystal display unit 1, has a video signal receiver 2 and a store 3. Time-modulation grey-scale addressing of the ferroelectric liquid crystal pixels in a display panel 4 is provided to a store 10 which records the number of changes of state for each pixel during one picture-signal. Once the most-significent bit has been processed and is being displayed on the panel 4, the change-of-state store 10 has the net number of changes which the pixel has undergone in that picture. Controller 11 causes store 10 to output the value appropriate to that pixel and pass it to driver unit 9 to produce a compensating pulse (whether positive, negative or zero) necessary to ensure that there is no net electrical potential over the entire picture interval. The display produced by the compensating pulse is cleared immediately the first data of the next picture is input to the pixel. Assuming that the LSB of the data for a pixel already on display in panel 4, then in the next scan extractor 6 passes the next LSB to comparator 7 whose other input is connected to a pixel-state store 8. Accordingly, the new bit-value is compared with the existing state of the pixel, and comparator 7 passes on an instructing signal to pixel driver unit 9 only if the state of the pixel requires changing; in such an eventuality, the driver unit 9 issues an appropriate monopulse select voltage. Comparator 7 also passes such an instructing signal.

Description: The present invention relates to a display device, and particularly but not solely to a liquid crystal display. It is generally known that the subjection of ferro-electric liquid crystal displays to long-term electrical potential can cause degradation of the liquid crystal material (e.g. by ion migration from the glass substrate) and hence result in significant deterioration of operation of the display and reduction in lifetime. Thus, conventionally the data drive is a bi-polar pulse in phase or in anti-phase with the bi-polar row select drive. The leading pulse of a bi-polar signal serves as an electric potential compensator while the succeeding pulse switches the pixel to the desired state. However, the use of unipolar pulses enables the time for addressing to be reduced by one half as compared with bipolar pulses. GB-A-2164776 discloses a display device comprising a lattice of bi-stable pixels, and means to receive a signal representing a picture for display, the signal comprising a plurality of data bits for each pixel, the device including addressing means for addressing each pixel a corresponding plurality of times, the addressing means being arranged to apply a unipolar data signal in conjunction with a row select signal to the pixel in accordance with each data bit of the picture-signal appropriate to that pixel at least when the data bit does not correspond to the present state of the pixel. G.B. Patent Specification Publication No. GB-A-2079509 describes an arrangement which attempts to cancel the electrical potential by inverting both the drive voltage and the common electrode voltage in alternate frames. However complete cancellation throughout the display would occur only if the two frames were identical, and therefore there can be haphazard patterns of potential in existence for indeterminate time lengths, causing random deterioration of the liquid crystal material. The present invention provides a display device comprising a lattice of bi-stable pixels, and means to receive a signal representing a picture for display, the signal comprising a plurality of data bits for each pixel, the device including addressing means for addressing each pixel a corresponding plurality of times, the addressing means being arranged to apply a unipolar data signal in conjunction with a row select signal to the pixel in accordance with each data bit of the picture-signal appropriate to that pixel at least when the data bit does not correspond to the present state of the pixel, characterised by determining means for determining and providing a corresponding output representative of any net electrical potential on the pixel resulting from the addressing of the pixel for the picture, the addressing means being arranged to apply a compensating unipolar data signal in conjunction with a row select signal to each pixel in accordance with the output from the determining means, for compensating said net electrical potential. In this way, the device can operate with a unipolar pulse which reduces the time for addressing by one half as compared to that with a bi-polar pulse, while ensuring that there is no detrimental effect due to electrical potential. This can be achieved by ensuring that any potential caused by the unipolar pulses is cancelled at the end of each set of addresses corresponding to a picture-signal for one pixel. Preferably, the addressing means comprises means to apply an unipolar data signal to a pixel only when the data bit does not correspond to the present state of the pixel, and the determining means comprises means to determine a count of the number of 0-to-1 changes minus the number of 1-to-0 changes in state for a pixel during its addressing said count corresponding to said output. As an electrical potential is only produced when a change in state of the pixel occurs, such monitoring of the number of changes of state gives an indication of the net potential existing. Furthermore, if a pixel is addressed N times during a picture-signal, where N is the number of bits in each grey level byte, the difference between the number of 1-to-0 changes and the number of 0-to-1 changes can only be 1 or 0, and the net electrical potential only +1, -1 or 0 units. Preferably, the addressing means is arranged to apply a compensating data signal in respect of the addressing for one picture prior to the initiation of the addressing for the subsequent picture. The display device may comprise means to store the output of the determining means appropriate to each of a number of pixels, and means to pass the stored information to the addressing means to apply a compensating signal, advantageously intermediate the addressing for one picture and the addressing for a subsequent picture. The present invention also provides a method of operating a display device having a lattice of bi-stable pixels, the method comprising: addressing each pixel a plurality of times for a picture-signal, including applying a unipolar data signal in conjunction with a row select signal to each pixel in accordance with each of a corresponding plurality of data bits of the picture-signal appropriate to that pixel at least when the data bit does not correspond to the present state of the pixel; characterised by: determining in a determining stage and providing a corresponding output representative of any net electrical potential value resultant from the addressing of each pixel for the picture; and applying a unipolar compensating data signal in conjunction with a row select signal to each pixel in accordance with the output from the determining stage for compensating said net electrical potential. Preferably, the unipolar data signal is applied to a pixel only when the data bit does not correspond to the present state of the pixel, and the net electrical potential value is determined by counting the number of 0-to-1 changes minus the number of 1-to-0 changes in state for a pixel during its addressing for the picture, the obtained count corresponding to said output. Preferably, the method comprises applying a compensating signal in respect of the addressing for one picture prior to the initiation of addressing for a subsequent picture. The method may comprise storing the output of the determining stage appropriate to each of a number of pixels, and applying a compensating signal in respect of said number of pixels advantageously before addressing each pixel for a subsequent picture. Preferably, a pixel comprises one or more liquid crystal cells. The present invention is applicable to colour displays and to monochrome displays. The present invention also embodies equipment for the generation, and/or transmission, and/or reception, and/or processing, of signals suited and/or designed for a display device as herein defined. In order that the invention may more readily be understood, a description is now given, by way of example only, reference being made to the accompanying drawings, in which:- Figure 1 is a block circuit diagram of a liquid crystal display embodying the present invention; Figure 2 is a representation of the addressing waveforms for use in the display of Figure 1; and Figure 3 is a representation of the signal input to the display of Figure 1. In Figure 1, the liquid crystal display unit, generally designated as 1, has a video signal receiver 2 and a store 3 with a capacity to hold an adequate amount of the video signals to enable the display of a complete image, i.e. one picture of the video signal. The format of the video signal is such as to provide time-modulation grey-scale addressing of the pixels in a display panel 4 consisting of a lattice of 600 rows each of 50 bi-stable surface-stabilised ferroelectric liquid crystal pixel-elements; for one picture, the video signal has four data bits for each pixel. In this addressing scheme, the lattice is scanned four times each picture, the setting for each pixel being in accordance with the appropriate bit, and the time duration of the pixel in that setting being dependent on the significence of that bit. There are four row-output devices (only one, 5, being shown), each of which enables the video information for a row of pixels to be taken out of picture store 3; each row-output device 5 has a bit extractor 6 to separate out one bit of the information for each pixel of the respective row. The extractors of the different row-output devices are arranged to operate on bits of differing significence. Consider now how the display device 1 operates in relation to the data bits in one picture signal for a single pixel of panel 4. Assuming that the least-significent data bit is already on display at the relevant pixel in panel 4, then in the next scan extractor 6 passes the next least significant bit to a comparator 7 whose other input is connected to a pixel-state store 8. Accordingly, the new bit-value is compared with the existing state of the pixel, and comparator 7 passes on an instructing signal to pixel driver unit 9 only if the state of the pixel requires changing; in such an eventuality, the driver unit 9 issues an appropriate monopulse select voltage of the format shown in Figure 2. Comparator 7 also passes such an instructing signal not only to pixel-state store 8 in order to update its record of the display state of the respective pixel, but also to a store 10 which records the number of changes of state for each pixel during one picture-signal. If comparator 7 determines that this next bit corresponds to the present state of the pixel, the comparator 7 does not output an instructing signal to driver unit 9, but only sends a signal to controller 11 to indicate the equivalence result of the comparison test. This sequence of events is repeated for each of the remaining bits corresponding to that pixel in the same picture-signal; thus, once the most-significent bit has been processed and is being displayed on the panel 4, the change-of-state store 10 has the net number of changes which the pixel has undergone in that picture. As the difference between the number of 1-to-0 changes and the number of 0-to-1 changes can only be 1 or 0 and the net electrical potential on that pixel only +1,-1 or 0 units, then the value held in store 10 for that pixel corresponds to the net electrical potential. Accordingly, controller 11 causes store 10 to output the value appropriate to that pixel and pass it to driver unit 9 to produce a compensating pulse (whether positive, negative or zero) necessary to ensure that there is no net electrical potential over the entire picture interval. The display produced by the compensating pulse is cleared immediately the first data of the next picture is input to the pixel (see Figure 3), and therefore it remains for a period of time which has an insignificant detrimental effect on the image. Figure 3 illustrates the position of the compensating pulse C in relation to adjacent picture-signals wherein, for each display line, blocks 1,2,3,4 relate to addressing for the least-significent bit upwards in relation to the first picture-signal, and blocks 1A, 2A, 3A, 4A relates to addressing for the least-significent bit upwards in relation to the next picture-signal. In display unit 1, the available switching pulse time is increased by a factor of 1.6 over conventional arrangements. In addition, since the capacitance of non-selected lines is not charged when the data on selected rows remains unchanged (this being approximately 50% of the time) and the frequency of the charging a.c. is almost halved, the total power requirement will be reduced by about a factor of 4. While the invention has been specifically described in relation to liquid crystal displays, it is applicable to any form of display in which it is desired to avoid the long-term build-up of electrical potential.

Claims: A display device (1) comprising a lattice of bi-stable pixels, and means (3) to receive a signal representing a picture for display, the signal comprising a plurality of data bits for each pixel, the device including addressing means (9) for addressing each pixel a corresponding plurality of times, the addressing means being arranged to apply a unipolar data signal in conjunction with a row select signal to the pixel in accordance with each data bit of the picture-signal appropriate to that pixel at least when the data bit does not correspond to the present state of the pixel, characterised by determining means (10) for determining and providing a corresponding output representative of any net electrical potential on the pixel resulting from the addressing of the pixel for the picture, the addressing means (9) being arranged to apply a compensating unipolar data signal in conjunction with a row select signal to each pixel in accordance with the output from the determining means, for compensating said net electrical potential. A display device according to claim 1, characterised in that the addressing means (9) is arranged to apply a unipolar data signal to a pixel only when the data bit does not correspond to the present state of the pixel, and the determining means (10) comprises means to determine a count of the number of 0-to-1 changes minus the number of 1-to-0 changes in state for a pixel during its addressing for the picture, said count corresponding to said output. A display device according to claim 1 or 2, characterised in that the addressing means (9) is arranged to apply the compensating data signal in respect of the addressing for one picture prior to the initiation of addressing for a subsequent picture. A display device according to any one of the preceding claims, characterised by means to store the net electrical potential value appropriate to each of a number of pixels, and means to pass the stored information to the addressing means (9) to apply a compensating signal intermediate the addressing for one picture and the addressing for a subsequent picture. A display device according to any one of the preceding claims, wherein liquid crystal cells form the lattice of pixels. A method of operating a display device having a lattice of bi-stable pixels, the method comprising: addressing each pixel a plurality of times for a picture-signal, including applying a unipolar data signal in conjunction with a row select signal to each pixel in accordance with each of a corresponding plurality of data bits of the picture-signal appropriate to that pixel at least when the data bit does not correspond to the present state of the pixel; characterised by: determining in a determining stage and providing a corresponding output representative of any net electrical potential value resultant from the addressing of each pixel for the picture; and applying a unipolar compensating data signal in conjunction with a row select signal to each pixel in accordance with the output from the determining stage, for compensating said net electrical potential. A method according to claim 6, characterised by applying a unipolar data signal in conjunction with a row select signal to a pixel only when the data bit does not correspond to the present state of the pixel, and counting the number of 0-to-1 changes minus the number of 1-to-0 changes in state for a pixel during its addressing for the picture, the obtained count corresponding to said output. A method according to claim 6 or 7, characterised by applying a compensating data signal in respect of the addressing for one picture prior to the initiation of addressing for a subsequent picture. A method according to any one of claims 6 to 8, characterised by storing the output of the determining stage appropriate to each of a number of pixels, and applying a compensating data signal in respect of said number of pixels before addressing each pixel for a subsequent picture. A method according to any one of claims 6 to 9, wherein liquid crystal cells form the lattice of pixels.

Inventors: WATERS COLIN MARTIN, WATERS,COLIN MARTIN
Applicants: EMI PLC THORN, THORN EMI PLC
Application year: 1987
Main classification: H04N3
IPC codes: H04N3, G09G3, H04N5, G02F1