EMBEDDED TYPE SEMICONDUCTOR LASER AND MANUFACTURING METHOD THEREFOR

Abstract: In an embedded type semiconductor laser, at least three layers of a first conduction type cladding layer (102), a quantum well active layer (103) which contains a first or second conduction type or a p-n junction, and a second conduction type cladding layer (104, 106), are grown successively on a first conduction type substrate (101). A high concentration impurity doped layer (105) is provided excluding a predetermined striped region, situated adjacent to the active layer (103). An impurity diffusion is carried out by heat treatment which diffuses dopant from the high concentration impurity doped layer (105) to the active layer (103).

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to an embedded type semiconductor laser which can be manufactured by selective diffusion, and a method for manufacturing the same. Description of the Prior Art A semiconductor laser is being applied to the fields of optical communications and optical information processing as a small-size and light-weighted light emitting source. For a semiconductor laser, mode control of the guided light is necessary, and in particular, control of the transverse modes is important. Various kinds of laser structure have been proposed so far for controlling the transverse modes of the semiconductor laser. Among these it has been found that the embedded type semiconductor laser is essentially effective. As to the method of manufacturing embedded type semiconductor lasers, proposed structures may be classified roughly into the following three categories. The first is a method in which crystal growth that includes an active layer, and mesa etching that excludes a required width of the active layer, are carried out first, followed by an embedded crystal growth on the side etched surfaces of the mesa. The second is a method in which formation of grooves and ridges on the semiconductor is carried out, and then a selective crystal growth is carried out so as to embed the active layer by the groove and ridge portions that are formed. The third is a method in which crystal growth which contains an active layer is carried out first, and then impurity diffusion is carried out leaving a required width of the active layer to lower the refractive index of the side surfaces. In the third method, and in particular when the active layer is so thin as to form a quantum well, the effect of interdiffusion of atoms at hetero-interface due to impurity diffusion becomes conspicuous, so that it becomes possible to cause a selective modification of the composition. EP-A-0 225 772, which represents state of the art under the terms of Article 54(3) EPC, discloses such a method of manufacturing an embedded type semiconductor laser. A comparison of the above three methods shows that in the first method, the thickness of the active layer, the embedding width, and the refractive index of the embedded crystal (crystal composition) can be selected independently, so that the degree of freedom in device design is high. However, in the second crystal growth for embedding, the side surfaces of the active layer are exposed directly to the high temperature gas so that the quality of the crystal interface tends to be deteriorated. There also remains thermal distortion due to crystal re-growth. In the second method, although problems such as those appear in the first method can be resolved, the controllability of the film thickness and the width of the active layer is low due to the use of singular crystal growth in the groove and the ridge portions. In the third method, crystal growth is essentially only for once, and the crystal growth for embedding for the second time is unnecessary in principle. However, it has a drawback such as the difficulty in the impurity diffusion for embedding. The present method relates to an improvement of the third method. In the third method, drawbacks such as those exist in the first and the second methods are nearly eliminated, but there is a drawback in that it has a difficulty in manufacturing, as mentioned above. In what follows, the prior art of the third method will be described. In so doing, reference will be made to a mixed crystal system of Al x Ga 1-x As as an example. In Fig. 1 is shown an example of impurity diffusion type embedded semiconductor due to the prior art. Reference numeral 501 is a GaAs substrate, 502 is an Al x Ga 1-x As cladding layer, and 503 is a quantum well active layer due to Al y Ga 1-y As/Al z Ga 1-z As which is a multi-quantum well in this example. Reference numeral 504 is an Al x Ga 1-x As cladding layer, 505 is a GaAs Ohmic contact layer, and 506 is an impurity diffusion region where Zn, Si, S, and others are used as impurity. Reference numerals 507 and 508 are electrode metals. The region where 503 and 506 overlap is the region where the quantum well structure is disordered due to impurity diffusion, the so-called disordered region. In the disordered region, it is possible to lower the index of refraction compared with the region which is not disordered so that it is possible to form embedded wave guide. Problems in such prior art are the formation method and the profile control of the impurity diffusion region 506. Namely, in the prior art as shown in Fig. 1, impurity diffusion in vapor phase is carried out by providing a stripe-formed selective diffusion mask. In doing so, it is necessary to precisely control the partial pressure of diffused impurity for controlling the diffusion depth, and to control the temperature and the like. In addition, in the prior art of Fig. 1, a diffusion depth of greater than 2 [µm] is necessary and a sufficient consideration on the diffusion profile is necessary. That is, it is due to the circumstance that the diffusion profile becomes to have tails as shown in Fig. 1 so that the variations in the diffusion depth to the variations in the width of the active layer to be embedded becomes large. In the prior art, there are not given considerations to prevent the influence due to the diffusion profile. As in the above, in the prior art there were problems in the areas of controllability and reproducibility of the width of the active layer with respect to the diffusion depth in the manufacturing process. SUMMARY OF THE INVENTION An object of the present invention is to provide an embedded type semiconductor laser, and a method for manufacturing the same, which can overcome the drawbacks in the prior art, to improve the reproducibility in manufacturing, of the width of the active layer with respect to the diffusion depth, and also to improve the performance of the semiconductor elements. To achieve the above object, the method for manufacturing an embedded type semiconductor laser by successively growing at least three layers on a semiconductor substrate of a first conduction type, a first conduction type cladding layer, a quantum well active layer which contains a first or second conduction type layer or a p-n junction, and a second conduction type cladding layer comprises a process of providing a high concentration impurity doped layer, situated adjacent to said active layer excluding a predetermined striped region, and a process of carrying out an impurity diffusion by heat treatment from said high concentration impurity doped layer up to said active layer. The object of the invention is also solved by an embedded type semiconductor laser comprising at least three layers on a semiconductor substrate of a first conduction type, a first conduction type cladding layer, a quantum well active layer which contains a first or second conduct ion type layer or a p-n junction, and a second conduction type cladding layer, said embedded type semiconductor laser having an impurity diffusion region extended to the active layer from a high concentration impurity doped layer situated adjacent to the active layer and excluding a predetermined striped region. In addition, embodiments of the the present invention achieve current blocking by means of reverse biased layers or high resistance layers on the upper or lower side of the high concentration impurity doped layer. BRIEF DESCRIPTION OF THE DRAWINGS These and other objects, features and advantages of the present invention will be more apparent from the following description of the preferred embodiments taken in conjunction with the accompanying drawings in which: Fig. 1 is a cross sectional view which shows the construction of the prior-art embedded type semiconductor laser; Fig. 2 is a cross sectional view of the construction of an embodiment of the present invention; Fig. 3 is a cross sectional view which shows the manufacturing processes of the embedded type semiconductor laser in accordance with a first embodiment of the present invention; Fig. 4 and Fig. 5 are the cross sectional views of the construction due to second and third embodiments; Fig. 6 is a cross sectional view of the construction of the embedded type semiconductor laser due to a fourth embodiment of the present invention; Fig. 7(a), 7(b) and 7(c) are the cross sectional diagrams which show the manufacturing processes of the embedded type semiconductor laser in accordance with the fourth embodiment of the present invention; and Fig. 8 is a cross sectional view of the embedded type semiconductor laser due to a fifth embodiment of the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embedded type semiconductor laser of the present invention, and its method of manufacture, will be described in detail using the Al x Ga 1-x As mixed crystal system as an example. The present invention can be especially applied to a laser diode of the embedded type semiconductor laser. In Fig. 2, 101 is an n-type GaAs substrate, 102 is an n-type Al 0.48 Ga 0.52 As cladding layer, 103 is a multiple quantum well active layer formed by growing a plurality of Al 0.22 Ga 0.78 As barrier layer and GaAs quantum well layer, 104 is a p-type Al 0.48 Ga 0.52 As cladding layer, 105 is a p-type GaAs high concentration impurity doped layer, 106 is a p-type Al 0.48 Ga 0.52 As cladding layer, 107 is a p-type GaAs Ohmic contact layer, 108 is an impurity diffused region, and 109 and 110 are electrode metals. Here, the constructions of each of the layers 102 to 108 are as follows. The cladding layer 102 is a layer with thickness of about 2 µm, active layer 103 is of n-type, p-type, or i-type which is formed by growing 1 to 10 layers of, for instance, barrier layer of 15 n.m. (150Å) and quantum well layer of 8 nm (80 Å), the cladding layer 104 has a thickness of 0.3 µm where the impurity is Mg and the concentration is 5 x 10¹⁷ cm⁻³, the high concentration impurity doped layer 105 has Zn as impurity, a concentration of 1 x 10¹⁹ cm⁻³ and a thickness of 0.3 µm, the cladding layer 106 has a thickness of about 1.5 µm where the impurity is Mg and the concentration is 5 x 10¹⁷ cm⁻³, and the Ohmic contact layer 107 has a thickness of 0.5 µm. Further, the impurity diffused region 108 is the region of about 0.6 µm from the high concentration impurity doped layer 105 to the lower edge. In Fig. 3 is shown the manufacturing processes of the embedded type semiconductor layer of the present invention for realizing the structure shown in Fig. 2. First, in Fig. 2(a), crystal growth on the n-type GaAs substrate 201 is carried out to form an n-type cladding layer 202, a quantum well active layer 203, a p-type cladding layer 204, and a high concentration impurity doped layer 205. As the crystal growth method use may be made, for example, of the MO-CVD method at a growth temperature of 775 °C. In Fig. 2(b), a photoresist mask 220 for selectively removing the high concentration impurity doped layer 205 is formed. As the photoresist, for example, cyclorubber-based resist may be used. Further, the width of the photoresist window may be set by considering the distance of impurity diffusion and the width of the embedded active layer, which was set to 2.5 µm in this example. Figure 2(c) shows the process of selective removal of the high concentration impurity doped region 205. The selective removal may be done, for instance, by chemical etching by the use of a mixed solution NH₄OH : H₂O₂ = 1:20 (volume ratio) for about 5 seconds. In Fig. 2(d), crystal growth for the p-type cladding layer 206 for light confinement and the Ohmic contact layer 207 is carried out, for instance, by the MO-CVD method at the temperature of 750°C. After that, a heat treatment is given for diffusing the impurity using the high concentration impurity doped region 205 as a source layer. The heat treatment may be carried out for about 100 minutes at 800°C. In particular, the heat treatment for impurity diffusion may be carried out by simply holding the crystal at high temperature in the crystal growth furnace, after growing the crystal. In Fig. 4 is shown a cross sectional view of the second embodiment of the configuration of the embedded semiconductor laser due to the present invention. This embodiment corresponds to providing an Al 0.48 Ga 0.52 As current blocking layer 311 of n-type or i-type on 105 of Fig. 2. Formation of 311 can be achieved analogously to the processes of Fig. 3 by providing in advance an n-type or i-type Al 0.48 Ga 0.52 As layer on the layer 205 of Fig. 3(a). The thickness of the current blocking layer 311 may be set at 1.5 to 2.0 [µm]. Further, etching in the process corresponding to Fig. 3(c) may be modified to an etching for about 40 seconds with an etching solution of KI : I₂ : H₂O = 113 : 65 : 100,000 (ratio in weight), followed by a second etching for about 5 seconds with the etching solution NH₄OH : H₂O₂ = 1 : 20 (ratio in volume) mentioned earlier. According to the embodiment of Fig. 4, the current through the current blocking layer 311 of the n-type or i-type to the impurity diffusion region 308 is suppressed. Consequently, the semiconductor laser of the present embodiment is effective in obtaining an element with satisfactory emission efficiency, by suppressing the leakage current that flows in the regions other than the required active region by the reverse biased junction of the n-type current blocking layer and the p-type impurity diffusion region 308 or by a high resistance region of the i-type. In Fig. 5 is shown an improvement over the embodiment shown in Fig. 4. In Fig. 5, the current blocking layer 311 shown in Fig. 4 is replaced by a two-layered structure of an n-type or i-type GaAs layer 411 and an n-type or i-type Al 0.48 Ga 0.52 As layer 412. This is to cause impurity diffusion with diffusion distance which is asymmetric with respect to the up and down directions, by using a characteristic that the impurity diffusion constant in GaAs is smaller than the diffusion constant in AlGaAs. Because of this, the thickness of the current blocking layers 411 and 412 can be made smaller than in the case of Fig. 4, which improves the flatness of the re-grown surface and reduces the internal strain. This enhances the reliability of the device. The layers 411 and 412 are given a thickness of about 0.3 µm for 411 and 0.5 µm for 412, respectively. Further, the manufacturing process can be realized by partially modifying the process of Fig. 3, analogous to the case of Fig. 4. Here, it only needs to modify the process that corresponds to Fig. 3(c) to the etching with the solutions KI : I₂ : H₂O and NH₄OH : H₂O₂ that were explained in connection with Fig. 4, for the durations of about 6 seconds and about 10 seconds, respectively. In the present invention, the impurity diffusion is carried out by the solid phase diffusion using highly doped layer as a diffusion source, so that it has a more satisfactory stability of the concentration of the diffusion source, compared with the case of performing diffusion from the external vapor phase which is done in the prior art. In addition, the diffusion distance can be made smaller than 1 [µm] so that the controllability is also enhenced compared with the existing case of diffusion for a distance of more than 2 [µm]. Further, the high concentration impurity doped layer needs only be situated at a distance from the active layer, instead of being adjacent to it, as long as it is located at a distance that can supply a necessary impurity concentration, by the heat treatment of the impurity doped layer which is to give a prescribed amount of diffusion. The distance is to be determined by considering the controllability of the heat treatment. Accordingly, it is possible by the present invention to improve the controllability of the impurity diffusion, and to obtain an embedded type semiconductor laser that has a high reproducibility. In Fig. 6 is shown a cross sectional view of the embedded type semiconductor due to a fourth embodiment of the present invention. In the figure, 1 is an n-type GaAs substrate, 2 is an n-type Al 0.48 Ga 0.52 As cladding layer, 3 is a p-type Al 0.65 Ga 0.35 As high concentration impurity doped layer, 4 is an n-type Al 0.48 Ga 0.52 As buffer layer, 5 is a quantum well active layer which consists of an Al 0.22 Ga 0.78 As barrier layer and a GaAs quantum well layer, 6 is a p-type Al 0.48 Ga 0.52 As cladding layer, 7 is a p-type GaAs Ohmic contact layer, 8 is an impurity diffused region, and 9 and 10 are electrode metals. In this embodiment, the high concentration impurity doped layer 3 is provided beneath the quantum well active layer 5. The composition of the layers 2 to 7 is as follows. The cladding layer 2 has a thickness of 2.5 to 3.0 µm, the high concentration impurity doped layer 3 has Zn as the impurity, a concentration of 1 x 10¹⁹ cm⁻³ and a thickness of 0.3 µm, the buffer layer 4 has a thickness of 0.2 µm. The active layer 5 is of n-type, p-type, or i-type and the thickness of barrier layer is 15 nm (150 Å) and that of well layer is 8 nm (80 Å) for example. The cladding layer 6 has a thickness of 1.5 µm where the impurity is Mg and the concentration is 5 x 10¹⁷ cm⁻³, and the Ohmic contact layer 7 has a thickness of 0.5 µm. The front of impurity diffused region 8 is about 0.6 µm from the high concentration impurity doped layer 3 in the direction of the top edge. In Fig. 7 is shown the manufacturing process of the embedded type semiconductor laser due to the present invention for realizing the structure shown in Fig. 6. First, in Fig. 7(a), crystal growth on an n-type GaAs substrate 1 is carried out to form the n-type clad layer 2 and the high concentration impurity doped layer 3. For the crystal growth the MO-CVD method with the growth temperature of 750°C, for instance, may be adopted. In Fig. 7(b), grooves are formed for selectively removing the high concentration impurity doped layer. For this purpose, ordinary photolithography may be employed to carry out etching by a photo resist mask. As the photo resist for example, cyclorubber-based resist can be used. Further, the width of the photoresist window is to be set by considering the distance of the impurity diffusion and the width of the embedded active layer, which is chosen to be 2.5 µm here. The selective removal of the high concentration impurity doped layer 3 may be carried out, for example, by chemical etching with the use of a mixed solution of H₂SO₄ : H₂O₂ : H₂O = 4 : 1 : 1 (volume ratio) at 20°C for about 25 seconds. Fig. 7(c) shows the crystal growth of the quantum well active layer. First, a buffer layer for preventing the influence of the regrown surface on the active layer is formed, followed by crystal growth for the quantum well active layer 4, the p-type cladding layer 6, and the Ohmic contact layer 7. The crystal growth may be done, for instance, by the MO-CVD method at 750°C. Then, a heat treatment is performed to diffuse impurity from the high concentration impurity doped layer 3. The heat treatment may be carried out for about 100 minutes at 800°C. In particular, the heat treatment for impurity diffusion can be done by simply holding the crystal in the crystal growth furnace after crystal formation in Fig. 7(c). In Fig. 8 is shown a cross sectional view of the construction of the embedded type semiconductor laser due to a fifth embodiment of the present invention. This embodiment corresponds to a provision of an n-type or i-type Al 0.48 Ga 0.52 As current blocking layer 11 above the high concentration impurity doped layer 3 of Fig. 6. The formation of the layer 11 can be realized similar to the process of Fig. 7 by growing an n-type or i-type Al 0.48 Ga 0.52 As layer above the layer 3 of Fig. 7(a). The thickness of the layer 11 may be 1.0 to 1.5 µm . Further, the etching in the process of Fig. 7(b) needs to be modified to an etching time of about 40 seconds with the etching solution of KI : I₂ : H₂O = 113 : 65 : 100,000 (ratio in weight), followed by an etching for about 25 seconds at 20°C by the use of an etching solution of H₂SO₄ : H₂O₂ : H₂O = 4 : 1 : 1 (ratio in volume). The semiconductor laser according to the present embodiment can suppress the leakage current that flows in the area other than a required active layer region by a reverse biased junction or a high resistance region, so that it is effective for obtaining high efficient laser diodes. The present invention is not limited to the above embodiments. Thus, for instance, the composition, construction, manufacturing conditions, and others can be changed timely. Further, for the embodiments of the present invention description has been made in conjunction with a mixed crystal system of Al x Ga 1-x As. However, the invention may be embodied by the use of a material such as Ga x In 1-x As y P 1-y mixed crystal system or Al x In 1-x As y P 1-y mixed crystal system. Moreover, the method of manufacture and others are not limited to those in the foregoing embodiments. For example, the method of crystal growth is not limited to the MO-CVD method, and it can be embodied by the MBE method and the like. In addition, as the method of growing the high concentration impurity doped layer, the so-called atomic planar doping method in which doping is performed on a growth-interrupted surface, and similar methods may be used.

Claims: A method for manufacturing an embedded type semiconductor laser by successively growing at least three layers on a semiconductor substrate of a first conduction type: a first conduction type cladding layer (102; 202; 302; 402; 2), a quantum well active layer (103; 203; 303; 403; 5) which contains a first or second conduction type layer or a p-n junction, and a second conduct ion type cladding layer (104, 106; 204, 206; 304, 306; 404, 406; 6); said manufacturing method comprising a process of providing a high concentration impurity doped layer (105; 205; 305; 405; 3), situated adjacent to said active layer (103; 203; 303; 403; 5) excluding a predetermined striped region, and a process of carrying out an impurity diffusion by heat treatment from said high concentration impurity doped layer (105; 205; 305; 405; 3) up to said active layer (103; 203; 303; 403; 5). The method for manufacturing embedded type semiconductor laser as claimed in claim 1, further comprising the step of providing current blocking layers in the form of reverse biased layers or high resistance layers (311; 411, 412), in the direction opposite to that from the high concentration impurity doped layer (305; 405) to the active layer (303; 403). The method for manufacturing embedded type semiconductor laser as claimed in claim 1, wherein the heat treatment for impurity diffusion is carried out by exposing the semiconductor laser for a predetermined length of time at a temperature greater than 750°C. The method for manufacturing embedded type semiconductor laser as claimed in claim 1, wherein said high concentration impurity doped layer (105; 205; 305; 405; 3) is provided above or below said active layer (103; 203; 303; 403; 5). The method for manufacturing embedded type semiconductor laser as claimed in claim 2, wherein said current blocking layers are formed by at least two layers: a first current blocking layer (412) and a second current blocking layer (411) which has an impurity diffusion constant smaller than the impurity diffusion constant of the first current blocking layer (412). The method for manufacturing embedded type semiconductor laser as claimed in claim 1, further comprising the step of providing a current blocking layer in the form of reverse biased layers or high resistance layers (11) on the active layer side (5) from said high concentration impurity doped layer (3). An embedded type semiconductor laser comprising at least three layers, on a semiconductor substrate (101; 201; 301; 401; 1) of a first conduction type, a first conduction type cladding layer (102; 202; 302; 402; 2), a quantum well active layer (103; 203; 303; 403; 5) which contains a first or second conduction type layer or a p-n junction, and a second conduction type cladding layer (104, 106; 204, 206; 304; 404, 406; 6); said embedded type semiconductor laser having an impurity diffusion region (108; 208; 308; 408; 8) extended to the active layer (103; 203; 303; 403; 5) from a high concentration impurity doped layer (105; 205; 305; 405; 3) situated adjacent to the active layer (103; 203; 303; 403; 5) and excluding a predetermined striped region. The embedded type semiconductor laser as claimed in claim 7, further comprising current blocking layers in the form of revserse biased layers or high resistance layers (311; 411, 412) provided in the direction opposite to that from the high concentration impurity doped layer (305; 405) to the active layer (303; 403). The embedded type semiconductor laser as claimed in claim 7, wherein the high concentration impurity doped layer (105; 205; 305; 405; 3) is provided either above or below the active layer (103; 203; 303; 403; 5). The embedded type semiconductor laser as claimed in claim 8, wherein the current blocking layers comprise at least two layers; a first current blocking layer (412) and a second current blocking layer (411) which has an impurity diffusion constant smaller than the impurity diffusion constant of the first current blocking layer (412). The embedded type semiconductor laser as claimed in claim 7, wherein the semiconductor laser has current blocking layers in the form of reverse biased layers or high resistance layers (11) provided on the active layer side (5) from the high concentration impurity doped layer (3).

Inventors: FURUYAMA, HIDETO, KUROBE, ATSUSHI
Applicants: KABUSHIKI KAISHA TOSHIBA
Application year: 1987
Main classification: H01S3
IPC codes: H01S5, H01L21, H01L33