Photoelectric converter

Abstract: A photoelectric converter comprising a photoelectric conversion unit which includes a pair of main electrodes, spaced by a photoreception area over a semiconductor layer, and an auxiliary electrode. The semiconductor layer and the auxiliary electrode are laminated through the intermediary of an insulating layer in at least the photoreception area. It also includes a storage capacitor for storing electric charges flowing through the photoelectric conversion unit, a transfer transistor for transferring the charges stored in the capacitor, a discharge transistor for discharging the charges stored in the storage capacitor, and dividing device for dividing a switching voltage applied to the control electrode of the discharge transistor to apply a divided voltage to the auxiliary electrode.

Description: The present invention relates to a photoelectric converter used with a bar code reader, a facsimile apparatus, a digital copier or the like and more particularly to a photoelectric converter of the type having an auxiliary electrode or of the thin film transistor (hereinafter called TFT) type wherein a gate electrode is provided on a semiconductor layer with an insulating layer interposed therebetween. Recently, as electronic office machines such as facsimiles or digital copying machines become popular, the demand for a small type inexpensive image input device has increased. Coplanar photoelectric converter (photosensor) which use a-Si, CdS-CdSe or the like as the photoconductors to utilize a photoelectric conversion effect have the advantage that they can directly contact an original document, requires no focusing system, or have a short travelling distance of the focusing system. In order to stabilize the sensor characteristics, there are field effect type photosensors which have an insulating layer and an auxiliary electrode above or below a semiconductor layer among the coplanar type photosensors. Figs. 1(a), (b) are schematics of the photoelectric conversion unit of the photosensor. In Fig. 1(a), formed on an insulating substrate 1 of glass, ceramic or the like are an auxiliary electrode 2 and an insulating layer 3 on which is formed a semiconductor layer 4 made of CdS·Se, a-Si: H or the like. A pair of main electrodes 6 and 7 are formed on the substrate through the intermediary of a doped semiconductor layer 5 for ohmic contact. A photoreception window 8 is formed between the main electrodes. The photosensor having a structure shown in Fig. 1(b) has the auxiliary electrode 2 provided over the main electrodes 6 and 7. The substrate 1 is made of a transparent material and receives light from the side of the substrate 1. A part having the same function as the corresponding one of the photosensor of Fig. 1(a) is given the same number. In the photosensor having the above structure, in order to get a large ratio of the output current to the dark current in response to incident light, an appropriate bias must be applied to the auxiliary electrode 2 in accordance with the kind of majority carriers of a current flowing through the semiconductor layer 4 to operate the photosensor. Namely, a negative bias must be applied when the majority carriers are electron while a positive bias must be applied when the majority carriers are hole. Such operation will reduce the output current, so that a capacitor which stores the output current must be provided in the circuit which reads the signal from the photosensor. Correspondingly, switching elements such as a TFT which transfers as a signal the electric charges stored in the capacitor and a TFT which discharges the remaining charges after the transfer operation, and a matrix circuit which connects these switching elements are required. Similar prior art arrangements requering an application of bias voltages to photoelectric converters and/or photosensors are known from publications JP-A-60 239 072 and DE-A-3 141 975, respectively. Fig. 2 is a schematic equivalent circuit diagram of a plurality of line-sensor type photoelectric conversion elements disposed in an array. In Fig. 2, reference characters Rsl, Rs2, ... Rsn denote photosensors having an auxiliary electrode; Cs1, Cs2 ... Csn storage capacitors; Tt1, Tt2 ... Ttn TFTs which transfer electric charges stored in the capacitors Csl-Csn; Tr1, Tr2 ... Trn discharge TFTx which discharge electric charges remaining in the capacitors Csl-Csn after the transfer operation. Reference characters Lgl-Lgn denote leads connected to the control electrodes or gates of the transfer TFTs Ttl-Ttn and the control electrodes or gates of the discharge TFTs Trl-Trn. Reference characters Vgl-Vgn denote switching voltages applied to the corresponding leads Lgl-Lgn. Reference character LD denotes a lead connected to the main electrodes of the photosensors-Rs1-Rsn. Reference character VD denotes a voltage applied to LD. Reference character LR denotes a lead connected to the storage capacitors Csl-Csn. Reference character VR denotes a reference voltage for storage capacitors Csl-Csn. If the storage capacitors Csl-Csn are discharged via discharge TFTs Trl-Trn, the voltages across the capacitors Csl-Csn will become VR. In the photosensor, if a steady state bias is applied to the auxiliary electrode in accordance with the kind of majority carriers in the photosensor, namely, if a negative bias is applied when the majority carriers are electron and if a positive bias is applied when the majority carriers are hole, the minority carriers will collect in the vicinity of the auxiliary electrode in the semiconductor layer and the majority carriers will collect in that portion of the semiconductor layer opposite the auxiliary electrode. In such condition, the majority and minority carriers are not re-combined smoothly, so that even if irradiation light to the photosensor may be cut off, the remaining photocurrent will flow as long as the minority carriers continue to exist. As a result, the optical response speed and hence the S/N ratio of the photosensor are lowered. In an attempt to cope with this, for example, as shown in Fig. 3, if a bias voltage V1 of a predetermined level, negative when the majority carriers are electron and positive when the majority carriers are hole, is applied in advance to the auxiliary electrode when the photosensor is to be read and if a pulse voltage of V2 opposite in polarity to the bias voltage is applied to the auxiliary electrode during a non-reading interval provided immediately before reading, a rise in the optical response would be improved to provide'a large ratio of the output current to the dark current in response to incident light. However, if such operation is tried on, for example, an image reading apparatus including a multiplicity of one-dimensionally arranged such photosensors, the respective sensor bits are read in a time series, so that the timings of applying the respective pulse voltages are shifted bit by bit. Thus, if voltages applied to the auxiliary electrodes of the photosensors are controlled in a circuit separated from the circuit in which the gate voltages of the transfer and discharge TFTs are controlled, a matrix circuit for control of the auxiliary electrodes of the photosensors and a matrix circuit for control of gate electrodes of the transfer TFTs would be required. Thus the entire circuit would become complicated. In addition, the timings of applying pulses, pulse widths, pulse magnitudes, etc., must be determined individually, so that the driving would become complicated. Next, an example of the structure of a photoelectric conversion section of a photosensor of TFT type is shown in-Figs. 4 and 5. Fig. 4 is a plan view of the photoelectric conversion section, and Fig. 5 is a cross section taken along line X-X' of Fig. 4. In the Figures, the photoelectric conversion section comprises a substrate 401 made of glass for example, a gate electrode 402, an insulating layer 403, a photoconductive semiconductor layer 404, source and drain electrodes 406 and 407, an n + layer for ohmic contact between the semiconductor layer 404 and the source and drain electrodes 406 and 407. Dark current of a TFT type photosensor can be controlled by applying a bias voltage to the gate electrode to suppress the effect of the surface of the insulating layer. Thus, a favorable light quantity dependence characteristic (hereinafter called λ) of a photoelectric conversion output is obtained which is as near as 1. The reproductiveness is also satisfactory with little manufacture deviation within a lot and among lots. These characteristics lead to advantageous effect under static (DC) drive conditions. However, under dynamic drive conditions commonly employed for image sensors or the like, i.e., under a charge storage mode, there may arise a problem which is described hereinafter. Fig. 6 is a circuit diagram of a readout circuit using a TFT type photosensor under a charge storage mode. Connected to a drain electrode is a sensor power supply V S and to a gate electrode a bias power supply V B . Connected to a source electrode is a storage capacitor C. The charge stored in the storage capacitor is discharged to a load resistor R L upon activation of a transfer switch SW. Operating waveforms of the circuit are shown in Fig. 7. The transfer switch SW repeatedly turned on and off at the period of a storage time T S . Namely, while the transfer switch SW is being turned off, photocurrent i S of the photosensor is charged in the storage capacitor. Whereas while the transfer switch SW is made turned on, the charge stored in the storage capacitor C is caused to be discharged to the load resistor R L which in turn is read as an output of the photosensor. Voltage V C appearing across the storage capacitor C can be represented in terms of an integrated value of i S under the condition of Thus, the voltage V C increases substantially linearly with respect to time t. This increase in voltage is shown by a broken line in Fig. 7. However, in practice, when the photosensor in the circuit of Fig. 6 is driven, a distored waveform of the voltage V C as shown by a solid line in Fig. 7 is obtained. The reason for this is that the voltage V C quickly changes to zero when the transfer switch turns on and a gate bias voltage Δ Vgs is made relatively small so that transient current i a (hatched portion in Fig. 7) flows through-the source and drain. This transient current adversely effects the light dependence characteristic of an output from a photoelectric converter constructed of the above circuit, to thereby lower the gamma λ value to 0.4 to 0.5 as shown in Fig. 8, which is considerably small as compared to the gamma λ value 1 calculated based on the static drive conditions, and thereby deteriorates an S/N ratio. Furthermore, document EP-A-0 177 044 discloses an image line sensor unit, a photosensor for use in the sensor unit and method of making the photosensors. However, no transistor type, but rather resistive type photosensors are used as photosensors. Still further, document DE-A-24 40 325 discloses a light sensitive transistor arrangement, which uses a light sensitive transistor made on the basis of an epitaxial growth of a semiconductor material However, none of these prior art arrangements solves the previously discussed problems inherent to known prior art arrangements. It is therefore an object of this invention to provide a photosensor apparatus which provides an improved optical response speed and has a simple structure. It is another object of the present invention to provide a photoelectric converter capable of eliminating the above-mentioned problem associated with a dynamic operation and positively utilizing the characteristic performance of a TFT type photosensor. It is a further object of the present invention to propose a drive circuit which can be easily fabricated on a same substrate as that of a photosensor and provide a photoelectric converter of low cost and high yield by positively utilizing the characteristic performance of a TFT type photosensor having a high S/N ratio and low manufacture deviation. According to the present invention, the above objects are achieved by a photoelectric converter according to claim 1. Favorable refinements of the present invention are as set out in the dependent claims. Figs. 1(a) and 1(b) are schematic diagrams showing the structure of a photoelectric conversion section of a photoelectric converter; Fig. 2 is a circuit diagram of the photoelectric converter; Fig. 3 shows voltage waveforms applied to the auxiliary electrode of the photoelectric converter; Fig. 4 is an enlarged view of the photosensor section (photoelectric conversion section) of a conventional photoelectric converter; Fig. 5 is a cross section taken along line X-X' of Fig. 4; Fig. 6 is an equivalent circuit of a conventional photoelectric converter; Fig. 7 is a timing chart for the operation of the conventional photoelectric converter; Fig. 8 shows the light dependence characteristic of an output voltage of the conventional photoelectric converter; Fig. 9 is a circuit diagram of one related example of a photoelectric conversion apparatus related to this invention; Fig. 10 is a timing chart for explaining the operation of the apparatus; Figs. 11 and 12 are characteristic diagrams for explaining the effect of the apparatus; Fig. 13 is a schematic view of the apparatus; Fig. 14 is a schematic view of an image reading device using the photoelectric conversion apparatus; Figs. 15 and 16 are circuit diagram of other related examples of the apparatus. Fig. 17 is an equivalent circuit of a third related example of the photoelectric converter related to the present invention; Fig. 18 is a timing chart for illustrating the operation of the third related example; Fig. 19 is an equivalent circuit of a fourth related example of the photoelectric converter related to the present invention; Fig. 20 is a timing chart for illustrating the operation of the fourth related example; Fig. 21 is an equivalent circuit showing a part of a line sensor type photoelectric converter; Fig. 22 is a plan view showing the patterning of the line sensor type photoelectric converter; Fig. 23 is a cross section taken along line X-X' of Fig. 22; Fig. 24 is a cross section taken along line-Y-Y' of Fig. 22; Fig. 25 is an equivalent circuit of a first embodiment of the photoelectric converter photosensor according to the present invention; Fig. 26 is a circuit diagram showing the photoelectric converter of Fig. 25; Fig. 27 is an enlarged patterning showing a part of the photoelectric converter of Fig. 25; Fig. 28 is a cross section taken along line X-X' of Fig. 27; and Fig. 29 is a cross section taken along line Y-Y' of Fig. 27. Now an embodiment of this invention and related examples not forming part of the invention will be described in detail with reference to the drawings. (Related Example 1) Fig. 9 is a circuit diagram of one related example of a photoelectric conversion apparatus related to this invention. Fig. 10 is a timing chart for explaining the operation of the apparatus. In Fig. 9, as in Fig. 2, reference characters Rsl, Rs2 ... Rsn denote photosensors (photoelectric conversion units) having an auxiliary electrode; Csl, Cs2 ... Csn storage capacitors; Tt1, Tt2, Ttn transfer TFTs for transferring the charges stored in the capacitors Csl-Csn; Tr1, Tr2 ... Trn discharge TFTs for discharging the charges remaining in the capacitors Csl-Csn after the transfer operation; and Cx1, Cx2 ... Cxn dividing chapacitors for applying divided voltages to the auxiliary electrodes of photosensors Rs1-Rsn. Reference characters Cgs1, Cgs2, ... Cgsn denotes capacitances fromed between the auxiliary electrodes and the corresponding main electrodes on the connection side of the storage capacitors in the photosensors Rs1-Rsn. Reference characters Lgl-Lgn denote leads connected to the control electrodes or gates of the transfer TFTs Ttl-Ttn and the control electrodes or gates of the discharge TFTs Trl-Trn, and the dividing capacitors Cxl-Cxn. Reference characters Vgl-Vgn denote switching voltages applied to the corresponding leads. Reference character LD denotes a lead connected to the main electrodes of the photosensors Rsl-Rs2, and VD a voltage applied to that lead. Reference character LR denotes a lead connected to the storage capacitors Csl-Csn, and VR a reference voltage for the storage capacitors Csl-Csn. When the storage capacitors Csl-Csn are discharged via the discharge TFTs Trl-Trn, the voltages across the storage capacitors Csl-Csn all become VR. The leads Lgl-Lgn, LD, and LR constitute a matrix circuit. The operation of the photoelectric conversion apparatus will now be described. Assume that the majority carriers in the photosensors are electrons. In Fig. 9, if positive and negative voltages VD and VR are applied to the leads LD and LR, respectively, currents will flow through the photosensors Rsl-Rsn in accordance with a quantity of irradiated light, so that electric charges are stored in the storage capacitors Csl-Csn to raise the main electrode side potentials of the storage capacitors Csl-Csn in the photosensors Rs1-Rsn. If switching voltage Vgi-Vgn are applied at the timing shown in Fig. 10, to the gates of the transfer and discharge TFTs Ttl-Ttn and Trl-Trn via the matrix circuit constituted by the respective leads in Fig. 9, electric charges will be stored in the storage capacitors Csl-Csn during the time interval T11, and the transfer TFT Tt1 will be turned on during the time interval T12 to thereby cause the electric charges in the storage capacitor Csl to be transferred as a signal. The discharge TFT Tr1 is turned on during the time interval T13 to thereby cause the storage capacitor Csl which has completed the transfer operation to be short-circuited to thereby discharge the remaining charges. Thus one cycle of reading the photosensor Rsl is completed. At the same time, the transfer TFT Tt2 is turned on and the charges which are being stored in the storage capacitor Cs2 are transferred as a signal during the time duration T21. A reading cycle similar to that effected in the photosensor Rsl is effected successively in the subsequent photosensor bits. In the circuit shown in Fig. 9, reading, transfer and discharge are performed as described above, and, simultaneously, a voltage in phase with the switching voltage applied to the gates of the discharge TFTs Trl-Trn is applied to the auxiliary electrodes of the photosensors Rsl-Rsn to improve their optical response speed. In more detail, the photosensor Rsl is especially considered as an example. A divided voltage between the switching voltage Vg2, applied to the discharge TFT Tr1, and the reference voltage VR obtained by the dividing operation of the dividing capacitor Cx1, the capacitance Cgs1 formed between the auxiliary electrode and the main electrode (on the side of the storage capacitor Csl) of the photosensor Rsl, and the storage capacitor Csl is applied to the auxiliary electrode of Rsl. In the photosensor Rsl, electrons are drawn in by a pulse voltage applied during the discharge interval T13 during which a large current flows, the re-combination of holes is expedited at the same time, the optical information remaining in the photosensor Rsl before the discharge interval is cancelled, and especially improves a fall in the optical response during the reading duration T11 to thereby provide a large ratio of the output current to the dark current in response to incident light. On the other hand, while a large current flows through the photosensor Rsl during the discharge duration T13, electric charges are not stored in the storage capacity Csl because the storage capacitor Csl is in its discharge state, so that there is no probability that unnecessary information is mixed. Further, in the charge storage type reading circuit, the potential of the auxiliary electrode of the photosensor changes relative to that of the main electrode on the signal reading side as electric charges are stored in the storage capacitor, so that as shown in Fig. 11, the output current changes. In contrast, in the circuit of this related example, fluctuations in the relative potential of the auxiliary electrode are suppressed to within the ratio in capacitance valued of Cgs1 to Cx1 due to the above dividing effect, so that fluctuations in the output current are suppressed to thereby provide stabilized driving of the apparatus as shown in Fig. 12. An image reading device using the above circuit structure will now be described. Fig. 13 is a schematic view of the photosensor device. Like reference characters are used to denote like parts in Figs. 13 and 9. Fig. 14 is a schematic view of the image reading device using the photosensor device. In Fig. 13, photosensor Rsl is constituted by an amorphous silicon hydride semiconductor layer 4 (not shown in Fig. 13) as the photoconductive layer, insulating layer 3 (also not shown in Fig. 13), main electrodes 6 and 7, and auxiliary electrode 2. A lead 9 comprising lead Lg2, insulating layer 3 and electrode 12 constitute dividing capacitor Cxl. Electrodes 13 and 14 and insulating layer 3 consitute the storage capacitor Csl. Semiconductor layer 4, insulating layer 3 and electrodes 16 and 17 and 19 constitute discharge TFT Trl. The semiconductor layer 4, insulating layer 3 and electrodes 15, 16 and 18 constitute transfer TFT Ttl. These elements are formed on a transparent insulating substrate. The photosensor device is provided in the image reading device, as shown in Fig. 14, for example. Shown in Fig. 14, an incident light window is provided in a mount 24 so that the photosensor device is irradiated with light from a light source 23 through the window. Provided on the mount 24 are the photosensor device 22 and an IC 25 which processes the optical signal from the photosensor device 22. An original document 21 fed by a paper feed roller 20 is irradiated with the light passing through the window and photosensor device 22. The light reflected from the document is sensed by a photosensor of the photosensor device 22. The image reading device having the above structure is able to read the document at high speed to provide an image of high quality. (Related Example 2) Figs. 15 and 16 are circuit diagrams showing other related examples of the photosensor device related to this invention. Like reference characters are used to denote like parts in Figs. 9, 15 and 16 and further description of those parts and the operation thereof will be omitted. In Fig. 15, the first bit is especially considered as an example as in the previous related example. A voltage obtained by dividing the switching voltage Vg2, applied to the discharge TFT Tr1, by dividing capacitors Cx11 and Cx12 with the VR as the reference voltage is applied to the auxiliary electrode of the photosensor Rsl. A pulse voltage is applied to the auxiliary electrode immediately before the reading interval as in the previous related example to especially improve a fall in the optical response speed of the photosensor Rsl to thereby provide a large ratio of the output current to the dark current in response to incident light. Since in this related example the potential of the auxiliary electrode is fixed during the reading interval, however, fluctuations in the relative potential of the signal outputting side one of the main electrodes cannot be compensated. While in the particular related example the switching voltage Vg2 of the discharge TFT Tr1 is divided by the capacitors to be applied to the auxiliary electrode of photosensor Rsl, the dividing manner is not limited to the capacitor division. Alternatively, for example, as shown in Fig. 16, resistance division which uses dividing resistors Rx11 and Rx12 may be used. When these related examples are applied to the image reading device of Fig. 14 as in the previous related example, high quality image reading is performed at high-speed. As described above in detail, in the photosensor device of the above related example, a fall in the optical response speed of the photosensor is greatly improved and a high ratio of the output current to be dark current in response to incident light is provided. By forming the dividing means with the storage capacitor, the capacitance between the auxiliary electrode and the storage capacitor connection side one of the main electrodes of the photosensor, and the dividing capacitor connected between the control electrode of the discharge transistor and the auxiliary electrode, or by forming the dividing means with series connected capacitors or series connected resistors connected across the control electrode of the discharge transistor and the storage capacitor, fluctuations in the potential of the auxiliary electrode, occurring when electric charges are stored in the storage capacitor, relative to that of the main electrode from which the signal of the photosensor is taken are reduced and hence fluctuations in the output current are suppressed to within a small limit. The image reading device using the photosensor device according to this related example is able to read a document at high speed with high quality. (Related Example 3) An equivalent circuit of a third related example of the photoelectric converter related to the present invention is shown in Fig. 17. A sensor electrode V S is connected to a drain electrode D, while a gate bias electrode V B is connected to a gate electrode G via a resistor R. A bias capacitor Cgs is connected between the gate electrode G and a source electorde S. Connected to the source electrode S are a transfer switch SW and a load resistor R L . The operation of the photoelectric converter constructed as shown in Fig. 17 will be described. The gate bias power supply V B charges the bias capacitor Cgs through the resistor R to thereby make the gate electrode potential at V B . When the transfer switch SW turns off from its on-state, photocurrent i S starts charging a storage capacitor C S . As the storage capacitor C S is charged, the potential V C thereof rises. Assuming that the time constant R x Cgs » T S (which is an ON/OFF period of the transfer switch), the gate voltage V G follows the potential V C of the storage capacitor C S . Namely, the gate-source voltage ▵V GS = V G - V C becomes constant which is maintained nearly constant irrespective of the ON/OFF operation of the transfer switch. Thus, transient current as described with the conventional problem does not flow. Fig. 18 shows waveforms at various circuit points of the photoelectric converter. An effective ΔV GS becomes equal to (-VB) - V C during operation wherein V C is a mean value of V C . ΔV GS varies with V C but it does not change transiently so that there occurs no problem. (Related Example 4) A fourth related example related to the present invention is shown in Fig. 19. In the circuit shown in Fig. 19, in addition to a transfer switch sw2, a reset switch swl-a is provided which serves to discharge the residual charge after charge transfer in a storage capacitor C S . Connected to the gate electrode of a photoelectric conversion section is a gate bias switch swl-b which is activated in cooperation with the switch swl-a. The operating timings are shown in Fig. 20. When the switches swl-a and swl-b are turned on, the charge in the storage capacitor C S is discharged to thereby cause V C to become equal to 0. At the same time, the bias capacitor Cgs is charged to V B . When the switches are turned off, photocurrent produced at the photoelectric conversion section charges the storage capacitor C S . As it is charged, the potential V C of the storage capacitor C C rises. On the other hand, since the switch swl-b is maintained turned off, there is no current path for the bias capacitor Cgs. As a result, the potential V G at the gate electrode G operates to follow the potential V C of the storage capacitor C S while maintaining ΔV GS constant. The transfer switch sw2 becomes turned on after a storage time T S . At this time, the charge voltage V C of the storage capacitor C S is discharged via the load resistor R L . In the circuit shown in Fig. 19, however, since the storage capacitor C S is discharged via the discharge switch swl-a, it is not necessary to completely effect the discharge through the load resistor R L . In other words, there occurs no problem even if the voltage V C across the storage capacitor C S directly read out is used. In this related example, the potential Vgs between the gate electrode G and the source electrode S is maintained constant (-V B ). Therefore, it is possible to set the gate-source bias of the photoelectric conversion section at an optimum value under any conditions of incident light quantity, storage time and so on. Further, transient current to be caused by a change in the potential ▵Vgs will not be produced. Furthermore, the effect of the surface of the insulating layer is suppressed to large extent. Fig. 21 is an equivalent circuit of a line sensor type photoelectric converter composed of n x m photoelectric converters of Fig. 19 disposed in array. In the Figure, S1 to Sn+ m denote TFT type photoelectric conversion sections, Cgs1 to Cgsn + m denote gate bias capacitors, R1 to Rn + m denote gate bias TFTs, Csl to Csn + m denote storage capacitors, U1 to Un + m denote reset TFTs, and T1 to Tn + m denote transfer TFTs. The line sensor type photoelectric converter is divided into m blocks each having n elements, m block being matrix connected to m + 1 gate lines and n signal lines. In the Figure, reference numeral 2111 represents a driver section for sequentially applying voltage to gate lines V G1 to V Gm + 1 , 2121 a signal processing section for picking up signal voltage on signal lines S1 to Sn. V S denotes a sensor bias, V R denotes a reset voltage for the storage capacitor. In the photoelectric converter, the gate electrodes of a reset TFT U and a gate bias TFT R are connected in common to the gate electrode of a next block transfer TFT T. Simultaneously when a next block signal is transferred upon shifting of voltage pulses at the driver section 2111, the preceding block is reset. The circuit shown in Fig. 21 can be fabricated in a same substrate. More particularly, by using as the photoconductive semiconductor material an a-Si:H film (amorphous silicon hydride film) formed by glow discharge, the TFT photoelectric conversion section, storage and bias capacitors, transfer, reset and bias TFTs, wiring leads and so on can be realized by simultaneous processes using a laminated structure of a lower electrode, an SiNH insulating layer, an a-Si:H layer, an n + layer, and an upper electrode. The photoelectric converter of this related example is suitable for application to a line sensor type photoelectric converter made through simultaneous processes on a same substrate. An example of patterning a line sensor type photoelectric converter made through simultaneous processes of the above type will be described. Fig. 22 shows a patterning of one bit of the circuit shown in Fig. 21, wherein only the upper and lower wiring leads and contact hole portions are shown in order not to make the drawing complicated. In the Figure, 2213 represents a signal matrix section, 2214 a photoelectric conversion section, 2215 a gate bias capacitor, 2216 a storage capacitor, 2217 a gate bias TFT, 2218 a transfer TFT, 2219 a reset TFT and 2220 a gate drive wiring section. In this example, a so-called lens-less structure is employed wherein an original is read by directly contacting it on a sensor section without using a focusing lens. Therefore, a window 2221 for applying light on an original is provided, and in addition the lower electrode of the photoelectric conversion section is made of transparent material which electrode serves also as a light shielding film. The transfer and reset TFTs are disposed in mirror symmetrical relation to each other. The reason for this is that in case the alignment for the upper and lower electrodes is displaced in the longitudinal direction of the substrate, the gate-soruce capacitance of a pair of TFTs is compensated and maintained unchanged. A change in gate-source capacitance in the longitudinal direction results in the offset components of a signal output. With the above-described patterning, however, it is possible to remove the offset components. The load capacitor C Li (i = 1 to n) in the equivalent circuit of Fig. 21 is not shown in Fig. 22. The value of the load capacitor is set at a value ten to several hundred times as large as the stray capacitance between signal lines S1 to Sn present at the signal matrix section 2213. It is also possible to directly read a signal output in the form of current without using the load capacitor. Fig. 23 is a cross section taken along line X-X' of Fig. 22, and Fig. 24 is a cross section taken along line Y-Y' of Fig. 22. In the Figures, 2301 represents a substrate made of glass for example, 2302 represents a lower electrode which corresponds to a lower electrode of a capacitor in Fig. 23 and a gate electrode of a TFT in Fig. 24. An insulating film 2320 is made of SiNxH, SiO 2 or the like. A photoconductive semiconductor layer 2304 is made of a-Si:H or the like. An n + layer 2305 is used for ohmic contact with the upper electrode. 2306 and 2307 represent upper electrodes which correspond to an upper electrode of a capacitor in Fig. 23 and source and drain electrodes of a TFT in Fig. 24. According to the related examples 3 and 4 described so far, a capacitor is formed between the gate and source electrodes of a TFT serving as the photoelectric conversion section so that the potential between gate and source electrodes can be always maintained constant. As a result, various advantageous effects can be obtained some of which are: (1) Transient current does not flow during a storage operation. Thus, the gamma λ value becomes near 1 and a same S/N ratio as with a static operation can be obtained. (2) Since a stable negative bias can be applied between the gate and source of a photosensor, the effect of the surface of the insulating layer on the side of the photosensor can be eliminated, to thereby realize a photoelectric converter with little manufacture deviation among lots and good reproductiveness and productivity. (3) A TFT photosensor, gate bias TFT, transfer and reset TFTs, storage capacitor and the like can be fabricated using simultaneous processes on a same substrate, to thereby realize a line sensor type photoelectric converter having a high performance and of low cost. The above-mentioned first and second electrodes are preferably formed on a same plane on the photoconductive layer. Further, the bias voltage is applied to the third electrode via a resistor or a switch. (Embodiment 1) An equivalent circuit of a first embodiment of the photoelectric converter according to the present invention is shown in Fig. 5. A sensor power supply V S is connected to a drain electrode D, and a gate electrode is connected in common to a source electrode S. Connected also to the source electrode A are a storage capacitor C and a load resistor R L via a transfer switch SW. Next, the operation of the photoelectric converter whose equivalent circuit is shown in Fig. 25 will be described. When the transfer switch turns off from its on-state, photocurrent i S flows into the storage capacitor C to start a charge operation. As the charge operation is performed, the voltage V C of the storage capacitor C rises. On the other hand, since the gate and source electrodes are connected together, the gate-source voltage V GS is always maintained at 0 potential. Therefore, transient photocurrent described before to be caused while the transfer switch SW is turned on does not flow. (Embodiment 2) Fig. 26 is an equivalent circuit of a line sensor type photoelectric converter composed of n x m photoelectric converters of Fig. 25 disposed in array. In the Figure, S1 to Snxm denote TFT type photoelectric conversion sections, C S1 to C Snxm denote storage capacitors, U1 to Unxm denote reset TFTs, and T1 to Tnxm denote transfer TFTs. The line sensor type photoelectric converter is divided into m blocks each having n elements, m blocks being matrix connected to m + 1 gate lines and n signal lines. In the Figure, reference numeral 2611 represents a driver section for sequentially applying voltage to gate lines V G1 to V Gm+1 , 2612 a signal processing section for picking up signal voltage on signal lines S1 to Sn. V S denotes a sensor bias, V R denotes a reset voltage for the storage capacitor, and C L1 to C Ln denote load capacitors. In the circuit, a reset TFT U is provided which can fully reset the residual charge after the charge transfer into the storage capacitor C S . The gate electrode of a reset TFT U is connected together to a gate electrode of a next block transfer TFT T. Simultaneously when a next block signal is transferred upon shifting of voltage pulses at the driver section 2611, the preceding block can be reset. The circuit shown in Fig. 26 can be fabricated in a same substrate. More particularly, by using as the photoconductive semiconductor material an a-Si:H film formed by glow discharge, the TFT photoelectric conversion section, storage capacitor, transfer and reset TFTs, wiring leads and so on can be realized by simultaneous processes using a laminated structure of a lower electrode, an SiNH insulating layer, an a-Si:H layer, an n + layer, and an upper electrode. The photoelectric converter of this invention is suitable for application to a line sensor type photoelectric converter made through simultaneous processes on a same substarte. An example of patterning a line sensor type photoelectric converter made through simultaneous processes of the above type will be described hereinbelow. Fig. 27 shows a patterning of one bit of the circuit shown in Fig. 26, wherein only the upper and lower wiring leads and contact hole portions are shown in order not to make the drawing complicated. In the Figure, 2713 represents a signal matrix section, 2714 a photoelectric conversion section, 2715 a contact hole for gate and source, 2716 a storage capacitor, 2717 a transfer TFT, 2718 a reset TFT, 2719 a wiring lead for a gate drive line. In this example, a so-called lens-less structure is employed wherein an original is read by directly contacting it on a sensor section without using a focussing lens. Therefore, a window 2720 for applying light on an original is provided, and in addition the lower electrode of the photoelectric conversion section is made of transparent material which electrode serves also as a light shielding film. The transfer and reset TFTs 2717 and 2718 are disposed in mirror symmetrical relation to each other. The reason for this is that in case the alignment for the upper and lower electrodes is displaced in the longitudinal direction of the substrate, the gate-source capacitance of a pair of TFTs is compensated and maintained unchanged. A change in gate-source capacitance in the longitudinal direction results in the offset components of a signal output. With the above-described patterning, however, it is possible to remove the offset components. The load capacitor C Li (i=1 to n) in the equivalent circuit is not shown in Fig. 27. The value of the load capacitor is set at a value ten to several hundred times as large as the stray capacitance between signal lines S1 to Sn present at the signal matrix section 2713. It is also possible to use a load resistor as in the preceding embodiment and directly read a signal output in the form of current without using the load capacitor. Fig. 28 is a corss section taken along line X-X' of Fig. 27, and Fig. 29 is a cross section taken along line Y-Y'of Fig. 27. In the Figures, 2801 represents a substrate made of glass for example, 2821 represents a lower electrode which corresponds to a gate electrode of the photosensor in Fig. 28 and a gate electrode of a TFT in Fig. 29. An insulating film 2803 is made of SiNxH, SiO 2 or the like. A photoconductive semiconductor layer 2804 is made of a-Si:H or the like An n + layer 2805 is used for ohmic contact with the upper electrode. 2806 and 2807 represent upper electrodes which correspond to a source electrode of the photosensor in Fig. 28 and source and drain electrodes of a TFT in Fig. 29. According to the embodiments 1 and 2 described so far, the gate and source electrodes are connected in common to each other. Therefore, the following and other effects can be obtained: (1) Transient current does not flow during a storage operation. Thus, tha gamma λ value becomes 1 and a same and high S/N ratio as with a static operation can be obtained. (2) A TFT photosensor, transfer and reset TFTs, storage capacitor and the like can be fabricated using simultaneous processes on a same substrate, to thereby realize a line sensor type photoelectric converter having a high performance and of low cost. As described above, in the photoelectric converter, dividing means for dividing the switching voltage applied to the control electrode of the discharge transistor to apply the resulting voltage to the auxiliary electrode is provided, so that a bias voltage is applied to the auxiliary electrode during the non-reading time interval of the photosensor, and a pulse voltage opposite in polarity to the bias voltage is added to the same to thereby eliminate the previous remaining read output in preparation for the next reading process. Further, according to the photoelectric converter, since a negative bias can be applied to the third electrode, i.e., the gate electrode, the above-mentioned transient current can be eliminated and the light dependence characteristic λ can be made as near as 1, to thereby realize a photoelectric converter with a high S/N ratio and a good reproductiveness. Furthermore, the photoelectric conversion section as well as the other elements can be fabricated on a same substrate using simultaneous processes, to thereby realize a line sensor type photoelectric converter with a high performance and of low cost. Also, according to the photoelectric converter, since there is no transient current as discussed before, it is possible to have a gamma λ value of approximately 1, a high S/N ratio, and an excellent reproductiveness. Further, a drive circuit can be fabricated on a same substrate as of the photoelectric conversion section at a same time, to thereby realize a photoeelctric converter with a high performance and of low cost.

Claims: A photoelectric converter comprising a photoelectric conversion unit (S1 to Sn+m) comprising: a photoconductive layer (404); drain and source electrodes (D, S) provided on one side of said photoconductive layer (404); and a gate electrode (G) provided on the other side of said photoconductive layer with an insulating layer (403) interposed therebetween; characterized in that said photoelectric converter further comprises capacitor means (C) having electrodes one of which is directly connected to said source electrode (S) and said gate electrode (G) of said photoelectric conversion unit of a transistor structure and to a first switch means (SW); said capacitor means stores carriers according to a photoelectric conversion output from the photoelectric conversion unit; said source and gate electrodes (S, G) are directly electrically connected; said first switch means (SW) is directly connected electrically to said source electrode (S) and to the one of the electrodes of said capacitor means (C) for transitional storage of electric charges flowing through said photoelectric conversion unit (S1 to Sn+m); and in that a wiring for supplying a supply voltage (Vs) to said drain electrode (D) to obtain a photoelectric conversion output from said source electrode (S) is provided. A photoelectric converter according to claim 1, further comprising a second switch means (U1 to Un+m) for discharging electric charges stored in said capacitor means (C) electrically connected to said source electrode (S). A photoelectric converter according to claim 1 or 2, wherein said first switch means (SW) is provided for transferring electric charges stored in said capacitor means (C). A photoelectric converter according to any of the preceding claims 1 to 3, wherein said photoconductive layer is a hydrogenated amorphous silicon layer. A photoelectric converter according to any of the preceding claims 1 to 4, wherein said first switch means (SW) is a thin film transistor. A photoelectric converter according to claim 2, wherein said second switch means (U1 to Un+m) is a thin film transistor. A photoelectric converter according to any of the preceding claims 1 to 6, wherein said photoelectric conversion unit (S1 to Sn+m) and all of the other elements are formed on a common substrate. A photoelectric converter according to claim 7, wherein said substrate is insulative. A photoelectric converter according to claim 7 or 8, wherein said substrate is light transmissive. A photoelectric converter according to any of the preceding claims 1 to 9, wherein said photoelectric converter has a plurality of photoelectric conversion units (S1 to Sn+m) arranged in an array.

Inventors: GOFUKU IHACHIRO, HATANAKA KATSUNORI, KAIFU NORIYUKI, NAKAGAWA KATSUMI, OSADA YOSHIYUKI, SAIKA TOSHIHIRO, GOFUKU, IHACHIRO, HATANAKA, KATSUNORI, KAIFU, NORIYUKI, NAKAGAWA, KATSUMI, OSADA, YOSHIYUKI, SAIKA, TOSHIHIRO, GOFUKU, IHACHIRO C/O CANON KABUSHIKI KAISHA, KAIFU, NORIYUKI C/O CANON KABUSHIKI KAISHI, NAKAGAWA, KATSUMI C/O CANON KABUSHIKI KAISHA, OSADA, YOSHIYUKI C/O CANON KABUSHIKI KAISHA, SAIKA, TOSHIHIRO C/O CANON KABUSHIKI KAISHI
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1987
Main classification: H01L27
IPC codes: H01L27