Optical modulation device

Abstract: An optical modulation device suited for gradational display, comprises: a first conductor film electrically connected to a first electrode and a second electrode, and a second conductor film disposed opposite to the first conductor film, an optical modulation material disposed between the first and second conductor films; and driving means for a) setting the first electrode at a first reference potential and supplying the second electrode with a first voltage of one polarity relative to the first reference potential to furnish the first conductor film with a first potential gradient; b) supplying the second conductor film with a first voltage of the other polarity relative to the first reference potential in phase with the first voltage of one polarity; c) setting the second electrode at a second reference potential and supplying the first electrode with a second voltage of the other polarity relative to the second reference potential to furnish the first conductor film with a second potential gradient; d) supplying the second conductor film with a second voltage of one polarity relative to the second reference potential in phase with the second voltage of the other polarity; and e) setting the second voltage of one (or the other) polarity to satisfy a compliment relationship with the first voltage of the other (or one) polarity.

Description: FIELD OF THE INVENTION AND RELATED ART The present invention relates to an optical modulation device suited for gradational display, particularly an optical modulation device for gradational display using a ferroelectric liquid crystal. In the conventional liquid crystal television panel of the active matrix driving system, Thin Film Transistors (TFTs) are arranged in matrix corresponding to respective pixels. When a gate-on pulse is applied to a TFT to turn on the source-drain channel, a picture image signal is applied to the source and stored in a capacitor. A liquid crystal (e.g., TN (twisted nematic) liquid crystal) is driven by the stored image signal and a gradational display is effected by voltage modulation of pixels. However, such a television display panel of the active matrix driving system using a TN liquid crystal uses complicated structure of TFTs requiring a large number of production steps and is accompanied with a difficulty of high production cost. Moreover, there is a further problem that it is difficult to provide a large area of semiconductor film (e.g., of polysilicon, amorphous silicon) constituting TFTs. Further, a display panel of a passive matrix driving type using a TN liquid crystal has been known as one of a low production cost. However, in this type of liquid crystal display panel, when the number (N) of scanning lines is increased, a time period (duty factor) during which one selected point is subjected to an effective electric field during the time when one frame is scanned is decreased at a ratio of 1/N, whereby crosstalk occurs and a picture with a high contrast cannot be obtained. Furthermore, as the duty factor is decreased, it is difficult to control gradation of respective pixels by means of voltage modulation so that this type of display is not adapted for a display panel of a high pixel or wiring density, particularly one for a liquid crystal television panel. On the other hand, document EP-A-0 224 243 (published on 03,06,1987) discloses an optical modulation device with a first conductor film, having a resistivity sufficient to develop a potential gradient therealong, a second conductor film disposed opposite to the first conductor film, an optical modulation material disposed between the first and second conductor films and consisting of a chiral smectic liquid crystal showing different optical states depending on polarity of voltages applied thereto, and driving means. Further, JP-A-61-69036 discloses a gradational system wherein a time ratio is controlled between a period of applying a signal for providing a bright state and a period of applying a signal for providing a dark state. It is, therefore, an object of the present invention to provide an optical modulation device which is capable of providing a high contrast and a high picture frequency. According to the invention, this object is accomplished by an optical modulation device, comprising: A first conductor film having a resistivity sufficient to develop a potential gradient therealong, a second conductor film disposed opposite to the first conductor film, an optical modulation material, disposed between the first and second conductor films, consisting of a chiral smectic liquid crystal showing different stable optical states depending on polarity of voltages applied thereto, and driving means, characterized in that the first conductor film is electrically connected to first voltage-application means and second voltage-application means disposed with a distance from the first voltage-application means and in that the driving means set the first driving voltage application- means at a first reference potential and supply the second voltage-application means with a first voltage of one polarity relative to the first reference potential to furnish the first conductor film with a first potential gradient along the distance, supply the second conductor film with a first voltage of the other polarity relative to the first reference potential and in phase with the first voltage of one polarity, set the second voltage-application means at a second reference potential and supply the first voltage-application means with a second voltage of the other polarity relative to the second reference potential to furnish the first conductor film with a second potential gradient along the distance, and supply the second conductor film with a second voltage of one polarity relative to the second reference potential and in phase with the second voltage of the other polarity, wherein the sum of the difference between the first voltage of the other polarity and the first reference potential and the difference between the second voltage of one polarity and the second reference potential is equal to zero, or the sum of the difference between the first voltage of one polarity and the first reference potential and the difference between the second voltage of the other polarity and the second reference potential is equal to zero. These and other objects, features and advantages of the present invention will become more apparent upon a consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1A is a schematic sectional view across the thickness of a ferroelectric liquid crystal device used in the present invention, Figures 1B and 1C show driving waveforms used in the present invention, Figure 1D schematically shows a potential gradient developed in a pixel at the time of driving; Figure 2 is a characteristic diagram showing a hysteresis curve of V (voltage)/T (transmittance) of a ferroelectric liquid crystal device; Figure 3A shows an electrode arrangement of a ferroelectric liquid crystal device outside the scope of the present invention, Figure 3B schematically shows a potential gradient developed in a pixel of the device, Figure 3C is a schematic plan view of the pixel; Figure 4 is a plan view of a matrix electrode arrangement used in the present invention; Figures 5 - 10 are respectively a time chart showing an exemplary set of driving waveforms used for driving a display panel having the matrix electrode arrangement shown in Figure 4; Figure 11 is a plan view of another matrix electrode arrangement used in the present invention; Figures 12 - 17 are respectively a time chart showing an exemplary set of driving waveforms used for driving a display panel having the matrix electrode arrangement shown in Figure 11; Figure 18 is a circuit diagram of a driving circuit used in the present invention; Figure 19 is a time chart of respective signals for gradational display corresponding to image data; Figure 20A is a circuit diagram of an inverting amplifier; Figure 20B is a circuit diagram of an analog subtractor; and Figures 21 and 22 are schematic sectional views respectively illustrating an operation principle of a ferroelectric liquid crystal device used in the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS Figure 3A schematically shows a sectional view of a pixel of an optical modulation device comprising a scanning electrode 31, signal electrodes 32 and 33 between which a pixel having an effective display span O-X is defined, and a cell gap d formed between the electrodes and filled with a ferroelectric liquid crystal showing bistability in response to an applied electric field. Along the span O-X, a potential gradient as shown in Figure 3B is developed. Herein, it is assumed that V th denotes a critical electric field (threshold voltage) for causing transition between optically stable states of the optical modulation device, and X₀ denotes a position along the O-X span at which the potential gradient curve X-E intersects with the threshold voltage V th level. Then, the span X₀-X represent a portion where the electric field E is below the threshold voltage V th , so that a state inversion (e.g., inversion from "white" state to "black" display state) is caused along the span O-X₀ while such state inversion is not caused along the span X₀-X. The resultant state is illustrated by Figure 3C wherein a hatched region 34 represents the inverted state portion and a nonhatched region 35 represents the non-inverted state portion. Incidentally, a ferroelectric liquid crystal device shows a hysteresis in T-V curve as shown in Figure 2. As a result, the inverted state region 34 is not subjected to further inversion in a reverse direction by simply lowering the external electric field. In other words, even if the external voltage is lowered to shift the position X₀ at which the intersection with the threshold voltage level V th occurs toward the position O, the area of the inverted state portion 34 cannot be controlled (decreased). On the other hand, when the external voltage is increased toward a higher voltage side, the position X₀ is shifted to the X side and the area of the inverted state portion 34 can be increased correspondingly. According to the present invention, as described above, a gradational display may be realized through a first step wherein "white" (or "black") is written by application of a voltage of one polarity under a potential gradient and a second step wherein a voltage which is a complement of the voltage of one polarity for writing "black" (or "white") is applied under a potential gradient. Figure 1A is a schematic sectional view showing an electrode arrangement forming a pixel in a ferroelectric liquid crystal device used in the present invention, which comprises a scanning electrode 11, signal electrodes 12 and 13 between which a pixel having an effective display span O-X is formed along a high-resistivity conductor film 14, and a cell gap d filled with a ferroelectric liquid crystal showing bistability in response to an applied electric field. A potential gradient varying depending on a waveform and a position may be developed along the span O-X. Figure 1B shows a scanning signal waveform V₁₁ applied to the scanning electrode 11, an information signal waveform V₁₂ applied to the signal electrode 12, and a waveform V₁₃ for grounding the signal electrode 13. At this time, a voltage as shown by a waveform V₁₁ - V₁₂ in Figure 1B is applied between the scanning electrode 11 and the signal electrode 12, whereby a potential gradient represented by a right side line (I) in Figure 1D is developed along the span O-X. Further, Figure 1C shows a scanning signal waveform V₂₁ applied to the scanning electrode 11, a waveform V₂₂ for grounding the signal electrode 12, an information signal waveform V₂₃ applied to the signal electrode 13, and a voltage waveform V₂₁ - v₂₃ applied accordingly between the scanning electrode 11 and the signal electrode 13. As a result, a potential gradient represented by a left side line (II) in Figure 1D is developed along the span O-X. In the graph shown in Figure 1D, the threshold voltage when the external voltage is on the higher voltage side (i.e., the scanning electrode is higher than the signal electrode in this embodiment) is denoted by V th ⊕ , the threshold voltage when the external voltage is on the lower voltage side is denoted by V th ⊖ , and when |V th ⊕ |= |V th ⊖ | is satisfied, the absolute values of the potentials at the position X₀ are the same for both of the lines (I) and (II) at the mid point of the span O-X. In actual cases, however, these threshold voltages are somewhat different from each other and the V-T (%) hysteresis curve shown in Figure 2 is not symmetrical. Therefore, in actual cases, a correction for linearizing the V-T (%) hysteresis curve, a correction of the gain of an inverting amplifier, etc., may be effected. However, this embodiment is explained based on the case of |V th ⊕ | = |V th ⊖ |. The complement relationship with respect to voltage used herein has the following meaning. That is, with respect to a certain voltage signal (e.g., a gradation signal voltage V₁₂ shown in Figure 1B) having a maximum value V max (i.e., a voltage for providing the entirety of the effective display pixel span O-X with a "white" (or "black") display state), another voltage (e.g., a signal voltage V₂₃ shown in Figure 1C) assumes a value (-(Vmax-V₁₂)) obtained by polarity inversion of the difference between the maximum value and the certain voltage (Vmax-V₁₂). More specifically, in the present invention, the application voltage V₁₂ can change the peak value, pulse duration or number of pulses depending on given gradation data. Corresponding to the change, the application voltage V₂₃ having the complement relationship with respect to the voltage V₁₂ also changes its peak value, pulse duration and number of pulses. Referring again to Figures 1A - 1D, in a first frame operation, when the input signal voltage V₁₂ is increased, the voltage at the position X becomes larger than 3V and the intersection X₀ with V th ⊕ is shifted toward the O side. As a result, the transmittance of the pixel is changed so that the "white" display region is enlarged. Further, when the previous writing operation has provided the X-X₀ region of "white" display state, even if the input signal voltage V₁₂ becomes smaller, the white X-X₀ region is not changed at all because of the memory effect or hysteresis effect of the ferroelectric liquid crystal. In the present invention, in the subsequent frame operation, the polarity of voltages for writing into pixels is inverted with application of input signals satisfying the complement relationship as described. As a result, the white region and the black region are caused to have a prescribed areal ratio. Then, a driving embodiment of the present invention will be explained. Figure 4 is a plan view of a matrix electrode arrangement used in the present invention which comprises a number ( n ) of high-resistivity conductor films 41 in the form of stripes, scanning electrodes S₁₁, S₁₂, S₂₁, S₂₂, ... S n1 and S n2 and a number ( m ) of signal electrodes I₁, I₂, ... I m , so as to form effective display pixels A-E ... wherein a hatched portion represents a "black" display region and a non-hatched portion represents a "white" display region. Further, a ferroelectric liquid crystal is disposed between the conductor films and the signal electrodes. In the present invention, the high-resistivity conductor films 41 may be composed of, e.g., ITO films and SnO₂ films having a sheet resistivity of 10² - 10⁶ Ω/□ , and the signal electrodes I₁ - I₆ may be composed of, e.g., ITO film having a sheet resistivity of 1 - 10² Ω/□ . Further, the scanning electrodes may be composed of low-resistivity metal or alloy, such as silver, copper, aluminum, chromium, molybdenum, or stainless steel. Figure 5 shows an exemplary set of driving waveforms corresponding to the display states of the pixels A-E in Figure 4. With respect to the pixel A , at phase t₁, a voltage of 2V₀ is applied to the scanning electrode S₁₁ and a voltage of 0 is applied to the scanning electrode S₁₂ so that a potential gradient is developed across the conductor film 41. At this time, the signal electrode I₁ is supplied with a voltage of -V₀ which is the maximum voltage of the gradation signal, whereby the pixel A is supplied with a voltage of one polarity exceeding a first threshold voltage of the ferroelectric liquid crystal (assumed to provide a "black" display state) over the entire effective display region thereof to form a "black" display state. At the subsequent phase t₂, the scanning electrode S₁₁ is supplied with a voltage of 0 and the scanning electrode S₁₂ is supplied with a voltage of-2V₀, whereby a potential gradient is developed along the conductor film 41. In phase with the potential gradient, the signal electrode I₁ is supplied with a voltage of 0 which satisfies the complement relationship with the voltage of -V₀ applied at the preceding phase t₁. As a result, the pixel A is supplied with a voltage below the threshold voltage of the ferroelectric liquid crystal over the entire effective display region to retain the black display state formed in the previous phase as shown in Figure 4. With respect to the pixel B , at phase t₃, the same potential gradient as the one developed in the above-explained phase t₁ is developed across a conductor film 41 between the scanning electrodes S₂₁ and S₂₂, and in phase with the potential gradient, the signal electrode I₁ is supplied with a voltage of -1/2·V₀, whereby one half from one end of the effective display pixel region is supplied with a voltage of one polarity exceeding the first threshold voltage of the ferroelectric liquid crystal to be written into "black". Then, at the subsequent phase t₄, the conductor film concerned with the pixel B is provided with the same potential gradient as the one developed in the above explained phase t₂, and in phase with the potential gradient, the signal electrode I₁ is supplied with a voltage of 1/2·V₀ which satisfies the complement relationship with the voltage of -1/2·V₀ applied at the phase t₃, whereby one half from the other and of the effective display pixel region is supplied with a voltage of the other polarity exceeding the second threshold voltage of the ferroelectric liquid crystal (assumed to provide a "white" display state) to provide a display state at the pixel B as shown in Figure 4. Further, with respect to the pixel C , at phase t₅, in phase with the potential gradient developed as described above across a conductor film 41 between the scanning electrodes S₃₁ and S₃₂, the signal electrode I₁ is supplied with a voltage of -1/5·V₀, whereby one fifth from one end of the effective pixel region is supplied with a voltage exceeding the first threshold voltage. Then, at the subsequent phase t₆, in phase with the potential gradient as described with respect to phases t₂ and t₄, the signal electrode I₁ is supplied with a voltage of 4/5·V₀ which satisfies the complement relationship with the voltage of -1/5·V₀ applied at the phase t₅, whereby 4/5 of the effective pixel region is supplied with a voltage of the other polarity exceeding the second threshold voltage of the ferroelectric liquid crystal to provide a display state at the pixel C shown in Figure 4. The pixels D, E and F are provided with display states as shown in Figure 4 in a similar manner as described above by using a signal electrode I₂. Figure 6 shows another exemplary set of driving waveforms for use in a modification of the above-described embodiment, wherein in an odd-numbered frame F 2M-1 (M = 1, 2, 3 ...), a black display region is formed from one end of an effective pixel region, and in a subsequent even-numbered frame, a white display region is formed from the other end of the effective pixel region to form a display state as shown in Figure 4. Figure 7 shows another set of driving waveforms used in another preferred embodiment of the present invention, wherein a rest period t₂ for applying a voltage of 0 (at the same level as the voltage level of a nonselected scanning electrode) is interposed between the phase t₁ for forming a black region from one end of an effective pixel region and the phase t₃ for forming a white region from the other end of the effective pixel region for each line. Figure 8 shows a further preferred modification of the embodiment shown in Figure 7, wherein in the above mentioned rest period t₂, a voltage signal for cancelling or removing DC components of voltage signals applied at the phases t₁ and t₃ is applied from the signal electrode side. Figure 9 shows a set of driving waveforms for use in an embodiment wherein a phase t₃ for applying a voltage signal for cancelling DC components is disposed after a phase t₁ for writing "black" from one end of an effective pixel region and a phase t₂ for writing "white" from the other end of the effective pixel region. Figure 10 shows another preferred embodiment wherein a phase t₁ for applying such a voltage signal for cancelling DC components is disposed prior to phases t₂ and t₃ for writing "black" and "white", respectively. Figure 11 is a plan view of another matrix electrode arrangement used in the present invention, which comprises a number ( n ) of scanning electrodes S₁, S₂, ... S n ; a number ( m ) of high-resistivity conductor film stripes 41; and signal electrodes I₁₁, I₁₂, ... I m1 , I m2 , each pair among which is disposed to sandwich a conductor film stripe 41. Figure 12 shows a set of driving waveforms for providing a display state as shown in Figure 11. Referring to Figure 12, S₁ - S₃ denote scanning signals applied to the corresponding scanning electrodes S₁ - S₃ shown in Figure 11, including a scanning selection signal comprising alternating voltages of +2V₀ and -2V₀. At phase t₁, a "black" region is formed from one end (one signal electrode side) of an effective pixel region, and at phase t₂, a "white" region is formed from the other end (the other signal electrode side) of the effective pixel region, whereby each effective pixel region is caused to have a controlled ratio of "white" and "black" regions. Figure 13 shows a modification of the above embodiment shown in Figure 12, wherein in an odd-numbered frame F 2M-1 (M = 1, 2, 3 ...), a black region is formed from one end of an effective pixel region, and in an even-numbered frame F 2M , a white region is formed from the other end of the effective pixel region. Figures 14, 16 and 17 respectively show a modification of the embodiment shown in Figure 12, wherein a voltage signal for cancelling DC components is applied from the signal electrode side. More specifically, in the embodiment of Figure 14, phases t₁ and t₂ are for writing, and a phase t₃ is for applying the above-mentioned voltage signal for cancelling DC components. In the embodiment shown in Figure 16, phase t₁ is for applying the voltage signal for cancelling DC components, and phases t₂ and t₃ are for writing. In the embodiment shown in Figure 17, phases t₁ and t₃ are for writing, and phase t₂ is for applying the voltage signal for cancelling DC components. Figure 15 shows a modification of the embodiment shown in Figure 13, wherein in an odd-numbered frame F 2M-1 (M = 1, 2, 3, ...) , a phase t₁¹ is for writing "black" and a phase t₂¹ is for applying a voltage signal for cancelling DC components, and in an even-numbered frame, a phase t₁² is for writing "white" and a phase t₂² is for applying a voltage signal for cancelling DC components. Figure 18 is a diagram showing an outline of a driving circuit for driving a liquid crystal display panel according to the system of the present invention. In the figure, a part surrounded by a dashed line corresponds to a display panel 184 wherein a hatched portion corresponds to a pixel providing a gradational display. The panel comprises scanning electrodes 181, signal electrodes 182 and signal electrodes 183. A signal electrode 182 is supplied with a negative voltage and a signal electrode 183 is supplied with a positive voltage. The operation of the entire circuit shown in Figure 18 will now be explained. First of all, an analog image signal supplied from an external system is subjected to high speed A/D conversion at a clock pulse frequency on the order of the video rate (about 20 MHz) by means of an A/D converter 185 to obtain data for one line of the panel (i.e., data for one horizontal scanning period). The data are once latched by a latch circuit 186 and held therein until they are supplied to a panel 184 when a corresponding scanning line is turned on. With respect to the latched data, the reverse polarity data relating to the complement relationship are also provided, and either a positive or negative signal is applied in synchronism with the scanning line side by means of a clock. More specifically, when a scanning line 181 is supplied with a positive signal, a non-inverted signal line 182 is active, and an inverted signal line 183 is inactive and grounded. As a result, a positive potential gradient at 182 → 183 is developed. On the other hand, when a scanning line 181 is supplied with a negative signal, the non-inverted signal line 182 is inactive and grounded, and the inverted signal line 183 is active. As a result, a negative potential gradient of 182 ← 183 is developed. By repeating the above operation every other frame, a gradational display corresponding to given gradation data may be realized by using an optical modulation device comprising an optical modulation material showing bistability in response to an electric field applied thereto. The above operation will be further explained with reference to a time chart shown in Figure 19. For better comprehension, the analog subtractor 187 and the inverting amplifier 188 shown in Figure 18 are explained with reference to examples shown in Figures 20A and 20B. Figure 20A shows a more detailed structure of the inverting amplifier 188 and Figure 20B shows a more detailed structure of the analog subtractor 187. In the figures, it is assumed that capacitors C₁ and C₂ both have 22 pF, and R₁=R₂=R₃= R₄ = 10 KΩ. The inversion/non-inversion circuit shown in Figure 20A is a basic circuit which can be either an inverting circuit or a non-inverting circuit by turning ON or OFF the FET (field effect transistor) shown in the figure. The resistance values of R₁ - R₃ mentioned above are representative. The subtractor circuit 187 shown in Figure 20B is also a basic representative one. Particularly, the circuit has functions of obtaining a difference between two inputs e i1 and e i2 and inverting the difference as will be explained by the following equations, thus achieving the two functions of analog subtraction and polarity inversion required in the present invention: wherein e₀: output, e i1 : input 1, and e i2 : input 2. When R₁ = R₂ = R₃ = R₄, e₀ = -(e i1 -e i2 ). Now, the above-mentioned maximum voltage V max is taken as e i1 , and a particular input voltage V in is taken as e i2 . The term (e i1 -e i2 ) is a result of analog subtraction for obtaining a complement and the minus (-) sign represents an inversion. The time chart shown in Figure 19 will now be explained with reference to the circuit shown in Figure 18. A 1H-inversion mode wherein the polarity is inverted for each horizontal scanning period (1H), is explained. Original clock pulses having a frequency corresponding to twice the 1H frequency are subjected to frequency division by means of a flip-flop FF to obtain Q and Q of the reverse phase. Either a non-inverted signal or an inverted signal provided for each scanning line is supplied by turning on either an analog switching transistor for Q or an analog switching transistor for Q for each 1H period by using the frequency-divided signal. On the other hand, with respect to a data signal supplied to a signal line, an analog inverter circuit for Q and an analog inverter circuit for Q are provided on the signal line side of the panel 184 in Figure 18, and either one of them is operated to select a normal output and an analog subtraction/polarity inversion output (complement output) for each 1H period depending on Q or Q . The above related operation is explained by ○ (circle) marks and arrow lines. In a first 1H period when a scanning line S₁ is selected, Q is "high" and active so that the scanning signal is supplied as it is while, on the signal line side, a signal I₁ corresponding to the input image signal is supplied to a signal electrode 182 as it is depending on Q. In the subsequent 1H period, a subsequent scanning line S₂ is selected and Q is "high" (active) so that a polarity-inverted signal S₂ is supplied while, on the signal line side, a signal I₂ which has been obtained as a polarity-inverted complement of a signal corresponding to the input image signal is supplied depending on Q . In the subsequent 1H period, Q is again "high" (active), and in the further subsequent period Q is "high" (active) so that the above operations are respectively repeated. While Figure 19 deals with only three scanning lines, an actual television set has 525 scanning lines and a period therefor (1F: one vertical scanning period) is involved. However, the above-explained operation can be applied similarly. In the 1H-inversion mode, it is basically assumed that one frame includes an odd number of scanning lines. As a result, a voltage polarity applied to each scanning line is inverted for each field operation, so that the DC-component cancelling effect is effectively achieved while a gradational display corresponding to given image signals is effected. Now, the operation principle of a ferroelectric liquid crystal device is supplemented with reference to schematic sectional views shown in Figures 21 and 22. Referring to Figure 21, there is schematically shown an example of a ferroelectric liquid crystal cell. Reference numerals 211a and 211b denote substrates (glass plates) on which a transparent electrode of, e.g., In₂O₃, SnO₂, ITO (Indium Tin Oxide), etc., is disposed, respectively. A liquid crystal of an SmC*-phase in which liquid crystal molecular layers 212 are oriented perpendicular to surfaces of the glass plates is hermetically disposed therebetween. A full line 213 shows liquid crystal molecules. Each liquid crystal molecule 213 has a dipole moment (P⊥) 214 in a direction perpendicular to the axis thereof. When a voltage higher than a certain threshold level is applied between electrodes formed on the substrates 211a and 211b, a helical structure of the liquid crystal molecule 213 is unwound or released to change the alignment direction of respective liquid crystal molecules 213 so that the dipole moments (P⊥) 214 are all directed in the direction of the electric field. The liquid crystal molecules 213 have an elongated shape and show refractive anisotropy between the long axis and the short axis thereof. Accordingly, it is easily understood that when, for instance, polarizers arranged in a cross nicol relationship, i.e., with their polarizing directions being crossing each other, are disposed on the upper and the lower surfaces of the glass plates, the liquid crystal cell thus arranged functions as a liquid crystal optical modulation device of which optical characteristics such as contrast vary depending upon the polarity of an applied voltage. Further, when the thickness of the liquid crystal cell is sufficiently thin (e.g., 1 micron), the helical structure of the liquid crystal molecules is unwound without application of an electric field whereby the dipole moment assumes either of the two states, i.e., Pa in an upper direction 224a or Pb in a lower direction 224b as shown in Figure 22. When electric field Ea or Eb higher than a certain threshold level and different from each other in polarity as shown in Figure 22 is applied to a cell having the above-mentioned characteristics, the dipole moment is directed either in the upper direction 224a or in the lower direction 224b depending on the vector of the electric field Ea or Eb. In correspondence with this, the liquid crystal molecules are oriented to either of a first stable state 223a and a second stable state 223b. When the above-mentioned ferroelectric liquid crystal is used as an optical modulation device, it is possible to obtain two advantages. First is that the response speed is quite fast. Second is that the orientation of the liquid crystal shows bistability. The second advantage will be further explained, e.g., with reference to Figure 22. When the electric field Ea is applied to the liquid crystal molecules, they are oriented to the first stable state 223a. This state is stably retained even if the electric field is removed. On the other hand, when the electric field Eb of which direction is opposite to that of the electric field Ea is applied thereto, the liquid crystal molecules are oriented to the second stable state 223b, whereby the directions of molecules are changed. Likewise, the latter state is stably retained even if the electric field is removed. Further, as long as the magnitude of the electric field Ea or Eb being applied is not above a certain threshold value, the liquid crystal molecules are placed in the respective orientation states. In order to effectively realize high response speed and bistability, it is preferable that the thickness of the cell is as thin as possible.

Claims: An optical modulation device, comprising: a first conductor film (14), said first conductor film (14) having a resistivity sufficient to develop a potential gradient therealong, a second conductor film (11) disposed opposite to said first conductor film (14), an optical modulation material, disposed between said first and said second conductor films (14, 11), consisting of a chiral smectic liquid crystal showing different stable optical states depending on polarity of voltages applied thereto, and driving-means (185-188), characterized in that said first conductor film (14) is electrically connected to first voltage-application means (13) and second voltage-application means (12) disposed at a distance (X) from said first voltage-application means (13), and in that said driving means (185-188) set said first driving voltage-application means (13) at a first reference potential (V₁₃) and supply said second voltage-application means (12) with a first voltage (V₁₂) of one polarity relative to said first reference potential (V₁₃) to furnish said first conductor film (14) with a first potential gradient along said distance (0-X), supply said second conductor film (11) with a first voltage (V₁₁) of the other polarity relative to said first reference potential (V₁₃) and in phase with said first voltage (V₁₂) of one polarity, set said second voltage-application means (12) at a second reference potential (V₂₂) and supply said first voltage-application means (13) with a second voltage (V₂₃) of the other polarity relative to said second reference potential (V₂₂) to furnish said first conductor film (14) with a second potential gradient along said distance (0-X), and supply said second conductor film (11) with a second voltage (V₂₁) of one polarity relative to said second reference potential (V₂₂) and in phase with said second voltage (V₂₃) of the other polarity, wherein the sum of the difference between said first voltage (V₁₁) of the other polarity and said first reference potential (V₁₃) and the difference between said second voltage (V₂₁) of one polarity and said second reference potential (V₂₂) is equal to zero, or the sum of the difference between said first voltage (V₁₂) of one polarity and said first reference potential (V₁₃) and the difference between said second voltage (V₂₃) of the other polarity and said second reference potential (V₂₂) is equal to zero. A device according to claim 1, characterized in that said first reference potential (V₁₃) and said second reference potential (V₂₂) are at the same level. A device according to claims 1 or 2, characterized in that said chiral smectic liquid crystal is disposed in a layer thin enough to release its own helical structure in the absence of an electric field. A device according to claim 1, characterized by a panel (184) comprising a plurality of said first and second conductor films (14 and 11), intersecting with each other so as to form a matrix, each intersection of said first and second conductor films (14 and 11) forming a pixel, whereby each of said first conductor film (14) being electrically connected to a plurality of said first and second voltage-application means (13 and 12) and wherein said driving means (185-188) a) supply a selected first voltage-application means (13) and a selected second voltage-application means (12) respectively connected to a selected first conductor film (14) with a voltage of one polarity with respect to the voltage level of a nonselected voltage-application means and a same level voltage which is at the same level as the voltage level of said nonselected voltage-application means, respectively, to provide said selected first conductor film (14) with the first potential gradient; b) supply a second conductor film (11) with a voltage of the other polarity with respect to the voltage level of said nonselected voltage-application means and in phase with the voltage supply to said selected first and second voltage-application means (13 and 12); c) supply said selected first voltage-application means (13) and said selected second voltage-application means (12) with a same level voltage which is at the same level as the voltage level of a nonselected voltage-application means and a voltage of the other polarity with respect to the voltage level of said nonselected voltage-application means, respectively, to provide said selected first conductor film (14) with the second potential gradient; and d) supply said second conductor film (11) with a voltage of one polarity with respect to the voltage level of said nonselected voltage-application means in phase with the voltage supply to said selected first and second voltage-application means (13 and 14); e) the sum of said voltage of one polarity supplied to said second conductor film (11) and said voltage of the other polarity supplied to said second conductor film (11) being equal to zero. A device according to claim 4, characterized in that the first and second potential gradients are provided to said selected first conductor film (14) in one horizontal scanning period for selection of a first conductor film including periods of a) and c). A device according to claim 4, characterized in that said first and second potential gradients are provided to said selected first conductor film (14) in the periods of a) and c) disposed in different vertical scanning periods each comprising a plurality of horizontal scanning periods for selection of a first conductor film. A device according to claim 4, characterized in that in addition to the periods of a) and c) for provision of said first and second potential gradients, a period for supplying said first and second voltage-application means with the same level of voltages respectively is disposed. A device according to claim 7, characterized in that said same level of voltages are at the same level as the voltage level of a nonselected voltage-application means. A device according to claim 7, characterized in that said period for supplying said first and second voltage-application means with the same level of voltages is disposed between the periods of a) and c). A device according to claim 7, characterized in that said period for supplying said first and second voltage-application means with the same level of voltages is disposed after the period of c). A device according to claim 7, characterized in that said period for supplying said first and second voltage-application means with the same level of voltages is disposed before the period of a). A device according to claim 4, further characterized in that said driving means (185-188) f) supply said second conductor film (11) with a voltage signal for cancelling DC components applied to said second conductor film (11). A device according to claim 12, characterized in that the sum of said voltage of the other polarity supplied in b), said voltage of one polarity supplied in d), and said voltage signal for cancelling DC components supplied in f) respectively to said second conductor film (11), is at the same level as the voltage level of said nonselected voltage-application means. A device according to claim 12, characterized in that the period of f) for supplying the voltage signal for cancelling DC components is disposed before the period of a) or the period of c). A device according to claim 12, characterized in that the period of f) for supplying the voltage signal for cancelling DC component is disposed between the periods of a) and c). A device according to claim 12, characterized in that the period of f) for supplying the voltage signal for cancelling DC components is disposed after the period of a) or the period of c). A device according to claim 1, characterized by a panel (184) comprising a plurality of said first and second conductor films (14 and 11), intersecting with each other so as to form a matrix, each intersection of said first and second conductor films (14 and 11) forming a pixel, whereby each of said first conductor film (14) being electrically connected to a plurality of said first and second voltage-application means (13 and 12) and wherein said driving means (185-188) a) supply a selected second conductor film with a voltage of one polarity and a voltage of the other polarity respectively with respect to the voltage level of a nonselected second conductor film; b) in phase with said voltage of one polarity supplied to said selected second conductor film, supply said first voltage-application means (13) connected to said first conductor film (14) with a voltage of the other polarity with respect to the voltage level of said nonselected second conductor film and supply said second voltage-application means (12) connected to said first conductor film (14) with a voltage at the same level as the voltage level of said nonselected second conductor film; and c) in phase with said voltage of the other polarity supplied to said selected second conductor film, supply said first voltage-application means (13) with a voltage at the same level as the voltage level of said nonselected second conductor film and supply said second voltage-application means (12) with a voltage of one polarity with respect to the voltage level of said nonselected second conductor film; d) the sum of said voltage of one polarity supplied to said second voltage-application means (12) in c) and said voltage of the other polarity supplied to said first voltage-application means (13) in b) being equal to zero. A device according to claim 17, characterized in that said selected second conductor film (11) is supplied with the voltage of one polarity and the voltage of the other polarity in a single horizontal scanning period for selection of a second conductor film (11). A device according to claim 17, characterized in that said selected second conductor film (11) is supplied with the voltage of one polarity and the voltage of the other polarity in different vertical scanning periods each comprising a plurality of horizontal scanning periods. A device according to claim 17, characterized in that said selected second conductor film (11) is supplied with a same level voltage which is at the same level as the voltage level of a nonselected second conductor film in addition to said voltage of one polarity and said voltage of the other polarity. A device according to claim 20, characterized in that said same level voltage is supplied between the supply of said voltage of one polarity and the supply of said voltage of the other polarity. A device according to Claim 20, characterized in that said same level voltage is supplied before the supply of said voltage of one polarity. A device according to claim 20, characterized in that said same level voltage is supplied after the supply of said voltage of the other polarity. A device according to claim 17, further characterized in that said driving means (185-188) e) supply said first and second voltage-application means (13 and 12) with voltage signals for cancelling DC components applied to said first and second voltage-application means, respectively. A device according to claim 24, characterized in that the sum of said same level voltage supplied in b), said voltage of one polarity supplied in c) and the voltage signal for cancelling DC components supplied in e) respectively to said second voltage-application means is at the same level as the voltage level of said nonselected second conductor film. A device according to claim 24, characterized in that said voltage signal for cancelling DC components is supplied before the supply of said voltage of one polarity or said voltage of the other polarity in a). A device according to claim 24, characterized in that said voltage signal for cancelling DC components is supplied between the supply of said voltage of one polarity and the supply of said voltage of the other polarity in a). A device according to claim 24, characterized in that said voltage signal for cancelling DC components is supplied after the supply of said voltage of one polarity or said voltage of the other polarity in a).

Inventors: INOUE HIROSHI, KURIBAYASHI MASAKI, INOUE, HIROSHI, KURIBAYASHI, MASAKI
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1987
Main classification: H04N3
IPC codes: H04N3