PARALLEL COMPUTATION NETWORK

Abstract: Superior performance is achieved by equalizing the time constants of amplifiers used in highly parallel computational networks. In accordance with one aspect of the invention a feedback arrangement is employed where the prior art resistance (FIG. 2, 22) between the input of each amplifier i and ground, and the capacitor (31) between the input of each amplifier and ground are instead connected in parallel between the input of each amplifier and its corresponding output. In accordance with another aspect of the invention a balanced impedance arrangement (FIG. 3) is employed where, for example, a zero current with a non-zero thevenin conductance is achieved by employing equal valued T and T conductances.

Description: This invention relates to parallel computation networks. Recently, advances in the computational circuits art have brought to the forefront a class of highly parallel computation circuits that solve a large class of complex problems in analog fashion. These circuits comprise a plurality of amplifiers having a sigmoid transfer function and a resistive feedback network that connects the output of each amplifier to the input of the other amplifiers. Each amplifier input also includes a capacitor connected to ground and a conductance connected to ground which may or may not include a capacitor and a conductor in addition to the parasitic capacitance and conductance. Input currents are fed into each amplifier input, and output is obtained from the collection of output voltages of the amplifiers. Proceedings of the national academy of sciences of the US, volume 81, May 1984, pages 3088-3092; J.J. Hopfield: "Neurons with graded response have collective computational properties like those of two-state neurons", addresses the question of whether a neural network that possesses a linear gain function and operates in continuous time exhibits the same minima-seeking characteristics of a stochastically sampled network with ideal two-state threshold devices. This reference concludes that as long as the gain of the amplifiers is high enough, the two networks exhibit the same characteristics. The invention will be described with reference to the accompanying drawings, in which: FIG. 1 shows a known highly interconnected analog network; FIG. 2 illustrates part of one form of network embodying the invention, and FIG. 3 illustrates part of another form of network embodying the invention. Referring now to FIG. 1, amplifiers 10, 11, 12, 13 and 14 have positive and negative outputs V 1, V 2, V 3, V 4, and V N , respectively. Those outputs are connected to an interconnection block 20 which has output lines 41-45 connected to the input ports of amplifiers 10-14, respectively. Within interconnection block 20, each output voltage V i is connected to each and every output line of block 20 through a conductance (e.g. resistor). For convenience, the conductance may be identified by the specific output line (i.e. source) that is connected by the conductance to a specific voltage line. For example, T + / 21 identifies the conductance that connects the non-inverting output V ₂ to the input of the first amplifier (line 41). Also connected to each amplifier input port is a parallel arrangement of a resistor and a capacitor (with the second lead of the resistor and capacitor connected to ground), and means for injecting a current into each input port (from some outside source). Applying Kirchoff's current law to the input port of each amplifier i of FIG. 1 yields the equation: where C i is the capacitance between the input of amplifier i and ground, is the equivalent resistance and it equals where ρ i is the resistance between the input of amplifier i and ground, U i is the voltage at the input of amplifier i, T + / ij is the a conductance between the non-inverting output of amplifier j and the input of amplifier i, T - / ij is the a conductance between the inverting output of amplifier j and the input of amplifier i, V j is the positive output voltage of amplifier j, related to U j by the equation V j =g i (U j ) , and I i is the current driven into the input port of amplifier i by an external source. When T + / ij and T - / ij are disjoint, T + / ij - T - / ij may for convenience be expressed as T ij , and it is well known that a circuit satisfying equation (1) with symmetric T ij terms is stable. It is also well known that such a circuit responds to applied stimuli, and reaches a steady state condition after a short transition time. At steady state, du i /dt = 0 and dV i /dt = 0 . With this known stability in mind, the behavior of other functions may be studied which relate to the circuit of FIG. 1 and involve the input signals of the circuit, the output signals of the circuit, and/or the circuit's internal parameters. Indeed, a function was studied that has the form where g -1 / i (v) is a function that is related to the gain of the amplifiers and is such that the integral of the function g -1 / i (V) approaches 0 as the gain of amplifier i approaches infinity. Also, the time derivative of the function E is negative, and that it reaches 0 when the time derivative of voltages V i reaches 0. Since equation (1) assures the condition of dV i /dt approaching 0 for all i, the function E of equation (2) is assured of reaching a stable state. The discovery of this function E led to the use of the FIG. 1 circuit in problem solving applications in associative memory applications, and in decomposition problems. The FIG. 1 circuit can solve problems which can be structured so that the function to be minimized has at most second order terms in some parameters of the problem to permit correspondence to Equation (2). Other problems, however, may require the minimization of equations that contain terms of order higher than two. Those problems are solvable through the use of interneuron amplifiers wherein the T + / ij and the T - / ij are conductances that assume different values, which are a function of the problem to be solved. The different values, however, cause the circuit to behave differently in response to different stimuli because of the different time constants associated with each amplifier. According to one aspect of this invention there is provided a network as claimed in claim 1. According to another aspect of this invention there is provided a network as claimed in claim 2. Superior performance is achieved by equalizing the time constants of the amplifiers. One technique employs a feedback arrangement where the resistance between the input of each amplifier i and ground, and the capacitor between the input of each amplifier and ground are, instead, connected in parallel between the input of each amplifier and its corresponding output. A second technique employs a balanced impedance arrangement where, for example, a zero current with a non-zero thevenin conductance is achieved by employing equal value T + / ijand T - / ij conductances. Referring again to FIG. 1, the circuit includes a capacitor and a resistor between each amplifier input and ground. The capacitor is the element that controls the time constant, or speed, of the circuit and in ordinary circuits it would behoove the designer to make the capacitor as small as practicable. The circuit, however, permits feedback to be established through what effectively is a series connection of a number of amplifiers. Without any capacitance in the circuit, instability would almost certainly occur. Even with capacitance in the circuit an instability condition could result except that, with selection of the T ij conductances, stability is maintained. There is an additional aspect to the presence of the capacitors. When the feedback paths to a particular capacitor of FIG. 1 are combined to appear as a single equivalent voltage and an equivalent resistance, R e, it becomes readily apparent that a pole exists in the frequency domain. That pole derives from the voltage division action of the capacitor and its parallel resistor, yielding a gain equation for each amplifier that is related to 1/(1 + sCR e ) . From this it is apparent that the pole position is a function of the feedback resistors and, therefore, we can expect different pole positions associated with different amplifiers in the FIG. 1 circuit. In turn, we should expect different speeds of response from the different amplifiers. What this means is that the circuit of FIG. 1 minimizes the energy function of Equation (2), but the manner in which it reaches this minimum is less than optimum since the slowest amplifier dictates the response time of the entire circuit. The problem of different pole positions is obviated with the circuit of FIG. 2 where each capacitor (and its parallel resistor) is connected between its associated amplifier output and its negative input. The result is a virtual ground operation with an associated gain equation of R/R e (1 + sCR) , where R is the resistor connected in parallel with the capacitor. That yields a fixed pole that is related solely to the capacitor and its parallel resistor. Correspondingly, the result is equal speeds of response to all of the amplifiers, and the fastest settling time of the circuit for a given capacitance value. The problem of different pole positions is also obviated with the circuit of FIG. 3. Therein, amplifier 10 is shown with input capacitor 11 and an input resistor 12 connected between the input of amplifier 10 and ground. Also connected to the input of amplifier 10 are conductance pairs (T + / 1,T - / 1), (T + / 2,T - / 2), and (T + / n,T - / n). Each pair (T + / i,T - / i) derives its input from the output of amplifier i, and the output impedance of the amplifiers is assumed to be negligible. The prior art computations of the T ij values yield either positive or negative T ij terms of different magnitudes. Since the amplifier input nodes are essentially at zero voltage potential, a negative T ij simply means that current flows out of the amplifier's input node. A positive T ij means that current flows into the amplifier's input node. In the prior art, when a computed T ij is negative, the neural network of FIG. 1 incorporates a T - / ij element into the matrix. Correspondingly, when a computed T ij is positive, the neural network of FIG. 1 incorporates a T + / ij element into the matrix. From this it can be seen that T + / ij and T - / ij are disjoint; that is, either one or the other but not both appear at any one time. Regardless of the required sign and magnitude of the computed T ij , both the T + / ij and the T - / ij conductances are included in the matrix, as shown in FIG. 3. The effective conductance presented to amplifier 10 by the conductance pair T + / i and T - / i is (T + / i + T - / i) and that sum is arranged to be constant. Since that effective conductance is constant, e.g., K, the effective overall conductance presented at the input node of each amplifier is also constant, and that results in equal speeds of response for the amplifiers. On the other hand, the current that is actually flowing into each amplifier's input node must be different, as specified by the computed T ij , and that current is equal to (T + / ij - T - / ij). That value, e.g., +A, can be obtained while maintaining the requirement that (T + / i + T - / i) = K by selecting the magnitude of T + / i to be equal 1 2 (K + A) by the magnitude of T - / i to be equal 1 2 (K - A) . In situations where there are a large number of required zero currents flowing into the amplifier nodes, and it is more convenient to create conductances of magnitude K (rather than some value between K and O), it may be useful to create T + / i= T - / j = K conductances at half of the amplifiers, and zero conductances at the other half of the amplifiers.

Claims: A network comprising a plurality of amplifiers A i (10) each having an input at which there is developed an input voltage U i , and each developing a non-inverting output V i and an inverting output - V i , with both of said outputs being related to said input by a sigmoid function g i , means for applying input current I i to said input of each of said amplifiers A i , a conductance network for connecting said positive and negative outputs to said inputs and comprising conductance values selected for the nature of the decisional operation for which it is intended to minimize the energy function where V i and V j are output voltages of said amplifiers A i and A j , respectively, T ij is a conductance that relates the amplified input voltage of amplifier A i , having a gain function g(U i ) , to the input of amplifier A j , R i is the equivalent resistance at said input of said amplifier A i , and g -1 / i is the inverse of g i , and CHARACTERISED BY means for equalizing the response speeds of said amplifiers, said means comprising a subnetwork associated with each of said amplifiers and connected between the input and the negative output of each of said amplifiers, said subnetwork comprising a parallel interconnection of a resistor (32) and a capacitor (31). A network comprising a plurality of amplifiers A i (10) each having an input at which there is developed an input voltage U i , and each developing a non-inverting output V i and an inverting output - V i , with both of said outputs being related to said input by a sigmoid function g i , means for applying input current I i to said input of each of said amplifiers A i , a conductance network for connecting said positive and negative outputs to said inputs and comprising conductance values selected for the nature of the decisional operation for which it is intended to minimize the energy function where V i and V j are output voltages of said amplifiers A i and A j , respectively, T ij is a conductance that relates the amplified input voltage of amplifier A i , having a gain function g(U i ) , to the input of amplifier A j , R i is the equivalent resistance at said input of said amplifier A i , and g -1 / i is the inverse of g i , and CHARACTERISED BY means for equalizing the response speeds of said amplifiers, said means comprising a conductance T - / ij with each conductance T + / ij such that (T + / ij+T - / ij) is a constant and (T + / ij-T - / ij) is equal to said conductance T ij , where T + / ij is a conductance connected between output V i of amplifier A i and the input of amplifier A j , and T - / ij is a conductance connected between output -V i of amplifier A i and the input of amplifier A j .

Inventors: DENKER, JOHN STEWART
Applicants: AMERICAN TELEPHONE AND TELEGRAPH COMPANY
Application year: 1987
Main classification: G06G7
IPC codes: G11C7, G06G7, G06N3