SYSTEM FOR CODING AND TRANSMITTING MOTION IMAGE SIGNALS

Abstract: A motion compensation difference interframe or inter-frame coding system having a block data redundancy compression and coding unit (30a), a PIXEL data coding unit (40) and a prediction data generating unit (20). The block data redundancy compression and coding unit (30a) codes a motion compensated (MC) difference between an input image in a form of a block and a motion predicted image from the prediction data generator unit (20), and transmits a coded data to a receiver. The PIXEL data coding unit (40) receives an error between the MC difference and a decoded MC difference from the block data redundancy compression and coding unit (30a), rearranges the error in the PIXEL data and codes the PIXEL error, when the error is greater than a predetermined value. The PIXEL coded data is also transmitted to the receiver. The prediction data generator unit (20) generates a predicted block data of the motion of the image. The redundancy compression and coding unit (30a) may include a filter circuit (9) rejecting pulse components contained in the MC difference.

Description: The present invention relates to a data communication system for transmitting and receiving motion (moving) image data. More particularly, it relates to a system for coding and transmitting motion image data, such as image data of a television (TV) telephone (conference) system, with a high efficiency in a form of interframe (frame-to-frame) difference coded signals or in a form of motion compensation interframe code signals. Generally, the image on, for example, a TV display unit, consists of a large amount of image data. In order to transfer such image data economically, a variety of data compression technologies have been attempted. In this connection, the means for reducing a redundancy (correlation) in time and space of input image signals, reducing information on amplitude components, and thus expressing the input image signals with small as possible as an amount of data small, are generally known as high efficiency coding or redundant compression coding. The data compression technologies are briefly classified into two categories: a prediction coding method, such as an interframe coding, an intra-frame coding, a differential pulse coded modulation (DPCM), a vector quantization coding, etc.; and an orthogonal transform method, such as a Walsh-Hadamard transform, a discrete Fourier transform, etc. In the prediction coding method, the prediction of picture elements (PIXELs) is effected on the basis of the correlation of adjacent PIXELs, and errors in predicted values are coded so that the amount of information to be transferred for each PIXEL can be reduced. In the orthogonal transform method, an orthogonal transform of PIXEL groups is carried out to obtain statistical deviations of the spectrum given by the transform, and quantization level numbers are suitably assigned to the statistical deviations so that the amount of information to be transferred can be reduced. In a TV telephone system, image data is changed with a time lapse, but the change of the image data may be a partial for a short period and also may be somewhat slow. On the basis of these features of the image data, a further method which obtains intra-frame or interframe difference signals or motion-compensated (MC) interframe difference signals and codes and transmits these difference signals, is available to further reduce the redundancy of the motion image signals in a time axis direction. The difference methods have been attempted for a system coding PIXELs, and for another system coding blocks each consisting of a plurality of PIXELs and formed in a matrix form. JPA 55-ll5780, published on September 9, l980, discloses a prediction coding system for television signals which codes differences for PIXELs and is provided with a noise filter for decreasing quantization errors due to a rough quantization of prediction errors. JPA 55-l58784, published on December l0, l980, discloses an interframe coding apparatus which codes differences for each block consisting of a plurality of PIXELs and reduces the amount of calculation needed by dividing the detection of motion vectors into multisteps. JPA 57-4l069, published on March 6, l982, discloses an interframe coding system which codes one of each PIXEL or each block and is provided with a code error detection circuit for reducing transfer data errors. JPA 57-l99379, published on December, 7, l982, discloses a vector coding apparatus which codes and decodes motion vectors represented by two-dimensional vectors, with a high efficiency. USP 4,077,053 discloses a television signal encoder utilizing a correlation between frames which corrects coding errors in an interframe coding process by low-bit interframe coding with a limited increase in the volume of coding information. The encoder includes a first quantization circuit, a predictor, and a second quantization circuit for detailed quantifying of interframe coding errors output from the first quantiza­ tion circuit. As set forth above, prior arts of the MC interframe difference systems provide improved data compression. On the other hand, these prior arts process either each PIXEL or each block consisting of a plurality of PIXELs. Note, the motion image data of the TV telephone system may have a variety of changes in time. The PIXEL MC interframe difference system and the block MC interframe difference system respectively have advantages and disadvantages with regard to the motion image data. That is, the prior art MC interframe difference systems still suffer from the disadvantage of a poor image quality, such as a large distortion and noise. The above disadvantages will be described in more detail with reference to a specific example. Also, an improvement of the system for achiev­ ing a relatively high compression of data, and an inexpensive transmission charge, etc. is required. An object of the present invention is to provide a motion compensation difference coding system providing a more effective coding of a motion compensation difference with a small bit rate and improving a quality of the image given by the coded data. Another object of the present invention is to provide a decoding system suitably decoding a source image in response to coded data from the motion compen­ sation difference coding system. According to the present invention, there is provided a motion compensation difference coding system including: a unit for compression-coding a motion difference and decoding a coded data; a unit, operatively connected in series to the compression-coding and decoding unit, for coding an error between the motion difference and the decoded data and decoding the error coded data when the error exceeds a predetermined value; and a unit, operatively connected in parallel to the series-connected compression-coding and decoding and error coding and decoding units, for predicting a motion of an input image in response to a decoded data of input image calculated by the decoded data from the compres­ sion-coding and decoding unit and the decoded data from the error coding and decoding unit, a preceding motion input image therefrom, and the input image. The motion difference is calculated as a difference between an input image data and a motion predicted image data from the motion predicting unit. The motion predicting unit may be connected in parallel to the compression-coding and decoding unit. The compression-coding and decoding unit may further include a filter for removing pulse components contained in the motion difference, so that the compression-coding and decoding decodes the motion difference from which the pulse components have been removed. According to another aspect of the present invention, there is also provided a decoding system including: a unit for receiving a data coded difference between a source image data and a predicted image data and decoding the coded data to another difference corresponding to the first difference; a unit for receiving a data coded error between the difference used for the data coding and the decoded difference and decoding the error coded data to another error; and a unit, operatively connected to the first and second units, for restoring the source image data in response to the another difference and another error. Other objects and features of the present invention will be described below in detail with reference to the accompanying drawings; in which: Fig. l is a block diagram of a motion compen­ sation interframe difference coding system of a prior art; Fig. 2 is a view illustrating the character­ istics of motion compensation interframe differences; Fig. 3 is a block diagram of an embodiment of a motion compensation interframe difference coding system according to the present invention; Figs. 4a and 4b are circuit diagrams of examples of a block data coder shown in Fig. 3; Figs. 5a to 5d are views of the distribution of coefficients obtained at a two-dimensional orthogonal transform shown in Fig. 4a; Fig. 6 is a circuit diagram of a PIXEL data coder shown in Fig. 3; Figs. 7a to 7ℓ are views illustrating the principle coding operation of the motion compensation interframe difference coding system shown in Fig. 3; Fig. 8 is a block diagram of a receiver of an embodiment according to the present invention; Fig. 9 is a block diagrams of another embodi­ ment of a motion compensation interframe difference coding system according to the present invention; Fig. l0 is a circuit diagram of a filter circuit shown in Fig. 9; Fig. ll is a view explaining the operation of the filter circuit shown in Fig. l0; Figs. l2a to l2e are graphs explaining the operation of the motion compensation interframe differ­ ence coding system shown in Fig. ll; Fig. l3 is a block diagram of still another embodiment of a motion compensation interframe difference coding system according to the present invention; and Fig. l4 is a block diagram of yet another embodiment of a motion compensation interframe difference coding system. Before describing the preferred embodiments of the present invention, an example of a prior art system relevant to the prior arts described above is described with reference to the drawings, for comparison. Referring to Fig. l, a motion compensation inter­ frame difference (MCID) coding system in a transmitter includes a data blocking processor l′, a prediction block image data generator unit 20′ having an image memory 2′, a motion detector 3′, and a motion compensated (MC) predictor 4′, a block-data coder 5′, a block-data decoder 6′, a subtractor ll′, and an adder l4′. The data blocking processor l′ receives an input (a source) image signal S IN consisting of a plurality of PIXEL data, and rearranged the PIXEL data to generate a plurality of block data Y each consisting of a plurality of PIXEL data, for example, 4 × 4 PIXEL data. The image memory 2′ has a capacity of at least one frame of the PIXEL data. Note, one frame of the PIXEL data contains a plurality of PIXEL data of one TV screen. The motion detector 3′ seeks a block data position closest to the input block data and outputs a vector signal S V to the MC predictor 4′. The sought block data may be the preceding block data corresponding to the input block. The vector signal S V has a motion distance and a direction therefore. The MC predictor 4′ may be a variable delay device, more specifically, for example, a random access memory (RAM). Upon receipt of the vector signal S V , the MC predictor 4′ outputs a motion predicted data I, the subtractor ll′ calculates a motion compensated (MC) block difference f₀ = Y - I, and the block-data coder 5′ carries out the coding of the MC block difference to compress the redundancy. The coding may be a two-dimensional orthogonal transform, as described in detail hereinafter. The coded signal is output to a receiver as an output data S OUT . The coded signal is also supplied to the block-data decoder 6′ and decoded thereat. The decoded signal (Y - I)′ is added to the MC block difference I at the adder l4, and thus a decoded image data Y′ is obtained. The decoded image data Y′ is stored in the image memory 2′ and can be used for calculating the MC block difference. Note, since the MC block difference is obtained by the interframe difference in a direction of the time axis or the interframe difference compensating for the motion of the code-objective PIXELs between the preced­ ing frame and the current frame, the redundancy contained in the TV screen is considerably reduced. As a result, the nature of the MC block difference differs from the image data in the frame. In other words, due to the motion of the PIXELs to be coded, the degree of change between the preceding image and the current image, and the appearance or disappearance of background portions, etc, there may be (a) portions where the values are small and the variation is slight, (b) portions where the values are large and abruptly changed, or (c) portions where the values are large, but the variation thereof is relatively small, i.e., portions where the motion compensation is not suitable, etc. In the above case (b), this generally appears in a state wherein it is mixed with the case (a) in the block. The cases (a) and (b) will be described in more detail with reference to Fig. 2. In Fig. 2, an image object at a portion L₁ moves to another portion L₂ by a distance U in a frame. Upon investigating block A, corresponding areas between the preceding frame when the image object is at the portion L₁ and the current frame when the image object is at the portion L₂ are found, and accordingly, the MC difference of the block may be small. Conversely, upon investigating block B, the background between the preceding frame and the current frame is great changed due to the motion of the image object. As a result, an abrupt change of the MC difference at a portion b₃ with respect to the adjacent portions b₁ and b₂ occurs. In this case, a correlation of the MC difference between the PIXELs becomes low. Experimentally, a value of the correlation is approx­ imately 0.4 to 0.6. This value, of course, may be changed by patterns of the input motion images. When the orthogonal transform of the MC differences having the above nature is carried out, the following results will be obtained; note, "significant transform coefficients" below means orthogonal transformed coeffi­ cients greater than a certain threshold: (aa) few significant coefficients exist in the above case (a), (bb) significant coefficients are concentrated at low order portions in the above case (c), or (cc) significant coefficients lay over low order portions to high order portions, in the above case (b). In the cases (aa) and (bb), a highly effective coding of the MC difference can be achieved. In the case (cc), much information representing the many significant coefficients is needed, but is limited to a resonable number from the view point of data compression. The reduction of the information repre­ senting the significant coefficients can be attempted by, for example, a coding which neglects higher order coefficients and codes only lower order coefficients, or another coding which roughly quantizes the significant coefficients. However, in these coding methods, a large amount of noise is generated by the coding, resulting in a low quality of the decoded images at the receiver or the generation of additional large MC differences. The above is discussed in the case where the two-dimensional orthogonal transform and coding is applied to the MC differences. When usable information is extremely limited, the two-dimensional orthogonal transform and coding should be for a group of the MC differences, and thus the above defects will be increased. In addition, when a vector quantization transforming likely patterns at each block is applied to the MC difference, the number of block patterns facili­ tating the vector quantization is also limited, and accordingly, a precise coding of the MC differences having the above nature is difficult. Both cases suffer from these defects. The television signal encoder utilizing a correla­ tion between frames, as disclosed by USP 4,077,053, alleviates the above defects, but still suffers from disadvantages. Now, preferred embodiments of the present invention will be described. Figure 3 is a block diagram of an embodiment of a motion compensation interframe difference (MCID) coding system. The coding system includes a data blocking processor l, a block data redundancy compression and coding unit 30 having a block data coder 5 and block data decoder 6, a PIXEL data coding unit 40 connected in tandem to the block data redundancy compression and coding unit 30 and having PIXEL data coder 7 and a PIXEL data decoder 8, and a prediction block data generator unit 20 having an image memory 2, a motion detector 3, and a MC predictor 4, as main elements. The operation of the coding system shown in Fig. 3 will be described. The data blocking processor l is similar to the data blocking processor l′, and accordingly, receives an input (a source) image singal S IN of a plurality of PIXEL data and outputs a plurality of block data Y each consisting of a plurality of PIXEL data and formed in a matrix, for example, 4 × 4 PIXEL data. The block data Y is supplied to a subtractor ll and the motion detector 3 in the prediction block data generator unit 20. The prediction block data generator unit 20 is similar to the prediction block data generator unit 20′, and thus outputs a predicted block data I to the subtractor ll. The subtractor ll outputs a block MC difference f₀ , i.e. difference between the input image block data Y and the predicted image block data I: f₀ = Y - I. The block MC difference f₀ is subjected to the redundancy compression and coding at the block data decoder 5. The coded signal is output to the receiver as a block coded data and supplied to the block data decoder 6. The decoder 6 decodes the coded data from the coder 5 as a decoded data f₀″, for restoring the MC difference. The coding at the block data decoder 5 can be realized by a circuit as shown, for example, in Fig. 4a or 4b. The block data decoder 5 shown in Fig. 4a includes a two-dimensional orthogonal transformer 5l and a quantizer 52. The two-dimensional orthogonal trans­ former 5l carries out the two-dimensional orthogonal transform of the block data received from the subtractor ll. Note, the two-dimensional orthogonal transform is now briefly defined. The following transform is a so-called "two-dimensional unitary transform". X′ = Am·X·An t ... (l) where, X: images of M × N PIXELs Am: a unitary matrix An: a unitary matrix t: a transposition If the unitary matrixs Am and An have an orthogonal relationship, the above transform is called a "two-dimensional orthogonal transform". Referring back to Fig. 4a, when the high efficiency coding is carried out, a preferably two dimensional orthogonal transform may be a 'Walsh-Hadamard transform" shown below, a "discrete cosine transform" also shown below, or a "discrete Fourier transform". The two-dimensional orthogonal transformer 5l executes the Walsh-Hadamard transform, the discrete cosine transform or the discrete Fourier transform. The size of the orthogonal matrix may be 4 × 4 PIXELs. When the data is correlated, coefficients obtained by the above transform show a special pattern. For example, if the block data has a large change in a horizontal direction in the frame, and a small change in a vertical direction in the frame, the coefficients concentrate at low order portions of the energy in a vertical direction in the transform domain, as shown in Fig. 5a. If the block data has a large change in a vertical direction in the frame, and a small change in a horizontal direction in the frame, the coefficients are distributed at the low order portions in a horizontal direction in the transform domain, as shown in Fig. 5b. If the block data has a small change in both directions, the coefficients are distributed as shown in Fig. 5c. Conversely, if the block data has a large change in both directions, the coefficients are distributed as shown in Fig. 5d. Generally, threshold coding and zone coding are known as transform coding. Referring again to Fig. 4a, the quantization circuit 52 has a plurality of coefficient distribution patterns, as shown in Figs. 5a to 5d, previously designed by taking into account the correlation of the image data and the frequency of occurrence of the patterns. The number of patterns is, for example, 5l2. The quantiza­ tion circuit 52 receives the orthogonal transformed coefficients, finds the closest pattern, and outputs an index corresponding to the closest pattern. Accordingly, the output f₀ has the index 0 to 5ll. The output has only nine bits representing 0 to 5ll, and thus the input block data of 4 × 4 PIXELs is greatly reduced. Referring back to Fig. 3, the block data decoder 6 receives the index and restores the input block data by performing a reverse two-dimensional orthogonal transform in response to the index. The vector quantization circuit 53 in Fig. 4b effects a vector quantization of the PIXELs in a block by a known method. The block data decoder 6 restores the amplitudes of the PIXELs in the block. Referring again to Fig. 3, errors between the MC difference f₀ from the substractor ll and the decoded value f₀′′ from the block data decoder 6 are calculated at a subtractor l2. As described above, smoothly changing components contained in the MC difference are fully encoded at the block data encoder 5. Then, abruptly changing components should be PIXEL-coded. The PIXEL data coder 7 receives the errors (f₀ - f₀″) and encodes the PIXEL data. Figure 6 is s circuit diagram of the PIXEL data coder 7. The PIXEL data coder 7 includes a data rearranged processor 7l and a PIXEL quantization circuit 72. The data rearranged processor 7l inputs the errors (f₀ - f₀″) in a form of a block and rearranges the same as sequential PIXEL data. The PIXEL quantiza­ tion circuit 72 performs the quantization of the PIXEL data. The PIXEL coded signal of the error is also output to the receiver and to the PIXEL data decoder 8. The PIXEL coding differs from a normal PIXEL coding for directly coding an MC difference of PIXEL data, and thus a coded signal has a smaller number of bits than a normal coded signal. The PIXEL data decoder 8 receives the PIXEL coded signal from the PIXEL data coder 7 and performs the reverse-quantization of the received signal, restoring amplitudes of the error. The decoded output (f₀ - f₀″) of the error is added to the decoded output f₀″ at an adder l3. The adder l3 outputs a decoded value f₀′ corresponding to the MC difference f₀. The decoded value f₀′ is added to the predicted block data I at an adder l4. A data (f₀′ + I) is supplied to the prediction block data generator unit 20. The prediction block data generator unit 20 is similar to the generator unit 20′ shown in Fig. l and generates a predicted block data I. The image memory 2 has a capacitor for storing at least one frame PIXEL data and stores the data (f₀′ + I). The motion detector 3 detects a distance between the input block data from the data blocking processor l and a block data closest to the input block data, stored in the image memory 2, and a direction therefor. The motion detector 3 outputs a vector signal S V containing the above distance and the direction. The MC predictor 4, which may be a RAM, outputs a prediction block data I in response to the vector signal S V . The above operation may be repeated. The above operation is now described in principle with reference to Figs. 7a to 7ℓ. When the MC difference f₁ changes smoothly as shown in Fig. 7a, orthogonal transformed values of the MC difference can be represented by a small amount of transformed coefficients as F₁ , as shown in Fig. 7d. On the other hand, if the MC difference f₂ changes abruptly as shown in Fig. 7b, the transformed coeffi­ cients F₂ lie over a wide range from a low order to a high order as shown in Fig. 7e. Normally, the MC difference f₀ is mixed with f₁ and f₂ due to the change of the image object, the function of the motion compen­ sation. If the two-dimensional orthogonal transform is applied to the MC difference f₀ , transformed coeffi­ cients F₀ lying over a wide range will be given as shown in Fig. 7f. Even if the transformed coefficients F₀ greater than a threshold Thl are quantitized and coded, many bits are required as shown in Fig. 7h, Accordingly, first the transformed coefficients greater than another threshold Th2, where the threshold Th2 is greater than the threshold Thl, are coded at the block-data coder 5. The coded data F₀″ is shown in Fig. 7g. The coded data F₀″ is reverse-orthogonal transformed at the block-data decoder 6 as shown in Fig. 7i, resulting in the f₀″ as shown in Fig. 7j. The coded data f₀″ is not always equal to the data f₀ , but roughly represents the components of f₁. Therefore, the output (f₀ - f₀″) from the subtractor l2 is akin to f₂ as shown in Fig. 7k. The data (f₀ - f₀″) higher than a threshold Th3 is coded at the PIXEL data coder 7 as shown in Fig. 7ℓ. The block coded data f₀ from the block-data coder 5 and the PIXEL coded data (f₀ - f₀″) from the PIXEL data coder (if required) are transmitted to the receiver. As a result, the MC difference is totally and efficiently coded and a high quality image will be reproduced at the receiver. Figure 8 is a block diagram of the receiver. The receiver includes a block data decoder l0l having a similar structure to the block data decoder 6 shown in Fig. 3, a PIXEL data decoder l02 having a similar structure to the PIXEL data decoder 8, adders l03 and l04 and a prediction PIXEL data generator l05 having a similar structure to the generator 20. The block data decoder l0l receives the block code data f₀ from the block data coder 5, and the PIXEL data decoder l02 receives the PIXEL code data (f₀ - f₀″) from the PIXEL data coder 7. The receiver reproduces the PIXEL data input to the data blocking processor l in Fig. 3. Another embodiment of a motion compensation inter­ frame difference (MCID) coding system is described with reference to Fig. 9. The MCID coding system in Fig. 9 is provided with a filter circuit 9 in a block data redundancy compression and coding unit 30a in addition to the MCID coding system shown in Fig. 3. In the MCID coding system shown in Fig. 3, if the block data has pulse components, as an example of abrupt signals, an accurate coded data of the block data is not always obtained because the pulse components are not correlated. Then, the MCID coding system shown in Fig. 9 rejects the pulse components contained in the block data from the data blocking processor l at the filter circuit 9 and supplies the filtered block data to the block data coder 5, thus obtaining an accurate coded data. An example of the filter circuit 9 is illustrated in Fig. l0. The filter circuit 9 includes a memory 9l storing the PIXEL data in a block form, a PIXEL data read-out circuit 92 reading the PIXEL data from the memory 9l, a middle value PIXEL selection circuit 93, and a memory 94 storing the filtered results. The filter circuit 9 also includes subtractors 9l0 and 9l2, an adder 9l3, absolute circuits 9l4 to 9l6, an AND circuit 9l7, an OR circuit 9l8, compare circuits 9l9 and 920, a switch 923, and terminals 92l and 922 for the switch 923. The PIXEL data read-out circuit 92 reads a center PIXEL e and adjacent PIXELs b , d , f and h , shown in Fig. ll. With respect to a portion where the value abruptly changes, the following operation is performed to replace the PIXEL therewith a middle value PIXEL of the five PIXELs b , d , e , f and h : (l) when |b - h| + |d - f| ≧ Thl, a middle value PIXEL of b, d, e, f and h is selected, (2) when |b - h| + |d - f| < Thll, e is selected, (3) when |e - (middle value PIXEL of, b, d, e, f and h)| ≧ Thl2, the middle value PIXEL of b, d, e, f and h is selected. The subtractor 9l0 calculates (b - h), and the abso­ lute circuit 9l4 outputs an absolute (b - h) : |b - h|. The subtractor 9ll calculates (d - f), and the absolute circuit 9l5 outputs an absolute |d - f|. The adder 9l3 sums |b - h| + |d - f|, and the sum |b - h| + |d - f| is compared with the threshold value Thll at the compare circuit 9l9. If the sum is greater than the thresh­ old Thll, the switch 923 is energized, and thus connected to the terminal 922, by a signal from the compare circuit 9l9 through the OR circuit 9l8. As a result, the output from the middle value PIXEL selection cir­ cuit 93 is stored in the memory 94. According to the above operation, the operation of the above case (l) is executed. The operations of the above cases (2) and (3) are also executed in the same way. The operation of the MCID coding system having the above filter circuit in Fig. 9 will be briefly described with reference to Figs. l2a to l2e. The MC difference f₀ containing pulse components, as abruptly changing components, as shown in Fig. l2a is filtered. A differ­ ence f₁′ removed the pulse components as shown in Fig. l2b is orthogonal-transformed and coded at the block-data coder 5, resulting in a block coded data F₁′ as shown in Fig. l2d. Conversely, another difference f₂′ containing the pulse components as shown in Fig. l2c is PIXEL-coded at the PIXEL data coder 7, also resulting in a PIXEL coded data F₂′ as shown in Fig. l2e. In this way, due to the provision of the filter circuit 9, the coding is further improved. Figure l3 is a diagram of still another embodiment of an MCID coding system according to the present invention. The MCID coding system shown in Fig. l3 includes a data blocking processor l, a block data redundancy compression and coding unit 30b, a PIXEL data coding unit 40b, and a prediction block data generator unit 20b, respectively, similar to the corresponding units l, 30, 40, and 20 in Fig. 3. The MCID coding system of Fig. l3 differs from the MCID coding system of Fig. 3, in the overall construction thereof. The block data encoder 5 may be realized by the circuit shown in Fig. 4a or 4b. The PIXEL data encoder 7 also may be realized by the circuit shown in Fig. 6. A main difference between the MCID coding system of Fig. l3 and that of Fig. 3 is a generation of a signal for the prediction. The block data redundancy compres­ sion and coding function and the PIXEL data coding function are substantially identical to those of the MCID coding system of Fig. 3. In Fig. l3, the adder l5 receives a block decoded data of an MC difference f₀″ from the block data decoder 6 and a MC prediction data I from the prediction block data generator unit 20b and outputs a decoded block data. The subtractor l7 outputs errors between the decoded block data and the input block data. The PIXEL data coder 7 codes the errors, and the PIXEL data decoder 8 decodes the coded data. The adder l6 receives the decoded block data from the adder l5 and the decoded data from the PIXEL data decoder 8 and outputs a final decoded data Y′ to the prediction block data generator unit 20b. The above final decoded data Y′ is expressed by Y′ = f₀′ + I. This is identical to that in Fig. 3. Accordingly, the MCID coding system of Fig. l3 has the same function as the MCID coding system of Fig. 3. Figure l4 is a block diagram of yet another embodi­ ment of an MCID coding system according to the present invention. The MCID coding system includes a filter circuit 9 in addition to the MCID coding system in Fig. l3, to improve the coding when the MC difference contains the pulse components. The filter circuit 9 may be realized by the circuit as shown in Fig. l0. As described above, by suitably combining the block data redundancy compression and coding and the PIXEL data coding, a small amount of coded information, but enough to restore a source image with a high quality, may be obtained. As a result, the coding system in the transmitter and the receiver of the present invention can be applied in a low data transmission speed communi­ cation system while maintaining a high image quality. Although interframing is used in the above embodi­ ments intra-framing also can be applied in the system of the present invention. Many widely different embodiments of the present invention may be constructed without departing from the spirit and scope of the present invention. It should be understood that the present invention is not limited to the specific embodiments described in this specification, except as defined in the appended claims.

Claims: 1. A motion compensation difference coding system comprising: means (30, 30a) for compression-coding a motion difference and decoding a coded data; means (40), operatively connected in series to said compression-coding and decoding means (30, 30a), for coding an error between said motion difference and said decoded data and decoding said error coded data when said error exceeds a predetermined value; and means (20), operatively connected in parallel to said series-connected compression-coding and decoding and error coding and decoding means (30, 30a; 40) for predicting a motion of an input image in response to a decoded data of said input image calculated by said decoded data from said compression-coding and decoding means (30, 30a) and said decoded data from said error coding and decoding means (40), a preceding motion input image therefrom, and said input image; said motion difference being calculated as a difference between an input image data and a motion predicted image data from said motion predicting means (20). 2. A motion compensation difference coding system comprising: means (30b, 30c) for compression-coding a motion difference and decoding a coded data; means (40b), operatively connected in series to said compression-coding and decoding means (30b, 30c), for coding an error between said motion difference and said decoded data and decoding said error coded data when said error exceedes a predetermined value; and means (20b) operatively connected in parallel to said compression-coding and decoding means (30b, 30c), for predicting a motion of an input image in response to a decoded data of said input image calculated by said decoded data from said compression-coding and decoding means (30b, 30c) and said decoded data from said error coding and decoding means (40b), a preceding motion input image therefrom, and said input image; said motion difference being calculated as a difference between an input image data and a motion predicted image data from said motion predicting means (20b). 3. A motion compensation difference coding system according to claims l or 2, further comprising means (l), operatively connected to said compression-coding and decoding means (30, 30a, 30b, 30c), said error coding and decoding means (40, 40b) and said motion predicting means (20, 20b), for receiving said input image, and rearranging the same in a block data having a plurality of picture element data and formed by a matrix, so that said compression-coding and decoding means (30, 30a, 30b, 30c) codes said block data and decodes the coded data to a data in a block form, and said motion predicting means (20, 20b) generates the motion predicted data in a block form, and wherein said error coding and decoding means (40, 40b) comprises means (7l) for rearranging said error in a block form as a plurality of picture element data so that said error coding and decoding means (40, 40b) codes said picture element data of said error. 4. A motion compensation difference coding system according to claim 3, wherein said compression-coding and decoding means (30, 30a, 30b, 30c) comprises means (5) for two-dimensional transforming said block data and for compression-coding said transformed data, and means (6) for reverse two-dimensional transforming said coded block data. 5. A motion compensation difference coding system according to claim 4, wherein said two-dimensional transforming means (5) comprises a two-dimensional orthogonal transforming means (5l), and said reverse two-dimensional transforming means (6) comprise a reverse two-dimensional orthogonal transforming means (6). 6. A motion compensation difference coding system according to claim 3, wherein said compression-coding and decoding means (30, 30a, 30b, 30c) comprises a vector quantization means (53), and a reverse vector quantization means. 7. A motion compensation difference coding system according to claims 3 or 6, wherein said motion predicting means (20, 20b) comprises memory means (2) storing said decoded data supplied thereto, motion predicting means (4) and motion detecting means (3) receiving said input image block data and finding a decoded data in said memory means (2) closest to said input image block data in a vector, said motion predicting means (4) outputting said motion predicted data in response to said vector. 8. A motion compensation difference coding system according to claims l or 2, wherein said compression-coding and decoding means (30a, 30c) comprises a filter (9) for removing pulse components contained in said motion difference, so that said compression-coding and decoding means (30a, 30c) decodes said motion difference from which said pulse components have been removed. 9. A motion compensation difference coding system according to claim 8, wherein said filter (9) receives said input image, arranges the input image in a mattrix display form of picture element data with respect to a center picture element data, and selects a picture element data having a middle value thereof. l0. A decoding system comprising: means for receiving a data coded difference between a source image data and a predicted image data and decoding said coded data to another difference corresponding to said difference; means for receiving a data coded error between said difference used for the data coding and said decoded difference and decoding said error coded data to another error; and means, operatively connected to said first and second means, for restoring said source image data in response to said another difference and said another error.

Inventors: KANEKO, MASAHIDE, KOGA, TOSHIO C/O NEC CORPORATION, MATSUDA, KIICHI, MUKAWA, NAOKI
Applicants: FUJITSU LIMITED, KOKUSAI DENSHIN DENWA CO., LTD, NEC CORPORATION, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Application year: 1987
Main classification: H04N7
IPC codes: H04N7, G06T9