AUTOMATIC GAIN CONTROL APPARATUS

Abstract: The automatic gain control apparatus comprises rectifier means (1) for converting the level of a received signal into a DC voltage; comparing means (2) for converting said DC voltage into a first control signal (output 2); voltage generating means (3) responsive to said first control signal (output 2) and a second control signal (output 7) for generating an automatic gain control voltage (output 3); AGC circuit means (4) responsive to said automatic gain control voltage for controlling the amplitude of said received signal; detector means (8) for envelope-detecting the output of said AGC circuit means (4); analog/digital converter means (5) for converting the output of said detector means (8) into a digital signal; digital AGC controller means (6) for digitally processing the output signal of said analog/­ digital converter means (5); and digital/analog converter means (7) for converting the output signal of said AGC controller means (6) into an analog signal and supplying said second control signal (output 7).

Description: Background of the Invention The present invention relates to an automatic gain control apparatus for use in a receiver of radio communication system or the like, and more particularly to an automatic gain control apparatus using digital control technique. An automatic gain control apparatus, extensively used in a receiver of radio communication system or the like, is intended for control to keep received signals, which have undergone amplitude variation by fading or some other cause on the radio transmission line, at a constant amplitude. Many of recent such control apparatuses use digital, instead of analog, control technique. An automatic gain control apparatus using such digital control technique is mainly composed of an automatic gain controlled (AGC) circuit (or AGC amplifier), analog/digital (A/D) converter, a digital AGC controller and a digital/analog (D/A) converter. In this apparatus, the output of the AGC circuit is converted by the A/D converter into a digital signal, then by the digital AGC controller into a digital control signal, and further by the D/A converter into an analog control signal, which is supplied to the AGC circuit. The AGC circuit varies its gain in response to the analog control signal, and achieves control to maintain the output of the AGC circuit at a constant amplitude. In such an automatic gain control apparatus, as will be described in detail hereinafter, if the numbers of bits in the A/D converter and the D/A converter are small and the output amplitude variability of the AGC circuit is great, the output amplitude control by the AGC circuit will be rough, and the output of the AGC circuit will fail to be constant, resulting in amplitude modulated signals. On the other hand, if the output amplitude is to be finely controlled, the aforementioned converters will have to be able to handle greater numbers of bits, which would mean higher costs of the converters and a more complex composition of the digital AGC controller. Moreover, this would also entail finer increment and decrement of the control for digital control signals in the digital AGC controller, resulting in the disadvantage that the controller would be unable to follow abrupt variations in input amplitude caused by fading or some other factor. In the specification of the French patent published under the number 2,129,053 on October 27 1972, there is proposed an automatic gain control system in which a first control signal is generated in response to a gain controlled signal and a second control signal is a time varied signal which does not depend on an input signal. In an embodiment of the invention to be described there are provided rectifier means for converting the level of a received signal into a D.C. voltage; comparing means for converting the D.C. voltage into a first control signal; voltage generating means responsive to the first control signal and a second control signal for generating an automatic gain control voltage; AGC circuit means responsive to the automatic gain control voltage for controlling the amplitude of said received signal; detector means for envelope-detecting the output of the AGC circuit means; analog/digital converter means for converting the output of the detector means into a digital signal; digital AGC controller means for digitally processing the output of the analog/digital converter means; and digital/analog converter means for converting the output of said AGC controller means into an analog signal and supplying said second control signal. Brief Description of Drawings Fig. 1 is a block diagram illustrating a radio receiver using an automatic gain control apparatus by the prior art; Figs. 2A and 2B are charts for explaining the operation of the receiver shown in Fig. 1; Fig. 3 is a block diagram of an automatic gain control apparatus which is a preferred embodiment of the present invention; Fig. 4 is a circuit diagram illustrating an embodiment of the comparing circuit shown in Fig. 3; Fig. 5 is a table showing the state of output corresponding to a given voltage in the circuit of Fig. 2; Fig. 6 is a circuit diagram illustrating an embodiment of the voltage generating circuit shown in Fig. 3; Fig. 7 is a chart for explaining the operation of the circuit of Fig. 6; and Fig. 8 is a circuit diagram illustrating an embodiment of the AGC circuit in Fig. 3. Detailed Description of the Invention Referring to Fig. l illustrating a radio receiver using an automatic gain control apparatus by the prior art, an RF signal, for instance an FM signal, is picked up by an antenna ll0, amplified by an RF amplifier lll, then converted into an IF signal by a frequency converter ll2, level-controlled by an automatic gain control apparatus l00, and demodulated by a demodulator ll3. In the automatic gain control apparatus l00, a signal which has undergone fading on the radio transmission path is supplied to an AGC circuit l0l. This AGC circuit l0l is so structured as to achieve current-conversion of a voltage supplied from a D/A converter l02 and be controlled by a variable gain element for current control. The output of the AGC circuit l0l is AM (envelope) detected by a detector l05, and entered into an A/D converter l03. Reference numeral l04 represents a digital AGC controller which uses the output of this A/D converter l03 as its input, and supplies its output to the D/A converter l02. The operation of an automatic gain control apparatus structured in this manner will be described below with reference to Figs. 2A and 2B. In Fig. 2A, the digital output of the A/C converter l03 is represented on the axis of abscissas, and the output voltage V of the D/A converter l02, on the axis of ordinates. The AGC controller l04 so effects control that the output of the AGC circuit l0l remain constant in amplitude. This digital AGC controller l04 has a reference level as shown in Fig. 2A. If the output signal level of the AGC circuit 101, entered from the output end of the A/D converter l03, is below the reference level, the digital AGC controller l04, as shown in Fig. 2A, will so control the increment of a counter in the digital AGC controller l04 as to raise the output voltage of the D/A converter l02. If it is above the reference level, the digital AGC controller l04 will so control the decrement of the counter as to lower the output voltage of the D/A converter l02, so that the output level of the AGC circuit l0l be kept constant. Where it is desired to finely control the output signal, the number of bits handled by the D/A converter l02 is increased. In the above described automatic gain control apparatus using conventional digital control, a D/A converter is used for voltage control, so that the output voltage of the D/A converter varies stepwise, as shown in Fig. 2A. If the number of bits inputted to the D/A converter l02 is relatively small and the variable range of its output voltage is widened, the output voltage will greatly vary per bit of variation, so that the control by the AGC circuit l0l will become rough, resulting in an unconstant output of the AGC circuit l0l, somewhat like an amplitude-modulated signal. Consequently, if the number of bits handled by the D/A converter is increased to finely adjust the amplitude, the digital AGC controller will become unable to follow the velocity of fading or any abrupt variation as its counter is too slow in increment or decrement. Fig. 3 is a block diagram illustrating an automatic gain control apparatus which is a preferred embodiment of the present invention. In the figure, a rectifier l converts the level of the received signal into a D.C. voltage. A comparing circuit or A/D converter 2 converts the output of the rectifier l into control digital signals. A voltage generating circuit 3 is for generating an AGC voltage according to the output signal of this comparing circuit 2 and the output voltage of a D/A converter 2. An AGC circuit 4 converts the output voltage of this voltage generating circuit 3 into a current and controlling the amplitude of said received signal. An A/D converter 5 is for converting the output signal of this AGC circuit 4 into a digital signal. A digital AGC controller 6 compares the output signal of this A/D converter 5 with its own reference level, and so achieves control as to reduce the output voltage of a D/A converter 7 if the former is higher than the latter or to raise it if the former is lower. The D/A converter 7 is so structured as to convert the output signal of the digital AGC circuit 6 into an analog voltage, which is supplied to the voltage generating circuit 3. A detector 8 is for AM-detecting the output of the AGC circuit l0l. These circuits 4, 5, 6, 7 and 8 respectively correspond to the circuits l0l, l03, l04, l02 and l05 of the apparatus illustrated in Fig. l. Next will be described the operation of the preferred embodiment illustrated in this Fig. 3. First, an IF signal, whose amplitude is varied by fading on the radio transmission path, is supplied to the rectifier l and the AGC circuit 4. The rectifier l is a circuit for converting the level of the signal received over the radio transmission path into a D.C. voltage level signal, and its output is supplied to the comparing circuit 2. The comparing circuit 2 is intended for determining the reception level after conversion into the D.C. voltage signal by the rectifier l, and it supplies the voltage generating circuit 3 with a signal corresponding to the reception level. Then, the voltage generating circuit 3, intended for generating a voltage to control the variable gain element of the AGC circuit 4, generates an AGC voltage according to a signal from the comparing circuit 2 and another from the D/A converter 7. The AGC circuit 4, a circuit for controlling the variable gain element by varying the current, receives the input of an IF signal with a variable amplitude level, and controls its amplitude. The A/D converter 5 is a circuit for converting the output signal of the AGC circuit 4, AM-detected by the detector 8, into a digital signal. Now, the AGC controller 6 determines whether the amplitude of the digital signal inputted from the A/D converter 5 is above or below the reference level by digital signal processing. If above, the controller 6 will decrement the count, or if below, it will increment the count, to control the AGC circuit 4 through the D/A converter 7 and the voltage generating circuit 3. The D/A converter 7 is intended for converting the output digital signal of the AGC controller 6 into an analog voltage signal. Now will be described the specific compositions of the main constituent elements of the above mentioned automatic gain control apparatus and how they operate. First, the rectifier l can be composed of an ordinary full-wave rectifier circuit and a smoothing circuit, and may be an full-wave rectifier circuit having a log characteristic if it is to rectify receive field signals. It converts variations in received signals into D.C. voltage signals. Next, the comparing circuit 2 is structured as shown in Fig. 4. In this Fig. 4 illustrating an embodiment of the comparing circuit 2, reference numeral 9 represents a terminal to which a D.C. voltage signal from the rectifier l is to be inputted, and the D.C. voltage V IN fed to this terminal is supplied to one each of the input terminals of comparators l0 and ll to undergo level determination. In these comparators l0 and ll are set determination levels for voltages V₁ and V₂, obtained by resistors l2 and l3 connected to +V and -V voltage terminals. As shown in Fig. 5 for explaining the operation, the comparator circuit 2 so operates as to make output 0₁ and 0₂ of the comparators l0 and ll both "l" in logical level when the input D.C. voltage V IN is greater than voltages V₁ and V₂; their outputs 0₁ and 0₂ "l" and "0", respectively, when the input D.C. voltage V IN is below voltage V₁ and above V₂; and their outputs 0₁ and 0₂ both "0" when the input D.C. voltage V IN is below voltages V₁ and V₂, and indicates in two-bit binary signals how the input signal level varies. In this Fig. 4, reference numerals l4a and l4b represent output terminals. Incidentally, though the embodiment shown in Fig. 4 uses two comparators, l0 and ll, a larger number of comparators can be used to achieve finer determination of levels if signal variations are to be assessed in greater detail. Now, the voltage generating circuit 3 is structured as shown in Fig. 6. In Fig. 6, reference numerals l5a and l5b represent input terminals to which the outputs from the output terminals l4a and l4b of the comparing circuit 2, shown in Fig. 4, are supplied; l6 represents an output terminal, and l7, a terminal to which the voltage from the D/A converter 7 is inputted. An operational amplifier l8 inverts and amplifies a reference voltage +V₅ to provide a negative reference voltage -V₅. This voltage -V₅ is inputted to a switch l9, which is opened and closed by signals x and y from the input terminals l5a and l5b. When the signals x and y are both "l" in logic level, the switch l9 closes a switch a to connect the ground and a resistor 23. The resistor 23 here has a high resistance, as high as that of a resistor 26. If the input voltage from the terminal l7 is 0 V, an output voltage V₆ obtained at the output terminal l6 of the operational amplifier 20 will be 0 V as shown in Fig. 7. Then, if the logic levels of the signals x and y are "l" and "0", respectively, the switch l9 will close a switch b to connect the voltage -V₅ at the output end of the operational l8 and a resistor 24. The resistor 24 here has a resistance lower than the resistor 23, and voltage -V₅ is amplified by as much as the gain between resistors 26 and 24 to a V , as shown in Fig. 7, by the operational amplifier (inverting amplifier) 20. Next, if the logic levels of the signals x and y are both "0", the switch l9 will close a switch c to connect voltage -V₅ at the output end of the operational amplifier l8 and a resistor 25. This resistor 25 has a lower resistance than the resistor 24, and voltage -V₅ is amplified by as much as the gain between resistors 26 and 25 to b V , as shown in Fig. 7, by the operational amplifier 20. As is evident from Fig. 7, the output voltage of the voltage generating circuit 3 illustrated in Fig. 6 is varied stepwise, as shown in Fig 7, by the outputs from the output terminals l4a and l4b of the comparing circuit 2 illustrated in Fig. 4. Meanwhile, since the voltage from the D/A converter 7 supplied through the terminal l7 is entered into the non-inverted input of the operational amplifier l8, it is added to the aforementioned voltage which varies stepwise to give the other voltage shown in a dotted line. As a result, the range of voltage variation by the D/A converter 7 need not be greater than a single step of the solid line in Fig. 7. In Fig. 8 showing an embodiment of the AGC circuit 4, the same signs as in Fig. l represent the respectively corresponding elements, reference numeral 27 representing an input terminal to which a control voltage is supplied from the circuit 3 (Fig. 3); 28, an output terminal from which an output is supplied to the detector 8 and the demodulator ll3 (Fig. 2); and 33, an input terminal to which an IF signal is supplied from the frequency converter ll2 (Fig. 2). The AGC circuit 4 comprises an operational amplifier 29, a current-controlled variable gain element 30, and resistors 3l and 32. The control voltage supplied to the input terminal 27 is converted into a current by the resistor 3l to control the variable gain element 30. The variable gain element 30 here has a characteristic that its resistance is low when its current is high and vice versa. The current-controlled variable gain element 30 controls the IF signal amplitude supplied to the terminal 33. Then, the A/D converter 5 and D/A converter 7 may consist of an ordinary A/D converter and D/A converter, respectively. The A/D converter 5 converts the output signal of the AGC circuit 4 into a digital signal, while the D/A converter 7 converts the digital signal from the digital AGC controller 6 into an analog voltage. Next, the digital AGC controller 6, which may consist of an ordinary digital signal processor, will so achieve control as to reduce the output voltage of D/A converter 7 if the amplitude of the digital signal from the A/D converter 5 is above the reference level or to raise the output voltage of the D/A converter 7 if it is below the reference level. As hitherto described, the present invention has tremendous benefits in practical application because it effects automatic gain control according to information on the level variation of input signals, so that fine control can be accomplished without having to increase the number of bits in the D/A converter, a wide enough dynamic range can be secured and abrupt variations in input signal level can be effectively coped with. An automatic gain control apparatus hereunder also is highly useful in that it can readily follow sharp changes, such as fading, and accomplish fine amplitude control without having to increase the number of bits in the D/A converter.

Claims: An automatic gain control apparatus for receiving a signal, the apparatus including a voltage generating circuit (3) providing a gain control signal and responsive to a first control signal and a second control signal for generating an automatic gain control signal, an AGC circuit (4) responsive to the automatic gain control signal for controlling the amplitude of the received signal, a detector (8) for detecting an output of the AGC circuit to produce an output of the detector (8), an analog/digital converter (5) for converting the output of the detector (8) into a digital signal, a digital AGC controller (6) responsive to the digital signal for generating a digitally processed signal, and a digital/analog converter (7) for converting the digitally processed signal into the second control signal, characterised in that the digital AGC controller (6) increments and decrements a count depending upon a difference between the digital signal and a reference level and outputs the count as the digitally processed signal, and in that the apparatus further includes a rectifier (1) for converting the level of the received signal into a DC value and a comparing circuit (2) responsive to both the DC value and a second referance level for generating the first control signal. An automatic gain control apparatus as claimed in claim 1, characterised in that the voltage generating circuit (3) includes means (18, 19, 21, 22, 23, 24, 25) for converting a reference D.C. value (+V5) into one of a plurality of D.C. values in response to the first control signal (x, y), and means (20, 26) for combining the second control signal (17) with the one of the plurality of D.C. values, thereby providing the automatic gain control signal (16). An automatic gain control apparatus as claimed in claim 2, characterised in that the rectifier means (1) is a full-wave rectifier.

Inventors: HARA, TOSHIHIRO C/O NEC CORPORATION
Applicants: NEC CORPORATION
Application year: 1987
Main classification: H03G3
IPC codes: H03G3