Method for forming crystal and crystal article obtained by said method

Abstract: A method for forming a crystal, which comprises applying a crystal forming treatment on a substrate having a free surface on which a deposition surface (S NDS ) with a small nucleation density and a deposition surface (S NDL ) having a sufficinetly small area for crystal growth only from a single nucleus and having a greater nucleation density (ND L ) than the nucleation density (ND S ) of said deposition surface (S NDS ) are arranged adjacent to each other, thereby growing a single crystal from said single nucleus.

Description: This invention relates to a method of deposition for producing on the surface of a substrate one or more single crystals of a crystal forming material, particularly a method for forming single crystal or polycrystal controlled in grain size prepared by utilizing a difference in nucleation density properties exhibited by the surface materials exposed during deposition of the crystal forming material. The present invention is applicable for formation of a crystal such as a single crystal or a polycrystal film to be used for electronic devices, optical devices, magnetic devices, piezoelectric devices or surface acoustic devices, etc., such as semiconductor integrated circuits, optical integrated circuits, magnetic circuits, etc. In the prior art, single crystal thin films to be used for semiconductor electronic devices or optical devices have been formed by epitaxial growth on a single crystal substrate. For example, it has been known that epitaxial growth of Si, Ge, GaAs, etc., can be done from liquid phase, gas phase or solid phase on Si single crystal substrate (silicon wafer), and it has been also known that epitaxial growth of a single crystal such as GaAs, GaAlAs, etc., occurs on a GaAs single crystal substrate. By use of the semiconductor thin film thus formed, semiconductor devices and integrated circuits, electroluminescent devices such as semiconductor lasers or LED have been prepared. Ultra-high speed transistors utilizing two-dimensional electronic gas, ultra-lattice devices utilizing quantum well, etc., have been developed recently. High precision epitaxial techniques, such as MBE (molecular beam epitaxy) or MOCVD (organometallic chemical vapor deposition) which use ultra-high vacuum, have made these developments possible. In such epitaxial growth on a single crystal substrate, it is necessary to match lattice constants and coefficients of thermal expansion between the single crystal material of the substrate and the epitaxial growth layer. For example, although it is possible to effect epitaxial growth of Si single crystal thin film on sapphire which is an insulating single crystal substrate, the crystal lattice defects at the interface due to deviation in lattice constants and diffusion of aluminum which is a component of sapphire into the epitaxial layer pose problems in application for electronic devices or circuits. Thus, the method for forming a single crystal thin film of the prior art by epitaxial growth may be understood to be dependent greatly on its substrate material. Matthews et al have examined the effect of different combinations of substrate materials upon epitaxial layer growth (EPITAXIAL GROWTH, Academic Press, New York, 1975, ed. by J.W. Matthews). Also, the size of the substrate is presently about 6 inches for Si wafer, and enlargement of GaAs, sapphire substrate is further retarded. In addition, since the single crystal substrate is high in production cost, the cost per chip becomes higher. Thus, for production of a single crystal layer capable of preparing a device of good quality according to the method of prior art, there has been involved the problem that the kinds of the substrate materials are limited to an extremely narrow scope. On the other hand, research and development of three-dimensional integrated circuits to accomplish high integration and multi-function by laminating semiconductor devices in the normal line direction of the substrate has been made abundantly in recent years, and also research and development of large area semiconductor devices such as solar batteries, switching transistors of liquid crystal picture elements, etc., in which devices are arranged in an array on a cheap glass are becoming more abundant from year to year. What is common to these is that the technique for forming a semiconductor thin film on an amorphous insulating material and forming an electronic device such as a transistor, etc., thereon is required. Among them, particularly the technique for forming a single crystal semiconductor of high quality on an amorphous insulating material has been desired. Generally speaking, when a thin film is deposited on an amorphous insulating material substrate such as SiO₂, etc., due to the defect of long distance order of the substrate material, the crystal structure of the deposited film becomes amorphous or polycrystalline. Here, the amorphous film refers to a state in which near distance order to the extent of the closest atoms is preserved, but no longer distance order exists, while the polycrystalline film refers to single crystal grains having no specific crystal direction gathered as separated at the grain boundaries. For example, in the case of forming Si on SiO₂ according to the CVD method, if the deposition temperature is about 600°C or lower, it becomes an amorphous silicon, while it becomes a polycrystalline silicon with grain sizes distributed between some tens to some hundreds nm (hundreds to thousands Å)at a temperature higher than said temperature. However, the grain sizes and their distribution of polycrystalline silicon will be varied greatly depending on the formation method. Further, by melting and solidifying an amorphous or polycrystalline film by an energy beam such as laser or rod-shaped heater, etc., a polycrystalline thin film with great grain sizes of some micrometres or millimeters have been obtained (Single Crystal silicon on non-single-crystal insulator, Journal of crystal Growth vol. 63, No. 3, October, 1983 edited by G.W. Gullen). When a transistor is formed on the thus formed thin film of respective crystal structures and electron mobility is measured from its characteristics, mobility of about 0.1 cm²/V·sec or less is obtained for amorphous silicon, mobility of 1 to 10 cm²/V·sec for polycrystalline silicon having grain sizes of some tens µm (hundred Å) and a mobility to the same extent as in the case of single crystalline silicon for polycrystalline silicon with great grain sizes by melting and solidification. From these results, it can be understood that there is great difference in electrical properties between the device formed in the single crystal region within the crystal grains and the device formed as bridging across the grain boundary. In other words, the deposited film on the amorphous material obtained in the prior art has amorphous or polycrystalline structure having grain size distribution, and any device prepared thereon is greatly inferior in its performance as compared with a device prepared on a single crystal layer. For this reason, the uses are limited to simple switching devices, solar batteries, photoelectric converting devices, etc. On the other hand, a method for forming a polycrystalline thin film with great grain sizes by melting and solidification has the problems that an enormous time is required due to scanning of amorphous or single crystal thin film with an energy beam for every wafer, bulk productivity is poor, and also is not suited for large area processing. Further, in recent years, studies of diamond thin film growth are becoming popular. Diamond thin film, which is particularly broad in bandgap e.g. 5.5 eV, as a semiconductor, can be actuated at higher temperature (about 500°C or less) as compared with Si, Ge, GaAs, etc., which are semiconductor materials of the prior art. Also, the carrier mobility of both electrons and positive holes surpass that of Si (1800 cm²/V.sec for electrons, 1600 cm²/V.sec for positive holes), and thermal conductivity is also extremely high. For this reason, it has been expected to be promising for application in semiconductor devices of the great consumption power type with great heat generation quantity. However, although there have been reports in the prior art about epitaxial growth of diamond thin film on a diamond substrate by vapour phase growth (N, Fujimoto, T. Imai and A. Doi Proc. of Int. Conf. IPAT), there is no successful report about heteroepitaxial growth on a substrate other than diamond substrate. Generally speaking, diamond nuclei are generated by utilising excitation with microwave, using a hydrocarbon type gas such as CH₄, etc., and by irradiation with hot filament or electron beam, but the nucleation density is generally low, whereby a continuous thin film can be obtained with difficulty. Even if a continuous thin film may be formed, it has a polycrystalline structure with great grain size distribution and it is difficult to apply this to semiconductor device manufacture. Also, as long as a diamond substrate is used, it is expensive as a matter of course, posing also a problem in large area production. Thus, it is not suitable for practical application. As described above, in the crystal growth method of the prior art three-dimensional integration and large area development could not be done with ease, it has been difficult to apply to practical device manufacture, and crystals such as single crystals and polycrystals, etc., required for preparation of devices having excellent characteristics could not be formed easily and at low cost. It is mentioned that United States Patent US 3620833 discloses a method of integrated circuit manufacture in which an insulative layer, e.g. of silicon dioxide, is deposited over the surface of a temporary support, and nucleation sites then are formed by imprinting a nucleation agent, e.g. a diluted photosensitive resist composition such as KMER Kodak Metal Etch Resist, or by selective mechanical surface damage produced by indentation using a tipped tool or by a selectively directed concentrated energy beams such as an electron beam. Single crystallites are then grown at the nucleation sites by means of chemical vapour deposition. The diameters of the nucleation sites are chosen to be much smaller than the cross-sectional areas of the crystallites formed, and are preferably in the tenth of a micron range. An example is described in which silicon is deposited by chemical vapour deposition using hydrogen and a silicon halide e.g. SiCl₄ or SiHCl₃ as the chemical vapour reagents. There is also described a method of random nucleation in which the distance between crystallites (packing density) is controlled as a function of the deposition conditions (i.e. the concentration of reactants, temperatures, flow rates, etc.). In each case, after growth of the crystallites, insulating material, e.g. silicon dioxide or silicon nitride, is then deposited over the crystallites and then a polycrystalline semiconductor substrate is formed. The temporary substrate is removed thereafter by etching or lapping and the surface of the crystallites exposed by selective removal of the insulating material first mentioned. The present invention is intended as a solution to the problems aforesaid. In accordance with the present invention there is provided a method of deposition for producing on the surface of a substrate one or more single crystals of a crystal forming material, which method comprises: establishing at a free surface of said substrate one or more deposition surface areas (S NDL ) having under chosen conditions of deposition a property of nucleating said crystal forming material at a higher nucleation density than that of the adjacent deposition surface are (S NDS ), each of said one or more deposition surface area (S NDL ) being limited in size so that during an initial stage of the deposition each shall support the formation of a single nucleus only of the crystal forming material; depositing crystal forming material on the free surface of said substrate under said chosen conditions of deposition, these conditions being such that said crystal forming material nucleates selectively on said one or more deposition surface areas (S NDL ) and forms on each a single nucleus of a supra-critical size; and upon further deposition of said crystal forming material, epitaxially growing a single crystal from each said single nucleus; which method does not include: establishing said one or more deposition-surfaces (S NDL ) either by imprinting a nucleation agent on the surface of said substrate or by producing selective damage by indentation using a tipped tool; nor does said method include: depositing crystal forming material selectively on one or more damaged areas of the surface of the substrate, which areas are produced by irradiation with a directed beam of electrons or other beam of concentrated energy. In the aforesaid method, the step of establishing said one or more deposition surface areas (S NDL ) may be performed by: (a) depositing on the surface of said substrate a layer of material for producing said one or more deposition surface areas (S NDL ) and subsequently patterning said layer lithographically to produce said deposition surface areas (S NDL ) of limited size; or (b) changing the material composition of said substrate at one or more deposition surface areas (S NDL ) of the free surface by ion implantation using either ion injection through a patterned resist mask or a directed ion beam. The method described may be performed wherein a plurality of deposition surface areas are established and said further deposition of said crystal forming material is continued at least until respective single crystals touch and form a polycrystalline film. Also the method aforesaid may be followed by device definition, production of a silicon oxide covering layer, and a repeat of the method aforesaid and device definition to produce devices stacked at respective levels. In the accompanying drawings: Fig. 1 is a graph for illustration of the relationship between the size of nucleus rc and free energy G in the process of forming thin film; Figs. 2A and 2B are illustrations of a selective deposition method; Fig. 3 is a graph showing the change with lapse of time of nucleation density (ND) on the deposition surface of Si0₂ and the deposition surface of silicon nitride; Figs. 4A to 4D are illustrations of the formation steps of a first embodiment of the present invention; Figs. 5A and 5B are perspective views of the substrate in Figs. 4A to 4D; Figs. 6A to 6D are illustrations of the steps of a second embodiment of the present invention; Figs. 7A to 7D are illustrations of the steps of a third embodiment of the present invention; Figs. 8A to 8B are perspective views of the substrates in Figs. 7A to 7B; Figs. 9A to 9D are illustrations of the steps of a fourth embodiment of the present invention; Figs. 10A to 10C are illustrations of formation steps of a fifth embodiment of the present invention; Figs. 11A to 11B are perspective views of the substrates in Figs. 10A to 10C; Figs. 12A to 12C are illustrations of the steps of a sixth embodiment of the present invention; Figs. 13A to 13C are illustrations of the steps of a seventh embodiment of the present invention; Fig. 14 is a schematic sectional view showing an example of the multi-layer structure by use of the first embodiment of the present invention; Figs. 15A to 15D are illustrations of the steps of an eighth embodiment of the present invention; Fig. 16 is a graph showing the relationship between the flow rate of SiH₄ and NH₃ and the composition ratio of Si and N in the silicon nitride film formed; Fig. 17 is a graph showing the relationship between Si/N composition ratio and nucleation density; Fig. 18 is a graph showing the relationship between the injected amount of Si ions and nucleations density; Fig. 19 is a graph showing the time dependency of nucleation density of diamond nuclei on Fe, Co, Si and Mo. Embodiments of the invention will be described below by way of example, but first by way of necessary background and a better understanding of the present invention, a general process of forming thin film metal for semiconductor application will be explained. When the deposition surface is made of a material different in kind from the flying atom, particularly an amorphous material, the flying atoms are diffused freely on the substrate surface, or again evaporated (released). And, as the result of collision mutually between the atoms, a nucleus is formed and when its size becomes the size rc (= -2 σo/gv) at which its free energy G becomes the maximum (critical nucleus), G is reduced and the nucleus continues to grow stably three-dimensionally to become shaped in an island. The nucleus with the size exceeding rc is called stable nucleus, and unless otherwise particularly noted, "nucleus" in the following basic description of the present invention refers to this "stable nucleus". Also, among "stable nucleus", those with small r are called "initial nucleus". The free energy generated by formation of nucleus is represented as follows: G = 4πf(ϑ) (σo r² +1/3·gv·r³) f(ϑ) = 1/4(2 - 3cosϑ + cos²ϑ) wherein, r: radius curvature of nucleus ϑ: contact angle of nucleus gv: free energy per unit deposition σo: surface energy between nucleus and vacuum. Fig. 1 shows the manner in which G is changed. In the same Figure, the radius of curvature of the stable uncleus when G is at the maximum value is rc. Thus, nuclei grow to become shaped in islands, and further grow whereby contact mutually between islands progresses until sometimes coalescence occurs and via a network structure, it becomes finally a continuous film to cover completely over the substrate surface. Following such a process, a thin film is deposited on the substrate. In the deposition process as described above, the density of nucleus formed per unit area of the substrate surface, the size of the nucleus and the nucleation speed are determined depending on the state of the system of deposition, and particularly the interaction between the flying atoms and the substrate surface material is an important factor. Also, a specific crystal direction grows in parallel to the substrate due to anisotropy relative to the crystal surface of the interface energy at the interface between the deposited material and the substrate, and when the substrate is amorphous, the crystal direction within the substrate plane is not constant. For this reason, grain boundaries are formed by collision mutually between nuclei or islands, and particularly in the case of collision mutually between islands with some sizes or greater, grain boundaries are formed as such rather than occurrence of coalescence. Since the grain boundaries formed are difficulty movable in the solid phase, the grain sizes are determined at that point. Next, the selective deposition method for forming a deposited film selectively on the deposition surface is to be described. The selective deposition method is a method in which a thin film is formed selectively on the substrate by utilizing the differences between the materials in factors influencing nucleus formation in the thin film forming process such as surface energy, attachment coefficient, release coefficinet, surface diffusion speed, etc. Figs. 2A and 2B are illustrations of the selective deposition method. First, as shown in Fig. 2A on the substrate 1, a thin film 2 comprising a material different in the above factors from the substrate 1 is formed at a desired portion. And, when deposition of a thin film comprising an appropriate material is effected under appropriate deposition conditions, a thin film 3 grows only on the thin film 2, whereby it is possible to give rise to a phenomenon that no growth occurs on the substrate 1. By utilizing this phenomenon, the thin film 3 formed self-matchingly can be grown, whereby it becomes possible to omit the lithographic step by use of a resist as practiced in the prior art. As the material for enabling deposition according to such selective formation method, for example, SiO₂ may be used as the substrate 1, Si, GaAs, silicon nitride as the thin film 2 and Si, W, GaAs, InP, etc., as the thin film 3 to be deposited. Fig. 3 is a graph showing the change with lapse of time of nucleation density on the deposited surface of SiO₂ and the deposited surface of silicon nitride. As shown in the same graph, soon after initiation deposition, the nucleation density on SiO₂ is saturated at 10³ cm⁻² or less, and the value is not substantially changed even after 20 minutes. In contrast, on silicon nitride (Si₃N₄), it is once saturated at about 4 x 10⁵ cm⁻² or less, is not substantially changed 10 minutes thereafter, but is abruptly increased thereafter. This measurement example shows the case in which SiCl₄ gas is diluted with H₂ and deposited according to the CVD method under the conditions of a pressure of 170 Torr and a temperature of 1000°C. Otherwise, the same action can be obtained by use of SiH₄, SiH₂Cl₂, SiHCl₃, SiF₄, etc., as the reaction gas, and controlling the pressure, temperature, etc. Also, the vacuum vapor deposition can be employed. In this case, nucleation on SiO₂ poses substantially no problem, but by addition of HCl gas into the reaction gas, nucleation on SiO₂ can be further suppressed to make deposition of Si on SiO₂ perfectly zero. Such a phenomenon depends greatly on the difference in adsorption coefficinet, release coefficient, surface diffusion coefficinet, etc., relative to Si of the material surfaces of SiO₂ and silicon nitride, but the fact that SiO₂ itself is etched by the reaction of SiO₂ with Si atom itself to form silicon monooxide with higher vapor pressure, while no such etching phenomenon occurs on silicon nitride may also be considered to be a cause to effect selective deposition (T. Yonehara, S. Yoshioka, S. Miyazawa, Journal of Applied Physics 53, 6839, 1982). Thus, by selecting SiO₂ and silicon nitride as the materials of the deposition surface and silicon as the material to be deposited, sufficiently great nucleation density difference as shown in the same graph can be obtained. Here, although SiO₂ is desirable as the material for the deposition surface, this is not limitative and sufficiently practical nucleation density difference can be obtained even by use of SiO x (0 < x < 2). Of course, the present invention is not limited to these materials, but the difference in nucleation density (ΔND) may be sufficinetly 10³-fold or more in density of nuclei as shown by the same graph, and sufficient selective formation of deposited film can be done with the materials as examplified below. As another method for obtaining this nucleation density difference (ΔND), ions of Si or N may be injected locally into the SiO₂ surface to form a region having excessive Si or N. The present invention utilizes selective deposition based on such nucleation density difference (ΔND) and, by forming sufficiently finely so that a single nucleus may grow on the deposition surface of a different kind of material having sufficiently greater nucleation density than the material of the deposition surface, a single crystal can be grown selectively only at the site where such fine different kind of material exists. In this connection, since selective growth of a single crystal is determined depending on the electron state of the deposition surface, particularly the state of dangling bonds, the material with lower nucleation density (for example, SiO₂) is not required to be a bulk material, but it may be formed only on the surface of any desired material, substrate, etc., to form the above deposited surface. In the following, the present invention is described in detail by referring to the drawings. Figs. 4A to 4D are illustrations of the formation steps showing a first embodiment of the method for forming crystal according to the present invention, and Figs. 5A and 5B are perspective views of the substrates in Figs. 4A and 4D. First, as shown in Fig. 4A and Fig. 5A, on the substrate 4, a thin film 5 [deposition surface (S NDS )] with small nucleation density which enables selective deposition is formed and a material different from the material forming the thin film 5 with greater nucleation density is deposited thinly, followed by patterning according to lithography, etc., to form sufficiently finely deposition surface 6 (S NDL ) (or called "Seed") comprising a different kind of material. However, the size, the crystal structure and the composition of the substrate 4 may be any desired ones, and a substrate having a functional device formed thereon prepared according to conventional semiconductor technique may be employed. Also, the deposition surface (S NDL ) 6 comprising a different kind of material is also inclusive of modified regions having excessive Si or N formed by ion injection of Si or N into the thin film 5 as described above. Next, by selection of appropriate deposition conditions, a single crystal of a thin film material is formed only on the deposition surface (S NDL ) 6. That is, the deposition surface (S NDL ) 6 is required to be formed sufficiently finely so that only a single nucleus may be formed thereon. The size of the deposition surface (S NDL ) 6, which may differ depending on the kind of the material, may be several microns or less. Further, the nucleus grows while maintaining a single crystal structure to become a single crystal grain 7 in shape of an island as shown in Fig. 4B. For forming an island-shaped single crystal grain 7, it is desirable to determine the conditions so that no nucleation may occur at all on the thin film 5, as already mentioned. The island-shaped single crystal grain 7 further grows while maintaining the single crystal structure with the deposition surface (S NDL ) 6 as the center (lateral overgrowth), whereby it can cover over the whole thin film 5 as shown in Fig. 4C (single crystal 7A). Subsequently, if necessary, the single crystal 7A is flattened by etching or polishing, and a single crystal layer 8 capable of forming a desired device can be formed on the thin film 5 as shown in Fig. 4D and Fig. 5B. For forming thus the thin film 5 forming the nonnucleation surface (S NDS ) on the substrate 4, any desired material can be used for the substrate 4 which is the supporting member. Further, in such a case, even when the substrate 4 may be one having a functional device, etc., formed thereon according to conventional semiconductor technique, the single crystal layer 8 can be easily formed thereon. In the above embodiment, the nonnucleation surface (S NDS ) is formed of thin film 5, but a substrate comprising a material with small nucleation density (ND) enabling selective nucleation may be used as such and nucleation surfaces (S NDL ) may be provided at any desired positions to form single crystal layers similarly thereon. Figs. 6A - 6D are illustrations of the steps for forming crystal showing a second embodiment of the present invention. As shown in these figures, on a substrate 9 comprising a material with small nucleation density (ND) enabling selective nucleation, the nucleation surface (S NDL ) comprising a material with great nucleation density (ND) can be formed sufficiently finely to form a single crystal layer 8 similarly as in the first embodiment. Figs. 7A - 7D are illustrations of the formation steps showing a third embodiment of the method for forming crystal according to the present invention, and Figs. 8A and 8B are perspective views of the substrates in Figs. 7A and 7D. As shown in Fig. 7A and Fig. 8A, on the amorphous insulating substrate 11, with an interval of a distance ℓ , nucleation surfaces (S NDL ) 12-1, 12-2 of a material different from the substrate 11 enabling the above selective nucleation are arranged sufficiently finely. The distance ℓ is set equal to the size of the single crystal region required for formation of semiconductor device or group of devices or greater. Next, by selecting appropriate crystal forming conditions, on the nucleation surfaces (S NDL ) 12-1, 12-2 only a nucleus of a crystal forming material is formed. That is, the nucleation surfaces 12-1, 12-2 are required to be formed to a sufficiently fine size (area) to the extent that only a single nucleus may be formed. The size of the nucleation surfaces (S NDL ) 12-1, 12-2, which may be different depending on the kind of the material, may be several microns or less. Further, the nucleus grows while maintaining the single crystal structure, and become island-shaped single crystal grains 13-1, 13-2 as shown in Fig. 7B. For forming island-shaped single crystal grains 13-1, 13-2, it is desirable to determine the conditions so that no nucleation may occur at all on other surfaces than the nucleation surfaces (S NDL ) on the substrate 11. The crystal direction in the normal line direction of the substrate 11 of the island-shaped single crystal grains 13-1, 13-2 is determined so as to make the interface energy of the material of the substrate 11 and the material forming nucleus minimum. For, surface or interface energy has anisotropy depending on the crystal face. However, as already mentioned, the crystal direction within the substrate plane in amorphous substrate is not determined. The island-shaped single crystal grains 13-1, 13-2 further grow to become single crystals 13A-1, 13A-2 until the adjacent single crystals 13A-1, 13A-2 contact each other as shown in Fig. 7C, but since the crystal direction within the substrate plane is not constant, a crystal grain boundary 14 is formed at the intermediate position between the nucleation surfaces (S NDL ) 12-1 and 12-2. Subsequently, the single crystals 13A-1, 13A-2 grow three-dimensionally, but crystal faces with slow growth speed appear as the fact. For this reason, the surfaces of single crystals 13A-1, 13A-2 are flattened by etching or polishing, and further the portion of the grain boundary 14 is removed to form thin films of single crystals 15-1, 15-2 containing no grain boundary in shape of lattices as shown in Fig. 7D and Fig. 8B. The size of the single crystal films 15-1, 15-2, 15 is determined by the interval ℓ between the nucleation surfaces (S NDL ) as described above. That is, by determining appropriately the formation pattern of the nucleation surface (S NDL ) 12, the position of the grain boundary can be controlled to form single crystals with desired sizes at a desired arrangement. Figs. 9A - 9D are illustration of the steps for forming crystal showing a fourth embodiment of the present invention. As shown in these figures, similarly as in the first embodiment, a nonnucleation surface (S NDS ) 5 shaped in a thin film comprising a material with small nucleation density (ND) enabling selective nucleation is formed on a desired substrate 4, and a nucleation surfaces (S NDL ) 12 comprising a different material with greater nucleation density (ND) are formed at intervals of ℓ thereon, whereby single crystal layers 15 can be formed similarly as in the above third embodiment. Figs. 10A - 10C are illustrations of the formation steps showing a fifth embodiment of the method for forming crystal according to the present invention, and Figs. 11A and 11B are perspective views of the substrates in Figs. 10A and 10C. First, as shown in Fig. 10A and Fig. 11A, concavities 16 with desired size and shape are formed on the amorphous insulating substrate 11, and nucleation surfaces (S NDL ) 12 with sufficiently fine size for forming only single nucleus are formed therein. Subsequently, as shown in Fig. 10, island-shaped single crystal grains 13 are grown similarly as in the first embodiment. And, as shown in Fig. 10C and Fig. 11B, single crystal grains 13 are grown until embedding the concavity 16 to form a single crystal layer 17. In this embodiment, since single crystal grains 13 grow within the concavity 16, the steps of flattening and removing the grain portion become unnecessary. Figs. 12A - 12C are steps for forming crystal showing a sixth embodiment of the present invention. As shown in the same Figure, on any desired substrate 4 similarly as in the first embodiment, a nonnucleation surface (S NDS ) shaped in thin film 18 comprising a material with small nucleation density (ND) enabling selective nucleation is formed, and a concavity 16 with desired size and shape is formed thereon. And, a nucleation surface (S NDL ) 12 comprising a material different from the material forming the nonnucleation surface (S NDS ) with greater nucleation density (ND) is formed therein, and a single crystal layer 17 is formed similarly as in the fifth embodiment. Figs. 13A - 13C are illustrations of the steps for forming crystal showing a seventh embodiment of the present invention. After formation of concavities on a desired substrate 19, nonnucleation surface (S NDS ) 20 shaped in a thin film comprising a material with sufficient small nucleation density (ND) enabling selective nucleation is formed, and following the same procedure as in the foregoing embodiments, single crystal layers 17 can be formed. Fig. 14 is a schematic sectional view showing an example of the semiconductor electronic device with a multi-layer structure produced by use of the first embodiment of the present invention. In Fig. 14, on the semiconductor substrate 1401 such as Si or GaAs, transistors 1402 or other semiconductor devices or optical devices are formed, and SiO₂ layer 1403 having, for example, nonnucleation surface (S NDS ) 1404 is formed thereon according to the CVD method or the sputtering method. And, as already mentioned, a nucleation surface (S NDL ) 1405 having sufficinetly fine area so that only a single nucleus may be formed is formed of, for example, Si₃N₄ and from said nucleation surface (S NDL ) 1405 single crystal layer 1407 is formed. Subsequently, on the single crystal layer 1407 are formed transistors 1408 or other semiconductor devices or optical devices, and the devices formed respectively on the substrate 1401 and the Si single crystal layer 1407 are electrically connected through the SiO₂ layer 1403. Thus, for example, by forming the transistor 1402 of the first layer (substrate 1401) and the transistor of the second layer (single crystal layer 1404) respectively as the MOS transistors, and connecting these to form CMOS, a SMOS entirely free from mutual interaction can be produced. Also, according to the technique as described above, an electroluminescent device can be also formed integrated with its driving circuit to accomplish a high degree of integration. Further, by repeating this embodiment, single crystal layers 1407 can be formed in many layers with SiO₂ layer 1403 sandwiched therebetween, whereby a semiconductor electronic device with a multiple structure can be formed easily. Figs. 15 - 15D are illustrations of the steps for forming crystal showing an eighth embodiment of the present invention. Figs. 15A - 15C are the same as Figs. 7A - 7C. That, is, a plurality (two in the Figure) of nucleation surfaces 12 are formed with an interval of ℓ , and single crystal grains 13 subjected to overgrowth on the nucleation surfaces 12 are formed. By permitting the single crystal grains 13 to further grow to form single crystals 13A, a grain boundary 14 is formed approximately at the center between the nucleation surfaces (S NDL ), and by flattening the surface of single crystal 13A, a polycrystalline layer 21 with regular grains sizes which are approximately equal to ℓ as shown in Fig. 15 can be obtained. Since the grain size of the polycrystalline layer 21 is determined by the interval ℓ between the nucleation surfaces (S NDL ) 12, it becomes possible to control the grain size of the polycrystal. In the prior art, the grain size of a polycrystal was changed by a plural number of factors such as the formation method, formation temperature, etc., and also when preparing a polycrystal with large grain size, it had a grain size distribution with a considerable width. However, according to the present invention, the grain size and grain size distribution can be determined with good controllability by the interval ℓ between the nucleation surfaces 12. Of course, as shown in Fig. 9, the above polycrystal layer 21 may be formed by forming a nonnucleation surface (S NDS ) 5 with small nucleation density (ND) on a desired substrate 4 and nucleation surfaces (S NDL ) 12-1, 12-2 with greater nucleation density (ND). In this case, as already mentioned, the substrate material and structure are not limited, but the polycrystal layer 21 can be formed by controlling the grain size and the grain size distribution. Next, the specific method for forming a single crystal layer or a polycrystal layer in the above respective embodiments is described in more detail by referring primarily to the third embodiment shown in Fig. 7 and the eighth embodiment shown in Fig. 15. By thermal oxidation of a Si single crystal wafer to form SiO₂ on the surface, a substrate 11 is obtained with its surface being formed into nonnucleation surface (S NDS ). Of course, a quartz substrate which is a material with small nucleation density (ND) can be also used as the substrate 11, or alternatively nonnucleation surface (S NDS ) may be provided by forming SiO₂ layer on the surface of any desired base substrate such as metal, semiconductor, magnetic material, piezoelectric material, insulator, etc., by use of the sputtering method, the CVD method, the vacuum vapor deposition method, etc. Also, as the material forming nonnucleation surface (S NDS ), SiO₂ is desirable, but SiO x (0 < x < 1) wit the value of x being varied may be also employed. On the SiO₂ layer of the substrate 11 having SiO₂ layer thus formed on the surface is deposited as silicon nitride layer (e.g. Si₃N₄ layer) or a polycrystalline silicon layer according to the reduced pressure chemical vapor deposition method, and subsequently the silicon nitride layer or polycrystalline silicon layer is subjected to patterning according to conventional lithographic technique or lithographic technique by use of X-ray, electron beam or ion beam, whereby nucleation surfaces (S NDL ) 12 having fine area of preferably 10 µm or less, more preferably several micron or less, optimally about 1 µm or less, are obtained. Subsequently, by use of SiH₂Cl₂, SiCl₄, SiHCl₃, SiF₄ or SiH₄, or a gas mixture of these, optionally mixed with HCl, H₂ or a gas mixture of these, Si single crystal is selectively grown on the about substrate 11. The substrate temperature, pressure, etc., may be conveniently determined, but the substrate temperature may be preferably 700 to 1100°C, and the pressure may be preferably about 100 Torr. Within a time of about some 10 minutes, by selection of optimum growth conditions, grains 13 of single crystals of Si grow on the nucleation surfaces (S NDS ) 12 comprising silicon nitride layer or polycrystalline silicon layer on the SiO₂ layer as the center, and grow to sizes of some 10 µm or more. Subsequently, by the reactive ion etching (RIE) method utilizing the etching speed difference between Si and SiO₂, the surface of the single crystal 13A is flattened by selective etching of only Si, whereby a polycrystalline silicon layer 21 controlled in grain size can be formed (Fig. 15 D). Further, by removing the grain boundary portion, an island-shaped single crystalline silicon layer 15 is formed (Fig. 7 D). If uneveness on the surface of the single crystal grain 13 is large, mechanical polishing may be conducted before etching. When an electrical field effect transistor is formed according to conventional semiconductor device preparation technique on the single crystal silicon layer 15 thus formed with a size of some 10 µm or more containing no grain boundary, characteristics not inferior to that formed on single silicon wafer are exhibited. Also, mutual interference between the adjacent single crystal silicon layers 15 can be prevented, if they are electrically separated by an electrical insulator such as SiO₂, even if a complementary type electrical field effect transistor (C-MOS) may be constituted. Also, since the thickness of the active layer of the device formed is thinner than the case when employing Si wafer, there is no erroneous actuation by the charges generated when radiation is irradiated. Further, due to lowering in unwanted capacity, speed-up of the device can be effected. Also, since any desired substrate can be used, a single crystal layer can be formed on a substrate of large area at lower cost than when employing Si wafer. Further, since a single crystal layer can be formed also on other semiconductors, piezoelectric materials, dielectric materials, etc., a multi-functional three-dimensional integrated circuit can be realized. Thus, the present invention exhibits a number of excellent effects. (Composition of silicon nitride) For obtaining sufficient nucleation density difference (ΔND) between the material for formation of nunnucleation surface (S NDS ) and the material for formation of nucleation surface (S NDL ) as described above, for polycrystalline silicon or SiO₂ as the material for formation of nonnucleation surface (S NDS ) to be used in combination, the material for formation of nucleation surface (S NDL ) is not limited to Si₃N₄, but silicon nitrides with various chemical composition ratios may be employed. The chemical composition ratio of silicon nitride may be varied as follows. In the plasma CVD method for forming silicon nitride film at low temperature by decomposition of SiH₄ gas and NH₃ gas in RF plasma, by varying the flow rate ratio of SiH₄ gas and NH₃ gas, the composition ratio of Si and N in the deposited silicon nitride film can be varied to a great extent. Fig. 16 is a graph showing an example of the relationship between the flow rate ratio of SiH₄ and NH₃ and the composition ratio of Si and N in the silicon nitride film formed. The deposition conditions at this time were RF output of 175 W, substrate temperature of 380°C and the flow rate of NH₃ gas was varied with the SiH₄ gas flow rate being fixed at cc/min. As shown in the same graph, by varying the gas flow rate ratio of NH₃/SiH₄ from 4 to 10, the Si/N ratio in the silicon nitride film was found to be varied from 1.1 to 0.58 according to Auger's electron spectrophotometry. On the other hand, the composition of the silicon nitride film formed according to the reduced pressure CVD method by introducing SiH₂Cl₂ gas and NH₃ gas under the conditions of a reduced pressure of 0.3 Torr and a temperature of about 800°C was found to be Si₃N₄ (Si/N = 0.75) which is approximately the stoichiometric ratio. Also, the silicon nitride film formed by heat treatment at about 1200°C in ammonia or N₂ (hot nitrification method) can be obtained with a composition further approximate to the stoichiometric ratio, since the formation method is performed under thermal equilibrium. By use of silicon nitrides formed by the various methods as described above as the material for forming nucleation surface (S NDL ) with higher nucleation density than SiO₂, the above nucleus of Si can be grown on the nucleation surface (S NDL ) comprising silicon nitride to form Si single crystal based on the nucleation density (ΔND) corresponding to the chemical composition ratio of silicon nitride. Fig. 17 is a graph showing the relationship between Si/N composition ratio and nucleation density (ΔND). As shown in the same graph, by varying the chemical composition ratio of the silicon nitride film, the nucleation density of the Si single crystal nucleus formed thereon changes to a great extent. The nucleation conditions in the graph shown in Fig. 17 correspond to the case when Si single crystal nucleus was formed by reacting SiCl₄ gas reduced to 175 Torr with H₂ at 1000°C. Of course, another graph will be obtained if nucleation conditions such as gas species, pressure, temperature, etc., are changed. The phenomenon that the nucleation density thus changes according to the chemical composition ratio of silicon nitride affects the size (area) of the nucleation surface (S NDL ) when employing silicon nitride as the material for forming the nucleation surface (S NDL ) which is formed sufficiently finely to the extent that a single nucleus may be grown. That is, when employing silicon nitride having a composition with great nucleation density (ND) only a single crystal can be formed on the nucleation surface (S NDL ) by forming the nucleation surface (S NDL ) extremely finely as compared with the silicon nitride with relatively smaller nucleation density (ND). Such a point is applicable as a similar tendency for other materials for forming nucleation surface (S NDL ). Accordingly, in the present invention, for accomplishing its objects effectively, it is desirable to select a nucleation density (ND) and a size of nucleation surface (S NDL ) formed of silicon nitride, etc., capable of forming only a single crystal suitably as desired. For example, under the nucleation condition for obtaining a nucleation density (ND) of about 10⁵ cm⁻² or less, it is possible to form selectively, only a single nucleus, if the size of the nucleation surface (S NDL ) comprising silicon nitride is about 4 µm or less. The Si/N ratio in that case is about 0.5. (Formation of nucleation surface (S NDL ) by ion injection) As another method for realizing nucleation density difference when forming Si single crystal nucleus, ion injection of Si, N, P, B, F, Ar, He, C, As, Ga, Ge, etc., may be effected locally onto the surface comprising SiO₂ which is a material for forming nonnucleation surface (S NDS ) with smaller nucleation density to form a modified region with a desired size on the SiO₂ surface, and utilize this modified region as the nucleation surface (S NDL ) with greater nucleation density (ND). For example, the SiO₂ layer surface is covered with a photoresist layer and the desired portions are exposed, developed and dissolved to have the SiO₂ layer surface exposed. Subsequently, by use of SiF₄ gas as the source gas, Si ions are implanted onto the SiO₂ layer surface exposed at 10 keV at a density of 1 x 10¹⁶ ∼ 1 x 10¹⁸ cm⁻². The projected flying distance in this case is 114 Å, and the Si concentration on the exposed surface of SiO₂ layer reaches about 10²² cm⁻³ or less. Since the SiO₂ layer is originally amorphous, the modified layer made excessively enriched in Si by injection of Si ions is also amorphous. For formation of a modified region, ion injection can be effected with the use of a resist as the mask, but it is also possible to inject a narrowed Si ion beam selectively at a desired position on the SiO₂ layer surface within a desired area without use of a resist mark by use of converged ion beam technique. After having thus effected Si ion injection, by peeling of the resist on the remaining portion, Si-excessive modified region is formed on the SiO₂ layer surface at a desired position with a desired size. On the modified region of the SiO₂ layer surface having such modified region formed, Si single crystal is permitted to grow in vapor phase. Fig. 18 is a graph showing the relationship between amount of Si ions injected and nucleation density (ND). As shown in the same graph, it can be understood that nucleation density (ND) is increased as the amount of Si⁺ injected is more. Accordingly, by forming a modified region sufficiently finely, only a single nucleus of Si can be grown with the modified region being as the nucleation surface (S NDL ), whereby a single crystal can be grown as described above. It can be easily accomplished by patterning of a resist or narrowing of beam of the converged ion beam to form sufficiently finely the modified region to the extent that only a single nucleus may grow. (Method for formation of Si single crystal nucleus other than CVD) For growth of single crystal by selective nucleation of Si, not only the CVD method, but also the method by evaporation of Si into vacuum (< 10⁻⁶ Torr) with an electron gun and deposition on a heated substrate may be used. Particularly, in the MBE (Molecular Beam Epitaxy) method which performs vapor deposition in ultra-high vacuum (< 10⁻⁹ Torr), it has been known that Si beam begins to react with SiO₂ at a substrate temperature of 900°C or higher, whereby no nucleation of Si occurs on SiO₂ at all (T. Yonehara, S. Yoshioka and S. Miyazawa, Journal of Applied Physics 53, 10, p. 6839, 1983). By utilizing this phenomenon, single crystal nuclei of Si can be formed with perfect selectivity of the fine silicon nitride regions permitted to exist in spots on the SiO₂ layer, and single crystal Si can be grown thereon. The single crystal growth conditions as preferable example at this time may be, for example, a vacuum degree of 10⁻⁸ Torr or lower, Si beam intensity of 9.7 x 10¹⁴ atoms/cm²·sec, and a substrate temperature of 900°C ∼ 1000°C. In this case, through the reaction SiO₂ + Si → 2SiO↑ a reaction product of SiO with a remarkably high vapor pressure is formed, and etching of SiO₂ itself with Si through this evaporation occurs. In contrast, no such etching phenomenon as mentioned above occurs on silicon nitride, but nucleation of Si single crystal and growth of single crystal occur. Accordingly, as the material for forming nucleation surface (S NDL ) with high nucleation density (ND), tantalum oxide (Ta₂O₅), silicon nitride oxide (SiON), etc., can be also used other than silicon nitride to obtain the same effect. That is, by forming the above nucleation surface (S NDL ) with these materials in fine areas, single crystals of Si can be permitted to grow similarly. (Crystal growth of material other than Si) (1) As the crystalline material other than Si, the case of diamond is shown as an Example, as already mentioned, it has been desired to apply a diamond thin film as the semiconductor for electronic device, it has been impossible in the prior art to grow a diamond single crystal on a material other than the diamond substrate. However, according to the crystal growth method according to the present invention, a diamond single crystal can be easily grown on a material other than diamond substrate. Here, explanation is made about an example of forming a single crystal of diamond by utilizing the fact that no single crystal nucleus of diamond grows on the surface of a metal such as Fe or Co. First, on a desired base substrate, a metal layer of Fe or Co is formed by the vacuum vapor deposition method. In this case, the metal layer becomes a polycrystalline structure. This metal layer forms the nonnucleation surface (S NDS ) with lower nucleation density (ND) as mentioned in the present specification. Subsequently, on the above metal layer, a metal such as Cu, W, Ta, Mo, Au, Ti, Al, Ni, etc., is deposited according to the vacuum vapor deposition method, or a semiconductor material such as Si, Ge, GaAs, InP, SiC, etc., according to the CVD method or the vacuum vapor deposition method. These metal and semiconductor materials are materials having sufficiently higher nucleation density as compared with the above metal layer. Subsequently, this metal or semiconductor layer is subjected to patterning to a size of several micrometer to form a nucleation surface (S NDL ) with a sufficiently fine area. Alternatively, the nucleation surface (S NDL ) comprising the above metal or semiconductor material may be formed by ion injection of the material as mentioned previously. Thus, diamond is crystallized on the metal layer where nucleation surface exists under the following conditions. As the method for crystallization of diamond, there may be employed the CVD method according to the microwave plasma CVD method, the hot filament method, etc. As the starting gases, for example, there may be employed gas mixtures of methane (CH₄) and hydrogen (1 ∼ 10 %), or hydrocarbons having alcoholic OH groups, specifically methyl alcohol CH₃OH, ethyl alcohol C₂H₅OH, tert-butyl alcohol (CH₃)₃OH, isopropyl alcohol (CH₃)₂CHOH, diethyl ether C₂H₅OC₂H₅, etc., by bubbling these liquids with hydrogen gas. In the case of the plasma CVD method, it can be practiced, for example, under the conditions of a microwave output of 200 to 350 W, a substrate temperature of 500 to 1000°C and a reduced pressure of 1 to 400 Torr. In the case of the CVD method by use of the hot filament method, it can be practiced, for example, under the conditions of a filament temperature of about 1500 to 2000°C and a filament-substrate distance of 0.5 to 10 mm. As the result, no nucleation of diamond occurs at all on the metal layer of Fe or Co, but only a single diamond single crystal nucleus is formed on the nucleation surface (S NDL ) with higher nucleation density (ND) finely formed on its surface, and thereafter diamond grains of single crystals grow to the sizes of some 10 µm to some 100 µm with the single diamond nuclei as their centers. In these diamond grains, there may sometimes exist internally the twin crystal grain boundaries without unpaired electrons depending on the crystal forming conditions, but there exists no grain boundary containing much unpaired electrons as found in the so called polycrystalline structure. This is because growth of a diamond single crystal from a single nucleus formed on the nucleation surface (S NDL ) is not inhibited due to absence of formation of diamond nucleus on the nonnucleation surface (S NDS ) formed of a material such as Fe or Co with lower nucleation density. Fig. 19 is a graph showing the time dependency of nucleation density of the diamond on the surface of Fe, Co, Si, Mo. As shown in this graph, it is possible to take sufficiently a difference in nucleation density of diamond on the surface of a metal of Fe, Co and on the surface of Si, Mo. This point is the same as in the case of nucleation density of Si on the surface of Si₃N₄ and on the surface of SiO₂ shown in Fig. 3. Thus, by forming a layer for formation of nonnucleation surface (S NDS ) with lower nucleation density (ND) on the base substrate of any desired material other than diamond substrate, and forming nucleation surface (S NDL ) with higher nucleation density (ND) thereon to a sufficinetly fine area, diamond single crystal can be formed with ease. Of course, as already mentioned, it is possible to form a diamond thin film of a polycrystalline structure with controlled grain size by arranging nucleation surfaces (S NDL ) having fine areas at desired intervals. Also, according to the present invention, as the base substrate, it may be a substrate of the material capable of forming the above nonnucleation surface (S NDS ), and therefore the selection scope can be broadened to a great extent to accomplish low cost and enlargement of area with ease. (2) Growth of tungsten single crystal Tungsten has been known to effect no nucleation on the surface of SiO₂ layer, but to be deposited as a polycrystalline film on Si, WSi₂, PtSi, Al, etc. First, on the substrate such as glass composed mainly of SiO₂, quartz, SiO₂ hot oxide film (all of these form nonnucleation surface (S NDS )), Si, WSi₂, PtSi or Al is deposited by vacuum vapor deposition, and subjected to patterning to a size of several µm or less by photolithography to form a desired number of nucleation surfaces (S NDL ). Subsequently, the above substrate is placed in, for example, a reaction furnace heated to 250 ∼ 500°C, and a gas mixture of WF₆ gas and hydrogen gas is permitted to flow under a reduced pressure of about 0.1 to 10 Torr, at the respective flow rates of 75 cc/min and 10 cc/min. By doing so, tungsten is formed as represented by the reaction scheme WF₆ + 3H₂ → W + 6HF . In this case, the reactivity of tungsten with SiO₂ is extremely low to give no firm bonding, and therefore no nucleation occurs on the SiO₂ surface and hence no deposition is effected. In contrast, on the above nucleation surface (S NDL ) formed on Si, WSi₂, PtSi, Al, etc., single crystal nuclei of tungsten are formed single crystal nuclei of tungsten singly, because nucleation surfaces (S NDL ) are formed finely. And, the single crystal of tungsten continues to grow and also grows as such single crystal also in the lateral direction on SiO₂. This is because nonnucleus growth of tungsten occurs on SiO₂, whereby no polycrystal is formed by interference of single crystal growth. The combination of the nonnucleation surface (S NDS ) forming material, nucleation surface (S NDL ) forming material and crystal forming material as described above is not limited to those shown in the above embodiments, but it may be clearly a combination of materials having sufficient nucleation density difference. Accordingly, also in the case of a compound semiconductor capable of selective nucleation such as GaAs, InP, etc., a single crystal, a group of single crystals or a polycrystal controlled in grain size and grain size distribution can be formed according to the present invention. Example 1 A 5 inch Si single crystal wafer was subjected to heat oxidation treatment to form a SiO₂ layer with a thickness of about 2000 Å on the surface [formation of nonnucleation surface (S NDS )]. The substrate thus obtained was set in a reduced pressure chemical vapor deposition device and Si₃N₄ layer was formed to a thickness of 300 Å on the above SiO₂ layer according to the hot CVD method under the deposition conditions as follows. Pressure 0.3 Torr Gases used SiH₂Cl₂ + NH₃ gas mixture Flow rate ratio NH₃/SiH₂Cl₂ = 6 Temperature 800°C Next, the above Si₃N₄ layer was subjected to patterning according to the X-ray lithographic technique to form a Si₃N₄ fine region for nucleation surfaces (S NDL ) in a matrix arrangement of 50 x 100 with sizes of 1 µm and 150 µm pitch. On the Si single crystal wafer having thus provided nonnucleation surface comprising SiO₂ (S NDS ) and nucleation surfaces (S NDL ) of 50 x 100 comprising Si₃N₄, Si single crystals were grown according to the hot CVD method under the Si single crystal growth conditions shown below. Pressure 150 Torr Gases used SiH₂Cl₂ Flow rate 1.2 liter/min Temperature 1030°C Crystal growth time 40 min The Si single crystal wafer applied with the crystal preparation treatment was taken out from the device, and the crystal was evaluated by observation with an electron miscroscope and X-ray diffraction. As the result, it was found that 50 x 100 Si single crystals with grain size of 80 µm and substantially no grain size distribution were formed with the above Si₃N₄ region as the center. All of these Si single crystals were shown to have single crystal properties of extremely good quality. Example 2 Under the same conditions as in Example 1 except for taking sufficiently the time for growth of Si single crystals, a Si polycrystalline layer comprising the state in which adjacent Si single crystals mutually contact each other as shown in Fig. 9C was formed. On the surface of the polycrystalline layer, smoothening treatment was applied according to the selective etching method as conventionally practiced in the field of semiconductors. By use of the Si polycrystalline layer having thus smoothened surface, P-MOS transistor was prepared according to the method conventionally used in the field of semiconductors and actuation characteristics were measured. As the result, it was found to be by far superior to the case of P-MOS transistor formed by use of the Si polycrystalline layer obtained according to the prior art method. Example 3 When Si single crystal group as shown in Fig. 9D was prepared under the growth conditions of substrate for formation of crystal and the crystal growth conditions shown below, and evaluated in the same manner as in Example 1, the same results as in Example 1 were obtained. [Substrate growth conditions] Substrate Si polycrystalline substrate having SiO₂ layer to a thickness of 2500 Å provided according to the hot CVD method Pressure 0.4 Torr Gases used SiH₂Cl₂ + NH₃ gas mixture Flow rate ratio NH₃/SiH₂Cl₂ = 7 Temperature 950°C Silicon nitride fine region [nucleation surface (S NDL )] 0.5 µm size, 200 µm pitch, 100 x 100 matrix arrangement [Crystal growth conditions] Pressure 120 Torr Gases used SiHCl₃ Flow rate 1.5 liter/min Temperature 1100°C Crystal growth time 60 min [Si single crystal which is grown] Grain size 170 µm Substantially no grain size distribution Example 4 Single crystals of diamond were prepared as described below. A quartz base substrate was prepared, and a thin film of Co was prepared according to the vacuum vapor deposition method by resistance heating to a thickness of 1000 Å. On the Co thin film thus formed, a Si thin film was provided according to the sputtering method to a thickness of 250 Å, and subsequently the Si thin film was subjected to patterning treatment according to the photolithographic method to form a nucleation surface (S NDL ) comprising Si thin film fine region in shape of 100 x 100 matrix with 1 µm size and 100 µm pitch on the Co thin film which is nonnucleation surface (S NDS ) (formation of diamond single crystal substrate). By use of the thus obtained substrate for growth of single crystals, single crystals of diamond were grown according to the microwave plasma CVD method under the following conditions. Microwave output 300 W Substrate temperature 950°C Pressure 30 Torr Starting material used CH₃OH (H₂ bubbling) Flow rate 0.5 liter/min Single crystals of diamond thus obtained had grain size of 60 µm substantially without grain size distribution, having extremely good electrical insulation and excellent thermal conductivity. Example 5 Single crystals of tungsten were grown as described below. A Si single crystal wafer was prepared, and a SiO₂ layer with a thickness of 2000 Å was formed in the same manner as in Example 1 [preparation of nonnucleation surface (S NDS )]. On the SiO₂ layer, an Al thin film with a thickness of 200 Å was provided according to the vacuum vapor deposition method. This Al film was subjected to patterning by photolithography into a matrix of 50 x 50 with 5 µm size and 100 µm pitch [preparation of nucleation surface (S NDL )]. On the thus obtained substrate for preparation of tungsten single crystals, single crystals of tungsten were prepared according to the hot CVD method under the following conditions. As a result, the grain size was 70 µm substantially without grain size distribution. All of the tungsten crystals formed on the substrate exhibited excellent single crystal properties. Pressure 1 Torr Gases used WF₆ + H₂ gas mixture WF₆ flow rate 75 cc/min H₂ flow rate 10 cc/min Crystal preparation time 100 min. As described in detail above, the crystal and the method for formation thereof according to the present invention, by forming sufficiently finely the nucleation surface (S NDL ) of a material with sufficiently greater nucleation density (ND) than the material for formation of nonnucleation surface (S NDS ) so that only a single nucleus may grow, permit single crystals to grow selectively at the sites where the fine nucleation surfaces (S ND ) exist, whereby crystals such as a single crystal with a necessary size, a plurality of island-shaped single crystals, a polycrystal controlled in grain size and grain size distribution, etc., can be formed easily on a base substrate of any desired material. Besides, no special new preparation device is required, but it can be formed by use of a device conventionally used in semiconductor process. Also, the crystal according to the present invention is not limited to the materials of base substrates as in the prior art, and therefore three-dimensional integration, enlargement of area and reduction in cost can be easily accomplished. For example, since a single crystal or polycrystal of silicon which is the main material of semiconductor device can be easily formed on an amorphous insulating material, multi-layer of devices with excellent electrical properties can be accomplished to realize a multi-functional integrated circuit not found in the prior art. More specifically, it becomes possible to integrate or combine an optical device, a surface acoustic device, a piezoelectric device, etc., with the surrounding circuit IC of the respective devices, etc. Also, by use of a cheap glass or ceramic, etc., as the base material, application for a large area electronic device such as a large scale flat panel display in which driving circuits are integrated in a sheet of glass, etc., is rendered possible. Further, the present invention, by forming the above nucleation surfaces (S NDL ) with desired sizes and desired distances on the nonnucleation surface (S NDS ), can form single crystals with necessary sizes on a plural number of sites, and therefore the formation steps can be simplified to a great extent and also the formation time can be shortened as compared with the melting solidification method in which single crystals are formed by irradiation of laser or electron beam. Also, by controlling the intervals of the nucleation surfaces (S NDL ) formed on the above non-nucleation surfaces (S NDS ), a polycrystal controlled in grain size by the intervals can be formed. In this polycrystal formation method, controllability of grain size and grain size distribution is good and the formation time can be also shortened to a great extent as compared with the method of the prior art for forming a polycrystal with a large grain size according to the above melting solidification method.

Claims: A method of deposition for producing on the surface of a substrate one or more single crystals of a crystal forming material, which method comprises: establishing at a free surface of said substrate one or more deposition surface areas (S NDL ) having under chosen conditions of deposition a property of nucleating said crystal forming material at a higher nucleation density than that of the adjacent deposition surface area (S NDS ), each of said one or more deposition surface areas (S NDL ) being limited in size so that during an initial stage of the deposition each shall support the formation of a single nucleus only of the crystal forming material; depositing crystal forming material on the free surface of said substrate under said chosen conditions of deposition, these conditions being such that said crystal forming material nucleates selectively on said one or more deposition surface areas (S NDL ) and forms on each a single nucleus of a supra-critical size; and upon further deposition of said crystal forming material, epitaxially growing a single crystal from each said single nucleus; which method does not include: establishing said one or more deposition-surfaces (S NDL ) either by imprinting a nucleation agent on the surface of said substrate or by producing selective damage by indentation using a tipped tool; nor does said method include: depositing crystal forming material selectively on one or more damaged areas of the surface of the substrate, which areas are produced by irradiation with a directed beam of electrons or other beam of concentrated energy. A method as claimed in claim 1, wherein the step of establishing said one or more deposition surface areas (S NDL ) is performed by: (a) depositing on the surface of said substrate a layer of material for producing said one or more deposition surface areas (S NDL ) and subsequently patterning said layer lithographically to produce said deposition surface areas (S NDL ) of limited size; or (b) changing the material composition of said substrate at one or more deposition surface areas (S NDL ) of the free surface by ion implantation using either ion injection through a patterned resist mask or a directed ion beam. A method as claimed in claim 2, wherein said one or more deposition surface areas (S NDL ) are of silicon ion implanted silicon oxide (Si0₂) amorphous material. A method as claimed in claim 2, wherein said crystal forming material is silicon, said one or more deposition surface areas (S NDL ) are of polycrystalline silicon material, and said adjacent deposition surface area is of silicon oxide (Si0₂). A method as claimed in any of the preceding claims, wherein said depositing and said further deposition of said crystal forming material are both performed by vapour deposition. A method as claimed in claim 5 wherein said adjacent deposition surface area is of silicon oxide (Si0₂) and said vapour deposition is assisted by HCl vapour. A method as claimed in claim 1 wherein said substrate includes a surface layer of material that is different in composition from the material of the body of the substrate. A method as claimed in any preceding claim in which a plurality of said deposition surface areas (S NDL ) are established and said further deposition of said crystal forming material is continued at least until respective single crystals touch and form a polycrystalline film. A method as claimed in claim 8, wherein said deposition surface areas (S NDL ) are spaced regularly and a polycrystalline film of predetermined grain size is grown. A method as claimed in either of claims 8 or 9, wherein, following formation of said polycrystalline film, material is removed at each grain boundary and a plurality of spaced single crystal film islands is produced. A method as claimed in any preceding claim 1-7 in which the substrate is recessed, said one or more deposition surface areas (S NDL ) are established each at the foot of a respective recess, and said further deposition of crystal forming material is continued until each respective recess is filled. A method as claimed in any one of the preceding claims, wherein said substrate includes one or more buried devices. A method as claimed in claim 12, wherein said step of growing single crystal is followed by production of one or more devices. A method as claimed in claim 13, when followed by production of a silicon oxide Si0₂ covering layer and a repeat of said method so as to produce devices stacked at a multiplicity of levels. A method as claimed in claim 1, wherein: said crystal-forming material is silicon; each of said one or more deposition surface areas (S NDL ) is an area of silicon nitride (Si₃N₄); and said adjacent deposition surface area (S NDS ) is an area of silicon oxide (SiO₂). A method as claimed in claim 1, wherein: said crystal-forming material is silicon; each of said one or more deposition surface areas (S NDL ) is an area of non-stoichiometric silicon nitride (Si x N 1-x ); and said adjacent deposition surface area (S NDS ) is an area of silicon oxide (SiO₂). A method as claimed in claim 1, wherein: said crystal-forming material is silicon; each of said one or more deposition surface areas (S NDL ) is an area of silicon nitride (Si₃N₄); and said adjacent deposition surface area (S NDS ) is an area of a silicon oxide (SiO x : O < x < 2). A method as claimed in claim 1, wherein: said crystal-forming material is silicon; each of said one or more deposition surface areas (S NDL ) is an area of silicon oxide and dopant ions selected from any of: silicon (Si); nitrogen (N); phosphorous (P); boron (B); fluorine (F); argon (Ar); helium (He); carbon (C); arsenide (As); gallium (Ga); or germanium (Ge) are included therein; and said adjacent deposition surface area (S NDS ) is an area of silicon oxide (SiO₂). A method as claimed in claim 1, wherein: said crystal-forming material is tungsten (W); each of said one or more deposition surface areas (S NDL ) is an area of silicon (Si), gallium arsenide (GaAs), silicon nitride (Si₃N₄), tungsten silicide (WSi₂), platinum silicide (PtSi) or aluminium (Al); and said adjacent deposition surface area (S NDS ) is an area of silicon oxide (SiO₂). A method as claimed in claim 1, wherein: said crystal-forming material is gallium arsenide; each of said one or more deposition surface areas (S NDL ) is an area of silicon (Si) or silicon nitride (Si₃N₄); and said adjacent deposition surface areas (S NDS ) is an area of silicon oxide (SiO₂). A method as claimed in claim 1, wherein: said crystal-forming material is indium phosphide (InP); each of said one or more deposition surface areas (S NDL ) is an area of silicon (Si), gallium arsenide (GaAs), or silicon nitride (Si₃N₄); and said adjacent deposition surface area (S NDS ) is an area of silicon oxide (SiO₂). A method as claimed in claim 1, wherein: said crystal-forming material is diamond carbon; each of said one or more deposition surface areas (S NDL ) is an area of copper (Cu), tungsten (W), tantalum (Ta), molybdenum (Mo), gold (Au), titanium (Ti), aluminium (Al) or nickel (Ni); and said adjacent deposition surface area (S NDS ) is an area of iron (Fe) or cobalt (Co). A method as claimed in claim 1, wherein: said crystal-forming material is diamond carbon; each of said one or more deposition surface areas (S NDL ) is an area of silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP) or silicon carbide (SiC); and said adjacent deposition surface area (S NDS ) is an area of iron (Fe) or cobalt (Co), A method as claimed in claim 1, wherein said crystal-forming material is silicon, and each of said one or more deposition surface areas (S NDL ) is an area of tantalum oxide or silicon nitride oxide. A method as claimed in claim 1 wherein said adjacent deposition surface area (S NDS ) is an area of amorphous insulating material.

Inventors: NARUSE YASUHIRO, YONEHARA TAKAO, NARUSE, YASUHIRO, YONEHARA, TAKAO
Applicants: CANON KK, CANON KABUSHIKI KAISHA
Application year: 1987
Main classification: C30B25
IPC codes: H01L21, C30B23, H01L29, C30B25