ROTATING SIGNAL GENERATOR APPARATUS

Abstract: A signal whose frequency is proportional to a rotational speed of a rotor (110) and whose rising and falling angles near points crossing zero becomes larger with the rotational speed of the rotor is used to produce a first signal (V1) of amplitude corresponding to the rising and falling angles and a second signal (V2) of amplitude corresponding to the fre­ quency, a difference between the first and second signals is evaluated, and the first and second signals (V1, V2) are cor­ rected with the difference.

Description: FIELD OF THE INVENTION: The present invention relates to a rotating signal generator apparatus having a signal generator such as sine encoder for producing a signal whose frequency is proportional to the rotational speed of a rotor and whose rising and falling angles near points crossing zero become larger with the rotating speed of the rotor. The apparatus generates the rotating signal of the rotational speed, the rotational position or the like. DESCRIPTION OF THE PRIOR ART: It has been proposed in the official gazette of Japanese Patent Application Laid-open No. 57-175259 that an angle signal comparator for producing a first signal of amplitude corresponding to the rising and falling angles of the output of the signal generator as stated above, and a frequency comparator for producing a second signal of amplitude corresponding to the frequency of the output of the signal generator are provided to derive the rotating signal of the rotor by using the first signal in a low speed range and the second signal in a high speed range. As shown in Fig. 2, the magnitude of the first signal exhibits a characteristic in which it is properly proportional to the rotational frequency of the rotor in the low speed range, but it becomes unproportional in the high speed range. To the contrary, the magnitude of the second signal is properly proportional in the high speed range but is unproportional in the low speed range as illustrated in Fig. 3. Accordingly, it is very effective for generating the rotating signal that the first and second signals are switched midway and then used as disclosed in the official gazette of Japanese Patent Application Laid-open No. 57-175259. With the prior-art apparatus, however, there has been the problem that in switching the first signal to the second signal or vice versa, the rotating signal generator apparatus does not produce its output signal though for a slight time. It is of course possible to incorporate a capacitor for the purpose of sustaining the signal at the switching. This measure, however, worsens a quick response characteristic undesirably. SUMMARY OF THE INVENTION: The present invention has been made in view of such drawbacks, and has for its object to provide a rotating signal generator apparatus which can generate a rotating signal of excellent characteristics without discontinuing its output signal over a range from a low speed range to a high speed range. The present invention consists in disposing a calculator and a corrector in addition to a signal generator, an angle signal comparator and a frequency signal comparator. The calculator calculates the difference between a first signal and a second signal, and the corrector corrects the first signal or the second signal with the output of the calculator. As stated before, the first signal being the output of the angle signal comparator is properly proportional to the speed of the rotor in the low speed range, but the rate at which the signal increases relative to the increase of the rotational speed diminishes in the high speed range. Contrariwise, the second signal being the output of the frequency signal comparator is properly proportional in the high speed range, but it exhibits only values smaller than on a proportionality line in the low speed range. Accordingly, the second signal becomes smaller than the first signal in the low speed range, and the second signal becomes larger than the first signal in the high speed range. Therefore, a point P at which the first signal and the second signal intersect arises as shown in Fig. 5. Now, letting V₁ denote the first signal and V₂ denote the second signal, the following is calculated by the calculator: V₃ = V₁ - V₂ When the calculated value is minus, V f = V₁ - V₃ is found. Then, V f = V₂ holds. Accordingly, the signal V₁ left intact is delivered in a range of lower speeds with respect to the point P, and the component V₃ is corrected for the signal V₁ at higher speeds with respect to the point P, whereby the rotating signal of characteristic superior to the characteristic curve of V₁ or V₂ alone can be generated. Moreover, since the combined characteristic curve is obtained on the basis of the characteristic curve V₁ in both the higher speed range and the lower speed range with respect to the point P, the signal can be produced continuously. Besides, when the value of Eq. (1) is plus, V f ′ = V₂ + V₃ is found. Then, V f ′ = V₁ holds. Accordingly, the signal V₂ left intact is delivered in the higher speed range with respect to the point P, and the component V₃ is corrected for the signal V₂ at the lower speeds with respect to the point P, whereby the rotating signal of characteristic superior to the characteristic curve of V₁ or V₂ alone can be generated. Moreover, since the combined characteristic curve is obtained on the basis of the characteristic curve V₂ in both the higher speed range and the lower speed range with respect to the point P, the signal can be produced continuously. BRIEF DESCRIPTION OF THE DRAWINGS: Fig. 1 is a block diagram showing an embodiment of a generator apparatus according to the present invention. Figs. 2 - 4 and Figs. 6 - 7 are diagrams showing the input/output characteristics of individual elements in Fig. 1. Fig. 5 is a diagram showing the input/output characteristic of the whole apparatus in Fig. 1. Fig. 8 is a diagram of an input/output characteristic in a case different from Fig. 5. Fig. 9 is a block diagram showing another embodiment of the present invention. Figs. 10(a) - 10(d) are time charts showing the transient states of a high speed range. Fig. 11 is a circuit diagram showing a practicable example of an angle signal comparator. Fig. 12 is a time chart showing the operations of the circuit illustrated in Fig. 11. Figs. 13 and 14 are circuit diagrams principally showing practicable examples of a frequency signal comparator and a corrector, respectively. Figs. 15 and 16 are diagrams of the input/output characteristics of a limiter signal generator and a correct limiter, respectively. DESCRIPTION OF THE PREFERRED EMBODIMENTS: Now, an embodiment of the present invention will be described with reference to Fig. 1. The signals of a signal generator 100 which generates the "A" phase and "B" phase of sine waveform having almost equal amplitudes and having a phase difference of 90 ° therebetween, owing to the rotation of a rotor 110 as in an electric motor, are differentiated by an angle signal comparator 1. The differential waveforms of the "A" phase and the "B" phase near points crossing zero are switched to deliver a first signal V₁ which is plus for the positive direction rotation of the rotor and minus for the negative direction rotation. Meanwhile, the "A" phase and the "B" phase have the sine waveforms converted into rectangular waves by a waveform shaper 2, whereupon a second signal V₂ which is a plus voltage for the positive direction rotation and a minus voltage for the negative direction rotation is delivered by an F/V (frequency/voltage) comparator 3. That is, a frequency signal comparator 101 is constructed of the waveform shaper 2 and the F/V comparator 3. The first signal V₁ has its linearity worsened by the degradations of the frequency characteristics of the "A" and "B" phases in a high speed range as illustrated in Fig. 2. The second signal V₂ has its pulse intervals lengthened at low speeds and therefore has its ripple increased, and it finally fails to be produced as illustrated by a characteristic in Fig. 3. As regards both the first and second signals V₁ and V₂, V₁ - V₂ is calculated by a calculator 4, and a signal 3 having a characteristic in Fig. 6 is delivered. Since a first order lag circuit 5 has a gain of unity in the steady state thereof, the output V₄ thereof becomes V₃ = V₄ in the steady state, and this output has the maximum value limited by a correct limiter 6. A limiter signal generator 8 produces a limiter signal V₆ in Fig. 4 on the basis of the output V₂ of the F/V comparator 3, so that the output signal V₅ of the correct limiter 6 is limited to zero at the low speeds. Therefore, the characteristic in Fig. 6 changes as shown in Fig. 7. This signal V₅ is subtracted as a velocity feedback signal V f = V₁ - V₅ by a subtraction circuit 7. In this embodiment, a corrector 102 is constructed of the correct limiter 6, the limiter signal generator 8 and the subtraction circuit 7. Since the signal V₅ is a minus voltage in Fig. 7, the subtraction circuit results in adding the absolute value V₅ to the voltage V₁, and the velocity feedback signal of good linearity is obtained as shown at V f in Fig. 5. As thus far described, at the low speeds, the output of the calculator 4 is limited to zero by the correct limiter 6, and hence, the velocity feedback signal based on the gradient differential system is generated. On the other hand, in the high speed range, the calculator output is not limited by the correct limiter 6. Therefore, V₅ = V₁ - V₂ (only in the steady state at the high speeds) holds, and the velocity feedback signal becomes V f = V₁ - V₅ = V₂, so that the output of the F/V system is generated. Fig. 9 shows an embodiment in which the signal of the limiter signal generator 8 in Fig. 1 is detected from the output signal V₁ of the angle signal comparator 1, and the operation of which is basically the same as in Fig. 1. Next, Fig. 10(a) is a diagram in the case where the actual rotational frequency N of the rotor 110 has abruptly risen from a medium speed to a high speed. In this case, the first signal V₁ responds immediately as shown in Fig. 10(b), but the second signal V₂ undergoes a considerable delay as shown in the same figure. However, in a case where the speed N does not change abruptly, the second signal V₂ based on the F/V system affords a preciser value rather than the first signal V₁. The output V₃ of the calculator 4 becomes as shown in Fig. 10(c), and it is changed as shown at V₄ in Fig. 10(c) by the first order lag circuit 5. Since the signal V₄ corresponds to the high speed state, it is not affected by the correct limiter 6 and is subtracted directly as V₅ = V₄ by the subtraction circuit 7. Then, it becomes as indicated by a solid line V f in Fig. 10(d). As seen from these situations, by constructing the first order lag circuit 5 in the high speed range, the output V f becomes quicker than the response of the second signal V₂ of the F/V system, and the response of the detector circuit is improved. Now, practicable embodiments of the block diagram in Fig. 1 will be described in conjunction with Fig. 11, Fig. 13 and Fig. 14. First, the practicable embodiment of the angle signal comparator 1 will be described. The circuit example thereof is shown in Fig. 11, while the time chart thereof is shown in Fig. 12. In Fig. 11, numerals 111 and 112 indicate NOT circuits, numeral 113 a first switch control signal generator, numeral 114 a second switch control signal generator, numeral 115 "A" phase analog switches, numeral 116 "B" phase analog switches, numerals 117 and 118 differentiation circuits, numeral 119 slit removing analog switches, numeral 120 a NOT amplifier circuit, and numeral 121 a NOT amplifier circuit for adjusting a sign. Regarding the "A" phase signal, the "A" phase signal A and the inverted "A" phase signal A are received through the analog switches 115, and the parts of the signals A and A having the same gradient are taken out. The output of the analog switches 115 becomes an "A" phase gradient signal AA shown in Fig. 12. Regarding the "B" phase, likewise to the "A" phase, the "B" phase signal B and the inverted "B" phase signal B are received through the analog switches 116, and the parts of the signals B and B having the same gradient are taken out. The output of the analog switches 116 becomes a "B" phase gradient signal BB shown in Fig. 12. In order to detect the speed, the gradient signals AA and BB of the "A" and "B" phases are differentiated by the respective differentiation circuits 117 and 118 each being constructed of a capacitor and a resistor. The outputs of the respective differentiation circuits 117 and 118 are differential signals dAA and dBB shown in Fig. 12. These signals dAA and dBB are formed with slits as illustrated. In order to eliminate the slits, therefore, only parts of 90 ° near the peaks of the respective differential signals dBB and dAA are derived through the slit removing analog switches 119 and are combined. The combined signal is amplified by the NOT circuit 120, to obtain a speed detection signal E o . The NOT circuit 121 serves to deliver the first signal V₁ which is the plus output for the positive direction rotation and the minus output for the negative direction rotation. The control of the "A" phase analog switches 115 is performed with the output signals SF and SF of the first switch control signal generator 113. These output signals SF and SF are produced by comparing the "B" phase signal B and the inverted "B" phase signal B . Besides, the control of the "B" phase analog switches 116 is performed with the output signals SE and SE of the first switch control signal generator 113. These output signals SE and SE are produced by comparing the "A" phase signal A and the inverted "A" phase signal A . Further, the slit removing analog switches 119 for eliminating the slits are controlled with the output signals SG and SG of the second switch control signal generator 114. The signal SG is obtained by comparing the "A" phase signal A with the "B" phase signal B and also comparing the "A" phase signal A with the inverted "B" phase signal B and then taking the exclusive OR of the comparison outputs. Fig. 13 shows the practicable embodiment of the waveform shaper 2 as well as the F/V comparator 3 in Fig. 1. It is as stated before that the frequency signal comparator 101 is constructed of the waveform shaper 2 and the F/V comparator 3. The "A" phase and "B" phase of sine waveform with the phase difference of 90 ° as produced from the signal generator 100 are respectively passed through filters R₁, C₁ and R₂, C₂, whereupon the passed signals are converted into the rectangular waves having the phase difference of 90 ° by means of hysteresis comparators CP₁, CP₂ and resistors R₃ - R₈. The rectangular waves are passed through an exclusive OR gate IC₂ to double the pulse frequency, and the resulting signal is applied to an F/V converter IC₁. This F/V converter detects the falls of the input pulses when the pulses exceed an input threshold voltage of -0.6 V, and it supplies a pin 13 with a voltage proportional to an input frequency. A capacitor C₃ and resistors R₉, R₁₀ configure a differentiation circuit so as to pass the input pulses through the threshold voltage of -0.6 V. The gain of the F/V converter IC₁ is determined by a resistor R₁₁, and the filter time constant thereof by the resistor R₁₁ and a capacitor C₅. Therefore, the capacitance of the capacitor C₅ is enlarged for reducing the ripple of the output. This measure, however, worsens the responsiveness. A capacitor C₄ determines the pulse width of a one-shot multivibrator which produces a pulse of the fixed width synchronous with the fall input of the F/V converter. The output of the F/V converter is delivered as an absolute value in the plus sign. Therefore, analog switches employing field effect transistors FET₁ - FET₃, and resistors R₂₀ - R₂₃ are disposed on the input side of an operational amplifier OP₁, whereupon for the positive direction rotation, the amplifier OP₁ is operated as an inverting amplifier by turning "on" the transistor FET₁ and "off" the transistors FET₂ and FET₃, and for the negative direction rotation, the amplifier OP₁ is operated as a non-inverting amplifier by turning "off" the transistor FET₁ and "on" the transistors FET₂ and FET₃. Thus, the F/V comparator 3 with the polarity which renders the output V₂ a minus voltage for the positive direction rotation and a plus voltage for the negative direction rotation is constructed. In addition, a zero-crossing comparator CP₃ detects the rotating direction from the first signal V₁ which is the output of the angle signal comparator 1 based on the gradient differentiation. The detected signal has its level changed by resistors R₁₂, R₁₃, a diode D₁ and a transistor Q₁, and the resulting signal is applied to an inverter gate IC₃ and then to an inverter gate IC₄ so as to operate the switches FET₁ - FET₃. Subsequently, the second signal V₂ being the output of the F/V comparator 3 has its difference voltage from the first signal V₁ being the output of the angle signal comparator 1 detected by an amplifier OP₅₁ and resistors R₅₁ - R₅₄ which constitute the calculator 4 shown in Fig. 14. A capacitor CT indicated by a broken line between the output of the amplifier OP₅₁ and the minus input terminal thereof functions as the first order lag circuit shown in Fig. 1. The first order lag is not formed when the capacitor CT is detached, and the first order lag circuit is established by adding the capacitor CT. Since the F/V converter IC₁ in Fig. 13 delivers the output of the plus absolute value, the limiter signal generator 8 is configured as a circuit which receives this output signal V₂₁ at the pin 13 and which affords a dead band near the zero input as shown in Fig. 15 by means of an amplifier OP₅₂, resistors R₅₅ - R₅₈ and diodes D₅₃, D₅₄. In Fig. 15, a value V 21x can be adjusted by a variable resistor VR₅₁ in Fig. 14, and it determines the point of time at which the correction of the first signal V₁ with the output of the calculator 4 is started. The variable resistor may well be replaced with resistors for voltage division. The reason why the output V₆ remains unchanged when the input V₂₁ in Fig. 15 is great, is that the amplifier OP₅₂ is saturated. This signal V₆ limits the output of the difference voltage detector 4 in the correct limiter 6. As shown in Fig. 14, the signal V₆ provides a signal V₆₁ to serve as the minus side limiter signal of the output voltage V₃ of the amplifier OP₅₁ and a signal V₆₂ to serve as the plus side limiter signal thereof by means of NOT amplifier circuits OP₅₃, OP₅₄ and resistors R₅₉ - R₆₄. Resistors R₆₅ - R₆₈ for dividing the limiter signals and the output signal V₃ of the calculator 4, and diodes D₅₁, D₅₂ are connected. Thus, an incomplete limiter circuit is constructed. By way of example, when the signal V₃ has gradually increased on the minus side, the divided voltage of the node of the resistors R₆₅ and R₆₆ between the signal V₃ and the signal V₆₁ changes gradually from a plus voltage toward zero. When the divided voltage shifts from zero to a minus voltage, the diode D₅₁ turns "on," and current having flowed through the resistor R₅₄ of the amplifier OP₅₁ till then flows to the diode D₅₁. Therefore, the output V₃ can no longer rise, and the limiter operation is effected. However, the limiter circuit configured of the elements D₅₁, D₅₂ and R₆₅ - R₆₈ is not a complete limiter circuit, but its output rises slightly beyond the limit point. In order to form the complete limiter, therefore, a limiter correction circuit is constructed of amplifiers OP₅₅, OP₅₆, resistors R₆₉ - R₇₆ and diodes D₅₅ - D₅₈. That is, the limiter correction circuit is a circuit for canceling out the component having risen beyond the limit point on account of the signals V₆₁ and V₃ and the component having risen beyond the limit point on account of the signals V₆₂ and V₃. The signal V₅ in Fig. 1 is indicated by a sum V₃ + V₆₃ + V₆₄ in Fig. 14. The first signal V₁ being the output of the angle signal comparator 1 is subtracted by element OP₅₇ and R₇₇ - R₈₂ through a resistor R₈₀, whereupon the output V f is delivered. These operations of the whole apparatus are as already described with reference to Figs. 1 - 8. The present invention is not restricted to the foregoing embodiments, but various alterations are possible. For example, in a case where the rotating direction need not be detected, a device which generates a signal in a single phase can be used as the signal generator. A device which generates signals in three phases can, of course, be used. In this case, the detection of the rotating direction is naturally easy. Besides, in the illustrated embodiments, the case employing the limiter 6 has been explained. However, when unidirectional conduction means 140 is connected as indicated by broken lines in Fig. 1 instead of the limiter 6, the first signal V₁ left intact is delivered as the output V f in the low speed range in which the signal V₃ is plus, and the first signal V₁ is corrected with the signal V₃ in the high speed range in which the signal V₃ is minus, namely, in the range in which the first signal V₁ becomes unproportional to the rotational frequency.

Claims: 1. A rotating signal generator apparatus which generates a signal (Vf) corresponding to a rotation of a rotor (110), comprising: a signal generator (100) which delivers a sinusoidal wave at a frequency corresponding to a rotational speed of a rotor (110), an angle signal comparator (1) which delivers a first signal (V1) at an amplitude corresponding to an angle of at least one of rise and fall of the sinusoidal wave, a frequency signal comparator (3) which delivers a second signal (V2) at an amplitude corresponding to the frequency of said signal generator, a calculator (4) which calculates a difference between the first signal and the second signal, and a corrector (102) which corrects the first signal (V1) and/or the second signal (V2) with the output of said calculator (4). 2. A rotating signal generator apparatus as defined in claim 1, wherein said signal generator delivers signals in at least two phases which produce different patterns in correspondence with rotating directions of the rotor. 3. A rotating signal generator apparatus as defined in claim 1, wherein said corrector (102) corrects the first signal (V1) with the output of said calculator only in a range in which the first signal (V1) or the second signal (V2) is above a fixed value. 4. A rotating signal generator apparatus as defined in claim 1, wherein said corrector (102) corrects the first signal (V1) with the output of said calculator (4) only when the second signal is greater than the first signal. 5. A rotating signal generator apparatus as defined in claim 1, wherein said corrector (102) corrects the second signal with the output of said calculator (4) only in a range in which the first signal (V1) or the second signal (V2) is below a fixed value. 6. A rotating signal generator apparatus as defined in claim 1, wherein said signal generator (100) delivers a signal of substantially constant amplitude irrespective of a rotational speed of the rotor (110). 7. A rotating signal generator apparatus which generates an analog signal (Vf) corresponding to a rotational speed of a rotor (110), comprising: a signal generator (100) which delivers a signal whose frequency is proportional to the rotational speed of the rotor and whose rising and falling angles near points crossing zero becomes greater with the rotational speed of the rotor, an angle signal comparator (1) which delivers a first signal (V1) at an amplitude corresponding to at least one of the rising and falling angles, a frequency signal comparator (3) which delivers a second signal (V2) at an amplitude corresponding to the frequency of said signal generator (100), a calculator (4) which calculates a difference between the first signal and the second signal, and a corrector (102) which corrects the first signal (V1) and/or the second signal (V2) with the output of said calculator (4) and which delivers the analog signal (Vf) substantially proportional to the rotational speed of the rotor.

Inventors: KOBAYASHI, SUMIO, OKAWA, TADASHI, SUGAI, HIROMI, TOKASHIKI, MUTSUO, TOMITA, HIROYUKI
Applicants: HITACHI, LTD.
Application year: 1987
Main classification: G01P3
IPC codes: G01P3