Method for controlling data transfer buffer

Abstract: In a data processing system in which data is transferred between memory areas (A, B, C, D, E) through a transfer buffer (58) shared by the memory areas, receive capability indication means (59) which is commonly accessable by the memory areas and contains information indicating whether data can be transferred to the respective memory areas or not is provided, and data to be transferred from one memory area to other memory area is stored in the transfer buffer in accordance with the content of the receive capability indicator.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a method for controlling the data transfer in a data processing system with a data transfer buffer for storing data when a capacity of a receive buffer is limited. Description of the Prior Art In a computer sytem, a memory area called a user space is allocated to each of a plurality of user programs in a main memory. When data is to be transferred between those spaces, transfer data is stored, under a control of the user program of a transferring location, to a transfer buffer in a memory area to be commonly accessed by the user programs, and the data in the transfer buffer is received, under a control of a user program of a destination location, by a memory area to which the user program of the destination area belongs. In the prior art system, sufficient consideration was not paid for a capability of reception at the destination space, and the transfer data is stored in the transfer buffer area in response to a transfer request irrespective of whether the destination space is ready to receive the data or not, and the information is enqueued to a transfer queue which manage readout of the stored data. As a result, if the destination station is not ready to receive the information, the information is held in the transfer buffer area. Thus, if a large amount of data is transferred between spaces, the information may be held for a long time. JP-A-58-1222 shows an input/output controller, a main storage and data buffers. The data in the data buffer is transmitted to the input/output controller or the main storage. In this document, however, no provision of a processor control for the execution of the data transfer between the input/output controller and the main storage is made. Accordingly, a large capacity data buffer is necessary and the same is shared for a plurality of times for the data transfer. Hence, the most portions of the buffer area may be occupied by the data in certain probability. Then, the request for data transfer is rejected. SUMMARY OF THE INVENTION It is an object of the present invention to transfer data while preventing data from being held in a transfer buffer area. The object is solved according to the features of the independent claim 1. The dependent claims show advan tageous embodiments and further developments of the invention. In accordance with the present invention, indication means for indicating a status of a receive buffer in each space is arranged in a common area to the system. The information of the display unit is referenced by the transfer location so that it grasps the status of the receive buffer at the destination location. Thus, whether the destination station may immediately receive the data or not is checked, and if it may receive, the transfer data is sent to the transfer buffer. The transfer location determines the amount of data receivable by the destination location and sends that amount of data. Thus, the transfer of an amount of data not receivable by the destination station into the buffer is prevented. By queuing a transfer request on FIFO basis on each space to which the request was issued, separately from the transfer processing, the transfer may be suspended until it is permitted, without any special processing. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows an overall configuration of an electronic computer system to which the present invention is applied, Fig. 2 shows a configuration in a central processing unit, Fig. 3 shows a format of a table and a buffer area in each user area in one embodiment of the present invention, Fig. 4 shows a format of a table in a common area and a transfer buffer, Fig. 5 shows a transmit flow chart in a transfer execution program, and Fig. 6 shows a receive flow chart in the transfer execution program. DESCRIPTION OF THE PREFERRED EMBODIMENTS Fig. 1 shows an overall configuration of an electronic computer system to which the present invention is applied. It comprises a central processing unit 1, a communication control unit 2, terminal control units 3 and 4 connected thereto through lines 11 and 12, respectively, terminal devices 5, 6, 7 and 8 connected thereto, a communication control unit 9 connected to the communication control unit 2 through a line 13, and a central processing unit 10 connected thereto. The communication control unit 9 is also connected to the terminal control units 3 and 4 through lines 14 and 15, respectively. In the electronic computer system thus configured, one embodiment of the present invention in which information is transferred between spaces in each of the central processing units in accordance with a request from or to the terminal device or central processing unit in the network, is explained with reference to Fig. 2. A, B, D and E in the central processing unit 1 denote memory spaces in user programs, and C denotes a common area shared by those spaces. Information is transferred between the spaces through the common area C. A detailed configuration of the memory space A is shown in Fig. 2. The memory spaces B, D and E are configured in the same way. In order to identify the elements in the memory space A, the reference numerals are followed by "A". Assuming that a request to transfer information in the space A to the space B has been issued, a transfer request program 57A registers the request into a transfer queue 51A by an enqueue command. The transfer request program 57A examines a destination, puts together information to be transferred to the same destination to prepare a queue, and sends a start signal to a transfer execution program 52A. Then, they are dequeued from the transfer request queues on first-in first-out basis. The dequeued information is checked. That is, receive buffer counters 62 for the respective spaces and the common buffer counter 59 in the common buffer area C are checked. The counter 62B which retains a count to indicate the number of receivable buffer areas each having the same size in the receive buffer 63B in the destination space is examined. If the count of the counter 62B is "0", the transfer is stopped and the previous dequeue command is cancelled. Accordingly, the transfer request is retained in the queue 51A. On the other hand, if the count of the counter 62B is not "0", it means that the information may be transferred, and the counter is decremented by one. The transfer common buffer pool 60 has a buffer divided into areas of the same size. A counter 59 which counts the number of free buffers which are not being used by others is examined. If the count of the counter 59 is "0", the dequeue command is cancelled. If the count of the counter 59 is not "0", one buffer area is allocated as a transfer buffer, the counter 59 is decreased by one, and the transfer information is copied into the secured transfer buffer 60. Thereafter, the transfer buffer is enqueued in the transfer queue. In the transfer queue 61, addresses indicating the areas of the buffer 60 are chained for each address in the sequence of occurrence. That is, they are queued for each destination, like the transfer request queue 51A. A start signal is sent to the transfer execution unit 52B of the destination space to start 52B. The reception of data is now explained. The transfer queue/dequeue unit 55B in the started 52B dequeues a head of the transfer queue to itself from the transfer queue 61 on a first-in first-out basis. The dequeued information is sent to the receive unit 56B and the content thereof is copied into the receive buffer 63B. Upon end of copying, the transfer buffer is vacant. The counter 59 is incremented by "1" and the transfer operation is terminated. The receive buffer 63B is released after required processing in the space B. When it is released, the counter 62B is incremented by one. A detail of the transfer operation in the present embodiment is explained with reference to a flow chart and a table format. Fig. 3 shows a detail of a table prepared in each user space. A space control table 31 is prepared in each space. It contains a transfer information queue pointer 33 which points a start point of a transfer queue header list 35 for each space, and a transfer information queue pointer 34 which points an end point. The entry of the transfer queue header list 35 is provided for each destination space. If no information transfer request has been issued in the space, the header list 35 thereof is all-zeros. As many header lists 35 as a maximum number (36) of spaces permitted to exist in the system are provided. The transmit buffer 39 stores the transmit data generated by executing the user program. The transmit buffer 39 is prepared by allocating memory areas by a conventional control table. The transmit information control table 37 is prepared when the transmit data is stored in the transmit buffer. A predetermined number of receive buffer 311 are provided in the user space. If data is stored therein, a receive information control table 310 is prepared and it is accessable by a space control table 31. Fig. 4 shows a detail of the table prepared in the common area for use in the check. As many space control tables 403 as a maximum number of spaces permitted to exist in the system when the system was structured, and they control the number of destination receive buffers. One control table is allotted for each space newly established. The common area space control table 403 contains the number 412 of operable receive buffers 311 which are present in the assigned space. A predetermined number of transfer buffers 407 are provided. A size of one plane of the transfer buffer 407 is equal to that of the receive buffer 311 in the user space. Thus, information copied on one plane of the transfer buffer 407 in the common area can be copied onto one plane of the receive buffer 311. Processing for transferring data from one user space to other user space is explained. When a transfer request is issued from the user program, a transfer request processing program prepares a transmit information control table 37 in which a destination space name is registered and which has a buffer pointer to point a transmit buffer in which the transfer data is to be stored. Then, the destination space 38 is read from the transmit information control table 37 and the transmit information control table 37 is enqueued into a corresponding queue header of the transfer queue header list 35 in accordance with the content of the destination space 38. As the transfer request processing program has enqueued the transmit request control table 37 into the transfer queue header list 35, it sends a start signal to the transfer execution program of Fig. 5. The transfer execution program of Fig. 5 dequeues the transmit information control table queued in the transfer queue header pointed by the space control table 31, from the start point 33 of the header on first-in first-out basis (101). Before the table is dequeued from the chain, the following check is carried out. The transfer execution program first obtains a pointer for the common area space control table 403 from the system control table 401 in the common area. Then, it obtains the number 412 of operable receive buffers 412 in the receive space from the common area space control table 403. The number of planes of the receive buffer prepared for the space has been set when the system was structured. If there are 20 planes in receive buffer in the space, the number 412 is 20. If the number is not zero (YES in 102), it means that the buffer which is usable as a receive buffer still remains in the space. In order to reserve that receive buffer, the entry is decremented by one (103). Thus, the number of usable receive buffers is decremented by one and one plane of receive buffer in the space is reserved. If the number is zero, it means that no information can be transferred to that space. Thus, the transfer execution ceases the transfer to the space pointed by the transfer queue header list 35 in the space (108), and updates the pointer to the next space (109). As a result, the transfer execution program is resumed for the next space rather than the previous space. The transfer request issued to the previous space is chained in the transfer queue header list without being dequeued. If one plane of the receive buffer has been successfully secured by the check of the number of usable receive buffers by the transfer execution program, then the number 410 of usable buffers in a base portion of the buffer pool 406 in the common area is checked (104). If the entry is not zero, it means that an area usable as a transfer buffer still reamins in the common area, and one plane is secured from a free queue pointed by the usable buffer pointer 409 and the number of usable buffers is decremented by one (105). The number 410 of usable buffers corresponds to the number of planes of the buffers prepared in the common area when the system is structured. If there are ten planes in the transfer buffers prepared in the common area, the number 410 is ten. If the number is zero, the transfer is ceased as is done for the check of the number 412 of usable receive buffers of the common area space control table 403. In order to release the receive buffer in the receive space which has already been reserved, the number 412 of usable receive buffers 412 of the common area space control table 403 is incremented by one (110). The transfer execution program ceases the execution while it chains all transfer requests in the transfer queue header list 35 (111). After the transfer buffer of the common area has been successfully secured, the transfer information control table 37 is dequeued from the chain of the transfer queue header list 35. Information is copied to the previously secured common area transfer buffer 407 (106). The transfer information control table 404 is enqueued into the common area space control table 403. After the enqueuing, the transfer execution program sends a start signal to the transfer execution program of the destination space (112). Whether the transfer queue is present in the user space or not is checked (113), and if it is present, the above steps are repeated, and if it is not present, the process is terminated. The transfer execution program of the receive space started from the transfer location is now explained with reference to a flow chart of Fig. 6. As described above, after the information has been copied into the common area and enqueued into the corresponding common area space control table 403, the receive location is started. The transfer execution program in the receive location dequeues the transfer information queued in the common area space control table 403 for its own space on first-in first-out basis (601), and copies it into the previously reserved receive buffer 311 (602). After the copying, the receive information control table 310 is prepared and it is chained to the queue 312 (603). The receipt of data is informed to the receive information control program (604). Then, the buffer 407 in the common area is released (605). The chain of the usable buffer pointers 409 is updated, the number 410 of usable buffers is incremented by one, and a signal is sent to a space in the common area which is waiting because of shortage of buffer to inform that the common area buffer is available (606). Whether the transfer queue still remains or not is checked (607), and if it remains, the above steps are repeated, and if it does not remain, the process is terminated. After the common area buffer has been released by the receive information control program, the received information is processed in the receive space and then the receive buffer is released. When it is released, the number 412 of usable buffers in the common area space control table 403 is incremented by one, a signal is sent to all spaces to inform that there is an available receive buffer in its own space, and the transfer execution programs in the respective spaces are started. In accordance with the present embodiment, when the receive buffer in the destination location is not ready to receive, the request has to wait at the transfer location. Thus, the common buffer for transfer is not occupied for a long time. On the other hand, it is assured that the information on the common buffer is received by the destination location. Accordingly, the information is not held for a long time. Thus, an affect to certain transfer operation by failure of other transfer is prevented. In accordance with the present invention, since the status of the receive buffer in the receive location can be grasped at the transmit location, it is prevented that an amount of information which cannot be received is supplied to the transfer buffer and the data continuously flows on the buffer. Even if certain transfer fails due to saturation of the receive buffer, other transfer can continuously flow independently. As a result, the transfer buffer may be used as a pipeline and the failure of transfer due to buffer block or buffer shortage is prevented.

Claims: Method for controlling data transfer in a data processing system including a plurality of memory areas (A, B, D, E) each having a receive buffer (63), a transfer buffer (60) commonly accessable by the memory areas (A, B, D, E) wherein data is transferred between the memory areas (A, B, D, E) through the transfer buffer (60) and indication means for indicating an availability of the receive buffers (63) of the memory areas (A, B, D, E), comprising the following steps: (a) reading the indication means in response to the occurrence of data to be transferred in one memory area to determine whether the receive buffer (63) of the destination memory area is available or not, (b) storing the data to be transferred into the transfer buffer (60) when the receive buffer (63) is vacant, (c) transmitting the data stored in the transfer buffer (60) to the receive buffer (63) of the destination memory area and (d) holding the data to be transferred in a transferring memory area instead of transmitting the data when the receive buffer (63) of the destination memory area is not available. Method according to claim 1, characterized in that the indication means includes counter means (62) to which the number of receive buffers (63) provided in memory areas (A, B, D, E) is initially set and the counter means (62) is decremented each time the receive buffer (63) is occupied and incremented each time the receive buffer (63) is released. Method according to claims 1 or 2, characterized in that the memory areas (A, B, D, E) each includes a queue header for the transfer data and a transmit information control table pointed by the header for pointing an area in which the data to be transferred is stored, and in the step (a), the transmit information control table which points the area in which the data to be transferred is stored is searched, and if it is found, the indication means is referenced to check whether the received buffer (63) of the destination location memory area is vacant or not. Method according to claims 1 to 3, characterized in that the counter means (62) is commonly accessable by the memory areas (A, B, D, E).

Inventors: IWANAGA MASAHARU, KOUDA KATSUYA, IWANAGA, MASAHARU, KOUDA, KATSUYA
Applicants: HITACHI LTD, HITACHI, LTD.
Application year: 1987
Main classification: G06F13
IPC codes: G06F13