ANALOG/DIGITAL CONVERTER APPARATUS FOR QUANTIZING TRANSMITTANCE VOLTAGE SIGNALS

Abstract: Analog/digital converter using flash analog/digital converters for converting input transmission voltage signals to digital signals having different quantizing steps.

Description: ANALOG/DIGITAL CONVERTER APPARATUS FOR QUANTIZING TRANSMITTANCE VOLTAGE SIGNALS Technical Field The present invention relates to analog/digital converter apparatus for converting analog signals representing transmittance into digital signals. Background Art Solid-state image sensors generally have a linear or area organization. A sensor will often have a row of sensor elements (usually photodiodes or photocapacitors) and one or more CCD shift registers. The elements sample light from an image and integrate (accumulate) charge representative of the intensity of such light. After this integration, the charge is transferred to an output CCD shift register. The charge is shifted out of the shift register and converted by a floating diffusion * connected, to an MOS.. ransistor into a voltage signal. The voltage signal is then amplified and digitized by an analog/digital converter. Area image sensors are used to scan photographic negatives to produce high resolution digital images. These systems measure the amount of light (transmittance) passing through the pixels of a film negative. It is advantageous that this be accomplished quite rapidly (at video rates) and with high accuracy. Also, the transmittance voltage signal can vary over a wide voltage range. This places a number of severe constraints on the analog/digital converter. The converter must be able to rapidly quantize the voltage signal over this wide voltage range. Further, the transmittance signal must be converted into a density space before being delivered to a high speed printer. As is well known, density (D) is proportional to -L0G 1Q (T), where T represents transmittance. For the sake of explanation, let us differentiate the function —log, Q (T). Assuming small quantizing steps we have approximately the relationship ΔD = ΔT 2.3 T where T is the transmittance, ΔT is a transmittance quantizing step and ΔD is a density quantizing step. A quantizing step is the range between adjacent quantizing levels. As is well known, it is desirable in producing high quality images that ΔD be kept relatively small. However, the output voltage which represents transmittance can vary over a wide range. The above differentialed relationship shows that for a wide range of transmittance, ΔT must be a variable if ΔD is to be kept relatively small. Thus, if a relatively small voltage signal corresponding to transmittance is to be quantized, each quantizing level ΔT should be small or image density will suffer. On the other hand, for a large transmittance voltage, each quantizing level ΔT can be correspondingly larger without the image density suffering. Therefore, high speed analog/digital converters which can have their resolution (quantizing steps) changed would be desirable. Unfortunately, such converters are not commercially available. Heretofore, lower speed converters have been used. Although effective, they reduce the rate at which digital images can be processed. It is also not practical to place a logarithmic amplifier before conventional analog/digital converters, since stable high speed log amplifiers are not commercially available. In any event, it is much more convenient to deal with digital numbers since the conversion of a digital number representing transmittance into its logarithmic equivalent can be done easily and at very high speed. Therefore, it is highly advantageous to digitize a transmittance voltage signal and then convert the digitized signal into a digital signal representing density. Flash analog/digital converters have recently been introduced which can convert analog voltage signals into digital signals at very high rate. A flash analog/digital converter is a parallel encoder. Briefly, turning to Fig. 1, a schematic of a flash converter is shown. It consists of a resistive voltage divider ladder having a plurality of resistors R. Comparators 12 are connected to such ladder. The digital output is provided by the circuitry 14. Encoder and latch circuitry 14 is connected to the comparators 12. A clock signal φ is applied as an input to the comparators and circuitry 14.. The number of comparators and resistors R equals the number of quantization levels. A reference voltage is applied to the resistive ladder. Changes in this voltage change the quantizing steps of the converter. The maximum amplitude of the signal which can be accurately converted into a digital signal is determined by the reference voltage. As shown, the reference voltage is scaled by the resistors R and a different voltage level is applied to each comparator. When the analog input voltage to a comparator exceeds the voltage applied from the resistive ladder, then a high output is produced not only by that comparator but by all the other comparators below its level. In response to the clock signal φ, provided by an external source, the outputs of the comparators are connected to circuitry 14. The encoder in circuitry 14 encodes the output into a binary code which is delivered for storage to a latch. The latch not only provides the output digital signal but also it provides an overflow signal. When the overflow signal is activated, it indicates that the input analog signal has exceeded the maximum quantizing level of the converter. In such a situation, the converter is said to be saturated. In operation, the reference voltage can vary only over a narrow range. This narrow range is not sufficient to change each quantizing step by a sufficient amount to correspond to changes in the analog transmittance voltage signal so as to provide proper output density. It is an object of this invention to adapt flash analog/digital converters for use in digitizing transmittance voltage signals. Disclosure of the Invention This object is achieved by apparatus for converting a voltage signal representing transmittance into a digital signal having quantizing steps which depend upon the level of such voltage signal, comprising: a. converter means including at least one flash analog/digital converter for providing a digital output in response to an input voltage signal; b. gain control means responsive to said transmittance voltage signal for providing first and second voltage signals respectively, with said first voltage signal being at a higher level than said second voltage signal; and c. logic means for applying said first voltage signal to said flash analog/digital converter means when said transmittance voltage signal is below a predetermined level, and applying said second voltage signal to said converter means when said transmittance voltage signal is above such predetermined level, whereby the quantizing steps of said digital signal is changed. Bτief Description of the Drawings Fig. 1 illustrates in schematic form a conventional prior art flash analog/digital converter; Fig. 2 shows in block diagram form, the elements of a system for digitizing the output signals from an area sensor which receives light which passes through a film negative and for arranging such digitized signals spacially to form a digitized image in the frame store of a memory plane; Fig. 3 shows the quantization levels and digital codes for the converters 18a and 18b shown in Fig. 2; and Figs. 4 and 5 show different arrangements of flash analog/digital converters which can be used in the system of Fig. 2. Modes of Carrying Out the Invention Turning first to Fig. 2, a system for digitizing signals to form a digital image in a frame store is provided. A solid—state area image sensor 15 with more than for example a million picture elements (pixels) receives light which passes through a photographic negative (not shown). (It will be understood that a linear sensor can also be used.) The light which passes through the negative represents transmittance. The elements convert the incoming light into charge. This charge is accumulated in either a photodiode or photocapacitor and represents the transmittance of the light which has passed through the negative. After the charge is accumulated, is transferred to a horizontal shift register 15a which operates in a well known manner. The charge is shifted in the register 15a in the direction shown by the arrow past a floating diffusion 15b. The floating diffusion 15b is coupled to an MOS transistor (not shown) which provides a voltage level representative of the accumulated charge which passes by the floating diffusion. The architecture of sensor 15 can be for example interline—transfer or frame—transfer as is well known to those skilled in the art. The transmittance voltage signal from the diffusion 15b is provided to amplifiers 16a and 16b, respectively. Amplifiers 16a has a gain of 8 and amplifier 16b has a unitary gain. The output voltage signals from amplifiers 16a and 16b are respectively provided to identical flash analog/digital converters 18a and 18b. Each of these converters 18a and 18b receives the identical reference voltage. The output of each of these flash analog/digital converters is applied to a logic circuit 22 which determines whether the digital output from converter 18a or converter 18b is to represent the transmittance and adds logic zeros to selected bit positions of the selected converter digital utput signal. The logic gate 22 delivers the selected digital signal which represents a digital pixel, to a buffer 23. The buffer 23 causes each digital pixel to be stored in a particular location of a memory plane of a frame store 24. The numerical value of each digital pixel represents the transmittance of a pixel of a negative. A sequencer 26 provides the necessary clock signals to the converters 18a and 18b and control signals to the other logic elements. After a digital image is formed in the memory plane of frame store 24, it is delivered to a printer 28. The printer 28 will be understood to include electronics such as a digital image processor which processes the digital image so that the printer will produce an output print which is more suitable for viewing than if processing had not taken place. The processor may function in accordance with image enhancing algorithms and tone scale enhancing algorithms. It must of course, as noted above, convert the transmittance digital signal into a logarithmic scale which more accurately represents density space. An example of a printer which can be used in response to these enhanced digital pixels is a laser printer such as disclosed for example, in commonly assigned U.S. Patent Application Serial No. 619,454, entitled "Light Beam Intensity Controlling Apparatus," filed June 11, 1984 in the names of Baldwin et al. Referring to Figs. 2 and 3, we see that the analog/digital converters 16a and 16b operate at different gains with the same input signal. Converter 18a measures the input signal with a maximum quantizing level of 1/8 V„. Converter 18b measures the input signal with a maximum quantizing level of V„, where V M is the maximum possible voltage of the input transmittance voltage signal. As shown, each A/D converter 18a and 18b provides a nine—bit word representing 512 quantization levels. If its input signal level exceeds the level 1/8 V„ M, then converter 18a is saturated and provides an overflow signal. In response to this overflow signal, the logic 22 selects the output of the converter 18b. The converters 18a and 18b are identical and have 512 quantizing levels and each receives the identical input reference voltage. For converter 18a a quantizing step is: ΔT For converter 18b, a 8 512 4096 quantizing step is: ΔT = 512 The output of a logic 22 is a 12-bit digital word. If the analog input voltage provided to the amplifiers 16a and 16b is less than 1/8 V M , then the converter 18a will not provide an overflow bit and the logic 22 will select the output of the converter 18a to represent the transmittance. Since logic 22 provides a 12—bit word, it adds three logic zero bits to the highest order bit positions as set forth in Table 1. Table 1 *Added Bits If the level of the input signal is greater than 1/8 V„, then the overflow line from analog/digital converter 18a is high and the logic 22 selects the digital output of analog/digital converter 18b. In such a case, logic 22 adds three logic zeros to the least significant bit positions of the 12-bit signal as set forth in Table 2. Table 2 *Added Bits Turning now to the arrangement shown in Fig. 4, amplifier 16a and 16b are still provided. These amplifiers have the same gain as their corresponding amplifiers in Fig. 2. Amplifiers 16a and 16b are selectively adapted to be connected to a 9—bit flash analog/digital converter 18. When the input voltage signal is greater than 1/8 V„, a comparator 30 provides an output signal which actuates a drive circuit that drives a switch 32 (shown schematically) to couple the output of amplifier 16b to the analog/digital converter 18b. Logic 22a is similar to logic 22 of Fig. 2 in that it is responsive to the output of the comparator 30 and the analog/digital converter 18. By means of this arrangement, only a single flash analog/digital converter 18 is needed to change the quantizing steps of the digital signal as a function of the transmittance voltage level. Turning now to Fig. 5 there is shown a different arrangement. Logic 22b provides a 12-bit word output. There are three flash analog/digital converters 18a', 18b' and 18c'. These are 8-bit word output converters. Three gain control amplifiers are provided 16a', 16b' and 16c'. Amplifier 16a* has a gain of 16, amplifier 16b' has a gain of 4 and amplifier 16c* has a gain of 1. When an input voltage signal is less than 1/16 V„, the output of analog/digital converter 18a is selected by logic 22b. When the output is between 1/16 and 1/4 V M , the output of the analog/digital converter 18b* is selected by logic 22b. Finally, when the output is greater than 1/4 V M , the output of the analog/digital converter 18c' is selected by logic 22b. Analog/digital converters 18a* and 18b' provide overflow signals to the logic 22b. These overflow-.... signals provide the information necessary for logic 22b to select the appropriate analog/digital converter. Referring now to Table 3 below, when the output of analog/digital converter 18a' is selected by logic 22b, four zero bits are provided by the logic 22b in most significant bit positions. When the output of analog/digital converter 18b' is selected then two bits are placed in the most significant bit positions and two bits are placed in the least significant bit positions. Finally when analog/digital converter 18c' is selected, four zero bits are added to the least significant bit positions. -10- Table 3 Input Voltage ** <÷v 1 'M 00 8 bits 00 V, / 8 M 8 bits 0000 * Added Bits The number of quantizing levels and the specific transmission voltage at which quantizing steps are to be changed to provide a desired quality of image density can be determined experimentally. Industrial Applicability and Advantages Very high speed A/D converters which use flash A/D converters can rapidly convert analog signals representing transmittance into digital signals. ~ -

Claims: Claims: 1. Apparatus for converting an analog signal representing transmittance into a digital signal having different quantizing steps which depend upon the level of such analog signal, comprising: a. first and second flash analog/digital converters, each providing a digital output signal in response to an input analog signal, said first analog/digital converter providing an overflow signal when it is saturated; b. gain control means responsive to said transmittance analog signal, for providing analog signals to both said first and second flash analog/digital converters, said gain control means including a sequencer for providing a clock signal to said first and second flash analog/digital converters, to cause simultaneous conversion with the analog voltage signal applied to said first converter being at a higher level than that applied to said second converter; and c. logic means responsive to the said overflow signal for selecting the digital output from either said first or said second flash analog/digital converter to represent the input transmittance analog signal depending upon the level of transmittance voltage signal to thereby change the quantizing steps of the selected digital output signal. 2. Apparatus for converting a voltage signal representing transmittance into a digital signal having different quantizing steps which depend upon the level of such voltage signal, comprising: a. first, second and third flash analog/digital converters, each providing a digital output signal in response to an input voltage signal, said first and second analog/digital converters also providing overflow signals when they are saturated; b. gain control means for providing said transmittance voltage signal to said first, second and third flash analog/digital converters, said gain control means including a sequencer for providing a clock signal to said first and second flash analog/digital converters, to cause simultaneous conversion with the analog voltage signal applied to said first converter being at a higher level than that applied to said second converter which is higher than the level applied to said third converter; and c. logic means responsive to the said overflow signals for selecting the digital output from either said first, second or third flash analog/digital converter to represent the input transmittance voltage signal and thereby change the quantizing steps of the selected output digital signal. 3. The invention as set forth in claim 2, wherein the digital output signal provided by each converter has the same number of bits and wherein said logic means adds logic zero bits to the selected digital output signal.

Inventors: MILCH JAMES ROGER, MILCH, JAMES, ROGER
Applicants: EASTMAN KODAK CO, EASTMAN KODAK COMPANY
Application year: 1987
Main classification: H03M1
IPC codes: H03M1