DATA RECORDING

Abstract: A data streamer uses a digital audio tape recorder (1) arranged such that even when the supply of incoming data to be recorded on a tape (12) is interrupted, the data recorder (1) is operated continuously and a data invalid signal is recorded on the tape (12) in an area other than the data recording area.

Description: This invention relates to data recording, and more particularly to digital data signal recorders and to methods of recording digital data signals. To protect computer generated data written on a hard disc or the like, the data are sometimes transferred once per day to a so-called data streamer (or data recorder) and are thereby recorded on other recording media for back-up. In most cases, a data streamer is effectively an analogue audiotape recorder. Such a tape recorder, however, uses a large quantity of recording medium, such as tape, and has a low data rate upon recording, so it takes a long time to transfer and record the data. Moreover, it is not easy to find the starting point of required recorded data. When data from, for example, a computer are recorded on an audiotape recorder, an arbitrary file mark signal is supplied thereto from the computer. Upon reproduction, the location number of the file mark for the computer designated address is searched for. Since the tape recorder is arranged to search for the location number of the file mark by counting the reproduced signals of the file marks in the normal reproduction mode, it takes a long time to search for the required file mark. A digital audio tape recorder (DAT or R-DAT) has been developed, as described in 'ES Review' pages 11 to 14, published in December 1985 by Sony Corporation, Shibaura Plant, ISSN0389-7737. Since this DAT is designed to record and/or reproduce a digitized audio signal, it is very suitable for recording the aforesaid data. The DAT, however, employs rotary heads so it takes a significant time to begin recording or reproduction. As a result, if the supply of data to be recorded is interrupted, there is a risk that the incoming data cannot be recorded smoothly because the DAT cannot resume the recording quickly. United States patent specification US-A-3 439 344 discloses a continuous data recording apparatus having the features of the pre-characterizing part of claim 1. According to the present invention there is provided a digital data signal recorder comprising: head means for recording a digital data signal in a track on a recording medium; means for transporting the recording medium past the head means; means for detecting invalid data in the digital data signal; and means controlled by the detecting means for recording in another part of said track a signal indicating that the recorded data are invalid; characterized in that: said head means is a rotary head means, and said track is an oblique track; said medium transport means is controllable to have a normal speed recording mode and a high speed mode in which the recording medium is transported past said rotary head means at a higher rate than in the normal speed recording mode; and means is provided for recording on the recording medium, at the end of a recording, a predetermined end signal for a period having a duration which can be detected during the high speed mode, for detecting a start portion of said end signal at the next recording operation, and for carrying out over-write recording on the recording medium from said detected start portion thereby overwriting the rest of said end signal. According to the present invention there is also provided a method of recording a digital data signal in a track on a recording medium, the method comprising the steps of: transporting the recording medium relative to head means; detecting invalid data in the digital data signal; and in response to said detection of invalid data, recording in another part of said track a signal indicating that the recording data are invalid; characterized by: said head means being a rotary head means and said track being an oblique track; controlling said recording medium in a normal speed recording mode and a high speed mode in which the recording medium is transported past said rotary head means at a higher rate than in the normal speed recording mode; and recording on the recording medium, at the end of a recording, a predetermined end signal for a period having a duration which can be detected during the high speed mode, detecting a start portion of said end signal at the next recording operation, and carrying out overwrite recording on the recording medium from said detected start portion thereby overwriting the rest of said end signal. The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which: Figure 1 is a block diagram showing a first embodiment of data recorder according to the present invention; Figure 2 is a diagram showing a tape format of a digital audiotape recorder; Figure 3 is a diagram showing a data format of the first embodiment; Figure 4 is a diagram used to explain sub-data of the first embodiment; Figures 5A to 5C are diagrams used to explain the first embodiment; Figures 6, 8 and 9 are flow charts to which reference will be made in explaining the operation; Figures 7A to 7C are schematic representations used to explain the recording operation of the first embodiment; Figure 10 is a block diagram showing a second embodiment of data recorder according to the present invention; Figure 11 is a schematic representation of a rotary head used in the second embodiment; Figure 12 is a schematic representation of a track pattern formed by the rotary head of the second embodiment; and Figures 13A to 13C, Figures 14A to 14C and Figures 15A to 15C are schematic representations illustrating the recording procedures of the second embodiment. Referring initially to Figure 1, the first embodiment includes a digital audio tape recorder (DAT) 1 with a rotary head drum 11 around the peripheral surface of which a magnetic tape 12 is wrapped over an angular range of about 90° of head travel. The tape 12 is transported past the head drum 11 by a tape transport mechanism 19. Two rotary heads A and B are mounted in the rotary head drum 11, and two oblique tracks are recorded and/or reproduced by the heads A and B once per revolution of the head drum 11 as shown more clearly in Figure 2. Incoming digital data are supplied to an input and output (I/O) circuit 13 of the DAT 1 and thence to a digital signal processor 14, in which they are converted into the DAT format. The digital signal converted in accordance with the DAT format is supplied through a recording amplifier 15 and a recording side contact R of a recording/reproducing change-over switch 16 to the heads A and B, and is thereby recorded on the tape 12. When the signal recorded on the tape 12 is reproduced by the heads A and B, the reproduced signal is supplied through a reproducing side contact P of the recording/reproducing switch 16 and a playback amplifier 17 to the signal processor 14, in which the reproduced signal is reconverted into the digital data and is then supplied through the I/O circuit 13. An incoming signal is also supplied to a system control circuit 18 of the DAT 1. On the basis of the signal from the system control circuit 18, the head drum 11 is controlled to rotate, the tape transport mechanism 19 transports the tape 12, and the recording/reproducing switch 16 changes in position. Also, upon recording, the signal from the system control circuit 18 is supplied to the signal processor 14 which then produces a sub-code signal or the like which will be described later. Upon reproduction, the signal extracted by the signal processor 14 is supplied to the system control circuit 18 for tracking control operation, and this signal is fed out. In DAT 1, by connecting a digital-to-analoque/analogue-to-digital DA/AD converting circuit to the output of the I/O circuit 13, and a predetermined control apparatus to the output of the system control circuit 18, it is possible to record and/or reproduce, for example, an analogue audio signal. In the present embodiment, however, an interface bus 3 is connected through a controller 2 as an external apparatus to the DAT 1. The interface bus 3 may be of the type which conforms, for example, to the small computer system interface (SCSI) standard (see 'NIKKEI ELECTRONICS', pages 102 to 107, published by Nihon Keizai Shinbunsha on 6 October 1986). A host computer 5 and a hard disc drive (HDD) 6 are connected to the interface but 3 through a host adaptor 4. In the controller 2, a protocol control circuit 21 is connected to the bus 3. Through the protocol control circuit 21, the data and the control signal are interchanged between a microcomputer 22 which controls the operation of the controller 2, a memory control or dynamic memory access (DMA) circuit 23 and the bus 3. the microcomputer 22 not only controls the operation of the controller 2 but also detects the address of the DMA circuit 23 and controls the operation of the DMA circuit 23. Also, data are interchanged between a buffer memory 24 and the bus 3 through the DMA circuit 23. Further, data are interchanged between the buffer memory 24 and the signal processor 14 via I/O circuits 25 and 13. In addition, the control signal is interchanged between the microcomputer 22 and the system control circuit 18. Accordingly, data written in the HDD 6 are supplied through the bus 3 to the controller 2 in response to the transfer request from the controller 2 during recording, and are then written in the buffer memory 24 through the DMA circuit 23. The data written in the buffer memory 24 are read out through the I/O circuit 25 and then fed to the DAT 1. In the DAT 1, the data supplied to the I/O circuit 13 are regarded as being equivalent to those derived from the analogue-to-digital converting circuit when an audio signal is recorded. Thus, these data are converted in accordance with a predetermined DAT format by the signal processor 14 and are thereby recorded on the tape 12 by the heads A and B. Upon reproduction, the signal reproduced from the tape 12 by the heads A and B is reconverted by the signal processor 14 and thereby data corresponding to the audio signal are produced. These data are supplied through the I/O circuit 13 to the controller 2. In the controller 2, the data written in the buffer memory 24 through the I/O circuit 25 are read out through the DMA circuit 23 and then written in the HDD 6 through the bus 3. The DAT format for the signal to be recorded on the tape 12 will now be described. As shown in Figure 2, two tracks Ta and Tb respectively recorded by the heads A and B constitute one frame, and each of these tracks Ta and Tb is formed as though recorded from the bottom of the drawing. In this embodiment, the signal is recorded on each of the tracks Ta and Tb over an angular range of 90°. Each of the tracks Ta and Tb is formed (viewed from right to left in Figure 2) of a predetermined margin area of 5.051°, a phase locked loop (PLL) preamble sub-code area of 0.918°, a first sub-code area of 3.673°, a postamble area of 0.459°, an interblock gap area of 1.378°, a tracking (auto tracking finding (ATF)) signal area of 2.296°, an interblock gap area of 1.378°, a PLL preamble sub-code area of 0.918°, a data area of 58.776°, an interblock gap area of 1.378°, an ATF signal area of 2.296°, an interblock gap area of 1.378°, a PLL preamble sub-code area of 0.918°, a second sub-code area of 3.673°, a postamble area of 0.459° and a margin area of 5.051° in this sequential order, although the scale of Figure 2 is not accurate. The data from the I/O circuit 13 are supplied to the signal processor 14, in which they are added to the error-detection and error-correction codes and others in accordance with the predetermined DAT format, interleaved in a predetermined relationship, distributed and then inserted into the respective data areas of the tracks Ta and Tb. In this case, 5760 bytes of original data can be recorded in the two data areas which constitute a single frame. When this apparatus is used as a data streamer, however, incoming data are processed in units of 2 n , for example 512 bytes. Since the recording capacity of 5760 bytes forming one frame is not an integral multiple of this, it is not possible to establish matching between the DAT 1 and the external apparatus. For this reason, when the data written in the buffer memory 2 through the bus 3 are read out to the DAT 1, eleven blocks of 512 bytes each are successively read as, for example, shown in Figure 3. Also, there is provided an area in which 128 bytes of filler data, that is data other than the digital data signal from the computer 5, are recorded, thus making it possible to establish matching between the DAT 1 and the external apparatus. The reading operation can be controlled by controlling the DMA circuit 23 in response to the control signal from the microcomputer 22. Upon reproduction, the 128 bytes of data succeeding, for example, the eleven blocks of 512 bytes of data can be simply ignored. Thus, the DAT 1 can be utilized as a data streamer. With this circuit arrangement, since the head drum 11 is rotated at for example, 2000 rpm, data can be recorded at extremely high speed, for example 192,000 bytes per second. Also, the amount of recording medium used can be very much reduced. Also, since matching between the DAT 1 and the external apparatus is established, it is possible to record and/or reproduce data satisfactorily. An error-correction code of the data to be recorded or the like may be recorded in the remaining 128 bytes instead of recording filler data. If the error-correction code shares much of the remaining 128 bytes, the number of blocks of data to be recorded in one frame may be decreased and the code area or the like may be increased. Furthermore, 2048 bits of data can be recorded in the first and second sub-code area shown in Figure 2, respectively. In the format in which a digital audio signal is recorded in the data area, the 2048 bits of data in the sub-code area are divided into pack data, each pack data being formed of 64 bits, and a time code for the recorded signal and information such as a calendar (recording date ) or the like can be recorded for every pack. Therefore, by assigning data for the data recorder into this pack, it is possible to carry out various control operations by using this pack. Figure 4 schematically illustrates the pack format therefor. Referring to Figure 4, 64 bits are each divided into eight words and each word is formed of eight bits. Four bits at the most significant bit (MSB) end of the starting (the first) word in this pack format are assigned to an ITEM area and this ITEM area is made common to the recording format of the audio signal. The contents of this pack format are expressed by a four bit binary code. Of the sixteen binary codes expressed by the four bits, nine binary codes are already defined so as to record the audio singal, and the arbitrary binary codes in the remaining seven binary codes are defined for the data recorder. Three bits at the least significant bit (LSB) end of the first word and eight bits of the second word are assigned to a save set number (SSNO) area which indicates the number of the save set. In total, eleven bits constitute the binary data which indicates the number in which data are backed up from, for example, the beginning of the tape 12. Eight bits of the third word are assigned to a file number (FNO) area. In this FNO area, there is provided the binary data which indicate the serial number of the file within the data backed up (save-set) for one time. Four bits in the LSB side of the fourth word and the eight bits of both the fifth and sixth words are assigned to an absolute frame number (AFNO) area. In total, twenty bits constitute the binary data which indicate the serial number of the effective frames from the beginning of the tape 12. Eight bits of the seventh word are assigned to a situation area in which data indicating the situation of the frame are provided. That is, in the eight bits of the seventh word, the starting bit at the MSB end is assigned to a lead-out flag area indicating that the frame is the final position of the back-up data (lead-out); the second bit is assigned to a data invalid flag area indicating that the data of the frame are invalid; the third bit is assigned to an amble flag area indicating the amble frame of the starting or ending point of the recorded data; and the forth bit thereof is assigned to a file mark flag area indicating the file mark frame. Four bits at the LSB end of the seventh word express in binary code the number of blocks recorded per frame where one block represents the amount of data recorded per frame, for example, the unit amount of incoming and outgoing data of the external apparatus. The fifth bit from the MSB end of the first word in made '0', and four bits at the MSB end of the fourth word are assigned to extension bits (TBD) and are all made '0' for the time being. Also, eight bits of the eighth word are assigned to parity data for the first to seventh words. When the data from, for example, the HDD 6 are backed up in this apparatus, the write address and the read address of the DMA circuit 23 are compared with each other. When the buffer memory 24 has no data because of an interruption in the supply of data and the write address and the read address of the DMA circuit 23 become coincident with each other, a signal indicative of that state is supplied to the microcomputer 22. The signal from the microcomputer 22 is supplied through the system control circuit 18 to the signal processor 14, whereby the data invalid flag is set to '1' in the second bit of the seventh word in the sub-code portion of the pack format of the data recorder. Also, arbitrary, invalid data are recorded in the data area. Since the recording is continuous even when the supply of data is interrupted, it is possible to avoid the problem that the recording is stopped and then resumed with a delay of time caused by the interruption. Thus, the recording can always be carried out smoothly. Since the recording density is very high, invalid data can be recorded without trouble. If the period of invalid data continues for more than one second, however, the operation of the DAT 1 may be stopped. By inhibiting the AFNO area provided in the fourth to sixth words within the above-mentioned pack format for the data recorder from being increased, it is possible to remove the influence of searching the data of the period of invalid data. When the data from, for example, the HDD 6 are backed up, the DAT 1 starts recording the data under the condition that the FNO provided in the third word of the sub-code area of the pack format for the data recorder is first selected to be '0'. Also, if under this condition a file mark signal is supplied from the computer 5, the corresponding write address from the DMA circuit 23 is written in the microcomputer 22. Then, if the read address of the DMA circuit 23 is detected and this read address coincides with the thus written address, then predetermined invalid data are read out from the buffer memory 24 and the invalid data are inserted into the remainder of the data portion of one frame in accordance with the recording format of the DAT 1. Invalid data are also read out during the succeeding frame period and the FNO of the pack format for the data recorder is incremented by '1'. Also, the file mark flag is set to '1' in the fourth bit of the seventh word. Then, the next data are recorded from the frame next to the succeeding frame and the FNO at that time is made the same as that of the immediately-preceding file mark. To be specific, if data (reference letters a, b and c respectively designate the above-mentioned blocks data) shown in Figure 5A are supplied and the file mark signal is supplied is supplied as shown in Figure 5B, data are recorded in data areas of the respective frames as shown in Figure 5C. Also, if the file mark signal is supplied, the file mark is recorded in the next frame (file mark frame). Accordingly, to the file mark to be recorded at that time, flag data '1', indicative of the file mark, is set in the fourth bit of the seventh work of the sub-code area in the pack format for the data recorder and at that time, the FNO is incremented by '1'. If the amount of data (the number of blocks) supplied thereto until the arrival of the file mark are more than the amount of data in one frame, the data are recorded over a plurality of frames. In this case, the FNO is selected to be the same value. The file mark signal is recorded as follows. When it is requested that the thus recorded signal is to be searched for by utilizing the file mark, the FNO of the frame reproduced at the time when the search is requested is detected and than added to the number (±) of the file marks that should be searched for. Then, the added value and the above-mentioned detected value are compared with each other. If the added value is larger than the detected value, the search is started at high speed in the forward direction, while if it is smaller, the search is started at high speed in the reverse direction. Moreover, during the high speed search the FNO detected and the aforesaid added value are compared with each other. If the relationship between the added value and the detected value is changed, the search direction for the recorded signal is reversed and the search speed is reduced by half, thus making it possible to search for a desired file mark. In that case, the bit number of the FNO must be secured so as to prevent the same FNO from becoming continuous in the frames detected during the highest speed search mode. Since the FNO which increments in response to the file mark signal is recorded, it is possible to search with ease for the recorded signal at high speed by using this FNO. In the above-mentioned apparatus, predetermined amble signals are located at the starting and ending portions of the recorded data. Also, there is provided a lead-out signal having a duration sufficient for it to be read in the high speed search mode at the end of the recording. Figure 6 illustrates a flow chart to which references will be made in explaining the aforesaid operation. When the recording is started, it is determined at a first step 31 whether the recording is started from the beginning of the tape 12 or not. If it is determined that the recording is started from the beginning of the tape 12 as represented by YES, the program goes to step 32 in which the amble flag is set to '1' at the third bit of the seventh word of the subcode area of the pack format for the data recorder and a frame in which arbitrary, invalid data are inserted into the data portion is recorded for a predetermined period. At that time, the respective values provided in the first to sixth words of the pack format for the same data recorder are reset to the initial values or particular values. Particularly, the AFNO does not increment from '0' but repeats the same value. If the recording of the amble signal are ended, the data is recorded at step 33 and this recording is continued until it is decided at the next decisional step 34 that the recording is ended or that the apparatus is disabled for recording (placed in the under-run condition) because the buffer memory 24 does not have sufficient data. If this stop condition is detected as represented by YES at step 34, a similar amble frame is recorded during a predetermined period at step 35. Then, it is determined at the next decisional step 36 whether the stop condition is the under-run condition or not. If it is not the under-run condition, the program goes to step 37 in which the lead-out flag is set at '1' in the first bit of the seventh word and the frame in which the invalid data are inserted into the data portion is recorded for a time period of sufficient duration so that it can be detected in the high speed search mode, for example, for more than 300 frames, if the high speed search mode, for example, for more than 300 frames, if the high speed search operation is carried out at a speed 300 times as high as the recording speed. In this case, in the amble frame and the lead-out frame in steps 35 and 37, the values of the first to sixth words are selected to be equal to those in the period of the preceding data signal. Thereafter, the tape 12 is stopped at the next step 38 and the recording is ended. Thus, the amble frame is provided at the starting and ending portions of the recorded data and the lead-out frame of predetermined time duration is recorded next to the last amble frame. Now, let it be considered that the recording is started from some intermediate point on the tape 12. It is determined at decisional step 31 whether or not the recording is started from an intermediate point on the tape 12. If so, the processing goes to step 39 in which the lead-out signal is searched for at high speed. If the frame in which the lead-out flag is set as mentioned above is recorded continuously for more than 300 frames and is reproduced at a tape speed 300 times as high as that of the recording mode, the heads A and B reproduce the sub-code areas of the corresponding tracks more than once, whereby the lead-out signal can be searched for by detecting the lead-out flag. When the search operation for the lead out signal is ended, the program goes to the next step 40. At step 40, reproduction in the reverse direction is carried out towards the preceding amble signal and the amble period is reproduced, for example, for about one to two seconds at step 41. At the next step 42, the tape 12 is transported in the normal mode. Then, it is determined at decisional step 43 whether the apparatus is actuated or not. If the apparatus is actuated as represented by YES at step 43, the amble signal is taken in at step 44. Then, the amble signal to be recorded for several frames at step 45. The amble signal to be recorded herein is as follows: '1' is set for the amble flag at the third bit of the seventh word of the aforesaid pack format for the data recorder; arbitrary, invalid data are inserted into the data portion; the value of the preceding amble signal detected when the SSNO of the first and second words of the pack format for the data recorder are reproduced in the reverse direction is incremented by '1'; the FNO of the third word is changed to '0'; and the absolute frame numbers of the fourth to sixth words repeat the same preceding values. If the recording of the amble signal is ended, the program goes to step 33, and an ending routine similar to that described above (from steps 33 to 38) is executed and the routine is ended. If it is decided at decisional step 36 that the stop condition is the under-run condition, the program goes to step 46. At step 46, reverse reproduction is carried out. This reverse reproduction is continued until the reproduced signal is changed from the amble signal to the data signal at the next decisional step 47. If the reproduced signal is changed to the data signal at step 47, the tape 12 is stopped at the starting portion of the amble signal at step 48. Then, it is determined at the next decisional step 48 whether the under-run condition is released or not. If the under-run condition is released, the program goes to step 42. Thereafter, a similar routine for recording the signal at the starting portion (from steps 42 to 45 and step 33) is executed. Since the amble signal is recorded at the starting and ending portions of the recording signal, it is possible to actuate the heads A and B during this period. Thus, the starting portion of the data can be prevented from being cut off. Also, since the previously-recorded signal can be erased by the over-write, there is then no risk that misoperation will be caused by the remaining signal portions that are not fully erased. Therefore, the recording can be made satisfactorily by using the append command. In other words, when the DAT tape 12 travels as shown in Figure 7A, each back-up recording is carried out as shown in Figure 7B. Thus, the data are recorded as shown in Figure 7C. In this case, since the amble signal A is recorded at the start and end portions of the recorded data the signal is over-written from the amble signal A, thus making it possible always to carry out the recording satisfactorily even in case of the under-run and append modes. Since a digital signal of high frequency is recorded, it is possible to erase the previously-recorded lead-out signal or the like can be erased without any special erase head. Figure 8 is a flow chart to which reference will be made in explaining how to record the lead-out signal. When the end command from the computer 5 is supplied, this routine is started. At the first step 51, an amble flag is set to '1' in the third bit of the seventh word of the sub-code area of the pack format for the data recorder. Also, the frame in which arbitrary, invalid data are inserted into the data portion thereof is recorded for a period of about two to three seconds. At that time, the respective values provided in the first to sixth words of the same pack format for the data recorder are made the same as those of the period of the preceding data signal. Particularly, the AFNO is prevented from being incremented from the previous value but repeats the same value. Then, at the next step 52, the lead-out flag is set to '1' in the first bit of the seventh word similarly and the frame in which invalid data are inserted into the data portion thereof is recorded for a period which can be detected by the high speed search operation, for example more than 300 frames can be recorded if the high speed search is carried out at a speed 200 times as high as the normal speed. Also in this case, the values of the first to sixth words are made the same as those described hereinbefore. At the next step 53, a confirmation signal indicative of the end of the recording is supplied to the host computer 5 and this routine is ended. Thus, when the end command is supplied from the computer 5 at the end of, for example the back-up, a lead-out signal of a predetermined duration is recorded in that portion. A description will now be given for the case where an append recording is made. The routine shown in the flow chart of Figure 9 is executed for the append command issued from the computer 5. This routine begins with step 61 at which the above-mentioned lead-out signal is searched for at high speed. When more than 300 frames in which the lead-out flags are set as set forth above are continuously recorded, even if they are reproduced at a speed 200 times as high as the speed of the recording mode, the heads A and B reproduce the sub code areas of the corresponding tracks more than once during this time period. Thus, the lead-out signal can be searched for by detecting the lead-out flag. In the search operation for the lead-out signal is ended at step 61, the program goes to the next step 62, in which reverse reproduction is carried out towards the preceding amble signal and the amble signal is reproduced during the amble period of about one to two seconds. At the next step 63, the tape 12 is transported in the normal or forward direction. If the apparatus is actuated, the program goes to step 65 in which the amble signal is recorded for a period of several frames. The ample signal thus recorded is such that '1' is set in the amble flag at the third bit of the seventh word of the pack format for the data recorder. Arbitrary, invalid data are inserted into the data portion; the SSNO of the first and second words in the pack format for the data recorder is such that '1' is added to the previous amble signal detected by the reverse reproduction; the FNO of the third word is made '0' and the AFNO of the fourth to sixth words repeat the same value as those before. After the recording of the amble signal has ended, the program goes to the next step 66, in which data from the computer 5 are recorded. This recording is continued until the end command from the computer 5 is supplied at step 67. When the end command is supplied, an end routine 68 similar to that shown in Figure 8 is executed and then, the routine is ended. Since during the append recording mode the lead-out signal is searched for and the recording is started from a portion preceding the amble signal, it is possible to erase the preceding lead-out signal by over-write recording. Thus, by always searching for the initial leadout signal from the tape beginning, it is possible satisfactorily to carry out the append recording mode. In other words, when the DAT tape 12 travels as shown in Figure 7A, each back-up recording is carried out as shown in Figure 7B. Thus, the data are recorded as shown in Figure 7C. In this case, since the lead-out signal L remains only in the end portion of the recorded data, it is always possible to carry out the recording satisfactorily by searching for the lead-out signal L. Figure 10 illustrates another embodiment of data streamer DAT according to the present invention. Referring to Figure 10, two recording and/or reproducing rotary heads A and B are mounted on the rotary head drum 11 with an angular spacing of 180° therebetween. Two oblique tracks are recorded and/or reproduced per one revolution of the rotary head drum 11. Incoming digital data are supplied to the I/O circuit 13. The signal from the I/O circuit 13 is supplied to the digital signal processor 14, in which it is converted into a signal in accordance with the above-mentioned DAT format. The DAT format converted signal is supplied through the recording amplifier 15 and the recording side contact R of the recording/reproducing change-over switch 16 to the heads A and B and is thereby recorded on tape 12. When the signal recorded on the tape 12 is reproduced by the heads A and B, the reproduced signal is supplied through the reproducing side contact P of the recording/reproducing switch 16 to one fixed contact a of a change-over switch 35. On the head drum 11, there are also mounted detecting and reproducing rotary heads A′ and B′ at positions delayed from the recording and reproducing heads A and B by 270° each relative to the direction in which the head drum 11 is rotated as shown by an arrow. Also, the heads A′ and B′ are mounted on the head drum 11 so as to have a difference in level of, for example, 1.75 track pitches (Tp) as illustrated in Figure 11. To be more specific, let it be assumed that the heads A and B each have a width 1.5 times as wide as the track pitch Tp as shown in Figure 12. Them, an amount equal to 0.5 track pitch of the track recorded by, for example, the head A can be erased by recording the next track by the head B having no difference in level and disposed at a position delayed from the former head by 180°, so that guardbandless recording can be carried out. In this case, if the head A′ is mounted without a difference in level, the relative position of the head A′ is as shown by a broken line in Figure 12. But since the head A′ is disposed with difference in level of 1.75 track pitches, the head A′ is located at a track position where the portion recorded by the head A passes through the position of the head B. If the heads A and B have different head gap azimuth angles, the azimuth angles of the heads A nad A′, and those of the heads B and B′ are made equal to each other. The reproduced signal from the heads A′ and B′ is supplied to the other fixed contact b of the change-over switch 35, and the signal produced at the movable contact c of the change-over switch 35 is supplied through the playback amplifier 17 to the signal processor 14, in which it is reconverted into digital data. The digital data from the signal processor 14 is supplied through the I/O circuit 13. Although not shown, the signal processor 14 includes a circuit for generating error-detecting and error-correcting codes an error-detecting circuit and an error-correcting circuit using the above-mentioned codes. A common computer circuit is employed for generating the error-correcting code and for correcting errors using the error-correcting code. Accordingly, upon recording, the error-correcting circuit is disabled when the error-detecting code and the errorcorrecting code generating circuit is operated. The error-detecting circuit can be used independently. In consequence, upon recording, the signal reproduced by the heads A′ and B′ is supplied through the change-over switch 35 and the playback amplifier 17 to the signal processor 14, for the detection of errors, as described above. In this case, if a detected error cannot be fully corrected by the error-correcting circuit upon reproduction, the error-detected signal is supplied to the system control circuit 18, under control of which the same data is re-recorded. To be specific, when data N, N+1, N+2, ... each corresponding to one frame, as shown in Figure 13A, are supplied from the controller 2 to the DAT 1, these data are converted in accordance with the DAT format as shown in Figure 13B, and then recorded on the tape 12 by the heads A and B. The recorded signals are reproduced by the heads A′ and B′, and then detected for error as shown in Figure 13C. Therefore, any error in the recorded data is detected after three frames. Accordingly, when the error is detected in the above signal processor 14, the signal from the system control circuit 18 is supplied to the microcomputer 22. Then, the DMA circuit 23 is controlled to allow the buffer memory 24 to read out again the immediately preceding three frames of data. Thus, when an error is detected in the data N as shown in Figure 14, data N are read again after the data N+1 and N+2 have already been read out, data N in which the error was detected are recorded again, and then data N+1 and N+2, ... are recorded. In this case, since the data N+1 and N+2 are also repetitively recorded, it is not necessary to again detect for errors in the re-recorded data N+1 and N+2. When the DAT 1 is used as a data streamer for a computer, it is necessary to record the file mark and the end signal indicative of the section of data derived from the computer. In that case, in order for the file mark to be searched with ease, it has been proposed that the end signal and the file mark be recorded for one frame. However, in such a case, if data FM forming, for example, the file mark frame is directly recorded just after the last data X which forms the above-mentioned frame, when an error is detected from the data X or previous data, the data FM of file mark frame is repeatedly recorded. Therefore, an arbitrary signal period of two frames is provided between the last data X and the file mark frame FM as shown in Figure 15A. This arbitrary signal period may be formed by repeatedly recording the invalid data or the last data X under the control of the microcomputer 22 in the controller 2. Thus, even if an error is detected in the data X or X-1, the data FM of the file mark frame can be prevented from being recorded repeatedly, as shown in Figures 15B and 15C. Upon reproduction, the signal reproduced from the tape 12 by the heads A and B is supplied to the signal processor 14, in which it is reconverted into data corresponding to an audio signal. If an error is detected from the reproduced data, the tape 12 is not immediately rewound and reproduced again, because there is a possibility that the same data are recorded repeatedly as described above. However, if data N+3 are reproduced before correct data are reproduced as data N, or data such as the file mark or the like are reproduced before correct data are reproduced as data X and X-1, the tape 12 is immediately rewound and reproduced again. In this case, there remains a possibility that correct data can be obtained from the frame in which data with a detected error are recorded. Moreover, these data are supplied through the I/O circuit 13 to the controller 2. In the controller 2, data written in the buffer memory 24 through the I/O circuit 25 are read through the DMA circuit 23 and then written in the HDD 6 via the bus 3. Since the original recorded signal is reproduced by the head A′ from the track recorded by, for example the head A and one portion of which is erased by the recording by the head B and then checked, the recorded signal can always be checked accurately without being affected by the disturbed movement of the tape 12. Thus, by rerecording using the thus detected signal, it is possible to record data with high reliability. The reproducing and detecting heads A′ and B′ are not necessary formed with high accuracy. On the contrary, even if the accuracy is made low, it is still possible to check the data under more strict conditions. Further, the difference in level between the heads A′ and B′ is not limited to the above example of 1.75 Tp, but may be changed freely in order to afford more strict conditions. Furthermore, the difference in level between the heads A′ and B′ may be changed with the angular distance between the heads A and A′, and B and B′.

Claims: A digital data signal recorder (1) comprising: head means (11) for recording a digital data signal in a track (Ta, Tb) on a recording medium (12); means (19) for transporting the recording medium (12) past the head means (11); means (23, 22) for detecting invalid data in the digital data signal; and means (22, 14) controlled by the detecting means (23, 22) for recording in another part of said track (Ta, Tb) a signal indicating that the recorded data are invalid; characterized in that: said head means (11) is a rotary head means (11), and said track (Ta, Tb) is an oblique track (Ta, Tb); said medium transport means (19) is controllable to have a normal speed recording mode and a high speed mode in which the recording medium (12) is transported past said rotary head means (11) at a higher rate than in the normal speed recording mode; and means (18, 21, 22) is provided for recording on the recording medium (12), at the end of a recording, a predetermined end signal for a period having a duration which can be detected during the high speed mode, for detecting a start portion of said end signal at the next recording operation, and for carrying out over-write recording on the recording medium (12) from said detected start portion thereby overwriting the rest of said end signal. A data recorder (1) according to claim 1 comprising means (18, 21, 22) for recording on the recording medium (12), just before said end signal, a signal indicating the end of the recording. A data recorder (1) according to claim 1 or claim 2 wherein the data recorder (1) is a digital audio tape recorder (DAT) including: a pair of rotary recording heads (A,B); a recording amplifier (15); a playback amplifier (17); switching means (16) for selectively connecting the heads (A, B) either to the input of the playback amplifier (17) or to the output of the recording amplifier (15); digital signal processor means (14) for receiving input data, converting it into a predetermined DAT format, outputting the DAT formatted data to the input of the recording amplifier (15), and for receiving DAT formatted data from the output of the playback amplifier (17), converting it from the DAT format to digital data and outputting the digital data; and a system control circuit (18) connected to the heads (A, B), said tape transport means (19), said switching means (16) and said digital signal processor means (14) for controlling the operations thereof. A data recorder (1) according to claim 3 further comprising a microcomputer (22), protocol control means (21) for interchanging data and control signals between an external computer (5) and the microcomputer (22), direct memory access means (23) connected to the protocol control means (21) and further connected to and controlled by the microcomputer (22), buffer memory means (24) connected to the direct memory access means (23), and input/output means (25, 13) connected between the buffer memory (24) and the digital signal processor (14), and wherein the system control means (18) and the microcomputer (22) are interconnected to exchange control signals. A method of recording a digital data signal in a track (Ta, Tb) on a recording medium (12), the method comprising the steps of: transporting the recording medium (12) relative to head means (11); detecting invalid data in the digital data signal; and in response to said detection of invalid data, recording in another part of said track (Ta, Tb) a signal indicating that the recording data are invalid; characterized by: said head means (11) being a rotary head means (11) and said track (Ta, Tb) being an oblique track (Ta, Tb); controlling said recording medium (12) in a normal speed recording mode and a high speed mode in which the recording medium (12) is transported past said rotary head means (11) at a higher rate than in the normal speed recording mode; and recording on the recording medium (12), at the end of a recording, a predetermined end signal for a period having a duration which can be detected during the high speed mode, detecting a start portion of said end signal at the next recording operation, and carrying out overwrite recording on the recording medium (12) from said detected start portion thereby overwriting the rest of said end signal. A method according to claim 5 further comprising the step of recording on the recording medium (12) just before the end signal, a signal indicating the end of the recording. A method according to claim 5 or claim 6 further comprising the steps of: providing reproducing head means located at positions downstream of a pair of rotary recording heads (A, B) of said head means (11); detecting in the outputs of said reproducing heads an error in the recorded signal, and recording on the recording medium (12) a signal whose content is the same as that in the original signal corresponding to the recorded signal in which the error was detected.

Inventors: INAZAWA, YOSHIZUMI C/O PATENTS DIVISION, ISHIBASHI, HIROSHI C/O PATENTS DIVISION, OZAKI, SHINYA C/O PATENTS DIVISION, YAMADA, MASAKI C/O PATENTS DIVISION
Applicants: SONY CORPORATION
Application year: 1987
Main classification: G11B20
IPC codes: G11B5, G11B27, G11B20, G11B15