Bi-level image display signal processing apparatus

Abstract: An image signal processing apparatus for converting step-gradation density values (I xy ) of successive picture elements to bi-level values (P xy ) for display by a bi-level display device, in which a bi-level error (E xy ) between a bi-level value determined for a picture element and an appropriate density value for the element is apportioned among a set of peripherally adjacent picture elements (A to D) by computing a corresponding set of error apportionment values (G A to G D ), and in which a difference between the sum total of these apportionment values and the bi-­ level error is derived, and error apportionment is modified such as to eliminate the effects of this difference. Improved reproduction is thereby attained of image regions which are of uniformly high density or low density.

Description: A requirement has arisen in recent years for high-quality reproduction of both printed images and step gradation images (for example an image representing a continuous-tone image as a plurality of step gradation density values) by utilizing a bi-level type of display device such as a gas plasma dot-matrix display which is inherently capable of generating only two levels of display density. This is achieved by generating a spatial gray scale display image. However problems are presented by the prior art methods proposed for implementing such reproduction. With such a bi-level display device, each picture element generated by the display can be set (e.g. as an element of a dot matrix) in either a light or a dark state. There have been various proposals for implementing pseudo-continuous tone reproduction by such display devices by employing a spatial gray scale, which are based on setting a relatively high proportion of picture elements of the display in the light state within a display region which is to represent a light (i.e. low-density) region of the original image, and a high proportion in the dark state in the case of a dark (i.e. high-density) region of the original image. The most well-known method of providing such pseudo-continuous tone reproduction is the dither technique, whereby a step gradation representation of a continuous tone image is reproduced on the basis of numbers of dots within each of predetermined areas of the continuous tone image, by utilizing a dither matrix. Threshold values of the dither matrix are compared with the level of an input signal, one picture element at a time, to thereby execute bi-level image conversion processing. However this method has the disadvantage that the step gradation reproduction characteristic and the resolution of the image that is obtained will both depend directly upon the size of the dither matrix, and have a mutually incompatible relationship. Moreover with the dither technique, it is difficult to avoid the generation of moire patterns, particularly when printed images are reproduced. A method has been proposed in the prior art which is highly effective in overcoming these problems of the dither method. This is the "error diffusion" method, which has been proposed by R. Floyd and L. Steinberg under the title "An Adaptive Algorithm for Spatial Gray Scale", published in the SID 75 Digest, pp 36-37. The basic principles of the proposed method are as follows. To determine whether a picture element of the input signal is to be displayed at the dark or at the light level in the image generated by the bi-level display device, the corresponding level of the input image signal is compared with a threshold value, and a light/dark decision thereby made. The density value (i.e. completely dark or completely light) which is thereby determined for that picture element will in general be in error with respect to the desired density of that element, i.e. with respect to the density of the corresponding picture element in the original image. This error is referred to in the following as the bi-level conversion error. However with the error diffusion method, the effect of this error are substantially reduced by modifying (in accordance with the value of the error) the respective values of desired density to be subsequently used in processing respective ones of a specific set of picture elements which are positioned peripherally adjacent to the object picture element, and have not yet been processed. This modification is performed by apportioning the value of error obtained for that object picture element among these peripheral picture elements, with the error being apportioned in accordance with predetermined fixed factors. Such factors are referred to in the following as apportionment factors. The term "object picture element" as used herein has the significance of a picture element which is currently being processed, to determine a corresponding bi-level display image value, with data being utilized in that processing which have been obtained beforehand during processing of preceding picture elements. The error diffusion method is superior to the dither method with regard to image resolution and the reproduction characteristic for a step gradation source image, and enables the degree of generation of moire patterns to be made very small even when a printed image is being reproduced. However in the case of reproduction of an image which has only small amounts of changes in density, such as a computer-generated image having areas of extremely uniform density, the error diffusion method produces regions of texture in the reproduced image. This texture is inherent to the error diffusion method, and for this reason the error diffusion method has not been widely adopted. The reason for generation of this texture is that a fixed relationship is continuously maintained between an object picture element and the aforementioned set of picture elements which are disposed peripherally adjacent to the object picture element, and fixed values are also maintained for the respective proportions by which the bi-level conversion error of the object picture element is apportioned among these peripheral picture elements. Furthermore, if it is attempted to produce a practical type of digital computation processing circuit for implementing this prior art error diffusion method, it is found that the sum of the aformentioned error apportionment values which are generated during processing of each picture element is not equal to the corresponding bi-level error which is computed for that picture element. This is due to inevitable inaccuracies which arise in the process of computing these error apportionment values, due to discarding of low-significance bits of certain computation results. As a result, the entire bi-level error is not correctly apportioned among the picture elements which are peripherally adjacent to the object picture element, so that all of the possible step gradation density levels of the input signal cannot be properly reproduced in the final image. This is especially true when the input signal level represents a high value or a low value of image density, and hence the range of step gradation image density values which can be reproduced by the prior art error diffusion method is made narrow. It is a further disadvantage of the prior art is that a plurality of respectively different computations must be executed consecutively in order to process each picture element, so that it is difficult to achieve a high speed of image processing. It is an objective of the present invention to provide an image signal processing apparatus which overcomes the disadvantages of the prior art error diffusion method described above, and which provides a display image having high resolution and an excellent step gradation reproduction characteristic, with only very small amounts of moire pattern being produced even when the source image is a printed image, and with no texture being generated even in image regions which are of highly uniform density. The present invention relates to an image signal processing apparatus for receiving an input signal comprising successive digital level values each representing a step gradation density level of a corresponding picture element of a source image, to produce a bi-level image signal by sequentially converting these level values to corresponding bi-level values in respective processing steps, with an error between the bi-level value derived for each of the picture elements and a required density level for that picture element being apportioned among a set of peripherally adjacent picture elements which have not yet been processed. According to the present invention there is provided an image signal processing apparatus for sequentially processing input level values representing respective density levels of picture elements to produce corresponding bi-level values, including error memory means for holding an accumulated error for an object picture element in one of a set of memory locations respectively corresponding to said object picture element and to a set of picture elements which have not yet been processed and are peripherally adjacent to said object picture element, input correction means for adding an input level value of said object picture element to said accumulated error for said object picture element to thereby produce a corrected input level value, bi-level conversion means for comparing said corrected input level value with a predetermined level value to thereby determine a bi-level value for said object picture element, and difference computation means for obtaining a bi-level error which is a difference between said corrected input level value and said bi-level value determined for said object picture element, characterised in that it further comprises apportionment factor generating means for generating apportionment factors for apportioning said bi-level error among said set of picture elements which have not yet been processed and are positioned at the periphery of said object picture element; error apportionment value computing means for computing, based on said bi-level error of said object picture element and on said apportionment factors, a set of error apportionment values respectively corresponding to said set of picture elements which have not yet been processed and are positioned at the periphery of said object picture element; residual error computing means comprising means for computing a sum total of said error apportionment values, means for subtracting said bi-level value from said sum total to obtain said residual error, and means for apportioning said residual error as a set of residual error apportionment values by utilising respective factors which have been predetermined for respective ones of said set of unprocessed picture elements positioned at the periphery of the object picture element; error updating means for combining said set of error apportionment values with said residual error, adding respective ones of a set of results obtained thereby to respective accumulated error values which have been stored previously at respectively corresponding locations in said error memory means, and for storing addition results obtained thereby in said error memory means as updated accumulated error values; and apportionment value computing means for computing respective apportionment values for said set of unprocessed picture elements positioned at the periphery of the object picture element, by adding to each of said error apportionment values a corresponding one of said residual error apportionment values wherein said apportionment values are supplied to said error updating means for use in executing said updating processing. The present invention will be further described hereinafter with reference to the following description of exemplary embodiments and the accompanying drawings, in which: Fig. 1 is a conceptual block circuit diagram of a first embodiment of an image signal processing apparatus according to the present invention; Figs 2(a) and 2(b) are block circuit diagrams to respectively show details of essential blocks in two different implementations of the first embodiment; Fig. 3 is a conceptual block circuit diagram of a second embodiment of an image signal processing apparatus according to the present invention; Figs. 4(a) and 4(b) are block circuit diagrams respectively showing details of essential blocks shown in Fig. 3; Fig. 5 is a conceptual block circuit diagram of a third embodiment of an image signal processing apparatus according to the present invention; and Fig. 6 is a block circuit diagram showing details of essential blocks shown in Fig. 5. Fig. 1 is a general block diagram showing the essential components of a first embodiment of an image signal processing apparatus according to the present invention. Numeral 104 denotes an input terminal to which is applied an input image signal l xy consisting of successive digital values constituting respective level values, each representing a step gradation density level of a corresponding picture element of a source image. The input image signal is derived by successively sampling the source image in units of picture elements, i.e. by successively sampling picture elements along each of a successively selected lines of picture elements, each line being aligned in a direction referred to in the following as the x-direction, the lines being successively arranged along a direction perpendicular thereto (referred to in the following as the y-direction), so that each picture element can be defined by x and y-coordinates. The apparatus functions to produce a a bi-level output value P xy in response to each input level value l xy , from an output terminal 106 by sequentially converting the input level values in respective processing steps. The bi-level output values that are thus produced can each represent either of two values, designated as 0 and R in the following, corresponding to a low and a high density (i.e. light and dark state) respectively of a bi-level display image produced on the basis of these bi-level values. An error between the bi-level value derived for a picture element and the density level which is actually appropriate for that picture element (defined as described hereinafter) is apportioned among a set of peripherally adjacent picture elements which have not yet been processed. In Fig. 1, the display coordinates of an object picture element (i.e. a picture element for which image processing is currently being executed to generate a corresponding bi-level output value) are designated as (x,y). Reference numeral 101 denotes an error memory section, used to store values of accumulated error as described hereinafter. Numeral 103 denotes a location in the error memory section 101 in which is stored the accumulated error value for the object picture element, the object picture element position being indicated by the * symbol, and numeral 102 denotes a storage region of error memory 101 containing a set of memory locations respectively corresponding to positions of a set of picture elements (designated as A, B, C and D) that have not yet been processed and are positioned adjacent to the periphery of the object picture element. Each picture element is processed during an interval of fixed duration, synchronized with a sync signal. The picture element at position A is processed to generate a corresponding bi-level value immediately following processing of the object picture element, i.e. processing of successive picture elements takes place (in the x-direction) from left to right as seen in Fig. 1, and picture element positions D, C and B will be successively processed during scanning of the next line of picture elements, i.e. after one line shift in the y-direction has occurred. Numeral 105 denotes an adder which amends the input signal level I xy by adding thereto an accumulated error S xy (whose value is determined by a combination of accumulated error values as described hereinafter) to produce a corrected input level I' xy for the object picture element, i.e. I' xy = I xy + S xy . Numeral 107 denotes a terminal to which is applied a threshold level which in this embodiment is equal to R/2, and 108 denotes a device such as a comparator, for executing bi-level conversion of the input level I' xy , by comparing the level I' xy with the fixed threshold value R/2, to produce as output a bi-level value P xy at the R level if I' xy > R/2, and otherwise producing P xy at the 0 level. Numeral 109 denotes a subtractor, for computing a difference between the corrected input level I' xy and the output bi-level value P xy to thereby derive a bi-level conversion error E xy (i.e. E xy = I' xy - P xy ) for the object picture element. The components described above, and their functions, might be envisaged on the basis of the published matter concerning the error diffusion method described hereinabove. The novel features of this embodiment of the present invention reside in an error apportionment value computation section 110, an apportionment factor generating section 111, an error updating section 112, a residual error computation section 113 and an apportionment value computation section 114, which are described in detail in the following. The apportionment factor generating section 111 has stored therein beforehand a set of apportionment factors K A to K D , and supplies these apportionment factors to the error apportionment value computation section 110, for apportioning the bi-level error E xy of the object picture element among the picture element positions A to D of the peripheral picture element region 102. The error apportionment value computation section 110 operates in synchronism with a sync signal which is synchronized with the intervals of processing successive picture elements, and utilizes the bi-level error E xy for the object picture element (produced from the difference computation section 109) and the apportionment factors K A to K D to derive a set of error apportionment values G A to G D for the picture element positions A, B, C and D within the peripheral picture element region 102, employing equations (1) below. The error apportionment value computation section 110 supplies these error apportionment values G A to G B to the error updating section 112 and the residual error computation section 113. The residual error computation section 113 functions to derive, using equation (2) below, a residual error J B which is the difference between the bi-level error E xy and the sum total of the error apportionment values G A to G D . In addition, the residual error J xy is multiplied by each of the factors A A to A D , as shown in equations (5) below, to derive respective residual apportionment values RZ A to RZ D . The residual apportionment values RZ A to RZ D thus obtained are output to the apportionment value computation section 114 (described hereinafter), which functions to add the error apportionment values G A to G D from the error apportionment value computation section 110 to the residual apportionment values RZ A to RZ D respectively, and to output the results as respective apportionment values H A to H D , to the error updating section 112. The error updating section 112 operates in synchronism with the aforementioned sync signal, and receives the apportionment values H A to H D from the apportionment value computation section 114, reads out a set of accumulated errors S A ', S B ', S C ', S D ' which had been derived and stored in the memory device 101 during previously executed picture element processing operations at locations respectively corresponding to the picture elements of positions A, B, C and D in the peripheral picture element region 102 of error memory section 101, and derives new values of accumulated error S A to S D by utilizing equations (4) below. In addition, the error updating section 112 performs updating processing by writing into the error memory section 101 the new values of accumulated error S A to S D , at locations respectively corresponding to the picture element positions A to D. Fig. 2(a) shows specific configurations for the error apportionment value computation section 110, the apportionment factor generating section 111, the error updating section 112, the residual error computation section 113 and the apportionment value computation section 114 respectively shown in Fig. 1. In Fig. 2(a), the apportionment factor generating section 111 incorporates a memory section 201 having stored therein beforehand (prior to the commencement of image processing) a set of apportionment factors K A to K D . The memory section 201 can consist for example of a ROM (read-only memory) into which the apportionment values K A to K D have been written beforehand. The error apportionment value computation section 110 includes a set of multipliers 202a to 202d, for deriving the respective products of the bi-level error E xy and each of the apportionment factors K A to K D , as the error apportionment values G A to G D . These error apportionment values are supplied to the apportionment value computation section 114 and the residual error computation section 113. The residual error computation section 113 computes a value of residual error J xy , which is the difference (derived by a subtractor 204) between the bi-level error E xy and the sum total of the error apportionment values G A to G D from the error apportionment value computation section 110 (this sum being derived by adders 203a to 203c). The residual error J xy is supplied to a residual apportionment value computation section 205, which includes a memory having a table of values stored therein, which contains the set of residual factors A A to A D of equation (3) above, and multipliers for multiplying the residual error J xy by each of these residual factors obtained from the table of values. The residual apportionment value generating section 205 thereby produces a set of residual apportionment values RZ A to RZ D in accordance with the residual error J xy , which are used by the apportionment value computation section 114 for apportioning the residual error J xy among the peripheral picture element positions A to D respectively. The apportionment value computation section 114 adds the error apportionment values G A to G D from the error apportionment value computation section 110 to the residual apportionment values RZ A to RZ D respectively, in a set of adders 206a to 206d, and thereby produced respective apportionment values H A to H D as outputs, which are applied to the error updating section 112. The error updating section 112 operates in synchronism with a sync signal 215 which is applied to a sync input terminal 107 and constitutes the sync signal described hereinabove which is synchronized with successive picture element processing intervals. The error updating section 112 functions to add (in an adder 208a) the apportionment value H A to the accumulated error S' A corresponding to the picture element position A, which has been derived in a previously executed picture element processing operation and stored in the error memory section 101, and stores the result of the addition temporarily in an internal register 209a (R A ) to be used as the accumulated error S xy in the next picture element processing operation (i.e. the operation in which the picture element of position A in region 102 becomes the object picture element, and is processed). The apportionment value H B which is produced in the current picture element processing step, during processing of the object picture element, is temporarily stored (i.e. to be read out in the succeeding picture element processing interval) in an intemal register 209b (R B ) as the accumulated error S B for the picture element position B. The apportionment value H C is added (in an adder 208b) to the data S B ' which had been temporarily stored in the internal register 209b during the preceding picture element processing operation, and the result is stored in an internal register 209c (R C ) as the accumulated error S C for the picture element position C. The apportionment value H D is added to data S C ' which had been temporarily stored in an internal register 209c (R C ) during processing of the preceding picture element, and the result is stored in a memory unit of the error memory section 101 at a location corresponding to the picture element position D, as the accumulated error S D for that picture element position. It can be seen that with the configuration for the error updating section 112 described above, the only accessing of the memory unit in the memory section 101 consists of read-out access corresponding to the picture element position A and write-in access corresponding to the picture element position D. Each of the internal registers 209a etc. can be configured as simple latch circuits, for example. Thus, the memory section 101 can be easily implemented. Fig. 2(b) shows another specific configuration for the apportionment factor generating section 111, the error apportionment value computation section 110, residual error computation section 113 and memory section 205, which can be utilized if the following values are adopted for the apportionment factors which apportion the bi-level error E xy among the the set of unprocessed picture elements positioned at the periphery of the object picture element: In the above, i and j denote respective coordinates along the horizontal and vertical directions, considering the set of positions in region 102 and the object picture element position, as a matrix array. In Fig. 2(b), the only blocks which differ from those of Fig. 2(a) are the residual error computation section 113 and error updating section 112 which are described in the following, while the apportionment value computation section 114 of the arrangement shown in Fig. 2(a) is eliminated. In the embodiment of Fig. 2(b), the bi-level error E xy is a digital value consisting of more than three bits. The residual error computation section 113 contains a line selector 210 which extracts the three least significant bits of the data representing E xy , and reapportions these bits as residual apportionment values RV A , RV C and RV D . The error updating section 112 is substantially identical to that of Fig. 2(a), however the adders 208a, 208b and 208c which compute the new accumulated errors S A to S D , are different in that a "carry" input terminal (designated as C) of each of these adders is utilized. The new accumulated errors S A to S D are obtained by adding the error apportionment values G A to G D to respective ones of the accumulated errors S A ', S C ' and S D ' which were derived during previous picture element processing operations, and to the residual apportionment values RV A , RV C and RV D respectively from the residual error computation section 113. Each of the residual apportionment values RV A , RV C and RV D consists of a single data bit, these being respectively applied to the "carry" input terminals C of the adders 208a, 208b and 208c. This enables the apportionment value computation section 114 shown in Fig. 2(a) to be eliminated. In this way, a practical circuit can be implemented, by utilizing the apportionment factor values set out in equation (6) above, whereby the computation operations and circuits can be substantially simplified by comparison with the system of Fig. 2(a). With the first embodiment of the present invention, as described above, a bi-level error of an object picture element is apportioned as error apportionment values among a set of picture elements which are peripherally adjacent to that object picture element, with a residual error (which is the difference between the bi-level error and the sum total of the error apportionment values) being derived and reapportioned as a set of residual apportionment values. As a result, a problem which arises with a digital computation type of processing circuit for practical implementation of the error diffusion method, i.e. the problem of deterioration of the continuous tone reproduction characteristic when the input signal level represents a low image density or a high image density, is substantially overcome. Fig. 3 is a general block diagram of a second embodiment of an image signal processing apparatus according to the present invention. The essential feature of this embodiment, as for the first embodiment, is that of elimination of the effects of an error resulting from digital computation of the error apportionment values by which the bi-level error E xy of the object picture element is apportioned among a set of peripherally adjacent picture element positions, i.e. a residual error whereby the sum total of these error apportionment values is not equal to the value of the bi-level error. In Fig. 3, each of blocks 101 to 111 is essentially identical to the correspondingly numbered block in Fig. 1, described hereinabove, so that further description of these will be omitted. The features of the second embodiment which are different from those of the first embodiment reside in an error updating section 112 and a residual error computation section 113, described in the following. The residual error computation section 113 functions to derive, using equation (6) below, the residual error J B which is the difference between the sum total of the error apportionment values G A to G D and the bi-level error E xy . The residual error J B is supplied to the error updating section 112. The error updating section 112 functions in synchronism with a sync signal (synchronized with successive picture element processing operations, as described for the first embodiment) to receive the error apportionment values G A to G D from the error apportionment value computation section 110 and the residual error J B from the residual error computation section 113 and to read out accumulated errors S A ', S C ', S D ' which were obtained in previously executed picture element processing operations and stored in a memory unit at locations corresponding to the picture element positions A, C, D in the error memory section 101, and derives new values of accumulated errors S A to S D by using equations (7) below. In addition, the error updating section 112 performs updating processing by writing into the error memory section 101 the new accumulated errors S A to S D , at locations respectively corresponding to the picture element positions A to D. In the above description the residual error J B is obtained by using equations (7) on the basis of picture element position B within the peripheral picture element region 102. However it would be equally possible to use any of the other picture element positions A, B, C or D within that region for this purpose. In the following, it will be assumed that the picture element position B is used in equations (7). It should also be noted that it would be equally possible to temporarily store the residual error J B within an internal register, and to read out this residual error at the time of processing the next picture element and add the residual error to the error apportionment value for any one of the picture element positions A', B', C' or D'. Fig. 4(a) shows a specific configuration for the error apportionment value computation section 110, the apportionment factor generating section 111, the error updating section 112 and the residual error computation section 113. With this configuration, the residual error J B is temporarily stored in an internal register, to be used in computing a value of accumulated error for the peripheral picture element position B, as described in the following. The apportionment factor generating section 111 includes a memory section 201 having stored therein beforehand (i.e. prior to the commencement of image processing) a set of apportionment factors K A to K D . The memory section 201 can consist for example of a ROM (read-only memory). The error apportionment value computation section 110 derives the respective products of the bi-level error E xy and each of the apportionment factors K A to K D (by a set of multipliers 201a to 201d) as the error apportionment values G A to G D , and outputs these error apportionment values to the error updating section 112 and the residual error computation section 113. The residual error computation section 113 computes the residual error J B , which is the difference (computed by a subtractor 204) between the bi-level error E xy and the sum total of the error apportionment values G A to G D from the error apportionment value computation section 110 (computed by a set of adders 203a to 203c) and temporarily stores the result in an internal register 401 (R J ), until the succeeding picture element processing operation. A residual error J B ' which had been derived and stored in the internal register 401 at the time of processing the preceding picture element is outputted at this time to the error updating section 112. The error updating section 112 operates in synchronism with a sync signal 214, applied to a sync input terminal 207, which is synchronized with successive picture element processing operations, and adds (by an adder 402a) the error apportionment value G A to the accumulated error S A ' for the picture element position A, read out from the error memory section 101, and temporarily stores the result in an internal register 403a (R A ) to be used as the accumulated error S xy during processing of the succeeding picture element. In addition, the accumulated error for picture element position B is added (by an adder 402b) to the residual error J B ' which was temporarily stored in the residual error computation section 113 during processing of the preceding picture element, and stores the result as an accumulated error S B in the internal register 403b (R B ). The error apportionment value G C is added (by an adder 402c) to the data which had similarly been stored in the internal register 403b (R B ), and the result is temporarily stored in the internal register 403c (R C ) as the accumulated error S C for the picture element position C. The error apportionment value G D is added (by an adder 402d) to the data which had been temporarily stored in the internal register 403c (R C ), and the result is stored at a location in a memory unit of the error memory section 101 corresponding to the picture element position D, as the accumulated error S D for the picture element position D. Thus, as for the first embodiment, the only accessing of the memory unit of the memory section 101 consists of read-out access corresponding to the picture element position A and write-in access corresponding to the picture element position D, so that a practical apparatus can be readily configured. Fig. 4(b) shows a specific configuration for the residual error computing section 113, for the case in which the apportionment factors K ij for apportioning the bi-level error E xy among the picture elements which are peripherally adjacent to the object picture element are respectively determined to be as follows: In Fig. 4(b) a bi-level error E xy ' consists of the least significant three bits of the bi-level error E xy , and is inputted to a decoder 411 which thereby produces as output the residual error J B as a 2-bit data value. The relationships between the values of E xy ' and J B established by this decoder 411 are as shown in the following table. E xy ' J B 111 3 110 2 101 2 100 1 011 2 010 1 001 1 000 0 The residual error J B is temporarily stored in a register 412 and is read out during processing of the next picture element, as the residual error J B '. In this way, by using a set of apportionment factors as specified in equation (8), a practical circuit configuration can be realized without the need for complex computations. With the second embodiment of the present invention, as described in the above, a bi-level error of an object picture element is apportioned as error apportionment values among a set of picture elements which are peripherally adjacent to that object picture element, with the difference between the bi-level error and the sum total of the error apportionment values being derived during each picture element processing operation and used for correction to compensate for that error during a succeeding picture element processing operation. As a result, the problem which arises with a processing circuit having a digital computation type of processing circuit for practical implementation of the error diffusion method, i.e. the problem which arises with respect to the continuous tone reproduction characteristic for input signal levels representing low values of image density or high values of density due to the effects of the error, is substantially eliminated. Fig. 5 is a conceptual block diagram of a third embodiment of an image signal processing apparatus according to the present invention. In Fig. 5, numerals 101 to 109 denote blocks which are similar to the correspondingly numbered blocks in the embodiment shown in Fig. 1, so that further description of these will be omitted. The circuit of Fig. 5 differs from that of Fig. 1 with respect to the respective configurations of the apportionment value computation section 114, apportionment factor generating section 111, error updating section 112 and bi-level error apportioning section, which will be described in detail in the following. The bi-level error E xy is obtained as a digital value composed of more than n bits, where n is a fixed integer. The bi-level error apportionment section 115 functions to extract the n least significant bits of E xy and output these n bits as a bi-level error E xyl to the error updating section 112, and also sets each of the n least significant bits of the bi-level error E xy to zero and outputs the resultant converted value of E xy as a bi-level error E xyu to the apportionment value computation section 114. The apportionment factor generating section 111 has stored therein beforehand a set of apportionment factors for a set of unprocessed picture elements positioned at the periphery of the object picture element, and outputs these apportionment factors K A to K D to the apportionment value computation section 114, for apportioning the bi-level error E xyu among these picture elements A to D within the peripheral picture element region 102. The apportionment value computation section 114 operates in synchronism with a sync signal which is synchronized with successive picture element processing intervals, and utilizes the bi-level error E xyu for the object picture element (produced from the bit apportioning section 109) and the apportionment factors K A to K D to derive a set of error apportionment values G A to G D for the picture element positions A, B, C and D within the peripheral picture element region 102 of the error memory section 101, employing equations (9) given below. The apportionment value computation section 114 thereby produces the error apportionment values G A to G D as outputs, and supplies these to the error updating section 112. The error updating section 112 operates in synchronism with the aforementioned sync signal, and functions to derive new values of accumulated error S A to S D respectively corresponding to the picture element positions A, B, C, D within the peripheral picture element region 102 of the error memory section 101, based on the error apportionment values G A to G D , accumulated error values S A ', S C ' and S D ' which were derived and stored in previously executed processing operations, and the bi-level error E xyl produced from the bi-level error apportioning section 115, by employing equations (10) below: In this embodiment, the bi-level error E xyl is added to the error apportionment value for picture element position B of the peripheral picture element region 102. However it would be equally possible to add E xyl to any one of error apportionment values for the respective picture element positions A, B, C or D. In the following it will be assumed that picture element position B is utilized. Fig. 6 shows specific configurations for the apportionment value computation section 114, the apportionment factor generating section 111, the error updating section 112 and the bi-level error apportioning section 115. In this embodiment, the bi-level error E xyl is applied to the picture element position B, as described in the following. The apportionment factor generating section 111 includes a memory section 201 having stored therein beforehand (i.e. prior to the commencement of image processing) a set of apportionment factors K A to K D . The memory section 201 can consist for example of a ROM (read-only memory) having the apportionment factors written therein. The bi-level error apportioning section 115 includes a bit apportioning section 601 which functions to reset the n least significant bits of the bi-level error E xy to logic "0", with the resultant converted value of E xy being outputted as the bi-level error E xyu to the error apportionment value computation section 114, and a bit apportioning section 602 which functions to extract the n least significant bits of the bi-level error E xy and to output these as the bi-level error E xyl to the error updating section 112. The apportionment value computation section 114 multiplies each of the apportionment factors K A to K D by the bi-level error E xyu in a set of multipliers 603a to 603c, to thereby derive the error apportionment values G A to G D , and outputs these to the error updating section 112. The error updating section 112 operates in synchronism with a sync signal 214 applied to a sync input terminal 207 which is synchronized with successive picture element processing intervals, and adds the error apportionment value G A to the accumulated error S A ' for the picture element position A, read out from the error memory section 101 (this addition being executed by an adder 604a), and temporarily stores the result in an internal register 605a (R A ) to be used as the accumulated error S xy during processing of the succeeding picture element. The accumulated error for picture element position B is obtained by adding the bi-level error E xyl from the bi-level error computation section 115 to the error apportionment value G B for picture element position B (by an adder 604b), and storing the result as an accumulated error S B in the internal register 605b (R B ), until the next processing interval. The error apportionment value G C is added by an adder 604c to the data which had been temporarily stored in the internal register 605b (R B ) at the time of processing the preceding picture element, and the result is stored in the internal register 605c (R C ) as the accumulated error S C for the picture element position C, until the next processing interval. The error apportionment value G D is added by an adder 604d to the data which had similarly been temporarily stored in the internal register 605c (R C ), and the result is stored at a memory location in the error memory section 101 corresponding to the picture element position D, as the accumulated error S D for that picture element position. Due to the configuration for the error updating section 112 described above, the only accessing of the memory in the memory section 101 consists of read-out access corresponding to the picture element position A and write-in access corresponding to the picture element position B, so that a practical apparatus can be easily implemented. With the third embodiment of the present invention, as described in the above, the n least significant bits of the bi-level error E xy are extracted and apportioned to one of the picture element positions which is peripherally adjacent to the object picture element position, while in addition these n least significant bits of the bi-level error E xy are reset to logic "0" and the resultant value is apportioned among each of the remaining peripheral picture element positions in accordance with the respective apportionment factors for these positions. As a result, this embodiment effectively eliminates the effects of an error which arises due to the effects of discarding low-significance bits of the bi-level error E xy during computation of the error apportionment values G A to G D . Thus, the effective sum total of the error apportionment values used for apportioning the bi-level error E xy of the object picture element among the picture element positions peripherally adjacent thereto is made identical to that bi-level error. The embodiment thereby enables a practical integer computation type of processing circuit for implementing the error diffusion method to be realized, by considerably improving the step gradation reproduction characteristic for input signal levels which represent image regions of low density or high density.

Claims: An image signal processing apparatus for sequentially processing input level values representing respective density levels of picture elements to produce corresponding bi-level values, including error memory means (101) for holding an accumulated error (S XY ) for an object picture element in one of a set of memory locations respectively corresponding to said object picture element and to a set of picture elements which have not yet been processed and are peripherally adjacent to said object picture element, input correction means (105) for adding an input value of said object picture element to said accumulated error (S XY ) for said object picture element to thereby produce a corrected input level value, bi-level conversion means (108) for comparing said corrected input level value with a predetermined level value to thereby determine a bi-level value (P XY ) for said object picture element, and difference computation means (109) for obtaining a bi-level error (E XY ) which is a difference between said corrected input level value and said bi-level value determined for said object picture element, characterised in that it further comprises apportionment factor generating means (111) for generating apportionment factors for apportioning said bi-level error among said set of picture elements which have not yet been processed and are positioned at the periphery of said object picture element; error apportionment value computing means (110) for computing, based on said bi-level error of said object picture element and on said apportionment factors, a set of error apportionment values (G A,..., G D ) respectively corresponding to said set of picture elements which have not yet been processed and are positioned at the periphery of said object picture element; residual error computing means (113) comprising means (203a, 203b, 203c) for computing a sum total of said error apportionment values, means (204) for subtracting said bi-level value from said sum total to obtain said residual error, and means (205) for apportioning said residual error as a set of residual error apportionment values (RZ A,... RZ D ) by utilizing respective factors which have been predetermined for respective ones of said set of unprocessed picture elements positioned at the periphery of the object picture element; error updating means (112) for combining said set of error apportionment values with said residual error, adding respective ones of a set of results obtained thereby to respective accumulated error values which have been stored previously at respectively corresponding locations in said error memory means, and for storing addition results obtained thereby in said error memory means as updated accumulated error values; and apportionment value computing means (114) for computing respective apportionment values (H A,... H D ) for said set of unprocessed picture elements positioned at the periphery of the object picture element, by adding to each of said error apportionment values (G A,... G D ) a corresponding one of said residual error apportionment values (RZ A,..., RZ D ) wherein said apportionment values are supplied to said error updating means (112) for use in executing said updating processing. An image signal processing apparatus according to claim 1, wherein said error updating means comprises means (402b) for adding a predetermined one of said error apportionment values to said residual error and supplying a resultant sum value to said means for deriving the accumulated error.

Inventors: KUROSAWA TOSHIHARU, MARUYAMA YUJI, NAKAZATO KATSUO, TAKAHASHI KIYOSHI, TSUCHIYA HIROYOSHI, KUROSAWA, TOSHIHARU, MARUYAMA, YUJI, NAKAZATO, KATSUO, TAKAHASHI, KIYOSHI, TSUCHIYA, HIROYOSHI
Applicants: MATSUSHITA ELECTRIC IND CO LTD, MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1987
Main classification: H04N1
IPC codes: H04N1