Picture-in-picture television receivers

Abstract: A picture-in-picture television receiver is so arranged that the compression ratio of a sub-picture discrimination character (4) displayed on a sub-picture screen (Ss) relative to a main picture discrimination character (12) displayed on a main picture screen (Sm) is selected to be smaller than that of the sub-picture (Ss) relative to the main picture (Sm), whereby the sub-picture discrimination character (4) is displayed in a relatively large, easier-to-see form.

Description: This invention relates to picture-in-picture television receivers. A so-called picture-in-picture television receiver, in which a sub-picture screen is provided within a main picture screen such that pictures having different contents can be displayed on the main and sub-picture screens, respectively, in a picture-in-picture fashion, has been previously proposed. In this television receiver, television channels of the main picture and of the sub-picture, or the number of an external video signal input terminal, are displayed on a front panel of the television receiver using a display apparatus such as a light emitting diode (LED) display apparatus or the like. Alternatively, these numbers are displayed on the picture screen of the cathode ray tube. When these numbers, which are referred to herein as discrimination characters or picture discrimination indications, are displayed on the screen, they are displayed on the main picture screen together. The picture-in-picture television receiver is provided with a main tuner for selecting a video signal for the main picture screen and a sub-tuner for selecting a video signal for the sub-picture screen. In such a television receiver, it is preferable that the channel selection operations can be carried out independently in the main and sub-tuners. Thus, the discrimination characters of the contents of the picture, for example the characters of the channels selected, are independently carried out on the main and sub-picture screens in response to the respective channel selection operations. We have previously proposed such a picture-in-picture television receiver in which, each time that the content of a picture displayed on the main picture screen is changed, the discrimination characters of the contents of the pictures are made not only on the main picture screen but also on the sub-picture screen. This previously proposed picture-in-picture television receiver is disclosed in our European Patent Application Publication No. EP-A-0 229 526. However, when the picture discrimination characters are displayed on both the main and sub-picture screens, the picture to be displayed on the sub-picture screen is formed such that sampling lines and picture elements of the sub-picture video signal are selected and other lines and picture elements are thrown away or removed in response to the ratio between the sizes of the main and sub-picture screens. As a result, the sub-picture discrimination character on the sub-picture screen is very small so that the discrimination character becomes difficult to see from the normal viewing distance of the user. Japanese Patent Application Publication No JP-A-56-17583 discloses a conventional television receiver in which the size of a channel display can be controlled. Japanese Patent Application Publication No JP-A-61-194 982 discloses a television receiver comprising: (a) a video picture display device having a picture screen which is divisible into a main picture screen for displaying a picture represented by a first video signal and a sub-picture screen inset into the main picture screen for displaying a compressed picture represented by a second video signal; (b) a main picture circuit for selecting the first video signal from a plurality of video signals supplied by external sources and supplying the selected first video signal as the main picture screen video signal; (c) a sub-picture circuit for selecting the second video signal from a plurality of video signals supplied by external sources and supplying the selected second video signal as a sub-picture video signal for the sub-picture screen; (d) a composing circuit for composing the first and second video signals into a composite signal to be supplied to the picture display device; (e) a first adder for adding a first picture discrimination character signal to the first video signal whereby a first picture discrimination character is displayed as part of the picture on the main picture screen; and (f) a second adder for adding a second picture discrimination character signal to the second video signal whereby a second picture discrimination character is displayed as part of the picture on the sub-picture screen. The present invention provides a television receiver as just set forth, characterised by size control means for controlling the size of the second picture discrimination character as it is displayed on the sub-picture screen, the size control means being operative to cause the ratio of the size of the displayed second picture discrimination character relative to the size of the displayed first picture discrimination character to be larger than the ratio of the size of the picture displayed on the sub-picture screen relative to the size of the picture displayed on the main picture screen; and in that the second adder includes a clock oscillator controlling the position of the second picture discrimination character within the sub-picture screen, the second picture discrimination character being added to the second video signal prior to sub-sampling the second video signal to form the sub-picture screen. The size control means thus controls the size of the second picture discrimination character displayed on a sub-picture screen so that it becomes easy to see. The invention will now be further described, by way of illustrative and non-limiting example, with reference to the accompanying drawings, in which like references designate like elements and parts throughout, and in which: Figure 1 is a block diagram of a picture-in-picture television receiver in accordance with a preferred embodiment of the invention; Figures 2A to 2C are respective schematic representations used to explain reproduction of a main picture and a sub-picture in the television receiver embodying the invention; Figure 3 is a block diagram of a character display circuit of the television receiver embodying the invention; and Figures 4A to 4C are respective schematic representations used to explain the operation of the character display circuit shown in Figure 3. Figure 1 is a block diagram showing an overall arrangement of a television receiver embodying the invention. The television receiver includes a main television circuit MK and a sub-television circuit SK. A video signal supplied by the main television circuit MK causes a main picture to be displayed on the whole of a picture screen of a picture display device 18 such as a cathode ray tube (CRT) or the like, whereas a video signal supplied by the sub-television circuit SK causes a sub-picture to be displayed on a portion of the main picture screen in such a manner that the sub-picture is inset into the main picture. The main and sub-television circuits MK and SK include main and sub-tuners 5M and 5S, main and sub-video intermediate frequency circuits 6M, 6S and main and sub-video/chroma signal circuits 8M, 8S, respectively. The television receiver is provided with external video signal input terminals V1, V2 and V3 to which reproduced video signals (base band signals) from a video tape recorder (VTR) or the like can be supplied. Selection of the video signals from the external input terminals V1, V2 and V3, in place of the video signals from the tuners 5M and 5S, can be effected by main and sub-switching circuits 7M and 7S provided in the television circuits MK and SK. The signal selected by the switching circuit is then supplied to the picture display device 18 to be displayed on its picture screen. The sub-television circuit SK includes a video signal processor circuit 12 for displaying the sub-picture on the sub-picture screen of the picture display device 18. The video signal processor circuit 12 controls the kinds of sub-picture or sub-pictures (such as a live picture, a still picture, a step-by-step picture or the like), the number of sub-pictures, the position of the sub-picture on the main picture screen, and so forth. The expression "live picture" means that the displayed image is animated (moving) rather than static (still). The main and sub-television circuits MK and SK are provided with respective main and sub-character display circuits 19M and 19S which form main picture and sub-picture discrimination character signals (discrimination indicating signals), respectively, which cause picture discriminating characters "14", "4", respectively, to be displayed on the main picture screen and the sub-picture screen, respectively, in an inset fashion as shown in Figure 2B. Each character #14, #4 may, for example, comprise the channel identification (for instance the channel number) of a received television broadcast or the number of an external video signal input terminal. The television receiver includes a system control circuit or controller 20 which includes a microcomputer. Respective sections of the television receiver are controlled by the system control circuit 20 as will be explained in greater detail hereinafter. The circuit arrangement of the television receiver will now be described more fully. A television broadcast signal received by an aerial (antenna) AT is supplied to a distributor 1. The distributor 1 supplies the received signal through a switching circuit 3 to the main tuner 5M, without substantially attenuating the received signal, and also supplies a portion of the received signal to the sub-tuner 5S. The received signal portion is amplified by a high frequency amplifier 4 before it is applied to the sub-tuner 5S. Thus, the quality of the received signal at the main tuner 5M is maintained and, also, distribution loss of the sub-tuner 5S is compensated for. The switching circuit 3 selectively switches between the aerial input signal from the distributor 1, and a high frequency input signal from a descrambler used for receiving a cable television broadcast or the like which is supplied at an auxiliary input terminal 2, and supplies one of the signals to the main tuner 5M. A video intermediate frequency signal from the main tuner 5M is supplied to the main video intermediate frequency circuit 6M and a video intermediate frequency signal from a video detecting circuit thereof is supplied to the main switching circuit 7M which can be selectively switched between this video signal and the external video signals from the external video input terminals V1 to V3. One of the video signals selected by the switching circuit 7M is supplied to the main video/chroma signal circuit 8M. A monitor output terminal 26 is connected to the output side of the main switching circuit 7M. The main video/chroma signal circuit 8M generates red, green and blue colour signals R, G and B which are fed to a switching circuit 9. An audio intermediate frequency signal from the main video intermediate frequency circuit 6M is supplied to an audio circuit (incorporating a sound multiplexing decoder circuit) 28. An audio signal from the audio circuit 28 is supplied to a switching circuit 29 which can be selectively switched between this audio signal and external audio signals reproduced from a VTR or the like and supplied thereto from external audio signal input terminals A1, A2 and A3, respectively, corresponding to the external video signal input terminals V1, V2 and V3. One of the audio signals selected by the switching circuit 29 is supplied through a low frequency amplifier 30 to a loudspeaker 31. Though not shown, the low frequency amplifier and the loudspeaker may be duplicated so as to cope with a stereophonic audio signal. Horizontal and vertical synchronising signals from the main video/chroma signal circuit 8M are supplied to a deflection/high voltage circuit 27. A deflection signal and a high dc voltage from the circuit 27 are supplied to the picture display device 18. A video intermediate frequency signal from the sub-tuner 5S is supplied to the sub-video intermediate frequency circuit 6S and a video intermediate frequency signal from a video detecting circuit thereof is supplied to the sub-switching circuit 7S which selectively switches between this video signal and the external video signals from the external video signal input terminals V1, V2 and V3. A switch 25 effects selection between the video signal selected by the switching circuit 7S and the video signal from the main switching circuit 7M and supplies the chosen video signal to the sub-video/chroma signal circuit 8S. The sub-video/chroma signal circuit 8S generates red, green and blue colour signals R, G and B which are supplied to a matrix circuit 10 in which they are converted to a luminance signal Y and red and blue colour difference signals R - Y and B - Y, respectively which are then fed to an analog-to-digital (A/D) converter 13 in the video signal processor circuit 12. The A/D converter 13 is a time division type A/D converter as disclosed, for example, in published Japanese Patent Application Publication JP-A-60-44792. A digital signal from the A/D converter 13 is supplied to a memory 14 and written therein. The digital signal is read out from the memory 14 and then supplied to a digital-to-analog (D/A) converter 15 thereby to be converted to an analog signal. In the video signal processor circuit 12, sampling lines and picture elements of the sub-video signal are selected and other lines and picture elements are thrown away or removed in correspondence with the ratio between the sizes of the main picture screen and the sub-picture screen, for example 3 : 1, and the selected lines are displayed on the sub-picture screen as a sub-picture in a compressed state. The memory 14 has frame (or field) memory areas corresponding to the maximum number of displayable sub-pictures, for example, four frame memory areas. The memory 14 is controlled by a sub-picture control circuit 16 so as to specify the kinds of sub-picture or sub-pictures (such as a live picture, a still picture, a step-by-step picture and so on), the number of sub-pictures, the position of the sub-pictures on the main picture and the like. When the sub-picture is displayed as a live picture, that is a real moving picture, the video signal is alternately written in and read out from the memory 14 continuously and repeatedly; when the sub-picture is displayed as a still picture, the video signal is written in the memory 14 for a selected frame or field period and then read out from the memory 14 repeatedly; and when the sub-picture is displayed as a step-by-step picture, a plurality of video signals are written in the memory 14 at different times corresponding to different frames or field periods and then read out therefrom repeatedly (see Japanese Patent Application publication JP-A-56-27573). The number of the sub-picture screens inset into the main picture screen is determined on the basis of the number of memory areas in the memory 14 which are used. The contents or picture of the sub-picture screen can be a real moving picture, a still picture or a step-by-step picture based on the video signal from the sub-video/chroma signal circuit 8S or on the video signal from the main video/chroma signal circuit 8M. The switching of these video signals is carried out by the switch 25. The picture contents on the main picture screen and the sub-picture screen can be exchanged with each other by simultaneously switching the reception channels of the main and sub-tuners 5M and 5S or by simultaneously switching the main and sub-switching circuits 7M and 7S. The respective colour signals from the main/video chroma signal circuit 8M and the respective colour signals from the D/A converter 15 are supplied to the switching circuit 9 in which both groups of respective colour signals are switched at appropriate timing intervals such that the sub-picture screen is inset into one portion of the main picture screen at a selected predetermined position. The switching circuit 9 is controlled by the sub-picture control circuit 16, which is controlled by the system control circuit 20. The video signal from the switching circuit 9 is supplied to the picture display device 18. The main picture discrimination character signal, formed by the main character display circuit 19M, which could be a signal indicative of the main channel number, for example, is added to the video signal by an adder 17 connected between the switching circuit 9 and the picture display device 18. In this example, the adder 17 is interposed only in the transmission path of the green colour signal G to thereby superimpose a green picture discrimination character upon the main picture screen. It is of course possible for this picture discrimination character to be made by using other colours. The sub-picture discrimination character signal formed by the sub-character display circuit 19S, which could be indicative of the channel number selected by the sub-tuner 5S, for example, is added to the sub-video signal by an adder 11 connected between the matrix circuit 10 and the A/D converter 13. In this example, the adder 11 is interposed only in the transmission path of the luminance signal Y to thereby superimpose a white picture discrimination character on the sub-picture screen. However, it is possible for this picture discrimination character to be made by using other colours. Channel selections in the main tuner 5M and the sub-tuner 5S, respectively, are carried out by channel selection signals from the system control circuit 20. The switching circuits 3, 7M, 7S, 29 and the switch 25 are also selectively switched under the control of the system control circuit 20. The main and sub-video/chroma signal circuits 8M and 8S are subjected to blanking by the system control circuit 20 for a short period upon up and down scanning channel selection operation. Alternatively, such blanking may be carried out by a blanking switch that is provided at a stage before the picture display device 18. Further, main and sub-horizontal synchronising signals Hm and Hs from the main and sub-video intermediate frequency circuits 6M and 6S and main and sub-vertical blanking signals (vertical signals) Vm and Vs from the main and sub-video/chroma signal circuits 8M and 8S are supplied to the system control circuit 20. The main picture and sub-picture discrimination indicating signal circuits 19M and 19S and the sub-picture control circuit 16 are controlled by the system control circuit 20. A last-condition memory 21 stores, under the control of the system control circuit 20, the selected channels of the main and sub tuners 5M and 5S, the switch conditions of the switching circuits 7M and 7S, the control conditions of the sub-picture control circuit 16 and so on when power to the television receiver is turned off. When the television receiver is turned on again, the conditions of the respective circuits present when the television receiver was last turned off are reproduced under the control of the system control circuit 20. A key apparatus 22 is connected to the system control circuit 20 and is provided with various kinds of keys KY to control the television receiver. A remote controller (commander) 24 also is provided with various kinds of keys KY to control the television receiver. The remote controller 24 is also provided with a transmitter (not shown) to transmit a remote control signal based on the corresponding key operation. A receiver 23 for receiving the signal transmitted from the transmitter of the remote controller 24 is connected to the system control circuit 20. The remote control signal can be transmitted by means of a light beam, radio waves, sound wave and so on. By way of example, the keys KY of the key apparatus 22 or the remote controller 24 may comprise: a power key 33; a recall key 34 (used to display the picture discrimination character such as the channel number); a mute key (used to mute the sound); ten keys (designated generally by the reference numeral 35) used to select the reception channel and the number of the external video signal input terminal; a TV (television)/VTR change-over key; an aerial input/auxiliary high frequency input change-over key; a sound multiplexing key; up and down keys 36 for incrementing and decrementing the contrast of luminance and chrominance signals, the main reception channels, the number of the main external video signal input terminal, and the sound volume, respectively,; an on-off key 37 for the sub-picture screen; up and down keys 38 for incrementing and decrementing the sub-reception channel and the number of the sub-external video signal input terminal; a still picture key; a step-by-step picture key; a shift key used to shift the position of the sub-picture screen; and a main-sub exchange key used to exchange the picture contents on the main picture and sub-picture screens. How the main and sub-pictures are reproduced according to this embodiment of the invention will now be described with reference to Figures 2A to 2C. The main picture is reproduced first. That is, when the mode switching key of the remote controller 24 is set to the TV mode and the channel selection operation key of the main tuner 5M is depressed, the channel number"#14", for example, is selected as the main channel number under the control of the system control circuit 20 and this channel number "#14" and the channel selection data are stored in the last-condition memory 21. Then, a picture of the channel number "#14" is displayed on a main picture screen Sm as shown in Figure 2A and the channel number "#14" is displayed also on the main picture screen Sm for, for example, several seconds. When a sub-picture on and/or off key on the remote controller 24 is depressed, a sub-picture screen is then displayed. When a picture based on a video signal from the sub-tuner 5S is reproduced on the sub-picture screen, a channel number "#4" is selected as the sub-channel number by depressing the up or down key of the sub-channel number on the remote controller 24. This channel number "#4" is stored in the last-condition memory 21, similarly to the main channel. Further, the display position of the sub-picture screen can be selectively shifted by the user. When the sub-picture screen position shift key on the remote controller 24 is depressed so that, for example, the lower left-hand corner is selected from, for example, the four corners of the main picture screen, the picture of the channel number "#4" is displayed on the sub-picture screen Ss which is located at the lower left-hand corner of the main picture screen Sm as a sub-picture and the channel number "#4" is displayed thereon for several seconds, as shown in Figure 2B. When a channel number "#12", for example, is selected as a main channel by depressing the channel selection operation key, for example the down key of the main tuner 5M on the remote controller 24 in the reception state shown in Figure 2B, then the picture displayed on the main picture screen Sm is changed into a picture of the channel number "#12" and the main channel number "#12" and the sub-channel number "#4" are displayed on the main picture screen Sm and the sub-picture screen Ss, respectively, as shown in Figure 2C. When a picture based on the external video signal is displayed on either or both of the main and sub-picture screens Sm and Ss, then, if the picture content of the main picture screen Sm is changed, picture discriminating characters are displayed on both the main picture screen Sm and the sub-picture screen. How the picture discriminating characters are displayed according to this embodiment of the invention will now be described with reference to Figure 3 and Figures 4A to 4C. Figure 3 is a block diagram of a character display circuit 190 which generally represents both of the main and sub character display circuits 19M and 19S. The character display circuit 190 includes a random access memory (RAM) 191 which receives an output of a read only memory (ROM) 193, used as a character signal generator, through a size specifying circuit 192. An output from a clock oscillator 194 is supplied to the RAM 191 and to a first counter 195. A horizontal synchronising signal H applied to a terminal 19h is supplied to the clock oscillator 194 and the first counter 195 as a synchronising signal and a clear control signal and is supplied also to a second counter 196. The second counter 196 receives from a terminal 19v a vertical synchronising signal V as a reset control signal. The counters 195 and 196 respectively receive, from a terminal 19c connected to the system control circuit 20 (see Figure 1), a horizontal position specifying signal Sh and a vertical position specifying signal Sv, whereby the number of clock pulses to be counted and the number of horizontal synchronising signals to be counted are specified, respectively. Outputs of both the counters 195 and 196 are supplied to the RAM 191 as horizontal and vertical read starting signals so that the character signal is read out from the RAM 191 at timings corresponding to the specified positions on the picture screens. The character signal delivered from the RAM 191 is supplied through a colour specifying circuit 197 to output terminals 19r, 19g and 19b. The colour specifying circuit 197 is supplied with a colour specifying signal Sd from the terminal 19c while the size specifying circuit 192 and the ROM 193 are supplied, respectively, with a size specifying signal Ss and a character specifying signal Sch from the terminal 19c, whereby a predetermined character (which may be a figure) is displayed on the picture screen in a predetermined size and in a predetermined colour. If the main picture discriminating character and the sub-picture discriminating character are displayed in other colours than green and white, respectively, the connections of the adders 11 and 17 (Figure 1) will be changed appropriately. An inductive/capacitive (LC) resonant circuit 198 is connected to the clock oscillator 194 whereby its clock frequency f(CK) is selected to be about 5 MHz. The clock frequency f(CK) is scattered in a range of about ± 5 % due to scattering of the inductance (L) or capacitance (C) forming the resonant circuit 198. In the case of the main character display circuit 19M, the display position of the discriminating character is displaced by an amount substantially equal to one character due to displacement of the clock frequency f(CK) by 5 %. In addition, since the degrees of various adjustments concerning the video image and the audio sound such as brightness, contrast, chromaticity, hue, sound volume, sound quality and so on can be displayed on the main picture screen Sm in the form of a bar chart, the tolerance of the display position displacement is decreased and, hence, the frequency of the resonant circuit 198 must be adjusted in the process of manufacturing the television receiver. In this embodiment, the picture discriminating characters displayed on the sub-picture screen Ss may be two kinds of characters, for example the channel number and the external video signal input terminal number. The maximum number of characters that can be displayed is 7 letters containing a blank portion, e.g. "VIDEO 2". For this reason, according to this embodiment of the invention, the size of the picture discriminating character displayed on the main picture is selected to be 2 microseconds in length in the horizontal direction and 14H in length (corresponding to 14 scanning lines during one field) in the vertical direction as, for example, is shown in Figure 4A. The size of a picture discriminating character displayed on the sub-picture screen is selected to be 4 microseconds in length in the horizontal direction and 28H in length in the vertical direction, which size is just twice the size of the character displayed on the main picture screen as, for example, shown in Figure 4B, so as to display 7 letters on substantially the whole of the effective width of a sub-picture screen of, for example, 40 microseconds in length. As earlier noted, the sampling lines and picture elements of the sub-picture screen video signal and discriminating character signal are selected and other lines and picture elements are thrown away or removed in correspondence with the ratio between the sizes of the main and sub-picture screens, for example, 3 : 1, by the video signal processor circuit 12, with the result that the sub-picture discriminating character is compressed in size, for example being 4/3 microseconds in length in the horizontal direction and 10H in length in the vertical direction as shown in Figure 4C, the character then being displayed on the sub-picture screen. Since the compression ratio (2:3) of the sub-picture screen discriminating character relative to the main picture discriminating character is twice the compression ratio (1:3) of the sub-picture screen relative to the main picture screen, the sub-picture discriminating character becomes easy to see. In this case, since the displacement of the display position of the sub-picture discriminating character due to the 5 % displacement of the clock frequency f(CK) is reduced to one half of a character and the accuracy of the display position is increased relatively, adjustment of the clock frequency becomes unnecessary and the manufacturing cost can be decreased. Alternatively, the size of the sub-picture discriminating character is selected to be equal to that of the main picture discriminating character, the sub-picture discriminating character signal and the sub-picture signal are compressed with different compression ratios by respective video signal processing circuits, and then both of them are added to each other. According to the embodiment of the invention described above, since the compression ratio of the sub-picture discriminating character relative to the main picture discriminating character is selected to be larger than that of the sub-picture screen relative to the main picture screen, the sub-picture discriminating character can be displayed so as to relatively large and in an easier-to-see form. At the same time, a process of adjusting the clock frequency in the sub-character signal generating circuit can be omitted so that the manufacturing cost of the picture-in-picture television receiver can be reduced.

Claims: A television receiver comprising: (a) a video picture display device (18) having a picture screen which is divisible into a main picture screen (Sm) for displaying a picture represented by a first video signal and a sub-picture screen (Ss) inset into the main picture screen (Sm) for displaying a compressed picture represented by a second video signal; (b) a main picture circuit (7M, 8M) for selecting the first video signal from a plurality of video signals supplied by external sources (V1, V2, V3, 5M) and supplying the selected first video signal as the main picture screen video signal; (c) a sub-picture circuit (7S, 25, 8S) for selecting the second video signal from a plurality of video signals supplied by external sources (V1, V2, V3, 5S) and supplying the selected second video signal as a sub-picture video signal for the sub-picture screen; (d) a composing circuit (9) for composing the first and second video signals into a composite signal to be supplied to the picture display device (18); (e) a first adder (19M, 17) for adding a first picture discrimination character signal to the first video signal whereby a first picture discrimination character is displayed as part of the picture on the main picture screen (Sm); and (f) a second adder (19S, 11) for adding a second picture discrimination character signal to the second video signal whereby a second picture discrimination character is displayed as part of the picture on the sub-picture screen (Ss); the television receiver being characterised by: (g) size control means (20, 192) for controlling the size of the second picture discrimination character as it is displayed on the sub-picture screen (Ss), the size control means (20, 192) being operative to cause the ratio of the size of the displayed second picture discrimination character relative to the size of the displayed first picture discrimination character to be larger than the ratio of the size of the picture displayed on the sub-picture screen (Ss) relative to the size of the picture displayed on the main picture screen (Sm); and in that the second adder (19S,11) includes a clock oscillator (194, 198) controlling the position of the second picture discrimination character within the sub-picture screen (S s ), the second picture discrimination character being added to the second video signal prior to sub-sampling the second video signal to form the sub-picture screen (S s ).

Inventors: HAKAMADA KUNIO C O PATENTS DIV, HAKAMADA, KUNIO C/O PATENTS DIVISION
Applicants: SONY CORP, SONY CORPORATION
Application year: 1987
Main classification: H04N5
IPC codes: H04N5