INVERTER

Abstract: The inverter comprises four MIS transistors (Q1-Q4) and their driving circuits (1-4), with a DC voltage (Es) applied between input terminals (A,B). A high-frequency AC voltage (VOUT) is produced between output terminals (C,D), to which a load (5) is connected, by alternately switching on/off the transistors (Q1-Q4). Inductance elements (L1-L4) are provided across the gate and source of each of the MIS transistors, which establishes resonance condition in parallel with the input capacitance of the transistor.

Description: TECHNICAL FIELD The present invention relates to an inverter apparatus and, in particular, to an inverter apparatus in which a metal oxide semiconductor (MOS) transistor, broadly speaking, a metal insulator semiconductor (MIS) transistor, is connected in series between an input end of a direct-current voltage and a load, and the MOS transistor is driven by a drive signal of a single frequency, thereby converting the direct-current voltage into an alternating-current voltage corresponding to the single frequency. The apparatus according to the present invention can be utilized, for example, as a high frequency power source for a radio-frequency (RF) excitation-type carbonic acid gas (CO₂) laser equipment. BACKGROUND ART In the above-mentioned inverter apparatus, the frequency of an alternating-current output voltage corresponds to the frequency of a drive signal for driving a switching MOS transistor. Accordingly, to gain a stable output voltage having a defined frequency, the MOS transistor must quickly respond to the change in voltage of a drive signal of the defined frequency and carry out the switching operation thereof. On the other hand, it is generally known that an equivalent input capacitance exists between a gate and a source of a MOS transistor. Such an input capacitance is determined by the size of the source region, i.e., a diffusion region, and the concentration of impurities therein, a location of the gate and source, and the like, and is parasitically formed when the MOS transistor is formed on a semiconductor substrate. Accordingly, where an input capacitance (capacitor) exists between the gate and the source of the transistor, a problem arises in that, due to the charging or discharging characteristics of the capacitor, the input voltage of the transistor cannot quickly follow the change in voltage of the aforementioned drive signal. Especially, the higher the frequency of the drive signal, the greater the influence. Accordingly, this problem must be solved, from the viewpoint of acquiring a stable high frequency output voltage. On the other hand, because of the power loss caused by resistors inserted in the input circuit for compensating the influence of the capacitor, another problem arises in that the efficiency of the power conversion of the whole apparatus is lowered. Furthermore, it is generally known that an equivalent output capacitance exists between a drain and a source of a MOS transistor. The output capacitance is parasitically formed during the forming of the transistor, as in the aforementioned input capacitance. The existence of the output capacitance (capacitor) causes not only the same problem as that in the aforementioned input capacitor, but also other problems. GB-A-2163014 discloses a circuit for fluorescent lamps in which the secondary coils of a transformer drive a pair of FETs. A combination of inductors and capacitors smooth the output to a lamp coil. The details of the problems arising due to the existence of the parasite input capacitor and parasite output capacitor of the aforementioned MOS transistor will be explained later. A main object of the present invention is to provide an inverter apparatus capable of gaining a stable output voltage having a desired high frequency. Another object of the present invention is to provide an inverter apparatus capable of not only decreasing a power loss therein, to increase the efficiency of the power conversion, but also to raise the frequency thereof as a power source. According to the present invention, there is provided an inverter apparatus comprising: an input terminal for inputting a direct-current voltage; an output terminal connected to a load; a circuit for generating a drive signal of a single frequency; and at least one MIS transistor connected in series between the input terminal and the output terminal, and carrying out a switching operation corresponding to the single frequency in response to the drive signal; characterised by: a first inductance element either connected between the gate and the source of the MIS transistor for effecting a parallel resonance with an input capacitance of the transistor or connected in parallel with the output terminal for effecting a parallel resonance with an equivalent total capacitance seen from the output terminal in the direction of an input side. In the inverter apparatus according to the present invention, since an inductance element, which effects a parallel resonance with an input capacitance (capacitor) of a MIS transistor carrying out a switching operation, is provided between a gate and a source of the MIS transistor, an input voltage of the MIS transistor can quickly follow the change of the drive signal of the single frequency. That is, even if the level of the drive signal fluctuates, the MIS transistor quickly carries out the switching operation thereof without delay. Therefore, even if a frequency of a signal for driving the MIS transistor is made high, the apparatus of the present invention enables a stable high frequency voltage corresponding to the frequency to be gained. Also, since resistors for compensating the influence by the input capacitance are not employed in the input circuit, a power loss due to the resistors can be reduced to zero, so that the efficiency of the inverter apparatus can be increased. Furthermore, since the influence of the capacitor is eliminated, it is possible to solve the problem of the art, i.e., that a switching speed of the MIS transistor is marred with an increase in the frequency of the drive signal. This means that an upper limit of the frequency is not restricted, in other words, that the frequency of the apparatus of the present invention can be made as high as a power source. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a circuit diagram illustrating a constitution of an inverter apparatus as an example in the art; Fig. 2 is a diagram illustrating an example of a constitution of the drive circuit in Fig. 1; Fig. 3 is a waveform diagram showing the operation of the apparatus in Fig. 1; Fig. 4 is a circuit diagram illustrating a constitution of an inverter apparatus as an embodiment of the present invention; Fig. 5 is a diagram illustrating an example of a constitution of the drive circuit in Fig. 4; Fig. 6 is a waveform diagram showing the operation of the apparatus in Fig. 4; and Fig. 7 is a circuit diagram illustrating a constitution of an inverter apparatus as another embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION For a better understanding of the preferred embodiments of the present invention, the problems in the prior art apparatus will now be described in detail with reference to Figs. 1 to 3. Figure 1 illustrates a constitution of an inverter apparatus in the art. In Fig. 1, Q11, Q12, Q13 and Q14 denote N-channel type MOS transistors, and the transistors Q11 and Q12 are connected in series and the transistors Q13 and Q14 are connected in series between input terminals A and B for inputting a direct-current voltage E S . A load 15 is connected between a connection point of the transistors Q11 and Q12 and a connection point of the transistors Q13 and Q14, and drive circuits 11, 12, 13 and 14 are connected between a gate and a source of each transistor Q11 - Q14, respectively. Drive signals V GS1 ', V GS2 ', V GS3 ' and V GS4 ' of a single frequency are applied to the gate terminals of the transistors Q11 - Q14, respectively. Note, the drive signals V GS1 ' and V GS4 ' are all the same and the drive signals V GS2 ' and V GS3 ' are also all the same. The former and the latter have an opposite phase relationship to each other. Accordingly, a pair of transistors Q11 and Q14 and another pair of transistors Q12 and Q13 alternately carry out an ON/OFF operation in accordance with the frequency of the drive signal V GS1 ', and as a result, the positive voltage of E S is applied to the load 15 in the ON state of the transistors Q11 and Q14, and the negative voltage of -E S is applied to the load 15 in the ON state of the transistors Q12 and Q13. Figure 2 illustrates a constitution of the drive circuit shown in Fig. 1. A capacitor C iS11 indicated by a broken line in Fig. 2 represents an input capacitance between the gate and source of the MOS transistor Q11, and a capacitor C 0S11 represents an output capacitance between the drain and source of the MOS transistor. The drive circuit 11 comprises an oscillator OSC for generating a signal of a single frequency, a transformer T for transmitting the oscillated signal to the secondary side thereof, while maintaining a state of electrical insulation, a resistor R1 connected in parallel with the transformer, and a resistor R2 connected in series with the circuit at the stage following the resistor R1. The transistor Q11 functions as a capacitive load, when seen from the drive circuit 11 in the direction of a load side. Accordingly, since there is a possibility of a parasitic oscillation occurring in the circuit, the above resistors R1 and R2 are employed to prevent that oscillation. In this case, the value of the resistor R2 is made high, from the viewpoint of a prevention of the oscillation. On the other hand, the value of the resistor R1 is made small compared with the impedance value of the capacitor D iS11 , so that the impedance of the transistor Q11, seen from the input side thereof, is considered to be a substantially pure resistance. Thus, where the input capacitor C iS11 exists between the gate and source of the switching MOS transistor Q11, a problem arises in that the input voltage V GS1 ' of the transistor cannot quickly follow the change in voltage of the oscillation signal V 0SC , due to the charging or discharging characteristics of the capacitor. Figure 3 shows an operation waveform diagram for explaining this problem. As shown in Fig. 3, for example, in the charging operation of the capacitor, a delay time of t d is required in which the input voltage V GS1 ' of the MOS transistor reaches a predetermined level needed to turn ON the transistor, i.e., a threshold voltage V th . The relationships therebetween are shown as follows. Assuming that Therefore, the phase angle of lag (= 2πf₀td) of V GS1 ' is increased with an increase of f₀ , and the timing of the switching of each transistor is greatly changed in accordance with the difference of the values of C iS11 and V th . Furthermore, as is easily understood from the above equations, where the frequency f₀ of the oscillation signal V 0SC is raised to a predetermined value, a situation occurs in that the voltage V GS1 ' falls before the peak value thereof reaches the threshold voltage V th , and as a result, a disadvantage may occur in that a desired high frequency output voltage cannot be obtained. Also, in the drive circuit 11 shown in Fig. 2, another problem arises in that a drive efficiency is lowered because the output power of the oscillator is wasted in accordance with the power dissipated in the resistors R1 and R2. On the other hand, with respect to the output capacitor C 0S11 , the switching operation of the MOS transistor cannot be quickly carried out due to the existence of the parasitic capacitor. Accordingly, for example, when the transistor (Q11, Q12, Q13, Q14) is switched from the state (ON, OFF, OFF, ON) to (OFF, ON, ON, OFF), the charging current or discharging current of each capacitor C 0S11 of the transistors Q11 and Q12 flows through the transistor Q12 and, at the same time, the charging or discharging current flows through the transistor Q13 in the same manner. As a result, a problem arises in that a power loss is caused in accordance with the respective ON resistance of the transistors Q11 - Q14 and the value of the respective output capacitor C 0S . Also, as the frequency of the drive signal V GS1 ' is raised higher, a reactance of the capacitor C 0S (C iS as well) is decreased and currents easily flow, resulting in a further power loss. Furthermore, since the deterioration in the speed of the above switching operation becomes more remarkable, another disadvantage may also occur in that a high speed operation, i.e., high frequency operation, cannot be conducted as the power source is damaged. Next, the preferred embodiments of the present invention will be explained with reference to Figs. 4 to 7. Figure 4 illustrates a circuit constitution of the inverter apparatus as an embodiment of the present invention. The illustration of Fig. 4 shows the case wherein the present apparatus is incorporated as a high frequency power source for an RF excitation type CO₂ laser equipment. In Fig. 4, Q1 - Q4 denote N-channel type MOS transistors, and the transistors Q1 and Q2 are connected in series and the transistors Q3 and Q4 are connected in series between input terminals A and B for inputting a direct-current voltage E S . A laser tube 5 as a load is connected between a connection point of the transistors Q1 and Q2 and a connection point of the transistors Q3 and Q4, i.e., between output terminals C and D. The laser tube 5 includes a pair of electrodes 5a, 5b to which the alternating-current voltage is applied, and a quartz tube 5c for discharging. Also, coils L1, L2, L3 and L4 are connected between a gate and a source of each transistor Q1 - Q4, respectively, and drive circuits 1, 2, 3 and 4 are connected in parallel with each coil, respectively. The drive circuits 1 and 4 have the same constitution and output an identical drive voltage, i.e., V GS1 (= V GS4 ), and the drive circuits 2 and 3 have the same constitution and output a drive voltage having a phase inverse to that of the above drive voltage V GS1 . Therefore, a pair of transistors Q1 and Q4 and another pair of transistors Q2 and Q3 alternately carry out an ON/OFF operation in accordance with the frequency of the drive voltage V GS1 , and as a result, the high frequency voltage having an amplitude of E S , corresponding to the frequency of the drive voltage, is applied across the electrodes of the laser tube 5. Figure 5 illustrates a constitution of the drive circuit shown in Fig. 4. A capacitor C iS1 indicated by a broken line in Fig. 5 represents an input capacitance between the gate and source of the MOS transistor Q1. The drive circuit 1 comprises an oscillator OSC for generating a signal of a single frequency f₀ , and a transformer T for transmitting the oscillated signal to the secondary side thereof, while maintaining the electrical insulation. Also, the coil L1 connected between the gate and source of the transistor Q1 is selected so that it will effect a parallel resonance with a gate input capacitance of the transistor, i.e., the capacitor C iS1 . That is, the following relationship exists between the value of each element and the frequency f₀ of the oscillation signal V 0SC : Thus, the coil L1 and the capacitor C iS1 effect a parallel resonance with each other, so that an input impedance between the gate and source of the transistor Q1 seen from the drive circuit 1 becomes remarkably great. Also, a bad influence due to the charging or discharging characteristics of the capacitor C iS1 , i.e., a deterioration in frequency characteristics, can be cancelled by the function of coil L1. Accordingly, even if the frequency of the oscillation signal voltage V 0SC is extremely high, the input voltage V GS1 of the transistor Q1 can quickly follow the change in the oscillation signal voltage. In other words, when the level of the oscillation signal voltage V 0SC is changed, the transistor Q1 quickly carries out the switching operation without delay. Figure 6 shows operation waveforms at each portion in the apparatus of Fig. 4. As shown in Fig. 6, the drive voltage, i.e., the voltage V GS1 between the gate and source of the MOS transistor can quickly follow the change in level of the oscillation signal V 0SC and change its level. Accordingly, as obvious from the comparison with Fig. 3 showing an example of the prior art, the output voltage V OUT of the inverter is generated without delay. Also, since the attenuation of amplitude accompanying the change in frequency does not appear in the voltage V GS1 and the drive voltage V GS1 reaches the level of the threshold voltage V th of the MOS transistor at a change in level of the oscillation signal V 0SC , the high frequency output voltage V OUT can be always obtained in accordance with the frequency f₀ of the oscillation signal even if the frequency f₀ becomes extremely high. Therefore, the inverter apparatus according to the present embodiment is very advantageous for a load, the efficiency of which is increased with an increase in the frequency of the voltage applied, as in the laser tube 5 employed in the present embodiment. Also, as shown in the constitution of the drive circuit of Fig. 5, power consuming elements heretofore been provided in the drive circuit for the reduction of a bad influence due to an input capacitance of an MOS transistor, e.g., the resistors R1 and R2 in Fig. 2, are omitted. Namely, it is possible to decrease the power dissipated by all of the drive circuits, and accordingly, the efficiency of the drive circuits can be increased. Figure 7 illustrates a circuit constitution of the inverter apparatus as another embodiment of the present invention. The illustration of Fig. 7 shows the case, as in the embodiment of Fig. 4, wherein the present apparatus is incorporated as a high frequency power source for an RF excitation type CO₂ laser equipment and, in particular, the constitution in which the distance between a load and a power supply part is relatively great. In Fig. 7, RFC denotes a choke coil for maintaining a constant current flow through the circuit; Q1 - Q4 denote MOS transistors as in the embodiment of Fig. 4; and capacitors C 0S1 , C 0S2 , C 0S3 and C 0S4 indicated by broken lines denote output capacitances between the drain and source of transistors Q1, Q2, Q3 and Q4, respectively. Also, a coil L is connected between a pair of electrodes 5a and 5b of the laser tube 5 as a load. Reference 6 denotes a co-axial cable for electrically connecting the inverter circuit and the laser tube, and having a central conductor 6a and a circumferential conductor 6b. Note, a capacitor C₀ indicated by a broken line represents an equivalent elecrostatic capacitance of the cable 6. One electrode 5a of the laser tube 5 is connected via the central conductor 6a of the cable to the connection point between the transistors Q1 and Q2, and the other electrode 5b thereof is connected via the circumferential conductor 6b to the connection point between the transistors Q3 and Q4. The aforementioned drive signals V GS1 , V GS2 , V GS3 and V GS4 of the single frequency f₀ are applied to the gates of the MOS transistors Q1 - Q4, respectively. The coil L connected in parallel with the laser tube 5 is selected to have an inductance effecting a parallel resonance with a total capacitance (total capacitor) seen from the electrode ends of the laser tube, i.e., the output terminals C and D, to the direction of an input side, i.e., the inverter circuit side. Namely, the following relationship exists between the value of each element and the frequency f₀ of the drive signal. Note, a capacitor C k is represented by (C 0S2 + C 0S3 ) or (C 0S1 + C 0S4 ). The former corresponds to the case wherein the transistors (Q1, Q2, Q3, Q4) are switched from the state (OFF, ON, ON, OFF) to (ON, OFF, OFF, ON), and the latter corresponds to the case wherein the transistors are switched to the opposite state. As stated above, since the coil L and the equivalent capacitor (C₀ + C k ) effect a parallel resonance with each other, an input impedance seen from the electrode ends of the laser tube in the direction of the inverter circuit side becomes equivalent to a pure resistance. Namely, an influence by the capacitance of the whole apparatus including the output capacitances C 0S1 - C 0S4 of the transistors is cancelled by the function of the coil L. Therefore, since there is the power loss, heretofore caused by the flow of the charging or discharging currents of the output capacitance through the transistor in the switching operation of the transistor is eliminated, the power conversion efficiency of the whole apparatus is increased. Particularly, the higher the frequency f₀ of the drive signal, the more remarkable the effect. This is why, when the coil L is not connected, each reactance of the output capacitors C 0S1 - C 0S4 of the transistors is decreased with the increase in the frequency f₀ and, accordingly, the currents flow easily, resulting in a still further decrease in the power loss. This will be obvious from the following expression of the power loss P1: P1 = f₀(C 0S1 + C 0S2 + C 0S3 + C 0S4 )E S ² Also, since there is no influence due to the output capacitor C 0S1 - C 0S4 of each transistor, in other words, the state in which elements dependent on the frequency do not equivalently exist is realized, it is not necessary to provide a condition for an upper limit of the frequency f₀ when each of the transistors is driven by the drive signal of the frequency f₀. Thus, it is possible to raise the frequency of the present apparatus as a power source, and to realize a quick switching of the MOS transistors Q1 - Q4 regardless of the magnitude of the frequency f₀. The coil L may be provided at the input side of the cable 6, i.e., between the output ends C' and D' of the inverter. Therefore, the inverter apparatus according to the present embodiment is very advantageous for a load of which an efficiency is increased with the increase in the frequency of the voltage applied, as in the laser tube 5. Although in the disclosed and illustrated embodiments the CO₂ laser equipment is emphasized, the kind of laser is not restricted thereto. For example, the present invention is applicable to all other gas lasers such as an He-Ne, CO, excimer, and the like. Also, the high frequency choke coil RFC employed in the embodiment of Fig. 7 may be adapted for the embodiment of Fig. 4.

Claims: An inverter apparatus comprising: an input terminal (A,B) for inputting a direct-current voltage; an output terminal (C,D) connected to a load (5); a circuit (1,2,3,4) for generating a drive signal of a single frequency; and at least one MIS transistor (Q1,Q2,Q3,Q4) connected in series between the input terminal and the output terminal, and carrying out a switching operation corresponding to the single frequency in response to the drive signal; characterised by: a first inductance element (L1,L2,L3,L4;L) either connected between the gate and the source of the MIS transistor for effecting a parallel resonance with an input capacitance of the transistor or connected in parallel with the output terminal for effecting a parallel resonance with an equivalent total capacitance seen from the output terminal in the direction of an input side. An inverter apparatus according to claim 1, further comprising a second inductance element (RFC) connected in series with the MIS transistor (Q1,Q2,Q3,Q4) and providing a constant current input to the transistor at the single frequency. An inverter apparatus according to claim 2, further comprising a cable (6) for connecting an output end of the MIS transistor (Q1,Q2,Q3,Q4) with the output terminal (C,D), the first inductance element (L) having an inductance effecting a parallel resonance with a total capacitance of an equivalent electrostatic capacitance of the cable and an output capacitance of the MIS transistor.

Inventors: EGAWA, AKIRA FANUC MANSHON
Applicants: FANUC LTD.
Application year: 1987
Main classification: H02M7
IPC codes: H03K17, H02M7