STAND-BY POWER SUPPLY

Abstract: An electrical distribution means auxiliary device for providing a substitute alternating current supply when the power from a domestic mains outlet fails. The auxiliary device comprises a mains failure sensor and switch-over unit (1) which detects when the mains fail and switches over supply to an apparatus from the mains to a supply provided by an inverter (4). The inverter (4) receives power from a rechargeable battery (7) and the battery (7) is continuously recharged by a battery charger (8) whenever the mains supply is available. An emergency shut-down and alarm circuit (6) is provided to activate an alarm when failure occurs and to disable the auxiliary device when the battery (7) becomes overloaded. The auxiliary device is designed so as to provide a relatively inexpensive means for detecting when power fails and generating a substitute AC supply.

Description: STAND-BY POWER SUPPLY This invention relates to an electrical distribution mains auxiliary device which is primarily used as a means of providing an alternating current supply when the power from the mains fails. The object of the invention is to provide a less expensive and more efficient device for providing a substitute ac supply during mains failure, with respect to previous devices used for this purpose. In accordance with the present invention there is provided an electrical distribution mains auxxliary device for an apparatus normally powered by an electric mains supply comprising: monitoring means for determing when a fault condition occurs in a mains supply; converting means for converting a direct current input to an alternating current supply which is substantially equivalent to the mains supply; and switching means responsive to said monitoring means which, in use, when a fault condition has occurred, switches the input to the apparatus from the mains supply to the alternating current supply provided by the converting means, and when the fault condition no longer exists switches the input to the apparatus back from the alternating current supply provided by the converting means to the mains supply. Preferably said mains auxiliary device further comprises protection means which disables the device and activates an alarm, on detection of predetermined conditions. A detailed description of a preferred embodiment of the invention is provided below, by way of example only, with reference to the attached drawings, in which: Figure 1 is a block diagram of an auxiliary device in accordance with the invention; Figure 2 is a circuit diagram of a mains failure and switch over unit of the device; Figure 3 is a circuit diagram of an inserting circuit of the device; Figure 4 is a circuit diagram of a shutdown and alarm circuit of the device; Figure 5 is a circuit diagram of an indicator circuit of the device; Figure 6 is a circuit diagram of a battery charger of the device; Figure 7 is a first waveform diagram; and Figure 8 is a second waveform diagram.- The electrical distribution mains auxiliary device, as shown in Figure 1 comprises a mains .failure and switch over unit 1, an inverting unit 4, an emergency shut down and alarm unit 6, a battery 7 and a battery charger 8. The switch over unit 1 constantly monitors the mains supply voltage on a mains input line 2. The mains voltage is then outputted from the unit 1 via an output line 3 to an apparatus (not shown) connected to a three pin socket 24. If the mains voltage is determined to be too low or too high for a set period of time the mains failure sensor and switch over unit 1 will switch the source of the output on line 3 from the mains supply 2 to an ac voltage generated by an inverting unit 4. The inverting unit 4 converts a 12V dc voltage provided by the battery 7 to a 240V ac voltage, which is equivalent to the mains supply voltage. The AC voltage generated by the inverting unit 4 is a square wave which contains only lower frequency harmonics or, alternatively, is a sinusoidal wave comprising a number of super-imposed low frequency harmonics. A voltage waveform 500 generated by the inverting unit 4 is shown n Figure 7. The output of the inverting unit 4 is coupled to the mains failure sensor and switch over unit 1 via a supply line 5. Power to the units 1, 4 and 6 is provided by the battery 7 which is recharged whenever the mains are operational by the battery charger 8 . . The emergency shut-down and " alarm unit 6 _ is arranged to short-circuit the input of the unit 6 whenever battery overload occurs. By short-circuiting the input power to the unit 6, the mains failure sensor and switch over unit 1 is disconnected. Current overload protection is provided by fuses as described below. The circuit layout of the mains failure sensor and switch over unit 1 is illustrated in Figure 2. The unit 1 monitors the mains voltage using a 1VA 240V:12V transformer 10. The secondary 12V winding is connected to a bridge rectifier 11 having four diodes. The output of the rectifier 11 is connected in series with the contact of a relay 152. The contact of the relay 152 is closed whenever power is applied to the mains failure sensor and switchover unit 1. The relay 152 disconnects the sensing circuitry, described below, of the unit 1 from the transformer when power is not supplied to the unit 1 so as to prevent any over voltage from damaging NAND gates 16, 17 and 18 of the unit. A zenerdiode 154 is provided in parallel with the output of the bridge rectifier 11 in order to provide further overvoltage protection for the gates 16, 17 and 18. When power is supplied to the unit 1, the output of the rectifier 11 is filtered by a shunt capacitor 12 and a combination of resistances 156 which give rise to a ripple voltage waveform 502, as shown in-Figure 8. The decay constant associated with each period of the ripple voltage is determined by the resitors 156. The ripple voltage is applied to two potentiometers 14 and 15. The wipers of the potentiometers 14 and 15 are adjusted so as to give " signals which indicate when the ripple voltage is either too low or too high respectively. When the mains voltage is at the correct level, the wiper of potentiometer 14 supplies a "high" signal to the inpu of the NAND gate 16 while the wiper of potentiometer 15 supplies a "low" signal to the input of the NAND gate 17. This ensures that the output of the NAND gate 18 connected to the other two gates remains "high". When, an irregularity in the mains voltage occurs and the voltage is " either too high or too low for a selected period below 10 milliseconds, say 5 milliseconds, the output of the NAND gate 18 will go "low" and trigger an LM555 timer 19. The timer 19 is set up so that it will function in a monostable mode. The resistance 20 and the capacitance 21 connected to the timer 19 are such that when the timer 19 is triggered at its input T2, the timer will output a 6 volt pulse of duration 0.7 seconds minimum to two normally activated open relays 22 and 23, which upon deactivation due to zero potential will close for the duration of the pulse. The duration of the pulse ends, after a minimum of 0.7 seconds, when the input T2 of the timer 19 returns to a "high" voltage. This condition will only occur when the mains voltage reverts to a normal level and is not too high or too low as determined by the mains failure sensor and switch over unit 1. The unit 1 includes a delay circuit which comprises a resistor 158 connected to the input of the gate 18 and in series with a capacitor 160 and resistors 162, which are connected in parallel and to ground. The delay circuit ensures that the pulses which trigger the timer 19 reach a "low" voltage after a certain period of time, so that if a power failure does not occur but the mains voltage fluctuates between a low level and an acceptable level the timer will not be continuously triggered whenever the voltage is at the low levels, unless the mains voltage remains below the acceptable low level. This is illustrated in Figure 8, where if we assume the low level to be at a certain voltage 504, if the unit 1 did not include the delay circuit then a voltage 506, resulting from the ripple voltage 502, would be inputted to the timer 19. However, with the delay circuit, a voltage 508 is inputted, instead and the timer 19 does not produce any output until the ripple voltage is below the level 504 for a certain period of time. A diode 163 is provided between the output of the gate 16 and the input of the gate 18, so as to ensure that the input of the gate 18 remains high for a short period of time when the output of the gate 16 becomes low. Power to the mains failure sensor and switchover unit 1 is provided by the battery 7 through a fuse 30, a thermal overload switch 166 and a manually operable on/off switch 28 in a DC supply line 101. The line 101 also supplies power to other units. The thermal overload switch 166 senses the heat generated by the transistors in the inverting unit 4, described hereafter, and opens if the heat reaches an unacceptable level. A LED 168 is connected in series between two resistors 169 and 171 which are connected between a positive supply and the node 170, respectively which is between the switch 166 and the switch 28, so as to provide an indication when the fuse 30 blows or the switch 166 is opened. An LED 29 coupled to ground and connected to the node of the switch 28 opposite the node 170, provides an indication as to when power is supplied to the failure sensor and switchover unit 1. The relay 22, when deactivated,- connects the dc supply line 101 to output line 100 which supplies power to the inverting unit 4 and the emergency shut down and alarm unit 6. A capacitor 172 is placed in parallel with the relay 22 so as to reduce noise and prevent induced spikes on a DC supply line 102. A diode 174 is placed in parallel with the relay 22 so as to ensure that the voltage at the output of the timer 19 does not exceed that of the supply line 102 by no .more than 0.7 volts. The relay 23, when deactivated, disconnects the mains supply 2 and connects the ac supply voltage generated by the inverting unit 4 to the output line 3, via a low band pass filter 174 and a fuse 27. The band pass filter prevents voltage spikes and noise from appearing on the output line 3. The band pass filter 174 comprises two inductances 178 and 180, each connected in series with output lines 3a and 3b, each node of the inductances 178 and 180.being connected to a capacitor which is connected to ground. Resistances 182 and 184 are connected from the output lines 3a and 3b to ground, respectively, so as to discharge the capacitors. The band pass filter 176 has a 3 dfi cut off point at 2.5 kHz and a 40 dB cut-off point at 20 kHz. A fuse 27, and a resistor 186 connected in series to the input of the band pass filter 176, together with a metal oxide th ristor 188 connected in parallel with the input of. 5 the band pass filter are used to prevent high current and high voltage, respectively, being supplied to an electrical apparatus, such as a computer (not shown) connected to the socket 24. A resistor circuit 190 is connected, as shown in 10 Figure 1, to each of the relay contacts of the relay 23. The relay circuits 190 minimize arcing across the " relay contacts. The dc supply line 101 is connected to the input 15 of a voltage regulator 31 which provides a 6V supply for the timer 19 and the emergency shut down and alarm unit 6 on line 102. The 6V supply is also used as the positive supply (vdd) for each of the gates 16, 17 and 18. 20 The inverting unit 4, shown in Figure 3, produces a 240V, 50Hz signal from the 12V dc voltage line 10. The unit 4 includes, oscillator circuit 40 which comprises a 4 MHz quartz crystal oscillator 41. The 25 output of the oscillator 41 is connected to five dual 4 bit binary counters 42, 43, 44, 45 and 46. The first four counters divide the frequency by a factor of 10 and the last counter 46 divides the frequency by a factor of 8 so as to produce a 50 Hz signal. A 30. circuit 200 is connected to the binary counter 46, so as to provide an indication as to when " the inverter 4 is operating. The circuit 200, connected ' as shown in Figure 3, comprises a transistor 202, a resistor 204 connected to the emitter of the transistor 202 and a LED 206 connected between ground and the resistor 204. Selected outputs from the counters are inputted to a digital circuit 103 which produces two square waves at the outputs A and B which are 180° out of phase and have a duty cycle of approximately 49.5%. The square waves also have a frequency of 50 Hz. The digital circuit 103 comprises three NOR gates 47, 48, 49, three NAND gates 50, 51, 52 and two inverters 53 and 54, connected together as shown. The outputs A and B are each connected to standard driver circuits 60 and 61 which amplify and shape the square waves into a 10V ac signal suitable for supply to an apparatus which normally receives supply from the domestic mains supply. The outputs 104 and 105 of the two driver circuits are connected to opposite ends of the primary winding of a transformer 62. Each driver circuit comprises two pnp transistor amplifier stages 63 and 64 connected via an emitter follower stage 65 to a npn transistor amplifier stage 66. Three transistors operating in parallel in the stage 66 are capable of supplying a • current of 25A R.M.S. A 6A diode 67 is provided at the output of each driver circuit for protection of the transistors in the stage 66 against excessive transients and currents induced in the transformer 62. At the input of each driver circuit, a capacitor 68 is connected in series such that when the 50 Hz input signal ceases, the driver circuits will no longer operate. • The circuit of the unit 4 includes decoupling capacitors 105 connected to the line 100 prior to the binary counters. The positive terminal 106 of the battery 7 is connected to the centre tap of the primary winding of the transformer 62 via three 15A fuses connected in parallel which effectively act as 45A fuse 69. A capacitor 208 is connected in parallel with the secondary winding of the transformer 62 so as to provide filtering and improve the power factor, which enables the inverting to run efficiently on low loads. The emergency shut down and alarm unit 6, illustrated in Figure 4, comprises a battery overload circuit 70. The battery overload circuit 70 monitors the voltage on supply line 10 via a potential divider network which comprises a resistor 72 and a potentiometer 73. The wiper of the potentiometer 73 is set such that when the supply voltage on line 10 is below.11.IV a "high" sigrial is passed from the wiper through an inverting NAND gate 74 to the base of a npn transistor 75. The transistor 75 then connects the 6V supply line 102 to a relay 76. A high signal is passed from the emitter of the transistor 75 via a diode 300 to a line 302 activating the alarm 77 and switching on two LED's 304 and 306, all connected as shown in Figure 4. The LED 306 is connected to the supply line 302 by a diode -308 and is switched on after the LED 304 is switched on. The LED's 304 and 306 and the alarm 75 are all switched on before the relay 80 receives sufficient current closes contact and provided a "battery low" indicator and an "alarm " on" indicator, respectively. When the contact of the relay 76 is closed the supply line i01 is short-circuited which blows the fuse 30 and disables the auxiliary device. The alarm is activated whenever contacts of the relays 22 and 23 are opened and a switch 83, connected in series with the line 101 prior to the alarm 77, is provided so that the alarm may be switched off when the switch 83 is open. However, regardless of the state of the switch 83, the alarm 77 will be activated whenever the supply line 101 has a voltage below 11.1 volts. An indicator circuit 71, as shown in Figure 5 is connected to the supply line 101 so as to provide an indication by means of an LED 400 as to whether or not the battery 7 is fully charged. The circuit comprises a potentiometer 402, two inverting NAND gates 404 and 406 connected in series, a transistor 410 and a resistor 412 connected to the LED 400, or connected as shown in Figure 5. The LED 400 is switched on whenever the supply on line 101 is below 13.5 volts. The battery charger 8, shown in figure 5, comprises a standard circuit which receives power from the mains 2 via a 240V:18V transformer 90. The secondary of the transformer 90 is connected to a bridge rectifier 91 which supplies a ripple voltage to the input of a voltage regulator network 92. The output of the network 92 is connected to a relay 96. The coil of the relay 96 is connected to the secondary of the transformer 90 via diode 97 and resistor 98, a capacitor 93 being connected in parallel with the operating coil. The arrangement is such that the contacts of the relay connect the output of the network 92 to the battery 7 when the mains supply voltage is present. A LED 94, connected to a resistance 95 which is connected to ground, is provided to indicate when the battery charger 8 is operating. Many modifications will be apparent to those skilled in the art without departing from the spirit and scope of the invention.

Claims: CLAIMS 1. An electrical distribution mains auxiliary device for an apparatus normally powered by an electric mains supply (2) comprising: monitoring means (1) for determining when a fault condition occurs in a mains supply; converting means (4) for converting a direct current input to an alternating current supply which is substantially equivalent to the mains supply; and switching means (23) responsive to said monitoring means which, in use, when a fault condition has occurred, switches the input to the apparatus from the mains supply to the alternating current supply provided by the converting means, and when the fault condition no longer exists switches the input to the apparatus back from the alternating current supply provided by the converting means to the mains supply. 2. A device as claimed in claim 1 wherein the monitoring means includes rectifying means (11) for producing a rectified voltage level from the mains supply and gating means (16, 17, 18) for producing a fault signal when said rectified voltage is above or below predetermined voltage levels. 3. A device as claimed in claim 2 wherein the monitoring means includes timing means (19) responsive to output from said gating means to generate an enable signal to connect said direct current input to the converting means (4) and to activate " the ; said switching means (23) to switch the input of the apparatus to the output of the converting means. 4. A device as claimed in claim 3 wherein said timing means (19) functions a monostable circuit which generates said enable signal in response to a transient fault signal from the gating means. 5. A device as claimed in claim 4 wherein the switching means comprises a first relay (22) the contacts (22) of which are operable to connect or disconnect the direct current input to the converting means and a second relay (23) the contacts of which are operable to change input of the apparatus from the mains supply to the output of the converting means. 6. A device as claimed in claim 5 wherein a capacitor (172) and diode (174) are connected in parallel with the operating coil of the .first relay to filter transient voltages. 7. A device as claimed in claims 5 or 6 wherein resistors (190) are coupled between the contacts of the second relay to minimize arcing. 8. A device as claimed in claim 7 including an outlet connector 24 to which the apparatus is in use connected, and wherein a low pass filter (176) is connected between the contacts of the second relay and the connector * 9. A device as claimed in claim 8 wherein said low pass filter comprises an LC filter, having a frequency response such that the 3dB. down level is at about 2kHz. 10. A device as claimed in any one of claims 2 to 9 including a holding circuit (158, 160, 162) to hold the enable circuit for at least a predetermined period. 11. A device as claimed in claim 10 wherein said predetermined period is at least 0.5 seconds. 12. A device as claimed in any preceding claim wherein the converting means includes an oscillator (41) coupled to counters (42, 43, 44, 45 and 46) and counter gating means arranged to produce first and second square waves which are out of phase with one another, said square waves being coupled to opposite ends of a centre tap transformer 62, the centre tap of which is coupled to said direct current input. 13. A device as claimed in claim 12 including shaping circuits (61, 62) coupled between the counter gating means and said opposite ends of the transformer, each shaping circuit being operable to produce an output waveform which approximates half a cycle of a sinusoidal waveform. -14. Apparatus as claimed in any preceding claim wherein said direct current input is derived from a storage battery and wherein the device includes a battery protection circuit which operates to disconnect the battery when its voltage falls below a predetermined level. 15. Apparatus as claimed in claim 14 including voltage sensing means for sensing the output voltage of the battery and arranged to activate switching means when the battery voltage falls below said predetermined level to short circuit said battery, thereby blowing a fuse in circuit therewith. 16.' Apparatus as claimed in any preceding claim including an alarm circuit to generate an audible and/or visual alarm signal when said monitoring means detects a fault condition.

Inventors: MACGREGOR JAMES, MACGREGOR, JAMES
Applicants: MACGREGOR JAMES, MACGREGOR, JAMES
Application year: 1986
Main classification: H02J9
IPC codes: H02J9