STOP WATCH CAPABLE OF INDICATING A PLURALITY OF SPLIT TIMES

Abstract: In a stop watch, when a switch (Sl) is depressed, hands are operated to start timing. Every time a split time switch (S2) is depressed, the time intervals be­ tween time points at which the split time switch (S2) is depressed are sequentially stored in a memory (23). Therefore, when the switch (S2) is re-depressed, the stop watch terminates its time measurement. A plurality of split times up to the end of time measurement can be reproduced from the latest split time to the earliest split time.

Description: The present invention relates to an analog type stop watch which can measure the time from the starting to the stopping of a start/stop switch, display measurement data by means of hands, and further, display a plurality of split times as elapsed times. Generally, in sports competitions wherein a plurali­ ty of players compete for speed, such as track-and-field and swimming, the finishing times of the respective play­ ers must be recorded in the order of their arrival. When a single person measures the elapsed times of the plu­ rality of players, he necessarily uses a single stop watch to measure their respective finishing times. As examples of stop watches of this type, digital type stop watches are known. More specifically, a digital type stop watch of this type has a counter for measuring the elapsed time since the start, a start/stop switch, and another switch for recording the elapsed time since the start (generally called "elapsed time" or "split time"; to be referred to as "split time" in the present specifi­ cation). Every time the split time recording switch is depressed, the content of the counter at that time is stored in an electronic circuit. To display the split time, data stored in the electronic circuit is displayed on a digital display means after measurement. In other words, with digital type stop watches, if an electronic circuit for storing data during measurement is provided, arbitrary measurement data can be selectively displayed instantaneously. As described above, a split time stored in the electronic circuit is not displayed after measurement. Therefore, it is easy for a digital type stop watch to display a split time for a predetermined period of time when the switch is depressed, allowing the operator to write the displayed time on a sheet of paper or the like. There­ after, the stop watch is instantaneously switched to display the present time being measured since the start, and is prepared for the next measurement. In contrast to this, since conventional analog stop watches perform display mechanically, or geometrically, they cannot be instantaneously switched, in order to display different measurement data. Accordingly, they can merely measure the time from start to finish, and do not allow confirmation of a plurality of split times during or after measurement. When the operator wishes to know a split time, he must read the momentary posi­ tions of moving hands, resulting in erroneous reading. U.S. Patent No. 4,2ll,066 entitled "STOP WATCH" by Kusumoto describes a stop watch wherein the above draw­ backs are eliminated and the hands of a stop watch are stopped to display a split time. More particularly, according to the technique of this U.S. Patent, when a switch of a stop watch is depressed to obtain a split time during measurement, the hands are stopped, and the timer unit is operated to measure the time period dur­ ing which the hands are stopped. When the switch is reactivated, the hands are moved or shifted quickly to compensate for the time during which they have been stopped. With the technique of this Patent, however, each elapse time can be displayed only once and the next elapse time can be obtained only after the hands are moved by the quick-shift operation. As a result, the stop watch operation becomes considerably complex. In addition, when differences among the respective split times of a plurality of persons are small, such split times cannot be measured. The unit of measurement of a stop watch is l/l00 or l/l0 second, and thus is very short. If a pulse shorter than such a unit of measurement is applied to move the hands of a stop watch to catch up with the present time measured from the start, it may damage the mechanism of the watch by the force of its drive torque. In addition, when a split time is displayed for a long period of time and is then canceled, it takes consider­ able time for the hands to catch up with the present time being measured, and the next split time cannot be measured. Furthermore, once measurement of all the split times is finished, each of them cannot be display­ ed again. Therefore, each split time must be written down in record paper during measurement, resulting in inconvenience. The present invention has been made in view of the above situation and has as its object to provide a stop watch which can easily measure a split time without applying a mechanical overload to its gear train mechanism, even if an interval between split times is short. The object can be accomplished by providing a stop watch comprising a stepping motor, a hand drive mechanism coupled to said stepping motor for driving the hands of the stop watch, an oscillator for produc­ ing a reference signal, a stepping motor driving cir­ cuit for frequency-dividing the reference signal, so as to produce a signal for driving said stepping motor, a start/stop control circuit for controlling a supply of the stepping motor driving signal output from said stepping motor driving circuit to said stepping motor, a split time measurement switch for obtaining a plurality of split times by depressing the same a plurality of times while said stepping motor is driven under the con­ trol of said start/stop control circuit, time measure­ ment means for measuring a time interval between suc­ cessive split time points at which said split time measurement switch is depressed, to obtain time interval data, time interval data memory means for storing the time interval data measured by said time measurement means, and reproducing means for driving said stepping motor for a time period corresponding to the time interval data stored in said time interval data memory means while said stepping motor is stopped under the control of said start/stop control circuit, and for reproducing a split time point at which said split time measurement switch is depressed. With this arrangement, although the stop watch of the present invention is of an analog type, it can confirm a plurality of split times after the measurement has been completed, resulting in great convenience. The invention will be more readily understood on reading the following description with reference to the accompanying drawings, in which: Fig. l is a circuit diagram of a stop watch accord­ ing to an embodiment of the present invention; Fig. 2 is a front view of the outer appearance of the stop watch shown in Fig. l; Fig. 3 is a view for explaining the operation of the stop watch shown in Figs. l and 2; Fig. 4 is a circuit diagram of a stop watch according to another embodiment of the present invention; Fig. 5 is a front view of the outer appearance of the stop watch shown in Fig. 4; and Fig. 6 is a view for explaining the operation of the stop watch shown in Figs. 4 and 5. Fig. l is a circuit diagram of stop watch l000 according to the present invention. Referring to Fig. l, oscillator circuit l oscillates a clock sig­ nal having a predetermined frequency. The output sig­ nal of oscillator l is frequency-divided by frequency dividing circuit 2, to a signal having a frequency of, for example, l00 Hz, and is supplied to both AND gates 3 and 4. Reference numerals Sl, S2, and S3 denote manual switches. Switch Sl serves as a start/stop switch, switch S2 serves as a split time measurement switch, and switch S3 serves as an all-reset manual switch. The operation signals of switches Sl, S2, and S3 are applied to corresponding one-shot (multivibrator) cir­ cuits 5, 6, and 7, respectively, to generate one-shot pulse signals. The pulse signal from one-shot circuit 5 is supplied to a T-input terminal of binary flip-­ flop 8, to invert its output state. The output sig­ nal (start signal) of flip-flop 8 is supplied to AND gates 3 and 9 as a gate control signal. The Q output signal of flip-flop 8 is supplied to AND gate l0 as a gate control signal, and to an R-input terminal (reset terminal) of flip-flop l2 as a reset signal. AND gate 3 receives the Q output signal of flip-flop 8 and supplies the l00-Hz signal from frequency-dividing circuit 2 to waveform-shaping circuit l3, as a clock signal. The l00-Hz signal waveform-shaped by circuit l3 is supplied to input terminal a of driving circuit l4. Upon recept of the l00-Hz signal, circuit l4 supplies a forward rotational signal to coil l4a of stepping motor 54, so that motor 54 enables the hands of the watch to move forward. Gear train mechanism l5a drives hand section l5b. Fig. 2 shows the outer appearance of the stop watch of the present invention. Minute hand 29, second hand 30, and l/l00 second hand 3l of section l5b which are moved by gear train mechanism l5a, are coaxially arranged in stop watch l000. Switches Sl, S2, and S3 are arranged on the side of case 32, to be capable of being depressed. Referring back to Fig. l, the pulse signal output from one-shot circuit 6 is supplied to an S-input ter­ minal (set terminal) of flip-flop l2 through AND gate 9. The Q output signal from flip-flop l2 is supplied to AND gates l6 and l7 as a gate control signal. Gate l6 also receives the l00-Hz signal from AND gate 3. The l00-Hz signal from gate l6 is supplied to the UP input terminal of up-/down-counter l8 (a split time counter for obtain­ ing split data), to up-count the split time. More parti­ cularly, upon receipt of the l00-Hz signal through gates 3 and l6, counter l8 starts split time measurement. When input of the l00-Hz signal is prohibited by gate 3 or l6, counter l8 stops split time measurement. Cou­ nter l8 can obtain arbitrary split time data by count­ ing the number of l00-Hz signals supplied thereto. The pulse signal output from one-shot circuit 6 in response to depression of switch S2 for split time measurement, is supplied to gate circuit l9, OR gate 20, and the +l terminal of address counter 22 through AND gates 9 and l7. Therefore, when circuit l9 is enabled, the split time data from counter l8 is stored at address "0" of memory 23. The count content (split time data) of counter l8 is cleared by the output signal of OR gate 20. Each output signal of AND gate l7 increments the address signal of counter 22 by one, so that the address of memory 23 is incremented in unitary increments from "0". In this manner, since the pulse for enabling gate circuit l9 and that for incrementing counter 22 are identical, the first content of counter l8 is stored at memory address 0 of memory 23, the second content of counter l8 is stored at memory address l of memory 23, and so on. The output signal (stop signal) from binary flip-flop 8 is supplied to AND gate l0 as a gate con­ trol signal, and also to the R input terminal (reset terminal) of flip-flop l2, as a reset signal. More specifically, the Q output signal from flip-flop l2 is set to "L" (low) level, to disable AND gate l6, thereby stopping measurement by counter l8. When the Q output signal is generated from flip-flop 8, AND gate 3 is disabled as well, to prohibit output from waveform shaping circuit l3, thereby stopping hands 29, 30, and 3l. Meanwhile, when the output signal from flip-­ flop 8 is set to "H" (high) level, and switch S2 is depressed (to measure/indicate a split time), AND gate l0 generates an output signal. The pulse output signal from one-shot circuit 6 is supplied, via AND gate l0, to the S input terminal (set terminal) of flip-flop 24. The Q output signal from flip-flop 24 is supplied to AND gates 4 and 26 as a gate control signal. Upon receipt of the gate control signal, AND gate 4 sup­ plies the l00-Hz signal from frequency-dividing cir­ cuit 2 to waveform-shaping circuit 25. The l00-Hz sig­ nal waveform-shaped by circuit 25 is supplied to input terminal b of driving circuit l4. Circuit l4 supplies a signal to coil l4a, to drive gear train mechanism l5a in a reverse direction. The l00-Hz signal from gate 4 is also input to the DOWN input terminal of counter l8, through AND gate 26, and the content of counter l8 is counted down from its recorded split time count. When the content of counter l8 becomes 0, 0-detect­ ing circuit 27 outputs a detection signal to gate circuit 28, the R-input terminal (reset terminal) of flip-flop 24, and the -l terminal of address cou­ nter 22. Then, the recorded content of memory 23 at the designated address is transferred to counter l8 through gate circuit 28. Counter 22 decrements the address, thereby decrementing the address of memory 23 (to serve as the address of preceding split time data). Subsequently, the detection signal from 0-detecting circuit 27 sets the Q output signal, of flip-flop 24, to "L", to disable AND gate 4, so that the output from waveform shaping circuit 25 is stopped, thereby stopping counterclockwise movement of hands 29, 30, and 3l of hand section l5b through driving circuit l4 and gear train mechanism l5a. In this case, AND gate 26 is also disabled, so that no output signal is generated there­ from, and counter l8 performs down-counting. Then, operation signal h from switch S3 is sup­ plied to gear train mechanism l5a, to initialize all of hands 29, 30, and 3l of hand section l5b to 0. Signal h is also supplied to one-shot circuit 7, to generate a one-shot pulse signal. The pulse signal from circuit 7 is supplied to the R input terminal (reset terminal) of address counter 22, to designate its address number at 0. The pulse signal from circuit 7 is also supplied, via OR gate 20, to the R terminal of OR gate 20, to clear the counting content of up-/down-counter l8. OPERATION OF STOP WATCH The operation of the stop watch l000 will now be described with reference to Fig. 3. First, manual switch S3 is depressed for initiali­ zation. Then, signal h from switch S3, via gear train mechanism l5a, sets all of hands 29, 30, and 3l to "0". The pulse signal output from one-shot circuit 7 is supplied to counter l8, to clear it through OR gate 20, and address counter 22 is set at address "0". For example, assume that four players have started simultaneously and a person in charge of time measure­ ment has depressed manual switch Sl of the stop watch. Upon doing so, an output pulse from one-shot circuit 5 sets the Q output signal, from binary flip-flop 8, to "H" level, to enable AND gate 3, and a l00-Hz sig­ nal from frequency-dividing circuit 2 is supplied to waveform-shaping circuit l3. Driving circuit l4 moves hands 29, 30, and 3l through gear train mechanism l5a. In this state, only hands 29, 30, and 3l move, up/down counter l8 does not perform the counting operation, the content thereof being 0, the address signal of address counter 22 is also 0, and nothing is recorded in memory 23. Thereafter, assume that a first player reaches the goal at l′05"40 after the start, and split switch S2 is depressed. Then, the pulse output from one-shot cir­ cuit 6 passes AND gate 9, which is enabled by the "H" level Q output signal supplied from flip-flop 8, sets flip-flop l2, and sets the Q output signal, from flip-­ flop l2, to "H" level. The "H" level signal enables AND gate l6 and the l00-Hz signal is supplied, via gate l6, from AND gate 3 to up/down counter l8, thereby starting up-counting. In this case, hands 29, 30, and 3l keep moving, for time measurement. Now assume that a second player has made the goal l"60 after the first player, and switch S2 is depressed again (hands 29, 30, and 3l indicate l′07"00 at this time). The output pulse from circuit 6 then passes AND gate 9, which is enabled by the "H" level Q output signal from flip-flop 8, sets flip-flop l2, and sets the Q output therefrom to "H" level. The pulse output from gate 9 passes AND gate l7 which is enabled by the "H" level Q output signal from flip-flop l2, to enable gate circuit l9. Therefore, the content (l"60) of counter l8 is stored at address 0 of memory 23, and the address designation of counter 22 is incremented by one. The content (l"60) of counter l8, which is the last counted split time, is cleared. In this case, since the "H" level Q output signal of flip-flop l2 also enables AND gate l6, the l00-Hz signal is kept supplied, from AND gate 3 via AND gate l6, to cleared counter l8, thereby continuing up-counting. Now assume that a third player has made the goal 2"30 after the second player, and switch S2 is depressed again (hands 29, 30, and 3l indicate l′09"30 at this time). In this case, the pulse output from circuit 6 passes AND gate 9, which is enabled by the "H" level output signal from flip-flop 8, to set flip-flop l2 and to set the Q output signal therefrom to "H" level. The pulse output from AND gate 9 passes AND gate l7 which is enabled by the "H" level Q output signal from flip-flop l2, enables gate circuit l9, in the same manner as de­ scribed above, and the content of counter l8, i.e., 2"30, is stored at address l of memory 23. The address designation of address counter 22 is then incremented by one. The content (2"30) of counter l8 is cleared. Since the Q output signal from flip-flop l2 is kept at "H" level, it keeps AND gate l6 enabled, and the l00-Hz signal continues to be supplied to cleared counter l8, from AND gate 3, through AND gate l6, thereby continuing up-counting from 0. Now assume that a fourth player has finally made the goal 3"56 after the third player, and switch Sl as the stop switch is depressed. In this state, hands 29, 30, and 3l indicate the present time from the start, i.e., l′l2"86. The pulse signal output from one-shot circuit 5 inverts the output state of flip-flop 8, so that Q output thereof is set to "L" level and output thereof is set to "H" level. The "L" level Q output signal disables gate 3, to stop hands 29, 30, and 3l as they indicate the finishing time of the fourth player, i.e., l′l2"86, and flip-flop l2 is reset, to set its Q output to "L" level. Thus, AND gate l6 is disabl­ ed, and measurement by counter l8 is stopped at 3"56. Now assume that switch S2 as a split time switch is de­ pressed to obtain the finishing time of the third player. Upon doing so, the pulse signal output from circuit 6 passes AND gate l0, which is enabled by the "H" level output signal from flip-flop 8, sets flip-flop 24, and sets the Q output thereof to "H" level. This enables AND gate 4, the l00-Hz signal from frequency-dividing circuit 2 is supplied to waveform-shaping circuit 25 through gate 4, and hands 29, 30, and 3l are moved cou­ nterclockwise by circuit 25 through driving circuit l4 and gear train mechanism l5a. In this case, the "H" level Q output signal from flip-flop 24 also enables AND gate 26. Therefore, the l00-Hz signal from frequency dividing circuit 2 is supplied, via gates 4 and 26, to counter l8, to command it to down-count. Since data 3"56 is stored in counter l8, counter l8 starts down-­ counting from this value. When the content of counter l8 reaches "0", 0-detecting circuit 27 outputs a detec­ tion pulse to counter 22, flip-flop 24, and gate circuit 28. First, circuit 28 is enabled, and the content (2"30) at address l of memory 23 is transferred to cleared cou­ nter l8 through a bus line or the like. Counter 22 de­ crements its address designation by one, and flip-flop 24 is reset to set its Q output to "L" level. AND gate 4 is thus disabled, the l00-Hz signal from frequency-dividing circuit 2 does not pass gate 4, the output from waveform-­ shaping circuit 25 is stopped, and the counterclockwise rotation of hands 29, 30, and 3l is stopped. At this time, hands 29, 30, and 3l indicate a time obtained by subtracting 3"56 from l′l2"86, as the finishing time of the fourth player, i.e., l′09"30 (the finishing time of the third player). At this time, the time difference of 2"30 between the finishing times of the second and third players is transferred to counter l8 from memory 23, and is stored therein. Assume that switch S2 is then depressed, to obtain the finishing time of the second player. In the same manner as described above, hands 29, 30, and 3l are rotated counterclockwise until the content of counter l8, i.e., 2"30, is decreased to 0. When the content of counter l8 becomes 0, hands 29, 30, and 3l are stopped when they indicate l′07"00 (the finishing time of the second player). In this case, the time difference l"60 between the finishing times of the second and first players is transferred to counter l8 from memory 23, and is stored therein. Assume that switch S2 is depressed a final time, to obtain the finishing time of the first player. Hands 29, 30, and 3l are rotated counterclockwise in the same manner as described above until the content of counter l8, i.e., l"60, is decreased to "0". When the content of counter l8 becomes "0", hands 29, 30, and 3l are stopped when they indicate l′05"40 (the finishing time of the first player), and the content of counter l8 becomes "0" simultaneously. In this manner, after the split times of a plurality of players are measured, the hands are sequentially rotated counterclockwise, so that the finishing times of the respective players can be ob­ tained with comparative ease. In the above embodiment, the stepping motor is rotated in the reverse direction, so as to sequentially rotate the hands counterclockwise to positions indicat­ ing a time point at which split time switch S2 has been depressed. In other words, the hands are moved from the stop position (i,e., the finishing time) toward the starting position while they are in turn stopped at the respective split time positions. Conversely, if the hands are cleared, i.e., returned to a position indicating 0°00′00 and are sequentially fed quickly to positions indicating a time point at which switch S2 has been depressed, the stepping motor need not be rotated in the reverse direction. In this case, time period data from a time point at which switch Sl is depressed to a time point at which switch S2 is depres­ sed for the first time, must be stored in memory 23. For this purpose, an OR circuit is provided between AND gate 9 and flip-flop l2, so as to receive an output signal from gate 9 and an initial operation signal from switch Sl. When a split time is to be displayed, the time period data is read out from memory 23 in accord­ ance with the order in which it is stored, and the hands are driven to move over a distance corresponding to the respective time period data. In the above embodiment shown in Figs. l to 3, the hands of the stop watch were started by depression of switch Sl, and kept moving at a frequency of l00Hz until they were stopped by re-depression of switch Sl. Upon depression of switch S2, if the hands were stopped at each respective split time as described in U.S. Patent No. 4,2ll,066, the split time could be obtained then, resulting in great convenience. In this case, however, when the hands of the conventional stop watch are stopped at each split time and are started again, if a quick-shift pulse is supplied to the stepping motor, the stepping motor is overloaded and may sometimes be damaged. If a split time is displayed for a long period of time, it prolongs the quick-shift time of the hands, and a next split time cannot thus be measured during this quick-shift time. Figs. 4 to 6 show stop watch 2000 according to a second embodiment, wherein these problems are reduced. When stop watch 2000 is used as in the embodiment shown in Figs. l to 3, it serves as a very convenient stop watch. Referring to Fig. 4, oscillator circuit l0l oscil­ lates a clock signal having a predetermined frequency. A signal from circuit l0l is frequency-divided by fre­ quency-dividing circuit l02 to a signal having a fre­ quency of, for example, 50 Hz (50 p/s), and is sup­ plied to AND gate l03. Reference numerals Sl0l and Sl02 denote manual switches provided on the side of stop watch 2000. Switch Sl0l serves as a start/stop switch, and switch Sl02 serves as a split/split can­ cel switch. Operation signals from switches Sl0l and Sl02 are supplied to corresponding one-shot (multi­ vibrator) circuits l04 and l05, to generate one-shot pulse signals. The pulse signal from circuit l04 is supplied to a T input terminal of binary flip-flop l06, to invert its output state. The Q output signal (start signal) of flip-flop l06 is supplied to AND gates l03, l07, and l08, as a gate control signal. The Q output signal (stop signal) of flip-flop l06 is supplied to AND gate l09, as a gate control signal. Gate l03 sup­ plies the 50-Hz signal (50 p/s) from frequency-dividing circuit l02 to AND gates lll and ll2. The 50-Hz signal passing through gate lll is supplied to waveform shaping circuit ll3. The signal waveform-shaped by circuit ll3 is supplied to stepping motor driving section ll4, to allow 2/l00 second hand axis ll5 to rotate in units of minimum time measurement. The 50-Hz signal output from gate lll is supplied to fifty count counter ll6. Gate lll supplies l-Hz signal l to OR gate ll7 every one second (2/l00 × 50 = l). The l-Hz signal which passed through gate l7 is supplied to waveform shaping circuit ll8. The l-Hz signal waveform-shaped by circuit ll8 is then supplied to stepping motor driving section ll9, so as to cause second hand axis l20 and minute hand axis l2l to rotate through the same gear train. A pulse sig­ nal output from one-shot circuit l05 by depression of switch Sl02 is supplied to a T input terminal of binary flip-flop l23, to invert its output state. The Q output signal from flip-flop l23 is supplied to AND gate l07, as a gate control signal. On the other hand, the output signal from flip-flop l23 is supplied to AND gate l08, as a gate control signal. An output signal from gate l08 is supplied to an S input terminal (set terminal) of flip-flop l24, as a set signal. A signal output from AND gate l25 receiving the signal from gate l07 is supplied to AND gate ll2 directly, as well as to AND gate lll, through inverter l26, thereby selectively enabling/disabling gates lll and ll2. Therefore, the 50-Hz signal is supplied to fifty count counter ll6 or l27, through gate lll or ll2, in accordance with the output state of gate l25. Fifty count counter l27 supplies a carry signal to AND gate l28 and five count counter l29 every one second. Counter l29 supplies a carry signal to five-pulse generating circuit l30 every five seconds. Upon reception of the carry signal from counter l29, circuit l30 supplies five pulses 2 having a frequency of ll6 Hz to OR gate ll7. Pulse generating circuit l3l monitors the number of counts of counter l29. Upon reception of a pulse signal from AND gate l28, circuit l3l supplies pulses 3 of the same number, i.e., corresponding to the content of counter l29 and having a frequency of ll6 Hz, to OR gate ll7. Then, pulse generating circuit l3l clears the count of counter l29 to "0". The carry signal, which is supplied from counter l29 every five seconds, is input, as a reset signal, to the R input terminal (reset terminal) of binary flip-flop l23 via OR gate l32. When the output signal of flip-flop l06 is at "H" level (high level) and switch Sl02 is depressed, a pulse signal output from one-shot circuit l05 is supplied to OR gate l32 and heart cam driving circuit l33, through AND gate l09. The signals from counter l29 and gate l09 that are supplied to the R input terminal of flip-flop l23, through gate l32, can reset, (i.e., set to "L" (low level), the Q output signal of flip-flop l23, as they priority over other signals. The output signal (R) of AND gate l09, is supplied to fifty count counters ll6 and l27, as an R signal, to clear the count content thereof to 0. Heart cam driving circuit l33 receives a signal from gate l09, to set hands of 2/l00 second hand axis ll5, second hand axis l20, and minute hand axis l2l to their initial positions, i.e., at 0, through their heart cam mechanisms. Fig. 5 shows the outer appearance of the stop watch shown in Fig. 2. Manual switches Sl0l and Sl02 are provided on the side of case l34, to be capable of being depressed. 2/l00 second hand l35 is mounted on axis ll5, and second hand l36, second hand axis l20, and minute hand l37 are coaxially mounted on axis l2l. OPERATION OF STOP WATCH The operation of the stop watch shown in Figs. 4 and 5 will now be described with reference to Fig. 6. Assume that manual switch Sl0l is depressed, to start measurement. A pulse signal is output from one-shot circuit l04, to set the Q output signal of binary flip-flop l06 to "H" level. This enables AND gate l03, and a 50-Hz signal from frequency-dividing circuit l02 is input to waveform shaping-circuit ll3 and fifty count counter ll6 through AND gates l03 and lll (in this case, AND gate ll2 is disabled). The 50-Hz (2/l00 second) signal input to circuit ll3 drives 2/l00 second hand axis ll5 through stepping motor driving section ll4. At the same time, the 50-Hz signal input to counter ll6 becomes l-Hz (l second) signal l, is passed through OR gate ll7, and drives axes l20 and l2l of the same system through stepping motor driving section ll9, thereby performing time measurement. Therefore, as shown in Fig. 6, after the stop watch is started, first stepping motor 2l4 for axis ll5 and second stepping motor 2l9 for axes l20 and l2l are driven simultaneously during a time period of, for example, 5′l5"30 (i.e., until split switch Sl02 is depressed). Now assume that switch Sl02 is depressed 5′l5"30 after the start. A pulse signal is then output from one-shot circuit l05, and the Q output signal of flip-flop l23 is set to "H" level. This in turn sets the output of AND gate l07 to "H" level, to disable AND gate lll, thereby stopping axes ll5, l20, and l2l. At this time, hand l35 indicates "30, and hands l36 and l37 indicate 5′l5. The person in charge of time measurement can then recognize the split time and write it down on a sheet of paper or the like. In this case, the 50-Hz signal is input to fifty count counter l27 through AND gate ll2, in order to supply l-Hz (l second) signals to counter l29. Counter l29 counts five l-Hz signals and supplies a single pulse signal to five-pulse generating circuit l30 and OR gate l32 (five seconds after). Upon reception of the pulse signal, circuit l30 supplies five short pulse signals  2 (l6 Hz) to waveform-shaping circuit ll8 through OR gate ll7. The quick-feed pulse 2 from circuit ll8 allows hands l36 and l37 to move through stepping motor driving section ll9, so as to compensate for the 5 second delay. Note that quick feed pulse 2 and output l of counter ll6 have different phases, so that they are not superposed on each other. The pulse signal from counter l29, which has passed OR gate l32 simultaneously with the signal which has passed generating circuit l30, resets binary flip-flop l23, and sets its Q output signal to "L" level. The output signals of AND gates l07 and l25 are then also set to "L" level, to enable AND gate lll and to disable AND gate ll2 again, respectively. As a result, the 50-Hz signals from frequency-dividing circuit l02 and gate l03 are supplied to waveform-shaping circuit ll3 and cou­ nter ll6, respectively. In the same manner as described above, when five seconds have elapsed, the 50-Hz (2/l00 second) signal input to circuit ll3 causes hand l35 to be moved from the same position through driving section ll4. At the same time, the 50-Hz signal input to counter ll6 becomes a l-Hz signal and passes OR gate ll7, so as to allow hands l36 and l37 to move, through circuit ll8 and driving section ll9, to catch up with the present time being measured by the 2 signal. In this manner, axes ll5, l20 and l2l are stopped for five seconds after the split time measurement. Thereafter, axes l20 and l2l are moved quickly to compensate for the five second delay, and resume movement from 5′20. Axis ll5 resumes movement from the original position of "30. Since counter l29 is a five count counter, the split time display mode is automatically canceled after five seconds. When the automatic cancel time is to be changed, five count counter l29 may be replaced by an arbitrary n count counter. A case will be described wherein the split time display mode is canceled before five seconds elapse. Assume that split switch Sl02 is depressed at 8′00"60. Then, in the same manner as described above, axis ll5 is stopped, to indicate "60, axes l20 and l2l are stopped, to indicate 8′00, and the person in charge of time measurement reads the indicated split time. Thereafter, since axes ll5, l20, and l2l do not need to be kept stopped any longer and are returned to original time measuring as soon as possible, switch Sl02 is depressed again, to cancel the split time display mode. For example, assume that switch Sl02 for split time display is depressed 3"20 after 8′00"60. A pulse signal from one-shot circuit l05 then sets the "H" level output signal of binary flip-flop l23 to "L" level, and sets the output signal therefrom to "H" level. The output signal of AND gate l08 is set to "H" level, flip-flop l24 is set, the Q output signal of flip-flop l24 is set to "H" level, and AND gate l28 is enabled. A l-Hz (l second) signal from fifty count counter l27 passes through gate l28 and is supplied to both flip-­ flop l24 and pulse generating circuit l3l. As shown in Fig. 6, even if switch Sl02 is depressed 3"20 after 8′00"60, counter l27 does not output a l-second signal until 4 seconds have elapsed, so that the split time display mode is canceled after 4 seconds (delayed by 0"80). Circuit l3l receives a signal from gate l28, supplies four quick feed pulses (higher than 5 Hz) 3 corresponding to the count (in this case, 4 pulses) of counter l29 to OR gate ll7, and clears the count of counter l29 to 0. Note that signal 3 and l have different phases from each other. The four quick feed pulses passing OR gate ll7 drive axes l20 and l2l through waveform-shaping circuit ll8 and stepping motor driving section ll9, so as to compensate for the 4 second delay. At the same time, flip-flop l24 is reset by an output signal from AND gate l28, 4 seconds after the split time display mode, and its Q and output sig­ nals are set to "H" level and "L" level, respectively. Thus, AND gate l28 is disabled and the output therefrom is stopped. In this case, since an output signal from gate l07 is at "L" level, an output signal from AND gate l25 is also set to "L" level, AND gate lll is enabled, AND gate ll2 is disabled, and a 50-Hz signal received from frequency-dividing circuit l02, through AND gate l03, is supplied to circuit ll3 and fifty count counter ll6. In the same manner as described above, the 50-Hz (2/l00 second) signal input to circuit ll3 drives axis ll5, through stepping motor driving section ll4, from the same position, after 4 seconds. At the same time, the 50-Hz signal input to counter ll6 becomes a l-Hz signal. The l-Hz signal passes OR gate ll7 and drives axes l20 and l2l, which have been already moved quickly, by signal 3, through driving section ll9, in accordance with the present time measurement. In this manner, axes ll5, l20, and l2l are stopped for 4 seconds after set­ ting the split time display mode. Thereafter, axes l20 and l2l are fed quickly, to compensate for the 4 second delay, and resume movement of their respective hands from 8′04, and axis ll5 resumes movement of its hand from the original position of "60. Therefore, although the split time display mode is automatically canceled after 5 seconds, switch Sl02 can be depressed even before 5 seconds elapse, so as to cancel the split time display mode at an earlier stage. In this case, frac­ tions below l second are rounded up, i.e., a value between l and 2 seconds is rounded up to 2 seconds, a value between 2 and 3 seconds is rounded up to 3 seconds, and a value between 3 and 4 seconds is rounded up to 4 seconds, and the hands then resume movement. Now assume that switch Sl0l is depressed a final time. Then, an output pulse from one-shot circuit l04 sets the Q output signal of binary flip-flop l06 to "L" level, so that AND gate l03 is disabled, and the hands are stopped. Subsequently, when manual switch Sl02 is de­ pressed, an output pulse from one-shot circuit l05 passes through AND gate l09, resets fifty count cou­ nters ll6 and l27, axes ll5, l20, and l2l, and binary flip-flop l23, thereby setting the stop watch to the initial state. In the above embodiment described with reference to Figs. 4 to 6, there was shown only a configuration which is related to a function for stopping the hands for a predetermined period of time when split time display manual switch Sl02 is depressed. However, up/down counter l8, memory 23, and waveform shaping circuit 25 for rotating the stepping motor in the reverse direction, which are shown in Fig. l, and other necessary functions can be added, so that a split time can be displayed after stopping the stop watch as per the embodiment in Fig. l. The present embodiments exemplify only a stop watch function. However, this stop watch function can be incorporated in an analog type wrist watch for indi­ cating the time. In this case, the hour, minute, and second hands of the wristwatch for indicating the time can be used as minute, second, and l/l00 or l/l0 second hands, respectively.

Claims: 1. A stop watch characterized by comprising: a stepping motor (54); a hand drive mechanism (l5a) coupled to said step­ ping motor (54) for driving hands (29, 30, 3l) of the stop watch; an oscillator (l) for producing a reference signal; a stepping motor driving circuit (2, 3, l3, l4, 25) for frequency-dividing the reference signal, so as to produce a stepping motor driving signal for driving said stepping motor (54); a start/stop control circuit (Sl, 5, 8) for con­ trolling a supply of the stepping motor driving signal output from said stepping motor driving circuit (2, 3, l3, l4, 25) to said stepping motor (54); a split time measurement switch (S2) for obtaining a plurality of split times by depressing the same a plurality of times while said stepping motor (54) is driven under the control of said start/stop control circuit (2, 3, l3, l4, 25); time measurement means (9, l2, l6, l8) for measur­ ing a time interval between successive split time points at which said split time measurement switch (S2) is depressed, to obtain time interval data; time interval data memory means (23) for storing the time interval data measured by said time measurement means (9, l2, l6, l8); and reproducing means (4, l0, l7, 20, 22, 24, 25, 27, 28, 29) for driving said stepping motor (54) for a time period corresponding to the time interval data stored in said time interval data memory means (23) while said stepping motor (54) is stopped under the control of said start/stop control circuit (Sl, 5, 8), and for repro­ ducing a split time point at which said split time measurement switch (S2) is depressed. 2. A stop watch as claimed in claim l, characterized in that said reproducing means (4, 28) includes: detecting means (l0) for detecting that said split time measurement switch (S2) is depressed while said stepping motor (54) is stopped, so as to reproduce the split time in response to a detection signal obtained by said detecting means (l0). 3. A stop watch as claimed in claim l, charac­ terized in that said reproducing means (4, 28) includes: waveform shaping means (25) for producing a revers­ ing signal capable of rotating said stepping motor (54) in a reverse direction, so as to supply the reversing signal therefrom to said stepping motor (54) and repro­ duce the split time. 4. A stop watch as claimed in claim l, charac­ terized in that said time measurement means (9, l2, l6, l8) includes: memory means (l2) for storing a first depression of said split time measurement switch (S2) after commence­ ment of said stop watch, so as to start time measurement upon the first depression of said switch (S2) inresponse to an output from said memory means (l2). 5. A stop watch as claimed in claim l, charac­ terized in that said time measurement means further includes: means (l7, l9) for transferring the time interval data to said time interval data memory means (23) upon depression of said split time measurement switch (S2). 6. A stop watch as claimed in claim l, charac­ terized in that said reproducing means includes: transfer means (28) for transferring the time interval data stored in said time interval memory means (23) to said time measurement means(9, l2, l6, l8); reverse rotating means (24, 4, 25) for rotating said stepping motor (54) in the reverse direction after the transfer by said transfer means (28); and, stopping means (27) for stopping the reverse rotation of said stepping motor (54) when said stepping motor (54) is rotated in the reverse direction for a time period corresponding to the time interval data transferred to said time interval measurement means (23) by said reverse rotating means (24, 4, 25). 7. A stop watch as claimed in claim 6, charac­ terized in that said time measurement means is measure­ ment means (l8) capable of up-/down-counting, said stop watch further comprises subtracting means (26) for per­ forming subtraction during the reverse rotation of said stepping motor (54), and said stopping means includes zero detecting means (27) for stopping the reverse rotation of said stepping motor (54) when the content of said measurement means (9, l2, l6, l8) becomes zero by means of said subtracting means (26). 8. A stop watch as claimed in claim l, charac­ terized in that said time interval data memory means includes a memory (23) for storing the time interval, and address designating means (22) for designating an address of said memory (23), the content of the address designating means (22) are designated in different addresses of said memory (23) every time said split time measurement switch (S2) is depressed, and said time interval data is stored in an address region of said memory (23) designated by said address designat­ ing means (22). 9. A stop watch as claimed in claim l, charac­ terized in that said reproducing means includes; means for clearing said hand drive mechanism (l5a) and returning the same to an initial position; and, means for driving said stepping motor (54) from the initial position of said hand drive mechanism (l5a) returned by said clearing means to a position at which said split time measurement switch (S2) has been depressed. l0. A stop watch as claimed in claim l, charac­ terized in that said stepping motor includes; a first stepping motor (2l4) for driving a hand (ll5) indicating a minimum time unit of measurement data; and, a second stepping motor (2l9) for driving a hand (l20, l2l) indicating a time unit higher than the minimum unit indicated by said hand (ll5) of said first stepping motor (2l4). 11. A stop watch as claimed in claim l, charac­ terized in that said stepping motor driving circuit includes; stopping means (l25, l26) for stopping the driving of said stepping motor (2l4, 2l9) when said split time measurement switch (Sl02) is depressed, stop time measurement means (l27, l29) for measur­ ing a stop time during which said stepping motor (2l4, 2l9) is stopped by said stopping means (l25, l26); and, restart means (l32, l30) for re-driving said step­ ping motor (2l4, 2l9) when the stop time measured by said stop time measurement means (l27, l29) reaches a predetermined value. 12. A stop watch as claimed in claim ll, charac­ terized in that said restart means includes quick-shift means (l30) for quick-shifting said stepping motor (2l4, 2l9) for a time period corresponding to the stop time measured by said stop time measurement means (l27, l29). 13. A stop watch as claimed in claim l2, charac­ terized in that said stepping motor is constructed by a first motor (2l4) for driving a hand (ll5) indicating a minimum time unit of measurement data; and, a second stepping motor (2l9) for driving a hand indicating a time unit higher than the minimum time unit, and said quick-shift means (l30) drives said second stepping motor (2l9) so as to perform quick-shifting.

Inventors: NAKAZAWA, EIJI PATENT DEPT., DEV. DIV. HAMURA
Applicants: CASIO COMPUTER COMPANY LIMITED
Application year: 1986
Main classification: G04F8
IPC codes: G04F8, G04C3