SIGNAL PROCESSING CIRCUIT

Abstract: A signal processing circuit for certainly detecting pre­ sence or absence of a change in the vertical direction of amplitude and phase of a chrominance signal comprises a converter (23) for converting the change in the vertical direction of amplitude and phase of the input chrominance signal into a change in the direction of amplitude, one or more comparing circuits (28, 32) for comparing the con­ verted output with a signal obtained by passing the con­ verted output through one or a plurality of delay circuits (26, 27) and an operational circuit (36) for operating on the output of the or each comparing circuit (28, 32).

Description: The present invention relates to a video signal processing circuit for use in a video tape recorder (VTR), television set, and the like. Recently, comb filters have become widely used in signal processing circuits for processing video signals. In the case of NTSC standard video signals, for example, the spectra of the chrominance signal (hereinafter referred to as the (C Signal) are interleaved between those of the luminance signal (hereinafter referred to as the Y signal) at intervals related to the horizontal scanning period (the period hereinafter called 1 H). The luminance signal is separated from the input video signal by a Y-type comb filter which adds a video signal delayed by 1 H to the input video signal, and the chrominance signal is separated from the input video signal by a C-type comb filter which subtracts the 1 H-delayed video signal from the input video signal. Thus, comb filters are used in the so-called Y/C separating circuit. A C-type comb filter is also used in the colour signal-to-noise (S/N) ratio improving circuit of a VTR. The aforementioned comb filters, however, function only if the vertical correlation of the chrominance signal is large. During a period in which the vertical correlation is small, the Y/C separation does not function well, producing such bad results as color fringing and dot interference. There have been proposed various methods for detecting the presence or absence of vertical correlation of the chrominance signal. One method detects the vertical correlation of the Y signal, utilizing the fact that correlation between the Y signal and the C signal is large, but this causes malfunction with a signal in which there is no correlation between the Y signal and the C signal. Another method is proposed by Yves C. Faroudja in Japanese Laid-open Patent Application No. 56-40382 (equivalent to US-A-4240105) for detecting the correlation when the signal level of the C signal frequency component and the signal level of the Y signal frequency component are both larger than a predetermined level. A simplified block diagram of this prior art method is shown in Fig. 13. According to this construction, when a C signal as shown by a in Fig. 14 is inputted, a signal b as a detected output by the C type comb filter and a signal c as a detected output by the Y type comb filter are passed through an AND gate 81, and a signal as indicated by d is thereby outputted. When a signal which includes a difference only in phase, as shown by a in Fig. 15, is inputted, however, a signal as indicated by d will be outputted even if the signals b and c are passed through the AND gate, so that the correlation of the C signal will not be detected (this is a disadvantage with this method). In other words, with the arrangement as described above, it is impossible to detect the absence of vertical correlation of the C signal from a signal which includes neither correlation between the C signal and the Y signal nor a change of amplitude in the vertical direction of the C signal, but only includes a change of hue. Therefore, in this method the problems of color fringing or dot interference being produced are unavoidable. An object of the present invention is to provide a signal processing circuit which is capable of accurately detecting the vertical correlation of the chrominance signal. The present invention provides a chrominance signal processing circuit comprising: a converter for converting a change in the vertical direction of amplitude or phase of an input chrominance signal (a) into a change in amplitude in the vertical direction; characterised by further comprising: a comparing circuit for comparing the amplitude level of the output of said converter delayed by a predetermined time period with the amplitude level of the output of said converter, whereby a lack of vertical correlation of the input signal (a) is detected. The present invention with the above described structure enables changes in the vertical direction of each of amplitude level and phase of a chrominance signal to be detected, and the presence or absence of vertical correlation of the chrominance signal may thereby be detected with certainty. Fig. 1 is a block diagram showing a signal processing circuit according to a first embodiment of the invention; Fig. 2 is a block diagram showing main portion of the signal processing circuit of Fig. 1; Figs. 3 and 4 are waveform diagrams showing signal waveforms at various points in Figs. 1 and 2, respectively; Fig. 5 is a block diagram showing a signal processing circuit according to a second embodiment of the invention; Fig. 6 is a block diagram showing main portion of the signal processing circuit of Fig. 5; Fig. 7 and 8 are waveform diagrams showing signal waveforms at various points in Figs. 5 and 6, respectively; Fig. 9 is a block diagram showing a signal processing circuit according to a third embodiment of the invention; Fig. 10 is a block diagram showing main portion of the signal processing circuit of Fig. 9; Figs. 11 and 12 are waveform diagrams showing signal waveforms at various portions in Figs. 9 and 10, respectively; Fig. 13 is a block diagram showing a prior art signal processing circuit; and Figs. 14 and 15 are waveform diagrams for the same. Signal processing circuits according to preferred embodiments of the present invention will be described below with reference to the accompanying drawings. Fig. 1 is a block diagram of a first preferred embodiment of the invention. A chrominance signal input to an input terminal 1 is passed through a band pass filter (BPF) 14 and sent to a converter 9 consisting of a 1 H delay circuit 2 and a subtractor 3, where a change of phase in the vertical direction of the chrominance signal is converted into a change in amplitude. The chrominance signal is then sent to a comparing circuit 10; that is, the same is, on one hand, sent to a detector 5 via a 1 H delay circuit 4, and, on the other hand, sent to a detector 6. Outputs of the detectors 5 and 6 are compared in a comparator 7 and when the level difference is large enough, a signal of High level, for example, is output from an output terminal 8. An example of the comparator 7 is shown in Fig. 2. The output of the detector 5 is connected to a negative input of a comparator 11 and a positive input of a comparator 12; and the output of the detector 6 is connected to a positive input of the comparator 11 and a negative input of the comparator 12. Outputs of the comparators 11, 12 are subjected to an OR operation for the high level by diodes 13 and 14 and sent to the output terminal 8. Operations of various parts of the present invention as constructed above will be described below referring to the waveform diagrams of Figs. 3 and 4. First, the case where amplitude of the chrominance signal changes in the vertical direction is shown in Fig. 3, in which the diagrams a to g indicate the waveforms corresponding to the points a to g in Figs. 1 and 2. The input signal a is converted into a chrominance signal b by means of a comb filter, then detected and converted into signals c and d by the detectors 5, 6; the latter are then converted into signals e, f in the comparator 7 and output as a signal g following an OR operation thereon. At this stage it is found that the signal g includes the period z during which there is no vertical correlation of the chrominance signal. The case where hue changes in the vertical direction is illustrated in Fig. 4. The input signal a is converted into a chrominance signal b by means of the comb filter, then detected and converted into signals c and d by the detectors 5, 6; the latter are then converted into signals e, f in the comparator 7 and output as a signal g. At this stage, it is found that the signal g includes the period z during which there is no vertical correlation of hue, which in prior art devices has not been detectable. That is, two sets of 1 H delay circuits 2 have been used in this embodiment as shown in Fig. 1, and the change of hue in the vertical direction has been converted into the change of color in the direction of amplitude by the converter constituting the first 1 H delay circuit, whereby detection of the change of hue in the vertical direction, which was unachievable by prior art devices, is made possible. The band pass filter 14 in the present embodiment may be disposed in the stage subsequent to the subtractor 3, in the stage preceding the detectors 5, 6, or may be eliminated. When it is desired to apply the present invention to the recording and reproducing systems of a VTR or the like, it is possible to implement the invention by inserting the stages of the circuit up to the band pass filter 14 and the converter 9 of the embodiment of Fig. 1 into the recording system, and inserting the succeeding stages into the reproducing system. By so doing, a resulting advantage is that the number of delay circuits can be reduced to one. A signal processing circuit according to a second preferred embodiment of the present invention will be described below with reference to Figs 5 to 8 of the accompanying drawings. Figure 5 is a block diagram of the second preferred embodiment of the invention. A chrominance signal input to an input terminal 21 is passed through a band-pass filter 22 and sent to a converter 23 consisting of a 1 H delay circuit 24 and a combining circuit or subtractor 25, where a change of phase in the vertical direction of the chrominance signal is converted into a change of amplitude. The chrominance signal is sent to a delay circuit 26 and to a comparing circuit 28; the output of the delay circuit 26 is sent to a delay circuit 27 and to the comparing circuits 28 and 32; and the output of the delay circuit 27 is sent to the comparing circuit 32. In the comparing circuit 28, the input signals are detected by detectors 29, 30 and the detected signals are compared by a comparator 31, and if the level difference is large enough, a signal of High level is output to an operational circuit 36. Similar operations are also made in the comparing circuit 32. The operational circuit 36 is constituted of an inverter circuit 37 and an AND circuit 38, for example, and operates such that, if the output of the comparing circuit 28 is "1" and the output of the comparing circuit 32 is "0", the latter delivers an output of "1". As a matter of course, this polarity may be opposite if the circuits in the succeeding stages are arranged accordingly. While an example of the comparators 31, 35 is shown in Fig. 6, these components are the same as in the example shown in Fig. 2. The operations of various stages of the the second embodiment of invention as described above will now be described with reference to waveform diagrams of Figs. 7 and 8. First, the case where amplitude of the chrominance signal changes in the vertical direction is indicated in Fig. 7, in which the diagrams a to j indicate the waveforms corresponding to those labelled a to j in Figs. 5 and 6. The input signal a is converted into a chrominance signal b by means of a comb filter, then detected and converted into signals c and d by the detectors 29, 30, and the latter are then converted into signals f, g in the comparator 31 and output as a signal h following an OR operation thereon. In the same way, signals d, e are provided through detection by detectors 33, 34 and signals d, e are output from the comparator 35 as a signal i. In addition, through an operation on the signals h and i by the operational circuit 36, a signal j is output. At this point, it is found that the signal j indicates the period z during which there is no vertical correlation of the chrominance signal. Secondly, the case where hue changes in the vertical direction is indicated in Fig. 8. The input signal a is converted into a chrominance signal b by means of the comb filter 23 as a converter, then detected and converted into signals c and d by the detectors 29, 30; signals c and d are then turned into signals f, g in the comparator 31 and output as a signal h. In the same way, after detection by the detectors 33, 34 and comparison by the comparator 35, a signal i is output. In addition, through an operation in the operational circuit 36 on the signals h and i, a signal j is output. At this point, it is found that the signal j indicates the period z during which there is no vertical correlation of hue, the detection of which had not been possible in prior art devices. That is, the change of hue in the vertical direction is converted into the change of color in the direction of amplitude by the converter consisting of the 1 H delay circuit as shown in Fig. 5, whereby detection of the change of hue in the vertical direction, which was unachievable by prior art devices, is made possible. The band pass filter 22 in the present embodiment may be disposed in the stage subsequent to the subtractor 25, in the stage preceding the detectors 29, 30, 33, 34, or may be eliminated. Also, since the output signals of the detector 30 and the detector 33 are the same, it is possible to eliminate, for example, the detector 33 and adapt the output of the detector 30 to be input to the comparator 35. When it is desired to apply the present invention to the recording and reproducing systems of a VTR or the like, it is possible to implement the invention by inserting the stages of the circuit up to the band pass filter 22 and the converter 23 of the embodiment of Fig. 5 into the recording system, and inserting the succeeding stages into the reproducing system. By so doing, a resulting advantage is that the number of delay circuits can be reduced to two. A signal processing circuit of a third preferred embodiment of the present invention will be described below with reference to the accompanying drawings. Fig. 9 is a block diagram of the third preferred embodiment of the invention. A signal input to an input terminal 51 is passed through a band pass filter 52 and sent to a converter 53 consisting of a 1 H delay circuit 54 and a subtractor 55, where a change of phase in the vertical direction of the chrominance signal is converted into a change of amplitude. The chrominance signal is sent to a delay circuit 56 and to a comparing circuit 57; and the output of the delay circuit 56 is sent to a comparing circuit 57. In the comparing circuit 57, the input signal is detected by detectors 58, 59 and the outputs thereof are compared by a comparator 60, and if the level difference is large enough, a signal of High level is output to an operational circuit 62 and also to a delay circuit 61. The output from the delay circuit 61 is sent to the operational circuit 62. The operational circuit 62 consists of an inverter circuit 63 and an AND circuit 64, for example, and operates such that, if the output of the comparing circuit 57 is "1" and the output of the delay circuit 61 is "0", only then does it deliver an output of "1". As a matter of course, this polarity may be opposite if the circuits in the succeeding stages are arranged accordingly. While an example of the comparator 60 is shown in Fig. 10, this component is the same as in the example shown in Fig. 2. The operation of various stages of the third embodiment of the invention as described above will now be described with reference to waveform diagrams of Figs. 11 and 12. First, the case where amplitude of the chrominance signal includes a change in the vertical direction is indicated in Fig. 11, in which the diagrams a to j indicate the waveforms corresponding to those labelled a to j in Figs. 9 and 10. The input signal a is converted into a chrominance signal b by means of a comb filter 53 as a converter, then detected and converted into signals c and d by the detectors 58, 59, and the latter are then converted into signals e, f in the comparator 60 and output as a signal g, following an OR operation thereon, to an operational circuit 62. The signal g is also sent to a delay circuit 61 to be delayed by 1 H and sent to the operational circuit 62. Through an operation on the signals g, h by the operational circuit 62, a signal i is output. At this point, it is found that the signal i indicates the period z during which there is no vertical correlation of the chrominance signal. Secondly, the case where hue is changed in the vertical direction is indicated in Fig. 12. The input signal a is converted into a chrominance signal b by means of the comb filter 53 as a converter, then detected and made into signals c and d by the detectors 58, 59; signals c and d are then converted into signals e, f in the comparator 60 and output therefrom as a signal g to the operational circuit 62. In addition, the signal g is delayed by 1 H in the delay circuit 61 and delivered to the operational circuit 62 as a signal h. Further, through an operation on the signals h and i in the operational circuit 62, a signal i is output. At this point, it is found that the signal i indicates the period z during which there is no vertical correlation of hue, the detection of which had not been possible in prior art devices. That is, the change of hue in the vertical direction is converted into the change of color in the direction of amplitude by the converter consisting of the 1 H delay circuit as shown in Fig. 9, whereby detection of the change of hue in the vertical direction, which was unachievable by prior art devices, is made possible. The band pass filter 52 in the present embodiment may be disposed in the stage subsequent to the subtractor 55, in the stage preceding the detectors 58, 59, or may be eliminated. When it is desired to apply the present invention to the recording and reproducing systems of a VTR or the like, it is possible to implement the invention by inserting the stages of the circuit up to the band pass filter 52 and the converter 53 of the embodiment of Fig. 9 into the recording system, and inserting the succeeding stages into the reproducing system. By so doing, a resulting advantage is that the number of delay circuits can be reduced to two. When the present invention is applied to the PAL system, some alterations to make the delay equal to 2H or so are necessary. Also, it is possible within the scope of the present invention to implement this invention in a digital circuit by replacing the delay circuit with a memory or the like.

Claims: A chrominance signal processing circuit comprising: a converter (9) for converting a change in the vertical direction of amplitude or phase of an input chrominance signal (a) into a change in amplitude in the vertical direction; characterised by further comprising: a comparing circuit (10) for comparing the amplitude level of the output of said converter delayed by a predetermined time period with the amplitude level of the output of said converter, whereby a lack of vertical correlation of the input signal (a) is detected. A circuit according to claim 1, wherein said converter (9) comprises a first delay circuit (2) for delaying the input signal by a predetermined time period and a combining circuit (3) for combining the output of said first delay circuit (2) and said input signal (a). A circuit according to claim 1 or 2, wherein said comparing circuit (10) comprises a second delay circuit (4) for delaying the output signal (b) of the converter (9) by a predetermined time period, a first detector (6) for detecting the output signal (b) of the converter, a second detector (5) for detecting the output of said second delay circuit (4), and a comparator (7) for comparing output levels of both said first and second detectors. A chrominance processing circuit comprising: a converter (23) for converting a change in the vertical direction of each of amplitude and phase of an input chrominance signal (a) into a change in amplitude in the vertical direction; characterised by further comprising: a first delay circuit (26) for delaying the output of said converter (23) by a predetermined time period; a second delay circuit (27) for further delaying the output of said first delay circuit (26) by a predetermined time period; a first comparing circuit (28) for comparing the amplitude level of the output of said converter (23) with the amplitude level of the output of said first delay circuit (26); a second comparing circuit (32) for comparing the amplitude level of the output of said first delay circuit (26) with the amplitude level of the output of said second delay circuit (27); and an operational circuit (36) for operating on the output of said first comparing circuit (28) and the output of said second comparing circuit (32), and for thereby detecting a lack of vertical correlation of each of the amplitude and phase of the chrominance signal. A circuit according to claim 4, wherein said converter (23) comprises a third delay circuit (24) for delaying the input signal (a) by a predetermined time period and a combining circuit (25) for combining the output of said third delay circuit (24) and said input signal. A circuit according to claim 4 or 5, wherein each said comparing circuit (28, 32) comprises first and second detectors (23; 30; 33; 34) for detecting the input signals, and a comparator (31, 35) for comparing output levels of both said first and second detectors. A circuit according to claim 4, 5 or 6, wherein said operational circuit (36) is adapted to output "1" only when the output of said first comparing circuit (28) is "1" and the output of said second comparing circuit (32) is "0". A circuit according to claim 4, 5 or 6 wherein said operational circuit (36) is adapted to output "0" when the output of said first comparing circuit (28) is "0" and the output of said second comparing circuit (32) is "1". A chrominance signal processing circuit comprising: a converter (53) for converting a change in the vertical direction of each of amplitude and phase of an input chrominance signal (a) into a change in amplitude in the vertical direction; characterised by further comprising: first delay circuit (56) for delaying the output of said converter (53) by a predetermined time period; a comparing circuit (57) for comparing the amplitude level of the output of said converter (53) with the amplitude level of the output of said first delay circuit (56); a second delay circuit (61) for delaying the output of said comparing circuit (57) by the predetermined time period; and an operational circuit (62) for operating on the output of said comparing circuit (57) and the output of said second delay circuit (61) and for thereby detecting a lack of vertical correlation of each amplitude and phase of the chrominance signal. A circuit according to claim 9, wherein said converter (53) comprises a third delay circuit (54) for delaying the input signal (a) by a predetermined time period, and a combining circuit (55) for combining the output of said third delay circuit and said input signal. A circuit according to claim 9 or 10, wherein said comparing circuit (57) comprises first and second detectors (58,59) for detecting the input signals, and a comparator (60) for comparing output levels of both said first and second detectors. A circuit according to claim 9, 10 or 11, wherein said operational circuit (52) is adapted to output "1" only when the output of said comparing circuit (57) is "1" and the output of said second delay circuit (61) is "0". A circuit according to claim 9, 10 or 11, wherein said operational circuit (52) is adapted to output "0" when the output of said comparing circuit (57) is "0" and the output of said second delay circuit (61) is "1". A circuit according to any one of the preceding claims, wherein said predetermined period is made to be one horizontal scanning period. A circuit according to any one of the preceding claims, further comprising a band bass filter for passing a chrominance signal component disposed at the input stage or succeeding stage to said comparing circuit.

Inventors: HONJO, MASAHIRO
Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1986
Main classification: H04N9
IPC codes: H04N9