DIFFERENTIAL AMPLIFIER WITH CURRENT STEERING TO ENHANCE SLEW RATE

Abstract: A steering circuit (10) in a differential amplifier having a pair of differentially arranged input amplifiers (A1 and A2) steers current from a pair of current sources (11 and 12) in such a way as to enhance slew rate without increasing offset voltage. The steering circuit is formed with a pair of steering amplifiers (A3 and A4) arranged in a differential configuration through a pair of resistors (R3 and R4).

Description: The invention relates to a differential amplifier for amplifying an input voltage V I to produce a pair of circuit currents whose difference is representative of the input voltage V I , the amplifier having: supply means for providing current at a control point; and like-configured first and second amplifiers, each having a first flow electrode, a second flow electrode, and a control electrode for regulating current transmission between the flow electrodes, the input voltage V I being differentially supplied to the control electrodes, the first electrodes coupled together through the control point, the second electrodes respectively providing the circuit currents, the second amplifier turning substantially off when the input voltage V I rises to a first voltage V TH greater than zero, and the first amplifier turning substantially off when the input voltage V I drops to a second voltage V TL less than zero. Such differential amplifiers are suitable for semiconductor integrated circuits. The input stage for an operational amplifier ("op amp") is typically a differential amplifier. Turning to Fig. 1, it illustrates a model for an op amp in which a conventional differential input stage amplifies an input signal voltage V I to produce a pair of circuit currents I₁ and I₂ whose difference is representative of voltage V I (as long as |V I | is not too large). Input V I is supplied differentially to the bases of NPN input transistors Q₁ and Q₂ whose emitters are coupled together through a control point CP. A constant current source 7 connected between point CP and a source for a low supply voltage V LL provides a supply current I T for transistors Q1 and Q2. Their collectors respectively provide currents I₁ and I₂ to a substracting circuit 8 connected to a source of a high supply voltage V HH . Circuit 8 generates a signal current I D substantially equal to K(I₁ - I₂), where K is a proportionally constant. Understanding the operation of this differential amplifier is facilitated with the assistance of Fig.2 which shows how current I D varies with voltage V I (for the case where K = 1). When input V I is zero, current I D is also zero since I₁ = I₂ = I T /2 . If V i is increased, I₁ increases towards I T as transistor Q1 becomes progressively more conductive. I₂ simultaneously decreases as transistor Q2 becomes progressively less conductive. It turns off when V I reaches about 80 millivolts. A further increase in V I does not cause any further amplifier changes. The reverse occurs when V I is reduced. Transistor Q1 becomes progressively less conductive and turns substantially off when V I reaches about -80 millivolts. Current I D from the differential amplifier is usually provided to a stage that capacitively integrates current I D to produce an output voltage V O . The integrating stage is shown in Fig.1 as a capacitor CO connected across a high-gain inverting amplifier 9. Capacitor CO provides frequency compensation for the two stages to make the combination stable for unity-gain feedback. The value C O of capacitor CO is approximately g m /2πf O , where g m is the transconductance of the differential stage, and f O is the frequency at which the forward gain of the two stages falls to unity. The slew rate S is the maximum rate at which voltage V O changes in response to a large step in voltage V I . For Fig. 1, the V O rate of change is limited by the rate at which current I D charges capacitor CO. Since the maximum value of I D is I T , S is approximately I T /C O . The slew rate can then be expressed as S ≈ 2 πf O I T /g m (1) Unity-gain frequency f O is typically about 1 megahertz. S is then about 0.3 volt/microsecond. This is often too low. One way to increase the slew rate at a given value of f O is to reduce the transconductance by using emitter degeneration resistors R E1 and R E2 shown in dashed lines at the respective emitters of transistors Q1 and Q2 in Fig. 1. The transconductance falls approximately to g m /(1 + g m R E ), where R E is the nominal value of resistor R E1 or R E2 . The slew rate is increased by g m R E for which 10 is a representative value. Unfortunately, resistor/transistor mis-matching causes the input offset voltage to increase. It typically degrades by around the same factor that the slew rate improves. This is not acceptable. Another technique for improving slew rate is described in U.S. Patent 3,668,538 in which the small-signal transconductance approximately equals g m for Fig. 1. The maximum current for charging Hearn's compensating capacitor is increased greatly by providing alternate current paths that become operative when the input voltage is large. Hearn can achieve a slew rate of 30 - 40 volts/microsecond when f O is about 1 megahertz. However, resistors along the alternate paths must have high values to achieve this slew rate. The normal resistor mis-matching increases the offset voltage and noise. In addition, the use of lateral transistors of opposite polarity to the input transistors significantly worsens the high-frequency behaviour of Hearn's device. U.S. Patent 4,002,993 discloses a slew-rate enhancement technique in which part of the current from an emitter current source is diverted away from the input transistors when the input voltage is small. A sensing circuit causes the fraction of diverted current to decrease when the input voltage becomes large so as to increase the current available to the input transistors. This increases the slew rate. Although offset voltage is not a problem, the common-mode rejection ratio is limited because the sensing circuit is sensitive to component variations. It is an object of the invention to enhance the slew rate in a differential amplifier without increasing input offset voltage and such that the sensitivity to component variation is reduced. In accordance with the invention the amplifier is characterized in that the supply means comprises: first and second current sources for providing first and second supply currents, the sum of the first and second supply currents being distributed among the first and second amplifiers when the input voltage V I is between the first voltage V TH and the second voltage V TL , and steering means for progressively steering an increasing portion of the second supply current through the first amplifier as the input voltage V I rises above the first voltage V TH to a higher third voltage V H and for progressively steering an increasing portion of the first supply current through the second amplifier as the input voltage V I drops below the second voltage V TL to a lower fourth voltage V L . The steering means cause the absolute value of the circuit current at the second electrode of the first amplifier to progressively increase as the input voltage goes from the first voltage V TH to the third voltage V H so as to cause the absolute value of the signal current to increase in the same way. The steering means likewise cause the absolute value of the signal current to progressively increase as the input voltage goes from the second voltage V TL to the fourth voltage V L . The increased amount of signal current available when the input voltage is at V L or V H enables the output voltage to slew faster. The steering means are preferably characterized in that the steering means comprises: first and second resistors; and like-configured third and fourth steering amplifiers, each having a first flow electrode, a second flow electrode, and a control electrode for regulating current transmission between the flow electrodes of that amplifier, the control electrodes of the third and fourth amplifiers respectively coupled to the control electrodes of the first and second amplifiers, the first electrode of the third amplifier coupled to the first current source and through the first resistor to the control point, and the first electrode of the fourth amplifier coupled to the second current source and through the second resistor to the control point. The four amplifiers desirably comprise four like-polarity bipolar transistors. Suitable adjustment of the physical characteristics of the various transistors and resistors enables the signal current to vary in qualitatively different ways as a function of the input voltage. This allows the differential amplifier to be optimized for particular applications. The invention will now be described, by way of example, with reference to the accompanying drawings, wherein Fig. 1 is a circuit diagram of a prior art op amp having a differential input stage. Fig.2 is a graph of signal current as a function of input voltage for the differental input stage of Fig. 1. Fig. 3 is a block diagram for a differential amplifier and associated integrating element in accordance with the invention. Figs. 4a and 4b are graphs for current variation as a function of input voltage for the differential amplifiers of Figs. 3, 5 and 6. Figs. 5 and 6 are circuit diagrams for more particular embodiments of the differential amplifier of Fig. 3. Fig. 7 is a circuit diagram of a preferred embodiment of part of an op amp using the differential amplifier of Fig. 6. Like reference symbols are employed in the drawings and the description of the preferred embodiments to represent the same or very similar item or items. With reference to Figs. 3 and 5 discussed further below, the invention uses various like-configured three-electrode amplifiers. Each has a first flow electrode (E1), a second flow electrode (E2), and a control electrode (CE) for controlling current flow between the flow electrode (E1 and E2).The current (if any) flowing in the control electrode is normally much smaller than that otherwise moving between the flow electrodes. This allows the control electrode current to be neglected in comparison to the flow electrode current. A three-electrode amplifier might be a single transistor. In the case of a bipolar transistor, its emitter, collector, and base are respectively the first, second, and control electrodes. These are the source, drain, and gate for a field-effect transistor (FET) of either the insulated-gate or junction type. A three-electrode amplifier could, however, consist of more than just a single transistor. One example is a bipolar Darlington circuit in which the emitter of an input transistor drives the base of an emitter follower transistor. In this example, the control electrode is (connected to) the base of the input transistor, while the first and second flow electrodes are (connected to) the emitter and collector of the emitter follower. As used in describing certain three-electrode amplifiers, "like-configured" means that they have corresponding elements interconnected in the same way and that each set of corresponding elements is of the same semiconductor polarity. For example, a pair of three-electrode amplifiers would generally be "like-configured" if both are NPN transistors (even though the emitter areas are different) but not if they are complementary transistors. Likewise, a pair of Darlington circuits are "like-configured" as long as the input transistors are of the same polarity and the emitter followers are of the same polarity (even if different from that of the input transistors). Fig.3 illustrates a differential amplifier that uses current steering to achieve a high slew rate. This differential amplifier, which can be used as an op amp input stage, has a pair of largely identical like-configured three-electrode input amplifiers A1 and A2. Input voltage V I is differentially supplied to their control electrodes. Their first electrodes are connected together through control point CP. Circuit currents I₁ and I₂ whose difference is representative of input V I (as long as |V I | is not too large) are respectively supplied from the second electrodes of amplifiers A1 and A2. A current supply consisting of a steering circuit and constant current sources 11 and 12 provides supply current at point CP for amplifiers A1 and A2. Steering circuit 10, which is connected to the V HH supply, controls the current available at point CP in response to input V I . Current sources 11 and 12 are connected between circuit 10 and the V LL supply to provide respective supply currents I Z1 and I Z2 . The differential amplifier also contains a subtracting circuit 13 connected to the V HH supply. Circuit 13 provides signal current I D which substantially equals K(I₁ - I₂). An integrator 14 capacitively integrates current I D to produce voltage V O . Circuit 14 could, for example, consist of a capacitor connected across a high-gain inverting amplifier as in Fig. 1. Alternatively, integrator 14 might simply be the parasitic capacitance of the line carrying current I D . Integrator 14 might also be a capacitor connected between the I D line and V LL supply. In any case, the combination of integrator 14 and the differential amplifier meets the requirement that the capacitance equals g m /2πf O . Figs. 4a and 4b are helpful in understanding the current steering in the differential amplifier of Fig. 3. Assuming that K is 1, I D = I₁ - I₂ . Fig. 4a shows how currents I₁, I₂, and I D vary as a function of voltage V I for generally optimum case W. Fig. 4b shows how I₁ and I D vary with V I for two other cases X and Y. The dashed areas under the I₁ curves indicate the portions of current I₁ that definitely come from current source (C.S.) 12. The dashed areas under the I₂ curve indicate the portion of current I₂ that definitely comes from current source (C.S.) 11. The dotted areas under the I₁ and I₂ curves indicate current that comes jointly from current sources 11 and 12 but cannot be definitely designated as coming specifically from source 11 or from source 12. I Z is the magnitude of I Z1 or I Z2 . The operation of the differential amplifier falls into several qualitatively distinct ranges. Voltage V I is in the "small-signal" range when V I is between V TL and V TH . Since |V TL | approximately equals V TH which is typically about about 80 millivolts, the differential amplifier is in the small-signal condition when |V I | is less than V TH . The "large-signal" range means that |V I | is greater than V TH . Noting that |V L | approximately equals V H , the large-signal range is divided into a lower subrange in which V TH <|V I |<V H and a higher subrange in which |V I |>V H . Amplifiers A1 and A2 are both conductive when V I is in the small-signal range. Amplifier A1 turns substantially off when V I drops below V TL . Amplfier A2 similarly turns substantially off when V I rises above V TH . Circuit 10 does perform current steering when |V I | is small as indicated in Figs. 4a and 4b. However, the sum of currents I₁ and I₂ is approximately constant at a level denoted as I T . Although |I D | is slightly greater than I T when |V I | equals V TH , the net result for the small-signal condition is not materially different from that of Fig. 1 in which there is no emitter degeneration. A big difference occurs when input V I enters the large-signal range. As V I rises above V TH , circuit 10 progressively steers more of supply current I Z2 through amplifier A1. As indicated by the dotted area between V TH and V H for case X in Fig. 4b, some current jointly provided from current sources 11 and 12 may also flow through amplifier A1. If so, the jointly provided current progressively decreases as V I approaches V H . Current I₁ attains a maximum equal to I Z when V I reaches V H . A further increase in V I does not produce any changes in the differential amplifier. Circuit 10 simply steers all of current I Z2 through amplifier A1. Circuit 10 also "absorbs" supply current I Z1 , none of it flowing through amplifier A1 or through amplifier A2 which is turned off. More particularly, current I Z1 is diverted to the V HH supply. The opposite occurs when V I drops below V TL . Circuit 10 progressively steers more of current I Z1 through amplifier A2 until V I reaches V L . No further changes occur if V I drops further. Circuit 10 "absorbs" current I Z2 , none of it flowing through amplifier A2. The maximum value of I D is thus I Z . Assuming that circuit 10 does not cause the large-signal transconductance of the differential amplifier to differ significantly from its small-signal transconductance g m , the slew rate S for the circuit in Fig. 3 is: S ≈ 2πf O I Z /g m (2) If f O and g m for Fig. 3 are the same as in Fig. 1, the slew rate for the present circuit is enhanced approximately by the factor I Z /I T . This factor may easily be 10 or more. The upper limit for I Z /I T is determined by the maximum current allowable in the circuit. Fig. 5 shows a general implementation for steering circuit 10 in the present differential amplifier. The principal components of circuit 10 are a pair of largely identical like-configured three-electrode steering amplifiers A3 and A4 and a pair of equal-value resistors R1 and R2. The control electrodes of amplifiers A3 and A4 are respectively connected to the control electrode of amplifiers A1 and A2 to receive input V I . The second electrodes of amplifiers A3 and A4 are connected to the V HH supply. Their first electrodes are respectively coupled through nodes N1 and N2 to current sources 11 and 12. Resistors R1 and R2 are connected between point CP on one hand, and nodes N1 and N2 respectively, on the other hand. An impedance 15 may be connected between node N1 and the A3 first electrode. A largely identical impedance 16 may be connected between node N2 and the A4 first electrode. If present impedance 15 and 16 usually are resistors. With reference to Figs. 4a and 4b, amplifiers A3 and A4 are both conductive when V I is between V L and V H . When V I is zero, a large fraction of current I Z1 flows through amplifier A3. A large fraction of current I Z2 also flows through amplifier A4. If V I is increased, the portion of current I Z1 flowing through amplifier A3 increases further and reaches I Z at or before the point that V I reaches V H . At the same time, progressively less of current I Z2 flows through amplifier A4, the rate of fall becoming greater when V I passes V TH . Amplifier A4 turns substantially off as V I rises above V H . The reverse occurs if V I is decreased. Progressively less of current I Z1 flows through amplifier A3 which turns substantially off when V I falls below V L . The portion of current I Z2 flowing through amplifier A4 increases further and reaches I Z before or at the point that V I passes V L . Fig. 6 depicts a bipolar embodiment of the differential amplifier of Fig.5 in which amplifiers A1 - A4 are respective NPN transistors Q1, Q2, Q3 and Q4. Using Fig. 6, a more fundamental explanation of the operation can be given. Circuit 10 does not significantly affect transistors Q1 and Q2 when |V I | is small. The current steering becomes important when |V I | becomes large. Assume that V I rises above V TH where I D is just slightly greater than I T . Transistor Q2 is off. Transistor Q3 transmits all or nearly all of current I Z1 so that the R1 current is quite small. The result is that transistor Q3, resistor R1, and current source 11 have little effect on signal current I D . Transistors Q1 and Q4, resistor R2, and current source 12 substantially control current I D . These elements act like a differential amplifier whose transconductance is approximately 1/R where R is the resistance of resistor R2 (or R1). As V I continues to rise toward V H , transistor Q4 becomes progressively less conductive. More of current I Z2 is steered through transistor Q1. Eventually transistor Q4 turns off, forcing all of current I Z2 to flow through transistor Q1. Current I D rises to I Z to enhance the slew rate. In the small-signal range, g m is approximately I T /2V T where V T is about 25 millivolts at room temperature. It is undesirable to have g m differ significantly from the large-signal transconductance because this creates difficulty in achieving high-frequency stabilizing. Accordingly, the differential amplifier of Fig.6 is optimized by setting RI T /2V T approximately equal to one. I T can be determined from I Z for any particular set of parameter values. The input offset voltage for the differential amplifier is determined by the matching of transistors Q1 and Q2 plus the matching of components in subtracting circuit 10. Transistors Q3 and Q4 do not have to be precisely matched since only one of them significantly affects the large-signal operation at any time. Likewise, only one of resistors R1 and R2 significantly affects the large-signal operation at any time so that they do not need to be precisely matched. Their matching only affects the linearity of the I D function when |V I |>V TH . Consequently, use of steering circuit 10 in Fig. 6 (and in Fig. 5) does not cause the offset voltage to increase to any substantial degree. The particular cases achieved in Figs. 4a and 4b depend on the size of transistors Q3 and Q4 to that of transistors Q1 and Q2. Let p be the ratio of the emitter area of tansistor Q3 or Q4 to the emitter area of transistor Q1 and Q2. Case W was achieved for p = 7. Reducing p below 7 (e.g., to 4) yielded case X. Increasing p above 7 (e.g., to 14) resulted in case Y. For these three cases, R was 250 ohms, and I Z was around 1 milliampere. Fig. 7 depicts a preferred embodiment of the first two stages of an op amp in which the input stage consists of a pair of differential amplifiers 17 A and 17 B of the type shown in Fig. 6. The subscripts "A" and "B" have been added to the reference symbols employed for the differential amplifier of Fig.6 to indicate the corresponding elements for differential amplifiers 17 A and 17 B in Fig.7. Input voltage V IA and V IB are respectively supplied to differential amplifiers 17 A and 17 B . However, subtracting circuit 13 processes the circuit currents from only one of them at any given time. This is accomplished by suitably switching the current sources connected to steering circuits 10 A and 10 B . As shown in Fig. 7, current sources 11 A and 12 A respectively consist of NPN transistors Q5 A and Q6 A whose bases receive a voltage V A and whose emitters are coupled through an NPN transistor Q7 to the V LL supply. Current sources 11 B and 12 B respectively consist of NPN transistors Q5 B and Q6 B whose bases reveive a voltage V B and whose emitters are also coupled through transistor Q7 to the V LL supply. Voltages V A and V B are complementary. If voltage V A is high so that voltage V B is low, differential amplifier 17 A is selected whereas differential amplifier 17 B is turned off. Circuit 13 then processes currents I 1A and I 2A . The reverse occurs when voltage V B is high. Circuit 13 consists of equal-value resistors R3 and R4, a differential input/differential output amplifier 18, a subtracting sub-circuit 19, and a capacitor C1 arranged as shown in Fig. 7. Resistors R3 and R4 act as current sources. Capacitor C1 is a feed-forward frequency-compensation element. Use of amplifier 18 enables proportionality constant K for current I D to exceed one. Integrator 14 consists of a high-gain inverting amplifier 20 across which a capacitor C2 and a resistor R5 are connected in series. In Fig. 7, V HH and V LL preferably are 5 and -5 volts. Resistors R1 A /R2 A /R1 B /R2 B , R3/R4, and R5 respectively are 1,500, 2,000 and 44 ohms. I Z is about 1 milliampere. Capacitors C1 and C2 are both 2.5 picofarads. Methods for manufacturing the various elements of the present invention are well known in the semiconductor art. The various amplifying circuits are preferably fabricated in monolithic integrated circuit form using PN-junction isolation to separate active regions in a semiconductor wafer. While the invention has been described with reference to particular embodiments, this description is solely for the purpose of illustration and is not to be construed as limiting the scope of the invention claims below. For example, semiconductor elements of opposite polarity to those described above may be employed to accomplish the same results. Thus, various modifications, changes, and applications may be made by those skilled in the art without departing from the true scope of the invention as defined by the appended Claims.

Claims: A differential amplifier for amplifying an input voltage (V I ) to produce a pair of circuit currents (I₁, I₂) whose difference is representative of the input voltage (V I ), the amplifier having: supply means (10, 11, 12) for providing current at a control point (CP); like-configured first (A1) and second (A2) amplifiers, each having a first flow electrode (E1), a second flow electrode (E2) and a control electrode (CE) for regulating current transmission between the flow electrodes (E1, E2), the input voltage (V I ) being differentially supplied to the control electrodes (CE), the first electrodes (E1) coupled together through the control point (CP), the second electrodes (E2) respectively providing the circuit currents (I₁, I₂), the second amplifier (A2) turning substantially off when the input voltage (V I ) rises to a first voltage (V TH ) greater than zero, and the first amplifier (A1) turning substantially off when the input voltage (V I ) drops to a second voltage (V TL ) less than zero, characterized in that the supply means comprises: first (11) and second (12) current sources for providing first (I Z1 ) and second (I Z2 ) supply currents, the sum of the first (I Z1 ) and second (I Z2 ) supply currents being distributed among the first (A1) and second (A2) amplifiers when the input voltage (V I ) is between the first voltage (V TH ) and the second voltage (V TL ), and steering means (10) for progressively steering an increasing portion of the second supply current (I Z2 ) through the first amplifier (A1) as the input voltage (V I ) rises above the first voltage (V TH ) a higher third voltage (V H ) and for progressively steering an increasing portion of the first supply current (I Z1 ) through the second amplifier (A2) as the input voltage (V I ) drops below the second voltage (V TL ) to a lower fourth voltage (V L ). A differential amplifier as claimed in Claim 1, characterized in that the steering means (10) steers substantially all of the second supply current (I Z2 )through the first amplifier (A1) when the input voltage (V I ) is greater than the third voltage (V H ) and steers substantially all of the first supply current (I Z2 ) through the second amplifier when the input voltage (V I ) is less than the fourth voltage (V L ). A differential amplifier as claimed in Claim 1 or 2, characterized in that the steering means comprises: first (R1) and second (R2) resistors; and like-configured third (A3) and fourth (A4) steering amplifiers, each having a first flow electrode (E1), a second flow electrode (E2), and a control electrode (CE) for regulating current transmission between the flow electrodes of that amplifier, the control electrodes (CE) of the third (A3)and fourth (A4) amplifiers respectively coupled to the control electrodes (CE) of the first (A1) and second (A2) amplifiers, the first flow electrode (E1) of the third amplifier (A3) coupled to the first current source (11) and through the first resistor (R1) to the the control point (CP), and the first flow electrode (E1) of the fourth amplifier (A4) coupled to the second current source (12) and through the second resistor (R2) to the control point (CP). A differential amplifier as claimed in Claim 3, characterized in that substantially all of the first supply current (I Z1 ) flows through the third amplifier (A3) when the input voltage (V I ) is greater than the third voltage V H and substantially all of the second supply current (I Z2 ) flows through the fourth amplifier (A4) when the input voltage V I is less than the fourth voltage (V L ). A differential amplifier as claimed in Claim 3 or 4, characterized in that the first (A1), second (A2), third (A3) and fourth (A4) amplifiers respectively comprise like-polarity first (Q1), second (Q2), third (Q3), and fourth (Q4) bipolar transistors, each having an emitter, a collector, and a base respectively coupled to the first flow, second flow, and control electrodes of its amplifier. A differential amplifier as claimed in Claim 5, characterized in that the third (Q3) and fourth (Q4) transistors have greater emitter area than the first (Q1) and second (Q2) transistors. A differential amplifier as claimed in any of the preceding Claims, characterized in that the circuit further includes: means (13) generating a signal current (I D ) substantially proportional to the difference between the circuit currents (I₁, I₂); means (14) for capacitively integrating the signal current to produce an output voltage (V O ). An operational amplifier characterized by: a plurality of differential amplifiers (17A), 17B) as claimed in any of the preceding Claims 1-6; switching means (Q5A, Q6A, Q5B, Q6B) for turning off the current sources for all the circuits but a selected one; means (R3, R4, 18, 19) for generating a signal current (I D ) substantially proportional to the difference between the circuit currents for each circuit when it is selected; and means (R5, C2, 20) for capacitively integrating the signal current (I D ) to produce an output voltage (V O ).

Inventors: VAN DE PLASSCHE, RUDY JOHAN
Applicants: N.V. PHILIPS' GLOEILAMPENFABRIEKEN
Application year: 1986
Main classification: H03F3
IPC codes: H03F3