Method and apparatus for processing image data

Abstract: On the basis of vertex coordinates of polygons to be recorded, mode data is provided for every segment forming the polygons. The mode data includes mode data as to whether points on the segment is in raster start point mode, raster end point mode or raster start and end point mode. The mode data of the respective segments are accumulated in correspondence with recording coordinates and stored in a memory. The accumlated mode data are read from the memory and sequentially accumulated along scanning lines to provide raster outputs.

Description: The present invention relates to a method and an apparatus for processing image data for sequentially filling inner regions of grahic and font characters and figures approximated by polygons with a black dot along scanning lines. Image data processing of sequentially filling inner regions of characters and figures along scanning lines thereby to record or display the characters and figures is well known in the art in the name of "raster scanning". In such raster scanning, the characters and figures are approximated by polygons, inner regions of which are sequentially filled. Such filling has been performed in a prior art in such a manner that image data of closed curves obtained from polygons are written in memory having storage areas in one-to-one correspondence to pixels of images to be recorded ,and, after that, scanning for filling is performed in vertical and horizontal four directions from a reference point which is set in an arbitrary position in each one of the closed curves. In such a method, however, the time required for filling operation is increased in an apparatus such as a process scanner which records figures along scanning lines. Furethermore, in the case of outputting an image having a relatively large numbers of pixels, a memory having a large storage capacity is requred. In order to overcome the problems, the following method is employed for recording an image formed by a number of pixels. When, for example, a pentagon as shown in Fig. 1 is transformed to raster image data, intersection points of segments formed by sequentially connecting respective vertices of the pentagon and the scanning lines are obtained by a CPU through linear interpolation, on the basis of coordinate values of the vertices (X₁, Y₁), (X₂, Y₂), ... (X₅, Y₅). For example, Y coordinates Y n corresponding to X coordinates X n between the apexes (X₁, Y₁) and (X₂, Y₂) of the pentagon as shown in Fig. 1 are obtained as follows: Y n = Y₁ + X n - X₁ X₂ - X₁ (Y₂ - Y₁) Then, as shown in Fig. 2, "raster start points" and "raster end points" are obtained as the intersection points of the scanning lines and the segments. In these points, "raster start points" are defined as the intersection points at which a scanning line enters from the outer region to the inner region of the figure. On the other hand, "raster end points" are defined as the intersection points at which a scanning line goes out from the inner region to the outer region of the figure. These data are registered per scanning line in a RAM, to be sequentially read from the RAM thereby to obtain raster image data as required. More concretely, in circuit as shown in Fig. 3, data "0" are written in all addresses of a RAM 12 in which one bit is assigned per pixel and having capacity for over one scanning line. After that, data "1" are written in addresses corresponding to the raster start and end points in a random access manner. Then an address selector 5 is switched from a random address mode to a sequential address mode to input read data S b read from the RAM 12 and clock signals S a synchronous with reading signals of the RAM 12 in an output data generatter 13, which is shown in Fig. 4 in detail, thereby to obtain raster image signals S c as shown in Fig. 5. In this method, however, another problem is caused in the case of outputting a figure formed by overlapping a plurality of unit figures, e.g., a nonagon indicated as ABCDEFGHI formed by overlapping two triangles ΔAEF and ΔHCJ, as shown in Fig. 14. Namely, in this case, the coordinates of intersection points (B), (D), (G) and (I) must be also calculated for obtaining the contour of the nonagon. Thus, the time required for calculating intersection points of figures cannot be disregarded when the figures are complicated in configuration or a large number of unit figures are overlapped. This is because the processing time required for arithmetic is considerably increased in this method since, with respect to the relation of raster start and end points of the respective polygons, the raster start points may be changed to the raster end points or mere passage points etc. Further, the raster start and end points may be doubled at the single vertex depending on intersection modes of the horizontal scanning lines and the polygons. In this case, the vertex must be treated as the raster start point while providing another end point adjacent to the start point. Therefore, the figure cannot be correctly reproduced at the start and end points. From IBM TECHNICAL DISCLOSURE BULLETIN, vol.14, no 4, Sept. 1971, pp. 1229-1230, D. Berger et al.: "Alteration of digitized image, a method is known according to which a polygon is scanned along scanning lines, and the points of intersection between scanning lines and segments of the polygon are registered in a table. Flags are provided for the vertexes of the polygon. Then the table is sorted to determine the serial numbers of the respective intersections. The inner and outer regions of the polygon are determined with reference to the serial numbers. There is no disclosure as to the handling of the case of overlapping polygons. The present invention is directed to a method and an apparatus as defined in claims 1 and 10. Accordingly, an object of the present invention is to provide a method and an apparatus for processing image data which can obtain raster output data for recording images by filling inner regions of polygons along sequence of scanning lines at a high speed. Another object of the present invention is to efficiently perform image processing of a plurality of overlapped polygons. Still another object of the present invention is to correctly process vertices of polygons. A further object of the present invention is to simplify circuit structure while reducing capacity of memory as employed. These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings, in which Figs. 1 and 2 are conceptual diagrams of raster scanning; Figs. 3 to 5 are diagrams showing structure and operation of a conventional apparatus; Fig. 6 is a block diagram schematically showing the structure of a first embodiment of the present invention; Fig. 7 is a flow chart showing operation of a coordinate and mode data providing circuit; Figs. 8A to 8G are diagrams showing examples of overlapped polygons and processing for filling the polygons; Figs. 9A and 9B are diagrams for illustrating segments forming polygons; Figs. 10 to 12 are diagrams for illustrating directivity of segments; Fig. 13(A) to 13(P) is a diagram showing relation between connection modes of segments and modes of termiral points; Figs. 14 and 15 illustrate examples of overlapped polygons; Figs. 16A and 16B are diagrams showing code transformation rules in respective modes; Fig. 17 is a diagram showing an example of structure of a write data producing circuit; Figs. 18 and 19 are diagrams showing code data finally obtained with respect to the polygons as shown in Fig. 14; Fig. 20 is a block diagram showing an example of structure of an output signal generator; Fig. 21 is a timing chart showing output operation of the first embodiment; Figs. 22A to 22C are diagrams showing examples of the recorded image with filling of the polygons as shown in Fig. 14; Fig. 23 is a block diagram schematically showing structure of a second embodiment of the present invention; Figs. 24A and 24B are diagrams showing images to be recorded in the second embodiment; Fig. 25 is a diagram showing vertex coordinates of a character "A" as expressed by polygons; Fig. 26 is a block diagram showing an example of structure of a segment decomposition circuit as shown in Fig. 23; Fig. 27(A) and Fig. 27(B) are diagrams showing examples of ROM tables in the segment decomposition circuit; Fig. 28 is a diagram showing the result of providing mode data for the polygons as shown in Fig. 25; Fig. 29 is a block diagram showing an example of structure of a segment classification circuit as shown in Fig. 23; Fig. 30 is a diagram showing relation between progress of recording/scanning and storing ranges of classification memories; Fig. 31 is a diagram showing examples of data contained in subdivided classification memories; Fig. 32 is a diagram showing a positional relation in arrangement of Figs. 32A and 32B; Figs. 32A and 32B are diagrams to be arranged together thereby to show a example of structure of a main scanning coordinate calculating circuit; and Fig. 33 is a diagram showing an example of structure of a raster data output processing circuit as shown in Fig. 23. DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment (A) Mode Data Providing Process Fig. 6 is a block diagram showing a first embodiment of the present invention. Referring to Fig. 6, a coordinate and mode data providing circuit 1 provides coordinate data and "mode data" to the segments forming respective sides of one or more polygons. The "mode data" is provided for indicating whether intersection points of the segments and scanning lines are raster start points, raster end points or raster start and end points, when a image is recorded by filling inner regions of the polygons along the scanning lines . According to this embodiment, this process of the coordinate and mode data providing circuit 1 is performed in a software manner, the principle of which is now described. Fig. 7 is a flow chart of the processing, and Figs. 8A and 8B are examples of polygons to be recorded. According to the present invention, the polygons shown in Figs. 8A and 8B are overlapped as shown in Fig. 8C, then the inner regions thereof are filled as shown in Figs. 8D to 8F. Curves such as circles are also digitally processed as polygons, an example of which is character font. In fact, the figure as shown in Fig. 8A is a Japanese character approximated by a polygon. Reffering to Fig. 7, first, fetched are vertex coordinates of respective polygons. As to the coordinates, those previously stored for every polygonal pattern may be utilized. Such a method is employed in the case where, e.g., character fonts are previously stored. Then coordinate of terminal points of segments in the respective figures, which are identical to the vertices of the figures, are sequentially inputted to decide inclinations of the segments, thereby to determine whether the segments are formed as sets of raster start points or sets of raster ending points. For example, when polygons shown in Fig. 8A and 8B are previously provided as anticlockwisely designated vector data as shown in Figs. 9A and 9B respectively, inner regions of the figures are on the left sides of the respective vectors in the directions of arrows. Assuming that the coordinates of the end points of the segments are expressed as (X₁, Y₁), (X₂, Y₂), ..., (X n , Y n ), symbols X and Y being representative of vertical and main scanning coordinates and each scannings being perfomed to the directions as shown by arrows X and Y, inclinations of the segments are given as ΔY ΔX , where ΔY=Y i+1 -Y i and ΔX=X i+1 -X i . As simply shown in Fig. 10, the main scanning lines intersects with the segments from the exterior of the polygon into the interior of the inner region when X component of segment vector has a sign (+) irrelevant to whether sign of the Y component is (+), (0) or (-). Also indicated is that the main scanning line intersect with the segment from of the inner region of the polygon to the exterior of the polygon when a sign (-) is assigned to X, component irrelevant to whether the sign of Y component is (+), (0) or (-). Further indicated is that the segment is parallel line in the main scanning direction when X is (0) and Y component is with (+), while the segment is parallel lines in the reverse direction when X component is (0) and Y component is with (-). Fig. 11 shows the said relation, in which the aforementioned modes of the segments are indicated as overline (OL), underline (UL), downline (DOWN) and upline (UP) respectively. Thus, the modes of the segments can be decided by sequentially inputting the coordinate of the terminal points of the segments to obtain inclinations thereof. Even if only two coordinate points are inputted, the mode of the segment can be decided depending on whether ΔX ≠ 0 or ΔX = 0 as shown in Fig. 12(A) and (B). When coordinate of only one point is inputtted, the point is treated as the "segment" of overline (OL) and the underline (UL) as shown in Fig. 12(c). After the segment modes are decided in the aforementioned manner, the main scanning coordinates (Y) are calculated in all of the vertical scanning positions (X) of the respective segments. When the segments are (OL), the respective points on the segments are recognized as raster start points designated as "mode 1", which are expressed as "M1" in data indication. When the segments are (UL), the respective points on the segments are recognized as raster ending points designated as "modes 2", which are expressed as "M2" in data indication. When the segment is (UP), smaller one of the Y coordinate values of the two terminal points is treated as "mode 1" point while larger one is treated as "mode 2" point. When the segment is (DOWN), smaller Y coordinate values of the terminal points is treated as "mode 1" point while larger one is treated as "mode 2" point. As to the modes of connection points of the segments in the same figure, 16 combinations may be considered as shown by symbols D₁ to D₁₆ at Fig. 13(A) to (P). Within these connection points, points D₁, D₄, D₉ and D₁₂ denote multiple points of the "mode 1" and points D₆, D₇, D₁₄ and D₁₅ denote multiple points of the "mode 2". The aforementioned connection points are designated as single "mode 1" points or single "mode 2" points so that the connection points are not doubly designated as the "mode 1" or "mode 2" points from both of two segments to hinder the processing as hereinafter described. In other words, mode designation of these connection points is simply performed from one of the connected segments, while designation is not performed from the other segment. In this case, information as to whether or not the terminal points of the segments are coupled with those of other segments of the same mode is given at the same time when the modes of the segments forming the respective figures are designated. The aforementioned processing is not necessary for the points D₂ and D₅, which are the connection points of (OL) and (UL), while these points are designated as specific mode (*) which means "modes 1 and 2" as hereinafter described. The other connection points D₃, D₈, D₁₀, D₁₁, D₁₃ and D₁₆ of the segments which is neither the multiple points nor the specific points are relay points, which are not to be designated as the "mode 1" nor "mode 2" points in the respective segments. Such information is given at the same time when the segment modes in the respective figures are designated, similarly to the case of the multiple points. (B)Mode Data strage Process When the said process for providing mode data is completed, the coordinate data and the mode data for the segments forming the respective polygons are written in a RAM 4a shown in Fig. 6, as hereinafter described. The write operation is performed in accordance with the order of the vertial scanning lines. In order to avoid complexity in illustration of the processing the figures as shown in Figs. 8A to 8C, 9A and 9B, description is now made with respect to a simpler figure. Fig. 14 shows an example of such simpler figure, which is a nonagon ABCDEFGHI formed by overlapping two triangles ΔAEF and ΔHCJ. It is assumed that ΔAEF corresponds to the figure as shown in Figs. 8A and 9A while ΔHCJ corresponds to that shown in Figs. 8B and 9B. First, the aforementioned process of providing a mode data is performed on ΔAEF and ΔHCJ. Respective points on a segment AE of ΔAEF are raster starting points and respective points on segments AF and FE are raster ending points. In concrete terms, coordinate values and mode data for the respective points in the coordinate system as shown in Fig. 15 are as follows: Respective points on segment AE : [1,9,M1], [2,9,M1],..., [7,9,M1] Respective points on segment AF : [1,9,M2], [2,10,M2],..., [9,17,M2] Respective points on segment FE : [10,16,M2],..., [17,9,M2] In these points, a point (9, 17) on the segment FE is a multiple point of the "mode 2", which is already designated as "mode 2" by the segment AF . Therefore, the designation by the segment FE is not reguired. Further, a point (1, 9) finally becomes (1, 9, *), and a point (17, 9) finally becomes (17, 9, *). ΔHCJ are also provided with coordinate values and mode data. In order to write the respective data in the RAM 4a having a strage region in which 3 bits are assigned to every one pixel, the RAM 4a is cleared in advance. This process is performed by writing "000" in all of pixels of the RAM 4a from an initial value register 2 through a write data selector 15a. Then the coordinate values and the mode data of the segments forming the respective polygons are sequentially written in the RAM 4a. In order to sequentially write the polygons in the RAM 4a in aforementioned manner, it is necessary to write the data overlappingly in the same addresses of the RAM 4a when a plurality of polygons are overlapped. In other words, a plurality of writing processes are required as to intersection points of the polygons. In this case, it is not sufficient to store the data merely designating to which modes the intersection points belong, but it is necessary to store the substantial numbers of the segments overlappingly forming the intersection points as well as the modes thereof in order to perform a recording with respect to the overlapping condition. Therefore, according to this embodiment, the raster start and end points are respectively indicated by the signs (+) and (-) while the raster starting points are registered in the "mode 1" and the end points are registered in the "mode 2". When the raster start and end points in the same addresses are different in number, the sign of the mode of larger one and the numbers of the difference are indicated by numerical data. In concrete terms, the "mode 1" is expressed as (+1) and the "mode 2" is expressed as (-1) to sequentially add up or accumrate the (+1) or (-1) provided with respect to the modes of the respective segments forming the said intersection points. The results of the accumlation are expressed by three bits code. Within these three bits, the most significant bit is employed to distinguish the start and end points by the rule of "0" = (+) and "1" = (-). The less significant two bits are adapted to express absolute values of the accumlated mode data generated by overlapping of the modes in the 2's complimentary form. Namely, the less significant two bits directly represent the overlapping number in "mode 1", while the overlapping number is represented by 2's complimentary number of the two bits in "mode 2". When, as the results of the accumlation, the number of segments of the "mode 1" forming the intersection point is identical to that of the "mode 2", it is expressed as specific point (*) which are raster start and end points. The specific code (*) indicating the specific point is expressed by "100". Fig. 16A expresses a transtormation rule when aforementioned 3 bits codes are sequencially provided for one intersection point and they are accumlated in sequence. For example, code data "001" already written in address corresponding to the coordinate of a point is transformed to "010" when a segment of the "mode 1" is subsequently overlapped thereon, to indicate that the point is an intersection point at which "10" = two segments of the "mode 1" are overlapped. Fig. 16B systematically shows the rules of Fig. 16A, for clearer understanding of the rule. It is to be noted that "000" in Fig. 16B indicates an initial value. Such expression of the accumulated modes is characterized in that respective 3 bits data groups of the "mode 1" and "mode 2" are expressed by complementary numbers of "2". For example, an accumlated code data "010" of an intersection point in which the "mode 1" segments are overlapped in a number larger by two than the "mode 2" segments as a result is in complementary relation to an intersection point expressed by "110" which is reverse to the said case. In other words, such relation is expressed as "010 + "110" = "000". Therefore, the addition of complemntary 2 code data is substantially equivalent to the substruction of the repective absolute values of overlapping number. When expression is made in three bits as hereinabove described, numerical data within a range of (+3) to (-3) can be expressed as follows: (+3) = "011", (+2) = "010" (+1) = "001", (0) = "000" (-1) = "111", (-2) = "110" (-3) = "101" Further, the specific code (*) is assigned to (-4) = "100". Namely, an accumlated mode data of overlapping point formed by overlapping of three point at maximum can be expressed in three bits. Hence, when the number of the overlapped figures (polygons) is up to three, it is necessary and sufficient to prepare three bits for accumlation data. When more figures are overlapped, a range of the overlapping number from -(2 n-1 - 1) to (2 n-1 - 1) can be expressed by generalizing the data length to n-bits (n: integer) while numerical data (-2 n-1 ) are assigned to the specific code so far as the number of the specific code is one. Namely, up to (2 n-1 - 1) overlapped figures can be treated when the data length in RAM 4a is n-bits. In the aforementioned method, efficiency of describing overlapping is improved with increase in number of the overlapped figures in comparison with the case of utilizing a plurality of memories correspoinding to the figures in which mode data is expressed one-bit indicating raster start or end points. Under the condition that mode transformation rules in the same addresses are predetermined for the respective ones of the "mode 1" and "mode 2" as shown in Fig. 16A and 16B, random access signal 101 in Fig. 6 is activated to input the data on the intersection points of the respective scanning lines and the respective figure in the RAM 4a through the address selector 5a. Such input is performed in sequence of scanning with respect to the vertical scanning direction and at random with respect to the main scanning direction. With respect to, e.g., the figure as shown in Fig. 14, data on the intersection points of the scanning lines and ΔAEF are sequentially supplied from the coordinate and mode data providing circuit 1 as shown in Fig. 6 to the write data producing circuit 3 by writing control signals 120. In parallel with this, the initial values "000" registered in the RAM 4a are read as signals 105a, to be supplied to the write data producing circuit 3 through a read data selector 16a. The write data producing circuit 3 has a circuit structure as shown in Fig. 17. Referring to Fig. 17, code signals 105a from the read data selector 16a are code-transformed by the transformation rules for the "mode 1" and "mode 2" as shown in Fig. 16A, thereby to be accumlated per record coordinate. In response to the mode data of the point included in the writing control signals 120, one of the results of the code trsnsformation corresponding to the two modes is selected to be outputted as write data 104. For example, explanation is mode for the respective points on the segments forming ΔAEF in Fig. 14. Within these points, a point ℓ₁ intersecting with a scanning line ℓ is a raster start point of "the mode 1", and hence the initial value "000" of the read data 105 is transformed to "001", which becomes write data 104a as shown in Fig. 6. Further, since a point ℓ₂ is the raster end point of the "mode 2", the initial value "000" for this point ℓ₂ is transformed to "111". The write data 104a obtained by such transformation are restored in the RAM 4a through a write data selector 15a. Writing addresses for this are identical to those in which the respective data expressed by the code signal 105a were previously stored. Thereafter in a similar manner, the mode data of respective raster start and end points on ΔAEF are accumlated and restored in the RAM 4a. Data about the vertex "A" in Fig. 14, which is a specific point, is transformed from "000" to "100" through "001" as seen from Fig. 16B, by being subjected to registration on the segment AE (mode 1) and registration on the segment AF (mode 2). The code data of vertex "E" also becomes a specific point, i.e., "100". On the other hand, code data with respect to the vertex "F" becomes "111" by the aforementioned rule for avoiding double designation. Thereafter ΔHCJ is registered in a similar manner. Although, in this case, "111" is already registered with respect to an intersection point m₂ of a segment HC and a scanning line m since this is an end point as a point on the segment AF , the data "111" is further transformed to "100" since the point m₂ is a start point for registration with respect to the segment HC . Thus, indicated is that the intersection point m₂ becomes a vertex in the figure ABCDEFGHI composed of ΔAEF and ΔHCJ. Further, "001" is already registered for a point n₁ on a scanning line n, since the point n₁ is a starting point as a point on the segment AE . This point n₁ is also a starting point as a point on the segment HC , and hence the data "001" is further transformed to "010" by code transformation of the "mode 1" in the same address, and the new code is re-registered in the RAM 4a. Such presence of the point n₁, for which "010" = (+2) is registered as code data, indicates that two raster end points are present on the scanning line n in the rear of the point n₁ (right-hand direction in Fig. 14). In fact, points n₂ and n₃ in Fig. 14 are these raster end points. When the registration process is progressed in the aforementioned manner to completely accumrate and register ΔAEF and ΔHCJ, the respective points ℓ₁ to ℓ₃, m₁ to m₃ and n₁ to n₃ on the respective scanning lines ℓ, m and n are registered in the codes as shown in Fig. 18. Further, Fig. 19 shows the codes actually registered with respect to the respective points in the coordinate system as shown in Fig. 15, in which the numbers with sign (+) or (-) are assigned to numerical values expressing the numbers of overlapping of the figures. Symbol (*) denotes specific points as hereinabove described. Also in the case of generalizing the code data to n-bits, the write data can be produced at random regardless of sequence for registering the figures. (C) Reading from RAM and Recording Process When the data are thus completely registered to the whole storage capacity of the RAM 4a, the address selector 5a as shown in Fig. 6 selects sequential address signals 103, by which the data are read out from the RAM 4a. Then, raster image data are produced on the basis of the read data. A comparator 9 used for such processing contains a plurality of unit comparators (not shown) therein, and the number of the unit comparators corresponds to the number of overlapping of the figured to be inputted. Similarly, a reference register 8 contains a plurality of unit reference registers (not shown) therein thereby to provide reference values to the respective ones of the plurality of the unit comparators. Two output signals 108 and 140 from the comparator 9 are in the following properties: Output Signal 108: This signal becomes "1" when an output value from an accumulator 7 for accumulating code data supplied from the RAM 4a or a RAM 4b through the read selector 16b is equal to or more than a first reference value "001" supplied from the reference register 8, while it becomes "0" in other case. As hereinafter described, the RAM 4b is used for storing the code data altenatively with the RAM 4a, Output Signal 140: This signal becomes "1" when the output value from the accumulator 7 is equal to or more than a second reference value "000" supplied from the reference register 8, while it becomes "0" in other case. Therefore, this signal 140 is always "1" in this embodiment(fig. 22A). Fig. 20 shows an output signal generator 11 in detail, which provides an output signal 130 in response to the values of input signals 107, 108 and 140. The reason why the logical product of the signals 107 and 140 is produced in the output signal generator 11 is hereinafter described. Description is now made on recording operation along the scanning line ℓ as shown in Fig. 14, also with reference to a timing chart as shown in Fig. 21. A code detector 6 and the accumulator 7 are reset before starting of the respective main scanning operation. First, the data in the RAM 4a are sequentially read out as a signal 105a through the read selector 16b to be accumulated by the accumulator 7. With respect to the scanning line ℓ, the code data in the RAM 4a with respect to pixels in the intervals before scanning reaches the point ℓ₁ remain as the initial value "000", and hence the result of accumulation remains at "000" to the point ℓ₁. Therefore, both of the output signal 107 from the code detector 6 for detecting the code "100" of the specific point and one output signal 108 from the comparator 9 are "0", while the other output signal 140 from the comparator 9 is "1". Therefore, the output signal 130 from the output signal generator 11 as shown in Fig. 20 is "0" since the input signals 107, 108 and 140 have the aforementioned values respectively. When the scanning reaches the point ℓ₁, the code data 105a from the RAM 4a becomes "001" and hence the result of accumulation by the accumulator 7 becomes "001", whereby the comparator 9 compares the reference value "001" from the reference register 8 with the said value, to change the signal 108 to "1". Therefore, the output signal 130 also becomes "1". In the interval from the point ℓ₁ to the point ℓ₂, the code data from the RAM 4a is always "000", and hence the output signal 130 remains at "1". When the code data "111" with respect to the point ℓ₂ is read out, the result of accumulation in the accumulator 7 becomes "000", whereby the signal 108 becomes "0". This means that the accumulator 7 in this time performs substantial subtraction of the numbers of the raster start and end points along the scanning line ℓ, by utilization of the 2's complementary expression as the code data. Consequently, a signal 108′ in Fig. 20 also becomes "0", whereas the signal 108′ is in a delay by one clock period from the signal 108. However, the signal 108′ is re-used as a signal 109, and hence the signal 130 does not become "0" at the point ℓ₂ and is changed to "0" at a pixel adjacent to the point ℓ₂ (see Fig. 21). Namely, the signal 108′ is re-used as the signal 109 to prevent default of the output by one dot when the output 130 is changed from "1" to "0". When the scanning reaches the point ℓ₃, the code data is changed to the specific code "100". Then, the code detector 6 detects the specific code "100" and the output signal 107 from the code detector 6 becomes "1", whereby the accumulator 7 is controlled to maintain an accumulated value at a point immediately ahead thereof, while the output signal 130 becomes "1" by one dot. The reason why accumulator 7 is so controlled as to maintain the accumulated value at the point immediately ahead thereof is that it is required to prevent further addition of "100" (= -4) to the accumulated value at the specific point in which the difference between the respective numbers of the overlapped start and end points are zero. In the interval between the point ℓ₃ and the end terminal point of the scanning line ℓ, the code data from the RAM 4a is "000" and hence the output signal 130 remains at "0". When the scanning reaches the end terminal point, the scanning of the scanning line ℓ is completed. In an time interval for reading the data from one RAM 4a to perform recording, data with respect to main scanning lines in a subsequent image part exceeding the storage capacity of the RAM 4a are written in the other RAM 4b. Such writing is performed along the sequence of vertical scanning with respect to the vertical scanning direction and at random with respect to the main scanning direction similarly to the writing in the RAM 4a. When the data reading from the RAM 4a is completed, the subsequent data are read from the RAM 4b, whereby the output signal generator 11 outputs the recording signals 130 in sequence along the scanning lines. The reading and recording with respect to RAM 4b are performed along the sequence of scanning in both of the vertical and main scanning directions, similarly to the case of the RAM 4a. Thus, alternately performed are the writing operation and the reading operation in the RAMs 4a and 4b. Needless to say, the RAMs can be further increased in number. Fig. 22A shows record data thus produced with respect to the figure ABCDEFGHI. Although the inner region of the overlapped figures are evenly filled in the aforementioned example, such filling can be performed with restricting regions in response to the number and types of the overlapped figures, and description is now made on such case. For example, the first and second reference values set in the reference register 8 are changed to "010" and "001" respectively in the aforementioned embodiment. Then, the output signal 108 from the comparator 9 becomes "1" when the output value from the accumulator 7 is equal to or more than the first reference value "010" while the output signal 140 becomes "1" when the output value from the accumulator 7 is equal to or more than the second reference value "001". Therefore, filled in this case are only the regions in which two or more figures are overlapped. When such processing is performed with respect to the figures as shown in Fig. 15, obtained are record data in which a figure IBDJG is filled along the sequence of the scanning lines as shown in Fig. 22B. It is also possible to fill only regions in which N (N: integer) or more figures are overlapped by changing the first and second reference values to binary numbers expressing N and (N - 1), respectively. Since the logical product of the signals 107 and 140 is obtained in the output signal generator 11 as shown in Fig. 20, filling of specific points having overlapped numbers less than a prescribed number can be avoided in case of performing filling only when figures equal to or more than the prescribed number are overlapped. Further, it is also possible to apply such modification of extracting the output signal 108 from an equal output terminal (not shown) of the comparator 9 while maintaining the first and second reference values set in the reference register 8 at "001" and "000" respectively. In this case, the output signal 108 from the comparator 9 becomes "1" only when the output from the accumulator 7 is "001" and the signal 140 becomes "1" when the output from the accumulator 7 is equal to or more than "000". Therefore, obtained are record data as shown in Fig. 22c, which are filled only in inner regions with no overlapping of the figures. When the aforementioned processing is applied to the figures as shown in Fig. 8C, Figs. 8D to 8F corresponding to Figs. 22A to 22C are obtaind. When no figures are overlapped and only one figure (Fig. 8A, for example) is recorded in accordance with the present invention, recording is made in a ordinary form as shown in Fig. 8G. Therefore, systematic processing is possible by providing mode data to segments regardless of overlapping of figures, whereby the present apparatus is simplified in handling in comparison with conventional ones. For example, consider such case that, a figure in the size of 840 mm x 600 mm is processed in the units of pixels of 25 µm x 25 µm. When the entire image with respect to such figure is expanded to pexels and all of which are stored in a memory, required for the memory is storage capacity corresponding to about 8.4 x 10² x 40 x 6 x 10² x 40 = about 8 x 10⁸ pixels. On the other hand, the storage capacity of the RAMs 4a and 4b as shown in Fig. 6 for one scanning line may correspond to about 3.4 x 10⁴ pixels, and hence the required capacity of the RAMs 4a and 4b may be far less than that of above described conventional case, not only in the case of providing the RAMs 4a and 4b with storage capacity for one scanning line but providing the same with capacity capable of containing several scanning lines. With respect to the character data, as shown in Fig. 8A, for example, that displayed by 480 x 480 dots for one character is processed as the standard size and the coordinates of the vertices of the polygons approximating the character are stored in memory in the form retrievable by character codes. Then, it is also possible to output those obtained by enlarging or reducing the standard data or those subjected to processing such as elongation, flattening, inclination, rotation and the like. In this case, the standard data are read by the character codes from the memory to perform arithmetic corresponding to the aforementioned processing on the standard data to obtain new vertex coordinate values thereby to perform the processing in the aforementioned embodiment on the basis of the said new values, whereby desired recording is performed. Thus, according to the method of the present invention, the image data of the polygons can be obtained by simply providing the respective vertex coordinates of the respective polygons without performing complicated calculation, whereby image data processing can be performed at a high speed. Further, the processing of obtaining, e. g., the figure as shown in Fig. 8E cannot be performed unless the respective coordinates of both figures as shown in Figs. 9A and 9B are provided in the conventional method of calculating the coordinates of intersection points, while the both figures may not be simultaneously provided in the processing method of the present invention, and the processing may be performed in the order of data reaching to the recording system. Thus, the wait time for the data reaching may be reduced. Further, the processing can be performed through use of simple devices such as the comparator, the accumulator and the detector, whereby the circuit itself can be subjected to high speed operation. Sequential record data along scanning lines can be readily obtained in arbitrary overlapping parts of the figures formed by overlapping of figures by merely changing the values to be registered in the register, specifications of the comparator and the write data producing circuit, the code for the specific point and the like. According to this method, images formed by (2 n-1 -1) orless overlapped figures can be treated by n-bit numerical data, and hence efficiency of describing the overlapping mode with respect to the bit numbers of the RAMs is improved to effectively utilize the memory capacity. Further the first embodiment can be generalized, for example, such that characters and figures may be separated into geometrically independent parts previously, thereby to combine the same in aforementioned operation to obtain raster outputs of desired characters and figures. Second embodiment (D) Summary of Second Embodiment Fig. 23 is a block diagram showing a second embodiment of the present invention, and this embodiment is characterized in that mode providing processing is performed in a different form from that of the first embodiment. In this embodiment, considered as an image to be recorded is that shown in Fig. 24A, which is formed by a plurality of characters and figures. The respective characters and figures as shown in Fig. 24A are expressed by polygons. Referring to Fig. 23, a host system 201 and a coordinate thansformation circuit 202 are operated in software processing. In the host system 201, vertex coordinate values of arbitrary polygons are inputted by a digitizer (not shown) etc. On the other hand, as to fixed characters/figures such as digital fonts, character codes assigned to the said characters and recording positions are inputted thereby to read out vertex coordinate values of the characters approximated by polygons from the memory in which the coordinates are previously stored. The coordinate transformation circuit 202 performs rotation, deformation and the like of the polygons in response to designation from the host system 201, to calculate vertex coordinate values of each polygon on a recording plane. In addition to the above, the host system 201 detects progress of recording/scanning to output polygonal data substantially in sequence of the recording/scanning. Such operation is performed in a processing time longer than that required for recording in the sequence of scanning, since data of highly concentrated information are treated in the former. Then, signals indicating vertex coordinate values on the recording plane are transmitted to a segment decomposition circuit 203 per polygon. The segment decompositon circuit 203, a segment classification circuit 204 and a main scanning coordinate calculating circuit 206 in a subsequent stage correspond to a principal part of the second embodiment, details of which are hereinafter described. A raster data output processing circuit 208 is adapted to provide raster outputs on the basis of inputted signals, and has functions similar to those of the write data producing circuit 3 to the output signal generator 11 in the first embodiment (Fig. 6). The raster data output processing circuit 208 is also hereinafter described in detail. Within these components, the segment decomposition circuit 203 receives signals expressing coordinates of vertices of a polygon from the coordinate transformation circuit 202. An example of such figure is shown in Fig. 25, which is obtained by extracting only a character "A" from the image as shown in Fig. 24A. Then the segment decompostion circuit 203 decomposes the figure to segments and, on the basis of coordinate data for continuous four apexes P i-1 to P i+1 , provides data expressing characteristics of a segment P i P i+1 connecting two intermediate vertices thereof and output the same as first intermediate signals. The first intermediate signals are formed by the following data: record start point coordinates: X s , Y s record end point coordinates: X e , Y e segment mode: L m record start point flag: E s record end point flag: E e In these data, the record start point coordinates X s and Y s are the coordinates of, in both terminal points of the said segment P i P i+1 , the one which the scanning line reaches first while the recording end point coordinates X e and Y e are the coordinates of the other terminal point which the scanning line finally reaches. The segment mode L m is a data indicating whether the segment P i P i+1 is in a raster start mode (mode 1) or a raster end mode (mode 2), or does not correspond to either modes. The record start and end point flags E s and E e are assigned depending on the positional relation between the segment and other segments adjacent thereto in order to indicate processing of the terminal points of the said segment, and are determined in accordance with a rule as hereinafter described. The segment decomposition circuit 203 produces, with respect to polygons sequentially transmitted from the host system 201, the first intermediate signals for all of the segments forming the respective sides of every polygon, and then transmits the first intermediate signals to the segment classification circuit 204. The respective first intermediate signals are thereafter independently processed regardless of the portion of the polygon from which the segment is obtained. The segment classification circuit 204 permutes the first intermediate signals received from the segment decomposition circuit 203 along the sequence of scanning in recording in the unit of the capacity of subdivided classification memory as hereinafter described. In order to perform permutation along the sequence of scanning, the segment classification circuit 204 includes a memory 205, which has a plurality of the subdivided classification memories ordered in correspondence to the sequence of scanning in recording and a plurality of carryover classification memories. Fig. 24B shows respective order and storage ranges of the subdivided classifcation memories S₀ to S₇ and the carryover classification memories K₀ to K₃. It is to be noted that the storage ranges of the memories are sequentially changed with progress of the recording, as hereinafter described. The first intermediate signals are stored in any of the classification memories in accordance with the storage ranges of the classification memories to which coordinate signals X s belong. The memory 205 in the segment classification circuit 204 sequentially stores the first intermediate signals decomposed into a plurality of segments per polygon. After the first intermediate signals required for correct recording are completely stored in the memory 205, the first intermediate signals are read from a subdivided classification memory corresponding to a region first recorded. When the subdivided classification memory is vacated, the first intermediate signals are read from a subsequent subdivided classification memory in the recording sequence. The first intermediate signals are random in order in each subdivided classification memory, while the same are clssified in the sequence of recording in the units of the subdivided classification memories. The first intermediate signals thus read in the sequence of recording in the units of the subdivided classification memories are transmitted one by one to the main scanning coordinate calculating circuit 206. The main scanning coordinate calculating circuit 206 performs arithmetic on parts of the first intermediate signals transmitted from the segment classifcation circuit 204 and converts the first intermediate signals thereby to produce second intermediate signals expressing positions, directions and the like of the respective segments of the polygons. The second intermediate signals are formed by the following data: Where the number ΔX of the vertical scanning lines of segment is obtained by subtracting one from the number of the vertical scanning lines required to entirely scan the segment. Then the second intermediate signals are subjected to arithmetic conversion to be changed to a train of third intermediate signals. The third intermediate signals are adapted to indicate a point train formed by respective points at which the respective points of the polygons intersect with the main scanning lines. The order of respective points is determined by permuting the respective points along the sequence of vertical scanning. The third intermediate signals are formed by the following data: In each train of the third intermediate signals, the flag F of the initial third intermediate signal corresponding to the record start point is "E s " and the flag F for the middle third intermediate signal is "1", while the flag F for the last third intermediate signal corresponding to the record end point is "E e ". When the flag F is "1", the third intermediate signals are changed to fourth intermediate signals. The fourth intermediate signals are formed by the following data: The fourth intermediate signals are transmitted to the raster data output processing circuit 208. The raster data output processing circuit 208 converts the fourth intermediate signals into binary signals which are readily employed as recording signals. The binary signals are inputted in a recording/output part 210, which in turn records reproduced images. (E) Details of Second Embodiment (E-1) Details of Segment Decomposition Circuit 203 Fig. 26 is a diagram showing the segment decomposition circuit 203 in detail and Fig. 25 shows anticlockwise polygons P₁P₂...P₈ and P₉P₁₀P₁₁P₁₂ as examples of the polygons to be recorded in this embodiment. As shown in Fig. 26, the segment decomposition circuit 203 is formed by selectors 231 and 242, registers 233, 234, 235, 236, 238, 239 and 240, a comparator 237, a control circuit 232, a mode deciding circuit 241 and an output register 243. In the segment decomposition circuit 203, first the respective coordinate data (X₁, Y₁), (X₂, Y₂) ... (X₈, Y₈) of the polygon P₁ P₂ ... P₈ are sequentially inputted through the selector 231 and the register 233. Then, description is now made from a state in which the coordinate data of the vertex P₁, P₂, P₃ and P₄ are already inputted from the coordinate transformation circuit 202. At this time, the registers 235, 234 and 233 already receive the first three coordinate data (X₁, Y₁), (X₂, Y₂) and (X₃, Y₃) thereby to hold/output the first three coordinate data respectively, which holding/output are performed until the last coordinate data P₈ (X₈, Y₈) are inputted. On the other hand, the registers 238 and 236 respectively hold/output the coordinate data (X₂, Y₂) and (X₃, Y₃). The coordinate data (X₄, Y₄) are being outputted from the selector 231. The comparator 237 compares the output data of the register 236 with data inputted through the selector 231 at that time to output data ΔX₃₄ (=x₄ - X₃) and ΔY₃₄ (=Y₄ - Y₃). The registers 240 and 239 respectively output the following four data as the results of the last comparison and the last comparison but one in the comparator 237 to the mode deciding circuit 241: ΔX₁₂ (= X₂ - X₁), ΔY₁₂ (= Y₂ - Y₁) ΔX₂₃ (= X₃ - X₂), ΔY₂₃ (= Y₃ - Y₂) further, directly supplied to the mode deciding circuit 241 are the following results of comparison in the comparator 237 at that time: ΔX₃₄ (= X₄ - X₃), ΔY₃₄ (= Y₄ - Y₃) The mode deciding circuit 241 is formed by ROMs 251, 252, 253 and 254. As shown in Fig. 27, the ROMs 251, 252 and 253 are adapted to supply outputs G( P i P i +₁ ) in responce to the input indicating three states (+, - and 0) with respect the signs of the inputs ΔX and ΔY. In other words, the signals G( P i P i+1 ) function as indexes indicating whether or not the segment P i P i+1 has components along the vertical scanning direction or a reverse direction and, when the same has no such components, whether the same is parallel or antiparallel to the main scanning direction. In the example as shown in Fig. 25, (ΔX₁₂, ΔY₁₂) = (+, 0), (ΔX₂₃, ΔY₂₃) = (+, +), (ΔX₃₄, ΔY₃₄) = (+, 0), and hence all of P₁P₂ , P₂P₃ , and P₃P₄ have components in the vertical scanning direction. Therefore, "2", "2" and "2" are supplied respectively as G( P i-1 P i ), G( P i P i+1 ) and G( P i+1 P i+2 ) from Fig. 27. These values are outputted from the ROMs 251, 252 and 253. The ROM 254 is adapted to be in input/output relation as shown in Table 1 or Table 2, to receive the aforementioned outputs from the ROMs 251, 252 and 253 thereby to output data about the segment P₂P₃ . Namely, with reference to P₁ to P₄ in Fig. 25, the data with respect to the characteristics of the intermediate segment P₂P₃ is provided on the basis of attributes of the three segments P₁P₂ , P₂P₃ and P₃P₄ formed by four continuous verteces. The segment mode L m is assigned as "1", "2", or "0" respectively in response to whether points on the segments are in raster start mode or raster end mode, or the point do not correspond to either modes. With respect to anticlockwise rotation, for example, it expresses such relation that the segment P i P i+1 is a raster start point (L m = 1) when G( P i P i+1 ) is "2" (i.e., the segment P i P i+1 has components in an X direction) while the segment P i P i+1 is a raster end point (L m = 2) when G( P i P i+1 ) is "4" (i.e., the segment P i P i+1 has components in a direction reverse to X). When G( P i P i+1 ) is "1" or "3", the segment is parallel or anti-parallel to the main scanning direction and corresponds to neither raster start nor end points, and hence L m is set to "0" in principle. The record start and end point flags E s and E e are provided, when the segment mode L m is "1" or "2", in order to indicate treatment of the terminal points of the said segment in response to positional and directional relation between the segment and other segments adjacent thereto. These flags have the following significance: First, consider such case where independent signals with no such flags are provided for respective segments. When, in this case, the respective segments are finally combined to obtain data, an vertex (e.g., P₄ in Fig. 25) is doubly designated by both of two segments ( P₃P₄ and P₄P₅ ) holding the same, whereby the record start mode (or the record end mode) is accumulated twice at this point. However, the accumulation of the record start mode must be performed only once at such a point similarly to the first embodiment, and hence this vertex must be designated with respect to only one of the two segments. Thus, this embodiment is so structured that flags are provided to both terminal points of the respective segments and each vertex is designated from only one segment in accordance with the flags. In other words, each vertex is designated by the flag of "1" in one of two segments holding the vertex while the vertex is designated by the flag of "0" in the other segment. The fourth intermediate signal as hereinafter described is supplied to the vertex from only the segment assigned with the flag of "1". With reference to the aforementioned example, P₄ is assigned with the flag of "0" in the segment P₃P₄ and is assigned with the flag of "1" in the segment P₄P₅ , so as to supply the fourth intermediate signal only for P₄ from the segment P₄P₅ . However, boundary point between the record start and ending modes (e.g., P₁ in Fig. 25) must be considered as specific point similar to those in the first embodiment, and hence allowed is double designation from both segments (i.e., designation by the flag of "1" in both of the segments). Columns of record start and end point flags in Tables 1 and 2 have been prepared along such principle. It is to be noted that the record start point flags indicate flags with respect to the record start points and the record end point flags indicate those with respect to the record end points. Large-and-small indication flag R is adapted to express large-and-small relation in the respective X coordinates of two terminal points P i and P i+1 , by being "1" only when the X coordinate of P i+1 is larger than that of P i and being "0" in other case. This is used to determine output sequence of respective X and Y coordinates of P i and P i+1 . Further determined in accordance with this flag R is which one of P i and P i+1 corresponds to the record start or end point. When, for example, the segment P₂P₃ in Fig. 25 is subjected to conversion along the conversion characteristics shown in Table 1, the ROM 254 outputs the segment mode L m = 1, the record start point flag E s = 1, the record end point flag E e = 0 and the large-and-small indication flag R = 1. The large-and-small indication flag R is inputted in the selector 242, which in turn outputs the coordinate data in the registers 238 and 236 in such sequence of the record starting point coordinates (X₂, Y₂) and the ending point coordinates (X₃, Y₃) by the fact that the large-and-small indication flag R is "1". Thus, determined are the first intermediate signals, which are formed by the following data: Thus, the segment decomposition circuit 203 outputs X₂, Y₂, X₃, Y₃, 1, 1 and 0 as the first intermediate signals with respect to the segment P₂P₃ from the output register 243. Similarly with respect to the subsequent segments P₃P₄ , P₅P₆ and P₆P₇ , the first intermediate signals are outputted from the output register 243. When the coordinates of the last vertex P₈ are inputted, the host system 201 outputs an END signal to the control circuit 232. When the first intermediate signals with respect to the segment P₆P₇ are outputted, the control circuit 232 switches the selector 231, whereby the coordinate data (X₁, Y₁), (X₂, Y₂) and (X₃, Y₃) latched in the registers 235, 234 and 233 are sequentially inputted from the selector 231 following the coordinate data (X₈, Y₈). Thus, the first intermediate signals are outputted also with respect to P₇P₈ and P₈P₁ . Table 3 shows the first interinediate signals thus obtained as the output of segment decomposition circuit 203. Table 3 also shows first intermediate signals similarly obtained with respect to the polygon P₉P₁₀P₁₁P₁₂ which is to be exteriorly filled. Fig. 28 schematically shows significance of the first intermediate signals obtained in accordance with the aforementioned example. With respect to the segment P₂P₃ , the points P₂ and P₃ are record start and end points respectively and the numeral "1" between P₂ and P₃ indicates the segment mode L m while black and white half circles indicate the flags E s = 1 and E e = 0 respectively. (E - 2) Details of Segment classification Circuit 204 Fig. 29 shows the segment classification circuit 204 in detail. The segment classification circuit 204 is formed by the selector 261, a classification memory selecting circuit 262, memory 205 and a control circuit 270. The classification memory selecting circuit 262 is formed by a subtractor 263, a comparator 264, a reference value generator 265 and ROMs (or RAMs) 266 and 267, and the memory 205 is formed by carryover classification memory 268 and subdivided classification memory 269. The selector 261 receives the first intermediate signals from the segment decomposition circuit 203 or the first intermediate signals returned from the carryover classification memory 268. The classification memory selecting circuit 262 selects, by X s of the first intermediate signals, the storage area (classification stack) within the subdivided classification memory 269 or the carryover classification memory 268 included in the memory 205 to which the first intermediate signals are to be stored. Within the aforementioned components, the subdivided classification memory 269 is adapted to classify and store the segment data as to the segment located in the vicinity of regions in which recording is performed in that time. On the other hand, the carryover classification memory 268 is adapted to classify and store data for the segments not yet subjected to recording at that time, to sequentially transfer the storage contents thereof to the subdivided classification memory 269 with progress of the scanning thereby to subject the stored contents to recording. Figs. 24B and 30(A) show respective the storage ranges of the subdivided classification memory 268 (consisting of S₀ to S₇) and the carryover classification memory 268 (K₀ to K₃) at the starting time of the operation. In operation, a vertical scanning address R A currently under recording is substracted from the coordinate value X S included in the first intermediate signals at the substractor 263 shown in Fig. 29, whereby to obtain (X S - R A ). Then the comparator 264 compares the value (X S - R A ) with the reference value outputted from the reference value generator 265. The reference value is previously set to be less than the vertical scanning width corresponding to the storage capacity of the subdivided classification memory 269 which can be obtained by multiplying N x in Fig. 24B by "8". The first intermediate signals are stored in the carryover classification memory 268 when the result of subtraction (X s - R A ) is larger than the reference value set in the reference value generator 265, and in the subdivided classification memory 269 when the result of the subtraction is smaller than the reference value. Fig. 31 typically shows the manner in which the segment data for the figure as shown in Fig. 25 are stored in the subdivided classification memory 269 (S₀ - S₇). With respect to a figure T a as shown in Fig. 24B, the first intermediate signals expressing the segments Q₁Q₂ , Q₂Q₃ and Q₁Q₄ are stored in the subdivided classification memory S₅ and the first intermediate signals expressing the segment Q₃Q₄ are stored in the carryover classification memory K₃. However, the carryover classification memories K₀′ to K₃′ shown in Fig. 24B are not present at this time, and hence the carryover classification memory K₃, which is the last one in order of the carryover classification memories present at this time, is selected to store the data for the segments (e.g., segment Q₃Q₄ for the figure T a ) having the record starting point Q₃ in this region. When all of the first intermediate signals to be stored in the unit subdivided classification memories S₀ to S₇ are stored, the entire first intermediate signals stored in the subdevided classification memory S₀ are read out one by one and, after that, the first intermediate signals stored in the subsequent memories S₁ to S₇ are read out along the order thereof in the same manner (Fig. 30(B) to (E)). The ROM (or RAM) 267 is adapted to determine from which storage region of the carryover and subdivided classification memories 268 and 269 the first intermediate signals are to be read out in response to the value of the vertical scanning address R A . The reading outputs from the subdivided classification memory 269 are sequentially supplied to the main scanning coordinate calculating circuit 206 as the permuted first intermediate signals. When all of the first intermediate signals in the four subdivided classification memories S₀ to S₃ are read with progress of the recording (Fig. 30 (E) to (F)), the first intermediate signals stored in the subsequent carryover classification memory K₀ in the sequence of recording are read from the same to be classified along the sequence of recording and stored in any of the four vacated subdivided classification memories S₀ to S₃ (Fig. 30(F)). The recording is started from Fig. 30(E). Thus, the storage contents of the carryover classification memory are sequentially re-distributed to the subdivided classification memories S₀ to S₇ in response to the start point coordinate X s , with progress of the recording. As hereinabove described, the signal X s in the first intermediate signals determines the X coordinate (vertical scanning coordinate) in Fig. 30. When the vertical scanning address R A is "0" at this time, there is no duplication between the storage ranges of the carryover and subdivided classification memories 268 and 269 as shown at Fig. 30(A), and hence the classification memory for storage of the first intermediate signal is uniquely determined. On the other hand, when the vertical scanning address R A is increased to correspond to the states as shown in Fig. 30(B) to (E), a problem is coming up whether the first intermediate signals having X coordinates corresponding to the storage ranges of the carryover classification memories K₀ to K₃ are to be stored in the carryover classification memories K₀, K₁, K₂ and K₃ or in any of the subdivided classification memories S₀ to S₇. In order to solve the problem, such selection of the classification memory is determined by comparison of the value of the vertical scanning address R A at that time and the reference value from the reference value generator 265. In other words, when the value X s of the first intermediate signals is sufficiently larger than the address R A , the output from the comparator 264 enters the ROM (or RAM) 266 as a signal for selecting the carryover classification memory. On the other hand, when the value X s is unsufficiently larger than the address R A , the subdevided classification memory is selected. Then, in responce to the result of the selection, the ROM 266 determines a storage region of the carryover classification memory 268 or the subdivided classification memory 269 in which the first intermediate signals are to be written. However, the first intermediate signals for the segments such as the segment Q₃Q₄ of the figure T a as shown in Fig. 24B, which are temporarily stored in the last carryover classification memory (e.g., K₃) present at the time when the same is input for the first time since corresponding storage region of the carryover classification memory is not yet present, are processed as follows: When the vertical scanning is advanced thereby to restore the first intermediate signals in the carryover classification memory K₃ in, e.g., the subdivided classification memories S₄ to S₇, the segments such as Q₃Q₄ in the read first intermediate signals, whose record starting point coordinates X s are not contained in the ranges of the subdivided classification memories S₄ to S₇ at that time, are re-stored in any of subsequent carryover classification memories K₀′ to K₃′ as shown in Fig. 24B in response to the value X s of the first intermediate signals of the said segments. At this time, further, coordinate data for polygons (e.g., a figure T b in Fig. 24B) whose segments are present in the carryover classification memory (e.g. K₀′) for the first time are transmitted from the host system 201 through the coordinate transformation circuit 202. Then, the coordinate data transformed into first intermediate signals per segment by the segment decomposition circuit 203 to be sorted in the carryover classification memories (K₀′) to (K₃′). Thus, the segment classification circuit 204 performs the following three operations (A) to (C) in parallel: (A) The first intermediate signals permuted in the units of the subdivided classification memories are transmitted to the main scanning coordinate calculating circuit 206. (B) The first intermediate signals stored in the carryover classification memory are read out to be re-stored in the subdivided classification memories or subsequent carryover classification memories in the units of the storage capacity of a carryover classification memory. (C) With progress of the recording, the first intermediate signals for the segments with respect to the polygons remaining in the host system 201 are transmitted and stored in the subdivided or carryover classification memories. Thus, the main function of the segment classification circuit 204 is to permute the first intermediate signals in the units of the subdivided classification memories and output first intermediate signals. The ROMs 266 and 267 may be replaced by RAMs in order to arbitrarily change the storage capacity of the subdivided and carryover classification memories S₀ to S₇ and K₀ to K₃. (E - 3) Details of Main Scanning Coordinate Calculating Circuit 206 Figs. 32A and 32B are diagrams to be arranged together thereby to show the main scanning coordinate calculating circuit 206 in detail, and Fig. 32 shows the positional relation in the arrangement of Figs. 32A and 32B. Referring to Figs. 32A and 32B, the main scanning coordinate calculating circuit 206 is formed by a data converting circuit 281, a memory 207 and a coordinate calculating circuit 282. The data converting circuit 281 as shown in Fig. 32A is formed by registers 283 and 287, subtractors 284 and 285 and a divider 286. The subtractors 284 and 285 perform subtractions ΔX = ( X e - X s ) and ( Y e - Y s ) respectively while the divider 286 performs a division dY/dX = (Y e - Y s )/(X e - X s ). The first intermediate signals are thus converted into the second intermediate signals as output of the register 287, which are formed by the following data: The registers 283 and 287 are adapted to adjust the data transfer timing. The second intermediate signals thus obtained are transmitted to the memory 207. The memory 207 is formed by two unit memories 288 and 289, which alternately perform writing and reading synchronously with reading from the subdivided classification memory 269 as shown in Fig. 29. In the unit memory (e.g., 288) under writing, not only the second intermediate signals transmitted from the data converting circuit 281 but also the second intermediate signals already provided to the coordinate calculating circuit 282 as shown in Fig. 32B and returned therefrom are written, as hereinafter described. On the other hand, outputs of the unit memory (e.g., 289) under reading are the second intermediate signals obtained by converting the outputs from the subdivided classification memory 269 as shown in Fig. 29 and the second intermediate signals returned from the coordinate calculating circuit 282. These outputs are transmitted to the coordinate calculating circuit 282. The coordinate calculating circuit 282 as shown in Fig. 32B is formed by a register 290, a presettable up-counter 291, a selector 292, an adder 293, a register 294, a presettable down-counter 295, a selector 296, a control circuit 297 and registers 298 and 299. The second intermediate signals received in the coordinate calculating circuit 282 are latched by the register 290 to be changed as follows: When the second intermediate signals are received in the coordinate calculating circuit 282 through the register 290, the record start point coordinate X s is preset to the presettable counter 291 to be outputted to the registers 298 and 299. Record start point coordinate Y s are passed through the selector 292 to be inputted in the registers 294, 298 and 299 while the segment mode L m are inputted in the registers 298 and 299. The record starting point flag E s is inputted in the control circuit 297 through the selector 296, to serve as gate signals for the register 298. The third intermediate signals generated in the coordinate calculating circuit 282 are formed by the following data: coordinate signals: X, Y segment mode: L m flag: F The coordinate signals X, Y are adapted to indicate the coordinates of each point on a segement and the flag F is any of E s , "1" and E e . The third intermediate signals first generated in the coordinate calculating circuit 282 are X (= X s ), Y (= Y s ), L m and E s , and when E s is "1", the control circuit 297 supplies pulse to the register 298, whereby the register 298 outputs fourth intermediate signals X, Y and L m . The fourth intermediate signals are formed by the following data: coordinate signals: X, Y segment mode: L m When a third intermediate signal is generated to be inputted in the control circuit 297 a subsequent third intermediate signal is generated in the timing sequence (1) to (5) as follows. (1) The counter 291 counts up by (+1) so that the coordinate signal X is changed to (X s + 1). (2) A pulse is inputted in the register 294 to maintain the value Y, and the value Y is added up with the value dY/dX in the adder 293. (3) The selector 292 is so switched that the corrdinate signal Y is changed to (Y + dY/dX). (4) The counter 295 counts down by "1" so that the number of vertical scanning lines of segment ΔX, is changed to ( ΔX - 1 ), and (5) The flag F is switched in the selector 296 to be new flag "1". In Fig. 32B, respective signals are shown as the repeating operations are already performed by n-times. After the aforementioned updating (1) to (5) is once completed, the third intermediate signals have new value X, Y, ΔX, dy/dx, L m , "1" and E e , which also function as a new second intermediate signals as described later. During ΔX is equal to or more than "1", the signals X, Y and L m are transmitted from the register 298 to the raster data output processing circuit 208 as shown in Fig. 23 as the fourth intermediate signals, and thereafter the aforementioned operation is repeated untill ΔX becomes "0". When ΔX becomes "0", the third intermediate signals become X, Y, L m and E e . When E e is "1", the fourth intermediate signals X, Y and L m are transmitted from the register 298 to the raster data output processing circuit 208 as shown in Fig. 23, to terminate the processing with respect to the segment. When the control circuit 297 makes such a determination that X becomes a value indicating a vertical scanning line belonging to the storage area of a subsequent subdivided classification memory before X becomes "0", the second intermediate signal is returned through the register 299 to the unit memory (e.g., 288) in the memory 207, to be written therein. Namely, the second intermediate signals function as the new second intermediate signals according to the circumstances. Such operation is repeated a plurality of times with respect to, e.g., the segments Q₂Q₃ and Q₁Q₄ for the figure T a as shown in Fig. 24B. As hereinabove described, such operations in which X becomes (X + 1), Y becomes (Y + dY/dX) and ΔX becomes (ΔX - 1) are repeated with respect to one second intermediate signal thereby to generate the third intermediate signal and a new second intermediate signal until the unit memory (e.g., 289) under reading is vacated. When the second intermediate signals to be read are entirely and the second intermediate signals to be written are entirely written with respect to the unit memories 289 and 288 respectively, the reading and writing operations of the unit memories 289 and 288 take turns with each other. In addition to the raster start and end mode, the other mode can be considered as the mode of a segment. It is a raster start and end point mode in which recording(filling) is terminated immediately after the recording is started. This is the mode called as the "specific mode" in the first embodiment. However, the mode data L m included in the fourth intermediate signals in the second embodiment itself has no "raster start and end point mode" as defined in the first embodiment. This is because the respective segments forming the polygons are treated as independent segments in this stage. The specific mode is provided in the subsequent raster data output processing circuit 208 in the second embodiment. Such provision of the specific mode is performed not only by the mutual relation between the segments forming one polygon but by overlapping conditions of a plurality of polygons similarly to the first embodiment. (E - 4) Raster Data Output Processing Circuit 208 The raster data output processing circuit 208 functions similarly to the circuits from the write data producing circuit 3 to the output signal generator 11 in the first embodiment as shown in Fig. 6, and hence the raster data output processing circuit 208 is briefly described within a range required for understanding of the second embodiment. Fig. 33 is a schematic diagram showing the details of the raster data output processing circuit 208. The raster data output processing circuit 208 is formed by a mode transformation circuit 301, memory 209 and a code detector/accumulator 304. A recording/output part 210 receiving the outputs from the raster data output processing circuit 208 outputs the vertical scanning addresses R A under recording as well as raster output. The memory 209 is formed by two RAMs 302 and 303, which in turn alternately perform writing and reading. When reading is completed, the RAM under reading is cleared once. Each of the RAMs 302 and 303 have storage capacity corresponding to the number of vertical scanning lines contained in the storage range of one division of the subdivided classification memory. In other words, when the main scanning direction is also taken into consideration, the storage capacity of the RAMs 302 and 303 are correspoinding to the number of the recording dots which can be stored in the one division of the subdivided sorting memory, These RAMs 302 and 303 store three-bit mode data M obtained by accumulating mode data L m for the segments inputted to that time in a similar form to the first embodiment, in correspondence to the coordinates (X, Y) on the recording plane. A code transformation rule required for such accumulation of the mode data M is provided by Figs. 16A and 16B as hereinabove described. Therefore, the RAMs 302 and 303 correspond to the RAMs 4a and 4b in Fig. 6 respectively, while the mode transformation circuit 301 corresponds to the write data producing circuit 3 and the like in Fig. 6. Further, the code detector/accumulator 304 corresponds to the code detector 6, the accumulator 7, the output signal producing circuit 11 and the like in Fig. 6. A code "100" indicating the specific mode is not previously provided in the fourth intermediate signals L m , but the specific point code "100" is provided when a value obtained as the result of accumulation of the mode data L m with respect to a plurality of segments becomes "0". Further, since the respective segments are independently processed, the specific mode is provided not only by overlapping of a plurality of polygons but by overlapping of terminal points of segments belonging to the same polygon. When the fourth intermediate signals X, Y and L m are inputted in the mode transformation circuit 301 on such premise, storage contents M in addresse (X, Y) of the RAM (e.g., 302) are read out whereby the mode transformation circuit 301 performs a transformation of M by the mode L m in accordance with the rule as shown by Figs. 16A and 16B. The RAMs 302 and 303 are provided with "000" as initial values, also similarly to the first embodiment. The new accumlated mode data M thus obtained by the transformation in the mode transformation circuit 301 is restored in the addresse (X, Y) in which the accumlated mode M under transformation was stored in. On the other hand, in parallel to the operation of the mode transformation and the accumration to the RAM (e.g., 302), the accumlated modes M already completely accumlated and stored in the other RAM (e.g., 303) are read from the same sequentially along the scanning lines to be code-detected or code-accumulated by the code detector/accumulator 304. The term "code detection" indicates detection of the inputted codes when the same are the specific code "100" similarly to the first embodiment, so that a "1" signal is outputted for one dot when the code is "100". Further, the term "code accumulation" in this step indicates addition of inputted codes other than the specific codes sequentially along the main scanning direction. Continuously transmitted to the recording/output part 210 are the "1" signals during when the sign of the result of the accumulation is (+1) and the "0" signals in other case. The recording/output part 210 records the images in such operation to emit exposure beams when "1" is inputted while emitting no such exposure beam in the case of "0" input. Description is now made on an example of such image recording. For the point P₁ in Fig. 28, "mode 1" transformation from "000" to "001" (see Fig. 16A or Fig. 16B) is performed as a point on the segment P₁P₂ and "mode 2" transformation from "001" to "100" is performed as a point on the segment P₁P₈ . Since it is detected that this mode is the specific mode by detection of the code "100" by the code detector/accumulator 304, the detector/accumlator 304 outputs "1" by one dot at the point P₁ and hence only the point P₁ is recorded on the recording plane. The other points on the main scanning line to which the point P₁ belongs are not recorded because the output of the detector/accumlateor is "0" for these points. With respect to a middle point of the segment P₁P₂ intersecting with the scanning lines, "mode 1" transformation from "000" to "001" is performed whereby the code detector/accumulator 304 accumulates as "001" to continuously output the "1" signals for the points following in the rear of the middle points. In points where the scanning lines intersect with the segment P₁P₈ , the "mode 2" transformation from "000" to "111" is performed. In the recording process, the "111" is read out from the memory and accumlated with "001" ("001" + "111" = "1000") to be "000", whereby "0" signals are outputted from the subsequent dot. Filling of the inner region of the figure in accordance with the second embodiment is performed in such a manner. When two or more polygons are overlapped, the mode transformation circuit 301 performs, e.g., the "mode 1" transformation from "000" to "001" and then performs the "mode 1" transformation again, whereby "001" is further changed to "010". When the mode data M thus obtained is read out and inputted to the code detector/accumulator 304, the "1" signals are continuously outputted until the mode data M subjected to the "mode 2" code transformation is twice inputted. The mode data M stored in the RAMs 302 and 303 may be converted to run-length data. (F) Storage Capacity of Each Memory In the aforementioned embodiment, the storage capacity in the number of vertical scanning lines of the subdivision of the subdivided classification memory 269 in the segment classification circuit 204, the that of the respective memories 288 and 289 in the main scanning coordinate calculating circuit 206 and that of the RAMs 302 and 303 in the raster data output processing circuit 208 are identical with each other. The storage capacity of the RAMs 302 and 303 per main scanning line is matched with the number of dots required for pracitical recording of one scanning line. (G) Processing of Specific Segments < Segment P i P i+1 along the Main Scanning Direction > This case corresponds to the condition that ΔX is "0" and ΔY is (+) or (-). Since ΔX and ΔY of P i P i+1 are (0+) or (0-) in this case, G( P i P i+1 ) is "1" or "3" from Fig. 27. Referrinig to Table 1, there are 32 combinations in which G( P i P i+1 ) is "1" or "3". With respect to 24 combinations in which these combinations, G( P i+1 P i+2 ) with respect to a segment P i+1 P i+2 followingly adjacent to the segment P i P i+1 is not 3 nor 1, and the segment mode L m is "0". When the segment mode L m is "0", the segment decomposition circuit 203 outputs no first intermediate signal. This is because the raster output for the intermediate segment P i P i+1 is obtained only by the first intermediate signals from the terminal points of horizontally adjacent segments P i-1 P i and P i+1 P i+2 . By employing this rule, recording process is fastened. In the remaining 8 combinations in which the segment mode L m is "1" or "3", the segment mode L m for at least one of the horizontally adjacent segments is "1" or "3". This is because this case is correspoinding to the condition that the horizontal segment of the polygon is bent halfway, and the raster output with respect to the middle segment cannot be obtained unless the first intermediate signals are supplied to the middle segment. < Segment formed with Only One Point > In a figure formed with only one point P₀ (X₀, Y₀), the following two first intermediate signals are transmitted to the segment sorting part 204: X₀ , Y₀ , X₀ , Y₀ , 1 , 1 , 1, X₀ , Y₀ , X₀ , Y₀ , 2 , 1 , 1, The first intermediate signals may be transmitted from the host system 201 directly to the segment classification circuit 204. < Figure formed by Segments Connecting Two Points > Assuming that the coordinates of two points are expressed as (X₁ Y₁) and (X₂, Y₂), the following first intermediate signals are provided: (1) In case of X₁ = X₂ , Y₁ < Y₂ X₁ , Y₁ , X₁ , Y₁ , 1 , 1, 1 X₂ , Y₂ , X₂ , Y₂ , 2 , 1 , 1 (2) In case of X₁ = X₂ , Y₁ > Y₂ X₂ , Y₂ , X₂ , Y₂ , 1 , 1 , 1 X₁ , Y₁ , X₁ , Y₁ , 2 , 1 , 1 (3) In case of X₁ < X₂ X₁ , Y₁ , X₂ , Y₂ , 1 , 1 , 1 X₁ , Y₁ , X₂ , Y₂ , 2 , 1 , 1 (4) In case of X₁ > X₂ X₂ , Y₂ , X₁ , Y₁ , 1 , 1 , 1 X₂ , Y₂ , X₁ , Y₁ , 2 , 1 , 1 The two first intermediate signals may be transmitted from the host system 201 directly to the segment classification circuit 204. When X₁ = X₂ and Y₁ = Y₂ , the figure is formed by one point and aforementioned processing with respect to the figure with only one point is performed. (H) First Modification Although the first intermediate signals are permuted in the second embodiment, the first intermediate signals may be directly converted into the second intermediate signals and permutation is performed with respect to the second intermediate signals. Selection of the order of the conversion and the permutation deponds on which are readily processed in view of storage capacity, the data X e and Y e of the first intermediate signals or the data ΔX and (dY/dX) of the second intermediate signals. (I) Second Modification When the memory 205 in the segment classification circuit 204 is sufficient in storage capacity, the carryover classification memory 268 may be so segmented as to change K₀′, K₁′,K₂′ and K₃′ as shown in Fig. 24B to K₄, K₅, K₆ and K₇ thereby to simplify processing in the segment classification circuit 204. When the storage capacity is further sufficient, the memory 205 may be entirely constructed only with the subdivided classification memories. (J) Supplement Always clarified are the numbers of write data and read data of the memory 205 and 207, thereby to detect memory vacancy. Further, in data transfer between respective blocks shown in Fig. 23, performed is general handshaking operation. (K) Advantages of Second Embodiment As hereinabove described, the second embodiment has the following advantages: (1) Recording is so performed as to fill inputted figure in fidelity. (2) Each segment obtained by connecting two vertices contained in a polygon is treated as an independent first intermediat signal, whereby processing speed is improved without necessity of considering the relation between the segment and the original polygon. (3) In the case of a segment is in the main scanning direction, data processing becomes unnecessary with respect to most of the points forming the segment, whereby the processing speed is improved. (4) Data transfer is performed every time the memory is vacated, whereby control circuit is not complicated. (5) Since the polygons are decomposed into data for segments and buffer memory is provided in the middle of the processing steps thereby to adjust data transfer, and hence the data are transmitted to the recording/output part without interruption, whereby the efficiency is improved. (6) The segment classification circuit 204 may be in such capacity as corresponding to absolute quantities of data of characters, figure and the like, whereby the processing speed can be increased. (7) Fixed polygon data such as characters may be stored in the host system 201 until recording is started, whereby the segment classification circuit 204, the main scanning coordinate calculating circuit 206 and the raster data output processing circuit 208 can be minimized in storage capacity. (8) When stored in the host system 201, the fixed polygon data such as characters may be only data such as character codes, ouptut positions of the center of characters, inclinations and magnifications, which may be extremely small in comparison with the numbers of data required in the segment classification circuit 204, whereby the storage capacity can be minimized. (9) The raster data output processing circuit can perform such processing of filling or not filling a desired region of two or more overlapped polygons in response to the number of overlapping by appropriately changing the types of codes for making the recording/output part output "1". This corresponds to the processing as hereinabove described with reference to the first embodiment. Thus, the second embodiment is so advantageous that the processing is systematically performed and the processing speed is increased since the processing is performed in a hardware manner.

Claims: A method of arranging a plurality of polygons on an image plane to obtain overlapped polygons whose inner regions are to be filled in raster image recording along a sequence of scanning lines, using an image processor having a memory, said method comprising the steps of: inputting to said image processor coordinate data of terminal points (X₁, J₁; X₂, J₂;...) of segments forming respective sides of each polygon; characterized by the image processor performing the following steps: determining respective directions of said segments on said image plane as a function of said coordinate data to provide mode data to respective points on said segments, wherein said mode data represents whether respective points on each segment are in: raster start mode indicating that raster recording along said scanning lines is to be started at said points; raster end mode indicating that raster recording along said scanning lines is to be ended at said points; or raster start and end mode indicating that raster recording along said scanning lines is to be started and then ended at said points; along the scanning lines for all intersection points of said scanning lines with segments of a first polygon included in said plurality of polygons, storing the corrresponding mode data for said points in a memory location of said memory corresponding to said points, whereby for said points belonging to two segments the mode data is accumulated in the corresponding memory location; for a further overlapping polygon, conducting a further writing process to said memory, in which the stored mode data in each overlap point is read from said memory, changed to reflect said overlap and is then written back into said memory; and sequentially reading the memory data along a scanning line and accumulating said point's mode data to obtain starting and end points of said inner regions of said overlapped polygons for filling them. A method of claim 1, wherein said accumulation of said raster start mode is addition of a first binary code, and said accumulation of said raster end mode is addition of a second binary code which is the binary complement of said first binary code. A method of claim 2, wherein code data obtained by said accumulation of said mode data is read out from said memory and is compared with prescribed reference values to obtain raster output. A method according to claim 1, wherein the determining step contains determining vertices of said segments and coordinates of intersection points of said segments and said scanning lines as a function of said coordinate data to generate electric signals representing the coordinates of intersection points and the mode data representing whether respective points on each segment are in: raster start mode indicating that raster scanning along said scanning lines is started at said intersection points; or raster end mode indicating that raster scanning along said scanning lines is ended at said intersection points; the method further comprising providing said electric signals to said intersection points while inhibiting said electric signals from being provided to two or more intersection points overlapped at a same vertex of said segments. A method of claim 4, wherein the step of generating said electric signals comprises the steps of: generating preliminary electric signals representative of said coordinates, said mode data and flags for selecting one of intersection points overlapped at a vertex of said segments; and with respect to intersection points overlapped at each vertex of said segments, converting said preliminary electric signals into said electric signals in response to said flags, whereby only one intersection point among intersection points overlapped at said each vertex is provided with said electric signals. A method of claim 4, wherein said accumulation of said raster start mode includes a first binary transformation of a binary code stored in said memory, said accumulation of said raster end mode includes a second binary transformation of said binary code, and said second binary transformation is a reverse transformation of said first binary transformation. A method of claim 6, wherein code data obtained by said accumulation of said mode data is read out of said memory and is compared with prescribed reference values to obtain raster output. A method of claim 7, wherein said accumulation of mode data includes the step of: generating specific mode data indicating that raster scanning along said scanning lines is started and then ended at points to which said specific mode data is provided. A method of claim 8, wherein said image plane is divided into a plurality of divided areas; and said step of generating said electric signals includes the steps of: generating said electric signals for first segments arranged on a first divided area; and generating said electric signals for second segments arranged on a second divided area nearer to the scanning start side on said image plane than said first area. An image processing apparatus for arranging a plurality of polygons on an image plane to obtain overlapped polygons whose inner regions are to be filled in raster image recording along a sequence of scanning lines, said apparatus comprising: input means for inputting coordinate data of terminal points of segments forming respective sides of each polygon; characterized by determining means (1) for determining respective directions of said segments on said image plane as a function of said coordinate data to provide mode data to respective points on said segments, wherein said mode data represents whether respective points on each segment are in: raster start mode indicating that raster recording along said scanning lines is to be started at said points; raster end mode indicating that raster recording along said scanning lines is to be ended at said points; or raster start and end mode indicating that raster recording along said scanning lines is to be started and then ended at said points; accumulation/storage means (4a) for storing, along the scanning lines for all intersection points of said scanning lines with segments of a first polygon included in said plurality of polygons, the corresponding mode data for said points in a memory location of said memory corresponding to said points, whereby in said points belonging to two segments the mode data is accumulated in the corresponding memory location; writing means for conducting, for a further overlapping polygon, a further writing process to said memory, in which the stored made data in each overlap point is read from said memory, changed to reflect said overlap and is then written back into said memory; and means for sequentially reading the memory data along a scanning line and accumulating said point's mode data to obtain starting and end points of said inner regions of said overlapped polygons for filling them. An appartus in accordance with claim 10, wherein said accumulation of said raster start mode is addition of a first binary code, and said accumulation of said raster end mode is addition of a second binary code which is a binary complement of said first binary code. An apparatus in accordance with claim 11, comprising comparator means (9) for comparing code data obtained by said accumulation of said mode data and read out from said memory with prescribed reference values to obtain raster output. An image processing apparatus in accordance with claim 10, said determining means further comprising means for determining respective vertices of said segments on said image plane and coordinates of intersection points of said segments and said scanning lines as a function of said coordinate data to generate electric signals representing the coordinates of intersection points and the mode data representing whether respective points on each segment are in: raster start mode indicating that raster scanning along said scanning lines is started at said intersection points; or raster end mode indicating that raster scanning along said scanning lines is ended at said interesection points; means providing said electric signals to said intersection points while inhibiting said electric signals from being provided to two or more intersection points overlapped at a same vertex of said segments. An apparatus in accordance with claim 13, comprising means for generating preliminary electric signals representative of said coordinates, said mode data and flags for selecting one of intersection points overlapped at a vertex of said segments; and means for converting, with respect to intersection points overlapped at each vertex of said segments, said preliminary electric signals into said electric signals in response to said flags, whereby only one intersection point among intersection points overlapped at said each vertex is provided with said electric signals. An apparatus for processing imge data in accordance with claim 13, wherein said accumulation of said raster start mode includes a first binary transformation of a binary code stored in said memory, said accumulation of said raster end mode includes a second binary transformation of said binary code, and said second binary transformation is a reverse transformation of said first binary transformation. An apparatus for processing image data in accordance with claim 15, comprising comparator means for comparing code data obtained by said accumulation of said mode data and read out from said memory with prescribed reference valus to obtain raster output. An apparatus in accordance with claim 16, wherein said accumulation of mode data includes generating specific mode data indicating that raster scanning along said scanning lines is started and then ended at points to which said specific mode data is provided. An apparatus for processing image data in accordance with claim 17, comprising means for dividing said image plane into a plurality of divided areas; and means for generating said electric signals for first segments arranged on a first divided area; and means for generating said electric signals for second segments arranged on a second divided area nearer to the scanning start side on said image plane than said first area.

Inventors: NOMURA AKIHIRO, NOMURA, AKIHIRO
Applicants: DAINIPPON SCREEN MFG, DAINIPPON SCREEN MFG. CO., LTD.
Application year: 1986
Main classification: G06T11
IPC codes: G06T11