DISPLAYING CHARACTERS WITH SELECTABLE ATTRIBUTES

Abstract: Characters with selectable attributes are displayed on a CRT (22) at high speed by encoding (24) attribute data (10c) concurrently with the generation (12) of character slice signals (12a), and then logically combining the encoded attribute signals (24a and 24b) with the generated character slice signals (12a) using only two levels of gating logic (30 and 40).

Description: <*x DISPLAYING CHARACTERS WITH SELECTABLE ATTRIBUTES BACKGROUND OF THE INVENTION The present invention generally relates to video display circuitry, and more particularly to improved means and methods for displaying characters with 5 selectable attributes on a cathode ray tube (CRT) at a high dot rate. In recent years, there has been a significant increase in the scan rate employed for displaying characters on a CRT in order to address the problems of 10 higher resolution, reverse video screens and reduced flicker. As a result, the delay produced by gates in the video generation logic has become significant relative to dot width and present timing problems which cause video noise and thereby reduce the quality of the display. Where selectable attributes are also to be provided for displayed video characters (such as under- line, cursor, inverse video, strike-through, blank, etc.), the provision of a high display rate is made sig¬ nificantly more difficult because of added delays intro- duced by the attribute combinational logic required to logically combine character and attribute data, particu¬ larly where a relatively large number of possible at¬ tributes are provided. An example of a display employing conventional attribute combinational logic illustrated in U.S. Patent No. 4,504,828. SUMMARY OF THE PRESENT INVENTION It is a broad object of the present invention to provide improved means and methods for displaying characters. Another object of the invention is to provide improved means and methods for displaying characters with selectable attributes at high speed on a CRT. A more specific object of the invention is to provide improved means and methods for minimizing the added delay incurred when a selected attribute is incor¬ porated into a video dot stream. An additional object of the invention in accordance with the foregoing objects is to provide im¬ proved means and methods for displaying characters with selectable attributes at high speed even where a rela¬ tively large plurality of selectable attributes are pro¬ vided. A further object of the invention is to provide for the implementation of the foregoing objects in a relatively simple and economical manner. In a preferred embodiment of the invention, a specially chosen encoding is employed for the attribute * data, which encoding is performed concurrently with con- _c ventional character slice generation and serialization 5 operations. The resulting encoded attribute signals are applied to specially chosen attribute combinational logic for logical combination with corresponding serialized character slice signals. The attribute encoding and combinational logic are chosen so as to produce, with 10 relatively little added delay, a composite video dot signal containing both character and attribute data, thereby making it possible to display characters with selectable attributes on a CRT at high speed. The specific nature of the invention as well 15 as other objects, advantages and uses thereof will become evident from the following detailed description of a particular preferred embodiment taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS 20 FIG. 1 is an electrical block diagram illustrating a typical prior art embodiment for display¬ ing characters on a CRT with selectable attributes. FIG. 2 illustrates an example of a row of displayed characters which may typically be provided by 25 the prior art embodiment of FIG. 1 along with the associ¬ ated video dot signals corresponding thereto. FIG. 3 is an electrical block diagram illustrating a particular preferred embodiment of the invention for displaying characters with selectable at- * 30 tributes on a CRT at high speed. Like numerals and characters refer to like elements throughout the figures of the drawings. DESCRIPTION OF A PRIOR ART EMBODIMENT FIG. 1 generally illustrates how the prior art 5 typically provides for generating a video dot signal for displaying characters on a CRT with selectable at¬ tributes. The most common method in the prior art for generating characters on a CRT is to form each character 5.. from a matrix of dots. More specifically, during a con¬ ventional CRT raster scan, a character is formed by se¬ lectively turning on (lighting) particular dots in the matrix at appropriate times during a plurality of scan lines L0-L9 so as to produce a visual display of the 10 character at a desired location on the CRT. FIG. 2 il¬ lustrates, for example, a display of the characters A, P and T on a CRT by lighting particular dots of the charac¬ ter' s dot matrix. FIG. 2 also illustrates (below the display) the associated video dot signals S0-S9 respec- 1 tively provided when corresponding lines L0-L9 (slices) of the displayed characters are scanned. FIG. 2 further illustrates examples of typical attributes which may be provided for particular charac¬ ters. For example, the letter A is displayed without any 0 attributes, while the letter P is provided with an underline attribute, and the letter ' is displayed in inverse video (another type of common attribute). In a conventional display system as described above, provision must, of course, be made for providing 5 an appropriate video dot signal to the CRT in appropriate synchronism with CRT scanning so as to form the desired characters at appropriate locations on the CRT. Assuming that a conventional non-interlaced scan is employed for the CRT, it will be evident from FIG. 2 that each charac¬ 0 ter in a row is formed by the video dot signal on a slice-by-slice basis. More specifically, each row of characters is formed by first forming the top horizontal slice of each character in the row, then forming the next lower slice of character, and so on. Based on the foregoing, the operation of the prior art embodiment generally illustrated in FIG. 1 will now be readily understood. During scanning of the CRT, character generator 12 receives character data signals 10a identifying the characters to be displayed, the characters being provided in a sequence corresponding to the positioning of the characters on the CRT. The character generator 12 also receives scanning signals 10b indicative of CRT scanning, which is used by the charac- ter generator 12 for producing character slice signals 12a representing a corresponding character slice. The character data signals 10a and the scanning data signals 10b may be provided in various well known ways which need not be further described for the purposes of the present invention. As is well known, the character generator 12 may typically include a read-only memory (ROM) for se¬ quentially producing groups of parallel character slice signals 12a (one group for each character) in response to the character data signals 10a and scanning signals 10b. These character slice signals 12a produced by the charac¬ ter generator 12 in FIG. 1 are applied to a video serial- izer 16 which, in response to a dot clock CD, serializes each group of parallel character slice signals 12a so as to form a character slice video dot signal 16a having a dot pattern corresponding to the character slices to be displayed for the line being scanned (for example, see character slice video dot signal SI in FIG. 2 provided for the character slice corresponding to line Ll of each of the characters A, P and T) . As is well known, the dot clock CD is synchronized with CRT scanning and occurs at a rate corresponding to the spacing between columns of the character matrix. Such a dot clock CD is typically included as part of the scanning data 10b. If no attributes are to be provided for the displayed characters, the character slice video dot sig¬ nal 16a produced by the video serializer 16 in FIG. 2 would be applied directly to the CRT drive circuitry 22 in FIG. 1. However, where a capability for selecting an attribute is to be provided, attribute data must be logi¬ cally combined with the character slice video dot signals 16a. In the prior art embodiment shown in FIG. 1, this is accomplished by providing attribute data signals 10c to attribute combinational logic 18 at an appropriate time for logical combination with the corresponding char¬ acter slice video dot signal 16a produced at the output of the video serializer 16. However, the additional delay typically required in order to provide this logical combination of attribute and character slice video dot signals can prevent achieving a high character display rate, particularly where many types of attributes are to be provided. DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT OF THE PRESENT INVENTION FIG. 3 illustrates a preferred embodiment of the invention for displaying characters with selected attributes in a manner such that the time required for logically combining a selected attribute with a corre- sponding character video dot signal is significantly reduced, even where a relatively large number of selecta¬ ble attributes are provided. In the embodiment of FIG. 3 (similarly to the FIG. 1 embodiment), character data signals 10a identifying characters to be displayed a CRT are applied to character generator 12 along with scanning signals 10b for producing groups of parallel character slice signals 12a which are in turn applied to a video serializer 16 for producing character slice video dot signals 16a. Also, the character data signals 10a iden- tifying each character are accompanied by attribute data signals 10c identifying the attribute, if any, to be provided for each character. In the embodiment of FIG. 3, the attribute data signals 10c are applied to an attribute encoder 24 along with scanning signals 10b. The attribute encoder 24 operates in response to these inputs to produce a spe¬ cially chosen pair of attribute slice logic signals 24a and 24b having values determined by the attribute identi- fied by the input attribute data signals 10c and the CRT scanning line indicated by the input scanning signals IOC. Thus, in the FIG. 3 embodiment, for each group of character slice video dot signals 16a (corresponding to a character slice) produced at the output of the video serializer 16, the attribute encoder 24 will provide a pair of attribute slice logic signals 24a and 24b having predetermined values indicative of the attribute to be provided for each corresponding character slice. It will be understood that the encoder 24 may include a ROM for generating these attribute logic signals 24a and 24b in response to the attribute and scanning signals 10c and 10b. It has been discovered that most attributes can be encoded to just the pair of attribute logic slice signals 24a and 24b illustrated in the preferred embodi¬ ment of FIG. 3 and that, by proper choice of the char¬ acteristics of these attribute logic slice signals 14a and 14b, only two logical gating levels are required to logically combine these attribute logic slice signals 14a and 14b with the character slice video dot signals 16a produced by the video serializer 16 in order to pro¬ duce a resulting composite video dot signal which will display the character slice on the CRT with the selected attribute. For the particular preferred embodiment illustrated in FIG. 3, the characteristics of the pair of attribute logic slice signals 24a and 24b are chosen so that one functions as an inhibit signal 24a, and the other functions as an invert signal 24b. These inhibit and invert signals 24a and 24b, along with the character slice video dot signals 16a, are applied via a synchro¬ nizing latch 26 to combination logic which in the partic¬ ular preferred embodiment of FIG. 3 comprises just an AND gate 30 and an EXCLUSIVE OR Gate 40. The synchronizing latch 26 operates in a conventional manner to appropri¬ ately synchronize the signals 16a, 24a and 24b prior to their logical combination by AND gate 30 and EXCLUSIVE OR gate 40. More specifically, it will be seen in FIG. 3 that the synchronized character slice video dot signal 16a" is applied to one input of AND gate 30, while the synchronized inhibit signal 24a' is applied to an inverse input (indicated by the solid circle) of AND gate 30. Accordingly, the output 30a of gate 30 will be TRUE or HIGH only when the synchronize character slice video dot signal 16a' is TRUE or HIGH and the synchronized inhibit signal 24a' is FALSE or LOW. It will thus be understood that, for each matrix dot position, the AND gate output 30a will have the same logical level as the synchronized character slice video dot signal 16a' , except when the synchronized inhibit signal 24a' is TRUE or HIGH, in which case AND gate output 30a will be FALSE or LOW. As also shown in FIG. 3, AND gate output 30a is applied to EXCLUSIVE OR gate 40 along with the synchro¬ nized invert signal 24b' . Accordingly, the output 40a of EXCLUSIVE OR gate 40, which is the resulting video dot signal applied to the CRT drive circuitry 22, will be TRUE or HIGH only when AND gate output 30a and the syn¬ chronized invert signal 24b' are different. It should be evident from the foregoing that the particular attribute encoding and two-level attribute combinational logic employed in the preferred embodiment of FIG. 1 provides total control of the resulting video dot signal 40a since, by proper choice of the logical levels of the inhibit and invert signals 24a and 24b, it is possible to: (1) turn video off, (2) force video on, (3) invert video, and (4) pass video through unmodified. Furthermore, this control can be achieved with a high character display rate because: (1) the encoding time required by the attribute encoder 24 does not add any delay to the character display time since it is per¬ formed concurrently with the generation of the character slice video signal 16a which normally requires as much time as attribute encoding even where a large number of selectable attributes are provided and (2) the combina¬ tional logic required for incorporating a selectable attribute into the resultant video dot signal adds only a relatively small delay to the overall character display time since only a small number of logical gating levels are required, as exemplified by AND gate 30 and EXCLUSIVE OR gate 40 in FIG. 3. The fact that a selectable attribute (or no selected attribute) can be incorporated into the result- ing video dot signal by encoding each selected attribute into just the inhibit and invert signals 24a and 24b and then logically combining these inhibit and invert signals with the character slice dot signal using just the AND gate 30 and EXCLUSIVE OR gate 40 as illustrated in FIG. 3 will now be demonstrated for a number of common types of attributes. Example 1, No Selected Attribute When no attribute is to be provided for a displayed character (such as illustrated for the charac- ter A in FIG. 2), the encoding provided by the encoder 24 in FIG. 3 is such that the inhibit and invert signals 24a and 24b are both maintained LOW or F7ALSE for all charac¬ ter slices which causes the resulting video dot signal 40a to correspond to the character slice dot video signal " 16a. Example 2, Underline Attribute For an underline attribute (such as illustrated for the character P in FIG. 2), the encoding provided by the encoder 24 in FIG. 3 is such that the inhibit and 0 invert signals 24a and 24b are both maintained LOW or FALSE for all character slices (scan lines) of the char¬ acter matrix, except for the character slice correspond¬ ing to line L9 where the underline is to appear, for this character slice, both of the inhibit and invert signals 5 24a and 24b are caused to be TRUE or HIGH, whereby all matrix dots for this line are lighted, as illustrated for the portion of signal 59 corresponding to the character P in FIG. 2. Example 3, Inverse Video Attribute O For inverse video (such as illustrated for the character T in FIG. 2), the encoding provided by the encoder 24 in FIG. 3 is such that for character slices corresponding to scan lines L0-L9 in FIG. 2, the inhibit signal 24a is maintained FALSE or LOW for all character 5 slices, while the invert signal 24b is maintained TRUE or HIGH, whereby a resulting video dot signal 40a will be produced for each of these character slices which will be the inverse of the character slice video dot signal 16a, as illustrated by the portions of signals L0-L8 corre- 0 sponding to the character T in FIG. 2. For the character slice corresponding to scan line L9, both the inhibit and invert signals are caused to be FALSE or LOW so that the normal unlighted slice of line L9 is produced. Example 4, Blank Attribute For this attribute, a blank is provided regardless of the character. Accordingly, for all char¬ acter slices, the encoder 24 causes the inhibit signal 5 24a to be TRUE or HIGH and the invert signal 24b to be FALSE or LOW, which thereby results in no lighted dots being produced. From the foregoing examples, it will be evident how the encoder 24 in the embodiment of FIG. 3 can pro- 1.0 vide for encoding many types of attributes into appropri¬ ate logical combinations of the inhibit and invert sig¬ nals 24a and 24b. Although the embodiment illustrated in FIG. 3 is considered to be of particular advantage, it is to be understood that the invention is not limited to use 15 of the particular combinational gates 30 and 40 shown in 'the FIG. 3 embodiment, since other advantageous embodi¬ ments can be provided using the teachings provided here¬ in. Accordingly, the present invention is to be 20 considered as including all apparatus and methods coming within the scope of the invention as defined by the ap¬ pended claims.

Claims: What is claimed is: 1. In apparatus for displaying characters with selectable attributes, the combination comprising: char¬ acter generating means responsive to applied character data for producing a serialized char- acter slice dot signal having a dot pattern representative of a predetermined character slice of a character dot matrix comprised of a a plurality of slices; attribute encoding means responsive to applied attribute data and operable concurrently with said char¬ acter generating means for producing encoded attribute logic signals representative of a predetermined selectable attribute; timing means coupled to said character generating means and to said attribute encoding means for pro¬ viding a predetermined time relationship be¬ tween said character slice dot signal and said encoded attribute signals; and attribute combinational logic means to which said character slice dot signal and said encoded attribute logic signals are applied for produc¬ ing a resulting character slice dot signal representative of said predetermined character slice with said predetermined at- tribute; said attribute encoding means being chosen in conjunction with said attribute combinational logic means such that the delay introduced by said at¬ tribute combinational logic means in producing said resulting dot signal is relatively small relative to the overall time required by said character generating means to generate said character slice dot signal. 2. The invention in accordance with claim 1, wherein said character generating means and said at¬ tribute encoding means each includes a ROM. 3. The invention in accordance with claim 1, wherein said attribute combinational logic means requires no greater than two logical gating levels. 4. The invention in accordance with claim 3, wherein one of said gating levels comprises solely AND gate means and the other of said gating levels comprises solely EXCLUSIVE OR gate means. 5. The invention in accordance with claim 4, wherein said attribute logic signals comprise solely two attribute logic signals, one of which is applied to said AND gate means and the other to said EXCLUSIVE OR gate means. 6. .The invention in accordance with claim 5, wherein said character slice dot signal is applied to said AND gate means, wherein the output of said AND gate means is applied to said EXCLUSIVE OR gate means, and wherein said resulting dot signal is derived from the output of said EXCLUSIVE OR gate means. 7. The invention in accordance with claim 3, wherein the number and manner of application of said encoded attribute logic signals to said two logical gat¬ ing levels are chosen such that the values of said at- tribute logic signals are capable of selectively causing said character slice dot signal to be passed through said gating levels unmodified, inverted, forced on or turned off. 8. The invention in accordance with claim 7, wherein said character slice dot signal is applied to a first one of said two logical gating levels, wherein said first logical gating level is controllable in response to a first attribute logic signal applied thereto so as to provide for either passing or inhibiting said charac¬ ter slice dot signal, wherein the output of said first logical gating level is applied to the second one of said two logical gating levels, wherein said second logical gating level is controllable in response to a second attribute logic signal applied thereto so as to provide for either passing or inverting the output of said first logical gating level, and wherein said resulting dot signal is derived from the output of said second logical gating level. 9. The invention in accordance with claim 8, wherein said encoded attribute logic signals comprise solely said first and second attribute logic signals. 10. The invention in accordance with claim 7, wherein said apparatus includes a cathode ray tube and associated drive circuit means, wherein said resulting dot signal is applied to said drive circuit for display- ing each character slice on said cathode ray tube, and wherein said timing means provides an appropriate time relationship between said resulting dot signal and the scanning of said cathode ray tube so that each character slice is displayed by said cathode ray tube at a proper corresponding position. 11. In a character display system for displaying characters with selectable attributes, a method compris¬ ing the steps of: generating a serialized character slice dot signal having a dot pattern representative of a predetermined character slice of a character dot matrix com¬ prised of a plurality of slices; concurrently with the step of generating, encoding selectable attribute data into a plurality of encoded attribute logic signals having logical values chosen in accordance with a selected attribute; inhibiting or not inhibiting said character slice dot signal in response to at least one of said encoded attribute logical signals; and inverting or not inverting the character slice dot signal obtained as a result of the aforemen¬ tioned inhibiting or not inhibiting step in response to at least another one of said en¬ coded attribute logic signals to produce a resulting character slice dot signal represen¬ tative of said predetermined character slice with said selected attribute. 12. The invention in accordance with claim 11, wherein the step of inhibiting or not inhibiting is per¬ formed in one gating level and the step of inverting or not inverting is performed in another gating level. 13. The invention in accordance with claim 12, wherein said encoded attribute logic signals comprise only two encoded attribute logic signals, one of which is employed for the step of inhibiting or not inhibiting and the other is employed for the step of inverting or not inverting. 14. The invention in accordance with claim 13, wherein the step of inhibiting or not inhibiting compris¬ es ANDing said character slice dot signal with a one of said encoded attribute logic signals, and wherein the step of inverting or not inverting comprises EXCLUSIVE ORing the resulting character slice dot signals obtained from the step of inhibiting or not inhibiting with the other " of said encoded attribute logic signals. 15. The invention in accordance with claim 11, wherein said character display system is directed to displaying characters on a cathode ray tube, and wherein the steps of generating and encoding are performed in accordance with the scanning of said cathode ray tube so that character slices are displayed on said cathode ray tube at appropriate corresponding positions.

Inventors: BEZZANT DANIEL GLEN, REYNOLDS MARTIN CLIVE, BEZZANT, DANIEL, GLEN, REYNOLDS, MARTIN, CLIVE
Applicants: MEMOREX CORP, MEMOREX CORPORATION
Application year: 1986
Main classification: G09G1
IPC codes: G09G5