QUADRIPHASE PHASE MODULATION SYSTEM

Abstract: The quadriphase phase modulation system comprises a serial to parallel (S/P) converter (1) for converting serial input data into one-symbol two-bit parallel data, and a waveform generator (6) for generating waveform information corresponding to a bit pattern created by the current symbol of the S/P converter (1) and a symbol prior to this current symbol. A memory (4) stores a first waveform determined by the current symbol and the symbol prior to the current symbol and a second waveform determined by the current symbol. Then, the memory (4) supplies the waveform corresponding to the current symbol in response to the waveform information. A digital to analog converter (5) converts signals from this memory (4) into analog signals. This system is capable of generating phase modulation signals which are narrow in bandwidth without the need for a band-limiting filter.

Description: The present invention relates to a phase modulation system, and more particularly to a phase modulation system suitable for subscriber transmission. In base band digital transmission by way of a metallic medium, codes that can be regarded as phase modulation signals, such as the biphase codes (also known as the Walsh codes), are used by the prior art. Such phase modulation codes include quadriphase phase modulation (QPh) codes, which are also called the complex Walsh codes. The QPh codes, however, have a wide transmission signal band because of their use of square waves and consequently involve the problem of considerably obstructing other systems by crosstalk. Therefore, by the prior art, the square waveform is band-limited with a high-order low-pass filter, the use of which complicates the circuitry and thereby creates a new problem. WO-A-84/05002 discloses a data signal processing apparatus suitable for signal bit code conversion pre-equalisation comprising serial-parallel converting means, waveform memory means and digital to anolog converting means. The bit parallel output of the two-bit shift register allows the current and the previous bit states of the input signal to address the waveform memory means. US-A-4 339 724 relates to a filter comprising a logic circuit receiving an input data sequence and an output signal, a sine wave generator, cosine wave generator, positive D.C. generator and negative D.C. generator which are either connected to the output in response to outputs of the logic circuit. The logic circuit chooses, depending on the correlation between the input data sequence, different analog waveforms and switches them on and off at the filter output. FR-A-2 542 535 describes a synchronized digital data telephone transmission process. The process includes a transmission of binary data in groups of two in time periods of fixed duration T, called the Baud period (BP). The signal comprises a series of elements occupying a BP, taking one of four possible forms by being dephased by 0, π/2, π or 3π/2. One series consists of three consecutive transitions separated by a quarter BP, and isolated by at least another BP. Two successive series separated by a BP each consist of three transitions as above, and separated by more than a BP. The middle and final transitions are retained, and the transition following the two series is suppressed. An object of the present invention, therefore, is to provide a quadriphase phase modulation system capable of generating phase modulation signals which are narrow in bandwidth without having to use the aforementioned filter for the band-limiting purpose. This object is achieved by the features of claim 1. The above and other objects, features and advantages of the present invention will become apparent from the following detailed description when taken with the accompanying drawings in which: FIG. 1 is a diagram illustrating a quadriphase phase (QPh) modulation waveform of a square wave by the prior art; FIGS. 2 and 3 are diagrams illustrating QPh modulation waveforms for use in the invention; FIGS. 4 to 7 and FIGS. 8A to 8C are diagrams for describing the processes to obtain the waveforms for use in the invention; FIG. 9 is a diagram illustrating the connective relationship of waveforms for use in the invention; FIG. 10 is a table illustrating the relationship between bit patterns and waveforms; FIGS. 11 and 12 are block diagrams illustrating first and second embodiments of the invention; and FIG. 13 is a diagram illustrating the power spectra of a waveform for use in the invention and a waveform of the prior art. To ensure better understanding of the present invention, the conventional QPh code will be described first with reference to FIG. 1. Supposing that the bit rate of a binary code (0 or 1) to be transmitted is 2 f₀ (bits/s) and two bits each (whose combination may be 00, 01, 10 or 11) of this code sequence is one symbol, the symbol can take one of four values. One waveform or another in a time T second (= 1/f₀) is assigned to each of the four values as shown in FIG. 1, and sent out on a transmission line. In this case, the waveform is square, and the modulation speed is f₀ (baud). As stated above, however, such a QPh code has a wide signal bandwidth because of its use of square waves, and the use of a band-limiting filter to narrow the bandwidth would entail the problem of complicating the hardware. FIGS. 2 and 3 illustrate waveforms for use in a QPh modulation system of the invention cleared of the aforementioned disadvantage. The process of providing such waveforms will be described first. Each of the conventionally used square waves of FIG. 1 is divided into a first to fourth parts on the time axis, and each part of the square wave is transformed into a sine wave as shown in FIG. 4. To simplify the illustration, only waveforms of "00" and "01" are transformed into sine waves. Referring to FIG. 4 wherein the transformed waves are shown, even though sine waves are used, phase discontinuities emerge at the points marked with a circle in the drawing. Since such phase discontinuities eventually obstruct the narrowing of the signal bandwidth, further transformation of the waves is required. One of the conceivable ways of transformation is to reduce "two peaks" in each sine wave into "one peak" as illustrated in FIG. 5. In doing so, the differential coefficients of the first and second parts, the third and fourth parts, or the second and third parts are equal to each other at the connection point of the two parts. Also, the area of the former half wave is the same as that of the latter half wave to maintain the D.C. equilibrium. As an example of such a waveform, one represented by the following fourth order function, illustrated in FIG. 6, can be used. a = 15 / 4π - π / 8 , b = -2a + π / 2 , c = a - π / 2 Here the original sine wave is represented by: Even if the square waves of FIG. 1 are transformed into the shapes illustrated in FIG. 5, there will still emerge phase discontinuities between adjoining symbols. FIG. 7 shows how phase discontinuities occur between symbols at the points marked with a circle. Examination of the 16 (2⁴) kinds of waveforms made by pairs of adjoining symbols here reveals that phase discontinuities occur in eight combinations, identified by waveform numbers 0, 1, 6, 7, A, B, C and D of FIG. 3. The waveforms of FIG. 3 represent only the T/4 portions in the connections between adjoining symbols, and the waveform numbers are expressed hexadecimally. These eight kinds of phase discontinuity can be classified into three types as illustrated in FIGS. 8A to 8C. Thus, out of adjoining two symbols, the waveform from time 0 to time T/4 of the current symbol being regarded as a first connection waveform and that from time 0 to time -T/4 of the immediately preceding symbol, as a second connection waveform, both the first and second connection waveforms (dotted lines) shown in FIG. 8A are sinusoids. Further, in the waveform shown in FIG. 8B, the second connection waveform is a sinusoid, while the first is the former half of a sinusoid, and in the waveform shown in FIG. 8C, the first connection waveform is the former half of a sinusoid while the second is the latter half of a sinusoid. These waveforms of FIGS. 8A to 8C are transformed for phase-continuous connection of their respective first and second connection waveforms. These wave transformations are achieved by, within the range of |t| ≦ T/4 in the figures, making the waveforms continuous at t = ±T/4, the differential coefficients identical at t = ±T/4 and the areas of the waveform of -T/4 ≦ t ≦ 0 and that of 0 ≦ t ≦ T/4 equal (for D.C. balancing). The waveforms obtained by such transformations are represented by solid lines in FIGS. 8A to 8C. The transformed waveform of FIG. 8A is expressed in an equation of the fourth order coinciding with the aforementioned waveform P₀(t). That of FIG. 8B is represented by P₁ (t) = 0.646891 - 0.184676 ( 4t T ) + 0.292579 ( 4t T )² + 0.585157 ( 4t T )³ - 0.538988( 4t T )⁴ and that of FIG. 8C by P₂ (t) = 0.482818 + 0.616287( 4t T )² - 0.318144 ( 4t T )⁴ In this manner are obtained waveforms for smoothly connecting two consecutive symbols each (hereinafter called connection waveforms). Meanwhile, the parts (blank parts) of the waveform shown in FIG. 9 other than the connective parts (dotted parts) are determined by the particular value of each symbol. It is evident from the waveforms illustrated in FIG. 1 that these waveforms constitute those shown in FIG. 2. The waveforms of FIG. 2 are hereinafter considered the basic waveforms. Therefore, consecutive symbols can be represented by the four basic symbols (FIG. 2) determined by an individual symbol and 16 connection waveforms determined by pairs of consecutive symbols. FIG. 10 is a table listing the combinations of a basic waveform and a connection waveform determined by two consecutive symbols. Referring to FIG. 10, when the first and second symbols are "00" and "00" for instance, these two symbols are composed of the connection waveform of hexadecimal 0 and the basic waveform of hexadecimal A. Next, when symbol "01" is entered following "00" as third symbol, "00" and "01", according to this table, consist of the connection waveform or hexadecimal 1 and one basic waveform of hexadecimal F. FIG. 11 is a block diagram illustrating a first embodiment of the present invention for generating the aforementioned waveforms. Referring to FIG. 11, a serial to parallel (S/P) converter 1 converts two-bit series data 11 into two-bit parallel data 12. Herein, the parallel data constitute symbols. A waveform information generator 6 generates information for converting symbols into waveforms in response to the parallel data. The generator 6 consists of delay circuits 2 and 3, further comprising flipflops, for delaying the parallel data by one symbol period, and signal lines for directly outputting the parallel data from the S/P converter 1. The delayed and undelayed parallel data constitute four-bit patterns of FIG. 10, and are supplied as addresses to a ROM 4. The ROM 4 stores 16 waveforms, each consisting of a connecting waveform and a basic waveform corresponding to the outputs listed in FIG. 10, as digital values obtained by sampling these waveforms. The ROM 4 outputs one of the waveform data in response to an address of a four-bit pattern. A D/A converter 5 converts digital waveforms into analog waveforms. Fig. 12 shows a block diagram of a second embodiment of the present invention. In the first embodiment of FIG. 11, the memory 4 requires a larger memory capacity because it stores 16 waveforms each of which are generated during T seconds and consists of a basic waveform and a connection waveform. To reduce the memory capacity, a memory 40 used in the second embodiment stores only 16 connection waveforms each of which is generated during T / 2 seconds and is used for generation of both the connection and basic waveforms. The waveform information generator 6 comprises two half-symbol delay circuits 13 and 14 and inverters 15 and 16. The inverters 15 and 16 are used to produce exact addresses for basic waveforms. More specifically, the memory 40 requires addresses "1010", "1111", "0000" and "0101" to produce the basic waveform numbers A, F, 0 and 5 shown in Fig. 2 by using the connection waveforms as shown in Fig. 10. However, when the basic waveforms of the symbols "00", "01", "10" and "11" are generated, since the input symbol is the same as the T / 2 - delayed symbol as shown in Fig. 9, wrong addresses "0000", "0101", "1010" and "1111" are produced for the symbols "00", "01", "10" and "11", respectively. The comparison of the wrong address with the correct address, for example, "1010" with "0000" shows that the first and third digits are different from each other. Therefore, the inverters 15 and 16 are necessary to invert the first and third digits to produce a correct address when the basic waveforms are generated. The memory 40 alternately produces the basic and connection waveforms in response to the addresses supplied from the generator 6. FIG. 13 is a diagram for explaining how the aforementioned modulated signals are narrowed in bandwidth, wherein the theoretical values of the power spectra of the conventional QPh code (or the complex Welsh code) and the code generated according to the present invention are shown together. The solid lines represent the characteristic of the present invention and the dotted lines, that of the prior art. As is evident from the characteristics, the power spectrum of the code of the invention are significantly suppressed in a frequency range of above 2 f₀, especially above 4 f₀. As hitherto described, the present invention can virtually dispense with a low-pass filter (of a high order) for the band-limiting purpose on the transmitting side, and accordingly has the advantage of permitting substantial simplification of the circuitry composed for digital processing.

Claims: A quadriphase phase modulation system, comprising: serial to parallel converter means (11), means (6) for generating waveform information in response to an output of said serial to parallel converter means (11), memory means (4, 40) for storing waveforms and a digital to analog converter means (5) for converting an output of said memory means into analog signals, characterized in that said serial to parallel converter means (11) converts first symbols, each comprised of two-bit serial data, into second symbols comprised of two-bit parallel data; and said memory means (4, 40) stores basic waveforms and connecting waveforms, said connecting waveforms being designed to smooth connections between and eliminate phase discontinuity at junctions of adjoining symbols, and for reading out said basic waveforms and said connecting waveforms in response to said waveform information, each said basic waveform being selected on the basis of the most recently generated waveform information, and said connecting waveform being selected on the basis of said most recently generated waveform information and the immediately preceding waveform information. A quadriphase modulation system as claimed in claim 1, wherein said memory means (4, 40) stores a plurality of connecting waveforms and basic waveforms, and reads out a combination of one of said basic waveforms and one of said connecting waveforms selected so that said converted subsections become continous and identical in differential coefficient and have identical DC components. A quadriphase phase modulation system, as claimed in Claim 1, wherein said memory means stores (4,40), out of first to fourth transformed waveforms obtained by converting the original square waves corresponding to first to fourth subsections, resulting from the division of first and second adjoining symbols by four each, into sine waves, said fourth and first transformed waveforms in said first and second symbols as said first waveform and, when said fourth and first transformed waveforms have no phase-continuity, storing as said first waveform a waveform obtained by so transforming said fourth and first transformed waveforms that these waveforms become continuous and identical in differential coefficient and have identical D.C. components. A quadriphase phase modulation system as claimed in any one of Claims 1 to 3, wherein said symbol prior to the current symbol is a symbol prior to the current symbol by one symbol time. A quadriphase phase modulation system as claimed in any one of Claims 1 to 3, wherein said symbol prior to the current symbol is a symbol prior to the current symbol by one half symbol time.

Inventors: SHIN'ICHI, KOIKE C/O NEC CORPORATION
Applicants: NEC CORPORATION
Application year: 1986
Main classification: H04L25
IPC codes: H04L25, H03M5, H04L27