Resonant-tunneling transistor

Abstract: A resonant-tunneling heterojunction bipolar transistor (RHBT) device, having a superlattice structure and a PN jun­ ction, includes an emitter layer (17), a base layer (14), a collec­ tor layer (13) operatively facing the base layer to form a PN junction at the face between the base layer and the collector layer, and a superlattice structure (16) including at least one quantum well defining a sub-band of energy at which carriers resonant-tunnel therethrough, formed at least in the emitter layer and operatively facing the base layer. The RHBT has differential negative resistance char­ acteristics for realizing a variety of logic circuits and includes an electron resonance and a positive hole resonance, for which the generation condition is changeable in response to a mole fraction of material of the emitter layer. Such an RHBT, unlike a prior RHET, can be made to op­ erate satisfactorily at normal ambient temperatures with adequate current gain.

Description: The present invention relates to a resonant-tunneling transistor. The resonant-tunneling phenomenon has been long known, and recently, due to advances in semiconductor processing technology, such a molecular beam epitaxy (MBE) and metal organic chemical vapour deposition (MOCVD), practical resonant-tunneling hot electron transistors (RHETs) have been realised. The article entitled "A NEW FUNCTIONAL, RESONANT-TUNNELING HOT ELECTRON TRANSISTOR (RHET)" (N. Yokoyama, et al, Japanese Journal of Applied Physics, Vol. 24, No. 11, November, 1985, pp. L853 - L854) discloses a RHET including an emitter layer, a collector layer, a base layer located between the said emitter and collector layers, and a superlattice structure located between, and having respective surfaces in contact with, the said emitter and base layers. The superlattice structure provides a quantum well in which there is a resonant-state energy level (sub-band) that is higher or equal to or lower than the lowest energy level of a conduction band of the emitter layer in dependence upon the magnitude of a bias voltage applied between the emitter and base layers when the device is in use, and is higher than the lowest energy level of a conduction band of the base layer when the lowest energy level of the conduction band of the emitter layer is equal to the resonant-state energy level. A RHET has negative differential resistance characteristics, and accordingly can be used for ternary logic circuits with a high speed, a compact circuit arrangement, and a large margin, etc., such as tristable gate circuits or a tristate memory cell. However, the known RHET suffers from the disadvantages of a poor current gain and the impossibility of operation at normal room temperature, due to the existence of a collector barrier, between the base and collector layers, for providing tolerance against the reverse voltage. The above disadvantages will be described later in detail with reference to specific examples. In addition, another type of resonant-tunnelling transistor including a superlattice structure in a base, is known (e.g., "Resonant tunnelling transistor with quantum well base and high-energy injection: A new negative differential resistance device; F. Capasso, et al, J. Appl. Phys. 58 (3), August 1985, pp. 1366-1368). However, in this resonant-tunnelling transistor, electrons from the emitter must be ballistically launched at the base and pass into a narrow sub-band in the superlattice structure. According to a first aspect of the present invention, there is provided a resonant-tunnelling heterojunction transistor device as defined in claim 1. According to a second aspect of the present invention, there is provided a resonant-tunnelling heterojunction transistor device as defined in claim 2. Such a resonant-tunneling heterojunction bipolar transistor (RHBT) has an improved current gain, as compared to the above-described RHET, and can operate stably at normal ambient temperature. An n-p-n transistor device, or conversely a p-n-p transistor device, embodying the present invention can be formed. The resonance may include a resonance of electrons and a resonance of positive holes, and the generation condition of the electron resonance and the positive hole resonance is changed in response to a mole fraction of the material in the emitter layer. The resonant-tunneling heterojunction bipolar transistor device (RHBT) may have a base negative differential resistance (NDR) characteristic with at least one resonant point in a relationship between a current flowing in said base layer and the bias voltage between the base and emitter layers, and having at least two stable base current values at both sides of the resonant point on the characteristic, defined by the said bias voltage. The NDR characteristic can be utilised in a variety of logic circuits. One such logic circuit includes a resonant tunneling heterojunction bipolar transistor device; a current source ohmic-connected to the base layer of the transistor device and supplying a constant current to the base layer; a load circuit ohmic-connected to the collector layer of the transistor device; and an output circuit operatively connected to a commonly-connected point of the load circuit and the collector layer, for outputting a voltage defined by a change of current flowing through the collector layer, which voltage is varied in response to the two stable base current values. The resonant-tunneling heterojunction bipolar transistor device may also have a collector differential negative-resistance characteristic with at least one resonant point in a relationship between a current flowing in the collector layer and the said bias voltage, and having at least two stable collector current values at both sides of the resonant point on the characteristic, defined by the said bias voltage. This NDR can be used for a variety of logic circuits. One such logic circuit includes the resonant-tunneling heterojunction bipolar transistor device; at least two input resistors operatively connected to the base layer of the transistor device; and an output resistor operatively connected to the collector layer of the transistor device. Reference will now be made, by way of example, to the accompanying drawings, in which: Figs. 1a and 1b show respective views of the structure and energy state of a known resonant-tunneling transistor; Figs. 2a to 2c are graphs illustrating an energy state of the transistor shown in Fig. 1a; Fig. 3 is a graph of the negative differential resistance characteristics of the device of Fig. 1a; Fig. 4 shows a sectional view of a semi-conductor wafer of a resonant-tunnelling heterojunction bipolar transistor device of an embodiment of the present invention; Fig. 5 shows a sectional view of a semifinished transistor device of Fig. 4; Fig. 6 is a graph illustrating a profile of the composition of part of the device shown in Fig. 5; Figs. 7 and 8 are graphs illustrating energy states of the device shown in Fig. 5; Figs. 9 to 11 are graphs illustrating the characteristics of the device shown in Fig. 5; Fig. 12 is a graph indicating the resonance characteristics; Fig. 13 is a circuit diagram of circuitry using the RHBT of an embodiment of the present invention; Figs. 14 is a curve representing the operational characteristics of the circuitry shown in Fig. 13; Fig. 15a to 15c are timing charts representing the operation of the circuitry shown in Fig. 13; Fig. 16 is a circuit diagram of further circuitry including the RHBT shown in Figure 5; Fig. 17 is a sectional view of a semi-finished RHBT of another embodiment in accordance with the present invention; and Fig. 18 is a graph illustrating an energy state of the RHBT shown in Fig. 17. Before describing the preferred embodiments of the present invention, a description will be given of a resonant-tunneling hot electron transistor (RHET). Figure 1a is a sectional view of a semifinished RHET device, and Fig. 1b is a graph of an energy band of the RHET device in Fig. 1a. In Fig. 1a, the resonant-tunneling transistor device consists of a collector electrode 8, an n + -type GaAs collector layer 1, formed on the collector electrode 8, a non-doped impurity Al y Ga 1-y As (e.g. y = 0.3) collector side potential barrier layer 2 on the collector layer 1, an n + -type GaAs base layer 3, on the potential barrier layer 2, a superlattice layer 4, an n + - type GaAs emitter layer 5, an emitter electrode 6, and a base electrode 7. The superlattice layer 4 consists of an Al x Ga 1-x As barrier layer 4A 1 , a non-doped impurity GaAs quantum well layer 4B, and an Al x Ga 1-x As barrier layer 4A 2 . The superlattice layer 4 functions as an emitter side potential barrier. In this specification, the superlattice is defined such that at least one quantum well is provided therein. In Fig. 1a, a plurality of quantum wells may be formed. In Fig. 1b, reference E C represents a bottom of a conduction-energy band, and E X an energy level of a sub-band at the quantum well. With reference to Figs. 2a to 2c, the principle of the operation of the resonant-tunneling transistor device will be described. Figure 2a is a graph of an energy band of the RHET device when a voltage V BE between the base layer 3 and the emitter layer 5 is lower than 2·E X /q, wherein q represents the charge of the carriers, or is too low, for example, approximately zero volt. In Fig. 2a, although a voltage V CE exists between the collector layer 1 and the emitter layer 5, electrons at the emitter layer 5 cannot reach the base layer 3 by tunneling through the superlattice layer 4, since the base emitter voltage V BE is almost zero, and thus a level of an energy E FE , namely a quasi-Fermi level, of the emitter layer 5 differs from the energy level E X at the sub-band. Accordingly, a current does not flow between the emitter layer 5 and the collector layer 1. Reference  C represents a conduction-band discontinuity. Figure 2b is a graph of an energy band of the RHET device when the base·emitter voltage V BE is approximately equal to 2·E X /q. In Fig. 2b, the energy level E FE at the emitter layer 5 is substantially equal to the energy level E X of the sub-band at the quantum well layer 4B. As a result, due to a resonant-tunneling effect, electrons at the emitter layer 5 are passed through the superlattice layer 4 and injected into the base layer 3. The potential energy of the injected electrons, for example, 0.3 eV, is converted into kinetic energy, bringing the electrons to a so-called "hot" state. The hot electrons are ballistically passed through the base layer 3 and reach the collector layer 1. As a result, a current flows between the emitter layer 5 and the collector layer 1. Figure 2c is a graph of an energy band of the RHET device when the base·emitter voltage V BE is higher than 2·E X /q. In Fig. 2c, the energy level E FE at the emitter layer 5 is higher than the energy level E X of the sub-band at the quantum well layer 4B. The resonant-tunneling effect does not occur, and the electrons introduced from the emitter layer 5 to the base layer 3 do not exist. Consequently, the current flowing into the RHET device is reduced. On the other hand, by decreasing the barrier height of the barrier layer 4A 1 adjacent to the base layer 3 to a suitable value, the electrons may be directly tunneled through the barrier layer 4A 2 adjacent to the emitter layer 5. As a result, a certain amount of collector current may flow. Figure 3 is a graph representing the characteristics of the RHET device set forth above. In Fig. 3, the abscissa indicates the base·emitter voltage V BE and the ordinate indicates the collector current I C , Curves C 1 to C 4 represent the characteristics when the collector· emitter voltage V CE is respectively 2.5 V, 2.0 V, 1.5 V, and 1.0 V. The curves also indicate n-shaped differential negative-resistance (NDR) characteristics. By using this feature, a variety of circuits, such as ternary logic circuits, can be realized. The above RHET device is composed of the hetero-junctioned n-type emitter, n-type base and n-type collector, and therefore, the collector potential barrier must be provided between the base and the collector to give the tolerance to the voltage, i.e. the insulation. Because of the collector potential barrier, the RHET device suffers from troublesome defects. Namely, a low current gain existing because most of the electrons, which are emitted from the emitter layer to the superlattice layer, resonant-tunneled thereat, and injected to the base in a hot state, are affected by a phonon scattering, e.g., an optical phonon scattering,an intervalley scattering, in the base layer, and accordingly, they can not go over the collector potential barrier. On the other hand, to provide sufficient isolation, the collector potential barrier must be thick and high. At normal ambient (room) temperature, the height of the collector potential barrier is low. In addition, when the collector potential barrier is low, considerable thermionic emission may occur, and thus the RHET device may not perform as a normal transistor. If the collector potential barrier is high, electrons can not always reach the collector, resulting in a low current gain. In order to overcome this defect, an energy of the electrons must be raised, but this is subject to an intervalley scattering, also resulting in a low current gain. As a result, the RHET device can not be substantially operated in a normal ambient temperature and must be super-cooled by, for example, liquid nitrogen. Now, preferred embodiments of the present invention will be described. Figure 4 is a sectional view of a semiconductor wafer of a resonant-tunneling heterojunction bipolar transistor (RHBT) of an embodiment of the present invention; Fig. 5 is a sectional view of a semifinished RHBT device of Fig. 4; and Fig. 6 is a graph illustrating a profile of the AlAs composition of the RHBT device shown in Fig. 5. In Figs. 4 and 5, the RHBT consists of a substrate 11 made of GaAs and having a semi-isolation property, an n + -type collector contact layer 12 of GaAs, an n-type collector layer 13 of GaAs, a p + -type base layer 14 of GaAs, a barrier layer 15A of Al y Ga 1-y As, a quantum well layer 16 of GaAs, a barrier layer 15B of Al y Ga 1-y As, an n-type emitter layer 17 of Al x Ga 1-x As, and an n -type emitter contact layer 18 of GaAs. The RHBT is provided with an emitter electrode 19 ohmic-connected to the emitter layer 18, base electrodes 20 ohmic-connected to the base layer 14, and collector electrodes 21 ohmic-connected to the collector layer 13. The parameter of the above elements are as follows: (1) Collector contact layer 12 thickness : 200 nm (2000 Å) impurity density : 5 x 10 24 /m 3 (5 x 10 18 /cm 3 ) (2) Collector contact layer 13 thickness : 300 nm (3000 Å) impurity density : 1 x 10 23 /m 3 (1 x 10 17 /cm 3 ) (3) base layer 14 thickness : 100 nm (1000 Å) impurity density : 5 x 10 24 /m 3 (5 x 10 18 /cm 3 ) (4) barrier layers 15A and 15B thickness : 5 nm (50 Å) y : 0.3 (5) quantum well layer 16 thickness : 5 nm (50 Å) (6) emitter layer 17 thickness : 300 nm (3000 Å) impurity density : 1 x 10 23 /m 3 (1 x 10 17 /cm 3 ) x : 0.37 (7) emitter contact layer 18 thickness : 200 to 300 nm (2000 to 3000 Å) impurity density : 6 x 10 24 /m 3 (6 x 10 18 /cm 3 ) (8) emitter electrode 19 a. material : Au·Ge thickness : 30 nm (300 Å) b. material : Au thickness : 300 nm (3000 Å) (9) base electrode 20 a. material : Cr thickness : 30 nm (300 Å) b. material : Au thickness : 300 nm (3000 Å) (10) Collector electrode 21 a. material : Au·Ge thickness : 30 nm (300 Å) b. material : Au thickness : 300 nm (3000 Å) The AlAs mole fraction x of the emitter layer 17 is 0.37, and the AlAs mole fraction near the emitter layer side 17 of the quantum well layer 16 is graded from 0.37 to 0.14. Accordingly, the energy of the conduction band edge of the emitter side 17 of the quantum well layer 16 is substantially equal to the resonant energy level. This superlattice structure was grown successively on the n + -type GaAs substrate at 580°C by MBE. Figure 7 is a graph representing the energy band of the RHBT when the bias voltage V BE is lower than 2·E X /q or substantially zero. Figure 8 is an enlarged graph representing an energy band of the RHBT. In the drawings E X represents an energy level of a sub-band at the quantum well layer 16; q represents charges; E FE represents a quasi Fermi level; E X a sub-band energy; E C a bottom of a conduction energy band; and, E V an upper end of a valence (or filled) band. As is apparent from Figs. 4 and 5, the RHBT includes the superlattice structure providing the resonant-tunneling effect between the base layer 14 and the emitter layer, and a PN junction formed by the p-type base layer 14 and the n-type collector layer 13. On the other hand, there is no potential barrier between the base and the collector, as shown in Figs. 2a to 2c. The PN junction between the base layer 14 and the collector layer 13 has sufficient isolation for carriers, and thus functions as an isolation layer instead of the potential barrier in the resonant-hot electron transistor device. When the bias voltage V BE is supplied, electrons in the emitter layer 17 are resonant-tunneled in the superlattice structure at the sub-band energy E X , and injected into the base layer 14. Since there is no potential barrier, the injected electrons can almost reach the collector layer 13. As a result, high current gains can be realized. In addition, the RHBT has the small leakage current characteristics of the base-collector PN junction thereof, enabling the RHBT to be used at room temperature because excited thermionic electrons do not surmount the base-collector potential barrier, and thus the thermionic current is small. The characteristics of the RHBT in Fig. 5 are shown in Figs. 9 to 11. Figure 9 is a graph representing the base-emitter I-V characteristics measured at 77°K with the collector open. A negative differential resistance (NDR) region exists at approximately the base-emitter voltage V BE of 1.7 V. Figure 10 is a graph representing the characteristics of the collector current and the base-emitter voltage V BE . The collector current as a function of the base-emitter voltage V BE exhibits a peak corresponding to the resonant-tunneling of the electrons. The peak-to-valley ratio is approximately 1.8 at 77°K, and 2.4 at 5°K. Figure 11 is a graph illustrating the collector current and the collector and emitter voltage (I C - V CE ) characteristics at 77°K, in a common-emitter configuration, with the base current I B as a parameter. Note that there is an abrupt decrease in the collector current when the base current I B increases from 30 µA to 40 µA. This indicates that the RHBT has a negative current gain. The current gain h fe is typically observed to be 15 in the regular region, i.e. the positive current gain region, and the maximum current gain is 20. These values are far higher than those of the RHET. The NDR characteristic of the RHBT can be applied to form a variety of circuits, in the same way as the RHET. In addition, the electron resonance and the hole resonance can be adjusted in response to the AlAs mole fraction x of the emitter layers 17 of Al x Ga 1-x As, as shown in Fig. 6, by changing the bias voltage. Aluminium (Al) contributes to the generation of the electric field in the emitter layer, and accordingly, the AlAs mole fraction x varies the height of the emitter layers. Examples of this feature are given as follows: (a) When the fraction x of Al x Ga 1-x As is 0.0, i.e. GaAs, the hole resonance and the electron resonance are simultaneously made to rise. This type of the RHBT can be used for a light emitting element. (b) When the fraction x is 0.14, i.e. Al 0.14 Ga 0.86 As, the electron resonance rises, and thereafter, the hole resonance rises, in response to the increase in the bias voltage. As shown in Fig. 12, the electron resonance is raised by the resonant-tunneling of electrons at a low sub-band energy. On the other hand, the hole resonance is raised by the resonant-tunneling of holes at a high sub-band energy. At the electron current resonance, the collector current resonance occurs, and at the hole resonance, the base current resonance occurs. The base current resonance has n-shaped NDR characteristics. (c) When the fraction x is 0.2, i.e., Al 0.2 Ga 0.8 As, the hole resonance rises, and thereafter, the electron resonance rises. This phenomenon is the reverse of that of the above case (b). At the hole resonance, the base current resonance occurs, and at the electron resonance, the collector current resonance occurs. The collector current resonance has the n-shaped negative differential resistance characteristics as set forth above. An example of the application of the RHBT of a type (b) described above and having a base current n-shaped NDR characteristics will be described below. Figure 13 is a circuit diagram of a semiconductor memory cell 100. The memory cell 100 includes-a RHBT 111, a current source resistor 112, a load resistor 113, and a transfer transistor 114 having a gate connected to a word line WL and a source connected to a bit line BL. A base of the RHBT 111 is supplied with a positive voltage V CC1 through the resistor 112. The resistor 112 functions as a constant current source provided between the base and the emitter of the RHBT 111. The collector of the RHBT 111 is supplied with a positive voltage V CC2 through the resistor 113. The resistor 113 acts as a load, i.e., a dropping resistor. Figure 14 is a view illustrating the characteristics of the memory cell shown in Fig. 13. In Fig. 14, the abscissa represents the base·emitter voltage V BE , and the ordinate represents the base current I B . A curve CL indicates the NDR characteristic of the RHBT 111. The characteristic curve CL has an n-shaped negative-differential characteristic of the base·emitter voltage V BE and the base current I B . A first summit point RP in the curve CL represents a resonant-tunneling point. A line LL in the figure indicates a load line defined by the voltage V CC1 supplied to the base of the RHBT 111 and a resistance value of the load resistor 113. The resistance value defines a gradient of the load line LL. The voltage V CC1 defines an intersection CR intersecting the load line LL and the abscissa. The load line LL must be determined such that the line LL intersects a first positive slope line of the characteristic curve CL at a point A and a second positive slope line at a point B, to define bistable states of the memory cell at the points A and B. The graph in Fig. 7 represents an energy state at the point A in Fig. 14. The sub-band energy level E X at the quantum well layer 16 in Fig. 8 is higher than the energy level E FE at the emitter layer 17. In both states at points A and B, a certain amount of electrons can reach the base layer 3 and the collector layer 1 from the emitter layer 5, and consequently, currents corresponding to the above electrons can flow therein. Here, the resistance value R B of the current resistor 112 is 1.5 KΩ, the resistance value R L of the load resistor 113 is 10 KΩ, the voltage V CC1 of the constant current source is 1 V, and the voltage V CC2 of the load is 1 V. The operation of the semiconductor memory cell in Fig. 13 will be described with reference to Figs. 15a, 15b, and 15c. In the drawings, the abscissas indicate an elapse of time. Figure 15a is a graph of the voltage change V BL of the bit line BL; Fig. 15b is a graph of the voltage change B WL of the word line WL; and Fig. 15c is a graph of the voltage change V N at a node N forming a common connection point for the collector of the RHBT 111, the load resistor 113, and a collector of the transfer transistor 114. As set forth above, the resistor 112 functions as the current source, and thus the current source 112 outputs a constant voltage between the base and the emitter of the RHBT 111. Conversely, a voltage V CE between the collector and the emitter of the RHBT 111 may be varied by supplying a varying voltage to the bit line BL at each time of word line WL selections, as shown in Figs. 15a and 15b. By varying the potential at the collector of the RHBT 111, the base current I B of the RHBT 111 flows in or out, resulting in a change in the base voltage. Accordingly, the bistable state may be controlled and used for a memory function. Referring back to Figs. 15a to 15c, during a time t 1 , the bit line BL is supplied with the voltage V BL of 0.5 V and the word line WL is supplied with the voltage V WL of 1.0 V. The transfer transistor 114 is turned ON by a high level of the voltage V WL , and the voltage V N at the node N is brought to approximately 0.4 V. During a time t 2 , the bit line BL is supplied with the voltage V BL of zero volt and the word line WL is supplied with the voltage V WL of 1.0 V, and the transfer transistor 114 is turned ON by the high level of the voltage V WL . Since, however, the voltage V BL of the bit line BL is zero volt, the voltage V N at the node N is approximately 0.1 V. The above memory cell includes an RHBT latch circuit. Accordingly, it should be understood that a latch circuit using an RHBT also can be easily realized according to the present invention. In the RHBT, positive holes can be resonant-tunneled, and this resonant-tunneling of the holes causes the negative differential resistance in a base current. Another example of the application of the RHBT of the type (c) described above and having collector current n-shaped NDR characteristics will be described below. Figure 16 is a circuit diagram of an Exclusive-NOR logic circuit having the RHBT device and three resistors. The resistances are 1 k ohm for the load and 50 ohms for the wired-or resistor. DC offset voltages of 0.35 V are applied to the input A and B. Note that output C is high only for A=B, indicating that the circuit has an Exclusive-NOR logic function. The small logic swing of 50 mV is due to increased valley current and increased peak voltage. The Exclusive-NOR function is widely used to build adders and parity detectors/generators. Considering that several switching FETs or bipolar transistors are required to build Exclusive-OR logic, the RHBT shows great promise for use in very high-speed, high-density integrated circuits. Referring again to Figs. 4 and 5, other materials can be applied to the respective layers, and some examples of these materials are shown as follows: (a) base layer 14 (InGa)As, (InAlGa)As (b) emitter layer 17 (InAlGa)As, (InGa)As (c) collector layer 13 (InGa)As (d) barrier layers 15A and 15B AlAs, (InAl)As, InP (e) substrate 11 InP Another embodiment of the RHBT is described with reference to Figs. 17 and 18. Figure 17 is a sectional view of another semifinished RHBT, and corresponds to Fig. 5. Compared with the RHBT in Fig. 5, in the RHBT in Fig. 17 the barrier layer 15B is removed from the RHBT in Fig. 5. Other elements are substantially equal to those in Fig. 5. Figure 18 is a graph illustrating an energy state of the RHBT in Fig. 17 and corresponds to Figs. 7 and 8. The modifications and the principle set forth above can be applied to the RHBT in Fig. 17. In the above description, the RHBT 111 has only one sub-band energy level E X . Nevertheless, the RHBT 111 may have a plurality of sub-band energy levels, and in this case, a characteristic curve may have a plurality of resonant-point peaks and a plurality of valleys. A plurality of memory cell states can be realized by using a RHBT, and accordingly, a multi-level memory cell can be realized. In addition, the RHBT 111 may have a plurality of quantum wells. In the above embodiments, the superlattice structure including the quantum well and functioning as a resonant carrier injector to the base can be formed between the emitter layer and the base layer, as set forth above, or in the emitter layer. In addition, a resonant-tunneling heterojunction transistor device having a p-n-p structure can be achieved instead of the above n-p-n RHBT device.

Claims: A resonant-tunnelling heterojunction transistor device comprising:- an emitter layer (17); a collector layer (13); a base layer (14) located between the said emitter and collector layers (17, 13); and a superlattice structure (15A, 16, 15B; 15, 16) located between the said emitter and base layers (17, 14), which superlattice structure (15A, 16, 15B; 15, 16) is formed so as to provide at least one quantum well through which resonant-tunnelling of carriers occurs when a bias voltage (V BE ) applied between the said emitter and base layers (17, 14) is such that a sub-band energy level E X of the quantum well is substantially equal to a quasi-Fermi level E FE of the emitter layer (17), the device being adapted such that when the magnitude of the said bias voltage (V BE ) is less than 2E X /q, where q is the charge of the carriers, E X is greater than E FE , when the magnitude of the said bias voltage (V BE ) is approximately equal to 2E X /q, E X is equal to E FE , and when the magnitude of the said bias voltage (V BE ) is greater than 2E X /q, E X is less than E FE , whereby the flow of carriers between the said emitter and base layers (17, 14) exhibits a peak when the said bias voltage (V BE ) is approximately equal to 2E X /q; wherein the said device is a bipolar transistor device in which the said base layer (14) is formed of semiconductor material of one conductivity type and the said collector layer (13) is formed of a layer of semiconductor material of the opposite conductivity type, the said base layer (14) and the said collector layer (13) having a common interface whereby a PN junction is formed therebetween. A resonant-tunnelling heterojunction transistor device comprising:- an emitter layer (17); a collector layer (13); a base layer (14) located between the said emitter and collector layers (17, 13); and a superlattice structure (15A, 16, 15B; 15, 16) located in said emitter layer (14), which superlattice structure (15A, 16, 15B; 15, 16) is formed so as to provide at least one quantum well through which resonant-tunnelling of carriers occurs when a bias voltage (V BE ) between the said emitter and base layers (17, 14) is such that a sub-band energy level E X of the quantum well is substantially equal to a quasi-Fermi level E FE of the emitter layer (17), the device being adapted such that when the magnitude of the said bias voltage (V BE ) is less than 2E X /q, where q is the charge of the carriers, E X is greater than E FE , when the magnitude of the said bias voltage (V BE ) is approximately equal to 2E X /q, E X is equal to E FE , and when the magnitude of the said bias voltage (V BE ) is greater than 2E X /q, E X is less than E FE , whereby the flow of carriers between the said emitter and base layers (17, 14) exhibits a peak when the said bias voltage (V BE ) is approximately equal to 2E X /q; wherein the said device is a bipolar transistor device in which the said base layer (14) is formed of semiconductor material of one conductivity type and the said emitter and collector layers (17, 13) are formed respectively of semiconductor material of the opposite conductivity type, and the said base layer (14) and the collector layer (13) having a common interface whereby a PN junction is formed therebetween. A device as claimed in claim 1 or 2, including an emitter layer designed such that both electrons and positive holes resonant-tunnel through said quantum well and a generation condition of the electron resonance and the positive hole resonance is dependent upon the concentration of a component of the material which is to form the emitter layer (17). A device as claimed in claim 3, where said material comprises aluminium. A device as claimed in any preceding claim, wherein said emitter layer (17) comprises an n-type semiconductor material, said base layer (14) comprises a p-type semiconductor material, and said collector layer (13) comprises an n-type semiconductor material. A device as claimed in any one of claims 1 to 4, wherein said emitter layer (17) comprises a p-type semiconductor material, said base layer (14) comprises an n-type semiconductor material, and said collector layer (13) comprises a p-type semiconductor material. Logic circuitry comprising: a resonant-tunnelling heterojunction transistor device as claimed in any preceding claim; current source means (112), ohmic-connected to said base layer (140) of the said transistor device, for supplying a constant current to said base layer (14); load means (113) ohmic-connected to said collector layer (13) of the transistor device; and output means (114), operatively connected to a commonly-connected point (N) of said load means (113) and said collector layer (13), for outputting a voltage defined by a change of a current flowing through said collector layer (13); the circuitry being adapted such that a collector current flows in said collector layer (13) in response to said bias voltage exhibiting a differential negative resistance characteristic having a resonant peak and at least one local minimum of said collector current; and said voltage output from the output means (114) is varied in response to said two stable bias current values. Logic circuitry comprising: a resonant-tunnelling heterojunction transistor device as claimed in any one of claims 1 to 6; at least two input resistors operatively connected to said base layer (14) of the transistor device; and an output resistor operatively connected to said collector layer (13) of the transistor device; the circuitry being adapted such that a collector current flows in said collector layer (13) in response to said bias voltage exhibiting a differential negative resistance characteristic having a resonant peak and at least one local minimum of said collector current.

Inventors: IMAMURA KENICHI, YOKOYAMA NAOKI, IMAMURA, KENICHI, YOKOYAMA, NAOKI
Applicants: FUJITSU LTD, FUJITSU LIMITED
Application year: 1986
Main classification: H01L29
IPC codes: H01L29, H01L21