CAPACITANCE BRIDGE

Abstract: A capacitor Ch sensing bridge BR is driven by a square wave, and drives an amplifier A1 and integrator A2-C4. A switch SW1 provides feedback from the integrator to a balancing branch R6-R7 of the bridge, and a switch SW2 provides feedback around A2, both switches being closd when the top of the bridge is -ve (odd half-cycles). On odd half-cycles, SW2 forces the junction of Ch and C2 to approximately equal a reference (mid-point) voltage on C3, and the net input to A2-C4 is nil. On the next even half-cycle, the square wave drive to the bridge reverses, and any unbalance between Ch and C2 results in an output from A1 which slowly drives the integrator output to change. (Switch SW2 also compensates for offset in A1.) On the next odd half-cycle, the change from A2-C4 is fed back to the bridge to shift the top and bottom voltages to the Ch-C2 branch (which has its middle forced to the reference voltage). On the next even half-cycle, the preceding shift of bridge voltages reduces the size of the change from the Ch-C2 junction. The bridge thus stabilizes at a new balance condition. The capacitor Ch is sensitive to humidity, and a temperature sensitive resistor makes the bridge output indicate enthalpy.

Description: The present invention is concerned with capacitance bridges in which the change of capacitance of a capacitor is measured, and is particularly though not exclusively concerned with enthalpy measuring circuits, which are responsive to both humidity (as measured by a humidity-responsive capacitor) and temperature. Capacitance monitoring by measuring bridges is well known. However, such circuits are affected by any instability in the power supply and any temperature-responsive variation in the circuit components. The object of the present invention is to provide an improved capacitance measuring bridge. Accordingly the present invention provides a capacitor sensing circuit comprising: a bridge with a capacitive branch containing the variable capacitor and a reference capacitor and with resistive branch means; a balanced square wave drive means for the bridge; and an amplifier fed from the capacitive branch and a reference voltage, characterized by: an integrator fed from the amplifier; a first feedback switch from the amplifier output to the capacitive branch; and a second feedback switch from the output of the integrator to the resistive branch; both switches being controlled by the square wave. An enthalpy measuring bridge circuit embodying the invention will now be described, by way of example, with reference to the drawing, which is a circuit diagram. A signal generator GEN comprises three inverters (NOT gates) I1 to I3, two resistors R1 and R2, and a capacitor C1 arranged as shown, to produce a 1:1 ratio square wave of 12 V at 1 kHz. This is fed through an inverter I4, and two inverters I5 and I6, as shown, to provide two complementary square waves as shown. These are fed through resistors R3 and R4 respectively to drive the bottom and top lines respectively of a bridge circuit BR. The bridge circuit BR has four branches. The first branch is a resistive branch with an adjustable tapped resistor R5 for null balance and calibration. The second branch is a resistive balancing branch with two resistors R6 and R7, used for a feedback signal. The third branch is a resistive temperature sensing branch, with a resistor R8 and a temperature sensitive resistor such as a thermistor Rt. The fourth branch is a capacitive humidity sensing branch, with a capacitor C2 and a humidity sensitive capacitor Ch of polyimide type, for example. The midpoint of the capacitive branch is connected to the -­ input of an amplifier A1; the midpoints of the first branch (R5) and the temperature sensing branch are connected together and to a capacitor C3 to earth and to the + input of amplifier A1. The voltage on this capacitor C2 can be regarded as a smoothed reference voltage of approximately half the pulse voltage from generator GEN; the tapping on resistor R5 can be adjusted to provide a null for the desired conditions of the sensing elements Rt and Ch, at the output of amplifier A1. A second amplifier A2 has its - input fed, via a resistor R9, with the output of amplifier A1 and a feedback capacitor C4, so that it acts as an integrator, with a response which is slow compared to the generator GEN frequency. The + input of amplifier A2 is fed from the reference capacitor C2 via a resistor R10. The output of amplifier A2 is a smoothed DC voltage indicative of enthalpy, as measured by the humidity and temperature sensing elements Ch and Rt. To improve the operation of the circuit as described so far, there are two conventional solid state switches SW1 and SW2. These are controlled by the pulse voltage from inverter I5 to close when the output of I5 is positiive. Switch SW1 provides feedback for the bridge BR by connecting the integrator A2-C4 output to the bridge balancing branch R6-R7. The second switch SW2 connects the output of amplifier A1 back to its - input. The pulsed supply to the bridge BR results in the bridge being driven with a 12 V alternating square wave, with the voltage across it being positive at the top for say even halfcycles and negative at the top for odd halfcycles. The switches SW1 and SW2 are closed on the odd (negative at top, positive at bottom) cycles. Suppose that the two capacitors Ch and C2 are of equal value, and the circuit is in a steady state. The reference voltage on capacitor C3 is approximately equal to half the drive voltage, 6 V, and the output of the integrator A2-C4 is also approximately equal to half the drive voltage, 6 V. The approximations are because the inputs to the amplifier A2 must be slightly different, to produce an output of 6 V, so that the output of amplifier A1 must be approximately 6 V, and the two inputs to amplifier A1 must also be slightly different, to produce the requisite output. The balance points in all four branches of the bridge are at approximately 6 V. On the odd half-cycles, the top of the bridge is driven by 12 V and the bottom by 0 V; on the even half-cycles, the top of the bridge is driven by 0 V and the bottom by 12 V. As a general matter, it must also be noted that on the odd half-cycles, switches SW1 and SW2 are closed, and the conditions in the bridge are determined by the outputs from the two amplifiers A1 and A2; the bridge output (from branches R8-Rt and Ch-C2) has no effect. On the even half-cycles, however, the switches SW1 and SW2 are open, and the conditions in the bridge are determined by the drive from the generator GEN, the reference voltage on capacitor C3, and the voltage which was imposed on the junction of Ch and C2. Consider now the function of the switch SW2. During an odd half-cycle, this switch is closed. Since the output impedance of amplifier A1 is low, the output of A1 is determined solely by the voltage on C3, and the - input to A1 is driven to approximately equal the voltage on C3 (with a difference which, when amplified by A1, makes the output of A1 equal to its - input and so almost equal to its + input). This voltage is thus placed on the junction between the capacitors Ch and C2. This voltage includes any offset voltage which the amplifier A1 produces. Thus on the next (even) half-cycle, the offset voltage is presented to A1 along with any bridge unbalance, and the bridge unbalance is accurately amplified with compensation for the offset voltage. The amplifier A1 also, on the odd half-cycles, feeds a voltage to the inregrator A2-C4 which is approximately equal to the voltage on the reference capacitor C3. So the change in the integrator output during this odd half-cycle is negligible. That is, the integrator output changes only on the even half-cycles. In the balanced condition, we thus have the junction of Ch and C2 held at 6 V on the odd half-cycles, with the top of the bridge positive and the bottom negative relative to this 6 V. On the even half-cycles, the square wave drive to the bridge reverses. Since the changes at the top and bottom of the bridge are equal and opposite, and capacitors Ch and C2 are equal, the voltage at their junction will thus not change. Suppose now that the capacitance of Ch increases. The Ch-C2 junction will still be forced to 6 V (i.e. approx the voltage on C3) on the odd half-cycles. But on the even half-cycles, the voltage at this point will rise. The charge flowing through the Ch-C2 branch of the bridge on the reversal of the drive voltage produces a larger change in the voltage across the smaller capacitor, C2, than across the larger capacitor, Ch, because C2 is smaller than Ch. Thus the voltage at the Ch-C2 junction tends to follow the top of the bridge. This rise at the Ch-C2 junction produces a fall at the output of A1 and a rise at the output of the integrator A2-C4. Over the long term, this will produce a steadily rising output. However, the feedback switch SW1 limits this rise. On the odd half-cycles, the increasing voltage from the integrator is fed back to the bridge BR, via the branch R6-R7, and tends to pull the voltages in the bridge up. Since, on the odd half-cycles, the junction of Ch and C2 is forced to approximately the reference voltage of 6 V, this means that the voltage across Ch on the odd half-cycles will decrease from 6 V (because the top of the bridge is pulled up from the balanced level) and the voltage across C2 will increase from 6 V (because the voltage on the bottom of the bridge will also be pulled up). It will be realized that although the bridge has been discussed as if it were driven by a 12 V square wave, the actual voltages on the top and bottom of the bridge will be somewhat above 0 V and somewhat below 12 V because the true 0 V and 12 V values from inverters I4 and I6 are diminished by the voltage divider effect of the resistor chains R4-R6 and R3-R7 to the output of A2. The result of this is that when the change from an odd half-cycle to an even half-cycle occurs, the rising voltage change at the top of the bridge will be less than for the balanced condition, and the falling voltage change at the bottom of the bridge will be greater. The change in the voltage at the Ch-C2 junction will therefore be reduced. In consequence, the input to the integrator A2-C4 will be reduced, and the integrator output will rise less rapidly. There is thus a negative feedback around the system from the bridge, through the amplifier A1 and the integrator A2, and back through switch SW1 to the bridge, and this negative feedback operates to re-establish an equilibrium condition after the bridge becomes unbalanced by a change in humidity and the capacitance of sensor Ch. A change in temperature will change the resistance of Rt, and hence the reference voltage on capacitor C3. This will unbalance the circuit, and a rebalancing to equilibrium conditions will occur in the same manner as if the humidity had changed. Thus the circuit output represents enthalpy, a combination of temperature and humidity.

Claims: 1. A capacitor sensing circuit comprising: a bridge (BR) with a capacitive branch (Ch, C2) containing the variable capacitor (Ch) and a reference capacitor (C2) and with resistive branch means (R5-R8, Rt); a balanced square wave drive means (GEN, I4-I6) for the bridge; and an amplifier (A1) fed from the capacitive branch and a reference voltage, characterized by: an integrator (A2-C4) fed from the amplifier; a first feedback switch (SW2) from the amplifier (A1) output to the capacitive branch (Ch-C2); and a second feedback switch (SW1) from the output of the integrator (A2-C4) to the resistive branch (R6-R7); both switches being controlled by the square wave. 2. A circuit according to Claim 1, characterized in that the variable capacitor is responsive to humidity and the resistive branch means includes a resistor sensitive to temperature, whereby the circuit measures enthalpy. 3. A circuit according to either previous claim, characterized in that the reference voltage is derived from the resistive branch means.

Inventors: KOMPELIEN, ARLON D.
Applicants: HONEYWELL INC.
Application year: 1986
Main classification: G01R17
IPC codes: G01N25, G01R27, G01N27