INTEGRATED CIRCUITS

Abstract: An integrated circuit includes a monitor circuit (1, 3) designed to fail prior to the rest of the integrated circuit whilst allowing the rest of the integrated circuit to function. A warning circuit provides an indication that the monitor circuit (1, 3) has failed.

Description: Integrated Circuits This invention relates to integrated circuits. In recent years there has been a tendency towards large scale integrated circuits. Such large scale integrated circuits reduce the margins for in- service variations of the parameters of the individual components within the circuits, before failure of the circuit. Such failures may occur, for example due to electromigration in conductive tracks within the circuits causing open or short circuits of the tracks this occurring when excessive current passes through a conductive track. Small changes in cross-sectional areas of the tracks may also drastically reduce the time to failure of the circuit. Another example of a possible variation leading to failure of the circuit is that of threshold voltage instabilities, for example MOS devices within the circuit due to ion diffusion in the gate oxide, hot carrier trapping, or the effects of ionising radiation. Whilst in systems made up of a large number of smaller integrated circuits, the smaller integrated circuits can be easily tested and replaced, this is more difficult in systems made up of one or more large scale integrated circuits. It is an object of the present invention to provide an integrated circuit wherein this problem is alleviated. According to the present invention there is provided an integrated circuit including a monitor circuit designed to fail prior to the rest of the integrated circuit whilst allowing the rest of the integrated circuit to function, and means for providing an indication of when the monitor circuit has failed. In one particular integrated circuit in accordance with the invention, the monitor circuit includes a conductive pattern and means for providing current through the pattern such that the current density through the pattern is greater than for the rest of the integrated circuit. Such a monitor circuit finds application monitoring possible failures of conductive portions within the integrated circuit due to electromigration. In such a particular integrated circuit, the means for providing an indication provides the indication when an open circuit has occurred in the pattern. Alternatively the means for providing an indication provides the indicat¬ ion when a short circuit has occurred between the pattern and an adjacent conductor. In another particular integrated circuit in accordance with the invention, the monitor circuit comprises a field effect device, means for electrically stressing the device, and means for comparing the threshold voltage of the device to a reference voltage. Such a monitor circuit finds application in monitoring possible variations of threshold voltages in field effect devices. Two integrated circuits in accordance with the invention will now be described, by way of example only, with reference to the accompanying drawings in which Figure 1 is a schematic diagram of a monitor circuit incorporated in the first integrated circuit, Figure 2 is a schematic diagram of a monitor circuit incorporated in the second integrated circuit with the monitor circuit's switches in a first configuration and Figure 3 shows the monitor circuit of Figure 2 with its switches in a second configuration. Referring firstly to Figure 1 , the monitor circuit incorporated in the first integrated circuit to be described is designed to monitor possible failure of metallic tracks within the integrated circuit due to electromigration. The monitor circuit comprises a metallic test pattern in the form of a stripe indicated as 1 connected in series with a resistor 3 across two supply rails 5, 7. The test pattern is formed on the integrated circuit at the same time as the other conductive tracks within the circuit such that variations in track thickness due to processing variations will be reflected in the stripe 1. The value of the resistor 3 is chosen such that in operation of the integrated circuit incorporating the monitor circuit, the current density through the stripe 1 is greater than the value usually regarded as a maximum rating for a metallisation pattern within the integrated circuit. Partially surrounding the stripe 1 is a U- shaped conductive track 9 spaced from the stripe 1 by a distance equivalent to the minimum recommended line spacing in the integrated circuit. The track 9 is connected to the supply rail 7 by a resistor 11 having a somewhat greater value of resistance than that of the resistor 3. In operation of the integrated circuit, the voltages V1 of a point between the stripe 1 and resitor 3, and V2 of a point on the conductive track 5 each measured with respect to earth are continuously monitored. As the resistance of the stripe will be much less than the resistance of the resistor 3, the voltage V1 will remain close to that of the rail 5 until an open circuit in the stripe 1 , due to for example -H- electromigration, occurs, in which case the voltage V1 will become close to that of the rail 7. A warning circuit (not shown) will normally be either connected to or incorporated in the integrated circuit which is responsive to the voltage V1 to provide a warning when the monitored voltage V1 indicates that an open circuit has occurred In the stripe 1 , this then providing an early warning that the integrated circuit is likely to fail before the integrated circuit actually fails which may, in some circumstances be catastrophic. Appropriate action can then be taken such as total removal of the integrated circuit from the system in which it is incorporated where high reliability is required. The warning circuit will also be responsive to the voltage V2 which normally will be zero, but will approach the value of the voltage on the rail 5 in the event that electromigration causes the stripe 1 to become electrically connected to the track 9. It will be appreciated that the test pattern may take many forms in order to simulate possible failure modes, e.g. it may include steps over under¬ lying polysilicon lines, or border contact holes. It will also be appreciated that a monitoring circuit designed to be responsive to possible failure through elctromigration of metallic tracks need, in some circumstances, .be only responsive to open circuits or short circuits in the test stripe. Referring now to Figure 2 the second integrated circuit to be described includes a monitor circuit designed to monitor possible threshold voltage instabilities in MOS transistors within the integrated circuit. A monitor transistor 21 is connected as shown in this figure across two supply rails 23, 25, the gate of the transistor 21 being connected to the rail 23 via a moveable contact and a fixed contact of a two position switch 27, and the drain of the transistor being connected to the rail 23 via a biassing resistor 29, with the other fixed contact of the switch 27 being connected to a point 30 between the drain and the resistor 29. A series arrangement of two similarly valued resistors 31, 33 are also connected across the rails 23, 25. A fixed contact of a second two way switch 35 is connected to a point between the junction of the two resistors 31, 33, the moveable contact of the switch being connected to one electrode of a capacitor 37, the other fixed contact of the switch 35 being connected to the point 30 between the drain of the transistor 21 and the resistor 29. The second electrode of the capacitor 37 is connected to the gate electrodes of one n channel 39 and one p channel 41 MOS transistors, the drain of the n channel transistor 39, being connected to the rail 25, the source of the p channel transistor 41 being connected to the rail 23, and the remaining source and drain being connected together. The second electrode of the capacitor is also connected via a switch 43, shown closed in Figure 2 to the conductor connecting the source of the transistor 39 and the drain of the transistor 41, the voltage V3 being monitored at this point. The switches 27, 35 and 43 all consist of transmission gate circuits clocked synchronously. In operation of the integrated circuit, for about 90% of the time, the switches are set in the positions shown in Figure 2. The gate of the monitor transistor 21 is thus directly connected to the rail 23 so as to provide a maximum gate bias. The output voltage V3 will be approximately half the potential difference across the rails 23, 25 i.e. V RE as indicated in the figure, the capacitor 37 charging up to this voltage. On switching to the switch positions shown in Figure 3, the gate of the monitor transistor 21 is connected to the drain which will settle to around the threshold voltage V τ 0 f the transistor, assuming the resistor 29 is of sufficiently high value. The voltage applied to the capacitor 37 will thus increase by V_--V_, p _- as switch 35 is switched to the position shown in Figure 3, and switch 43 is opened. If V-, is greater than V-.-.-. then only transistor 41 will be conductive, and the voltage V3 will be that of the line 25. If however V-_ is less than V-.-,-., then only transistor 39 will be conductive, and the voltage V3 will be that of the line 23. A warning circuit (not shown) may then use the value of V3 to give a warning signal if the threshold voltage V τ is less than -,_---. It will be appreciated that the value of V-.„ p is readily settable by choice of the relative values of the resistors 31, 33- It will also be appreciated that generally at least four monitoring circuits for monitoring potential threshold voltage Instabilities will be incorporated in an integrated circuit In accordance with the invention, so as to detect changes in n-channel threshold voltages with respect to a minimum and a maximum value, and changes in p-channel threshold voltages with respect to a minimum and a maximum value. It will be appreciated that whilst the monitoring circuits described herebefore by way of example monitor possible failures due to electro- migration, or variation of threshold voltages, integrated circuits in accordance with the invention incorporating monitoring circuits in accordance with the invention incorporating monitoring circuits for monitoring many other variations in parameters likely to lead to circuit failure are also possible.

Claims: CLAIMS 1. An integrated circuit characterised in that it includes a monitor circuit (1, 3, 9, 11) designed to fail prior to the rest of the integrated circuit whilst allowing the rest of the integrated circuit to function, and means for providing an indication that the monitor circuit (1, 3, 9, 11) has failed. 2. An integrated circuit according to Claim 1 in which the monitor circuit (1, 3, 9, 11) includes a conductive pattern (1) arranged such that the current density through the pattern (1) is greater than for the rest of the integrated circuit. 3. An integrated circuit according to Claim 2 in which the means for providing an indication provides the indication when an open circuit has occurred on the pattern ( 1 ) . 4. An integrated circuit according to Claim 2 in which the means for providing an indication provides the indication when a short circuit has occurred be¬ tween the pattern (1) and an adjacent conductor (9). 5. An integrated circuit according to Claim 1 in which the monitor circuit comprises a field effect device (21), means (30) for electrically stressing the device (21), and means for comparing the threshold voltage of the device to a reference voltage ( v ref )-

Inventors: MCCAUGHAN DANIEL VINCENT, PITT MICHAEL GEOFFREY, MCCAUGHAN, DANIEL, VINCENT, PITT, MICHAEL, GEOFFREY
Applicants: GEN ELECTRIC CO PLC, THE GENERAL ELECTRIC COMPANY, P.L.C.
Application year: 1986
Main classification: G01R31
IPC codes: G01R31, G06F11, H01L21, H01L23, H01L27, H01L29, H03K17