METHOD AND SYSTEM FOR IMAGE PROCESSING

Abstract: For an area fill technique, a digital image in a digital storage is defined by contour lines (e.g. P6-P7) that have an even number of intersections with each horizontal line in a digital storage; for this purpose, horizontal parts in the contour line are ignored, as well as the start points of contour line segments (e.g.P5) that are generated from vector data. Furthermore picture elements (pixels) of contour lines are written by an exclusive OR operation into their corresponding storage location. The area fill operation proceeds then line by line to start writing in filling characters at an odd pixel and ending at the next even pixel. Filling is preferrably performed by exclusive-ORing adjacent storage locations during the line scanning process.

Description: This invention relates to an image processing method and system for generating an area-filled or painted image that is reproduced by an image reproducing device such as an image display unit with a CRT or an image printer with a print head, and more particularly to an image processing method and system suitable for displaying an area filled image on a raster type CRT display. Area-fill or painting is one of basic image processing functions in an image processing system, and various techniques have been proposed. The most basic technique is to use software for specifying areas to be filled one by one for each pixel line in a random access memory so as to fill pixels in the specified area. However, the area fill by software requires long processing time. United States Patent No. 4,189,743 discloses an area fill technique in which any one point in a closed contour line region written in a random access memory is selected as a seed point, the area fill being performed first by filling a pixel line passing through the seed point in the range of the contour line, then by filling a pixel line adjacent to the pixel line, and by repeating such procedure, which requires very complicated procedure. Japanese Examined Patent Publication No. 40179/79 discloses a technique for displaying an area filled image in which a contour line pattern is written with some contour line dots selectively omitted so that each pixel line in a refresh memory includes even number of contour line dots. As the pixel lines are read in synchronism with the CRT raster scanning, the video signal to the CRT is turned on at odd numbered contour line dots and turned off at even numbered contour line dots. However, the drawbacks of this patent are that distortion of the filled image due to omitted dots is noticeable, that processable images are limited, and that an image cannot be processed in the refresh memory. The patent does not disclose the use of oriented vector data, and end point process and area fill by exclusive OR of this invention. Therefore, the object of the present invention is to provide a method and a system for image processing that can generate in high speed and easily a complicated, area filled image based on vector data representing a series of line segments constituting the contour of the image. In accordance with the present invention, there is now provided an image processing method for filling interior areas of a digitized image that is stored in a digital storage and defined by its contour lines, comprising the steps of: generating contour line segments from vector data such that each contour line segment comprises only one picture element (pixel) per horizontal line; start pixels of a contour line segment are not written; contour line pixels are written into their corresponding storage locations as an Exclusive Or function of the contour line pixels and any corresponding pixel data stored at the corresponding storage locations; all contour line segments are processed from bottom to top or vice versa and generating fill characters lby scanning the storage horizontal line by horizontal line, starting at odd pixels of a contour line and ending at the next even pixel belonging to a contour line. Preferably, an image processing system for carrying out a method of the present invention comprises a raster scan display device, an associated digital storage, and means for scanning the storage horizontal line by horizontal line to generate fill characters between an odd pixel of a contour line and the next even pixel belonging to a contour line; characterized in that the system further comprises means to generate contour line segment pixels in the storage from vector data provided by a microprocessor; means responsive to the generating means for suppressing the start pixel of each contour line segment and maintaining only one pixel per contour line segment and per horizontal line; means for writing contour line pixels into their corresponding storage locations as an Exclusive Or function of the contour line pixels and any pixel data stored at the corresponding storage locations means for ensuring a top and bottom processing of all contour line segments. The present invention generates the contour lines according to predetermined rules and stores them in a random access memory. The contour lines are specified as a series of line segments or vectors, but horizontal line segments are not used. Each of the line segments are not used. Each of the line segments except horizontal ones is specified in one direction from top to bottom or from bottom to top and converted into approximate pixels. Each line segment is represented on a one pixel per horizontal line basis, but its start point is not written. Each of the pixels is written in a random access memory by exclusive OR with pixel data read from a corresponding coordinate address of the random access memory. Thus, an even number of contour line pixels exist in each horizontal line in the random access memory, so that any complicated image can be easily and quickly area filled by the odd-even inversion writing method. An embodiment of the invention is now described in detail with reference to the accompanying drawings, in which: Figure 1 shows an embodiment of the invention; Figure 2 shows area fill operation when using a closed contour line; Figure 3 shows area fill operation according to the invention; Figure 4 shows approximate pixel dots; Figure 5 shows a fill address generator circuit; Figure 6 shows a fill circuit; and Figure 7 shows an example of area filled image. First, description is made on the outline of area fill technique according to the present invention and rules for process used therein. Figure 2 shows pixel dots of a closed contour line written in a random access memory that stores pixel data of two-dimensional image in a corresponding two-dimensional plane XY. It is assumed that the contour line pixels are scanned for each horizontal pixel line, and area fill is carried out by the odd-even inversion writing method wherein dots from an odd numbered contour line pixel to the next even numbered pixel are set on. If an odd number of contour line pixels exist on a pixel line, the problem arises that areas not to be filled (such as ℓ1, ℓ2, ℓ3 and ℓ4 in Figure 2) are filled, while areas to be filled (such as broken line portion of the line ℓ3) is not filled. As shown in Figure 3 (A), the present invention writes the contour lines in a random access memory in such a manner that each pixel line always contains an even number of contour line pixels and therefore can be easily area filled by the odd-even inversion writing method. In Figure 3, "X" indicates a contour line pixel that is not written. According to the present invention, the contour lines constituting an image are represented by a series of line segments or vectors. The line segments are converted into approximate pixel dots based on coordinate data indicating the start and end points of each line segment, which are then stored in the random access memory. The present invention uses the following five rules for writing contour line pixels as in Figure 3. Rule 1: Do not write horizontal line segments. Rule 2: Represent each line segment on a one pixel per horizontal line basis. Rule 3: Do not write the start point of each line segment. Rule 4: Write the contour line pixel by taking exclusive OR with the pixel data that is stored at a memory address into which the pixel is intended to be written. Rule 5: Specify each line segment in one direction from top to bottom or from bottom to top. Rule 1 is for preventing odd number of contour line pixels from occurring on one line due to the contour line pixels contained in a horizontal contour line portion, such as pixels P1 - P2 on the line ℓ2 of Figure 2. Since many horizontal lines are used in usual image processing, omission of horizontal line segments also contributes to increase of speed of the area fill process. Rule 2 is for representing the contour in one pixel per line regardless of the angle of the line segment. For example, in case of Figure 4 where approximate dots are generated for a line segment having the start point S and the end point E and making an angle of less than 45° to the horizontal line, a plurality of dots are generated for one line. In such case, dots d1 and d2 first generated are used as the contour line dots, but second dots d3 and d4 are not written. Rule 3 is for eliminating an upward or downward apex. If the line segments are specified in one direction, for example, from top to bottom according to Rule 5, Rule 3 eliminates the contour line pixels P5 and P10 that are the upward apexes in Figure 2. Rules 4 and 5 eliminate the contour line pixel at an apex with opposite direction to that of apex processed by Rule 3 (in this example, P7). Now, description is made of the procedure for writing the contour line pixel pattern in Figure 3(A). The contour in Figure 3 is specified by six line segments. Assuming that the line segments are specified in the direction from top to bottom, they are represented by P5 → P3, P5 → P6, P6 → P7, P10 → P7, P10 → P12, and P1 → P15. Pixels P1 - P2, P13 and P14 for horizontal line segments are ignored. For the line segment P5 → P3, the pixel P5 for the start point is not written, but the following pixels are written to the end pixel P3. The write is performed by writing the exclusive OR of the pixel data to be written and pixel data read from the memory address into which the former data is to be written. Assuming that the contour line pixel is represented by binary 1 and the memory readout data is binary 0, the contour line pixel data will be written as it is. Similarly, for the line segment P5 → P6, the start point P5 is not written, but remaining pixels are set to binary 1. For the line segment P6 → P7, although the start point P6 is not written, P6 has already been written for the segment P5 → P6. Pixels including the end point P7 following the start point P6 are written by the exclusive OR. For the segment P10 → P7, the start point P10 is not written, but the following pixels are written. Since the end point P7 is binary 1 as a result of writing of the segment P6 → P7, the exclusive OR writing of the end point P7 restores it to binary 0, and eliminates the downward apex P7 from the contour line. Similarly, the contour line dots of the segments P10 → P12, and P1 → P15 are written. After completion of writing of the contour line pixels, each line in the memory is scanned, and fill operation is performed such that the memory dots from an odd numbered contour line pixel to the next occurring even numbered contour line pixel are filled with binary 1. In this case, for reason described hereinafter, it is preferable to make the even numbered contour line pixels binary 0. The write is preferably performed by reading the pixel data for each line from the memory, by taking exclusive OR of each pixel and the immediately preceding pixel on the same line, and by writing the result. Therefore, as shown in Figure 3 (B), binary 0 pixels following the odd numbered contour line pixels are set to binary 1. Although the pixel P10 was eliminated in writing the contour line, it is set to binary 1 at the stage of fill operation. The pixels P13 and P14 that were initially ignored are also filled. The pixels P1 - P2, P5 and P7 that were initially eliminated are removed from the area filled image. It should be noted here that all of even numbered contour line pixels on each line P3, P4, P8, P9 and P15 - P16 are removed as a result of the fill operation with the exclusive OR. Therefore, distortion of the resultant image is minimized as compared with the approach in the above-mentioned Japanese Examined Patent Publication No. 40179/79 wherein the apex dots are simply omitted. Also, elimination of even numbered contour line pixels provides an advantage that adjacent images are easily generated. This will be described hereinafter. Figure 1 shows an embodiment of the invention applied to a raster scanning type CRT graphic display system. A microprocessor 10 is connected to a refresh memory 50 through an address line 12 and a data line 14, which refresh memory is then connected to a raster scanning type CRT display 70. The refresh memory 50 is a random access memory that has storage cells corresponding to pixel dots of the display 70. The display system also includes a contour line writing/ area fill controller 20, a line segment-pixel dot converter 30, and a work memory 60 that is used for storing an area filled image. Although the embodiment generates an area filled image in the work memory 60, which is in turn written in the refresh memory 50 for displaying, it may be possible to directly write an area filled image in the refresh memory 50. However, it is preferable to use a separate work memory 60 because control becomes very complicate if the refresh memory has any image data. Particularly, use of the work memory is advantageous when image manipulation is performed on the refresh memory. Of course, the refresh memory 50 and the work memory 60 are not necessarily to be physically separated, but may be separate regions on a single memory. The work memory 60 is, similar to the refresh memory, a random access memory that has storage cells corresponding to pixel dots of two-dimensional image displayed on the display 70. According to the above-mentioned procedure, an area filled image is formed in the work memory 60 by writing the contour line pixels in the work memory, and then by setting the storage cells in the region defined by the contour to binary 1. In operation, as described in connection with Figure 3, the microprocessor 10 supplies sequentially coordinate addresses for the start and end points of a series of line segments that constitute the contour of an image to be area filled. The process is performed one segment at a time. Each segment is converted into approximate pixel dots by the line segment - pixel dot converter 30. In the embodiment, the converter operates under Bresenham's algorithm. The Bresenham's algorithm is well known as disclosed in "Algorithm for Computer Control of a Digital Computer," in "IBM System Journal," vol. 4, no. 1, 1965, pp. 25 -30. In short, the algorithm generates approximate points by defining as the major axis the larger one of differences (ΔX and ΔY) between X coordinates and between Y coordinates for the start and end points of a vector and as the minor axis the smaller one, and by selecting whether or not the coordinate value for the minor axis is to be stepped by one coordinate value (+1 or -1) each time the value for the major axis is stepped by one coordinate value (+1 or -1) from the start point to the end point. The microprocessor 10 loads the coordinate values for the major axis start point, the major axis end point, and the minor axis start point of a line segment to be converted in registers 31, 32, and 33 of the converter 30, respectively. Also, the microprocessor 10 sets a signal indicating whether the major axis of the line segment is X or Y, in a register 22 of the controller 20. This depends on the angle of the line segment. Furthermore, the microprocessor 10 sets signals in registers 23 and 24 which indicate whether the coordinate values for the major and minor axes should be incremented or decremented when going from the start point to the end point of the line segment. In the example shown in Figure 4, the major axis = X, the major axis-decrement and the minor axis-increment are set. A signal indicating the mode of contour line writing is also set in a register 25. If ΔX = ΔY, it is sufficient to specify either X or Y as the major axis. The major axis start point in the register 31 is set in a major axis counter 35, while the minor axis start point in the register 33 is loaded in a minor axis counter 36. The major axis counter 35 is incremented or decremented one by one by major axis step pulses from a control logic circuit 21. The direction of increment or decrement is controlled by the set value of the register 23. The minor axis counter 36 is incremented or decremented one by one by minor axis step pulses from a calculating circuit 34. The direction of increment or decrement depends on the set value of the register 24. The calculating circuit 34 determines, according to the Bresenham's algorithm, the most approximate point by selecting " minor axis = not changed" or "minor axis = stepped by one" each time the major axis is stepped by one, and generates a minor axis step pulse if the minor axis = stepped by one. The value in the major axis counter 35 is compared with the major axis end point in the register 32 by a comparator 37, and the converter 30 continues to operate until these values are met. A selector 38 responds to the major axis indication in the register 22, and connects the major axis counter 35 to X output and the minor axis counter 36 to Y output if the major axis = X, or the major axis counter 35 and the minor axis counter 36 to Y and X outputs, respectively, if the major axis = Y. The major axis counter 35 and the minor axis counter 36 contain initially the coordinate values for the start point and are updated each time one approximate pixel dot is determined. The refresh memory 50 and the work memory 60 store pixel data in eight bit bytes arranged in the direction of x-axis, and are accessed by byte. Therefore, for converting a pixel address into a byte address, the combination of X higher address bits of X output from the selector 38 excluding the lower three bits and Y address bits of Y output from the selector 38 is supplied to an addressing circuit 44 to address a byte to be written. The lower three bits of X output are applied to a decoder 39, and converted into an eight-bit pattern i.e. eight-pixel dot pattern with its pixel dot specified by the lower three bits set to binary 1 (for example, 011 → 00100000). Access to the work memory is performed each time one approximate pixel dot is determined in the converter 30. In the contour line writing/fill operation, each work memory access cycle always involves two-step operation of read and write. This is controlled by a read/write signal R/W from the control logic circuit. In the contour line writing mode, one byte is first read which is addressed by the higher bits of X output and the bits of Y output of the selector 38. The one byte read and the output of the decoder 39 are supplied to an exclusive OR (EX-OR) 40. The output of EX-OR 40 is supplied to a selector 42, which selects the output of EX-OR 40 in the mode and supplies it to a gate 43. In writing following the reading, it is required to remove the start point and to write the contour line in one pixel per line, according to the above-mentioned Rules 2 and 3. A start point control circuit 27 of the controller 20 responds to the contour line mode signal from the register 25 and a contour line writing start cycle timing signal from the control logic circuit 21, and prohibits the gate 43 through OR 29 in the first work memory access cycle. A contour line control circuit 28 responds to the contour line mode signal from the register 25, indication of the major axis = X from the register 22, and indication of no minor axis step pulse from the calculating circuit 34, and prohibits the gate 43 when the value of minor axis (Y) does not change. As described for Figure 4, a plurality of approximate dots may be generated on the same X line when the major axis = X. In this manner, the converter 30 generates continuously all approximate pixel dots from the start point to the end point in successive cycles, while the addressing circuit 44 accesses the work memory 60 in each cycle, but the start point and unnecessary dots are not written. When the contour line pixels are written for one line segment, and the value of major axis counter 35 reaches that of the major axis end point in the register 32, the comparator 37 generates a major axis match signal, which is supplied to the microprocessor 10 to notify completion of writing of one line segment. The microprocessor 10 is responsive to the major axis match signal to set the coordinate values of start and end points of the next line segment in the registers 31, 32 and 33, and similarly performs the conversion of line segment to pixel dots and writing of contour line pixels. The operation continues similarly until processing of the last line segment is completed. The microprocessor 10 supplies a fill instruction signal (not shown) to the control logic circuit 21 in the controller 20 in response to generation of the major axis match signal from the comparator 37 in the process of last line segment. The control circuit 21 is responsive to the instruction signal to generate a fill mode signal, and, in response to it, the selector 42 is switched to cause output of a fill circuit 41 to pass through the gate 43. A fill address generator circuit 26 of the controller 20 responds to the fill mode signal and the major axis step pulses and generates to the addressing circuit 44 addresses for reading data in the work memory 60 one byte at a time for each X line. Figure 5 shows an example of the fill address generator circuit 26. Values of X start point, X end point, Y start point and Y end point which define any rectangular region surrounding the contour written in the work memory 60, preferably a rectangular region slightly larger than the contour, are set in registers 81, 82, 83 and 84 by the microprocessor 10. Values in the X start point register 81 and the Y start point register 84 are loaded in an X counter 86 and a Y counter 87. A gate circuit 85 supplies the major axis step pulses to the X counter 86 in response to the fill mode signal. Therefore, the X counter 86 is successively stepped. Bits in the X counter 86 excluding the lower three bits and bits in the Y counter 87 are provided to the addressing circuit 44 as a byte address. When the value of the X counter 86 becomes equal to the X end point, a comparator 88 generates X match output, increments the Y counter 87 by one, resets the X counter 86, and reloads the X start point in the X counter 86. The operation continues similarly, and a comparator 89 generates Y match output when the value of Y counter 87 becomes equal to the Y end point. When reading of all the bytes at the specified rectangular region is completed, both the X and Y match outputs are generated, and an AND circuit 90 supplies a fill completion signal to the microprocessor 10. Figure 6 shows the fill circuit 41. It comprises a latch and eight EX-OR circuit. Input of the latch is connected to output of EX-OR for bit 0, and its output is connected to input of EX-OR for bit 7. EX-ORs for bit 7 - 1 are connected to inputs of EX-ORs for bit 6 - 0. The byte read is supplied to the input terminals of bit 7 - 0. For example, assuming that bit 6 of the read byte is binary 1, and first odd numbered contour line pixel dot, each EX-OR of bit 6 - 0 generates output of binary 1. Since the latch is reset by a reset signal RST (not shown in Figure 1) from the control logic circuit 21 prior to start of the operation, bit 7 output is 0, and therefore, 01111111 is stored at the same byte address. After writing, a write completion signal (W/C) (not shown in Figure 1) from the control logic circuit 21 latches the binary 1 output from EX-OR of bit 0 into the latch, and supplies binary 1 to the input of EX-OR of bit 7. Therefore, this circuit continues to generate all binary 1 outputs as long as pixel bits of binary 0 are read thereafter. Assuming that first even numbered contour line pixel dot is generated at bit 5 of a byte, EX-OR of bit 5 generates binary 0 and bit 4 - 0 also become binary 0. Thus, the fill operation between the first odd and even numbered dots is completed and the latch is set to binary 0. Similarly, when second odd numbered dot is detected on the line, filling to the next even numbered dot is performed. The latch is also reset after completion of scanning for each X line. This circuit causes even numbered contour line pixels to be eliminated. After completion of the fill operation, the microprocessor 10 provides an address to the addressing circuit 44, reads the area filled image in the work memory 60 one byte at a time, and writes it in the refresh memory 50. The area filled image may be written at any position in the refresh memory 50. In case of a monochrome display, the refresh memory 50 will have a single pixel memory plane, while, in case of a gray scale or color display with multiple bits for one pixel, it will have a plurality of memory planes corresponding to the bits. In such case, the area filled image can be stored in the refresh memory in any desired intensity level or color by commonly supplying memory address input and data input to the memory planes and selecting planes to be written. Finally, advantages of the invention are described: (1) First, it can area fill easily and in high speed any complicated image even if it has a plurality of upward or downward apexes. (2) It can minimize distortion of an original image caused by removal of apexes because it not only removes the apexes, but also turns off even numbered contour line pixels in the course of the fill operation. (3) It simplifies specifying of line segments because horizontal line segments are omitted. (4) It can area fill an image containing crossing lines. For example, in the image of Figure 7, contour lines can be specified by two line segments, P1 → P3 and P2 → P4 . A pixel P5 will be written in the segment P1 → P3, but restored to binary 0 by EX-OR writing of the segment P2 → P4. Thus, area fill can be done without processing of the intersection. (5) It can generate adjacent images with completely conformed boundaries since even numbered contour line pixels are eliminated. For example, in case where an area filled image is added adjacent to a previous area filled image, or an adjacent area filled image is displayed in a color different from a previous image, it is required to create an image adjacent to the previous image after the previous image is moved to the refresh memory. In such a case, the invention enables to draw the contour lines by using line segments used in the previous image. For example, in Figure 3, if it is desired to create an adjacent image which is contiguous to the previous image at its top, right and bottom sides, then the contour of the adjacent image may be specified using the same line segments P5 → P3, P1 → P15, P10 → P7, and P10 → P12. Since the pixel 10 is not written, there occurs no interference with the previous image. The pixels P9, P8 and P7 are written, while the pixels P11 and P12 are eliminated in the course of fill operation. Therefore, no gap or overlap occurs between the image. Although the embodiment uses the separate address generator circuit 26, the converter 30 may be used in place of the circuit 26 as noted from the similarity between the circuits. In such case, the registers 31, 32 and 33 of the converter 30 may be used in place of the registers 81, 82 and 84 of the circuit 26, but it will be required to add a minor axis end point register corresponding to the Y end point register 83, a comparator corresponding to the comparator 89, and an AND circuit corresponding to the AND circuit 90. In addition, it will be required in the fill mode to gate output of the comparator 37 as the minor axis step pulse to the minor axis counter 36. Although, in the embodiment, the control for the start point removal and the one pixel per line writing are performed by prohibiting the data gate 43, a similar gate may be provided at the output of the converter 30.

Claims: Image processing method for filling interior areas of a digitized image that is stored in a digital storage and defined by its contour lines, comprising the steps of: generating contour line segments (eg P6-P7; Fig 3) from vector data such that each contour line segment comprises only one picture element (pixel) per horizontal line start pixels (eg P5) of a contour line segment are not written in the storage, contour line pixels are written into their corresponding storage locations of the storage as an Exclusive Or function of the contour line pixels and any corresponding pixel data stored at the corresponding storage locations all contour line segments are processed from bottom to top or vice versa, and generating fill characters by scanning the storage horizontal line by horizontal line, starting at odd pixels of a contour line and ending at the next even pixel belonging to a contour line. The method of claim 1, wherein the step of generating fill characters comprises exclusive-ORing each storage location with its adjacent location. Image processing system comprising a raster scan display device (70), an associated digital storage (50;60), and means (21,26) for scanning the storage horizontal line by horizontal line to generate fill characters between an odd pixel of a contour line and the next even pixel belonging to a contour line; characterized in that the system further comprises means (30) to generate contour line segment pixels in the storage from vector data provided by a microprocessor (10); means (20) responsive to the generating means (30) for suppressing the start pixel of each contour line segment and maintaining only one pixel per contour line segment and per horizontal line; means for writing contour line pixels into their corresponding storage locations as an Exclusive Or function of the contour line pixels and any pixel data stored at the corresponding storage locations; and means for ensuring a top to bottom or a bottom to top processing of all contour line segments. The image processing system in accordance with claim 3, wherein storage address control means (81-90) are provided to scan line by line a rectangular storage area containing the digital image. The image processing system in accordance with claim 3 or 4, wherein the digital storage contains pixels as bits in a multi-bit byte, and wherein Exclusive-OR gates (Ex-OR) are provided to logically combine adjacent bits in a byte during the line-by-line scanning of the storage. The image processing system of one of the claims 3 to 5, wherein the digital storage (60) is connected to the refresh storage (50) of the raster scan display device (70).

Inventors: MATSUBARA, SHIGERU, MORI, TOHRU, TABATA, TOSHIROH
Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1986
Main classification: G06F15
IPC codes: G06T11, G06F3