TRAVELLING WAVE SAMPLER

Abstract: A travelling wave sampler has an input termi­ nal for receiving an input signal to be sampled. A first diode has its anode connected to the input terminal, whereas a second diode has its cathode connected to the input terminal. A first delay line is connected between the cathode of the first diode and the anode of a third diode, and a second delay line is connected between the anode of the second diode and the cathode of a fourth diode. A strobe generator provides negative-going strobe pulses to the cathode of the third diode through a first strobe capacitor and provides positive-going strobe pulses to the anode of the fourth diode through a second strobe capacitor. The third and fourth diodes are maintained in zero biased condi­ tion when strobe pulses are not provided by the strobe generator and are forward biased during the strobe pulses. At the end of a strobe pulse, the charge that was accumulated on the strobe capaci­ tors during the strobe pulse drives the third and fourth diodes into reverse biased condition.

Description: This invention relates to samplers and particularly, but not exclusively, to travelling wave samplers. Background of the Invention As shown in FIG. 1, the conventional six-diode travelling wave sampler, for example as used in the sampling head of a digital oscilloscope, comprises two chains of three series-connected diodes 2, 4, 6 and 8, 10, 12, the two chains being connected in parallel with opposite polarity. Short delay lines 14 and 16 are connected between the diodes 4 and 6 and the diodes 10 and 12 respectively. The diodes are biased into the off state by diode chains 20 and 22 and bias voltage sources 28 and 30. In order to sample the signal present at the input terminal 24, negative-going and positive-going strobe pulses are applied to the cathode of the diode 6 and to the anode of the diode 12 by a strobe generator 18 by way of coupling capacitors 32 and 34 and transmission lines 36 and 38. The diodes 2-12 are turned on at the leading edge of the strobe, and therefore charge is permitted to propagate from the signal input terminal 24 to the delay lines 14 and 16 by way of the diodes 2, 4, 8 and 10 and transmission lines 40 and 42. Charge continues to propagate through the diodes 2, 4, 8 and 10 and the transmission lines 40 and 42 to the delay lines 14 and 16 so long as the diodes 2-12 remain on. The diodes are turned off at the trailing edge of the strobe, and therefore signal charge present on the delay lines is trapped between the diodes 4 and 6 and the diodes 10 and 12. The rise time of the sampler (the time for which signal charge is permitted to accumulate on the delay lines) is approximately equal to the round trip time on the delay lines 14 and 16, e.g., 25 ps. The charge that is trapped on the delay lines has a common mode component that is related to the voltage of the input signal. The common mode charge is applied to a summing node A at the input of an error amplifier 26. An inverting amplifier 27 has its input connected to the input terminal 24 through a resistor 46. The charge received by the amplifier 27 is inverted and injected into the summing node A through a variable capacitor 48. The output terminal of the amplifier 26 is connected to apply positive feedback to the bias network for the diodes 2-12 through an integrator 50 having a memory gate. The memory gate receives a memory gate pulse from the strobe generator, and the memory gate is conductive during the memory gate pulse. The leading edge of the memory gate pulse is synchronous with the strobe pulse. At the end of the memory gate pulse, the memory gate becomes non-conductive and breaks the positive feedback loop, in order to prevent uncontrolled oscillation. The positive feedback provided by the amplifier 26 adjusts the level at which bias is applied to the diodes 2-12, so that immediately following each strobe pulse the amplifier 26 provides an output voltage that represents the difference between the input signal voltage at a sampling point and the input signal voltage at the previous sampling point. One of the problems that arises in a diode sampler is known as blowby distortion. Blowby is the transfer of charge through a diode when in the off state. In a travelling wave sampler, blowby affects the quantity of charge that is captured on the delay lines when the diodes are in the on state the therefore distorts the value of the error signal that is generated by the error amplifier and is fed back to the bias network. In the FIG. 1 sampler, blowby is compensated by the resistor 46 and capacitor 48, which transfer to the input of the amplifier 26 in charge that is opposite in polarity but substantially equal in magnitude to that provided to the amplifier 26 through the diodes 2, 4, 8 and 10, the resistors 52 and 54 and the coupling capacitor 56 when the diodes are in the off state and therefore cancels the effect of the charge transferred through the diodes. The series combination of resistance and capacitance in each circuit branch leading from the terminal 24 to the amplifier 26 acts as a high-pass filter, blocking low frequency components in the charge transferred to the amplifier. The diodes 2 and 8 are connected in series with the diodes 4 and 10 in order to reduce the capacitance of each branch of the sampler and thereby increase the cut-off frequency of the high-pass filters. Although the capacitor 48 is variable, allowing manual adjustment to match the magnitude of the charge transmitted through the capacitor 48 to that transmitted through the capacitance of the diodes 2 and 8, this method of compensating blowby is subject to the disadvantage that it cannot readily be adjusted, in particular during operation of the sampler. A second limitation to which the FIG. 1 sampler is subject arises from the fact that the strobe pulses must be of sufficient amplitude that they are able to overcome the sum of all the reverse biases of the diodes 2-12 in order to turn on these diodes at the leading edge of the strobe and to turn off the diodes at the trailing edge of the strobe thereby trap the signal charge on the delay lines. The reverse bias of the diodes 2 and 8 must be sufficient that these diodes do not turn on between strobe pulses. Therefore the amplitude of the strobe pulses imposes a limit on the dynamic range of input signals that can be sampled accurately. Summary of the Invention In accordance with the invention, above-cited problems are solved as specified in claims 1 and 5. Brief Description of the Drawings For a better understanding of the invention, and to show how the same may be carried into effect, reference will now be made, by way of example, to the accompanying drawings in which: FIG. 1 is a schematic diagram, partly in block form, of a conventional sampler, FIG. 2 is a similar view of a sampler embodying the present invention, and FIG. 3 is a graph illustrating one aspect of the operation of the FIG. 2 sampler. In the different figures, like reference numerals designate corresponding elements. Detailed Description In the sampler shown in FIG. 2, the sampling diodes 4 and 10 are reverse biased by the bias voltage sources 28 and 30 through resistors 60, 66 and 64, 66. The charge-trapping diodes 6 and 12, connected in parallel with the resistors 62 and 64, are dynamically biased: immediately prior to a strobe pulse the diodes are in a zero bias condition, during the strobe pulse the diodes are forward biased (and the capacitors 82 and 84 are charged), for a short time after the strobe pulse the charge that was accumulated on the strobe capacitors 82 and 84 during the strobe pulse caused the diodes to be reverse biased, and by the time that the next strobe pulse occurs the capacitors 82 and 84 have discharged through the resistors 60 and 64 and the diodes are zero biased once more. The common mode charge trapped on the delay lines is applied to the non-inverting input of a differential amplifier 86. The error signal developed at the output of the amplifier 86 is applied to the integrator 50, and the output signal of the integrator is fed back to the connection point of the bias voltage sources 28 and 30. Therefore, immediately before each strobe pulse the potential at the cathode of the diode 6 is equal to the potential at the anode of that diode, and the absolute value with respect to ground of the potential at the cathode of the diode 6 is equal to the potential at the anode of that diode at the end of the previous strobe pulse. Similarly, immediately before a strobe pulse the diode 12 is zero biased and the absolute value of the potential at its anode is equal to the potential at its anode at the end of the previous strobe pulse. Therefore, the voltage change at the output terminals of the strobe generator need only be sufficient to overcome the reverse bias of one diode in each branch of the sampler (the diodes 4 and 10), and the dynamic range of input signal that can be sampled accurately for a given strobe amplitude is increased as compared with the arrangement shown in FIG. 1. The capacitor 68 and the variable capacitance diode 70 connected in series between the input terminal 24 and ground form a capacitive divider, the dividing ratio of which is controlled by a blowby control voltage that is applied to the diode 70 through a resistor 72. The value of the blowby control voltage may be adjusted during a self-calibration sequence, when the terminal 24 is not connected to receive a signal from a device under test. A calibration signal generator 74 applies a repetitive calibration signal having the waveform shown in FIG. 3(a) to the input terminal through a resistor 78. The waveform is a square wave having a positive-going transition that coincides substantially with the trailing edge of the memory gate pulse. The transition of the calibration signal waveform need not be so sharp as the transitions of the strobe pulse, but its rise time should be substantially shorter than the memory gate width (the interval for which the memory gate in the integrator 50 is rendered conductive by the strobe generator 18). Up to the time t₁ (at which the memory gate becomes conductive), the voltage at the output terminal of the sampler, shown in FIG. 3(b), remains constant. If the value of the blowby control voltage is such that blowby is not fully compensated, the output voltage increases when the memory gate becomes conductive, as shown at the point 90 of the waveform shown in FIG. 3(b), and the output voltage exhibits a characteristic overshoot 92 followed by a damped return to the proper level 94 when the memory gate becomes non-conductive. In the blowby voltage control circuit, the output signal is sampled at the time t₀ (shortly before the memory gate becomes conductive) and at the time t₂ (just before the memory gate becomes non-conductive once more) using an analog-to-digital converter (ADC) 96. A microcomputer (µC) 98 compares the two sample values and applies a digital signal to a digital-to-analog converter (DAC) 100 having a voltage output. The digital signal is converted to a voltage such as to ultimately bring the value of the second sample to the value of the first sample. The waveform of the output signal then conforms to the waveform of the calibration signal, and the blowby distortion has been compensated. It will be appreciated that the present invention is not restricted to the particular sampler that has been described and illustrated, and that variations may be made therein without departing from the scope of the invention. For example, the dynamic biasing of the charge-trapping diodes may be used in a sampler that does not have electrically-controlled blowby compensation, and electrical control of the blowby compensation is applicable to conventional two-diode and four-diode samplers. The functions of the ACD 96, microcomputer 98 and DAC 100 of the blowby voltage control circuit may be implemented by components of a digital oscilloscope with which the sampler is used, instead of its being necessary to provide dedicated components in the sampler itself.

Claims: A dynamic bias circuit connected to a diode (6) having first and second opposite electrodes in a travelling wave sampler, the sampler including a strobe pulse generator (18) for generating strobe pulses of predetermined magnitude and duration and at predetermined intervals, a coupling capacitors (32; 82) coupled between the strobe pulse generator and the first electrode of the diode, the dynamic bias circuit being characterized by means (28, 60, 62) for biasing the diode such that the diode is in a zero biased state immediately before a strobe pulse is generated by the strobe pulse generator (18), is in a forward biased state during the strobe pulse, and is in a reverse biased state immediately after the strobe pulse due to the presence on the capacitor of a charge that accumulates during the strobe pulse. A dynamic bias circuit as recited in claim 1 wherein the biasing means comprises a bias potential source (28) and a first resistor (60) coupled between the bias potential source and the first electrode of the diode, and wherein the biasing means further comprises a second resistor (62) coupled between the first and second electrodes of the diode. A dynamic bias circuit as recited in claim 1 further characterized by an amplifier (86) having an input terminal coupled to the second electrode of the diode, and an integrator (50) coupled between an output terminal of the amplifier and the bias potential source (28) such that the absolute value of the potential at the first and second electrodes of the diode when in the zero biased state is dependent upon the potential that previously existed at the second electrode of the diode. A dynamic bias circuit as recited in claim 1 having a second diode (4) connected in series with the first diode and of the same polarity, the second diode being reverse biased by the bias potential source when the first diode is in the zero biased state. A travelling wave sampler having an input terminal (24) for receiving an input signal to be sampled, a first diode (4) having the anode coupled to the input terminal, a second diode (10) having the cathode coupled to the input terminal, a third and a fourth diode (6, 12), a first delay line (14) coupled between the cathode of the first diode and the anode of the third diode, a second delay line (16) coupled between the anode of the second diode and the cathode of the fourth diode, a strobe generator (18) having first and second output terminals to provide negative and positive strobe pulses respectively, a first capacitor (82) coupled between the first output terminal of the strobe generator and the cathode of the third diode, and a second capacitor (84) coupled between the second output terminal of the strobe generator and the anode of the fourth diode, the sampler being characterized by means (28, 60, 62; 30, 64, 66) for biasing the third and fourth diodes to maintain the third and fourth diodes in a zero biased state immediately before strobe pulses are present at the output terminals of the strobe generator so that the strobe pulses forward bias the third and fourth diodes to charge the capacitors during the strobe pulses and immediately after the strobe pulses the charges stored on the first and second capacitors by the strobe pulses reverse bias the third and fourth diodes. A sampler as recited in claim 5 wherein the bias means comprises first and second bias potential sources (28, 30) and first and second resistors (60, 64), the first resistor (60) being coupled between the first bias potential source (28) and the cathode of the third diode (6), the second resistor (64) being coupled between the second bias potential source (30) and the anode of the fourth diode (12), and further comprises third and fourth resistors (62, 66) coupled in parallel with the third and fourth diodes respectively. A sampler as recited in claim 5 further characterized by an amplifier (86) coupled to the anode of the third diode and cathode of the fourth diode for developing an output signal dependent on the charge present on the delay lines, and feedback means (50) for applying a feedback derived from an output signal from the amplifier to the biasing means such that the absolute value with respect to ground of the potential at the cathode of the third diode and anode of the fourth diode when in the zero biased state is dependent upon the charge present on the delay lines. A sampler as recited in claim 7 further characterized by compensating means (68, 70) coupled between the input terminal and a second input of the amplifier for compensating for blowby through the first and second diodes. A sampler as recited in claim 8 wherein the compensating means is characterized by a third capacitor (68) coupled between the input terminal and the second input of the amplifier, and a fourth capacitor (70) coupled in series with the third capacitor between the second input of the amplifier and a reference potential level, the capacitance of the fourth capacitor being dependent upon the potential difference across the fourth capacitor. A sampler as recited in claim 9 further characterized by calibration means (74, 96-100) for automatically adjusting the voltage present at the connection of the third and fourth capacitors in response to the output of the amplifier. A sampler as recited in claim 10 wherein the calibration means is characterized by means (74) for supplying a calibration signal to the input terminal of the sampler during an interval when the sampler is not coupled to a device under test, comparison means (96, 98) for determining whether the output signal from the feedback means (50) has the same waveform as the calibration signal, and means (98, 100) for adjusting the voltage present at the connection of the third and fourth capacitors in response to the comparison means. A sampler as recited in claim 11 wherein the strobe generator (18) generates a memory gate pulse synchronously with the strobe pulse, the feedback means (50) includes a memory gate that is rendered conductive by the memory gate pulse, the calibration signal has a rectangular waveform including a step-form transition that substantially coincides with the end of the memory gate pulse, the comparison means compares the voltage of the output signal just prior to the end of the memory gate pulse with the voltage of the output signal before the beginning of the memory gate pulse, and the adjusting means generates a correction signal representative of the difference between these voltages.

Inventors: AGOSTON, AGOSTON
Applicants: TEKTRONIX, INC.
Application year: 1986
Main classification: G11C8
IPC codes: G01R13, G01R15, G11C27