INFORMATION INPUT/OUTPUT DISPLAY DEVICE

Abstract: An information input output display device comprising a dielectric (6,20) which is held in a portion between one electrode (18) and an other electrode (19) opposite to each other and which has at least a first state and a second state of unequal capacitances, means (7,8;25,26) to change the capacitance of the dielectric, capacitance holding means (11) to hold at least temporarily a value of the capacitance of the dielectric in the first state, and means (12) to compare the value of the capacitance of the dielectric with the value of the capacitance held by the capacitance holding means (11), whereby information can be read out without being affected by fluctuations in a distance d between the electrodes or/and in an ambient temperature T.

Description: BACKGROUND OF THE INVENTION: The present invention relates to an information input/output display device having information input and output capabilities, and more particularly to an information input/output display device which can deliver written information to an external device. Storage devices comprising one or more capacitors having a dielectric of a ferroelectric material and a pair of electrodes, a pulse source for applying across said capacitor a plurality of voltage pulses of opposite polarities in different time intervals are known (e.g. GB-A- 812 620). Thereby means to detect the capacitance of said dielectric of said capacitors are based on the following: If the remanent polarization of the ferroelectric is oriented in a direction to oppose a positive pulse from said pulse source this positive pulse will reverse the remanent polarization causing a relatively large output pulse to appear across a resistor which is connected between ground and one electrode of the capacitor while the pulse source is connected to the other electrode of said capacitor and ground. If the remanent polarization is initially oriented in the opposite direction the ferroelectric capacitor effectively presents a small signal capacitance to a positive pulse from said pulse source. Hereinbelow, a liquid crystal device furnished with a display function and an information holding function will be exemplified and explained as an information input/output display device. Heretofore, as an information input/output display device, there has been known a device which is made from a smectic liquid crystal or a ferroelectric substance, such as PLZT, possessing a display function and an information holding function. For example, the liquid crystal devices known exploit various display principles based on nematic liquid crystals, cholesteric liquid crystals or smectic liquid crystals. Any of the devices displays information in such a way that the oriented state of liquid crystal molecules is changed by any external field such as an electric field, and that the resulting change of an optical property is utilized. On the other hand, as methods for reading out information displayed on a display member to an external circuit, there has been proposed a system wherein the information is read out by detecting the change of a capacitance based on an external field such as electric field (EP-A-103170). By way of example, a method for reading out information proposed in a paper "Light Pen and Readout Functions in Thermally Addressed Smectic Liquid Crystal Display" (Y. Nagae, et al Japan Display '83, pp. 490 - 493) will be briefly explained (EPA-117 535 and EP-A-127 140). Fig. 1 shows a plan view of a liquid crystal matrix panel. The liquid crystal matrix panel 1 is much that the interspaces between X electrodes 2a - 2c and Y electrodes 3a - 3c are filled up with a smectic liquid crystal (A phase). Each part where the X electrode and the Y electrode intersect forms a picture element 4, the capacitance of which becomes C o = ε o · ε s /d.s. In the preceding expression, ε o = free space permittivity, ε s = relative permittivity of the liquid crystal layer, d = distance between the X and Y electrodes, and S = area of the picture element. Now, when a voltage V s whose voltage rise rate (dV/dt) is constant is applied to the Y electrode 3a, currents i s as shown in Figs. 2(a) and 2(b) flow out from the X electrodes. Since, on this occasion, the saturation value of the current is becomes information written in the liquid crystal matrix panel can be read out by discriminating the magnitude of the saturation value. This purpose can be achieved by connecting current-to-voltage converter circuits 5 to the X electrodes 2a - 2c and comparing the output voltages of these circuits with a reference voltage V ref . The aforementioned capacitance C o depends upon the distance d between the X and Y electrodes. On account of this fact, the dispersion of d enlarges especially in a larger-sized panel, resulting in the large dispersion of the capacitance C o . Further, since the relative permittivity of the smectic liquid crystal fluctuates depending upon temperatures, the capacitance C o fluctuates depending also upon the temperatures. With the prior-art method, therefore, errors occur in the read-out of information, making it difficult to construct a device of high reliability. SUMMARY OF THE INVENTION: An object of the present invention is to eliminate the disadvantage described above, and to provide an information input/output display device which can read out information without being affected by the dispersion of the inter-electrode distance d and the fluctuation of the ambient temperature T. According to a first aspect this object is achieved by the present invention by the features recited in the characterizing part of claim 1. According to a second aspect this object is achieved by the present invention by the features recited in the characterizing part of claim 8. In the application, the expression "dielectric" signifies a dielectric the capacitance of which is changed by applying an electric field or heat thereto and is stored without changing for a fixed period of time even after removing the electric field or the heat therefrom. Mentioned as examples are a liquid crystal having a smectic phase, a liquid crystal having a cholesteric phase, and PLZT. It is preferable to use the liquid crystal having the smectic phase into which information can be written at a comparatively low temperature and with a comparatively low voltage and the storage time of which is long. The objects and features of the present invention will become apparent from the following description of embodiments. BRIEF DESCRIPTION OF THE DRAWINGS: Fig. 1 and Figs. 2(a) - 2(b) are diagrams showing a prior-art method of reading out image information; Fig. 3 is a diagram of the whole arrangement of an embodiment of the present invention; Fig. 4 to Figs. 7(a) - 7(c) are schematic diagrams of the writing and reading of image information; Fig. 8 to Fig. 15 are diagrams showing concrete examples of the reading of image information; Fig. 16 to Fig. 19 are diagrams showing examples of the division of picture elements which form other embodiments of the present invention; Fig. 20 is a diagram of the temperature characteristic of the relative permittivity of a liquid crystal; and Fig. 21 is a diagram showing an embodiment in the case of employing a temperature compensation circuit. DETAILED DESCRIPTION OF THE EMBODIMENTS: Now, the present invention will be described in detail by taking a liquid crystal having a smectic phase as an example. Fig. 3 shown a diagram of the whole arrangement of an information input/output display apparatus according to an embodiment of the present invention. A light pen 7 and image information writing means 8 constitute means for changing the capacitance of that liquid crystal having the smectic phase which serves as a dielectric in the portion between one electrode and the other electrode of a substrate opposite to each other, thereby to write image information such s characters and symbols into a liquid crystal panel 6. The material of the liquid crystal to be used is a mixture which consists of substances generally represented by, for example, (where R denotes an alkyl group), which exhibits a positive dielectric anisotropy, which presents a smectic A phase at the room temperature, and which undergoes a transition from the smectic phase to a nematic phase at 42 °C and further from the nematic phase to an isotropic liquid phase it 45 °C. As other liquid crystals presenting the smectic A phase, there are mentioned a mixture consisting of 4, 4'-alkoxybiphenyl alkylcarbonate ester and 4, 4'-alkylcyanotran, a mixture consisting of 4-alkoxyphenyl-4'-alkylbenzoate ester and P, P' alkylcyanobiphenyl, etc. When a dichromatic pigment is added to the aforementioned liquid crystal, the visual angle characteristic of display is enhanced, and this is favorable for a display device. The image information written in the liquid crystal panel 6 is read out by image information detection means 9 to detect a capacitance by applying a voltage changing with time to one opposite electrode and then detecting current flowing through the other opposite electrode. The information read out is sent to an analog-to-digital converter circuit 10, the output of which is fed into a memory circuit 11. The memory circuit 11 temporarily holds the output of the analog-to-digital converter circuit 10 before the writing of the image information into the liquid crystal panel 6. An image information recognition circuit 12 compares the content stored in the memory circuit 11 beforehand, with image information read out anew as well as temperature information detected by temperature detection means, so as to discriminate the image information written in the liquid crystal panel 6. A control circuit 13 controls the various circuits mentioned above. Next, the arrangements and operations of the respective portions will be described in detail. The inventors have proposed the image information writing means 8 and the image information detection means 9 shown in Fig. 3 EP-A- 117 535 and EP-A 127 140. Therefore, the image information writing means 8 and the image information detection means 9 will be briefly explained with reference to Figs. 4 to 7(c). Fig. 4 shows the outlines of the image information writing means 8 and the image information detection means 9. A liquid crystal panel 20 is constructed of a pair of substrates which are formed in such a manner that three scanning electrodes 19 and three signal electrodes 18 oppose at their opposite surfaces and that the opposite portions of the scanning electrodes 19 and the signal. electrodes 18 constitute a matrix of 3 rows and 3 columns as a whole. A group of switches 17 and a group of switches 21 are connected to the scanning electrodes 19 of the liquid crystal panel 20. An image information writing scanning circuit 26 is connected to the terminals of the switches 17 on one side, while an image information reading scanning circuit 27 is connected to the terminals thereof on the other side. Meanwhile, a group of switches 22 are connected to the signal electrodes 18, the terminals of which on one side have a writing drive voltage generator circuit 23 connected thereto and the terminals of which on the other side have an image information detector circuit 24 connected thereto. A light pen 25 is made of, for example, an infrared semiconductor laser. In writing image information into the liquid crystal panel 20, the image information writing scanner circuit 26 is selected by the switches 17, and further, the writing drive voltage generator circuit 23 is selected by the switches 22. On the other hand, in reading image information out of the liquid crystal panel 20, the image information reading scanner circuit 27 is selected by the switches 17, and further, the image information detector circuit 24 is selected by the switches 22. Here, the basic operations of reading out image information, which form the principal object of the present invention, are illustrated in Figs. 5 to 7(c). Referring to Fig. 5, in reading out the information of a picture element e₁₁ by way of example, a reading voltage V R is applied to a scanning electrode 50a, and current i s flowing through a signal electrode 49a at this time is detected by a current detector circuit 55. Scanning electrodes 50b, 50c and signal electrodes 49b, 49c are respectively connected to D.C. power sources 53 and 54, or they are grounded. As stated before, the liquid crystal having the smectic phase for use in the present embodiment exhibits the positive dielectric anisotropy. That is, the relation between the relative permittivity ε // in the major axis direction of liquid crystal molecules and the relative permittivity ε ┴ in the minor axis direction is ε // > ε ┴ . Accordingly, in the non-written state in which information is not written, the liquid crystal molecules are oriented perpendicularly to the electrodes, and the relative permittivity of the liquid crystal layer is substantially equal to the relative permittivity ε // in the major axis direction of the liquid crystal molecules. In the written state in which information is written, the orientation directions of the liquid crystal molecules are in conspicuous disorder. Assuming that the orientation directions be perfectly random, the relative permittivity ε s of the liquid crystal layer becomes close to the three-dimensional average value 1 / 3 (ε // + 2 ε ┴ ) of ε // and the relative permittivity ε ┴ in the minor axis direction of the liquid crystal molecules, the average value being smaller than ε // . Herein, since each picture element is such that the interspace between the electrodes is filled up with the liquid crystal layer being the dielectric, the capacitance thereof differs owing to the unequal permittivities caused by the fact that the molecular orientations in the written state and the non-written state are different as described above. Accordingly, the capacitance C W of a picture element in the written state and the capacitance C NW of a picture element in the non-written state are different. In the case as above described where the liquid crystal material having the positive dielectric anisotropy, for example, is employed to vertically orient the liquid crystal molecules in the non-written state, C W < C NW holds, and the ratio becomes: The inventors measured the capacitances by the use of a liquid crystal having ε // = 12 and ε ┴ = 4.7. As a result, it has been confirmed that C NW /C W = 1.48 holds which is close to a value 1.68 calculated with Eq. (1). Besides, in a case where the liquid crystal material having the positive dielectric anisotropy is employed and where the initial orientation is a horizontal orientation, C W > C NW holds. Figs. 6(a) and 6(b) show practicable examples of current detector circuits 55a - 55c and capacitance discriminator circuits 56a - 56c. Further, Figs. 7(a) - 7(c) serve to explain voltage waveforms at various parts in Figs. 6(a) and 6(b). Referring to Fig. 6(a) or 6(b), when a picture element is regarded as a capacitance C and a reading voltage V R is applied to an electrode 4a, a displacement current i S (t) flows through an electrode 2a. Figs. 7(a) - 7(c) show a situation in the case of reading out the capacitance of a picture element e₁₁. Here, the capacitances of picture elements e₁₁, e₂₁ and e₃₁ are respectively denoted by C₁₁, C₂₁ and C₃₁. By way of example, when the reading voltage V R is a ramp voltage of as shown in Fig. 7(a) and wiring resistances r₁ and r₂ are assumed to be sufficiently small, the displacement current i flowing to the current detector circuit 55 becomes saturated to a value K·C₁₁ in a short time. Now, assuming C₀ = C₂₁ + C₃₁ in Fig. 7(b), hold. The displacement current i S (t) is obtained by the Laplace transform etc. from Eqs. (2) and (3), as follows: Here, assuming the following: then the following equations hold: From Eq. (4), i S (t = 0) = 0 and i S (t =00) = K·C₁₁ hold. It is understood that the displacement current i S (t) at the saturation becomes K.C₁₁, which does not depend upon the wiring resistances r₁ and r₂ of the other capacitance C₀ (= C₂₁ + C₃₁) electrode and which is not affected by current attributed to crosstalk. Accordingly, the detection of the capacitance C W of the picture element in the written state and the capacitance C NW of the picture element in the non-written state is permitted by detecting the displacement current is (t) as illustrated in Fig. 7(a), and image information can be read out in a short time. The read-out of image information may well be performed by detecting the displacement current i S (t) in a transient state. However, it enhances the detection accuracy more to detect the displacement current i S (t) after it has been saturated and stabilized as illustrated in Fig. 7(a). Further, the detection of the displacement current i S (t) may be performed either at the rise or at the fall of the reading voltage V R . Regarding the "reading voltage V R changing with time", the capacitance can be detected even when a voltage other than the voltage whose dV/dt is constant (= K), for example, a sinusoidal voltage is used. As understood from Eq. (4), however, the detection is easier when dV/dt is constant (= K). As such voltages whose dV/dt's are constant, a triangular voltage etc. are mentioned besides the ramp voltage as shown in Fig. 7(c). The orientation state of the liquid crystal molecules changes when a voltage not smaller than a specified threshold value is applied. Therefore, the reading voltage V R which is applied for detecting the capacitance should preferably have a voltage value less than the threshold value of the liquid crystal. The current detector circuit 55a - 55c converts the aforementioned displacement current i into a voltage, and is composed of an operational amplifier 61 and resistors. The capacitance discriminator circuit 56a - 56c is composed of a comparator 62, and compares the output V s (t) of the operational amplifier with a reference voltage V ref which serves as the value of the capacitance of the liquid crystal in the initial state. Here, the output V S (t) of the operational amplifier 61 becomes V W for the picture element in the written state and V NW for the picture element in the non-written state as shown in Fig. 7(c). Accordingly, when V a and V ref are compared by the comparator, the output D a of the comparator becomes a high level "H" for the written state and a low level "L" for the non-written state. Owing to this fact, the reference voltage V ref is set to be close to the intermediate value between V NW and V W , and the relation of magnitudes between the reference voltage V ref being the value of the capacitance of the liquid crystal in the initial state and the read voltage V S being the value of the capacitance of the liquid crystal in the driven state is discriminated, whereby read-out errors attributed to the fluctuations of the distances between the electrodes, the fluctuations of temperatures, etc. are prevented, and the read-out of image information from the liquid crystal panel 20 is permitted. Fig. 8 shows a practicable example of the portions relevant to the read-out of image information in the circuit arrangement shown in Fig. 3. 1-out-of-2 switches 68a - 68c are connected to the scanning electrodes 77a - 77c of the liquid crystal panel. One side of each 1-out-of-2 switch has the reading voltage V R applied thereto, while the other side has a D.C. power source 73 connected thereto or is grounded. Meanwhile, current detector circuits 60a - 60c are connected to signal electrodes 76a - 76c, and their outputs are applied to a switch 61 and comparators 12a - 12c. The output of the switch 61 is converted by an analog-to-digital converter circuit (hereinbelow, abbreviated to "A/D") 10 into a digital signal of a plurality of bits, which is temporarily stored in a memory circuit 11. Further, the output of the memory circuit 11 is converted by a digital-to-analog converter circuit (hereinbelow, abbreviated to "D/A") 15 into an analog signal, which is applied to the comparators 12a - 12c via a switch 62. The outputs of the comparators 12a - 12c are fed into latch circuits 67a - 67c at the timings of strobe signals STB1 - STB3. The operation of the circuit arrangement shown in Fig. 8 consists of the first operation of feeding the memory circuit with the capacitances of respective picture elements at the time at which information is not written in the liquid crystal panel, namely, at which the orientation state of liquid crystal molecules is the initial state, and the second operation of comparing the values of the capacitances fed into the memory circuit and the values of the capacitances of the respective picture elements read out on occasion, so as to discriminate the relations of magnitudes. Fig. 9 shows the timings of the first operation mentioned above. When the reading voltage V R is applied to the scanning electrode 77a by way of example, the saturation values of the output voltages V S1 - V S3 of the current detector circuits 60a - 60c become values corresponding to the capacitances of the respective picture elements e₁₁, e₁₂ and e₁₃. Then, the switch 61 is successively changed-over by a change-over signal CS1. First, at a time t₁, the voltage V S1 is sent to the A/D 10, and the signal obtained here is fed into the memory circuit 11. Next, the voltage V S2 is sent to the A/D 10 at a time t₂, and the voltage V S3 is sent thereto at a time t₃. By executing the above operations in succession, the capacitances of all the picture elements can be fed into the memory circuit 11. Fig. 10 shows another example of timings. The switch 61 is changed-over within the rise time of the reading voltage V R so as to send the voltages V S1 - V S3 to the A/D 10, whereupon the results are fed into the memory circuit 11. The first operation described above is carried out at the closure of a power supply or at the erasure of the whole panel. The fluctuations of the ambient temperature can also be compensated by executing the first operations periodically. Fig. 11 shows the timings of the second operation. Within the rise time of the reading voltage V R , the contents of the memory circuit 11 are successively sent to the D/A 15, and reference voltages V ref1 , V ref2 and V ref3 are respecitvely generated at times t₁, t₂ and t₃, while they are respectively sent to the comparators 12a, 12b and 12c by changing-over the switch 62. Since, at this time, the output voltages V S1 -V S3 of the current detector circuits 60a - 60c have the values corresponding to the capacitances of the respective picture elements, the states of the picture elements can be read out by comparing the aforementioned voltages V ref1 , V ref2 , V ref3 and V S1 - V S3 . Fig. 12 shows another embodiment of the present invention. This circuit arrangement is characterized in that holding circuits 79a - 79c for temporarily holding analog voltages are disposed at the inputs of the comparators 12a - 12c, thereby making it possible to deliver the contents of the memory circuit 11 in a short time. Fig. 13 shows another embodiment for reading out information. 1-out-of-2 switches 81a - 81c are connected to scanning electrodes 77a - 77c. One side of each switch is connected to a reading voltage generator circuit 85, while the other side is connected to a D.C. power source 80 or is grounded. Meanwhile, 1-out-of-2 switches 82a - 82c are connected to signal electrodes 76a - 76c. One side of each of the switches 82a - 82c is connected to a D.C. power source 83 or is grounded. Further, the other sides of the switches are connected to a current detector circuit 83' in common. The output of the current detector circuit 831 is connected to an A/D 84 and a comparator182. Further, the output of the A/D 84 is applied to a memory circuit 851 , the output of which is applied to a D/A 86, the output of which is applied to the comparator 182. The output of this comparator 182 is fed into a latch circuit 81 by a timing signal STB. The circuit arrangement shown in Fig. 13 executes the first operation and the second operation likewise to the circuit arrangement shown in Fig. 8. Fig. 14 illustrates the timings of the first operation for feeding the memory circuit 851 with the capacitances of respective picture elements at the time at which no information is written in a liquid crystal panel in Fig. 13, namely, at which the orientation state of liquid crystal molecules is the initial state. For example, in reading out the capacitances of the picture elements e₁₁, e₁₂ and e₁₃, a horizontal scanning signal L₁ is brought to 'H', and the reading voltage V R is applied to the scanning electrode 77a. Further, vertical scanning signals C₁ - C₃ are successively brought to 'H' so as to successively supply the current detector circuit 831 with currents flowing through the signal electrodes 76a - 76c. As a result, the saturation values of the outputs V S of the current detector circuit 831 become values corresponding to the capacitances of the respective picture elements. The voltages V₁ - V₃ are converted by the A/D 84 into digital signals, which are stored into the memory circuit 851 in succession. Such operations are performed for all the picture elements. Fig. 15 illustrates the timings of the second operation for comparing the contents of the memory circuit 851 in Fig. 13 and contents read out on occasion. The timings of the reading voltage V R , horizontal scanning signals L₁ - L₃ and vertical scanning signals C₁ - C₃ are the same as in Fig. 14. As illustrated, the contents of the memory circuit 851 are successively read out at the timings of the vertical scanning signals C₁ - C₃. As a result, the outputs V ref of the D/A 86 become V₁ ,V₂ , V₃ ..... . When the capacitances of all the picture elements of the liquid crystal panel are fed into the memory circuit 851 , the memory capacity becomes large particularly in case of a large-sized panel. Therefore, a system is considered wherein with note taken of the fact that the inter-electrode distance d of the liquid crystal panel does not suddenly fluctuate in an opposite portion of small area, an opposite portion forming a matrix of M rows and N columns is divided into k (1 < k < M x N) blocks, and the capacitances of opposite portions, one being selected from each block, are held in a memory circuit 11 at least temporarily. Such an example is shown in Fig. 16. In Fig. 16, the picture elements of a liquid crystal panel 87 forming a matrix of 6 rows and 9 columns are divided into six blocks 88a - 88f, and the capacitances of the picture elements PI - P6 are fed into the memory circuit 11. For example, in case of reading out the information of the picture elements of the block 88a, the capacitance of the picture element P1 located substantially at the center of the block 88a is taken as a reference. Fig. 17 shows a circuit arrangement at the time at which the values of the capacitances of the picture elements shown in Fig. 16 are read out and are applied to a memory circuit 85. Here will be explained a case of reading out the capacitances of the picture elements P1, P2 and P3. The other picture elements are omitted from the drawing. Fig. 18 illustrates an operating example in the case of reading out the picture elements P1 - P3. Using vertical scanning signals L1 - L6 from a vertical scanning circuit 95, only the scanning electrode of the second line L2 is supplied with the reading voltage V R , and the other scanning electrodes are brought to the zero level. Meanwhile, among horizontal scanning signals C₁ - C₉ from a horizontal scanning circuit 98, only those C₂, C₅ and C₈ ire brought to an 'H' level in succession, whereby currents flowing through the respective picture elements P1 - P3 are applied to a current detector circuit 99 via 1-out-of-2 switches 97b, 97e and 97h. Further, detection voltages V S provided from the current detector circuit 99 are applied to an analog-to-digital converter circuit 100, and digital signals produced here are stored into the memory circuit 85 in succession. Fig. 19 shows another operating example for reading out the capacitances of the picture elements P1, P2 and P3. Here, the reading voltage for 3 clocks is applied to the scanning electrode of the second line L2, and the scanning signals C2, C5 and C8 are brought to the 'H' level in continuous fashion, whereby the currents flowing through the picture elements P1, P2 and P3 are applied to the current detector circuit 99 via the 1-out-of-2 switches 97b, 97a and 97h. Fig. 20 shows the temperature characteristic of the relative permittivity ε S of the liquid crystal having the smectic phase. The relative permittivity ε S has a minus temperature coefficient. For this reason, the saturation value of the output V S of the current detector circuit fluctuates depending upon temperatures, to give rise to a read-out error. In this regard, the problem can be solved in such a way that, as shown in Fig. 21, the output voltage of a D/A 90 is divided by a temperature sensor element, e. g., thermistor 91 and a resistor 92, whereupon the resulting voltage is applied to a comparator 93. Further, the read-out error attributed to the temperature fluctuation can be prevented by periodically performing the first operation described before. In the present embodiment, when a gain adjusting circuit is added to the output of the D/A, the absolute value of a reference voltage can be controlled at will, and a flexible device can be provided. In the present embodiment, the liquid crystal having the smectic phase has been explained as an example. As stated before, however, the present invention is applicable to any dielectric, such as a liquid crystal having a cholesteric phase or PLZT, the capacitance of which is changed by applying an electric field, heat or the like and is further stored without changing for a fixed period of time even after removing the electric field, the heat or the like. Means for changing the capacitance of the dielectric is not restricted to heating means, but it may be any means adapted to change the capacitance of the dielectric, such as electric field means or current means. As an expedient for detecting the capacitance, besides the method thus far described wherein the reading voltage changing with time is applied so as to detect the displacement current, there is, for example, a method wherein as disclosed in EP-A- 103170 current is caused to flow through a picture element so as to detect the change of an impedance. As set forth above, read-out errors can be prevented against fluctuations in the distance d between electrodes and in temperatures, and hence, an information input/ output display device of high reliability can be provided.

Claims: An information input/output display device comprising a dielectric which is held in a portion (a) between one electrode (2a) and the other electrode (3a) opposite to each other and which has at least a first state and a second state of unequal capacitances, means (8) to change the capacitance of said dielectric, means (9) to detect the capacitance of said dielectric, characterized in that capacitance valve holding means (11) is provided to hold at least temporarily a value of the capacitance of said dielectric in the first state, and means (12) to compare the value of the capacitance of said dielectric with the value of the capacitance held by said capacitance valve holdings means (11). An information input/output display device according to claim 1, wherein said dielectric is a dielectric whose capacitance is changed by applying an electric field or heat and is further stored without changing for a fixed period of time even after removing the electric field or the heat. An information input/output display device according to claim 2, wherein said dielectric is a liquid crystal having a smectic phase. An information input/output display device according to claim 1, wherein said means (8) to change the capacitance of said dielectric is means to heat said dielectric. An information input/output display device according to claim 1, wherein said means (9) to detect the capacitance of said dielectric is composed of means (30) to apply a voltage (V R ) changing with time to said portion (a), and means (55) to detect principally a displacement current flowing through said portion (a). An information input/output display device according to claim 5, wherein the voltage (V R ) changing with time is a voltage whose dV/dt is constant. An information input/output display device according to claim 5, wherein the voltage (V R ) changing with time is a voltage of such a magnitude that the capacitance of said dielectric is hardly changed. An information input/output display device comprising a dielectric which is held in portions (a, b, c, ...) between a plurality of electrodes (2a, 2b, 2c) on one side and a plurality of electrodes (3a, 3b, 3c) on the other side opposite to one another, with the portions (a, b, c, ...) forming a matrix (6, 20, 87) of M rows and N columns as a whole, and which dielectric has at least a first state and a second state of unequal capacitances, means (8) to change the capacitance of said dielectric in any desired one of portions (a, b, c, ...), means (9) to detect the capacitance of said portions (a, b, c, ...), characterized in that said matrix (6; 20; 87) is divided into k blocks (P1, ..., P6) with 1 < k < MxN; that capacitance valve holding means (11; 85) is provided to hold at least temporarily a value of the capacitance of said dielectric in the first state held in any desired one of the portions (a, b, c, ...) included in each said block (P1, ..., P6), and means (12) to compare the value of the capacitance of said dielectric in the desired portion (a, b, c, ...) with the value of the capacitance held by said capacitance valve holding means (11; 85) corresponding to the block of said dielectric in said desired portion (a, b, c, ...). An information input/ output display device according to claim 8, wherein said dielectric is a dielectric whose capacitance is changed by applying an electric field (V R ) or heat and is further stored without changing for a fixed period of time even after removing the electric field or the heat. An information input/output display device according to claim 9, wherein said dielectric is a liquid crystal having a smectic phase. An information input/output display device according to claim 8, wherein said means (8) to change the capacitance of said dielectric is means to heat said dielectric. An information input/output display device according to claim 8, wherein said means (9) to detect the capacitance of said dielectric is composed of means (30) to apply a voltage (V R ) changing with time to said dielectric in the portion (a, b, c, ...), and means (55) to detect principally a displacement current flowing through said dielectric in said portion (a, b, c, ...). An information input/output display device according to claim 12 wherein the voltage (V R ) changing with time is a voltage whose dV/dt is constant. An information input/output display device according to claim 12, wherein the voltage (V R ) changing with time is a voltage of such a magnitude that the capacitance of said dielectric is hardly changed.

Inventors: KITAJIMA, MASAAKI, NAGAE, YOSHIHARU, TAKASAKA, MASAHIRO
Applicants: HITACHI, LTD.
Application year: 1985
Main classification: G11C11
IPC codes: G09G3, G09F9, G11C11, G06F3