A PROCESS FOR DETERMINING AN ECHO PATH FLAT DELAY AND ECHO CANCELER USING SAID PROCESS

Abstract: In a voice transmission network having an echo canceler (104) including a flat delay line (103) in series with an adaptive digital filter, a process is provided for adjusting the flat delay line length, thus enabling limiting the filter length to minimal value. The method is based on intercorrelation operations. It includes first intercorrelating sequences of energy values of blocks or consecutive samples, to derive a rough flat delay estimation (106) therefrom; then intercorrelating sequences of signal samples with one of the sequences being roughly delayed, to derive therefrom an accurate flat delay estimation (107).

Description: This invention deals with digital transmission and more particularly with means for canceling echoes in a transmission network. It applies more particularly to voice transmission networks. Two-way voice transmission over a telephone network is presently made partly over a two-wire bidirectional line and partly over a couple of two unidirectionnal lines, sometimes referred to as a four-wire line. The connection between two and four-wire lines, and (vice-versa), is made through so called hybrid transformers. Because these transformers cannot be loaded with an impedance matched throughout the overall frequency bandwidth, a full separation between the unidirectionnal lines connected to a same hybrid transformer cannot be achieved in practice. As a consequence, so called echoes are generated, meaning that a portion of voice signal over one of the unidirectional lines is fed back to sender through the other unidirectionnal line. For local calls the echoes are not particularly disturbing essentially because of the very short delay between the speech utterance from the speaker's mouth and it being back to his ear. Under these circumstances, the echo remains almost unnoticed. Such is not the case with long distance calls wherein fairly large delays may occur between the speech signal and the corresponding generated echo. These echoes should be removed. Several solutions have already been proposed to solve the echo problem. They may be classified into two large categories, i.e. echo suppression or echo cancellation. The former category call for a drastic solution which implies switching one of the unidirectionnal lines, thus one of the speakers, off, based on relative energy levels over two unidirectionnal lines. In other words the loudest speaker wins. The latter solution is more efficient but involves a more elaborate, thus more expensive, process. Conventionally, with echo cancelling processes, an echo replica is generated and then subtracted from the echo spoiled signal. The echo replica generation needs performing the analysis of the signal flowing over the unidirectionnal lines to adjust the tap coefficients of a digital filter the impulse response of which should synthesize the echo path response. In theory, the time slot during which the analysis should be performed should be commensurate with the distance between hybrid and echo cancellor. Thus, the filter delay line should also be made as long (delaywise) as the echo path, which means that a fairly large number of filter coefficients are to be adjusted dynamically. These coefficients are conventionally adjusted through a gradient method based on the intercorrelation of the echo suppressor output signal with the signal fed into the hybrid transformer. Assuming the echo path be 32 ms long, with the voice signal being sampled at 8Khz, then the echo filter order should be 256. The computing power for adjusting the filter would be fairly large, say, enabling four million multiplications to be performed per second. It was already noted that, in order to save on the number of filter coefficients thus on the computing power required, one can approximate the echo path impulse response with a flat delay followed by a short impulse response (short filter). Consequently assuming said flat delay is correctly adjusted, then a valuable reduction of computing power required for echo cancelers in a voice transmission network may be achieved. Then the Finite Impulse Response (FIR) digital filter to be used may be made to include 16 to 48 coefficients instead of 256. Several methods have been proposed to estimate the flat delay length. For instance, the system could be first initialized with a training sequence before any speech traffic be established. Said training sequence is sent over the undirectionnal line toward the hybrid transformer at the beginning of any telephone communication, that is before effective voice traffic is established between a calling party and a called party. Then, analyzing the signal back from the hybrid transformer would help plotting the echo path impulse response and thus measuring the flat delay. The above method, eventhough presenting a number of advantages, suffers, however, several drawbacks. Mainly, it requires monitoring and protocol, at the beginning of any communication. Also, although being rather short (say 200 ms), it may be unacceptable for some network configurations, connecting for example to common carriers. Said method is, in addition, micro code consuming. It may require 700 instructions, with all related memory spaces etc... It also requires a high processing power involving up to 5 MIPS (million instructions per second) during a few milliseconds. Savings in processing complexity were suggested in GB-A-2135558 by generating an estimating the delay through subsampling the signals to be cross-correlated. A further improved method is provided in this Application for considerable savings while evaluating the echo path flat delay be intercorrelating energy data rather than voice signal samples. It also achieves the function through a two-steps approach, starting with energy correlation to get a rough flat delay estimate and then adjusting the flat delay estimation using signal samples in a narrower window. The above mentioned advantages of this method, together with few other advantages not cited, will appear from the detailed description of an embodiment of the invention made with reference to the drawings. Brief Description of the figures Figure 1 is a block diagram of a portion of a telephone network. Figure 2 is a diagram showing the echo canceler location within the network. Figure 3 is a representation of the echo canceler. Figure 4 illustrates the canceler filter impulse response. Figure 5 is a detailed representation made to illustrate the invention. Description of one embodiement of the Invention Represented in figure 1 is a block diagram showing few elements of a modern telephone network. The communication between the subscriber voice terminal T1 and a subscriber voice terminal T2 (not shown) goes first through a central switching system (PBX) 10 over a bi-directional line L1. The PBX10 is connected, say to an international transmission unit 12, again through a bi-directional (2wires) line L'1. Within the Unit 12 the voice signal is made to flow over a couple of unidirectional lines L2 and L'2, each being a 2-wire line, both representing thus a 4-wire line, with the two to four-wire lines conversion being provided by a hybrid transformer H. The input signal Xin provided by T1 flows over L'2. Assuming the transmission over the considered network include a digital network section, then Analog-to-Digital (A/D) and Digital-to-Analog (D/A) conversions need be operated within a digital processing unit 14. Assuming the hybrid transformer load matching be perfect over the voice frequency bandwidth, then the Xout signal provided by T2 (not shown) would entirely be fed through L'1, PBX10 and L1 toward T1. In practice the perfect matching never occurs, and therefore a portion of Xout is fed back as an echo to T2 through H and L'2. Thus, Xin is said to be echo spoiled. Represented in figure 2 is a conventional arrangement made to cancel the echo. A digital filter 16 is connected to the outgoing path and fed with digital signal samples x (n). The filter coefficients C(k) are set by a coefficient setting device 18, so that the filter 16 should generate a signal y'(n) which ideally, assuming no signal is provided by T1, would be the exact replica of the digital representation of the signal y(t) fed into the analog to digital converter (A/D). Then, subtracting the filter output from the A/D output should cancel the echo z(n). In operation, the coefficient settings are conventionnally performed using a gradient method, and thus after several approximating steps. These settings need also be updated during the communication, and from time to time. As already mentioned previously, the filter should match perfectly the echo path and needs in theory a large number of taps and coefficients. In practice, the filtering operations are made using a program controlled microprocessor operating multiplication operations over the x(n) samples, and addition operations of the results. The computing workload might be fairly high making the whole system useless in the field. A Perfect replica generating means should have an impulse response perfectly matching the echo path impulse response a digital representation of which is represented in figure 4. This figure shows a flat portion followed by the hybrid transformer impulse response. The echo replica means should provide the same overall response. One solution for limiting the echo canceling processing load to a reasonable level, involves thus using a flat delay line (length M) ahead of the filter as shown in figure 3. In other words, a portion only of the delayed samples are effectively processed by the digital filter, and thus only a portion of the delay line of filter 16 (see figure 2) is used for the filter represented in figure 3. The coefficient setting device (18) is thus made to include not only means for initializing the coefficients setting and means for updating the coefficient values, but also means for adjusting the flat delay line length to its optimal value during the initialization step. And the main problem to be solved here lies with how to adjust the flat delay line length to optimize the filter synthesizing the hybrid impulse response. The proposed method is illustrated in figure 5. It is based on intercorrelating short time (e.g.2ms) outgoing (Xout) and incoming (Xin) signal energy values to determine a rough flat delay value and then intercorrelating a limited number of Xout(n) and Xin(n) voice signal samples to more accurately determine the optimal flat delay length. It should be recalled that the network wherein the system is being implemented is provided with digital encoding means applying PCM Block Companded (BCPCM) coding techniques. With BCPCM the voice signal is split into consecutive segments 20 ms long and each segment provides a block of, say, 256 samples, which are coded and transmitted together as a block, over the telephone network. Xout (n) and Xin (n) are thus made to include such 20 ms long blocks of samples. The proposed method depicted in Fig. 5, features two inter-correlation building blocks 106 and 107 which are used for the flat delay determination. Ideally, the inter-correlation would be evaluated between the input and output speech sequences Xin(n) and Xout(n), but this computation would require too much processing load. So as to keep the processing load sufficiently low to enable executing other tasks like speech compression/decompression with the available computing power, a two-step determination of the hybrid flat delay is proposed here. The energy of the speech signal Xout is first computed by blocks of 2ms in device 100. The resulting N₁ sample sequence, or output energy block w(n), (N₁=10 values per 20 ms block) is fed into a delay line 102 incorporating N₂ taps. N₂ is chosen so as to check: N₂ x 2 ms ≧ Tmax where Tmax represents the maximum expected hybrid impulse response duration. In practice Tmax < 32 ms, so that N₂ = 16. The signal Xout(n) is also fed into a delay line 103 which comprises Tmax/8KHz (in practice 256) taps, and which will furthermore be used by the echo canceler filter 104. The incoming signal Xin(n) is processed in the same way as the outgoing signal Xout(n). That is, its energy is computed by blocks of 2 ms in device 105 giving a N₁=10 value sequence v(n) per 20 ms block, v(n) thus representing an input energy block. For each 20 ms block, these 10 values are forwarded to a device 106 where the inter-correlation R(k) between the sequences v(n) (n=1,...,N₁=10) and w'(n) (n=1,...,(N₂ + N₁) = 26) Where the last N₁ samples of the w'(n) sequence represent the N₁ samples of the w(n) sequence corresponding to the current block while the N₂ first samples of the w'(n) sequence represent the previous samples delayed by the delay-line 102 is evaluated by: k = 0,...,N₂ By searching the maxima of the R(k) function, one can determine roughly the flat delay FDL in the echo path. The location of the maximum R (k) indicates the rough flat delay value. The echo canceler filter delay line 103 is thus adjusted to provide a rough flat delay portion (FDLx16), otherwise referred to as FDL. The inter-correlation has been computed on energy sequences, where each energy value represents 2 ms of speech (16 speech samples). As mentioned, the goal of this strategy is to decrease the processing load which is reduced to the computation of relation (1) for each 20 ms block. The processing load corresponds to the evaluation of N₂xN₁ products = 16x10 = 160 products per input block, or equivalently 1 product per input 8KHz sample. However, although the processing load is very low, it is clear that once the echo flat delay FDL has been estimated, there always remains a 16 sample incertitude. This incertitude can however be solved in a second step where the inter-correlation of the speech samples themselves is computed in a device 107. This device takes on one hand the incoming samples Xin(n) and on the other hand the outgoing samples Xout (n-FDL) delayed by the roughly estimated delay FDL, and computes another inter-correlation function: k = -N₂,...,N₂ where N₃ can be chosen in the range N₂ < N₃ < N₁xN₂ Note here that negative values for the index of Xout should refer to previous samples stored in delay line 103. Inspection of R'(k) for maximum searching gives an increment or Delta delay (DFDL). This value is used to more accurately adjust the flat delay line 103 with a DFDL variation. In practice, the invention process may further by improved by not using just one single R(k) function directly, but rather considering an histogram of the correlation function peaks. For that purpose, several inter-correlations are cumulated over a given number of successive blocks. Then the FDL value is adjusted to the histogram peak. Also, the process could be again improved by computing R(k) on the sign of the derivatives of the v(n) and w(n) sequences. This enables automatically avoiding any scaling problem which may occur in case of high hybrid gain. Once both FDL and DFDL have been determined the echo canceler filter 104 is actuated with the delay line 103 adjusted to provide a (16 FDL + DFDL) long flat delay ahead of the echo canceler filter 104. Said filter raps are adjusted using echo canceler adaptation means (110) and conventional gradient method. In practice, the flat delay determination requires being computed over a few blocks, say, three to four blocks, i.e. 60 to 80 ms. Therefore, the process could be either processed during the first received talkspurt, or during the transmission of progress and dial-tones. In this case, it is expected that the short-term stationarity of this signals would improve the R(k) analysis. During this so-called learning phase, wherein FDL and DFDL are being computed and the flat delay line adjusted, the system may be operated in the echo suppress mode. For that purpose, the 2 ms block energies v(n) and w(n) are accumulated over 20 ms in devices SUM to provide energy indications respectively designated EL and ER. These two values are used to control an echo suppress switch 108, in a conventional way, by comparing the ratio EL/ER to a given threshold. Should EL/ER be greater than "one", then the echo suppress flag generator 109 generates a zero flag leaving the switch 108 closed. Otherwise, the EL/ER ratio is compared with a predetermined threshold α to decide whether the echo suppress flag should be set to one. In the latter case, an ambiguous situation may occur when EL/ER is close to α. In this case, several consecutive measurements of EL/ER are performed to help confirming or infirming the setting choice.

Claims: A Process for a two-way transmission network wherein a BCPCM encoded output signal Xout(n) to be fed to a terminal may generate a feedback or echo signal within BCPCM encoded incoming signal Xin(n) and wherein an adaptive digital filter is provided to be fed with said output signal to generate an echo replica to be subtracted from said incoming signal, said filter being made to include a filter delay line a portion of which, only, is provided with filter taps and coefficients, the remaining portion providing a so-called flat delay, the process adjusting said flat delay line portion, said process being characterized in that it includes : splitting the outgoing signal samples Xout(n) sequence into first blocks of predetermined time duration ; computing the energy within each first block and deriving therefrom an energy sequence w'(n) ; splitting the incoming signal samples Xin(n) sequence into second blocks of same predetermined time duration ; computing the energy within each second block and deriving therefrom an energy sequence v(n). computing a first inter-correlation function R(k) : with N1 and N2 being predetermined integer values, k = 0, ...., N2 locating k corresponding to the peak of function R(k) whereby said flat delay is set to a rough flat delay FDL corresponding to k multiplied by said predetermined block duration. computing a second inter-correlation R'(k) : with k = -N2, ...., N2 and N3 being integer, with N2>N3>N1.N2 locating the peak of R'(k) and deriving a delta flat delay value DFDL ; and, adding FDL to DFDL to derive the accurate flat delay and adjust the canceler flat delay line accordingly. A process as set forth in claim 1 wherein said first step is repeated a predetermined number of times, an histogram of R(k) peaks is set-up and FDL is adjusted to the histogram peak, prior to computing said second process step. A process according to claim 2, wherein said BCPCM encoded signals are voice signals. Means for adjusting the length of a flat delay line for a voice transmission network including two-to-four-wire conversions achieved by hybrid transformers (H) and echo cancelling means including an echo replica synthesizer including said flat delay line connected to the path of voice signal flowing toward the hybrid transformer and in series with the delay line (103) of an adaptive digital filter, said adjusting means being characterized in that it includes : first block energy means (100) connected to said hybrid transformer for measuring and storing the energies contained within predetermined length successive portions of output signal samples Xout flowing toward the hybrid transformer (H) ; means (102) connected to said first energy means for delaying said Xout related energy values, deriving a w(n) data sequence therefrom ; second block energy means (105) connected to said hybrid transformer means for measuring and storing the energies contained within predetermined length of successive portions of Xin signal samples flowing from the hybrid transformer, thereby deriving a v(n) data sequence ; means (106) connected to said 1st and 2nd energy means for intercorrelating blocks of v(n) an w(n) to derive therefrom a flat delay rough estimation ; means sensitive to said flat delay rough estimation for setting said flat delay line to a first rough length ; accurate flat delay estimation means (107) connected to said flat delay line and to the path of said voice signal flowing from said hybrid transformer, for intercorrelation limited roughly delayed Xout sequences with limited Xin sequences and for deriving therefrom an accurate delta flat delay estimation ; and, means sensitive to said accurate delay estimation for further adjusting said flat delay line length.

Inventors: GALAND, CLAUDE, PLATEL, GUY
Applicants: COMPAGNIE IBM FRANCE, INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1985
Main classification: H04B3
IPC codes: H04B3