HIGH DENSITY MULTILAYER PRINTED CIRCUIT BOARD

Abstract: A high density multilayer printed circuit board compris­ ing signal layers (C), electric source layers (B), and ground layers (G), with insulating layers arranged between the signal layers and the electric source layers, between the electric source layers and the ground layers, and between the ground layers and the signal layers. Conductor portions (5a. 5b, 5c) forming through holes (6a, 6b, 6c) are opened in a perpendicular direction to the signal layers, electric source layers, and ground layers. The conductor portions are electrically connected to the signal layers and/or the electric source layers, and/or the ground layers, through lands (3a, 3b, 3c) thereof, the connections of the lands being substan­ tally equally distributed among the conductor portions.

Description: The present invention relates to a high density multilayer printed circuit board. More particularly, it relates to a high density multilayer printed circuit board providing a number of signal layers, and electric source layers, and possibly but not essentially ground layers. The high speed of electronic computers has made it desirable that a printed circuit board for mounting LSIs be produced at a high density and in a multilayer structure. Until now, although a small number of signal layers can be operated in a printed circuit board, it is not possible to operate more than about ten signal layers. This is because an increase in the number of signal layers inevitably causes a corresponding increase in the numbers of electric source layers and ground layers, giving the resultant printed circuit board an undesirably large thickness. Conventionally when a large number of electric source and other layers is formed as a thick board, the lands of the electric source and other layers are electrically connected to a through hole. This through hole must be formed by a drill, and necessitates the drilling of a hole through a correspondingly large number of copper lands (see e.g. WO 84/02631 and US-A-3 568 000). According to the invention there is provided a multilayer printed circuit board comprising: conductive layers including signal layers and electric source layers; insulating layers arranged between the conductive layers, and conductor portions forming through holes extending in a transverse direction to said conductive layers, said conductor portions being electrically connected to said electric source layers, each conductor portion being connected to a part of an electric source layer of the multilayer printed circuit board and each electric source layer being equally connected to at least one of said conductor portions through lands thereof, connections of said lands being substantially equally distributed among said conductor portions. An embodiment of the present invention may alleviate the above-mentioned problems by providing a high density multilayer printed circuit board, wherein the lands of electric source and other layers connected to through holes are formed in such a manner that these lands are substantially equally distributed in number. Thus, according to a preferred embodiment of the present invention there is provided a high density multilayer printed circuit board comprising: signal layers, electric source layers, and ground layers, with an insulating layer intervened between each signal layer and electric source layer, between each electric source layer and ground layer, and between each ground layer and signal layer; and conductor portions forming through holes opened in a transverse direction to the signal layers, electric source layers, and ground layers, the conductor portions being electrically connected to the signal layers and/or electric source layers and/or ground layers through lands thereof, the connection of these lands being substantially equally distributed among the conductor portions. Reference is made, by way of example, to the accompanying drawings in which: Figure 1 is a schematic cross-sectional view of a conventional multilayer printed circuit board; Fig. 2 is a schematic cross-sectional view of an example of a multilayered printed circuit board according to the present invention; Fig. 3 is a schematic cross-sectional view of another example of a multilayer printed circuit board according to the present invention; and Figs. 4A to 4C are schematic plan views illustrating cut faces taken along the lines X-X, Y-Y, and Z-Z of Fig. 3, respectively. Before describing the preferred embodiments of the present invention, an explanation will be made of the prior art. Figure 1 shows a schematic cross-sectional view of a conventional multilayer printed circuit board having signal layers and electric source layers. As shown in Fig. 1, a plurality of layers 1 form the multilayer circuit board, and each layer 1 has an insulating plate 2 and a land 3 for a conductor pattern. In this multilayer circuit board, signal layers C and electric source layers B are stacked alternately, one upon the other. To form conductor portions, holes 4 are opened in the vertical direction in the stack of the layers 1 and these holes 4 are plated with copper to form through holes 6, so that the lands (conductive areas) 3 formed in the signal layers C and electric source layers B are electrically connected to the conductor portions. When the electric source is the same for each electric source layer B, one through hole 6 I is provided for the electric source so that all of the lands 3 I are electrically connected to the conductor portion of the through hole 6 I , and thus the conductor pattern or land adjacent to the through hole 6 I connecting each electric source layer B can be made the same. However since the lands 3 I of all of the electric source layers B are electrically connected to a conductor portion formed as a through hole 6 I , in addition to the number of lands 3 I a number of insulating plates 2 must be drilled to form the through hole 6 I , by, for example, a drill. This means that a large load is imposed on the drill, and thus the problems of drill bit breakage and bends in the through hole occur. Furthermore, when the number of signal layers is increased, adjacent signal layers C must be brought closer together, causing mutual interference between the layers C and increasing the occurrence of noise. To prevent this occurrence of noise, ground layers are arranged at intervals between the signal layers C, and since these ground layers are of copper and can be made to have the same conductor pattern, the lands of the ground layers can be electrically connected to the conductor portion formed as a through hole 6 I . However, although the addition of the ground layers reduces the occurrence of noise, it increases the problem of the heavy load already imposed on the drill when drilling the signal layers C. Figure 2 shows a schematic cross-sectional view of an example of a printed circuit board according to the present invention. As shown in Fig. 2, a multilayer printed board has signal layers C and electric source layers B, B₁ , ..., B₆ having the same electric source, for example, 4 V. The signal layers C and the electric source layers B, B₁ , ..., B₆ are alternately stacked to form a packaged multilayer printed circuit board. Further, three through holes 6a, 6b, and 6c are provided as conductors for the electric source supply. Lands 3a, 3b, and 3c of the uppermost (or first) electric source layer B are electrically connected to the conductor portions 5a, 5b, and 5c forming the through holes 6a, 6b, and 6c, respectively. In this embodiment of the present invention, the land 3a of the second electric source layer B₁ , is also electrically connected to the conductor portion 5a forming the through hole 6a; the land 3b of the third electric source layer B₂ is electrically connected to the conductor portion 5b forming the through hole 6b; and the land 3c of the fourth electric source layer B₃ is electrically connected to the conductor portion 5c forming the through hole 6C. In turn, the lands of the electric source layers B₄ , B₅ , and B₆ are also electrically connected to the conductor portions 5a, 5b, and 5c, respectively. Thus, all of the lands are electrically connected to the conductor portions in such a manner that the conductor pattern thereof is equally distributed. Accordingly, in this example of a printed circuit board according to the present invention, the number of lands connected to each through hole is substantially decreased to 1/3 of the number connected in the conventional manner. Figure 3 shows a schematic cross-sectional view of another example of a printed circuit board according to the present invention, and Figures 4A to 4C are schematic plan views illustrating cut faces taken along the lines X-X, Y-Y, and Z-Z of Fig. 3, respectively. As shown in Figs. 3 and 4, ground layers G, G₁ , ..., G₆ are arranged at intervals between signal layers C. In this example, through holes 7a, 7b, and 7c are provided for connection of the ground layers, in addition to the through holes provided for connection of the signal layers C and electric source layers V1, V2. In this embodiment of the present invention, the lands 8a, 8b, and 8c of the uppermost ground layer G are electrically connected to the conductor portions 5a, 5b, and 5c forming through holes 7a, 7b, and 7c, respectively, as shown, particularly, in Fig. 4A. As can be seen from Figs. 3, 4B, and 4C, the land 8b of the ground layer G1, is electrically connected to the conductor portion 5b forming a through hole 7b, and the lands 8a and 8c of the ground layer G₂ are electrically connected to the conductor portions 5a and 5c forming through holes 7a and 7c. In turn, the lands of ground layer G₃ , G₄ ..., G₆ are connected in a substantially equally distributed pattern to the respective conductor portions. The number of through holes and the grouping of the lands, is not particularly critical.

Claims: A multilayer printed circuit board (1) comprising: conductive layers including signal layers (C) and electric source layers (B,V); insulating layers (2) arranged between the conductive layers, and conductor portions (5a,5b,5c) forming through holes (6a,6b,6c) extending in a transverse direction to said conductive layers as conductors for the electric source supply, said conductor portions being electrically connected to said electric source layers (B,V), each conductor portion being connected to a part of an electric source layer of the multilayer printed circuit board and each electric source layer (B,V) being connected to at least one of said conductor portions (5a,5b,5c) through lands (3a,3b,3c,) thereof, connections of said lands (3a,3b,3c) being substantially equally distributed among said conductor portions (5a,5b,5c). A multilayer printed circuit board according to claim 1, wherein the conductive layers further include ground layers (G). A multilayer printed circuit board according to claim 2, wherein other conductor portions (5a,5b,5c) forming through holes (7a,7b,7c) are electrically connected to said ground layers (G), each ground layer being connected to at least one of said conductor portions through lands (8a,8b,8c) thereof, connections of said lands being substantially equally distributed among said conductor portions. A multilayer printed circuit board according to claim 2 or 3, wherein the insulating layers (2) are arranged between the signal layers (C) and the electric source layers (V) and between the electric source layers (V) and the ground layers (G) and between the ground layers (G) and the signal layers (C). A multilayer printed circuit board according to any preceding claim, wherein connections of said lands (3a,3b,3c) of said electric source layers (B,V) are substantially equally distributed among said conductor portions (5a,5b,5c) forming three through holes. A multilayer printed circuit board according to claim 3, or claim 4 or 5 when appended to claim 3, wherein connections of said lands (8a,8b,8c) of the ground layers (G) are substantially equally distributed among conductor portions (5a,5b,5c) forming three through holes.

Inventors: KUWABARA, KIYOSHI, NISHIHARA, MIKIO, TSUNOI, KAZUHISA
Applicants: FUJITSU LIMITED
Application year: 1985
Main classification: H05K1
IPC codes: H05K3, H05K1