SEMICONDUCTOR STRUCTURE HAVING ALPHA PARTICLE RESISTANT FILM AND METHOD OF MAKING THE SAME

Abstract: An applique of a prepatterned film of alpha particle resistant material, such as polyimide, is applied to a semiconductor wafer. The prepatterned film covers only the critical areas e.g. those affected by alpha particle impinge­ ment. Bond pads and scribe streets are not covered by the applique.

Description: SEMICONDUCTOR STRUCTURE HAVING ALPHA PARTICLE RESISTANT FILM AND METHOD OF MAKING THE SAME BACKGROUND OF THE I#7ENTION The present invention relates generally to integrated circuit devices, and more particularly, to a method for making 2 semiconductor structure having an alpha particle resistant film and to such semiconductor structures. In the mar:#facture of integrated circuits, semiconductor wafers containing many separate integrated circuits are fabricated and then cut into individual integrated circuits, often individually referred to as die. It is well known that the die may be adversely affected by alpha particles, such as those alpha particles which are emitted from metals, ceramics, as well as some plastic materials. When such alpha particles impinge on a semiconductor memory cell, a chance may result in the state of a Wit within n the memory cell, resulting in a oheno..,enon known in the industry as a nscSt bit error". Although this type of error may be corrected using known error correction and detection schemes, multiple "soft bit errors may create conditions in which suoh schemes are unable to provide a desired correction. Thus, it is desirable to protect integratec cIrcuit die which are subject to degradation by alpha particles The need to provide alpha particle protection has become more critical as the density of integrated circuits increases. Although there are available methods for providing some degree of alpha particle protection, none of these methods is totally satisfactory inasmuch as such methods present certain disadvantages and/or require cumbersome processing techniques. For example, one technique includes the application of liquid polymide on the individual die after the die has been attached to a substrate and wire bonded. This technique requires substantial labor while providing a high die rejection rate. Further, this licuid system does not reliably provide a sufficient thickness of the protective coating near the edges of the area to be protected. Other techniques attempt to screen print liquid polyimide in a pattern on the semiconductor wafer itself However, such techniques have een hampered fry the inability to print polymide in sufficient thicknesses. Generally, in addition to their nigh failure rate, steps of dispensing and applying liquid Cr paste are difficult to automate. Accordingly, it is a general object of this invention to provide an improved method for providing a semiconductor structure with alpha particle resistance and t provide suc semicondutor structures. Another object ne ¯.e resent invention is to provIde such a method and structure which reduced the problems involved in the use of paste or liquid alpha particle resistant materials. In one embodiment of this invention it is a further object to provide such a method which can be automated. SUMMARY OF THE INVENTION In one form of the invention, a method is provided for making a semiconductor structure. The method includes the step of providing a semiconductor wafer including a plurality of integrated circuits therein. The wafer has a pair of opposing major surfaces. One of the surfaces includes a plurality of device regions which are subject of degradation by alpha particles. The method includes a step of applying a preformed alpha particle resistant film to predetermined ones of the device regions. In another aspect of the invention, a semiconductor structure is provided which includes a semiconductor wafer having a pair of opposing major surfaces, one of which includes a plurality of integrated circuit device regions. The structure includes a preformed layer of an alpha particle resistant film disposed on predetermined ones of the device regions. BRIEF DESCRIPTION OF THE DRAWINGS For better understanding of the invention, reference may be had to the following description, taken in conjunction with the accompanying drawings, wherein; Figure 1 is an isometric view showing an exemplary semiconductor wafer including a plurality of integrated circuits therein. Figure 1A is a sectional view taken along line A-A of Figure 1. Figure 2 is an isometric view showing one form of the present invention in which an alpha particle resistant film is disposed on a carrier film for subsequent use in the method of the present invention. Figure 3 is an isometric view, taken as in Figure 2, showing the alpha particle resistant film after it has been patterned in accordance with one form of the method of the present invention. Figure 4 is an isometric view, showing one form of the method of the present invention in which the patterned alpha particle resistant film is aligned with respective critical cell regions of the integrated circuits. Figure 5 is an isometric view showing one form of the semiconductor structure of the present invention after the patterned alpha particle resistant film is applied to critical cell regions of the integrated circuit. Figure 5A is a sectional view taken along line A-A of Figure 5 showing one form of the semiconductor device of the present invention which now includes an alpha particle resistant film portion attached to the critical cell regions thereof. DETAILED DESCRIPTION OF THE INVENTION Referring initially to Figure 1, an exemplary semiconductor wafer 10 includes G plurality of integrated circuit devices 12, individually referred to as die. Each of the integrated circuit devices 12 includes a critical cell region 14 e.g., memory region, and a plurality of bond pads 16. As is well known, scribe lines 18 are later used in separating e.g. sawing, the wafer 10 so as to result in a plurality of individual die 12, such as shown in Figure 1A. For purposes of clarity, although only a few Exemplary integrated circuits 12 are shown in Figure 1; a typical wafer may include as many as two thousand integrated circuits 12, each having as many as twenty four bonding pads 16 attached thereto. As described previously, the critical cell region 14 of the integrated circuit 12 is often subject to degradation by alpha particles. Referring now to Figure 2, in accordance with one form of the method of the present invention, an alpha particle resistant material is provided in the form of a film 20. The alpha particle resistant film 20 is of an area at least as great as, preferably greater than, the semiconductor wafer 10. The alpha particle resistant material is selected from those well known materials which have an alpha particle resistance in the range of from greater than about OMEV to about 10 MEV. Preferably, the alpha particle resistant material comprises a fully imidized polyimide, such as the one commercially available from Dupont under the designation TM Kapton. Typically, the thickness of the film 20 is in the range of from about 50 microns to about 100 microns, preferably about 75 microns. For handling ease, a major surface 20a of the alpha particle resistant film 20 is shown as being removably disposed on a surface 22a of carrier film 22 which may, for example, comprise a 'material such as polyoelefin. The remaining major surface 20b of the alpha particle resistant film 20 is subsequently used to contact the critical cell regions 14 in a manner to be described later. This remaining surface 20b is preferably coated with a thermal cure adhesive 24, resulting in the structure shown in Figure 2. An exemplary thermal cure adhesive 24 comprises acrylic adhesive, commercially available under the designation Rogers 10,000 from Rogers Corp. Next, as shown in Figure 3, an appropriate pattern corresponding to the pattern of critical cell regions 14 in Figure 1, is provided in the alpha particle resistant film 20. This results in a plurality of alpha particle resistant film portions 20p, each of which respectively correspond to the critical cell regions 14 shown in Figure 1. Next, as shown in Figure 4, the now patterned alpha particle resistant film 20 (film portions 20p) is aligned with the semiconductor wafer 10 such that each of the critical cell regions 14 of the wafer 10 is respectively aligned with an alpha particle resistant film portion 20p. For handling convenience, it is preferable to employ a wafer carrier 11, which may, for example, comprise interlocking rings. The alignment is typically obtained through the use of well known techniques such as optical alignment. When the alignment is completed, the structures shown in Figure 4 are brought together and heat and pressure may be applied to secure the alpha particle resistant film portions flp to the critical cell regicns 14. For example, heat in the range of from about 100 C to about 300 C and pressure In the range of from about 1 PSI to about 30 PSI may be applied. After the film portions 20p have been bonded to the critical cell regions 14, the carrier film 22 is removed, e.g., peeled off, resulting in the structure shown in Figures 5, SA. At this point in the method, it is preferable to fully cure and bond the remaining film portions 20p to the critical cell regions 14. For example, such curing and bonding may include the application of heat in the range of from about 2750 to 450 C. Thus, as shown in Figure SA, predetermined ones (critical cell regions 14) of the integrated circuits 12' now include an alpha particle resistant film 20p attached thereto. The individual die 12' may then be tested, identified and separated in the usual manner e.g. sawed. Although the present invention has been described as using a polyimide material for the alpha particle resistant film 20, other materials may be substituted therefor. For example, such materials may include polyester. In addition, although the invention has been described in connection with integrated circuit devices in which the critical cell region comprise a single central region, certain applicaticns may present more complex critical cell region configurations and/or a plurality of separate such regions for #ndivic-ual integrated cell devices. In this connecticn, the Invention is equally applicable to such configurations inasmuch as conventional techniques can be utilized to provide the desired pattern in the alpha rart cle resistant film prior to application of such film to the semiconductor wafer. Further, although the present invention has been described as including a carrier film for the alpha particle resistant film in which the carrier film comprises polyoelefin, other materials may be substituted therefor. For example, one such material is poly-vinyl-chloride. However, it is preferable that the carrier film and the alpha particle resistant film have a relation therebetween wherein the alpha particle resistant film has a relative release characteristic in which it is more strongly attachec to the critical cell regions and less strongly attached to the carrier film. It is apparent that an advantage of the present invention is that custom patterning is provided for each selected- integrated circuit device such that only the critical cell areas are covered. Thus, bond pads, scribe streets, etc. are not covered by the film. Another advantage of this invention is that, after the application and cure of the alpha particle resistant film portions, probe testing can still be performed. This is in contrast to conventional techniques in which bond pads are covered by an insulating material. Another advantage of the present invention is, that in addition to providing alpha protection, t:#e process provides protection to the device from mechan-ca'¯o caused damage. This is particularly mportant when assemhlv processes are e.r oved which result in contact to the active (first) surface of the device. ile the present invention has been described with reference to specific embodiments thereof, it will be obvious to those skilled in the art that various changes and modifications may be made without departing from the invention in its broader aspects. It is contemplated in the appended claims to cover all variations and modifications of the invention which come within the true spirit and scope of our invention.

Claims: What is claimed is: 1. A method of making a semiconductor structure, comprising the step of: providing a semiconductor wafer including a plurality of integrated circuits therein, said wafer having a pair of opposing major surfaces, one of the surfaces including a plurality of device regions which are subject to degradation by alpha particles, and characterized by the step of: applying a preformed alpha particle resistant film to predetermined ones of the device regions. 2. A method in accordance with Claim 1 characterized in that the alpha particle resistant film comprises a material which has an alpha particle resistance in the range of from greater than about 0 MEV to about 10 MEY. 3. A method in accordance with Claim 1 or 2 characterized in that the step of applying the alpha particle resistant film includes the step of providing a predetermined pattern on the film wherein the pattern includes a film portion for each of the predetermined ones of the device regions. 4. A method in accordance with Claim 3 characterized in that the step of providing the predetermined pattern is performed prior to the step of applying the alpha particle resistant film to the predetermined ones of the device regions. 5. A method in accordance with any of Claims 1 to 4 wherein the alpha particle resistant film includes a pair of opposing major surfaces, and characterized by the step of providing a carrier film having a major surface thereof for removably receiving one of the surfaces of the alpha particle resistant film. 6. A method in accordance with Claim 5 characterized by the step of providing the other major surface of the alpha particle resistant film with an adhesive prior to the step of applying the alpha particle resistant film to the predetermined ones of the device regions. 7. A method in accordance with Claim 6 characterized in that the alpha particle resistant film has a relative release characteristic wherein it is more strongly attached to the predetermined ones of the device regions and less strongly attached to the carrier film. 8. A method in accordance with any of Claims 1 to 7 \characterized in that the alpha particle resistant film comprises polyimide. 9. A method in accordance with any of Claims 1 to 8 characterized in that the alpha particle resistant film has a thickness of from about 50 microns to about 100 microns. 10. A method in accordance with any of Claims 5 to 9 characterized in that the carrier film comprises polyoelefin. 11. A method in accordance with any of Claims 5 to 10 characterized in that the carrier film comprises poly-vinyl-chloride. 12. A method in accordance with any of Claims 1 to 11 characterized by the step of probe testing at least some of the plurality of integrated circuits after said alpha particle resistant film is applied. 13. A method in accordance with Claim 12 characterized by the step of separating individual ones of the integrated circuits after the step of probe testing. 14. A semiconductor structure made by the method of any of Claims 1 to 13. 15. A semiconductor structure, which comprises: a semiconductor wafer having a pair of opposing major surfaces, one of the major surfaces including a plurality of integrated circuit device regions; and characterized by a preformed alpha particle resistant film disposed on predetermined ones of the device regions. 16. A structure in accordance with Claim 15 characterized in eht the film is adhesively bonded to the predetermined ones of the device regions. 17. A structure in accordance with Claim 15 or 16 characterized in that the film comprises polyimide having a thickness of from about 50 microns to about 100 microns. 18. An integrated circuit structure, which comprises: a semiconductor structure having a pair of opposing surfaces, one of the surfaces including at least one device region which is subject to degradation by alpha particles; and characterized by a preformed alpha particle resistant film disposed on the device region. 19. A structure in accordance with Claim 18 characterized in that the film is adhesively bonded to the device region. 20. A structure in accordance with Claim 18 or 19 characterized in that the film comprises polyimide having a thickness of from about 50 microns to about 100 microns.

Inventors: BRUEGGEMAN, MICHAEL, CLARK, JAMES, PHY, WILLIAM
Applicants: FAIRCHILD SEMICONDUCTOR CORPORATION
Application year: 1985
Main classification: H01L23
IPC codes: H01L23