APPARATUS FOR PROCESSING IMAGE SIGNAL

Abstract: The invention relates to a method for processing an image signal such that areas of original image data are sequentially scanned with a scanning window having a size corresponding to M picture elements in units of a predeter­ mined number of picture elements so as to perform halftone display in accordance with black-and-white binary distribu­ tion with respect to the signal levels of the picture elements within the scanning window every time the scanning win­ dow is moved. The picture elements within the scanning window are assigned an order of preference in accordance with their image signal levels. A sum of the image signal levels of the picture elements within the scanning window is calculated, and A and N of the equations S = C × N + A are calculated, where C is a predetermined image signal level (e.g., black level and maximum level), N is an integer, and A is the image signal level falling within the range O ≦ A < C As a result of the preference operation, N picture elements are assigned a level C, the next picture element is assigned a level A, and the remaining picture elements, O. In order to impart regularity to the converted image signal distribution, additional data is added to the preference data.

Description: BACKGROUND OF THE INVENTION The present invention relates to an apparatus for processing an image signal having functions of halftone image reproduction in binary. Recently, facsimile systems have become frequently used in daily business. There arises a demand for halftone reproduction of pictorial images in addition to back-and-white binary reproduction of documents or the like. However, halftone reproduction often has many restrictions from the viewpoints of recording apparatuses and transmission systems. For example, an apparatus for recording an image on a silver chloride film used in conventional photography or a heat-sensitive printing apparatus has good recording characteristics for halftone recording. However, an electrostatic copying machine or an ink jet printing apparatus has good characteristics for binary recording. On the other hand, regarding transmission systems, digital data transmission is taking over from analog data transmission. In this field, data compression schemes are used to perform high-speed data transmission. Under these conditions, a pseudo halftone display system having a binary recording apparatus is proposed, which is suitable for digital data transmission, thereby providing an optimum fascimile system. An electronic halftone-dot generating method for a printed image in a newspaper or magazine and a dither method for digitizing or quantizing an image signal in accordance with a threshold matrix table are typical examples of a pseudo halftone display system. However, these conventional methods have poor resolution of a two-valued (binary) image such as a character or line. Therefore, the halftone portion or binary image portion cannot help but be sacrificed. For example, according to the dither method, in a threshold window consisting of a threshold pattern of a plurality of different threshold levels, a multilevel input image signal is compared with the threshold levels in units of picture elements. When a given picture element level of the original image data exceeds the corresponding threshold, the picture element is set to "black". Otherwise, the picture element is set to "white". In this manner, each picture element is converted to binary data. When a 4 x 4 matrix window is used, 16 threshold levels can be set. Therefore, halftone display having 17 levels can be performed for the original image data. In this manner, according to the conventional dither method, black elements appear in each threshold window in a number corresponding to the original image data levels, so as to represent an average half tone mode. When the window size is small, the displayed image has good resolution. In this case, however, the number of halftone levels is decreased. On the other hand, if the window size is large, the number of halftone levels is increased. However, in this case, resolution is degraded. In addition to this disadvantage, the quality of a reproduced image of a binary original image portion is degraded in accordance with the conventional dither method, as compared with general binary processing. Some of inventors of this application previously invented an apparatus and a method for converting halftone image signals into binary signals. The method is now patent pending in United States and other countries (US patent application serial no. 501,873, corresponding to US-A-4538184, published on 27/08/1985; British patent publication GB-A-2,129,652, etc.) In this method every picture element is successively scanned by scanning an (nxn) window over the original image data and reconstructing black picture elements in the scanning window for a corresponding region on the original image. This method realizes binary data reproduction with no moire pattern, but it is not sufficient to obtain both of high resolution and multiple halftone levels. SUMMARY OF THE INVENTION It is, therefore, an object of the present invention to provide an apparatus for processing an image signal so as to provide a displayed/recorded image of good image quality for both a binary image and a halftone image. It is another object of the present invention to provide an apparatus for processing an image signal to obtain pseudo halftone reproduction compatible with both of high resolution and multiple halftone levels. According to the present invention, there is provided an apparatus for processing an image signal comprising, first and second image signal memory means for storing image signal levels of picture elements which are obtained by scanning an original image in a divided manner; means for calculating a sum S of error correction data, E a , and a value S m , S m being a sum of the image signal levels of all picture elements within a first scanning window, W r , which has a size corresponding to M picture elements and which scans said first image signal memory means, and for obtaining N and A from equation S = (C x N) + A where C is a predetermined image signal level, N is an integer falling in a range O ≦ N ≦ M, and A is an image signal level falling in a range O ≦ A < C; preference circuit means for numbering all picture elements within a second scanning window, W o , which has a size corresponding to M picture elements and which scans said second image memory means, the numbering being in accordance with either an ascending or a descending order of the image signal levels of said picture elements within the second scanning window, W o at least one of the image signal levels of said picture elements in the second scanning window, W o , having additional data added thereto; rearrangement circuit means for assigning C, as image signal level, to the first (or last) N picture elements of the M picture elements in the first scanning window, W r , of said first image signal memory means numbered by said preference circuit, assigning A, as image signal level, to the next (or next last) numbered picture element of said M picture elements in the first scanning window, W r , and assigning O, as image signal level, to the remaining picture elements in the first scanning window, W r , of said first image signal memory means; means for comparing the assigned image signal level of a selected one of the picture elements R oo , in the first scanning window, W r , with a predetermined quantizing level V for O ≦ V < C, and for assigning C as the level of a binary image signal when the assigned image signal level of said selected picture element R oo , in the first scanning window, W r , is greater than the quantizing level, V, and assigning O as the level of the binary image signal when the assigned image signal level of said selected picture element, R oo , in the first scanning window, W r , is smaller than the quantizing level, V, and calculating the error correction data, E a , from the difference of the assigned image signal level of the selected picture element, R oo , in the first scanning window, W r , and the assigned level of the binary image signal; and third memory means; characterised in that the at least one of the image signal levels of the picture elements in the second scanning window W o , having additional data added thereto comprises one of said picture elements, O oo , having neighbourhood correction data, E b , added thereto; the third memory means is for storing preference correction data, E cm ; and that there is further provided a first calculating means for calculating neighbourhood correction data, E b , from preference correction data, E cm , read out from the third memory means, said preference correction data, E cm , being within a third scanning window, W e , which has a size corresponding to at least M picture elements, arranged to include preference correction data for locations corresponding to M picture elements in the neighbourhood of the selected picture element, R oo , in said first scanning window, W r , and which third scanning window, W e , scans the third memory means; and a second calculating means for calculating renewed preference correction data, E c , to be stored in the third memory means at an address corresponding to the selected picture element, R oo , in the first scanning window, W r , the renewed preference correction data, E c , being calculated from the preference correction data, E cm , read out from said third memory means, the assigned binary image signal level and the image signal level of a selected picture element, O oo , in said second scanning window, W o , corresponding to the selected picture element, R oo , in said first scanning window, W r . BRIEF DESCRIPTION OF THE DRAWINGS The present invention will now be described in further detail with reference to the accompanying drawings, in which: Fig. 1 is a block diagram of an image signal processing apparatus of the first embodiment of the present invention; Fig. 2 is a block diagram of the preference circuit of Fig. 1; Fig. 3 is a flow chart for explaining processing steps of the embodiment of Fig. 1; Fig. 4 is a block diagram of an image signal processing apparatus of the second embodiment of the present invention; Fig. 5 is a flow chart for explaining processing steps of the embodiment of Fig. 4; Fig. 6 is a block diagram of an image signal processing apparatus of the third embodiment of the present invention; Fig. 7 is a flow chart for explaining processing steps of the embodiment of Fig. 6; Fig. 8 is a block diagram of an image signal processing apparatus of the fourth embodiment of the present invention; Fig. 9 is a flow chart for explaining processing steps of the embodiment of Fig. 8; Fig. 10 is a block diagram of an image signal processing apparatus of the fifth embodiment of the present invention; Fig. 11 is a flow chart for explaining processing steps of the embodiment of Fig. 10; Fig. 12 is a block diagram of an image signal processing apparatus of the sixth embodiment of the present invention; Fig. 13 is a flow chart for explaining processing steps of the embodiment of Fig. 12; and Fig. 14 is a block diagram of an image signal processing apparatus of the seventh embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION Through this specification and drawings, size M of the scanning windows is fixed to 4. The picture element addresses in the first scanning window are denoted with symbols R₀₀, R₀₁, R₁₀ and R₁₁. Similarly, the picture element addresses in the second scanning window are denoted with symbols O₀₀, O₀₁, O₁₀ and O₁₁. In the third memory, a predetermined address (the refered address) is denoted with symbol E c5 , and the neighbourhood addresses are E c1 , E c2 , E c3 and E c4 . The picture element addresses R₀₀, O₀₀ and the address E c5 correspond to the same picture element. Defined R₀₀, R₀₁, R₁₀ and R₁₁ as a scanning window W r , O₀₀, O₀₁, O₁₀ and O₁₁ as a scanning window W₀, and E c1 , E c2 , E c3 , E c4 and E c5 as a scanning window W e respectively. The scanning windows W r , W o and W e are shifted right in synchronism with bin scan of scanner 1. Fig. 1 illustrates the first embodiment of the present invention. In Fig. 1, numeral 1 denotes a scanner which scans original and outputs image signal level as digital signal. The scanner 1 is almost same as those disclosed in United States patent application 501,873 or British patent publication 2,129,652. The output signal from the scanner is supplied to a rearrangement memory 2 and a preference memory 4. The rearrangement memory 2 stores the output signal from the scanner 1 and output signal from a data rearrangement circuit 6 and outputs image signal levels of four picture elements R₀₀, R₀₁, R₁₀ and R₁₁ in the scanning window W r . A rearrangement value operator 3 calculates a sum S of an error correction data E a from a comparator 7 and a sum S m of the image signal levels of four picture elements R₀₀, R₀₁, R₁₀ and R₁₁ , from the rearrangement memory 2, and obtaining N and A from following equation S=CxN+A , where C is a predetermined image signal level, N is an integer falling in a range O ≦ N ≦ M, and A is an image signal level falling in a range O ≦ A ≦ C. The preference memory 4 receives image signal of original from the scanner and outputs image signal levels of four picture elements O₀₀, O₀₁, O₁₀ and O₁₁ in the scanning window w o . The image signal levels from the preference memory 4 are supplied to a preference circuit 5 to which neighbourhood correction data E b is supplied from a multiplier 83. The preference circuit determines preference order of the four picture elements by comparing image signal levels of the four picture elements, to O₀₀ picture element of which neighbourhood correction data E b is added from a multiplier 83, in accordance with one of ascending and descending orders of the image signal levels. A data rearrangement circuit 6 receives data N and A from the preference value operator 3 and assign C as an image signal level to N picture elements of four picture elements in the scanning window W r in order determined by the preference circuit 5, A as an image signal level to a next picture element, and O as an image signal level to remaining picture element. Numeral 7 denotes a comparator which compares image signal of rearranged picture element R₀₀ from the rearrangement memory 16 with a predetermined quantitizing level V, where O ≦ V < C, and outputs C as image signal level to be recorded or displayed when the image signal R₀₀ is greater than the level V, and outputs O as image signal level to be recorded or displayed when the image signal R₀₀ is smaller than the level V. At the same time, the comparator 7 outputs error correction data E a which is the difference between the image signal R₀₀ and the output signal of the comparator 7. Numberal 8 designates a preference correction means which receives image signal level of the picture element O₀₀ from the preference memory 4, output image signal level of the comparator 7, and preference correction data E cm from a correction data memory 9 and calculates neighbourhood correction data E b and preference correction data E c to be renewed. The renewed correction data E c is stored into address E c5 of the correction data memory 9. The output signal from the comparator 7 is supplied to a recording or display apperatus 10 to record or display binary image. The apparatus 10 may be same as that disclosed in United States patent application 501,873. The preference correction means 8 comprises a subtracter 81 for subtracting the output signal level of the comparator 7 from the image signal level of the picture element O₀₀ in the scanning window W₀, an average operator 82 for calculating average E ca of four preference correction data E c1 , E c2 , E c3 and E c4 in the scanning window W e , a first multiplier 83 for multiplying a predetermined coefficient Ka to the average E ca , a second multiplier 84 for multiplying a predetermined coefficient K b to the average E ca , and an adder 85 for adding the output of the multiplier 84 and the output of the subtracter 81. In Fig. 1, the constructions and operations of the scanner 1, the rearrangement memory 2, the rearrangement value operator 3, the preference memory 4, the preference circuit 5, the data rearrangement circuit 6, the comparator 7 and the recording or display apparatus 10 are substantially same as those of United States patent application 501,873 or British patent publication 2,129,652. Fig. 2 illustrates a block diagram which realizes the part including from the rearrangement memory 2 to the correction data memory 9 of Fig. 1 with a microcomputer. Image signal level of original obtained from the scanner 1 is supplied to an input terminal 11. Input port 12 is a gate circuit which supplies image signal level from the input terminal 11 to CPU13 (central processing unit) in accordance with a selective signal given from the CPU13 through a signal line 14. ROM 15 (read only memory) stores a program for controlling the CPU13. In accordance with the program, the CPU takes in necessary data from the input port 12, performs predetermined operations by giving and taking data between RAM16 (random access memory), and supplies output data to output port 17. The output port 17 is a latch circuit which stores data temporarily in accordance with a control signal given from the CPU 13 through a signal line 18. The data stored in the output port 17 are took out to an output terminal 19 as a binary image signal to be recorded or displayed. The CPU13, ROM15 and RAM16 can be constructed by wellknown microcomputer. Fig. 3 illustrates a flow chart corresponding to the program stored in the ROM15. When the program starts, the contents of the rearrangement memory 2, the preference memory 4 and the correction data memory 9 and error correction data E a are cleared (ST EP 1). In STEP 2, the image signal of the original is written into the address of picture element R₁₁ of the rearrangement memory 2 and the address of picture element O₁₁ of the preference memory 4. In STEP 3, the rearrangement value operator 3 calculates a sum S of the error correction data E a and a sum Sm of the image signal levels of picture elements R₀₀, R₀₁, R₁₀ and R₁₁ within the scanning window W r of the rearrangement memory 2, and operates integer N and remainder A from equation S=CxN+A . In STEP 4, the average operator 82 calculates an average E ca of four preference correction data E c1 , E c2 , E c3 , and E c4 within the scanning window W e of the correction data memory 9, and the average E ca is multiplied by the predetermined coefficient K a in the multiplier 83 to obtain neighboured correction data E b (=K a x E ca ) . The coefficient Ka is, for example, 1/2 n , where n is an integer. In STEP 5, the preference circuit 5 adds the neighbourhood correction data E b to the image signal level of the picture element O₀₀ within the scanning window W o of the preference memory 4, and determines rearranging order of four picture elements O₀₀, O₀₁, O₁₀, and O₁₁ in descending order by comparing the image signal levels thereof. In step 6, the data rearrangement circuit 6 rearranges N predetermined image signal level C, the remainder A and O which are obtained in STEP 3, as image signals of four picture elements R₀₀, R₀₁, R₁₀ and R₁₁ within the scanning window W r of the rearrangement memory 2 according to the order obtained in STEP 5. In STEP 7, the comparator 7 converts the image signal of the rearranged picture element R₀₀ from the rearrangement memory 2 into binary image signal with the quantitizing level V, and the difference between the image signal of the picture element R₀₀ and the converted binary signal is supplied to the rearrangement value operator 3 as a renewed error correction data E a for next STEP 3. In STEP 8, the preference correction means 8 calculates the product of the coefficient K b and the average E ca obtained in STEP 4 by the multiplier 84, and adds the product to the difference between image signal level of the picture element O₀₀ in the scanning window W o and the binary image signal level from the comparator 7, which is calculated by the subtracter 81, in the adder 85 to produce renewed preference correction data E c which is to be stored in the picture element E c5 within the scanning window W e of the correction data memory 9. In STEP 9, the binary image signal from the comparator 7 is supplied to the display apparatus 10. In STEP 10, it is judged whether the above processes are ended relating to all of image signals of original in both of main and sub scans. If the processes are not ended, the scanning windows W o , W r and W e are moved and the STEP 2 to STEP 10 are repeated. In this case, the error correction data E a is cleared in every end of main scans in STEP 11. When the coefficient K a is 1/2 n and K b is 1-1/2 m , when n and m are positive integers, the operations in the microcomputer become easy. The microcomputer may be replaced by logic circuits and memories. In this case, the hardware can be simplified by using the above valued coefficients K a and K b (i.e. K a = 1/2 n and K b = 1-1/2 m , where n and m are positive integers). Fig. 4 illustrates another embodiment of the present invention. In Fig. 4, a signal adder 20 is provided between the scanner 1 and the preference memory 4. The signal adder 20 adds a periodic signal to the stream of picture elements of the original image output from scanner 1, in synchronism therewith; the periodic signal having a signal level different from that of the original image signal from the scanner 1. The signal adder 20 is substantially the same as that shown in British Patent Publication GB-A-2,129,652. Other portions of Fig. 4 are the same as those of Fig. 1. In this embodiment, the periodic signal is superposed on the original image signal as shown in STEP 2 of Fig. 5. The remaining steps are the same as those in Fig. 3. The embodiment improves visual characteristics of the reproduced image with diverging error data in the additive signal. When a random signal is superimposed as the additive signal, the improvement of moire signal or reproduction of image having special effect are obtained. Fig. 6 illustrates a third embodiment of the present invention. A compensator 21 is provided between the comparator 7 and the recording or display apparatus 10. The compensator 21 selects the binary image signal from the comparator 7 in accordance with the image signal level of the picture element O₀₀ within the scanning window W o of the preference memory 4. Other portions of Fig. 6 are same as those of Fig. 1. In the operation shown in Fig. 7, STEP 9 is newly added after renewing E c in STEP 8, which corresponding to STEP 8 of Fig. 3. In STEP 9 of Fig. 7, the compensator 21 compares the image signal level of the picture element O₀₀ in the scanning window W o of the preference memory 4 with predetermined low level value Tl and high level value Th, and selects onput signal level as below. (1) Output O when O₀₀ ≦ Tl ; (2) Output C when O₀₀ ≧ Th ; (3) Output the binary image signal from the comparator 7 when Tl < O₀₀ < Th ; where O₀₀ is the image signal level of the picture element O₀₀, and C is a predetermined recording level, which usually corresponds to maximum recording level. The embodiment suppresses noises contained in high and low level of the binary image signal. Fig. 8 illustrates a fourth embodiment of the present invention. In Fig. 8, the constructions and/or connections of the rearrangement memory 22, the rearrangement value operator 23 and the data rearrangement circuit 26 are different from those of Fig. 1. Other portions are same as those of Fig. 1. The rearrangement memory 22 receives rearrangement image signal level from the data rearrangement circuit 26, and stores upper U bit of the rearrangement image signal level in three picture element R₀₀, R₀₁, and R₁₀ within the scanning window W r , and supplies the stored upper U bit signal to the rearrangement value operator 23. A value Su is obtained by inserting O to each of lower bit, L, of a sum of the three image signal levels of the picture elements R₀₀, R₀₁, and R₁₀ from the rearrangement memory 22. The rearrangement value operator 23 calculates a sum of S of the value S u , error correction data E a from the comparator 7, image signal level F o of the original from the scanner 1, and rearrangement correction data S₁, from the data rearrangement circuit 26, and obtains N and A from S=CxN+A similarly to the case of Fig. 1. The data rearrangement circuit 26 comprises means for determining the arrangement of the N picture elements which are assigned values C, and for the remaining picture elements which are assigned values A and O in accordance with the preference order designated by the preference circuit 5, means for storing upper U bits data of the image signal levels for rearrangement into three picture elements R₀₁, R₁₀, and R₁₁ within the scanning window W r of the rearrangement memory 22, means for obtaining the renewed rearrangement correction data S₁ by summing lower L bits data of the image signal levels for rearrangement and means for supplying all bits data of the image signal levels corresponding to the picture element R₀₀ within the scanning window W r of the rearrangement memory 22 to the comparator 7. Fig. 9 illustrates a flow chart for explaining operations of the block diagram of Fig. 8. When the program starts, the contents of the rearrangement memory 22, the preference memory 4 and the correction data memory 9, and error correction data E a and rearrangement correction data S₁ are cleared (STEP 1). In STEP 2, the image signal level F o of the original is written into the rearrangement value operator 23 and the address of picture element O₁₁ within the scanning window W o Of the preference memory 4. In STEP 3, the rearrangement value operator 23 calculates the sum S (=Su + Ea + S₁ + F o ) and calculates integer N and remainder A from equation S=CxN+A . STEP 4 and STEP 5 are similar to those of Fig. 3. In STEP 6, the upper U bits data of the image signal levels for rearrangement C, A and O into three picture elements R₀₁, R₁₀ and R₁₁ within the scanning window W r of the rearrangement memory 22 in accordance with the preference order obtained in STEP 5, the sum of lower L bits data of the image signal levels in the three picture elements R₀₁, R₁₀, R₁₁, within the scanning window W r is supplied to the rearrangement value operator 23 as renewed rearrangement correction data S₁ and all bits data of the image signal levels of the rearranged picture element R₀₀ are supplied to the comparator 7. These are performed by the data rearrangement circuit 26. STEP 7 to STEP 11 are similar to those of Fig. 3. The embodiment saves the amount of buffer memory used as the rearrangement memory 22 from U + L bits to U bits. Fig. 10 illustrates a fifth embodiment of the present invention. The correction data memory 29 is smaller in bit number (U bit) than that (U + L bit) of the correction data memory 9 of Fig. 1. To compensate this, a lower bit gate 86, an upper bit gate 87 and an adder 88 are provided in the preference correction means 8. Other portions are same as those of Fig. 1. Fig. 11 illustrates a flow chart for explaining operations of the block diagram of Fig. 10. When the program starts, the contents of the rearrangement memory 2, the preference memory 4 and the correction data memory 9, and error correction data E a , preference correction data E ca from the adder 88, upper bit preference correction data E cu from the gate 87, and lower bit preference correction data E CL are cleared (STEP 1). STEP 2 and STEP 3 are same as those of Fig. 3. In STEP 4, the average operator 82 calculates average of four preference correction data which are formed with four upper bit preference correction data E CU having U bits from addresses E c1 , E c2 , E c3 and E c4 within the scanning window W e of the correction data memory and O inserted to lower L bit thereof, and the adder 88 adds the average from the average operator 82 and the lower bit preference correction data E CL selected by the gate 86 and delayed in time corresponding to one picture element. The thus obtained sum E ca is multiplied by a coefficient K a with the multiplier 83 to obtain neighboured correction data E b (=Ka x E ca ) . STEP 5, 6 and 7 are same as those of Fig. 3. In STEP 8, the multiplier 84 calculates the product of the coefficient K b and the average E ca obtained in STEP 4 and adds the product to the difference between image signal level of the picture element O₀₀ in the scanning window W o and the binary image signal level from the comparator 7, which is calculated by the subtracter 81, in the adder 85 to produce renewed upper bit preference correction data E cu and lower bit preference correction data E CL . The renewed upper bit preference correction data E CU is stored into address corresponding to the picture element E c5 in the scanning window W e through the gate 87. STEP 9, 10 and 11 are same as those of Fig. 3. In this case, the error correction data E a , the preference correction data E ca , the upper bit preference correction data E CU and lower bit preference correction data E CL are cleared in every end of main scans in 11. In this embodiment, the preference correction data E ca may be replaced with average of the upper bit preference correction data E CU as upper bits and average of the lower bit preference correction data E CL as lower bits. The embodiment has advantages of saving the amount of buffer memory used as the correction data memory 29 from U + L bits to U bits. Fig. 12 illustrates a sixth embodiment of the present invention. The embodiment is that combined with the embodiments of Fig. 8 and Fig. 10, and each of the components is same as that of Fig. 8 or Fig. 10 with same reference numeral. The operation is performed as illustrated in Fig. 13, which is the combination of Fig. 9 and Fig. 11. Therefore explanation is not repeated. Fig. 14 illustrates a seventh embodiment of the present invention. An error data memory 31 and an error matrix 32 are same as the correction data memory 29 and the scanning window W e of Fig. 10. Numeral 33 denotes memory location in which an error E xy at coordinates xy of the original image is stored. An original image data I xy from the co-ordinates xy of the original image is supplied to input terminal 35. An adder 36 calculates a sum I'xy of the original image data Ixy and a mean error E a . A comparator 39 compares the signal I'xy with a predetermined value R/2 from a terminal 38 to obtain binary data Pxy=R when I'xy > R/2, and Pxy = O when I'xy ≦ R/2. The output Pxy from the comparator 39 is supplied to an output terminal 37. A subtracter 40 calculates the error Exy by subtracting the binary data Pxy from the signal I'xy. A weighted mean calculating means 41 calculates a weighted mean of error data stored in the error matrix 32 of the error data memory 31. Numeral 42 denotes a delay circuit. The error data memory 31, the error matrix 32 and the weighted mean calculating means 41 correspond to the correction data memory 29, the scanning window W e and the average operator 82 of Fig. 10 respectively. The weighted mean calculating means 41 calculates a weighted mean E w of the data within the error matrix 32 by the following equation: where, i and j are co-ordinates in the error matrix 32, and A ij is a matrix coefficient which gives weights of distances from the co-ordinates xy of the referred picture element to the error. For example, A ij is represented by: The mean error E a consists of upper bits formed with the weighted mean E w and lower bits formed with a lower L bits data E x-1, y (L) of the error E x-1, y which is obtained by delaying the error Exy from the subtractor 40 in the delay circuit 42. The adder 36 adds the mean error Ea and the original image data Ixy to obtain output I'xy (=Ixy + Ea). The comparator 39 compares the output I'xy of the adder 36 and the predetermined value R/2, and supplies the binary signal Pxy to the output terminal 37. The subtracter 40 calculates the difference Exy of the output I'xy of the adder 36 and the binary signal Pxy, and the upper U bit Exy(U) of the difference Exy is supplied to the error data memory 31 as a renewed error for the coordinate xy of the original image. The renewed error data Exy(U) is stored in the memory location 33 of the error data memory 31. On the other hand, the lower L bit Exy(L) of the difference Exy is supplied to the delay circuit 42. The delay circuit 42 replaces the data E x-1,y (L) before one picture element with the data Exy(L) and holds the same. In calculating the mean error Ea, it is possible to add the output of the delay circuit 42 to a weighted mean which is obtained by calculating the same using the data consisting of upper U bit error data in the error matrix 32 and 0 assigned to lower L bits thereof. The method improves precision of calculating the weighted mean. Furthermore, the delay circuit 42 can be omitted by adjusting the subtractor 40 in holding previously subtracted results until the adder 36 receives the mean error Ea. In experimental results, no deterioration of the reproduced image is observed by deleting lower 5 bit data from 8 bit data of the output Exy of the subtractor 40. On the contrary, a texture of a stripe pattern which is inherent to conventional mean error minimizing method is removed by deleting the lower bit data. According to the embodiment of Fig. 14, the memory capacitance of the error data memory 31 can be reduced L bit per one picture element without deteriorating halftone reproducing characteristics.

Claims: An apparatus for processing an image signal, comprising: first and second image signal memory means (2, 4) for storing image signal levels of picture elements which are obtained by scanning an original image in a divided manner; means (3) for calculating a sum S of error correction data, E a , and a value S m , S m being a sum of the image signal levels of all picture elements within a first scanning window, W r , which has a size corresponding to M picture elements and which scans said first image signal memory means (2), and for obtaining N and A from equation S = (C x N) + A where C is a predetermined image signal level, N is an integer falling in a range O ≦ N ≦ M, and A is an image signal level falling in a range O ≦ A < C; preference circuit means (5) for numbering all picture elements within a second scanning window, W o , which has a size corresponding to M picture elements and which scans said second image memory means (4), the numbering being in accordance with either an ascending or a descending order of the image signal levels of said picture elements within the second scanning window, W o , at least one of the image signal levels of said picture elements in the second scanning window, W o , having additional data added thereto; rearrangement circuit means (6) for assigning C, as image signal level, to the first (or last) N picture elements of the M picture elements in the first scanning window, W r , of said first image signal memory means (2) numbered by said preference circuit, assigning A, as image signal level, to the next (or next last) numbered picture element of said M picture elements in the first scanning window, W r , and assigning O, as image signal level, to the remaining picture elements in the first scanning window, W r , of said first image signal memory means (2); means (7) for comparing the assigned image signal level of a selected one of the picture elements R oo , in the first scanning window, W r , with a predetermined quantizing level V for O < V < C, and for assigning C as the level of the binary image signal when the assigned image signal level of said selected picture element R oo , in the first scanning window, W r , is greater than the quantizing level, V, and assigning O as the level of the binary image signal when the assigned image signal level of said selected picture element, R oo , in the first scanning window, W r , is smaller than the quatizing level, V, and calculating the error correction data, E a , from the difference of the assigned image signal level of the selected picture element, R oo , in the first scanning window, W r , and the assigned level of the binary image signal; and third memory means (9); characterised in that the at least one of the image signal levels of the picture elements in the second scanning window, W o , having additional data added thereto comprises one of said picture elements, O oo , having neighbourhood correction data, E b , added thereto; the third memory means (9) is for storing preference correction data, E cm ; and that there is further provided a first calculating means (82, 83) for calculating said neighbourhood correction data, E b , from said preference correction data, E cm , read out from the third memory means (9), said preference correction data, E cm , being within a third scanning window, W e , which has a size corresponding to at least M picture elements, arranged to include preference correction data for locations corresponding to M picture elements in the neighbourhood of the selected picture element, R oo , in said first scanning window, W r , and which third scanning window, W e , scans the third memory means (9) ; and a second calculating means (81, 82, 84, 85) for calculating renewed preference correction data, E c , to be stored in the third memory means (9) at an address corresponding to the selected picture element, R oo , in the first scanning window, W r , the renewed preference correction data, E c , being calculated from the preference correction data, E cm , read out from said third memory means (9), the assigned binary image signal level and the image signal level of a selected picture element, O oo , in said second scanning window, W o , corresponding to the selected picture element, R oo , in said first scanning window, W r . An apparatus as claimed in claim 1, wherein said neighbourhood correction data E b is calculated by multiplying a mean value of the preference correction data, E cm , in the third scanning window, W e , corresponding to the neighbourhood of the selected picture element R oo , in the first scanning window, W r , by a coefficient 1/2 n , where n is an positive integer. An apparatus as claimed in claim 1, wherein said renewed preference correction data, E c , is calculated by adding a product of a coefficient 1-1/2 m and a mean value of the preference correction data, E cm , in the third scanning window, W e , corresponding to the neighbourhood of the selected picture element, R oo , in the first scanning window, W r , to a difference between said image signal level of the selected picture element, O oo , in said second image signal memory means (4) and the assigned binary image signal level, where m is a positive integer. An apparatus as claimed in claim 1, further comprising an additive means (20) for superposing on the image signal obtained by scanning the original image a signal having a different signal level from said image signal. An apparatus as claimed in claim 4, wherein said superposing signal is a periodic signal in synchronism with the picture elements of said image signal. An apparatus as claimed in claim 1, further comprising a selecting means (21) for selecting output to be recorded and/or displayed, the selecting means (21) comprising a comparator for comparing the image signal level of the selected picture element, O oo , in the second scanning window, W o , with predetermined high, Th, and low, Tl, reference levels, and a selector for selectively outputting the assigned binary signal level, or the output from said comparing means, in accordance with the result obtained by said comparator. An apparatus as claimed in claim 1, wherein said preference correction data, E cm , in the third scanning window, W e , corresponding to the neighbourhood of the selected picture element, R oo , in the first scanning window, W r , consists of upper U bit preference correction data, E cu and lower L bit preference correction data, E cl , and said third memory means (9) stores said upper U bit preference correction data, E cu . An apparatus as claimed in claim 1, wherein means (82, 28) are provided for calculating preference correction data, said means (82, 88) calculates a mean value of data consisting of the upper U bit preference correction data, E cu , and O inserted into lower L bit, and adds the lower L bit preference correction data, E cl thereto. An apparatus as claimed in claim 1, wherein means (82, 88) are provided for calculating preference correction data, said means (82, 88) calculates a mean value of the upper U bit preference correction data, E cu , as upper bit and adds the lower L bit preference correction data, E cl , thereto as lower bit. An apparatus for processing an image signal comprising; first image signal memory means (22) for storing upper U bits data of U + L bits image signal levels of picture elements which are obtained by scanning an original image in a divided manner; second image signal memory means (4) for storing U + L bits image signal levels of picture elements which are obtained by scanning an original image in a divided manner; means (23) for calculating a sum S of error correction data, E a , a rearrangement correction data signal, S1, an image signal level of the original image, and a value, Su, the value Su consisting of a sum of numbers having for their respective upper bits the upper U bits data of M-1 picture elements within a first scanning window, W r , which has a size corresponding to M picture elements and which scans said first image signal memory means (22), and having for their respective lower bits the digit O, and for obtaining N and A from equation S = C x N + A where C is a predetermined image signal level, N is an integer falling in a range O ≦ N ≦ M, and A is an image signal level falling in a range O ≦ A < C; preference circuit means (5) for numbering all picture elements within a second scanning window, W o , which has a size corresponding to M picture elements which scans said second image signal memory means (4), in accordance with either an ascending or a descending order of the image signal levels of the picture elements in the second scanning window, W o , wherein one of said picture elements has neighbourhood correction data, E b , added thereto; rearrangement circuit means (26) for dividing each of said C, A and O values into upper U bits data and lower L bits data, and assigning the upper U bits data of C, as an image signal level, to the first (or last) N picture elements of M-1 picture elements in the first scanning window, W r , of said first image signal memory means (22) numbered by said preference circuit (5), assigning the upper U bits data of A, as an image signal level, to a next (or next to last) picture element in said first scanning window, W r , and assigning the upper U bits data of O, as an image signal level, to the remaining of the M-1 picture elements in the first scanning window, W r , for calculating a sum, S₁, of the lower L bits of the image signal levels corresponding to said M-1 pictures elements in said first scanning window, W r , as a renewed rearrangement correction data, and for assigning all bits data of the relevant C, A or O value, to a selected picture element, other than said M-1 elements, in said first scanning window, W r ; means (7) for comparing an assigned image signal level of the selected picture element in said first scanning window, W r , with a predetermined quantizing level V for O ≦ V < C, and for assigning C as the signal level of a binary image signal when the assigned image signal level of the selected picture element in the first scanning window, W r , is greater than the quantizing level V and assigning O as the signal level of the binary image signal when the image signal level of the selected picture element in the first scanning window, W r , is smaller than the quantizing level V and calculating the error correction data, E a , from the difference of the assigned image signal level of the selected picture element in the first scanning window, W r , and the assigned binary image signal level; third memory means (29) for storing preference correction data; a first calculating means (82-86, 88) for calculating the neighbourhood correction data, E b , from the preference correction data in a third scanning window, W e , which has a size corresponding to at least M picture elements, including preference correction data for locations corresponding to picture elements in the neighbourhood of the selected picture element in the first scanning window, W r , which third scanning window, W e , scans the third memory means (29); and a second calculating means (81, 82, 84, 85, 88) for calculating renewed preference correction data to be stored into an address in the third memory means (9) corresponding to the selected picture element in the first scanning window, W r , from the preference correction data read out from said third memory means (29), image signal level of the selected picture element in said second scanning window, W o , of said second image signal memory means (4) and the binary image signal level. An apparatus as claimed in claim 10, wherein said neighbourhood correction data, E b , is calculated by multiplying a mean value of the preference correction data in the third scanning window, W e , corresponding to the neighbourhood of the selected picture element in the first scanning window, W r , by a coefficient 1/2 n where n is a positive integer. An apparatus as claimed in claim 10, wherein said renewed preference correction data is calculated by adding a product of a coefficient 1-1/2 m and a mean value of the preference correction data in the third scanning window, W e , corresponding to the neighbourhood of the selected picture element in the first scanning window, W r , to a difference between the image signal level of the selected picture element, o oo , in said second image signal memory means (4) and the binary image signal level, where m is a positive integer. An apparatus as claimed in claim 10, wherein said preference correction data in the third scanning window, W e , corresponding to the neighbourhood of the selected picture element consists of upper U bit preference correction data, E cu , and lower L bit preference correction data, E cl , and said third memory means (29) stores said upper U bit preference correction data, E cu . An apparatus as claimed in claim 10, wherein means (82, 88) are provided for calculating preference correction data, said means (82, 88) calculates a mean value of data consisting of the upper U bit preference correction data, E cu , with O inserted into lower L bit, and adds the lower L bit preference correction data, E cl thereto. An apparatus as claimed in claim 10, wherein means (82, 88) are provided for calculating preference correction data, said means (82, 88) calculates a mean value of the upper U bit preference correction data, E cu as upper bit and adds the lower L bit preference correction data, E cl , thereto as lower bit. An apparatus for processing an image signal, comprising: a memory means (31) for storing error data relating to the neighbourhood of a picture element xy, said error data being U + L bit data; first calculating means (41) for calculating a weighted mean value, E w , of said error data in the neighbourhood of picture element xy, the weighted mean value, E w , being U + L bit data; second calculating means (36) for adding original image data, Ixy, for a picture element xy, and a mean error, E a , to obtain a value I'xy = E a + Ixy, the original image data, Ixy, and the mean error, E a , being U + L bit data, the original image data, Ixy, being an image signal level for picture element xy derived by scanning an original image in a divided manner, the upper U bits of the mean error, E a , consisting of the weighted mean value, E w , and the lower L bits of the mean error, E a , consisting of the lower L bits, E x-1 ,y (L), of error data of the picture element x-1 ,y one picture element before picture element xy in the scanning direction; a comparator (39) for comparing said value, I'xy, with a predetermined value to obtain a binary signal, Pxy, for output from the apparatus, said binary signal, Pxy, being a U + L bit signal; third calculating means (40) for calculating a difference between the value I'xy and the binary signal Pxy, said difference being U + L bit error data Exy; means for supplying upper U bit data of said error data, Exy, to said memory means (31); and means (42) for holding lower L bit data of said error data, Exy, until the next picture element in the scanning direction is processed. An apparatus as claimed in claim 16, wherein said weighted mean value, E w , is calculated from U + L bit data, the upper U bits of which consists of said error data and the lower L bits of which consists of inserted O data bits, and said mean error, E a , is obtained by adding the thus obtained weighted mean value, E w , to said lower bits data E x-1,y (L) of the error data of the picture element which is one picture element before the picture element xy in the scanning direction.

Inventors: KUROSAWA, TOSHIHARU, MARUYAMA, YUUJI, NAKAZATO, KATSUO, OTSUKA, HIROTAKA, TSUCHIYA, HIROYOSHI
Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Application year: 1985
Main classification: H04N1
IPC codes: H04N1