A PHOTO RESIST AND A PROCESS FOR MANUFACTURING AN INTEGRATED CIRCUIT

Abstract: Use of a photoconductive photoresist complex minimises charge buildup resulting from high electric potential on an integrated circuit process intermediate (chip or wafer) in the processing environment during manufacture of closely packed integrated circuits. The photoconductive photoresist layer (2) is connected during high voltage processing operations to a drain electrode (3) at a reference potential. The photoresistivity complexing agent, which may be a common ketone photoresist such as AZ1350, AZ1450J, or AZ1350SF, is compounded with a photoconductivity complexing agent, a low potential amine, diazobicyclooctane (DABCO) or other low ionisation potential primary, secondary or tertiary amine. During high voltage operations, the integrated circuit process intermediate is flooded with light at a wavelength eliciting photoconductivity, but producing no photoresistivity effects. The charge passes to the cathode through the normal means of wafer attachment.

Description: This invention relates to a photoresist for manufacturing an integrated circuit. Photoresists commonly used in semiconductor integrated circuit device fabrication are excellent insulators, and as such are very susceptible to charge buildup during high voltage processes such as reactive ion etching (RIE) or plasma etching. At the time of filing this patent specification, production of integrated circuits commonly involves numerous photoresist mask patterning steps to control etching of metal or semiconductor to precise patterns. Etching of metals is easy; etching of semiconductors is not difficult; but etching of insulators is very difficult. Rather than resorting to etching of insulators, it is common to convert the patterns to stencil masks and vapour deposit the insulator patterns through stencil masks. There is very little patterning of insulation by etching; stencilling is the common approach. As the industry progresses towards higher levels of integration, films required for high level integration devices must meet closer tolerances, and it becomes necessary to consider patterning of insulation by etching rather than stencilling. Reactive ion etching (RIE) and plasma etching are examples of etching techniques appropriate to such insulation patterning. Such techniques require high voltages, often in vacuum, in environments which may damage integrated circuit process intermediates as a result of charge buildup on the surfaces of the integrated circuits. Such damage may be inchoate; actual failure or even testability may be months in the future. Failure mechanisms affected by charge buildup include "SiO bumps", "resistor blowout", and a corrosion known as "black death". Charge buildup can also affect the accuracy of e-beam patterning of photoresist, by defocussing the beam in a manner analogous to that of a deflection plate in a cathode ray tube. Photoresists commonly used in semiconductor (and other) device fabrication are excellent insulators. Current practice involves use of photoresist in many patterning steps such as metal or insulator patterning by either lift-off or RIE/plasma etch subtractive patterning. Evaporation of metals is commonly done using e-beam evaporation or e-beam heating or a crucible containing source material. Plasma precleans are common where metal-metal contacts are important or for improved metal-metal, insulator-metal adhesion. Each of these processes may cause charge buildup on the resist. The charge may cause extensive damage to underlying material and/or circuits. The invention seeks to provide a photoresist and a process which avoids charge buildup during fabrication of integrated circuits. A photoresist comprises, according to the invention, a photoresistivity complexing agent and a photoconductivity complexing agent. An advantage of the invention is that it provides the necessary photoconductivity precisely at the point where such photoconductivity is required during the manufacturing process to provide automatically for elimination of built-up charges as the manufacturing process continues. How the invention can be carried out will now be described by way of example, with reference to accompanying drawings, in which:- Figure 1 represents an integrated circuit disposed in a reactive ion etching chamber; and Figure 2 through 4 illustrate various failure mechanisms due to built-up charges; these failure mechanisms are respectively known as "SiO bumps", "resistor blowout" and "black death". The photoconductive photoresist complex serves to bleed charges off to the electrodes of the processing equipment. Built-up charges do not develop and thus do not produce the strong electrical forces resulting in the failure mechanisms. In Figure 1, a photoconductive photoresist 1 (shown greatly enlarged) on integrated circuit intermediate 2, is effective to bleed off charges to electrode 3 upon which the integrated circuit 2 is placed. The processing chamber 4 is equipped with another electrode 5 and such additional standard equipment as is required for its function. Figures 2-4 illustrate failure mechanisms related to charge buildup. In FIG. 2, exhibiting "SiO bumps", pattern 6 of metallisation over SiO insulation on intermediate 2 has SiO bumps 7 which interfere with mechanical strength and electrical conductivity. In FIG. 3, exhibiting "resistor blowout", resistance material 8 has a discontinuity in its desired connection between areas of metallisation 9 on intermediate 2. In FIG. 4, exhibiting "black death", corroded dark patches 11 appear on metallisation 10 on intermediate 2. To provide a suitable photoconductive photoresist, a common photoresist containing a diazoketone as the photoactive compound (examples are AZ 1350, AZ 1450J, AZ 1350SF) is compounded with a photoconductor by addition of an amine with low ionisation potential, diazobicyclooctane (DABCO). Other amines with low ionisation potential (including primary, secondary or tertiary amines) form a charge transfer complex with the ketone function of the photoactive compound. This complex imparts conductive properties to the film in the presence of light. The photoresist retains its usual properties for exposure on normal tools used in the trade, but in the plasma discharge, RIE, e-beam evaporation or sputter deposition processes the photoconducting material conducts away the charge to the cathode through the normal means of wafer attachment. Charges may be dissipated via the semiconductor substrate to the electrode which is the source of reference potential (usually ground) for elimination of charge build-up. Depending upon the characteristics of the tool and of the integrated circuit intermediate, it may be advantageous to connect the photoconducting photoresist complex to ground by a conductive metal clip or probe. In a test vehicle, resistors covered by normal photoresist were blown off the wafer during SiO evaporation. Identical wafers covered with photoconductive resist showed no damage. Metal lines covered by normal resist showed severe grain growth, while identical lines covered by photoconductive resist showed no damage. Use of photoconductive photoresist eliminates many problems caused by charging of wafers during processing. Using photoconducting photoresist in the processing, bleeding charges away through electrodes already present in the process, minimises failure mechanisms such as SiO bumps, resistor blowout and black death which are related to charge buildup. The photoconductivity exhibits no apparent undesirable side effects. The photoconducting photoresist complex in the preferred embodiment is prepared as follows: The photoconductivity complexing agent is prepared by dissolving 0.5-5 wt % DABCO (or other amine) in a suitable solvent which is miscible with the commercial resist solution to be used as the photoresist complexing agent. Such a solvent for AZ 1350SF, 1350J or 14SOJ is commercially available AZ THINNER. The photoconductivity complexing agent solution of amine/solvent is added slowly with agitation (ultrasonic or mechanical stirring) to the photoresist complexing agent resist solution. The resulting solution must be agitated or stirred for 1-2 hours to complete the dispersion of the amine in the resist. The resulting photoconductive photoresist complex solution appears darker in colour than the standard resist solution as a result of the complex formation. The solution is then filtered to remove any sediment, leaving the photoconductive photoresist complex solution ready for use. The process of using the photoconductive photoresist complex is as follows: The photoconductive photoresist complex solution is spun on the wafer (or other integrated circuit process intermediate) in the normal manner to obtain the desired thickness. The photoconductive photoresist complex layer is exposed using standard optical exposure systems available in the industry. Normal resist developer is used to develop the resist patterns. The longer wavelength absorption of the photoconductive photoresist complex changes the exposure/develop conditions in minor ways. For the photoconductive photoresist complex of AZ1350SF with DABCO there is a shorter development time for a given exposure, than the time normally recommended for AZ1350SF alone. With these minor optimisations of the process window parameters, the photoconductive photoresist may be used in a similar manner to any standard photoresist. The photoconductivity peak and the photoresistivity peak of the photoconductive photoresist are at different wavelengths. This permits separate control of photoconductivity, by a floodlight (photoconductivity wavelength) over the area of a chip or wafer, providing photons to produce the requisite conductivity without affecting the photoresistivity. This is roughly analogous (as regards the photoresist) to the coloured light of a darkroom, providing useful illumination at a harmless wavelength. Conversely, the photoresist exposure light may be selected to have a finite photoconductivity production capability, from zero to significant photoconductivity, according to the needs of the application. The wavelength of absorption is determined by the difference between the ionisation potential of the amine and the electron affinity of the acceptor compound (diazoketone in the photoresist). This property allows the optimum wavelength for the photoconductivity to be tailored for particular light sources. This allows the photoresist to be conductive in a cleanroom/yellow light situation and thus gives protection against electrostatic damage to the devices. It also allows use where only a various band light source is permissible. Such a situation might be in an electron-beam exposure tool. In general, barring chemical incompatibility of the photoconductor to other components of the photoconductive photoresist complex, any of the several available photoresists may be used as photoresist complexing agent, together with a photoconductivity complexing agent, for use as a photoconductive photoresist complex in accordance with the invention. So long as the photoconductivity complexing agent does not adversely react nor block light necessary for photoresist exposure, a range of photoconductive material may be substituted for that of the preferred embodiment.

Claims: 1. A photoresist comprising a photoresitivity complexing agent and a photoconductivity complexing agent. 2. A photoresist as claimed in claim 1, in which the photoconductivity complexing agent is an amine of low ionisation potential. 3. A photoresist photoconductivity complexing agent is a primary amine. 4. A photoresist as claimed in claim 2, in which the photoconductivity complexing agent is a secondary amine. 5. A photoresist as claimed in claim 2, in which the photoconductivity complexing agent is a tertiary amine. 6. A photoresist as claimed in claim 1, in which the photoconductivity complexing agent comprises diazobicyclooctane. 7. A photoresist as claimed in any preceding claim, in which the photosensitivity complexing agent comprises a ketone. 8. A process for manufacturing an integrated circuit comprising the steps of providing a photoresist layer (2) on an integrated circuit process intermediate and subsequently treating the integrated circuit process intermediate, with photoresist layer, to a patterning process step by mounting it on an attachment mechanism for processing in an environment of significant electric potential; characterised by the photoresist being a photoconductive photoresist as claimed in any preceding claim; and means connecting the photoresist layer to a drain electrode (3) at a reference potential, for charges resulting from the environment of significant electric potential. 9. A process as claimed in claim 8, in which the means connecting the photoresist layer to a drain, at reference potential, comprises floodlight means for providing surface light to the integrated circuit process intermediate at a wavelength selected for significant photoconductivity but insignificant photoresistivity of the photoresist.

Inventors: BROWN, KAREN HILL
Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1985
Main classification: G03F7
IPC codes: G03F7, H01L21