Electronic device and its manufacturing method

Abstract: An electronic device having a substrate (2) with an insulating surface; a layer member (3) is formed on the substrate (2) having a patterned conductive or semiconduc­ tive layer. The layer member (3) is surrounded by an insulating layer (41) formed on substrate (2) and in contact with the side faces of the layer member (3) but not extending onto the top surface of the layer member (3).

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to an electronic device which has a substrate with an insulating surface and a layer member including a conductive or semiconductive layer formed in a pattern on the substrate. The invention pertains to a method for the manufacture of such an electronic device. Description of the Prior Art Heretofore a variety of electronic devices have been proposed which have a substrate with an insulating surface and a layer member including a conductive or semiconductive layer formed in a pattern on the substrate. The layer member is formed of, for example, a conductive layer member having a conductive layer as in the case of an inter-connection layer. Another example of the layer member is formed by a conductive or semiconductive layer member which includes a conductive or semiconductive layer formed of a conductive or semiconductive material of a desired resistivity as is the case with a resistor layer. Another example of the layer member is constituted by a laminate member having a structure in which a first conductive layer serving as a first electrode, a non-single-crystal semiconductor layer member having a PN or PIN junction and a second conductive layer serving as a second electrode are laminated in that order as in the case of a nonlinear element the voltage-current characteristic of which shows a diode characteristic in a positive or negative voltage region. Yet another example of the layer member is made up of a laminate member having a structure in which a first conductive layer serving as a first electrode, a non-single-crystal semiconductor layer member having a NIN, NP⁻N, PIP, PN⁻P, NIPIN, NP⁻PP⁻N, PINIP or PN⁻NN⁻P junction and a second conductive layer serving as a second electrode are laminated in that order as in the case of a nonlinear element the voltage-current characteristic of which exhibits a diode characteristic in positive and negative regions. Another example of the layer member is formed of a laminate member having a structure in which a first conductive layer serving as a first electrode, an I-, P⁻ or N⁻ type non-single-crystal semiconductor layer and a second conductive layer serving as a second electrode are laminated in that order as in the case of a nonlinear element which shows a nonlinear voltage-current characteristic. Yet another example of the layer member is formed of a laminate member having a structure in which a first conductive layer serving as a first electrode, an insulating layer serving as a barrier layer thin enough to permit the passage therethrough of a tunnel current and a second conductive layer serving as a second electrode are laminated in that order as in the case of a nonlinear element which shows a nonlinear voltage-current characteristic. In the above electronic devices, if outer side faces of the laminate member which extend thickwise thereof are exposed to the open air, there is a fear that the outer side faces will be changed in quality by the components of air, resulting in degradation of the characteristic of the laminate member. Furthermore, dust sill adhere to the exposed outer side faces, introducing the possibility of an electrical leakage occurring thereon. Accordingly, the characteristics of the electronic devices are likely to be deteriorated by the open air. SUMMARY OF THE INVENTION It is an object to provide a method for forming such a device which has substrate and a layer member including a conductive or semiconductive layer formed in a pattern of the substrate and which is free from the above said defects of the prior art. According to a first aspect of the present invention there is provided an electronic device manufacturing method comprising the steps of: an electronic device manufacturing method comprising the steps of: forming a layer member on a transparent substrate, the layer member being much less transparent than the substrate; and forming an insulating layer surrounding the layer member on the substrate; characterised in that: the step of forming the layer member comprises forming a multi-layer laminate member including a patterned conductive or semiconductive layer; and the step of forming the insulating layer comprises forming a photosensitive organic resin layer extending over said layer member and in contact with side surfaces of the layers of the layer member, exposing the organic resin layer to light passing through said transparent substrate, with said layer member used as a mask, whereby said photosensitive organic resin layer is exposed to the light in portions in contact with said side surfaces of the layer member, but not in a portion which is formed over said layer member, said exposure being followed by development of the exposed photosensitive organic resin layer to provide insulation in contact with the side surfaces of the layer member to prevent degradation or contamination of the side surfaces of the layers. The precharacterising part of the invention is known from EP-A-0027184. A further document describing a semiconductor structure is EP-A-0122371. A further document describing a fabrication process is an article from 3022 Electronics International Vol. 54 (1981) June No. 12, New York, U.S.A. entitled "Polymer doubles as photoresist and insulator". According to a preferred method of the present invention, the electronic device of the present invention is fabricated by a manufacturing process including the following detailed steps. At first, a layer member having a patterned conductive or semiconductor layer is formed on a substrate having an insulating surface. In this case, a light transparent substrate is used as the substrate. Furthermore, the layer member is formed as a layer member which has a far lower light transparency than does the substrate. Next, a photosensitive organic resin layer is formed on the transparent substrate so that it extends thereon covering the layer member. Next, from the photosensitive organic resin layer, an insulating layer which surrounding the layer member on the substrate is formed. In this case, the photosensitive organic resin is exposed to light from the side of the transparent substrate. Then the photosensitive organic resin layer thus exposed is subjected to development. In practice, the photosensitive organic resin layer is heat-hardened prior to the exposure. After the development an organic resin layer resulting from the development of the photosensitive organic resin is heat-hardened. In the case of involving such heat treatments, the insulating layer ultimately obtained is thinner than the original photosensitive organic resin layer. By suitably selecting the thickness of the original photosensitive organic resin layer taking the above into account, the insulating layer can be formed to the substantially the same thickness as the layer member. Such a manufacturing method of the present invention does not involve the use of a particular mask for the formation of the insulating layer which surrounds the layer member. This allow ease in the fabrication of the electronic device. Other objects, features and advantages of the present invention will become more fully apparent from the detailed description taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1 to 5 are cross-sectional views schematically illustrating different SOI-devices; and Figs. 6A to 6G are cross-sectional views schematically illustrating a sequence of steps involved in the manufacture of an SOI-device in accordance with an embodiment of its manufacturing method. DESCRIPTION OF THE PREFERRED EMBODIMENT Figs. 1 to 5 illustrate an embodiment of an SOI-device, which has a substrate 1 with an insulating surface 2. The substrate 1 is transparent and made of, for example, glass. The substrate 1 has a layer member 3 formed thereon. The layer member 3 is far lower in light transparency than the substrate 1. The layer member 3 is, for example, a patterned non-transparent conductive layer 4 formed of metal or non-single-crystal semiconductor, as depicted in Fig. 1. The conductive layer 4 serves as an inter-connection layer. Another example of the layer member 3 is a patterned conductive layer 5 or semiconductor layer 6 formed of non-single-crystal semiconductor as a resistor layer, as shown in Fig. 2. The conductive layer 5 or the semiconductor layer 6 has a light transparency far lower than that of the substrate 1. Yet another example of the layer member 3 has a structure in which a patterned conductive layer 7 Serving as an electrode, a patterned non-single-crystal semiconductor layer member 8 and a patterned conductive layer 9 serving as another electrode are laminated in that order, as depicted in Fig. 3. In this instance, both side faces of the conductive layers 7 and 9 and the non-single-crystal semiconductor layer 8, which define the widths thereof, are respectively in the same plane on both sides thereof. The conductive layer 7 or/and 8 are nontransparent. Each of the conductive layers 7 and 8 may be multi-layers, and one of the layer of the multi-layers may be nontransparent. The non-single-crystal semiconductor layer member 8 is, for example, a laminate member which is made up of one or more laminates of P- and N-type non-single-crystal semiconductor layers laminated in that order or in the opposite order to form a PN junction or junctions. In this example, the layer member 3 constitutes a nonlinear element whose voltage-current characteristic presents a diode characteristic in the positive or negative voltage region. Another example of the non-single-crystal semiconductor layer member 8 is a laminate member which is formed of one or more laminates of P(or N)-, I- and N(or P)-type non-single-crystal semiconductor layers sequentially laminated in that order, forming an P(or N)-I-N(or P) junction. In this instance, the layer member 3 constitutes a nonlinear element whose voltage-current characteristic presents a diode characteristic in positive or negative voltage regions. Yet another example of the non-single-crystal semiconductor layer member 8 is a laminate member in which N-, I(or P⁻)- and N-type non-single-crystal semiconductor layers or P-, I(N⁻)- and P-type non-single-crystal semiconductor layers are sequentially laminated in that order to form an NI(or P⁻)N or PI(or N⁻)P junction. Another example of the non-single-crystal semiconductor layer 8 is a laminate member in which N-, I(or P⁻)-P-I(or P⁻)- and N-type non-single-crystal semiconductor layers or P-, I(or N⁻)-N-I(or N⁻)- and P-type non-single-crystal semiconductor layers are sequentially laminated in that order to form an NI(or P⁻)PI(or P⁻)N or PI(or N⁻ )NI(or N⁻)P junction. In these instances, the layer member 3 constitutes a nonlinear element whose voltage-current characteristic shows a diode characteristic in both positive and negative voltage regions. Another example of the laminate member 3 is identical in construction with that of Fig. 3 except that the non-single-crystal semiconductor layer member 8 is substituted with an I-type non-single-crystal semiconductor layer 10 as depicted in Fig. 4. Yet another example of the layer member 3 is identical in construction with that of Fig. 3 except that the semiconductor layer 8 is substituted with an insulating layer 11 as a barrier layer thin enough to permit the passage therethrough of a tunnel current as shown in Fig. 5. In these instances, the laminate member 3 forms a nonlinear element. On the substrate 1 is formed an insulating layer 41 which surrounds the layer member 3. The insulating layer 41 is in contact with side faces 3a and 3b of the layer member 3 but does not extend onto the top surface 3c of the layer member 3. The insulating layer 41 is formed of, for instance, an organic resin such as a chemically stable heat-proof polyimide resin. The insulating layer 41 can be deposited to a desired thickness, for example, substantially the same thickness as that of the layer member 3, as shown. On the insulating layer 41 is formed a conductive layer member or semiconductive (semiconductor) layer member which extends on the layer member 3 in contact therewith, as required. Fig. 2 shows the case where conductive layers 42a and 42b extending from both end portions of the layer member 3, as interconnection layers, are formed on the insulating layer 41. Fig. 3 shows the case where a conductive layer 43 extending across the layer member 3, as an electrode, is formed on the insulating layer 41. The conductive layer 43 is used, for example, as an electrode, for forming a liquid crystal element. The liquid crystal element is made up of the conductive layer 43, a conductive layer (not shown) serving as the other electrode formed in opposed relation thereto and a liquid crystal (not Shown) filled in between the both conductive layers. In this case, the liquid crystal element is driven vial the layer member 3 and consequently via the nonlinear element. Next, the manufacturing method of the present invention will be described as being applied to the manufacture of the electronic device referred to above in connection with Fig. 3. The manufacture starts with the preparation of a light transparent substrate 1 similar to those mentioned above with respect to Figs. 1 to 5, as depicted in Fig. 6A. Next, a layer member 3 similar to that described above in respect of Fig. 3 is formed by a known process on the substrate 1, as shown in Fig. 6B. Next, a photosensitive organic resin layer 51 extending over the layer member 3 is formed by coating, for example, commercially available photosensitive polyimide resin on the substrate 1, as shown in Fig. 6C. The photosensitive polyimide resin is an precursor of polyimide resin and becomes polyimide resin upon exposure to light. Next, the photosensitive organic resin layer 51 is heat-hardened, as required, for example, at 80°C for 60 minutes, providing from the photosensitive organic resin 51, a heat-hardened photosensitive organic resin layer 52, as shown in Fig. 6D. The photosensitive resin layer 52 becomes thinner than the original photosensitive resin layer 51. Next, the photosensitive resin layer 52 is exposed to light 53, for instance, ultraviolet rays of a 300 to 400 nm wavelength, which is directed from the side of the light transparent substrate 1, as indicated in Fig. 6E. In this instance, that portion 52a of the photosensitive resin layer 52 which does not lie on the layer member 3 is exposed to a larger amount of light than that for that portion 52b of the resin layer 52 which lies on the layer member 3. Next, the photosensitive resin layer 52 thus exposed to light is developed using a commercially available liquid developer removing the portion 52b of the photosensitive resin layer 52 lying on the layer member 3, as depicted in Fig. 6F. This development generally includes a step of dipping the exposed photosensitive resin layer 52, or spraying the liquid developer on the resin layer 52, and a step of rinsing the developed layer with isopropanol or like commercially available detergent. By subjecting the photosensitive resin layer 52 to such treatments as described above, the organic resin layer 54 is obtained which has substantially no photosensitivity. Next, the organic resin layer 54 is hardened by heating, for example, at 135 to 400°C for 30 minutes, obtaining a heat-hardened organic resin layer 55 as the insulating layer 41 described previously in connection with Figs. 1 to 5, as depicted in Fig. 6G. The insulating layer 41 is made thinner than the organic resin layer 54. The insulating layer 41 can be formed to the substantially the same thickness of the layer member 3 by selecting the thickness of the original photosensitive organic resin layer 51 to a suitable value larger than the thickness of the layer member 3. Next, the conductive layer 43 serving as an electrode, described previously with respect to Fig. 3, is formed by a known technique, as liquid, as indicated by the chain line in Fig. 6G. The manufacturing method of the present invention, described above, does not involve any particular mask for forming the insulating layer 41, and hence allow ease in the manufacture of the electronic device of the present invention. The above embodiment should be construed as being merely illustrative of the present invention but not as limiting the invention specifically thereto. It will be appreciated that with the structure manufactured according to the preferred embodiment, since the side surfaces of the layer member are not exposed to the open air, they will not change in quality and no dust will adhere to them. Therefore, there are no possibilities of the characteristics of the layer member being degraded and an electrical leakage occurring on the outer side faces. Accordingly, the characteristics of the electronic device will not be deteriorated by the open air. Furthermore, when the insulating layer has substantially the same thickness as the layer member, a conductive layer serving as an interconnection layer or an electrode, which extends over the layer member in contact therewith, can easily be formed on the insulating layer without introducing the likelihood that the conductive layer becomes discontinuous between the insulating layer and the layer member

Claims: An electronic device manufacturing method comprising the steps of: forming a layer member (3) on a transparent substrate (1), the layer member (3) being much less transparent than the substrate (1); and forming an insulating layer (41) surrounding the layer member (3) on the substrate; characterised in that: the step of forming the layer member (3) comprises forming a multi-layer laminate member including a patterned conductive or semiconductive layer; and the step of forming the insulating layer comprises forming a photosensitive organic resin layer (51) extending over said layer member (1) and in contact with side surfaces (3a, 3b) of the layers of the layer member (3), exposing the organic resin layer (51) to light (53) passing through said transparent substrate (1), with said layer member (3) used as a mask, whereby said photosensitive organic resin layer is exposed to the light in portions (52a) in contact with said side surfaces (3a, 3b) of the layer member, but not in a portion (52b) which is formed over said layer member, said exposure being followed by development of the exposed photosensitive organic resin layer to provide insulation in contact with the side surfaces (3a, 3b) of the layer member (3) to prevent degradation or contamination of the side surfaces of the layers. A method according to claim 1, wherein the layers of the laminate member (3) are coextensive. A method according to claim 1 or 2, further comprising the steps of heat hardening the photosensitive organic resin layer prior to the step of exposure, and heat hardening an organic resin layer resulting from the development of the photosensitive organic resin layer after exposure. A method according to claim 1, 2 or 3 characterised in that the photosensitive organic resin layer (51) is formed thicker than the laminate member (3) on the substrate (1). A method according to claim 1, 2, 3 or 4, characterised in that the photosensitive organic resin layer (51) is formed to such a thickness on the substrate that the insulating layer (41) may be formed to substantially the same thickness as the laminate member (3). A method according to claim 1, 2, 3, 4 or 5, characterised in that said photosensitive organic resin is a photosensitive polyimide resin. A method according to claim 6, characterised in that development of the exposed photocurable organic resin layer comprises the steps of removing the unexposed portion (52b) of the organic resin, and hardening the exposed portion (52a) of the organic resin by thermal treatment. A method according to any of claims 1 to 7 characterised in that said laminate member (3) comprises a PIN, NIN, or PIP junction. A method according to any preceding claim, further comprising providing a conductive or semiconductive layer member (42a, 42b, 43) extending on to the insulating layer (41) and in contact with the laminate member (3).

Inventors: INUSHIMA TAKASHI, KONUMA TOSHIMITSU, MASE AKIRA, SAKAMA MITSUNORI, YAMAZAKI SHUNPEI, INUSHIMA, TAKASHI SEMICOND. ENERGY LAB. CO., LTD., KONUMA, TOSHIMITSU SEMICOND. ENERGY LAB. CO., LTD., MASE, AKIRA SEMICONDUCTOR ENERGY LAB. CO., LTD., SAKAMA, MITSUNORI SEMICOND. ENERGY LAB. CO., LTD., YAMAZAKI, SHUNPEI SEMICOND. ENERGY LAB. CO., LTD.
Applicants: SEMICONDUCTOR ENERGY LAB, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Application year: 1985
Main classification: H01L27
IPC codes: H01L27, B05D5, H01L21, B05D3, B32B33, H05K3