DIFFUSION BARRIER LAYER FOR INTEGRATED-CIRCUIT DEVICES

Abstract: Titanium carbonitride has been discovered to be an effective diffusion barrier material for use in metallization structure for MOS integrated-circuit devices. A layer of the material (24) deposited under aluminum (22) prevents deleterious aluminum-silicon or aluminum-silicide interactions.

Description: DIFFUSION BARRIER LAYER FOR INTEGRATED-CIRCUIT DEVICES Background of the Invention This invention relates to integrated-circuit devices and, more particularly, to metallization structures used in devices of the metal-oxide-semiconductor (MOS) type. In some metallization structures for MOS devices, it is known to utilize a diffusion barrier to prevent certain deleterious effects in the devices. Thus, for example, it is known to interpose a diffusion barrier between silicon (or a silicide) and an overlying aluminum layer to prevent silicon-aluminum or silicide-aluminum interactions. In that way, the likelihood is minimized that the metallization will cause harmful effects such as penetration and shorting- of shallow junctions included in the devices. Heretofore, as described in Journal of Applied Physics, Vol 54, No 6, June 1983, pp. 3195-3199, and Applied Physics Letters, Vol. 36, No. 6, March 15-, 1980, pp. 456-458, materials such as titanium nitride or titanium carbide have been proposed for forming the aforementioned diffusion barrier layers in MOS devices. In practice, however, these materials have often been observed to exhibit characteristics such as cracking, peeling and poor step coverage which dictate against their inclusion in high-quality devices. Thus, a need exists for improved barrier layers. Summary of the Invention In accordance with this invention, an improved diffusion barrier layer is provided comprising titanium carbonitride. By way of example, the layer is formed in- a chemical-vapor-deposition (CVD) process. Titanium carbonitride layers formed in this way exhibit excellent barrier properties and, moreover, are characterized by low stress, conformal step coverage and relatively low resistivity. Brief Description of the Drawing The single-figure drawing, shows, in crosssection, a portion of an illustrative MOS integratedcircuit device embodying the present invention. Detailed Description The portion of a semiconductor device shown in the drawing comprises a silicon body 10 including a p-type silicon region 12 having a standard n+-type source or drain region 14 formed therein. In some devices, the depth d of the p-n+ junction is only about 1000-to-3000 Angstrom units (i) below the surface of the body 10. By way of example, a layer 16 of a standard refractory metal silicide is included on the body 10 overlying the source or drain region 14. Illustratively, the layer 16 is approximately 800-to-1000 A thick and comprises cobalt silicide, tantalum silicide, titanium silicide, platinum silicide, palladium silicide, molybdenum silicide# or tungsten silicide The use of such a silicide on silicon to achieve high-conductivity contacts and interconnects in MOS devices is well known. Also shown is a conventional patterned dielectric layer of phosphorus-doped silicon dioxide comprising regions 18 and 20 each about 10,000 2 thick. Highconductivity contacts and interconnects are intended to be made through openings formed in the dielectric layer. In that way, electrical connections can be made to the source or drain region 14 and to other portions (not shown) of the device. An electrical connection is made to the source or drain region 14 by a metallization structure that includes a patterned layer 22 that comprises a standard conductive material such as aluminum about 0.7-to-1 micrometer (um)m thick. Interposed between the aluminum layer 22 and the silicide layer 16 is a diffusion barrier layer 24 made in accordance with the present invention. Advantageously, the barrier layer 24 comprises titanium carbonitride that is formed, for example, in a chemical-vapor-deposition (CVD) step as described below. Illustratively, the layer 24 is approximately 1000 2 thick. Such a layer constitutes an effective barrier that prevents or substantially reduces silicon-aluminum and silicide-aluminum interactions in the depicted MOS device. The titanium carbonitride layer 24 comprises a thermally stable, low-resistance material that is not harmfully affected by the relatively high temperatures and other processing conditions typically encountered in a conventional MOS device fabrication sequence. Moreover, the material exhibits good step coverage over underlying layers and is etchable by the same standard processes commonly employed to pattern aluminum. The invention is useful in a variety of other structural arrangements. Thus, for example, the layer 24 is also useful as a barrier in a structure in which the silicide layer 16 is replaced with a layer of tungsten. Additionally, the layer 24 is useful as a barrier in a structure in- which the titanium carbonitride layer 24 is deposited directly on the surface of the silicon body 10 to form a barrier between the body 10 and the aluminum layer 22. A diffusion barrier to aluminum may also be desirable where the underlying semiconductor material to be contacted comprises a relatively thick doped polysilicon layer. The herein-described titanium carbonitride material constitutes an advantageous material for such a purpose. Further, in a composite gate metallization structure comprising a silicide overlying doped polysilicon, a titanium carbonitride layer interposed between the silicide and the polysilicon is useful to prevent undesired diffusion of dopants from the polysilicon into the silicide layer. In some cases, it is advantageous to interpose a conductive adhesion promoter between the barrier layer 24 and the region underlying the layer 24. By way of example, such an adhesion promoter layer 25 is shown in the drawing between the barrier layer 24 and the underlying layer 16. Illustratively, a 100-i-thick layer of deposited titanium serves as an effective such adhesion promoter. Illustratively, the starting material from which to form a titanium carbonitride layer comprises a known commercially available liquid designated Ti[N(CH3)2]4. This liquid material, which is available in sealed ampule form from, for example, Alpha Products, Morton Thiokol, Inc., Danvers, Massachusetts, exhibits a relatively low vapor pressure under ambient conditions. Preferably, the titanium carbonitride layer is formed in a CVD process. A low-resistance diffusion barrier layer thus formed on an integrated-circuit device is characterized by low stress and conformal step coverage. The first step in a preferred CVD process is to load at least 25 grams of the aforespecified starting material into a container. By way of example, the surface area of the loaded material in the container should be at least about 50 square centimeters. Loading should be done in a controlled inert atmosphere (for example in a nitrogen or argon atmosphere) at room temperature with particular emphasis on avoiding any oxygen or moisture contamination of the starting material. The loaded container is then connected via a conventional high-conductance valve to the entrance side of a standard three-zone CVD reactor that contains integratedcircuit chips on which a titanium carbonitride layer is to be deposited. Illustratively, the temperature in the reactor ranges from about 325 degrees Celsius at its entrance side to approximately 375 degrees Celsius at the exit or pump-down side thereof. The pressure in the reactor is established in the range of 40-to-100 milliTorr. A typical pumping speed is 1#50 cubic feet per minute. Under these conditions, a titanium carbonitride layer forms on the chips in the reactor at a deposition rate of about 70-to-80 per minute. Effective barrier layers in the range of, for example, 1000-to-2000 A are thus formed on the chips in a relatively short processing time. A CVD-deposited layer of the type specified above may be designated TiCXNy. Analysis of such layers indicates that in many cases x and Z are each equal to or approximately equal to 1. More generally, in such layers 0.8 < x < 1.2 and 0.8 < y < 1.2. Significantly, titanium carbonitride layers are patternable in the same step in which an overlying layer of aluminum is etched. Thus, for example, a standard boron trichloride and chlorine plasma utilized to carry out conventional anisotropic reactive ion (or sputter) etching of aluminum is also effective to anisotropically etch the underlying titanium carbonitride layer. Although the primary emphasis herein is on forming oxygen-free layers of titanium carbonitride, in some cases the unavoidable inclusion of some oxygen therein is tolerable and may even be desirable. Layers of- oxygencontaining titanium carbonitride generally exhibit a higher resistance than titanium carbonitride but do have effective diffusion barrier properties. Layers containing up to 25 atomic percent oxygen exhibit acceptable resistivity for many device applications and therefore can be used.

Claims: Claims 1. An integrated-circuit device comprising first (22) and second (16) regions spaced apart from each other, CHARACTERIZED BY a diffusion barrier layer (24) comprising titanium, carbon and nitrogen interposed between said regions. 2. A device as in claim 1 wherein said barrier layer comprises titanium carbonitride. 3. A device as in claim 2 wherein said first region comprises a layer of aluminum overlying said barrier layer. 4. A device as in claim 3 wherein said second region comprises a layer of silicide. 5. A device as in claim 4 wherein said silicide is selected from the group consisting of cobalt silicide, tantalum silicide, titanium silicide, platinum silicide, palladium silicide, molybdenum silicide, and tungsten silicide. 6. A device as in claim 3 wherein said second region comprises a layer of tungsten. 7. A device as in claim 3 wherein said second region comprises a silicon body (10) having a shallow p-n+ junction formed below the surface thereof. 8. A devices in claim 1 wherein said barrier layer comprises a CVD-deposited layer of titanium carbonitride. 9. A device as in claim 8 wherein said barrier layer is 1000-to-2000 A thick. 10. A device as in claim 1 wherein said barrier layer comprises partially oxidized titanium carbonitride. 11. A device as in claim 10 wherein said second region comprises a layer (25) of conductive adhesion promoter directly underlying and in contact with said barrier layer. 12. A device as in claim 11 wherein said adhesion promoter layer comprises titanium. 13. A method of making an integrated-circuit device of the type that includes first and second regions having a diffusion barrier layer interposed therebetween, said method characterized by the steps of forming on said second region by chemical vapor deposition a diffusion barrier layer that comprises titanium, carbon and nitrogen, and then forming said first region overlying said barrier layer. 14. A method as in claim 13 wherein said barrier layer comprises titanium carbonitride. 15. A method as in claim 14 wherein said first region comprises a layer of aluminum. 16. A method as in claim 15 comprising the additional step of correspondingly patterning said aluminum and titanium carbonitride layers. 17. A method as in claim 16 wherein said aluminum and titanium carbonitride layers are sequentially etched by the same etchant 18. A method as in claim 17 wherein said etchant comprises a plasma derived from boron trichloride and chlorine. 19. A method as in claim 13 wherein said barrier layer comprises partially oxidized titanium carbonitride.

Inventors: DEAN ROBERT EARL, STAROV VLADIMIR, DEAN, ROBERT, EARL, STAROV, VLADIMIR
Applicants: AMERICAN TELEPHONE & TELEGRAPH, AMERICAN TELEPHONE & TELEGRAPH COMPANY
Application year: 1985
Main classification: H01L23
IPC codes: H01L21, H01L23, H01L29