DEVICE FOR DETECTING R-WAVES IN AN ELECTROCARDIOGRAM

Abstract: A device for detecting R-waves in an electrocardiogram comprising a filter which permits the passage of frequency band inclusive for R-waves in an electrocardiogram, and a peak-holding circuit which produces R-wave pulse signals by holding a peak phase of R-waves of the signals that have passed through the filter. This device for detecting R-waves in an electrocardiogram, makes it possible to effectively discriminate R-waves in the electrocardiogram from noise, as well as to reliably detect even deformed R-waves caused by irregular pulses.

Description: The present invention relates to a device for detecting R-waves in an electrocardiogram. Various devices have previously been used to try to detect R-waves in an electrocardiogram. The method most generally used comprises passing the frequency band including the R-waves through a filter and generating pulses by a monostable multi-vibrator when a predetermined threshold value is exceeded. Such a method may be effective for performing a simple count of heart rate, but it is not suitable for reading information including phase information from electrocardiographic wave patterns, since it cannot recognise the peak phase (time phase) of the R-wave. Further, if arrhythmia or a normal R-wave appears together with the artifact through lung or body movement, the problem arises in that it is difficult accurately to detect and recognize the arrhythmia or normal R-wave due to the change in the wave pattern. US-A-4240442 discloses a device for detecting the R-wave in an electrocardiogram, in which the electrocardiogram is filtered by a filter which passes selected frequency components, and the filtered signal passed to a comparator. The comparator compares the filtered signal with a reference voltage, which reference voltage is generated by an accumulation circuit connected to the output of the comparator. Thus, this document corresponds to the pre-characterising part of claim 1. However, the arrangement disclosed in US-A-4240442 is still liable to misfunction, and therefore the present invention proposes a device for detecting an R-wave in an electrocardiogram comprising: (a) a filter for passing frequency components including an R-wave from an electrocardiogram input; (b) a comparator for outputting an R-wave pulse when an input voltage passed through the filter is higher than a reference voltage, said comparator having two inputs, one of said inputs being coupled to the output of the filter; (c) a first accumulation circuit for accumulating charges from the output of the comparator and for outputting the reference voltage to the other input of the comparator; (d) a second accumulation circuit for accumulating a predetermined voltage, said second accumulation circuit being connected to said first accumulation circuit when a digital pulse is output from a logical operation circuit, the reference voltage being formed by accumulating, in the first accumulation circuit the R-wave pulse from the comparator and by the predetermined voltage from the second accumulation circuit; (e) a delay circuit for converting the R-wave pulse to a delay pulse and for outputting a delay pulse having a predetermined pulse width after the output from the comparator has fallen; (f) the logical operation circuit being arranged to disconnect the first accumulation circuit and the second accumulation circuit when the R-wave pulse from the comparator is output or when the delay pulse from the delay circuit is output and for connecting the first and second accumulation circuits at any other occassion; and (g) an adjusting circuit for adjusting the voltages of the first and second accumulation circuits when the delay pulse is output from the delay circuit so that the voltage of the first accumulation circuit is reduced by electrically charging or discharging the first and second accumulation circuits. With the present invention, the use of the delay circuit may prevent a T-wave from being mistaken for the R-wave. Furthermore, the present invention may further include a limiting circuit arranged to output, from an output terminal (B) the direct output of the comparator when the delay pulse is not output from the delay circuit and not to output from the output terminal (B), the direct output from the comparator when the delay pulse is output from the delay circuit. Such a limiting circuit permits more accurate detection of the R-wave when the T-wave has a higher amplitude than the R-wave. Figure 1 is a block diagram of the R-wave detecting device of the present invention; Fig. 2 is a circuit diagram of one arrangement of the portion A enclosed within the broken line in Fig. 1, which arrangement does not form part of the present invention. Fig. 3 shows the wave patterns at various points in the device in Fig. 1 and Fig. 2; Fig. 4 is a block diagram showing another example of the part A enclosed within the broken line in Fig. 1; Fig. 5 shows the wave patterns at various points in the device of Fig. 1 and Fig. 4; and Fig. 6 shows the wave patterns at various points in the device of Fig. 1 and Fig. 4 when a deformed R-wave is input. Figure 1 is a block diagram of the device for detecting R-waves in an electrocardiogram, according to the present invention. The block diagram shows an electrocardiogram input terminal (11), a filter (12) for passing frequency components including an R-wave from the electrocardiogram input, a peak hold circuit (13) for forming R-wave pulses, a reference voltage setting means (14) for setting the reference voltage value of the above peak hold circuit (13), and an output terminal (16) for outputting R-waves pulses. The peak hold circuit (13) enclosed within the broken line in Figure 1 may, in an arrangement which does not form part of the present invention, consist of a comparator (COMP), a diode (D), a capacitor (C), and a resistance (R), as shown in Fig. 2. The reference voltage setting circuit (14) of the portion Fig. 1 consists of a field effect transistor (FET) and a bias voltage +Vb. The input terminal (20) for supplying an R-wave is connected to the non-reversal input terminal (23) of the comparator (COMP), the output (25) of the comparator (COMP) is supplied to the pulse output (21), and is also connected through the diode (D) to the (+) terminal of the capacitor (C). The output of the (+) terminal of the capacitor (C) is input to the reversal input terminal (24) of the comparator (COMP), and is also connected to the terminal (d) of the field effect transistor (FET). A bias voltage +Vb is supplied to the terminal (26) of the field effect transistor (FET). Here, the voltage E₂ at the reversal input terminal (24) of the comparator (COMP) shown in Fig. 3(c) can be set higher than the amplitude value of the T-wave in the time phase of a T-wave, and E3 can be set at a constant voltage higher than the noise in the electrocardiogram, for example, at a value relative to the R-wave amplitude voltage E₁ , i.e., at approximately E₃ = 1/2E₁ (V) (hereinafter E₂ is referred to as the first reference voltage, and E₃ as the second reference voltage). Referring next to the wave patterns at the respective portions as shown in Figure 3, the operation of the device for detecting an R-wave in an electrocardiogram constituted as described above is explained. An electrocardiographic wave pattern shown in Figure 3(a) is input to the input terminal (11) shown in Figure 1. The wave pattern is converted by the filter (12) to a wave pattern as shown in Fig. 3(b). The signal (15) thus converted is input to the input terminal (20) in Figure 2. The second reference voltage E₃ (V) is supplied to the non-reversal input terminal (24) of the comparator (COMP). The second reference voltage E₃ is determined by the capacitor (C) and the field effect transistor (FET). The voltage in Fig. 2 at point (22) is shown in Fig. 3. When the wave pattern of Fig. 3(b) input to the non-reversal input terminal (23) of the comparator (COMP) exceeds the second reference voltage E₃ , the output (25) of the comparator (COMP) becomes high, as shown in Fig. 3(d). Under this condition, the output (25) of the comparator (COMP) charges the capacitor (C) through the diode (D) as shown in Fig. 3(c). Consequently, the potentials of the terminal (28) of the field effect transistor (FET) and the reversal input terminal (24) of the comparator (COMP) are raised. Next, when the peak of the R-wave signal input to the input terminal (20) has passed, the potential of the non-reversal input terminal (23) and the reversal input terminal (24) of the comparator become reversed by the voltage of the charged capacitor (C), whereby the output (25) of the comparator (COMP) becomes low, as shown in Figure 3(d), exhibiting the peak phase (time phase) of R-wave RPT. When the output (25) of the comparator (COMP) becomes low, the charged capacitor (C) initiates a discharge through the field effect transistor (FET), whereby the first reference voltage (E₂) drops as shown in Fig. 3(c). As the terminal (28) of the field effect transistor (FET) approaches the bias voltage +Vb of the terminal (26) of the field effect transistor voltage (FET) previously set, the discharge voltage is reduced until discharge is stopped on reaching the second reference voltage (E₃) shown in Fig. 3(c), and the field effect transistor (FET) holds the second reference voltage (E₃). Thus, since the peak amplitude voltage of the R-wave constantly arrived at is made the peak value of the first reference voltage (E₂), and the second reference voltage is held before the next R-wave arrives, the first reference voltage is determined by the R-wave peak amplitude value of the previous amplitude. Next, an example which is according to the present invention is described. Figure 4 is a block diagram showing an example of the device for detecting an R-wave in an electrocardiogram according to the present invention. In the Figure, the portion enclosed within the broken line corresponds to the reference voltage setting circuit (14) of the embodiment shown in Figure 1. In Fig. 4, the reference numeral (42) is the first accumulation circuit. The first accumulation circuit (42) is a means for accumulating charges and corresponds to the capacitor (C) in the embodiment in Fig. 1. The reference numeral (43) is a logical operation circuit. The logical operation circuit (43) has two inputs, and when both the inputs are at the "0" level, the input becomes "1" level. The reference numeral (45) is an adjusting circuit. This adjusting circuit (45) is provided for erasing a voltage greater than the standard input, by determining that input as the standard input and comparing the voltages of other inputs with that of the standard input, and a known circuit such as a clamping circuit may be used. The reference numeral (47) is the second accumulation circuit. The second accumulation circuit (47) is constantly supplied with a voltage of V₁ (V), and is provided to accumulate charges as for the above first accumulation circuit. Such an accumulation circuit can be constructed of, for example, a parallel circuit of a resistance and a capacitor. The reference numeral (49) is a delay circuit. The delay circuit is provided for delaying the digital pulse in time. The reference numeral (50) is a limiting circuit. The limiting circuit (50) is arranged on the output side of the comparator (41) for outputting R-wave pulses through the limiting circuit (50) and operates as a circuit for outputting a compulsory "0" level output at the time zone with the pulse width of the delayed output pulse which is the output from the delay circuit (49), and can be constructed of, for example, a combination with a switching circuit or a logical operation circuit. In other words, the limiting circuit (50) is provided for a more correct detection of an R-wave in the case when the T-wave has a higher amplitude than the R-wave, and is another advantageous embodiment of the reference voltage setting means of the present invention. In Fig. 4, the reference numerals (44), (46) and (48) are switches, respectively, and each is provided so as to be closed when the respective outputs of the logical operation circuit (43) and the delay circuit (49) become "1". The voltage V₁ (V) exhibited by the second accumulation circuit (19) set as described above exhibits the same voltage value as the second reference voltage E₃ in the first example of the device for detecting an R-wave in an electrocardiogram according to the present invention. Next, referring to the wave patterns of the respective portions shown in Figure 5 and Figure 6, the action of the device for detecting an R-wave in an electrocardiogram according to the present invention is to be described. The input (1) in the comparator (41) corresponds to the wave pattern (a) in Figure 5 and Figure 6, the output (n) from the comparator (41) to the wave pattern (b) in Fig. 5 and Fig. 6, the input (m) in the comparator (41) to the wave pattern (c) in Fig. 5 and Fig. 6, the output from the delay circuit (49) to the wave pattern (d) in Fig. 5 and Fig. 6, and the voltage value at the second accumulation circuit to the wave pattern (e) in Fig. 5 and Fig. 6, respectively. Initial state The state from the initiation of actuation of the device for detecting an R-wave in an electrocardiogram according to the present invention to the arrival of the first R-wave is called the initial state. In this initial state, the input ends in the logical operation circuit (43) are both "0" level, the output is "1" level, and the switch (44) is closed. The input end (m) in the comparator exhibits the second reference voltage V₁ (V). Input of R-Wave state As shown in Figure 5, with a rise of R-wave, the potential at the input end (ℓ) in the comparator becomes higher than the potential of the voltage V₁ (V) applied to the input end (m), whereby the output from the comparator (41) becomes "1" level. The output from the output end (n) of the comparator (41) is output as R-wave pulses to the first accumulation circuit (42), the logical operation circuit (43) and the delay circuit (49), to the input end (o) of the limiting circuit (50). The output from the comparator (41) input to the first accumulation circuit (42) elevated the potential at the input end (m) of the comparator (41). The output (n) from the comparator (41) input to the logical operation circuit (43) makes the output from the logical operation circuit (43) "0" level, opening the switch (44), and the input (m) in the comparator (41) becomes in the state at which the peak value in Fig. 5(c) is held. After passing R-wave peak After the R-wave peak has passed, the potentials at both input ends (ℓ) and (m) in the comparator are reversed, and the output from the comparator (41) becomes "0" level. Accordingly, the fall of the output (n) from the comparator (41) is the time at the peak point of the R-wave (peak time phase), indicated by the PT portion in Figure 5(b) and Figure 6(b). On the other hand, a delayed delay pulse is output from the delay circuit (49), and the switch (46) and the switch (48) are closed. Further, the delay pulse is also input to the input end (p) in the limiting circuit (50), and the output end B in Figure 4 is compulsorily made "0" level at the time corresponding to the delay pulse width. When the switch (48) is closed, as shown in Figure 5(e), the charges accumulated in the second accumulation circuit are discharged. When the switch (46) is closed, the voltages at the first accumulation circuit 42 and the second accumulation circuit (47) are compared within the adjusting circuit (45). Then, with the fall of the delay pulse in the delay circuit, the switches (48) and (46) are opened, while the switch (44) is closed, whereby the charges accumulated in the first accumulation circuit (42) are migrated to the second accumulation circuit (47) and the voltage drops as shown in Fig. 5(c) to approach the second reference voltage V₁ (V). Deformed R-wave input The abnormal electrocardiogram shown in the wave pattern in Figure 6 has a very high peak amplitude of the R-wave or a broad QRS width, different from the normal electrocardiogram as shown in Figure 3 or Figure 5. This is a ventricular ectopic, a block wave pattern, etc., which sometimes appears in normal persons. In such a case, the charges in the first accumulation circuit (42) become greater than usual, and therefore, after discharge by time constant, the potential at the input end (m) in the comparator becomes greater than the peak voltage of the subsequent R-wave, and thus, in some cases, an R-wave cannot be detected. Accordingly, while the delay pulse output from the delay circuit is at the "1" level, the voltage value at the first accumulation circuit (42) is compared with that of the second accumulation circuit (47). Here, since the voltage value at the first accumulation circuit does not surpass the voltage value at the second accumulation circuit, the voltage thereof becomes as shown by the wave pattern (c) in Figure 6. The above action is carried out by the adjusting circuit (45), and the voltage value at the second accumulation circuit becomes a constantly stable voltage by the discharge effected when the delay pulse is "1" level. As described above, this invention has the effect of holding the phase (time phase) of R-wave, effectively discriminating the R-wave from noise in an electrocardiogram by providing a reference voltage set greater than the noise amplitude voltage, and also stably detecting an R-wave deformed by arrhythmia, and further, effectively prevents a T-wave being taken for an R-wave by providing a delay circuit thereby appropriately setting the delay time. LIST OF REFERENCE NUMERALS AND SYMBOLS 11...Input end, 12...Filter, 13...Peak hold circuit, 14...Reference voltage setting circuit, 15...Converted signal, 16...R-wave pulse output terminal, 20...Input terminal, 21...Pulse output, 22...Voltage measuring section in Figure 3 (C), 23...Non-reversal input terminal, 24...Comparator reversal input terminal, 25...Comparator output, 26, 27, 28...Terminal of FET, COMP...Comparator, R...Resistance, FET...Field effect transistor, C...Capacitor, D...Diode, E1...R-wave peak amplitude voltage, E₂...The first reference voltage, E₃...The second reference voltage, 41...Comparator, 42...The first accumulation circuit, 43...The logical operation circuit, 44, 46, 48...Switch circuit, 45...Adjusting circuit, 47...The second accumulation circuit, 49...Delay circuit, 50...Limiting circuit, l,m...Comparator input, n...Comparator output, o, p...Input end in limiting circuit, PT, RPT...R-wave peak phase (time phase), V₁...The second reference voltage, V₂...The first reference voltage.

Claims: A device for detecting an R-wave in an electrocardiogram comprising: (a) a filter (12) for passing frequency components including an R-wave from an electrocardiogram input; (b) a comparator (41) for outputting an R-wave pulse when an input voltage passed through the filter is higher than a reference voltage, said comparator (41) having two inputs, one of said inputs being coupled to the output of the filter (12); (c) a first accumulation circuit (42) for accumulating charges from the output of the comparator (41) and for outputting the reference voltage to the other input of the comparator (41); characterised in that: the device further includes: (d) a second accumulation circuit (47) for accumulating charges to a predetermined voltage (V₁), said second accumulation circuit (47) being connected to said first accumulation circuit (42) when a digital pulse is output from a logical operation circuit (43), the reference voltage being formed by accumulating, in the first accumulation circuit (42) the R-wave pulse from the comparator (41) and by the predetermined voltage (V₁) from the second accumulation circuit (47); (e) a delay circuit (49) for converting the R-wave pulse to a delay pulse and for outputting a delay pulse having a predetermined pulse width after the output from the comparator (41) has fallen; (f) the logical operation circuit (43) being arranged to disconnect the first accumulation circuit (42) and the second accumulation circuit (47) when the R-wave pulse from the comparator (41) is output or when the delay pulse from the delay circuit (49) is output and for connecting the first and second accumulation circuits (42,47) at any other occassion; and (g) an adjusting circuit (45) for adjusting the voltages of the first and second accumulation circuits (42,47) when the delay pulse is output from the delay circuit (49) so that the voltage of the first accumulation circuit (41) is reduced by electrically charging or discharging the first and second accumulation circuits (42,47). A device according to claim 1, further comprising a limiting circuit (50) arranged to output, from an output terminal (B) the direct output of the comparator (41) when the delay pulse is not output from the delay circuit (49) and not to output from the output terminal (B), the direct output from the comparator (41) when the delay pulse is output from the delay circuit (44).

Inventors: SASAKI, MINORU
Applicants: KABUSHIKI KAISYA ADVANCE
Application year: 1985
Main classification: A61B5
IPC codes: A61B5