A METHOD OF AND APPARATUS FOR CONTROLLING A STEPPING MOTOR

Abstract: A novel method of controlling a stepping motor comprises applying pulsed power (P1, P2) to one or two phases ( theta 1, theta 2) of the motor for variable pulse duration varied according to a programme in successive steps (P1, P2; P5, P3; P6, P4), the timing of the steps (S1, S2) being controlled to determine the stepping rate, and the programmed variation of the pulse duration being arranged so to vary the ratio of energisation of adjacent phases ( theta 1, theta 2) in successive steps (S1, S2) that several successive steps (S1, S2) are required to step the motor between adjacent phases ( theta 1, theta 2). Apparatus for carrying out the method comprises a stepping motor (11) with several phase windings and characterised by a microprocessor (1) arranged to load a downcounter (3) with a desired division factor to divide a clock signal to produce the desired step rate (T2), the downcounter (3) being arranged to drive a motor step counter (8) arranged to determine the steps of energisation/deenergisation of the phases ( theta 1- theta 4) through a PROM, programmable read only memory (10) arranged to apply pulsed power (P1, P2) to one or two adjacent phases ( theta 1, theta 2) for the variable pulse durations.

Description: "A METHOD OF AND APPARATUS FOR CONTROLLING A STEPPING MOTOR" This invention relates to a method of and apparatus for controlling a stepping motor. Because of the fast rates of acceleration and deceleration and oscillation due to overshoot stepping motors, particularly large motors for example with a step angle of 1.8°, experience a high level of mechanical shock and associated step noise in operation. Methods of halving the step angle by alternately energising one phase then two adjacent phases have been proposed but are of little practical effect. It is an object to provide for micro stepping in order to reduce step shock and resultant noise: According to one aspect of the invention, a • method of controlling a stepping motor comprises applying pulsed power to one. or two phases of the motor for variable pulse duration varied according to a programme in successive steps, the timing of the steps being controlled to determine the stepping rate, and the programmed variation of the pulse duration being arranged so to vary the ratio of energisation of adjacent phases in successive steps that several successive steps are required to step the motor between adjacent phases. The programmed variation is suitably arranged to step the motor between adjacent phases in 8 steps. During each interval between successive steps the motor supply voltage is suitably applied across the motor windings for an initial predetermined part of the interval. Apparatus for carrying out the method according to the invention comprises a stepping motor with several phase windings and characterised by a micro¬ processor arranged to load a downcounter with a desired division factor to divide a clock signal to produce the desired step rate, the downcounter being arranged to drive a motor step counter arranged to determine the steps of energisation/deenergisation of the phases through a PROM, programmable read only memory arranged to apply pulsed power to one or two adjacent phases for the variable pulse durations. The PROM is suitably addressed by a sequence counter arranged to determine the maximum pulse duration. The downcounter is suitably arranged to trigger a monostable full power timer arranged to apply the motor supply voltage across the windings of the motor for a preset period of time. The power timer may be an adjustable monostable, multi-vibrator arranged to short circuit resistors in series with the windings of the motor and the full power supply by way of transistors, and is suitably set to operate for a period of between 1 and 2 milliseconds. In an embodiment the microprocessor and a clock divider are clocked from a crystal oscillator operating at 2.3816 MHz, the divider clocking a 16-bit downcounter at 149.13 KHz and a 4-bit sequence counter at 18.3 KHz addressing the lower addresses of a 512 x 4-bit PROM. The downcounter steps a 5-bit motor step counter addressing the upper addresses of the PROM, and also steps the full power timer. The invention will now be described by way of example with reference to the accompanying partly diagrammatic drawings, in which:- Figure 1 is a schematic block diagram of a micro¬ processor arranged to control the step rate of a 4-phase stepping motor; Figure 2 is a waveform diagram for the full power timer and the four phases of the stepping motor of the arrangement of Figure 1 with the armature of the motor moving from phase 2 towards phase 1 over successive steps of counter; Figure 3 is a waveform diagram showing energis¬ ation of the four phases for successive steps of the step count against sequence count, and Figure 4 is a waveform diagram for the full power timer and the four phases of the stepping motor starting from an initial condition and moving from phase 1 towards phase 2. A microprocessor 1 supplied with clock pulses from a 2.3816 MHz crystal oscillator 2 is arranged to load a 16-bit presettable downcounter 3 with a required division factor by way of an address bus 4, data bus 5, and control bus 6. The downcounter 3 is supplied with clock pulses at a rate of 149.13 KHz from a clock divider 7 fed from the oscillator 2, and divides the clock rate to produce a desired . step rate which is fed to a 5-bit motor step counter 8 and to an adjustable full power timer 9. The motor step counter 8 has its output applied to the five high order address bits A 4 to Ag of a 512 x 4-bit programmable read only memory (PROM) 10 having its outputs D0-D3 connected through respective motor drive amplifiers to the respective phases 8^84 of a 4-phase stepping motor 11 by way of respective switching transistors, not shown, arranged on receipt of a pulse from the associated motor drive amplifier to ground the phase and allow application of full power voltage 14.across the ' phase winding. It will be understood that the phase windings -1 to 4 are connected as conventional in aligned pairs, each pair having a common centre point respectively connected to the full power supply 14. The four lower order __ address bits A Q -A3 of the PROM 10 are connected to respective output bits Q1-Q4 of a 4-bit sequence counter 12 clocked at 18.64 KHz from the clock divider 7. The. full power timer 9 comprises an adjustable monostable multivibrator outputting to a pair of transistors T j _,T2 each arranged to bypass a respective 10 ohm 25 watt resistor 13 serially connected to - the windings of the stepping motor 11 and the full power supply 14. In operation, the step rate of the motor 11 is controlled by the microprocessor 1 which loads the downcounter 3 to produce the desired step rate when the 149.13 KHz clock rate is divided by the ' preset downcount. Each output of the downcounter will step the motor step counter one count and at the same time trigger the full power timer 9 for a preset period of time to turn on the transistors τ l' τ 2 to -°YP ass or short circuit the resistors 13 and to apply the full motor supply voltage across the motor windings. The full power timer may be set, for example, for a period of between 1 and 2 milliseconds. At all other periods the resistors are in series with .the motor windings. According to the grounding pulses applied to the outer ends of the phases power is applied to the phases. Microstepping is achieved by applying power pulses to one or two of the poles θ 1 -θ 4 for variable periods as determined by the contents of the PROM 10. For example at step one power pulse PI may be applied to the- θτ_ winding for 2/16 of a period of 858 yi sec determined by 16 steps- of the sequence counter 12, and P2 to Θ2 winding for 14/16 of the period, as illustrated in Figure 2. In Figure 2 the output waveform of the full power timer 9 is shown above the waveforms at the four phases Θ1-Θ4. The waveforms are divided into periods Tτ_ of 858 μ sec determined by 16 steps of the sequence counter 12 and steps S1,S2 separated by a time T2 determined by the preset value of the 16-bit downcounter 3 multiplied by 149.13 KHz. As the power is applied with the centres of the pulses P-^ and P 2 to the two phases at the same point, the motor will step to a point 2/16 of a step away from the -2 location in the direction of .0^. With successive steps of the step counter 8 the period that power is supplied to Θ2 decreases by 2/16 as at P3,P4 and the period that power is supplied to θi increases by 2/16 as at P ~ , ^Q SO the motor armature will move in the direction of θ- j _ as determined by the ratio of the pulses in successive steps of 2/16. At each step S-^,S2 of the step counter 8, the full power timer is triggered to generate a pre- determined pulse P7 to the transistors T^ and T2 to short .circuit the resistors 13 and apply full motor supply voltage across the windings of the motor 11. In this manner each . step between phases is divided into eight sub-steps and as a result step shock and the resultant noise is substantially reduced and at the same time power consumption and heat dissipation is reduced. During the period that the motor is at rest between steps, the counter 12 will continually sequence round the sixteen steps of the energise/de-energise sequence as determined by the motor step counter 8 applied to the high order address bits A4~Ag of . the PROM 10, and the arrangement of the bit pattern •_• in the PROM 10 determines the on/off time of the four motor phases. This may be symmetrical as indicated in waveform Figure 2, or may be modified to suit the power profile of the motor, for example as indicated in waveform Figure 3. In the waveform of Figure 3 the energised periods of the four phases Θ1-Θ4 are represented horizontally as steps of the 4-bit sequence count over 32 steps of the motor step counter 8 shown vertically. The shaded areas represent the energisation of the phase, and assymetry between adjacent phases is evident, for example, at steps 4.5; 12,13; 20,21; 29,30 and is determined by arrangement of the PROM bit pattern to suit the power profile of the motor. In a particular embodiment, the crystal oscillator 2 was a standard quartz crystal oscillator, the micro¬ processor 1 an RCA 1802 processor, the downcounter 3 an RCA-CDP 1878, the clock divider 7 a CD 4040B; the motor step counter 8 a CD 4040B; the sequence counter 12 a CD 4520B; the full power timer 9 a CD 4098B; the PROM 10 a Monolythic Memories Incorporated 6306-IN. Referring now to Figure 4 there will be described the initiation of motor stepping: from an initial position at phase ΘI and moving towards phase Θ2. The period of time that power is applied to any winding θ-_ to Θ4 of the motor is controlled by the lower four address bits Ag to A 3 to the motor PROM ID. . At an initial- condition of the system both the 4-bit sequence counter 12, and the 5-bit motor step counter 8 are at zero. As soon as the initialising reset is removed from the counters 12,8 the 18.64 KHz clock will start to increment the sequence counter 12, but the motor counter 8 will remain at zero, i.e. at step 1 on the waveform of Figure 4. Under these-circumstances, power will be applied to the phase 1 winding θ*^ at a 50% on/off ratio at 1165 Hz, whilst all other phases & 2 to Θ4 will be off. As soon as the first motor step pulse is received. i.e. when the motor is required to move and a pulse is applied from, downcounter 3 to the motor step counter 8 and the full power timer 9. The motor step counter 8 will increment one count, and the high order address A4 through A8 will change to the ste ' 2 address. This will cause the phase energisation pattern to alter so that phase θ^ will be on for 14/16 steps of the sequence counter, and phase 2 will be on for 2/16 steps, and the 18.64 KHz clock will continue to generate this pattern until it is again by the next step pulse S2 from the counter 3, at which point phase θ- j _ will be on for 12/16 counts of the.18.64 KHz clock and phase 2 for 4/16 counts of the 18.64 KHz clock. The period between the step pulses may be any number of cycles of the sequence counter as determined by the required step rate. At motor step pulses SI and S2 the full power timer 9 is triggered to switch the transistor 13' to apply full power for th predetermined time and pulsed power is constantly applied to the phases 61,62 of the motor in order to maintain its index position, but the relative on/off periods of the various phases is only altered for each step, count when the motor is required to move forward_ It will be understood that at successive motor step pulses Sl,S2 etc the ratio of phase energisation pulses will progressively be varied in similar manner so that eight motor step pulses are required to step in stages between phases. This method of applying power to the windings reduces the power dissipation in the motor due to the inductive effects of the windings. The power requirement of the motor is further reduced during its idling index maintaining condition by connecting a series resistor between the motor windings and the ground rail, and switching these series resistors out of circuit for a short period, (1 to 2 milliseconds) when the motor is actually required to change its position. The waveform diagram illustrates the first two steps only of the motor sequence. The remaining 30 steps continue the progression through all 4 phases, after which the motor will have moved forward four complete pole positions (7.2 degrees). Hence each nominal 1..8 degree motor step is divided into 8 micro steps of 0.225 degrees. The number of divisions of the basic motor step may be varied from those used in this system, but the maximum rate at which the phases can be switched is largely determined by the winding inductance, the necessity to choose a chopping frequency above the normal audio range i.e. 18.64 KHz, and the choice of a convenient comm¬ ercially available capacity PROM, in this case the Monolythic Memories Incorporated PROM 6306-IN, to generate the phase steering pattern.

Claims: CLAIMS 1. A method of controlling a stepping motor (11) characterised by applying pulsed power (P1,P2) to one or two phases (θ^,θ 2 ) of the motor for variable pulse duration varied according to a programme in successive steps (Pl,P2; P5,P3; P6,P4), the timing of the steps (S1,S2) being controlled to determine the stepping rate, and the programmed variation of the pulse duration being arranged so to vary the ratio of energisation of adjacent phases (61,62) in successive steps (Sl,S2) that several successive steps (S1,S2) are required to step the motor between adjacent phases (61,62)- 2. A method as claimed in claim 1, characterised in that the programme is arranged to step the motor between adjacent phases in eight steps (S1,S2), at each step the pulsed power being applied to one phase (62) being reduced and that to the adjacent phase (θ ) being increased in pulse duration (P1,P2) one eight . 3. A method as claimed in claim 1 or in claim 2, characterised in that during intervals (T2) following initiation of each step (S1,S2) , a full motor supplyvoltage (14) is applied to the motor poles for an initial predetermined part (P7) of the intervals (T2) . 4. A method as claimed in claim 3, characterised in that the initial predetermined part (P7) of the intervals extends over a plurality of periods of the pulses (P1,P2) applied to the phases (6i,6 2 _ 5. Apparatus for carrying out the method of claim 1, and comprising a stepping motor (11) with several phase windings and characterised by a microprocessor (1) arranged to load a downcounter (3) with a desired division factor to divide a clock signal to produce the desired step rate (T2), the downcounter (3) being arranged to drive a motor step counter (8) arranged to determine the steps of energisation/deenergisation of the phases (Θ1-Θ4) through a PROM, programmable read only memory (10) arranged to apply pulsed power (P1,P2) to one or two adjacent phases (61,62) for the variable pulse durations. 6. Apparatus- as claimed in claim 5, characterised in that the PROM (10) is addressed by a sequence counter (12) arranged to determine the maximum pulse duration. 7. Apparatus as claimed in claim 5 or claim 6, characterised in that the downcounter (3) is arranged to trigger a full power timer (9) arranged to apply the motor supply voltage (14) to the motor poles for a preset period of time (P7). 8. Apparatus as claimed in claim 7, characterised in that the full power timer (9) is an adjustable monostable multivibrator arranged to short circuit resistors (13) in series with the poles of the motor and the full power supply (14), by way of transistors (T1,T2).

Inventors: KENT JOHN, WHEELDON PETER G, KENT, JOHN, WHEELDON, PETER, G.
Applicants: PERITRONIC MEDICAL IND PLC, PERITRONIC MEDICAL INDUSTRIES PLC
Application year: 1985
Main classification: H02P8
IPC codes: H02P8