Liquid crystal display panel and manufacturing method thereof

Abstract: A liquid crystal display panel which employs liquid crystal display devices each of which has a nonlinear element having a diode characteristic and a liquid crystal element.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a liquid crystal display panel which employs liquid crystal pixel elements each of which has a nonlinear element having a diode characteristic and a liquid crystal element. The invention also pertains to methods for the manufacture of the liquid crystal display panel. Description of the Prior Art Heretofore there has been proposed a display panel which employs m x n (where n ≧ 1 and m ≧ 1) liquid crystal pixel elements M₁₁ to M 1n , M₂₁ to M 2n , ... and M m1 to M mn . The liquid crystal pixel element M ij (where i = 1, 2 ... n, j= 1, 2 ... n) has a nonlinear element U ij having a diode characteristic and a liquid crystal element L ij . In this display panel, the liquid crystal pixel element M ij is connected to a row conductive layer F i and a column conductive layer H j at their intersection. With such a display panel, an image display can be provided by driving the liquid crystal pixel elements M₁₁ to M mn using the row conductive layers F i to F m and the column conductive layers H₁ to H n . Examples of such devices are described in U.S. Patent No. 4413883 and European application EP-A-0070598. However, the conventional type of display panel is complex in the structure of the non linear element U ij , in the structure of the liquid crystal element L ij and in the structure for connecting the liquid crystal pixel element M ij to the row conductive layer F i and the column conductive layer H j . On this account, the prior art liquid crystal display panel is difficult to manufacture and expensive. Furthermore, it is difficult to arrange m x n liquid crystal pixel elements M₁₁ to M mn in an (m x n) matrix form with a high density, so that resolution of the image display is relatively low. Summary of the invention It is therefore an object of the present invention to provide a novel liquid crystal display panel which employs liquid crystal pixel elements each of which has a liquid crystal element and a non linear element having a diode characteristic and connected in series with the non linear element. Another object of the present invention is to provide novel methods for the manufacture of such a liquid crystal display panel. According to a first aspect, the invention provides a liquid crystal pixel display comprising: first and second substrate members disposed opposite at a predetermined distance in substantially parallel relation to each other, and liquid crystal filled between the first and second substrate members, the first substrate member including a first substrate, m stripe-like row electrodes F₁, F₂... F m arranged on the interior surface of said first substrate, each row electrode having a width w, and n display electrodes C ij (where j = 1, 2... n) coupled to each row electrode F i (where i = 1,2... m) through a respective non-linear element U ij having a diode characteristic; the second substrate member including a second substrate and a plurality of n x q, where q is an integer equal to or greater than 1, stripe-like conductive layers H₁₁, H₁₂ ... H 1q ; H₂₁ ... H₂₂ ... H 2q ; ... and H n1 , H n2 ... H nq sequentially arranged on the interior surface of said second substrate in the row direction and extending in the column direction, the conductive layers H j1 to H jq being opposite the display electrodes C 1j to C mj ; characterised in that each non-linear element U ij is a laminate A ij of a first layer Q ij arranged on a portion D ij of the respective row electrode F i , each layer Q ij being arranged in the row direction and having substantially the same width w as the row electrode F i , and a second conductive layer E i formed on the layer Q ij and having substantially the same width w as the layer Q ij , the two side faces of the laminate A ij extending in the row direction being covered with insulating material (K ij , K ij '; K i ), and the respective display electrode C ij has substantially the same width as the length of the laminate and extends in a column direction over the laminate A ij and onto the insulating material. In preferred embodiments of the invention, the liquid crystal display panel comprises (a) first and second substrate members disposed opposite at a predetermined distance in substantially parallel relation to each other and (b) liquid crystal filled between the first and second substrate members. The first substrate member comprises (a) a first substrate having an insulating surface, (b) a plurality m of stripe-like conductive layers F₁, F₂ F₃ ... F m arranged on the first substrate in the column direction and extending in the row direction, (c) a plurality n of layers Q i1 to Q in arranged on the conductive layer F i (where i = 1, 2 ... m) in the row direction and having substantially the same width as the later, (d) a conductive layer E ij being formed on the layer Q ij (where j = 1, 2 ... m) and having the same width and length as the later, (e) a portion D ij of the conductive layer F i underlying the layer Q ij , the layer Q ij and the conductive layer E ij constituting a laminate member A ij , (f) insulating layers K ij and K ij ' each formed over the entire areas of side faces of the laminate member A ij (or (f)' a insulating layers K i formed on the first substrate and extending between the laminate member A i1 to A in and A (i+1)1 to A (i+1)n ) and (g) a conductive layer C ij formed on the first substrate and corresponding to the laminate member A ij , the conductive layer C ij having substantially the same width as the length of the laminate member A ij and extending on the side face of the insulating layer K ij and onto the insulating layer K ij , the laminate member A ij and the insulating layer K ij ', and the both side faces defining the width of the conductive layer C ij being substantially in agreement with the both side faces defining the length of the laminate member A ij (or (g)' a conductive layer C ij formed on the insulating layer K i and corresponding to the laminate member A ij , the conductive layer C ij having substantially the same width as the length of the laminate member A ij and extending onto the laminate member A ij , and the both side faces defining the width of the conductive layer C ij being substantially in agreement with the both side faces defining the length of the laminate member A ij ). The second substrate member comprises (a) a second substrate having an insulating surface, and (b) a plurality n x q (where q is an integer equal to or greater than 1) of stripe-like conductive layers H₁₁, H₁₂ ... H 1q ; H₂₁, H₂₂ ... H 2q ; ... and H n1 , H n2 H n3 ... H nq sequentially arranged on the second substrate in the row direction and extending in the column direction, the conductive layers H j1 to H jq being opposite the conductive layers C 1j to C mj . The laminate member A ij forms a nonlinear element U ij . The conductive layer H jr (where r = 1, 2, ... q), a portion B ijr of the conductive layer C ij confronting the conductive layer H jr and the portion of the liquid crystal filled between the conductive layer H jr and the portion B ijr forms a liquid crystal element L ijr . According to such a liquid crystal display panel of the present invention, the liquid crystal element L ijr can be driven by applying a driving signal to the liquid crystal display element M ijr via the row conductive layer F i and the column conductive layer H jr . Accordingly, the liquid crystal display panel provides an image display. Since the liquid crystal element L ijr is formed by the conductive layer H jr , the portion B ijr of the conductive layer C ij facing the conductive layer H jr and the portion of the liquid crystal between the conductive layer H jr and the portion B ijr , as mentioned above, the liquid crystal element L ijr is simple in structure. Furthermore, the nonlinear element U ij is formed by the aforementioned laminate member A ij , and hence is simple in construction. The liquid crystal display panel of the present invention is simple-structured in that the liquid crystal display element L ijr and the nonlinear element U ij are interconnected in series via the conductive layer C ij to constitute the liquid crystal display device M ijr and in that the liquid crystal display device M ijr is connected at one side to the row conductive layer F i forming the other electrode of the nonlinear element U ij and at the other side to the column conductive layer H jr forming the other electrode of the liquid display element L ijr . Accordingly, the liquid crystal display panel of the present invention is far simpler in structure than is conventional, in consequence of which m x (m x q) display crystal elements M₁₁₁ to M mnq can be arranged in an m x (n x q) matrix form with a high density, ensuring to provide an image display with high resolution. Moreover, according to the present invention, the liquid crystal display panel which has the aforesaid excellent feature can be produced by a manufacturing method of the present invention which includes a step of (A) preparing a first substrate member, (B) preparing a second substrate member, (C) turning the second substrate member upside down and disposing the first and second substrate members in opposing and substantially parallel relation to each other and (D) filling liquid crystal in the gap defined by the first and second substrate members. The step of preparing a first substrate member includes the steps of a) forming, on a first substrate, a laminate member A composed of a conductive layer F, a layer Q and a conductive layer E laminated in this order; (b) patterning the laminate member A into a first plurality of m stripe-like laminate members A₁ to A m sequentially arranged in the column direction and extending in the row direction; ( c ) depositing an insulating layer K over the entire area of the first substrate to cover the laminate members A₁ to A m ; (d) selectively etching away the insulating layer K to form insulating layers K i (and K i ') on both sides of the laminate member A i (where i = 1, 2 ... m) defining the width of the laminate members A i ; (e) forming a conductive layer C over the entire area of the first substrate to cover the laminate members A₁ to A m and the insulating layers K₁ to K m (and K₁' to K m '); and (f) patterning the conductive layer C, the second conductive layers E₁ to E m and the layers Q₁ to Q m to form display electrodes C i1 to C in extending over the laminate member A i and onto the insulating layer K i and to form from each laminate member A i a plurality of n separate laminate members A ij (for j = 1 to n) each composed of a conductive layer E ij , a layer Q ij and a portion D ij of the row electrode F i underlying the layer Q ij . The step of preparing a second substrate member includes the steps of forming, on a second substrate having an insulating surface, a plurality of n x q, where q is an integer equal to or greater than 1, conductive layers H₁₁, H₁₂ ... H 1q ; H₂₁, H₂₂ ... H 2q ; ... and H n1 , H n2 ... H nq sequentially arranged in the row direction and extending in the column direction, the conductive layers H j1 , H j2 , ... and H iq corresponding to the display electrodes C 1j , C 2j , ... and C mj of the first substrate member. The manufacturing method of the present invention requires only three masks for the fabrication of the liquid crystal display, that is, one for the formation of the laminate member A₁ to A m , one for the formation of the conductive layers C₁₁ to C mn and the laminate members A₁₁ to A mn and one for the formation of the conductive layers H₁₁ ∿ H 1r to H n1 ∿ H nr . Accordingly, the liquid crystal display panel having the aforesaid advantages can easily be manufactured at low cost. In the preferred embodiments of the invention, the steps (c) to (f) of preparing the first substrate member comprise the steps of: (c) depositing an insulating layer K having a thickness smaller than the laminate members A₁ to A m over the entire area of the first substrate to cover the laminate members A₁ to A m (or (C)' depositing an insulating layer K having a thickness larger than the laminate members A₁ to A m over the entire area of the first substrate to cover the laminate members A₁ to A m ), (d) selectively etching away the insulating layer K to form on both sides of the laminate member A i (where i = 1, 2 ... m) defining the width of the second laminate member A i (or (d)' selectively etching away the insulating layer K to form an insulating layer K i extending between the laminate members A i and A (i + 1) and flush therewith) (e) forming a conductive layer C over the entire area of the first substrate to cover the laminate members A₁ to A m and the insulating layers K₁ to K m and K₁' to K m ' (or (e)' forming a conductive layer C over the entire area of the first substrate to cover the laminate members A₁ to A m and the insulating layers K₁ to K m ) and (f) patterning the conductive layer C, the second conductive layers E₁ to E m and the layers Q₁ to Q m to form display electordes C i1 to C in extending from the substrate onto the insulating layer K i and the laminate member A i passing on the side face of the insulating layer K i , layers Q i1 to Q in and conductive layers E i1 to E in , a portion D ij of the conductive layer F i underlying the layer Q ij , the layer Q ij and the conductive layer E ij constituting the laminate member A ij (or (f)' patterning the conductive layer C, the second conductive layers E₁ to E m and the layers Q₁ to Q m to form conductive layers C i1 to C in extending from the insulating layer K i onto the laminate member A i , layers Q i1 to Q in and conductive layers E i1 to E in , a portion D ij of the row electrode F i underlying the layer Q ij , the layer Q ij and the conductive layer E ij constituting the laminate member A ij ). Other objects, features and advantages of the present invention will become more fully apparent from the following detailed description taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a plan view schematically illustrating an embodiment of the liquid crystal display panel of the present invention; Figs. 2, 3, 4 and 5 are sectional views respectively taken on the lines II-II, III-III, IV-IV and V-V in Fig. 1; Fig. 6 is a graph showing the voltage (V)-current(I) characteristics of the nonlinear element used in the liquid crystal display panel of the present invention depicted in Figs. 1 to 5, in comparison with the V-I characteristics of a conventional nonlinear element; Fig. 7 is a graph showing a part of the V-I characteristics depicted in Fig. 6; Fig. 8 is an electrical connection diagram of the liquid crystal display panel of the present invention shown in Figs. 1 to 5; Figs. 9 to 14 are a diagrams for explaining the manufacture of the liquid crystal display panel by the method of the present invention; Fig. 15 is a plan view illustrating another embodiment of the liquid crystal display panel of the present invention; Figs. 16, 17 and 18 are sectional views respectively taken on-the lines XVI-XVI, XVII-XVII, XVIII-XVIII and XIX-XIX in Fig. 15; Fig. 20 is an electrical connection diagram of the liquid crystal display panel of the present invention shown in Figs. 15 to 19; and Figs. 21 to 26 are diagrams for explaining the manufacture of the liquid crystal display panel shown in Figs. 15 to 19 by the method of the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS Figs. 1 to 5 illustrate an embodiment of the liquid crystal display panel of the present invention, in which a substrate 1 has an insulating surface. The substrate 1 is formed of, for instance, alkaline free glass. The substrate 1 has sequentially arranged thereon in column direction a plurality m of row conductive layers F₁, F₂ ... F m . The row conductive layer F i , also called row electrode, may preferable be composed of a layer 2 formed of, for example, aluminum and a nontransparent layer 3 formed of, for instance chromium. The row conductive layer F i has sequentially formed thereon a plurarity of n layers Q i1 , Q i2 ... Q in each of which is formed, for example, non-single-crystal semiconductor. The layers Q i1 , Q i2 ... Q in have same width as the row conductive layer F i . The layer Q ij (where i=1, 2 ... m and j=1, 2 ... n) may have, for example,an n-i- n type structure composed of an n-type layer, an i-type layer and an n-type layer, an n-i-p (or p⁻)-i-n type structure composed of an n -type layer, an i-type layer, a p(or p⁻)-type layer, an i-type layer and an n-type layer, a p-i-p type structure composed of a p-type layer, an i-type layer and a p-type layer, or a p-i-n(or n⁻)-i-p type structure composed of a p-type layer, an i-type layer, an n(or n⁻)-type layer, an i-type layer and an p-type layer. The layer Q ij also may be only a very thin insulating layer which may pass tunnel current. But Figs. 1 to 5 show the case where the layer Q ij has the n-i-n type structure. For the sake of brevity, the following description will be made in connection with the case where the layer Q ij has the n-i-n type structure. The layer Q ij has an n-type non-single-crystal silicon layer 21 formed on the row conductive layer F i , an i-type layer 22 of non-single-crystal semconductor formed on the layer 21 and an n-type non-single-crystal silicon layer 23 formed on the layer 22. The layer 22 is formed principally of silicon but contains carbon (C), nitrogen (N) or oxygen (O) in an amount of 1/10 or less relative to the silicon, and hence is formed of non-single-crystal semiconductor expressed by Si x C 1-x (where 0 < x < 1). The layer Q ij is covered over the entire area of its top surface with a conductive layer E ij . The conductive layer E ij is formed of, for instance, chromium. The part of the conductive layer F i underlying the layer Q ij , the layer Q ij and the conductive layer E ij make up a layer member A ij . The layer member A ij are covered over the entire area of its opposite side surfaces with insulating layers K ij and K ij ', respectively. The insulating layers K ij and K ij ' are formed of, for instance, silicon nitride or silicon oxide and have 0.1 to 0.5 µm in thickness. The substrate 1 has arranged thereon in a matrix form m x n (where m > 1, and n > 1) conductive layers C₁₁ to C 1n , C₂₁ to C 2n , C₃₁ to C 3n , ... and C m1 to C mn , these layers C ij being also called display electrodes. The conductive layer C ij (where i = 1, 2, ... m and j = 1, 2, ... n) is rectangular in shape and has a relatively large area, for example, 100 µm wide and 150 µm long. The conductive layer C ij extends on the layer member A ij i.e. the conductive layer E ij and the insulating layer K ij and K ij ' through the side surface of the insulating layer K ij and make contact with the conductive layer E ij . The conductive layer C ij has substantially same width as the long of the layer member A ij i.e. the conductive layer E ij and is formed of, for instance, chromium and is nontransparent. In this case, the opposing side surfaces of the conductive layer C ij , which determine the width of the conductive layer C ij are substantially aligned with the opposing side surfaces of the layer member A ij , which determine the long of the layer member A ij . Furthermore a relatively thin insulation protecting layer 25 is deposited on the substrate 1 to cover the conductive layer C₁₁ to C mn , the active layers A₁₁ to A 1n , A₂₁ to A 2n ... A m1 to A mn , the insulating layer K₁₁ to K mn and K₁₁' to K mn ' and parts of the row conductive layers F₁, F₂ ... F m which are not covered with the conductive layers C₁₁ to C 1n , C₂₁ to C₂...C m1 to C mn . The conductive layers F₁ to F m , the layer members A₁₁ to A mn , the insulating layers K₁₁ to K mn and K₁₁' to K mn ' and the conductive layers C₁₁ to C mn make up a substrate member 7. The substrate member 7 is formed, for example, as follows: A conductive layer F which will ultimately form the row conductive layers F₁ to F m , a layer Q which will ultimately form the layers Q₁₁ to Q mn and a conductive layer E which will ultimately form the conductive layers E₁₁ to E mn are deposited in that order on the substrate 1, as shown in Figs. 9A to 9E. The conductive layer F, the layer Q and the conductive layer E make up a layer member A which will ultimately form the layer members A₁₁ to A mn . The conductive layer F may be formed by a known method, for instance, a sputtering or electron beam evaporation process. The layer Q also may be formed by a known method, for example, a CVD, plasma CVD or photo CVD method. In my experiment, the substrate 1 formed thereon the conductive layer F was loaded through a loading and unloading chamber into a first reaction chamber, wherein a glow discharge was produced over the substrate 1 at a high frequency of 13.56 MHz in an atmosphere containing silane SiH₄, phosphine PH₃ and hydrogen, with the substrate temperature held in the range of 200 to 250 °C. As a result of this, an n-type microcrystalline silicon layer, which had a conductivity of 10⁻² to 10² (Ωcm)⁻¹ and contained hydrogen as a recombination center neutralizer, was deposited 300 to 1000 Å thick on the conductive layer F. Next, the substrate 1 was moved from the first reaction chamber into the next second reaction chamber wherein a gas mixture of silane Si m H 2m+2 (where m = 1, 2, 3, ...) (for example, SiH₄) and methyl silane SiH n (CH₃) 4-n (where n = 1, 2, 3) was discharged into a plasma, by which an i-type non-single-crystal silicon layer of Si x C 1-x was deposited 0.2 to 1 µm thick on the n-type layer. After this, the substrate 1 was returned from the second reaction chamber to the first reaction chamber, wherein another n-type layer similar to the above n-type layer was deposited by the same method on the i-type non-single-crystal silicon layer, thus obtaining the laminate member Q having the n-i-n type structure. The conductive layer E may also be formed by a known method, for instance, a sputtering or electron beam evaporation process. Next, the layer member A is subjected to a known pattern process using a first mask, providing m layer members A₁ to A m of the same pattern as row the conductive layers F₁ to F m , as shown in Figs. 10A to 10E. Next, a insulating layer K which will ultimately form the insulating layer K₁₁ to K mn and K₁₁' to K mn ' and which is relatively thin than the layer member A₁ to A m is deposited by a known method, for example, plasma CVD method on the entire surface of the substrate 1 to cover the active layers A₁ to A m , as shown in Figs. 11A to 11E. Next, the insulating layer K is selectively etched away by a known method, for example, a plasma etching method to form insulating layers K i and K i ' on both sides of the laminate member A i difining the width of the laminate member A i , as shown in Fisg. 12A to 12E. Next, a conductive layer C is diposited on the entire area of the substrate 1 to cover the laminate member A₁ to A m and the insulating layers K₁ to K m and K₁' to K m ' as shown in Figs. 13A to 13E. Next, the conductive layer C, the layer Q₁ to Q m and the conductive layer E₁ to E m of the layer members A₁ to A m are patterned by a known method using a second mask into the conductive layers C₁₁ to C mn , the layers Q₁₁ to Q mn and the conductive layers E₁₁ to E mn as shown in Figs. 14A to 14E. In this case, the conductive layer F₁ to F m are not patterned. The layer Q ij , the part of the conductive layer F i underlying the layer Q ij and the conductive layer E ij make up the laminate member A ij . Next, the insulating layers K₁ to K m and K₁' to K m ' are selectively etched away by a known mthod into the insulating layer K₁₁ to K mn and K₁₁' to K mn '. Next, the thin insulation protecting layer 25 is deposited on the entire surface of the substrate 1 to cover the conductive layers C₁₁ to C mn , the layer members A₁₁ to A mn , the insulating layers K₁₁ to K mn and K₁₁' to K mn ' and the part of the conductive layer F₁ to F m which are not covered with the conductive layers C₁₁ to C nm . Referring now back to Figs. 1 to 5, another substrate member 11, which is different from the aforementioned substrate member 7 is provided. The substrate member 11 has, on a substrate 12 corresponding to the substrate 1, a plurality of n x q (where q ≧ 1, in this instance q = 3) sequentially arranged column conductive layers H₁₁, H₁₂ and H₁₃; H₂₁, H₂₂ and H₂₃; ... H n1 , H n2 and H n3 which are arranged opposing relation to the conductive layers C₁₁ to C m1 ; C₁₂ to C m2 ; ... C 1n to C mn , respectively and extend in the column direction. The column conductive layer H j1 , H j2 and H j3 can be obtained by forming a conductive layer through a known method on the substrate 12 and then patterning the conductive layer through a third mask. The column conductive layers H j1 , H j2 and H j3 are covered over entire surfaces thereof with red, green and blue filters S j1 , S j2 and S j3 , respectively. Furthermore, a insulation protecting layer 26 formed of, for instance, organic region is deposited on the entire surface of the substrate 12 by a known method, for example, coating to cover the filters S₁₁ to S n1 , S₁₂ to S n2 and S₁₃ to S n3 . The substrate member 11 is disposed upside down by a suitable support means (not shown) in opposing relation to the top of the substrate member 7 in parallel thereto. In this instance, the conductive layers C 1j to C mj of the substrate member 7 and the column conductive layers H j1 , H j2 and H j3 of the substrate member 11 are held face-to face with each other. A space defined by the substrate members 7 and 11 is filled with liquid crystal 13. In the structure described above in conjunction with Figs. 1 through 5, a part 14 of the conductive layer C ij on the substrate 1 and a part 15 of the conductive layer H jr (where r = 1, 2, 3) on the substrate 12, which are face-to-face with each other and a part 16R of the liquid crystal 13 between the part 14 of the conductive layer C ij and the part 15 of the conductive layer H jr constitute a liquid crystal element L ijr which employs the parts 14 and 15 as its electrodes B ijr and B ijr ', respectively. When low voltages are applied across the part 14 serving as electrode B ijr of the conductive layer C ij and the part 15 serving as electrode B ijr ' of the conductive layer H jr ; the liquid crystal element L ije remain opaque, but when high voltages are applied, it become transparent. The layer member A ij constitute a nonlinear element U ij which employs the part 17 of the conductive layer F i underlying the layer Q ij and the conductive layer E ij as its electrodes D ij and D ij ', respectively. The element U ij presents such a nonlinear voltage(V)-current(A) characteristic curves 51 and 61 as shown in Figs. 6 and 7. The element U ij has an offset voltage which is intermediate between the voltage that makes the liquid crystal element L ijr transparent and non transparent, respectively. The liquid crystal element L ijr and the nonlinear element U ij are connected in series with each other, and hence make up a liquid crystal display device M ijr . According to the arrangement described above with respect to Figs. 1 through 5, the electrode B ijr of the liquid crystal element L ijr and the electrode D ijr ' of the nonlinear element U ij are common each other. The electrode B ijr ' of the liquid crystal elements L 1jr of the liquid crystal display devices M ijr is connected to the column conductive layer H jr and the electrode D ij of the nonlinear element U ij is connected to the conductive layer F i . Furthermore, the column conductive layer H j1 , H j2 and H j3 are covered with the red, green and blue filters S j1 , S j2 and S j3 , respectively. Therefore, according to the arrangement described above in connection with Figs. 1 to 5, since the liquid crystal element L ijr can be controlled to be transparent or nontransparent, respectively, by applying, through use of row and column decoders 51X and 51Y, across the liquid crystal display device M ij1 , M ij2 and M ij3 via the conductive layers F₁ and H j1 , F i and H j2 , and F i and H j3 red, as shown in Fig. 8, green and blue drive signals a color display can be provided. Accordingly, the liquid crystal display panel shown in Figs. 1 to 5 can be provided a color image display. Fig. 15 to 19 illustrate another embodiment of the liquid crystal display panel of the present invention. In Figs. 15 to 19 like parts corresponding to those in Figs. 1 to 5 are identified by the same reference numerals and no detailed description will be given of them. The liquid crystal display panel shown in Figs. 15 to 19 has the same construction as depicted in Figs. 1 to 5 except the following points: The insulating layers K i1 to K in and K (i+1)1 ' to K (i+1)n ' in Figs. 1 to 5 are substituted with a insulating layer K i . The insulating layer K i extends between the laminate members A i1 to A in and A (i+1)1 to A (i+1)n and substantially flush therewith, therefor the conductive layer C ij is formed on the ensulating layer K i and extends onto the laminate member A ij and the insulating layer K (i-1) . Further, the column conductive layer H i1 , H j2 and H j3 in Figs. 1 to 5 are substituted with a column conductive layer H j , and therefor the liquid crystal display device M ij1 , M ij2 and M ij3 are substituted with a liquid crystal display device M ij . Furthermore, the filters S₁₁ to S n1 , s₁₂ to S n2 and S₁₃ to S n3 are omitted. According to the arrangement described above with respect to Figs. 1 through 5, the electrode B ijr of the liquid crystal element L ij and the electrode D ij ' of the nonlinear element U ij are common each other. The electrode V ij ' of the liquid crystal elements L 1j of the liquid crystal display devices M ij is connected to the column conductive layer H j and the electrode D ij of the nonlinear element U ij is connected to the conductive layer F i . Therefore, according to the arrangement described above in connection with Figs. 15 to 19, since the liquid crystal element L ij can be controlled to be transparent or nontransparent, respectively, by applying, through use of row and column decoders 51X and 51Y, across the liquid crystal display device M ij , M ij and M ij via the conductive layers F i and H j drive signal a monocolor display can be provided. Accordingly, the liquid crystal display panel shown in Figs. 1 to 5 can be provided a monocolor image display. The substrate member 7 dipicted in Figs. 15 to 19 can be manufactured, for example, as follows: A conductive layer F which will ultimately form the conductive layers F₁ to F n , a layer laminate member which will ultimately form the layer laminate members Q₁₁ to Q mn and a conductive layer E, which will ultimately form the conductive layers E₁₁ to E mn are deposited in that order on the substrate 1, as shown in Figs. 21A to 21E as in the case with the example shown Figs. 9A to 9E. The conductive layer F, the non-single-crystal semiconductor layer Q and the conductive layer E make up a active layer member A which will ultimately form the active layer member A₁₁ to A mn as described previously. Next, the active layer member A is subjected to a known pattern process using a first mask, providing m layer members A₁ to A m of the same pattern as the conductive layers F₁ to F m , as shown in Figs. 22A to 22E, as is the case with the example shown in Figs. 10A to 10E. Next, a insulating layer K of photo resist which will ultimately form the insulating layer K i is deposited by a known method, for example, a plasma CVD method on the entire surface of the substrate 1 to cover the layers A₁ to A m , as shown in Figs. 23A to 23E. Next, the insulating layer K is irradiated by light 30 without using any mask as shown in Figs. 23A to 23B and then is developed into the insulating layer K i , as shown in Figs. 25A to 24E. Next, a conductive layer C is diposited on the entire area of the substrate 1 to cover the laminate member A₁ to A m and the insulating layer K₁ to K m as shown in Figs. 25A to 25E. Next, the conductive layer C, the conductive layers E₁ to E m and the layers Q₁ to Q m of the layer member A₁ to A m are patterned by a known method using a second mask into the conductive layers C₁₁ to C mn , the layers Q₁₁ to Q mn and the conductive layers E₁₁ to E mn of the layer member A₁₁ to A mn , as shown in Figs. 26A to 26E. Next, the thin insulating layer 25 is deposited on the entire surface of the substrate 1 to cover the conductive layers C₁₁ to C mn , the layer members A₁₁ to A mn , the insulating layers K₁ to K m and the parts of the conductive layers F₁ to F m which are not covered with the conductive layers C₁₁ to C mn . It will be apparent that the above embodiment should be construed as merely illustrative of the present invention and should not be construed as limiting the invention specifically thereto and that various modifications and variations may be effected without departing from the scope of the invention as claimed.

Claims: A liquid crystal pixel display comprising: first and second substrate members (7,11) disposed opposite at a predetermined distance in substantially parallel relation to each other, and liquid crystal (13) filled between the first and second substrate members; the first substrate member (7) including a first substrate (1), m stripe-like row electrodes F₁, F₂... F m arranged on the interior surface of said first substrate, each row electrode having a width w, and n display electrodes C ij , where j = 1, 2... n, coupled to each row electrode F i , where i = 1,2... m, through a respective non-linear element U ij having a diode characteristic; the second substrate member (11) including a second substrate (12) and a plurality of n x q, where q is an integer equal to or greater than 1, stripe-like conductive layers H₁₁, H₁₂ ... H 1q ; H₂₁ ... H₂₂ ... H 2q ; ... and H n1 , H n2 ... H nq sequentially arranged on the interior surface of said second substrate (12) in the row direction and extending in the column direction, the conductive layers H j1 to H jq being opposite the display electrodes C 1j to C mj ; characterised in that each non-linear element U ij is a laminate A ij of a first layer Q ij arranged on a portion D ij of the respective row electrode F i , each layer Q ij being arranged in the row direction and having substantially the same width w as the row electrode F i , and a second conductive layer E i formed on the layer Q ij and having substantially the same width w as the layer Q ij , the two side faces of the laminate A ij extending in the row direction being covered with insulating material (K ij , K ij '; K i ), and the respective display electrode C ij has substantially the same width as the length of the laminate and extends in a column direction over the laminate A ij and onto the insulating material. A display according to claim 1, wherein the insulating material K i formed on the substrate extends between adjacent laminate members A i1 to A in and substantially flush therewith. A display according to claim 1, wherein the insulating material K ij , K ij ' substantially covers only the side faces of the laminate A ij . A method for the manufacture of a liquid crystal display panel, comprising: (A) a step of preparing a first substrate member which includes the steps of: (a) forming, on a first substrate, a laminate member A composed of a conductive layer F, a layer Q and a conductive layer E laminated in this order; (b) patterning the laminate member A into a first plurality of m stripe-like laminate members A₁ to A m sequentially arranged in the column direction and extending in the row direction; (c) depositing an insulating layer K over the entire area of the first substrate to cover the laminate members A₁ to A m ; (d) selectively etching away the insulating layer K to form insulating layers K i (and K i ') on both sides of the laminate member A i (where i = 1, 2 ... m) defining the width of the laminate members A i ; (e) forming a conductive layer C over the entire area of the first substrate to cover the laminate members A₁ to A m and the insulating layers K₁ to K m (and K₁' to K m '); and (f) patterning the conductive layer C, the second conductive layers E₁ to E m and the layers Q₁ to Q m to form display electrodes C i1 to C in extending over the laminate member A i and onto the insulating layer K i and to form from each laminate member A i a plurality of n separate laminate members A ij (for j = 1 to n) each composed of a conductive layer E ij , a layer Q ij and a portion D ij of the row electrode F i underlying the layer Q ij (B) a step of preparing a second substrate member, which includes the steps of: forming, on a second substrate having an insulating surface, a plurality of n x q, where q is an integer equal to or greater than 1, conductive layers H₁₁, H₁₂ ... H 1q ; H₂₁, H₂₂ ... H 2q ; ... and H n1 , H n2 ... H nq sequentially arranged in the row direction and extending in the column direction, the conductive layers H j1 , H j2 , ... and H iq corresponding to the display electrodes C 1j , C 2j , ... and C mj of the first substrate member; (C) a step of turning the second substrate member upside down and disposing the first and second substrate members in opposing and substantially parallel relation to each other; and (D) a step of filling liquid crystal in the gap defined by the first and second substrate members. A method according to claim 4, wherein step (d) comprises etching away the insulating layer K leaving portions of said insulating layer extending substantially only along side surfaces of the laminate members and not substantially along the substrate, and wherein step (f) comprises patterning the conductive layer G to form display electrodes C i1 to C in extending from the substrate onto the insulating layer K i and the laminate member A i and passing on the side face of the insulating layer K i . A method according to claim 4, wherein step (d) comprises etching away the insulating layer K to form an insulating layer K i extending between adjacent laminate members A₁ to A m and substantially flush therewith.

Inventors: YAMAZAKI SHUNPEI, YAMAZAKI, SHUNPEI SEMICONDUCTOR ENERGY LAB.CO.LTD
Applicants: SEMICONDUCTOR ENERGY LAB, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Application year: 1985
Main classification: G02F1
IPC codes: G02F1