FREQUENCY-STABILIZED TWO-STATE MODULATION

Abstract: A two-state modulation system includes a hysteretic comparator (31, 36) with variable thresholds, a two-state processor (11) and an integrating element (16). A summing circuit (23) combines the signal input (S1), a delay compen­ sating signal feedback input (S9) and a feedback (S8) input from the integrating element (16) at the output of the two-state processor. The hysteretic comparator receives a hysteresis control signal (S12) that varies the threshold. The hysteresis control signal may be provided by analog switch­ es (91, 92) switched by the switching signal to provide the switched two-state levels to a low pass filter. Rectifying circuitry may also be used for supplying the hysteresis control signal. Limiters and compressors may be connected to the input with the limiter limiting levels tracking the two-state levels, and the compression proportional to the switching frequency.

Description: FREQUENCY-STABILIZED TWO-STATE MODULATION The present invention relates in general to two-state modulation (TSM) and more particularly concerns novel apparatus and techniques for maintaining the switching frequency of a two-state modulation system substantially constant. Two-state modulation has -a number of advantages, especially for processing power at high levels with great efficiency. The basic patent on two-state modulation is U. S. Patent No. 3,294,981 of Amar B. Bose granted December 27, 1966, for SIGNAL TRANSLATION EMPLOY ING TWO-STATE TECHNIQUES. An improvement over this patented system is current-controlled two-state modulation (CCTSM) disclosed in U. S. Patent No. 4,456,872, granted June 26, 1984. In typical two-state modulation systems output power semiconductor switches turn on and off at a rate significantly higher than the highest frequencies of interest in a desired output signal with a ratio of on time to off time establishing an average value over a switching cycle representative of the amplitude of the desired output signal at that time. The instants of switching are related to a feedback signal derived from the output. Typically, the switching frequency may vary with duty cycle, especially at high levels of modulation. While fixed frequency pulses may be injected into the feedback loop to maintain the switching frequency nearly constant, a demand for high level modulation, such as a sudden shift in the level of the desired output signal, may cause switching frequency to change, even in the presence of clock pulses. In some applications it is desirable to have a switching frequency substantially constant. For example, it may be easier to reduce radio frequency interference if the switching frequency remains constant. Another advantage of keeping the switching frequency constant is that the spectrum of alias signals due to frequency modulation can be confined to higher frequencies. In audio amplifiers this characteristic is especially advantageous because; otherwise high ripple voltages are developed on the load and audible alias signal develop at high modulation levels. The stabilized systems can operate at a lower switching frequency without producing alias signals. Normally alias signals limit the allowable feedback loop gain because these signals overload the system if gain is excessive. The stabilized frequency permits the use of higher feedback loop gain. Consequently, performance is improved with respect to output impendance, distortion and frequency response. The stabilized frequency modulation system is optimum, allowing the highest loop gain due to the property of TSM and CCTSM .(feedback of switching signals with little attenuation) and due to the frequency stabilization (prevention of interference by alias signals). Frequency stabilization allows switching systems to operate in close proximity without mutual interference. Frequency stabilized systems may operate near digital circuits without interaction. The frequency stabilized system is much easier to synchronize to an external frequency reference. Accordingly, it is an important object of this invention to provide an improved frequency-stabilized two-state modulation system. According to the invention1 in a two-state modulation system the improvement resides in means for establishing variable switching thresholds in dependence on signals obtained by processing other signals in the two-state modulation system. According to one aspect of the invention there is delay compensation means for providing a signal for compensating for delay in the signal processing. Numerous other features, objects and advantages of the invention will become apparent from the following specification when read in connection with the accompanying drawing in which: FIGS. 1 and 2 are block diagrams illustrating the logical arrangement of a frequency stabilized twostate modulation system according to the invention; FIG. 3 is a block diagram illustrating a frequency-stabilized two-state modulation system operating a direct power stage; FIG. 4 is a block diagram illustrating a frequency-stabilized current-controlled two-state modulation system operating a direct power stage; FIG. 5 is a block diagram illustrating a frequency-stabilized current-controlled two-state modulation system operating a fly-back power stage: : FIG. 6 illustrates one technique for creating variable hysteresis; FIG. 7 shows the hysteresis characteristic created with the system of FIG. 6; FIG. 8 shows a system using analog switches to provide variable hysteVesis; FIG. 9 shows the hysteretic transfer characteristic of the system of FIG. 8; FIG. 10 is a combined block-schematic circiit diagram of a specific form of the two-state modulation system using analog switches; FIG. 11 shows a specific frequency-stabilized current-controlled two-state modulation system; FIG. 12 shows a specific form of current-controlled two-state modulation system with a fly-back power stage; FIG. 13 shows a combined block-schematic circuit diagram of a specific form of current-controlled two-state modulation system with a boost power stage; ; FIG. 14 shows a block diagram illustrating the logical arrangement of a system for providing a hysteretic control voltage; FIG. 15 shows a block diagram illustrating the logical arrangement of another form of apparatus for providing hysteresis control voltage using rectifiers; FIG. 16 shows another embodiment of the invention for providing the hysteresis control voltage where slowly varying signals are present; FIG. 17 is a block diagram illustrating the logical arrangement of another embodiment for producing the control voltage; FIG. 18 shows a further embodiment of the invention for providing the control voltage incorporated frequency locking feedback; FIG. 19 shows a block diagram illustrating the logical arrangement of a preferred form of limiter; ; FIG. 20 shows a block diagram illustrating the logical arrangement of another technique for controlling high level signal conditions in an input signal applied to the two-state modulation system; FIGS. 21 and 22 show schematic circuit diagrams of exemplary embodiments of current-controlled two-state modulated amplifiers according to the invention with representative parameter values; FIG. 23 is a block diagram of an embodiment of the invention especially suitable for implementation as an integrated circuit: FIG. 24 is a schematic circuit diagram of the block diagram of FIG. 23; and FIGS. 25 and 26 are schematic circuit diagrams of embodiments of the invention. The same reference symbols identify corresponding elements throughout the drawing where appropriate. With reference now to the drawing and more particularly FIG. 1 thereof, there is shown a frequency stabilized two-state modulation system according to the invention. The system includes a two-state processor 11 that receives two-state amplitude inputs S4 and S5 on lines 12 and 13, respectively, typically D.C. potentials corresponding to Ea and Eb in the system described in U.S. Patent No. 3,294,981. Two-state processor 11 provides an output signal S17 on output terminal 14, and delivers a signal of rectangular waveform S6 on line 15 to integrating element 16 that provides an integrated signal S7 on line 17 that is fed back to two-state processor 11. Two-state processor 11 also receives a signal S18 on input line 18. Coupling means 21 couples a signal S8 derived from line 17 to input line 22 of signal combiner 23. Coupling network 24 couples the signal on line 15 to input 25 of combiner 23 to provide a signal S9 related to signal S6 . Input line 26 of combiner 23 receives a signal S1, and input line 27 receives a signal S10, typically an external synchronizing signal for combination with the other signals on the inputs of combiner 23, to provide a combined signal S2 on output line 28 applied as a switching signal to hysteretic element 31 that provides an output signal S3 on output line 32 that receives a delay of Td represented by delay means 33 before ;effecting switching of two-state processor 11 on input line 34. Hysteretic element 31 may also receive an external hysteresis control signal S12 on input line 35. A signal combining network 36 combines signals S1 S4 S5, S6, S17 and S18 on the indicated input lines to provide a signal on output line 37 that is the ratio of the product of signals S14 and S15 to signal S16 with these signals related by the following matrix equation EMI6.1 <tb> <SEP> # <SEP> S14 # <tb> # <SEP> <SEP> S15 <SEP> #= <SEP> <SEP> [Kij) <SEP> S65 <tb> <SEP> # <SEP> S16 <SEP> # <tb> The threshold levels for switching d1-d2 vary according to the sum of the signals on lines 35 and 37. If the signal on line 35, S12' is"zero, then this threshold control is a a function of the input signal S1 on line 26, the two-state amplitude inputs S4 and Sg, the signal on line 15, , the output signal S17 and the input signal S18 to two-state processor 18. Referring to FIG. 2, there is shown a modification of the embodiment of FIG. 1 using additional feedback from the output together with amplifying, limiting and filtering means that provides input signal S1 on line 26. This embodiment includes sensing and coupling means 41 that provides a feedback signal S20 on line 42 representative of the output signal on terminal 14 that is delivered to the - input of summing network 43. The + input of summing network 43 receives a signal S19 on input terminal 44 to provide a combined signal on its output that is applied to amplifying, limiting and filtering means 45 to provide signal S1 on line 26. Amplifying, limiting and filtering means 45 may be used, for example, to restrict the maximum modulation that the system will exhibit. Output signal S17 varies as a function of feedback signal S20 which is nearly the same as signal S19. Referring to FIG. 3, there is shown a combined block-schematic circuit diagram illustrating the logical arrangement of a system according to the invention having a direct power stage with switched devices T1 and T2 and an inductor L in series with output terminal 14 and the junction of switching devices T1 and T2. A capacitor C is connected between output terminal 14 and ground. Digital buffer 51 and inverting digital buffer 52 drive switching devices T1 and T2 so that the two devices are alternately conductive during mutually exclusive time intervals. A feedback signal is derived from the junction of switching devices T1 and T2 and attenuated by attenuator 53 to provide a signal on one + input of summer 54 that receives an input signal S18 on the other + input of summer 54 to provide a combined signal delivered to integrating element 16' that provides signal S7 (equal to S8) at its output delivered to one + input of summer 55. Summer 55 also receives a signal on a second + input that provides delay compensating signal feedback through the feed forward path including network 56 that furnishes attenuation TD/T. An external sync signal S10 may be coupled to the third + input of summer 55. In this embodiment integration occurs in the loop including the feedback path before the hysteretic switch. Referring to FIC. 4 there is shown another embodiment of the invention with a direct power stage having both integrated signal feedback and output signal feedback using current-controlled two-state modulation system. Current sensor 61, typically a resistor of small value, provides a feedback signal representative of the current through the win'ding of inductor L having N1 turns coupled to the other winding having N2 turns and providing a delay compensating signal through network 62 to provide signal S9 at one - input of combiner 63. Current feedback signal S8 is applied to a second - input of summer 63. Output signal feedback is coupled through attenuator 64 to the - input of summer 65. The + input of summer 65 receives an input signal S19 to provide a combined signal that is delivered to amplifying, limiting and filtering means 45 to provide the signal S1 at a + input of summer 63. The equations relating the different signals to establish the variable threshold between d1 and d2 are: EMI8.1 S16 = S4 - S5 Referring to FIG. 5* there is shown a blockschematic circuit diagram of another embodiment of the invention of a current-controlled two-state modulation system with a flyback power stage with frequency stabilization according to the invention. This embodiment of the invention includes an inductor L" having a winding with N1 turns connected in series with switching device T1 and a winding of N3 turns connected in series between switching device T2 and output terminal 14. Inductor L" has a third feedback winding of N2 turns providing a signal through network 71 that furnishes delay compensating feedback signal Sg to a - terminal on summer 63. Current sensors 72 and 73 provide signals related to the current flowing through switching devices T2 and T1, respectively, to furnish signals on respective + inputs of summer 74 that provides an integrated feedback signal on on a second - input of summer 63. The equations relating the various signals with the variable threshold span d1-d2 are given by: EMI8.2 EMI9.1 X = L/R c For determining T X the inductance L is the inductance presented at the input of the winding with N1 turns, and the resistance Rc is that in series with switching device T1. The resistance in series with switching device T2 is N3/N1 Rc. Referring to FIG. 6, there is shown a block diagram illustrating the logical arrangement of a system for creating variable hysteresis. A comparator 81 receives the output VC from summer 82 that combines an input signal va with a feedback signal provided through multiplier 83 representing the product of a signal fed back from the output of comparator 81 through attenuating network 84 with a hysteresis controlling signal vH on line 85. Comparator 81 provides 'a two-state output signal vb moving between levels v5 and - v5. The polarity of the feedback path through attenuator 84 and multiplier 83 is arranged so that the signal component reaching the input of the comparator through summer 82 reinforces the state present at the output of comparator 81. When the comparator is in the positive state at output terminal 86, the input signal at input terminal 87 must become sufficiently negative to overcome the effect of positive feedback through network 84 and multiplier 83 before comparator 81 will switch to the negative state at output terminal 86. Conversely, if the comparator output signal is in the negative state, the input signal on terminal 87 must become sufficiently positive to overcome the negative feedback passing through coupling network 84 and multiplier 83. The hysteresis area created through the use of positive feedback when the hysteresis control signal vH is unity is proportional to the attenuation factor H of attenuating network 84. Multiplier 83 provides a feedback signal dependent on the signal vH at hysteresis control input 85. Referring to FIG. 7, there is shown the hysteresis characteristic created with the system of FIG. 6 in which the magnitude of the threshold levels d1 and d2 are directly proportional to the amplitude of signal vH and inversely proportional to H. Referring to FIG. 8, there is shown a system using analog switches to provide variable hysteresis. The output signal on line 86 controls analog switches 91 and 92 through buffer 93 and inverting buffer 94, respectively. When the output signal vb of comparator 81 is positive, switch 91 is closed, connecting the control signal vH on line 85 to summer 82. When the output signal vb from comparator 81 is negative, switch 91 is open arid switch 92 closes, connecting the inverse of hysteresis control signal vH on line 85 through inverting amplifier 95 to summer 82. The resulting hysteretic transfer characteristic is shown in FIG. 9.. The threshold levels d1 and d2 are dependent solely upon the magnitude of control signal VH. Having discussed a number of systems and some specific techniques for controlling the threshold voltage span d2-d1, it is appkopriate to consider the mode of operation of a system. Referring to FIG. 1, a signal input S1 may be applied to line 26 or a signal S18 applied to line 18. As a result an output signal S17 related to the signal input is provided at output terminal 102. Combining means 23 provides a signal to operate hysteretic comparator 31. The two-state signal produced at the output of hysteretic comparator 31 controls operation of two-state processor 11. Two-state processor 11 receives two amplitude defining inputs S4 and Sg at terminals 12 and 13, respectively, and provides a signal S6 on line 15 that is delivered to integrating element 16. In TSM, S6 is the output of the combining means summing the input signal with the two-state signal. S17 is the output of L-C filter connected to the two-state signal. In CCTSM, S6 is the two-state voltage applied to the L-C filter. S17 is the output of L-C filter. S7 is the current flowing from the two-state switch into the inductor, L, of the L-C filter. In CCTSM, the two-state processor includes the L-C filter elements. Therefore, the sawtooth signal on 57 feedback is the current flow to the inductor, L. In TSM, S7 the signal feedback to the two-state processor 11 is not used. The signal, S7, provided by integrating element 16 on line 17 includes a sawtooth component fed back to two-state processor 11. Sensing and coupling means 21 provides an integrated feedback signal Ss on line 22 on a - input of combining means 23. This feedback signal is connected to combining means 23 with a polarity to create high frequency two-state oscillation at the hysteretic comparator output line 32. Unavoidable delays present in the processing represented by delay element 33 are compensated by action of a secondary feedback path comprising coupling network 24 and line 25 connected to combining means 23. The signals provided on line 35, that receives an external hysteresis control signal S12' and line 37, at the output of signal' combining network 36, control the width of the hysteresis loop; that is, the span between threshold levels d1 and d2. These signals may not only control error signals in the two-state modulation system, but also modify the switching frequency. An external synchronizing input signal S1n may also be applied on line 27 to combining means 23. Typically synchronizing signal S10 may be a sawtooth signal synchronizing the switching frequency of the two-state modulation system to an external clock. Referring to FIG. 2, operation of this system that includes the addition of output signal feedback will be described. A signal input S19 is applied on line 44 to combining means 43. Combining means 43 also receives an output feedback signal S20 on line 42 from sensing and coupling means 41. This output feedback signal causes the signal at output terminal 14 to accurately track the signal present on input 44. The addition of this output feedback signal also provides additional advantages. There is a lower output impedance characteristic at output terminal 14, and internal signal limiting protects power semiconductor devices within two-state processor 11. Amplifying, limiting and filtering means 45 responds to the output signal from combiner 43 to provide an error signal on line 26 to combining means 23. Amplifying, limiting and filtering means 45 includes limiting levels which prevent excessive signals from occurring within the modulation system and filtering means for significantly attenuating spectral components at the switching frequency and above. Referring to FIG. 3, the operation of the system including the direct power stage will be described. Delay element 33 represents the delays which would occur in power switches T1 and T2. Power switches T1 and T2 alternately connect voltages S4 and Sg to their junction. The two-state voltage signal at this junction is connection through attenuator 53 to combining means 54 that combines the input signal S18 with this feedback signal to provide signal S6 applied to the input of integrator 16' and delay compensation means 56 to provide the integrated feedback signal S7 (equal to S8), the compensated signal 59 and an external sync signal S, if present, combined by combining means 55 to provide switching signal S2 to hysteretic comparator 31. In a two-state modulation system the input signal S18 is slowly varying relative to the rate of two state switching by hysteretic comparator 31 and following circuitry. The period, T, of two-state operation can then be, expressed as: EMI13.1 Typically, signal S18 is an input voltage, v., and signals S4and S5 are dc supply voltages where S4 = -S5 - v5. The 2v hysteresis is, generally, a voltage h = s. Under these H conditions, the switching period can be expressed as: EMI13.2 and G is the attenuation imparted by attenuator 53. The switching period is a function of two signal conditions a and Sb defined at the output of combining means 54. The switching frequency is variable dependent upon these conditions and is also influenced by the time delay represented by delay means 33. The effect of time delay may be eliminated for certain signal ranges with delay compensation with the feed forward comprising feed forward attenuation network 56 and associated lines. The feed-forward signal shifts the apparent thresholds of the hysteretic comparator 31 to advance the switching of the comparator to compensate for the time delay. The period with delay compensation may be expressed as: EMI14.1 Referring to FIG. 4, in this current-controlled two-state modulation system high frequency operation at switching frequency occurs through current feedback signal S8 and delay compensating feedback signal S9. Voltage feedback signal S20 maintains substantial conformity between the output signal on output terminal 14 @and the input signal S19. Equation 3 is an expression for the switching period with feedback from the junction of switching devices T1 and T2 to combining means 63 through an attenuator having an attenuation Rc/Rh: EMI14.2 where Sa = vs - vo > o, Sb= -vs - vo < o, h = d, -d2 Typically, S1 is the average value of a voltage va = RClL where iL is the local average current in inductor, L1, and Rc is the gain resistance of current sensor 145. In this case h = 2 (Rc/RH)vs. Therefore, equation (3) becomes: EMI14.3 The switching period is dependent upon the voltages existing within the system and upon the time delay without delay compensation. It is possible to compensate for the time delay through the use of additional feedback compensation as shown in FIG. 4. A delay compensation feedback signal Sg is derived from the winding having N2 turns of inductor L'. Inductor L' corresponds to an integrating element, such as 16. The signal from the winding of N2 turns is coupled through attenuating network 62 to a - input of combining means 63. In this embodiment delay compensation is achieved with feedback in contrast to FIG. 3 where delay compen sation is achieved using feedforward. In both cases the delay compensation is effected by coupling an attenuated portion of the signal applied t6 an integrating element to combining means that drives the hysteretic comparator. The switching period with delay compensation may be expressed as: EMI15.1 where EMI15.2 The following equations give the derivation of the switching period T. The voltage S1 is the output voltage from the integrating element, such as 16. The voltage 5a is the signal applied to the integrator, such as element 16, during time interval T1. The voltage 5b is the voltage applied to the integrator such as element 16, during interval T2. The expression for switching T shown in equation 9 is valid in instances where time delays are negligible. By providing a hysteresis control voltage reciprocally dependent upon Sa, Sb and S1, the switching period T becomes constant. Using HSl S1 (to + T) - S1 (t0) (5) tin typically S1 = va = RciL dSa = va(to + T) - va(to) (5A) tin using Sa and Sb as defined in equation 3 above, EMI16.1 Using the hysteresis control signal EMI16.2 Sa+Sb as defined in equation (3) the switching period is stabilized as T = X , X = L (12) c Equations (5)-(12) apply where output signal feedback is utilized. When only a signal feedback loop is used, the following equations apply: EMI17.1 using EMI17.2 T = T X = time constant of integrator (14) In the foregoing analysis, the effects of time delay have been negated by using a compensating hysteresis, h. The effect of time delay is to shift the apparent thresholds of the hysteresis. As a result,the apparent hysteresis at the input to a hysteretic comparator is greater than that simply caused by hysteresis feedback. To compensate for this delay-induced hysteresis, an additional feedback signal may be applied to the combining means at the input to the hysteretic comparator, as shown in FIG. 4. The appropriate modified feedback signals may be expressed as: EMI17.3 where EMI17.4 This delay compensation cannot maintain constant frequency operation over the total modulation range. The minimum duration of a particular state is two times the time delay. In this situation the expressions for switching period are given as: EMI18.1 Referring to FIG. 10, there is shown a combined block-schematic circuit diagram of a specific form of the two-state modulation system shown in FIG. 3 using analog switches of the type shown in FIG. 8. The hysteresis control voltage vH is given hy equation 20. EMI18.2 Therefore T = a = o, vSi > o, vS2 < o zit X = Integrator time constant Referring to FIG. 11, there is shown a specific frequency stabilized current-controlled two-state modulation system representing a specific form of the embodiment shown in FIG. 4. The hysteresis control voltage VH is given by: EMI19.1 Therefore T = T S1 = 5e X V51 > o, V52 < o T = L/Rc, H = Rc /RH Referring to FIG. 12 there is shown a specific form of a current-controlled two-state modulation system with a flyback power stage representing a specific form of the embodiment of FIG. 5. The hysteresis control voltage vH is given by: EMI19.2 Therefore T = @ S1 = Se , vS1 > o, vo > o # = L/Rc, H = Rc/RH Referring to FIG. 13, there is shown a combined block-schematic circuit diagram of a specific form of current-controlled two-state modulation with a boost power stage. The hysteresis control voltage vH is given by: EMI20.1 Therefore T = # S1 = ve , vS1 > o, vo > vS1 # = = L/RC, H = RC /RH The systems illustrated in FIGS. 10-13 are summarized in the following table: TABLE 1 EMI20.2 <tb> MODULATION <SEP> POWER <SEP> S <SEP> S <tb> <SEP> METHOD <SEP> STAGE <SEP> a <SEP> b <SEP> t <tb> <SEP> TSM <SEP> DIRECT <SEP> VS1GVi <SEP> vs2-Gvi <SEP> 0 <tb> <SEP> L <SEP> dv <SEP> e <tb> <SEP> CCTSM <SEP> DIRECT <SEP> VS1 <SEP> Vo <SEP> V52-V0 <SEP> tin <tb> <SEP> c <tb> <SEP> CCTSM <SEP> FLY-BACK <SEP> VS1 <SEP> N1 <SEP> 1 <SEP> L <SEP> dve <tb> <SEP> CCTSM <SEP> FLY-BACK <SEP> vS1 <SEP> To <SEP> E <SEP> to <SEP> % <SEP> dt <tb> <SEP> - <SEP> c <tb> <SEP> CCTSM <SEP> BOOST <SEP> VS1 <SEP> VS1 <SEP> - <SEP> L <SEP> dVe <tb> <SEP> w- <SEP> tin <tb> <SEP> c <tb> Referring to FIG. 14, there is shown a block diagram illustrating the logical arrangement of a system for providing a hysteretic control voltage VH. This system comprises analog switches 81 and 82. Line 83 receives a duty cycle signal that may, for example, be derived from hysteretic comparator 31. This duty cycle control signal is connected through amplifier 84 to control analog switch 81 to be on when inverting amplifier 85 couples the signal to analog switch 82 to control it to be off and vice versa. Switches 81 and 82 receive output signals from combining means 86 and 87, respectively. A sample of the integrator output signal, such as S7 is applied on line 87' to differentiator 88 to provide an output signal to the - input of combining means 86 and the + input of combining means 87. The i and inputs of combining means 86 and 87 receive signals on lines 91 and 92, respectively, corresponding to the voltages v1 and v2, respectively. The signal on the junction of analog switches 81 and 82 is coupled through low pass filter 93 to provide on line 94 the hysteresis control signal VH This embodiment may be implemented with a single analog switch integrated circuit, such as an RCA CD 4066. Referring to FIG. 15, there is shown a block diagram illustrating the logical arrangement of another form of apparatus for providing the hysteresis control voltage vH using rectifiers 101 and 102. Combining means 103 receives an input signal vL related to the signal applied to the integrating element, such as signals S6, on input line 104. Combining means 103 also receives a signal related to the derivative of the output of the integrator provided by differentiator 105 that receives a signal on line 106 representative of the output of the integrator, such as signal S7. .This signal may be derived, for example, from the output of amplifying and filtering means 45 in FIG. 4. The output signal from combining means 103 is inverted by inverting amplifier 107 to provide substantially the same signal but in phase opposition to rectifiers 101 and 102, which may he simple rectifiers vr synchronously operated switches. The resulting combined rectified signal at their junction is coupled hy low pass filter 93 to output 94 to provide a hysteresis control voltage. Referring to FIG. 16, there is shown another embodiment of the invention for providing the hysteresis control voltage vH where slowly varying signals are present. This embodiment of the invention is especially advantageous when the integrating element comprises an inductor, such as inductor L" shown in FIG. 5. An inductor 111, which may be inductor L", comprises a primary winding 112 having a secondary winding 113 with the center tap grounded and rectifiers 114 and 115 connected to respective ends poled oppositely to rectifiers 116 and 117 connected to the same ends. The signals provided across resistors 118 and 119 are coupled by low-pass filters 121 and 122, respectively, to provide on lines 123 and 124, respectively, + vH and - vH, respectively. Referring to FIG. 17, there is shown a block diagram illustrating the logical arrangement of still another system for producing the control voltage VH This system includes combining means 86 and 87 and differentiating means 88 of FIG. 14. This system includes an additional combining means 131 having its + input coupled to line 91 for receiving the signal vl and its input connected to line 92 for receiving the signal v2 and providing an an output the combined signal v1-v2 that is applied to the divisor input of divider 132. The dividend input receives a product signal from the output of multiplier 133 that multiplies the output signal provided by combining means 86 and 87. The hysteresis control voltage generated as shown in FIGS. 14-17 may be used to stabilize the switching period of the two-state modulation system. Although these embodiments will maintain frequency stability within acceptable limits for many applications, it may be desirable to attain still greater stability. Referring to FIG. 18, there is shown still another embodiment of the invention for providing the control voltage vH incorporating frequency locking feedback. This embodiment incorporates the system of FIG. 14 to effectively compare the instantaneous switching frequency of the two-state modulation system available on line 83 with a reference or clock signal on line 135. A frequency comparator element 136 compares the signal of frequency f on line 83 with the clock signal of frequency fe on line 135 to provide a signal vd at the output representative of this difference that is applied to low pass filter 137 to provide a signal to combining means 138 that is combined with the signal on line 94 to provide an output signal vH on line 141 that maintains the frequency constant. While it is preferred to use both inputs to combining means 138, either input may be used for providing the voltage VH. The duty cycle of switching within a two-state modulation system is dependent upon the signals applied to the system. It is always possible to apply signals to the system which cause duty cycles to occur at 100% or, conversely, near 0%. Since time delays are inevitably present in any practical two-state modulation system these limiting duty-cycle conditions always lead to operation at frequency away from the normal frequency range for switching. Such loss of frequency control occurs at limiting duty cycles that tend to occur at input signal extremes. One approach for preventing the loss of frequency control is to bound. or prelimit. the input signal. Referring to FIG. 19 there is shown a block diagram illustrating the logical arrangement of A preferred form of limiter. While it is possible to limit the input signal at fixed levels sufficiently low to avoid overloading under any condition, it is preferred to have the limiting levels track supply level conditions. Limiter 142 receives n input signal on line 143 and provides an output signal on line 144 that does not exceed a limiting level V51 IK and a negative limit level vs2/K, typically the supply voltages S4 and S5 applied to the output processing stage. Referring to FIG. 20, there is shown a block diagram illustrating the logical arrangement of another technique for controlling high level signal conditions in an input signal applied to the two-state modulation svstem. An input compressor is used to prevent saturation of the two-state modulation system. This compressor system may comprise an analog multiplier 145 that receives an input signal on line 146 that is multiplied by a signal provided by low pass filter 147 representative of the two-state system switching frequency. Low frequency detector 151 receives a signal on line 84 representative of the switching frequency to provide a representative signal that is applied to low pass filter 47 to provide a multiplier signal that is proportional to switching frequency. Referring to FIGS. 21 and 22, there is shown a schematic circuit diagrams of exemplary embodiments of current-controlled two-stste modulated amplifiers according to the invention with representative parameter values. Since those skilled in the art will be able to build a working model of the invention from this schematic circuit diagram, especially in the light of the principles of operation described above, the schematic circuit diagrams will only be discussed briefly. In FIG. 22 switches IC6, IC7, IC8 and 1C9 produce the desired variable amplitude hysteresis feedback signal. In FIG. 23 switches 108, IC9, IClO and 1011 produce hysteresis feedback signal VH. A signal proportional to the output voltage, vO, is obtained by low pass filtering the two-state signal existing at the output of integrated circuit 104. While convenient and sufficiently accurate for most purposes, a more accurate approach resides in driving the signals from the input and from the two-state output signals at transistor Q1- Q4. FIG. 23 shows the block diagram of an integrated circuit, L472, which is used to realize stabilized frequency operation in accordance with the block diagram of FIG. 10. The limiting amplifier which prevents overload of the modulation process is connected to Pins 2 and 3 for input signal. The output of the limiting amlifier is provided at Pin 1. The limiting level of this amplifier is proportional to the available supply voltage. An integrating function is provided by the amplifier with inputs at Pins 19 and 20 and output at Pin 18. Internally generated, variable hysteresis is used to stabilize the switching frequency. A piecewise linear circuit approach provides the stabilization function which approximately maintains a constant switching frequency. The stabilization function is generated based upon the supply voltage and the input signal. The spectrum spreading function shown as an additional control function connected to Pin 7 is used to avoid narrow band spectral emissions which would be caused if the switching frequency is exactly constant. This function provides a slight amount of frequency modulation in the switching frequency in order to avoid the narrow band conditions. FIG. 24 shows the L472 connected into a circuit to achieve a complete amplifier function. FIG. 25 shows the internal schematic diagram of the L472. While to the best of our knowledge the piecewise linear approach used in the L472 to provide frequency stabilized operation of the two-state modulation process has not been used previously, the concepts involved in achieving this approach are not considered to be new. However, the piecewise linear function combined with the prelimiting function in a single system realization mav be novel. FIG. 26 shows a 450-watt amplifier in accordance with the system approach of FIG. 11. Integrated signal feedback is related to the current flo through filter inductor Tri 08. Output signal feedback is derived from the output voltage applied to the loudspeaker. The hysteresis control voltage is obtained by rectification of the signal voltage on T108 using the method illustrated in FIG. 16. Rate compensation is developed by differentiating the error signal using C125 and R153. Prelimiting of the input signal prevents overloading. Transistors Q104 and Q105 provide the prelimiting function proportional to tEle available supply voltage. Since current feedback is used, current limiting can be provided by limiting the error signal developed at resistor R144. Limiting the error signal absolutely limits the current levels which can be achieved in the power stage so that the amplifier can ork into short circuits or overloads with safe current levels. The invention has a number of advantages. Relatively stable frequency may be obtained for a wide range of operating conditions to help avoid overloading. Very precise frequency control may be obtained where desired. Maintaining frequency stability helps facilitate reducing undesired radio frequency interference. There has been described novel apparatus and techniques for improving a two-state modulation system. It is evident that those skilled in the art may now make numerous uses and modifications of and departures from the specific apparatus and techniques disclosed herein without departing from the inventive concepts. Consequently, the invention is to be construed as embracing each and every novel feature and novel combination of features present in or possessed by the apparatus and techniques herein disclosed and limited solely by the spirit and scope of the appended claims.

Claims: CLAIMS 1. A two-state modulation system having an input terminal (26), an output terminal (104), closed loop means (23,28,31,33,11,16,21) for intercoupling the input terminal and the output terminal and having a two-state power processor (11) for providing first and second signal amplitudes to said output terminal at a switching frequency corresponding to that of a driving signal provided by hysteretic means (31) for providing the driving signal in response to a switching signal provided by first means (23) for combining and related to the signal on the input terminal (26) combined with a feedback signal coupled from the two-state power processor (11), the hysteretic means (31) having a hysteresis loop representing the relationship between the input and output of the hysteretic means (31), characterized by a source of a hysteresis control signal (S12), and means for coupling the source of a hysteresis control signal to the hysteretic means (31) to control the hysteresis loop to maintain the switching frequency substantially constant in the presence of variations in the ratio of the time the output signal is at the first amplitude relative to the time the output signal is at the second amplitude, which ratio is representative of the signal on the input terminal. 2. A system in accordance with claim 1, further comprising, means (24) for coupling the output terminal to the first means for combining so that the signal provided to the hysteretic means (31) is a combination of at least signals coupled from the input terminal, the output terminal and the two-state power processor (11). 3. A system in accordance with claim 1 or claim 2, wherein the signal coupled from the two-state power processor (11) to the first means (23) for combining is a current feedback signal. 4. A system in accordance with any of claims 1 to 3, wherein the source of a hysteresis control signal includes second means (36) for combining signals derived from the apparatus intercoupling the input and output terminals. 5. A system in accordance with claim 4, wherein the source of a hysteresis control signal comprises a source of a duty cycle signal representative of the switching signal, first (91) and second (92) analog switches each having an input and an output, low-pass filter means having an output for providing the hysteresis control signal and an input coupled to the analog switch outputs, integrating means for providing an integrated signal representative of the time integral of the output signal provided by the two-state power processor, means for differentiating the integrated signal for providing a differentiated signal, third means for combining the differentiated signal with the first and second amplitudes respectively to provide first and second switch input signals respectively, means for coupling the first and second switch input signals to the respective inputs of the first and second analog switches respectively, and means for coupling the duty cycle signal to the first and second analog switches for controlling the open and closed times thereof in synchronism with the duty cycle signal. 6. A system in accordance with claim 5, further comprising low pass filter means having an input and an output for providing the hysteresis control signal, integrating means for providing an integrated signal representative of the time integral of the output signal provided by the two-state power processor, second combining means for cumulatively combining the differentiated signal and the integrated signal to provide a sum signal, and rectifying means for coupling the sum signal rectified to the low-pass filter means. 7. A system in accordance with claim 6 wherein the low-pass filter means includes means for providing the hysteresis control signal as a balanced signal, the integrating means comprises a transformer having a first winding coupled to the two-state power processor and a second winding, and the rectifying means comprises full wave rectifying means for coupling the second winding to the low-pass filter means. 8. A system in accordance with claim 5, wherein the source of a hysteresis control signal comprises, means for differentiating the integrated signal to provide a differentiated signal, third means for combining the differentiated signal with the first and second amplitudes respectively to provide first and second level signals, means for multiplying the first level signal by the second level signal to provide a produce signal, means for differentially combining the first and second level signals to provide a difference level signal, and means or dividing the product signal by the difference level signal to provide the hysteresis control signal. 9. A system in accordance with claim 1 or claim 2, further comprising, limiting means having first and second limiting levels, means for coupling the output of the limiting means to the input terminal, and means for causing the first and second limiting levels to track the first and second amplitudes. 10. A system in accordance with claim 1 or claim 2, and further comprising, compressing means responsive to the switching frequency of the switching signal for attenuating an input signal increasingly with decreasing frequency of the switching signal, and means for coupling the latter attenuated signal to the input terminal. 11. A system in accordance with claim 1 or claim 2, further comprising, a clock signal source of predetermined fixed frequency, means for comparing the clock signal with a signal of the switching frequeuncy to provide an error signal representative of the difference between the frequency of the switching signal and that of the clock signal, and means for providing the error signal as at least a component of said hysteresis control signal. 12. A system in accordance with claim 11, further comprising, means responsive to the hysteresis control signal for locking the phase of the switching signal to that of the clock signal. 13. A system in accordance with claim 11, further comprising, a source of a clock signal of a predetermined fixed frequency, means for comparing the clock signal with a signal of each switching frequency to provide respective error signals representative of the difference between the frequency of the clock signal and that of respective switching signals, means for providing respective error signals as at least a component of respective hysteresis control signals to maintain the switching signals in synchronism, a master unit, and slave units, and means for coupling the output of the master unit two-state power processor to the first combining means of the master unit and the first combining means of each slave unit. 14. A system in accordance with any of claims 1 to 13, further comprising, means responsive to the current provided by the two-state power processor for limiting the current drawn thereby. 15. A system in accordance with any of claims 1 to 14, further comprising a source of a dither signal for dithering the frequency of the switching signal, and means for coupling the dither signal to the hysteretic means as at least a component of the hysteresis control signal.

Inventors: FROESCHLE, THOMAS A.
Applicants: BOSE CORPORATION
Application year: 1985
Main classification: H03F3
IPC codes: H03K7, H03F3, H03C3