SWITCHING ARRANGEMENT IN A STATIC KWH METER

Abstract: A switching arrangement in a static kWh meter with means (2, 3) for generating measuring signals proportional to the current and to the voltage, a multiplicator (1, 4) for forming the product of the measuring signals, a voltage/frequency converter (5) for converting the output of the multiplicator into a frequency signal (f), and a counting device (7) controlled by the frequency signal, displaying the energy consumed. In order to compensate for the offset voltage (Uos) of the operation amplifier (11) of the integrator in the voltage/frequency converter, the converter comprises a compensating circuit with first switch members (K1, K2) which allow the output of the multiplicator to be integrated during given sampling periods, and in the input circuit of the integrator a compensating capacitor (C2) in which the offset voltage (Uos) of the amplifier (11) is stored by the aid of second switch members (K3, K4) operating between the sampling periods.

Description: Switching arrangement in a static kWh meter The present invention concerns a static kWh meter, comprising members connected to the leads of the distribution network for producing measuring signals proportional to the current and the voltage, a pulse width-pulse height multiplicator for forming a pulse width-pulse height-modulated signal representing the product of the measuring signals, an integrator supplied from the output of the pulse width-pulse height multiplicator in a converter circuit from which is obtained a frequency signal proportional to the power and a counter means controlled by the frequency signal for determining the energy that has been consumed, and a power source connected to the leads of the network for providing the operating voltage supplying the circuits of the meter. Static kWh meters based on a pulse width-pulse height multiplicator, i.e., on a time-chopping multiplicator, are commonly known in the art, and as examples of existing design solutions may be mentioned the U.S. Patents Nos. 4,315,212 and 3,794,917. The main components of a three-phase meter of this type known in prior art are presented in the block diagram of Fig. 1. In the meter, a sample pulse sequence is formed in which the width of the pulses is proportional to the momentary value of the voltage and the height of the pulses is proportional to the momentary value of the current, so that the area subtended by the pulses is pro- portional to the product of voltage and current, i.e., to the power. The sample pulse frequency is selected to be approximately ten times higher than the mains frequency in order to account for super- harmonics as well. The signal modulating the pulse width modulator 1, is a signal proportional to the mains voltage, produced by the aid of voltage transformers 2. In meters known in the art, the pulse width modulation has usually been carried out by means of an operator amplifier acting as a comparator, to one input terminal thereof being conducted a triangular wave and to the other input terminal a modulating signal proportional to the voltage. The threshold level of the comparator is controlled by the modulating voltage, and at the output of the comparator is obtained a square wave having the same frequency as the triangular wave but dependent on the value of the control voltage, as regards its pulse pro¬ portions. By the pulse width-modulated square wave obtained are controlled analog switches 4 in the secondary circuits of the current measuring transformers 3, from their outputs being obtained pulses with a height proportional to the current in the measuring circuit, and which are still modulated by the mains voltage as regards their width. The pulses are filtered so as to obtain a d.c. voltage proportional to the power, and this voltage is supplied to a voltage/frequency converter 5. The voltage/frequency converter 5 consists of an. integrator amplifier integrating the output of the multiplicator and a threshold level detector, which initiates a new cycle when the output of the integrator exceeds the threshold level of the detector. Thus, the output of the converter delivers a pulse frequency which is proportional to the d.c. voltage supplied thereto, that is to the power, and by which the step motor actuating the counter means 7 of the meter is controlled over a divider unit 6. The counter means integrates the power, in other words, it dis¬ plays the energy consumed. For the power supply of the circuits of the meter, a power pack 8 is moreover provided, producing the oper¬ ating voltage from the mains voltage. It is thus noticed that in static kWh meters known in the art the multiplicator circuits as well as the voltage/frequency converter comprise operator amplifiers the offset voltages of which exert an influence on the result of measurement. This objectionable phenom- enon is particularly apparent in the product from the voltage/ frequency converter when the input voltage of the integrator is low. In practice, the input voltage may be on the same order of magnitude as the offset voltage of the operator amplifier, whereby quite large errors of the measuring result are possible. In ad- dition, the offset voltage is a function of time and temperature, thereby interfering with the maintaining of perfect offset voltage compensation in kWh meters of prior art. The object of the present invention is to solve the problems stated above and to accomplish a static kWh meter in a simple manner so that the harmful effect of the offset voltage due to the use of an operator amplifier on the accuracy of the voltage/frequency converter will be compensated. As taught by the invention, the task has been accomplished in that the converter circuit comprises first switch members which allow the integration of the output of the pulse width-pulse height multiplicator during certain sampling periods, and that the input circuit of the integrator amplifier contains a compensating capacitor in which the offset voltage of the amplifier is stored by the aid of second switch members operating between sampling periods. It is thus understood that in the invention the integration of the output of the pulse width-pulse height multiplicator is periodically discontinued in the converter circuit producing the frequency signal, and as the integration is discontinued, the offset voltage is stored in the capacitor. When integration is resumed, the capacitor is again connected to the product circuit so that the effect of the offset voltage on the product current is compensated. A particularly advantageous meter design will be obtained when, moreover, the pulse width-pulse height multiplicator is carried out in a simple way without operator amplifiers so that it comprises an adding member, to which a first measuring signal and a triangular wave are conveyed, and a switch controlled by the sum signal which picks samples from a second measuring signal. The invention is described in the following in detail by the aid of an embodiment example presented in the drawing, whereto the invention is not, however, intended to be exclusively confined. In the drawing Fig. 1 presents the block diagram of a static kWh meter known in the art. OMPI Fig. 2 presents the circuit diagram of the pulse width-pulse height multiplicator. Fig. 3 shows the wave forms occurring in the circuit of Fig. 2. Figs 4 and 4A illustrate the voltage/frequency converter in different operating modes. Fig. 5 shows the wave forms occurring in the converter of Fig. 4. Fig. 6 presents the circuit diagram of the power source of the meter. In Fig. 2 is depicted the pulse width-pulse height multiplicator of a static kWh meter. The multiplicator comprises a summing circuit and a sampling switch controlled by the summed voltage. The summing circuit comprises two resistors R1,R2 joined by one end of each. To the other end of the first resistor Rl has been connected the signal U , which is proportional to the voltage, obtained from the measuring transformer 2 and to the other end of the second resistor R2 is carried the triangular wave U from the triangular wave oscillator 9. The sum voltage U + II is obtained at the common point of the summing resistors R1,R2. The sampling switch 10 is an analog switch receiving a signal U , proportional to the current intensity from the secondary circuit of the current measuring transformer 3, the control input of said switch being connected to the summing point. The analog switch 10, which may for instance be a J-FET or a MOS-FET, changes its state at a given threshold value U , . of the control voltage. As shown in Fig. 3, the threshold level U . . of the analog switch 10 then determines the width of the sampling pulse in that the switch is closed when the sum wave ϋ + U is higher than the u o β threshold level U . , , and open when the sum wave is lower than the threshold level. Hereby the output of the sampling switch controlled in such manner will be a square wave sequence in which the width of the pulses is proportional to the voltage and the height is proportional to the current. By the d.c. voltage obtained on filtering the pulse sequence, the voltage/frequency converter 5 is controlled. Fig. 4 presents the voltage/frequency converter 5 of the meter depicted in Fig. 1 and which has been provided with an offset voltage compensating circuit according to the invention. The voltage/frequency converter includes, in conventional manner, an operator amplifier 11 connected with the aid of a capacitor Cl and a resistor R3 to serve as integrator, a threshold level detector 12 controlled by the output of the integrator, and a timing circuit 13 whereby a constant current source connected to the output of the integrator is controlled. When the circuit is active, the integrator integrates the input current I. until the output of the integrator exceeds the threshold level U, of the comparator 12, when the timing circuit 13 starts to run and by the aid of a switch 14 switches a feedback current pulse I for the duration T to the input of the integrator. The operating frequency f of the converter is then found by the formula L in t = I f - i- :Ln It is thus understood that the frequency f is directly pro¬ portional to the input current I. , and therefore also to the input voltage U. because U, U T in - os in = RR 3 For compensating the effect on the input current I. from the in offset voltage II OS of the amplifier 11, the voltage/frequency converter comprises according to the invention, a compensating - _ Q arrangement which keeps the terminal on the side of the amplifier 11 of the resistor R3, or the point A in Fig. 4, at zero level during integration. The compensating arrangement comprises a sampling switch Kl connecting the integrator to the multiplicator, a switch K2 in series with the integrating capacitor Cl, and a compensating capacitor C2 between the point A and the inverting input of the amplifier 11, a switch K4 connecting the inverting input and the output of the amplifier 11, and a switch K3 grounding the point A. The switches Kl and K2 allow the input current I. to be integrated when they are closed in the position as in Fig. 4. During the integrating phase the switches K3 and K4 are open. For compensation, the integration is interrupted between the sampling periods of the sampling switch Kl by opening the switch K2 in series with the integrating capacitor Cl. During the subsequent compensation phase, the output and inverting input of the amplifier 11 are connected by closing the switch K4, and the other terminal of the capacitor C2 is earthed by closing the switch K3, whereby the offset voltage II of the amplifier 11 is charged into the compensating capacitor C2. During the compensation phase, the switches K1-K4 are thus controlled to be in the state as presented in Fig. 4A. During the subsequent integration phase, the switches K1-K4 are again controlled to be in the state of Fig. 4, whereby the compensating capacitor C2 is so connected to the input circuit that during the integration phase the voltage of the point A remains on zero level, which compensates for the effect of the offset voltage on the input current. The resulting wave form of the output voltage of the integrator is shown in Fig. 5, where the alternating integration phases and compensation phases respectively are seen as ascending parts 15 of the output voltage and as horizontal parts 16 corresponding to the offset voltage II OS Fig. 6 presents the power source unit 8 providing the operating voltage for the circuits of a three-phase meter. The power source contains capacitors C3,C4,C5 for reducing the mains voltage U R ,Ug, U_ and rectifying diodes D1-D6 and a filtering capacitor C7 for filtering the voltage supplied to the load 17. Since the circuits of the meter are required to operate also in the case that only one phase carries a voltage, the voltage reducing capacitors have to be dimensioned to be very large, in a conventional rectifying circuit. In order to avoid this, the power source of Fig. 6 has moreover been provided with a circuit by the aid of which the current passing through the diodes during the negative half- periods of the phase that has remained live can be utilized. This circuit comprises a capacitor C6 which has been connected between the zero lead and the anodes of the rectifying diodes D4-D6 connected together, in series with the diodes D8 and D7 so that it can take up a charge during the negative half-cycles of the live phase through the forward diodes D7,D8. For discharging the charge of the capacitor C6 to the load 17 during the positive half-cycles of the live phase, the positive terminal of the capacitor C6 has been connected to the positive terminal of the load 17 over the diode D9, and the negative terminal of the capacitor C6 has been connected to the negative terminal of the load over the collector- emitter path of the transistor VI, the base of which has been connected to the common point of the diodes D7 and D4-D6 and over the resistor R4 to the cathodes of the diodes D1-D3. The voltage present across the diode D7 when the charging current of the capacitor C6 is flowing keeps the base voltage of the transistor VI about 0.7V more negative than the emitter voltage, whereby the transistor is not conductive. During the positive half-cycles the charging current of the capacitor C6 is interrupted. The base voltage of the transistor VI will then increase to become more positive than the emitter voltage, by effect of the resistor R4. The transistor VI becomes conductive and completes the discharge path of the capacitor C6. Hereby, the charge of the capacitor C6 is discharged through the diode D9 to the capacitor C7 and further to the load 17. During the positive half-cycles, current is moreover received through the diode Dl. The discharge current of the capacitor C6 which is added to the said current will approximately double the current going to the load, and this enables the coupling capacitors C3, C4,C5 to be reduced to about one-half and, moreover, reduces the current drawn by the meter from the mains.

Claims: Claims 1. A static kWh meter with members (2,3) connected to the lead of the mains network for generating measuring signals (U ,U.) proportional to the voltage ( U B> U" S> U T ) and t0 the current (I ,1 ,I_), a pulse width-pulse height multiplicator circuit (1,4) for forming a pulse width-pulse height-modulated signal representing the product of the measuring signals, an integrator (11,C1,R3) supplied by the output of the pulse widht-pulse height multiplicator (1,4) in a converter circuit (5), from which is obtained a frequency signal (f) proportional to the power, and a counting device (7) controlled by the frequency signal for determining the energy consumed, and a power source (8) connected to the leads of the mains for forming an operating voltage supplying said circuits, characterized in that the converter circuit (5) comprises first switch members (K1,K2) which allow the output of the pulse width-pulse height multiplicator (1,4) to be integrated during fixed sampling periods, and that the input circuit of the integrator amplifier (11) contains a compensating capacitor (C2) in which the offset voltage (U ) • of the amplifier is stored by the aid of second switch members (K3,K4) operating between sampling periods. 2. A kWh meter according to claim 1, characterized in that the first switching members allowing integration comprise a sampling switch (Kl) connecting the output of the pulse width-pulse height multiplicator to the input of the converter (5) and a switch (K2) in series with an integrating capacitor (Cl) , and the second switch members storing the offset voltage comprise a switch (K3) connecting the output and input of the amplifier (11) and a switch (K4) connecting one terminal (A) of the compensating capacitor (C2) to ground. 3. A kWh meter according to claim 1 or 2, characterized in that the pulse height-pulse width multiplicator circuit comprises a summing member (R1,R2) to which are carried a first measuring signal (U " u ) and a triangle wave (U ) and a switch (10) controlled ' ~ by the sum signal (II + ϋ ) and which takes samples of a second measuring signal (ϋ.) . 4. A static kWh meter according to claim 3, characterized in that the second measuring signal is a signal (U.) proportional to the current, and the switch sampling the signal proportional to the current is an analog switch (10) changing state at a given threshold level (U . .) of the control. tnresn 5. A static kWh meter according to claim 4, characterized in that the summing member consists of a first summing resistor (Rl) , to the first terminal of which a signal (U ) proportional to the voltage has been connected, and of a second summing resistor (R2) , to the first terminal of which a triangle wave oscillator (9) has been connected, and that the second terminals of the resistors (R1,R2) have been connected together and to the control input of the analog switch (10) sampling the signal (ϋ.) proportional to the current. 6. A static kWh meter according to any one of the preceding claims, characterized in that the power pack unit (8) producing the oper¬ ating voltages of the meter from the mains voltage contains capacitors (C3-C4) for reducing the mains voltage. 7. A static kWh meter according to claim 6, characterized in that the power pack unit (8) contains a three-phase half-wave rectifying and filtering circuit (D1-D6,C7) and a capacitor (C6) which when the voltage disappears from two phases of the mains is charged during the negative half-cycles of the live phase, and which is connected by switch members (VI,D9), during the positive half- cycles of the live phase, to be charged through the load (17).

Inventors: LAHTI TEUVO, LAHTI, TEUVO
Applicants: VALMET OY
Application year: 1984
Main classification: G01R11
IPC codes: G01R21