OPTO-ELECTRIC LOGIC ELEMENT

Abstract: A semiconductor laser (104) receives one or more input optical signals (106, 107) and produces an output optical signal (105). In addition an injection current (i) to the laser is varied by a current drive circuit (102) in dependence upon a binary input electrical signal on a line (101). The laser (104) may have a differential gain characteristic. In another embodiment the laser has a bistable characteristic and an input light beam is modulated by an optical gate controlled by the binary input electrical signal.

Description: This invention relates to an opto-electric logic element comprising a semiconductor laser, means for supplying at least one light input signal to the laser, and a circuit for supplying an injection current to the laser. Optical communication utilising optical fibers in a transmission path is expected to be used widely in the future partly because optical fibers have a wide frequency bandwidth and partly because the optical fibers are immune from induction noise. In an optical communication system, information to be transmitted is converted into an optical signal from an electric signal, and the optical signal is transmitted through optical fibers and then converted back into an electric signal at a receiving apparatus. Thus the optical signal is utilised as a transmission medium that sends a signal from one point to another by taking advantage of the fact that the transmission loss of the optical fibers constituting the transmission path is very small, but the optical signal does not play a positive role in signal processing such as logical operation or the like. US-A-3 654 497 describes an opto-electric logic element comprising a semiconductor laser with an enhanced concentration of saturable absorption trapping centres, referred to as the memory laser A, two input or read lasers B and C for supplying light input signals to the memory laser, and a circuit for supplying an injection current to the memory laser. This known logic element can carry out logic operations or storage of light input signals. The logic operations are made possible by suitably choosing the value of the injection current and the levels of the two light input signals. Thus if the current threshold of lasing for zero light input is I A , and is I A -▵I for one light input B or C, then the element is operated with an injection current I₁ such that (I A -▵I) < I₁ < I A for a logical OR operation. In other words, the memory laser lases if either read laser is ON, or more formally: A=B+C . Again, if the injection current is I₂ such that (I A -2▵I) < I₂ < (I₂-▵I), memory laser A lases if and only if both lasers B and C are ON, i.e. A=B.C , the logical AND operation. For a storage operation, the injection current supplied to the read lasers must be chosen also, and one of the read lasers must have its threshold lowered by trap saturation. In the storage operation, when the memory laser is ON, only one of the read lasers can lase, and when the memory laser is OFF, only the other read laser can lase. Thus the optical signal (ON or OFF) stored in the memory laser is read optically by the read lasers. There therefore remains a need for an opto-electric logic element by means of which a logical operation can be carried out between an optical signal and an electric signal, or by means of which storage of an optical signal can be accomplished under the control of an electric signal, and the results of the logical operation or storage can be obtained in the form of optical signals, since then the field of application of optical communication systems will be greatly widened. According to the present invention therefore, an opto-electric logic element of the kind defined hereinbefore at the beginning is characterised in that the current supplying circuit has an electrical input for an electrical logic signal signal and includes control means responsive to the logic value of the electrical logic signal to set the magnitude of the current supplied to the laser to either one of two values in dependence upon the logic value of the electrical logic signal, at least one of the said two values being less than the laser threshold value of current for the laser in the absence of any light input signal. The invention will be described in more detail, by way of example, with reference to the accompanying drawings, in which: Figure 1A is a perspective view showing a first embodiment of this invention; Figure 1B is a circuit diagram of a current drive circuit used in the first embodiment; Figures 2A to 2D show characteristics of a semiconductor laser having a differential gain characteristic; Figures 3A and 3B are truth tables illustrating logical product and sum operations respectively of the first embodiment of this invention; Figures 4A to 4D show characteristics of a semiconductor laser having a bistable characteristic; Figure 5 is a block diagram of a second embodiment of this invention; Figures 6A and 6B show characteristics of a semiconductor laser used in the second embodiment of this invention; and Figure 7 is a table for explaining bistable operation of the second embodiment. Description of the Preferred Embodiments Figure 1A shows a first embodiment of this invention which comprises a semiconductor laser 104 inputted with optical input signals 106 and 107 and outputting an optical output signal 105, and a current drive circuit 102 which varies current i supplied to the semiconductor laser 104 via a signal line 103 in accordance with a signal on an input electric signal line 101. As shown in Figure 1B, the current drive circuit 102 shown in Figure 1A comprises a transistor 201 with its base electrode connected to the signal line 101, a resistor 202 of a resistance value R₁, having one end connected to the emitter electrode of transistor 201, a resistor 203 connected between the emitter and collector electrodes of the transistor 201 and having a resistance value of R₂, and a power supply terminal 204 supplied with a voltage of + V EE and connected to the other end of the resistor 202. When a sufficiently large positive voltage is applied to the base electrode of the transistor 201 via signal line 101, the transistor 201 is turned off so that a current i which is V EE /(R₁ + R₂ + r₁) will flow to the semiconductor laser 104 connected to the collector electrode of the transistor 201, where r₁ represents the internal resistance of the semiconductor laser 104. When the base potential of transistor 201 is zero, the transistor 201 is turned on to supply a current i which is V EE /(R₁ + r₁ + r₂) to the semiconductor laser 104, where r₂ represents the internal resistance of the transistor 201 and R₂ » r₂ stands. As described above, the circuit shown in Fig. 1B can supply a binary current to the semiconductor laser 104 in response to the voltage of an external signal. The levels of the binary current can be set to any values by suitably selecting resistance values of resistors 202 and 203. The semiconductor laser 104 has a differential gain characteristic, and Fig. 2A shows the relation between the light quantity P out of the output optical signal 105 and the value of injection current i, and Figs. 2B to 2D show the relation, for different values of the parameter of injection current i, between the light quantity P out and the total quantity of input light P in which is the sum of the input light quantities, i.e. P in = P in1 + P in2 , where P in1 represents the light quantity of the input optical signal 106 and P in2 represents the light quantity of the input optical signal 107. The curve of Fig. 2A is plotted for P in = 0(zero µW). As shown by the differential gain characteristic of Fig. 2A, as the current i increases from 0(zero)mA, there is a region in which the output light quantity P out increases abruptly from OµW to Ph = 2mW between i₂ = 25mA and i₃ = 30mA. Fig. 2B shows the relation between the total quantity of input light P in and the quantity of output light P out , when the value of the injection current i is set at i₁ = 2mA satisfying the relation 0 < i₁ < i₂. In the differential gain characteristic of Fig. 2B, as P in increases from OµW, P out increases abruptly from OµW to Ph at a point where P in = P₂ = 30µW . Fig. 2C shows the relation between the total quantity of input light P in and the quantity of output light P out when the value of the injection current i is set to i₂, providing a differential gain characteristic in which, as P in increases from OµW, P out increases abruptly from 0 to Ph at P in = P₁ = 10µW , where P₁<P₂. Fig. 2D shows the relation between the total quantity of the input light P in and the quantity of output P out when the value of the injection current i is set to i₃, indicating that P out is maintained at a substantially constant value of pH independently of the value of P in . To execute a logical product operation, i.e. a logical AND, the correspondence between the value and the logic level of each of P in1 , P in2 , i and P out is set as follows. A light quantity P inL corresponding to a low level of each of P in1 and P in2 is set to satisfy a relation P inL < P₁/2, a light quantity P inH indicative of a H(high) level of the respective P in1 and P in2 is set to satisfy relations P₁/2 < P inH < (P₁ - P inL ) and P inH < P₂/2, the value at a L(low) level of i is set to i₁, the value of i at a H(high) level is set to i₂, the light quantity at the L level of P out is set to zero, and that at the H level is set to Ph. When the logic levels are set as described above, P out assumes the H level only when all of P in1 , P in2 and i are at the H level. The reason for this will now be explained. If all of P in1 , P in2 and i are at the H level, i = i₂, and the total quantity of the input light P in = P in1 + P in2 satisfies P₁ < P in < 2(P₁ - P inL ) and P in < P₂. Consequently, according to the relation between P in and Pout shown in Fig. 2C, P out becomes Ph, which is H level. On the other hand, when either one of P in1 , P in2 and i is at the L level, P out becomes zero, which is the L level. For example, when P in1 is at the L level, P in < P₁, and P out becomes the L level both when i = i₁ and when i = i₂. In the case where P in2 is at the L level, P out also becomes the L level. When i is at the L level, that is, i = i₁, P out is still at the L level when both P in1 and P in2 are at the H level because P in < P₂ stands. Fig. 3A is a truth table showing the above logical relation, in which the character X represents an arbitrary level which may be either L or H level. This truth table shows that when at least one of P in1 , P in2 and i is at the L level, P out is at the L level, and that only when all of P in1 , P in2 and i are at the H levels, is P out at the H level. When expressed by Boolean algebra, this logic relation represents the logical product: P out = P in1 .P in2 .i. On the other hand, to execute a logical sum operation, i.e. a logical OR, the values of P in1 , P in2 , i and Pout are made to correspond to logic levels in the following manner. The light quantity P inL at the L level of P in1 and P in2 is made to satisfy the relation P inL < P₁/2, the light quantity P inH at the H level of P in1 and P in2 is made to satisfy the relation P₁ < P inH , the value of i at the L level is set to i₂, the value of i at the H level is set to is, the light quantity of P out at the L level is set to O and that at the H level is set to Ph. When respective logic levels are set in this manner, P out is at the H level when at least one of P in1 , P in2 and i is at the H level. When all of P in1 , P in2 and i are at the L levels, i = i₂ stands and the total quantity of input light satisfies an equation. P in = (P in1 + P in2 ) < P₁ Consequently, from the relation between P in and P out shown in Fig. 2C, P out becomes O, that is, assumes the L level. When at least one of P in1 , P in2 and i is at the H level, P out is at the H level. For example, when P in1 is at the H level, P₁ < P in stands and in either case of i = i₂ or i = i₃, P out is at the H level. In the same manner, with P in2 being at the H level, P out is at the H level. When i = i₃ stands, that is, i is at the H level, P out is always at the H level independently of the levels of P in1 and P in2 . Fig. 3B is a truth table showing this logic relation, in which the character X represents an arbitrary level which may be H or L level. This truth table shows that only when all of P in1 , P in2 and i are the L levels, is P out at the L level, and that when at least one of P in1 , P in2 and i is at the H level, P out is at the H level. When expressed by Boolean algebra, this logical relation represents the logic sum: P out = P in1 + P in2 + i. Similar logical operation can be accomplished by using a semiconductor laser of an optically bistable characteristic having the same construction as that of the semiconductor laser possessing the differential gain as described above. The differential gain and optical bistable characteristic of a semiconductor laser is described in detail in Proceedings of the Institution of Electrical Engineers, Vol. 119, Pt. I, No. 4, AUGUST 1981, pages 141-148, "Optical bistable-switching operation in semiconductor lasers with inhomogeneous excitation". Fig. 4A shows for a semiconductor laser possessing an optically bistable characteristic, the relation between the output light quantity P out and the value of injection current i, and Figs. 4B to 4D show the relation, for different values of injection current i, between the light quantity P out and the total quantity of input light P in . The curve of Fig. 4A is plotted for P in = OµW, and shows that when i is increased from zero, P out increases abruptly from zero to Ph (= 2mW) at a current value between i 2' = 25 mA and i 3' = 30 mA. Thereafter, irrespective of the increase in i, P out is maintained substantially constant at the value Ph. When i is then decreased, P out decreases abruptly to zero at a current value smaller than the current value between i 2' and i 3' at which the P out increased abruptly, thus manifesting an optically bistable characteristic having a hysteresis loop. Fig. 4B shows the relation between P out and P in when i = i 1' where 0 <i 1' <i 2' . As shown, when P in is increased from zero, P out increases abruptly from zero to Ph at P in = P 2b = 35µW , and irrespective of further increase in P in , P out is maintained substantially constant at the value Ph. Thereafter, when P in is decreased, an optical bistable characteristic is obtained in which P out decreases abruptly to zero from Ph at P in = P 2a = 30µW . Fig. 4C shows the relation between P in and P out when the injection current i is set to i 2' . As shown, when P in is increased from zero, P out increases abruptly to Ph from zero at P in = P 1b = 15µW , and irrespective of further increase in P in , P out is maintained substantially constant at the value Ph. Then, as P in is decreased, P out decreases abruptly to zero from Ph at P in = P 1a = 10µw , thus manifesting an optical bistable characteristic. Fig. 4D shows the relation between P in an P out when the injection current i is set to i 3' . As shown, irrespective of the value of P in , P out is maintained substantially constant at the value Ph. Correspondence between the values of P in1 , P in2 and i of the semiconductor laser manifesting the optical bistable characteristic described above and the logic levels is set in the following manner, as in the previous case of the semiconductor laser having the differential gain characteristic. In the logical product operation, the light quantity P inL for P in1 and P in2 at the low level is set to satisfy a relation P inL < P 1a /2, the light quantity P inH at the H level is set to satisfy relations P 1b /2 < P inH < (P 1a - P inL ) and P inH < P 2a /2, the value of i at the L level is set to i 1' , the value of i at the H level is set to i 2' , the light quantity of P out at the L level is set to zero, and the light quantity of P out at the H level is set to Ph. To execute a logical sum operation, the light quantity P inL for the L level of P in1 and P in2 is set to satisfy a relation P inL < P 1a /2, the light quantity P inH for the H level of P in1 and P in2 is set to satisfy a relation P 1b < P inH , the value of i at the L level is set to i 2' , the value of i at the H level is set to i 3' , the light quantity of P out at the L level is set to zero, the light quantity of P out at the H level is set to Ph. By setting respective levels in this manner, a similar logical sum operation is thus possible with the use of the semiconductor laser having an optically bistable characteristic. Fig. 5 shows a second embodiment of this invention which comprises an optical waveguide path 702 which receives an optical data input signal D at one end 701, an optical gate 703 having an input terminal at the other end of the optical waveguide path 702 and enabled and disabled by a gate input signal G on a signal line 708, an optical waveguide path 704 with one end connected to the output terminal of the optical gate 703, a bistable semiconductor laser 705 connected to the other end of the optical waveguide path 704, an optical waveguide path 706 with one end connected to the output terminal of the bistable semiconductor laser 705 and the other end 707 emitting light, and a control circuit 709 for controlling the value of current i injected into the bistable semiconductor laser 705 via conductor 710 in accordance with a gate input signal G on the signal line 708. Figs. 6A and 6B are graphs of characteristic curves useful for explaining the operation of the bistable semiconductor laser 705 shown in Fig. 5 and show relations between current i injected into the laser 705 via the conductor 710, the quantity of input light P in inputted through the optical waveguide path 704, and the quantity of output light P out outputted through the optical waveguide path 706. Fig. 6A shows the relation between current i and P out when P in = O. As can be noted from Fig. 6A, the bistable semiconductor laser 705 manifests an hysteresis characteristic. When current i is increased from zero, P out increases abruptly from zero to Ph = 2mW at i = i uo = 40mA . Thereafter, during further increase in current i, P out is maintained substantially constant at the value Ph. When current i is then decreased, P out decreases abruptly to zero from Ph at i do = 20mA which is smaller than i uo . If the current i is selected to be i b = 30mA defined by a relation i do < i b < i uo , two stable operating states, E standing for P out = Ph and F standing for P out = 0, are obtained. Fig. 6B shows the relation between P in and P out when the injection current i is set to i o = 15mA which is smaller than i do . As shown, when P in is increased from zero, P out increases abruptly from zero to Ph at a point P in = P u = 40uW . Thereafter, even when P in is increased to P₃ = 60µW, Pout will be maintained at a constant operating point I where P out is approximately equal to Ph. The, when P in is decreased, P out decreases abruptly to zero from Ph at P d = 20µW which is smaller than P u . Fig. 7 is a table for explaining the operation of the embodiment shown in Fig. 5, the table showing relations among the injection current i, the quantity of input light P in , the operating points of the bistable semiconductor laser 705 shown in Figs. 6A and 6B, and the quantity of the output light P out . Suppose now that gate signal G is not supplied to signal line 708 shown in Fig. 5. At this time, since the optical gate 703 is disabled, the input light quantity of the laser is zeroed irrespective of the optical data input signal D inputted to the optical gate 703. At the same time, control circuit 709 injects current i b into the bistable semiconductor laser 705 in the absence of the gate input signal G. Accordingly, the laser 705 operates at either one of the operating points E and F shown in Fig. 6A and the quantity of its output light P out is maintained at Ph or zero (storage state). When a gate input signal G is applied, the control circuit 709 supplies an injection current i o to the semiconductor laser 705. At the same time, the optical gate 703 is enabled or opened. Under these conditions, when a light data input signal D of a light quantity P₃ is applied to the bistable semiconductor laser 705 through optical waveguide paths 702, 704 and optical gate 703, the laser 705 operates at the operating point I shown in fig. 6B so that the quantity of its light output P out becomes Ph (set state). Thereafter, when the supply of the gate input signal G is stopped, the quantity of light output P out from the laser is maintained at the reset state to provide the output light quantity Ph, because the bistable semiconductor laser 705 operates at the operating point E shown in Fig. 6A even though the injection current I becomes i b and the quantity of light input P in to the laser 705 becomes zero. On the other hand, if the light date input signal D is not supplied when the gate input signal G on line 708 is applied to establish i = i o and to open the optical gate 703, the input light quantity P in to the laser 705 becomes zero, so that the bistable semiconductor laser 705 operates at the operating point H shown in Fig. 6B and the output light quantity P out is zeroed (reset state). Thereafter, the laser 705 operates at the operating point F even under a condition of i = i b and P in = 0 due to stoppage of the supply of the gate input signal G, thereby ensuring the output light quantity P out from the laser 705 to be maintained at zero in the storage state. The optical gate 703 (Fig. 5) which is operated by an electric signal, can be an electronic optical switch or the first embodiment of the invention shown in Fig. 1. Electronic optical switches are described in detail, for example, in the Institute of Electrical and Electronics Engineers, Journal of Quantum Electronics, Oct. 1982, "Integrated optical switch matrix for single-mode fiber networks".

Claims: An opto-electric logic element comprising a semiconductor laser (104), means for supplying at least one light input signal to the laser (104), and a circuit (102) for supplying an injection current (i) to the laser (104), characterised in that the current supplying circuit has an electrical input (101) for an electrical logic signal and includes control means (201) responsive to the logic value of the electrical logic signal to set the magnitude of the current (i) supplied to the laser (104) to either one of two values in dependence upon the logic value of the electrical logic signal, at least one of the said two current values (i₁, i₂ (Fig. 2A)) being less than the laser threshold value of current for the laser (104) in the absence of any light input signal. An opto-electric logic element according to claim 1, characterised in that one (i₃) of the said two current values exceeds the said laser threshold value of current in the absence of any light input signal. An opto-electric logic element according to claim 1, characterised in that both of said two current values (i₁, i₂) are less than the said laser threshold of current in the absence of any light input signal, and the said two current values (i₁, i₂) are different values such that the smaller current value (i₁, i 1' ) is less than the laser threshold current for a predetermined total light input signal, and the larger current value (i₂, i 2' ) is larger than the said laser threshold current for the said predetermined total light input signal. An opto-electric logic element according to any preceding claim, characterised in that the laser (104) has a bistable characteristic. An opto-electric logic element according to claim 1, characterised in that the laser (705) has a bistable characteristic, one of the said two current values (i o in Fig. 6A and Fig. 6B) is less than the bistable turn-off current value (i do ) in the absence of any light input signal, and the other of the said two current values (i b ) is less than the said laser threshold value of current (i uo ) for the laser (705) in the absence of any light input signal but is greater than the said turn-off current value (i do ). An opto-electric logic element according to claim 5, characterised in that the means for supplying at least one light input signal comprises an input light path (702) to an optical gate (703) having its output coupled optically to the laser (705) and having an electrical control signal input connected to receive the said electrical logic signal, the optical gate (703) in operation being open to allow light to pass to the laser (705) whenever the logic value of the electrical logic signal determines the current value to be the smaller (i o ) of the said two values, and being closed to prevent light passing to the laser (705) whenever the logic value of the electrical logic signal determines the current value to be the larger (i b ) of the said two values.

Inventors: SUZUKI, SYUJI
Applicants: NEC CORPORATION
Application year: 1984
Main classification: G02F3
IPC codes: H01S5, G02F3