RADAR DISTANCE MEASURING APPARATUS

Abstract: An apparatus is disclosed for bringing into syncnron­ ism a first pulse train and a second pulse train having the same pseudorandom coding, which apparatus comprises means (26, 27) for gating the first pulse train in synchronism with the second pulse train to derive a pair of opposite gated signals, means (29) for combining and means (30) for inte­ grating the gated signals to comprise an output signal, and means (24) for delaying the second pulse train signal to maximize the output signal.

Description: Radar Distance Measuring Apparatus The present invention relates to a radar distance measuring apparatus according to the preamble of claim 1 and particularly to pulse position coded, non-coherent radar altimeters. Pulsed radar systems have conventionally operated with a relatively low transmitter duty cycle determined by the maximum range to the target. As a result, the peak power required for the transmitter in order to obtain sufficient signal-to-noise ratio is high. The duty cycle can be increased by increasing the pulse repetition frequency. This results in having several pulses in flight at the same time, which requires the provision of means for overcoming the ambiguous range problem. For non-coherent radars, this commonly takes the form of random pulse position frequency jitter, which is effective for relatively small duty cycle improvement, but degrades rapidly with increasing duty cycle. It is the object of the present invention to improve known radar distance measuring equipment with respect to ambiguity signal degradation. This object is achieved according to the characterizing features of claim 1. Further advantageous embodiments of the present invention may be taken from the subclaims. In the drawing, in which like reference numerals identify similar elements throughout the several views, Figure 1 is a block diagram of a pulsed radar altimeter according to the invention, Figure 2 shows schematically certain relations between returned video pulses and local gating pulses in predetermined conditions, and Figure 3 shows schematically certain relations between individual video and gating pulses. In the block diagram of Figure 1, a clock 10 supplies a continuous train of equally spaced pulses at a fixed pulse repetition frequency through a divider chain 11 to a "pseudorandom noise1 (PRN) code generator 12 to provide a repeating pulse code which triggers a pulse generator 13 synchronized with the divider chain. A modulator 16 energizes a transmitter 15 as controlled by generator 13 so that the transmitter is fully on or fully off per pulse: there is not necessarily any controlled phase relation in the radio frequency from pulse to pulse. The repeating pulse words are radiated from a transmitting antenna 17 and reflected from the ground, or other target, to a receiving antenna 20 and a receiver 21 which energizes a video amplifier 22 to give a train of reflected pulse words delayed from the output of generator 13 by an interval which is a measure of the distance to the reflecting target. Antennas 17 and 20 may, if advantageous, be a duplexer antenna assembly. Clock 10 also supplies a second divider chain 23, through a programmable delay line 24, to energize a second PRN code generator 25 identical to generator 12. Generator 25 actuates a gate generator 26 synchroniied from chain 23. Generator 26 energizes a gating circuit 27 to control the supply of video signals from amplifier 22 through an adder 29, an integrator 30, and a comparator 31 having a reference input 32 to a search-and-track logic 33. This in turn actuates an up/down counter 34 to program the delay line 24. A track/non-track indicator 35 may be actuated from logic 33, an instantaneous altitude indicator 36 may be be energized from counter 34, and an average altitude indicator 37 may be actuated by a digital converter 40 having a START input 41 from generator 12 and an STOP input 42 from generator 25. If the delay between generators 12, and 25, is exactly the same as the time required for each successive pulse to reach and be reflected from the ground, so that the first return or video pulse of each word is synchronized with a first gating pulse, then every video pulse in the word is synchronized with a gating pulse, and a maximum signal is supplied to the integrator. If the delay is such that the first video pulse is synchronized with some gating pulse other than the first one, some of the other video pulses are not synchronized with any gating pulses, and the integrator receives a smaller signal. FIGURES 2A-2I illustrate this for the simple case of a "7-bit" word, one with 7 pulse positions. FIGURE 2A shows the gating word pulses zGw properly synchronized with the return video pulses, "V" FIGURES 2B, 2C, 2D, and 2E show the gating word successively 1, 2, 3, and 4 pulse positions too early, and FIGURES 2F, 2G, 2B, and 21 show the gating word successively 1, 2, 3, and 4 pulse positions too late. Note that in FIGURE 2A four pulses per video word, those marked with x, coincide with gating pulses, while in each of FIGURES 2-B to 2-I only two pulses per video word coincide with gating pulses. Thus, for even this short word, an integrator output corresponding to three or fewer coincident pulses is indicative that synchronization is not properly complete. For words with a greater number of bits, the output difference between correctly and incorrectly synchronized signals is even greater. In FIGURE 2A-2I both the video pulses and the gating pulses are shown to be of square wave form: this is not generally the case in practice. The gate pulses can be substantially square, but the video pulses are unavoidably degraded. FIGURE 3 shows wave forms closer to what can be expected. Here curve G shows a gating pulse, and curve V shows the associated video pulse. The electronics is set up so that when the curves intersect to define a specific area A, comparator 31 gives a zero output and counter 34 is not actuated. If the area reduces to that indicated by A1 in FIGURE 3B, counter 34 is actuated step-wise to cause gate pulse G to occur later, while if the area increases to that indicator by A2 in FIGURE 3C, counter 34 is actuated step-wise to cause pulse G to occur earlier, this result repeating in each case until the area A is again achieved. It is to be particularly noted that this effect of area variation takes place in each instance where a gating and a video pulse are in synchronism. Note that only when proper synchronization has been achieved does a maximum number of such instances take place. Thus, integrator 30 can disable counter 34 only when more than 2 areas per word are as shown in FIGURE 3A. Generator 26 is synchronized from chain 23: it gives a pulse at 44 for each positive bit in the word from generator 25, and a pulse at 43 for each zero bit in the word. Thus, one or the other of two gates in circuit 27 is open whenever a video pulse is expected from unit 22, and the video pulses are supplied through adder 29 to jointly affect integrator 30. The operation of the system is as follows. Under the control of clock 10 and code generator 12 a continual sequence of pulses with PRN coding is transmitted from antenna 17, and a like sequence of coded pulses is supplied to gate generator 26 after a delay in line 24. Return pulses from antenna 20 cause video pulses at gating circuit 27. The system is in a search mode, as indicated at 35, in which logic 33 sends signals to cause sweep of counter 34 through its range repeatedly in a predetermined direction. At some point in the sweep the gating pulses come into approximate synchronism with the return pulses, to the extent that each gating pulse overlaps a video pulse. A signal of sufficient magnitude is accordingly supplied through integrator 30 to change logic 33 from its search state to its track status, as indicated at 35. In the track mode, if the video pulses and the gate pulses overlap by an area A, the integrator signal to comparator 31 is equal to the reference 32, and the comparator gives no output, so that logic 33, counter 34, and indicator 36 remain in their present condition. Movement of the aircraft with respect to the ground, however, changes the delay of video signals V, to change the overlap area to some other value A1 or A2, and the signal to comparator 31 changes so that an *up" or a *down* output is supplied to logic 33 and causes operation of counter 34 to adjust delay line 24 in a sense to change the area toward the area A. This relation between members 30, 31, 32, 33, and 35 is well known, and will not be described in detail. In any practical application of this type of radio altimeter, radio frequency noise is always present and over any short interval it may be considered to be substantially constant. Gating circuit 27 supplies at 45 video signals having noise components and intelligence components, and at 46 video signals having only noise components. Since in a pseudorandom code word the numbers of positive and negative 'pulses are within one of being equal, the effective noise is greatly reduced by this arrangement. It is also found that the arrangement gives substantially complete suppression of range correlation side lopes. From the above it will be evident that the invention comprises apparatus employing pseudorandom pulse coding to enable increased pulse repetition frequency in a radar system without introduction of ambiguity into the signals. It will be evident that the arrangement has a high tolerance to interference, either intentional or incidental, since any interfering signal must comprise pulse having the particular pseudorandom coding in order to appreciably affect the apparatus. Numerous characteristics and advantages of the invention have been set forth in the foregoing description, together with details of the structure and function of the invention, and the novel features thereof are pointed out in the appended claims. The disclosure, however, is illustrative only, and changes may be made in detail especially in matters of shape, size, and arrangement of parts, within the principle of the invention, to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.

Claims: Claims: 1. Radar distance measuring apparatus comprising: means (t0} providing a continuous train of pulses having a predetermined repetition frequency, first coding means (11, 12) for deriving from said train a first digital signal having a pseudorandom binary coding, second coding means (24, 23, 25) for deriving from said train a second digital signal having said coding, and means (16, 15, 17, 20, 21, 22) deriving from said first digital signal a train of video pulses having said binary coding and delayed in accordance with a condition to be measured, c h a r a c t e r i z e d b y gating means (26, 27) connected to receive said video pulses and actuated in accordance with said second digital signal to transmit said video signals in opposite senses during the two states of said binary coding, so as to provide a pair of output signals. 2. Apparatus according to claim 1, c h a r a c t e r i z e d b y means (29 30, 32, 33, 34) variably delaying said second digital signal in accordance with the relation between said output signals to bring said second digital signal into synchronism with said video pulses. 3. Apparatus according to claim 2, c h a r a c t e r i z e d i n t h a t the last named means includes a prograble delay line (24) connected to said source and means (29'to 34) programming said delay line in accordance with the relation between said output signals. 4. Apparatus according to claim 3, c h a r a c t e r i z e d i n t h a t said programming means comprise: means (29, 30) combining and integrating said output pulses to supply an integrated output; means (33, 34) initially sweeping said delay line (24) repetitively th4ia a range of values; and means (31) interrupting the operation of the last named means (33, 34) when said integrated output is greater than a predetermined value. 5. Apparatus according to claim 4, c h a r a c t e r i z e d i n t h a t said interrupting means (31) is a comparator fed by said integrating means (30 > and by a reference voltage (32). 6. Apparatus according to claim 4, c h a r a c t e r i z e d i n t h a t said sweeping means (33) is connected to an up/down counter (34) acting upon said programmable delay line (24). 7. Apparatus according to claim 1 or one of the following claims, c h a r a c t e r i z e d i n t h a t said gating means comprises: a gate generator (26) connected to said second code generator to provide a pair of distinguishable gating pulses (43, 44) from the pulses of said second train, in accordance with whether said pulses have positive or zero values; and a gating circuit (27) connected to said gate generator (26) and to said video pulses to provide therefrom opposite output signals (45, 46) one having intelligence and noise components and one having only noise com ponents.

Inventors: BJORKE, MERLIN D., THUE, BAARD H.
Applicants: HONEYWELL INC.
Application year: 1984
Main classification: G01S13
IPC codes: G01S13