CONTROLLED ELECTRONIC SWITCHING DEVICE FOR THE SUPPRESSION OF TRANSIENTS

Abstract: This controlled electronic switching device for the sup­ pression of transients can change over from a non-conductive state to a conductive state at lower triggering current levels than conventional devices while retaining unaltered its re­ sponse characteristics to variations in the voltage applied thereacross. The device comprises a main switch (20, 21, 26, 24) which is triggered by a parallel-connected auxiliary switch (22, 23, 27, 25) having smaller junction areas and a higher ca­ pacitive current shunt resistance (R′) (resistance between base and emitter) than the main switch, thereby it turns on at lower control currents from the gate electrode (G₁, G₂) for a given response to voltage variations.

Description: This invention relates to a controlled electronic switching device for the suppression of transients, which can change over between two different (on and off) states according to the state of an externally applied control signal. Such devices have several applications in the field of either current or voltage protection, e.g. in telephone lines. The need is felt for devices which can be arranged on the line between the two leads so as to suppress transient phenomena, such as the secondary effects of lightning, by operating as open circuits in a normal condition and shorting the two lines together in the presence of a transient phenomenon ("normalized" lightning) to be suppressed. Suitable devices to provide this function are, for example, SCR switches formed with four layers of alternate conductivity types, as the one shown for instance in Figures 1 to 3. Such a device (well known per se) comprises two terminal connections, an anode A, cathode K,and a control electrode or gate G, and has three junctions J₁,J₂,J₃ which govern the device behaviour. In particular, by negatively biasing the cathode with respect to the anode, the junctions J₁ and J₃ become forward biased while junction J₂ is inversely biased; consequently, there is no current flow between the anode and cathode, and the device will be in its off state. On application of a signal to the control electrode G, the NPN transistor formed by the three layers closest to the cathode begins to conduct, thus lowering its collector voltage level which corresponds, as shown, to the base of the second PNP transistor formed by the three layers closest to the anode A. As a result, the second PNP transistor senses that occurrence as a base drive and begins to conduct, thus producing a regenerative effect. By this time, the device will be in its fully conductive state as represented by the vertical line in the graph of Figure 3 which also illustrates the relationship existing between current and voltage versus the control current to the electrode G. As is known, (refer, for instance, to Gentry et al., "Semiconductor Controlled Rectifiers: Principles and Application of p-n-p-n Devices", Prentice-Hall, E-E Series) in order for the device to turn on the following condition must be met: β NPN x β PNP = 1. As the current I A flowing through the device decreases, the device remains on in accordance with the law illustrated in Figure 3, until the current reaches a minimum value called holding current, I H . However, that prior device has the disadvantage of becoming conductive as the voltage across it varies rapidly even with the control current to the electrode G below the desired value for conduction to begin. This phenomenon, which is due to the appearance of capacitance at the junctions, has been obviated by the device, also well known, shown in Figures 4 and 5. The technique adopted (refer, for example, to R.W. Aldrich and N. Holonyar Jr. in the article entitled "Two-terminal Asymmetrical and Symmetrical Silicon Negative Resistance Switches", Journal of Applied Physics, Vol, 30, No. 11, November, 1959) consists in practice in providing a resistance between the base region of the NPN transistor and the emitter thereof, which diverts the current generated within the capacitor owing to a voltage variation. In particular, and as shown in Figure 4, on a silicon chip comprising four layers with different conductivity types, namely a layer 1 of the P⁺⁺ type, layer 2 of the N type, layer 3 of the P⁺ type, and layer 4 having several regions of the N⁺ type, a metal layer 5 has been deposited which part overlaps the layers 3 and 4. The circuit equivalent of such a device is shown in Figure 5. In that view, one can see the transistor 7 of the PNP type formed by the layers 1, 2, and 3 of Figure 4, the transistor 8 formed by the layers 2,3 and 4 of the same, the capacitor 10 formed between the layers 2 and 3 of Figure 4 (and corresponding to the junction J₂), and the resistor 9 placed between the emitter and base of the transistor 8 and due to layer 5. In particular, the resistance of element 9 determines the value of the triggering current of the gate electrode G₁. That resistance, which is selected at a very low value to avoid the capacitive current from the capacitor 10 causing the device to turn on prematurely, also causes the control current from the gate electrode G₁ to only turn on the device when relatively high. In particular, by selecting the value of 1Ω for R, the triggering current of the gate electrode is fixed at 600-700 mA for the device to turn on. A power thyristor device is disclosed by EP-A-046 578. The known power device includes a semiconductor substrate of a first conductivity type, layers of a second conductivity type extending above and below said substrate, a pair of semiconductor layers of said first conductivity type extending sandwich-like above and below said layers of second conductivity type, a single anode layer and a cathode layer subdivided in several portions, so as to form in practice two parallel connected thyristors. However, said known device also fails to tackle the problem of spontaneous switching when the voltage across the device rapidly varies. An other known power control device is disclosed by EP-A-025 291. The control device according to EP-A-025 291 includes three 4-layers SCR switches integrated in a single semiconductor body suitable for AC power control. In order to minimize power losses and avoid interferences with other apparatus connected to the electricity source switching is performed during the zero passage of the AC voltage. However, EP-A-025 291 also fails to solve the problem spontaneous switching when the voltage across the SCR device rapidly varies. This task is achieved by an SCR-device for the suppression of transients as defined in the accompanying claims. In practice, the main SCR is associated with a parallel connected auxiliary SCR which, having smaller junction areas, has a lower capacitance value, and hence, for a given voltage variation, a lower capacitive current, thus enabling the use of a higher resistance between the base and emitter electrodes of a transistor in the auxiliary switch, and consequently ensuring that the device be turned on at lower values of the gate electrode current. Further features and advantages will be more readily understood from the following detailed description of a preferred, though not exclusive, embodiment of this invention, with reference to the accompanying illustrative, but not limitative, drawings, where: Figure 1 depicts the theoretical physical structure of a conventional SCR switch; Figure 2 shows the graphic symbol for the device of Figure 1; Figure 3 shows a graph illustrating the ratios between the electric quantities of the device of Figure 1; Figure 4 illustrates the physical structure of another conventional device according to the "shorted emitter" technique; Figure 5 shows the wiring diagram of the conventional device of Figure 4; Figure 6 shows the wiring diagram of the device of this invention; and Figure 7 shows the physical structure of the device of this invention. The device according to this invention will be now described with reference to just Figures 6 and 7; Figures 1-5 relating to conventional devices already reviewed detailedly hereinabove. The device of this invention comprises a main switch formed by a PNP transistor 20, NPN transistor 21, junction capacitor 26, and resistor 24, and an auxiliary switch including the PNP transistor 22, NPN transistor 23, junction capacitor 27, and resistor 25. Said two switches are practically connected in parallel, and more precisely, it may be seen that the bases of the two transistors 20 and 22 are connected together and to the collectors of the transistors 21 and 23, while the emitters of the transistors 20 and 22 are connected together and to the terminal of the anode A, and the emitters of the transistors 21 and 23 are connected together, to one terminal of the resistors 24 and 25 and to the cathode K. Further, connected to the base of the transistor 23 is a gate electrode G₁, and a further gate electrode G₂ is connected to the bases of the transistors 20 and 22; the gate electrodes G₁ or G₂ being alternatively connected to either the positive line lead or negative line lead. Details on the device structure are shown in Figure 7, where a first layer 30 with conductivity of the P⁺⁺ type and a second layer 31 with conductivity of the N type may be seen; the layers 30 and 31 are shared by both switches. Formed within the layer 31 are regions 32 and 33 with conductivity of the P⁺ type, region 32 forming the collector of the transistor 20 and base of the transistor 21 and region 33 forming collector of the transistor 22 and base of the transistor 23. As shown in said view, the junction region between the layer 33 and layer 31 has a smaller area than the junction between the layer 32 and layer 31. Consequently, the capacitance existing between the layer 33 and layer 31 is smaller (by a proportional amount to the ratio between the areas) than the capacitance existing between the layers 32 and 31. Formed in the layers 32 and 33 are then regions 34 and 35 with conductivity of the N⁺ type; in particular, formed in the layer 32 are the emitter regions 34 of the transistor 21, while in the layer 33, there are formed the emitter regions 35 of the transistor 23. Partly overlapping the layers 32 and 34, respectively 33 and 35, are metal layers 36 and 37 defining the resistors 24 and 25. Finally, a metal layer 38 is provided which interconnects the metal layer 37 with the metal layer 36. The device further comprises the electrodes A and K, forming the device anode and cathode terminals, and the gate electrodes G₁ and G₂ which govern the conductive state of the device. Either of said gate electrodes is connected to a desired line lead, or possibly to the load itself. The oxide layer 39 acts as an insulator. The operation of the inventive device is apparent from the foregoing description. In particular, it should be pointed out that, owing to the junction between the layers 31 and 33 having a smaller area than the junction between the layers 32 and 31, its equivalent capacitance C' will be less, and accordingly, also lower will be the current generated as a result of voltage variations across the device. Thus, the current flowing through the equivalent resistance R', 25, will be a lower one, so that resistance R' can be designed with a higher value than R, while the behaviour of the device due to voltage variations across it is maintained unchanged. Increase of resistance R' allows turning-on of the device with a triggering current from the electrodes G₁,G₂ lower than the lowest value attainable heretofore with conventional devices. As evident to those skilled in the art, triggering of the auxiliary device results then in the whole device being triggered. Thus, the device can also operate at much lower currents than in the past while retaining its characteristics unaltered as regards voltage variations and triggering rate. At exhaustion of the transient phenomenon which has turned the device on, and in particular shorted the two leads whereto the anode and cathode terminals are connected, the device is automatically turned off according to a similar pattern to that shown in Figure 3, thus again separating the two leads. The invention as disclosed hereinabove is susceptible to many modifications and changes. In particular, while it has been described with specific reference to its application on telephone lines for the suppression of normalized lightning, it could find application wherever a load is to be protected against overvoltage and overcurrent, wherein through the use of external circuit components, programmability of the values of the occurring electric signals can be achieved. Furthermore, while the drawing shows a device comprising a main switch and auxiliary switch, such auxiliary switches may also be provided in a larger number, and,according to a preferred embodiment, such auxiliary devices would be located outside the main device, all around it, to ensure turning on from any sides. Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included just for the sole purpose of increasing intelligibility of the claims and accordingly, such reference signs do not have any limiting effect on the scope of each element identified by way of example by such reference signs.

Claims: An SCR-device for the suppression of transients, comprising at least a first control gate (G1) for receiving said transients and a main SCR (20,21,26) including at least four semiconductor layers (30,31,32,34) comprising a first layer (30) of a first conductivity type being in contact with a first terminal connection (A), a second layer (31) of a second coductivity type opposite to said first conductivity type, a third layer of said first conductivity type (32) formed in said second layer (31) forming a main junction (31-32) therewith and at least one fourth layer (34) of said second conductivity type formed in said third layer, said fourth layer being in contact with a second terminal connection (K), said main SCR being provided with main resistive connection (24,36) between said third layer (32) and said fourth layer (34), said device comprises at least a second, auxiliary SCR (22,23,27) connected in parallel with said main SCR (20,21,26), said auxiliary SCR (22,23,26) including at least four auxiliary semiconductor layers (30,31,33,35) comprising said first layer (30), said second layer (31), an auxiliary third layer (33) of said first conductivity type formed in said second layer (31) forming an auxiliary junction (31-33) therewith, said auxiliary third layer being connected to said first control gate (G1) and at least one auxiliary fourth layer (35) of said second conductivity type formed in said auxiliary third layer, said auxiliary fourth layer being in contact with the second terminal connection (K), said auxiliary SCR (22,23,26) being provided with auxiliary resistive connections (25,37) between said auxiliary third layer (33) and said auxiliary fourth layer (35), wherein said auxiliary junction (31-33) has an area smaller than said main junction (31-32) and said auxiliary resistive connection (25,37) has a resistance higher than said main resistive connection (24,36). A device according to Claim 1 wherein said SCR's comprise metal layers (36,37) forming said main (24,36) and said auxiliary (25,37) resistive connections. A device according to claim 2 wherein said third layer (32) and said auxiliary third layer (33) have different cross-section dimensions and are formed separate from another in said second layer (31), said fourth layer (34) and said auxiliary fourth layer (35) each comprising several mutually separated regions, are formed in said third layer (32) and said auxiliary third layer, respectively, and a bridging layer (38) interconnecting said metal layers (36,37) the device further comprising said second terminal connection (K) in contact with said metal layers (36, 37) and a second control gate (G2) connected to said second layer (31).

Inventors: BERTOTTI, FRANCO, FERRARI, PAOLO, FORONI, MARIO, GARUE, SERGIO
Applicants: SGS-THOMSON MICROELECTRONICS S.R.L.
Application year: 1984
Main classification: H01L29
IPC codes: H01L29, H02M3