APPARATUS AND METHOD FOR SCANNING AN OBJECT

Abstract: A self-scanning linear array (10) is moved (12) in the image plane of a lens to thereby scan the image of an object which has been focused in the image plane. A random access controller controls random access to the information within the scanned image. Commands (14) including mechanical positional parameters (16) and electronic scan parameters (18) are decoded by the master microprocessor (20). The elec­ tronic scan parameters in the command provide information such as a user selected transverse axis frame size scan output of the array. An address generator (22) generates addresses in response to output pulses from the array. A windowing sequencer (24) in conjuction with the address generator (22) selectively gates particular ones of the pulses in the train of output pulses from the array in accordance with the electronic scan parameters in the command. The positional parameters (16) in the command provide information as to a user selected mechanical position of the array such as longitudinal axis frame size and longitudinal position axis seek. A position indicator (26) generates position representations in response to the physical position of the array (12), and a servo loop including slave processor (28), detents the array at the posi­ tion representation corresponding to the selected mechanical position of the array as specified in the command decoded by the master microprocessor (20).

Description: This invention relates to an apparatus as indicated in the preamble of claim 1 and to a method for running such apparatus. Devices generally referred to as image scanners or electronic cameras have been developed in order to provide a system capable of scanning a document while the scanner or document is held stationary. An image scanner is disclosed in International Publication Number WO 81/00944, published April 2, 1981. In this prior art scanner, a carriage holds a self-scanning linear array at the image focal plane of the lens. A signal causes the carriage, and thus the array, to move at a measured rate of travel, continuously or in increments, in the image plane. The self-scanning cycle of the array is initiated at sequential position intervals of the array as the carriage is moved in the image plane. Either the signal which causes the carriage to move or a carriage position sensor is used to produce an encoded position signal. The position signal is used to synchronize the output pulses from the array with the mechanical position of the array, at sequential position intervals of the array. The result is a video output line scan in two dimensions of the image focused at the image focal plane. In US patent 4,271,430 to O'Brien, a microfilm address supplied by a computer is used by a microprocessor to activate a mechanical film positioning device. The device positions the appropriate frame of the microfilm in the operative position of a video signal generator. This causes a particular signature of a bank customer to be exhibited on a display for verification. In order to align the desired image on the film with the video, a marker image is placed on the film indicating the location on the film of the desired image. This marker is scanned by the video scanner and sent to a marker recognition logic which analyzes the signal and determines the location of the marker image in relation to the video scanner. Position signals are then provided to the microprocessor which calculates new position signals for a sweep generator which modifies the raster scan with respect to the microfilm so that the appropriate portions of the image are scanned. In the prior art disclosure of O'Brien, it is the object being scanned, microfilm, that is moved so that selected portions, a signature, can be scanned. This prior device does not provide for the movement of a scanning array within an electronic camera. In an apparatus of the type to which the present invention pertains, the scanner itself, not the object being scanned, is programmed to move the scanning array to scan a portion of the object. In an electronic camera, it is desirable to be able to randomly control the speed of movement of the carriage and hence the scanning array within the camera. It is also desirable to be able to randomly control the time at which the electronic scanning cycle of the array is initiated at sequential position intervals of the array as the carriage is moved in the image plane. Further, it is desirable to be able to specify the dimensions in the vertical plane of the electronic scan. Finally, it is desirable to be able to randomly start and stop scanning operations so that any desired image scanning pattern can be obtained. It is the object of this invention to provide an apparatus and a method for improving the control of image capture. According to the invention this object is accomplished by an apparatus as defined in claim 1 and by a method as defined in claim 8. The invention has the advantage that it allows the scanner to capture images in a precise manner because the controller is able to precisely control the movement of the array in the horizontal plane. The invention has the further advantage that by being able to randomly control the time at which the electronic scanning cycle of the array is initiated at sequential position intervals, and to specify the dimensions in the vertical plane of the electronic scan, masking of the image is possible so as to vary the size and pattern of the scanned image in both the horizontal and vertical directions of image scan. The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular description of preferred embodiments of the invention as illustrated in the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS FIGURE 1 is an overall block diagram of an image-processing system in which the present invention is embodied; FIGURES 2A and 2B when placed together as shown in FIGURE 2C comprise a more detailed block diagram of the apparatus according to the invention, hereinafter called random-access controller portion of FIGURE 1; FIGURE 3 is a more detailed block diagram of the video compensation, array correction, and A/D converter circuits of FIGURE 2A; FIGURES 4A-4L are flowcharts of microprogramming for the master microprocessor shown in FIGURES 1 and 2A; FIGURES 5A-5P are flowcharts of microprogramming for the slave microprocessor shown in FIGURES 1 and 2A; FIGURE 6 is a timing diagram of the free-scan/multiscan incremental modes of operation; FIGURE 7 is a timing diagram of the user-clocked buffered incremental scan mode of operation; and FIGURE 8 is a timing diagram of the command write/parameter read modes of operation. DESCRIPTION Referring now to FIGURE 1, the overall image-processing system in which the invention is embodied will now be described. The camera system for capturing images is comprised of a photodiode array of light-sensitive devices (10) and a mechanical drive system (12) which moves the array longitudinally while the photodiodes in the array are electronically scanned in the vertical direction. An external host microprocessor (11) supplies commands (14) which include position parameters (16) and scan parameters (18). These commands are supplied to a master microprocessor (20) which controls a slave microprocessor (28). Acting upon the information contained within the command (14), the master microprocessor commands a vertical frame size or window. The window is defined directly or indirectly by commanded window boundaries, which may be symmetrical or asymmetrical. The windowing operates as follows. An address counter (22) is clocked by an under the control of the clock generator PAL (32) and generates sequential addresses to thereby provide a current address (23). The current address (23) and the array output pulses (13) are supplied to a windowing sequencer (24). When the window address and the current address are equal, a pulse is generated by the windowing sequencer (24) at the video output (25) to the microprocessor. Thus, the vertical frame size can be varied under control of the user. The longitudinal frame size is controlled as follows. The position portion (16) of the command (14) is decoded and utilized by the master microprocessor to control the slave microprocessor (28). A position indicator (26) generates position representations corresponding the actual mechanical position (15) of the array in the longitudinal direction. Using the current position signal (27), the slave microprocessor generates a detent signal (29) which controls mechanical drive (12) to detent the array at any position commanded by the user. Referring now to FIGURES 2A and 2B, the details of the random-access controller shown in FIGURE 1 will now be described. The camera mechanism is attached to a frame. A standard lens housing is connected to the frame such that the lens can be moved for focusing. An array carrier (16) is slidably mounted on the frame (by means of upper-support and lower-support shafts. The array carrier (16) is driven back and forth in the horizontal (longitudinal)_direction on the support shafts by means of a motor-driven helical-threaded drive shaft which is driven by a motor which drives a toothed belt to turn the drive shaft. Attached to the array carrier is an image sensor (34). The image sensor is held in a array/support removable holder (35). The image sensor is comprised of an array of light-sensitive devices, such as, but not limited to, one or more rows of photodiodes. As the carrier (16) moves throughout the length of its travel along the support shafts, the image sensor (34) travels horizontally in the image plane. The solid-state image sensor comprises a shift register which is driven by a clock, such that each scan is initiated by a start pulse. The start pulse loads a bit which is clocked through the register, successively opening and closing switches and thus connecting each photodiode, in turn, to a video output line. As each photodiode is accessed, its capacitance is charged to the potential of the video line and is left open-circuited until the next scan. During the interval between scans, the capacitor is discharged by an amount equal to the instantaneous light-responsive photocurrent in the diode, integrated over the line scan. Each time a diode is sampled, this integrated charge loss must be replaced through the video line. The resulting video signal is a train of charge pulses, each proportional in magnitude to the light intensity falling on the corresponding photodiode. A standard 35mm film camera image field is approximately 2.54 cm by 3.8 cm in size at the focal plane. The self-scanning photodiode array (34) is 2.54 cm in length and is placed crosswise to long dimension of this field. The array is moved through the 3.8 cm length at a constant rate of travel or in fixed increments by means of the motor (71) shown in FIGURE 2A. The motor shaft has a position encoder thereon, such that the diode array self-scan output may be sampled at appropriate position intervals. This results in a two-dimensional electronic image of the 2.54 cm by 3.8 cm focal plane visual image. A home-limit sensor switch (74) is provided to sense when the carriage is at the extreme mechanical limit of its travel. Briefly, the logic of FIGURES 2A and 2B operates as follows to capture images from objects scanned by the camera. The scanning cycle of the linear array and the synchronization of the control circuitry is provided by a basic clock generator (32). The CLK output (33) from the clock generator is a timing pulse which is utilized by circuits to provide the appropriate synchronizing pulses for the transfer of digital data to an external microprocessor. Each scan of the shift register is initiated by a start scan pulse, reset pulse (41). The start pulse loads a bit which is clocked through the register, successively opening and closing the switches, thus connecting each photodiode in turn to the video output (13). The slotted aperture of the array and the array's linear photodiode geometry allows image slices to fall on the surface of the array's 1728 (or 2048) photodiodes. After an appropriate integration time, the incident light has created a time/illumination-intensity proportional electron charge packet. This charge packet is transferred to an analog shift register internal to the array device. The first clock ⊘ R , is required to reset the accumulated charge voltage on the charge detector. The second clock, ⊘ X , is applied to the array's transfer gate to move the accumulated charge packet from the image sensor elements to the CCD transport shift registers. The third clock, ⊘ T , is applied to the gates of the analog shift registers to move the charge packets from the image sensor elements to the gated charge-detector/amplifier. Under the periodic influence of these clocks, the charge packets are transferred out of the array into the video preamplifier. The video preamplifier circuit is an AC-coupled, variable gain, bandpass filter designed to suppress low frequency noise (l/f) and amplify the video signal to match the range of the compensation circuitry. The output (17) of this filter is labeled PREAMP VIDEO. The video signal (17) is applied to circuit (35). Refer to FIGURE 3. The signal (17) passes through the 1ST SAMPLER, which DC restores its output at the video pixel rate (standard 500 kHz), essentially removing all 500 kHz components and any super harmonics. The sampled video signal is transferred to the camera's video compensation circuit (37). This circuit alters the analog video signal to compensate for the array's inherent pixel response non-uniformity (PRNU). The compensation method employed appears as: y = [K(A-1/2) + 1]x where: y = compensated video K = photodetector maximum PRNU A = compensation memory, pixel responsivity dependent, gain correction word x = input video [A] = M1/2 + M2/4 + M3/8 . . . M6/64 M n = 1,0 The ⊘1 and ⊘2 signals from COMP. PROM (38) control current sources allowing the addition of offset in the implementation of compensation. The COMP. PROM (38) holds the correction values for the particular array in the camera. The resultant video output of this compensation circuit is synchronously clocked into the 2ND SAMPLER stage. This stage is a sample-and-hold circuit designed to hold the video stable during digitization. This video is DC restored at the pixel rate by the synchronous clock, DCR. The time-illumination proportional signal is now ready for digitization. The digitizing process is performed either as a standard, linear, eight-bit quantization or, optionally, as a single-bit, constant threshold comparison. The eight-bit analog-to-digital conversion is initiated by the ⊘WR clock line of the clock generator circuit and produces a one of 256 gray-level result. The resultant, quantized video signal is gated onto the video data bus (45) during valid scan conditions by the SAD signal. This signal is generated as a result of the microprocessor having decided that the array is correctly positioned and the window detector circuit (24) determining that the pixel in question is within the desired image window. The buffer memory (59) is used to hold pixel data should the user desire to clock out video at a rate less than the standard 500 kHz rate. The array video gated on the video data bus enters the buffer memory (59) and is stored using the BWE signal generated by the same PLA logic (54) that created the SAD signal. The output enable signal (OE) for the buffer memory is implemented when the user is clocking data out at the slow rate. The data-bus buffer (60) allows video data from either the A/D converter (40) or from the buffer memory (59) to be gated onto the microprocessor common data bus (61) for transfer to the user. This buffer (60) is gated using the 500 kHz pixel clock and the valid window signals. The clock-generation (32) and array-synchronization (31) circuits are used to generate the variety of clock signals required by the circuitry. The microcomputer clocks are supplied by these circuits as the array and video data clocks. These circuits control the rate at which data leaves the camera dependent upon which data mode the user has selected. The SCK and RCK lines from the master processor are used to gate and source, respectively, the buffer memory data transfer clock. The LP SYNC circuit (55) generates a signal called POS, which signifies that the array is in a valid imaging position. The source for this decision is the slave-microcomputer's LP line. This is a pulse generated each time the slave decides that an image may be taken based upon array position. The logic-sequence circuit (54) is used to control the flow of data into and out of the A/D converter (40), buffer memory (59), and the internal data-bus buffer (60). By combining longitudinal-axis information (POS) with transverse-axis information (VW) indicating a valid array window and clock sources, this logic controls the presentation of data to the final, external data buffer (63). The data clock DSB transverse enable (TE) and longitude enable (LED) interface signals are also generated by the circuit (54). The DSB signal is used to clock data into the host interface. The LED signal indicates that a scan is in progress while the TE signal indicates that an image slice is being scanned. The decoder circuit (67) is a comparator which monitors the pixel count address (23) to decide when to issue the array-restart and video DC-restore signals. The 1728 jumper (69) notifies the circuit of the array type currently in the camera. The address-counter circuit (22) consists primarily of counter circuitry whose output is incremented synchronously with each pixel's video signal. The address output (23) is used by the compensation circuit's data storage (EPROM) to properly apply the correct compensation data to the corresponding pixel video. The address output (23) is also used by the window detector (24) to decide whether the currently-available pixel data occurs within the user-requested frame. If so, the VW signal is produced notifying the logic sequencer (54) of that fact. The window detector is given window definition data by the controller which is latched into the upper-limit latch (50) and lower-limit latch (52). The frame data is based upon the requested frame size by the user (in increments of 16 pixels) and is symmetrical about the array's center-of-scan position. The controller section consists of two, single-chip microcomputers, an Intel 8741H (master) and an Intel 8748H (slave). The main function of the master processor (20) is to interface to the user, accept and interpret commands, issue status, and issue commands to the slave processor. The master processor loads and latches the window data, controls the data clock source, and generates some of the interface signals as described. The slave processor (28) is primarily dedicated to the control of the array servo. It moves the array to desired positions, detects travel limits and, secondarily, runs the camera's self-diagnostics. Refering now to FIGURE 2A, the array is mounted on a carrier (16) which is, in turn, mounted in a slider frame. The carrier is moved along the longitudinal axis by a drive mechanism (17) driven by a motor (71). The motor armature shaft has an optical encoder disk (70) providing a two-channel quadrate signal pair (72) channel A and channel B, representing motor shaft position and, therefore, array position. These signals are used by the servo as the feedback element for velocity estimation. A position or negative phase relationship between the signal pair determines the arithmetic sign of that estimation. The servo loop performs in a bimodal form of operation. The controller will open the position-seeking servo loop when initiating an excursion and leave only the velocity closed loop intact. Then, following a velocity-position profile stored in memory in the slave microprocessor (28), the controller will command the servo to move the array to within 0.81 um of its final position. The controller monitors the array position by counting the digital representations of the quadrature signal pair and incrementing or decrementing its position count according to the same phase relationship used by the velocity loop itself. Upon reaching the 0.81 um position point, the controller closes the position-seeking servo loop. This now provides a detent position loop around the existing velocity loop. The controller commands a zero velocity to the inner loop and the servo now seeks an effective zero position at zero velocity. The position feedback element is provided by the channel A signal of the quadrature pair (72). The detent position is represented as this signal's 0.0 VDC crossover point. The advantage of a bimodal servo is one of high excursion rates at low position overshoot. If a position loop were always intact, the overshoot would commonly be greater than an entire 13 um image slice when making a multislice excursion. When controlling velocity, however, the controller reduces the commanded position excursion under the position loop influence and carefully controls position loop entrance velocity. Upon power-up, or commanded reset execution, the controller initially commands the servo to detent at its current position. Then, after restoring registers, setting default conditions, and performing all other initialization operations, the controller commands the array to move, under velocity control, slowly into the home-limit sensor area (74). This establishes a one-time reference position. The controller then moves the array away from the sensor toward the active frame region, counting position pulses as it moves. After completing this required offset excursion, the array is detented in its home position. In camera, therefore, the home position is accurate to within .81 um (1/16 of an image slice) and not prone to the home position nonrepeatabilities of prior art cameras. The user commands the camera to perform various functions via the bidirectional data bus (80) of the camera interface shown in FIGURE 2B. The camera interface may be attached to the host microprocessor (11) of FIGURE 1 by means of an Intel 8255A-5 Programmable Peripheral Interface (90), which is a general purpose programmable I/O device designed for use with microprocessors. When the BSY interface line is not active, the camera is in a listen mode and ready to receive commands. By placing command data (single or multibytes) on the data lines (80) and strobing the WR interface line, the user transmits to the controller its desired commands. The commands are listed and described below under the heading "Command Summary." If the data lines are held in a tri-state (high impedance) state, and the WR line is toggled, the camera interprets this as a command to scan according to currently-held default scan parameters. These default scan parameters are either the power-up parameters or the most recently commanded parameters. The WR line is used to latch all command and parameter data into the camera. (See timing diagram, FIGURE 8.) In order to retrieve the video data from the camera, the user monitors the interface differently depending on his mode of operation. If the user requested a free-scan mode, or multiscan incremental (more than one detented line) mode of operation, the data is sent in a parallel format (8 bits) without any clocking on the part of the user. As the data is valid on the data lines of the interface, the DSB clock line will toggle, clocking the digital image into the user's buffer. The BSY line is active during this operation. (See timing diagram, FIGURE 6.) If under the incremental mode (single line) and the camera's 2048 element buffer (60) is utilized, and the user may clock out the data, one byte at a time, as slowly as he wishes. This is performed by the user toggling the ECK clock input line. The user may also choose to have the camera clock out the data at a fixed 20 kHz rate, one image line at a time. (See timing diagram, FIGURE 7.) Command Summary 1. Scanning/Array Motion The currently-defined frame is digitized, from start position to end position. The maximum potential distance is 3200 scan lines, each line taken 13 microns apart. The pixel video data is clocked out to the user, one line at a time, at a rate of 500 kHz (optionally 2.0 mHz). The rate of array motion is defined by the maximum velocity parameter. A two-byte value (XX XX) is expected by the controller representing the desired position of the array. The first byte following the command code is expected to be the most significant byte of the desired position immediately without video scans occurring. Maximum "N" value is 3200 (decimal). The position (XX XX) is in a hexadecimal format. The optical image is scanned in a frame scan mode from the current array position to position "N" (XX XX), where the first byte following the command code is expected to be the most significant byte of the desired scan termination position. The maximum allowable "N" is 3200 (decimal). The position (XX XX) is in a hexadecimal format. D. Incremental Scan The transfer of each image line (size defined by window command) is separated by a time delay which varies according to the value of the delay-scaler parameter. The array is moved incrementally across the image and the data rate is 500 KHz (optionally 2.0 MHz) during a single image line scan. Each image line of data is clocked out of the video buffer by the internal controller. The buffer is filled as in the Automatic mode above, but the data rate is reduced to 20KHz during the image line scan. As each image line is incrementally scanned, and the associated data stored in the line buffer, the interface signal "OBR" is activated to notify the user that data is available. The user may then clock out the data using the "ECK" signal. The adjacent image line will not be scanned until the line buffer is empty, although the array will be in the adjacent image line position. 2. Parameter Modification The frame scan start position is modified with the most significant byte of the new starting location immediately following the command code. The maximum allowable value is 3200 (decimal). The position (XX XX) is in a hexadecimal format. The frame scan end position is modified with the most significant byte of the new ending location immediately following the command code. The maximum allowable value is 3200 (decimal). The position (XX XX) is in a hexadecimal format. The window height is defined as the byte following the command code (times 16). The window is symmetrical about the center of the transverse axis. The scan velocity of the array is modified to the data byte following the command code. This feature is designed to give limited, frame scan control over the rate at which image lines are digitized. The allowable range is from 6 to 16 (decimal). If further speed reductions are required, use of the incremental scan modes is recommended. The speed data (XX) is expected in a hexadecimal format. The upper boundary of the Window frame is defined as the 2 bytes following the command code (times 8). The maximum allowable value is determined by the array size (1728 or 2048). The lower boundary of the window frame is defined as the 2 bytes following the command code (times 8). The maximum allowable value is determined by the array size (1728 or 2048). NOTE: When the upper boundary entry is less than the defined lower boundary, they will be exchanged with one another by the controller. If the upper = the lower, a soft error will be signaled. The time delay parameter for the incremental scan modes is modified. Each of the possible 255 data values represent a 1900 microsecond giving a maximum delay of 484 milliseconds. 3. Parameter Read Operations Two bytes of data, representing the current start-of-frame position, are transmitted, one byte at a time, most significant byte first. Two Bytes of data, representing the current end-of-frame position, are transmitted, one byte at a time, most significant byte first. Two bytes of data, representing the current, window size (divided by 8), are transmitted one byte at a time, most significant byte first. Two bytes of data, representing the current upper boundary (divided by 8) are transmitted one byte at a time, most significant byte first. Two bytes of data, representing the current upper boundary (divided by 8), are transmitted one byte at a time, most significant byte first. A single byte of data, representing the current, maximum scan velocity is transmitted. The time delay parameter for the incremental scan modes is transmitted as a single byte (0-255) with each value in units of 1900 microseconds. The following is a description of the camera interface. Focus/Illumination Indicator The camera provides a visual indicator of both illumination and contrast. The illumination feature allows the operator to easily adjust the lens aperture setting (f-stop) for his particular environment. This is accomplished by using the camera interface commands to position the array at the center of the image plane. Then, with the function select switch set to ILLUMN and by manipulating the lens aperture setting, the operator can select the aperture setting and not saturate the video electronics in the camera. The illumination level used for this function is linearly proportional to the light intensity (peak) falling on the photodiode array at the measurement position and will have been compensated for linear pixel response. The focusing operation is accomplished in a similar manner with the select switch positioned at to FOCUS. By manually adjusting the lens focus, a peak in the plus direction will indicate highest contrast and, therefore, optimum focus. The focus and illumination circuits are free-running, and, therefore, always updated during camera operation. The saturation LED is lit during any scan in which a video saturation condition is detected. The data from the camera will not be interrupted or altered under this condition. A camera restore or new scan command at the electrical interface will reset this indication. Single-Bit Threshold The camera has a single-bit video circuit. The single-bit decision is performed by an analog comparator circuit operating on fully-compensated video signals. The camera controller is capable of manipulating the video threshold for this feature, and, therefore, the single-bit decision point (black/white edge) is commandable via the standard camera interface and command structure. The six bits of threshold adjust gives a 9-984.4-foot lambert range in 15.6-foot lambert increments. Master Microprocessor Program Flow The Intel 8741 manufactured by Intel Corporation, Santa Clara, California, shown in FIGURE 2, is the interface between the host processor which may, for example, be a TMS-9900 manufactured by Texas Instruments, Houston, Texas, and the slave microprocessor (28), an Intel 8748. The 8741 has the responsibility of setting the window size, initializing the window to the maximum size, and receiving commands from the host and any data (such as starting position, ending position of the frame) and sending that data to the 8748. The following registers and ports are in the 8741: Refer now to FIGURES 4A-4L which comprise a flowchart of the microprogramming for the master 8741 microprocessor shown in FIGURES 1 and 2. First (FIGURE 4A) the microcode in the 8741 initializes registers R1-R6, and initializes the window (302). The microcode then starts the command-processing routine (304). The microprocessor sets the busy bit 5 and the OBR bit 7 to zero (306). Next the data-bus buffer (DBB) is checked to see if it is full (308). If yes, the command is received and stored (310) and the busy bit is set to one (312). A table of commands is stored in the 8741. The table pointer (314) is initialized and a subloop is entered which tests for end of table (316). If yes, the program returns to the start of the command-processing routine (304). If no, it is not the end of the table, and a check is made to see if a match is found in the table (318). If no, the table pointer is updated (320) and the loop is entered again. When a match is found, the microcode goes to process the command found at the matched table entry (322). At this point the microcode also loads data from the host processor into the 8741 and, depending upon the particular command being executed, sends the appropriate commands and data to the 8748 slave processor. Referring now to FIGURE 4B, the load command for loading data from the host to the data-bus buffer (DBB) will now be described. Data are transferred between the 8741 and the 8748 by loading the DBB register and setting the Listen Line (port bit 6) to one, and then resetting the Listen Line to zero when the DBB is emptied. Listen is connected to the T-0 pin of both the 8741 and the 8748. By testing the state of pin T0 on the 8748, the 8748 microprocessor knows whether the 8741 has a command or data for transfer to it. First the 8741 gets data from the host and loads it into the DBB (330). Next the 8741 assembles the 8748 load command (332), then sends the command to the 8748 (334) followed by the data (336). The flow then returns to the command processing routine (304-FIGURE 4A) to process the next command. Referring now to FIGURES 4C-I, the parameter modification commands for changing the window size and speed of the array will now be described. In FIGURE 4C, the Set Upper Window Boundry and in FIGURE 4D, the Set Lower Window Boundry commands are executed to get the appropriate parameters. Each of these command program flows call the Get W subroutine of FIGURE 4E. The Get W subroutine calls the subroutines TSTRANGE, FIGURE 4G, CMPRWN, FIGURE 4I, WINSIZ, FIGURE 4H, and WNDWNG, FIGURE 4J before returning to the start point (304) of FIGURE 4A. In FIGURE 4F, the Set Window Size command is executed to get the appropriate parameters to change the window height. The command program flow calls the subroutines TSTRANGE, FIGURE 4G, WINSIZ, FIGURE 4H, and WNDWNG, FIGURE 4I before returning to the start point (304) of FIGURE 4A. The WNDWNG subroutine (400) is shown in FIGURE 4J. First a new window top value is received from the host processor (402). Once the top window address has been received, the up-window subroutine (410) is entered. The upwind subroutine first sets the upwind bit on the 8741 port to zero (412), sends the address (414), and then sets the up-window bit to one (416) and returns to the main program stream. The next step in the program is to get a new window bottom value from the host processor (418). Once the bottom window address has been received, the down-window subroutine (422) is entered. The downwind subroutine sets the downwind bit on the 8741 port to zero (424), sends the address (426), and then sets the downwind port to one (428). The subroutine returns to the main flow where the next step is to set the Select Window address (430) and enter the selwind subroutine (432). The selwind subroutine makes sure that the address clock is being accessed by the processor rather than by the hardware by setting of the Clock Select Bit to one (436). The select window bit is set to one (438), the address is sent (440), and after being sent, the Read Clock is set to zero (442). Then the Read Clock is set to one, the Select Window is set to zero, and the Clock Select is set back to zero (440). The selwind subroutine returns to the main flow, which returns to the program flow of FIGURE 4A to decode the next command. The parameter read operation commands are shown in FIGURES 4K-4L. The Read Start Position is done by the READTOP subroutine. The Read End Position is done by the READBOT subroutine. The Read Window Size is done by the READ 3 subroutine. All three subroutines call the PUTW subroutine of FIGURE 4L. Slave Microprocessor Program Flow The following registers and ports are found in the 8748: Refer to FIGURES 5A-5P which are flowcharts of microprogramming for the Intel 8748 slave microprocessor (28) shown in FIGURES 1 and 2. The programming for the 8748 proceeds from an initializing procedure (500-FIGURE 5A) which initializes ports, registers, and flags (502) and moves the array to the start position (504). To move the array to the start position, a TSTSRVO subroutine (506), shown in FIGURE 5P, is entered. The TSTSRVO subroutine of FIGURE 5P, initially moves the array (670) until it reaches the home limit sensor position (the home limit sensor-17, FIGURE 1), then moves the array to an offset position, and detents the array (672) at this electronic home position, the start of frame position. To do this, the TSTSRVO subroutine calls the CNTLN subroutine (674) of FIGURE 50 which counts 4 tach pulses to increment the array a predetermined offset from the home limit sensor position. Subsequent operations will return the array to this offset position rather than to the home limit sensor position. The electronic offset position is more accurate than the mechanical home limit position. After this is accomplished, the TSTSRVO subroutine returns to the flow of FIGURE 5A and the program enters a command processing routine (508) to do a decoded command. The command processing routine (508) is identical to the command processing routine of the 8741 described previously with reference to FIGURE 4A. Referring now to FIGURE 5B, a decoded Seek Position N command is executed as follows. This command is given by the host which desires to have the array moved to a given position, N. In this case, the 8741 transmits the address of position N to the 8748, which comprises two bytes of data. The high byte is transferred first (512), followed by the low byte (516). The microcode sets the No Video flag (520) and then calls the SEEK N subroutine to position the array at position N (522). First, the SEEK N subroutine gets the distance and direction (526) by entering the DSTDIR subroutine (528). This DSTDIR subroutine compares the present position (P) to the desired position (N) and depending upon whether the result is less than, greater than, or equal, determines if the direction should be reverse, forward, or none. A check is then made to see if the distance is zero (530). If yes, a test is made to see if video is enabled (531). If video is enabled, a single slice of data is scanned (533), before the SEEK N subroutine returns to the main program (532). If the distance is not equal to zero, the array is set into motion (534) by entering the ARAYGO subroutine (536). Referring now to FIGURE 5C, the ARAYGO subroutine has the responsibility of initializing the Velocity Table pointer and getting the proper velocity value (538). If the array is at a distance of less than 64 lines (542), then the array is near the end of the move, and the microcode has to access the Velocity Profile Table (544) which is a table of different velocities at different distances to provide for an even deceleration. If the distance is greater than 64 lines, then a constant high velocity is used to move the array (546) until it reaches the deceleration area. Next, the direction is tested (548), and if it is to be reverse, the microcode sets reverse (560), and if it is to be forward, the bit is set to forward (564). Next, the program starts the timer, and initializes the tachometer/line counter (566). Port 1 on the 8748 has five velocity bits (0-4), a disable bit, a direction bit, and a detent bit. The appropriate bits are set and outputted to the motor and controls logic shown in FIGURE 2A to start the array in motion. There are four tack interrupts per line. The tachs/line counter is initialized (566). The velocity from the velocity table is sent (568), and the microcode waits until the Tack B line goes low. Next, the video bit is sampled (570) and if enabled, the microcode toggles the longitudinal Access Gate Enable (572), which is a signal to the hardware that the data from the array can be clocked out by means of the video sync circuit shown in FIGURE 2. The subroutine then returns to the Seek N subroutine (524) of FIGURE 5B. The next step in the SEEK N subroutine is wait for detent (574) which enters a DTEST subroutine (576) which tests for movement of the array to stop. Referring now to FIGURE 5D, the DTEST subroutine (576) is based on the state of Tack A (blocks 578 and 586) and the direction (block 584). If tach. A is not zero, the flow tests the detent bit 7 on port 1 of the 8748. If detent is not one, the flow returns to the SEEKN routine to wait for detent (574, FIGURE 5B). If detent is one, the flow returns to the DTEST routine. The DTEST subroutine calls the External Interrupt EXTINT subroutine (590). Referring now to FIGURE 5E, the EXTINT subroutine first reinitializes the timer/counter so that the program does not timeout prematurely, saves the accumulator contents (594), and depending upon the direction (596), waits for Tack B to reach a certain point so that the same interrupt is not utilized over and over. Then, if the array has moved four pulses, as indicated by the line distance being zero (602), the line distance is decremented (604). Depending upon direction (606), the array position is either decremented (608) or incremented (610). Also a test is made to see if the array is at either limit, zero at one end, or 2560 at the other end. If video is enabled (612) on every line, the longitudinal Access Gate Enable line is toggled (614) to gate the video data out of the array. Next, a test is made to see if the array is in the Velocity Profile Table area (618) which is the last 64 lines of distance to be traveled by the array. If yes, a test is made to see if there are more tack pulses at the present velocity (622). If no, a test is made to see if the Velocity Table Pointer is equal to zero (626). If yes, the Tach A pulses are stopped by entering the STOP A subroutine (628), described below. If the Velocity Table Pointer is not equal to zero (626), the microcode updates the Table Pointer (644) and gets a new velocity and its tack pulse life (646). The MAX subroutine, FIGURE 5M, is called, which compares the new velocity with the maximum desired velocity. Referring to FIGURE 5M, if video is not enabled (700), return is immediate. On entering the MAX subroutine, A contains the table velocity (complemented), and R4 of register bank 1 contains the desired maximum velocity (uncomplemented). Referring again to FIGURE 5G, after completing the MAX subroutine, a new velocity value is sent (654). If going forward (658) then it is necessary to phase Tack A high (660) in order to eliminate the possibility of using the same interrupt more than once. The EXTINT subroutine now returns to the DTEST SUBROUTINE, FIGURE 5D. If any of the stop conditions occur, that is, if the array travels to the end of its limit (609, 611, FIGURE 5F), or if it is the end of the Velocity Profile Table (626, FIGURE 5F), then the STOP A routine (628) is entered. Referring to FIGURE 5G, first, the timer/counter is stopped (630) and then the array is stopped by sending bit 0-zero velocity and bit 7-detent (636). If the video bit had been set (638), one last longitudinal Access Gate Enable pulse is generated, and bit 3-FEN is set to zero (640). Frame Enable (FEN) would have been set high if bit 5-video had been set (570), to cause the hardware to output data. Referring now to FIGURES 5H and 5I, an Incremental Scan command is executed as follows. First, Position N is made equal to the start of the frame (702) and bit 5-video is set to no-video (704). Next, the array is positioned at the start of the frame (706) by calling the Seek N subroutine (524) discussed previously with reference to FIGURE 5B. Using the End-of-Frame, the distance to the end is calculated (710) by calling the FDST subroutine (712). Next bit 3-FEN is set high (714). The counter for the number of Tack Pulse Interrupts is next set to three (720) and the forward velocity is sent (722). The flow contiues at FIGURE 5I. Every fourth interrupt is a line, so three interrupts are counted. Every time Tack A goes to zero (726), Tack B is phased high and low (728) so that the microcode does not reuse the same Tack A Interrupt. The counter is then decremented by one (732). If the counter equals zero (734), the microcode phases Tack B high (736), and the array is stopped by issuing detent and zero velocity (740). Next, the distance is decremented (742). If the distance is not equal to zero (744), a wait loop is entered (746) and then the increment routine (716) is entered again. This program loop continues until the distance is equal to zero at which time the end of scan is signaled to the 8741 (748) and bit 3-FEN (Frame-Enable bit) is set low (752). The flow returns to FIGURE 1A, to do the command processing routine (508) to get the next command. The execution of a frame command is shown in FIGURE 5J. First, position N is defined as the start position (802), the video enable bit is set to no-video (810), and a SEEK N is commanded (812). Second, position N is defined as the end position (814), the video enable bit is set to yes-video (818), and a SEEK N is again commanded (820). Finnaly, position N is defined once again as the start position (824), the video enable bit is set to no-video (828), and a SEEK N is commanded (830). This has the effect of rewinding the array carrier back to the start of frame position. The 8741 is then alerted to the fact that the frame scan is finished (832) so that it may then drop the BUSY signal, and await further communication from the host (834). A single line is scanned by issuing a frame scan command (FIGURE 5J) wherein the starting line is equal to the ending line.

Claims: An apparatus including an array (34) of the type in which light-sensitive devices are scanned in accordance with a self-scanning cycle to provide information within a scanned image in the form of a train of output pulses (13) proportional in magnitude to the light intensity falling upon each successively scanned light-sensitive device; means (12; 17, 71) for moving said array (34) in the image focal plane of a lens to thereby scan the image of an object focused at said image focal plane of said lens: and, first means (20, 28) for receiving a command (14) from a computer (11) characterized in that said command including mechanical positional parameters (17) defining the movement of said array (34) along a path in said image focal plane and electronic scan parameters (18) relating to the electronic scanning of said light-sensitive devices of said array (34); said first means (20, 28) including means (20) for decoding said command to produce first and second decoded command signals, said positional parameters in said command being qualified by said first decoded command signals and said electronic scan parameters in said command being qualified by said second decoded command signals; and said array (34) is mechanically positioned by second means (17, 71, 16) in accordance with said positional parameters in said command as qualified by said first decoded command signals; and, further in that third means (50, 52, 24, 54, 35,) are provided connected (via W0-W7) to said first means (20, 28) and to said array (34), responsive to said second decoded command signals (W0-W7) for selectively gating to an output (Video Data Bus DB0-DB7) a particular set of successive pulses (13) in said train or output pulses from said array (34) in accordance with said electronic scan parameters in said command as qualified by said second decoded command signals. The apparatus in accordance with Claim 1 characterized in that said electronic scan parameters in said command provide information as to a user selected frame size scan output of said array; further in that said third means (50, 52, 24, 54, 35,) includes an address counter (22) for generating addresses in response to successive output pulses in said train of output pulses from said array; and, further in that said third means (50, 52, 24, 54, 35,) includes a window detector (24) and logic PAL (54) connected to said window detector (24); said logic PAL (54) generating a gating signal (SAD) upon the condition that said window detector (24) determines that an output pulse as represented by an address output from said address counter (22) is within the user selected frame size specified in said electronic scan parameters in said command. The apparatus of Claim 1 or claim 2 characterized in that said positional parameters in said command provide information as to a user selected mechanical position of said array; further in that said means (12; 17, 71) for moving said array (34) includes a position indicator (70, 72) generating position representations indicative of the physical position of said array; and, further in that said means (12; 17, 71) for moving said array (34) includes a servo loop (LM 2918) for detenting said array upon the condition that a currently available position representation corresponds to said user selected mechanical position of said array specified in said positional parameters in said command. The apparatus in accordance with Claim 1 or Claim 2 characterized in that said positional parameters in said command specify the movement of said array (34) to a first image line; further in that a first interface line (OBR) is provided; a second interface line (ECK) is provided; a buffer memory (59) is connected to said output (Video Data Bus DB0-DB7) for receiving said particular set of successive pulses in said train of output pulses from said array, said pulses comprising first data corresponding to said first image line; means are provided for activating said first interface line (OBR) to notify said user that said first data in said buffer (59) is available, further in that clock select means (32) are provided responsive to energization of said second interface line (ECK) for causing second data corresponding to a second image line adjacent to said first image line to be transferred to said buffer (59). The apparatus of Claim 1 or claim 2 characterized in that said command includes a delay scaler parameter (Set Delay Scaler) and wherein said positional parameters in said command specify the movement of said array (34) to a first image line; further in that a control line (SCK) is provided from said means (20); and. a buffer memory (59) is connected to said output (Video Data Bus DB0-DB7) for receiving said particular set of successive pulses in said train of output pulses from said array, said pulses comprising first data corresponding to said first image line; said third means including clock select means (32) responsive to energization of said control line (SCK) for causing second data corresponding to a second image line adjacent to said first image line to be transferred to said buffer; said control line (SCK) being energized after the expiration of a time delay which varies according to the value of said delay-scaler parameter within said command. The apparatus of Claim 1 characterized in that said array (34) is equipped with a home limit sensor (74) to sense that said array is in a home limit sensor area corresponding to a mechanical limit in said image plane, further in that said positional parameters in said command provide information to command said array to move to a predetermined offset home limit mechanical position of said array, further in that a position indicator (70, 72) is provided for generating position representations in response to the physical position of said array, and, in that a servo loop (LM2918) is provided for detenting said array upon the condition that a currently available position representation corresponds to a selected mechanical position of said array specified by said decoded command signals; means for commanding said servo to detent at its current position; means (502,) for performing initializing operations while said servo is detented at said current position; means (506, TST SRVO) causing said array to move to said home limit sensor area to thereby establish a mechanical limit-stop reference position; and, means (504) causing said array to move from said limit-stop reference position to said offset home position as indicated by a predetermined position representation of said position indicator. The apparatus of Claim 1 characterized in that said first means includes a master microprocessor (20) and a slave microprocessor (28) subject to control by said master microprocessor (20), further in that a position indicator (70, 72) is provided for generating position representations in response to the physical position of said array, and, in that a servo loop (LM2918) is provided for detenting said array upon the condition that a currently available position representation corresponds to said user selected mechanical position of said array specified in said command; further in that said electronic scan parameters in said command provide information as to a user selected frame size scan output of said array; and, further in that said third means comprises an address counter (22) for generating addresses (A0-A10) in response to at least one pulse in said train of output pulses (13) from said array, and a window detector (24) for outputting said train of output pulses upon the condition that a currently addressed output pulse occurs within said user selected frame size specified in said command. A method for scanning an object comprising the steps of: (a) focusing the object to be scanned at the image focal plane of an imaging lens; (b) moving an array (34) of light-sensitive devices in the image focal plane of said lens, such that light from the object focused at said image focal plane falls upon said light-sensitive devices, to thereby scan said image thereby generating a train of output pulses (13) from said array; characterized by: (c) decoding a command (14) received from a Computer (11), which includes mechanical positional parameters (17) defining the movement of said array (34) along a path in said image focal plane and electronic scan parameters (18) relating to the electronic scanning of said light sensitive devices of said array (34), whereby first and second decoded command signals are produced, said positional parameters in said command being qualified by said first decoded command signals and said electronic scan parameters (18) in said command being qualified by said second decoded command signals; (d) mechanically positioning said array (34) in accordance with said positional parameters (17) in said command as qualified by said first decoded command signals ; and (e) utilizing the output of said array at sequential position intervals of said array (34) with respect to the relative position of said array in the image focal plane of said lens by selectively gating a particular set of successive pulses (13) in said train of output pulses from said array (34) in accordance with said electronic scan parameters in said command as qualified by said second decoded command signals. The method of Claim 8 characterized in that said electronic scan parameters (18) in said command (14) provide information as to a user selected frame size scan output of said array (34), said method further characterized in that: (f) addresses (23) are generated in response to pulses (13) in said train of output pulses from said array; and, (g) said train of output pulses is outputted upon the condition that a currently addressed output pulse occurs within a user selected frame size specified in said command. The method of Claim 8 or Claim 9 characterized in that said positional parameters (17) in said command (14) provide information as to a user selected mechanical position of said array (34), said method further characterized in that: (h) position representations are generated in response to the physical position of said array (34); and, (i) said array is detented upon the condition that a currently available position representation corresponds to a user-selected mechanical position of said array specified in said command. The method of Claim 8 or Claim 9 characterized in that said command provides information as to a user commanded reset of said array (34), said method further characterized in that: (h) said array (34) is detented at its current position; (i) initializing operations are performed while said array is detented at said current position; (j) said array (34) is moved to a home limit sensor area to thereby establish a mechanical limit-stop reference position; and, (k) said array is moved from said limit-stop reference position to an offset home position as indicated by a predetermined position representation of said position indicator. The method of Claim 8 or Claim 9 characterized in that said positional parameters (17) in said command (14) provide information as to a user selected mechanical position of said array (34), said method further characterized in that: (h) said array (34) is incrementally moved to a first image line; (i) said first image line is scanned to produce first data; (j) said first data is stored in a buffer (59); (k) an interface line (OBR) is activated to notify said user that said first data in said buffer is available; (l) said array (34) is moved to a second image line; and, (m) said second image line is caused to be scanned upon the condition that said buffer (59) is empty. The method of Claim 8 or Claim 9 characterized in that said positional parameters (17) in said command (14) provide information as to a user selected mechanical position of said array (34), said method further characterized in that: (h) said array (34) is incrementally moved to a first image line; (i) said first image line is scanned to produce first data; (j) said array is moved to a second image line; and, (k) said second image line is caused to be scanned after the expiration of a time delay which varies according to the value of a delay-scaler parameter within said command.

Inventors: HEBARD, ELAINE, RUMLEY, STUART D., SCHNEIDER, ERIC C.
Applicants: DATACOPY CORPORATION
Application year: 1984
Main classification: G06F3
IPC codes: G06F3, H04N1, G06K11, B41J2, G06T1