METHOD OF MEASURING THE D.C. LEVEL OF THE OUTPUT OF AN A.C.-TO-D.C. POWER CONVERTER

Abstract: A method of measuring the d.c. level in the output of an a.c.-to-d.c. power converter provides the accurate measure­ ment result with a minimal time lag for the measurement and without the need of changing the operating parameters de­ pending on each ripple frequency by the averaging process for the ripple component included in the d.c. output over certain periods of the input power frequency.

Description: METHOD OF MEASURING THE D.C. LEVEL OF THE OUTPUT OF AN A.C.-TO-D.C. POWER CONVERTER BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a method of measuring the magnitude of the d.c. output of an electric power converter and, more particularly, to a method of measuring the d.c. level of the a.c.-to-d.c. power converter output which includes a ripple component related to the input a.c. power frequency. Description of the Prior Art The output of an a.c.-to-d.c. power converter, such as a thyristor converter, includes a ripple component in the operating frequency of the switching elements such as thyristors, and therefore, a smoothing process is required for the detected d.c. output in order to eliminate the ripple component. Analog filters and digital filters are known as means for smoothing the d.c. output signal. However, such analog filter generally have a large time constant with respect to the ripple frequency, and therefore, it is difficult for the filter output to accomplish a high response control system for the converter. On the other hand, digital filters have a shortcoming that their operating parameters need to be set in accordance with each ripple frequency. SUMMARY OF THE INVENTION It is an object of the present invention to overcome the foregoing prior art deficiencies and provide an improved method of measuring the d.c. level in the output of a power converter. Another object of the invention is to provide a method of measuring the d.c. level of the output of a power converter, capable of accomplishing a high response control system by virture of a small time lag for the measurement. Further object of the present invention is to provide a method of measuring the d.c. level, capable of measuring accurately the d.c. output level of a power converter. Other objects and advantages of the present invention will be more apparent from the following detailed description taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of the thyristor converter to which the present invention is applied; Fig. 2 is a set of waveform diagrams used to explain the measuring method according to the present invention; Fig. 3 is a block diagram showing the measuring circuit for carrying out the method shown in Fig. 2; and Figs. 4 and 5 are flowcharts explaining the inventive measuring method. DESCRIPTION OF THE PREFERRED EMBODIMENT The present invention will now be described by way of embodiment with reference to the drawings. The thyristor converter system shown in the schematic diagram of Fig. 1 includes a thyristor converter 1, a 3-phase alternating power source 2 providing the input power to the converter 1, a load 3 to which the d.c. output of the converter 1 is supplied, a detector 20 for measuring the load current I on the a.c. input side of the converter 1, and a rectifying circuit 21 incorporated in the detector 20. The voltage V and current I on the load 3 include ripple components related to the frequency of the 3-phase a.c. power source 2 as shown by respective waveforms (a) and (b) in Fig. 2. In Fig. 3 showing in block form one embodiment of the present invention, the measuring circuit includes a controller 4 incorporating a computational device such as a microprocessor, a multiplexer for selecting one of analog signals representing the output voltage V and current I, an analog-to-digital (A/D) converter 6 for converting the analog signal selected by the multiplexer 5 into digital data to be supplied to the controller 4, and a phase locked loop (PLL) circuit 8. The controller 4 determines the firing phase of each thyristor to control the output voltage V and current I, and the PLL circuit 8 receives a signal 7 derived from one phase of the 3-phase a.c power source 2 shown in Fig. 1 and provides pulses originating from the signal 7 with a multiplied frequency and carrying frequency information on the 3-phase a.c. power source 2 to be delivered to the controller 4 as periodic interrupt signals. The operation of the measuring circuit shown in Fig. 3 will be described. An arbitrary phase of the 3-phase voltage of the input power source 2 is supplied in the form of the signal 7 to the PLL circuit 8. The PLL circuit 8 responds to the signal 7 in a frequency of f to produce synchronized pulses 9 at a frequency of 6Nf (N is an integer equal to or larger than 1). The role of the PLL circuit 8 is to produce pulses 9 at a frequency which is a multiple of the ripple frequency 6f included in the output voltage and current of the thyristor converter 1. The following describes the case of N=4 as an example, and the generated pulses 9 are shown by (c) in Fig. 2. The controller 4 normally operates for the control of the thyristor converter 1, and when receiving a pulse 9 from the PLL circuit 8 it proceeds to the preprogrammed interrupt operation shown by the flowchart of Fig. 4, then returns to the original control process upon completion of the interrupt program. In the interrupt operation caused by the pulse 9, the controller 4 stores voltage or current data in the form of a binary digital signal in the memory within the controller 4. Generally, latest four pieces of data stored for each input signal 7 suffice for the following process (at least four data sampled over the period of the signal 7 suffice to provide the mean value of the output voltage or current). For example, at time point tA of Fig. 2, voltage data V1, V2, V3 and V4, and current data 11, I2, I3 and I4 are memorized. In a subsequent time point tg, voltage data V2, V3, V4 and V5, and current data I2, I3, I4 and IS are memorized. The controller 4 sums the each set of four latest data and divides the results by four respectively to obtain the respective mean values. The resultant values represent the mean values of the magnitudes with respect to a reference level over a period of the voltage V and current I, and therefore, the ripple components are removed from the voltage and current levels. The controller 4 carries out the sampling process 31 and averaging process 34 as shown in the flowchart of Fig. 4 each time it receives a pulse 9, and the mean values are used as data for the control of the thyristor converter 1. In case of larger number (N) of samples is used or a more variety of signals need to be treated, that requires a longer time for the process of summation 32, the sum of N data may be provided in such a way as shown by 42 of Fig. 5 that one oldest data is removed from the previous sum for N data and one newly sampled data is added to form the latest sum for N pieces of data. Alternatively, by choosing the value of N as N=2n (n=l, 2, ...), the division process 33 or 34 can be substituted by the truncation of the lowest n bits of the sum produced by the process 33 or 43. For dealing with a variety of signals, they may be sampled through the multiplexer 5 (Fig. 3) and processed as shown in Fig. 4 or 5 on a sequential basis, or the signals may be sampled at one time and thereafter processed sequentially. The foregoing sampling, summing and averaging processes may be carried out by a dedicated processor provided separately from the thyristor converter controller. By the provision of the sampled data memory with a capacity larger than N, a series of data for each signal in a time domain can be recorded and updated at a certain interval. Reading out of such data can reproduce approximate waveforms of the actual power output, allowing a historical record of the operation. In the occurrence of a failure of the thyristor converter, troubleshooting is facilitated by halting the data sampling operation and analyzing data stored in the memory. According to the present invention, as described above, the mean value of the d.c. output of a power converter can be obtained in a time lag smaller than the period of the input a.c. power frequency and without being affected by the ripple component. Even if the input power frequency varies, the use of the PLL circuit maintains the interrupt signal synchronized with the ripple frequency, and thus the control system is immune to the power frequency variation. In addition, the inventive method readily provides operational and diagnostic data for the power converter system.

Claims: WHAT IS CLAIMED IS: 1. A method of measuring the direct current (d.c.) level in a d.c. output of an electric power converter, said d.c. output including a ripple component related to the frequency of an alternating (a.c.) power supply to said converter, wherein said method comprises the steps of sampling said d.c. output in synchronism with said ripple component at a frequency which is a multiple of a fundamental frequency of said ripple component, converting sampled d.c. values into digital data, and calculating a mean value of a plurality of said digital data in a digital manner thereby to evaluate said d.c. level in said d.c. output. 2. A method according to claim 1, wherein said step of calculating a mean value comprises a step of calculating said mean value from a plurality of said digital data representing said d.c. output over at least one period of said ripple component. 3. A method according to claim 1, wherein said step of sampling said d.c. output takes place in response to an output signal of a phase locked loop (PLL) circuit which operates at the frequency of said input a.c. power supply.

Inventors: KAWAI, JOJI C/O MITSUBISHI DENKI K.K.
Applicants: MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1984
Main classification: G01R19
IPC codes: H02M1, G01R19, H02H3, H02M7