TRANSCEIVER WITH CONTROLLER FOR MULTIPLE FUNCTION SWITCH

Abstract: In the transceiver, a multiple function switch decoder includes means (135) for detecting actuation of the switch (120) and means for monitoring the status of the receiver (69). A timer (230) responsive to the monitoring means and detecting means establishes a pre-determined time interval following each switch actuation or each received message of predetermined type. When the switch is actuated during the time interval the transmitter (80) is enabled. When the switch is activated outside the time interval the receiver audio is activated so the user may monitor the channel. During the first switch actuation in any given time interval an encoder (100) is enabled. On subsequent switch actuations during the same time interval the encoder is inhibited. This allows a single switch to perform a plurality of transmitter and receiver functions.

Description: TRANSCEIVER WITH CONTROLLER FOR MULTIPLE FUNCTION SWITCH Background of the Invention 1. Field of the Invention This invention relates generally to the field of control circuits for electronic equipment. More particularly, this invention relates to a con¬ troller which permits a single switch to perform a plurality of transceiver functions which may be dependent upon the status of the receiver or the transmitter, or the recent actuation history of the switch itself. 2. Background of the Invention As the state of the art in the electronic industry progresses, the trend is towards ever smaller electronic devices which must reliably per¬ form a variety of functions. An example of this trend may be- found in the field of electronic calcu¬ lators. While the predecessor of the modern pocket calculator literally occupied rooms, devices with similar computational power which will fit in a shirt pocket are now commonplace. Such devices often have control buttons which electronically address a number OMPI SUBSTITUTE SHE - 2 - of different features-per button in order to provide the user with a large number of features in a small package. This is accomplished by using a "second feature button" which is actuated prior to the actuation of a button which addresses a plurality of features. Therefore, in order for the user to address the features of his calculator, two button actuations are required to address a single feature. In the field of portable radio transceivers, there is a similar size reduction trend taking place. As the size of these devices diminishes, the number of control features incorporated in a single control switch must also increase in order for the user to control the additional electronic features incorpor¬ ated therein. This is particularly true for selective calling portable radio transceivers (radio transmitter/- receivers) such as those commonly used throughout Europe. In these systems the user is required by regulation to monitor his receiver prior to making any transmission to assure that there is no channel activity taking place on the communication channel he intends to use. Once the user establishes that the channel is free of activity, he must normally trans¬ mit a series of tones or a digitally encoded message in order to address the receiver or repeater he desires to contact. For example, in the well known ZVEI (Zen ral Verband der Elektro-Industrie) system commonly used in Germany, an address code consists of a sequence of five audio frequency tones between 1060Hz and 2600Hz which are consecutively trans¬ mitted. Each tone has a 70 millisecond duration with no pause between tones. Each tone represents a single digit 0-9 (or a repeat tone indicating that OMPI the preceeding digit is repeated) . Each user or repeater is assigned a five digit address • which must be correctly decoded to access that receiver or repeater. Encoding and decoding circuits for such systems are well known. Having established receiver or repeater access, the user is then free to carry on normal two way voice or data communications with another transceiver. One scheme often used to accomplish the above sequence of steps is to provide the portable trans¬ ceiver with three .switches. In operation, the user firsts actuates a "push-to-monitor" switch which enables the receiver section audio so that the user may determine if there is activity taking place on the desired radio frequency channel. When the channel is clear, the user actuates a second switch which transmits an appropriate code word in tones or binary digits, as for example, a set of five sequen¬ tial tones of predetermined length and frequency, to access the desired receiver. The user then actuates a third switch to enable his transmitter and micro¬ phone in order to carry on normal conversation. In the above transceiver scheme, a total of three switches are required to perform even the most basic selective calling transceiver functions. In addition to these controls, the transceiver must also include a volume control, an on/off switch, a squelch control, a channel selector control, and quite possibly many other controls such as a telephone style keypad for more sophisticated transceivers. It is evident that utilizing three separate switches simply to control the sequence of steps necessary for initialization of a conversation is highly inef¬ ficient. As these transceivers incorporate more and more features and options, the switch requirement OMFI ' - 4 - becomes a severe size limitation in a portable or mobile transceiver. Another scheme often used in portable trans¬ ceivers, such as Motorola's European version of its MX300 series of transceivers, utilizes a momentary push-to-talk type switch in conjunction with a three position toggle switch. This exemplifies the util¬ ization of a two switch requirement for the selection of any transceiver function. In this scheme a first position of the toggle switch places the radio receiver in a coded squelch mode. This makes the radio reciever responsive only to tone or digitally encoded messages bearing an appropriate user address code. The center position of the toggle switch places the receiver in the carrier squelch mode which allows the receiver to turn on its audio amplifier and speaker upon receipt of any message on the commu¬ nication channel without regard to coding. The third position of the toggle switch enables the transmitter and transmits the encoded message required to access a receiver or repeater. In operation, if the user wishes to initiate a call he switches the toggle switch from the coded squelch position to carrier squelch position in order to monitor the channel for activity by other users. He then moves the toggle switch to the encode mode to transmit an appropriate address code to access an appropriate receiver. The user may then utilizes his "push-to-talk" (PTT) switch in a normal manner as necessary to carry on the desired conversation. This system has the advantage of forcing the user to monitor the channel prior to transmitting the code to access a receiver since he has to pass through the carrier squelch position of the three position switch in order to initiate a call. After completing " the conversation, the user must switch his transceiver back to the coded squelch mode. Another two switch system is used in radios such as the GRUNDIG MODEL FK103. In this system α first switch turns ON the receiver audio so that the user may monitor the channel. Deactuation of the switch places the transceiver in a coded squelch mode. Actuation of the second switch while in the coded squelch mode reverts the receiver to carrier squelch and transmits the address code. All subsequent transmissions are without encoding and the first switch is actuated again to place the radio back in the coded squelch mode. Although these systems reduce the number of switches required to two, operation of the trans¬ ceiver with one hand can be quite awkward. They inefficiently utilize valuable transceiver controls to actuate only basic transceiver functions not to mention increasing their cost. Also, the user is required in each case to manually place the trans¬ ceiver back in a coded squelch mode after conver¬ sation has ended. Summary of the Invention It is an object of the present invention to pro¬ vide an improved controller for a multiple function switch. It is another object of the present invention to integrate a plurality of switching functions in a single switch for a transceiver. It is another object of the present invention to provide an efficient switch scheme for initiating communications with a portable transceiver in a selective calling communications system. It is another object of the present invention to provide a controller which allows a single switch to perform a plurality of functions in a portable trans¬ ceiver as a result of receiver conditions, trans¬ mitter conditions, and activity of the switch itself. It is a further object of the present invention to provide a controller for efficient utilization of switches in a miniature portable transceiver. In one embodiment of the present invention. A transceiver has a multiple function switch controller including a timer for a establishing a time interval. A first circuit produces a first control signal when the switch is actuated during the time interval, and a second circuit produces a second control signal when the switch is actuated outside the time interval. In another embodiment of the present invention, • a multiple function switch controller includes an apparatus for detecting the actuation of a switch and a circuit for monitoring the status of a communi- cation channel. A timer responsive to either the monitoring circuit or the switch detecting apparatus establishes a time interval. A transmitter enabling circuit enables the transmitter upon actuation of the switch during the time interval and an annunciation circuit annunciates the status of the communication channel upon actuation of the switch outside the time interval. In another embodiment of the present invention, a transceiver includes a multiple function switch controller having an apparatus for decoding a received signal having a predetermined address. A timer responsive to the decoder establishes a time interval following each received signal having a predetermined address. A first circuit responsive to the actuation of the switch produces a first control O signal if the switch is actuated during the time interval. A second circuit produces a second control signal if the switch is actuated outside the time interval. In another embodiment of the present invention, a transceiver has a multiple function switch control¬ ler including a circuit for detecting actuation of the switch and a decoder for decoding received signals of a predetermined type. A timer responsive to either the decoder or the switch detector circuit establishes a time interval following each decoding of a received message of a predetermined type. A controller circuit causes the switch to activate a first function if actuated during the time interval and a second function if actuated outside of the time interval. In another embodiment of the present invention, a method of controlling a multiple function switch includes the steps of providing a timer to establish time intervals, detecting .whether or not the timer's output is predetermined active, counting the number of switch actuations occu-ing while the output is a predetermined signal, enabling an encoder if the count equals a first predetermined count and inhib- iting the encoder if the count is equal to a second predetermined count. The features of the invention believed to be novel are set forth with particularity in the appended claims. The invention itself however, as to organization, method of use, and method of operation, together with further objects and advantages thereof, may be best understood by reference to the following description taken in conjunction with the accompa¬ nying drawings. OMP Brief Description of the Drawings FIG. 1 is a block diagram of a hardware imple¬ mentation of the present invention embodied in a transceiver. FIG. 2 is a detailed electrical schematic of a hardware embodiment of the controller portion of the present invention. FIG. 3 is a timing diagram of the conroller of FIG. 2. FIG. 4 is a system block diagram for a micro- computer implementation of the present invention embodied in a trasnceiver. FIG. 5 is a flow chart detailing the operation of the controller portion of the present invention. FIG. 6 is a combined functional block diagram and electrical schematic showing the hardware to utilize a preferred microprocessor embodiment of the present invention for FIG. 4. Description of the Preferred Embodiment Turning now to FIG. 1, a receiver 10 is coupled to an address decoder 20 and receives modulated coded information from a radio channel. An address decoder 20 examines that information to determine if the transceiver is being selectively addressed by an appropriately encoded transmission. An indication of a correctly encoded address is then provided to an input 25 of a switch controller 30 for processing. This information is also provided to a receiver audio circuit 40 so that voice information received after the detected coded address may be transferred to a speaker 50 in the preferred embodiment. Receiver 10 also provides a squelch circuit 60 with information, usually audio noise, for the purposes of determining whether or not there is an on channel signal, OMPI correctly encoded or not, being received by receiver 10. This squelch information is transferred by switch controller 30 at a controller input 65 where it may be processed and delivered to the receiver audio via an output 75. A transmitter 80 can receive inputs either from a microphone 90 or an address encoder 100, for modu¬ lation and transmission on the radio frequency commu¬ nication channel. It is understood by those skilled in the art that transmitter 80 as well as receiver 10 may be AM, FM, PM or any combination or variation thereof without loss of generality. In the preferred embodiment, a narrowband FM system is used. Transmitter 80 is enabled by a signal from switch controller 30 at a controller output 105. Switch controller 30 also determines when encoder 100 should generate an address code by providing encoder 100 with an enabling signal from a controller output 115. In the preferred embodiment a momentary switch 120 is normally grounded on one side. Actuation of the switch connects that side of the switch to a logic high in the form of a DC supply 130. The other side of switch 120 is coupled to an input 135 to switch controller 30. In operation, the system functions in the following manner. If the user desires to initiate a transmission, he first actuates switch 120. If switch controller 30 has received an indication of channel activity at its input 65, the receiver's audio is turned on by output 75 so that the user may hear that channel activity on speaker 50 thereby annunciating the channel status to the user. In the alternative, other ways of annunciating the channel status such as a visual display or light may be -'BU E OMPI SUBSTITUT ^ A- WIPO preferred in some cases. When the user has deter¬ mined that the channel is free of activity he actu¬ ates the same switch 120 for a second time. The second actuation must occur within a predetermined time interval established at deactuation of the first actuation of switch 120. Upon receiving the second switch actuation, switch controller 30 sends a control signal at output 115 enabling address encoder 100. It also sends a signal at output 105 actuating transmitter 80. Encoder 100 provides transmitter 80 with the address code, such as a ZVEI tone sequence, for the desired receiver and preferrably instructs transmitter 80 to mute any inputs from microphone 90 while the address is being encoded. Microphone 90 is muted at this time to prevent voices or noises entering the microphone from corrupting the encoder generated address. After the brief period of time required for the encoder 100 and transmitter 80 to send out the address, microphone 90 is unmuted and the user can begin his conversation. If the party being called responds within a predetermined period of time estab¬ lished by the last deactuation of the user's switch 120, he may do so in an uncoded transmission mode in the preferred embodiment. The present user's receiver will acknowledge receipt of that message by transferring voice information from receiver audio 40 to speaker 50. After receiving that transmission the user will typically respond with more voice information in a manual two-way conversation. This is accomplished by once again actuating switch 120 within a predetermined time interval established at the end of the received transmission as indicated by loss of radio frequency carrier. upon a third actuation of switch 120 within a predetermined time interval of receiving the last OMP SUBSTITUTE S IP message, a signal at output 105 once again enables transmitter 80 and voice transmission may once again occur. In one embodiment of the present invention, the user may select at his desσretion whether or not encoder 100 is actuated at such a time. This is the type of system option that may be useful in a number of communication systems. The system operates in a manner identical to its operation during the last reception and transmission on subsequent receptions and transmissions as long as they occur within the time interval established by the switch controller 30. In all cases of the preferred embodiment this time interval begins upon deactuation of switch 120 or the end of a received message. In the preferred embodiment this time interval is controlled by a pro¬ grammable timer which can be set anywhere from several milliseconds to several minutes. A time interval of approximately 7 seconds has been found to be convenient. If either the receiving or trans¬ mitting party fails to respond within the predeter¬ mined time interval, the transceiver automatically reverts back to the coded squelch mode. The next actuation of switch 120 causes the transceiver to operate as if it is the first actuation of switch 120 thereby restarting the operation sequence without the necessity of manual intervention by the user. If, rather than a user initiated transmission, a conversation is initiated by receipt of a properly encoded message, address decoder 20 provides switch controller 30 with a signal at input 25. This signal directs switch decoder 30 to enable transmitter 80 upon the first actuation of switch 120 and places the receiver in a non-coded squelch (carrier squelch) mode. The initial switch actuation which is SUBSTITUTE SH _ OMPI - 12 - necessary to prevent interference when initiating a call is by passed automatically when a conversation is initiated by receipt of a properly encoded mess¬ age. Since that initial actuation is carried out by the party initiating the call. Thus the controller operation is made dependent on both user initiated switch actuations and messages received from calling parties. If receiver 10 receives a transmission which is on a proper channel but does not possess an appro¬ priately encoded address, address decoder 20 will not respond and switch controller 30 will not turn on receiver audio 40. Actuation of switch 120 during the time that this improperly encoded signal is being received however, will cause the receiver audio 40 to turn on so that the user is alerted to the presence of an active or busy channel. The receiver audio therefore serves as an annunciation circuit in the preferred embodiment. It will be clear to those skilled in the art that other ways of alerting the user to the presence of channel activity are readily implemented. Turning now to FIG. 2 for one embodiment of switch controller 30, input 135 is coupled to one input of an OR gate 200 and one input of an AND gate 205. Input 25 is coupled to one input of an AND gate 210. The output of an AND gate 210 is coupled to a second input of an OR gate 200. The output of an OR gate 200 drives one input of an AND gate 215 and one input of an OR gate 220. Input 25 is also coupled to a second input of OR gate 220. The output of an OR gate 220 is coupled to a reset input 225 of a timer 230. An output 232 of timer 230 is coupled to the input of an inverter 235 and one input of an AND gate 240. The output of AND gate 240 is coupled to a third input of an OR gate 220. OMPI SUBSTITUTE SHEET WIPO The output of inverter 235 is coupled to the reset input 245 of a counter 250 and the output of AND gate 215 is coupled to a clock input 251 of counter 250. Counter 250 in this embodiment is pre- ferrably a commercially available Johnson counter with code converter having four digital outputs shown in FIG. 2 and designated 0, 1, 2, and 3 respectively and numbered 252, 253, 254 and 255, respectively in FIG. 2. However, it will be evident to those skilled in the art that many other types of counter circuits may be substituted for the Johnson counter of this embodiment. It is understood that counter 250 is reset upon power-up. That is, 1 0 0 0 appears at outputs 0, 1, 2, and 3 respectively upon initial power-up of con¬ troller 30. Also, it is understood that timer 230 is not timing upon power-up of the system. That is, when power is applied a logic zero appears at the output of timer 230. Although further circuitry which is not shown is required to establish such an initialization, addition of that circuitry is well known and will not add materially to the under¬ standing of the present invention. It will be evident to one skilled in the art that the design addition of that circuitry is readily accomplished. The output of inverter 235 is coupled to one input of an OR gate 256 and one input of an AND gate 210. A second input of an OR gate 256 is coupled to squelch input 65 and the input of an inverter 260. The output of inverter 260 drives a second input of AND gate 240. The output of OR gate 256 is the audio enable output 75 of decoder 30. Output 255 of counter 250 is coupled to one input of an OR gate 265 and to the input of an inverter 270. The output of inverter 270 is coupled to a second input of AND gate 215. Output 254 of SUBSTITUTE SHEET counter 250 is coupled to a second input of an OR gate 265. The output of OR gate 265 is coupled to a second input of AND gate 205. The output of AND gate 205 is the transmit enable output 105. Outputs 252 and 253 of counter 250 are not used in controller 30 but are shown here to complete the discription. Encoder enable output 115 is selectively coupled by a two position jumper or switch 280 to either counter output 254 (if switch 280 is in position A) or transmit enable output 105 (if switch 280 is in position B) . If switch 280 is in position A, the address encoder 100 of FIG. 1 will be operative only on the first actuation of switch 120 after the timer starts timing and subsequent transmissions will be unencoded. If switch 280 is in position B, the encoder will be enabled each time a transmission occurs during the timer interval (each time the transmitter is enabled) . FIG. 3 is a timing diagram of the circuit embod- iment of FIG. 2. Although outputs 252 and 253 of counter 250 are not utilized in the circuit of FIG. 2, they are included in timing diagram FIG. 3 for the purpose of illustrating the operation of the parti¬ cular type of Johnson counter used in this embod- iment. Commercially available Johnson counters such as the MC14022 counter produced by Motorola Inc. as well as other counters are entirely suitable for this application. Similarly, numerous timing circuits, such as analog one-shot type timers and clocked digital counter based circuits, to be used for timer 230 will occur to those skilled in the art. The timing diagrams of FIG. 3 includes FIGS. 3A through 3M wherein FIG. 3A represents the signal at switch input 135, FIG. 3B represents the signal present at the reset input 225 of timer 230 and FIG. 3C represents the signal present at the output 232 of timer 230. FIGS. 3D, 3E, 3F and 3G respectively represent the signals present at outputs 252, 253, 254, and 255 of counter 250, respectively. FIG. 3H represents the signal present at transmit enable out¬ put 105. FIG. 31 represents the signal present at encode enable output 115 in the case of switch 280 set in the A position. FIG. 3J represents the signal present at squelch input 65. FIG. 3K represents the signal present at audio enable output 75. FIG. 3L represents the signal present at encoder enable out¬ put 115 in the case of switch 280 set to the B position. FIG. 3M represents the signal present at decoder input 25. At a time TI OF FIG. 3 the user actuates switch 120 for a first time to initiate a call causing a logic high to appear at input 135. This causes a logic high to appear at the reset input 225 of timer 230 which in turn causes the output 232 of timer 230 to become active and go to a logic high. Counter 250 is clocked at this time causing output 253 to go high, output 252 to go low and outputs 254 and 255 to remain at a logic low. Assuming the squelch input is at a logic high, indicating no channel activity, the user will hear that he has a clear channel and will release switch 120 at time T2. This causes a low going logic transition at the reset input 225 of timer 230 which causes the timer to begin timing its predetermined time interval. At time T3, the timer interval started at time T2 has not yet expired, and the user once again actuates switch 120 causing a low to high logic transition at input 135. This once again resets timer 230 holding its output high and causes counter 250 to be clocked to its next state wherein output - 16 - 254 is at logic high and outputs 252, 253 and 255 are at logic lows. This state of the counter causes a logical low to high signal transition at transmitter enable output 105 and encoder enable output 115. This causes the transmitter to be active and the encoder to provide the transmitter with the address of the party being called. This occurs whether switch 280 is in either position A or B. Since the output of the timer is held high by the constant reset input caused by actuation of switch 120, the audio is always disabled when the transmitter is enabled. Normally the encoder will require only a very brief period of time (typically less than 0.5 seconds) to encode an addres to be transmitted by the transmitter. During this time, the transmitter will normally mute the microphone 90 of FIG. 1 and trans¬ mit the code address. After the code address has been transmitted, the microphone 90 will be unmuted and voice transmission may proceed. Alternately, if data transmission is desired it may take place after the addressing pro¬ cess is completed. At the end of the voice or data transmission, switch 120 is deactuated at a time corresponding to T4 of FIG. 3. The deactuation dis- ables the transmitter and, if switch 280 is in position A, disables the encoder. The low transition at the reset input 225.of timer 230 once again causes the timer to begin its predetermined time interval. At time T5 the party being called responds with a transmission of his own. This causes squelch input 65 of the formerly transmitting and now receiving unit to go to a logic low causing audio enable output 75 to go low turning on the receiver's audio allowing the user to hear the message being received. The received audio also turns on the reset input 225 of timer 230 thereby holding the output at a logic high. At time T6 the received message ends causing the squelch input 65 to go back to a logic high which in turn causes the audio to be disabled by the high going transition at output 75. The change at input 65 causes timer 230 which had been reset by the logic high on input 65 to start its time interval once again. At time T7, the user once again actuates switch 120 to respond to the message received between T5 and T6 causing input 135 to go high and reseting the timer. The counter is once again clocked to the next count causing its output 255 to go to a logic high while outputs 252, 253 and 254 are at a logic .low. The transmitter is enabled by output 105 and, if switch 280 is in position B, the encoder 100 of FIG. 1 is once again enabled. If switch 280 is in position A an unencoded transmission will occur. If the encoder 100 is enabled, voice or data may be transmitted after the address is encoded and trans- mitted. If the encoder is not enabled voice or data information may be transmitted immediately. At time T8 switch 120 is deactuated causing input 135 to once again return to a logic low. This causes a high to low transition at the timer reset input 255 which restarts the timing of the predeter¬ mined time interval. The signal at output 255 of counter 250 is fed back through inverter 270 and AND gate 215 to prevent further actuations occurring while the output 232 of timer 230 is active (logic high) from clocking counter 250. Therefore, there is no change in counter outputs 252, 253, 254 or 255 on any subsequent transmission unless timer 230 times out to the end of its time interval. This will cause the counter 250 to reset to its original state prior to time Tl. Λ . -„, . OMPI The time interval from T9 to T10 represents a received message similar to that occuring between time T5 and T6. Although counter 250 is at a differ¬ ent count, the controller 30 responds to this incoming message in a manner identical to its res¬ ponse between T5 and T6. Similarly, the decoder res¬ ponds to subsequent transmissions such as that occuring between time Til and T12 the same as trans¬ missions occuring between time T7 and T8 as long as the timer output 232 is at a logic high. At time T13 the output 232 of timer 230 becomes inactive and goes to a logic low indicating that the predetermined time interval of timer 230 has expired. This resets counter 250 to its initial state just prior to time TI. Actuations of switch 120 occuring subsequent to time T13 will cause controller 30 to respond as it did at time TI restarting the entire cycle. At time T14, the response of controller 30 to correctly encoded incoming messages is shown. That is, the conversation is inititated by another trans¬ ceiver addressing the transceiver of the present user. At this time input 25 makes a low to high transition as a result of a correctly decoded address by decoder 20. This causes a logic low to logic high transition at the timer reset input 225 which in turn causes the timer output 232 to go high. The incoming signal at input 25 also causes counter 250 to be clocked causing its output 253 to go high and its output 252 to go low. Outputs 254 and 255 remain at a logic low. Since a decoder output implies that a signal is being received, squelch input 65 makes a logic high to a logic low transition and audio enable output 75 goes low turning on the receivers audio circuits. OMPI A At time T15 the incoming message ends causing the timer 230 to begin timing its predetermined interval and the audio to be disabled. It should be noted that after time T15 controller 30 is in exactly the same set of logic states that it was in after time T2. Therefore it is evident that a response by the user of actuating switch 120 will cause the same response as that which occurred at time T3. That is, a transmission with an encoded address will occur. It will be evident to those skilled in the art, that the minor modification of causing no address encoding when communication is initiated by receipt of a correctly encoded incoming message may be readily im¬ plemented by clocking counter 250 more than once as a result of a logic high at the output of AND gate 210. Turning now to FIG. 4, it will be evident to one skilled in the art that a microprocessor or micro¬ computer is ideally suited to perform the functions of controller 30 in an equivalent embodiment shown in FIG. 4 as system 300. In this system a micro¬ computer 310 along with its associated "code plug" ROM 320 will preferrably perform the functions not only of controller circuit 30 but also of other radio functions such as that of the address decoder 20 and address encoder 100 of the system of FIG. 1 but this is not intended to be limiting. In this system, micro-computer 310 accepts incoming information from receiver 10, squelch circuit 60, and switch 120 and delivers appropriate signals to receiver audio 40 and transmitter 325. It will be appreciated that trans¬ mitter 325 may alternately include an encoder such as encoder 100 and receiver 10 may alternately include a decoder such as decoder 20. Preferrably, however, the micro-computer would handle these functions. Micro-computers such as the widely available Motorola O MC146805G2 as well as others is suitable for per¬ forming these functions. In this embodiment, ROM 320 serves as a "code plug" which is used to program the transceiver with various options and information necessary to the transceivers standard operation. Information such as tone duration, tone frequency, etc may be stored therein and programmed to meet various user or system requirements. The switch 280 of controller 30 is preferrably replaced by one bit of digital infor¬ mation in ROM 320 for system 300. FIG. 5 shows a flow chart of one method of pro¬ gramming micro-computer 310 to perform the functions of the present invention. This flow chart is designed to parallel the operation of hardware switch controller 30 and the reader should be aware that decision blocks do not uniformly show the result of a "yes" answer at the bottom of the diamond shaped blocks. It will occur to those skilled in the art that many other flow charts will result in firmware which will equally well perform the desired func¬ tions, therefore, the flow chart of FIG. 5 is not intended to be limiting as the only program sequence which would perform the function of the present invention. Program step 400 of the flow chart of FIG. 5 encompasses the first steps of the program wherein a timer, counter and other circuitry will be initial¬ ized upon powering up the system. The program looks for a switch actuation at step 410 and if none is found proceeds to step 420 where the receiver squelch circuit is inspected to see if a radio frequency carrier is present. If carrier is present the timer is reset and a brief delay occurs at steps 430 and the program is returned to step 410. If the switch OMPI S UBSTITUTE '. WiPO has been actuated step 440 checks to see if the timer is running. If not, step 450 enables the audio until step 460 detects a switch release. Until the switch release occurs periodic delays are encountered through steps 470 until the switch is released. When the switch is released the timer is reset at step 480 and the program returns to step 410. If at step 440 it is determined that the timer is running, step 490 clocks the counter. If the counter's count equals 2 at step 500, the encoder is activated along with the transmitter at step 510. The transmitter remains activated until steps 520 and 530 determine that the switch has been released. At that point. Step 540 stops transmission and step 550 resets the timer. The program is then returned to step 410. If at step 500 the count is not equal to two, step 560 disables the clock to the counter. Step 570 determines whether or not the user desires to encode upon each transmission or not. If so the program returns to step 510 and if not the program simply turns on the transmitter at step 580 without enabling the encoder. The program then proceeds to step 520. If at step 420 it is determined that carrier is not present, step 590 determines if a message has been is properly encoded and correctly decoded. If not step 600 checks to see if the timer's interval has expired. If not a delay is encountered at step 610 prior to returning the program to step 410. If the timer's interval has expired at step 600, the audio is muted at step 620 and the timer is reset at step 630. The program then returns to step 410. If at step 590 the signal was appropriately decoded, step 635 checks to see if the timer is running. If so, step 640 resets the timer and step 660 enables the receiver's audio. The program then OMPI - 22 - returns to step 410. If at step 635 the timer is not running, step 665 clocks the counter, step 670 resets the timer, step 675 enables the timer and step 680 enables the audio. The program then returns to step 410. If it is desirable not to transmit an address code on the first actuation of the switch 120 occur¬ ing after receipt of a correctly encoded message, step 665 should clock the counter twice, otherwise an address will be encoded on the first transmit. Turning now to FIG. 6 a diagram of the actual hook up for the preferred firmware embodiment of the present invention is shown. This embodiment utilizes the Motorola MC146805G2P microcomputer in conjunction with the MCM2802P programmable ROM. The details of using this particular widely available micro¬ processor/microcomputer family are well known and documented in the "M6805/M146805 Family Micro¬ computer/microprocessor User's Manual" published by Motorola, Inc., 3501 Ed Bluestein Blvd., Austin, Texas 78721. The contents of the above referenced manual is hereby incorporated by reference. Details of the microprocessor itself may be found in the commonly published "Motorola Microprocessor Data Manual" in the section entitled "MC146805G2", the contents of which is also hereby incorporated by reference. In FIG. 6, the actual transceiver func¬ tions are represented in block diagram form and one skilled in the art will readily know how to accomp¬ lish the appropriate interfacing to those functions. Also, pin numbers for the plastic dual in-line pack¬ age versions of the microcomputer and ROM are circled and shown adjacent the appropriate I.e. terminals. When the hexadecimal program code shown in Table I is loaded into the microcomputer's internal memory, and the code shown in Table II is loaded into the programmable ROM, the circuit will perform in a TABLE I coco 00 00 00 00 00 00 00 00 00 00 00 00 00 OQ 00 00 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00-10 00 00 00 00 00 00 00 00 00 00 00. 00 00 00 00 00 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080 2-1 0-1 16 01 20 02 17 01 18 01 19 01 81 Aό 60 B7- 0090 09 A6 21 B7 04 AE 10 A6 14 B7 3B A6 OA B7 3D CD OOAO 00 ED 3A 3D 26 F9 B6 10 26 04 9C CC 06 42 81 B7 OOBO 3B A6 4E B7 3A 20 06 B7 3B A6 46 B7 3A A6 08 B7 OOCO 3C BE 3A F6 3C 3A BE 3B F7 3C 3B 3A 3C 26 F2 81 OODO - F 05 01 00 49 OF 02 00 49 81 14 72 18 72 05 3F ooεo 05 OS 6C 02 1A 68 3F 69 3F 6A 3F 6B 81 IF 03 lό OOFO 05 1A 01 17 01 BD 88 BD 88 B6 77 46 BD 80 46 BD 0100 80 B6 3B B7 3C 38 3C 38 3C 38 3C A6 08 38 3C BD 0110 80 4A 26 F9 17 05 A6 20 IB 01 20 02 BD 88 06 01 0120 00 79 69 01 69 02 69 03 4A 26 Fl 9F AB 04 97 3C 0130 3B IE 03 81 BD 8D AE 2E 20 04 BD 8D AE 30 12 72 01-10 B6 2D B7 65 B6 28 B7 3C 20 IE BD BD B6 29 B7 3C 0150 AE 56 B6 2B 20 OE 1A 00 20 2A BD 8D B6 2A B7 3C 0160 AE 51. B6 2C 27 FO B7 65 1A 00 A6 02 B7 3D A6 8C 0170 B7 08 A6 07 B7 09 8F A6 08 4A 26 FD 3A 3D 26 EE 0180 3A 65 26 Eό A6 60 B7 09 02 72 2A Aό FF B7 75 A6 0190 05 B7 4-1 EF 39 21 FE BE 39 F6 A4 OF Al OF 26 03 01A0 CC 02 62 Bl 75 26 08 Aό OF 67 75 A6 24 20 05 B7 01E0 75 -18 AB 10 97 F6 B7 37 B7 45 E6 01 B7 38 OE 72 Q1C0 3A A6 FC B7 07 A6 94 B7 03 B6 38 B7 08 3F 09 8F 01D0 A6 02 9D 4A 26 FD A6 9C B7 03 B6 38 B7 08 3F 09 01E0 8F E6 38 B7 08 3F 09 8F A6 02 9D 9D 4A 26 FD 01 01FO 72 12 OF 01 OA A6 60 B7 09 20 65 A6 EC 20 C4 IE 0200 37 9D 20 08 9D 9D 9D 9D 9D 9D 21 FE A6 84 B7 03 0210 B6 38 B7 08 3F 09 8F A6 02 9D 4A 26 FD A6 80 B7 0220 03 B6 38 B7 08 3F 09 8F B6 38 B7 08 3F 09 8F 21 0230 FE 9D 9D 9D 9D 3A 37 26 OB 3A 3C 27 12 Bό 45 B7 0240 37 CC 01 C5 9D 21 FE 9D 9D 9D 9D 9D CC 01 C5 9D 0250 9D 9D 9D 21 FE A6 84 B7 03 Aό 01 B7 3C 03 72 07 0260 13 72 A6 4 B7 03 81 3A 44 27 F7 3C 39 Aό 07 4A 0270 9D 26 FC CC 01 95 A6 60 B7 09 80 04 68 7B 06 68 0280 03 CC 03 8D BD DO B8 77 27 05 1C 09 CC 06 17 OB 0290 68 08 OB 3F 05 07 00 02 BD DE 17 68 AE 01 A6 FE 02A0 B7 3D B7 02 09 02 38 5C OB 02 34 5C OD 02 30 5C 02E0 39 3D Bά 3D B7 02 08 3D EB 03 68 15 3A 66 26 11 02C0 11 68 13 68 A6 21 B7 04 10 00 OE 68 04 15 6C 3F 02D0 70 81 B7 67 12 68 A6 01 B7 66 81 A6 03 20 F9 BF 02E0 73 9F 03 63 ED Bl 67 26 D3 00 68 EF 3C 66 A6 03 02F0 Bl 66 26 DD 10 68 14 68 81 15 68 ID 03 Bό 73 Al 0300- OA 27 6E Al OC 26 ID A6 EO B7 04 B6 76 B7 00 ID 0310 68 AE 53 5C A3 60 24 4D F6 2A F8 BF 74 B6 42 B7 0320 71 18 68 81 Al OB 26 02 3F 73 09 43 10 Bl 63 26 0330 OC B6 62 Bl 74 27 4B AB 05 Bl 74 27 45 OB 43 06 03-10 B6 73 Bl 61 27 3C Aό EO B7 04 Eό 76 B7 00 ID 68 0350 09 68 19 B6 73 BE 74 AA 80 F7 5C A3 60 24 06 Fό 0360 2A F8 BF 74 81 19 68 A6 CO B7 71 81 Θ6 42 B7 71 0370 81 OD 04 03 OC 00 15 OD 71 08 IB 72 BD DA 9C CC 0380 05 62 A6 Eό B7 04 B6 76 B7 00 ID 68 81 16 68 Bό 0390 6A A4 IE 27 04 ID 0720 02.1C 07 B6 6C B7 6D 01 03A0 01 OF 01 6D 08 3A 6E 27 13 10 6C 20 11 3F 6E 20 C'.IPI TABLE I (cont. ) 03B0 OB 00 6D F5 3C 6E A6 03 Bl 6E 27 ED 11 6C OF 01 03C0 OF 03 6D 08 3A 6F 27 13 126C 20 11 3F OF 20 OB 03D0 02 6D F5 3C OF A6 03 Bl OF 27 ED 13 6C OF 43 12 03E0 08 00 12 05 6D 08 3A 70 27 16 14 ΔC 20 14 3F 70 03F0 20 OE 08 00 EE 04 6D F2 3C 70 A6 03 Bl 70 27 EA 0400 15 6C Bό 6D B8 6C 27 62 IB 72 10 04 ID 03 46 24 0410 2D 01 6C 2C IE 68 BD DE 056C 14 07 3F OB' 05 72,- 0420 19 08 3F 05 08 72 OE 18 72 16 72 B6 43 20 61 14 0430 72 18 72 20 E6 16 72 9C 20 76 14 72 20 1A IB 68 0440 46 24 09 03 OC 06 IF 04 B6 42 20 44 46 24 1A IF 0450 68 04 6C 07 14 72 18 72 ID 04 81 15 72 19 72 1C 0460 04 OF 43 03 ID 00 81 1C 00 81 B6 35 48 BB 69 B7 0470 69 4F B9 OA B7 6A 4F B9 6B B7 6B OC 43 OE Bl 60 0480 26 E7 OB 68 E4 IF 68 AD D2 IB 68 81 Bό 6A 20 EE 0490 B7 3A 9C A6 21 B7 04 Bό 3A A4 OC Al 08 26 3D 06 04A0 72 03 CC 05 39 03 3A Q8 00 3A OB CD 01 34 20 OC 04B0 A6 60 B7 09 20 06 03 01 F2 CD 01 3A 1A 00 ID 03 04O) A6 FF 7 08 A6 05 B7 09 SF 01 01 OA 3A 6E 26 FO 04D0 17 72 11 6C 20 3F Aό 03 E.'7 6E 20 E4 05 3A OE 06 04E0 3A 05 CD 01 34 20 06 03 01 F8 CD 01 3A 01 3A 35 04F0 03 3A OF OD 71 32 CD 01 4A CD 01 5A- 20 10 9D 9D 0500 20 13 OF 71 2B CD 01 5A OD 71 03 CD 01 4A OA 42 0510 ED Bό 42 B7 71 Aό CE B7 07 A6 84 B7 03 06 72 9C 0520 IB 00 CC 06 6A 02 3A 05 OF 71 05 20 CC OC 71 DB 0530 06 72 DB 04 42 D8 CC 06 DS 03 3A 10 00 3A 05 CD 0540 01 34 20 r 03 01 F8 CD 01 3A 20 C9 10 72 01 3A 0550 08 03 01 r CD 01 3A 20 03 CD 01 34 11 72 13 6C 0560 20 B3 09 _ Aό 20 8F 9C BD 8D A6 01 B7 3C A6 04 0570 B7 63 A6 act B7 72 AE 32 CD 01 68 IB 00 CC 06 17 0580 A6 60 B7 09 ID 03 IE 68 OC 72 10 01 3F OD CD 01 0590 5A A6 CE B7 07 A6 84 B7 03 IB 00 03 3F 30 1A 72 05A0 1C 68 OD 72 47 A6 D2 B7 3C Aό E2 B7 04 Bό 76 B7 05BQ 00 Aώ 5D B7 08 Aό 06 B7 09 CD 02 7B 8F 21 FE OB 05C0 72 OC OD 68 13 3A 3C 27 05 OC 72 E5 20 38 IB 72 05D0 ID 68 A6 21 B7 04 10 00 OD 72 OC OD 3F 04 1C 07 05E0 1C 03 BD DA CC 06 6A OF 3F F8 20 F2 A6 7D B7 3C 05FO Aό 12 B7 3B A6 E4 B7 04 B6 76 B7 00 A6 9C B7 08 0600 A6 06 B7 09 20 B3 3A 3B 26 F2 00 04 E3 Aό 07 B7 0610 3B 10 04 10 00 20 E5 9C " Aό 21 B7 04 A6 01 B7 00 0620 A6 30 B7 05 A6 OF B7 06 A6 CE B7 07 A6 84 B7 03 0630 4F B7 01 B7 02 B7 6C B7 6E B7 OF B7 70 B7 72 B7 0640 68 9A ED DO B7 77 A6 OA B7 3B AE 3E A6 OA B7 3D 0650 BD ED 3A 3D 26 FA B6 44 EB 45 Al AΞ 26 E4 E:ό 42 0660 B7 71 4F OF 43 02 Aό CO B7 76 9C Bό 40 B7 45 B6 0670 3E B7 39 3F 37 ID 72 Aό 60 B7 09 CD 08 28 3F 3C 0680 3F 3D AE 10 CD 08 17 AE 23 CD 08 17 B6 B7 14 0690 B6 20 B7 12 B6 21 B7 13 Bό 34 B7 26 B6 35 44 44 06A0 44 B7 27 A6 70 B7 08 3F 09 3F 36 B6 14 BO 27 2B 06B0 12 1A 36 26 04 Bό 35 20 OB E7 14 EE 27 Bό 35 B7 06C0 27 20 OB 40 B7 27 BE 14 B6 22 B7 14 14 36 8F CD 06D0 07 3C 04 36 03 CD 02 7B B6 36 A4 09 26 05 03 3ό 06E0 C8 20 87 07 36 05 01 39 02 1C 72 3C 37 34 39 B6 06F0 41 Bl 37 26 82 CC 05 80 Bό 32 BB 29 B7 29 B6 31 0700 B9 28 B7 28 OD 01 18 2B OB OC 28 04 3C 2A 20 27 0710 3C 2B 20 23 OC 28 04 3C 2C 20 1C 3C 2D 20 18 2B 0720 OB OC 28 04 3A 2A 20 OF 3A 2B 20 OB OC 28 04 3A — 25 — TABLE I (cont.) 0730 2C 20 04 3A 2D 20 00 5A 27 42 21 00 B6 IF BB • 16 0740 B7 16 B6 IE B9 15 B7 15 OD 01 18 2B OB OC 15 04 0750 3C 17 20 A4 3C 18 20 AO OC 15 04 3C 19 20 99 3C 0760 1A 20 95 2B OB OC 15 04 3A 17 20 SC 3A 18 20 88 0770 OC 15 04 3A 19 20 81 3A 1A CC 06 F8 A6 AD C7 00 0780 08 Aό 02 B7 09 B6 1C BB 16 B7 16 B6 IB B9 15 B7 0790 15 Bό 2F BB 29 B7 29 Bό 2E B9 28 B7 28 05 36 05 07A0 AE 10 CD 07 AE OB 36 05 AE 23 CD 07 AE 81 E6 OC 07B0 B7 25 E6 08 EO OA B7 3C Eό 07 EO 09 E7 3B BB 3C 07C0 00 25 01 47 B7 3D B6 3B BO 3C 00 25 01 47 B7 3C 07D0 EB 01 2A 01 40 B7 3B Bό 3D FB 2A 01 40 BB 3B El 07EO OD 23 10 6A 03 26 14 A3 10 26 04 10 36 20 OC 16 07F0 36 20 08 Eό 03 El 11 27 02 όC 03 E6 37 27 15 OA 0800 36 12 3A 12 26 OE Al 01 26 08 Bό 20 B7 12 3A 45 0810 26 02 12 36 00 25 07 Eό 3D F7 B6 3C E7 01 4F E7 0820 07 E7 08 E7 09 E7 OA 81 A6 IB B7 3A OE 3E 03 OC 0330 72 37 01 39 02 A6 4E B7 3A Bό IB 00 36 02 B6 2E 0840 B7 3D B6 37 48 B7 3B AE IB BO ED BD ED A6 2E B7 0350 3B BD BD E6 37 27 2A Eό IB Bl 3D 26 04 Aό IB BD 0860 B7 Bό 2E Bl 3D 26 1A 20 OA Bό 2E Bl 4E 26 OA A6 0870 IB ED B7 Aό 2E BD B7 20 08 Aό IB BD AF A6 2E BD 0880- AF 81 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0890 43 6F 70 79 72 69 67 68 74 20 31 39 38 32 20 20 0SA0 4D 6F 74 6F. 72 6F 6C όl 20 49 6E 63 2E 20 20 20 IFFO 00 00 00 00 00 00 02 76 06 17 05 67 06 17 06 17 TABLE II 9A 01 29 33 40 OD 04 5C 9A 01 29 33 40 OD 04 5C 9A 01 29 33 40 OD 04 5C 9A 01 29 33 40 OD 04 5C 9A 01 29 33 40 OD 04 5C 00 2E 01 05 CO OA AO 05 E4 91 2A 3C 92 OD 04 55 EF 49 20 37 E9 OD 04 5b 80 80 09 09 09 OA 01 09 09 09 05 AA AA AA 00 00 A7 OD 4A 64 51 57 59 4A 62 3E 6B 34 75 2E SO 22 8D 1A 9A 13 B7 07 C3 03 05 01 01 04 04 04 54 52 54 52 OA 05 09 09 09 00 00 00 00 00 00 00 00 79 C PI SUBST manner substantially the same as that of controller 30 with switch 280 in the A position and in addition will perform the decoding function for a 9-9-9-9-9 ZVEI code on data entering the PB6 input. If an encode is desired on each transmission (switch 280 in the B position) , the tenth byte in line 3 of Table II should be changed from 2E to 3E. Also, the encoding function is performed and the output appears in the form of a 350 millisecond, 1200Hz tone in digital form at outputs PD2 and PD3 when the microcomputer is clocked at 1MHz. This output is processed by a two bit D/A converter 690 and a low pass filter 695 prior to being transmitted by transmitter 325. The output of receiver 10 is processed by a low pass filter 700 and then limited by a limiter 710 prior to input into the PB6 terminal of the microcomputer. Thus, it is apparent that in accordance with the present invention a method and apparatus that fully satisfies the objects, aims, and advantages is set forth above. While the invention has been described in conjucntion with specific embodiments, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art in light of the foregoing description. Accord- ingly, it is intended that the present invention embrace all such alternatives, modifications and variations as fall within the spirit and broad scope of the appended claims. What is claimed is: C PI

Claims: Claims 1. In a transceiver including a transmitter and a receiver, a multiple function switch controller, comprising: a timer for establishing a time interval; first means, coupled to said timer and responsive to actuation of said switch occuring during said time interval, for producing a first control signal; and second means, coupled to said timer and responsive to an actuation of said switch occuring outside of said time interval, for producing a second control signal; whereby, said switch controller allows a single switch to perform a plurality of independant functions. 2. A multiple function switch controller in accordance with claim 1, wherein said first control signal establishes a first operational mode for said transceiver and said second control signal establishes a second operational mode for said transceiver. 3. A multiple function switch controller in accordance with claim 2, further including: means, responsive to said first control * signal, for selectively enabling said transmitter; and annunciating means, responsive to said second control signal, for annunciating the presence of activity on a selected communication channel. 4. A multiple function switch controller in accordance with claim 3, wherein said timer is activated in response to said switch. 5. A multiple function switch controller in accordance with claim 4, further including a counter for counting the number of actuations of said switch occuring during said time interval. 6. A multiple function switch controller in accordance with claim 5, further including gating means, responsive to said counter, for providing a third control signal only on predetermined counts of said counter. OMPI 7. A multiple function switch controller in accordance with claim 6, further including an encoder coupled to said transmitter for encoding an address to be transmitted by said transmitter; and wherein said! third control signal allows said encoder to be enabled only when said counter indicates that said switch is being actuated for a first time within said time interval. 8. A multiple function switch controller in accordance with claim 7, wherein said encoder includes a five tone sequential selective calling encoder. 9. A multiple function switch controller in accordance with claim 8, wherein said annunciating means includes means, for selectively directing audio frequency signals to a loudspeaker. 10. A multiple function switch controller in accordance with claim 3, further including an encoder coupled to said controller and said transmitter for encoding an address to be transmited by said transmitter; said encoder being enabled whenever said transmitter is enabled. PVPI SUBSTITUTE SHEET WIP 11. In a transceiver including a transmitter and a receiver, a multiple function switch controller, comprising: means for detecting actuation of a switch; means coupled to said receiver for moni¬ toring the activity of a selected communication channel; a timer, responsive to either said moni¬ toring means or said detecting means, for estab- lishing a time interval; means, responsive to actuation of said switch during said time interval, for enabling said transmitter; and means, responsive to actuation of said switch outside of said time interval, for annun¬ ciating the status of said communication channel. BST " 12. A multiple function switch controller in accordance with claim 11, further including: means for detecting the first actuation of said switch occuring during said time interval; and means for enabling an encoder during said | first actuation. 13. A multiple function switch controller in accordance with claim 12, further including means for inhibiting said encoder during second and subsequent actuations of said switch occuring during said time interval. OMP - 32 - 14. In a transceiver including a transmitter and a receiver, a multiple function switch controller, comprising: means for detecting actuation of a switch; a decoder coupled to said receiver, for decoding received signals of a predetermined type; a timer, responsive to either said detecting means or said decoder, for establishing a time inter¬ val following each switch actuation or each decoding of a received message of a predetermined type; and controller means, for causing said switch to activate a first function if actuated during said time interval and activate a second function if actuated outside said time interval. EET 15. A multiple function switch controller in accordance with claim 14, wherein: said first function includes a function associated with said transmitter; and said second function includes a function associated with said receiver. CM?I HEET 16. In a selective calling transceiver including a transmitter and a receiver, a multiple function switch controller, comprising: a decoder for decoding a received signal including a predetermined address; a timer, responsive to said decoder, for establishing a time interval following each decoding of a received signal including a predetermined address; first means, responsive to actuation of said switch during said time interval for producing a first control signal; and second means responsive to actuation of said switch outside of said time interval for producing a second control signal. OMPI 17. A multiple function switch controller in accordance with claim 16, wherein said first control signal establishes a first operational mode for said transceiver and said second control signal estab- lishes a second operational mode for said trans¬ ceiver. 18. A multiple function switch controller in accordance with claim 17, further including: means, responsive to said first control signal, for selectively enabling said transmitter; and annunciating means, responsive to said second control signal, for annunciating the presence of activity on a selected communication channel. 19. A multiple function switch controller in accordance with claim 18, wherein said timer is also activated in response to said switch. 20. A multiple function switch controller in accordance with claim 19, further including means, responsive to actuation of said switch during said time interval, for enabling an encoder. 21. A multiple function switch controller in accordance with claim 20, further including a counter means for counting the number of actuations of said switch during said time interval. CMPI 22. A multiple function switch controller in accordance with claim 21, further including gating means, responsive to said counter for allowing said encoder to be enabled only on predetermined counts of said counter. 23. A multiple function switch controller in accordance with claim 22, wherein said gating means allows said encoder to be enabled only when said counter indicates that said switch is being actuated for a first time within said time interval. 24. A multiple function switch controller in accordance with claim 21, wherein said annunciating means includes means for selectively directing audio frequency signals to a loudspeaker. CMPI TE SHEET [ , 25. In an transmitter, a method of controlling a switch comprising the steps of: providing a timer to establish timing inter¬ vals; detecting whether or not the output of said timer is a predetermined signal; counting the number of actuations of said switch occuring while said timer output is said pre¬ determined signal; enabling an encoder when said count equals a first predetermined count; and inhibiting said encoder when said count is equal to a second predetermined count. OMPI 26. The method of claim 25, further including the step of activating a transmitter upon all actuations of said switch occuring while said timer output is said predetermined signal. OMPI 27. A method of controlling the operation of a multiple function switch in a transmitter, comprising the steps of: timing an interval following deactuation of said switch; alerting the user of the status of a commu¬ nication channel upon actuation of said switch out¬ side of said time interval; and enabling said transmitter upon actuation of said switch occuring during said time interval. SUBSTITUTE S 28. A. method in accordance with claim 27, further including the steps of: enabling an encoder upon a first of said actuations of said switch occuring during said time interval; and inhibiting said encoder upon subsequent actuations of said switch occuring during said time interval. SUBSTITUTE SHEET

Inventors: HIGGINS MARY LYNN, HIGGINS, MARY, LYNN
Applicants: MOTOROLA INC, MOTOROLA, INC.
Application year: 1984
Main classification: H04B1
IPC codes: H04B1