SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING A LEAD FRAME CHIP SUPPORT

Abstract: In an integrated circuit package, the central "paddle" of the lead frame on which the semiconductor chip (17) is mounted comprises two separate, electrically isolated portions (10, 11) which extend beyond edges of the chip and which is each electrically connected to a different terminal pin of the package. External power is applied to these two chip support portions by means of which electrical power can be distributed to numerous areas (as desired) on the chip via bonding wires (23, 24) extending between the chip areas and the paddle portions.

Description: SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING A LEAD FRAME CHIP SUPPORT Background of the Invention This invention relates to integrated circuits of the type comprising a semiconductor chip disposed on a le frame within a multi-terminal package. The invention is particularly concerned with the problem of distributing power to different portions of the chip. As known, one type of integrated circuit compris a plurality of semiconductor devices arranged in various circuit configurations on a single semiconductor chip. T chip is mounted on a central or "paddle" portion of a lea frame, connecting wires extend between bonding sites on t chip and different ones of the frame leads, and the chip- lead frame assembly is encapsulated within a solid, plast like enclosure, the leads from the lead frame extending outwardly from the enclosure and providing terminals or "pins" for the device package. It is often necessary, depending upon the chip circuit configuration, to provide electrical power to different portions of the semiconductor chip. One approac is to provide a power distribution network on the chip itself, only two interconnecting wires thus being required between the chip and the package terminals. However, the power distribution network tends to be large and the chip size must be increased to accommodate it. This is generally undesirable. Another approach is to provide power at several different package terminals and to interconnect each of th different terminals to different portions of the chip wher the power is required. However, this increases the number of terminals required which is also generally undesirable. Statement of the invention In accordance with this invention, power is distributed to different portions of the chip using a specially designed lead frame. The chip support paddle of the lead frame is split electrically and provides two conductor members that extend along and under the chip. The two conductor members are connected to different package terminals, between which electrical power is applied, and the two conductor members serve as power busses, disposed not on the chip itself, from which power can be derived by means of different connecting wires between bonding sites on the chip and the conductor members. Description of the Drawing FIG. 1 is a perspective view of a portion of a lead frame designed in accordance with one aspect of the invention? FIG. 2 is a perspective view, partly cut away, of the lead frame encapsulated in a dual-in-line package; FIG. 3 is a view similar to FIG. 2 showing a chip installed. Detailed Description A lead frame designed with power and ground plane buss bars is shown in FIG. 1. The lead frame is of generally standard type, comprising a thin metal foil or film having etched openings therethrough providing the pattern of elements shown. Not shown (as being well known is a peripheral continuous element to which all the variou frame elements are connected thus providing a unitary, self-supporting member. In use, as known, a semiconductor chip is mounted on a central or "paddle" portion of the frame, connecting wires are bonded between bonding sites along the edge of the chip and bonding sites on different ones of the frame elements or leads surrounding the paddle and the semiconductor chip along with adjacent portions of the surrounding leads is encapsulated in a solid, plastic¬ like envelope. The frame peripheral connecting element is then removed, separating the various leads which serve as terminals of the package. In accordance with this invention, the usual chip paddle is split into two sections 10 and 11 designed to O r extend or cross under the chip when the chip is bonded to the paddle. Wire bonding sites 13, 14 for crossunder 10; 15, 16 for crossunder 11 are provided as shown. The arrangement illustrated in FIG. 1 is merely one of numerou crossunder configurations that can be used. Bonding sites can be provided at the edges as well as, or instead of, th ends of the package. FIG. 2 shows the lead frame, encapsulated within standard dual-in-line package. For clarity the assembly i shown without the chip. Each of the paddle sections 10 an 11 is integral with a different one of the package terminals by means of which power can be applied to the tw sections. FIG. 3 shows the assembly with the chip 17 bonded in place. Interposed between the chip and the paddle is a plastic sheet 20 with a conductive layer on the upper side The plastic sheet provides electrical isolation for the sections of the paddle while the metal clad side is the conventional back plane contact for the chip. The wire bonds are shown in FIG. 3. Wire 22 is the connection for the back plane. Wires 23 and 24 are the power connections from the power pads on opposite sides of the chip to paddl 11. Wires 25 and 26 are ground connections to paddle 10. Additional portions of the chip can be connected to the power buss sections 10 and 11 as desired, e.g., from side portions of the chip to exposed portions of the sections 1 and 11 (not in the embodiment illustrated) along the elongated sides of the chip. To minimize noise in the integrated circuit chip it is often helpful to connect a capacitor between the power and ground busses. With "on-chip" busses, such capacitor consumes additional chip area. With the arrangement of this invention the capacitor can be connected conveniently across the power and ground busses externally of the chip.

Claims: Claims 1. An integrated circuit device comprising: a metal lead frame having a central support member and a plurality of leads extending outward from the vicinity of the central support member, a semiconductor chip (17) bonded to the central support member, conductive members (20-26) connecting sites on the semiconductor chip to sites on the leads, and an envelope encapsulating the semiconductor chip, the central support member, the conductive members, and a portion of the leads, characterized in that the central support member is segmented into two electrically separate portion (10, 11) extending beyond edges of the chip, conductive members (24, 25) connecting different sites on the chip to different ones of sites on the support portions, and insulating means (20) electrically insulating the undersid of the chip from the support portions. 2. The device of claim 1 further including a conductive layer interposed between the chip and the insulating means, and a conductive member (22) interconnecting said conductive layer and said chip. 3. The device of claim 1 having a capacitor interconnecting the two support portions.

Inventors: GRAVER RONALD NORMAN, GRAVER, RONALD, NORMAN
Applicants: AMERICAN TELEPHONE & TELEGRAPH, AMERICAN TELEPHONE & TELEGRAPH COMPANY
Application year: 1984
Main classification: H01L23
IPC codes: H01L23