ELECTRONIC ODOMETER

Abstract: An electronic odometer employs a nonvolatile memory as a meter for displaying the cumulative distance traveled by a vehicle such as an automobile. Data on the cumulative dis­ tance traveled by the vehicle is calculated in an arithmetic unit (3) on the basis of signals from a pulse generator (1), and is written in sequence in a nonvolatile memory (7) provided with N cumulative distance data memory areas for each of pre­ determined distance meters. During reading, a maximum value of the cumulative distance traveled data is obtained from the N cumulative distance data memory areas in the nonvolatile memory (7). When the difference between the maximum value and the data written just before that max­ imum value matches a predetermined distance, this max­ imum value is displayed on a digital display unit (8) as the cumulative distance traveled.

Description: The present invention relates to an electronic odometer, particularly suitable for use in a vehicle such as an automobile. Recently, proposals for an instrument indicating the total distance travelled by an automobile concern an electronic odometer employing non-volatile memories as a substitute for a mechanical instrument which indicates the total distance travelled by a vehicle. An electronic odometer is powered by the battery of the automobile, and digitally displays the total distance travelled, which is integrated by a counter. According to this device, data on distance travelled is written into a plurality of non-volatile memories every 100 meters, and then that value is read out and indicated, in order to prevent loss of the data on distance travelled integrated by the counter if the voltage should drop such as when the battery is changed or a wire breaks. At the moment, however, there is a limit on the number of times data can be written into non-volatile memories. With this method, therefore, the odometer can be used for only about ten thousand kilometers, although the automobile can, in practice, travel a total distance of more than a hundred thousand kilometers. One method of solving this problem is disclosed in Japanese Patent JP-A-5 595 813 and entitled "Odometer", and involves a method of reducing the number of times data is written into the non-volatile memories. Accordingly to this method, when the voltage of a power source is normal the running distance data given from an integrating part is displayed at a display part. However, when the voltage of the power source is below a predetermined value, the total distance travelled is memorized in a non-volatile memory and when the voltage of the power source is recovered, the memorized data is displayed. Japanese Patent JP-A-5 793 209, entitled "Odometer for Automobile" discloses a method by which the distance travelled is determined based upon a majority rule, by writing the distance travelled into a plurality of non-volatile memories. In either case, data is written repeatedly into the same locations on non-volatile memories and there are no means provided to prevent the use of a faulty location in the non-volatile memory. An "Integrating Distance Meter" is described in Japanese Patent JP-A-57 199 912. The device uses majority logics which are adapted to writing and reading in a non-volatile memory. As in the devices described above data is written reapeatedly into the same locations of a non-volatile memory and the use of a faulty location of such a memory can not be excluded. GB-A-1 602 129 discloses an odometer in which a pulse count corresponding to a total distance travelled is recorded in a non-volatile memory and which is read by a processing circuitry at least upon connection of power to the processing circuitry. Said pulse count is only recorded in said memory each and every time the ignition is switched off or in the event of a failure in the power supply to the odometer. The object of the present invention is to provide an electronic odometer which is capable of extending the life of non-volatile memories, and which is capable of correctly indicating the total distance travelled by the automobile. This object is achieved according to the present invention by the features recited in the characterizing part of claim 1. The distance travelled by the automobile is written, after each predetermined distance travelled, into a location of a non-volatile memory which has N locations, N₁ to N N , so that data on the total distance travelled is stored. This makes it possible to extend the life of the non-volatile memory, and correctly indicate the total distance travelled by the automobile, as described later. Brief Description of Drawings Fig. 1 is a basic block diagram; Fig. 2 is a diagram of a specific embodiment of Fig. 1; Fig. 3 is a timing chart illustrating the writing operation of the embodiment of Fig. 2; Fig. 4 is a timing chart illustrating the reading operation of the embodiment of Fig. 2; Fig. 5 is a flow chart of an embodiment of a main processing program in the arithmetic unit of Fig. 2; Fig. 6 is a flow chart of an embodiment of an interrupt processing program in the arithmetic unit of Fig. 2; Fig. 7 is a flow chart of an embodiment of the write processing of Fig. 5; Fig. 8 is a flow chart of an embodiment of the read processing of Fig. 5; Fig. 9 is a diagram showing how the non-volatile memory is used for another purpose; Fig. 10 is another basic block diagram, in which the non-volatile memory is used for the purpose shown in Fig. 9; Fig. 11 is a diagram of a specific embodiment of Fig. 10; Fig. 12 is a timing chart illustrating the writing operation of the embodiment of Fig. 11; Fig. 13 is a flow chart of an embodiment of the write processing in the arithmetic unit of Fig. 11; Fig. 14 is a further basic block diagram; Fig. 15 is a diagram of a specific embodiment of Fig. 14; Fig. 16 is a timing chart illustrating the writing operation of the embodiment of Fig. 15; Fig. 17 is a flow chart of an embodiment of a main processing program in the arithmetic unit of Fig. 10; Fig. 18 is a flow chart of an embodiment of an interrupt processing program in the arithmetic unit of Fig. 10; and Fig. 19 is a flow chart of an embodiment of the read processing of the embodiment of Fig. 17. Embodiments of the present invention will be described below in detail, in conjunction with the accompanying drawings. With reference to Fig. 1, in an electronic odometer data on distance travelled, such as vehicle-speed pulses, are generated by a pulse generator 1 and are input to an arithmetic unit 3 which calculates the distance travelled and the total distance travelled, and the calculated result is indicated by a digital display 8. When the power is turned on, the data item which is the largest of data items at addresses N₁ to N N of a non-volatile memory 7, when it reaches a difference of a preset distance over the data items in neighboring addresses, is input as a read-out value and as an initial value to the arithmetic unit 3. Therefore, the total distance travelled is obtained by adding the distance travelled (hereinafter referred to as the count) to the initial value. Data is written into the non-volatile memory 7 after each unit of a preset distance determined by a determination unit 2. A direct address system is employed in which the address is changed by an address-changing unit 4 so that it is replaced by the next address. In this way, data is successively written into sequential address locations in the non-volatile memory 7. Compared with the conventional system in which data is written into the same address or data is written simultaneously into all of a plurality of addresses, all the data can be protected from erasure, even if one cycle is missed or an erroneous operation occurs. A read unit 6 is used to read out the data written into the non-volatile memory 7 and send it to the arithmetic unit 3. Fig. 2 is a diagram illustrating a specific embodiment of Fig. 1. Data on distance travelled, such as vehicle-speed pulses, are generated by the pulse generator 1 and are input to an I/O port 9. The aritimetic unit 3 consists of a so-called microcomputer constituted by the I/O port 9, a ROM 11, and MPU 10, a RAM 12, an I/O port 13, and an I/O port 32. Input pulses are counted by the MPU 10 according to a program stored in the ROM 11. The count is temporarily stored in the RAM 12 together with the initial value and data on total distance travelled which is found by adding the count to the initial value. The preset distance determination unit 2 consists of a preset distance output unit 14, a first counter 15, and a comparator 16, wherein the first counter 15 increments according to the result calculated by the MPU 10 every minimum operating unit (for example, every 100 meters). When the vehicle travels the preset distance, the first comparator 16 compares the output of the preset distance output unit 14 with the output of the first counter 15, and generates an output O₁, shown in Fig. 3(ii). The output O₁ is input to the I/O port 32 which informs the MPU 10 that the preset distance has been reached. The MPU 10 then transfers the data on the total distance travelled which is stored in the RAM 12, to a data register (C) 25. The I/O port 9 then outputs a pulse E₀, as shown in Fig. 3(iv), and an inverter 31 outputs an erase signal E if no output is generated by a power-on determination unit 28 or if the MPU 10 has not been reset. A second counter 17 increments in response to an output of an AND circuit 30. As a result, an address decoder 18 selects the next address. Erase processing is effected by the input of the erase signal E to a write unit 5. In response to an erase processing signal of Fig. 3(v), the data in the corresponding address is erased from a memory array 26. During this period, the MPU 10 stands by for a time T, and, after time T has elapsed, a writing signal W is output from the I/O port 9, as shown in Fig. 3(vi), and a write unit 5 writes the data in the data register 25 into the non-volatile memory at a predetermined address in a memory array 26, as shown in Fig. 3(vii). In this way, a series of write operations are executed. As shown in Figs. 3(viii) and 3(ix), signals from the second counter 17 and the addresses N₁, N₂ ... N N are output in synchronism with the transfer of data to the data register (C). The data is read out from the non-volatile memory in response to a reading signal R from the I/O port 9 when there is an output from the power-on determination unit 28. First, the signal R is output from the I/O port 9 to increment the second counter 17, as shown in Fig. 4(iii). The next read address is then designated by the address decoder 18, and the memory at the designated address in the memory array 26 is read out by a read circuit 27, and that data is sent to the data register (C) 25, as shown in Fig. 4(iv). After the data read has been completed, a signal O₄ is input to the I/O port 32 to inform the MPU 10 that the read is completed. The data item N i is then transferred from the data register (C) to a data register (A) 20, as shown in Fig. 4(vi). The signal R is again output from the I/O port 9 to increment the second counter 17, and data item N i+1 in the next address is read and sent to the data register (C) 25 in the same way. The data is then transferred to a data register (B) 21, as shown in Fig. 4(vii), a subtraction circuit 22 is operated and its output is compared by a second comparator 23 with the output of a preset distance output unit 24. When the output is equal to the preset distance, a signal O₂ is output, as shown in Fig. 4(ix), to the I/O port 32, the MPU 10 is informed, and the value in the data register (B) is then transferred to a RAM (B) 29. Next, as shown in Fig. 4(xi), a third comparator 33 compares a RAM (A) 19 with RAM (B) 29 and generates an output signal O₃. When the value in RAM (A) is less than that in RAM (B), as shown in Fig. 4(xiii), the maximum value of RAM (B) is input to RAM (A) 19. This process is executed until all the data has been read out of the memory. The value in RAM (A) is taken to be a read value, and is stored in the RAM 12 as an initial value for the total distance data. When RAM (A) ≧ RAM (B), the contents of RAM (B) are not transferred to RAM (A). With the construction of Fig. 2, data on the total distance travelled is written successively into one of a plurality of locations N₁ to N N at which data on the total distance is stored in the non-volatile memory 7, every distance of 100 meters. Therefore, even if data written later is incorrect because of a problem during writing, data on the previous 100 meters remains. This means that the initial value of the total distance travelled can be set in the RAM 12 with an error of a distance of 100 meters. Although the limit for writing data into the non-volatile memory 7 is usually about ten thousand times, alternate use of N memory locations helps extend the life of the memory N times. In addition, since distance is recorded every 100 meters, a measurement error of more than 100 meters is not possible. When reading out the data, furthermore, a second comparator 23 checks whether the difference between the maximum value in the data on total distance travelled and the data item stored just before that maximum value is equal to the preset distance, so that the measurement accuracy can be further increased. With reference to Fig. 5, when the power is turned on in step 40, initial processing is executed in step 41 to set initial values in the registers and the memory, and processing is executed in step 42 to read out correct data from the non-volatile memory. The program then enters an ordinary processing loop. Step 43 checks whether data can be written into the RAM. When writing is enabled (a write flag is set), the program proceeds to the write processing of step 44. When data can not be written, the program goes to a stand-by condition, or the interrupt processing of Fig. 6 is executed. The interrupt processing shown in Fig. 6 is initiated with an interrupt step 46, the MPU 10 executes the pulse count and calculation of distance travelled in steps 47, 48, and in step 49, the first comparator generates an output signal O₁ every 100 meters. The MPG 10 calculates the total distance travelled in step 50, and an output from the I/O port 13 executes a display in step 51. Step 52 sets the write enable status in the main processing, and in step 53 the program returns to the point at which the interrupt was initiated in the main processing. The write processing shown in Fig. 7 corresponds to step 44 of Fig. 5. When the write flag of step 43 is set, the address decoder 18 renews the address in step 54. The write unit 5 erases the memory in step 55. In step 56, the distance travelled is written successively into locations N₁ to N N in the non-volatile memory 7 used for storing the total distance travelled, in the sequence of N₁ to N N . If the data in memory 7 is not n times 100 meters after the write processing has finished, step 45 prevents the writing of data into the RAM 12. The read processing shown in Fig. 8 corresponds to step 42 of Fig. 5. After the power is turned on, the address decoder 18 designates address N₁ of the non-volatile memory 7 at step 46. In step 47, the read circuit 27 is driven by the signal R, and in step 48, the data in address N₁ is transferred to the data register (A). In step 49, the address decoder 18 designates address N₂ of the non-volatile memory 7, the content of address N₂ is read in step 50, and is transferred in step 51 to the data register (B). In step 52, the content of data register (A) is subtracted from the content of data register (B), and the second comparator 23 performs its calculation in step 53. If the second comparator 23 generates a positive output, the content of data register (B) is transferred to RAM (B) 29 in step 54. After the content is transferred in step 54, or after the output of the second comparator 23 is determined to be zero in step 53, the calculation RAM (A) - RAM (B) is executed in step 55. If the result of the calculation in step 55 has a negative value, the content of RAM (B) is transferred to RAM (A). When the calculation RAM (A) - RAM (B) provides a positive after step 56 or in step 55, step 57 checks whether this calculation has been effected for all the addresses N₁ to N N . When the answer obtained by step 57 is yes, a maximum value remains in RAM (A) for step 43. When the answer of step 57 is no, the above calculation is executed for N₂ and N₃, N₃ and N₄ ... N N-1 and N N , N N and N₁. A so-called direct address system is employed in the non-volatile memory shown in Fig. 1 in which the data is stored in the memory in the order of N₁, N₂ ... N N. Fig. 10 shows a second embodiment. A so-called indirect address system is employed in the non-volatile memory of Fig. 10. The indirect address system used is described below with reference to Fig. 9. In the indirect address system, the memory is divided into locations N₁ to N₄ for storing data and locations A₁ to A₄ for storing addresses, the locations A₁ to A₄ for addresses are first read out, and then the addresses N₁ to N₄ corresponds to the contents thereof are read again. What makes the electronic odometer of Fig. 10 different from the electronic odometer of Fig. 1 is the provision of first and second read units 35, 36, and first and second address-changing units 37, 34. The first address-changing unit 37 is used to change the indirect addresses A₁ to A₇, and the second address-changing unit 34 is used to change the direct addresses N₁ to N₄. In the electronic odometer of Fig. 10, the first address-changing unit 37 designates indirect addresses A₁ to A₄ in response to the output of the preset distance determination unit 2, so that the first read unit 35 reads from the non-volatile memory 7 the direct addresses N₁ to N₄ corresponding to the indirect addresses A₁ to A₄. The direct addresses N₁ to N₄ are then input to the second address-changing unit 34, and the write unit 5 writes the result calculated by the arithmetic unit 3. After the calculation result is thus written, the second read unit 36 reads the thus-written value, and a comparator unit 33 compares it with the previous value, and, only when these values are not equal, the content of the address indicated by the first address-changing unit is renewed to designate a new area for the writing of data. Fig. 11 is a diagram of a specific embodiment of Fig. 10. What makes this embodiment different from the embodiment of Fig. 2 is that an address register 39 for changing the direct addresses is provided, and the second counter 17 is operated by a signal R₀. Fig. 12 is a timing chart illustrating the operation of the embodiment of Fig. 10. This operation will be described below with reference to Fig. 12. The first counter 15 increments as the distance travelled increases, as described earlier with reference to Fig. 3, and generates an output O₁ when a preset distance is travelled, as shown in Fig. 12(iii) so that the data of total distance travelled in the RAM 12 is transferred to the data register (C) 25 and the RAM (B) 29. The I/O port 9 then generates a signal R₀, and the second counter 17 is incremented to select the address A₁. Then, in response to a signal R, the direct address N₁ corresponding to the indirect address A₁ is read out from the memory array 26, and is transferred from the data register (C) 25 to an address register 39. This address is set to N₁ by the address decoder 18, a signal E is generated to execute erase processing, and then a signal W is generated to write the data into the memory array 26. Thereafter, the signal R is immediately generated for the read processing, and data is transferred to the RAM (A) 19. Next the content of RAM (A) is compared with that of RAM (B), and, only when they are not equal, the content of the address specified by the first address-changing unit 37, i.e., that indicated by the second counter 17, is renewed from N₃ to N₅, as shown in Fig. 12(vii), to prevent the use of a defective area of the memory, and the data is rewritten into the new address. With this method, the memory can be used to the maximum until it becomes defective, and its life can be extended. The flow charts of the main processing, interrupt processing and read processing of the arithmetic unit of Fig. 11 are the same as those of Figs. 5, 6, and 8. The write processing of the arithmetic unit of Fig. 11 is executed according to Fig. 13. In Fig. 13, step 58 is executed by the second counter 17, and steps 59 and 60 are executed by the input of signals E and W to the write unit 5. step 61 confirms the writing, and is executed by the input of signal R to the read circuit 27. Step 62 is executed by a third comparator 33, if the answer obtained by step 62 is yes, step 26 resets the write flag. However, if the answer of step 62 is no, the address register 39 designates the area for a new direct address in step 63. In step 64, the total distance is rewritten into the new direct address by the address register 39 and the write unit 5, and simultaneously the new, changed address is written onto the corresponding indirect address by the second counter 17 and the write unit 5. Referring to a third basic block diagram in Fig. 14 what makes this embodiment different from that of Fig. 1 is the provision of a power source 42, a power-on detection unit 40, and a power-off detection unit 41. In addition, another address in a different area is designated, different from the address indicated by the first address-changing unit 44 that writes the data onto the non-volatile memory 77 every preset distance when the power is on, and the data on total distance travelled is written into that designated other area address when the power is off, so that the data can be written into the non-volatile memory 7 even when the power is off. Referring to Figs. 15 and 16, the content of the first counter 15 increases according to the distance travelled when the power is on, and a signal O₁ is generated every preset distance. The I/O port 9 outputs two pulses at a time to form the signal E, as shown in Fig. 16(v). During this time, the second counter 17 changes in succession while indicating even-numbered addresses, so that the data is written successively into even-numbered addresses of the memory array 26. When the power source 42 is off, the MPU 10 determines that the power is off, and the I/O port 9 outputs one pulse of the signal E as shown in Fig. 16(v). In this case, the second counter 17 is incremented by one. Therefore, the address has an odd number, and the data is written into odd-numbered addresses when the power is off. When data is to be read out, the power is turned on, and a signal E consisting of two pulses is output, so that a maximum value A measured every preset distance is read out from even-numbered addresses of the non-volatile memory. To read the distance travelled until the power was turned off, the signals E are output from the I/O port 9. That is, only one pulse is output the first time, and two more pulses are output each subsequent time, so that 1, 3, 5 ... pulses are output in sequence, and these are input successively to odd-numbered addresses of the non-volatile memory 7. A maximum value B is then read from the odd-numbered addresses of the memory array 26. The maximum values A, B are each transferred to the data register (A) 20 or the data register (B) 21, and the subtraction circuit 22 subtracts the content of data register (B) 21 from that of data register (A). The second comparator 23 determines whether the output of the subtraction circuit 22 is less than a certain distance (for example, 2.5 km). If the output of the subtraction circuit 22 is less than that distance, the maximum value B is employed as the initial value for the read-out. If the output of the subtraction circuit 22 is greater than that distance, the maximum value A is employed as the initial value. In this way, the distance travelled until the power was turned off can be indicated. It is also possible to store a fraction (for instance, 20 meters) of the data on distance travelled until the power was turned off, i.e., until the vehicle stopped (when the key was turned off), to further increase the measurement accuracy. Even when erroneous data is input, an increased realiability is maintained for measuring the distance travelled, since the data is written every preset distance. Referring to the main processing shown in Fig. 17, the initialization of RAM 12 is executed in step 66. The read processing in step 67 is executed by the read circuit 27, details of step 67 are shown in Fig. 19. In step 68, the power-on determination unit 28 determines whether or not the key is turned off, i.e., whether or not the power is on. The power-on determination unit 28 consists, as shown in Fig. 14, of the power sources 42, the power-on detection unit 40, and the power-off detection unit 41. When the key is turned off, the signal E is input pulse-by-pulse to the second counter 17, as shown in Fig. 16(v), and, consequently, the address is incremented by one so that the distance travelled is recorded at an odd-numbered address of the memory array 26. If the answer obtained at step 68 is no, the RAM 12 checks in step 70 whether the write flag is set. When it is determined in step 70 that the write flag is set, the signal E is input in two-pulse bursts to the second counter 17 in step 71, as shown in Fig. 16(v), and, consequently, the write address is incremented by two so that the distance travelled is stored in an even-numbered address of the memory array 26. When there is no write flag, the program restarts from step 68. In step 72, the memory is erased by the input of the signal E to the write unit 5. In step 73, the signal W is input to the write unit 5, and data on the total distance is written into the memory array 26. In step 74, the write flag of RAM 12 is reset, and the program goes back to step 68. In the interrupt processing shown in Fig. 18, the program starts with an interrupt of step 75. In step 76, the number of pulses output by the pulse generator 1 is counted by the MPU 10, and in step 77, the MPU 10 calculates the distance travelled. In step 78, the MPU 10 checks whether or not a preset distance (for example, 100 meters) has been travelled. If the answer obtained by step 78 is yes, the MPU 10 calculates the total distance travelled in step 79. If the answer to step 78 is no, the program proceeds to step 83 and returns to the start of the interrupt in the main processing. In step 80, the total distance travelled is latched and displayed. In step 81, the first comparator 16 checks whether or not a certain distance (for example, 2.5 km) has been travelled. If the answer obtained by step 81 is yes, the RAM 12 resets a distance-write flag in step 82. The program proceeds to step 83 if the answer of the step 81 is no, after step 82 has been finished. Writing of the total distance data of Fig. 17 is performed in the same manner as in the flow chart of Fig. 7. In the read processing of Fig. 19A, steps 84 through 95 are executed in the same manner as steps 46 through 57 of Fig. 8. In Fig. 19, data items N i and N i+2 are successively read out by steps 85 to 89, a maximum value A is read from the even-numbered addresses and is stored in the data register 20 by steps 90 to 97, the addresses are changed to odd-numbered addresses in step 99, and another maximum value is read from the odd-numbered addresses in steps 85 to 95. In step 96, the address is determined to be an odd number, and the program proceeds to step 97. In step 98, a check is made as to whether the address read out from the non-volatile memory 7 designates an odd-numbered address N 2N-1. If the result of the check of step 98 is yes, the program proceeds to step 100 of Fig. 19B. In step 100, the maximum value B is stored in the data register 21, and in step 101, the second comparator 23 performs a comparison. If the result of step 101 proves that the output of the second comparator 23 is greater than a certain distance (for example, 2.5 km), the maximum value A is employed as distance data in step 102. If the output of the second comparator 23 is less than that distance, the maximum value B is employed as distance data in step 103. Accordingly an electronic odometer is provided which is capable of extending the life of a non-volatile memory therein, and which is capable of accurately indicating the total distance travelled by a vehicle.

Claims: An electronic odometer comprising: an arithmetic unit (3) connected to receive data of an actual distance travelled for calculating a total distance travelled; a determination unit (2) connected to said arithmetic unit (3) for determining whether a preset distance has been travelled; a non-volatile memory (7) having N addressable storage locations into which data of distance travelled is written one-by-one every time said preset distance is travelled; an address-changing unit (4; 34, 37) for sequentially selecting the N addressable storage locations of said non-volatile memory; a write unit (5) responsive to an output of said preset distance determination unit (2) for writing the total distance calculated by said arithmetic unit (3) in one of the sequentially selected addressable storage locations in said non-volatile memory (7) every time said preset distance is travelled; a read unit (6; 35, 36) responsive to said arithmetic unit (3) for reading out data written into said non-volatile memory (7) and for inputting said data of total distance travelled to said arithmetic unit (3); and a display means (8) for displaying the results calculated by said arithmetic unit characterized in that said address-changing unit (34, 37) is provided with a first address-changing unit (37) and a second address-changing unit (34), said non-volatile memory (7) is divided into indirect address storage locations (A1-A4) for storing addresses and data storage locations (N₁...N₇) for storing data corresponding to each indirect address, said read unit is provided with a first read unit (35) and a second read unit (36), said first read unit (35) and said first address-changing unit (37) are responsive to an output from said preset distance determination unit (2), the indirect address data is read out by said first read unit (35) and input to said second address-changing unit (34) so that said second address-changing unit selects the next address (N₁...N₇) of said indirect address storage locations and the data of total distance travelled is written into a data storage location by said write unit (5), the data thus written is read out by second read unit (36), said data is compared by a comparator circuit (33) with previous data to determine whether they are equal to each other, and, when they are not equal, the data of said indirect address storage location (A1) is changed to a new address (N₂...N₇) by said first address-changing unit so as not to use a failed address (e.g. N₁) and a new data of a total distance travelled is written by said write unit (5) into a new data storage location (N₂...N₇). The electronic odometer according to claim 1, characterized in that a further comparator circuit (23) is provided for determining whether the difference between said maximum value and the previous data stored immediately before said maximum value is equal to said preset distance (24); wherein when said difference is equal to said preset distance travelled, said maximum value (97) is input to said arithmetic unit; but when said difference is not equal to said preset distance, said comparator circuit (23) determines whether the difference between said previous data stored immediately before said maximum value and the data stored immediately before said previous data is equal to said preset distance, so that when that difference is equal to said preset distance, said data stored immediately before said maximum value is input to said arithmetic unit; but when that difference is not equal to said preset distance, the same determination is repeated for subsequent previous data until the difference becomes equal to said preset distance travelled, and the data thus determined is input to said arithmetic unit (3). The electronic odometer according to claim 2, characterized in that, further including a power-on determination unit (28); said address-changing unit (4) being operated in response to the output of said distance determination unit (2) and said power-on determination unit (28) whereby the addresses provided by said address-changing unit (4) are incremented by two in succession when a power source (42) is on (40), and when said power source is off (41) are incremented by one. The electronic odometer according to claim 3, characterized in that, said read unit reads data when an output is generated by a power-on determination unit (28), said read unit (101-103) selects a maximum value A from even numbered addresses written according to said address-changing unit and also selects a maximum value B from preset distance data from storage locations indicated by odd numbered addresses written according to said address-changing unit, and when a value obtained by subtracting said maximum value B from said maximum value A is less than said preset predetermined distance and has a positive value, said read unit reads out said maximum value A from said even numbered address storage locations, otherwise said read unit reads out said maximum value B from said odd numbered address storage locations and inputs said read value to said arithmetic unit.

Inventors: KATOHGI, KOHZO, NAITO, SHOTARO, YAMAMURA, HIROHISA
Applicants: HITACHI, LTD.
Application year: 1984
Main classification: G01C22
IPC codes: G01C22, H03K21