GENERIC COMMUNICATIONS TERMINAL

Abstract: A communications terminal (10) capable of being configured so as to emulate the protocol and functional characteristics of and thus communicate with a variety of data processing units (12, 14, 16, and 18). The terminal (10) includes a microprocessor (22) coupled to volatile memory (26) and the first (32) and second nonvolatile (34) memories. A first set of instructional signals stored in the first nonvolatile memory (32) controls the microprocessor (22) so that communication with a host computer (18) can be established. The host computer (18) transmits to the terminal (10) emulation data which is stored in the second nonvolatile memory (34) as a second set of instruction signals. Thereafter, in order to communicate with another data processing unit (12, 14, or 16), the microprocessor (22) of the terminal (10) is controlled by the second set of instruction signals.

Description: GENERIC CXJMMUNICATIONS TERMINAL BACKGROUND OF THE INVENTION The present invention relates to the field of data pro¬ cessing and, more particularly, to an apparatus and method for providing communication between a terminal and any one of a plu- rality of data processing units, of which each data processing unit may be characterized by signals of a unique protocol and/or functional characteristics. Data processing units, such as computers, are typically accessed by means of terminals remotely located from the pro- cessing unit, itself. For example, the computer may be located in an area which is climate controlled and which provides for monitoring of the computer by trained technicians, whereas the terminals may be located, instead, in the user's own office or home, distantly removed from the computer. Remotely located ter- minals are often found in applications where a user may wish to contact any one of a number of computers via a telephone or leased circuit link in order to take advantage of specialized services associated with each computer. In communications between a computer and user termi- nals, the information which is exchanged is of a predetermined protocol. At present, three primary systems of protocol are in use: asynchronous, synchronous and system network architecture. In asynchronous operation, signals are exchanged between computer and terminal in the form of eleven bits per word, each word including one or two bits to indicate the start of the word and one bit to indicate the end. Synchronous operation, on the other hand, involves communicating with streams of digital signals in which each individual word is defined by seven bits without the use of start or end bits. A similar arrangement is used for sys- tern network architecture protocol. In addition to identity in system protocol, communi¬ cation between a terminal and a data processing unit requires identity of functional characteristics. Such characteristics relate to the manner in which control functions, e.g. error detecting, screen enabling, line sizing, etc., are effected between the data processing unit and the terminal. In other words, while system protocol relates to a transport level, functional characteristics relate to a presentation level To achieve intelligent communication between a terminal and a data processing unit, therefore, it is necessary that the terminal operate with the same system protocol and the same func¬ tional characteristics as the computer with which communication is desired. For instance, a synchronous terminal could not com¬ municate with an asynchronous computer, and vice versa. Even within the three general protocol systems there exist variations in protocol which likewise necessitate identity between the ter¬ minal and computer. For convenience, system protocol and func- tional characteristics are hereafter referred to as system format. The problem thus arises that a user having a terminal generating and receiving signals of one protocol cannot communi¬ cate with a data processing unit of another protocol. For exam- pie, a terminal configured to operate with a computer manufac¬ tured by Digital Electronics Corporation, which traditionally uses asynchronous protocol, cannot be used to communicate with a Honeywell computer which utilizes synchronous operation. Users find themselves severely limited as to the number of data pro- cessing units with which they may communicate by means of the one terminal they may own or lease. Users may also find themselves severely limited by the functionality characteristics of their terminal even if the same line protocol is being used and they can communicate in a limited mode. 5 Furthermore, manufacturers of data processing units may switch from one system format to another as new types of equip¬ ment are added to their existing product lines. IBM, for exam¬ ple, manufactures a Model 3031 data processing unit which uti¬ lizes asynchronous communication, but also makes a Model 3276 Q data processing unit which utilizes bisynchronous and synchronous data link control communications protocols. Thus, in upgrading data processing units to include the latest model of equipment, it may be necessary to acquire new terminals of a different sys¬ tem format since the existing ones would not work with the new 5 data processing unit. For users in industrial or educational arenas, such a problem may be critical inasmuch as their computer may be accessed by several hundred terminals, all of which would have to be replaced. To date, terminals have been developed having multiple protocol emulations which allow for communication with a number of data processing units, presuming the appropriate emulation has been provided in the terminal. However, the emulations so pro- vided are fixed as of the time of manufacture and cannot be changed or supplemented once the terminal leaves the place of assembly and is acquired and installed by the user. Furthermore, the pace at which data processing technology is changing creates problems in that such terminals cannot accommodate new protocol systems developed after manufacture of the terminal. SUMMARY OF THE INVENTION Accordingly, it is an object of the invention to emu¬ late in a communications terminal the protocol any functional characteristics of mainframe terminals for any data processing unit. It is another object of the present invention to imple¬ ment a different emulation system in a terminal even after manu¬ facture thereof. It is also an object of the present invention to pro- vide emulation protocol capable of being implemented into the terminal in a simple and efficient manner, without need for disassembling or replacing parts thereof. Additional objects and advantages of the present inven¬ tion will be set forth in part in the description that follows and in part will be obvious from the description or may be learn¬ ed by practice of the invention. The objects and advantages of the invention may be realized and obtained by the methods and apparatus particularly pointed out in the appended claims. The present invention overcomes the problems of the prior art and achieves the objects listed above by means of a nonvolatile memory device connected to a microprocessor contained within a communications terminal. By communicating with a host computer, emulation protocol and functional characteristics can be loaded by the host computer into the nonvolatile memory device of the terminal. Thereafter, operation of the terminal by the microprocessor is controlled by means of the emulation format which has been stored into the nonvolatile memory. If communi¬ cation with a further data processing unit having another system format associated therewith is desired, communication with the host computer is reestablished so that the system format associ¬ ated with the further data processing unit can be down-loaded into the terminal, following which communication with the further data processing unit can be achieved by utilizing the new system format emulation. To achieve the objects and in accordance with the purpose of the invention, as embodied and as broadly described herein, a terminal for communicating with a plurality of data processing units, each data processing unit transmitting and receiving first signals characterized by a unique format associ¬ ated therewith, comprises: a microprocessor adapted to be cou¬ pled to data processing units for receiving and transmitting the first signals; volatile memory means coupled to the micropro- cessor for temporarily storing second signals delivered by the microprocessor; first nonvolatile memory means coupled to the microprocessor for storing a first set of instructional signals; and second nonvolatile memory means coupled to the microprocessor for storing a second set of instructional signals used in com- municating with a selected one of the data processing units, the second set of instructional signals being used by the micropro¬ cessor for receiving and transmitting the first signals in the format associated with the selected one of the data processing units, whereby communication with a different data processing unit other than the selected one of the data processing units can be accomplished by storing a different second set of instruction¬ al signals in the second nonvolatile memory means. Also according to the present invention, a method for communicating between a terminal having a microprocessor, a vola- tile memory, and first and second nonvolatile memories, and any one of a plurality of data processing units, each data processing unit transmitting and receiving first signals characterized by a unique format, comprises the steps of: communicatively coupling the microprocessor to a predetermined one of the data processing units so as to receive the first signals therefrom; storing the first data signals received from the predetermined one of the data processing units in the second nonvolatile memory as in¬ structional signals; coupling the microprocessor with the OMP WIP selected one of the data processing units; and controlling the microprocessor with the instructional signals stored in the second nonvolatile memory, whereby the microprocessor is configured to transmit and receive first data signals in the format associated with the selected one of the data processing units. The accompanying drawing, which is incorporated in and constitutes a part of this specification, illustrates one embodi¬ ment of the invention and, together with the description, serves to explain the principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS The Figure is a general block diagram of a generic com¬ munications terminal in accordance with the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENT Reference will now be made in detail to a presently preferred embodiment of the invention, an example of which is il¬ lustrated in the accompanying drawing. The preferred embodiment of the generic communications terminal is shown in the Figure and is generally denoted by the dashed lines designated by reference character 10. The terminal 10 may communicate with any one of a number of data processing units (DPU's) 12, 14, 16 and 18. The number of data processing units shown in the drawing is merely illustrative for purposes of the following discussion; fewer or more units may be made avail- able for communication with terminal 10 in accordance with the invention. Also for purposes of the following discussion, the system format associated with each data processing unit has been designated as asynchronous ACSII operation for DPU 12, asyn¬ chronous ANSI operation for DPU 14, bisynchronous operation for DPU 16 and asynchronous ASCII operation for DPU 18. Again, this arrangement is merely illustrative and may be adapted or changed in actual practice. Communication between the data processing units and terminal 10 is provided via a transmission medium 20. According to a presently preferred embodiment, medium 20 comprises common carrier telephone lines. It is within the confines of the pre¬ sent invention, however, to utilize as medium 20 other means such as coaxial cables, microwave transmission, dedicated circuits. fiber optics, or the like. Furthermore, communication with each data processing unit may be provided by means of separate trans¬ mission media 20 coupled individually to each one of data pro¬ cessing units 12, 14, 16 and 18 rather than by a common bus ar- rangement as shown in the Figure. It is to be understood from the Figure that terminal 10 is arranged to communicate with any one of a plurality of data processing units such as DPU's 12, 14, 16 and 18. Each DPU is capable of transmitting and receiving first signals characterized by a unique format, i.e. functional characteristics or protocol. The first signals include both data and control signals, and may be transmitted from terminal 10 to the selected DPU or vice versa. According to the present invention, a generic communi¬ cations terminal includes a microprocessor adapted to be coupled to the data processing units for receiving and transmitting the first signals. As embodied herein, the microprocessor is desig¬ nated by reference character 22 and may comprise any one of a number of well-known microprocessors capable of performing specified operations in response to digital signal inputs. In a presently preferred embodiment, microprocessor 22 is a Z80 based Intel 8085 integrated circuit microprocessor. Also according to the invention, means are coupled to the microprocessor for interfacing the terminal with a transmis¬ sion medium such that communication between the terminal and the data processing units can be accomplished via the transmission medium. As embodied herein, the interfacing means includes a communication interface 24 which couples microprocessor 22 with medium 20. In the case that medium 20 includes common carrier telephone or dedicated lines, communications interface 24 may include a data transmission device adapted to convert digital signals into audio form and back. Interface 24 may also include a modulator-demodulator (modem) to accomodate transmission of data at various speeds (baud rate) over the transmission medium. The modem may comprise any one of a number of designs well-known in the art. In the case that medium 20 includes microwave trans¬ mission means, communication interface 24 could include a micro¬ wave transmitter and receiver capable of converting microwave signals into digital signals and vice versa. Thus, communication interface 24 will vary according to the type of medium 20 being used and, inasmuch as the specific design of a communications interface for a given medium is readily apparent to one of ordi¬ nary skill in the art, no further details of the interface are necessary. According to the present invention, the terminal includes volatile memory means coupled to the microprocessor for temporarily storing signals delivered by the microprocessor. As embodied herein, the volatile memory means include a random access memory (RAM) 26. RAM 26 is of a well-known design and, according to a presently preferred embodiment, may comprise a 16K RAM such as the Hitachi 2114. In order for microprocessor 22 to access locations and manipulate data in RAM 26, a set of control bus lines generally designated 28 is provided to carry read controls, write controls and memory address information. Data being stored in the RAM or accessed therefrom is handled via a data bus line 30. Bus lines 28 and 30 and the appropriate con¬ nections with the microprocessor and RAM 26 are all well-known in the art and require no further explanation. According to the present invention, the communications terminal has first nonvolatile memory means coupled to the micro¬ processor for storing a first set of instructional signals. As embodied herein, the first nonvolative memory means comprise a read only memory (ROM) 32. ROM's are well-known in the art and are devices capable of permanently storing information placed in memory such as by destroying fusible internal elements. Also well-known in the art are programmable read only memories (PROM's) which, like ROM's, are nonvolatile in that information stored therein is not lost in the event power to the PROM is removed. Unlike ROM's, however, PROM's present an advantage in that reprogramming can be achieved after clearing the memory by subjecting the device to means such as ultraviolet light. Al¬ though more expensive than most ROM's, a PROM may also be used in terminal 10 as the first nonvolatile memory means 32. In order to access the instructional signals stored in memory 32, micro¬ processor 22 delivers control signals thereto via bus lines 28, as described above, and receives data via bus line 30. While the b lock diagram illustrated in the Figure shows memories 26 and 32 having common bus lines for control and data, it is to be understood that separate lines from each memory to the micropro¬ cessor may be provided without deviating from the spirit of the present invention. In accordance with the invention, the terminal also includes second nonvolatile memory means coupled to the micropro¬ cessor for storing a second set of instructional signals used for communicating with a selected one of the data processing units. As embodied herein, the second nonvolatile memory means includes memory 34 which is capable of storing and retaining information even in the event of a loss in power. In a presently preferred embodiment, memory 34 comprises an electronically erasable pro¬ grammable read only memory (EEPROM), such as the Hitachi 6116P 16K EEPROM. Such devices are known in the art and are capable of reprogramming following application of predetermined electrical signals. As in the case of memories 26 and 32, microprocessor 22 is coupled to memory 34 via bus lines 28 and 30 which carry control and data signals, respectively. As set forth above, it is to be understood that individual connections may be provided between memory 34 and microprocessor 22 to achieve the desired operation, instead of utilizing common bus lines 28 and 30. According to the invention, the terminal includes means coupled to the microprocessor for manually causing the micropro¬ cessor to develop the first and second signals. As embodied herein, these means may comprise a keyboard 36 connected in a known fashion to microprocessor 22. By means of keyboard 36, an operator may manually type in information ultimately delivered to the data processor units as first signals or delivered to memory 26 as second signals utilized locally by terminal 10. In accordance with the present invention, the terminal has means coupled to the microprocessor for displaying informa¬ tion delivered by the microprocessor. As embodied herein, the display means may include a buffer 38, a character generator 40 and a video display 42. Buffer 38 may comprise a volatile memory connected to receive information from microprocessor 22. The in¬ formation stored in buffer 38 is converted by character generator 40 into signals suitable for display on a television screen, which comprises video display 42. The particular design of elements 38, 40 and 42 are well-known in the art. It is noted, however, that inasmuch as buffer 38 comprises a volatile memory under the control of microprocessor 22, buffer 38 may in practice be a part of memory 26, which is also a volatile memory device under the control of microprocessor 22. This relationship is designated by the dot-dash line in the Figure. Terminal 10 may also be provided with an auxiliary port 44 coupled to both buffer 38 and microprocessor 22. By means of auxiliary port 44, additional equipment such as a printer or a disk drive may be coupled to the terminal system. The connection between such auxiliary equipment and a terminal is well-known in the art. The operation of a terminal according to the present invention will now be described in detail with reference to the Figure. At the time of manufacture, nonvolatile memory 32 is provided with a first set of instructional signals permitting in¬ telligent communication between the terminal 10 and a predeter¬ mined one of the data processing units, referred to as the "host" computer. In the Figure, DPU 18 is designated the host computer and, for purposes of the following discussion, it has been pre¬ sumed that DPU 18 generates and receives first signals of the asynchronous ASCII protocol format. Thus, at the outset, micro¬ processor 22 of terminal 10 is controlled by the first set of in¬ structional signals stored in memory 32 so as to communicate in- telligently with the host data processing unit 18. Communication with the host computer 18 is accomplished by first, adapting communications interface 24 so as to selec¬ tively couple terminal 10 with host computer 18 via medium 20. In the case of a telephone link, for example, this step would in- volve dialing the telephone number corresponding to the location of host computer 18, which may comprise a tape or disk media storage device, and then placing terminal 10 in communication therewith. Once coupling has been accomplished, the operator can communicate with the host computer by means of keyboard 36 and receive information therefrom that is displayed on video display 42. In this mode, microprocessor 22 is controlled in accordance with the first set of instructional signals stored in memory 32. For a host computer operating in asynchronous ASCII mode, the O P data stored in memory 32 controls microprocessor 22 so that the microprocessor looks for incoming first signals from the host computer 18 as being of asynchronous ASCII type system format. Microprocessor 22 can intelligently receive these signals from the host computer and, in response thereto, can produce second signals delivered to memory 26 or to buffer 38 or to the auxilia¬ ry port 44. Similarly, instructions and data input by the opera¬ tor through keyboard 36 may be transmitted to the host computer in asynchronous ASCII system format intelligible to the host com- puter. If the operator desires to communicate with another one of the data processing units 12, 14, or 16, the operator inputs information via keyboard 36 from which the host computer can ascertain the appropriate system format needed by the terminal to accomplish the desired communication; for instance, the operator may input information regarding the identity of the data pro¬ cessing unit which is to be contacted, or which system format is associated with the desired data processing unit. Host computer 18 contains in memory data which is used by the terminal to emu- late the system format associated with the various data pro¬ cessing units with which the operator may wish to communicate. This emulation data is selectively accessible by the operator such that the data corresponding to the particular data pro¬ cessing unit with which communication is desired can be down- loaded into the terminal to accomplish emulation. Thus, upon appropriate entry, host computer 18 transmits to terminal 10 signals which are used by the terminal to emulate the desired format. This occurs by host computer 18 transmitting first signals in asynchronous ASCII format to microprocessor 22, these signals being converted to second signals and stored in memory 26 by microprocessor 22 under control of the first set of instruc¬ tional signals stored in memory 32. After the second signals, which comprise emulation data, have been stored in memory 26 and have been verified by means such as parity bits or other error- detecting systems known in the art, the first set of instruc¬ tional signals contained in memory 32 cause microprocessor 22 to transfer the data from memory 26 to memory 34. The signals so stored in memory 34 comprise a second set of instructional signals and will be used by microprocessor 22 in communicating with the selected one of data processing units 12, 14 and 16. In the foregoing example, first signals transmitted by host computer 18 are stored in memory 26 as second signals, and then transferred in a block to memory 34 to comprise a second set of instructional signals. The information is manipulated in this manner inasmuch as EEPROM's currently available in the market¬ place are most efficient in storing information when the informa¬ tion is presented to the memory device in a block. Furthermore, routing of the information via memory 26 permits microprocessor 22 to store the information in the convenient arrangement so that it may more easily be transferred to memory 34; the order in which the second signals are stored in memory 26 is controlled by the first set of instructional signals of memory 22. It is con- templated, however, that subsequent developments in the technolo¬ gy of nonvolatile memory devices, such as the EEPROM, may permit operation of the system to be accomplished by directly storing a second set of instructional signals in memory 34 without having to first route the signals via memory 26. In any event, storing of the second set of instruction¬ al signals in memory 34 also causes the microprocessor 22 to be configured such that the microprocessor will henceforth look to memory 34 for instructional signals when communicating with the data processing units. This situation remains in effect even if power to the system is turned off. Once the second set of in¬ structional signals is stored in memory 34, the communications link with host computer 18 may be terminated and a new link established with the desired one of data processing units 12, 14 and 16. For example, if the desired data processing unit were to be DPU 16, the host computer would have caused a second set of instructional signals to be stored in memory 34 corresponding to bisynchronous protocol. In connecting terminal 10 to communicate with data processing unit 16, microprocessor 22 looks to the second set of instructional signals stored in memory 34 for control during communications with the data processing unit. In this manner, the desired format emulation can be accomplished. Included in the emulation data stored as the second set of instructional signals in memory 34 is a subroutine which causes microprocessor 22 to return to the first set of instructional signals contained in memory 32 upon instituting a particular command. By addressing this subroutine through the command, the operator can reestablish communication with host computer 18 at any time so that a different set of emulation data can be obtained therefrom and stored in memory 34 in the manner described above. The new emulation data is down-loaded from the host computer and stored as a second set of instructional signals in nonvolatile memory 34 in the manner described hereinabove. Thus, in storing this new emulation data in memory 34, the old emulation data will be lost unless it was stored in an entirely different location within memory 34. The programming codes necessary for obtaining the above-described routines, including emulation of the various sys- tern formats, will vary according to the type of microprocessor used in the terminal and are obvious to one of ordinary skill in the art of programming microprocessors. According to the present invention, therefore, a termi¬ nal is rendered capable of communicating with any one of a number of data processing units, each data processing unit characterized by signals having a unique system format, i.e. protocol or func¬ tional characteristics. This flexibility is accomplished by providing a second nonvolatile memory connected to a micropro¬ cessor in the terminal in addition to a first nonvolatile memory connected to control the microprocessor in local functions and in communicating with a host computer. Information for emulating the system format of the data processing unit with which communi¬ cation is desired is obtained from the host computer, temporarily stored in a volatile memory in the terminal and then transferred in a block to the second nonvolatile memory. Communication is then established with the desired data processing unit with the microprocessor being controlled by the information stored in the second nonvolatile memory. The data processing unit "sees" the terminal only as a terminal configured to communicate therewith, just as it would "see" any terminal constructed expressly for communicating with that data processing unit. Upon execution of a special command by the operator, however, the instructional signals stored in the second nonvolatile memory cause the OMPI microprocessor to again be controlled by the first set of instructional signals stored in the first nonvolatile memory so that communication with the host computer may be reestablished for purposes of obtaining a new format emulation which is down- loaded into the terminal in the same manner as described hereinabove. Since the present invention allows the host computer to control the operation of microprocessor 22 in accordance with a second set of instructional signals stored in memory 34, a termi- nal according to the present invention may be configured so as to operate as a self-contained microcomputer by down-loading the appropriate instructional signal from the host computer. In such a case, it would be desirable to expand the memory capacity of RAM 26 to 64K or even 128K, which can be accomplished by using static RAM's currently available in the marketplace. By means of the second set of instructional signals and expanded RAM capaci¬ ty, terminal 10 can operate as a microcomputer with the ever-pre¬ sent ability to return to being a communications terminal by means of the special command contained in memory 34 for reestab- lishing communication with host computer 18. It will be apparent to those skilled in the art that modifications and variations can be made in the generic communi¬ cations terminal apparatus and method of this invention. The in¬ vention in its broader aspects is, therefore, not limited to the specific details, representative methods and apparatus, and illustrative examples shown and described. Thus, it is intended that all matter contained in the foregoing description or shown in the accompanying drawing shall be interpreted as illustrative and not in a limiting sense.

Claims: WHAT IS CLAIMED IS: 1. A terminal for communicating with a plurality of data processing units, each data processing unit transmitting and receiving first signals characterized by a unique format associ¬ ated therewith, comprising: a microprocessor adapted to be coupled to the data processing units for receiving and transmitting the first signals; volatile memory means coupled to said micropro¬ cessor for temporarily storing second signals delivered by said microprocessor; first nonvolatile memory means coupled to said microprocessor for storing a first set of instructional signals; and second nonvolatile memory means coupled to said microprocessor for storing a second set of instructional signals used in communicating with a selected one of the data processing units, said second set of instructional signals being used by said microprocessor for receiving and transmitting the first signals in the format associated with said selected one of the data processing units whereby communication with a different data processing unit other than said selected one of the data pro¬ cessing units can be accomplished by storing a different second set of instructional signals in said second nonvolatile memory means. 2. A terminal as recited in claim 1 wherein said second nonvolatile memory means is further coupled to said vola¬ tile memory means, said microprocessor being controlled by said first set of instructional signals so as to cause said second signals stored in said volatile memory means to be transferred to and stored in said second nonvolatile memory means thereby forming said second set of informational signals. 3. A terminal as recited in claim 2 wherein said first set of instructional signals is used by said microprocessor for communicating with a predetermined one of said data pro¬ cessing units, said first signals transmitted by said predeter- mined one of said data processing units being stored in said vol¬ atile memory means as second signals, then being transferred to and stored in said second nonvolatile memory means as said second set of instructional signals. 4. A terminal as recited in claim 1 wherein said second nonvolatile memory means includes an electrically erasable programmable read only memory. 5. A terminal as recited in claim 1 wherein said vol¬ atile memory means includes a random access memory. 6. A terminal as recited in claim 1 further comprising means coupled to said microprocessor for manually causing said microprocessor to develop said first and second signals. 7. A terminal as recited in claim 1 further comprising means coupled to said microprocessor for displaying said second signals. 8. A terminal as recited in claim 7 wherein said dis¬ playing means includes: a buffer memory coupled to said microprocessor; a character generator coupled to said buffer memo- ry; and a video display coupled to said character genera- tor. 9. A terminal as recited in claim 8 wherein said vol¬ atile memory means includes said buffer memory. 10. A terminal as recited in claim 1 further including means coupled to said microprocessor for interfacing the terminal with a transmission medium such that communication between the terminal and the data processing units can be accomplished via said transmission medium. 11. A method for communicating between a terminal having a microprocessor, a volatile memory and first and second nonvolatile memories, and any one of a plurality of data pro¬ cessing units, each data processing unit transmitting and receiving first signals characterized by a unique format, comprising the steps of: communicatively coupling a microprocessor in the terminal to a predetermined one of said data processing units so as to receive first signals therefrom; O PI storing the first signals received from said pre¬ determined one of said data processing units in the second nonvolatile memory as instructional signals; coupling said microprocessor with a selected one of said data processing units; and controlling said microprocessor with the instruc¬ tional signals stored in said second nonvolatile memory whereby said microprocessor is configured to transmit and receive first data signals in the format associated with said selected one of the data processing units. 12. A method as recited in claim 11 wherein said storing step includes the steps of: converting the first signals by said micropro¬ cessor to form second signals; storing the second signals in the volatile memory; and transferring the stored second signals in a block to said second nonvolatile memory. 13. A method as recited in claim 11 wherein said com¬ municatively coupling step includes the steps of: storing informational signals in the first nonvolatile memory; controlling said microprocessor with the informa¬ tional signals stored in the first nonvolatile memory; and coupling said microprocessor with said predeter¬ mined one of the data processing units, whereby said micropro¬ cessor is configured by said informational signals so as to receive and transmit first signals in the format associated with said predetermined one of said data processing units. 14. A method as recited in claim 11 wherein said cou¬ pling steps each includes linking said microprocessor with a data processing unit via telephone lines. OMPI

Inventors: O'NEIL JAMES P, POWELL KEN R, O'NEIL, JAMES, P., POWELL, KEN, R.
Applicants: TERM TRONICS INC, TERM-TRONICS INCORPORATED
Application year: 1984
Main classification: G06F3
IPC codes: G06F13