IMPROVED LOCAL AREA NETWORK CONFIGURATION

Abstract: An improved network system (10) for communicating digital data between multiple devices (12) physically dispersed throughout a facility. The network system is comprised of a transmission medium (20) formed into first and second buses which are physically routed together, preferably as a single cable, through a facility containing the devices to be interconnected by the network. Each such device is coupled to the network by connecting it to both the first and second buses (24, 26) and digital data is transmitted unidirectionally along each bus in opposite directions. Each device (12) when transmitting, concurrently propagates digitally encoded signals in opposite directions along both buses. Each device (12) receives such encoded signals on either bus, dependent on its location relative to the transmitting device. Each device (12) is coupled to the buses by a network control subsystem, i.e., controller (14), which includes amplifier means (54, 56, 60; 62) which enables the operational length of the network to be extended in increments. Each controller (14) preferably also includes repeater means (58) to enhance noise immunity by reshaping and resynchronizing the signal transmitted along the network.

Description: IMPROVED LOCAL AREA NETWORK CONFIGURATION BACKGROUND OF THE INVENTION The present invention relates to improved local area networks for permitting digital communication between multiple devices such as microcomputers and/or computer peripherals. The literature is replete with articles which describe various local area networks (LAN's), all intended to functionally interconnect multiple microcomputers and/or computer peripherals (e.g., see "Battle of the Networkers," Datamation, March 1982, page 115). Such articles frequently classify the various local area networks in accordance with several distinguishing design characteristics. A first such design characteristic concerns the physical configuration, or topology, of the transmission medium forming the network. The three most commonly discussed network topologies are known as the bus, the ring, and the star. In a typical bus topology network, all work stations are coupled to the same bidirectional transmission medium such that each station broadcasts its message throughout the network and all stations receive all messages. In a typical ring topology network, all stations participate in the forwarding of messages. Messages are usually passed completely around the ring before returning to the transmitting station. In a typical star topology network, a controller at a central node, functions as a switch to interconnect point to point links. A second design characteristic concerns the type of transmission medium used to form the network. Typically, the medium might comprise twisted-pair wires , coax ial cable, or optical fibers. A twisted-pair wire installation is advantageous mainly because it is the least expensive . However , it is typically characterized by both bandwidth and distance limitations . Coaxial cable , on the other hand , offers a larger bandwidth and is sui table for reasonably long distances . However , a coaxial cable installation is more costly than alternative transmission mediums. An optical fiber installation offers the widest bandwidth with a cost typically somewhe r e be tween twisted-pair wire and coax ial cable . Optical f iber installations , however , generally do not afford the flexibility of interconnection along the network that is afforded by the aforementioned transmission mediums. third design characteristic concerns the method used to transmit the digital signals along the transmission medium. That is, much controversy exists about whether a broadband or baseband method of transmission is preferable. With broadband transmission, the data signal is typically carried on a radio frequency carrier . With baseband , on the other hand, the signal is transmitted directly on the medium, rather than on a carrier . Broadband transmission is more typically used in larger more complex facilities with a greater number of users . Baseband transmission , which can generally be achieved at a lower cost , is typically suitable for somewhat smaller facilities with fewer users. A fourth design character istic concerns the procedure used by the stations to gain entry to the network and share the transmission medium. The two most commonly used access methods are broadly referred to as "contention" and "controlled. " Contention methods are essentially random access in that a station attached to the network simply transmits a message without any prior scheduling or approval by a centralized networ k controller . Thus , contention methods necessitate the inclusion of some means for resolving collisions which occur when two stations desire to transmit simultaneously. Controlled access methods avoid such collisions but require that a station transmit a message on the network only dur ing an assigned time slot. The two most widely discussed controlled access methods are referred to as "token passing" and "roll call polling. " Token passing involves the transmitting of a token or author ization message from station to station . When in possession of the token, a station is authorized to transmit a message over the network. Roll call polling , on the other hand , is managed by a central supervisor that sequentially interrogates each attached station looking for messages waiting to be sent. A fifth networ k design character istic is the inter face which def ines the phy s i c al and l og i c a l requirements that stations must meet in order to connect to the network. For example, one of the simpler interfaces is referred to as the RS-232 standard which def ines the physical character istics of an inter f ace be tween the network and a work station. SUMMARY OF THE INVENTION The present invention is directed generally to an improved network system for communicating digital data between multiple devices physically dispersed throughout a facility and more particularly to a network configuration embodying favorable features of both r i ng and bus topologies . A network system in accordance wi th the invention is comprised of a transmission medium formed into first and second buses which are phys ically routed together , preferably as a single cable , through a facility containing the devices to be interconnected by the network. Each such device is coupled to the network by connecting it to both the first and second buses and digital data is transmitted unidirectionally along each bus in opposite directions. In the preferred embodiment , each device , when transmitting , concurrently propagates digitally encoded signals in opposite directions along both buses . Each device receives such encoded signals on either bus , dependent on its location relative to the transmitting device. Each device is coupled to the buses by a network control subsystem , i . e . , controller , which includes amplifier means which enables the operational length of the network to be extended in increments . Each controller preferably also includes repeater means to enhance noise immunity by reshaping and resynchronizing the signal transmitted along the network. In accordance with a feature of the preferred embodiment, a self clocking signal format, e.g. , Manchester encoded, is used to transmit information along the network. Each controller includes converter means for decoding the Manchester encoded signals to a nonself clocked format, e.g. , Non Return to Zero (NRZ ) , for coiπmunication with the device connected thereto . The converter means also operates to convert NRZ formatted signals supplied by the device to Manchester formatted signals for transmission on the network. In accordance with a further feature of the preferred embodiment, the transmission medium is physically implemented by using spare , in-place , telephone wires . Thus, two twisted-wire pairs physically emanating from a telephone closet can comprise the aforementioned first and second bus e s . Wal l mo unted mod ul a r soc ke ts a r e conveniently connected along the buses for receiving a compatible plug connected to the controller. I accordance with a still further feature of the preferred embodiment, the modular wall sockets include automatically deployed shorting bars which assure network continuity when a controller is disconnected. Preferably, each controller also includes self closing relays which operate in the event of station malfunction to assur e network continuity. DESCRIPTION OF THE FIGURES Figure 1 is a block diagram depicting a system configured in accordance with the present invention; Figure 2 is a block diagram depicting a network control subsystem intended to be incorporated within each station of the system of Figure 1; Figure 3 is a block diagram illustrating the front end portion of the network control subsystem of Figure 2 , in greater detail; Figure 4 is a timing diagram depicting a typical signal sequence which occurs in the operation of the apparatus Figure 3; Figure 5 is a diagram schematically illustrating the incorporation of a system in accordance with the invention into an existing telephone installation; and Figure 6 is a schematic d iagr am depicting the manner in which each station can be connected to the network buses by a modular plug. DETAILED DESCRIPTION Attention is initially directed to Figure 1 which schematically illustrates a networ k sys tem 10 fo r communicating digital data between multiple devices. 12 physically dispersed throughout a facility . The term "device" as used herein is intended to encompass a wide variety of hardware units which transmit and/or receive digital data. Thus , for example , a device can compr ise a simple receive only printer or plotter but more typically , comprises a considerably more complex hardware assembly such as .a "work station" including a microcomputer , a keyboard , a video monitor , and a floppy or r ig id d is k O PI drive. Such work stations are well known and commercially available, e.g. the Vector 4 by Vector Graphic, Inc. and the IBM PC by International Business Machines Corporation. As will be discussed hereinafter , the network system 10 includes a plural ity of networ k co ntr o l subsystems or controllers 14 , each of which couples a different device 12, to the network transmission medium 20. The term "station" will be used herein primarily to refer to a particular device 12 and the controller 14 connecting it to the transmission medium 20. Figure 1 depicts a system in which N stations SI, S2, S3...SN are connected to the network. The terra "node" will sometimes be used herein to refer to a point on the network at which a station is connected . The network system in accordance with the present invention is primarily intended for low cost local area network applications for interconnecting a limited number of multiple devices, e.g. up to sixteen, all located at a common site within about ten thousand feet with no more than about one thousand feet between adjacent stations . Such networks are useful, for example, to permit a user at one station to access information contained on the disk drive of another station. In addition, a user having no peripherals attached to his station may direct one of his files to a printer , plotter , modem, or other peripheral connected to the network at a different station. The network topology depicted in Figure 1 can be viewed as a modified ring/bus topology which utilizes a digital data transmission medium 20 comprised of first and second separate buses 24 and 26 preferably physically contained within a common cable sheath and routed together through an area, e.g. , office building throughout which the stations are dispersed . In order to facil itate the subsequent discussion of the system herein, the bus 24 will sometimes hereinafter be referred to as the right bus and the bus 26 as the left bus. O PI Each of the controllers 14 is depicted in Figure 1 as having four separate ports. Two of the ports 30 , 32 are shown connected to the right, bus 24 and respectively comprise RIGHT BUS IN and RIGHT BUS OUT ports . The third and fourth ports 34 , 36 of each controller are connected to the left bus 26 and respectively comprise LEFT BUS IN and LEFT BUS OUT ports . As will be discussed hereinafter , each station controller internally includes a right bus path means connected between its RIGHT BUS IN and RIGHT BUS OUT ports and similarly a left bus path means connected between its LEFT BUS IN and LEFT BUS OUT ports . When a station is connected in the network, the right bus path means is connected in series in the right bus and likewise the left bus path means is connected in series in the left bus. The right bus and left bus path means within each controller will be discussed in detail hereinafter but suffice it to understand at this point that each of these bus path means includes amplif ier means , thus enabling the oper ative length of the network to be incrementally extended by connecting additional stations . For example , in a typical system configured in accordance with the topology of the present invention , the operative length of the network conductors 24 , 26 can be extended by approximately 1 , 000 feet by the incorporation of each additional station. In order to facilitate a rapid understanding of a preferred embodiment of the present invention , certain characteristics of such a system will be assumed herein-, for purposes of disclosure. Thus, it will be assumed that the transmission medium 20 compr ises a twisted-pai r wir e although it should be understood that other transmission media can be used. It will also be assumed that baseband , rather than broadband transmission is employed and that access to the network is in accordance with a controlled procedure. More particularly, a token passing procedure will be assumed in which each station is permitted to OMΠ transmit on the network only after it has received an authorizing message, i.e., a token. In accordance with the preferred embodiment, when a station transmits on the network, it concurrently transmits on both the right bus and left bus. As will be seen hereinafter, information encoded signals are concurrently transmitted by the station to the right on bus 24 from its RIGHT BUS OUT port 32 and to the left on bus 26 from its LEFT BUS OUT port 36. Thus, information encoded signals move only to the right represented by arrow 38 on bus 24 and only to the left represented by arrow 40 on bus 26. Information encoded signals are thus received by each station from the left on bus 24 via port 30 or from the right on bus 26 via port 34. Attention is now directed to Figure 2 which comprises a detailed block diagram of a preferred network controller 14 which is preferably implemented on a single circuit board adapted to .be accommodated within an expansion slot of the station device 12. Figure 2 depicts the four ports previously referred to in Figure 1; i.e., RIGHT BUS IN port 30, and a RIGHT BUS OUT port 32, LEFT BUS IN port 34 and LEFT BUS OUT port 36. Reference was previously made to a right bus path means within each workstation for interconnecting the RIGHT BUS IN and RIGHT BUS OUT ports. The right bus path means is depicted in Figure 2 as including an amplifier 54 whose input is derived from the RIGHT BUS IN port 30 and an amplifier 56 whose output is supplied to the RIGHT BUS OUT port 32. : -The right bus path means additionally includes a converter/repeater 58. Likewise, the left bus path means depicted in Figure 2 comprises an amplifier 60 whose input is derived from the LEFT BUS IN port 34, an amplifier 62 whose output is supplied to the LEFT BUS OUT port 36, ' and a converter/repeater 64. in accordance with the preferred embodiment, information is encoded for transmission along the buses 24 and 26 in accordance with a self clocking code. Such codes are well known and are characterized by the use of regularly spaced level transitions as known references for delineating data cells. One such self clocking code, known as the Manchester code, will be assumed for use herein for transmission along the network conductors 24 and 26. Each converter/repeater is operable either in a repeater mode or a converter mode. In the repeater mode, self clocked encoded signals received by converter/repeater 58 from the RIGHT BUS IN port 30 and by converter/repeater 64 from the LEFT BUS IN port 34, are reconstructed prior to their being outputted to the conductors 24 and 26 respectively, via amplifiers 56 and 62. Whereas a self clocked encoded signal format is preferably utilized along the network buses to enhance noise immunity, it is more typical for the devices 12 to utilize a non-self clocked signal format such as Non Return to Zero (NRZ). Thus, the converter/repeaters, 58, 64 are capable of operating in a converter mode to convert the self clocked encoded format to the non-self clocked format. In a typical station, the network control subsystem 14 primarily functions to control communication between a work station host CPU and the converter/repeaters 58, 64 and thus the network buses 24, 26. Prior to discussing the details of the network control subsystem, it will be helpful to briefly consider the overall operation of the system as depicted in Figure 1. Assume that station S3 has the token. Station S3 will concurrently transmit to the right along bus 24 and to the left along bus 26. Thus, stations SI and S2 to the left of the transmitting station 53 will receive the message from station on their LEFT BUS IN ports 34. On the other hand, station SN to the right of station S3 will receive the same message on its RIGHT BUS IN port 30. When stations SI and S2 are receiving a validly formatted message on their LEFT BUS IN ports, their RIGHT BUS IN ports will be quiet, i.e., they will not see a validly encoded signal. Likewise, when station SN receives a validly encoded signal on its RIGHT BUS IN port, it will not see a validly encoded signal on its LEFT BUS IN port. Thus, whenever any station is transmitting on the network, each other station will receive a validly formatted signal on either its RIGHT BUS IN port or its LEFT BUS IN port, but not on both ports. Returning to Figure 2, note that converter/repeater 58 includes a serial data output terminal 70 and a related clock terminal 72. The converter/repeater 58 operates to supply a non-self clocked serial data signal on data output terminal 70 responding to the self clocked signals supplied thereto from amplifier 54. Clock terminal 72 supplies a train of clock pulses delineating the bit cells in the data signal supplied on terminal 70. Converter/repeater 64 likewise includes a data output terminal 74 for carrying a serial data signal and a clock output terminal 76 for defining the bit cells thereof. The converter/repeater terminals 70 and 72 are connected to the input of a selector gate network 80. Similarly, the data and clock terminals of converter/repeater 64 are connected to the input of the selector gate network 80. Each converter/repeater 58, 64 includes a terminal 82, 84 which supplies a binary signal identifying whether the input information applied thereto, by amplifier 54 or amplifier 60, is validly encoded. From the prior discussion, it will be recognized that when the system is operating properly, a validly encoded self-clocked signal will appear either at the RIGHT BUS IN ort 30 or the LEFT BUS IN port 34 of each station, but not at both concurrently. Thus, either converter/repeater 58 or 64, but not both, can have a valid signal indication on its output terminal 82 or 84. The data and clock signals from the converter/repeater receiving a validly encoded input will be passed by the gate network 80 to the serial/parallel converter circuit 90. The circuit 90 communicates with an internal bus 92 associated with a network control CPU 94. Also connected to the bus 92 is a read only memory (ROM) 96, a random access memory (RAM) 98, a direct memory access (DMA) module 100 for serial I/O access and a DMA module 102 for memory access by the host CPU. An address register (e.g., eight bits) is also connected to the bus 92 for storing a network address for the particular work station, as defined by manual switches 106. A counter timer circuit 108 is also connected to the bus 92. Additionally, a host input register 110, a host output register 112, and status and command registers 114 and 116 are connected both to the bus 92 and to address and data buses 120, 122 connected to the work station host CPU (not shown). The ROM 96 is primarily utilized to store a high level of network protocol dealing with considerations, such as token handling. This level of network control has been extensively discussed in the literature and will not be addressed in great detail herein. Rather, the network control subsystem depicted in Figure 2 will be discussed in connection with a transmitting mode, on the assumption that it has the token, and in connection with a receiving mode on the assumption that one of the other stations has the token. As aforementioned, when the subsystem 14 depicted in Figure 2 is receiving a message transmitted on the network by some other station, either terminal 82 of converter/repeater 58 or terminal 84 of converter/repeater 64 will supply an active output to enable gate network 80 to couple the data and clock signals therefrom to the converter circuit 90. In this manner, Manchester encoded signals received from either the right bus or left bus are coupled through the gate network 80 to the network control CPU 94. Each converter/repeater 58, 64 also reconstructs the Manchester signal supplied thereto and then outputs it via its output terminal 130, 132, to its output amplifier O PI 56, 62. When a station is operating in the transmitting mode, the network control CPU 94 will supply parallel (e.g. 8 bit) data to the serial/parallel converter circuit 90. The circuit 90 in turn will supply serial NRZ encoded data on line 136 to the converter/repeater 58 which supplies a related clock signal on line 138 to the circuit 90. Additionally, the circuit 90 supplies a mode control output signal on line 140 to converter/repeater 58 in order to switch it to the converter mode. When operating in the converter mode, the converter/repeater 58 accepts the serial NRZ encoded signal supplied on line 136 and outputs a Manchester encoded signal on output terminal 130. Converter/repeater output terminals 130 and 132 are both connected to the input of a steering gate 144. The steering gate also receives the mode control signal supplied by circuit 90 via line 140. The Manchester output of converter/repeater 58 is outputted via amplifier 56 to the RIGHT BUS OUT port 32 and in addition, is steered via gate 144 to output amplifier 62 to the LEFT BUS OUT port 36. On the other hand, when the subsystem does not have the token and is thus operating in a receiving mode, the output of converter/repeater 58 is only supplied to the RIGHT BUS OUT port 32 and the LEFT BUS OUT port 36 is supplied from the output of the converter/repeater 64 via steering gate 144. Attention is now directed to Figure 3 which illustrates a preferred implementation of the front -end portion, i.e., from the aforementioned station ports to the internal bus 92, of the network control system 50 of Figure 2. In accordance with the preferred embodiment depicted in Figure 3, the converter/repeaters 58 and 64 are implemented utilizing a commercially available integrated circuit such as the Manchester Encoder Decoder (MED) device marketing by Harris Corporation under model number HD-6409. The HD-6409 MED is a high speed low power device which can be operated OMPI in either a converter mode or repeater mode. In the converter mode, the device converts NRZ code into Manchester code and Manchester code into NRZ code. In the repeater mode, the device accepts Manchester code input and reconstructs it with a recovered clock. The HD-6409 is available in a 20 pin package. Only those pins essential to an understanding of the operation of the present system are depicted in Figure 3. Moreover, for the sake of clarity in explanation, signals herein will be discussed in terms of their logic levels, e.g., active or inactive, rather than their voltage levels, e.g., high or low. Prior to discussing the overall operation of the apparatus of Figure 3, it is pointed out that each of the MED devices 58, 60, includes a bipolar input (BI) and a bipolar output (BO). Thus, pin BI of MED 58 is connected to the output of the aforementioned amplifier 54 and pin BO is connected the input of aforementioned amplifier 56. Pin BI of MED 64 is connected to the output of aforementioned amplifier 60 and pin BO is connected to the aforediscussed steering gate 144 whose output is connected to the input of amplifier 62. Pins BI are intended to respond to a Manchester encoded signal and pins BO are intended to output a Manchester encoded signal. MEDs 58 and 60 also each include a serial data out (SDO) pin which outputs a serial NRZ data signal synchronously with a decoder clock (DCLK) on pin DCLK. Each of MEDs 58 and 60 also includes a valid Manchester (VM) pin which indicates when a valid Manchester encoded signal is being applied to its BI pin. MEDs 58 and 60 each also include a serial data (SD) pin which accepts serial data, from the aforediscussed circuit 90. As depicted in Figure 3, pin SD of MED 64 is tied to a reference potential. That is, in accordance with the operation of the preferred embodiment, MED 64 is not operated in the converter mode to accept NRZ data from circuit 90. The mode select (MS) pin of MED 64 is also tied to a reference potential to maintain the MED 64 in the repeater mode. On the other hand, the mode select pin of MED 58 is controlled by a control signal on line 200, from the circuit 90 to selectively force MED 58 into either thχ_. converter mode or repeater mode. When in the converter mode, a serial NRZ signal supplied from circuit 90 to MED 58 pin SD is converted to a Manchester encoded signal and outputted on pin BO. When in the converter mode, the NRZ signal accepted on pin SD is synchronized with a clock pulse train generated by MED 58 on pin ECLK. In addition to the aforementioned pins, MEDs 58 and 60 each include a clear to send (CTS) pin. Either MED will output a Manchester encoded signal on its BO pin, only when an active clear to send signal is supplied to its CTS pin. In the preferred embodiment, the aforementioned serial/parallel converter circuit 90 comprises a serial input/output controller such as is marketed by Zilog, Inc. under the model number Z8440. This particular device includes a 40 pin package and accommodates two separate channels, channel A and B. It basically functions as a serial to parallel and parallel to serial converter/controller to accept serial NRZ data from the selector gate network 80 and supply parallel eight bit data to the internal CPU bus 92. Only those pins essential to an understanding of the present system will be discussed in connection with the controller 90. More particularly. Figure 3 depicts a bidirectional line 202 for coupling pins D0-D7 to the internal bus 92. Line 204 schematically depicts the connection from the network control CPU 94 to the controller 90 for controlling various operations including for example, channel select, controller data select, chip enable, etc. These control functions for the Z8440 controller are well known and will not be discussed in detail herein. In addition to the lines 202 and 204 which couple the controller 90 to the network control CPU 94, several controller 90 pins are provided for receiving and sending serial data. Thus, Figure 3 depicts a receive data (RDA) pin and receive clock (RCA) pin for receiving NRZ data and clock signals from the selector gate network 80. Controller 90 also has a pin TDA for transmitting data to the serial data pin SD of MED 58. Clock pin TCA of controller 90 accepts the clock signal developed by MED 58 on its pin ECLK. The controller 90 is also depicted as including two control pins which control the operation of MEDs 58 and 60. Initially, aforementioned control pin 200 is connected to a data terminal ready (DTR) pin. Additionally, line 206 connects a controller request to send (RTS) pin to the aforementioned clear to send pin (CTS) of MED 58. In order to understand the operation of the apparatus depicted in Figures 2 and 3, assume that the depicted station has the token meaning that it has the exclusive right to transmit on the network. The control CPU 94 will then command the controller 90 to go into the transmit mode causing pin DTR to inactivate MED 64 (via its pin CTS) and force MED 58 into the converter mode (via pin MS). Thereafter, the controller 90 will on its request to send pin RTS clear MED 58 to send data (via pin CTS). As a consequence, MED 58 will start sending its preamble of synchronization bits according to its stored Manchester protocol. Subsequently, MED 58 will supply a clock pulse train on pin ECLK which is fed to pin TCA of the controller 90. The controller 90 will then respond by outputting serial NRZ data on pin TDA corresponding to the data stored in the internal buffer of the controller 90. Parenthetically, it should be mentioned that the signal ECLK supplied by MED 58 is derived from an internal oscillator associated with MED 58. The NRZ data supplied to pin SD of MED 58 is converted into Manchester data and output to pin BO and thus immediately, via amplifier 56 to the right bus 24. Concurrently, the Manchester data from pin BO of MED chip 58 will be supplied to the input of steering gate 144. Gate 144 will, as a consequence of the data terminal ready signal previously supplied on controller pin DTR steer the output of MED chip 58 to amplifier 62 and on to the left, bus 26. Thus, when the station has the token and is transmitting on the network, Manchester data will be simultaneously sent along both bus 24 and bus 26 in opposite directions, emanating from the same encode/decode device 58. It should, of course, be appreciated that at a higher level of the network protocol, the station host CPU initiated the request to send a message which message will include as a part thereof, the address of the sender station and the address of the receiver station, as well as the data to be sent. This procedure is controlled by the firmware within the read only memory 96 coupled to the network control CPU 94. When the message is completed, the controller 90 will release the MED 58 from the converter mode and remove the disable signal from the MED 64 CTS. Now consider the operation of one of the other stations on the network, i.e., a station without the token, in response to the message received from the transmitting station as ' just described. Assume for purposes of illustration that station S2 has just completed a transmission and let us now consider the operation of station S3 immediately to the right, as depicted in Figure 1, along the network. Thus, a valid Manchester encoded signal will appear at the RIGHT BUS IN port of station S3. Its LEFT BUS IN port will be quiet because the transmitting station is transmitting to the left along left bus 26. Accordingly, the Manchester encoded signal will be applied through amplifier 54 of station S3 to the converter/repeater 58 thereof which at this time is in the repeater mode. It OMPI will be recalled that converter/repeater 58 switches to the converter mode only when , its station has the token . The Manchester signal applied to pin BI will be processed by MED 58 and will be reclocked according to its internal oscillator and output at pin BO. All of the MED internal oscillators in the system are crystal controlled at the same frequency and running at the same rate. It is assumed that each MED , in the repeater mode , wi ll output a Manchester encoded signal one half bit time delayed from the input . As soon as the pr eamble of the r ece ived Manchester signal is completed , MED 58 will output an active signal on pin VM to ind icate that i t is now receiving valid Manchester data . As a consequence , selector gate network 80 will couple its SDO and DCLK pins therethrough to the receive data and receive clock pins of the serial I/O controller 90. The VM pin of MED 64 will , of course , at this time provide an inactive signal since valid Manchester signals cannot concurrently be arriving at pin BI of MED 64. The controller 90 examines the NRZ data applied to its RDA pin to determine whether the message is intended for its station. If the message is intended for station S3 , then it will communicate with the host CPU ( not shown ) via the interface registers 110 , 112, 114 , and 116 ( Figure 2) . The aforedescribed sequence occurring in station S3 to the right of the transmitting station S2 will likewise concur rently occur in stations to the l e f t o f the transmitting station. That is, the stations to the left of the transmitting station as well as the stations to the right of the transmitting station will succes sively reconstruct the rece ived Mancheste r encoded s ignal , delaying it by half a bit time. All stations will remain in the repeater mode except that station whose address is designated within the received message. The aforementioned reference to the transmission of a message by a transmitting station refers not only to data being transmitted between the stations but also to the passing of a token containing message from station to station. Thus , if , after a station receives the token it has no data message to send, " it will merely pass the token on to the next station. In order for this to occur , each station must store the address of the station to which it is to pass the token. The firmware within the ROM 96 in each station controls the generation of the token passing message and the circumstances under which it is generated. The control firmware within the ROM ' s 96 of the controllers 14 operates to assure cooperative interaction between the multiple stations, particularly with regard to such interdependent tasks as token passing and message acknowledgement . Briefly, each station on the network performs four basic tasks : 1) Receiving and Acknowledging Frames Any frame transmitted on the network contains a destination address and a source address . I t is the responsibility of each station to monitor the network for activity and to receive any frames transmitted . Once a frame is received , the station must determine if the frame ar r ived intact and if the s tati on i s the f r ame ' s destination. If it is the destination , the frame must be acknowledged. If it is not, the frame must be discarded. 2) Passing the Token The stations operate in half duplex such that a s tation can r ece ive o r tr an sm i t , b u t n o t b o th simultaneously. Only one station has permission to transmit oa the network at any instant. This virtually eliminates the possibility of collisions caused by several nodes transmitting simultaneously. A special frame , called the token, conveys permission to transmit and is passed from station to station . Under normal circumstances there is only one token on the network. The station which possesses the token may transmit one frame before passing the token . The token must be transmitted immediately after receiving acknowledgement for the transmitted frame. If no frame is ready to transmit, the token must be passed immediately. A station may never hold onto the token while building a frame to transmit . When a station passes the token , it transmits it to its nearest known neighbor . That station is then respons ible for passing the station to its neighbor . A station' s nearest known neighbor is determined per iodically using a network reconf igur ation poll ing process . 3) Transmitting Frames and Receiving Acknowledgements When a node receives the token, it must e ither transmit a frame immediately or relinquish the token . The maximum frame length is typically 500 bytes . As soon as the frame has been transmitted , the node must switch its mode of operation from transmitting to receiving in order to rece ive an ac knowledg emen t fo r the f r ame j us t transmitted. A response timer is used to prevent a node from waiting indefinitely for an acknowledgement . If the timer expires without an acknowledgement , the frame is assumed to have been rejected by the destination node , and must be retransmitted the next time the token arr ives . Token passing is initiated immediately following a time-out or the arrival of an acknowledgement. 4) Polling for Network Reconfiguration Occasionally a node will be added to the network or removed . In order for a new node to receive the token allowing it to transmit, the node must be discovered by ; its nearest preced ing neighbor . S imilarly , i f a node is removed , a new nearest neighboring node must be established by the preceding neighbor node . Both of these tasks are accomplished via a network reconfiguration polling process (Recon) . Essentially Recon is a periodic polling technique with which a node searches for the presence of a new immediate neighbor . The polling node sends a token to the node whose address is next in numerical sequence from the polling node, and then it listens for a transmission from that node. If after a timed response period the polled node does not transmit, the polling node tries once again . If the polled node again fails to transmit within the response period , it is assumed to be inactive. The polling node then increments the polling address and passes the token to the next node in sequence. As soon as a polled node transmits, it is established as the new nearest known neighbor . Furthermore , because the poll ing node has successfully passed the token , it can return to normal reception mode. Recon is executed pe iod ic all y , typ ica l ly approximately every 15 seconds. In the preferred implementation of a system in accordance with the present invention, the right bus 24 and the left bus 26 comprise twisted pair telephone wires . Whereas the twisted pair wires can be specially installed , that is routed through the facility throughout which the devices 12 are dispersed , it is recognized in accordance with the invention that telephone wires already exist in most such facilities . More particularly, in a typical office complex , an existing twenty-five pair telephone cable runs from the telephone closet throughout the area . In many situations , only a portion of the twenty-five twisted wire pairs are utilized for telephone purposes . The preferred embodiment of the invention contemplates utilizing already existing spare twisted wire pairs to implement a system in accordance with the pr e sent invention. Atten ti on is d i r ec ted to F ig u r e 5 wh i c h schematically illustrates a telephone cable 300 emerging from a telephone closet. The cable 300 typically contains twenty-five twisted wire pair s within a common cable sheeth. In accordance with a preferred embodiment of the invention, four of those pairs are utilized to implement a network system in accordance with the invention. Thus , OMPI twisted pairs 302 and 304 are routed from the telephone closet through the area throughout which the devices 12 are dispersed. Telephone style modular sockets 306 are connected along the twisted wire pairs 302 and 304 at any location where it may be desirable to connect a station. The wire pairs 302 and 304 are looped throughout the area and returned to the telephone closet as for example via pairs 308 and 310. Figure 6 schematically illustrates a modular socket 306 which is connected along the wire pairs 302 and 304. The socket 306 is illustrated as including four terminals 316, 318, 320, and 322. The socket 306 includes a shorting bar 324 which normally closes the path between terminals 316 and 318 and a shorting bar 326 which normally closes the path between terminals 320 and 322. The shorting bars 324 and 326 are preferably spring loaded to a closed position. It should be understood that Figure 6 comprises a schematic illustration only and that each wire pair 302 and 304 is preferably comprised of two wires thus requiring that the socket 306 actually has eight terminals and four shorting bars. A station is connected to the network by a telephone style plug 330 adapted to cooperate with the socket 306 in order to connect each of the network control subsystem ports to one of the socket terminals. Thus, when the plug 330 is inserted into the socket 306, it displaces the spring mounted shorting bars 324, 326 and moves the socket terminal pads 332, 334, 336, and 338 into electrical connection with the aforementioned socket terminals. The terminal pads of socket 330 are electrically connected to the aforementioned network control system ports to place the right bus path means thereof in series with socket terminals 316 and 318 and the left bus path means thereof in series with the socket terminals 320 and 322. Utilization of a modular plug and socket arrangement is depicted in Figure 6 and enables stations to be readily OMPI 1 P added to or deleted from the network. Each station preferably also includes solenoid operated means (not shown) which act equivalently to the shorting bar members in the event of station failure in order to maintain continuity along the conductors 302 and 304. From the foregoing, it should now be recognized that a network system has been disclosed herein for operationally interconnecting multiple devices to allow each device to communicate with and utilize the resources associated with each other station. The disclosed system is capable of being implemented at low cost, particularly when implemented utilizing spare in place telephone wires. The topology of the disclosed system essentially retains the advantages of traditional bus and ring systems without incorporating their respective disadvantages. Thus, for example, the subject network avoids the delays inherent in traditional ring networks while also avoiding the network length limitations and other electrical problems typically associated with traditional bus networks. OMPI

Claims: CLAIMS 1. A network system for communicating digital data between multiple devices physically d isper sed throughout a. facility, said system comprising : a transmission medium including first and second elongated digital data buses , each having a first end and a second end; means routing said first and second buses adj acent one another through said facility with said first ends proximate one another and said second ends proximate one another ; a plurality of network controllers , each defining a first bus path means having first bus input and output ports and a second bus path means having second bus input and output ports ; means connecting each network controller to said transmission medium including means connecting said first bus input and output ports to said first bus to place said fi rs t bus path means in ser ies the rewith and means connecting said second bus input and output ports to said second bus to place said second bus path means in series therewith; said first bus path means including amplifier means for transmitting a digital signal along said first bus only in a first direction from said first toward said second end; and said second bus path means including ampl i f ier means for transmitting a digital signal along said second bus only in a second direction from said second toward said first end. OMPI 2. The system of Claim 1 wherein said connecting means includes pairs of spaced terminals distributed along the length of said first bus and pairs of spaced terminals distributed along the length of said second bus; and wherein said first bus input and output ports of each network controller are respectively connected to the terminals of one of said pairs spaced along said first bus and said second bus input and output ports of that same controller are respectively connected to the terminals of one of said pairs spaced along said second bus. 3. The system of Claim 1 wherein said first bus path means includes first repeater means responsive to a self clocked encoded digital signal applied to said first bus input port for supplying a reconstructed self clocked encoded digital signal to said first bus output port; and wherein said second bus path means includes second repeater means responsive to a self clocked encoded digital signal applied to said second bus input port for supplying a reconstructed self clocked encoded digital signal to said second bus output port. 4. The system of Claim 1 wherein each network controller includes a processor means; and first coupling means in each controller for selectively coupling either said first bus path means or said second bus path means to said processor means for supplying information thereto. 5. The system of Claim 4 including second coupling means for coupling said processor means tσ both said first and second bus path means for supplying information thereto for concurrent transmission along said first and second buses. OMPr 6. The system of Claim 5 wherein said first coupling means includes means for determining whether a signal applied to said first bus input port is valid and whether a signal applied to said second bus input port is valid; and means for connecting said first bus path means to said processor means if said signal applied to said first bus input port is valid and connecting said second bus path means to said processor means if said signal applied to said second bus input port is valid. 7. The system of Claim 6 wherein said first bus path means includes first repeater means responsive to a self clocked encoded digital signal applied to said first bus input port for supplying a reconstructed self clocked encoded digital signal to said first bus output port; and wherein said second bus path means includes second repeater means responsive to a self clocked encoded digital signal applied to said second bus input port for supplying a reconstructed self clocked encoded digital signal to said second bus output port. 8. The system of Claim 7 wherein said means for determining whether said signals are valid comprises means for determining whether each signal constitutes a self clocked encoded signal. 9. The system of Claim 8 wherein said first coupling means includes means for converting a self clocked encoded signal to a nonself clocked encoded signal for supplying information to said processor means. 2 b 10. The system of Claim 9 wherein said second coupling means includes means for converting a nonself clocked encoded signal to a self clocked encoded signal for supplying information to said first and second bus path means. 11. The system of Claim 1 wherein said means routing said buses includes a common cable shea th enveloping said first and second buses to retain them adjacent to one another . 12. A network system suitable for interconnecting multiple work stations , each including a host central processor unit, said system comprising: a transmission medium including first and second elongated buses; means routing said first and second buses adjacent one another throughout an ar ea containing sa id wor k stations ; each of said work stations including a network control subsystem; each network control subsystem including first bus input and output ports and second bus input and output ports; said first bus including multiple pairs of spaced first and second terminals distributed along the length thereof; said second bus including multiple pairs of spaced first and second terminals distributed along the length thereof; means connecting each of said networ k control subsystems to said transmission medium including means respectively connecting the first bus input and output ports thereof to the first and second terminals of one of said pairs in said f irst bus and means respectively connecting the second bus input and output ports thereof to the first and second terminals of one of said pairs in said second bus; and wherein each network control subsystem includes f i rst amplifier means for transmitting a signal from said first bus output port in a first direction along said first bus and fur ther incl ud ing se c o nd ampl i f i e r me ans fo r transmitting a signal from said second bus output port in a second direction, opposite to said first direction , along said second bus . 13. The system of Claim 12 wherein each network control subsystem includes processor means for supplying an information signal; means in each network control subsystem for selectively defining either a transmit mode or receive mode; and wherein said first amplifier means is operable in said receive mode to transmit a signal from said first bus output port related to a signal derived from said first bus input port and operable in said transmit mode to transmit a signal from said first bus output port related to a signal supplied by said processor means; and wherein said second amplifier means is operable in said receive mode to transmit a signal from said second bus output port related to a signal derived from said second bus input port and operable in said transmit mode to transmit a signal from said second bus output port related to a signal supplied by said processor means. 14. The system of Claim 13 wherein each network control subsystem further includes first repeater means connected between said first bus input and output ports and second repeater means connected between said second bus input and output ports; each of said first and second repeater means responsive to a self clocked ^encoded digital signal applied to the input port coupled thereto for supplying a reconstructed self clocked encoded digital signal to the output port coupled thereto. OMPI 15. The system of Claim 14 wherein each network control subsystem further includes coupling means for selectively coupling a signal derived from either said first bus input port or said second bus input port to said processor means, said coupling means including means for determining whether a signal derived from said first bus input port or said second bus input port is valid. 16. A network system for enabling communi cation amongst multiple stations said system comprising: first bus means having first and second ends; second bus means having first and second ends; means physically mounting said first and second bus means proximate to one another wi th said f irs t ends adjacent one another and said second ends adjacent one another; each of said multiple stations including a first bus patil means having input and output ports and a second bus path means having input and output ports; means connecting said first bus path means input and output ports to said first bus means; means connecting said second bus path means input and output ports to said second bus means; - said first bus path means including first amplifier means having an output coupled to said output port for transmitting information encoded signals along said first bus means only in a direction from said first to said second end thereof; said second bus path means including second amplifier means having an output coupled to said output port for transmitting information encoded signals along said second bus means only in a direction from said second to said first end thereof; processor means for supplying information; means for selectively defining a transmit mode or a receive mode; means operable dur ing said transmit mode for coupling said processor means supplied information to inputs of both said first and second amplifier means to concurrently transmit common information encoded signals in opposite directions along said first and second bus means ; and means operable during said receive mode for respectively coupling said first and second bus path means input ports to said inputs of sa id f irst and second amplifier means. 17. The system of Claim 16 including a common cable sheath enveloping said first and second bus means to retain them adjacent one another for common routing throughout an area containing said stations. 18. The system of Claim 16 wherein said means operable during said receive mode includes repeater means responsive to a self clocked encoded digital signal at said first bus path means input port for supplying a reconstructed self clocked encoded digital signal to said input of said first amplifier means and responsive to a self clocked encoded digital signal at said second bus path means input port for supplying a reconstructed self clocked encoded digital signal to said input of said second amplifier means. -ξUREΛ OMPI >

Inventors: CHRISTENSEN CHRISTIAN C, ESSER NICHOLAS M JR, NELSON BRADLEY R, REICHERT ANDREW R, STAPLES LEVEN E, CHRISTENSEN, CHRISTIAN, C., ESSER, NICHOLAS, M., JR., NELSON, BRADLEY, R., REICHERT, ANDREW, R., STAPLES, LEVEN, E.
Applicants: VECTOR GRAPHIC INC, VECTOR GRAPHIC, INC.
Application year: 1984
Main classification: H04J3
IPC codes: H04L12