Vector quantizer

Abstract: A vector quantizer for quantizing the vector of image and audio information, the vector quantizer being capable of efficiently encoding a compensation predictive error signal at a reduced bit rate by performing adaptive vector quantization after judging the significance of the compensation predictive error signal in blocks, and capable of movement compensation inter-frame vector encoding in which variable-length encoding of movement vector is facilitated and information production control is achieved easily.

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a vector quantizer for quantizing the vector of image information and audio information. Description of the Prior Art The prior art relating to such a vector quantizer is described in literatures such as: Y. Linde, A. Buzo and R.M. Gray, "An Algorithm for Vector Quantizer", IEEE Trans., Com-28, pp. 84 - 95 (1980); A. Gersho, "On the Structure of Vector Quantizers", IEEE Trans., IT-82, pp. 157 - 166 (1982); A. Buzo and A.H. Gray, Jr, "Speech Coding Based Upon Vector Quantization", IEEE Trans., ASSP-28 (1980); B.H. Juang and A.H. Gray, Jr., "Multiple Stage Quantization for Speech Coding", Proc. Intl. Conf. on A.S.S.P., pp. 597 - 600, Paris (1982); and A. Gersho and V. Cuperman, "Vector Quantization: A Pattern Matching Technique for Speech Coding", IEEE, COMMUNICATION MAGAZINE, pp. 15 - 21, Dec. (1983). A vector quantizer as shown in Fig. 3, which will be described later, is known in addition to those vector quantizers of the prior art. The principle of the vector quantizer will be described prior to the description of the vector quantizer of Fig. 3. Referring to Fig. 1, assuming that an object has moved on the screen during the period from a frame No. f-1 to a frame No. f from a position A to a position B, then a block S f (R) including a plurality of the lattice samples of an image signal around a position vector R in the frame No. f becomes approximately equal to the block S f-1 (R-r) of the image signal at a position determined by subtracting a movement vector r from a position vector R in the frame No. f-1. As shown in Fig. 2, when the position vector R = (m, n) and the movement vector r = (u, v), S f (R) ≒ S f-1 (R-r). Suppose the image signal at R = (m, n) is S(M, n) and S f (R) = [S(m-2, n-2), ..., S(m, n), ..., S(m+2, n+2)], the degree of analogy L(n, v) between S f (R) and S f-1 (R-r) is defined as the block unit matching scale of 5x5 picture element as follows; In this state, the movement vector r is expressed by That is, the degree of analogy L(u, v) of S f (R) and S f-1 (R-r) is expected to be minimized by block matching. Therefore, in introducing movement compensation into inter-frame prediction coding, the use of a block which minimizes L(u, v), extracted from image signal blocks of the frame No. f-1, as a prediction signal in giving the block S f (R) of the image signal of the position of R in the frame No. f to an inter-frame prediction encoder, the power of prediction error signal will be reduced to the least and encoding efficiency is improved. Referring to Fig. 3 showing an example of the constitution of a conventional vector quantizer of this kind, there are shown an A/D converter 1, a raster/block scan converter 2, a frame memory 3, a movement vector detector 4, a variable delay circuit 5, a subtractor 6, a scalar quantizer 7, an adder 8 and a variable-length encoder 9. The manner of operation of this vector quantizer will be described hereinafter. First the A/D converter 1 converts an analog picture input signal 101 into the corresponding digital signal and gives a digital picture signal sequence 102 according to the sequence of raster scanning. The output procedure of the raster scan digital picture signal sequence 102 on the time series of the picture signal is converted into block scaning by the raster/block scan converter 2, and thereby the digital picture signal sequence is converted into a block scan picture input signal 103 arranged sequentially in lattice block units (the interior of the block is raster scanning) from the top to the bottom and from the left to the right on the screen. A regenerative picture signal 104 of one frame before regenerated according to interframe DPCM loop is read from the frame memory 3. The movement vector detector 4 executes the block matching of the present block scan picture input signal 103, the regenerative picture signal 104 of one frame before and the picture signal and gives the movement vector r = (u, v) of the picture signal 104 of one frame before which minimizes the degree of analogy. The movement vectors (u, v) corresponds to the horizontal and the vertical shifts of the picture element of the block of the regenerative picture signal 104 of one frame before. On the basis of the movement vector 104, the variable delay circuit 5 block-shifts the one-frame preceding regenerative picture signal 104 by the movement vector and gives a predictive picture signal 106 which is the closest to the present block scan picture input signal 103. The subtractor 6 calculates the differential between the block scan picture input signal 103 and the predictive picture signal 106 and gives a predictive error picture signal 107 to the scalar quantizer 7. The scalar quantizer 7 converts the predictive error picture signal 106 into a predictive error quantization picture signal 108 reduced in quantization level at picture element unit. The adder 8 adds the predictive error quantization picture signal 108 and the predictive picture signal 106 and gives a regenerative picture signal 109 including scalar quantization error to the frame memory 3. The frame memory performs delaying operation to delay the present regenerative picture signal 109 by one frame. In the movement compensation inter-frame DPCM loop, supposing that the picture input signal 103 is s f (m, n), the predictive picture signal 106 is p f (m, n), the predictive error signal 107 is ε f (m, n), scalar quantization noise is Q f / s(m, n), the predictive error quantization signal 108 is S and f (m, n) and the one-frame preceding regenerative picture signal 104 is S and f-1 (m, n), then ε f (m, n) = S f (m, n) - P f (m, n), ε f (m, n) = ε f (m, n) + Q f s (m, n), S f (m, n) = P f (m, n) + ε f (m, n) = S f (m, n) + Q f s (m, n), and S f-1 (m, n) = S f (m, n)·Z -f . where Z -f denotes delay corresponding to one frame. P f (m, n) is expressed through movement compensation on the basis of S and f-1 (m, n) by the following formula: P f (m, n) = S f-1 (m-u, n-v). Fig. 5 shows an example of the constitution of the movement vector detector 4 for carrying out movement compensation. Referring to Fig. 5, there are shown an analogy degree computation circuit 10, a movement region line memory 11, a line memory control circuit 12, an analogy degree comparator 13 and a movement vector latch 14. The movement vector detector 4 gives S f (R) produced by blocking a plurality of the sequences of the present picture input signal 103 to the analogy degree computation circuit 10. At this moment, the lines of the one-frame preceding regenerative picture signal 104 stored in the frame memory 3 corresponding to the tracking range of the movement region of S f (R) are stored in the movement region line memory 11. The line memory control circuit 12 sends sequentially the blocks adjacent to a plurality of blocks S f-1 (R+r) of the one-frame preceding regenerative image signal 104 to the analogy degree computation circuit 10. The analogy degree computation circuit 10 computes the analogy degree L(u, v) of the blocks in the neighborhood of S f (R) and S f-1 (R-r) and the analogy degree comparator 13 determines the minimum analogy degree Since u and v corresponds to the horizontal and the vertical address shifts of blocks in the movement region line memory 11 respectively, the analogy degree comparator 13 gives a movement detection strobing signal 111 to the movement vector latch 14 when the analogy degree is minimized, to take in a movement vector address 112. The movement vector latch 14 sends the displacement r of S f-1 (R-r) relative to S f (R) minimizing the analogy degree L(u, v) as a movement vector 105 to the variable delay circuit 5 and the variable-length encoder 9 of Fig. 3. The variable-length encoder 9 of Fig. 3 processes the movement vector 105 and the predictive error quantization signal 108 through variable-length encoding to reduce the amount of information of the picture signal. The variable-length encoding enables the transmission of the movement compensation inter-frame encoding output 110 at a low bit rate. Since the conventional movement compensation inter-frame encoder is constituted as described hereinbefore, the movement compensation operation is performed for every block and the inter-frame DPCM operation is performed for every picture element. Accordingly, the identification between the minute variation of the screen and noise is impossible and the variable-length encoding of the movement vector and the predictive error quantization signal is difficult. Furthermore, since the control of the variation of the quantity of produced information resulting from the variation of the movement scalar is difficult, a large loss is inevitable when transmission is carried out through a transmission channel of a fixed transmission capacity. Still further, encoding the predictive error quantization signal for every picture element is inefficient. Since the movement compensation system is liable to be affected by transmission channel error, the frame memory needs to be reset or repeated transmission when transmission channel error occurs, which requires long resetting time. SUMMARY OF THE INVENTION Object of the present invention is to provide a sequential approximation vector quantizer employing tree search vector quantization in the vector quantization segment and capable of preventing unnatural regenerated picture when the picture changes suddenly even if the feedback control of the amount of data is performed, through sequential approximation at each stage, namely, through the variable control of the number of stages. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an explanatory pictorial view for facilitating the understanding of the definition of the movement of picture signals between frames by a movement vector; Figure 2 is an explanatory view showing the relation between the movement vector and the arrangement of the picture elements of a moved block; Figure 3 is a block diagram showing a conventional movement compensation inter-frame encoder; Figure 4 is a graph showing the input-output characteristics of the scalar quantizer employed in the encoder of Fig. 3; Figure 5 is a block diagram of the movement vector detector employed in the encoder of Fig. 3; Figure 6 is a block diagram showing the constitution of the encoder of an inter-frame vector quantizer; Figure 7 is a block diagram showing the constitution of the vector quantization encoder of Fig.6 ; Figure 8 is a block diagram showing the constitution of the vector quantization decoder of Fig.6 ; Figure 9 is a block diagram showing the constitution of the decoder of an inter-frame vector quantizer; Figure 10 is an explanatory representation for the explanation of a picture signal blocking process; Figure 11 is an explanatory representation of a tree search vector quantization; Figure 12 is a block diagram showing the constitution of the encoder of a serial approximation vector quantizer embodying the present invention; Figure 13 is a block diagram showing the constitution of the TSVQ encoder of Fig. 12; Figure 14 is a block diagram showing the constitution of the second-stage TSVQ encoder of Fig. 13 ; Figure 15 is a block diagram showing the constitution of the TSVQ decoder of Fig. 13; Figure 16 is a block diagram showing the constitution of the decoder of a serial vector quantizer. An embodiment of the present invention will be described hereinafter. This embodiment is an inter-frame vector quantizer capable of performing highly efficient coding of picture signals by the use of the correlation between picture signals in consecutive scenes. Prior to the concrete description of this embodiment, the fundamental constitution of the inter-frame vector quantizer will be explained. Fig.6 is a block diagram showing the constitution of an encoder. In Fig.6 , indicated at 701 is a digitized picture signal sequence, at 702 is a raster/block scan converter for blocking every plurality of picture signal sequences 701 arranged along the direction of raster scanning, at 703 is blocked picture signal sequence, at 704 is a subtracter, at 705 is the predictive error signal sequence of the blocked picture signal, at 706 is a movement detection vector quantized encoder, at 707 is a vector quantization coded output, at 708 is a vector quantization decoder, at 709 is a vector quantization decoded output, i.e., a regenerative predictive error signal sequence, at 710 is an adder, at 711 is a block of regenerated picture signal sequences, at 712 is a frame memory, at 713 is a block of regenerative picture signal sequences delayed by a one-frame cycle and also is a block of predictive signal sequences for predicting the block 730 of picture signal sequences, at 714 is a transmission buffer, at 715 is a feedback control signal and at 716 is the output of the encoder. Fig.9 shows the details of an exemplary constitution of the vector quantization encoder 706. In Fig.7 , indicated at 717 is a mean value separating circuit, at 718 is an amplitude normalizing circuit, at 719 is the inter-frame difference of the block of picture signal sequences normalized with respect to amplitude after separating the mean value, at 720 is a mean value calculated by the mean value separating circuit 717, at 721 is the amplitude calculated by the amplitude normalizing circuit 718, at 722 is a movement detection circuit for deciding, on the basis of the mean value 720 and the amplitude 721, whether or not the blocked picture signal sequences which are presently being processed have made any significant movement with respect to the block of picture signal sequences located at the same position in the one-frame cycle preceding frame, at 723 is the dicision signal given by the movement detection circuit 722, at 724 is a code table address counter, at 725 is a code table index, at 726 is an output vector code table memory, at 727 is a code table output vector, at 728 is a distortion calculating circuit, at 729 is a minimum distortion detecting circuit, at 730 is a signal indicating the minimum distortion and at 731 is a transmission latch. Fig.8 shows the details of the constitution of the vector quantization decoder 708. In Fig.8 , indicated at 732 is a reception latch, at 733 is an amplitude regenerating circuit and at 734 is a mean value regenerating circuit. Fig.9 shows an exemplary constitution of the decoder. In Fig.9 , indicated at 735 is a reception buffer, at 736 is a block/raster scan converter which acts reversely to the raster/block scan converter 702 and at 737 is a regenerated picture signal sequences. The actions of the components will be described hereinafter. First the general actions of the encoder will be described in connection with Fig.6 . Basically, this encoder is based on the conception of the inter-frame DPCM system. On a scene, the digitized picture signal sequences 701 are regarded as square lattice samples, however, the input is given in an order along the raster scanning direction. The raster/block scan converter 702 partitions the picture signal sequences 701 in blocks as shown in Fig.10 and provides these blocks as output signal. Suppose the blocked picture signal sequences 703 is a frame No. f is expressed by a signal source vector S f = {S₁, S₂, ..., S k } f . In Fig. 12, k = 5. Further, suppose the differences 705 between the signal source vectors 703 and the blocks 713 of the predictive signal sequences calculated by the subtractor 704 is ε f , the blocks 709 of the regenerative differential signal sequences formed by the vector quantization encoder 706 and the vector quantization decoder 708 is ε and f and the predictive signal sequences 713 given by the frame memory 712 is P f . Then, the general actions of the encoder shown in Fig.8 are expressed by where Q is a vector quantization error and Z -f is a delay of one-frame cycle caused by the frame memory 712. Accordingly, P f is equal to the regenerative signal sequence S and f-1 of the block S f-1 of picture signal sequences one-frame cycle before the signal source vector 703, namely, the picture signal sequence at the same position in the frame No. f-1. The vector quantization coded output 707 obtained through the above-mentioned process is the difference between the signal source vector 703 and the block 713 of the predictive signal sequences namely, a result of data-compression of the block ε f 705 of the predictive error signals by the vector quantization encoder 706 and the output 707 is given to the transmission buffer 714, and then given to the transmission line as the encoder output 716. The actions of the vector quantization encoder 706 and the vector quantization decoder 708 will be described in connection with Figs.7 and 8. In vector quantization, a block composed of k pieces of samples (k is the plural number) is regarded as an input vector in k-dimensional signal space, output vectors which have minimum distortion with respect to input vectors which are given sequentially are selected from a set of output vectors prepared previously on the basis of the probability distribution of input vectors so that the distortion with respect to the input vector is generally minimized, and the indices attached to the selected output vectors are quantized and given as outputs. In the decoding section, output vectors corresponding to the indices are read from the same set of output vectors prepared also in the decoding section. The input vector given is the block ε f ={ε₁, ε₂, ..., ε k } f 705 of the predictive error signals. The mean value separating circuit 717 substracts the mean value µ 720 operated by the use of a formula from the block ε f 705, the amplitude normalizing circuit 718 normalizes the output of the mean value separating circuit 717 by the amplitude σ 721 calculated by the use of a formula to form a mean value separation normalized input vector X = {(X₁, X₂ , ..., X k } 719. That is, X j = (ε j - µ)/σ (j = 1, 2, ..., k) The amplitude may be calculated by formulas other than formula (3), such as, for example, Through the mean value separation normalizing process, the input vectors can be distributed at random within a limited range in k-dimensional signal space, and thereby the efficiency of vector quantization is improved. In implementing the mean value separation normalizing process, the set of output vectors needs to be prepared on the basis of the distribution of the input vectors processed through the mean value separation normalizing process and, after the output vectors have been read in the decoding section, processes reverse to the mean value separation normalizing process, such as amplitude regeneration and mean value regeneration, need to be implemented. Naturally, vector quantization may be such a vector quantization omitting those reverse processes. Mean value separation normalized output vectors prepared on the basis of the probability distribution density of the mean value separation normalized input vector so that the distortion from the mean value separation normalized input vectors is generally minimized are written previously in the output vector code table memory 726. When a mean value separation normalized input vector X 719 is given, the code table address counter 724 sequentially dives indices of vectors stored in the output vector code table memory 726, i.e., code table addresses 725, to read the mean value separation normalized output vectors y τ = {y τ1 , y τ2 , ..., y τk } (τ = index) 727 from the output vector code table memory 726. The distortion calculating circuit 728 calculates the difference between the mean value separation normalized input vector S 719 and the mean value separation normalized output vector y τ 727. Several distortion calculating methods are available, for example, such as those shown below. where d( X , y τ ) is distortion. The minimum distortion detecting circuit 729 gives a strobing signal 730 when a distortion d( X , y τ ) which is smaller than the past minimum distortion is found. At the same time, the latch 731 stores the index 725. At a stage where the code table address counter has given all of a series of indices, the index i of a mean value separation normalized output vector which minimizes distortion from the mean value separation normalized input vector is stored in the latch 731. The index, the mean value µ 720 and the amplitude σ 721 form the vector quantization coded output. The data is compressed further by the use of the correlation between successive scenes. Since the input vectors are blocked predictive error signals, the input vectors are distributed around a zero vector. The amount of data can be reduced considerably by setting a threshold to regard input vectors distributed near the zero vector as zero vectors and providing neither index, mean value nor amplitude. The movement detecting circuit 722 receives the mean value µ 720 and the amplitude σ 721 and decides whether or not the block of the predictive error signal sequences can be regarded as a zero vector, namely, the present block has made any significant variation (movement) with respect to the corresponding block in the one-frame cycle preceding frame. This decision is made by examining the mean value and the amplitude with respect to a threshold T ϑ as when µ ≦ T ϑ and σ ≦ T ϑ , significant movement has not been made and when µ > T or σ > T ϑ , significant movement has been made. Accordingly, the latch 731 gives only a signal indicating "no movement" when a code indicating "no movement" is given as the result 723 of movement detection and gives the index 725, the mean value 720 and the amplitude 721 in addition to a signal indicating "movement" as a vector quantization coded output signal 707. The transmission buffer 714 keeps monitoring the amount of information transmitted and gives a feedback control signal 715 to control the threshold T ϑ . Thus the amount of information transmitted is controlled. In the vector quantization decoder 708, the latch 732 receives the vector quantization coded output 707. Upon the reception of a signal indicating "movement", the latch 732 reads a mean value separation normalized output vector y τ 727 from the output code table memory 726 according to the index i 725. The amplitude regenerating circuit 733 multiplies the mean value separation normalized output vector 727 by the amplitude 721 and the mean value regenerating circuit adds the mean value 720 to the output of the amplitude regenerating circuit 733 and gives an output vector, namely, regenerated predictive error signal sequences ε and f 709. That is, ε f = σ · y τj + µ (j = 1, 2, ..., k) Upon the reception of a signal indicating "no movement", the latch 731 gives zero for the mean value 720 and amplitude 721. In this case, the output vector is a zero vector. The operation of the decoder will be described in connection with Fig.9 . The reception buffer 734 receives the encoder output 716 and decodes the vector quantization coded output signal 707. The vector quantization decoder 708 decodes, as described above, the output vector, i.e., the predictive error signal sequences ε f 709, and the adder 710 and the frame memory 712 regenerate the block S and f 711 of regenerated picture signal sequences through operation based on the following formulas, where Q is vector quantization error and Z -f is a delay of one-frame cycle. The block/raster converter 736 scans in the raster scanning direction and converts the blocked regenerated picture signal sequences S and f 711 to provide regenerated picture signal sequences 737. The constitution as described hereinbefore of this basic inter-frame vector quantizer has problems such that the threshold T ϑ becomes large to stabilize the amount of information, when the picture varies sharply and, consequently, the region changed from that of the preceding scene remains as in the preceding scene with some blocks, and thereby the boundary between blocks becomes conspicuous. The embodiment of the present invention based on the basic principle will be described in connection with the accompanying drawings. Consider a binary tree as shown in Fig. 11. The root of the tree and each node correspond to k-dimensional signal space R k and to a space formed by partitioning R k in steps respectively. Each node has a representative point, which is the output vector of k dimensions. The output vectors of each step are produced on the basis of the distribution of input vectors so that the total sum of distortions between the input vectors and the output vectors is minimized. That is, the stepped partition of the space is made on the basis of the distribution of input vectors in R k . When an input vector is given, an output vector corresponding to the last node is selected by comparing the distortions of two output vectors branched from a node from the input and selecting a branch leading to an output vector having a smaller distortion from the input vector, from the first step through the last step. When the last step is the n th step, the binary tree has 2 n nodes in the last step. In Fig. 11, n = 3. The description given above explains the principle of tree search vector quantization (TSVQ). Fig. 14 shows an exemplary constitution of an encoder according to the present invention. In Fig. 12, indicated at 701 are digitized picture signal sequences, at 702 is a raster/block scan converter, at 703 are blocked picture signals, at 704 is a subtractor, at 705 is a block of predictive error signals, at 738 is a TSVQ encoder based on the above-mentioned principle, at 739 is a TSVQ encoder output, at 740 is a TSVQ decoder, at 741 is a TSVQ decoder output, at 710 is an adder, at 742 is a block of regenerated picture signals, at 712 is a frame memory, at 743 is an output of the frame memory 712, i.e., a block of predictive signals, at 744 is a transmission buffer, at 745 is a feedback control signal and at 746 is an encoder output. Fig. 13 shows the details of an exemplary constitution of the TSVQ encoder 738. In Fig. 13, indicated at 747 is a limiter which measures the distance between an input vector and the origin and quantizes the input vector into a zero vector when the distance is smaller than a threshold, at 748 is a zero vector detection signal given when an input vector is quantized into a zero vector by the limiter 747, at 749 is a coding controller, at 750 is a first-stage TSVQ encoder, at 751 is an output vector index given at a stage where the search has been made as far as the first-stage TSVQ encoder, at 752 is a second-stage TSVQ encoder, at 753 is an output vector index given at a stage where search has been made as far as the second-stage TSVQ encoder 752, at 754 is a third-stage TSVQ encoder and at 755 is an output vector index given at a stage where the search has been made as far as the third-stage TSVQ encoder 754. Fig. 14 shows the further details of an exemplary constitution of the second-stage TSVQ encoder 752. In Fig. 14, indicated at 756 is a second-stage output vector code table memory, at 757 is a parallel distortion calculating circuit, at 758 is a distortion comparator, at 759 is a resultant signal of comparison given by the distortion comparator 758 and at 760 is an index register. Fig. 15 shows an exemplary constitution of the TSVQ decoder 740. In Fig.15 , indicated at 761 is an index latch, at 762 is an output vector index and at 763 is an output vector code table memory. Fig. 16 shows an exemplary constitution of a decoder according to the present invention. In Fig.16 , indicated at 764 is a reception buffer and at 765 are regenerated picture signal sequences. First the operation of the encoder will be described hereunder. Digitized picture signal sequences 701 are samples given sequentially along the direction of raster scanning. The raster/block scan converter 702 blocks every k picture signal sequences and scans and converts the blocks sequentially. Suppose the blocked picture signal sequences 703 in a frame No. f are expressed by a signal source vector S f = {S₁, S₂, ..., S k } f . When ε f is the difference 705 between the signal source vector 703 and the block 743 of predictive signals, calculated by the subtracter 704, ε and f is a TSVQ decoded output formed by the TSVQ encoder 738 and the TSVQ decoder 739, i.e., a block 741 of the regenerated predictive error signals, S and f is a block of regenerated signals, and P f is a block 743 of predictive signals obtained as a block of regenerated picture signals delayed by one-frame cycle by the frame memory 713. Then, the basic actions of the encoder shown in Fig.12 are expressed by: where Q is a vector quantization error and z -t is a delay of one-frame cycle caused by the frame memory 712. Basically, the encoder is constituted on the basis of the inter-frame DPCM system. The transmission buffer 744 receives a TSVQ coded output 739 and gives a coded output 746 to a transmission line. The transmission buffer 744 monitors the amount of transmitted information and controls the amount of coded data in the TSVQ encoder 738 according to the feedback control signal 745. The mode of this control, the TSVQ encoder and the TSVQ decoder will be described in connection with Figs. 13, 14 and 15. Suppose an output vector set Y of a binary tree structure as shown in Fig. 11 is obtained. Y is formed previously on the basis of the distribution of input vectors so that the total sum of the distortions of the vectors belonging to each step of the binary tree from the input vectors is minimized. Tree search vector quantization if the repetition of comparison for distortion between paired two output vectors and an input vector to decide paired two output vectors to be compared at the next step. The three steps of the tree shown in Fig. 11 correspond to the first-stage TSVQ encoder 750, the second-stage TSVQ encoder 752 and the third-stage TSVQ encoder 754 of Fig. 13. The block ε f 705 of predictive error signals is given as an input vector. The limiter 747 calculates the distortion of the input vector from the origin (zero vector) and regards the input vector 705 as a zero vector when the distortion is smaller than a predetermined threshold and gives a zero vector detection signal 748. This process is expressed by: when d( ε f , 0 ) ≦ T ϑ , ε f → 0 where T ϑ is a threshold, ε f is an input vector and d( ε f , 0 ) is the distortion of the input vector from the zero vector. When the distortion is greater than the threshold T ϑ , the input vector 705 is sent to the first-stage TSVQ encoder 750. The distortion may be defined by various ways. Several ways of defining the distortion are shown below by way of example. where d( a , b ) is the distortion between a vector a = {a₁, a₂, ..., a k } and a vector b = {b₁, b₂, ..., b k }. The input vectors which have not been regarded as a zero vector are processed through the first-, the second- and the third-stage TSVQ encoders for tree search vector quantization. At each stage, the distortion between the input vector and paired two output vectors assigned through the distortion comparison at the preceding stage is calculated to select one of the paired two vectors which has a smaller distortion from the input vector than the other. This information is added to the results of comparison given by the preceding stages and is sent to the next stage. At the first stage, since only one pair of output vectors is given, the result of comparison at the previous stages is neither necessary nor available. Suppose the result of distortion comparison at the first stage is i₁ 751. At the second stage, the distortion between the input vector and a pair of output vectors assigned on the basis of i₁ is calculated. The result of the calculation is added to i₁ to form i₂. The third stage receives the input vector ε f an i₂ and gives an index i₃. For example, as shown in Fig. 11, suppose "zero" is assigned when the left branch is selected and "1" is assigned when the right branch is selected. Then, i₁, i₂ and i₃ are expressed by one-digit, two-digit and three-digit binary numbers respectively corresponding to the indices of the output vectors. In the encoder of this invention, the number of stages of tree search vector quantization is controlled variably by the feedback control signal for variable-length coding. The coding controller 749 receives the feedback control signal 745, the zero vector detection signal 748, the index i₁ 751, the index i₂ 753 and the index i₃ 755 and, when the input vector is regarded as a zero vector, codes a code corresponding to zero vector. then the input vector is not regarded as a zero vector, the coding controller codes i₁, i₂ or i₃ on the basis of the feedback control signal 745 as an output vector index. When the transmission line, namely, the consecutive approximation of the input vector at each stage, has no reserve, the output of a stage closer to the first stage is coded and, when the transmission line has a reserve, the output of the last stage is coded. The amount of information of the input of a stage closer to the first stage is smaller, therefore, the amount of information to be coded is controlled in the manner as mentioned above. Fig. 14 shows an exemplary constitution of the second-stage TSVQ encoder 752. Output vectors corresponding to the second step of the output vector set Y are stored in the second-stage output vector code table memory 756. The second-stage output vector code table memory 752 provides a pair of output vectors assigned by the index 751 of the preceding stage. The parallel distortion calculating circuit 757 calculates the distortions of the pair of output vectors from the input vector 705 and the distortion comparator 758 compares the distortions and gives the result of comparison as a control signal 759. Several distortion calculating methods are available as described in connection with the limiter 747. The index register 760 adds the result of distortion comparison at the second stage to the index 751 given by the preceding stage and gives a second-stage index 753. The actions of the first stage and the third stage are almost the same as that of the second stage, except that the respective output vector code table memories of the first, second and third stages store output vector sets corresponding to the first, second and third stages respectively and that the first stage is not provided with the index of the preceding stage. All the output vectors belonging to the output vector set Y and zero vectors are stored in the output vector code table memory 763 of the TSVQ decoder 740. The index latch 761 decodes the code of the zero vector or the index of the output vector on the basis of the TSVQ coded output 739 and reads a TSVQ decoded output 741 from the output vector code table memory 763. The operation of the decoder of this invention will be described in connection with Fig. 16. The reception buffer 764 receives the encoder output 746 and decodes the TSVQ coded output 739. The TSVQ decoder 740 decodes the output vectors as described earlier and the adder 710 and the frame memory 712 regenerate the block S and f of regenerative picture signal suquences through operation given by: where Q is a vector quantization error, Z -t is a delay of one-frame cycle caused by the frame memory 712 and ε and f is a block of regenerative predictive error signals obtained as output vectors. The block/raster scan converter 736 scans the block S and f 742 along the direction of raster scanning and converts the same into a regenerated picture signal sequences 765. Although three-stage tree search vector quantization has been described by way of example, naturally, in practice, the number of stages is arbitrary and, generally, the number of stages is greater than three. This embodiment is applicable to wide technical range relating to television transmission without being limited particularly to inter-frame coding and is also applicable to a sequential approximation quantizer capable of controlling the amount of data.

Claims: A vector quantizer comprising: a frame memory (712) capable of storing past picture signals of at least one frame; a subtractor (704) which calculates the difference between a block of predictive signals (743) read from the frame memory (712) and an inputted block of picture signal sequences (703) formed by blocking every K ,K being a plural number, present picture signal sequences to provide a predictive error signal block; an encoder (738) which receives the output signal (705) from said subtractor (704) and outputs an encoded signal (739); a decoder (740) having an output vector code table (763) which stores output vectors formed in a binary tree of n steps ,n being a positive integer, by successive binary partition-operations on the input vectors; an adder (710) which adds the regenerated predictive error signal block given as an output vector decoded by the decoder (740) and the predictive signal block to calculate regenerated picture signals to be used as past picture signals after being delayed by one-frame cycle or more by the frame memory (712); and a transmission buffer (744) which gives a coded output (746) to a transmission line and outputs a feedback control signal (745) to the encoder (738) to control the amount of information to be encoded, whereby said encoder (738) comprises: a limiter (747) which receives the predictive error signal block given by the subtractor (704) as an input vector and outputs a zero vector detection signal (748) if the distortion of the input vector from zero vector is smaller than a predetermined threshold and otherwise outputs the input vector (705); a plurality of n-th stage tree search vector quantization (TSVQ) encoders (750,752,754), each of which receives the input vector (705) and an index (751 or 753) outputted from the respective preceding stage TSVQ encoder (750 or 751) and outputs the index (751. 753 or 755) of each stage; and a coding controller (749) which receives the zero vector detection signal (748) from the limiter (747), the indices (751,753,755) from each TSVQ encoder (750,752 or 754) and the feedback control signal (745) from the transmission buffer (744), said controller controls adaptively said amount of information to be encoded on the basis of the feedback controlling signal (745) to output the index (751,753 or 755) or a zero vector, wherein each one of said TSVQ encoders (750, 752 or 754) includes; an output vector code table (756) having the same contents as that of the output vector code table (763) of said decoder (740) and providing a pair of output vectors assigned by the index of the respective preceding stage and corresponding to two nodes in said binary tree under a node assigned by the input vector (705) or the index (751 or 753) of the preceding stage; a parallel distortion calculating circuit (757) which calculates distortions between the input vector (705) and the two output vectors outputted by the output vector code table (756); and a distortion comparator (758) which compares the two distortions provided by the distortion calculating circuit (757) and outputs a result of the comparison (759) ; and an index register (760) which adds the result of the comparison (759) to the index (751 or 753) of the preceding stage to provide the index (753 or 755) for the next stage TSVQ encoder (752 or 754) and the coding controller (749).

Inventors: ASAI KOHTARO C O MITSUBISHI DE, ITO ATSUSHI C O MITSUBISHI DEN, MURAKAMI TOKUMICHI C O MITSUBI, ASAI, KOHTARO, C/O MITSUBISHI DENKI K.K., ITO, ATSUSHI, C/O MITSUBISHI DENKI K.K., MURAKAMI, TOKUMICHI, C/O MITSUBISHI DENKI K.K.
Applicants: MITSUBISHI ELECTRIC CORP, MITSUBISHI DENKI KABUSHIKI KAISHA
Application year: 1984
Main classification: H04N7
IPC codes: H04N7, G06T9