MOUNTING OF SEMI-CONDUCTOR DEVICES

Abstract: A semi-conductor chip (12) mounted on a substrate (13) is located in a well (14) surrounded by a layer (15) of glass ceramic material of approximately the same thickness as the chip. The connection between pads (17) on the chip 12 and on copper metallisation on the surface of the glass ceramic is made by wires (18). The substrate (13) is made of copper or other metal of similar high thermal conductivity and com­ prises a two dimensional array of closely spaced narrow pil­ lars extending from a flat base. This construction enables heat to be conducted away rapidly by means of the pillars but as a result of the enormous reduction in the mechanical stiffness of the metal substrate in the plane of the surface avoids the undesirable stress and strains which would otherwise result from temperature changes.

Description: Mounting of semi-conductor devices. In present day electronics with the ever increasing scale of integration at the semi- conductor chip level and faster switching speeds, circuit densities are increasing. There is a need both to keep external inter-connection paths lengths as short as possible and to dissipate the significant amounts of heat generated in the chips. As a result there is intense development activity in the field of packaging and inter- connection with many alternatives to conventional methods being proposed. For thermal management purposes, substrates capable of withstanding exposure to high temperatures and with higher thermal conductivity than conventional printed circuit boards are required. Copper backed polyimide has been tested as a possible organicbased alternative to fibre glass boards while porcelain enamelled steel and copper clad invar are possible substitutes for alumina ceramic as inorganic substrates suitable for thick film processing. For very high speed integrated circuits in the latest generation of large computers quite complex cooling arrangements employing water cooling, refrigerant gases, helium, spring loaded plungers and so on have been adopted. It is clear that no single ideal solution to the problem has yet emerged and that, moreover, the problem will become more acute with increasing size and density of circuits. Even with forced cooling arrangements some other means of heat removal becomes essential. In theory the mounting of chips on a support of high thermal conductivity would appear to offer a possible solution and the use of highly conductive metal such as copper seems the obvious choice. Unfortunately copper has a much higher co-erficient of thermal expansion than silicon and therefore if chips are mounted directly on a solid copper base undesirable stress and strains will be introduced when the temperature changes. Although it would be possible to avoid this problem, by the use of copper clad invar, since the expansion co-efìcient of the composite sheet can be made to match that of silicon or alumina, this would involve a serious penalty in terms of thermal efficiency since copper clad invar has a thermal conductivity some twenty five times lower than that of pure copper when the conductivity is measured in direction normal to the sheet, i.e. through the invar layer. In other words, this would largely negate the advantage of using copper in the first place. The same problem applies to the use of other metals having a thermal conductivity of the same order as those ofcopper and its alloys, e.g. in particular, aluminium, gold and silver and their alloys. For the purpose of the present specification these will be referred to as "metals of high thermal conductivity". According to the present invention, a substrate for the mounting of a semi-conductor chip or chips and formed of a metal of high thermal conductivity comprises,at least in the region covered by each wafer of silicona two-dimensional array of closely spaced narrow pillars extending from a flat base. This arrangement has the effect of producing an enormous reduction in the mechanical stiffness of the metal substrate in the plane of the surface, thus drastically reducing the stress and strain which the metal can impart to the silicon when a temperature change occurs. Exact stress analysis is complex but the reduction in strain is clearly a function of size. Approximately calculations indicate that with a favourable geometry the maximum stress which the pillars can exert on the silicon over a 1 cm length may be reduced by a factor of more than 104 compared to a solid base of the same metal. Thus, the strain in the silicon can be reduced to negligible proportions. There will be some loss in thermal conductivity in the important direction perpendicular to the plane of the silicon slice, but this loss, which will be directly proportional to the amount of metal absent as a result of the spaces between the pillars, will clearly reduce the conductivity by not more than half. Since pure copper, for example, has a thermal conductivity approximately twice that of silicon, ten times that of alumina and twenty five times that of copper clad invar, a copper substrate in accordance with the invention will obviously provide excellent heat conduction. In order to produce a substrate in accordance with the invention from a solid substrate of high conductivity metal, the most straight forward method is to form an orthogonal array of slots, i.e. by cutting or etching, so that the metal remaining between the slots defines the pillars, which are therefore rectangular in cross section. Although such method may be the most straight forward, the use of a mechanical cutting process limits the narrowness of the slot which can be achieved and may be relatively expensive. On the other hand, if etching is used, it is found difficult to avoid under-cutting beneath the edge of the layer of resist which is used to form a mask delineating the pattern. This leads to slots with sloping sides which are undesirable. Accordingly, instead of forming the desired structure by the removal of metal to form slots, similar geometry can be achieved by forming pillars in an additive process, e.g. by electro-forming the array of pillars on a flat metal sheet. For this purpose it is necessary to use an insulating mask, for example-in the form of thick paper, in the configuration of a honeycomb, which is attached to the metal sheet. The cross section of the pillars is then determined by the configuration of the mask, and may, for example, be hexagonal, although the actual shape of the cross section is not important. This method allows the formation of pillars with vertical sides and narrow gaps between them, but the practical difficulty lies in the production of the very fine honeycomb mask needed for this process. Yet a further method of producing a substrate in accordance with the invention consists, in principle, of mounting an array of short lengths of copper (or other metal of high thermal conductivity) wire on a copper base in a manner analogous to bristles on a brush. This may be achieved in practice by the steps of assembling a bundle of wires of the high conductivity metal, impregnating the bundle with a temporary binder to form a coherent assembly, cutting a transverse slice from the assembly, forming a base of the high conductivity metal on the ends of the wires at one face of the slice and removing the temporary binder. Most conveniently, the bundles of wires may be assembled by winding a coil of wire and then, after impregnation, cutting transverse slices as required, the base preferably being formed on each slice by electroplating. In practice, the impregnation of the bundle of wires may be carried out under vacuum and the binder then cured to form a rigid structure. The binder may be in the form of a lacquer which can be subsequently removed by the use of common organic solvents and the wire used for the formation of the coil or bundle may be lacquer coated, so that the wires in the bundle are held at the correct spacing prior to impregnation. This coating is then subsequently removed with the temporary binder. When using a bundle of wire in this way, the pillars of the substrate will, of course, be circular in section. In typical example, using wire 0.5 mm thick, the spacing may be 0.1 mm and the thickness of the base may be approximately Z mm. The result of the use of a substrate in accordance with the invention is a packaging system which exploits thee conductivity of the metal for thermal management but which is free from the problem of the mechanical stress introduced because of the mis-match in expansion of the metal and silicon. Quite apart from this, the packaging arrangements must provide for connection to circuits with a high pin count and for the necessary dense inter-connections external to the chip. The invention will now be described in more detail, with reference to the accompanying drawings, in which: Figures 1 and 2 are a section and plan view respectively of a copper substrate in accordance with the invention, Figure 3 is a view similar to Figure 2 of an alternative form of substrate; and Figure 4 is a sectional view of an assembly including the substrate shown in Figure 1. Figures 1 and 2 show part of a substrate in the form of a copper base 1 provided with an array of square-section pillars 2 defined by an orthogonal array of narrow slots 3 which may be cut or etched in the surface. The slots need only be provided beneath the silicon bonding area, but as a matter of convenience, the slots may extend over the whole area of the sheet so that the sheet may be pre-prepared as a stock item. If the slots extend over the whole area this leads to a slight loss in mechanical stiffness, but this can easily be compensated for. The thickness of the copper sheet is not critical, but the total thickness will typically be in the range 0.5mum to 0.5 mm. The width, depth and spacing of the slots can be varied to suit the size and thickness of the silicon to be mounted and the degree of stress relief required. A copper substrate with deep, closely spaced slots will provide a more flexible support than a substrate with shallow, widely spaced slots, but typical examples are slot width 0.lmm, depth 0.4mm, spacing 0.4mm. Quite apart from the main advantages of such a substrate, i.e. as already discussed, an additional benefit lies in the avoidance of air entrapment during the actual attachment of the chip, which is often a problem in bonding over large areas. Figure 3 shows an alternative form of substrate in which pillars 4 are of circular section, being formed of short lengths of copper wire by a process as described above. Substrates in accordance with the invention are suitable for use with a wide range of assemblies and mounting arrangements, an example of which is shown in Figure 4. Figure 4 shows a chip 12 mounted on a copper substrate 13r according to either Figure 2 or Figure 3. The mounting may be either directly or if necessary, with a thin insulating layer at the interface. The chip sits in a "well" 14 surrounded by a layer 15 of glass ceramic material previously applied by screen printing and firing which is approximately the same thickness as the chip itself. Connection between pads 17 on the chip 12 and on copper metallisation on the surface of the glass ceramic is made by a wire 18 using conventional wire bonding techniques. Co-planar chip and ceramic surfaces facilitate this bonding step. The relatively large thickness of glass ceramic reduces capacitive coupling between conductor lines on the surface via the metallic substrate. As mentioned originally, copper has a much higher co-efficient of thermal expansion (16.7 x 10 6 C 1) than silicon (C. 2.7 x 10 6 C 1) so that at a bonded interface between layers of the two materials a differential strain will be set up when a temperature change occurs. If the copper is a relatively massive continuous body compared to the silicon most of the strain will appear in the latter, and for a temperature change of 100 C the magnitude of the strain in the silicon will therefore be up to a maximum value of 0.14%. Although for very small chips (i.e. for those where the thickness of the silicon is of the same order of magnitude as the length of the sides) such a strain may be safely accommodated by a slight distortion in the shape of the chip, for larger chips the use of a slotted copper substrate reduces the strain in the silicon to an acceptable level. In order to demonstrate the practical utility of a substrate in accordance with the invention, tests were carried out as described in the following example. EXAMPLE 50mm squares of silicon wafer approximately 0.375 mm thick were bonded to plain copper sheets, and to copper sheets the surface of each of which had an orthogonal array of slots cut into it by means of a numerically controlled milling machine. The slot dimensions were depth 1.4mum, width 0.25mm, separation 0.40 mm. A silver loaded epoxy resin adhesive of the type commonly used for bonding silicon chips to substrates was employed. This was cured at 150 C for one hour. Miniature foiltype strain gauges of 120 ohm nominal resistance and a gauge factor of 2.0 were bonded to the surface of the silicon squares mounted on the plain copper and slotted copper and also onto a control sample of unmounted silicon. The resistance of each strain gauge was measured at room temperature and again at approximately 120 C, and the equivalent thermally induced strain calculated. The results are given in the following table. EMI10.1 <tb> <SEP> Test <SEP> Sample <SEP> <SEP> Temperature <SEP> Change <SEP> in <SEP> Gauge <SEP> Equivalent <SEP> Thermally <tb> internal <SEP> (oc) <SEP> <SEP> Resistance <SEP> (m^) <SEP> <SEP> Induced <SEP> Strain <SEP> (ppm/ C) <SEP> <tb> <SEP> Silicon <SEP> <SEP> Control <SEP> <tb> <SEP> (Unmounted) <SEP> 98 <SEP> -174 <SEP> 0 <tb> <SEP> Silicon <SEP> on <SEP> Plain <SEP> <tb> <SEP> Copper <SEP> 98 <SEP> +10 <SEP> 7.5 <tb> <SEP> Silicon <SEP> <SEP> o <SEP> <tb> <SEP> Slotted <SEP> <SEP> Copper <SEP> 98 <SEP> -l70 <SEP> <SEP> 0.2 <tb> Once the strain in the silicon has been reduced to an acceptable level, the remainder of the assembly presents no problems. Thus a wide variety of glass ceramic compositions exist including high co-efficient of expansion materials such as the LiO2-2nO-SiO2 system which also has a high bulk resistivity. Successful atmosphere firing techniques for copper and matching dielectric layers have already been developed and suitable equipment is available. Thick film copper compositions which are both solderable and wire bondable are commercially available and although these are designed for firing on alumina, modified compositions which satisfactorily match a copper based system may also be produced. A number of approaches to the requirement for very fine inter-connection lines are available including etching of thin or thick films and the "mid-film" technique. A variety of alternative methods are available, for bonding silicon, metallised on the back surface if necessary, to copper, to the glass ceramic, or to metallised glass ceramic. Techniques for printing and firing thick glass ceramic rings suitable as a base for lid sealing have also been developed. Although the detailed examples have been described in terms of the use of copper, it has already been pointed out that a number of other metals and their alloys may be used in a similar way, with an appropriate adjustment of the other parameters involved. Silver and aluminium in particular may be regarded as practical alternatives to copper, and gold may also be used in circumstances where the expense can be justified.

Claims: CLAIMS 1. A substrate formed of a metal of high thermal conductivity, for the mounting of a semiconductor chip or chips, and comprising a twodimensional array of closely spaced narrow pillars extending from a flat base. 2. A substrate according to claim 1, in which the metal is copper. 3. A substrate according to claim 1 or claim 2, in which the pillars are rectangular in section and in the form of a uniform array. 4. A substrate according to claim 1 or claim 2 in which the pillars are circular in section. 5. The combination of a substrate according to any one of the preceding claims and a semiconductor chip bonded to the free ends of the pillars. A A method of forming a substrate according to claim 3, in which an orthogonal array of slots is cut or etched in a solid metal substrate. 7. A method of forming a substrate according to any one of claims 1 to 4, in which the pillars are electro-formed on the flat base. 8. A method of forming a substrate according to claim 4 comprising the steps of assembling a bundle of wires of the high conductivity metal, impregnating the bundle with a temporary binder to form a coherent assembly, cutting a transverse slice from the assembly, forming a base of the high conductivity metal on the ends of the wires at one face of the slice and removing the temporary binder. 9. A method according to claim 8, in which the bundle of wires is assembled by winding a coil of the wire. 10. A method according to claim 8 or claim 9 in which the base is formed on the ends of the wires by electro-platins.

Inventors: WALTON, BRIAN
Applicants: ERA PATENTS LIMITED
Application year: 1984
Main classification: H01L23
IPC codes: H01L21, H01L23