COMPARATOR CIRCUIT

Abstract: A differential circuit comprised of a pair of transistors (11, 12) has one transistor supplied with a reference voltage and the other transistor supplied with an input voltage, and is driven by a first constant current source. The pair of transistors are operated as an emitter-follower mode. An input side transistor (14) in a current mirror circuit is connected to the collector of the reference voltage side transistor of the difference circuit and an output side transistor (15) of the current mirror circuit is driven by a second constant current source. An output transistor (17) is driven through the output side of the current mirror circuit.

Description: Comparator circuit A difference input voltage comparator is extensively used as a circuit for effecting level conversion, voltage comparison, etc. Fig. 1 is a circuit diagram showing one form of known voltage comparators. A pair of transistors of one conductivity type, that is, a pair of Pi;P type transistors 1, 2 constituting a differential circuit have their emitters connected through a common constant current source 3 to one terminal Vcc of a DC power source. A reference voltage Vref is applied to the base of one (transistor 1) of the transistors 1, 2 and an input voltage Vin to be compared is applied to the base of the other transistor 2. A current mirror circuit is connected as a load to the collectors of the transistors 1, 2 and comprised of a pair of transistors (i.e., NPN type transistors 4, 5) different in conductivity type from the pair of transistors 1, 2. The base and emitter of the transistor 4 are respectively connected to the base and emitter of the transistor 5, and the emitters of the transistors 4, 5 are connected to the other terminal Vee of the DC power scurce. The collectors of the transistors 4, 5 in the current mirror circuit are connected to the corresponding collectors of the transistors 1, 2 in the differential circuit. The transistor 5 of the current mirror circuit has its collector connected to the base of an output transistor 6, and the base and collector of the transistor 4 of the current mirror circuit are connected to each other. The output transistor 6 has its emitter connected to the terminal Vee of the power source and its collector connected to an output OUT and to the terminal Vcc of the power source through a load resistor 7. It is to be noted that a predetermined voltage of a positive polarity is supplied from the terminal Vcc of the power source and a predetermined voltage of a negative polarity is supplied from the terminal Vee of the power source. In the normal operation state, for example, with Vin > Vref, one transistor 1 of the differential circuit is turned ZQ and the other transistor is turned OFF. In consequence, the transistors 4, 5 in the current mirror circuit are turned OlX and the output transistor is turned OFF since no base current is supplied to the output transistor 6. The output OUT becomes an "H" level. With Vin c Vref, the transistor 1 of the differential circuit is turned OFF and the transistor 2 is turned ON. consequently, both the transistors 4, 5 in the current mirror circuit are turned OFF and the output transistor 6 is turned ON since it has its base supplied with a current from the constant current source. The output OUT becomes an "L" level. Now suppose that a potential the same as that on the terminal Vee of the power source is applied to the input terminal Vin. With Vce (1) representing a collector-to-emitter voltage of the transistor 1, Vbe (1) a base-to-emitter voltage of the transistor 1 and Vbe (6) a base-to-emitter voltage of the transistor 6, the following equation is established: Vce (1) = Vbe (1) - Vbe (6) 0 That is, the collector-to-emitter voltage of the transistor 1 of the differential circuit is given as a value obtained by subtracting the base-to-emitter voltage Vé (6) of the output transistor 6 from the base-toemitter voltage Vbe (1) of the transistor 1. This value becomes substantially zero. For this reason, the transistor 1 does not act as a transistor and the emitterto-base circuit of the transistor 1 acts as a mere diode. In this state, all the current from the constant current source 3 flows from the base of the transistor 1 and ceases to flow into the base of the output transistor 6. At this time, the output transistor 6 becomes an unstable, near-OFF state, resulting in an erroneous operation. Recently, use has been made of various electronic apparatus using an electric cell, solar cell, etc. In general, it is preferable that such electronic apparatus be of a compact, light-weight type. This unavoidably requires a small-capacity and low voltage level cell. In such an apparatus, the comparator circuit as shown in Fig. 1 is used and mechanical component parts such as a motor and solenoid are driven by using a common power source. In a particular situation where sufficient electromotive force is not obtained from the electric cell, a relatively large current flows through the mechanical part during the starting time, lowering the power source voltage, thereby causing faulty operation. One object of this invention is to provide a com- parator circuit which can be normally operated even when an input voltage applied to one of the transistors constituting a differential circuit comes very near to the collector potential of the transistor or exceeds the collector potential of the transistor. Another object of this invention is to provide a comparator which can reduce a power source voltage level and permits a wider choice of an input voltage. According to this invention, there is provided a comparator circuit comprising a pair of transistors in a differential circuit which are supplied with an input signal and which are connected in an emitter-follower configuration and a current mirror circuit connected to the collector of a transistor on a reference voltage side of the differential circuit in which the current mirror circuit is driven by a constant current source. This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 is a circuit diagram showing a conventional comparator circuit; Fig. 2 is a circuit diagram showing a comparator circuit according to an embodiment of this invention; and Fig. 3 is a circuit diagram showing one modified form of the comparator circuit of this invention. The embodiments of this invention will be explained below by referring to the accompanying drawings. Fig. 2 is a circuit diagram showing a comparator circuit according to one embodiment of this invention. In Fig. 2, a pair of transistors 11, 12 of, for example, PNP types have their emitters connected through a first constant current source 13 to one terminal Vcc of a DC power source to provide a differential circuit. A reference voltage Vref is applied to the base of one (11) of the paired transistors 11, 12 and an input voltage Vin to be compared is applied to the base of the other transistor 12. A transistor 14 on the input side of a current mirror circuit is connected to the collector side of the transistor 11 in the differential circuit. The transistor 12 of the differential circuit has its collector connected to the other terminal Vee of the power source. A transistor 15 on the output side of the current mirror circuit has its collector connected through a second constant current source 16 to the terminal Vcc of the power source and its emitter connected to the terminal Vee of the power source. The transistor 15 has its collector connected to the base of an output transistor 17. The output transistor 17 has its collector connected to an output OUT and through a load resistor 18 to the terminal Vcc of the power source and its emitter connected to the terminal Vee of the power source. With Vin > Vref, for example, the transistor 11 is turned ON, since the transistor 12 of the differential circuit is connected, in an emitter-coupled configuration or an emitter follower configuration, with respect to the transistor 11. A current from the first constant current source 13 flows into the terminal Vee of the power source through the transistor 11 and the transistor 14 in the current mirror circuit. If the transistors 14, 15 in the current mirror circuit have the same characteristics, the current through the input side transistor 14 in the current mirror circuit becomes equal to the current through the output side transistor 15 in the current mirror circuit. With the currents of the first and second constant current sources 13 and 16 set to a ratio of 2 : 1, the output side transistor 15 has an insufficient-amount of current supplied from the base of the output transistor 17. Thus, the output transistor 17 is turned OFF and the output OUT becomes an "H" level. With Vin < Vref, the transistor 12 of the differential circuit is turned ON and a current of the first constant source 13 flows through the transistor i2 into the terminal Vee of the power source. Since no current flows through the transistor 11, the transistors in the current mirror circuIt are turned OFF. The current of the second constant current source 16 flows into the base of the output transistor 17. As a result, the transistor 17 is turned Oti and the output OUT becomes an "L" level. With Vin = Vee, that is, when the input voltage Vin becomes equal to the collector potential of the input side transistor 12, a forward drop voltage across the base-to-emitter circuit of the transistor 12 occurs due to a potential on the collector-to-emitter circuit of the transistor. The value of the forward drop voltage Vbe will be, for exanple, of the order of 0.6 V. Even if the base potential on the transistor 12 is equal to the collector potential on the transistor 12 or the collector potential exceeds, for example, about 0.3 V, the transistor is activated. Even in this state1 the transistor can maintain a normal state, i.e., a stable ON state. In this case, the limit of the logical operation is considered to be Vce (1) > 0, that is, Vin - Vec - Vbe (1). Even if Vin < Vee, the circuit can perform a normal operation. In this case, there is a possibility that, if the input voltage Vin level becomes too low, the circuit will not perform a normal operation due to the flow of the current from the terminal Vee of the power source to the base of the transistor 12. Suppose that with respect to the threshold level of the comparator, the current level of the first constant current sources 13 is equal to that of the second constant current source 16 and the areas of the emitters of the transistors 14 and 15 in the current mirror circuit are set to 1 : 2, the comparator circuit of this Invention can obtain the same characteristic as that shown in Fig. 1. In this case, the threshold voltage level will become the reference voltage Vref level. This invention is not restricted to the abovementioned embodiment. Although in the above-mentioned embodiment the PNP type transistors have been explained as being used for the differential circuit, NPN transistors 21, 22 as shown in Fig. 3 may be used for the differential circuit. In this case, a pair of NPH type transistors 21, 22 have their emitters connected through a common junction and first constant current source 23 to a terminal Vec of a power source. The transistor 21 has its collector connected directly to a terminal Vcc of the power source. The transistor 22 has its collector connected through an input side of a current mirror circuit to the terminal Vcc of the power source. The current mirror circuit comprises a pair of transistors (PNP type), 4, 25 different in conductivity type from those of the differential circuit. The input side transistor 24 has its base and collector connected through a common junction to the collector of the transistor 22 and its emitter connected to the terminal Vcc of the power source. The output side transistor 25 has its emitter.connected to the terminal Vcc of the power source and its collector connected to the terminal Vec through a second constant current source 26 and to the base of an output transistor 27. The output trans our has its emitter connected to the terminal Vee or; tIe power source and its collector connected to an output OUT and to the terminal Vcc of the power source through a resistor 28. The embodiment of Fig. 2 permits an operable range of the input voltage to be extended more to the collec- tor potential side of the transistor of the differential circuit as in the case of the embodiment of Fig. 2. The current ratio between the transistors 14 and 15 or between 24 and 25 can be set by an emitter area ratio between these transistors or by a resistor connected between the power source terminal Vee and the emitter of these transistors.

Claims: Claims: 1. A comparator circuit for obtaining a comparison output by comparing an output voltage with a reference voltage, characterized by: first and second transistors (11, 12; 21, 22) of one conductivity type having their emitters connected to a common junction; a first constant current source (13; 23) connected between said common junction and a first DC power source; means for applying a reference voltage to the base of the first transistor (11; 21); means for applying an input voltage to be compared to the base of the second transistor; means for connecting the collector of the second transistor to a second DC power source terminal; third and fourth transistors (14, 15; 24, 25) of the other conductivity type having their bases connected to each other; means for connecting the emitters of the third and fourth transistors to the. second power source terminal; means for connecting the collector and base of the third transistor (14; 24) to the collector of the first transistor; a second constant current source (16; 26) connected between the collector of the fourth transistor and the first DC power source terminal; and a fifth transistor having its base connected to the collector of the fourth transistor and its emitter connected to the second DC power source terminal, in which a result of comparison made between the reference voltage and the input voltage is output through the collector of the fifth transistor (17; 27). 2. A comparator circuit according to claim 1, characterized in that said third transistor has an emitter area n-times that of said fourth transistor and the setting current of said second constant current source is made n/2 times that of said first constant current source. 3. A comparator circuit according to claim I, characterized in that n is equal to 1. 4. A comparator circuit according to claim 1, characterized in that the current value of said first constant current source is equal to that of said second constant current source and said fourth transistor has an emitter area twice that of said third transistor.

Inventors: OIDA, YOSHIO
Applicants: KABUSHIKI KAISHA TOSHIBA
Application year: 1983
Main classification: H03F3
IPC codes: H03K5