SPACE CHARGE MODULATING SEMICONDUCTOR DEVICE AND CIRCUIT COMPRISING IT

Abstract: A semiconductor device employing two-dimensional space charge modulation in a semiconductor body 1 has an approximately Debye length wide ohmic contact 3 and a recti­ fying contact 2 positioned within a Debye length of the contact 3. Electrical conduction between the contact 3 and a remotely positioned contact 4 is controlled by the potential applied to the rectifying contact 2.

Description: This invention relates to semiconductor devices. The invention seeks to provide a semiconductor device in which electrical conduction between a pair of contacts is controlled by space charge modulation effected via a third contact. US-E-29 971 discloses (in particular in Fig. 8 thereof) a semiconductor device of the JFET type which has a body comprising two contiguous semiconductor regions of opposite conductivity type with a rectifying junction therebetween. First and second contacts are made to the two semiconductor regions. A third contact is disposed on the semiconductor body in a position remote from the first and second contacts. The invention provides a semiconductor device comprising first and second contacts disposed on one side of a semiconductor body, the second contact being a rectifying contact, and a third contact disposed on the semiconductor body in a position remote from the first and second contacts, the first contact having a dimension substantially equal to or less than the Debye length (as defined herein) in the semiconductor of the body, the second contact being disposed a distance substantially equal to or less than the said Debye length from the first contact, the semiconductor body being of a single conductivity type, and the second contact being shorted together with the third contact thereby providing a diode characteristic between the first contact and the third and second contacts. How the invention can be carried out will now be described by way of example, with reference to the accompanying drawings, in which:- FIG. 1 represents a semiconductor device; FIG. 2 is a diagram of one circuit configuration employing the device of FIG. 1; FIG. 3 is a current voltage characteristic obtained with the circuit configuration of FIG. 2; FIG. 4 is a diagram of another circuit configuration employing the device of FIG. 1 in accordance with the invention; FIG. 5 is a current voltage characteristic obtained with the circuit configuration of FIG. 4; In accordance with the invention, a rectifying contact is placed within a Debye length of a second contact of the order of a Debye length in size on one surface of a semiconductor body and a third contact is placed elsewhere on the same semiconductor body. Under proper biasing the space charge in the semiconductor body under the rectifying contact can control the conduction between the other two contacts. The Debye length is a characteristic distance in semiconductors. It is defined and discussed in the text "Physics of Semiconductor Devices" by S. M. Sze, Second Edition, pages 77 and 78, published by Wiley, N.Y., ie, L D = /(E S kT/q²N B ) where L D = Debye length, E S = permittivity of the semiconductor, k = Boltzmann constant, q = charge of charge carrier and N B = charge carrier density. An embodiment of a semiconductor device is represented in FIG. 1 wherein on one surface of a semiconductor body 1 there is positioned an intrinsically rectifying contact 2. The intrinsic conducting behaviour of a contact may be defined as the two-terminal current voltage behaviour of the contact when that contact is forming a two-terminal device with the substrate. The rectifying contact 2 surrounds or is parallel with a small width intrinsically ohmic contact 3 positioned a distance D from the rectifying contact 2. The dimension D is about equal to or less than the extrinsic Debye length of the semiconductor of body 1. The contact 3 has a dimension C that is also about equal to or less than the Debye length. A third, ohmic contact 4 is positioned a distance A from the contacts 2 and 3 on the opposite side of the semiconductor body 1. The semiconductor of body 1 should be of sufficiently high resistivity to permit the space charge under the rectifying contact 2 to penetrate a physical distance into the semiconductor under moderate voltage levels to affect carrier flow between the contacts 3 and 4. The semiconductor body 1 may be of silicon doped with 10¹⁵ impurity atoms per cubic centimeter. With this resistivity and dimensions maintained at C and D less than approximately 0.1 micrometers, the polarity of the signal on the contact 2 will affect current flow between contacts 3 and 4. The device of FIG. 1 is preferably fabricated by using Schottky barrier contacts with different barrier heights so that ohmic or rectifying behavior is produced. Where the semiconductor 1 is silicon doped to about 10¹⁵ atoms per cubic centimeter with conductivity type n, the ohmic contacts 3 and 4 may be obtained using a relatively low barrier Schottky contact where that barrier height is about 0.2 to 0.3 eV. Such contacts can be obtained through the use of rare earth silicides as set forth in IBM Technical Disclosure Bulletin, Vol. 21, p. 2811. The rectifying contact 2 can be formed using a higher barrier Schottky contact. For a rectifying contact, the barrier height should be of the order of 0.8 eV, such as is obtainable with Au or PtSi on a silicon substrate. An illustration of the operation of the device may be seen in connection with FIGS. 2 through 5 wherein FIGS. 2 and 3 illustrate a circuit and corresponding performance in one polarity and FIGS. 4 and 5 illustrate a circuit and corresponding performance in an opposite polarity. Referring to FIG. 2 using a battery 6 of about 1.5 volts as a source of power, the semiconductor body 1 has one ohmic contact 4 connected to the battery 6 and the other ohmic contact 3 and rectifying contact 2 connected through a current indicator 7 to the other side of the battery 6. Under these conditions a space charge under the rectifying contact 2 will penetrate the high resistivity body 1 far enough to affect the conductivity through the body 1 between the ohmic contacts 3 and 4. In the body 1 of the device, for a voltage equal to zero, the depletion depth in 10¹⁵ atoms per cc n-type silicon radiating from contact 2 would deplete the area below contact 3 when positioned lateral to contact 2 for the intergap D of about 500Å and contact size C of 0.15 micrometers. These dimensions result in the distance from the edge of the contact 2 to the center of contact 3 being of the order of a Debye length in semiconductor material of this resistivity. This would not permit any significant current flow between contacts 3 and 4. Where the voltage is selected to be greater than zero, the depletion depth radiating from contact 2 would decrease thus allowing a clear conducting path of electrons between contacts 3 and 4. By appropriate choice of size for contact 3 and for the gap between contacts 2 and 3, that portion of the current through contact 3 dominates the flow for voltages of the order of 0.6V. Hence, a high impedance is maintained at contact 2 and a low impedance between contacts 3 and 4. Where the impressed voltage from battery 6 is less than zero, the depletion width will radiate even more below contact 2 than for the V=0 case and the current flow between contacts 3 and 4 will be very small. Referring next to FIG. 3, there is shown the current voltage (I-V) characteristic curve for the circuit of FIG. 2. It will be apparent to one skilled in the art that the the curve of FIG. 3 is similar to that of an ordinary I-V curve for a diode. Since the silicon of the body 1 is doped n-type in this example, the IV characteristic of contact 3 is qualitatively that of a normal Schottky diode as shown in FIG. 3. Using the device of the invention, it is also possible to provide an opposite or reverse diode characteristic. This is illustrated in connection with the circuit of FIG. 4 and the current voltage (IV) output characteristic of FIG. 5. In FIG. 4 the circuit configuration is such that the rectifying contact or contact segments 2 and the ohmic contact 4 are shorted together and the ohmic contact 3 is held at a positive potential with the battery 6. The (IV) characteristic of FIG. 5 is achieved by varying the voltage V of the battery 6 and observing the current flow through the current indicator 7. Under these conditions, for V = 0, the depletion depth below contacts 2 and 3 remains as configured for the forward diode. However, for the condition V < 0, the electron accumulation situated directly below contact 3 as a result of a standard ohmic n⁺ doping pocket or below the low barrier height of contact 3 is pushed farther into the semiconductor, effectively parting the depletion layers radiating from contact 2. This provides a clear path for electron flow between contacts 3 and 4. For the condition where V > 0, the electron accumulation present below contact 3 is pulled closer to contact 3 than the previously described V = 0 case and no significant path of electron conduction exists between contacts 3 and 4. The I-V characteristic corresponding to the circuit configuration of FIG. 4 is shown in FIG. 5. The characteristic polarity is clearly reversed and is in marked contrast to that of FIG. 3. The impedance of contact 2 also remains high in this reversed diode case. In essence, the three-terminal device of the invention implements a reversing diode concept in that the polarity of conduction between the two contacts 3 and 4 is determined by the potential that is present on a high impedance contact 2.

Claims: A semiconductor device comprising first and second contacts (3,2) disposed on one side of a semiconductor body (1), the second contact (2) being a rectifying contact, and a third contact (4) disposed on the semiconductor body in a position remote from the first and second contacts, the first contact having a dimension (C) substantially equal to or less than the Debye length (as defined herein) in the semiconductor of the body, the second contact being disposed a distance (D) substantially equal to or less than the said Debye length from the first contact, the semiconductor body being of a single conductivity type, and the second contact being shorted together with the third contact thereby providing a diode characteristic between the first contact and the third and second contacts. A semiconductor device as claimed in claim 1, in which the first and third contacts (3,4) are ohmic contacts. A semiconductor device as claimed in claim 1 or claim 2, in which the third contact (4) is a broad area contact disposed on the opposite side of the body (1) to that on which the first and second contacts (3,2) are disposed. A semiconductor device as claimed in any preceding claim, in which said dimension (C) of the first contact is about 0.15 µm and in which the second contact is disposed about 50nm (500Å) from the first contact. A semiconductor device as claimed in any preceding claim, in which the first contact (3) is a Schottky barrier contact with a relatively low barrier height and the second contact (2) is a Schottky barrier contact with a relatively high barrier height. A semiconductor device as claimed in claim 5, in which the first contact (3) has a barrier height of from 0.2 to 0.3 eV and the second contact (2) has a barrier height of about 0.8 eV. A semiconductor device as claimed in any preceding claim, in which the semiconductor body (1) is of n-type silicon doped with 10¹⁵ impurity atoms per cubic centimetre. A circuit including a semiconductor device as claimed in any preceding claim.

Inventors: FREEOUF, JOHN LAWRENCE, JACKSON, THOMAS NELSON, LAUX, STEVEN ERIC, WOODALL, JERRY MAC PHERSON
Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION
Application year: 1983
Main classification: H01L29
IPC codes: H01L29, H01L21