SUBSTRATE FOR MOUNTING SEMICONDUCTOR ELEMENT

Abstract: A substrate for a semiconductor element, particularly, a high-power semiconductor element, having a high thermal conductivity and a coefficient of thermal expansion approx­ imating that of common semiconductor materials. The substrate includes a metal base composed of a W alloy containing Cu in an amount of 5 to 20 wt % with a thermal expansion coefficient of 4.5 to 7.5 × 10⁻⁶ cm/cm degree C and a thermal conductivity of 0.4 cal/cm sec degree C or more or Mo alloy containing Cu in an amount of 5 to 30 wt % with a thermal expansion coefficient of 5.0 to 8.0 × 10⁶ cm/cm degree C and a thermal conductivity of at least 0.38 cal/cm sec degree C. The metal base is coated with an electrically insulating inorganic material to a thickness of 0.1 to 20 µm.

Description: SUBSTRATE FOR MOUNTING SEMICONDUCTOR ELEMENT BACKGROUND OF THE INVENTION The invention pertains to a substrate upon which is mounted a semiconductor element such as a transistor or integrated circuit chip. More specifically, the invention relates to such a substrate having an improved thermal conductivity, which has a thermal expansion coefficient approximately the same as that of the semiconductor element, and which is electrically insulating. Conventionally, low melting point glass ceramic materials have been used to form a substrate upon which an integrated circuit chip or the like is mounted in applications requiring high reliability. Typical materials for this use are Awl2031 BeO and 2MgO#SiO2. The semiconductor element is joined to the ceramic substrate through a metal layer¯ formed by vapor deposition or plating. While the above-mentioned materials are suitable from a point of view of providing an air-tight seal with other package elements and in that they are electrically insulating, their thermal expansion coefficient is different than that of ordinary semiconductor materials. Moreover, as integrated circuit device densities further increase, resulting in an attendant increase in the amount of heat generated in each element, the demand for an improved thermal conductivity of substrate materials has increased. A1203 and 2MgO SiO2 have poor thermal conductivities, and hence are not suitable for higherdensity integrated circuit applications. Although BeO has a good thermal conductivity, its use is disadvantageous in that this material is expensive and difficult to work with because of its extreme toxicity. Furthermore, A1203, which has very commonly been employed in prior art constructions, sometimes induces malfunctions in the integrated circuits that it is used to package due to the fact that the material has a residual radioactivity, specifically, it produces alpha rays. Hence, there is a present demand for an improved substrate material which is electrically insulating, thermally conductive, has a thermal coefficient of expansion similar to that of the semiconductor element it supports, and which is strong. SUMMARY OF THE INVENTION Taking the above into consideration, the invention provides a substrate intended for semiconductor element packaging composed of a base of W alloy containing Cu in an amount of 5 to 20 wt %, and having a thermal expansion coefficient in a range of 4.5 to 7.5 x 10-6 cm/cm degree C and a thermal conductivity of 0.4 cal/cm sec degree C or greater. The metal base is covered with a coating composed of an electrically insulating inorganic material having a thickness in a range of 0.1 to 20 ym. In an alternate embodiment, the metal base may be composed of a Mo alloy containing Cu in an amount of 5 to 30 wt % and having a thermal expansion coefficient of 5.0 to 8.0 x 10-6 cm/cm degree C and a thermal conductivity of 0.38 cal/cm sec degree C or above. BRIEF DESCRIPTION OF THE DRAWING The single drawing figure shows in cross section a semiconductor device employing a substrate constructed in accordance with the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to the single drawing figure, there is shown therein in cross section a semiconductor device in which a semiconductor element is mounted upon a substrate constructed in accordance with the teachings of the present invention. A metal base 1, having a coefficient of thermal expansion approximately equal to that of a semiconductor element 6, is coated with a layer 2 of an inorganic material. The semiconductor element 6 is mounted on the metal base 1 through a metalization layer 4 and an Au plated layer 5. In one preferred embodiment, the metal base is formed of a W alloy containing Cu in an amount of 5 to 20 wt % and having a thermal expansion coefficient of 4.5 to 7.5 x 10-6 cm/cm degree C and a thermal conductivity of at least 0.4 cal/cm sec degree C. The thickness of the coating layer 2 should be in a range of 0.1 to 20 ym. The thermal expansion coefficient is restricted to the range of 4.5 to 7.5 x 10-6 in accordance with the invention so as to match the coefficient of thermal expansion of the substrate to those of Si and GaAs, the most commonly employed semiconductor materials at the present time. This range of coefficient thermal expansion also closely matches the coefficient of thermal expansion of A1203 ceramic material, which is often used in combination with semiconductor materials to reduce the mechanical stress thereon. The thermal conductivity should be at least 0.4 cal/cm sec degree C to obtain a sufficently high thermal conductivity for high-speed integrated circuits, specifically, integrated circuits dissipating a power of 10 watts or more. In a second preferred embodiment, a metal base is fabricated of Mo alloy containing Cu, and having a coefficient of thermal expansion in a range of 5.0 to 8.0 x 10-6 cm/cm degree C, and having a thermal conductivity of at least 0.38 cal/cm sec degree C. In this case, the substrate is suitable for use with high-speed integrated cirucits which have a power dissipation of 8 watts or more. In the case of a metal base fabricated of W alloy containing Cu, providing Cu in a range of 5 to 20 wt % will yield the desired range of coefficient of thermal expansion, while in the case of the Mo alloy base containing Cu, Cu in a range of 5 to 30 wt % will yield the desired range of coefficient of thermal expansion. To fabricate the metal base, a powder meturliurgy process is preferred. The reason for using such a process is because the components of the base have greatly different melting points and specific gravities, and it is difficult to fabricate a base of these materials using in another process. Furthermore, the Co should be dispersed uniformly in the W or Mo to prevent variations in thermal and mechanical characteristics, thereby preventing, for instance, buckling upon heating. For a starting material, it is preferred to use a W or Mo powder having a particle size in a range of 0.5 to 10 pm. It is permitted to add other materials for improving various characteristics and some unavoidable impurities are allowed. However, the amount of such material should be limited to no more than 2 wt % or less. The inorganic material applied to the surface of the metal base may be BN, A12O3, A1N, Si3N4, Y203, 2MgO SiO2, diamond, etc. These materials may also be used in various combinations, if desired. To coat the inorganic material on to the metal base, a vapor phase plating process, such as a physical vapor deposition process (PVD), chemical vapor deposition process (CVD), or the like may be used. Furthermore, in order to cause the inorganic coating to be applied uniformly, it is preferred that the metal base be coated with a thin layer of a metal such as Ni. The reason why the thickness of the coating layer is preferably limited to the range of 0.1 to 20 pm is that it is not possible to obtain a suitable electrical insulating property with a thickness below 0.1 pm, while a thickness above 20 pm makes the coating process lengthy and expensive. Two examples of semiconductor substrates constructed in accordance with the invention will now be discussed. EMBODIMENT 1 A semiconductor substrate having on the surface thereof a thin layer of A1203 on which a GaAs semiconductor element is suitably mounted was produced by a process as follows: A base formed of a Cu/W alloy containing Cu in an amount of 15 wt 8 and having a thermal expansion coefficient of 6.5 x 10-6 was provided so as to approximate the thermal expansion coefficient of GaAs. To form the coating layer, sintered A1203 was evaporated using electron beam heating. The vaporized material was partly ionized by applying high frequency (13.6 MHz) energy at a power level of 100 to 200 watts in an oxygen atmosphere at a pressure of 4 x 10-4 Torr with the substrate heated to a temperature of 200 degrees C. Using this process, the substrate was coated with A103 to a thickness of 2.0cm. The resulting substrate had a thermal expansion coefficient very close to that of GaAs and had a good thermal conductivity. Moreover, it was found that the inorganic coating had a dielectric strength above 300 V. This composite substrate is suitable for mounting semiconductor elements formed of GaAs and Si, and also can be used for mounting optical devices, solar cells or the like formed of materials such as GaAs, InP or the like. EMBODIMENT 2 A substrate for mounting a semiconductor element coated with a thin layer of A1203 was produced in accordance with the following procedure: A CuMo alloy containing 20 wt % Cu and having a thermal expansion coefficient of 7.0 x 10-6 was produced so as to approximate the thermal expansion coefficient of GaAs. To form the coating layer, sintered A1203 was evaporated using electron beam heating. The vaporized material was partially ionized by applying high-frequency (13.6 MHz) electromagnetic energy with a power of 100 to 200 watts in an oxygen atmosphere at a pressure of 4 x 10-4 Torr with the substrate heated to a temperature of 200 degrees C. The coating of A1203 was formed to a thickness of 2.0 ym. As a result, a substrate was produced having a thermal expansion coefficient very close to that of GaAs with a high thermal conductivity. The dielectric strength of the coating layer was found to be higher than 300 V. This substrate is suitable for the same uses as those of Embodiment 1 described above.

Claims: CLAIMS 1. A substrate for supporting a semiconductor element comprising: a metal base of a material selected from the group consisting of (1) W alloy containing Cu in an amount of 5 to 20 wt % having a thermal expansion coefficient in a range of 4.5 to 7.5 x 10-6 cm/cm degree C and a thermal conductivity of 0.4 cal/cm sec degree C, and (2) Mo alloy containing Cu in an amount of 5 to 30 wt % with a thermal expansion coefficient of 5.0 to 8.0 x 10-6 cm/cm degree C and a thermal conductivity of at least 0.38 cal/cm sec degree C; and a coating of an electrically insulating inorganic material on said metal base having a thickness in a range of 0.1 to 20 pm. 2. The substrate of claim 1, wherein said metal base is produced by a powder sintering process. 3. The substrate of claim 2, wherein, in said metal base, Cu exists uniformly with W or Mo. 4. The substrate of claim 1, wherein said coating layer is selected from the group consisting of BN, A1203, Si3N41 Y203, 2MgO SiO2, diamond, and laminated combinations thereof.

Inventors: OGASA, NOBUO C/O ITAMI WORKS OF SUMITOMO, OHTSUKA, AKIRA C/O ITAMI WORKS OF SUMITOMO
Applicants: SUMITOMO ELECTRIC INDUSTRIES LIMITED
Application year: 1983
Main classification: H01L23
IPC codes: H05K1, H01L23