Display circuit

Abstract: A display circuit for a matrix display includes a plurality of picture elements comprising display elements driven by drive circuits. A data regenerative circuit determines whether an external video signal is to be displayed or whether the image being displayed by the picture elements is to be held. When the image currently stored in the picture elements is to be held, the data regenerative circuit reads the stored image data from a selected picture element, regenerates the level of the data signal and causes this data to be rewritten into the selected picture element.

Description: This invention relates to a display device for the matrix display of video signals in accordance with the preamble of claim 1. A display device of said kind is disclosed in GB-A-2 069 739. Said document is concerned with a solid-state display device having both readout and write-in capability. However, the circuit disclosed in this document has no reading means included in a single picture element and needs a sense/refresh circuit for each column of the display. This results in an uneconomical display apparatus having an increased number of components. It is also known to provide for a drive circuit in accordance with Fig. 1 of this patent specification to be used in a two-dimensional image display apparatus having drive circuits for respective picture elements. Said drive circuit is for a single picture element and includes an active element for holding data for a short period of time. A writing transistor 2 is rendered conductive (on) by a signal applied to a scanning signal line 1, so that a voltage on a video signal line 3 is temporarily held by a capacitor 4. The voltage held by the capacitor 4 is applied to the gate of a display element driving transistor 6, to set the voltage of its drain electrode 7, thereby operating a display element 8 comprising LCD, LED, EL, fluorescent display tube or the like. The above-described drive circuits, the number of which corresponds to the number of picture elements, are integrally formed on an insulating substrate by a film technique or by utilizing a semiconductor substrate. In order for the display apparatus to display two-dimensional data, each of the drive circuits which are formed for the picture elements must operate satisfactorily. Accordingly, if it can be determined whether or not the drive circuits operate satisfactorily before the drive circuits are connected to the display elements, then display apparatuses can be manufactured with a high yield and high efficiency, because only the operative substrates will be selected and connected to the display elements. However, in order to test the drive circuit shown in Fig. 1, it is necessary that the components of the drive circuit be assembled and that the drive circuit be connected to the display element. In order to overcome this difficulty, Japanese Patent Application published under N º JP-A- 58 216 088 provides for a drive circuit which can be inspected without connection to its display element. As shown in Fig. 2, a reading transistor 9 is connected between the video signal line 3 and the driving transistor 6. Accordingly, the drain voltage of the driving transistor 6 can be applied to the signal line 3 if a signal 10 is applied to the gate of the reading transistor 9, so that the drive circuit can be inspected without being connected to the display element 8. However, the circuit of Fig. 2 is disadvantageous in that, in order to provide a matrix-shaped image display, it is necessary to provide a separate memory for holding data. It is a primary task of this invention to eliminate the above-described drawbacks of conventional display apparatus. It is therefore an object of the present invention to provide for a display circuit which is capable of holding the desired image without requiring a separate memory device for holding data and a separate sense/refresh circuit for each column of the display. These objects are solved by the display device in accordance with claim 1. Further advantageous features of said display device are evident from the subclaims and from the description of the accompanying drawings, wherein like numerals refer to like parts throughout. FIG. 1 is a circuit diagram of a first example of a conventional drive circuit for a display element; FIG. 2 is a circuit diagram of a second example of a conventional drive circuit for a display element; FIG. 3 is a circuit diagram of an embodiment of the present invention; and FIG. 4 is a circuit diagram of the display element drive circuit used in the circuit of FIG. 3. The invention will be described with reference to the case where a binary image is displayed as a two-dimensional image by a point-sequential scanning system. FIG. 3 is a block diagram of a display circuit for a display apparatus having picture elements, including drive circuits, arranged in the form of a matrix. Drive circuits A₁₁, A₁₂, . . . and A mn for respective picture elements are provided by forming film transistors on the same substrate or by using a semiconductor substrate. In each drive circuit A ij , as shown in FIG. 4, a writing transistor Tr a and a reading transistor Tr c are commonly connected to a signal line ℓ i , and a driving transistor Tr b has a gate for receiving a signal passed through the writing transistor Tr a . A signal at the node connecting one terminal of the driving transistor Tr b and the reading transistor Tr c , is applied to a display element B ij . In FIG. 4, a capacitor C a , corresponding to the MOS gate capacitance of the driving transistor Tr b in the drive circuit, operates to temporarily hold written data. In each column of the display, the signal line ℓ i is connected to the respective drive circuits. The signal lines ℓ₁ through ℓ m are connected through scanning switching transistors S₁ through S m , respectively, to a video signal input terminal S₀. The input terminal S₀ serves not only as a terminal for supplying a video signal Vv to the picture elements, but also as a terminal for transmitting data between the driven circuits and a regenerative circuit E which is described below. A horizontal scanning circuit C applies a horizontal scanning signal to the gates of the above-described scanning switching transistors S₁ through S m to control the horizontal scanning of the picture elements. The vertical scanning of the picture elements is carried out when a vertical scanning circuit D applies a writing signal or a reading signal to the gate of the writing transistor Tr a or the gate of the reading transistor Tr c , respectively, in each of the drive circuits in each row. That is, the horizontal scanning circuit C and the vertical scanning circuit D select a picture element A ij to which the video signal Vv is to be inputted, so that the display element driving transistor Tr b is turned on or off through the writing transistor Tr a in the drive circuit corresponding to the picture element, to drive the display element B ij . Next, the regenerative circuit E for holding images will be described. The input terminal S₀, to which the scanning switching transistors S₁ through S m are connected, is connected to a first switching element which is adapted to determine whether the display elements display an image based on an externally applied video signal or a still image based on data already written in the picture elements. The first switching element comprises a MOS transistor Tr₁ having a terminal which acts as an external video signal input terminal, and a MOS transistor Tr₂. The first switching element determines whether the external video signal is received or disconnected so as to hold the stored image, in dependence upon input switching signals V I and V I applied to the gates of the transistors Tr₁ and Tr₂, respectively. The MOS transistor Tr₂ is connected to a second switching element for switching between an image signal reading operation and an image signal writing operation in the regenerative circuit E. The second switching element comprises MOS transistors Tr₃ and Tr₄, to the gates of which write and read switching signals R/ W and R/ W are applied to control the writing and reading operations of the regenerative circuit E. The node connecting the MOS transistors Tr₂ and Tr₄ is also connected to a MOS transistor Tr₅ which is used for pull-up during image signal reading. The MOS transistor Tr₄ of the second switching element, is connected to the gate of a MOS transistor Tr₆ which, together with a MOS transistor Tr₇, formed an inverter. The node connecting the MOS transistor Tr₆ and Tr₇ is connected to a terminal of the MOS transistor Tr₃. Thus, a signal reading path from the regenerative circuit E is formed. In the above-described circuitry when it is required to maintain a display of an image currently being displayed on the basis of the external video signal Vv, the input switching signal V I is used to render the MOS transistor Tr₁ non-conductive, thereby disconnecting the external video signal Vv, and to render the MOS transistor Tr₂ conductive, thereby electrically connecting the video signal input terminal S₀ to the side of the inverter for data correction. For all the picture elements, the drive circuits and the regenerative circuit E carry out the following two operations in succession during a period defined by the time in which the signal stored in the capacitor C a of each display element(the gate oxide film capacitance of the MOS transistor Tr b ) is dissipated, for instance, through leakage. 1) The signal level of the picture element at the i-th row and j-th column is read via the transistors Tr c , Tr₂ and Tr₄ and is stored, as the inverted display signal, in the capacitor C′ in the regenerative circuit E. 2) In the regenerative circuit E, the transistors Tr₄ and Tr₃ are rendered respectively non-conductive and conductive, the signal in the capacitor C′ is inverted by the inverter comprising the transistors Tr₆ and Tr₇, and is then input through the transistors Tr₃, Tr₂ and the writing transistor Tr a of the display element, into the drive circuit. The operations 1) and 2) described above are repeatedly carried out to hold the image. When it is required to suspend the image holding operation to display an externally input image again, the input switching signal V I is used to change the state of the first switching element, i.e., to render the transistors Tr₁ and Tr₂ conductive and non-conductive, respectively. As a result, the external video signal Vv is applied to the drive circuits, so that the latter write the external video signal to display the image. In the above-described embodiment, binary data are displayed. However, if the inverter for data correction in the regenerative circuit E is made up of a circuit which corrects and outputs the input signal, a gradation image also can be displayed. In addition, if the regenerative circuit E is formed on the same substrate as the drive circuits, then the invention can be realized without increasing the number of manufacturing steps and the number of components. As is apparent from the above description, according to the invention, the image can be held on the display surface merely by connecting a simple circuit and without requiring a separate memory device. Thus, the function of the displaying apparatus has been improved, and the range of application is considerably increased.

Claims: A display device for the matrix display of video signals, comprising: a plurality of row electrodes connected to vertical scanning means (D) and column electrodes connected to horizontal scanning means (C), a plurality of picture elements (A ij ) driven by switching devices connected at the intersections of row electrodes with column electrodes, and sense/refresh circuits (E) for the active element (C) adapted to be selectively coupled to the active elements (C a ) of said picture elements (A ij ), characterized in that each of said picture elements (A ij ) includes an active element (C a ) for holding data for a limited period of time, a read circuit (Tr c ) and a write circuit (Tr a ) for the active element (C a ), a display element (B ij ) and a drive circuit (Tr b ) for said display element (B ij ), and by switching transistors (S₁ to S m ) the gates of which are connected to said horizontal scanning means (C) and which are capable of selectively connecting one of said vertical column electrodes (1₁ to 1 m ) to an input terminal (S₀), a first switching element (Tr₁,Tr₂) the gates of which are connected to an input line carrying an input switching signal (V₁) for selectively coupling said input terminal (S₀) to a line carrying the video signal (V v ) or to a regenerative circuit (E). A display device as set forth in claim 1, wherein said regenerative circuit (E) includes a second switching element (Tr₃,Tr₄) the gates of which are connected to a line carrying a write/read switching signal (R/W). A display device as set forth in claim 1, wherein said read circuit (Tr c ), said write circuit (Tr a ) and said drive circuit (Tr b ) each comprise a MOS transistor, and wherein the capacitance (C a ) comprises the MOS gate capacitance of said drive transistor. A display device as set forth in claim 1, wherein said display element (B ij ) comprises one of a liquid crystal display element, a light emitting diode, an electroluminiscent display element and a fluorescent display tube.

Inventors: YOSHIMURA MASAHIRO, YOSHIMURA, MASAHIRO
Applicants: SHARP KK, SHARP KABUSHIKI KAISHA
Application year: 1983
Main classification: G09G3
IPC codes: G09G3