DATA OPERATED SQUELCH

Abstract: A data processing system of the kind in which there is a transmission of a code format having a pattern that provides a plurality of reversals 10101100 etc. from which it is desirable to be able to differentiate between valid data and invalid data. Invalid data means the absence of data, data corrupted by noise or data alien to the system. The system is characterised by means arranged to provide the times between n zero crossings as given by the expression: <IMAGE> where I is the integer part of x, n is an integer representing the number of zero crossings and ti is the duration of the ith interval between zero crossings measured on a bit base of unity thereby to permit the use of said number (R) when compared with a predetermined tolerance range to provide an indication of the quality of said transmission.

Description: DATE OPERATED SQUELCH DESCRIPTION The present invention relates to a data processing system of the kind (hereinafter referred to as the kind set forth) in which there is a transmission of a code format having a pattern that provides a plurality of reversals 10101100 etc. from which it is desirable to be able to differentiate between valid data and invalid data. Invalid data means the absence of data, data corrupted by noise or data alien to the system. According to the present invention there is provided a data processing system of the kind set forth wherein means are arranged to provide the times between n zero crossings as herein defined to measure said times to establish the number ( ) between said zero crossings as given by the expression: where I is the integer part of x_, ri is an integer representing the number of zero crossings and s the duration of the ith interval " between zero crossings measured on a hit base of unity thereby to permit the use of said number (R) when compared with a predetermined tolerance range .to provide an indication of the quality of said transmission. In one construction n is between 8 and 100 and in a convenient construction n is 32 or 6 . By the term zero crossing is to be understood the time at which zero volts iscrossed when going from a positive voltage to a negative voltage or vice versa. The invention will he more fully understood from the following description given by way of example only with reference to the figures of the accompanying drawings and the following Example in which Figure 1 is a circuit block diagram of a pager incorporating data operated squelch of the invention and Figure 2 is a flow diagram of the operations performed by the present invention. Figure 3 s a graphical presentation of ✓* * the transfer function of the expression used in the invention to illustrate a refinement of the circuitry. Consider as one Example a transmission in which the code format has sixty four zero crossings as shown in the table below and the values for z = t. - I (t. - 0.5) are:- TABLE Z z Z Z 3.2 1.2 9.1 1.1 1.7 0.7 2.S 0.8 1.6 0.6 9.2 1.2 1.7 0.7 2.7 0.7 1.2 1.2 5.5 0.5 1.8 O.S 2.7 0.7 1.3 1.3 6.3 1.3 1.9 0.9 2.7 0.7 2Λ 1.4 .7 0.7 * ' 1.8 ' O.S 2.7 0.7 6.1 1.1 4.3 1.3 1.8 O.S 6.8 0.8 7.S O.S 4.2 . !- 2 1.6 0.6 6.3 O.S 6.2 1.2 4.2- 1.2 1.6 0.6 3.1 1.1 5-3 1.3 4.2 1.2 1.5 0.5 2.1 1.1 1.7 0.7 7.1 1.1 2.3 1.3 1.7 0.7 1.6 0.6 7.6 0.6 2.7 0.7 1.6 0.6 1.5 0.5 7.6 0.6 6.4 1.4 1.5 0.5 1.2 1.2 7.1 1.1 5.8 O.S 1.4 1.4 1.2 1.2 7.1 1.1 3.7 0.7 7.3 1.3 1.2 1.2 6.2 1.2 3.6 0.6 6.2 1.2 1.4 1.4 3.1 1.2 3.7 0.7 2.3 1.3 Then taking the first three examples in the table (l) is:- 3.2 - 1 (3.2 - 0.5) 3.2 - I (2.7) 3.2 - 2 1.2 and (2) is 1.6 I (1.6 - 0.5) 1.6 I (1.1) 1.6 1 0.6 a u .3) is 1.2 I (1.2 - 0.5) 1.2 I (0.7) 1.2 0 1.2 Clearly the sixty four values in the table or Z summated is 60.9 thus: O FI Y '- WIPO R is 1 (60.9) 60.9 R is 64 = 0.9515 The value R with a tolerance can, therefore, be used to make a decision for a satisfactory squelch that is to say a system which switches at least a part of a receiver between a quiescent and an active state depending upon the quality of the signal received. The tolerance having been chosen to be for example 0.8 to 1.1 then R at 0.9515 is seen to fall within that tolerance and thereby indicate a signal of a predetermined quality. The squ-elch may be used to obtain good sensitivity in a radio pager for example without wasting battery life. Referring now to Figure 1 the circuitry operates in such a way as to produce a specific transfer function of the form shown graphically in Figure 3. The input is the time interval (t.) between adjacent transitions of the input signal. The output is numerical and is averaged over the required number (ii) of transition interval samples to form the resultant (R) . The decision of the squelc circuit is made by comparing this resultant (R) against some preset limits so that within this range the squelch may indicate a valid signal to the rest of the circuitry. One specific embodiment utilizing a micro¬ processor based system is illustrated in Figure 1 and the flow chart for this specific embodiment is given in Figure 2. A listing is given in the attached appendix A of the logic to be applied to the ROM memory to be interpreted by the microprocessor unit MPU. In Figure 1 a radio pager comprises a receiver board 10 having an aerial 11 by which a signal enters a radio frequency amplifier 12 a 1st mixer 13 coupled to a 1st oscillator 14 to a 1st intermediate frequency amplifier 15; from which it passes inter alia via a 2nd mixer 16 to an audio li iter 17 connected to the input/output of the microprocessor 18 (MC14605E2) which is related to the memory of ROM (MCM65516) 19. The MPU will receive from the ROM a logical sequence set out in the flow sheet of Figure 2 wherein:- 101 is BTSY C 102 is initialization clear flags load count 103 is zero port A clear? 104 is BSBEG OMFI :5 C'^jT __ fr ._ V IPO 105 is 7 BFLAG s et 106 i s BSNT 1 107 is zero port A set? 108 is increment BTPRD 109 is BSNTi 0 110 is zero port A set? 111 is DMT (dead man timer) reset, increment BTPRD 112 is zero port A set 113 is DMT reset, increment BTPRD 114 is BSTIM 1 115 is LDA timer BCLR 7, BFLAG llβ is zero port A clear? 117 is increment BTPRD US is BSNT 0 1 119 is zero port A clear? 120 is DMT (dead man timer) reset, increment BTPRD 121 is zero port A clear? 122 is DMT reset, increment BTPRD 123 is BSTIMO 124 is LDA timer B set 7, BFLAG 125 is BSNTO 126 is BCLR 7, BFLAG 127 is BSNSE 1 SHEET 12S is BSET 7 BFLAG 129 is LDA 0 I/STA/BTPRD/CLR/TEMPB 130 is BSTIME 131 is timer greater than 7A 132 is B5UB 133 is subtract 1.0 from timer 134 is -add 0 to timer 135 is BSPRDX 136 is LDA/BTPRD STA/TEMPA/CLR/BTPRD 137 is subtract 06 138 is A greater than zero? 139 is COMA 140 is INCA. 141 is BSPRDO 142 is A greater than O.C.? 143 is BSPRD2 144 is LDA/TEMPA/SUB/TEMP B add BTTOT STA/BTTOT 145 is C.CLEAR 146 is INC.CARRY 147 is BSPRD4 148 is LDA05 STA/BTPRD 149 i s BSPRD3 !~- 150 is DEC/BTCNT- 151 is BTCNT equals zero? 152 is SϋBOC 153 is CLRX/TAX 154 is add O.C to TEMPB INC/BTPRD. TXA JMP/B5 PRDO 155 is LDA carry STA/TEMPA 156 is carry less than 2? 157 is carry equals 2? 15S is carry equals 3? 159 is BSPRD8 l6θ is BSETOBFLAG 161 is RTS global 162 is BSPRD7 163 is LDA/BTTOT/STA/TEMPB 164 is TEMPB greater than MXLVL 165 is BSPRD6 166 is RTS global In Figure 3 there is shown a graphical representation of the transfer function of the expression Clearly if for example the first three figures of the table above 3.2; 1.6 and 1.2 are entered on the abscissa then the values for Z respectively (1.2; 0.6; 1.2) are read off along the ordinate. But as is well known a system of sequential logic requires a finite time to 'think' and even where the bit width uses but 1.953 milliseconds, as shown close to the origin three tenths of this time may pass before the enabling means of the transfer function is entered. One solution is self evident viz to enter after a short time interval of 1.953 x 0.3 milliseconds and advance on the transfer function at that point, or to use parallel logic'circuitry or a faster clock rate or overcome the difficulty from an analog circuit.

Claims: CLAIMS 1. A data processing system of the kind set forth wherein means are arranged to provide the times between n zero crossings as herein defined to measure said times to establish the number (R) between said zero crossings as given by the expression: n r _ - R = ϊ _> - τ ( *i - °5 ) i=l ^" x '~~ J where I is the integer part of x, ii is an integer representing the number of zero crossings and t. is the duration of the ith interval between zero crossings measured on a bit base of unity thereby to permit the use of said number (R) when compared with a predetermined tolerance range to provide an indication of the quality of said transmission. 2. The data processing system as claimed in claim 1 wherein the integer n is between 8 and 100. 3. The data processing system as claimed in clai__. 2 wherein the integer n is 32. 4. The data processing system as claimed in claim 3 wherein the integer n is 64. 5. The data processing system according to any preceding claim wherein means is provided to allow the transfer function to be entered after a short time interval. 6. A data processing system constr-ucted and arranged substantially as hereinbefore described and as shown in the figures of the accompanying drawings and the appendix. SUBSTITUTE SHE -

Inventors: BEESLEY GRAHAM EDGAR
Applicants: BEESLEY GRAHAM EDGAR, MOTOROLA INC
Application year: 1982
Main classification: H04L1
IPC codes: H04L1, H04L25