SEMICONDUCTOR DEVICE HAVING TWO RESISTORS

Abstract: A semiconductor device comprising at least two pinch resistors or two ion-implanted resistors having a precise resistance ratio therebetween. Pinch resistors and ion-­ implanted resistor have at least one region contributing to the determination of a resistance value, respectively. In two pinch resistors or two ion-implanted resistors, a ratio in number of a plurality of regions in one resistor to at least one region in the other resistor is selected to be identical to the resistance ratio of one resistor to the other resistor, resulting in that a precise resistance ratio is realized despite of different configurations of the two resistors.

Description: Background of the invention The present invention relates to a semiconductor device, and more particularly to a resistor having a high resistance value in a monolithic integrated circuit (hereinafter called "monolithic IC"). A resistor in a monolithic IC, for instance, in a bipolarmonolithic IC comprising circuit elements formed in an N-type epitaxial layer on a P-type substrate, is normally constructed of a P-type strip-shaped region formed in the N-type epitaxial layer simultaneously with formation of a base region of an NPN transistor. The sheet resistance and junction depth of the strip-shaped region are uniquely determined depending upon a characteristic of the NPN transistor. Therefore, a predetermined resistance value is realized by adjusting width and/or length of the strip-shaped region. However, the sheet resistance of the strip-shaped region is low. For this reason, in order to obtain a resistor having a high resistance value, the length of the strip-shaped region would become very long. As a result, the area occupied by the strip-shaped region would become very large. For the purpose of realizing a resistor having a high resistance value without increasing the occupation area, the so-called pinch resistor and ion-implanted resistor have been used. These resistors have been employed also in MOS-type monolithic IC. The pinch resistor is such that an N⁺-type region is formed on the P-type strip-shaped resistor region so as to overlap with a part of the P-type strip-shaped resistor region and to connect with the N-type region in which the P-type resistor region has been formed and electrical connection is provided at the both ends of the strip-shaped resistor region. The thickness of the strip-shaped region is partially reduced by the overlapping N⁺-type region, and moreover, the portion having a relatively high impurity concentration along the surface of the strip-shaped region would not contribute to the determination of the resistance value. As a result, the resistance value is substantially determined by the sheet resistance of a P-type portion under the overlapping N⁺-type region and the width and length of this overlapped P-type portion. The sheet resistance of the P-type portion is increased by about one decimal order. Thus, a resistor having a high resistance value can be realized without increasing the occupation area of the resistor. On the other hand, the ion-implanted resistor is constituted by an ion-implanted region having a high sheet resistance, i.e., by a strip-shaped region formed by implanting P-type impurity ions into a surface portion of an N-type region at a low concentration. Since the sheet resistance of the ion-implanted region is relatively high, good ohmic contact between an electrode and the ion-implanted region cannot be realized. Hence, contact regions having a low sheet resistance are formed at both ends of the strip-shaped region, and electrodes for the ion-implanted resistor are formed on the contact regions. Accordingly, the resistance value of the ion-implanted resistor is substantially determined by such a portion of the ion-implanted region that is located between the contact regions. The formation of the ion-implanted region by the ion-implantation of an impurity is effected before the formation of the electrodes but after active regions for circuit elements have been formed. If heat treatments for forming the active regions are effected after ion-implantation of impurities, the implanted impurities would be rediffused by the heat treatments, so that a desired high sheet resistance could not be obtained. Due to the fact that the ion implantation step is effected after all active regions have been formed as described above, a thickness of a surface insulating film on the ion-implanted region is extremely thin as compared to that of the surface insulating film on its surrounding region which has been formed through several times of heat treatment included in the diffusion steps effected before the ion implantation step. In other words, the difference in thickness between the surface insulating film on the ion-implanted region and that on its surrounding region is considerably large. For this reason, in the event that an interconnection conductor passes over an ion-implanted resistor, it may possibly occur that the interconnection conductor is broken at the steps of the insulating films. In order to obviate this shortcoming, a semiconductor region is additionally formed simultaneously with the contact regions in the ion-implanted resistor. The interconnection conductor crosses above this semiconductor region, the insulating film on which is found thick by the subsequent steps including the heat treatment. Since this semiconductor region has a low sheet resistance, the ion-implanted region is elongated by the length corresponding to the length of that semiconductor region. Consequently, an ion-implanted resistor over which an interconnection conductor passes includes at least two ion-implanted resistor regions, two contact regions and a semiconductor region having a low sheet resistance for connecting the two ion-implanted resistor regions to each other. This semiconductor region is referred to, hereinafter, as a connecting region. Where the aforementioned pinch resistors and ion-implanted resistors are used as resistors in a circuit such as, for example, a differential amplifier, a flip-flop or resistance divider circuit which requires a precise resistance ratio, a current flowing through the circuit could be reduced for a low power consumption, and further the design of a heat capacity of a package for sealing a semiconductor chip could become easy. However, with respect to the pinch resistor undesired expansion of the N⁺-type region overlapping the P-type resistor region which occurs in its formation by diffusion or annealing directly influences the resistance value of the pinch resistor, while in the ion-implanted resistor undesired expansion of the contact regions and the connecting region occurring in their formation directly influence the resistance value of the ion-implanted resistor. More particularly, with the expansion of the N⁺-type region in the pinch resistor, the length of the P-type portion overlapped with the N⁺-type region is undesirably expanded, so that the resistance value of the pinch resistor becomes higher. On the other hand, the expansion of contact regions and the connecting region in the ion-implanted resistor undesirably decreases the length of the ion-implanted resistor region between them, so that the resistance value of the ion-implanted resistor becomes lower. For this reason, it has been almost impossible to realize a precise resistance ration by use of pinch resistors or ion-implanted resistors, even if the lengths of the respective resistors are made to have an intended ratio. Where the intended ratio is one, it is difficult to form two resistors in the congruent shape from the point of view of a pattern layout including transistors and other elements, and it is impossible to realize the ratio of one by the two resistors with different configurations. In US―A―41 61 742 there is disclosed a semiconducteur device including two resistors, one resistor being formed of one unit resistor region and the other resistor being formed of a plurality of unit resistor regions connected in series by metal conductors. Each unit resistor region is isolated individually by a P.N junction. In resistors of this type which are made up by series-connected individual, substantially identical unit resistor regions the above described problem which occurs in resistors formed by differently treated zones of a continuous elongated semiconductor region does not occur. A semiconductor device with the features defined in the pre-characterising part of Claim 1 represents a state of the art made available to the public by use of control stage unit CK 32 in transistor ignition switching device TSZ ― 0 227 100 024 of the compagny Robert Bosch GmbH, Stuttgart. In this known device the I-and L-shaped resistors have high resistivity portions of identical Lengths. Summary of the invention It is therefore one object of the present invention to enhance the freedom in the design of a semiconductor device in which a resistance ratio between resistors having different configurations can be precisely achieved. A semiconductor device according to the present invention is defined in Claim 1. In the case where the first and second resistors are pinch resistors, a semiconductor device according to the present invention further comprises a plurality of third semiconductor regions of the opposite conductivity type overlapping the respective first portions and at least one fourth semiconductor region overlapping the second portion. Consequently, the first and second portions in the first and second resistor regions are pinched between the common semiconductor region and the third and fourth semiconductor regions, respectively. On the other hand, if the first and second resistors are ion-implanted resistors, the first and second portions are the portions in the first and second resistor regions having an inherent sheet resistance obtained by ion implantation, respectively, located between two of contact regions and connecting resistions. Hence, for instance, in the event that there exist two first portions, two third semiconductor regions are provided in the case of pinch resistors, while in the case of ion-implanted resistors, there are two portions in the first resistor region having the inherent sheet resistance obtained by ion implantation and located between contact regions and a connecting region. The two first portions in the pinch resistors are connected by the portion in the first resistor region on which the third semiconductor region is not formed, while the two first portions in the ion-implanted resistors are connected by the portion (i.e. a connecting region) in the first resistor region having a sheet resistance lower than that obtained by the ion implantation. In the pinch resistors and ion-implanted resistors, the portion for connecting the two first portions to each other is not substantially contribute to the determination of the resistance value of the first resistor, because it has a considerably small sheet resistance as compared to that of the first portions. As noted previously, the ratio of the number of the first portions to that of the second portion or portions is determined so as to coincide with the intended ratio of the resistance value of the first resistor to that of the second resistor. For instance, if the resistance ratio is 2, then the ratio in the number of the first portions to the second portion is also chosen to be 2. Accordingly, in the case of pinch resistors, the ratio of the error caused by the expansion of the third semiconductor regions in the first resistor to that caused by the expansion of the fourth semiconductor region in the second resistor becomes identical to the resistance ratio of the first resistor to the second resistor. In other words, the resistance ratio between the pinch resistors can be precisely obtained. Also in the case of ion-implanted resistors, the ratio of the error caused by the expansions of the contact regions and the connecting region in the first resistor to that caused by the expansion of the contact regions and the connecting region in the second resistor becomes identical to the resistance ratio of the first resistor to the second resistor, so that the resistance ratio between the ion-implanted resistors can be precisely achieved. Therefore, the pinch resistors or ion-implanted resistors according to the present invention can be used as the resistors in the circuit which requires a precise resistance ratio. As a result, the reduction of a circuit current can be achieved, and a freedom is design of a heat capacity of a package also can be enhanced. Brief description of the drawings Other objects, features and advantages of the embodiments of the present invention will become more apparent by reference to the following detailed description of the invention taken in conjunction with the accompanying drawings. It should be understood that the expression prior art technique used with reference to Figures 1 to 4 refers to prior in-house developments which have not been made public. Figure 1 is a plan view showing two pinch resistors formed in accordance with the prior art technique aiming at a resistance ratio of 1:1; Figure 2 is a plan view showing two ion-implanted resistors formed in accordance with the prior art technique aiming at a resistance ratio of 1:1; Figures 3 and 4 are plan views showing two pinch resistors and two ion-implanted resistors, respectively, having a precise resistance ratio of 1:1 which can be formed in accordance with the prior art technique; Figures 5 and 6 are plan views demonstrating the principle of the present invention applied to the two resistors shown in Figures 1 and 2, respectively, Figure 7 is a plan view showing a first preferred embodiment of the present invention; Figures 8, 9 and 10 are cross-section views taken along lines A-A′, B-B′ and C-C′ in Figure 7, respectively; Figure 11 is a plan view showing a third preferred embodiment of the present invention; Figures 13 and 14 are cross-section views taken along lines A-A′, B-B′ and C-C′ in Figure 11, respectively. Detailed description of the priort art Figure 1 shows two pinch resistors R₁ and R₂ which have been produced in accordance with the prior art technique aiming at a resistance ratio of 1:1. The pinch resistors R₁ and R₂ are produced by forming, for instance, P-type diffused layers 2 and 5 in an N-type semiconductor layer 1 and further forming N⁻-type diffused layers 3 and 6 so as to partly overlap with the diffused layers 2 and 5, respectively. The both end portions of the diffused layers 2 and 5 are broadened, and contact windows 4 and 7 for electrodes are formed on the broadened portions. From the standpoint of the requirement of a pattern layout, the P-type diffused layer 2 in the resistor R₁ is formed in an S-shape, and the P-type diffused layer 5 in the resistor R₂ is formed in a W-shape. The N⁻-type diffused layer 3 overlaps with three portions of the P-type diffused layer 2, and the N⁻-type diffused layer 6 overlaps four portions of the P-type diffused layer 5. Since P-type portions 8 and 9 pinched between the N⁻-type diffused layers 3 and 6 and the N-type semiconductor layer 1 have a high sheet resistance, these portions determine essentially the resistance values of resistors R₁ and R₂. The portions of the P-type diffused layers 2 and 5 other than the P-type portions 8 and 9 does not substantially contribute to the resistance values of the resistors R₁ and R₂ due to their low sheet resistances. In other words, the resistance value of the resistor R₁ is substantially determined by the three P-type portions 8, and that of the resistor R₂ is substantially determined by the four P-type portions 9. It is to be noted that solid line contours 2, 5, 3 and 6 of the diffused layers are designed configurations in a mask pattern, while chain line contours 2′, 5′, 3′ and 6′ of the diffused layers indicate the configurations after impurities have been diffused. Thus, the configurations of the diffused layers are, in practice, enlarged as compared to the designed configurations because of the lateral diffusion of the impurities. In addition, the impurity concentration of the N⁻-type diffused layers 3 and 6 is high, and therefore the lateral enlargement of the N⁻-type diffused layers 3 and 6 is larger than that of layers 2 and 5. In the following, the resistance ratio between the pinch resistors R₁ and R₂ having the aforementioned configurations will be considered. At first, a simplified formula for generally representing a resistance value R of a pinch resistor is given by the following equation: R=ρ PINCH · L(1+ ΔL L ) W(1+ ΔW W ) +α where ρ PINCH represents a sheet resistance of a P-type portion pinched between two N-type layers; W and L represent a width and a length on a mask pattern of the P-type portion, respectively; and ΔW and ΔL represent increments of the width W and the length L caused by the lateral diffusion of the impurities, respectively. The ΔW and DL have a positive sign due to the expansion of the upper N -type layer as well as the expansion of the P-type layer. In Figure 1, since the sheet resistance ρ PINCH of the P-type portions 8 and 9 are almost constant in the same wafer in which the resistors R₁ and R₂ are to be fabricated, and further since the fabrication conditions such as the conditions for impurity diffusion, the etching condition, etc. are also nearly the same, the resistance value R₁ of the resistor R₁ is represented by the following equation: R₁=ρ PINCH · L 1 (1+ ΔL 1 L 1 )+L 2 (1+ ΔL 2 L 2 )+L 3(1+ ΔL 3 L ) W(1+ ΔW W ) +α where ρ PINCH : a sheet resistance of the P-type portions 8; L₁, L₂, L₃: lengths of the P-type portions 8 on a mask: ΔL₁, ΔL₂, ΔL₃: increments of lengths of the P-type portions 8 by the expansion of the N⁻-type layer 3; W: a width of the P-type portion 8 on a mask; ΔW: an increment of the width of the P-type portion 8 by the expansion of the P-type layer 2; α: a sum of the contact resistances of electrodes (not shown) connected to the layer 2 through the contact windows 4 and the resistances of the portions of the P-type diffused layer 2 on which the N⁻-type diffused layer 3 is not formed. The second term on the right side of Equation-(2) is negligibly small as compared to the first term on the right side. Hence, Equation-(2) can be reduced into the following equation: R₁=ρ PINCH · L 1 (1+ ΔL 1 L 1 )+L 2 (1+ ΔL 2 L 2 )+L 3(1+ ΔL 3 L 3 ) W(1+ ΔW W ) Likewise, with regard to the resistor R₂, the following equation is fulfilled: R₂=ρ PINCH x L 4 (1+ ΔL 4 L 4 )+L 5 (1+ ΔL 5 L 5 )+L 6(1+ ΔL 6 L 6 )+L 7 (1+ ΔL 7 L 7 ) W′(1+ ΔW′ W′ ) As noted previously, since the resistors R₁ and R₂ in Figure 1 have been fabricated aiming at a resistance ratio of 1:1, the widths and lengths of the resistors R₁ and R₂ have been chosen so as to fulfill the relations of W=W′ and L₁+L₂+L₃=L₄+L₅+L₆+L₇=L. Consequently, the resistance ratio R₂/R₁ between the resistors R₁ and R₂ is represented by the following equation: R 2 R 1 = ρ PINCH · L 4 (1+ ΔL 4 L 4 )+L 5 (1+ ΔL 5 L 5 )+L 6 (1+ ΔL 6 L 6 )+L 7 (1+ ΔL 7 L 7 ) W ′(1+ ΔW′ W′ ) ρ PINCH · L 1 (1+ ΔL 1 L 1 )+L 2 (1+ ΔL 2 L 2 )+L 3 (1+ ΔL 3 L 3 ) W(1+ ΔW W ) = L 4 +L 5 +L 6 +L 7 +ΔL 4 +ΔL 5 +ΔL 6 +ΔL 7 L 1 +L 2 +L 3 +ΔL 1 + ΔL 2 +ΔL 3 = L+ΔL 4 +ΔL 5 +ΔL 6 +ΔL 7 L+ΔL 1 +ΔL 2 +ΔL 3 Since the lateral expansion in the N⁺-type diffused layers 3 and 6 is identical on the same wafer, the relations of ΔL₁ =ΔL₃=ΔL₄=ΔL₅=ΔL₆=ΔL₇=ΔL are fulfilled, so that Equation (4) is reduced into the following equation: R 2 R 1 = 4ΔL+L 3ΔL+L As a result, the terms 4ΔL and 3ΔL become main factors of the error in the resistance ratio. In other words, even if the total resistor length L is selected to be equal to each other on the marks of the pinch resistors R₁ and R₂, an error in the resistance ratio would arise as represented by Equation-(5). Now generalizing Equation-(5) so as to cover more general cases, then the following equation-(6) is produced. At this time, the widths of the resistor sections are equal to each other: R 2 R 1 = ρ PINCH · n′ΔL+βL W(1+ ΔW W ) ρ PINCH · nΔL+L W(1+ ΔW W ) = n′ΔL+βL nΔL+L where n: the number of the overlapped portions between the N⁺-type diffused layer 3 and the P-type diffused layer 2 in the resistor R₁, that is, the number of the P-type portions 8; n′: the number of the overlapped portions between the N⁺-type diffused layer 6 and the P-type diffused layer 5 in the resistor R₂, that is, the number of the P-type portions 9; and β: the ratio of the total length of the P-type portions 9 in the resistor R₂ to that of the P-type portions 8 in the resistor R₁. Equation-(6) represents that as the ratio between the numbers n and n′ differs from an intended resistance ratio, that is, from the total length ratio β of the P-type portions, the resistance ratio between the resistors R₁, and R₂ would deviate from the intended resistance ratio. Therefore, in order to eliminate the deviation of the resistance ratio between the resistors R₁ and R₂, it is required to select the numbers n and n′ of the overlapped portions in Equation-(6) in accordance with the resistance ratio. In the case where the resistance ratio is one, the number n should be selected to equal the number n′. For this purpose, in the prior art either the P-type diffused layer 2 was formed in the same W-shape as the P-type diffused layer 5 or the P-type diffused layer 5 was formed in the same S-shape as the P-type diffused layer 2. In other words, in order to obtain a precise resistance ratio, the resistor R₁ and the resistor R₂ were formed in the congruent configuration. This would bring about the restriction in a pattern layout. Moreover, in the case where the resistance ratio is larger than 1 or the configurations between two resistors are different as shown in Figure 2, a precise resistance ratio could not be realized due to the different configurations of the two resistors. Referring now to Figure 2, the description will be made on two ion-implanted resistors R3 and R₄ fabricated in accordance with the prior art technique aiming at a resistance ratio of 1:1. The ion-implanted resistors have P-type ion-implanted regions 11 and 15 having a high sheet resistance which are formed in an N-type layer 10 through the ion-implantation of P-type impurities, and further have P-type contact regions 12 and 16 having a high impurity concentration which are formed at both ends of the P-type ion-implanted regions 11 and 15 simultaneously with formation of a base region, respectively. In viewpoint of a pattern layout, the resistors R₃ and R₄ are formed in an S-shape and in a U-shape, respectively. Moreover, the resistor configurations shown in Figure 2 can meet the case where interconnection conductors have to pass over the ion-implanted resistors R₃ and R₄ in the point of view of a wiring pattern, respectively. More particularly, the ion-implanted resistors R₃ and R₄ are provided with regions 13 and 17 having a low sheet resistance, respectively. The interconnection conductor passing over the resistor R₃ crosses over the region 13, while the interconnection conductor passing over the resistor R₄ crosses over the region 17. Since no wiring crosses over a region 14 in the resistor R₃, it may be conceived that this region 14 may be formed as an ion-implanted region connected to the ion-implanted regions 11. However, if it should be done, two bent corners would arise in the ion-implanted region 11 of the resistor R₃. On the other hand, in the resistor R₄ there is no bent corner of the ion-implanted region 15. Thus, if there exists a difference in the number of bent corners of ion-implanted regions between two resistors, the desired resistance ratio between the resistors R₃ and R₄ cannot be obtained due to fluctuations in the resistance at the bent corner. For the purpose of obtaining a desired resistance value, it is necessary to make the numbers of bent corners of ion-implanted regions in the two resistors coincide with each other. Since the number of bent corners in the resistor R₄ is zero, the region 14 formed simultaneously with the region 13 is provided in order that the number of the bent corner in the resistor R₃ takes zero. As a result, the resistance value of the resistor R₃ is substantially determined by three ion-implanted regions 11, while that of the resistor R₄ is substantially determined by two ion-implanted regions 15. The regions 12, 13, 14, 16 and 17 are formed simultaneously. Further, in order to control the sheet resistances of the ion-implanted regions 11 and 15 the regions 12, 13, 14, 16 and 17 are formed earlier than the ion-implanted regions 11 and 15. Contact windows 18 and 19 are provided in surface insulating films (not shown) on the contact regions 12 and 16, respectively. It is to be noted that solid line contours of the regions 12, 13, 14, 16 and 17 indicate designed configurations on a mask pattern, whereas chain line contours 12′, 13′, 14′, 16′ and 17′ indicate resistor configurations that can be really obtained after the diffusion of impurities. In addition, solid line contours of the regions 11 and 15 indicate the configurations on a mask pattern to be used for ion-implantation, whereas chain line contours 11′ and 15′ indicate the configurations of the ion-implanted regions really produced by the anneal treatment for activating the ion-implanted impurities. Since the impurity concentration of regions 12, 13, 14, 16 and 17 is high, these regions expand more than the ion-implanted regions 11 and 15. Now consideration will be made on the resistance ratio between the ion-implanted resistors R₃ and R₄ having the aforementioned configurations. At first, a simplified formula for generally representing a resistance R of an ion-implanted resistor is given by the following equation: R=ρ S · L(1- ΔL L ) W(1+ ΔW W ) +α where ρ s represents a sheet resistance of an ion-implanted region; L and W represent a length and a width of the ion-implanted region on a mask pattern; ΔW represents an increment of the width of the ion-implanted region caused by anneal treatment; and ΔL represents a decrement of the length of the ion-implanted region caused by expansion of the contact regions 12 and 16 and the regions 13, 14 and 17, and therefore, the actual length of the ion-implanted region is reduced. In addition, α represents the sum of the contact resistances of electrodes (not shown) connected to contact regions 12 and 16 through the windows 18 and 19 and the resistances of the regions 13, 14, and 17. The value of α is negligibly small as compared to the first term on the right side of Equation-(7). Therefore, on the basis of Equation-(7) with the term α omitted, the resistance values R₃ and R₄ of the resistors R₃ and R₄ shown in Figure 2 can be derived as follows: R₃=ρ S · L 1 (1- ΔL 1 L 1 )+L 2 (1- ΔL 2 L 2 )+L 3 (1- ΔL 3 L 3 ) W(1- ΔW W ) R₄=ρ S · L 4 (1- ΔL 4 L 4 )+L 5 (1- ΔL 5 L 5 ) W′(1+ ΔW′ W′ ) As described previously, since the resistors R₃ and R₄ have been designed aiming at a resistance ratio of 1:1, the relations of W=W′ and L₁ + L₂ +L₃ = L₄+ L₅ = L are fulfilled. In addition, the sheet resistances ρ S of the ion-implanted regions 11 and 15 as well as the lateral diffusion of impurities are identical in the same wafer. Consequently, the resistance ratio R₄/R₃ between the resistors R₄ and R₃ can be represented by the following equation: R 4 R 3 = L-2ΔL L-3ΔL As will be seen from Equation-(10), even if the respective resistors R₃ and R₄ are designed to have the same total resistor length L in order to precisely realize a resistance ratio of 1:1, the actual resistance ratio does not become 1:1 but it is associated with an error due to the terms 3ΔL and 2ΔL in Equation-(10). This is due to the fact that the ion-implanted regions 11 in the resistor R₃ are connected through two high concentration regions 13 and 14, whereas the ion-implanted regions 15 in the resistor R₄ are connected by a single high concentration region 17, and therefore the errors given to the total resistor length L by the lateral expansion of these high concentration regions 13, 14 and 17 are different between the two resistors R₃ and R₄. In other words, with such configurations of the resistors, a precise resistance ratio cannot be realized. Since a wiring is not crossing over the region 14, the error in the resistance ratio caused by lateral diffusion of impurities can be reduced by converting the region 14 into an ion-implanted region. However, as noted previously, additional bent corners of the ion-implanted regions are produced in this case, so that fluctuations of a resistance at the bent corners would influence the resistance ratio. This influence upon the resistance ratio is larger than the influence caused by lateral diffusion of impurities. Now generalizing Equation-(10) so as to cover more general cases, the following equation is obtained: R 4 R 3 = βL-n′ΔL L-nΔL where n and n′ represent the numbers of the ion-implanted regions 11 and 15, respectively, and β represents the ratio of the total length of all the ion-implanted regions 15 in the resistor R₄ to that of all the ion-implanted regions 11 in the resistor R₃. Equation-(11) represents that as the ratio between the numbers n and n′ differs from an intended resistance ratio, that is, from the total length ratio β of the ion-implanted regions, the resistance ratio between the resistors R₃ and R₄ would deviate from the intended resistance ratio. Therefore, in order to eliminate the deviation of the resistance ratio between the resistors R₃ and R₄ in the case where the intended resistance ratio is one, it is necessary to select the numbers n and n′ in Equation-(11) to be equal to each other. For this purpose, according to the prior art, the numbers of the ion-implanted regions 11 and 15 were equalized either by adding one ion-implanted region in one resistor or reducing one ion-implanted region in the other resistor, and also the numbers of bent corners of the ion-implanted regions in the respective resistors were equalized. However, this measure taken in the prior art implies that the resistors R₃ and R₄ are formed in a congruent shape, resulting in bringing about severe restriction to a pattern layout. Moreover, in the case where the shapes of two resistors are different as shown in Figure 2 or a resistance ratio larger than 1 is required, it is absolutely impossible to realize a precise resistance ratio. As will be seen from the above description, in the case of fabricating two pinch resistors or two ion-implanted resistors having a precisely defined resistance ratio in accordance with the prior art technique, the configurations of the two resistors was congruent as shown, by way of examples, in Figures 3 and 4. Figure 3 shows the pinch resistors, and Figure 4 shows the ion-implanted resistors. Detailed description of the invention Now the embodiments of the present invention will be described with reference to Figures 5 and 6. Figure 5 shows the application of the present invention to the two resistors R₁ and R₂ shown in Figure 1. In Figure 5, reference symbols similar to those appearing in Figure 1 designate like physical quantities and reference numerals similar to those appearing in Figure 1 designate like component parts. According to the present invention, for the purpose of obtaining the same value between the numbers n and n′ appearing in Equation-(6), the number n of the P-type portions 8 pinched between the N-type epitaxial layer 1 and the N⁺-type diffused layer 3 in the resistor R₁′ is increased to 4 by modifying the shape of the N⁺-type diffused layer 3 in the resistor R₁′ without varying the shapes of the P-type diffused layers 2 and 5 in the resistors R₁′ and R₂′. In other words, by adding one portion overlapping with the P-type diffused layer 2 to the N⁺-type diffused layer 3 additionally, four P-type portions 8 determines the resistance value of the resistor R₁′ like the resistor R₂′. In this instance, if the lengths L₂′ and L₃′ of two P-type portions 8 are chosen to be equal to the lengths L₂ and L₃ of the P-type portions 8 in Figure 1, then the sum L₁′+L₈ of the lengths of other two P-type portions 8 is selected equal to the length L₁ in Figure 1. Thus, the numbers n and n′ of the overlapped portions between the N⁺-type diffused layers 3 and 6 and the P-type diffused layers 2 and 5 in the resistors R₁′ and R₂′ are both equal to 4. In addition, the widths and lengths between the resistors R₁′ and R₂′ have relations of W=W′ and L₁′+L₂′+L₃′+L₈=L₄′+L₅′+L₆′+L₇′=L. Hence, substituting n=n′=4 in Equation-(6), the resistance ratio R₂′/R₁′ between the resistors R₁′ and R₂′ in Figure 5 is derived as follows: R 2 ′ R 1 ′ = 4ΔL+L 4ΔL+L =1 In other words, a precise resistance ratio of one can be realized regardless of the shapes of the P-type diffused layers 2 and 5 and independently of lateral extension of the impurity diffusion. Figure 6 shows application of the present invention to the two ion-implanted resistors R₃ and R₄ shown in Figure 2. In Figure 6, reference numerals similar to those appearing in Figure 2 designate like component parts. According to the present invention, for the purpose of obtaining the same value between the numbers n and n′ represented in Equation-(11), the number n′ of the ion-implanted regions which contribute to determination of the resistance value of the resistor R₄′ is increased to 3 by additionally forming a P-type region 17′ in one part of the left side ion-implanted region 15′ in the resistor R₄′. In this instance, the mask pattern to be used for ion-implantation is designed such that the sum L₄′+L₆ of the lengths of two ion-implanted regions 15′ in Figure 6 may become equal to the length L₄ of the left side ion-implanted region 15 in the resistor R₄ shown in Figure 2. Since the numbers of the ion-implanted regions in the resistors R₃′ and R₄′ are equalized as described above, the relation of n=n′=3 is fulfilled in Equation-(11). In addition, in order to make the resistance ratio between the resistors R₁′ and R₂′ equal to 1:1, the relation of lengths of L₁′+ L₂′+ L₃′= L₄′+ L₅′+ L₆ = L is fulfilled, and with regard to the widths also, the relation of W=W′ is fulfilled. Accordingly, from Equation-(11) the resistance ratio R₄′/R₃′ between the resistors R₃′ and R₄′ can be derived as follows: R 4 ′ R 3 ′ = L-3ΔL L-3ΔL =1 In other words, even if the configurations of the ion-implanted regions are different, there are provided two resistors R₃′ and R₄′ having a precisely defined resistance ratio therebetween. Detailed description of the embodiments Figure 7 is a plan view showing two pinch resistors R₁₀ and R 11 fabricated according to one preferred embodiment of the present invention. Cross-section views taken along lines A-A′, B-B′ and C-C′ in Figure 7 are shown in Figures 8, 9 and 10, respectively. These two resistors R₁₀ and R₁₁ are formed in a bipolar monolithic IC. More particularly, formed on a P-type substrate 30 is an N-type epitaxial layer 31 of 8.6 µm to 9.7 µm in thickness having a resistivity of 0.88 ohm-cm to 1.18 ohm-cm. The N-type epitaxial layer 31 is divided into a plurality of island regions by an isolation region 32. A P-type impurity such as boron or the like is selectively diffused into one island region 31′ simultaneously with the formation of base regions (not shown) of NPN transistors, and thereby P-type regions 33 and 33′ are formed in the shapes shown in Figure 7. As seen from Figure 7, the P-type region 33 bends substantially at a right angle 6 times between the electrodes at the both ends, while the P-type region 33′ bends substantially at a right angle 4 times between the electrodes at the both ends. The regions 33 and 33′ both have a depth of about 2.8 µm and a sheet resistance of 150 to 250 ohm/ □ . Subsequently, N⁺-type regions 34 and 34′ are formed in the shapes shown in Figure 7 by selectively diffusing an N-type impurity such as phosphorus or the like simultaneously with the formation of emitter regions (not shown) of the NPN transistors. The depth of the regions 34 and 34′ is 2.0 µm and their sheet resistance is 2 to 10 ohm/ □ . Under such a condition, the P-type portions under the regions 34 and 34′ have a depth of 0.8 µm and a sheet resistance of 4 kohm/ □ . Since the N⁺-type region 34 in the resistor R₄ is formed in the shape shown in Figure 7, the resistance value of the resistor R₁₀ is determined by the resistances of two P-type portions 33―1 and 33―2 (Figure 9) pinched between the N⁺-type region 34 and the N-type epitaxial layer 31. The length of the P-type portions 33―1 and 33―2 are represented by L₁₀ and L₁₁, respectively. It is to be noted that the P-type portion 33―1 includes 4 bent corners, and the P-type portion 33―2 has no bent corner. On the other hand, the resistor R₁₁, which is required to have a precisely defined resistance ratio of 1:1 with respect to the resistor R₁₀ having the above-described configuration, has its resistance value determined by the shape of the N⁺-type region 34′ as will be described in the following. The P-type portion 33―1 which determines the resistance value of the resistor R₁₀ in cooperation with the P-type portion 33―2 has four bent corners, and the P-type portion 33―2 has no bent corner. Therefore, it is preferable that also in the resistor R₁₁, P-type portions determining its resistance value have four bent corners. As explained previously in connection to ion-implanted resistors, in a resistor presenting a high resistance value with a short length of a resistance region, such as a pinch resistor or an ion-implanted resistor, fluctuations in resistances at bent corners of a resistance region would largely influence the overall resistance value. Accordingly, the shape of the N⁻-type region 34′ is determined such that in the resistor R₁₁, a P-type portion 33′―1 pinched between the N⁻-type region 34′ and the N⁻-type epitaxial layer 31 which determine the resistance value of the resistor R₁₁ also have four bent corners. In addition, a desired resistance value of the resistor R₁₀ is realized by two P-type portions 33―1 and 33―2. Therefore, in order that the resistance value of the resistor R₁₁ is also determined by two P-type portions, the N⁻-type region 34′ is shaped so as to include a portion overlapping with the P-type region 33′ and a portion not overlapping with the P-type region 33′. As a result, two P-type portions 33′―1 and 33′―2 determine the resistance value of the resistor R₁₁. Representing the lengths of the P-type portion 33′―1 and 33′―2 by L₁₂ and L₁₃, respectively, in order to realize a resistance ratio of 1:1, the lengths of the P-type portion 33′―1 and 33′―2 are designed so as to fulfill the relation of L₁₀+L₁₁=L₁₂+L₁₃=L, and the width of every P-type portion is made identical. Accordingly, the relations of n=n′=2 and β=1 are fulfilled. From Equation-(6), the resistance ratio R₁₁/R₁₀ between the resistors R₁₀ and R₁₁ is derived as follows: R 11 R 10 = 2ΔL+L 2ΔL+L =1 in other words, a precise resistance ratio of 1:1 can be realized regardless of the lateral diffusion of impurities in the N⁻-type regions 34 and 34′. Now a second preferred embodiment of the present invention will be described with reference to Figure 11. In this preferred embodiment, a resistance ratio between two ion-implanted resistors R₃₀ and R₃₁ is chosen to be 1:1. Cross-section views taken along lines A-A′, B-B′ and C-C′ in Figure 11 are respectively shown in Figures 13, 14 and 15. The two ion-implanted resistors R₃₀ and R₃₁ are formed in a bipolar monolithic IC. More particularly, formed on a P-type semiconductor substrate 50 is an N-type epitaxial layer 51, and the epitaxial layer 51 is divided into a plurality of island regions by an isolation region 52. Formed in one island region 51′ are contact regions 53 for electrodes and a region 54 in the resistor R₃₀ and contact regions 53′ for electrodes and a region 57 in the resistor R₃₁ by selectively diffusing a P-type impurity into the island region 51′ simultaneously with the formation of base regions (not shown) of NPN transistors. The depth of these regions is 2.8 µm and the surface impurity concentration of these regions is 5x10¹⁸ cm⁻³. Subsequently, after the other semiconductor regions such as the emitter regions of the NPN transistors have been formed, a P-type impurity is selectively ion-implanted under the conditions of the acceleration energy of 50 KeV and the dose quantity of 1x10¹³ cm⁻² and then annealed, so that ion-implanted regions 55 and 55′ of the shapes shown in Figure 11 can be formed. The ion-implanted region 55 in the resistor R₃₀ extends from one contact region 53, then bends nearly at a right angle 4 times, and further is connected via the P-type region 54 to the other contact region 53. The P-type region 54 is provided for the purpose of allowing an interconnection conductor to pass over the resistor R₃₀. The interconnection conductor (not shown) crosses over the P-type region 54. Hence, the resistance of the resistor R₃₀ is determined by two ion-implanted regions 55―1 and 55―2. It is to be noted that the ion-implanted region 55―1 has 4 bent corners, and the ion-implanted region 55―2 has no bent corner. Since no wiring passes over the resistor R₃₁, a region corresponding to the region 54 in the resistor R₃₀ is not included in the resistor R₃₁. Moreover, the ion-implanted region 55′ in the resistor R₃₁ includes 4 bent corners. Hence, fluctuations in the resistance ratio caused by a difference in the number of bent corners would not arise between the resistors R₃₀ and R₃₁. However, the resistance value of the resistor R₃₀ is determined by two ion-implanted regions 55―1 and 55―2, whereas that of the resistor R₃₁ is determined by the single ion-implanted region 55′ if the region 57 is not provided, resulting in the inaccurate resistance ratio. In order to obviate such difficulty, a P-type region 57 formed simultaneously with the P-type regions 53, 53′ and 54 is provided in a part of the ion-implanted region 55′. As a result, the resistance value of the resistor R₃₁ is determined equivalently by two ion-implanted region 55′―1 and 55′―2. In this case, the sum L₃₀+L₃₁ of the lengths of the two ion-implanted regions 55―1 and 55―2 in the resistor R₃₀ is equal to the sum L₃₂+L₃₃ of the lengths of the two ion-implanted regions 55′―1 and 55′―2 in the register R₃₁, so that the relation of L₃₀+L₃₁=L₃₂+L₃₃=L is fulfilled. Therefore, the parameters n, n′ and β in Equation-(11) are given by β=1 and n=n′=2. Consequently, the resistance ratio R₃₁/R₃₀ of the resistor R₃₁ to the resistors R₃₀ is derived by substituting these parameter values into Equation-(11), as follows: R 31 R 30 = L-2ΔL L-2ΔL =1 Thus, a precisely defined resistance ratio of one can be realized. Incidently, while the above description has been made in connection to the case where an N-type epitaxial layer is formed on a P-type semiconductor substrate, the above-described principle of the present invention is also valid in the case where a P-type epitaxial layer is formed on an N-type semiconductor substrate. In that case, the same analysis can be made by merely inverting the conductivity types of the respective regions. In addition, the resistance ratio among more than three resistors is obtained accurately by using the present invention. The resistors according to the present invention are also used in a MOS-type monolithic IC.

Claims: 1. A semiconductor device comprising first and second strip-shaped resistors (R₁′, R₃′, R₂′, R₄′) which are formed respectively by first and second semiconductor regions (2; 5; 11, 12, 13, 14, 15, 16, 17) of one conductivity type, each region including a plurality of high resistivity portions (8, 9, 11, 15) which substantially determine the resistance value of the respective resistor and which have the same width in both resistors, and at least one low resistivity portion (13, 14) interconnecting said high resistivity portions wherein the geometrical configuration of the first and second strip-shaped resistors are different from each other, the resistance values of the first and second resistors (R₁′, R₂′) have a predetermined resistance ratio to each other, and the ratio of the numbers (n, n′) of the high resistivity portions (8, 9; 11, 15) in said first and second resistors (R₁′, R₂′), respectively, is substantially the same as said resistance ration, characterized in that each of said first and second semiconductor regions comprises a plurality of straight portions interconnected by bent portions, the numbers of straight portions in said first and second semiconductor regions are different to each other and their ratios different from said resistance ratio, in at least one of said first and second elongated semiconductor regions the number of high resistivity portions is different from the number of straight portions, and at least two of said high resistivity portions in said first resistor have different length. 2. A semiconductor device as claimed in claim 1 , characterized in that said first and second resistor (R₁′, R₂′) have the same resistance value and the number of high resistivity portions (8, 9) in said first and second resistor is the same in spite of the different geometrical configuration. 3. A semiconductor device as claimed in claim 1 or 2, wherein in each said high resistivity portion (8, 9) having one conductivity type is sandwiched between two semiconductor regions of the opposite conductivity type to form a pinch resistor region. 4. A semiconductor device as claimed in claim 1 or 2, wherein said high resistivity portions (11, 15) are formed as ion-planted semiconductor regions.

Inventors: KISHI, JUN
Applicants: NEC CORPORATION
Application year: 1982
Main classification: H01L27
IPC codes: H01L27