SIGNAL SAMPLING AND CONVERSION SYSTEM

Abstract: A signal sampling and conversion system for high-frequency sampling of either recurrent or non-recurrent signals in which the electron beam (6) generated by an electron gun assembly (2) of a CRT (1) is scanned across a charge coupled device (5) consisting of an array of storage elements located at the focal plane of the electron beam (6), with the time base and defection cicuit (9) of the CRT (1) being used to scan the beam (6) across the array at a rate equal to the sample rate. Depending on the configuration of the storage elements, which can be a linear array of rectangular or triangular elements, or a rectangular array, the beam current (6) is modulated or the Y deflection plates (3) are controlled by the input signal (13). Charges accumulate in the elements of the array which are indicative of the amplitude or range of amplitudes of the input signal (13) during the period of each sample; the accumulated charges are transferred from the storage elements, quantized (10) and digitally processed (11) to yield the amplitude of the signal.

Description: SIGNAL SAMPLING AND CONVERSION SYSTEM This invention relates to a signal sampling and conversion system and in particular to a system which is suitable for the high-frequency sampling of either recurrent or non-recurrent signals, in applications where the subsequent processing of the acquired samples needs to be performed at relatively low frequencies as, for example, in analogue-to-digital conversion systems. Many techniques for the analysis or recording of a- signal waveform require that a plurality of time-referenced samples of the waveform be stored in the form of digitally-encoded words for subsequent processing. It is, • however, known to be difficult to encode, or quantize, samples at a high rate, particularly when high ' accuracy is required simultaneously. It is known for example to achieve a maximum sample-quantizing rate of 20 MHz with a resolution of 1 part in 1024 (10 binary bits) . According to the well-known Nyquist-limit condition it is necessary, in a real-time sampling system,- for the sampling frequency to be at least twice that of the highest-frequency component of the signal being sampled. For very-high-frequency signals it -is usual, therefore, to employ the techniques of random or sequential sampling, in each of which a continuously-recurring signal is sampled at a frequency below that of the signal and a complete set of waveform samples is accumulated over a period containing many signal cycles. Neither of the latter techniques, however, is applicable to non-recurring signals. It is known in an alternative system to store signal samples in a form of charge-transfer device, for example a CCD integrated-circuit analogue shift-register. One such device allows 250 signal samples to be acquired serially a a rate of up to 50 MHz and transferred out at a conveniently lower rate. This technique is suitable for both recurrent and non-recurrent signals but has the disadvantage of being limited in sample acquisition-rate b the charge-transfer device characteristics. In previously-known sample-and-hold systems, a sample of a signal is acquired by charging a storage capacitor fo the duration- o ' f a sample period to a voltage which will be as nearly as possible equal in magnitude to the instantaneous voltage of the said signal at the end of the sample period. The capacitor current in the sample period is a function of the instantaneous difference between the signal and capacitor voltages. The sample period must therefore be long enough to allow the said difference in voltages to reach an acceptably low level, when the signal voltage is static, before the capacitor is isolated from the charging circuit for the hold period. This sample-and-hold cycle may be repeated in response to timin pulses. It will be apparent to those skilled in the art that if the signal to be sampled changes in magnitude during a sample period, the resulting sample may not be a true representation of the signal magnitude at the end of the sample period. In particular, the storage capacitor O PI vo age w ag e s gna vo age; rregu ar y timing of sample pulses combined with the sample-hold transition time will cause uncertainity of the signal voltage at the end of the sample period; random noise of higher frequency than the sample rate will cause random sample voltage errors; and in general, neither the signal voltage at the end of the sample period nor the resulting sample voltage will be representative of the signal voltages occurring prior to the end of the sample period. According to the present invention there is provided signal sampling and conversion system comprising a controlled current source operable to generate a current proportion to a selected sample rate; a storage array divided into a plurality of storage elements insulated on from another and adapted to receive and transmit charge; commutator means operable to direct the said current sequentially to each of the said storage elements at a commutation rate equal to the said sample rate; a means f modulating or otherwise controlling the said current in response to an input signal so as to cause a plurality of charges to be accumulated. in the said storage array indicative of the amplitude or range of amplitudes of said input signal during the period of each sample; and a convertor operable to remove the said charges from the sai storage array and generate output data representing the amplitude of each of the said charges. --^._ It is known for recently-developed optical image-sensing devices to employ charge-transfer integrated OMP c rcu ts, -par cu ar y o e ype, essen a y comprising a plurality of analogue shift " regis.te elemen with large dynamic range operable to transport charges accumulated by a plurality of photon-detecting elements. However, the said photon-detecting elements may be adapt to accumulate electrons by conduction from supplementary electrodes or other circuit connections, photons being preferably excluded. Thus a CCD integrated circuit may comprise the storage array and output convertor of the present invention. It will be apparent to those skilled in the art tha either an additional part of the said CCD integrated circuit or a separate solid-state circuit of suitable ty could comprise a controlled current source, commutator means and modulating means of the present invention. However, because of the present state of the art of solid-state devices both the maximum sample rate and maximum signal frequency achievable would be "* 'limited. I is anticipated that future improvements in semiconductor technology could allow the economical production of a fu solid-state signal sampling and conversion system accord to the present invention and suitable for applications requiring moderately high sampling rates. In order to maximise the attainable sample rate and signal frequency bandwidth it is advantageous to use a cathode-ray tube, CRT, constructed according to known principles and pract and adapted so that a CCD integrated circuit is position - in the focal plane of an electron beam. The CCD integra circuit may feature a target array as part- of the— commutation means. The CRT system including the said CC integrated circuit is operable in conjunction with relat external circuits as the signal sampling and conversion system of this invention. Embodiments of the present invention will now be described with reference to the drawings in which: Figure 1 is a perspective schematic view of a signa sampling and conversion system in accordance with the first; second and third embodiments of the present invention; Figure 2 is a diagram showing a representative porti of the target and manner of connection thereto of the signal conversion circuits in accordance with the first embodiment; Figure 3 is a diagram similar to part of Figure 2 showing an alternative target arrangement of the second embodiment; Figure 4 is a diagram showing a representative porti of an alternative target arrangement and alternative mann of connection thereto of signal conversion circuits in accordance with the third embodiment. There is shown in Figure 1 a signal sampling and conversion system comprising a CRT 1 having at one end an electron gun assembly 2 generating a current in the form electron beam 6, the amplitude of said current being in accordance with control signals 13; a Y axis deflection plate assembly 3; an X axis deflection plate assembly 4 causing the beam 6 to be deflected, or scanned, in an X OMPI direction across the surface of an integrated-circuit- target 5 in response to a timing voltage 16; a scan rotation coil 7 carrying an alignment current 23; a beam current control circuit 8 generating control signals 13 in response to timebase sweep speed and timing signals 15; a timebase 9 generating digital timing and control signals 15, 17, 19 and 21 and a ramp voltage 16 in response to a trigger signal 14; a quantizer 10 encoding serial analogue data 18 from the CCD integrated circuit 5 in response to timing signals ' 19 and stored reference data 22; and -a digital system 11 which in general is adapted to suit a particular application of the present invention but in particular is adapted to receive and store digitally-encoded signals 20 in response to timing signals 21, said digitally-encoded signals being inclusive of calibration data which is subsequently re-transmitted to the quantizer 10 as reference data 22. A signal input 12 may be applied alternatively to modulate the beam current through the beam current control 8, as shown by a dashed arrow, or to the Y deflection plates 3. In the first embodiment of the invention the integrated circuit 5 carries a linear array of approximately 500 conductive target elements 24, as shown in Figure 2, each of the said elements being attached to a storage element 25. When a trigger impulse 14 is applied the electron beam ' 6 is set to a predetermined bias current and caused to sweep across the target elements 24 along a straight path 32. The length of the target elements in the - JB E O Y direction is made sufficient to accommodate any anticipated misalignment of the sweep. The beam "is bla during the retrace time, according to normal practice. beam current is modulated during the sweep by applying input signal 12 to the beam current control 8, the Y deflection plates 3 being grounded or omitted. Charge samples thus acquired by the storage elements 25 are subsequently transferred by a CCD transfer gate 26 in response to a transfer pulse 29 to a shift register consisting of approximately 50 CCD stages 27. The samp 30 are then shifted sequentially .in response to timing signals 34 to a charge detector amplifier 28, whose operation is previously known, and which produces an ou voltage signal 31 proportional to the amplitude of each corresponding charge sample. Although a single shift register is shown for clarity, it is common practice to couple the storage elements 25 alternately to two parall registers. In like manner, further registers and elemen may be included for ancillary purposes. Two disadvantages of the first embodiment are that non-linearity of the beam current modulation system necessitates the use of complex correction and calibrati circuits; and the presence of a high beam acceleration potential on the electrodes of the gun 2 makes the coupl of an input signal difficult, particularly if the signal components extend to a low or zero frequency. In the second embodiment the CCD is provided with a modified target, array, illustrated in Figure 3, intended OMPI eliminate the disadvantages of the first embodiment.. The target elements 24 of the second embodiment are triangula in shape, the Y dimension being approximately 1mm. Betwe each target element are placed grounded conductive elemen 33. For a constant beam current during a scan, the charg acquired by an element 24 is-thus linearly related to the displacement in the Y direction of the electron beam from the median line 32. The input signal in the second embodiment is applied to the Y plates, which are close to ground potential, and a linear relationship between the input signal 12 and the output 18 is thus readily achieve Major advantages of the second embodiment are that t sensitivity of the Y plates is very high because of the small vertical deflection and very wide signal bandwidth readily achievable using well-known CRT techniques. - A disadvantage is that very precise scan alignment is necessary and an alignment current 23 is therefore applie to the scan rotation coil 7 for skew correction whilst Y position is corrected by summing a d.c. offset voltage wi the input signal 12. In the third emodiment, the target array is illustrated in Figure 4 is used. The CRT is operable in similar manner to the second embodiment; however, a plurality of target elements arranged in a vertical colum replaces each target element of the previous embodiments, the charge acquired by each such element being proportion to the transition time of the beam across any such element. Charges in the storage elements 25 are transferred to underlying shift-register elements 27, -the said charges then being shifted column by column in parallel to output shift-register elements 35. The output data 31 may then be quantized as before and subsequently processed digitally to yield, for example, both peak and average signal values occurring in each sample period. The foregoing is a description of only a few preferred embodiments of the present invention. For example, the number and size of target elements may be varied, in conjunction with corresponding changes to the storage and conversion elements, to satisfy different time and amplitude resolution requirements. In other nore illustrated embodiments, the number and size of target elements is varied in conjunction with corresponding changes to the storage and conversion elements to satisfy different time and amplitude resolution requirements. I have found the advantages of the illustrated embodiments to be that each is able to acquire and store a plurality of samples of a signal during a selected time interval; to convert said stored samples to one or more serial outputs having an analogue data rate suitable for quantization or other processing of the data; to achieve the sampling and conversion of very-high-frequency signals by a compact, economical, reliable and accurate means; to reduce sampling errors caused by unwanted noise or frequency components higher than the sampling rate; to reduce relative timing errors of samples; tc> .virtually eliminate sampling errors caused by rapid transitions of the signal; to provide a first alternative sample ' storage- system permitting the average voltage of the signal durin each sample period to be readily quantized; and to provid a second alternative sample storage system permitting, wh in conjunction with suitable-processing means, the averag voltage and/or the peak voltage excursions of the signal during each sample period to be quantized, as desired.

Claims: 1. - A signal sampling and conversion system comprising CLAIMS controlled current source operable to generate a current proportion to a selected sample rate; a storage array divided into a plurality of storage elements insulated o from another and adapted to receive and to transmit charge; commutator means operable to direct said curren sequentially to each of said storage elements at a commutation rate equal to said sample rate; a means for modulating or otherwise controlling said current in response to an input signal so as to cause a plurality o charges to be accumulated in the said storage array indicative of the amplitude or range of amplitudes of sai input signals during the period of each sample; a converter operable to remove said charges from the said storage array and generate output data representing the amplitude of each of the said charges. 2. A system as claimed in claim 1 wherein the converter is of the type which removes the charges and generates output data representing the amplitude of each of the charges in a sequential'manner. 3. A system as claimed in claim 1 or 2 wherein the converter is a charge transfer circuit. 4. A system as claimed in any one of the preceding clai wherein the storage array is part of a semiconductor integrated circuit which includes a CCD. 5. A system as claimed in any one of the preceding " claims wherein one or more of the components, namely the controlled current source, the commutator means and the modulating means or other controlling means is a semiconductor integrated circuit. 6. A system as claimed in any one of claims 1 to 4 wherein at least part of the controlled current source, commutator means and modulating means or other controlling means and part of a CRT and the commutator means further comprises a plurality of target elements, an X deflector plate assembly and part of a time base circuit. 7. A system as claimed in claim 6 wherein the controlled current source is an electron beam generator which causes the beam to impinge on a plurality of target elements each capable of acquiring a charge in proportion to the instantaneous amplitude of the beam current which is varied by the modulating means, the target elements being arranged side by side on the X axis and being linked each to a storage element. 8. A system as claimed in claim 6 wherein the controlled current source is an electron beam generator which causes the beam to impinge on a plurality of target elements each capable of acquiring a charge equal to the time integral of the electron beam current for the time of transit across the respective element, the target elements being arranged in a grid of columns parallel to the Y axis and rows parallel to the X axis, the target elements upon which t electron beam impinges instantaneously being selected according to the amplitude of the signals applied to the and Y deflector assemblies; the charges being transferre either column by column or row by row by parallel arrangement of shift registers, to an output shift regis 9. A system as claimed in claim 6 wherein the controll current source is an electron beam generator which cause the beam to impinge on a plurality of triangular target elements between which are situated grounded conductive element, the charge acquired by each target elements bei linearly related to the displacement in the Y direction the beam from the base line, such displacement being in accordance with the signal applied to the Y deflection assembly.

Inventors: SPALDING DAVID IAN, SPALDING, DAVID, IAN
Applicants: SPALDING DAVID IAN, SPALDING, DAVID, IAN
Application year: 1982
Main classification: G01R19
IPC codes: G01R13, H03M1