SEMICONDUCTOR DEVICE INCORPORATED IN A SEMICONDUCTOR LAYER FORMED ON AN INSULATING LAYER

Abstract: A semiconductor device comprises an insulating layer (110), an electrically conductive film (130) of metal or a metal compound having a high melting point formed on the insulating layer, a semiconductor layer (112) layered on the high melting point film, and an electrode metal layer formed in contact with the semiconductor.

Description: Semiconductor device The present invention relates to a semiconductor device and, more particularly, to a semiconductor device provided in a semiconductor layer formed on an insu lating layer. A polycrystal silicon layer can be formed on an amorphous insulating film. Accordingly, a polycrystal silicon layer can be grown on a monocrystal silicon layer having elements formed therein, with an interlayer insulating film interposed therebetween. If semiconductor elements are formed in the polycrystal silicon layer thus layered, the resultant semiconductor elements are arranged in a three-dimensional fashion. This results in an improvement of the integration density of the semiconductor device. The polycrystal silicon can be grown at a relatively low temperature. Because of this nature of the polycrystal silicon, the formation of the elements in the polycrystal silicon layer can be exe cuted without any adverse influence on the elements already formed in the monocrystal silicon layer. The sheet resistance of the impurity-doped polycrystal silicon layer is 5 to 50 times that of the impuritydoped monocrystal silicon layer when both are doped with the impurity under the same condition. In this respect, an element having a pn-junction formed in the polycrystal silicon layer grown in an insulating layer essentially has a problem with its characteristic. For example, in the Schottky diode, the presence of the polycrystal silicon layer with a high sheet resistance raises a series resistance to deteriorate a voltage vs. current characteristic. In this connection, the ordinary diode has a contradictive problem in that when an impurity concentration in the polycrystal silicon layer is reduced to improve the backward breakdown voltage, the forward characteristic is deteriorated, while when the impurity concentration is raised to improve the forward characteristic, the backward breakdown voltage is soft in its characteristic curve. In the bipolar transistor formed in the polycrystal silicon layer grown on an insulating layer, a large series resistor is formed in the collector region. As a result, the desired characteristic can not be obtained. A similar problem arises also in the semiconductor elements formed in the monocrystal silicon layer grown on the insulating layer. Accordingly, an object of the present invention is to provide a semiconductor device free from the characteristic problem due to the sheet resistance of the semiconductor layer on the insulating layer. To achieve the above object, a semiconductor device comprising an insulating layer-, an electrically-conductive film of metal or a metal compound with a high melting point formed on the insulating layer, a semiconductor layer of first conductivity type layered on the metal film, and a first electrode metal layer in contact with the semiconductor layer is provided. In such a physical arrangement, use of the electrically-conductive film with a high melting point can reduce the substantial series resistance in the semiconductor layer. This feature provides an improvement of the characteristic of the semiconductor device. Particularly, the current vs. voltage characteristic in the Schottky diode is improved. In the ordinary diode, even if the impurity concentration is reduced in order to improve the backward voltage, the presence of the high melting point metal film reduces the substantial sheet resistance. Therefore, the backward breakdown voltage and the forward characteristic are improved Further, the series resistance in the collector region of transistors is reduced. As a result, the switching and amplifying characteristics, for example, are improved. Other objects and advantages of this invention will become apparent from the following description taken in connection with -the accompanying drawings, in which: Fig. 1 shows a cross sectional view of a Schottky barrier diode formed in a polycrystal silicon layer according to the present invention; Fig. 2 shows a graph illustrating current vs. voltage characteristics of the Schottky barrier diode of the present invention; Fig. 3 shows a cross sectional view of another Schottky barrier diode according to the present invention; Fig. 4 shows a cross sectional view of a diode formed in a polycrystal silicon layer according to the present invention; Fig. 5 shows a current vs. voltage characteristic useful in explaining the advantages of the diode of the present invention; Fig. 6 shows a cross sectional view of another diode according to the present invention; and Fig. 7 shows a cross sectional view of a bipolar transistor formed in a polycrystal silicon layer according to the present invention. Referring to Fig. 1, an embodiment of a semiconductor device according to the present invention is illustrated. As shown, a metal silicide film 130, for example, a molybdenum silicide film of 2,000 to 3,000 in thickness, is formed on an insulating layer 110 made of SiO2 or Si3N4 by a sputtering process. The molybdenum silicide film 130 is formed into a desired shape through a photo resist process and a plasma etching process. Then, it is annealed at a temperature of 1,000 to l,1000C to have a resistance of about 3-to 4 ohms per square. An oxide film 118 of 2,000 to 3,000 A in thickness is formed covering the film 130 by, for example, the CVD process. The annealing process of the oxide film 118 and the annealing process of the molybdenum silicide film 130 may be done in the same step. The oxide film 118 has openings formed therein 120 and 122 for cathode passing therethrough. A polycrystal silicon layer 112 of 1,000 to 2,000 A is formed in the opening 122, in order to form a Schottky barrier diode. N type impurity, for example, phosphorus, is implanted into the layer 112 by the ion implantation process. Next, the polycrystal silicon layer 112 is annealed. Addition of the impurity into the polycrystal silicon layer 112 may be performed at the time of forming the polycrystal silicon layer 112. Electrode metal layers 114 and 116 made of aluminum, for example, may be formed in the opening 120 and on the polycrystal silicon layer 112, respectively. A Schottky junction is formed at the interface of the polycrystal silicon layer 112 and the electrode metal layer 116. In a Schottky barrier diode with such a structure, the polycrystal silicon layer with a high resistance can be thinly formed so that the series resistance is low. Further, because a uniform current can be made to flow vertically, there is no locally centralized current flow. This brings about a high reliability of the semiconductor. A curve A in Fig. 2 shows a current vs. voltage characteristic of the Schottky barrier diode according to the present invention. A curve B indicated by a broken line indicates substantially the same characteristic as that of a Schottky barrier diode formed on monocrystal silicon. While in the embodiment described above the molybdenum silicide film 130 is used for the electrode closes: to the cathode, the electrode may be formed by using another metal silicide film or a heat resistive metal film with a high melting point, such as molybdenum, tungsten, titanium, or tantalum. The same effects are achieved. The N type Schottky barrier diode used in the above-mentioned embodiment may be replaced by a P type Schottky barrier diode so that a platinum (pt) layer, for example, is formed on a P type semiconductor layer 112, and the platinum layer is silicided. Fig. 3 shows a semiconductor device with a plurality of Schottky diodes. Like reference symbols are used for designating like portions in Fig. 1. A second embodiment of a semiconductor device according to the present invention will be described referring to Fig. 4. A land-shaped molybdenum silicide film 130 of 1,000 to 3,000 thickness is formed on an insulating layer 110 made of, for example, SiO2 or Si3N4. The molybdenum silicide film 130 when annealed has a very small sheet resistance of 2 to 3 ohms per square. A landshaped P type polycrystal silicon layer 112 of 5,000 to 10,000 is formed on the insulating layer 110, entirely covering the molybdenum sil-icide film 130. An n+ type impurity region 132 and a p+ type impurity region 134 are formed in the polycrystal silicon layer 112 on the molybdenum silicide film 130. As shown, the n+ type impurity region 132 diffused does not reach the molybdenum silicide film 130. The n+ type impurity region 132 forms a pn junction in cooperation with its peripheral P type polycrystal silicon layer 112. The p+ type impurity region 134 is diffused to a depth reaching the molybdenum silicide film 130. The surface of the silicon layer 112 is covered with a silicon oxide film 118. Formed on the silicon oxide film 118 are a cathode electrode 117 in ohmic-contact with the n+ type impurity region 132 through a contact hole, and an anode 119 with the p+ type impurity region 134 through another contact hole. The land-shaped molybdenum silicide film 130 may be formed in a manner by which molybdenum silicide is deposited in a given thickness by the evaporation depositing process or the electron sputtering process. Its unnecessary portion is then selectively etched away. In a preferable formation of the land-shaped P type polycrystal silicon layer, a polycrystal silicon layer doped with no impurity is grown over the entire surface of the semiproduct up to a given thickness at 600 to 7000C by the CVD process. The polycrystal silicon layer is selectively etched to remove the unnecessary portion. The surface of the polycrystal silicon layer is then thermally oxidized to form the silicon oxide film 118. Next, boron is ion-implanted under the condition that the acceleration voltage is 40 to 80 KeV and the dosage is 5 x 1013 to 2 x 1014/cm2. It is then activated at a temperature of 900 to l,0000C. In this way, the polycrystal silicon layer 112 of P conductivity type is formed. The P type polycrystal silicon layer 112 thus formed has a resistivity falling in a range from several kilo ohms.cm to several tens kilo ohms.cm. For doping impurity into the P type polycrystal silicon layer 112, the following processes may be employed instead of the ion implantation process. The first is the CVD process, conducted by mixing impurity into the reactive gas. The second is to thermally diffuse impurity from impuritydoped silicate glass into the polycrystal silicon layer 112. The third is to add impurity into the polycrystal silicon layer 112 by the liquid/solid phase thermal diffusion process. The ion implantation process, however, is most preferable because the concentration of impurity can be controlled. For forming the n type impurity region 132 and the p+ type impurity region 134 r a suitable process may be employed, such as thermal diffusion or ion implantation. If the insulating layer 110 is an interlayer insulating film formed on the monocrystal semiconductor layer having elements already formed, the ion implantation is preferable for forming the n+ type impurity region 132. The n+ impurity region 132 is formed in a manner that arsenic is ion-implanted into the polycrystal silicon layer 112 under the condition that the acceleration voltage is 100 KeV and the dosage is approximately 1 x 1016/cm2. The p+ impurity region 134 is formed in a manner that boron is ion-implanted into the polycrystal silicon layer under the condition that the acceleration voltage is 50 to 80 KeV and the dosage is 1 x 1015 to 1 x 1016/cm2. The n+ type impurity region 132 and the p+ type impurity region 134 are then activated at a temperature of 700 to 9000C. According to this method, the impurity regions 132 and 134 may be formed without any influence upon the semiconductor elements already formed. The diode thus formed has a current vs. voltage characteristic indicated by a curve alpha (a) in Fig. 5. Curves beta (ss) and gamma (y) in the same graph indicate current-voltage characteristics of the diodes having no molybdenum silicide film 130. Generally, the backward breakdown voltage of the diode largely depends on the impurity concentration in the impurity region forming the pn junction where the impurity concentration is lower. In the embodiment shown in Fig. 4, the impurity concentration of the polycrystal silicon layer 112 predominantly determines the backward breakdown voltage. In order to achieve a good backward breakdown voltage, it is necessary to control the impurity concentration of the polycrystal silicon layer 112. The impurity concentration of the polycrystal silicon layer 112 is preferably selected so that the sheet resistance is, for example, at least 5 kilo ohms per square. In a diode having no molybdenum silicide film 130, when the impurity concentration of the polycrystal silicon layer 112 is decreased, that series resistance of the polycrystal silicon layer 112 is extremely high. In this case, the backward breakdown voltage is hard in its characteristic curve, but the forward characteristic is less than excellent, as indicated by the curve ss. On the other hand, when the impurity concentration of the polycrystal silicon layer 112 is increased, the forward characteristic is satisfactory, but the backward breakdown voltage is soft and high in the leak level, as indicated by the curve gamma (y). The diode according to the present invention has the molybdenum silicide film 130 with a low sheet resistance disposed under the polycrystal silicon layer 112. Accordingly, in the case that the impurity concentration of the polycrystal silicon layer 112 is low and the sheet resistance of the polycrystal silicon layer 112 is high, the substantial series resistance can be kept low. The reason for this is that substantial series resistance from the anode electrode 119 to the n+ type impurity region 132 is determined by the p+ type impurity region 134 and the molybdenum silicide film 130. Most of the current flows into the molybdenum silicide film 130 with a small resistance, not into the polycrystal silicon layer 112 with a large resistance. Accordingly, a current vs. voltage characteristic of the curve alpha (a) with a hard backward breakdown voltage and a good forward characteristic can be obtained. According to the present invention, even if the diode is formed in the polycrystal silicon layer formed through the interlayer insulating film on the monocrystal silicon layer, it is possible to prevent the characteristic of the diode from deteriorating. The abovementioned embodiment is a diode with a pn junction by the n+ type impurity region and p+ type impurity region. It is evident that the present invention is applicable to a diode with a pn junction by the ps type impurity region and the n type impurity region. A modification of a diode according to the present invention will be described referring to Fig. 6. In the present embodiment, the molybdenum silicide film 130 is partially formed beyond the polycrystal silicon layer 112. An anode electrode 119 is formed in contact with the extending portion of the molybdenum silicide film 130 beyond the polycrystal silicon layer 112. The structure of the remaining portion is similar to that of the Fig. 4 embodiment. Like reference numerals are used for the like portions in Fig. 6. No further explanation of the remaining structure will be given. The present embodiment employs the molybdenum silicide film 130 with an extremely small sheet resistance, thus attaining the same effects as those in the Fig. 4 embodiment. A third embodiment of a semiconductor device according to the present invention will be described referring to Fig. 7. As shown in the figure, a land-shaped molybdenum silicide film 130 is formed on an insulating layer 110 made of, for example, SiO2 or Si3N4. A land-shaped n type polycrystal silicon layer 140 is formed on the insulating layer 110 covering the entire of the molybdenum silicide film 130. A p type base region 142 is formed in the n type polycrystal silicon layer 140. An n+ type emitter region 144 is formed in the p type base region 142. The n type polycrystal silicon layer 140 serves as a collector region of the bipolar transistor. An n+ type impurity region 146 to be connected with the collector electrode 152 is formed in the collector region 140. The surface of the polycrystal silicon layer 140 is covered with an SiO2 film 118 formed by thermal oxidation. An emitter electrode 14S, a base electrode 150, and a collector electrode 152 which are in ohmic contact with the emitter region 144, the base region 142, and the n type impurity region 146 through contact holes, are formed on the SiO2 film 118. Generally, the bipolar transistor formed in the polycrystal silicon layer has a larger series resistance in the collector region than that formed in the monocrystal silicon layer. Because of the series resistance, it is impossible for the former transistor to obtain a desirable characteristic. When the molybdenum silicide film 130 is formed as in the third embodiment, this problem can be solved. The present invention may, of course, be applied to the pnp type bipolar transistors. The molybdenum silicide film may be replaced by another metal silicide film, or by a refractory metal film with a high melting point such as molybdenum, tungsten, titanium, and tantalum. The embodiments thus far described discuss the improvement of the semiconductor elements formed in the polycrystal silicon layer on the insulating layer. The series resistance is necessarily observed in the polycrystal silicon layer and ordinary semiconductor layer as well. Therefore, the present invention is applicable not only to semiconductor elements formed in the polycrystal silicon layer, but also to semiconductor elements formed in a partially monocrystallized silicon layer or a monocrystal silicon layer. As a matter of course, the present invention is applicable to semiconductor elements formed in a semiconductor layer other than a silicon layer.

Claims: Claims: 1. A semiconductor device comprising an insulating layer (110), a semiconductor layer (112, 140) of the first conductivity type, a first electrode metal layer (116, 117, 150) formed on said semiconductor layer, characterized in that said semiconductor layer is layered on an electrically-conductive film (130) of metal or a metal compound having a high melting point formed on said insulating layer 2. A semiconductor device according to claim 17 characterized in that said semiconductor layer is a polycrystal silicon layer. 3. A semiconductor device according to claim 1 or 2, characterized in that said semiconductor layer and said first electrode metal layer (116) form a Schottky barrier. 4. A semiconductor device according to claim 1 or 2, characterized in that a semiconductor region (132, 142) of second conductivity type is formed on the surface of said semiconductor layer and separated from . . . .. . . said high melting point film (130), and said first electrode metal layer (117, 150) is formed in contact with said semiconductor region (132, 142) of the second conductivity type. 5. A semiconductor device according to claim 4, characterized in that the concentration of the second conductivity type impurity in said semiconductor region (132) is higher than that of the first conductivity type impurity in said semiconductor layer. 6. A semiconductor device according to claim 5, characterized in that said semiconductor region (132) and said semiconductor layer (112) form a diode. 7. A semiconductor device according to claim 6, characterized in that a second electrode metal layer (119) is formed in contact with said high melting point film (130) 8. A semiconductor device according to claim 4, characterized in that a first conductivity type semiconductor region (144) is formed on the surface of said second conductivity type semiconductor region (142) and said semiconductor layer (140) serves as a collector region of a bipolar transistor, said second conductivity type semiconductor region (142) serves as a base region of said bipolar transistor, and said first conductivity type semiconductor region (144) serves as an emitter region of said bipolar transistor. 9. A semiconductor device according to any one of claims 1 to 8, characterized in that said high melting point film (130) is made of metal silicide.

Inventors: KOMATSU, SHIGERU
Applicants: KABUSHIKI KAISHA TOSHIBA
Application year: 1982
Main classification: H01L21
IPC codes: H01L29, H01L21