OPTICALLY SWITCHED DEVICE

Abstract: Device using a gated diode switch (e.g. GDS) with its current conduction state controlled by a photovoltaically controlled field effect transistor (e.g. JFET) connected in series with the gated diode switch.

Description: OPTICALLY SWITCHED DEVICE Background of the Invention This invention is concerned generally with optically activated switches and particularly with such switches capable of blocking high voltages and carrying large currents. Much interest and effort in recent years has been directed toward the development of solid state switches. Such switches would find numerous applications in modern technology where their advantages, as compared to other types of switches, of small size, high reliability, etc., can be fully exploited. For example, such switches could be advantageously used as cross-point switches in telecommunications systems. Effort has been directed specifically toward the development of solid state switches capable of blocking high voltages and carrying large currents. For maximum versatility, such switches should be easily manufactured with other or similar switching devices on a common substrate. This should permit economies of manufacture and design flexibility. A switch with such characteristics has been developed and is commonly referred to as a gated diode switch or GDS, described, for example, in the paper "A New Bidirectional Solid-State Switch for Telephone Loop Plant," Proceedings I.E.E.E., Vol. 69, No. 3, March, 1981, pp. 292-299. This switch has a low impedance path in the ON or conducting state and a high impedance path in the OFF or blocking state. The switch can be easily fabricated in embodiments that will block voltages as large as 500 volts and carry currents larger than one ampere. Bilateral embodiments may be fabricated on a single chip with antiparallel connected switches. 2 - Any of several methods may be used to control th current conduction state of the GDS. That is, several methods are available to change the switch from the ON state to the OFF state or vice versa. For example, either an opto-isolator or a metal oxide semiconductor (MOS) transistor in series with the GDS may be used to control the current conduction state. Light sensitive devices, e.g., a photodiode array, may also be used to control the current conduction state. Although perfectly adequate for many purposes, these methods have drawbacks for some applications. When an opto-isolator is used, the maximum current capability of the switch is limited by the current handling capability of the opto-isolator. This is usually rather small and typically is only 0.5 amperes. When a metal oxide semiconducto transistor is used, a normally OFF device is connected in series with the normally ON GDS and the switch is therefore normally OFF. Photodiode arrays, because they produce only a small current when illuminated, are useful for switching a GDS only if the current through the GDS is very small, comparable to the photodiode array current, or for switching alternating currents. They cannot be used to switch large DC currents For some applications, these are undesirable features. Summary of the Invention It has been found that if the current in the current in the output circuit of the GDS is sufficiently reduced, the GDS can be turned .off by a conventional photosensitive means such as a photodiode array. Accordin to the invention, a switching means is included in the output circuit of the GDS for interrupting current flow to the anode; and the photosensitive means activates the switching means so as to interrupt the output circuit current substantially simultaneously with the switching of gate diode switch state from the conducting to the non¬ conducting state. Thus, one insures that the output circuit current is sufficiently reduced to permit the GD O /., 3 - to be turned off. In a preferred embodiment the switching means in a field effect transistor (FET) and the photosensitive means is a photodiode array (PDA) connected to the gate of the FET and the gate of the GDS. Upon illumination by the LED, the PDA develops a voltage at least equal to the pinch off voltage of the FET and changes the current conduction state of the normally ON FET to OFF; i.e., the drain-source channel changes from conducting to non-conducting. The current flowing in the series circuit, and thus in the gated diode switch, then drops sufficiently the GDS will also turn OFF. After the LED is turned OFF, the FET returns to its ON state in a time interval determined by a first RC timing circuit. The GDS remains in the OFF state for a time period determined by a second RC timing circuit. In a particular embodiment, voltages higher than the breakdown voltage of the FET are handled by the addition of a blocking diode between the drain of the FET and the gate electrode of the GDS. Switches of this invention may be constructed in both unilateral or bilateral embodiments. Brief Description of the Drawing FIG. 1 illustrates a structure of one embodiment of a gated diode switch as is known in the prior art; FIG. 2 is a schematic representation of a bilateral gated diode switch of the prior art; FIG. 3 illustrates an embodiment of an optically switched gated diode switch in accordance with one embodiment of the invention; FIG. 4 illustrates still another embodiment of an optically switched gated diode switch; and FIG. 5 illustrates a bilateral embodiment of an optically switched gated diode switch. Detailed Description It is believed that this invention will be better understood if first the structure and then the operation of a gated diode switch are briefly described. OMPI _ Λ- WIPO - 4 - One embodiment of a gated diode switch (GDS) is illustrated generally as 10 in FIG. 1. GDS 10 comprises support 12 which has a major surface 13 and a semiconducto body 14 whose bulk is of a first conductivity type and which is separated from support 12 by a dielectric layer 16. A first anode region 18 is included in body 14 and has a portion which extends to surface 13. A gate region 20 is included in body 14 and has a portion which extends to surface 13. A cathode region 24 is included in body 14 and has a portion which extends to surface 13. Region 22 encloses region 24 and has a portion which extends to surface 13. Region 22 acts as a depletion laye punch-through shield and inhibits inversion of the portion of body 14 at or near surface 13 between regions 20 and 24 Regions 18 and 22 are of said first conductivity type. Regions 20 and 24 are of a second conductivity type. The resistivities of regions 18, 20 and 24 are small with respect to the resistivity of the bulk portion, of body 14. Region 22 has a resistivity intermediate that of region 24 and body 14. Electrodes 28, 30 and 32 make low resistance ohmic contacts to the surface portions of regions 18, 20, and 24, respectively. A dielectric layer 36 covers surface 13 and isolates electrodes 28, 30, and 32 from all regions other than those intended to be electrically contacted. Region 18 is typically 2 to 4 microns thick and 48 microns wide by 52 microns long. Region 20 is typicall 2 to 4 microns thick and 15 microns wide by 300 microns long. Region 22 is typically 3 to 6 microns thick and 64 microns wide by 60 microns long. Region 24 is typicall 2 microns thick and 48 microns wide by 44 microns long. In one preferred embodiment, support 12 and body 14 are each of silicon and support 12 may be of eithe n or p type conductivity. Body 14 is typically 30 to 50 microns thick and 430 microns long by 300 microns wide. Substrate 12, body 14 and regions 18, 20, 22, and 24 are o n ~r ?~ r P+/ n+, £, and n+ type conductivity, _ r. _ Impurity concentrations are typically 2x10 13 5xl0 13 , 10 17 , 10 19 , 10 17 to 10 18 , and 10 19 /cm 3 for substrate 12, body 14 and regions 18, 20, 22, and 24, respectively. Layer 15 is silicon dioxide and is typically 2 to 4 microns thick. Electrodes 28, 30 and 32 are aluminum. A plurality of separate bodies 14 can be formed in a common support 12 to provide a plurality of switches. Other modifications of the embodiment depicted will be readily thought of by those skilled in the art. The operation of the gated diode switch will now be described. Structure 10 is typically operated as a switch which is characterized_by a low impedance path between regions 18 and 24 when. the switch is in the ON or conducting state and a high impedance path between regions 18 and 24 when in the OFF or blocking state. When the switch is in the ON state, holes are injected into body 14 from region 18 and electrons are injected into body 14 from region 24. The holes and electrons can be in sufficient numbers to form a plasma which modulates the conductivity of body 14. This effectively lowers the resistance of body 14 so that the resistance between regions 18 and 24 is relatively low when structure 10 is in the ON state. Reduced resistance through injection of both holes and electrons is conveniently designated as dual carrier injection. Substrate 12 is typically held at the most positive potential conveniently available. The potential applied to gate region 20 determines the current conduction state of the switch. Conduction between regions 18 and 24 occurs when the potential of region 20 is below the potentials of region 18 and region 24. Conduction between regions 18 and 24 is inhibited when the potential of region 20 is more positive than the potentials of regions 18 and 24. The excess positive potential needed to either inhibit or terminate conduction is, as is well known, a function of both geometry and impurity concentrations of structure 10. The positive gate potential causes the portion of body 14 between region 20 and the portion of layer 16 below region 20 to be depleted. Consequently, the potential of this portion is more positive than the potentials of regions 13 and 24 and inhibits the conduction of holes fro region 18 to region 24 by essentially pinching off body 14 against layer 16 in the portion below region 20. It also collects electrons emitted at region 24 before they reach region 16. However, the current through the switch will not be broken unless the gate current is comparable to tha flowin through the GDS from anode to cathode. FIG. 2 illustrates both an electrical symbol for a gated diode switch and a bilateral switch using two gate diode switches. The anode, gate and cathode electrodes of GDS are terminals 28, 30, and 32, respectively. The anode gate and cathode electrodes of GDSa are terminals 28a, 30, and 32a, respectively. The operation of the switch is invariant with respect to the polarity of the voltage applied between terminals A and B. Upon illumination by an LED or other light source, a series connected photodiode array (PDA) connecte to terminals A and B and having a sufficient number of photodiodes to develop a positive voltage of approximately 20 volts between the gate and anode of the GDS will change the bilateral switch formed by the two antiparallel connected GDSs from the ON to the OFF state if the current flowing between terminals A and B is less than the PDA current. If the current between terminals A and B is greater than the PDA current, the PDA will be unable to turn off the GDS. The PDA current is typically approximately 20 to 30 microamps. The switch can, of course, be made in the unilateral embodiment if only one GDS is used. Since the current conduction state of the switch can change only when the GDS current level falls below the value of the PDA current, the switch cannot be used for DC voltages between terminals A and B. As a prac tical matter, it can only be used when an AC current flows between terminals A and B because only then can one assume VV - 7 - that the GDS current will drop below the value of the PDA current. A first embodiment of a device of this invention that will switch both alternating and direct currents is schematically represented in FIG. 3. A series circuit is formed between first and second terminals A**_ and B by resistance R-., the channel between the drain and source electrodes of an n-channel depletion mode JFET, and the channel between anode and cathode electrodes of a gated diode switch. The anode of the GDS is connected to the JFET source electrode and the cathode is connected to terminal B. A series connected photodiode array, represented by PDA, capacitance C, and resistance, R2/ form a parallel circuit with one terminal connected to the gate electrode G 2 of the GDS and the other terminal connected to the gate electrode G j _ of the JFET. A series circuit comprising the connection of the second terminal to the gate electrode is thus formed. If desired, R j / C, and R 2 may be omitted. If R, is omitted. A*, is connected to the drain electrode. The number of photodiodes in the photodiode array is sufficient to produce a voltage upon illumination that exceeds the JFET pinch-off voltage. Resistance 3 is connected between the source and gate electrodes of the JFET. Typical values of C, R 2 and R3 are approximately 0.2μF, 22MΩ , andlMΩ, respectively * . A light source, typically a light emitting diode which is represented by LED, is optically coupled to the PDA. Both the JFET and GDS are optically switched to the OFF state by means of the photodiode array. When the PDA is illuminated by the LED, the JFET is switched to its OFF state and as a result the current through the GDS drops below the PDA current and the current conduction state of both the GDS and the entire device then changes to the OFF state. Both capacitances C 2 and C-, between electrodes G-, and S, and A and G-, respecti ely, are charged and when the LED current is reduced to zero and the PDA illumination ceases, the JFET will revert to the ON state in a time OMPI Λ, WIPO - 8 - interval determined by the time constant of C 2 and R3. Th capacitances may be the internal device capacitances. The GDS remains in the OFF state for a longer time interval which is determined by the time constants of R 2 C and C3 (R 3 +R 2 ) . The voltage between terminals A*-_ and B is applie totally between A and B after the JFET reverts to its ON state. However, if the voltage between A- j _ and B is greate than the breakdown voltage of the JFET, the device operation is somewhat different because the drain-gate junction of the JFET will break down before the current flowing through the gated diode switch is interrupted and the GDS will thus never switch to its OFF state. Another embodiment of an optically switched • device of this invention which can handle large voltages i shown in FIG. 4. This embodiment is similar to that depicted in FIG. 3 and the detailed description of FIG. 3 need not be repeated. Resistances R and R3 in FIG. 3 are equivalent to resistances R3 and R 2 g r respectively, in FIG. 4. A blocking diode, represented schematically by BD ■ ■t , is connected between the drain electrode of the JFET and the gate electrode of the gated diode switch. In this embodiment, when the voltage between terminals A*, and B is large, diode BD^ transfers the voltage at electrode D directly to electrode G 2 and thus drives the potential of electrode G 2 to a very large value with respect to point A The potential difference between electrodes G 2 and A becomes large and may reach a value equal to the breakdown voltage of the JFET. This has the effect of momentarily ' reducing the current through the GDS and thus, upon illumination of PDA, the gated diode switch changes its current conduction state to the OFF state. The switching to the ON state is the same as for the circuit described i FIG. 3. A bilateral embodiment of a device of this invention is shown in FIG. 5. The drain-source channel of JFET1 and GDΞj form a first series circuit between _______ O PI terminals A and B and GDS 2 and the drain-source channel of JFET2 form a second series circuit between terminals A and B. The two series circuits are the same as the series circuits described with respect to FIGS. 3 and 4 but are connected with opposite polarities. A series connected photodiode array, represented by PDA has one terminal connected to electrodes G of GDS-^ and GDS 2 and a second terminal connected to one electrode of blocking diodes BD2 and BD3. The second electrodes of blocking diodes BD2 and BD3 are connected to the gate electrodes of JFET1 and JFET2, respectively. Blocking diodes BD1 and BD4 have one electrode connected to terminals A and B, respectively, and a second electrode connected to the gate electrodes of GDS*^ and GDS-,. The operation of this embodiment upon illumination of the PDA is similar to the operation of the embodiment described in FIGS. 3 and 4. The embodiments described illustrate the invention and modifications will be readily thought of. For example, support 12 might be p-type silicon, gallium arsenide, etc. Further, impurity concentrations, spacings between regions, etc., can be modified to permit different operating voltages and currents. Additionally, the operation of many JFETS is symmetric with respect to source and drain and for such JFETS, these terms are used interchangeably. O PI h IPO

Claims: AMENDED CLAIMS (received by the International Bureau on 21 September 1981 (21.09.81)) 1. (Amended) A GDS switching circuit comprising a gated diode switch (e.g. GDS) having anode, cathode and gate electrodes; the gated diode switch having a conducting state defined by current conduction through an output circuit including the anode and cathode and a non-conducting state defined by no current conduction through the output circuit; and means for changing the state of the gated diode switch comprising a photo- sensitive means C e *g* PDA) coupled to the gate electrode for generating a voltage in response to light impingement CHARACTERIZED IN THAT a switching means (-e.g. JFET) is included in the output circuit for interrupting current flow to the anode; and the photosensitive means actuates the switch¬ ing means so as to interrupt current in the output cir¬ cuit substantially simultaneously with the changing of the gate electrode voltage so as to charge the gated diode switch state from the conducting to the non- conducting state. 2. The switching circuit of claim 1 further CHARACTERIZED IN THAT the switching means comprises a first field effect transistor having drain, gate and source electrodes; the source and drain electrodes are connected in series with the anode of the gated diode switch; and the photosensitive means is a photodiode array coupled to the gate of the field effect transistor. 3. A device as recited in claim 2 further CHARACTERIZED BY a light source, said light source being optically coupled to said photodiode array. 4. A device as recited in claim 2 further CHARACTERIZED BY a first capacitance {[ e . g . C) and a first resistance (e.g. R_) , said capacitance and said resistance being connected to said gate electrodes of said gated diode switch and said field effect transistor,

Inventors: EL HAMAMSY M
Applicants: WESTERN ELECTRIC CO, WESTERN ELECTRIC CO INC
Application year: 1981
Main classification: G02B27
IPC codes: H01L31, H03K17