ELECTRICAL MONITORING SYSTEM

Abstract: An electrical system for uniquely energizing and monitoring the performance of any one of a plurality of electrical components connected in a row and column matrix which can be selectively addressed by a computer controlled address selection subsystem. A microprocessor with an 8-bit output port (25a, 25b) drives a pair of 4 to 16 decoders (26, 27) for selecting individual row and column switches (16-19, 20-23) in the component connection matrix, all of the column switches being connected to ground through a resistor ladder (30), and a window comparator (31) compares the resistor ladder voltage with maximum and minimum voltages to set a single computer input bit (32) as a measure of the performance of any selectively addressed and energized component.

Description: ELECTRICAL MONITORING SYSTEM BACKGROUND OF THE INVENTION This invention relates generally to improvements in electrical monitoring systems and, more particularly, to a new and improved system for determining electrical circuit integrity in complex electronic systems, such as computers, medical instrumentation and the like, whereby a minimum of dedicated electronic hardware can be used to monitor a large number of electrical components. There are many instances where it is desirable to determine whether or not critical components affecting circuit integrity are proper¬ ly operational. Such components may include resistors, diodes, switches, thermisters, opto¬ electronic transducers, the various elements of light emitting displays, which make up complex electronic systems, such as computers, or are critical components in medical instrumentation and the like. Unfortunately, however, the provi¬ sion of appropriate monitoring and evaluation circuitry for a large number of electrical compo- nents has generally required a concomitant allocation of substantial dedicated electronic hardware for this purpose, with attendant high cost and circuit complexity. In this regard, it will be appreciated that, where hundreds or even thousands of electrical components are to be monitored and evaluated, the monitoring and evaluating circuitry can be vast indeed. Hence, those concerned with the develop¬ ment of computers and other electrical instrumen¬ tation have long recognized the need for further improvements in means for monitoring a large number of electrical components within such systems with a minimum of electronic hardware for accomplishing such monitoring functions. The present invention clearly fulfills this need. SUMMARY OF THE INVENTION Briefly, and in general terms, the present invention provides a new and improved el-ectrical system for uniquely energizing and monitoring the performance of any one of a plura¬ lity of electrical components which can be selec¬ tively addressed, and evaluating the integrity of such components rapidly, one at a time, by a single comparator system which provides a measure of the component performance. More particularly, by way of example and not by way of limitation, the invention provides a new and improved electrical system for uniquely energizing and monitoring the performance of any one of a plurality of electrical components connected in a row and column energization and connection matrix which can be selectively addres¬ sed by a computer controlled address selection subsystem or the like, as'by a microprocessor. Typically, a microprocessor with an 8-bit output port drives a pair of 4 to 16 de¬ coders for selecting individual row and column switches in the component connection matrix. All of the row switches are connected to supply a common power source to the selected row, and all of the column switches are connected to ground through a common resistor ladder. A window comparator compares the resistor ladder voltage with maximum and minimum voltages to provide input over a single line, or set a single computer input bit, as a measure of the performance of any selectively addressed and energized component. The new and improved electrical monitor- ing system of the present invention is capable of accurately and reliably monitoring a large number of devices. In this regard, an 8-bit output port can energize and monitor up to 256 devices, and two 8-bit ports can energize and monitor up to 65,536 devices, while still requiring only one feedback bit to test all of the devices. The above and other objects and advan¬ tages of the invention will become apparent from the following more detailed description, when taken in conjunction with the accompanying drawing of an illustrative embodiment. BRIEF DESCRIPTION OF THE DRAWING The sole figure of the drawing is a combined electrical schematic and block diagram of a system for selectively addressing, energizing and monitoring a plurality of electrical compo- nents, in accordance with "the present invention. ^^ DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the drawing, there is shown a new and improved electrical monitoring system, embodying the features of the present invention. While the preferred method and archi¬ tecture of the present invention is illustrated primarily in hardware format for convenience in describing the basic structure and operation of the invention, it is to be understood that this is by way of example only and not by way of limita¬ tion, and the same or equivalent structure and operation may be appropriately implemented in software by a suitably programmed microprocessor or the like, or as a combination of software and hardware, without in any way departing from the spirit and scope of the present invention. As shown in the drawing, a plurality of electrical components to be energized and moni¬ tored, such as the resistors 10, 11, 12, and diodes 13, 14, 15, by way of example, are each electrically connected for unique and selective energization between a single row and single column in a connection array defining a row and column component connection and energization matrix. Each column and each row represents an electrical conductor. Columns 1 through N, and Rows 1 through N are illustrated in the drawing for purposes of description. However, the specific number of rows and number of columns may be varied without departing from the spirit and scope- of the inven¬ tion. Each component is uniquely addres¬ sed, energized and monitored (in a manner to be more fully described hereinafter) by selecting the single row and single column between which that component is uniquely connected. For example, the resistor 10 is connected between Row 1 and Column 1, whereas the resistor 11 is uniquely defined by its address of Row 2, Column 1. Similarly, the diode 15 is addressed by Row 3, Column N, while the diode 14 has as its unique component address, Row N, Column N. Each individual row is selected by activating its corresponding row switch. Accord¬ ingly, switches 16 - 19 control the select- ion of each of Rows 1 - N, respectively. Similar¬ ly, a plurality of switches 20 - 23 may be activa¬ ted, one at a time, to individually select any one of Columns 1 - N, respectively. A computer address selection subsystem, which may be embodied within a microprocessor or the like, is illustrated as having an 8-bit output port, by way of example, for driving a row decoder 26 and a column decoder 27, with four of the output port lines 25a being directed as input to the row decoder, and the other four output port lines 25b being directed as input to the column decoder. Assuming that each row decoder 26 and column decoder 27 is a 4 to 16 line decoder, the pair of decoders can define 256 unique row and column addresses for electrical components. In the drawing, the row decoder 26 selects one of the switches 16 - 19 and the column decoder 27 selects one of" the switches 20 - 23, depending upon the particular component to be addressed in accordance with the instructions from the computer address selection subsystem 25. Once addressed in this manner, the selected component is automatically energized and its circuit integrity or performance is monitored. In this regard, all of the row switches 16 — 19 are adapted to connect their respective rows to a common source of electrical power +V when any individual switch -is activated. Similarly, all of the column switches 20 - 23 are connected to ground through a conventional resistor ladder network 30. Assuming that the diode 13 is the component to be energized and monitored, the computer address selection subsystem 25 will generate the address Row 2, Column 2. Row de¬ coder 26 will activate switch 17 and column decoder 27 will activate switch 21 to complete the circuit from the source +V, through the diode 13, and through the resistor ladder network 30 to ground. The resistor ladder network is simply a resistor string to which the various components being monitored are connected, and different components, depending upon the electrical current they are designed to carry, may be connected to different resistors in the ladder network. The electrical voltage drop across the resistor ladder network 30 is directed as input to a suitable comparator network 31,- which may be a window comparator or the like. The resistor ladder network voltage is "compared with maximum and minimum reference voltages in the comparator network 31 to determine the circuit integrity or performance of the selectively addressed and energized component. The results of such a comparison are then directed over a single line 32 as a performance measure, typically a single computer input bit, to a computer monitoring subsystem 33 which may also typically be embodied in a microprocessor or the like. Hence, it will be apparent in the system described, that a single 8-bit output port can energize and monitor up to 256 electrical components and yet require only a single feedback bit to the monitoring subsystem 33. Similarly, it can be shown that a pair of 8-bit ports can monitor up to 65,536 electrical components and still require only a single feedback bit. Accordingly, the system of the present invention minimizes the quantity of electronic hardware ordinarily required for determining circuit integrity in complex electronic systems, such as computers, medical instrumentation and the like, and vastly increases the number of electri¬ cal components which can be energized and mqnitor- ed by otherwise limited electronic hardware and software. The new and improved electrical monitor¬ ing system is accurate, reliable, and satisfies a long existing need in the electrical arts for such a system. It will be apparent from the foregoing that, while a particular form of the. invention has been illustrated and described, various modifica¬ tions can be made withou-t departing from the spirit and scope of the invention . Accord¬ ingly, it is not intended that the invention be limited, except as by the appended claims.

Claims: CLAIMS I. I n an electrical system for energizing and monitor¬ ing the performance of any individual electrical component from among a plurality of such components, the combination comprising: an electrical component connection and energization matrix comprising a plurality of electrical ly conductive rows and a plurality of electrically conductive columns between which elec¬ trical components are connected, ith a single unique row and col¬ umn address for each component so connected; means for selectively and uniquely addressing and ener¬ gizing indi idual components in sai matrix; means for monitoring the electrical characteristics of the addressed component; and means for comparing the component electrical characteris¬ tics so monitored against a prescribed reference to determine component integrity. 2. A combination as set forth in Claim I, wherein said means for comparing includes means for generating a figure of merit, regarding said component integrity, over a single line. 3. A combination as set forth in Claim 2, wherein said figure of merit is a single bit directed to a computer monitoring subsystem. 4. A method for energizing and monitoring the perfor¬ mance of any individual electrical component from among a plurality of such components, comprising the steps of: assigning unique addresses to said electrical components; addressing each of said components, one at a time; selectively energizing the individual component select¬ ively addressed; monitoring an electrical characteristic of the select¬ ively addressed component; and comparing the monitored electrical characteristic of the selectively addressed component against a reference to determine the integrity of the electrical component which has been select¬ ively addressed and energized. 5. A method as set forth in Claim 4, and including the additional step of: generating a figure of merit representative of com onent inte rit . 6. A method ' as 'set forth in Claim 5, and including the additional step of: directing said figure of merit to a monitoring system. 7. In an electrical system for energizing and monitor¬ ing the performance of any individual electrical component from among a plurality of such components, the combination comprising: an electrical component connection matrix comprising a plurality fo electrically conducti.ve rows and a plurality of electrically conductive columns between which electrical components are connected, with a single unique, row and column address for each component so connected; microprocessor means for. selectively and uniquely address¬ ing individual components in said/matrix; means for energizing the individual electrical components so addressed; means for monitoring the electrical characteristic of the addressed component; means for comparing the component electrical character¬ istics so monitored against a prescribed reference to determine component integrity; means for generating a figure of merit representative of said component integrity; and microprocessor monitoring means for receiving said figure of merit. 8. A combination as set forth in Claim 7, wherein said figure of merit is a single bit directed over a single line to said microprocessor monitoring means. 9. A combination as set forth in Claim 8, wherein said electrical component connection matrix further includes a plurality of row switches and column switches, one switch for each row and one switch for each column, all of said switches being conditioned by said means for selectively addressing com¬ ponents in said matrix. 10. A combination as set forth in Claim 9, wherein all of said row switches are connected to an electrical power source; and all of said column switches are connected through a resistor ladder to ground.

Inventors: DENNY BRADLEY J, KREINICK STEPHEN J
Applicants: IVAC CORP
Application year: 1981
Main classification: G01R31
IPC codes: G01R31