APPARATUS FOR THE COLLECTION OF TELEPHONE CRITERIA FROM ELECTROMECHANICAL EXCHANGE DEVICES

Abstract: The apparatus for the collection of telephone criteria from electromechanical exchange devices is connected to the wires on which criteria are present, through ex­ tracting means (DP) that are completely built up of elec­ tronic components and are apt to extract both positive and negative voltages from a same wire and to supply a local microprocessor (EL) with digitized samples re­ presented by bit patterns independent of fluctuations in time of the exchange voltage used for criteria genera­ tion. A control logic (LC) coordinates the operations of the extracting means with those of microprocessor (EL).

Description: APPARATUS FOR THE COLLECTION OF TELEPHONE CRITERIA FROM ELECTROMECHANICAL EXCHANGE DEVICES Description The present invention concerns an apparatus for the collection of thelephone criteria from electromechanical exchange devices; preferably, but not exclusively, it concerns an apparatus for recording data about outgoing calls on the basis of the criteria picked up at the subscribers' line circuits. Electromechanical exchanges are not arranged to provide the administration with evident information on the sequence of criteria that appear on the various wires of the exchange devices during a connection. The knowledge of such information is necessary for traffic measurements or. for exchange maintenance (including fault detection). In the particular case in which the line circuits are monito red, the knowledge of the number of calls carried out by a subscriber, of the call hour, of the dialled number, and of the number of metering pulses allows the subscriber to be given a documentation of the traffic carried out, that can be useful to both the subscriber and the administration to check charging correctness (e. g. in case of controversy) and allows also a check of the good operation of the electromechanical meters. Apparatuses arranged to collect telephone criteria from electromechanical exchanges and to supply data to be utilized in particular for documentation purposes are already known. An example is described in the paper "Small Size Subscriber Meter Observation Equipment" by T. Mizuno and T. Ohoka, Japan Telecommunications Review, October 1978. Inthisknownequip- ment the means extracting the criteria comprise electromechanical devices (mercury contact relays) for connection to the telephone network: due to the presence of movable devices, the power consumption is relatively high and the apparatus is likely to break down, thereby requiring frequent maintenance. Furthermore the known device can be connected only to subscriber lines, for a single kind of exchange (in particular cross-bar exchanges). These disadvantages are overcome by the present invention of an apparatus that can be connected to any device of any kind of electromechanical exchange (step-by-step exchanges, common control exchanges, etc. ..) by fully electronic components, that present limited consumption and need very limited maintenance. It is a particular object of the present invention an apparatus for telephone-criteria collection from devices of any type of electromechanical exchanges, and more particularly from subscribersJ line circuits for recording data about outgoing calls for documentation and maintenance purposes, comprising means for extracting voltages representing said criteria from said devices, a local processing unit for processing the data represented by said criteria and a local terminal with a printer for displaying the processing results, wherein said extracting means are completely built up of electronic components, arranged to extract from a plurality of wires, relative to one or more devices, criteria that on the same wire can consist of negative and positive voltages, and to supply the processing unit with digitized samples of said criteria, which samples are represented by bit patterns independent of the exchange voltage; wherein said extracting means are interfaced with the local processing unit by a control logic that coordinates the operations of the extracting means and of the local processing unit by establishing the start instants of the sampling and of the digitization on the basis of a command of selection of the wire from which the criteria are to be extracted and of a signal of end of digitization, said command and signal being supplied by the processing unit and the extracting means, respectively, and wherein a miniaturizedand non- volatile mass memory is also provided, associated with the processing unit for the temporary storage of the processed data prior to the printing thereof. The foregoing and other characteristics of the invention will become more apparent from the following description of a preferred embodiment thereof given by way of example and not in a limiting sense and shown in the annexed drawings in which: - Fig. 1 is a schematic block diagram of the invention; - Fig. 2 is a detailed diagram of the data extracting means; - Fig. 3 is the diagram of the control logic and of its connections to the local processing unit; - Figures 4, 5 are examples of the voltage at a line circuit, for out going and incoming calls respectively; - Fig. 6 is a flow-chart of the processing of the signals at said line circuit; - Figures 7, 8, 9, 10 are more detailed flow-charts of some steps of the flow chart of Fig. 6. As shown in Fig. 1 the apparatus according to the inven tionldenoted as a whole by AC, comprises a system PD for extracting data from the exchange, a control logic LC and a local processing unit EL, associated with a local terminal ST and a mass memoryMB. Data extracting system PD is connected to telephone exchange CT via wires lea.. * ln, through which it receives the telephone criteria from a number of devices (e. g. line circuits, first group selectors, etc. ), and via a connection 2, on whose wires there are the values of positive and negative battery of exchange voltage. The term "criterion" is hereinafter used to mean the voltage value present at a given instant on a wire: such value may be both positive and negative, i. e. the signals present on wires 1 are bipolar signals. Data extracting system PD has the tasks of: - adapting the voltage level present on wires la... ln to the values admitted by its circuits; - time division multiplexing on a single wire of the criteria present on n input wires la... ln; - converting the multiplexed bipolar signals into unipolar signals; - converting the analog signals into digital signals. For the bipolar-to-unipolar and the analog-to-digital conversions a reference voltage proportional to the exchange supply voltage present on wires 2 is used. The structure of PD will become more apparent from Fig. 2. Control logic LC, connected on the one side to PD (via connection 6) and on the other side to processing system EL (via connection 8), interfaces these two systems for timing the conversion operations and the transfer of the digitized samples to the processor. The structure of LC will be examined with reference to Fig. 3. The local processing system EL preferably consists of a microprocessor, e. g. the Z 80 microprocessor manufactured by Zilog (Cupertino, Calif., USA) and comprises in a known way a central processing unit, a data memory, a program memory and input-output gates. Processor EL sends to PD through wires 3 the commands for scanning wires la . . ln; it receives from PD through wires 4 the digitized samples and processes them in order to obtain infotmation on the sequence of the criteria that characterize the telephone connection under test. The data processed are temporarily stored in the main processor memory and then, at the end of a connection, they are transferred to a mass memory MB prior to the display on a printer of the local terminal ST. Mass memory MB must have small power dissipation and must be little cumbersome, non-volatile and highly reliable (in particular it must not comprise moving elements) owing to the kind of application and the environmental conditions in which it operates. Memory MB will advantageously be a magnetic bubble memory system, and will comprise, in a known way,a controller that interfaces the bus of the local processing system EL and the actual memory, a functiongen- erator with timing purposes, a coil driver and a sense amplifier. A bubble-memory system suitable for use in the present invention is the one basedonmemory 7110 by Intel Corporation, Santa Clara, Calif., USA; the structure of this system is described in the "Bubble Memory Design Handbook" published by the manufacturer it self. Terminal ST will comprise, in addition to the printer,akey- board for usual man-machine dialogue; more particularly the key-board of ST allows the programming of the measurement cycles for wires .... . in and of the thresholds with which the voltages present on these wires are to be compared for the recognition of the connection phase. Lastly device AC can be connected to a processing unit (CS) of higher hierarchical level through a data line 5, which can be devoted or switched. In Fig. 2, the data extracting system is connected to the exchange wires la... ln through an input network consisting of dividers Pa. . . Pn; each divider is associated with one of the wires and consists of a series resistor R2 and two parallel resistors Ri and R3, for connection to a positive voltage V0 and to ground respectively.rResis- tors R1, R2, R3 are chosen such as to give a pre-determined reduction in the voltage present on the wires)as will be better seen hereinafte r. Furthermore the values of Rl and of voltage V0 must be such that, when a wire .... . on is not connected to a determined voltage (floating wire), such condition can be surely recognized. Divider outputs 10a...10n are connected to the inputs of an analog multiplexer MXI, that is controlled by processorEL(Fig. 1) through wires 3. On output 11 of MX1 an operational amplifier Al in non-inverting connection is inserted. Al, that as known has a high input impedance, must keep pratically constant the impedance as seen from the exchange. on wires .... . on during the cyclical scanning. This is necessary because impedance variation occurring when passing from the connected to the non-connected condition of a wire would result in a voltage variation that, when the tested wires are speech wires, would give a psophometric voltage higher than that allowed. Obviously, the internal resistance of MXI under connection conditions and the gain of Al affect the whole reduction ratio of the voltages present on wires .... . on. E.g., since the typical maximum exchange voltages are + 48 V or + 60 V, the gain of Al can be chosen such that, once the divider resistances have been determined, the voltage on output 12 ofAl is 1/6 of the voltages present on wires la...ln. In this way maximum voltages of the order of 8-10 V can be attained, which are compatible with the circuits downstream of Al. Output 11 of MXl is connected also to a first input (denoted by +) of a comparator CM, of which a second input (denoted by -) is grounded and the output is connected to the select of a two-input analog multiplexer MX2. Owing to the connection of its inputs, CM will supply a signal with high (1) or low (0) logic level, according to whether a positive or negative voltage is present on wire 1 connected at that instant to wire 11. The two inputs of MX2 are connected to the inputs of two amplifiers A2, A3, having the same gain; the first of them, with in verting connection, has its input connected to the exchange negative voltage Vc (-) (wire 2a of connection 2), while the second, in non-inverting connection, has its input connected to the positive exchange voltage Vc (+) (wire Zb). In presence of a negative signal on wire 1 under test, MX2 connects the output of A2 to its output 20, whereas in case of positive signal the output of A3 will be connected to wire 20. The voltage on wire 20 is the reference voltage hereinbefore mentioned; owing to the connection of amplifiers A2, A3 the reference voltage will have always the same sign (in this case a positive sign). The gain of amplifiers A2 and A3 must be such that the reference voltage might be reduced with respect to the exchange voltage by the same reduction ratio introduced by the whole of the input divider, MX1 and Al. Output 12 of Al and output 20 of MX2 are connected to the two inputs of an analog adderS1 whose output, on which bipolar signals are present as will be described hereinafter, is connected to a sample - and - hold circuit SH, followed by an analog-to-digital converter AD. Circuit SH is set to sampling or holding conditions by the signal pie sent on a wire 60, coming from control logic LC. For instance, SH is set to holding condition when that signal is 1. That signal must be sent with a certain delay with respect to the operation of MX1, so as to permit the recognition of the sign of the input voltage and the possible switching of MX2. The way in which the delay is generated will be investigated while describing LC. Preferably SH is realized such that its gain is - 0. 5: value 0. 5 is advantageous for circuit stability purposes and the negative sign is required by the converter as the reference voltage is positive. Converter AD is connected also to MX2 (wire 20), from which it receives the reference voltage, and to control logic LC, from which it receives a "start conversion" command (wire 61) and to which it sends a signal indicating the "conversion end" (wire 62); converter AD supplies on output 4 a bit pattern dependent on the ratio of the volt age supplied by SH to the reference voltage . Obviously the reference voltage, that is proportional to exchange voltage Vc, will undergo the same fluctuations in time as Vc. On the other hand, the criteria characterizing connection development are obtained from the exchange voltage and therefore undergo the same fluctuations, that affect also the input signal of AD. As a consequence, the bit pattern outgoing from AD is independent of said fluctuations, this being an important feature of the invention. This fact can be seen also from a mathematical standpoint In fact, let us denote by: Vi the voltage present on a wire 1 at the measurement instant; V the output voltage of Al; Vc (-) the voltage value on wire 2a at the measurement instant; Vc (+) the voltage value on wire 2b at the measurement instant; Vr the reference voltage (present on wire 20); V1 the output voltage of circuit SH; h the total attenuation caused by the input network, multiplexer MXl and Al; k the absolute value of the gain of A2 or A3 (equal to h). Then output voltage VA of Al is given by: EMI8.1 Voltage Vr depends on the position of multiplexer MX2; in case of negative voltage on wire 11 comparator CM connects wire 20 with the output of amplifier A2, i. e.: EMI8.2 In case of positive voltage on wire 11 comparator CM conects wire 20 with the output of amplifier A3, i. e.: EMI8.3 Atthe output of S1 there will be voltage VA+Vr, and at the output of SH there will be voltages that instant by instant have values: EMI9.1 Value - 1/2 represents the gain of circuit SH. Substituting (1) and (2) or (2') (as the case may be) into ( 3) we obtain: EMI9.2 that2 being k = h, become: EMI9.3 Input voltage V1 depends on the exchange voltage and with good approximation it can be considered proportional to it i. e.: EMI9.4 Substituting (6) and (6') into (5) and (5') respectively) the following relationships can be obtained: EMI9.5 As mentioned, the output signal of AD is proportional to the ratio between the input voltage of the converterandthe reference voltage; then we obtain respectively: EMI10.1 therefore the output signal is independent of the input voltage fluctua tons. Relationships (7) and (7') show that the signals outgoing from S1 are unipolar; in fact the voltage present on a wire can never exceed the supply voltage (that is )t f 1) and therefore AVC (-) > Vc (-) or AVc (+) ¯ Vc (+); in both cases there is always V1 C o. Fig. 3 shows the inputoutput gates PA and PB of the processor, which allowthe dialogwiththe data exctracting system PD (Fig. 1) through connections 3, 4. Gate PA is also connected, through wire 80 of connection 8, to the input of a shift register SR that is controlled by the fundamental clock signal (CK) of the system and receives from PA a "data ready" signal, which indicates the presence of a stabilized signal on wire 3. The output of a cell of SR corresponding to a predetermined number of shift steps is connected through a wire 81 of connection 8 to gate PA to send it a strobe signal: this signal which is necessary to allow a new select signal to be sent to MX1 (Fig. 2), cannot be autonomously generated by MXl, and then is supplied by SR after a time sufficient to ensure the reception of the select signal by MX1. A second output 82 of SR is activated after a further number of shift steps such that the total delay is not lower than the time necessary to ensure that the possible switching of MX2 (Fig. 2) has occurred; output 82 is connected to inverter I1 whose output is connected on the one side to a second inverter I2, whose output is wire 61, and on the other side to the "clear" input of a D-type flip-flop FF. The preset and data inputs of FF are fixedly connected to a logic level "1" and output Q is connected through wire 60 to sample -and-hold circuit SH (Fig. 2). The clock input of FF is connected to wire 62, which is also connected to an input gate PB of the processor for supplying it with the signal denoting the end of analog-to-digital conversion. Circuits SR, FF and inverters I1, I2 form together logic LC. The operation of LC can be easily deduced from the diagram; the arrival al of the ofthe r s ion and signal at flip -flop FF sets a zero onto wire 60, so that logic LC sets sample-and-circuit SH (Fig. 2) into sampling conditions; activation of output 82 of SR sets wires 60, 61 to 1, bringing circuit SH to holding conditions and starting the conversion in AD; the presence of inverter I2 surely prevents the "start conversion" signal from arriving at AD before SH is passed to holding conditions. Register SR has such a length as to ensure that the activation of wires 60, 61 takes place after MX2 has been switched. The general apparatus operation is immediately deduced from what hereinbefore described: the apparatus is connected to wires 1 to be tested and the operator, by means of terminal ST, communicates the processor the information necessary to characterize the various groups of wires. Then the processor commands a cyclical scanning of these wires. The dynamics of the signals extracted from each wire is reduced and the signals are sampled and converted into digital form (e. g. into 8-bit words). At the conversion end the digital signals are then loaded through gate PB into the processor, where they are compared with thresholds previously stored, so as to obtain a single bit indicating whether or not a threshold has been exceeded. The thresholds are determined on the basis of the theoretical voltage levels present on the wires during the various connection steps, i. e. a plurality of different thresholds are possible for each connection; said thresholds will be grouped in the memory according to the kind of exchange, the kind of device and the kind of measurement; the group to be utilized for a measurement will be communicated to the apparatus during the initialization then the individual threshold in a group will be called for by program at suitable instants. The threshold values can be determined "a priori", upon the knowledge of the electrical characteristics of the various exchanges; the thresholds could also be computer.determined in a self-teaching phase, by following the development of one or more standard connections. The single bit obtained from the comparison is integrated to ensure that a voltage change actually corresponds to a criterion change. Now the criterion present on the wire is recognized and the processor can effect the various correlations among the criteria detected on different wires of the same device to recognize the various connection steps. At the end of a connection all relevant data are transferred into mass memory MB, and then, upon operator command, they are displayed on the printer of terminal ST. If required, the data are also sent to higher hierarchy centre CS for further processing. For a better understanding of the apparatus operation, the processing 6f a call outgoing from and of a call incoming to a subscriber's line circuit of an exchange of the SMN-CC type manufactured by Siemens is described; this processing requires the scanning of 4 wires a, b, c, z. The evolution of signals over wires a, b, c is shown in Fig. 4 for an outgoing call and in Fig. 5 for an incoming call; wire z is devoted to metering pulses, that need not be illustrated. More particularly, in idle conditions , wires a and c are at-60 V and wire b is at earth voltage. At the seizure for an outgoing call wire a passes from -60 V to -12V and remains at that value for a certain time (e.g. about 50 ms),. where after it returns to the starting value. While wire a returns to -60 V, wire b passes from earth to -60 V and wire c from - 60 V to earth, Wire c remains in this condition until the release.Wires a and bremain at-60V for a certain time (again about 50 ms), whereafter the calling party is fed and the two wires are brought to two different voltages (e.g. -37V and -23V respectively, in case of subscriber line with negligible impedance); wires a,b keep this value to the beginning of the selection (dial winding), where the same voltage value is present on both wires (shortcircuited wires); the starting conditions (open circuit) and the shorty circuit occur again during the pulses and pauses of the dialled digits, for a time T2 (e.g. 53 to 72.5 ms) and a time T3 (31.5 to 46.5 ms) respectively. At the end of a digitJafter a brief short circuit (about 50 ms), the supply values are present until the release (not represented) when the initial conditions are stored. For an incoming call, at the seizure,voltage on wire c passes from -60 V to about - 3. 7 V, and remains in these conditions until the handset is again on hook; after a certain time (30 to 40 ms), the ringing current is sent ontowireaand there is a voltage whose envelope is represented in the drawing (voltage of + 25 V and - 145 V for 1000msandvoltage of -60V for about 4000 ms). When the called party answers, wires a and b attain the supply voltage and remain in this condition until the handset is again on-hook. The flow-chart in Fig. 6 shows the processing of these calls according to the Specification-Description-Language (SDL) recommended by CCITT. According to this language, the ovals represent system states; the small flags with ingoing or outgoing arrow denote received or emitted signals,respectively, the vertical bar distinguishing between signals originated in or directed to the system and signals generated outside or directed to the outside; the rectangles denote operations to be accomplished; the arrival of the signals on one of the wires is denoted by the symbol of the wire itself in the various flags. The flow chart relates to a single subscriber; in case of more subscribers the operations are carried out in the same way in time-sharing. Then in idle condition a voltage variation on one of the wires is waited for; if the variation first occurs on wire c, the call is an incoming call and the information that the subscriber has received a call is printed by ST; then the return of wire c to initial conditions is waited for ("wait for c" state), and when this occurs the idle condition is recovered. If metering pulses are detected (flag z), the occurrence of an unexpected metering (because the call is an incoming call) is printed out and the "wait for c" condition is recovered. The printing occurs also when the variation first occurs on wire z and generally whenever anomalous metering pulses arrive (e. g. before the selection, before seizure for an outgoing call, etc. ). Should the variation first occur on wire b (case unexpected for both incoming and outgoing calls) the anomaly-is printed and the system is brought to an error state (ERROR1) where it remains till the anomalous condition disappears. If finally the variation first occurs on wire a a time metering is started (start T1) and the variation on wire c (Fig. 4) is waited for. If the time elapses before voltage change on wire c the anomaly is printed and an error state is attained (ERROR 2). If on the contrary the voltage on wire c varies as requiredithe time metering is stopped, the selection is waited for ("wait for digit" state) and when the first digit arrives it is stored. If release (c) takes place before the arrival of the first digit there is return to idle condition. After the arrival of the first digit the "wait for next digit" state is attained, and the whole process is repeated to the arrival of the last digit. After the arrival of the first dialled digit all the metering pulses present on wire z are taken to be valid and are memorized. If by chance after one of the dialled digits there is the release, the data relating to the call are stored in MB and then printed; the system returns to idle condition. The arrival of the first metering pulse brings the system to a "conversation" condition, in which further metering pulses and the release are waited for. Each metering pulse is stored, as mentioned, and then the "conversation" state is recovered until the release, that causes the storage of the call data in MB and the return to idle conditions. If during the conversation dialling pulses are detected ("next digit"), the recognized digit is memorized with the error indication; also in this case there is return to "conversation" state. With the same symbols, Figs. 7, 8, 9 show the recognition of the "first digit", of the "next digits" and of "post.selection digits" (denoting by "post selection" the dialling digits detected during the conversation). In these Figures, symbols I, I denote the beginning and the end of the pulse in a dialling digit, whose recognition is depicted in Fig. 10. In Fig. 7, starting from the "wait for the first digit" state, a time metering is started (start T2) and the pulse end is waited for (wait for I); if the time elapses before the pulse end and there is no release, the anomaly is printed ; if the subscriber releases there is return to idle condition and if a metering pulse arrives, this fact is printed. If on the contrary the pulse end regularly occurs before the time has elapsed, the time metering in progress is stopped, another one is started for pause recognition and there is passage to "wait for end of the first digit" state. If the time elapses while the system is in that state, the pause is an interdigital pause, that is the dialled digit was 1 (one pulse and one pause); the digit is memorized and the next digit is waited for. If on the contrary another pulse arrives, time metering is stopped, the pulse is counted and the procedure followed for the first pulse is repeated until the digit end. The arrival of signals c and z starts the operations hereinbefore described, with the exception that after the print-out of "unexpected metering" there is passage to the "wait for end of the first digit" state. The same procedure is followed for the subsequent digits. However, as metering pulses arriving after the first digit are considered to be valid, the arrival of a metering pulse before the end of the pulse of the dialled digit is signalled, without the indication "unexpected", and the metering pulse is memorized. Besides, in case of release, the digits are memorized into mass memory. In case of post-selection, the procedure is analogous to the one used for the digits following the first, with the only difference that at the pause end the recognized digit is memorized and the "conversation" state is recovered. In Fig. 10, references A, B, ( , B) denote "positive" or respectively "negative" transitions of the signals present on wires a b (denoting by "positive", with reference to Fig. 4, the passage of voltage from about - 30 V to - 60 V on wire a and from - 30 V to earth on wire b and by negative the inverse transitions, that correspond to the beginning and respectively the end of a pulse of a dialled digit). Therefore in the wait for pulse beginning("wait for I") state that can make part of anyone of the "wait for digit" states of Fig ures 7, 8, 9 a positive variation on one of the two wires is waited for; as soon as the variation is detected a time metering is started (start T4) while waiting for a variation on the other wire, required in order that a dialling pulse can be recognized. In case this second variation occurs before the time elapses, a '-'pulse beginning" signal is generated, the time metering is stopped and the pulse end is waited for (passage to the "wait for I" state); this state is also directly reached from the state in which the variation on the second wire is waited for, if the time elapses before the voltage variation occurs. The described steps are identically repeated for the negative variations; upon recognition of the pulse end, there is again a passage to a "wait for I" state to process the next pulse. From what hereinbefore described the advantages of the present invention with respect to prior art can be easily deduced. First the possibility of detecting both positive and negative voltages over the same wire and the use of stored program processing units with determination of the threshold by a self-teaching process makes the device universal, in the sense that it can be connected to different devices of any kind of exchange and can make a plurality of measurements beside the processing of outgoing calls (e. g. supervision of a subscriber for long periods, traffic intensity measurement, etc...). Besides, the circuits forming the device are mounted on two printed circuit boards of the size known as "double Europe standard" (one board for the data extracting means, the control logic and the microprocessor, including the interfaces to the printer and the higher hierarchy centre, and one for the mass memory), so that the device is easily portable. From this viewpoint the use of a magnetic bubble system as mass memory is justified as it offers high storage capacity with limited encumbrance. Besides, the presence of a mass memory in addition to main memory of the processor allows long records for a plurality of subscribers without data losses even in case of interruption of printer operation.

Claims: Patent Claims 1. Apparatus for telephone-criteria collection from devices of any type of electromechanichal exchanges, and more particularly from subscribers' line circuits for recording data about outgoing calls for documentation and maintenance purposes, comprising means for extracting from said devices voltages representing said criteria, a local processing unit for processing the data re presented by said criteria and a local terminal with a print er for displaying the processing results,characterized in thatsaid extracting means (PD) are completely built up of electronic com ponents, arranged to extract from a plurality of wires, relative to one or more devices1 criteria that on the same wire can consist of negative and positive voltages, and to supply the processing unit with digitized samples of said criteria, which samples are represented by bit patterns independent of fluctuations in time of the exchange voltage; in that said extracting means are inter faced with the local processing unit by a control logic (LC) that coordinates the operations of the extracting means (PD) and of the local processing unit (EL) by establishing the start instant of the sampling and of the digitization on the basis of a command of selec tion of the wire from which the criteria are to be extracted and of a signal of end of digitization, said command and signal being sup plied by the processing unit (EL) and the extracting means (PD) respectively; and in that a miniaturized and non-volatile mass memory'(MB) is also provided, associated to the processing unit for temporarily storing the processed data prior to printing. 2. Apparatus according to claim 1, characterized in that said data extracting means (PD) comprise: - an input network for connection to the exchange wires (la.. . ln), comprising,for each wire, a voltage divider (Pa. . . Pn) formed by a resistor (R2) in series to the wire and two resistors (R1, R3) in parallel to the wire towards a positive voltage or towards ground respectively; - a first analog multiplexer (MX1) having a plurality of inputs con nected each to the output (10a...10n) of one of said dividers (Pa. .. Pn) and only one output (11), and receiving from said local processor (EL) the command signals necessary to cycli cally connect said inputs with the output; - a first operational amplifier (awl), inserted in noninverting con nection on the output of said multiplexer (MX1) to keep constant the impedance seen from the exchange at an input ....... 10n) of said multiplexer both when that input is connected to the output and in the opposite case, the gain of said amplifier being such that, taking into account the input divider and the internal re sistance of the multiplexer (MX1) under connection conditions, the value of the amplifier output voltage is a pre-determined fraction of the voltage present on the scanned wire (la... ln); ; - an analog adder (S1), that has a first input connected to the out put of said first amplifier and receives at a second input a ref erence voltage of constant sign, proportional to the exchange voltage; - a sample-and-hold circuit (SH) that is connected is series to the output of said adder (S1) and to the control logic (LC) and is set to the sample or respectively hold conditions depending on the logic value of a signal supplied by said control logic; ; - an analog-to-digital converter (AD), that is connected to the sample-and-hold circuit (SH) and to the control logic LC from which it receives the "start conversion" command and to which it signals the conversion end, said converter supplying1 at the output a bit pattern dependent on the ratio of the voltage value of the sample supplied by sample and hold circuit (SH) to the reference voltage. 3. Apparatus according to claim 2, characterized in that the refer ence voltage is present at the output of a second analog multiplex er (MXZ) having two inputs connected respectively to the outputs of a second operational amplifier (A2), in inverting connection, and of a third operational amplifier (A3), in noninverting connection, the inputs of said amplifiers being connected to the sources of the negative and respectively the positive exchange voltage; and in that said multiplexer (MX2) has a control input connected to the output of a comparator (CM), whose non-inverting input is connected to the output (11) of the first multiplexer (MX1 ) and who s e inverting in- put is grounded, and connects its output (20) to the output of the second amplifier (A2) when the comparator (CM) detects the pres ence of a negative voltage on the output of the first multiplexer (MX1), and to the output of the third amplifier when the compa rator (CM) detects the presence of positive voltage on the output of the first multiplexer (MX1). 4. Apparatus according to claims 2, 3 characterized in that said sec ond and third amplifiers (A2, A3) have such gains that the refer ence voltage is reduced with respect to theexchangevoltage in the same ratio of the output voltage of the first amplifier (Al) to the input voltage to one of said dividers (Pa.. Pn). 5. Apparatus according to claim 2, characterized in that said adder (S1) and said sample-and-hold circuit cooperate so as to give at the output of the latter unipolar signals, opposite in sign to the re ference voltage. 6. Apparatus according to any one of the previous claims, charact erized in that said control logic comprises a shift register (SR) that has an input connected to an output gate (PA) of the processor, from which the register receives a signal indicating the presence of a select command for said first multiplexer (MX1), a first output connected to said gate (PA) and activated after a first number of shift steps such as to ensure the occured reception of the command by said first multiplexer and a second output that is activated after a second predetermined number of shift steps, high er than the first, and is connected on one side to said analog-to -digital converter (AD) to start the conversion operation, and on the other side to a flip-flop of which an output is connected to said sample-and-hold circuit (SH) to establish the alternance between sample and hold operations, said second number of shift steps being such that the delay in sending the "hold" and "start conver sion" signals with respect to sending the select command of the the first multiplexer (MX1) is longer than the time taken for the possible swithing of said second multiplexer (MX2), the switching of said flip-flop being caused by the "conversion end" signal emit ted by said converter. 7. Apparatus according to claim 1, characterized in that said proces sing unit is a microprocessor capable of recognizing the various criteria by comparing the values of the respective digitized samples with suitable thresholds dependent on the telephone exchange and on the device to which the apparatus is connected and typical for each criterion, said thresholds being determined by the processor itsel by means of a self-teaching process by following the evolution of one or more standard connections. 8. Apparatus according to claim 2, characterized in that said mass memory system (MB) is a magnetic-bubble system.

Inventors: ASTEGIANO, LUCIANO, ROSBOCH, LUCIANO
Applicants: CSELT CENTRO STUDI E LABORATORI TELECOMUNICAZIONI S.P.A.
Application year: 1981
Main classification: H04M15
IPC codes: H04M15