SEMICONDUCTOR DEVICE COMPRISING A BONDING PAD

Abstract: A semiconductor device, wherein an alloy wire (33) is mounted on the surface of a semiconductor substrate (31) carrying semiconductor element with a first densely formed electric insulation layer (32) interposed between said alloy wire and semiconductor substrate surface; after forming a second insulation layer (34) in the prescribed positions, a pure aluminium electrode (35) is deposited, one part of which is connected to said alloy wire (33) and the other part of which is attached to said first densely formed electric insulation layer (32), thereby constituting a wire bonding pad; and finally heat treatment is carried out to effect an ohmic contact between the aluminium electrode (35) and the alloy wire (33).

Description: Semiconductor device This invention relates to a semiconductor device, and more particularly to the structure of a bonding pad used for the manufacture of a semiconductor device. A semiconductor device manufactured by arranging a large number of semiconductor elements in the form of an integrated or large scale integrated circuit is widely marketed. In this case, the chip of the body of a semiconductor device on which a large number of semiconductor elements are integrated is fitted to, for example, the chip-carrying plane of a lead frame. The chip is bonded with external leads, for example, by a gold wire (wire bonding). The lead frame is cut off, after the semiconductor device is sealed in resin. A large number of external leads 1 (Fig. 1) are made to protrude from a molded resin block 2. Thus a customary semiconductor device is marketed in the form of a package as illustrated in Fig. 1. The reliability of a semiconductor device thus manufactured is governed not only by the quality of the chip but also by the process of bonding the chip with the external leads. The customary wire bonding process is to thermally deposit a very fine gold wire having a diameter of about 25 microns under pressure across the chip and external leads. With the integrated circuit, a mechanically strong nail head bonding process is applied. Further utilized is another form of bonding process known as the U.S. bonding process which is to deposit an aluminium wire while applying ultrasonic vibrations. In recent years, an aluminium alloy containing, for example, several percents of silicon or copper has come to be accepted in place of the conventional pure aluminium wire as a metal wire electrode for connecting semiconductor elements with each other integrated on a semiconductor chip. With a vertical type transistor, an emitter region is diffused with a small depth. Where a metal electrode set on the emitter region is made of pure aluminium, then silicon lying below said electrode is absorbed into the aluminium during heat treatment, sometimes giving rise to short-circuiting between the emitter and base regions of the transistor. Application of an aluminium-silicon alloy is useful to suppress the occurrence of the above-mentioned event. This aluminium-silicon alloy is also effective not only to ensure improvement on the machining precision of a metal wire but also to prevent the formation of protuberances on a metal wire generally referred to as "hillocks". On the other hand, an aluminium-copper alloy is effective not only to prevent the breakage of a wire resulting from electromigration (heat buildup caused by the flow of electrons) which often raises problems in the minute machining of a wire and the application of a large current element but also to improve the moisture proofness of a wire. However, it has been found that addition of an impurity displaying the above-mentioned excellent effect to an aluminium wire is not always preferred for improvement on the reliability of the aforesaid wire bonding process. In other words, it has been disclosed that where a wire bonding pad is formed of an aluminium alloy, the adhesivity of the bonded portion of a semiconductor device noticeably decreases, unlike the case where the bonding pad is formed of pure aluminium, thereby reducing the reliability of wire bonding. For elimination of the above-mentioned drawbacks accompanying an aluminium alloy, various attempts have been made to construct a bonding pad by depositing a pure aluminium layer on an aluminium alloy layer. However, none of these attempts have proved satisfactory. Figs. 2a, 2b, 3a and 3b illustrate the structure of the previously attempted bonding pad sections of a semiconductor device. With the wire bonding pad shown in Figs. 2A and 2b, an aluminium alloy wire 5 is deposited on a semiconductor substrate 3 whose surface is covered with a thermally oxidized layer 4 in order to connect integrated semiconductor elements (not shown) with each other. An electric insulation protective layer 6 is mounted on said aluminium alloy wire 5 in the prescribed positions. A pure aluminium electrode 7 is deposited on the exposed portion 8 (indicated in broken line in Fig. 2b) of said aluminium alloy wire 5 and those portions of the electric insulation protective layer 6 which surround the exposed portion 8 of the aluminium alloy wire 5. The above-mentioned prior art process is used to provide a bonding pad 7A. With the aforesaid construction of a bonding pad, it is necessary to undertake heat treatment called sintering in order to effect an ohmic contact between the aluminium alloy wire 5 and pure aluminium electrode 7. During the sintering process which is carried out at a temperature of 400 to 5300C, an additive of silicon or copper contained in the aluminium alloy wire 5 quickly migrates into the pure aluminium electrode 7, and is concentrated with an abnormally high density on the surface of the pure aluminium electrode 7. This event leads, as previously described, to a decline in bonding adhesivity, a reduction in the yield of a semiconductor device due to unsatisfactory bonding, and eventually a decrease in the reliable performance of the semiconductor device. The prior art bonding pad manufacturing process (Figs. 3a and 3b) comprises the steps of depositing an aluminium alloy wire 5 on a semiconductor substrate 3 whose surface is covered with a thermally oxidized layer 4 to connect integrated semiconductor elements (not shown) with each other; mounting an electric insulation protective layer 6 on the aluminium alloy wire 5 in the prescribed positions; forming a pure aluminium electrode 7 not only on the exposed portion 8 of the aluminium alloy wire 5 (indicated in a broken line in Fig. 3b) but also on that part of the electric insulation protective layer 6 which is apart from said exposed portion 8 of the aluminium alloy wire 5. That portion 7A of the pure aluminium electrode 7 which is deposited on that part of the electric insulation protective layer 6 which lies apart from said exposed portion 8 of the aluminium alloy wire 5 is used as a bonding pad. With the prior art bonding pad manufacturing process (Figs. 3a and 3b), sintering causes an additive of silicon or copper contained in the aluminium alloy wire 5 to migrate into the pure aluminium electrode 7 in the junction between said aluminium alloy wire 5 and pure aluminium electrode 7. However, the bonding pad region 7A which contacts the electric insulation protective layer 6 is saved from the intrusion of the above-mentioned additive of silicon or copper. However, the electric insulation protective layer 6 which is usually deposited at a lower temperature than 4000C in a soft state acts as a buffering means and objectionably absorbs the bonding energy to render the bonding process unreliable. This invention has been accomplished in view of the above-mentioned circumstances, and is intended to provide a semiconductor device in which the semiconductor elements and external leads are bonded together with greater adhesivity than has been possible in the past. To this end, the present invention provides a semiconductor device comprising: a semiconductor substrate on whose surface at least one semiconductor element is deposited; a first electric insulation layer at least partially covering the main surface of the semiconductor substrate; a first alloy wire deposited on the first electric insulation layer in the prescribed position to be brought into contact with the semiconductor element; a second insulation layer deposited to at least partially cover said first alloy wire and first electric insulation layer; and a second wire contacted with the first alloy wire; which is characterized in that the second wire is at least partially contacted with the first alloy wire through an opening formed in the second insulation layer and also with the first electric insulation layer, thereby constituting a bonding pad. This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 is an oblique view of a prior art resion package semiconductor device; Fig. 2a is a sectional view on line Ila-Ila of Fig. 2b indicating a bonding pad section for the external leads of a prior art semiconductor device; Fig. 2b is a plan view of the upper portion of Fig. 2a; Fig. 3a is a sectional view on line IIIa-IIIa of Fig. 3b illustrating another form of a bonding pad section for the external leads of the prior art semiconductor device; Fig. 3b is a plan view of the upper portion of Fig. 3a; Fig. 4a is a sectional view on line IVa-IVa of Fig. 4b showing a bonding pad section for the external leads of a semiconductor device according to one embodiment of this invention; ; Fig. 4b is a plan view of the upper portion of Fig. 4a; Fig. 5 is a plan view of a bonding pad section for the external leads of a semiconductor device according to another embodiment of this invention; Fig. 6a is a sectional view on line VIa-VIa of Fig. 6b showing a bonding pad section for the external leads of a semiconductor device according to still another embodiment of the invention; and Fig. 6b is a plan view of the upper portion of Fig. 6a. There will now be described by reference to the appended drawings a semiconductor device embodying this invention. Referring to Figs. 4a and 4b, reference numeral 31 denotes a semiconductor substrate on which semiconductor elements (not shown) are integrated. For example, a first electric insulation layer formed of a thermally oxidized layer 32 is deposited on the main surface of said semiconductor substrate 31. Mounted on part of the surface of the first electric insulation layer 32 is a first alloy wire 33 such as an aluminium alloy wire containing at least one of the group consisting of silicon, copper, palladium, molybdenum and titanium or a polysilicon alloy wire containing any other metal than silicon to connect together the semiconductor elements (not shown) integrated on the semiconductor substrate 31. Deposited, for example, by sputtering at a low temperature in the proper portions of the surfaces of the first alloy wire 33 and first electric insulation layer 32 is a second electric insulation layer 34 formed of an inorganic material such as a metal oxide or an organic material such as polyimide or fluorine resin in such a manner that an opening is formed in at least one portion of said second electric insulation layer 34 to alloy for the formation of an electrode for a bonding pad. Formed in said opening is a pure aluminium electrode 35, one part of which contacts the first electric insulation layer 32, and the other part of which contacts the first alloy wire 33. With the above-mentioned construction, a bonding pad is constituted by that portion 35A of the pure aluminium electrode 35 which contacts the first electric insulation layer 32. Where sintering is applied to effect ohmic connection between the pure aluminium electrode 35 and first alloy wire 33, an additive, for example, silicon or copper contained in the first alloy wire 33 migrates into the pure aluminium electrode 35 at a junction 36 between said pure aluminium wire 35 and first alloy wire 33. In this case, however, a region 37 (indicated in broken lines in Fig. 4b) lying under the bonding pad 35A contacts the first insulation layer 32, thereby preventing an additive such as silicon or copper frame being carried from the first alloy wire 33 into said bonding pad 35A. The first electric insulation layer 32 may be formed of a thermally oxidized layer produced during the integration of semiconductor elements (not shown) on the semiconductor substrate 31, or a layer of, for example, SiN or SiO2 which is deposited by the chemical vapor deposition process and later heat treated at a high temperature. In either case, the first electric insulation layer 32 is found to have a dense struction. During the wire bonding operation, therefore, the first electric insulation layer 32 does not substantially take a buffer action, enabling wire bonding to be carried out with a sufficiently high degree of adhesivity. With a semiconductor device according to a second embodiment of this invention (Fig. 5), a junction between the first alloy wire 33 and pure aluminium electrode 35 is enlarged into an inverted "L" shape as seen from a broken line section 36a. The second embodiment of Fig. 5 is little different from the first embodiment of Figs. 4a and 4b in other respects. The sectional view on line IVa'-IVa' of Fig. 5 is substantially the same as that of Fig. 4a. Therefore, the description of Figs. 4a and 4b also applies to the second embodiment of Fig. 5. In other words, an additive such as silicon or copper contained in the first alloy wire 33 does not migrate into the bonding pad 35A, thereby enabling wire bonding to be carried out with a sufficiently high degree of adhesivity. There will now be described by reference to Figs. 6a and 6b a semiconductor device according to a third embodiment of this invention. A first alloy wire 43 is mounted on a semiconductor substrate 41 whose main surface is covered with a thermally oxidized layer. A second electric insulation layer 44 is deposited on said first alloy wire 43 in such a manner that the portion 46 of the first alloy wire 43 and the portion 47 of the first electric insulation layer 42 are exposed. A second pure aluminium wire 45 is stretched between and over the exposed portions 46, 47. Further, the second pure aluminium wire 45 may be provided by vacuum depositing a layer of pure aluminium all over the underlying surface after the formation of the above-mentioned exposed portions or openings 46, 47 and later patterning said aluminium layer by photoetching. Where the second electric insulation layer 44 is formed of SiO2 by the so-called chemical vapor deposition (CVD) process, then it is necessary to provide an opening by selectively etching off only the second electric insulation layer 44. An SiO2 layer formed by the CVD process has a lower density than the thermally oxidized layer of SiO2. Therefore, the CVD-processed SiO2 layer alone can be selectively removed by utilizing the high etching speed at which said CVD-processed SiO2 layer is etched by a hydrofluoric acid. Where sintering is carried out to effect an ohmic contact between the first alloy wire 43 and second pure aluminium wire 45, then the additive of the first alloy wire 43 tends to migrate into the second pure aluminium wire 43 at the junction 46 between both wires 43, 45. However, a region under the bonding pad 45A contacts the first insulation layer 45, and suppresses said migration, thereby preventing a decline in the adhesivity of wire bonding. Even where the first alloy wire contains silicon or copper, this invention prevents the bonding adhesivity from being reduced, and consequently can manufacture a semiconductor device with high reliability and yield. The foregoing embodiments refer to the case where a second wire for the formation of a bonding pad was made of pure aluminium. However, the material of the second wire need not be limited to pure aluminium. Instead, gold can obviously be applied as the material of the second wire.

Claims: Claims: 1. A semiconductor device comprising: a semiconductor substrate (31) on which at least one semiconductor element is formed; a first insulation layer (32) deposited at least partly on the main surface of the semiconductor substrate (31); a first alloy wire (33) contacting the semiconductor element disposed on the first insulation layer (32); a second insulation layer (34) mounted at least partly on the first alloy wire (33) and first insulation layer (32), and a second wire (35) contacted with the first alloy wire (33); which is characterized in that the second wire (35) is at least partially contacted with the first alloy wire (33) through openings formed in the second insulation layer (34), and also with the first insulation layer (32) to constitute a bonding pad (35A). 2. The semiconductor device according to claim 1, wherein the first insulation layer (32) is a thermally oxidized layer produced during the manufacture of a semiconductor. 3. The semiconductor device according to claim 1, wherein the first insulation layer (32) is a layer of SiN or SiO2 deposited by the chemical vapor deposition process and later heat treated at high temperature. 4. The semiconductor device according to claim 1, wherein the first alloy wire (33) is formed of an aluminium alloy containing at least one metal selected from the group consisting of silicon, copper, palladium, titanium and molybdenum. 5. The semiconductor device according to claim 1, wherein the first alloy wire (33) is formed of polysilicon containing any other metal than silicon. 6. The semiconductor device according to claim 1, wherein the second insulation layer (34) is formed of an organic electric insulation material. 7. The semiconductor device according to claim 1, wherein the second insulation layer (34) is formed of an inorganic electric insulation material. 8. The semiconductor device according to claim 1, 2, 3, 4, 5 or 6, wherein the second wire (35) is formed of pure aluminium heat-treated for an ohmic contact between said second wire (35) and the first wire (33).

Inventors: FUJITA, KATSUJI, KOMATSU, SHIGERU
Applicants: KABUSHIKI KAISHA TOSHIBA
Application year: 1980
Main classification: H01L23
IPC codes: H01L29, H01L23, H01L21