AMPLIFIER DEVICE

Abstract: An input signal (v i ) supplied to an input terminal (10) is transmitted to a bias circuit (50) through a differentiating amplifier circuit (20) and current mirror circuit (40). In the rear stage of the bias circuit (50), first and second single ended push-pull (SEPP) circuit components (60,70) are connected in parallel between a power source (+V) and earth. The first SEPP circuit component (60) is formed of a pair of transistors (61, 62). The second SEPP circuit component (70) is formed of a pair of transistors (71, 72). An output signal from the junction (63) of the emitters of the transistors (61, 62) of the first SEPP circuit component (60) is negatively fed back to the differential amplifier through a resistor (26). The junction (73) of the emit­ ters of the transistors (71, 72) of the second SEPP circuit component (70) is connected to the output terminal (80) of the amplifier device. A constant voltage (V B ) is supplied from a constant voltage source (831 to the output terminal (80) of the amplifier device through resistors (81, 82). A series circuit formed of a constant-current source (100) and muting switch (102) is connected between a power source (+V) and a power supply circuit (30) for supplying power to the differential amplifier (20) and current mirror circuit (40). Where the muting switch (102) is opened, then the power supply circuit (30) is rendered nonconducting, preventing an input signal (v i ) from being supplied to the bias circuit (50). As a result, the SEPP circuit components (60, 70) are unactuated to attenuate an output signal from the output terminal (80).

Description: Amplifier device This invention relates to an amplifier device, and more particularly to an amplifier device having a function of muting, if necessary, signals sent forth from an output terminal. An amplifier device electrically amplifying a sound signal generally comprises a muting circuit provided with a field effect transistor (abbreviated as "FET") in order to attenuate signals produced from an amplifier output terminal without cutting off a power supply switch. This muting circuit is formed of the FET and a capacitor connected in series between an amplifier input terminal and a grounding terminal. The gate of the FET is connected to a terminal supplied with a mutinginstructing signal (hereinafter referred to as "muting signal terminal") through a muting switch. Where the muting switch is closed and the FET gate is supplied with a muting-instructing signal (hereinafter referred to as "muting signal"), then the FET is rendered conducting. As a result, signals are prevented from being generated from the amplifier output terminal. One reason why the FET is applied is that this type of transistor shows a bidirectional characteristic between the source and drain regions and can be rendered conducting even with respect to signal components having both positive and negative polarities. Another reason for the acceptance of the FET is that it has a far higher linearity of characteristic than the ordinary transistor for use as a variable resistor. In some cases, the FET is connected in series to the input side of the amplifier. However, the conventional amplifier using the FET presents difficulties in being assembled with the muting circuit in a single integrated circuit. Further drawback of the conventional amplifier is that since the amplifier itself is always rendered conducting regardless of whether themuting circuit its or is not actuated, switching noises arising when the FET switch is closed are transmitted to the output terminal of the amplifier device. It is accordingly the object of this invention to provide an amplifier device, which can carry out muting without using the FET switch to suppress the transient occurrence of switching noises during the muting mode, and can be easily assembled with a muting circuit in a single integrated circuit According to this invention, therefore, the amplifier having a single ended push-pull circuit (abbreviated as "SEPP circuit") connected to a bias circuit is additionally provided with muting means for attenuating signals delivered from the SEPP circuit and control means for actuating the muting means for a prescribed length of time. This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 shows the circuit arrangement of an amplifier device according to a first embodiment of this invention which has a muting function; Fig. 2 indicates the circuit arrangement of an amplifier device according to a second embodiment of the invention which also has a muting function; Fig. 3 sets forth the circuit arrangement of an amplifier device according to a third embodiment of the invention which is additionally provided with a muting control circuit; and Figs. 4A to 4G are timing charts illustrating the operation of the muting control circuit of Fig. 3. With an amplifier device according to the first embodiment of this invention shown in Fig. 1, an input signal vi supplied to an input terminal 10 is conducted through a resistor 11 to the base of a transistor 21 which serves as an inverting input of a differential amplifier circuit 20. A reference supply 24 is connected to the base of a transistor 22 which serves as a non-inverting input of the differential amplifier circuit 20. The junction of the emitters of the transistors 21, 22 is grounded through the collectoremitter circuit of a constant-current supply transistor 32 constituting part of a power supply circuit 30. The collector of the transistor 22 which serves as an output of the differential amplifier circuit 20 is connected to the input terminal of a current mirror circuit 40 which is formed of transistors 41, 42. The output terminal of the current mirror circuit 40 is connected to a bias circuit 50. The emitters of the transistors 41, 42 are connected to a power source +V through the corresponding resistors 44, 46. The bias circuit 50 is formed of a pair of transistors 51, 52 which are complementary to each other and are diode-connected (that is, connected in series in terms of D.C.). The base and collector of the transistor 51 are connected together. The junction 53 of the base and collector is connected to the output terminal of the current mirror circuit 40, or the collector of the transistor 42. The junction 53 is connected to the base of a transistor 61 constituting a first SEPP circuit component 60 and the base of another transistor 71 constituting a second SEPP circuit component 70. The base and collector of the remaining transistor 52 of the bias circuit 50 are similarly connected together. The junction 54 of the base and collector is grounded through another constantc.urrent supply transistor 33 of the power supply circuit 3Qq The junction 54 is further connected to the bas of the remaining transistor 62, a constituent of the first SEPP circuit component 60 and the base of the remaining transistor 72, a constituent of the second- SEPP circuit component 70. A pair of diode-connected complementary transistors 61, 62 are connected between the power source +V and earth to constitute the first SEPP circuit component 60. The remaining paired diode-connected complementary transistors 71, 72 are similarly connected between the power source +7 and earth to constitute the second SEPP circuit component 70. The junctiOn 63, for example, of the emitters of the transistors 61, 62 constituting the first SEPP circuit component 60 is connected to the base of the transistor 21 of the differential amplifier circuit 20 through a negative feedback resistor 26. The junction 63 acts as an output for signals sent forth from the first SE. P circuit component 60. The junction 73 of the emitters of the transistors 71, 72 constituting the second SEPp circuit. component 70 is connected to an output terminal 80 of an amplifier device, from which a signal vq is generated. The junction 73 is further connected to the positive pole of a voltage source 83 generating D.C. voltage VB through resistors 81, 82. The negative pole of the voltage source 83 is grounded. The junction 90 of the resistors 81, 82 is grounded through a capacitor 91. A series circuit consisting of a constant-current source 100, muting switch 102 and a transistor 31 constituting a power supply circuit 30 is connected between the power source +V and earth. The constant-current source 100 supplies bias current to the transistors 32, 33 constituting the power source circuit 30. One of the contacts of the muting switch 102 is connected to the constant-current source 100, and the other contact of the muting switch 102 is connected to the collector and emitter of the transistor 31 and also to the bases of the transistors 32, 33. The emitter of the transistor 31 is grounded. Where, with an amplifier device according to a first embodiment of this invention shown in Fig. 1, the muting switch 102 is closed, then an input signal vi supplied to the input terminal 10 is amplified by the input stage differential amplifier circuit 20. An output signal from the differential amplifier circuit 20 has its phase inverted by the current mirror circuit 40. The phase-inverted signal is later conducted to the bias circuit 50. A current having the same amperage as the current flowing through the paired transistors 51, 52 constituting the bias circuit 50 flows to the paired transistors 61, 62 constituting the first SEPP circuit component 60 and the paired transistors 71, 72 constituting the second SEPP circuit component 70. Therefore, the junction 73 of the second SEPP circuit component 70 produces an output signal vO obtained by amplifying the input signal vi. Where the muting switch 102 is opened, the transistors 32, 33 are prevented to receive the bias current from the constant-current source 100, and are rendered nonconducting. Where the transistor 33 is rendered nonconducting, then no current flows through the transistors 51, 52 of the bias circuit 50, which in turn is cut off. At this time, the transistors 61, 62 of the first SEPP circuit cDmL,cnent 60 and the transistors 71, 72 of the second SEPP circuit component 70 are not supplied with current. Consequently, both SPP circuit components 60, 70 are unactuated, and no signal is supplied to the junctions 63, 73 of the SEPP circuit components 60, 70. Thus, the amplifier device according to the embodiment of this invention shown in Fig. 1 is brought to the muting mode. During the muting mode, the first and second SEPP circuit components 60, 70 are unactuated. Consequently, the potentials of the junctions 63, 73 of both SEPP circuit components 60, 70 are floating in terms of D.C. and become unstable, giving rise to the occurrence of noise (the so-called pop noise) at the output terminal 80 of the amplifier device. With the first embodiment of Fig. 1, however, the output terminal 80 always receives a predetermined D.C. voltage +VB from the voltage source 83, and is protected from the occurrence of noise. The capacitor 91 is used to absorb signal components leaking from the voltage source 83. With the embodiment of Fig. 1, the output terminal 80 of the amplifier device is connected to the junction 73 of the second SEPP circuit compdnent 70 for the reason given below. The junction 63 of the first SEPP circuit component 60 is connected through a negative feedback resistor 26 to the base of the transistor 21 which serves as the non-inverting input of the differential circuit 20. The base of the transistor 21 is also connected to the input terminal 10 of the amplifier device through the resistor 11. Even during the muting mode of the amplifier, therefore, the input signal vi supplied to the input terminal 10 leaks to the junction 63 of the first SEPP circuit component 60 through the resistors 21, 22. If, therefore, the output terminal 80 of the amplifier device is connected to the junction 63 of the first SEPP circuit component 60, then the muting function of the subject amplifier device is obstructed by the above-mentioned input signal vi leaking to the output terminal 63 of the first SEPP circuit component 60. It is for this reason that the output terminal 80 of the amplifier device is connected to the junction 73 of the second SEPP circuit component 70. With the junction 63 of the first SEPP circuit component 60 viewed from the side of the junction 73 of the second SEPP circuit component 70, there are connected between both output terminals 63, 73 the transistors 71, 61 whose base-emitter junctions have the mutually opposite polarities, and also the transistors 72, 62 whose base-emitter junctions similarly have the mutually opposite polarities. Even where, therefore, the voltage of the output terminal 63 of the first SEPP circuit component 60 is changed, at least one backward-biased transistor is always connected between the output terminals 63, 73 of the first and second SEPP circuit components 60, 70. This backward-biased transistor prevents the input signal vi supplied to the input terminal 10 of the amplifier device and later leaking to the junction 63 of the first SEPP circuit component 60 from being further transmitted to the output terminal 73 of the second SEPP circuit component 70. During the muting mode of an amplifier device according to the first embodiment of Fig. 1, therefore, signals are fully attenuated while flowing -through a passage defined between the input terminal 10 and output terminal 80 of the amplifier device, thereby prominently elevating the muting function of the amplifier device. The amplifier device according to the first embodiment of Fig. 1 has the advantages that an output stage SEPP circuit concurrently acts as a switching circuit for the muting of the amplifier device, thereby dispensinq with the FET used in the conventional amplifier device, enabling the whole of the amplifier device to be easily assembled in a single integrated circuit. And during the muting mode of the amplifier device, the SEPP circuit remains unactuated, thereby preventing transient noise arising at the opening of the muting switch 102 from being transmitted to the output terminal 80 of the amplifier device. Description is now given with reference to Fig. 2 of an amplifier device according to a second embodiment of this invention The base of the transistor 22 which serves as the non-inverting input of the differential amplifier circuit 20 is connected to the input terminal 10 of the subject amplifier device. The base of transistor 21 which serves as the inverting input of the differential amplifier circuit 20 is connected to the positive pole of the voltage source 83 through the resistor 11. The other parts of the second embodiment of Fig. 2 are the same as those of the first embodiment of Fig. 1. With the second embodiment arranged as described above, an input signal vi supplied to the input terminal 10 of the amplifier device does not theoretically tend to leak to the junction 63 of the first SEPP circuit component 60. Actually, however, signal current delivered from the outside of the amplifier device is likely to arise in the power supply circuit. These external signal current is conducted from the voltage source 83 through the resistors 11, 22 and leak to the junction 63 of the first SEPP circuit component 60. If, therefore, the output terminal 80 of the amplifier device is connected to the junction 63, then muting can not be effected with the attenuation degree of, for example, -80 dB. With the second embodiment of Fig. 2, therefore, the output terminal 80 of the amplifier device is connected to the junction 73 of the second SEPP circuit component 70 for the reason given above as in the case of the first embodiment of Fig. 1. With the second embodiment of Fig. 2, the base of the transistor 22 of the differential amplifier circuit 20 is connected to the input terminal 10, dispensing with the reference supply 24 used in the first embodiment of Fig. 1. Therefore, the whole circuit arrangement of the second embodiment is further simplified, offering advantage in assembling an amplifier device in an integrated circuit. An amplifier device according to a third embodiment of this invention shown in Fig. 3, lacks a muting switch 102 disposed between the constant-current source 100 and transistor 31 of the first embodiment of Fig. 1. A muting control circuit 200 is connected to the junction of base and collector of the transistor 31. The input terminal 210 of the muting control circuit 200 is connected to a first terminal 216 through a capacitor 212 and a resistor 214. This first terminal 216 is further connected to a recording-reproduction changeover switch (not shown) used, for example, with a tape recorder. The first terminal 216 is supplied with a signal for actuating the changeover switch (hereinafter referred to as "changeover switch signal"). The changeover switch signal is transmitted to the muting control circuit 200 through a differentiating circuit 211 and input terminal 210. The input terminal 210 is connected to the emitter of a first wave-detecting transistor 220 and the base of a second wave-detecting transistor 222. The base of the first wave-detecting transistor 220 and the emitter of the second wave-detecting transistor 222 are impressed with voltage vO from a bias source 224. The collectors of the transistors 220, 222 are connected together. A collector junction 225 is grounded through a resistor 226 and connected to the base of a third output transistor 228. The emitter of this third output transistor 228 is grounded, and the collector thereof i connected to the junction of base and collector of the cransistor 31. The input terminal 210 of the muting control circuit 200 is connected to a second terminal 232 through a resistor 230, and further to a steady-state muting switch (not shown). Where, with an amplifier device according to the third embodiment of Fig. 3 constructed as described above, a signal illustrated, for example, in Fig. 4A is supplied to the first terminal 216, then this signal is differentiated by the differentiating circuit 211 to be converted into a signal shown in Fig. 4B. Where the differentiated signal is conducted to the input terminal 210 of the muting control circuit 200, then the muting control signal 200 generates a pulse signal illustrated in Fig. 4C where the input voltage having a differentiated waveform has a level lower than a predetermined lower voltage V1 and higher than a predetermined upper voltage V2 (where V2 > V1). If, in case the base-emitter voltage of both first and second transistors 220, 222 stands at 0.5 volt, the input terminal 210 is impressed with a voltage whose level is lower than V1 = V0 - 0.5 volts, then the second transistor 222 is rendered conducting, causing a muting control signal illustrated in Fig. 4C to appear in the collector of the transistor 228. Where the input terminal 210 is supplied with a voltage whose level is higher than V2 = V0 + 0.5 volts, then the first transistor 220 is rendered conducting, causing a muting control signal shown in Fig. 4C to appear in the base of the transistor 228. The transistor 228 is rendered conducting in response to the control signal, thereby all the current supplied from the constant-current source 100 flows into ground through the transistor 228. Since, at this time, the constant-current supply transistors 32, 33 are rendered nonconducting, transient noises occurring, for example, when the recording-reproduction changeover switch is opened or closed are prevented from being transmitted to the output terminal 80 of the amplifier device. To ensure the above-mentioned muting operation, the voltage V2 should be as higher as 0.1 to 1 volt than the voltage V1. With an amplifier device according to the embodiment of Fig. 3, a second terminal 232 is connected to an input terminal 210 of the muting control circuit 200 through a resistor 230. Where the second terminal 232 is supplied with a muting signal having a voltage level lower than V1 or higher than V2 by the steady-state muting switch (not shown) for a prescribed length of time, then the amplifier reliably carries out regular muting. This steady-state muting can be controlled only by the input terminal 210 of the muting control circuit 200, thereby simplifying its arrangement. Where, with the embodiment of Fig. 3, the muting control circuit 200 is supplied with an input signal having a waveform representing a lower voltage level than the prescribed level V1, then a muting control signal always appears in the collector of a third transistor 228 of the muting control circuit 200. Even where, therefore, an input voltage is temporarily changed from the zero volt to the steady-state voltage level by power supply to the amplifier device, then the muting control circuit 200 never fails to be rendered conducting at least once to sent forth a muting control signal. As a result, the amplifier carries out muting, thereby suppressing the occurrence of noises at power supply to the amplifier. Although the present invention has been shown and described with respect to particular embodiments, various changes and modifications which are obvious to a person skilled in the art to which the invention pertains aLe deemed to be included in the spirit, scope and concept of the invention. Referring to the embodiment of Fig. 3, the input terminal 210 of the muting control circuit 200 is connected to a single differentiating circuit 211 and a single terminal 216. However, the input terminal 210 may be connected to a plurality of parallel connected series circuits each formed of one differentiating circuit and one terminal. This modification enables the single input terminal 210 of the muting control circuit 200 to be supplied with a large number of switch changeover signals at the same time, preventing the arrangement of said muting control circuit 200 from being complicated.

Claims: Claims: '. An amplifier device having an input terminal (10) supplied with an input signal, an amplifier circuit (20) which includes an input end connected to said input termini a,d an output, a current mirror circuit (40) which includes an input end connected to said output end of said amplifier circuit (20) and an output end, a bias circuit connected to said output end of said current mirror circuit (40), a single ended push-pull circuit (60, 70) for amplifying said input signal, which includes an output and is biased by said bias circuit, and an output terminal connected to said output end of said single ended push-pull circuit, characterized in that: muting means attenuates signals sent from said single ended push-pull circuit (60, 70) by cutting off said bias circuit (50); and control means controls said muting means. 2. An amplifier device according to claim 1, characterized in that said single ended push-pull circuit (60, 70) includes D.C. bias means for impressing a D.C. voltage of a predetermined level to said output terminal. 3. An amplifier device according to any of claims 1 and 2, characterized in that said single ended push-pull circuit (60, 70) is formed of at least two parallel-connected push-pull circuit components (60, 70), and characterized by including: a feedback means connected between part of one (60) of said push-pull circuit components (60, 70) and said amplifier circuit (20); and means for conneccing part of the other (70) of said push-pull circuit components (60, 70) with said output terminal. 4. A amplifier device according to any of claims 1 to 3, characterized in that said control means comprises a differentiating circuit (211) for differentiating an incoming signal; and a muting control circuit (200) which generates a control signal when an output signal from the differentiating circuit (211) has a voltage level lower than a predetermined voltage (V1) or higher than a voltage (V2) set at a higher level than said voltage (V1). 5. An amplifier device according to claim 4, characterized in that said differentiating circuit (211) is formed of a series circuit of a resistor (214) and capacitor (212). 6. An amplifier device according to any of claims 4 and 5, characterized in that said muting control circuit (200) comprises a first transistor (220) including a collector, a base impressed with a bias voltage (to), and an emitter impressed with an input voltage; a second transistor (222) including a base impressed with said input voltage an emitter impressed said bias voltage (Vo) and a collector connected to said collector of said first transistor (220), and which is of the same type as the first transistor (220); and a third transistor for taking out output signals sent forth from said collectors of said first and second transistors (220, 222). 7. An amplifier device according to claim 4, characterized in that a difference between the level of said voltage V1 and that of said voltage V2 ranges from 0.1 to 1 volt. 8. An amplifier device according to claim 4, characterized in that said muting control circuit (200) has a single input terminal. 9. An amplifier device according to claim 1, characterized in that said amplifier circuit is formed a first transistor and a second transistor with a base, which is the same type as said first transistor and is connected in parallel with said first transistor, and said input terminal is connected to said base of said second transistor.

Inventors: SUGAWARA, TSUTOMU, YAMADA, HISASHI
Applicants: TOKYO SHIBAURA DENKI KABUSHIKI KAISHA
Application year: 1980
Main classification: H03F3
IPC codes: H03F3