SUBSTRATE CLAMPING TECHNIQUES IN IC FABRICATION PROCESSES

Abstract: Electrostatic clamping techniques for use in clamping substrates in various semiconductor fabrication processes are disclosed. One embodiment takes the form of a substrate support plate (5) which has deposited on its working face two layers (12A, 12B) of thermally conductive, electrically insulative RTV silicone, between which layers is located an interdigital type printed circuit capacitor (7) energized by a DC source (V) in the kilovolt range. Secured to the back surface of the support plate (5) is a water-cooled jacket (6) with the entire assembly adapted for location in the incident ion beam (2) and having good thermal dissipation properties. An alternate implementation utilizes an alumina support plate on which the capacitor of aluminum composition is deposited by vacuum evaporation, and the exposed capacitor surface is rendered insulative by oxidation. A second embodiment employs a substrate hold down plate (15) which has on its working face an interdigital type printed circuit capacitor (18A, 19A) covered by an outer layer (21) of electrically insulative, compressible, resilient, RTV silicone. The capacitor (18A, 19A) is an electrostatic field generator energized by a DC source in the kilovolt range. In a typical application, there is secured to the back surface of the hold down plate (15) a water-cooled jacket with the entire assembly adapted for location in the incident ion beam and having good thermal dissipation properties. The substrates to be clamped are supported in a plate-like carrier (30) having flanged apertures (31) for laterally confining the substrates. The carrier is secured to the hold down plate (15), thereby bringing the substrates into proximity with the electrostatic field generating capacitor (18A, 19A), and also masking those areas of the hold down plate not covered by the substrates. When the capacitor (18A, 19A) is energized, the substrates are attracted towards it. The outer silicone layer (21), being compressible, provides improved proximity of the clamped substrate to the hold down plate (15). For facilitating release, the carrier incorporates a manifold (35) designed to supply gas under pressure to the substrates to free them from the hold down.

Description: SUBSTRATE CLAMPING TECHNIQUES IN IC FABRICATION PROCESSES BACKGROUND OF THE INVENTION In a typical semiconductor micro-fabrication process, e.g., an ion beam etching operation, a substrate is pro¬ cessed by radiation in a high vacuum chamber. For example, the substrate may be etched for which purpose it is often coated with a photoresist pattern st.ch that the areas to be etched are devoid of the photoresist material which thus functions as a stencil. The substrate (which may be con¬ ductive, semiconductive or insulative) is then mounted on a support and exposed in a high vacuum to the ion beam which is controlled to etch or mill away the exposed areas of the substrate to a desired depth. One problem limiting the use of this technique is re¬ lated to the danger of thermally caused degradation of the photoresist layer. This problem requires in many applica¬ tions the use of a water-cooled substrate support serving as a heat sink. In such an arrangement it becomes necessary to insure good thermal conductivity between the substrate being processed and the water-cooled support. It is a com¬ mon expedient to provide this conductivity by use of a grease which thereby provides a thermally conductive path of substantially greater cross sectional area than would otherwise obtain in an essentially three point contact be¬ tween the substrate and the support to which it is attached. hile the use of grease is an acceptable procedure in laboratory type applications, it constitutes a limitation where production ion-etching and other production ion beam processes are desired. One proposed amelioration of the problem is described in British Patent Specification 1,443,215. In that refer¬ ence an electrostatic clamping arrangement is disclosed wherein a wafer or other object to be exposed to an ion beam or other radiation is secured to its support by the use of an electrostatic field. To establish the field a voltage source is connected between the support and the substrate or wafer to be treated. This approach (and a related one shown in Wardly, Ele trostatic Wafer Chuck for Electron Beam Microfabrication, 1506 Rev. Sci. Instrum.. Vol. 44, No. IV, October 1973), appears to have two disadvantages in some applications. First of all it requires making electrical contact with the substrate being treated. Secondly, the mode of creat¬ ing the electrostatic field can cause interference with the beam process (ion, plasma, electron or other radiation) in certain circumstances. In some cases this interference can be overcome but this can require additional connections between the ion beam grid system and the support and vol¬ tage supply. It is accordingly an object of the invention to pro¬ vide a system which ameliorates the shortcomings associated with the aforementioned approaches. It is a further object of the invention to provide a substrate clamping technique which does not require elec¬ trical contact with the wafer substrate or other element being processed and which also does not complicate the bea forming and controlling system. It is another object of the invention to provide a system which is particularly amenable to mass production • 5- techniques because it does not depend upon the use of potentially contaminating grease nor on the need to make electrical contact with the wafers being processed. It is still another object of the invention to provide a substrate clamping technique with improved clamping ac¬ tion which provides better heat dissipating properties, and improved loading, unloading and through-put character¬ istics. Other objects will be apparent in the following des- cription and the practice of the invention. SUMMARY OF THE INVENTION One embodiment of the invention which achieves these objects, and other objects apparent in the following des¬ cription and in the practice of the invention, may be sum- marily and generally characterized as a substrate clamp comprising a thermally conductive support, multi-electrode capacitor means incorporated in the support and having at least two terminals for connection to a voltage source, and electrically insulative, thermally conductive means oriented to insulate said capacitor from said substrate, while providing * thermal conductivity between them. A second embodiment of the invention relates to a substrate clamp having a thermally conductive support and electric field generating capacitance with at least one electrode associated with the support, and particularly to an improvement thereto comprising a compressible layer between the capacitance and the substrate to be clamped for providing improved thermal conductivity between them. A further feature of this embodiment of the invention com- prises a substantially planar substrate carrier having a plurality of apertures, each for laterally constraining a substrate, the carrier being configured for attachment to the support in such manner as to bring the substrates into proximity with the support and mask the areas of the sup¬ port not covered by the substrates. A still further fea- ture involves a pneumatic release system in which gas unde pressure is applied via a manifold in the carrier to the clamped substrates to release them. BRIEF DESCRIPTION OF THE DRAWINGS Serving to illustrate exemplary embodiments of the invention are the drawings of which: FIGURE 1 is a schematic elevational view illustrating the electrostatic clamp of the invention in an ion beam high vacuum system, it being understood that the invention will serve in other applications as well; FIGURE 2 is a schematic plan view of the electrostati clamp on an enlarged scale; FIGURE 3 is a schematic elevational and partly sectio al view of the clamp with a substrate mounted thereon, on a still larger scale; FIGURE 4 is an enlarged cross-sectional schematic fragmentary view of the hold down plate of a second embodi ment; FIGURE 5 is a plan view of the second embodiment; and FIGURE 6 is an exploded and cross-sectional view show ing the substrate carrier of FIGURE 5 in section along lines 6-6 of FIGURE 5, together with substrates and the hold down plate of FIGURE 5. DETAILED DESCRIPTION OF PREFERRED EMBODIMENT In order to afford a complete understanding of the invention and an appreciation of its advantages, a descrip tion of two alternative and preferred embodiments is pre¬ sented below. The first embodiment is illustrated in FIGURES 1-3. Referring now to FIGURE 1, the system schematically illus¬ trated therein comprises an ion beam etching system which includes an ion beam source 1 for generating an ion beam 2 which is incident on a substrate 3 of semiconductive material such as silicon. The substrate 3 is mounted on a support 4 which includes an electrostatic plate 5 and connected thereto and in good thermal contact therewith, a water-cooled plate or jacket 6. Incorporated on the incident surface of electrostatic plate 5 is a printed circuit capacitor 7 having electrical terminals 8 and 9 which are connected via respective leads 10 and 11 to a source of DC voltage, V. FIGURE 1 illustrates the electrostatic clamp in an ion beam etching function, the source 1 including the usual grid structures, e.g., electron suppression and ion accel¬ eration grids, as well as an exit grid, neutralization grid and any other required beam controlling electrodes. The source 1 also includes an anode and hot cathode and may include a magnetic field for imparting epicycloidic trajec¬ tories to the emitted electrons. The ion source 1 also includes a source of gas such as neon or argon, and the entire system is enclosed within a high vacuum chamber. Examples of ion beam etching sys- terns are found in microetch systems sold by the assignee herein, Veeco Instruments Inc. (ion source 0313-901, power supply 0313-310; automatic pumping station VE 747). Further details of the printed capacitor 7 are shown in FIGURES 2 and 3. As shown therein the capacitor is of the printed circuit interdigital type and includes a first set of electrodes 8A connected to capacitor terminal 8 by way of a peripheral arcuate conductor segment 8B. Similarly, the oppositely polarized electrodes 9A are interdigitated with the plates 8A, and are connected by a printed arcuate segment 9B to capacitor terminal 9. A suitable material for forming the conductor pattern of the capacitor is Eccocoat CC2 silver ink spray sold by the Emerson and Cuming Company. In the exemplary embodi¬ ment the printed circuit pattern is in the order of about 1 mil thickness. As shown in FIGURE 3, the printed circuit pattern is sandwiched between a pair of layers 12A and 12B, the former being coated on the outer surface of plate 5. Each of the layers 12A and 12B is, in the exemplary embodiment, of a thickness of about 4 mils and is comprised of a compressibl electrically insulative, thermally conductive material. The preferred composition is a thermally conductive RTV silicone such as is marketed under the designation Eccosil 4952, sold by the Emerson and Cuming Company. As previously noted, the plate 5 is secured both mech¬ anically and with good thermal conductivity, to the water- cooled plate 6. To now insure good thermal conductivity between the substrate 3 being processed and the water- cooled plate, the printed circuit capacitor 7 is energized to create an electrostatic field which brings substrate 3 into good thermal contact with outer layer 12B. Since layer 12B is compressible and in intimate con¬ tact with layer 12A which is in turn in good thermal con¬ tact with plate 5, and since plate 5 is in good thermal conductivity with water-cooled base 6, excellent tempera¬ ture control is achievable. A voltage appropriate in the illustrated embodiment for achieving the requisite contact is in the neighborhood of about 1.5 kilovolts. \_. R E CMPI " As shown in FIGURE 2, the voltage source which sup¬ plies the charge to capacitor 7 may be switched by use of switch S such that opening the switch disconnects the voltage source from the capacitor and discharges the latter thereby permitting release of the wafer being treated. In an alternate embodiment the support plate 5 may be fabricated of a thermally conductive electrical insu¬ lator such as alumina on which the capacitor 7 is deposited as by silk screening or vacuum evaporation. The need for layer 12A can thus be obviated. By forming capacitor 7 from aluminum, e.g. , by vacuum evaporation, and then oxidizing the exposed capacitor sur¬ face to form a thermally conductive, insulative layer, the layer 12B can also be excluded. The substrates which may be held in place by the electrostatic clamp may be conductive, semi-conductive, or electrically polarizable insulative devices. It should also be understood that one of the terminals of the capaci¬ tor may be a grounded conductive surface or joint. The system described above employs compressible means between the electrostatic field generating capacitor and the clamped object, illustratively a layer of silicone rubber. It has been found that the closer clamping which is achieved with such a compressible layer, provides im- proved thermal conductivity between the substrate and the heat sink, a key requirement in many semiconductor fabri¬ cating processes. An alternative and preferred embodiment which provides improved thermal conductivity between the substrate and the heat sink is illustrated in FIGURES 4-6. Other improve¬ ments involve the structure of the hold down plate assembly which incorporates the capacitor, and a substrate carrier which transports the substrates, brings them into the active region of the hold down plate, serves to mask the hold down plate regions not covered by the substrates, and incorporates a manifold to facilitate pneumatic re¬ lease of the substrates. Referring now to FIGURES 4-6, a support plate 15 is fabricated of a thermally conductive electrical insulator such as alumina on which the capacitor electrodes 18A, 19A are deposited as by silk screening or vacuum evaporation. Covering the printed capacitor is a hard overglaze 20 which may be, for example, porcelain. Covering the over¬ glaze is a compressible resilient layer 21, illustratively the RTV silicone previously described. The capacitor 18A, 19A takes the form previously described, and is energized as previously indicated. One of the terminals of the capacitor may be a grounded con¬ ductive surface or point, and one electrode of the capa¬ citor may be remote from the support. For transporting the substrates to the electrostatic clamp a disc-shaped carrier 30, FIGURES 5 and 6, is employ It includes six peripheral apertures 31 and a central aper ture 32 for holding the substrates to be clamped. Each aperture wall includes a flange 33 for supportin the substrate rim, a conical, outwardly flaring section 34A on the incident beam side of the carrier, and a paral¬ lel-sided section 34B on the clamp side which surrounds and constrains the substrates. To provide a gas distributing manifold in the carrier there is recessed in the face thereof a main manifold chan nel 35 concentric with central aperture 32 and radial bran O A. channels 36, each interconnecting the section 34B of center aperture 32 with the section 34B of a respective peripheral aperture 31. Also recessed in the face of carrier 30 is an inlet plenum 37 which communicates with main channel 35 and has an inlet port 38. The latter is threaded to receive a threaded plug (not shown) . In operation, carrier 30, loaded with substrates, is clamped to the substrate holder 14 by means of a suitable mechanical clamp. When voltage is applied across electrode 18A, 19A, the substrates are attracted to the compressible outer layer 21. To unload after the ion etch or other operation is completed, a source of gas under pressure is applied to port 38. The gas traverses inlet chamber 37, channel 35 and branches 36 to the edges of the loaded wafers where it acts to loosen them from the substrate holder. During the treatment process, the solid section of carrier 30 protects the hold down coating 21 from the effects of the treatment process; e.g., milling, etching or deposition. By way of example, the clamp 14 and carrier 30 are roughly 10 inches in diameter. The alumina layer of clamp 14 is 0.312 inches thick and consists of high density 99% pure; the electrodes 18A, 19A are 3-5 microns thick and the overglaze 18A is roughly .002-.004 inches. Resilient coat 21 is .015 inches thick. Carrier 30 is approximately 1/4 inch thick and fabricated from 304 stain- less steel. -10- It is clear that the above description of the pre¬ ferred embodiments in no way limits the scope of the pre¬ sent invention which is defined by the following claims.

Claims: WHAT IS CLAIMED IS: 1. A substrate clamp for use in semiconductor fabri¬ cation systems comprising a thermally conductive electrically insulative support, multi-electrode capacitor means mounted on the support to establish an electric field and having at least two terminals for connection to a voltage source, and thermally conductive means oriented to electrically in¬ sulate said capacitor means from said substrate while pro¬ viding thermal conductivity therebetween. 2. The clamp as defined in Claim 1 in which said ther¬ mally conductive means comprise thermally conductive coat¬ ing. 3. The clamp as defined in Claim 1 in which said ther¬ mally conductive means comprise an oxide coating on said capacitor means. 4. The clamp as defined in Claim 1 in which said support comprises an electrically conductive metallic layer coated with a thermally conductive silicone material. 5. The clamp as defined in Claim 1 in which said support comprises a plate fabricated of an electrically insulative, thermally conductive material. 6. The clamp of Claim 5 in which said material is alumina. 7. The clamp of Claim 6 in which said capacitor means are comprised of aluminum and in which said thermally con¬ ductive means comprise an oxide coating on said capacitor means. ■ βΪJKcΛ^ * . OMPI 8. The clamp as defined in Claim 1 in which said capacitor means comprise an interdigital capacitance. 9. The clamp as defined in Claim 1 in which said thermally conductive means comprise a pair of layers be¬ tween which is sandwiched said multi-electrode capacity means. 10. The clamp as defined in Claim 1 in which the electrodes of said capacitor means are in the order of about 1 mil thickness. 11. The clamp as defined in Claim 5 in which said thermally conductive means comprise two layers of thermall conductive material, each of approximately 4 mils thicknes and between which said multi-electrode capacitor means is located. 12. In a substrate clamp for use in semiconductor fab rication systems wherein the clamp comprises a thermally conductive support having capacitance for establishing an electric field, the improvement comprising a resilient compressible means between said capacitance and said sub¬ strate to be clamped for providing improved clamping. 13. The clamp as defined in Claim 12 in which said resilient, compressible means comprise a thermally conduc¬ tive electrically insulative coating. 14. The clamp as defined in Claim 13 in which said coating comprises silicone material. 15. The clamp as defined in Claim 12 in which said resilient compressible means comprises silicone rubber material. I ΌRE O.V. 16. The clamp as defined in Claim 12 in which said capacitance comprises an interdigital planar capacitance. 17. The clamp as defined in Claim 12 in which said resilient compressible means comprise a pair of layers between which said capacitance is sandwiched. 18. The clamp as defined in Claim 12 in which the electrodes of said capacitance are in the order of about 3-5 microns. 19. The clamp as defined in Claim 12 in which said thermally conductive support comprises an electrically insulative material having said capacitance deposited thereon. 20. The clamp as defined in Claim 19 in which said support comprises alumina. 21. The clamp as defined in Claim 19 including an insulative overglaze covering said capacitance and on which said resilient compressible layer is provided. 22. The clamp as defined in Claim 12 including a substrate carrier coupled to said support and having (1) a plurality of apertures for confining a plurality of said substrates; and (2) impervious sections for masking sections of said resilient layer not covered by the substrates. 23. The clamp as defined in Claim 22 including gas duct means in said carrier configured to direct pressur- ized gas to said apertures for facilitating release of said substrates.

Inventors: BOLLINGER L, BRIGLIA D
Applicants: VEECO INSTR INC
Application year: 1979
Main classification: H02N13
IPC codes: H01L21, H02N13