APPARATUS FOR AND METHODS OF DIGITAL PROCESSING

Abstract: A digital filter that removes from a digitised analogue signal those frequency components that would give rise to aliasing in a subsequent digital filtering operation, and does so without phase distortion. In a first stage (S1) of the filter successive overlapping groups of digitised sampled values are averaged, using a random access memory (2), an adder unit (3) and a parallel shift register (9). In a second stage (S2) successive non-overlapping groups of the averaged sampled values are accumulated (12) and averaged in a further parallel shift register (13). The second stage output may be converted to an analogue signal or supplied to a main digital filter (MDF), and the filter is particularly suited to microprocessor applications.

Description: APPARATUS FOR AND METHODS OF DIGITAL PROCESSING TECHNICAL FIELD This invention relates to digital processing of electrical signals, and in particular to digital filters and methods of digital filtering. BACKGROUND ART When an analogue signal is required to be filtered digitally, it is sampled periodically so as to derive an input for the filter in digital form. In addition, in both hardware and software implementations of digital filters a data hold, for example a zero-order hold, is normally interposed between sampling instants. An inherent effect of such a sampling process on the analogue signal for a digital filter having a sampling frequency ω , say, and a required pass band from _ ' = 0 to ω = ω cp , say, (where ω is more than twice ω , to satisfy Nyquist's Sampling Theorem), is that the filter not only passes frequencies in the required range 0 to ω , but also those in the ranges ω Ξ *-ω CF to ω s +ω CF , 2ω s *-ω CF to 2ω s +ω CF , ,ι__ S-_ύlr___-r to ωS+ω Λ l_. r r, etc. This inability of the filter to distinguish between frequencies in its primary pass band (0 to ω /2) and those centred at multiples of the sampling frequency (ω ) , known as aliasing, results in the higher frequencies folding back into the primary pass band and thereby distorting the signal being operated upon by the filter. It is known to prevent, or at least reduce this distortion by converting the digitally-filtered signal back into analogue form and passing it through an analogue filter arranged to OMPI /,- WIIPPOO . attenuate frequencies outside the primary pass band. This technique, however, is not entirely satisfactory due to the fact that it is not possible to design an analogue filter to give a sharp cut-off above the primary pass band and a linear phase shift in the range up to the cut-off frequency of the filter. DISCLOSURE OF THE INVENTION The present invention provides an improved digital filter and method of digital filtering for preventing, or at least minimising aliasing. In accordance with one aspect of the present invention, there is provided a digital filter comprising (a) means for sampling an analogue electrical signal at a predetermined frequency to provide a series of sampled values and for supplying the sampled values in digital form, (b) means for averaging groups each of N successive sampled values, N being integral and at least 2, and each group overlapping the preceding group, to provide a series of averaged values, and (c) means for averaging successive non-overlapping groups of N of the series of averaged values. In accordance with another aspect of the present invention, there is provided a method of digitally filtering an analogue electrical signal wherein the analogue signal is sampled at a predetermined frequency and a series of sampled values are derived in digital ' form, groups each of N successive sampled values are averaged to provide a series of averaged values, N being integral and at least 2, and each group overlapping the preceding group, and successive non-overlapping groups of N of the. series of averaged values are averaged. Preferably the groups of N successive sampled values overlap by N-l sampled values. The effect on an analogue signal of a filter in accordance with the invention is to introduce high attenuation at integral multiples of a frequency which is OMP WIP 1/Nth of the predetermined frequency (ω) , the frequency of the digital output signal of the filter being ^. One intended use of such a filter is as a pre-filter to provide the input signal for a further, or main digital filter that is required to have a sampling frequency - t so that the pre-filter effectively removes from the analogue signal those frequencies which would give rise to aliasing. The sampled signal supplied to the main filter can therefore be operated upon substantially without distortion arising from aliasing, and, furthermore, with a phase shift that is linear. This latter feature has the advantage that the filtered signal does not suffer ' amplitude distortion, arising from phase dispersal. The filter is, therefore, particularly well- suited to processing binary data corrupted by noise. A filter in accordance with the present invention thus dispenses with the need to employ an analogue filter in succession with the main digital filter, and thereby avoids the phase distortion associated with all analogue filters. Furthermore, instead of having to adjust a component value, or replace a component, of an analogue filter in order to change the bandwidth, all that is required with the entirely digital filter of the present invention is to select the sampling frequency accordingly. The variation in gain and phase characteristics with temperature, humidity and age, associated with analogue components, are also avoided. BRIEF DESCRIPTION OF THE DRAWINGS A linear phase digital anti-aliasing filter and its method of operation, each in accordance with the present invention, will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 1 is a block diagram of the filter in association with additional main digital filtering components; and Figures 2 and 3 are detailed block diagrams of first and second stages respectively of the filter of Figure 1. - 1 OMPI BEST MODE OF CARRYING OUT THE INVENTION Referring to Figure 1 , an analogue electrical signal Fi (t) is applied to an input terminal A of the filter unit, and it is required to modify this signal by a main digital filter MDF whose output is supplied to a data hold arrangement inthe for of a zero-order hold ZOH, before being conducted to a unit output terminal B. The filter MDF may be of any type, i.e. of high-pass, low-pass, or band-pass characteristics. To prevent the introduction of aliasing by the sampling process of the main digital filter MDF, a further digital filter F, comprising two stages Si and S 2 , is introduced between the terminal A and the filter MDF. Consider that the analogue signal f x (t) extends to a frequency ω rτ and that the filtering operation required to be carried out by the filter MDF is to be effected at a sampling frequency (_£.„, corresponding to a sampling period T 2 _______ as indicated in Figure ω SM 1, where ω gM is less than tύ - τ - The frequency with which the filter F samples the analogue signal fi (t) is ω e s τ i» which is chosen to be NωS,,M., (where N is an integer) , and corresponds to a sampling period T ' _ • Furthermore, in order to satisfy Nyquist's Sampling Theorem, ω ςτ > 2 ω-,-. Accordingly, N must be a positive integer such that N > 2 ω c - . ^SM The first stage S x of the anti-aliasing filter F is arranged to form equally weighted running averages of N samples of the analogue signal f - (t) and to store each average in an accumulator for a period of Ti seconds, as hereinafter described. The frequency response of stage Si of the filter F, as a result of sampling the analogue signal f (t) at a frequency of ω is NωT. 1 ωT_ sm iHAFi (ω) -j(N-l) .(1) ωTn sin It can immediately be seen from equation (1) that the effect of stage S x of the filter F on the analogue signal fi (t) is to produce a linear phase shift of and to produce infinite attenuation of fι (t) at integral multiples of the sampling frequency ω_ of the main filter MDF. For large values of N, say greater than about 30, the magnitude of the frequency response of stage Si can be approximated by the expression: JHAF ι (X) I sin (X) (3) , X where X = ω It is thus seen, that the first stage Si of the filter F attenuates the analogue signal f - (t) at precisely those frequencies which would otherwise give rise to aliasing when the main filter MDF carries out its sampling at the frequency ω s . The second stage, S 2 of the filter F improves the attenuation produced by the first stage Sj. in the frequency region at integral multiples of ω ςM . The output signal f 2 (t) from the stage Si of the filter F, being the average of successively-overlapping N samples of the analogue signal fi (t) , is supplied to the second stage S 2 where the arithmetic mean f 2 is formed every T 2 (= NT X ) seconds of each successive group of N samples of the signal f 2 (t) , which is sampled every Tj seconds. The operation of the second stage S 2 of OMPI - the filter F is equivalent to that of a zero order hold which holds a single value f 2 for T 2 seconds. The frequency response of stage S 2 is -jx sin (x) HAF (X) = e (4) X where X = The effect of the second stage S 2 on the output f 2 (t) of the first stage Si, can therefore, be seen to produce a linear phase shift of and also to introduce infinite attenuation at integral multiples of the frequency ω , the sampling frequency of the main digital filter MDF. The combined effect of stages Si and S 2 of the filter F on the analogue signal f x (t) at input terminal A is , therefore, (i) T seconds ase shift of (ii) to attenuate frequencies in the region of multiples of ω M by a factor |- sιn (X) ' - sM J ■ X ' and (iii) completely to reject frequencies in fι (t) which are integral multiples of the main filter sampling frequency ω M . Reference will now be made to Figure 2 for a more detailed explanation of the first stage Si of the filter F. The analogue input fi (t) at the terminal A is sampled every Ti seconds (i.e. at a frequency 2π/ω c ) * " > 1 and is converted into an bit binary number by the analogue-to-digital converter 1. The period Ti is controlled from a master clock in a sequencer 16, which also derives the time period T 2 for use as hereinafter Λ, WI described. The data from the converter 1 is supplied to the i ^ . store location of a random access memory 2, and also to the additive input terminal of an adder unit 3. The random access memory 2 consists of 2p words each of m bits. The value of p_ is chosen to be the smallest integer such that 2& is greater than the largest block size N required in the filter F. The write address is held in a £ bit counter 7 which is incremented by unity every T x seconds under the control of the sequencer 16. Output data from the memory 2 is o fch. read from the (i + 2 - (N - 1)) location in the memory, and is supplied to the subtract input terminal of the adder unit 3, thereby to be subtracted from the samples received directly from the converter 1. In this way, the random access memory 2 determines those samples of the analogue input signal f (t) which are to be used to form the running averages. Both the read and write addresses for the random access memory 2 are modified in an adder unit 5 by a constant Q which is held in a storage unit 4. The value of 0 is set to zero for a write command and has a value of (2 P - (N - 1)) for a read command. In order to allow the adder unit 3 time, after initial switch on of the filter, to receive N samples of the signal f (t) , a gate 6 is included in the path from the random access memory 2 to the subtract input terminal of the adder unit 3 so that the first N samples of output data from the memory 2 are set to zero. Because of the above definition of the read and write addresses for the memory 2, the random access memory acts as serial input (N - 1) stage shift registers whose length can be varied by the value (N - 1) held in an offset register 17. The output of the adder unit 3 is supplied to an accumulator 8, which is preferably of (m + __) bits so as to prevent overflows whatever the signal amplitude. The accumulator 8 is clocked every Ti seconds from the sequencer 16, and therefore contains the running total of N samples of the data supplied by the converter 1. It will be appreciated, that because of the output data passing from the memory 2 to the subtract input terminal of the adder unit 3, each successive total of N samples held in the accumulator 8 for a period T_ seconds overlaps the preceding N samples by N - 1 samples. The average of each successive overlapping running total of N samples of the accumulator 8 is scaled (that is to say, divided by N) in a shift register 9 which introduces a parallel shift of __ places to the right of the input received from the accumulator 8. The input accumulator 8 is thereby multiplied by 2 ^ , and an output word length of m + 1 bits produced. The running average of the N samples is then supplied to a round-off unit 10, where the scaled total from the shift register 9 is corrected to the nearest m bits so as to avoid accumulated errors, and the result is subsequently stored in a buffer register 11 for successive periods of seconds. The round-off process corrects the scaled total from shift register 9 to the nearst ± h quantum and prevents accumulative errors arising from the summation in the accumulator 8. Although the output from the buffer 11 will not in general have the exact scale factor required for the first stage S x of the filter F, it will, however, have the correctly-shaped frequency response. If required, the scale effect can be corrected by a factor 2-^/N in the digital-to-analogue conversion of the main filter MDF. The scaling technique used in the filter F makes it particularly suitable for data block sizes (i.e. N samples) which are integral powers of 2. The running average of the block of N samples of fi (t) at time rT x , i.e. the output signal f 2 (t) of the first stage S x of the filter F, remains in the buffer 11 until time (r+1) Ti , when it is overwritten by the new average at time (r+1) T x . The buffer 11, therefore, O /. acts as a zero order hold unit. The output from the buffer register 11, which is the output signal f 2 (t) of the first stage Si of the filter F, is supplied as the input to the second stage S 2 of the filter F as shown in Figure 3, to which reference will now be made. - REXCΓ OMPI_ The second stage S 2 of the filter F receives the signal f 2 (t) in an accumulator 12 which receives successive blocks of N samples of F 2 (t) and provides totals thereof. This is achieved by clocking the accumulator 12 every : seconds so as to allow it to receive each running average in the buffer 11, and resetting it to zero every T 2 (=NT X ) seconds. The clocking of the accumulator 12 is controlled by the sequencer 16, which, for convenience, is again shown in Figure 3. The output of the accumulator 12 is scaled by a factor 2~ p in a shifter unit 13 which, like the unit 9, effects a parallel shift of £ places to the right on its input signals. The shift register 13 thus provides the arithmetic mean of each group of N running averages of the samples of the analogue input signal £-. (t) . The resultant scale values are rounded off to the nearest m bits in a round-off unit 14 analogously to the unit 10 already described. The rounded-off values are then supplied to a buffer register 15 where each value i-s stored for a time period T 2 under the control of the sequencer 16. The output of the register 15, f 3 (t) , is the output of the anti-aliasing filter F. As described hereinbefore, the signal f 3 (t) is free of components that would give rise to aliasing when this signal is operated upon by the main filter MDF at a sampling frequency ω sM - The signal f 3 (t) is then supplied to the main filter MDF (Figure 1) , so that the desired filtering of the analogue input signal f x (t) may be carried out. It will be appreciated that if the anti-aliasing filter F is to be used independently of the filter MDF, th output signal f 3 (t) from the second stage S 2 could be supplied to a digital-to-analogue converter 16, as shown in outline in Figure 3, to provide an output signal in analogue form. As described above, the positive integer N is greater than 2 ω CI /ω_ M , and since ω CI > ω , N cannot be less than 2. However, the value of N determines the amount of O W rejection of the filter in the region of integral values of ω SM , and N = 8 has been found to be a practical minimum value. This corresponds to a rejection of about 35dB. Increasing the value of N improves the rejection of the filter, but increases the time taken to process the data. The value of N is preferably chosen to be of the form 2 P , where £ is a positive integer, because of the digital nature of the hardware. In such case, and taking into account the fact that the filter employs equally-weighted coefficient, the filter of the invention is particularly suited to microprocessor applications. As an example, the parameters of the filter F may be as follows: m = 10, £ = 5, and N = 32. Furthermore, the sampling rate of the first stage Si may be 20,000 samples per second, thus leading to a sampling rate of 625 (= 20,000/32) for the second stage S 2 . The filter components shown in Figures 2 and 3 are those required to effect the most efficient filtering to avoid aliasing, but a degraded though still acceptable filter may be provided by dispensing with some components. For example, in some instances acceptable filtering may be obtained by omitting one or more of the buffer registers 11 and 15, and the round off adder units 10 and 14. Although the anti-aliasing filter so far described has been of two-stage construction, it is envisaged that three or more stages may be employed. For example two stages Si and Si ' , each being of the form of the first stage S : of the filter F could be connected in series, as indicated in Figure 1, the output thereof being supplied to a third stage such as stage S 2 of the filter F. In the example given above where the two stage filter F gives rises to an attenuation of about 35dB, the addition of a further first stage can provide about 18dB extra attenuation. Increasing the number of stages, and/or increasing the value of N will improve the attenuation, with practical limits being set by storage facilities, word length, and the sampling frequency ω = Nω .

Claims: CLAIMS 1. A digital filter having means for sampling ah analogue electrical signal at a predetermined frequency to provide a series of sampled values and for supplying the sampled values in digital form, the filter being characterised by first means (Si) for averaging groups each of N successive sampled values, where N is integral and at least 2, said means (Si) being arranged such that each of the groups overlaps the immediately preceding group, and by second means (S 2 ) for receiving the series of averaged values derived by said first means (S α ) and/or averaging successive non-overlapping groups of N of said averaged values. 2. A digital filter according to claim 1, characterised in that the first means (Si ) comprises a random access memory (2) and an adder unit (3) , and in that the sampled values are supplied directly to one terminal of the adder (3) and via the memory (2) to an oppositely-signed terminal of the adder (3) . 3. A digital filter according to claim 2, characterised by an accumulator (8) that is arranged to receive the output of the adder (3) , thereby to accumulate the running total of said N successive sampled values. 4. A digital-filter according to claim 1, characterised in that the second means (S 2 ) comprises In accumulator (12) that is arranged to accumulate N of said averaged groups. 5. A digital filter according to claim 3 or 4 characterised by a parallel shift register (9,13) that is arranged to receive the output of the associated accumulator (8,12) and to divide it by N. 6. A digital filter according to claim 5, characterised by a round-off unit (10,14) arranged to round off the output of the associated parallel shift register (9,13) . 7. A digital filter according to claim 2 or 3, OM characterised by an inhibit device (6) that is ■ . ■ arranged to set to zero the first N samples supplied to the adder unit (3) immediately after energisation of the filter. 8. A digital filter according to claim 1, characterised by a further one or more of said first or second means (Si, S 2 ) connected in- series with said respective first or second means. 9. A digital filter according to claim 1 or 8, characterised by means (16) arranged to receive the output of the, or the last, second means (S 2 ) and to provide an analogue signal representative thereof. .10. A digital filter according to claim 8, characterised by a buffer register (11) connected between the, or the last, first means (Si) and the, or the first, second means (S 2 )_ 11. A method of digitally filtering an analogue electrical signal in which the analogue signal is sampled at a predetermined frequency and a series of sampled values are derived in digital form, characterised in that groups each of N successive sampled values are averaged, N being integral and at least 2, wherein each group overlaps the immediately preceding group, and in that successive non-overlapping groups of N of the series of averaged values are averaged. 12. A method.according to claim 11, characterised " in that the N successive samples are accumulated from an adder unit (3) that receives the samples directly at one input terminal and at an oppositely-signed input terminal from a random access memory (2) . 13. A method according to claim 11 or 12, characterised in that the averaging is effected by supplying the digital signals to a parallel shift. register. ' OMPI ,, WIPO .

Inventors: BYWATER R, MATLEY W, WILLIAMSON S
Applicants: BYWATER R, MATLEY W, UNIV SURREY, WILLIAMSON S, UNIVERSITY OF SURREY
Application year: 1979
Main classification: H03H17
IPC codes: H03H17