# Patent

## Title
Hybrid DC-DC converter with LLC converter and full-bridge converter

## Abstract

Disclosed is a hybrid dc-dc converter. The hybrid dc-dc converter includes: a pair of transformers configured to magnetically couple a primary side to a secondary side, a full-bridge converter including four switches constituting a full-bridge inverter circuit and a first transformer, and an LLC resonant converter including a resonant inductor, a resonant capacitor, and a second transformer, which constitute an LLC resonant circuit, wherein an output of the full-bridge converter and an output of the LLC resonant converter are connected to each other in series at the secondary side.

## Background
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a dc-dc converter.
2. Description of the Prior Art
With accelerated global warming, decreasing natural resources, increasing fuel price, and economical issues, vehicles with electric propulsion, such as hybrid electric vehicles (HEVs), plug-in HEVs (PHEVs), battery electric vehicles (BEVs or EVs), and fuel cell electric vehicles, are gradually growing.
These vehicles need commonly rechargeable batteries as the energy source of electric traction system. Among them, PHEVs or EVs require a higher capacity and larger sized battery pack compared with other vehicles because the battery is a main energy source in PHEVs or EVs.
The high-energy-density battery pack in PHEVs or EVs is typically recharged from the ac utility grid via an ac-dc converter named as battery charger. For low harmonic contents on the ac utility grid and high efficiency, most of battery chargers have generally the basic form of an ac-dc converter with a power factor corrector (PFC), followed by an isolated dc-dc converter.
There are key requirements in the development of EV battery chargers. First, it is imperative to reduce their size and weight in order to facilitate packaging and to highlight the utilization factor of energy. Namely, the design for higher power density and lower weight is required. Furthermore, the conversion efficiency should be maximized during whole output conditions or battery recharging process to maximize the fuel saving and emission reduction.
In order to achieve these requirements, it is necessary to adopt higher switching frequencies and soft-switching technologies since a higher switching frequency is the key to reducing the size and weight of passive components used in high-power applications, and soft-switching technologies significantly lower the generated switching losses.
In addition, in the PFC stage, a bridgeless design should be carried out because excessive conduction loss is generated due to the forward voltage drop for each of the bridge diodes, particularly at a lower line input voltage, which decreases the overall efficiency and greatly increases the size and weight of heat sink.
In addition, in the case where the output voltage requirement of the battery charger is high, the rectifier diodes in the dc-dc converter could experience a serious voltage oscillation and spike. Then, lossy snubber circuitry and higher voltage-rated diodes must be required, which cause the increase in power loss, size, and weight. Thus, in designing the rectifier stage in the dc-dc converter, the design that can avoid the aforementioned problem should be also taken into account.
In addition, in order to maintain high efficiency under low power conditions, it is necessary to minimize the amount of circulating energy in the dc-dc converter.
Conventional phase-shift full-bridge (PSFB) converter is the most preferred dc-dc topology for battery charger applications because of natural zero-voltage-switching (ZVS) operation, low current ripple in battery charging current, and simple structure and control.
However, for wide-output-voltage-range applications like battery charger, the conventional PSFB converter does not obtain an optimal efficiency due to narrow ZVS range, large circulating current, and high voltage stress on the rectifier, etc.
SUMMARY OF THE INVENTION
In order to improve the performance of the conventional PSFB converter for battery charger applications or other applications, the present invention provides hybrid dc-dc converters with an LLC resonant converter integrated into a full-bridge converter.
In accordance with an apsect of the present invention, a hybrid dc-dc converter is provided. The hybrid dc-dc converter includes: a pair of transformers configured to magnetically couple a primary side to a secondary side; a full-bridge converter including four switches, a first diode and a second diode connected to a third leg in series, a third diode and a fourth diode connected to a fourth leg in series, and a first transformer, wherein the four switches include two pairs of switches, the two pairs being connected to a first leg and a second leg in series, respectively, the first leg and the second leg are located at the primary side, and the third leg and the fourth leg are located at the secondary side; and a half-bridge converter including two switches connected to the second leg in series among the four switches, a resonant inductor, a resonant capacitor, a fifth diode and a sixth diode connected to the fourth leg in series, two filter capacitors, and a second transformer, wherein a secondary side of the first transformer and a secondary side of the second transformer are connected to each other in series.
In accordance with another aspect of the present invention, a hybrid dc-dc converter is provided. The hybrid dc-dc converter includes a pair of transformers configured to magnetically couple a primary side to a secondary side; a full-bridge converter including four switches constituting a full-bridge inverter circuit, and a first transformer; and an LLC resonant converter including a resonant inductor, a resonant capacitor, and a second transformer, which constitutes an LLC resonant circuit, wherein an output of the full-bridge converter and an output of the LLC resonant converter are connected to each other in series at the secondary side.
As described above, according to the present invention, the hybrid dc-dc converter has following advantages; wide zero-voltage-switching (ZVS) range, low circulating current, zero-current-switching (ZCS) operation on output rectifiers, and reduced size of output filter inductor. Moreover, the hybrid dc-dc converter has low circulating current even though it uses less components. In addition, the hybrid dc-dc converter may be driven in a phase-shift manner with stationary frequency, which helps the LLC converter to be optimally designed on one point without consideration of a battery charger operation status.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a circuit diagram illustrating a hybrid dc-dc converter according to an embodiment of the present invention;
FIG. 2 illustrates an operation mode when the hybrid dc-dc converter is applied to a battery charger;
FIG. 3 illustrates a key waveform at point A.
FIGS. 4A to 4E illustrate current paths for a half period.
FIG. 5 shows the normalized gain of the hybrid dc-dc converter and conventional PSFB converter.
FIGS. 6A and 6B show the rectifier voltage of the conventional PSFB converter and the hybrid dc-dc converter.
FIG. 7 shows the current ripple of output filter inductor.



DETAILED DESCRIPTION OF THE EXEMPLARY EMBODIMENTS
Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, the same elements will be designated by the same reference numerals although they are shown in different drawings. Further, in the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.
In addition, terms, such as first, second, A, B, (a), (b) or the like may be used herein when describing components of the present invention. These terms are merely used to distinguish one structural element from other structural elements, and a property, an order, a sequence and the like of a corresponding structural element are not limited by the term. It should be noted that if it is described in the specification that one component is “connected,” “coupled” or “joined” to another component, a third component may be “connected,” “coupled,” and “joined” between the first and second components, although the first component may be directly connected, coupled or joined to the second component.
FIG. 1 is a circuit diagram illustrating a hybrid dc-dc converter according to an embodiment of the present invention.
The hybrid dc-dc converter 100 converts electric power of a power source VIN to supply the electric power to a resistor Ro.
Referring to FIG. 1, the hybrid dc-dc converter 100 includes a pair of transformers T1 and T2 which magnetically couple a primary side to a secondary side.
Further, the hybrid dc-dc converter 100 includes four switches Q1, Q2, Q3 and Q4, the four switches including two pairs of switches, the two pairs being connected to a first leg 102 and a second leg 104 in series, respectively, a first diode Do1 and a second diode Do2 connected to a third leg 106 in series, a third diode Do3 and a fourth diode Do4 connected to a fourth leg 108 in series, and a full-bridge converter FB including the first transformer T1. Here, the first leg 102 and the second leg 104 are located at the primary side, and the third leg 106 and the fourth leg 108 are located at the secondary side.
As illustrated in FIG. 1, a primary side of the full-bridge converter FB includes an inverter circuit 114 including the four switches Q1, Q2, Q3 and Q4 and the primary side of the first transformer T1.
A secondary side of the full-bridge converter FB includes a full-bridge rectifying circuit 116 including the four diodes Do1, Do2, Do3 and Do4 and the secondary side of the first transformer.
The hybrid dc-dc converter 100 includes a half-bridge converter HB including the two switches Q3 and Q4 connected to the second leg 104 in series among the four switches, a resonant inductor Lr, a resonant capacitor Cr, a fifth diode Do5 and a sixth diode Do6 connected to the fourth leg 108 in series, two filter capacitors Cf1 and Cf2, and the second transformer T2.
In the half-bridge converter HB, a magnetizing inductor Lm2 of the resonant inductor Lr, the resonant capacitor Cr and the second transformer T2 configure an LLC resonant circuit 110. Since the half-bridge converter HD can be operated in an LLC resonant type using such an LLC resonant circuit 110, the half-bridge converter HB may be called an LLC resonant converter.
Further, a secondary side circuit 112 of the half-bridge converter HB includes a secondary side of the second transformer T2, the two filter capacitors Cf1 and Cf2, and the two diodes Do5 and Do6.
In the full-bridge converter FB and the half-bridge converter HB, the diodes Do3, Do4, Do5, and Do6 located in the fourth leg 108 may be connected in series and in a successive order of the third diode Do3, the sixth diode Do6, the fifth diode Do5, and the fourth diode Do4. Further, the third diode Do3, the sixth diode Do6, the fifth diode Do5, and the fourth diode Do4 may be connected to each other in series in the same direction. Here, the direction implies a PN junction direction.
The secondary side of the first transformer T1 and the secondary side of the first transformer T2 are connected to each other in series.
In this way, the secondary side of the first transformer T1 and the secondary side of the second transformer T2 are connected to each other in series, so that an output of the full-bridge converter FB and an output of the half-bridge converter HB can be connected to each other in series.
N1 denotes a point where the secondary side of the first transformer T1 and the secondary side of the second transformer T2 meet each other, N2 denotes a point where the fifth diode Do5 and the fourth diode Do4 meet each other, N3 denotes a point where the third diode Do3 and the sixth diode Do6 meet each other, and N4 denotes a point where the sixth diode Do6 and the fifth diode Do5.
Referring to FIG. 1, the secondary side circuit 112 of the half-bridge circuit HB is inserted between N1, N2, and N3.
In this way, the secondary side circuit 112 of the half-bridge converter HB is inserted into the secondary side circuit 116 of the full-bridge circuit 112, so that the sum of outputs of the full-bridge converter FB and the half-bridge converter HB or only the output of the half-bridge converter HB may be transferred to an output inductor Lo.
Referring to FIG. 1, in the secondary side circuit 112 of the half-bridge converter HB, the first filter capacitor Cf1 may be located between N1 and N2, and the second filter capacitor Cf2 may be located between N1 and N3. Further, the secondary side of the second transformer T2 may be located between N1 and N4.
Referring to FIG. 1, the hybrid dc-dc converter 100 may include the full-bridge converter FB and the half-bridge converter HB.
The hybrid dc-dc converter 100 may further include an LC output filter Lo and Co.
Hereinafter, an operational principle of the hybrid dc-dc converter 100 will be described together with a waveform formed by each circuit element.
Meanwhile, the waveform may be differently formed according to an operation mode or an operation point of the hybrid dc-dc converter 100.
FIG. 2 illustrates an operation mode when the hybrid dc-dc converter 100 is applied to a battery charger.
The hybrid dc-dc converter 100 for the battery charger operates in constant current mode and constant voltage mode according to battery voltage status as shown in the FIG. 2. For the hybrid dc-dc converter (100) for the battery charger, it is noted that low voltage and high current output condition such as point A in the FIG. 2 is the worst operation point. Accordingly, hereinafter, the operation principle of the hybrid dc-dc converter 100 will be described together with a waveform at point A.
In order to analyze the operation of the hybrid dc-dc converter, several assumptions are made as follows.
1) Ns1/Np1=nT1, and Ns2/Np2=nT2;
2) The switch devices are ideal MOSFETs except for the parasitic capacitors and the internal body diodes;
3) The rectifier diodes are ideal except for the junction capacitor, CDo1=CDo2=CDo3=CDo4=CDo5−CDo6−Cj;
4) The capacitance of switch parasitic capacitor, Cos5, is much larger than the junction capacitance of diode, Cj;
5) The output filter capacitor is large enough to be treated as a constant voltage source with output voltage, Vo;
6) The filter capacitor Cf1 and Cf2 are equal to Cf, and they are large enough to be treated as a constant voltage source, VCf;
7) The output filter inductor is large enough to have no current ripple, ΔiLo=0.
FIG. 3 illustrates a key waveform at a point A, and FIGS. 4A to 4E illustrates current paths for a half period.
In a switching period, there are 10 operating modes that can be divided into two half cycles: t0-t5 (from mode 1 to mode 5) and t5-t11 (from mode 6 to mode 10). The operational principles of two half cycles are symmetric, thereby only the first half cycle is described and operating circuits during the cycle are shown in FIG. 4.
FIG. 4A illustrates a current path in mode 1.
Mode 1 [t0-t1]: The mode 1 begins when the switch Q4 is turned off. And, the mode 1 ends when the the diode Do4 current, IDo4 reaches zero level. Namely, the mode 1 ends when commutation between Do1 and Do4 is over. When the mode 1 starts, the primary side voltage of the transformer T1, VAB is equal to VIN then half-bridge converter (FB) starts to transfer power to the secondary side. Thereby, the diode Do5 is conducted, and voltage stress across the diode Do6 is clamped by 2VCf, wherein the VCf is the voltage of the filter capacitor Cf1 or the voltage of the filter capacitor Cf2 and the 2VCf may be sum of Vcf1 and Vcf2. The diode Do2 is also clamped by 2VCf. The full-bridge converter (FB) also begins to transfer power. By the filter capacitor Cf2, the output voltage of the full-bridge converter (FB) is boosted. During this mode, the switch Q1 maintains on status, and switch Q3 is ZVS (zero-voltage-switching) turn on, but there is no variation on circuit operation by status change of the switch Q3. It is in transient status so that duty cycle loss TDCL is generated. The current slope is gradually decreased due to the reflected voltage, VCf. Thereby, the diode Do3 can be turned off in ZCS (zero-current-switching) condition.
FIG. 4B illustrates a current path in mode 2.
Mode 2 [t1-t2]: The mode 2 is main powering region. The mode 2 begins when the commutation is over, and the mode 2 ends when the switch Q1 is turned off. During the mode 2, switches Q1 and Q3 are in on-state, and diodes Do1 and Do3 are the main powering path. The half-bridge converter (HB) transfers power to the filter capacitor Cf1 through the diode Do5. Thereby, the voltage stress of the diode Do6 is equal to 2VCf. The output voltage of full-bridge converter (FB) is boosted by the filter capacitor Cf2. Thus, the applied voltage of output inductor VLo can be expressed as follows.

VLo=nT1VIN+VCf−Vo.  (1)

The interval of the mode 2 is equal to 0.5Ts−Tφ−TDCL, where Tφ is phase delay time, TDCL is duty cycle loss and Ts is switching interval.
FIG. 4C illustrates a current path in mode 3.
Mode 3 [t2−t3]: The mode 3 is freewheeling region. The mode 3 begins when the switch Q1 is turned off, and the mode 3 ends, the primary side current of the transformer T1, Tpri1 reaches the same magnitude of magnetizing current of the transformer T1, ILm1. During the mode 3, the primary voltage of the transformer T1 is equal to the reflected voltage of the filter capacitor Cf1. It is reverse voltage for Ipri1, thereby the primary side current of the transformer T1, Ipri1 reduces. Namely, the circulating current reduces. The primary current, Ipri1 can be expressed as follows;




  
    
      
        
          
            
              I
              pril
            
            ⁡
            
              (
              t
              )
            
          
          =
          
            
              
                n
                
                  T
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
              ⁢
              
                I
                o
              
            
            -
            
              
                
                  V
                  Cf
                
                
                  
                    L
                    
                      lk
                      ⁢
                      
                        
                      
                      ⁢
                      1
                    
                  
                  ⁢
                  
                    n
                    
                      T
                      ⁢
                      
                        
                      
                      ⁢
                      1
                    
                  
                
              
              ⁢
              
                (
                
                  t
                  -
                  
                    t
                    2
                  
                
                )
              
            
          
        
        ,
      
    
    
      
        (
        2
        )
      
    
  




where Llk1 is leakage inductance of T1.

The voltage stress of Do2 and Do6 are clamped by 2VCf. And, the applied voltage of output inductor Lo, VLO can be expressed as follows.

VLo=2VCf−Vo.  (3)

The voltage across the output inductor Lo in eq. (3) is maintained before a next half-cycle, which starts from mode 6, begins, and the total duration of the voltage in eq. (3) is defined as Tφ+TDCL.
FIG. 4D illustrates a current path in mode 4.
Mode 4 [t3−t4]: Mode 4 begins when Ipri1 reaches ILm1, and the mode 4 ends when the resonance of the half-bridge converter (HB) is over. During the mode 4, the oscillation among output capacitors of Do1 and Do2, and leakage inductance of T1 occurs. The maximum voltage of diodes Do1 and Do2 is clamped under 2VCf. When the phase delay time Tφ is not long enough, the mode 4 will not be exist because the Ipri1 will not be equal to ILm1. Then, the mode 3 may be maintained until the switch Q3 is turned off.
FIG. 4E illustrates a current path in mode 5.
Mode 5 [t4−t5]: The Mode 5 begins when ipri2 reaches ILm2, and the mode 5 ends when the switch Q3 is turned off. The mode 5 is maintained very short time because the switching frequency is almost the same as resonant frequency. Moreover, the controller maintains stationary frequency.
The DC conversion ratio M of the hybrid dc-dc converter 100 can be derived by using the principle of volt-second balance on the output inductor Lo. The conversion ratio equation is expressed as follows.




  
    
      
        
          M
          =
          
            
              
                V
                o
              
              
                V
                IN
              
            
            =
            
              
                n
                
                  T
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
              +
              
                0.5
                ⁢
                
                  n
                  
                    T
                    ⁢
                    
                      
                    
                    ⁢
                    2
                  
                
                ⁢
                G
              
              +
              
                
                  (
                  
                    
                      
                        -
                        2
                      
                      ⁢
                      
                        n
                        
                          T
                          ⁢
                          
                            
                          
                          ⁢
                          1
                        
                      
                    
                    +
                    
                      
                        n
                        
                          T
                          ⁢
                          
                            
                          
                          ⁢
                          2
                        
                      
                      ⁢
                      G
                    
                  
                  )
                
                ⁢
                
                  
                    T
                    φ
                  
                  
                    T
                    s
                  
                
              
            
          
        
        ,
      
    
    
      
        (
        4
        )
      
    
  




where Tφ is phase delay time, TDCL is duty cycle loss, Ts is switching interval, and G is the voltage conversion ratio of the half-bridge converter (HB).

The voltage conversion ratio of the half-bridge converter (HB), G, can be represented as follows.




  
    
      
        
          
            G
            =
            
              
                
                  2
                  ⁢
                  
                    V
                    Cf
                  
                
                
                  
                    n
                    
                      T
                      ⁢
                      
                        
                      
                      ⁢
                      2
                    
                  
                  ⁢
                  
                    V
                    IN
                  
                
              
              =
              
                k
                
                  
                    
                      
                        (
                        
                          1
                          +
                          k
                          -
                          
                            
                              f
                              r
                              2
                            
                            
                              f
                              s
                              2
                            
                          
                        
                        )
                      
                      2
                    
                    +
                    
                      
                        Q
                        2
                      
                      ⁢
                      
                        
                          
                            k
                            2
                          
                          ⁡
                          
                            (
                            
                              
                                
                                  f
                                  s
                                
                                
                                  f
                                  r
                                
                              
                              -
                              
                                
                                  f
                                  r
                                
                                
                                  f
                                  s
                                
                              
                            
                            )
                          
                        
                        2
                      
                    
                  
                
              
            
          
          ,
          where
        
        ⁢
        
          

        
        ⁢
        
          
            Q
            =
            
              
                
                  
                    n
                    
                      T
                      ⁢
                      
                        
                      
                      ⁢
                      2
                    
                  
                  ⁢
                  
                    π
                    2
                  
                
                
                  8
                  ⁢
                  
                    R
                    o
                  
                
              
              ⁢
              
                
                  
                    L
                    r
                  
                  
                    C
                    r
                  
                
              
            
          
          ,
          
            k
            =
            
              
                L
                
                  m
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              
                L
                f
              
            
          
          ,
          
            
              f
              r
            
            =
            
              1
              
                2
                ⁢
                π
                ⁢
                
                  
                    
                      L
                      r
                    
                    ⁢
                    
                      C
                      r
                    
                  
                
              
            
          
          ,
        
      
    
    
      
        (
        5
        )
      
    
  




fs is switching frequency, Ro is output resistance and Lm2 is magnetizing inductor of the transformer T2.
From (4), it can be seen that the output voltage of the hybrid dc-dc converter 100 can be regulated by three ways; frequency modulation method with fixed duty-ratio, phase-shift modulation with stationary frequency, or hybrid phase-shift and frequency modulation.
Among them, the phase-shift modulation with stationary frequency is well known that G is equal to 1.0 when the switching frequency is equal to the resonant frequency. Moreover, there is no variation of voltage gain according to output load condition. Thus, the input to output voltage relation Mnorm_proposed can be expressed as follows;




  
    
      
        
          
            M
            
              norm
              ⁢
              
                
              
              ⁢
              _
              ⁢
              
                
              
              ⁢
              proposed
            
          
          =
          
            
              
                V
                o
              
              
                
                  n
                  
                    T
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
                ⁢
                
                  V
                  IN
                
              
            
            =
            
              
                
                  (
                  
                    2
                    -
                    α
                  
                  )
                
                ⁢
                D
              
              +
              α
            
          
        
        ,
      
    
    
      
        (
        6
        )
      
    
  




where α=nT2/nT1, and D=0.5−Tφ/Ts.

FIG. 5 shows the normalized gain of the hybrid dc-dc converter 100 and conventional PSFB converter. From the FIG. 5, the hybrid dc-dc converter 100 always has higher gain than conventional PSFB converter. As a result, the transformer design with lower turns-ratio is possible in the hybrid dc-dc converter 100 for the transformer of the full-bridge converter (FB), T1.
When the phase-shift modulation is applied, the freewheeling interval is exist. In the freewheeling interval, the primary current circulates on the primary side of converter, and the magnitude of the current is maintained. The circulating current is pinpointed as a significant drawback of the conventional PSFB converter because the conduction power loss is generated by the current. The worst operation status for battery charger is that the battery voltage is minimum value. In the case, the freewheeling interval is maximized due to extension of phase delay time TΦ.
In the hybrid dc-dc converter 100, the circulating current is minimized since the ipri1 is reduced by the reflected voltage of Cf1 as analyzed in mode 3. Thereby, the conduction power loss could be minimized as much as the hatched area in FIG. 3.
However, the ZVS energy for lagging leg switches Q3 and Q4 is also minimized so that the switching loss could be higher. In hybrid dc-dc converter 100, the ipri2 is the other energy source for ZVS of lagging leg switches. At the time when the lagging-leg switches are turned on, the ILm2 has the maximum value. Thereby, the design of half-bridge converter (HB) with the low Lm makes it possible to ensure the ZVS operation of the switches in whole load range unlike the conventional PSFB converter.
The other soft-switching characteristic is ZCS operation. For diodes Do5 and Do6, the ZCS operation is ensured because the half-bridge converter (HB) is a LLC converter and the LLC converter always operates in below-resonant status. In addition, soft-switching characteristic of the diodes Do1 and Do2 can be achieved, but it depends on the phase delay time Tφ. The current of the diodes Do1 and Do2 is reduced during Tφ by the voltage of Cf1 and Cf2 as the same as Ipri1, so that the diodes Do1 and Do2 can operate in ZCS status if the diodes Do1 and Do2 have sufficiently long TΦ.
If the operation status is point C in the FIG. 2, the ZCS operation is rarely achieved because there is no circulating region. However, the current of the diodes Do1 and Do2 is decreased with the slope after switch off as follows;




  
    
      
        
          
            
              d
              
                I
                
                  Do
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
            
            
              d
              t
            
          
          =
          
            
              
                d
                
                  I
                  
                    Do
                    ⁢
                    
                      
                    
                    ⁢
                    2
                  
                
              
              
                d
                t
              
            
            =
            
              
                
                  V
                  IN
                
                ⁢
                
                  
                    V
                    Cf
                  
                  /
                  
                    n
                    
                      T
                      ⁢
                      
                        
                      
                      ⁢
                      1
                    
                  
                
              
              
                
                  n
                  
                    T
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
                ⁢
                
                  L
                  
                    lkg
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
              
            
          
        
        ,
      
    
    
      
        (
        7
        )
      
    
  




where Llkg1 is leakage inductance of T1, IDo1 is the current of the diode Do1 and IDo2 is the current of the diode Do2.

The current slope is slower than one of conventional PSFB converter. For the diodes Do3 and Do4, they have the same characteristic as the diodes Do1 and Do2. Therefore, the hybrid dc-dc converter 100 can minimize the reverse recovery problem on output rectifiers.
For wide ZVS range, the addition of external inductor is required in conventional PSFB converter. However, it is the reason of the large commutation time of primary current and the reduction of effective duty-cycle. To compensate the decreased duty-cycle, the turns-ratio of transformer should have higher value. However, the current stress on primary components and the voltage stress of output rectifiers increase.
Meanwhile, with the hybrid dc-dc converter 100, ZVS range can be extended without the additional external inductor. Thereby, the commutation time of primary current is affected by only leakage inductance so that the duty-cycle loss TDCL can be minimized. Thus, the duty-cycle, generated from signal processor, is considered as the effective duty-cycle. As a result, the transformer T1 for the full-bridge converter (FB) on the hybrid dc-dc converter 100 can be designed to be more profitable than the conventional PSFB converter.
The transformers T1 and T2 for the hybrid dc-dc converter 100 are designed with the voltage conversion ratio as shown in FIG. 5. The FIG. 5 shows the normalized voltage conversion ratio as per duty ratio, based on the assumption that the nT1 is equal to 1.0 and the G is equal to 1.0. It is noted that the required voltage conversion ratio is possible to be achieved when the ratio of nT2 to nT1, α, is higher than 0.5, if the effective duty ratio is 0.4. As a result, the nT1 and nT2 can be designed as 1.0 and 0.5 respectively. If the nT2 is equal to 0.5, the voltage of the filter capacitor Cf1 and the filter capacitor Cf2 is one-fourth of VIN. Thereby, the voltage stress of the diodes Do5 and Do6 is clamped under half of VIN, and the schottky diode can be applied. Moreover, the value of nT1 is twice of nT2, which can make the current driven by T1 and T2 to have the same magnitude.
The FIG. 6 shows the rectifier voltage of the conventional PSFB converter and the hybrid dc-dc converter.
The FIG. 6a shows the rectifier voltage of the conventional PSFB converter, and the FIG. 6b shows the rectifier voltage of the hybrid dc-dc converter.
For the conventional PSFB converter, the voltage applied on the output inductor Lo is zero during the freewheeling region, while the sum of VCf and nT2VIN is applied to Lo in the hybrid dc-dc converter (100). For two converters, the peak current ripple of output inductor can be expressed as follows;




  
    
      
        
          Δ
          ⁢
          
            
          
          ⁢
          
            I
            
              Lo
              ,
              
                Conv
                .
              
            
          
        
        =
        
          
            2
            ⁢
            
              n
              
                T
                ⁢
                
                  
                
                ⁢
                1
              
            
            ⁢
            
              D
              ⁡
              
                (
                
                  0.5
                  -
                  D
                
                )
              
            
            ⁢
            
              V
              IN
            
          
          
            
              L
              o
            
            ⁢
            
              f
              s
            
          
        
      
    
    
      
        (
        8
        )
      
    
  
  
    
      
        
          Δ
          ⁢
          
            
          
          ⁢
          
            I
            
              Lo
              ,
              
                Prop
                .
              
            
          
        
        =
        
          
            
              
                
                  n
                  
                    T
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
                ⁡
                
                  (
                  
                    1
                    +
                    
                      0.5
                      ⁢
                      α
                    
                  
                  )
                
              
              ⁢
              
                DV
                IN
              
            
            -
            
              DV
              o
            
          
          
            2
            ⁢
            
              L
              o
            
            ⁢
            
              f
              s
            
          
        
      
    
    
      
        (
        9
        )
      
    
  




Where ILo,Conv is the current of output inductor in the conventional PSFB converter and ILc,Prop is the current of output inductor in the hybrid dc-dc converter.

With the condition that fs=100 KHz, Lo=500 μH, and D=0.4, the current ripple of output filter inductor can be represented as FIG. 7. From the result, it is noted that the peak current ripple of the hybrid dc-dc converter 100 is one-fourth of the conventional PSFB converter. As a result, the hybrid dc-dc converter (100) can use smaller size of output filter inductor than the conventional PSFB converter.
Further, the terms “includes”, “constitutes”, or “has” mentioned above mean that a corresponding structural element is included unless they have no reverse meaning. Accordingly, it should be interpreted that the terms may not exclude but further include other structural elements. All the terms that are technical, scientific or otherwise agree with the meanings as understood by a person skilled in the art unless defined to the contrary. Common terms as found in dictionaries should be interpreted in the context of the related technical writings not too ideally or impractically unless the present disclosure expressly defines them so.
Although the embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention. Accordingly, the embodiments disclosed in the present invention are merely to not limit but describe the technical spirit of the present invention. Further, the scope of the technical spirit of the present invention is not limited by the embodiments. The scope of the present invention shall be construed on the basis of the accompanying claims in such a manner that all of the technical ideas included within the scope equivalent to the claims belong to the present invention.

## Claims

1. A hybrid dc-dc converter comprising:
a pair of transformers configured to magnetically couple a primary side to a secondary side;
a full-bridge converter including four switches, a first diode and a second diode connected to a third leg in series, a third diode and a fourth diode connected to a fourth leg in series, and a first transformer, wherein the four switches include two pairs of switches, the two pairs being connected to a first leg and a second leg in series, respectively, the first leg and the second leg are located at the primary side, and the third leg and the fourth leg are located at the secondary side; and
a half-bridge converter including two switches connected to the second leg in series among the four switches, a resonant inductor, a resonant capacitor, a fifth diode and a sixth diode connected to the fourth leg in series, two filter capacitors, and a second transformer,
wherein a secondary side of the first transformer and a secondary side of the second transformer are connected to each other in series; and
the third diode, the fourth diode, the fifth diode, and the sixth diode are connected to each other in series in a same direction.

2. The hybrid dc-dc converter of claim 1, wherein a first filter capacitor among the two filter capacitors has one side connected to the second transformer and the other side connected to the fifth diode.

3. The hybrid dc-dc converter of claim 2, wherein the fifth diode voltage is clamped by a sum of the first filter capacitor voltage and a second filter capacitor voltage.

4. The hybrid dc-dc converter of claim 2, wherein the first filter capacitor has one side connected to the second transformer and the other side connected to a contact point where the fourth diode and the fifth diode meet each other,
a second filter capacitor has one side connected to a contact point where the secondary side of the first transformer and the secondary side of the second transformer meet each other and has the other side connected to a contact point where the third diode and the sixth diode meet each other.

5. The hybrid dc-dc converter of claim 1, wherein the two filter capacitors are connected to each other in series, having one side connected to the third diode, and the other side connected to the fourth diode, and a contact point between the two filter capacitors is connected to the first transformer.

6. The hybrid dc-dc converter of claim 4, wherein the second diode voltage is clamped by a sum of the first filter capacitor voltage and the second filter capacitor voltage.

7. The hybrid dc-dc converter of claim 1, wherein an output of the secondary side is controlled by a substantial constant current or a substantial constant voltage.

8. The hybrid dc-dc converter of claim 1, wherein the half-bridge converter operates as an LLC resonant converter together with a magnetizing inductor of the second transformer, the resonant inductor, and the resonant capacitor.

9. The hybrid dc-dc converter of claim 1, wherein, the full-bridge converter is regulated by frequency modulation with a fixed duty-ratio, phase-shift modulation with a stationary frequency, or hybrid phase-shift and frequency modulation.

10. The hybrid dc-dc converter of claim 1, wherein a switching frequency for the four switches is same as a resonant frequency between the resonant inductor and the resonant capacitor.

11. The hybrid dc-dc converter of claim 1, wherein a ratio of a turns-ratio of the second transformer to a turns-ratio of the first transformer is higher than 0.5.

12. The hybrid dc-dc converter of claim 11, wherein the turns-ratio of the second transformer is substantially same as 0.5.

13. The hybrid dc-dc converter of claim 11, wherein the hybrid dc-dc converter is applied to a battery charger.

14. A hybrid dc-dc converter comprising:
a pair of transformers configured to magnetically couple a primary side to a secondary side;
a full-bridge converter including four switches constituting a full-bridge inverter circuit, and a first transformer; and
an LLC resonant converter including a resonant inductor, a resonant capacitor, and a second transformer, which constitute an LLC resonant circuit,
wherein an output of the full-bridge converter and an output of the LLC resonant converter are connected to each other in series at the secondary side;
wherein two legs are located at the secondary side,
a first diode and a second diode are connected to a first leg among the two legs in series,
third to sixth diodes are successively connected to a second leg among the two legs in series, and
a secondary side of the second transformer has one side connected to a secondary side of the first transformer and has the other side connected to a contact point between the fourth diode and the fifth diode.

15. The hybrid dc-dc converter of claim 14, wherein a secondary side of the first transformer and a secondary side of the second transformer are connected to each other in series.

16. The hybrid dc-dc converter of claim 14, wherein the full-bridge converter further includes four diodes, constituting a full-bridge rectifying circuit, at the secondary side.

17. The hybrid dc-dc converter of claim 16, wherein two diodes among the four diodes located at the secondary side of the full-bridge converter and two output diodes located at a secondary side of the LLC resonant converter are connected to each other in series.