# Patent

## Title
Incremental deployment and execution of a program on an embedded device

## Abstract

System and method for deploying and executing a program, e.g., a graphical program, on an embedded device. The program and a plurality of execution system components are stored on a host computer. The program is analyzed programmatically to determine a subset of the plurality of components required for execution of the program. The subset of components and the program are combined into a file while preserving execution order of the program. The file is transmitted to the device. The file is used to construct a combined program which includes executable code for the program and the subset of components. The device includes a minimal execution engine which executes the subset of components to execute the program. The file may be streamed to the device for streaming execution, where received portions of the subset of components needed for execution of received portions of the program are stored until no longer needed.

## Background
CONTINUATION AND PRIORITY DATA
This application is a divisional application of U.S. patent application Ser. No. 10/283,548 titled “Deployment and Execution of a Program on an Embedded Device,” filed Oct. 30, 2002 now U.S. Pat. No. 8,074,201, whose inventors are Marius Ghercioiu, Ciprian Ceteras, Ioan Monoses, Gratian I. Crisan, and Jeffrey L. Kodosky, which claims priority of U.S. Provisional Patent Application Ser. No. 60/394,895 titled “Deployment and Execution of a Program on an Embedded Device”, filed Jul. 10, 2002, whose inventors were Marius Ghercioiu, Ciprian Ceteras, Ioan Monoses, Gratian I. Crisan, and Jeffrey L. Kodosky, and which are all hereby incorporated by reference in their entirety as though fully and completely set forth herein.


COPYRIGHT NOTICE
A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by any one of the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
FIELD OF THE INVENTION
The present invention relates to the field of programming, and more particularly to a system and method for executing a program, such as a graphical program, on an embedded device. A componentized program execution system is described. A method is also presented for streaming execution of a program by a minimal embedded execution system.
DESCRIPTION OF THE RELATED ART
Traditionally, high level text-based programming languages have been used by programmers in writing application programs. Many different high level programming languages exist, including BASIC, C, Java, FORTRAN, Pascal, COBOL, ADA, APL, etc. Programs written in these high level languages are translated to the machine language level by translators known as compilers or interpreters. The high level programming languages in this level, as well as the assembly language level, are referred to herein as text-based programming environments.
Increasingly, computers are required to be used and programmed by those who are not highly trained in computer programming techniques. When traditional text-based programming environments are used, the user's programming skills and ability to interact with the computer system often become a limiting factor in the achievement of optimal utilization of the computer system.
There are numerous subtle complexities which a user must master before he can efficiently program a computer system in a text-based environment. The task of programming a computer system to model or implement a process often is further complicated by the fact that a sequence of mathematical formulas, steps or other procedures customarily used to conceptually model a process often does not closely correspond to the traditional text-based programming techniques used to program a computer system to model such a process. In other words, the requirement that a user program in a text-based programming environment places a level of abstraction between the user's conceptualization of the solution and the implementation of a method that accomplishes this solution in a computer program. Thus, a user often must substantially master different skills in order to both conceptualize a problem or process and then to program a computer to implement a solution to the problem or process. Since a user often is not fully proficient in techniques for programming a computer system in a text-based environment to implement his solution, the efficiency with which the computer system can be utilized often is reduced.
Examples of fields in which computer systems are employed to interact with physical systems are the fields of instrumentation, process control, industrial automation, and simulation. Computer measurement and control of devices such as instruments or industrial automation hardware has become increasingly desirable in view of the increasing complexity and variety of instruments and devices available for use. However, due to the wide variety of possible testing and control situations and environments, and also the wide array of instruments or devices available, it is often necessary for a user to develop a custom program to control a desired system.
As discussed above, computer programs used to control such systems traditionally had to be written in text-based programming languages such as, for example, assembly language, C, FORTRAN, BASIC, etc. Traditional users of these systems, however, often were not highly trained in programming techniques and, in addition, text-based programming languages were not sufficiently intuitive to allow users to use these languages without training. Therefore, implementation of such systems frequently required the involvement of a programmer to write software for control and analysis of instrumentation or industrial automation data. Thus, development and maintenance of the software elements in these systems often proved to be difficult.
U.S. Pat. Nos. 4,901,221; 4,914,568; 5,291,587; 5,301,301; and 5,301,336; among others, to Kodosky et al disclose a graphical system and method for modeling a process, i.e., a graphical programming environment which enables a user to easily and intuitively model a process. The graphical programming environment disclosed in Kodosky et al can be considered a higher and more intuitive way in which to interact with a computer. A graphically based programming environment can be represented at a level above text-based high level programming languages such as C, Basic, Java, etc.
The method disclosed in Kodosky et al allows a user to construct a diagram using a block diagram editor. The block diagram may include a plurality of interconnected icons such that the diagram created graphically displays a procedure or method for accomplishing a certain result, such as manipulating one or more input variables and/or producing one or more output variables. In response to the user constructing a diagram or graphical program using the block diagram editor, data structures and/or program instructions may be automatically constructed which characterize an execution procedure that corresponds to the displayed procedure. The graphical program may be compiled or interpreted by a computer.
Therefore, Kodosky et at teaches a graphical programming environment wherein a user places or manipulates icons and interconnects or “wires up” the icons in a block diagram using a block diagram editor to create a graphical “program.” A graphical program for performing an instrumentation, measurement or automation function, such as measuring a Unit Under Test (UUT) or device, controlling or modeling instruments, controlling or measuring a system or process, or for modeling or simulating devices, may be referred to as a virtual instrument (VI). Thus, a user can create a computer program solely by using a graphically based programming environment. This graphically based programming environment may be used for creating virtual instrumentation systems, modeling processes, control, simulation, and numerical analysis, as well as for any type of general programming.
A graphical program may have a graphical user interface. For example, in creating a graphical program, a user may create a front panel or user interface panel. The front panel may include various graphical user interface elements or front panel objects, such as user interface controls and/or indicators, that represent or display the respective input and output that will be used by the graphical program or VI, and may include other icons which represent devices being controlled. The front panel may be comprised in a single window of user interface elements, or may comprise a plurality of individual windows each having one or more user interface elements, wherein the individual windows may optionally be tiled together. When the controls and indicators are created in the front panel, corresponding icons or terminals may be automatically created in the block diagram by the block diagram editor. Alternatively, the user can place terminal icons in the block diagram which may cause the display of corresponding front panel objects in the front panel, either at edit time or later at run time. As another example, the front panel may comprise front panel objects, e.g., the GUI, embedded in the block diagram.
During creation of the block diagram portion of the graphical program, the user may select various function nodes or icons that accomplish his desired result and connect the function nodes together. For example, the function nodes may be connected in one or more of a data flow, control flow, and/or execution flow format. The function nodes may also be connected in a “signal flow” format, which is a subset of data flow. The function nodes may be connected between the terminals of the various user interface elements, e.g., between the respective controls and indicators. Thus the user may create or assemble a graphical program, referred to as a block diagram, graphically representing the desired process. The assembled graphical program may be represented in the memory of the computer system as data structures and/or program instructions. The assembled graphical program, i.e., these data structures, may then be compiled or interpreted to produce machine language that accomplishes the desired method or process as shown in the block diagram.
Input data to a graphical program may be received from any of various sources, such as from a device, unit under test, a process being measured or controlled, another computer program, or from a file. Also, a user may input data to a graphical program or virtual instrument using a graphical user interface, e.g., a front panel as described above. The input data may propagate through the block diagram or graphical program and appear as changes on the output indicators. In an instrumentation application, the front panel can be analogized to the front panel of an instrument. In an industrial automation application the front panel can be analogized to the MMI (Man Machine Interface) of a device. The user may adjust the controls on the front panel to affect the input and view the output on the respective indicators. Alternatively, the user interface may be used merely to view the input and output, or just the output, and the input may not be interactively manipulable by the user during program execution.
Thus, graphical programming has become a powerful tool available to programmers. Graphical programming environments such as the National Instruments LabVIEW product have become very popular. Tools such as LabVIEW have greatly increased the productivity of programmers, and increasing numbers of programmers are using graphical programming environments to develop their software applications. In particular, graphical programming tools are being used for test and measurement, data acquisition, process control, man machine interface (MMI), supervisory control and data acquisition (SCADA) applications, simulation, image processing/machine vision applications, and motion control, among others.
In parallel with the development of the graphical programming model, embedded measurement and control systems have been developed for a wide variety of applications, such as automated manufacturing and remote data collection, among others. However, in many prior art systems it is often the case that the memory footprint of an application, e.g., a program, e.g., a graphical program, is too large to be stored and executed on an embedded device. This situation may be exacerbated by the fact that an execution system and/or operating system required to execute the application may also have a relatively large footprint in the target embedded device, thereby limiting further the applications which may be run on the device.
Therefore, improved systems and methods are desired for executing programs on embedded devices.
SUMMARY OF THE INVENTION
One embodiment of the present invention comprises a system and method for deploying and executing a program, e.g., a graphical program, on an embedded device. The system may include a host computer system coupled to a target embedded device over a network or other transmission means. The program may be created on the computer system and transmitted to the embedded device for execution.
In one embodiment, the program that is created on the computer system may require use of an execution system to execute the program. For example, the program may require an operating system or similar software to execute. As another example, in one embodiment, the program is a graphical program and requires a graphical program execution system to execute. Due to the small allowable footprint of the target device, in one embodiment, the program execution system is configured in such a way so as to only transmit the minimum amount of the program execution system (e.g., a portion of a modular callback system) actually required by the program that is being executed. Thus, in one embodiment, the program execution system is partitioned into a (minimal) base execution system, and a plurality of components for enabling execution of different program functionality. The base portion of the program execution system may only be capable of executing the very simplest commands. This minimal system may comprise the smallest set of commands which allows the other components to be executed. The base portion of the program execution system may be stored on the target device, and only the required components (as determined based on the program to be executed) may be transmitted to the target device, e.g., on an as-needed basis.
In one embodiment, when the program is developed by the user, a software program executing on the computer may operate to analyze the program to determine the functionality contained in the program. Once the functionality of the program has been identified, the program uses the functionality to determine which of the respective components of the program execution system are actually required by the program. In one embodiment, the method determines the functionality of the program, and uses the functionality to index into a data structure or look-up table to determine which program execution system components will be required to execute this program. When the program is then transmitted or deployed to target device, the computer system may operate to only provide the program execution system base portion (if the base portion is not already resident on the target device) and the respective components that are actually required to execute the program. Thus, a smaller amount of execution system code may be transmitted to the target device. This allows a smaller footprint for one or more of the target devices and/or the sensor devices. In other words, the target device may include a smaller processor and/or a smaller memory medium since a full program execution system is not required to be transmitted.
In one embodiment, after the software program analyzes the program to determine the functionality contained in the program, an execution system analysis program may determine which execution system components are required for execution of the program. A deployment program may then assemble the required components of the execution system and the program, for example, by interspersing the required execution system components and the program together according to the order of execution of the program. These interspersed program execution system components and program may then be assembled into a file (e.g., a flatfile or “deployment file”), and respective portions of the file may be transmitted to the target device for execution. The file may optionally be compressed prior to transmission.
In one embodiment, the flatfile may be received by the target device and used to construct a combined program including executable code from the program and executable code from the required execution system. This combined program may then be executed by the embedded device. The combined program may also be stored in non-volatile memory of the embedded device for subsequent execution.
In one embodiment, successive portions of the file may be streamed to the target device and/or sensor device for dynamic execution. In other words, the target device may execute the program as it is streamed to the device. For example, the device may receive a first portion of the file comprising a first portion of a program to be executed and a first portion of the execution system components that are used for executing this first portion of the program. After this first portion of the program has been executed along with the first portion of the execution system components, the first portion of the program may be flushed or removed from the memory of the sensor device. In a similar manner, the execution system components that are no longer required may be also removed from the memory. However, execution system components that may be required by other portions of the program to be executed may be retained in the memory for execution. In one embodiment, the deployment program determines which execution system components may be required for a plurality of different portions of the program, and includes a variable or data structure or other indication with the execution system component to indicate that this component should not be flushed immediately after it has been executed, but rather should be retained by the target device for execution with another part of the program. Thus, the target device may maintain a type of “component buffer” for temporarily storing execution system components that are required later by other parts of the program (or by subsequent programs to be executed).
After the first portion of each of the program execution components and the program has been executed, the computer system and/or target device may then provide a second portion of the program interspersed with the second portion of the execution system components. The second portion of the file may be provided by the computer system to the target device. Operation then proceeds as above. Thus, for example, the computer system may operate to provide respective portions of the deployment file to the target device for execution on an as needed basis, based on the memory availability or memory capacity of the target device. The target device may receive a portion of the program that it is supposed to execute along with the execution system components used by that portion of the program, execute the program under direction of the execution system components, and then receive further portions of the deployment file, and so forth. Thus, the computer system may essentially provide a stream of the program and its corresponding execution system components to the target device according to the order of execution of the program.



BRIEF DESCRIPTION OF THE DRAWINGS
A better understanding of the present invention can be obtained when the following detailed description of the preferred embodiment is considered in conjunction with the following drawings, in which:
FIGS. 1A and 1B illustrate embodiments of a system for execution of a program in a minimal embedded system;
FIG. 2 is a block diagram of the system of FIG. 1A, according to one embodiment;
FIG. 3 is a block diagram of the computer system of FIGS. 1A, 1B, and 2, according to one embodiment;
FIG. 4A is a hardware layout of a minimal embedded system, according to one embodiment;
FIG. 4B illustrates the embedded target device of FIG. 4A, according to one embodiment;
FIG. 4C illustrates another example of an embedded target device, according to one embodiment;
FIG. 5 illustrates a minimal execution system, according to one embodiment;
FIG. 6 flowcharts a method for creating the minimal execution system of FIG. 5, according to one embodiment;
FIG. 7 graphically illustrates componentization of a callback system, according to one embodiment;
FIG. 8 flowcharts one embodiment of a method for componentizing a callback system to generate a modular callback system;
FIG. 9 illustrates a process of generating a flatfile from a program and the modular callback system, according to one embodiment;
FIG. 10 flowcharts one embodiment of a method for generating the program flatfile;
FIGS. 11A-11C illustrate the structure and deployment of the program flatfile, according to one embodiment;
FIG. 12 flowcharts one embodiment of a method for deploying and executing a program on an embedded device; and
FIGS. 13-46 are screen shots of graphical program source code which may implement one embodiment of the invention.



While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to limit the invention to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the present invention as defined by the appended claims.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Incorporation by Reference
The following references are hereby incorporated by reference in their entirety as though fully and completely set forth herein:

    U.S. Provisional Patent Application Ser. No. 60/394,895 titled “Deployment and Execution of a Program on an Embedded Device”, filed Jul. 10, 2002.
    U.S. Pat. No. 4,914,568 titled “Graphical System for Modeling a Process and Associated Method,” issued on Apr. 3, 1990.
    U.S. Pat. No. 5,481,741 titled “Method and Apparatus for Providing Attribute Nodes in a Graphical Data Flow Environment”.
    U.S. Pat. No. 6,173,438 titled “Embedded Graphical Programming System” filed Aug. 18, 1997.
    U.S. Pat. No. 6,219,628 titled “System and Method for Configuring an Instrument to Perform Measurement Functions Utilizing Conversion of Graphical Programs into Hardware Implementations,” filed Aug. 18, 1997.
    U.S. patent application Ser. No. 09/617,600 titled “Graphical Programming System with Distributed Block Diagram Execution and Front Panel Display,” filed Jun. 13, 2000.
    U.S. patent application Ser. No. 09/518,492 titled “System and Method for Programmatically Creating a Graphical Program,” filed Mar. 3, 2000.
    U.S. patent application Ser. No. 09/745,023 titled “System and Method for Programmatically Generating a Graphical Program in Response to Program Information,” filed Dec. 20, 2000.
    The LabVIEW graphical programming manuals, including the “G Programming Reference Manual”, available from National Instruments Corporation, are also hereby incorporated by reference in their entirety.

FIGS. 1A and 1B—Embedded Systems



FIGS. 1A and 1B illustrate embodiments of an embedded system for executing programs. As shown in FIG. 1A, the system may include a computer system 102 coupled through a network 104 (or other transmission medium) to an embedded device 110, also referred to as a target device 110. In other embodiments, such as illustrated in FIG. 1B, the computer system 102 may be coupled to the target device 110 via an intermediate hub 108, which may communicate with the computer system 102 over the network 102, and which may communicate with the target device 110 via wireless means.
The computer system 102 may be any of various types of computer systems. Computer system 102 may include a processor, a memory medium, as well as other components as may typically be found in a computer system. The memory medium of the computer system may store a program development environment for creating programs. The computer system 102 is described in more detail below with reference to FIG. 3. As used herein, the term program is intended to include text-based or graphical instructions which are executable, compilable, and/or interpretable by a processor or programmable hardware element (such as a Field Programmable Gate Array (FPGA)) to perform a specified function or functions.
In one embodiment, the program development environment is a graphical program development environment for creating graphical programs. An exemplary graphical program development environment is the LabVIEW development environment offered by National Instruments Corporation. A user may create a program on a computer system, and computer system 102 may provide the program to target embedded device 110, optionally via hub device 108.
Target device 110 may include a processor and memory medium for executing programs, such as graphical programs. In one embodiment, the target device 110 executes programs, e.g., graphical programs, received from the computer system over the network 104. In another embodiment, the computer system 102 sends the program to the hub device 108 over the network 104, and the hub device 108 operates to deploy the programs to the target device 110 in a wireless fashion, and the program executes on target device 110. It should be noted that in various embodiments, the target device 110 may be implemented in different devices, such as, for example, a device with an ARM processor, as described below, a PXI chassis which includes an embedded device card, or any other processor based device suitable for embedded systems. One exemplary target device 110 is a smart sensor (e.g., a smart camera).
In one embodiment, the target device 110 may include a programmable hardware element, such as an FPGA. The target device 110 may be operable to receive a hardware configuration file, e.g., a netlist, which encodes a desired functionality, and to deploy the hardware configuration file to the FPGA, thereby configuring the FPGA to perform the desired functionality.
Target device 110 may be connected to computer system 102 by a network 104 as shown. The network may be comprised of any of the various types of networks including local area networks (LAN), wide area networks (WAN), etc. One example of a wide area network is the Internet. Target device 110 may also connect to computer system 102 through other communication mediums, such as a serial bus, e.g., USB or IEEE 1394, a parallel bus, or through wireless means. The wireless communication mechanism may comprise any of various types of wireless transmission, including Blue Tooth, IEEE 802.11 (wireless Ethernet), RF communication, and other types of wireless communications, such as, for example, communication via satellite, and cell towers, such as used for cellular telephone communication, among others. In various embodiments, the target device 110 may include or may be coupled to one or more sensors or actuators. For example, the target device may include a radio and may be coupled to a sensor via wireless means. In one embodiment, one or more of the sensors coupled to the target device 110 may be smart sensors, i.e., may include a processor and memory (and/or a programmable hardware element, such as an FPGA), and therefore may be operable to execute program code and/or receive commands from the target device 110 as a result of execution of the program code.
Embedded Devices
As mentioned above, in various embodiments of the present invention, an embedded device 110 may be coupled to the host computer 102. As used herein, the term “embedded device” refers to a small platform which includes dedicated hardware, and which includes a processor and memory (or FPGA) on which may be installed dedicated programs or software. An embedded device is typically designed to perform a defined task very well. In particular, an embedded device is typically not a device with general capabilities, such as a PC or PXI controller, for example, loaded with one or several plug-in boards, running a Microsoft OS with generous amounts of memory, system files, utilities, etc, that can be used as a measurement system, or as an office computer, or as a Web browser, etc. An example of an embedded system is an Internet remote camera, with dedicated hardware and software that implements the following tasks:

    
    
        it acquires images from the optical device,
        it compresses these images as GIF or JPEG files, or perhaps as MPEG streams, and
        it sends the images to a host computer upon request, using TCP/IP, HTTP, or multimedia streams.
    
    


Other examples of embedded devices include a measurement device with a specific type of measurement hardware and/or software for taking certain measurements, a control measurement device with a specific type of hardware and/or software for performing certain control operations, etc.
The end user does not care about how these tasks are implemented, but only wants a device that sends real-time images over the Internet. Embedded systems are often used as building blocks for more complicated applications. Thus, an embedded device generally includes both hardware and software. Additionally, embedded devices are generally built around a specialized hardware component, which is the “reason to exist” for these devices (like the camera in the above example). Other typical components include: a processor, such as an ARM processor, RAM and ROM memory, a storage medium, a display, one or more communication devices, and power and over-voltage protection components. Generally, flash memory is used for data storage in addition to RAM.
FIG. 2—Block Diagram of the Data Acquisition System
FIG. 2 is a block diagram of the system of FIG. 1A, according to one embodiment. In the embodiment shown in FIG. 2, the computer system 102 includes a program development environment 201, e.g., a graphical program development environment, which facilitates development of programs, e.g., graphical programs, for implementing desired functions or operations, as well as a program execution system 203, also referred to as the execution system 203. The execution system 203 may be operable to execute programs developed with the program development environment 201 (or other program development environments).
As used herein, the term “execution system” may include at least one software program that is designed to execute a certain class of programs. For example, LabVIEW programs utilize an execution system (a LabVIEW graphical program execution engine) that executes in a system in order to execute LabVIEW graphical programs.
As will be described in more detail below, the execution system 203 may include a componentized or modular architecture, e.g., a componentized callback system, stored on the computer system for partial transfer to an external device, e.g., the target device 110. In other words, the functions of the execution system 203 may be organized into modular components which may be operable to be transferred entirely or in part to the target embedded device 110 to facilitate execution of programs on the target embedded device 110. In many of the embodiments described herein, the systems and methods are described in terms of graphical programs, although it should be noted that the invention is broadly applicable to other types of programs as well, e.g., text-based programs, etc., and is not intended to be limited to graphical programs.
As FIG. 2 also shows, the computer system 102 may also store one or more programs 202 (e.g., graphical programs) which are executable via the execution system 203 (or portions thereof) to perform specified functions or operations, as desired. In the embodiment shown, the graphical program 202 may be stored for transferal to the target embedded device 110 for execution. As will also be described in more detail below, various components of the execution system 203 may be combined with respective portions of the graphical program 201 for transferal to the target device 110 for execution. The computer system 102 may also include a network interface 204 for communicating over the network 104 with devices on the network 104. For example, the network interface 204 may be an Ethernet interface for communicating over the Internet 104. Further details of the computer system 102 are provided below with reference to FIG. 3.
In an alternate embodiment, the graphical program 201 may be provided from a first computer, and components of the execution system 203 necessary for execution of this graphical program may be provided from a second different computer system.
In the embodiment of FIG. 2, the target device 110 includes an operating system 210, e.g., a real-time operating system (OS), for managing program execution, managing device resources, and communications in embedded devices, as is well known in the art. Examples of real-time operating systems 210 include, but are not limited to, Linux, NetBSD, vxWorks, eCos, and Windows CE. Due to size and performance issues, the eCos real-time operating system may be particularly suitable for use in the embedded target device 110, although other real-time operating systems are also contemplated. The target device 110 may also include a target execution system (or “minimal execution system”) 205, which preferably is a minimal embedded graphical program execution system 205, and which may include a subset of the execution system 203 stored on the computer system 102, mentioned above. The minimal execution system 205 may be optimized to minimize the memory footprint on the target device 110, as described below with reference to FIG. 5. In one embodiment, the minimal execution system 205 may comprise an execution system virtual machine. The minimal execution system 205 may facilitate execution of graphical program(s) 202 by the target device 110. More specifically, the graphical program 202 stored on the computer system 102 may be combined with one or more components of the componentized callback system of execution system 203 to generate a flatfile 207 which may be transferred to the target embedded device 110. The flatfile 207 may be directly executable by the target device 110. Alternatively, the flatfile 207 may be used in constructing a combined program 202A on the target device 110, wherein the combined program 202A may be executed on the target device 110. The flatfile 207 and the combined program 202A are described in detail below. The target embedded device 110 may also include software for performing various functions related to the present invention, such as a program linker/loader, which in various embodiments may be comprised in the real-time OS, the minimal execution system 205, or may be stored and executed as a separate program. The structure and processing of the flatfile 207 according to one embodiment are described in detail below with reference to FIGS. 11A-11C.
FIG. 3—Computer System Block Diagram
FIG. 3 is a block diagram for a computer system 102 suitable for implementing various embodiments of the present invention. More specifically, the computer system 102 may be operable to store and download to the target device 110 a graphical program that is configured to perform a specified function. Embodiments of a method for transmitting and executing the graphical program are described below. The computer system 102 may be any type of computer system, including a personal computer system, mainframe computer system, workstation, network appliance, Internet appliance, personal digital assistant (PDA), television system or other device. In general, the term “computer system” can be broadly defined to encompass any device having at least one processor that executes instructions from a memory medium. The computer may include at least one central processing unit or CPU 160 which is coupled to a processor or host bus 162. The CPU 160 may be any of various types, including an x86 processor, e.g., a Pentium class, a PowerPC processor, a CPU from the SPARC family of RISC processors, as well as others.
The computer system 102 may include a memory medium(s) 166 on which one or more computer programs or software components according to one embodiment of the present invention may be stored. For example, the memory medium may store a graphical program execution system, as well as one or more graphical programs, as described above. Also, the memory medium may store a graphical programming development environment application used to create and/or execute such graphical programs. The memory medium may also store operating system software, as well as other software for operation of the computer system.
The term “memory medium” is intended to include an installation medium, e.g., a CD-ROM, floppy disks 104, or tape device; a computer system memory or random access memory such as DRAM, SRAM, EDO RAM, Rambus RAM, etc.; or a non-volatile memory such as a magnetic media, e.g., a hard drive, or optical storage. The memory medium may comprise other types of memory as well, or combinations thereof. In addition, the memory medium may be located in a first computer in which the programs are executed, or may be located in a second different computer which connects to the first computer over a network, such as the Internet. In the latter instance, the second computer may provide program instructions to the first computer for execution.
Various embodiments further include receiving or storing instructions and/or data implemented in accordance with the foregoing description upon a carrier medium. Suitable carrier media include a memory medium as described above, as well as signals such as electrical, electromagnetic, or digital signals, conveyed via a communication medium such as networks and/or a wireless link.
As FIG. 3 shows, the memory medium 166 may be coupled to the host bus 162 by means of memory controller 164. The host bus 162 may be coupled to an expansion or input/output bus 170 by means of a bus controller 168 or bus bridge logic. The expansion bus 170 may be the PCI (Peripheral Component Interconnect) expansion bus, although other bus types can be used. The expansion bus 170 includes slots for various devices, such as a network interface card 114, a video display subsystem 180, and hard drive 1102 coupled to the expansion bus 170.
In the present application, the term “graphical program” or “block diagram” is intended to include a program comprising graphical code, e.g., two or more interconnected nodes or icons, wherein the interconnected nodes or icons may visually indicate the functionality of the program. The nodes may be connected in one or more of a data flow, control flow, and/or execution flow format. The nodes may also be connected in a “signal flow” format, which is a subset of data flow. Thus the terms “graphical program” or “block diagram” are each intended to include a program comprising a plurality of interconnected nodes or icons which visually indicate the functionality of the program.
A graphical program may also comprise a user interface or front panel. The user interface portion may be contained in the block diagram or may be contained in one or more separate panels or windows. The user interface of a graphical program may include various graphical user interface elements or front panel objects, such as user interface controls and/or indicators, that represent or display the respective input and/or output that will be used by the graphical program or VI, and may include other icons which represent devices being controlled. The user interface or front panel may be comprised in a single window of user interface elements, or may comprise a plurality of individual windows each having one or more user interface elements, wherein the individual windows may optionally be tiled together. As another example, the user interface or front panel may comprise user interface or front panel objects, e.g., the GUI, embedded in the block diagram. The user interface of a graphical program may display only output, only input, or both input and output. Further, in some embodiments the user interface operates as a front panel, wherein the user can interactively control or manipulate the input being provided to the graphical program during program execution and can view resulting output.
Examples of graphical programming development environments that may be used to create graphical programs include LabVIEW, DasyLab, and DiaDem from National Instruments, VEE from Agilent, WiT from Coreco, Vision Program Manager from PPT Vision, SoftWIRE from Measurement Computing, Simulink from the MathWorks, Sanscript from Northwoods Software, Khoros from Khoral Research, SnapMaster from HEM Data, VisSim from Visual Solutions, ObjectBench by SES (Scientific and Engineering Software), and VisiDAQ from Advantech, among others. In the preferred embodiment, the system uses the LabVIEW graphical programming system available from National Instruments.
FIG. 4A—Embedded Device Hardware Configuration
FIG. 4A illustrates a hardware configuration of one embodiment of a target embedded device, as shown in FIGS. 1A, 1B, and 2. It should be noted that the embodiment shown is intended to be exemplary only, and is not meant to limit the target embedded device to any particular architecture, components, size, or form.
In the embodiment shown in FIG. 4, the target embedded device 110 may include an I/O connector 402 coupled to a 4-channel multiplexer (MUX) 402, connected to a 4-channel 16-bit ADC 408, a temperature sensor 404, a micro-controller with internal flash program memory and data SRAM 406, and Ethernet port 414. In this embodiment, power is provided by a 5 volt DC power supply 412. The processor 406, an ATMEL ARM Thumb AT91FR4081, has a high-performance 32-bit RISC architecture with high-density 16-bit instruction set and very low power consumption. By combining the micro-controller, featuring 136 Kbytes on on-chip SRAM and a wide range of peripheral functions, with 8 Mbits of Flash memory in a single compact 120-ball BGA package, the Atmel AT91FR4081 406 provides a powerful, flexible, and cost-effective solution to the minimal embedded control application. Significant board size reduction is also noted as a benefit.
FIG. 4B—Embedded Device Hardware
FIG. 4B illustrates the embedded hardware of FIG. 4A, according to one embodiment. As FIG. 4B shows, the hardware components included in the target embedded device 110 facilitate an extremely compact form factor.
FIG. 4C—Another Example of Embedded Device Hardware
FIG. 4C illustrates another embodiment of the embedded target device 110, according to one embodiment. As FIG. 4C shows, in this embodiment, substantially all of the functionality included on the board is modular. For example, different I/O boards 420 may be selected and plugged-in depending on the type of sensors required by the application. In this embodiment, components which may be provided by additional modules (e.g., cards) have been remove, such as the temperature sensor 404 and the ADC 408. In this embodiment, a micro-controller with internal 1 MB of flash program memory and 128 kb of data SRAM is connected via SPI (serial peripheral interface) to an analog small form-factor DAQ slot, and is further connected via a digital bus to a digital small form-factor DAQ slot. This embodiment may be particularly suited for smart sensing, computing, and control, due to the design emphasis on modularity.
In all of the embodiments shown above, it is noted that only necessary acquisition and processing code is packaged and downloaded onto the embedded device (using the flatfile). An approach for generating this minimized code is described below with reference to FIGS. 5-9.
FIG. 5—Minimal Execution System
FIG. 5 illustrates the determination of a reduced or minimal set of functionality needed to execute graphical programs. This minimal set is included in the minimal graphical program execution system 205 which is installed on the target embedded device 110, and which operates to execute the (combined) graphical program (via the graphical program flatfile 207) on the target device 110. The term “minimal” is not used
FIG. 5 compares a minimal graphical program execution system 205 with an un-optimized (for small memory footprint) graphical program execution system 500. As FIG. 5 shows, the graphical program execution system 500 may include an execution engine 502, a network manager 504, a callback system 506, and other components 508. In a typical graphical program execution system, there may be as many as (or more than) 30 components, and so the execution system may be quite large. Such a system may operate under a real-time OS, such as Linux, which has a size of roughly 1.5 MB (mega-bytes). In this typical graphical program execution system, the amount of available memory may be quite large, and hence there is typically no need to reduce the size of the graphical program execution system.
In contrast, the target device may have a limited memory size, e.g., due to power and/or cost constraints. In addition, a real-time OS 210 for the embedded target device 110, such as eCos, may only be 50 KB in size, and so the execution engine is preferably scaled down accordingly to run on the embedded device 110 under the embedded real-time OS 210. This may be accomplished by modifying or removing various sub-systems of the execution system 500 that are not required for basic execution. For example, in one embodiment, the minimal execution system may include only a portion of the execution engine 502A, as shown, along with a substantially modified network manager 504A. Other components may be omitted altogether. Thus, a minimal execution system 205 may be generated with greatly reduced size, and somewhat reduced functionality in order to fit on the embedded target device 110. The minimal execution system 205 may be the absolute smallest executable execution system 205, or simply a reduced version of the execution system 205 including a core set of functionality.
As FIG. 5 also shows, in one embodiment, the callback system 506 may be omitted from the minimal execution system 205. Instead, the callback system 506 may be replaced with a componentized or modular callback system 206 which is stored on the host computer 102, and which may be transferred in part to the target device 110 depending on the needs of the particular graphical program. The componentization of the callback system 506 is described below with reference to FIGS. 7 and 8.
FIG. 6—Method of Creating a Minimal Graphical Program Execution System
FIG. 6 flowcharts one embodiment of a method for creating a minimal graphical program execution system, as described above with reference to FIG. 5. It is noted that in various embodiments, one or more of the steps may be performed in a different order than shown, or may be omitted. Additional steps may also be performed as desired.
As FIG. 6 shows, in 602, the original graphical program execution system 500, as described above in FIG. 5, may be analyzed and pared down to the minimum set of functionality required to execute an extremely simple VI, e.g., a two integer addition (1+1=2) or a set of simple VIs. In one embodiment, this may include removing such subsystems as the web server, XML support, and the callback table. Then, all the functions that are named in the callback table (which are candidates for modularization and aren't required for the simple VIs) may be removed. Finally, a code coverage test may be perform in order to find and remove the functions that were not called in executing the simple VI (or a set of simple VIs). The resulting code comprises an initial version of the minimal execution engine 205.
Then, in 604, the resulting code may be profiled to determined how much code memory and RAM memory it occupies, and to decide which of the remaining subsystems are too large and should be redesigned. For example, for the system described above based on the ARM processor, a target memory footprint of 50K may require trimming those subsystems that are required and are too large in the original execution system. As an example, the network manager and type system may need to be redesigned if they were implemented with too large buffers in the original execution system.
Finally, in 606, if the original execution system VI linker does not fit the design, special subsystems, e.g., VI2OBJ and FLATFILE systems, may be built. In other words, components for converting VIs to object files (VI2OBJ) and for generating the modules for the flatfile (FLATFILE) may be created. Further information regarding the generation of object files for VIs is provided below in the section titled VI Object Files.
Thus, in one embodiment, a minimal execution engine 205 may be constructed by removing all but the minimum functionality required to execute a VI (graphical program), including most or all of the callback system 506, leaving the portion of the execution engine 502A and a modified network manager 504A, as described above. Such a minimal execution system 205 may then be suitable for loading and executing on an embedded device 110. In one embodiment, the minimal execution system may comprise an execution system virtual machine.
It should be noted that the process described above with reference to FIGS. 5 and 6 may also be applied to operating systems, such as a real-time operating system (OS). In other words, an operating system may be optimized, modularized, and/or modified to minimize the footprint on the target device 110. For example, the operating system may be analyzed to determine a minimal kernel or core functionality necessary for the OS to operate. For example, in one embodiment, the minimum functionality may include a simple Basic I/O Service (BIOS) and/or a minimum communication service, such as a TCP/IP service, as is well known in the art. As another example, the minimum functionality may include a simple downloading capability or functionality, e.g., a download protocol. Thus, in various embodiments, the minimum functionality may include one or more of: a simple BIOS, a minimum network communications protocol (e.g., TCP/IP), and/or a minimum download capability. In another embodiment, the minimum functionality may include a hardware and/or software checking capability. Other functions or services of the OS, such as I/O, memory management (e.g., trash collection, etc.) etc., may be modularized or partitioned such that subsets of the functions or services needed for a particular application or device may be determined and transmitted as needed. Thus, in one embodiment, a distributed, “on-demand” OS may be created which includes the kernel (or minimum functionality), and one or more transferable OS modules which provide additional OS functionality in a modular fashion. Thus, the minimum functionality may facilitate subsequent downloading of support libraries and executing kernel components, i.e., in one embodiment, the minimum functionality may be just enough to allow the device to download further basic OS capabilities, including portions of the kernel and/or the BIOS. In another embodiment, these further basic OS capabilities may be included with an application, as described in detail below.
Thus, in one embodiment, the OS kernel or core functionality may reside on the target device 110, and may be executable to perform basic OS functionality on the device. Then, based on analysis of the application (e.g., a graphical program and/or the desired task, and/or the target device), one or more OS modules may be selected to provide particular needed services. These OS modules may then be transmitted to the target device 110 and installed (e.g., by the kernel or other loader program) to augment the basic OS functionality provided by the kernel, after which the OS (now extended) may be operable to provide the additional OS services or functionality.
In various embodiments, the one or more OS modules may be transmitted alone, or along with or as part of the target application. For example, in one embodiment, the one or more OS modules may be included in a flatfile 207 (or other structure or file) along with modules from the graphical program, and possibly also with modules (components) of the modular callback system 206.
FIG. 7—Componentization of the Graphical Program Callback System
FIG. 7 illustrates the process of componentizing a monolithic graphical program callback system 506 to generate the modular graphical program callback system 206, according to one embodiment. It should be noted that the callback system of FIG. 7 is a highly simplified model which is intended only to illustrate the process, and is not meant to represent an actual callback system.
As FIG. 7 shows, the monolithic graphical program callback system 506 includes a plurality of functions A-K (702-722) with varying dependencies. In many prior systems, the functions are arbitrarily stored in many different files, which generally accumulate over time as the function library is developed. Thus, locating functions for linking and execution may be difficult and expensive, since functional dependencies may span numerous files in a substantially haphazard manner. As a result, when linking files for a particular application (graphical program), many unnecessary functions may be included due to the fact that they happened to be located in the same files as need functions, thus, the resulting memory footprint of the executable may be unnecessarily large.
The approach used herein to modularize the functions is to analyze the functional dependencies of the functions, and to group functions which operate relatively independently from other functions as a module. For example, as FIG. 7 shows, function A 702 calls function B 704 and function C 706. Function B 704 calls function D 708, and function C 706 calls function E. Thus, function A 702 has a dependency on function B 704, function C 706, function D 708, and function E 710.
Similarly, function F 712 depends on function G 714, function H 716, function I 718 and function J 720, as well as function C 706 (and its child function E 710). Note that function C 706 (and its child function E 710) is called by both function A 702 and function F 712. This dependency overlap may be resolved by grouping any function (with its children) which is called by multiple other functions as a separate module. Thus, a first module, module 1 762, may include function A 702, function B 704, and function D 708, as indicated in the modular callback system 203. Module 2 764 includes function C 706 and function D 708, as shown. Module 3 766 includes function F 712, function G 714, function H 716, function I 718 and function J 720. Note that module 1 762 and module 3 766 both depend on module 2 764 (since both function A 702 and function F 712 call function C 706). This module dependency relationship may be maintained in a module dependency table 730 or its equivalent. As FIG. 7 also shows, function K is independent of any other functions, and so has its own module, module 4 768.
In one embodiment, each module may be stored in a separate file, greatly easing the task of a dependency checker when selecting modules/files needed by the graphical program 202, i.e., for inclusion in the flatfile 207. A method for performing this componentization is described below with reference to FIG. 8.
FIG. 8—Method for Componentizing a Graphical Program Execution System
FIG. 8 flowcharts one embodiment of a method for componentizing a graphical program execution system, such as, for example, LabVIEW RT. More specifically, as described above with reference to FIG. 7, the method componentizes or modularizes a set of functions (e.g., the function library) of the execution system, also referred to as the callback system of the execution system, by grouping functions in files or modules based on dependencies.
For example, in one embodiment, the original source code of the callback system includes a set of files that each contains functions that may call other functions, that may call other functions, etc., that belong to other files. If a function's dependencies extend into several files, it may be difficult or impossible for a dependency checker to identify and retrieve the function. To facilitate a dependency checker being able to select from the callback system source code only those functions that are needed by a particular application, an attempt may be made to place each function with it's dependencies into a single file. This “complete” function file (e.g., with *.cpp extension) may comprise a module. Thus, componentization of the graphical program execution engine may include the creation of modules, or *.cpp files, that completely (or almost completely) describe a function.
The following describes one approach for performing this componentization, using functions A, B, and C for illustrative purposes. It is noted that in various embodiments, one or more of the steps may be performed in a different order than shown, or may be omitted. Additional steps may also be performed as desired.
As FIG. 8 shows, each function may be analyzed with respect to its functional dependencies to determine whether to place the function in a separate module or in a module with another function. For example:
In 802, a next function, e.g., function A, may be selected, such as from the callback system of the graphical program execution engine. Then, a determination may be made as to whether function A has dependencies, i.e., calls a function B, as indicated in 804. If function A has no dependencies, i.e., does not call function B, then a module or file may be created for function A, as shown in 808.
If in 804 function A does call function B, then in 806 a determination may be made as to whether function B is also called by another function, e.g., function C. In other words, the method may check to see if any other function has a dependency on function B. If no other function calls function B, then in 807 a module or file may be created containing both function A and function B.
If in 806 it is determined that function B is called by function C, then separate modules or files may be created for function A and function B, respectively. Said another way, if function B may be legitimately included in multiple modules (or files), then function B may be given its own module or file. It should be noted that in various embodiments, dependencies between modules may be stored either in the modules themselves or in some type of module dependency table or its equivalent.
Finally, in 812, a determination may be made as to whether there are additional functions to analyze. If there are no more functions in the callback system, then the method may terminate or exit, as shown. Otherwise, the method may continue, selecting the next function in the callback system to analyze, as shown in 802, and described above.
Thus, if function A calls function B, and function B is only called by function A, then a module or file containing function A's definition may also contain function B's definition. Under this scenario, the dependency checker will know that function A and function B are interrelated and part of the same file. If function A calls function B, and function B is also called by function C, then function A's module or file will not contain function B in its definition file, and so function B's definition may be included in a separate file (or module). And so, by using the method above, the functions of a callback system in a graphical program execution engine may be modularized to allow the dependency checker to find and retrieve only those modules or files that are needed by the application, where the modules or files are organized to minimize the number of unnecessary functions included in the graphical program flatfile.
FIG. 9—Generation of the Graphical Program Flatfile
FIG. 9 graphically illustrates the process of generating a graphical program flatfile 207 from graphical program 202 and the modular callback system 206. As FIG. 9 shows, a dependency checker program or process may analyze the graphical program 202 with respect to the modular callback system 206 to determine required modules 902. For example, in the embodiment shown, in the (extremely simple) graphical program 202, function K 722 is executed, then function C 706 (which calls function E 710 implicitly) is executed. Finally function E 710 is executed (explicitly). Thus, as is well known in the art, the graphical program not only indicates the functions called, but the sequence of execution, as well.
The dependency checker may thus may determine that module 2 764 and module 4 768 are required by the graphical program. This information may then be used in conjunction with execution sequence information from the graphical program 202 to generate the flatfile, as indicated in FIG. 10. Further details of the flat file are provided below with reference to FIGS. 10 and 11A-11C.
VI Object Files
In the process of generating the flatfile for an application program, one or more object files may be produced, e.g., via a utility such as VI2OBJ or its equivalent. The reasoning behind this approach is due to the storage limitations of many embedded devices. For example, loading an entire VI to the target device 110 may require more RAM than is available on the device, and execution of Vis directly from flash may not be possible because there is not enough RAM memory to copy these VIs into RAM and execute from there. It should be noted that as used herein, the term “program” may refer to the original source code of a program (e.g., the graphical diagram and underlying code, or text source code, such as C code), to object code generated from the source code, or to executable machine code generated from the source or object code.
However, because the callback system modules (generated from C/C++ code), described above, must be loaded onto the target device 110, it is natural to implement a common mechanism for loading VIs and modules. Thus, a VI2OBJ linker/loader may be developed based on the idea that VIs can be saved, not in their native format, but as object files, such that an ordinary C linker may be used to process them—i.e. to transform them into shared objects that can be loaded at runtime into the target device 110. This approach may make generation of executables from VIs easy and straightforward when space is limited. VI2OBJ or its equivalent is a mechanism to transform a VI (ex: add_int.vi) into an object file (ex: add_int.o).
To describe the mechanism involved in transforming a VI to an object file, the general structure of a VI should be considered. Omitting irrelevant information, the six major components are:
1. Compiled code—executable binary code of a VI;
2. Data space—stores all the data that is required by the VI to run;
3. Data space type map—describes the data stored in the data space;
4. Connector panel—describes the inputs & outputs of a VI;
5. Front panel heap—hosts the controls, indicator & cosmetics etc.; and
6. Block diagram heap—hosts the nodes & wires that make up the block diagram.
Another important piece of information is the linkinfo, which describes connections made from a VI to various entities, e.g., subVIs, external functions etc.
Now, the above listed components may be reshaped into an object file based on the following considerations:
1. The generated object file may be processed by an ordinary C linker (the VI may be linked to other support modules and eventually used to generate the flatfile).
2. It may be desirable to use the original execution mechanism of VIs on the target device 110.
3. The overhead induced by the new loading mechanism should be minimized.
4. Additional processing required after the VI is loaded by target device 110, up to the point where it is ready to run, should be minimized.
5. The object file size should be minimized.
To minimize the object file size the front panel heap and the block diagram heap may be omitted from the VI, because they are not needed on the target device 110 at run time, i.e., they are only used on the host computer side at edit time. As is well known in the art, an object file is substantially a file comprising of blocks of information (e.g., code, data, etc.), symbol information, and relocation information. In one embodiment, the steps taken to create an object file from a VI may include:
1. placing the compiled code resulting from the VI into the section code of the object file, extracting the symbol information attached to the VI code, and adding relocation information for local and external function calls.
2. creating a data section for the object file containing initialized data, e.g., data space type map block of the VI, default data space, connector panel and VI InstrHandle structure (enabling some of the initialization for a VI on the host side), etc. Additionally, symbol information may be added to facilitate retrieval and use of information stored in this section.

3. creating a .bss section for un-initialized data and storing related symbol information there.

4. extracting patch information from the linkinfo block and storing this info in a data section (e.g., named linkdata). This information may include a set of symbol and relocations entries. The data section may be used to store links from the VI to other subVIs or external modules.

5. finally, calls may be generated for InitVI and UnInitVI functions (and stored in two special sections: .ctors and .dtors, of the object file). These functions may be responsible for VI initialization and disposal on the target device side.

Performing the steps described above may generate an object file that contains all the information needed by a VI to run, and that also includes symbol and relocation information used to connect this VI with other VIs or modules.
FIG. 10—Method for Generating the Graphical Program Flatfile
FIG. 10 is a high-level flowchart of one embodiment of a method for generating the graphical program flatfile 207, as illustrated in FIG. 9. As mentioned above, in various embodiments, one or more of the steps may be performed in a different order than shown, or may be omitted. Additional steps may also be performed as desired.
As FIG. 10 shows, in 1002, a graphical program 202 may be analyzed with respect to function dependencies to generate a list or collection of required modules. In other words, a dependency checker residing on the host computer system 102 may determine the functions used in the graphical program, then select modules from the modularized callback system 206 which contain those functions to generate required modules 902.
After (or before or during) the required modules 902 are determined, the graphical program 202 may be analyzed to determine an execution sequence or order of the functions called by the program (or by other functions in the program 202). In other words, the program flow for the graphical program 202 may be determined.
Finally, the flatfile 207 may be generated based on the required modules 902 and the execution sequence for the program. In one embodiment, the flatfile 207 may be generated by including the required modules 902 in the flatfile 207 along with sequencing information and/or module dependency information. An exemplary structure and format of the generated flatfile 207 is presented below with reference to FIGS. 11A-11C.
In one embodiment, the flatfile 207 may be generated from an object file and a symbol map of the target executable (the graphical program). As an example, assume that the object file is named add_int.o (for adding two integers) and the flatfile name, will be add_int.flat.
First, a symbol map (named mb.sym) may be generated from the graphical program, e.g., by using a special tool, e.g., a symdump tool. The symbol map contains all the global symbols of the graphical program along with the sections where they belong, and their addresses relative to the beginning of the section. Section names of the graphical program may then be extracted (e.g., from mb.sym), and numbered, e.g., beginning with one. Section names of add_int.o may then be extracted and numbered, e.g., beginning with 100. Thus, symbol lookup may be done at the time of the flatfile creation.
Then, symbols may be extracted from mb.sym and add_int.o. Relocation information may be extracted from add_int.o. Relocation information in an object file may include the address where the relocation is needed and the symbol name for the relocation. In one embodiment, the relocation information in a flatfile may comprise tuples (clusters, structures, etc.) of {[address where the relocation is needed (uInt32)], [the target section (uint16)], [the target address relative to the start of the start section]}. Further information regarding relocation is provided below.
For every relocation in the add_int.o, the symbol name may be searched for in mb.sym and add_int.o, and, if the symbol is not found, then an error message may be generated and the method terminated. If the symbol is found, the relocation may be written to the flatfile, i.e., to add_int.flat.
Finally, each section's content may be written to the flatfile. In one embodiment writes to the flatfile 207 may be made in accordance with the formats for relocation, etc., for a flatfile, described below.
It should be noted that in a preferred embodiment, unlike DLLs (Dynamic Link Libraries), flatfiles are “targeted”. In other words, flatfiles are generally built to be loaded by a specified program. Thus, a crash or error may occur if another program tries to load a flatfile that was not built for it. Also, in one embodiment, the version of the symbol map should match the version of the graphical program. This version compliance may be facilitated by using a “build timestamp” in the application and in the mb.sym, so verification of the “version match” is possible.
Relocation
Relocation refers to writing the code section of an application at a certain memory address and preparing the code for execution. Preparation includes modification of the code according to a relocation table such that at execution time the code is able to access the variables and functions that it needs for its task. Examples of relocation are presented below.
Relocating Code
A program, at compile time, is set to run at certain memory addresses, say Xtext for the code section and Xdata for the data section. However, when the program is dynamically load into the target device 110, it is very possible that these addresses are already occupied, or may not even exist on the target device 110. Therefore, the code and data sections of the program may be placed in different memory locations on the target device, say Ytext and Ydata.
For example, if the program contains the following C instruction:
i=0;
and the address of variable i is (Xdata+100) (an offset of 100, for example, with respect to Xdata)
After code compilation, the following assembly line of code may be produced:
mov [Xdata+100], 0
meaning “move the value 0 at address Xdata+100”.
Now assuming that the code section is transferred to the target device 110, and Xdata becomes Ydata, the target device address of variable i is now (Ydata+100). The process that corrects the instruction
mov [Xd+100], 0
to
mov [Yd+100], 0
is called relocation. The relocation process uses the Relocation Table to determine the address in the code section for the instruction
(mov [Xd+100], 0).
and how this instruction needs to be changed.
In one embodiment, one or more of the following constraints may apply to the target device:
1. target flash should be large enough to be able to store the flatfile code, constructor, destructor and read-only sections.
2. target RAM should be large enough to store the flatfile data section and also the largest relocation table.
Relocating Data
The following is an example of relocation in the Data Section (.data). Assume that the program includes the following code sequence:
int i;
int *j=&i;
i is an un-initialized variable, so it may be stored in the un-initialized data (.bss) section. j is a variable that will contain the address of variable i, so after being initialized it may be stored in the data section. Because j will eventually have to contain the address of i, a relocation may be necessary in the data section to the address of j.
FIGS. 11A-11C—Structure and Deployment of the Graphical Program Flatfile
FIGS. 11A-11C illustrate the structure and deployment of the graphical program flatfile 207, according to one embodiment. FIG. 11A illustrates one embodiment of the contents of the modules used to build the flatfile 207. FIG. 11B illustrates the structure of the flatfile 207, according to one embodiment. Finally, FIG. 11C illustrates the deployment of the minimal graphical program execution system 205 and the constructed combined program 202A.
As FIG. 11A shows, in one embodiment, a module 1100, as referred to above with reference to FIGS. 6 and 7, may include three components: a sections component 1102, a symbols component 1104, and a relocation table 1106. In one embodiment, the module is a piece of C or C++ code contained in one or more C or C++ files. Every module may be compiled into an object file which contains the executable code and the data generated by the compiler for a specific module, along with symbolic and relocation information for that module, and other information, such as debug info, comments, etc.
The sections component 1102 may include six sections which represent various aspects of the module 1100, as shown in FIG. 11A. More specifically, the sections may include a code section 1112 which is the program code for the module, a data section 1113, a constructor 1114 for the module, a destructor 1115 for the module, a un-initialized data section 1116, and a data read-only section 1117 (i.e., for constants). A section may comprise a range of addresses with no gaps; all data in those addresses may be treated the same for some particular purpose. The symbols component 1104 includes the variables and function names for the module. A symbol is a name associated with a given address in a given section. The symbolic and relocation information from the object file of the graphical program can be used to determine the dependency relation between modules.
One characteristic of the object file is that it can be relocated, meaning that with appropriate processing, object file sections can by stored and executed at any memory address. As described in detail above, relocation is the process that makes an object file able to run at a given address. The information (table) that the relocation process uses is referred to as relocation information (or the relocation table) and is preferably included in the flatfile 207. Thus, the relocation table 1106, also referred to as an address table, provides the relative addresses for the symbols (variables and functions) with respect to the program on the host computer 102. This relocation information may be used by the target device to construct the combined program 202A, adding an address offset to the addresses in the relocation table 1106 to generate correct locations for the symbols in the context of the target device 110.
Thus, once the graphical program has been compiled to an object file, the object file may contain sections such as:
SectionA
Relocation information for SectionA
Symbol information for SectionA
Debug information for SectionA
SectionB
Relocation information for SectionB
Symbol information for SectionB
Debug information for SectionB
SectionC
Relocation information for SectionC
Symbol information for SectionC
Debug information for SectionC
etc. in no specific section order.
The information in each module 1100 may be included in the flatfile 207, as shown in FIG. 11B.
As FIG. 11B shows, the flatfile 207 may include an initial segment 1120 (reading left to right) which includes information regarding the module information in the flatfile 207. In one embodiment, this section may be about 100 bytes in size, and may include such information as the number of sections in the flatfile, the size of each section in bytes, and the type of each section, e.g., code 1112, data 1113, etc.
After this initial section information segment 1120, one or more module segments, referred to as flatobjects, may be included, as FIG. 11B shows. In one embodiment, each module segment may include the module information shown in FIG. 11A, i.e., each module segment may include relocation table 1106 and sections 1102 for a respective module 1100.
FIG. 11C illustrates the deployment of the minimal execution system 205 and the combined program 202A on the target device 110. As FIG. 11C shows, the minimal execution system 205 may be divided between RAM 1130 and flash memory 1140 on the target embedded device 110. In the embodiment shown, the RAM 1130 is of size 128 k and stores data and un-initialized data for the minimal execution system 205. As FIG. 11C also shows, in this embodiment, 128 k of the flash memory 1142 is used to store the real-time OS (e.g., eCos) and the code and read-only data for the minimal execution system 205. The remainder of the flash memory 1140 may be used to store the combined program 202A which may be constructed based on the flatfile 207. It should be noted that the RAM 1130 may also be used to store data during execution of the combined program 202A.
Thus, the flatfile 207 may include module information for functions of the graphical program 202 and for functions included from the modular callback system. In other words, the functions (with variables) for the graphical program 202 have been combined with the execution system functions required to execute those graphical program functions. This module information also includes relative address information for re-locating the functions in the memory space of the target device 110. The flatfile 207 may be transmitted to the target device 110 where a flatfile loader may execute to receive the flatfile 207 and construct the combined program 202A. Further details of the process of constructing the combined program 202A from the flatfile are provided below with reference to FIG. 12.
Detailed Structure of Flatfile
The following describes one embodiment of flatfile structure or format in more detail. It should be noted that the following format is exemplary and it only intended for illustration purposes, i.e., is not intended to limit the structure or format of the flatfile to any particular design.












Flatfile:


sec_nr (int32) Number of sections;


sec_desc[sec_nr] - An array of sec_nr section descriptors. See the


format of sec_desc below;


sec_content[sec_nr] - An array of sec_nr with section contents. See the


format of sec_content below;


sec_desc:


sec_size (uInt32) - the size of the section data;


sec_type (uInt32) - type of the section. A combination of


FO_SEC_READONLY, FO_SEC_HAS_CONTENT,


FO_SEC_IS_CTOR_TABLE, FO_SEC_IS_DTOR_TABLE;


number (uInt32) - a unique number for every section;


sec_content:


rel_desc - relocations for this section. See bellow for rel_desc structure;


section_data - the raw data of the section;


rel_desc:


rel_nr (uInt32) - number of relocation in this relocation descriptor;


rel_data[rel_nr] - an array of rel_nr relocations data - See bellow for


the rel_data structure;


rel_data:


addr (uInt32) - the relocation address, relative to current section start;


target_sec (uInt16) - the section where the relocation should point;


target_addr (uInt32) - the address relative to target section address where


the relocation should point;


rel_type (uInt16) - the type of the relocation.









FIG. 12—Method For Deploying and Executing a Graphical Program

FIG. 12 flowcharts one embodiment of a method for creating, deploying, and executing a graphical program on an embedded device. More specifically, a method is described for creation and deployment of programs on the target device 110. It is noted that in various embodiments, some of the steps may be performed in a different order than shown, or may be omitted. Additional steps may also be performed. As shown, this method may operate as follows.
In one embodiment, the user first may create a program that is operable to execute within the target embedded device, as indicated in 1202. In creating the program, the user may be aware of the one or more sensor devices 120 which will be acquiring data in the system. The user may include code in the program which is operable to execute on the target device, and which operates to provide instructions to one or more of sensor devices 120 to direct sensor devices 120 to acquire data at certain times or based on certain detected events. In one embodiment, the user may create a graphical program on computer system 102. As noted above, a graphical program may comprise graphical code, i.e., two or more interconnected nodes or icons which visually represent operation of the program. In creating the program, the user may place icons within the graphical program representing each of the respective sensor devices 120 that are being used. The user may also include graphical code in the program which operates to provide instructions to the respective sensor device icons, i.e., by connecting other graphical nodes to the sensor device icons in the graphical program. Thus, the graphical program may be created or assembled by the user arranging on a display a plurality of nodes or icons and then interconnecting the nodes to create the graphical program. In response to the user assembling the graphical program, data structures may be created and stored which represent the graphical program. The nodes may be interconnected in one or more of a data flow, control flow, or execution flow format. The graphical program may thus comprise a plurality of interconnected nodes or icons which visually indicates the functionality of the program. As noted above, the graphical program may comprise a block diagram and may also optionally include a user interface portion or front panel portion. Where the graphical program includes a user interface portion, the user may assemble the user interface on the display. As one example, the user may use the LabVIEW graphical programming development environment to create the graphical program.
As described below, the block diagram may be intended to execute on the target device 110. The user interface code may remain on the host computer 102 and may execute on the host computer 102 to present the user interface on the host computer 102 during execution of the block diagram on the target device 110. The user may interact with the user interface presented on the host computer 102 to provide input to and/or view output from the block diagram executing on the target device 110.
In an alternate embodiment, the graphical program may be created in step 1202 by the user creating or specifying a prototype, followed by automatic or programmatic creation of the graphical program from the prototype. This functionality is described in U.S. patent application Ser. No. 09/587,6102 titled “System and Method for Automatically Generating a Graphical Program to Perform an Image Processing Algorithm”, which is hereby incorporated by reference in its entirety as though fully and completely set forth herein. The graphical program may be created in other manners, either by the user or programmatically, as desired. The graphical program may implement a measurement function that is desired to be performed by the instrument. For example, in an embodiment where the instrument is an image acquisition device (e.g., a smart camera), the graphical program may implement an image processing function.
Once the program has been completed, then in step 1204, the graphical program flatfile may be generated, as described above with reference to FIG. 10. One embodiment of this is described in detail below in the section Example Process. In one embodiment, where the graphical program includes a block diagram and a user interface, only the block diagram portion may be used in generating the flatfile. The user interface may remain as code that executes on the host computer 102.
Then, in 1206, the flatfile may be transmitted to the target device 110, e.g., over a network (or other transmission means). In other words, the user may cause the computer system to send the flatfile 207 over the network 104 (or other communication medium) to the target device 110.
The target device 110 may thus receive the flatfile 207, and a loader/linker program on the target device 110 may construct the combined program 202A based on the received flatfile 207, as indicated in 1208. Further details of one embodiment of this process are provided below in the Dynamic Linking section and the Example Process section.
Finally, as shown in 1210, the target device 110, e.g., the minimal execution system 205 on the target device 110, may execute the combined program 202A.
In one embodiment, the target device 110 may send output data (e.g., acquired data or execution results) to the host computer 102. The data may be transmitted to the computer 102 over the network 104, e.g., through wired or wireless means. The target device 110 may send the output data through one or more intermediate devices, such as a hub device 108. The host computer system 102 may display the received data in a GUI, and/or may otherwise process the received data to generate a certain result. In one embodiment, the user constructs a GUI or front panel as part of the process of creating the graphical program, and this GUI code is executed on the computer system 102 to present the GUI on the display of the computer system 102.
In one embodiment, in executing the program received from the computer system, the target device 110 may be directed by the program to provide certain commands to respective ones of sensor devices 120 to cause the sensor devices to acquire data and provide this acquired data to the target device. Examples of the types of commands that may be implemented by sensor devices 120 include, but are not limited to, single/multiple point read, writes (e.g., for configuration) start, and stop, among others. In one embodiment, prior to sending the program to the target device 110, the minimal execution system 205 may be deployed to the target device 110. In another embodiment, the target device 110 may already have the execution system 205 installed.
Thus, the target device 110 executes the program received from the computer system 102, e.g., via the execution system 205. In one embodiment, the target device 110 may execute the program upon reception of the program from the host computer 102. In another embodiment, after the program has been transferred to the target device 110, the user may send a command to the target device 110 over the network 104 invoking execution of the program by the target device 110. In an exemplary embodiment, the execution of the program results in some data being acquired or generated. These data may then be sent (e.g., over the network 104 or other communication medium) to the host computer system 102, e.g., for display and/or analysis. In other embodiments, the acquired data may be sent to other systems. For example, in one embodiment, the target device 110 may use web server program 604 to publish the acquired data to a website, where a system with a web browser may then access the data. In another embodiment, the target device may send the data to one or more other systems coupled to the network 104 (e.g., the Internet). Thus, the target device may send the acquired data to any networked devices, as desired.
Dynamic Linking of Flatfile to the Target:
As described above, in a preferred embodiment, the flatfile 207 may comprise a sequence of sections and relocation tables. The sections can be code, data, constructors, etc.
When the flatfile is constructed on the host computer, the code in its sections is relative, meaning that the instructions described in this code do not have real target addresses for the variables but rather some generic addresses, e.g., with respect to the beginning of the program.
For example, the program may include an instruction:
Move to variable I at address 10, the value 0 (I=0)
Now, as mentioned above in 1206, the flatfile may be transmitted to the target device, say, for example, in chunks of 4 kbytes. The very first transfer contains the initial 100 bytes 1120 that give information regarding the total number of sections, their type, and size, and the relocation tables that come with them, as described above with reference to FIG. 11B. Based on this information memory on the target device 110 may be reserved to accommodate these sections.
Now, the code:
Move to variable I at address 10, the value 0 (I=0)
arrives at the Target. Based on the relocation table, it may be determined that the real target address of variable I is not 10 but rather 500 offset+10=510 because in the datav section of the target RAM all program variables are addressed with relative to address 500.

So at this time, when the flatfile is moved into the target device 110 the call to

Move to variable I at address 510, the value 0 (I=0)

has been corrected. In other words, the offset (500) has been added to the address. In one embodiment, the call may not be executed immediately, but rather may be stored or written in a code section of the flash location 1140.

In one embodiment, after the entire flatfile has been transmitted to the target and processed, the constructed combined program may be executed. In another embodiment, the execution of the constructed combined program may occur as the flatfile is streamed to the target device 110, as described below.
Example Process
The following is a simple example of one embodiment of the above described processes. In this example, the user creates a VI on the host computer 102, named Delay.vi, and wishes to run this VI on the target device 110.
On the host computer 102, the VI is transformed into an object file named Delay.o. The modules required for running the VI are determined by a dependency checker executing on the host computer 102, producing the following list (for example):
uClibc/memmove.o (from directory uClibc take file memmove.o)
cookie/mbCookie.o
occur/mbOccur.o
uClibc/memcpy.o
So at this point, the application VIs are converted into object files, and the required modules (that are also compiled into object files at this point) from the modular callback system 206 are determined. Then, all the object files pertaining to the application (using an ordinary C linker) are lined into a single object file which becomes the “application object file”. In other words, the following object files may be merged together:
Delay.o
uClibc/memmove.o
cookie/mbCookie.o
occur/mbOccur.o
uClibc/memcpy.o
thereby creating one single “application object file named” exampleVI.o. It is noted that in this example, the “application object file” may now be organized thusly:
All code sections (of type .text) with related relocation, symbol and debug information from Delay.o, memmove.o, mbCookie.o, mbOccur.o, and memcpy.o are assembled into one big code section (of type .text) with related relocation, symbol and debug information in the resulting exampleVI.o.
All data sections (of type .data) with related relocation, symbol and debug information from Delay.o, memmove.o, mbCookie.o, mbOccur.o, and memcpy.o are assembled together into one big data section (of type .data) with related relocation, symbol and debug information in the resulting exampleVI.o
All constructor sections (of type .ctors) with related relocation, symbol and debug information from Delay.o, memmove.o, mbCookie.o, mbOccur.o, and memcpy.o are assembled together into one big constructor section (of type .ctors) with related relocation, symbol and debug information in the resulting exampleVI.o.
All code destructor (of type .dtors) with related relocation, symbol and debug information from Delay.o, memmove.o, mbCookie.o, mbOccur.o, and memcpy.o are assembled together into one big destructor section (of type .dtors) with related relocation, symbol and debug information in the resulting exampleVI.o.
All read_only sections (of type .rodata) with related relocation, symbol and debug information from Delay.o, memmove.o, mbCookie.o, mbOccur.o, and memcpy.o are assembled together into one big read_only section (of type .rodata) with related relocation, symbol and debug information in the resulting exampleVI.o.
All un_initialized data sections (of type .bss) with related relocation, symbol and debug information from Delay.o, memmove.o, mbCookie.o, mbOccur.o, and memcpy.o are assembled together into one big un_initialized data section (of type .bss) with related relocation, symbol and debug information in the resulting exampleVI.o.
At this point, exampleVI.o contains:
Code section
Relocation info for Code section
Symbol info for Code section
Debug info for Code section
Data section
Relocation info for Data section
Symbol info for Data section
Debug info for Data section
Constructor section
Relocation info for Constructor section
Symbol info for Constructor section
Debug info for Constructor section
Destructor section
Relocation info for Destructor section
Symbol info for Destructor section
Debug info for Destructor section
Read_Only section
Relocation info for Read_Only section
Symbol info for Read_Only section
Debug info for Read_Only section
(in no specific order).
However, a typical object file has a very complicated internal structure and thus may not be suitable for sequential processing (on the target device 110). Therefore, in order to be able to load, dynamically link, and sequentially process an object file on the target device 110, the object file may be processed into a different format called the flatfile, described above in detail.
The flatfile is an object file that has a much simpler structure than a regular object file, and therefore it may be processed “on the fly” or sequentially on the target device 110. In one embodiment, a utility, referred to as obj2flat, that transforms an object file into a flatfile, may be developed and used. Therefore, by running the obj2flat utility on exampleVI.o a single flatfile file named exampleVI.flat may be generated.
In one embodiment, the exampleVI.flat file may include:















Section table



Relocation Table for Code Section



Code section



Relocation Table for Data Section



Data section



Relocation Table for Constructor Section



Constructor section



Relocation Table for Destructor Section



Destructor section



Relocation Table for Un-initialized Data Section



Un-initialized Data section



Relocation Table for Read_Only Section



Read_Only section







Note1:



for flatfiles the order of information is very important.



Note2:



in converting exampleVI.o to exampleVI.flat, debug information may be omitted, while the symbol information may be used to create the relocation tables.






The section table gives information for every section regarding the number of sections, the size of each section in bytes, and the type of each section, as described above. The section table may be required to pre-allocate the memory for the sections. The idea is that in the relocation process, all section addresses must be known, and so allocation of memory for sections is preferably the first step performed on the target device 110.
Once the flatfile has been generated, exampleVI.flat may be transferred to the target device. In one embodiment, the target device has a network buffer in RAM that is 4K wide (although in other embodiment, the network buffer may be set to any size desired). Based on the size of this buffer, transfers of information from exampleVI.flat to target device RAM may be made in chunks of 4K.
The very first 4K piece of exampleVI.flat arrives via the network into RAM on the target device 110. This 4K of data contains the Section Table, Relocation Table for the Code Section, and some Code Section. The dynamic linker (or loader) that resides in Flash memory of the target device 110 may be a state machine with two run modes: read information, and process information.
Once the very first 4K transfer arrives in target device RAM, the dynamic linker enters read mode and starts reading the Section Table. When the Section Table is completely read, the dynamic linker enters processing mode and stores the Section Table in another location in target RAM, then executes the Flash memory allocations for the sections described in the Section Table. After finishing the allocations, the dynamic linker enters read mode, and reads the Relocation Table for Code Section. When the Relocation Table for Code Section is completely read, the dynamic linker enters processing mode and stores the Relocation Table for Code Section into target RAM at a different location than the 4K network buffer and the Section Table locations. Then it uses the information from the Relocation Table for Code Section to process the content of the Code Section that is already in the target RAM. When the entire portion of the Code Section currently in RAM has been processed, a new 4K transfer from exampleVI.flat into the network buffer takes place, overwriting the previous 4K information. Note that at this time, the Section Table and Relocation Table for Code Section have been saved into other target RAM locations, so the dynamic linker can proceed with processing of the Code Section by using information from the Relocation Table for Code Section. After the Code Section is completely relocated, the Relocation Table for Code Section may not be not needed anymore.
Next, the Relocation Table for Data Section is read into the 4K network buffer. When the Relocation Table for Data Section Code is completely read, the dynamic linker enters processing mode and stores the Relocation Table for Data Section into target RAM, overwriting the Relocation Table for Code Section. Then the dynamic linker uses the information from the Relocation Table for Data Section to process the content of the Data Section that is already in target RAM. When the entire portion of Data Section in RAM has been processed, a new 4K transfer from exampleVI.flat into the network buffer takes place, thereby overwriting the previous 4K information. Note that at this time, the Relocation Table for Data Section has been saved into target RAM, so the dynamic linker can proceed with processing of the Data Section by using information from the Relocation Table for Data Section.
These 4K transfers and dynamic linker read/process cycles may continue until the entire exampleVI.flat file has been transferred to the target device 110 and the combined program 202A has been constructed (in the flash program space 1144). After the entire exampleVI.flat file is completely transferred to the target device, the Section Table will not be not needed anymore, and so may be deleted, and the constructed combined program 202A may be run.
Thus, in summary, in one embodiment of the invention, the program that is created on the computer system 102 may require use of program execution system 205 to execute the program. For example, in one embodiment, the program is a graphical program and requires graphical program execution system 205 to execute the program. Due to the small footprint of target device 110, in one embodiment, the program execution system is configured in such a way so as to only transmit the minimum amount of a program execution system (i.e., a portion of the modular callback system 206) actually required by the program that is being executed. Thus, in one embodiment, the program execution system is partitioned into a (minimal) base execution system, and a plurality of components for presenting different functionality that can be performed by a program. The base portion of the program execution system is only capable of executing the very simplest commands. This minimal engine may comprise the smallest set of commands which allows the other components to be executed.
In one embodiment, when the program is developed by the user, a software program executing on the computer may operate to analyze the program to determine the functionality contained in the program. Once the functionality of the program has been identified, the program uses the functionality to determine which of the respective components of the program execution system are actually required by the program. In one embodiment, the method determines the functionality of the program, and uses the functionality to index into a data structure or look-up table to determine which program execution system components will be required to execute this program. When the program is then transmitted or deployed to target device 110, the computer system may operate to only provide the program execution system base portion and the respective components that are actually required to execute the program. Thus, the smaller amount of execution system code may be transmitted to the target device. This allows a smaller footprint for one or more of the target devices and/or the sensor devices. In other words, target device 110 may include a smaller processor and/or a smaller memory medium since a full program execution system is not required to be transmitted.
In one embodiment, after the software program analyzes the program to determine the functionality contained in the program, an execution system analysis program may determine which execution system components are required for execution of the program. A deployment program may then assemble the required components of the execution system and the program, for example, by interspersing the required execution system components and the program together according to the order of execution of the program. These interspersed program execution system components and program may then be assembled into a file (i.e., the flatfile 207), and respective portions of the file transmitted to the target device 110 for execution.
In one embodiment, the flatfile 207 may be received by the target device 110 and used to construct a combined program 202A including executable code from the program and executable code from the required execution system. This combined program 202A may then be executed by the embedded device 110. The combined program may also be stored in non-volatile memory of the embedded device for subsequent execution.
Streaming Execution
In one embodiment, successive portions of the file may be streamed to the target device 110 and/or sensor device 120 for dynamic execution. In other words, the target device may execute the program as it is streamed to the device. For example, the sensor device 120 may receive a first portion of the file comprising a first portion of a program to be executed at a first portion of the execution system components that are used for executing this first portion of the program. After this first portion of the program has been executed along with the first portion of the execution system components, the first portion of the program may be flushed or removed from the memory of the sensor device. In a similar manner, the execution system components that are no longer required may be also removed from the memory. However, execution system components that may be required by other portions of the program to be executed may be retained in the memory for execution. As discussed above, in one embodiment, the deployment program determines which execution system components may be required for a plurality of different portions of the program, and includes a variable or data structure or other indication with the execution system component to indicate that this component should not be flushed immediately after it has been executed, or others should be retained by target device 110 for execution with another part of the program.
After the first portion of each of the program execution components and the program has been executed, computer system 102 and/or target device 110 may then provide a second portion of the program interspersed with the second portion of the execution system components. The second portion of the file may be provided by the computer system to target device 110. Operation then proceeds as above. Thus, for example, computer system 102 may operate to provide respective portions of the deployment file to target device 110 for execution on an as needed basis, based on the memory availability or memory capacity of target device 110. Target device 110 may receive the program that it is supposed to execute along with the execution system components used by that portion of the program, execute the program under direction of the execution system components, and then receive further portions of the deployment file, and so forth. Thus, computer system 102 may essentially provide a stream of the program and its corresponding execution system components to the target device according to the order of execution of the program.
In an example application of the present system, the computer system 102, the target device 110, and/or the hub device 108, may operate to execute a radio server program which is operable to discover remote or wireless data acquisition devices that enter into and exit from the wireless communication space that is within the range of the target device. Thus, periodically, the radio server executing on the target device may send out a wireless communication signal to query the presence of respective data acquisition devices 120 that are within the wireless communication range of the computer system 102, target device 110, or hub 108. Any present data acquisition devices may respond to the queries to indicate its respective presence. The queries may be performed periodically, e.g., once permitted, once per hour, once per day, or at greater or lesser time frame granularities. For further information regarding wireless execution of the graphical program, please see U.S. Provisional patent application Ser. No. 60/393,528, titled “Wireless Deployment/Distributed Execution of Graphical Programs to Smart Sensors”, filed Jul. 3, 2002, which was incorporated by reference above.
In another embodiment of the present invention, the target device 110 may include a programmable hardware element, such as an FPGA, in addition to, or instead of, a processor. For example, in an embodiment where the target device includes both a processor/memory and an FPGA, the graphical program may be compiled to a hardware configuration file on the host computer system 102, where the hardware configuration file is targeted at the FPGA on the target device 110. The host computer may transmit the hardware configuration file to the target device 110, where it may be stored, e.g., in a memory medium of the target device. The processor on the target device may then deploy the hardware configuration file onto the FPGA, after which the configured FPGA may execute to perform the desired function or operation.
In another embodiment, the target device may include two (or more) FPGAs. The host may stream the compiled hardware configuration file to the target device in portions which are each suitable for deployment and execution by respective ones of the FPGAs. Execution of the program may proceed in “ping-pong” fashion among the two or more FPGAs. For example, once a first portion of the hardware configuration file is received and deployed on a first FPGA, the configured first FPGA may execute, thereby performing a function encoded in the first portion of the hardware configuration file. While the first FPGA is executing the first portion of the hardware configuration file, a second portion of the hardware configuration file may be received and stored in the memory medium of the target device. The processor may then deploy this second portion of the hardware configuration program to a second FPGA on the target device 110. Once the second portion is deployed, the second FPGA may begin execution. In one embodiment, once the second portion is deployed to the second FPGA and the second FPGA begins execution, execution of the first FPGA may be halted, and a third portion of the hardware configuration program may be received, stored in memory, and deployed onto the first FPGA (now inactive). Thus, the FPGAs may be dynamically configured in an alternating manner. Of course, this approach may be extended to more than two FPGAs, where more sophisticated techniques may be applied to determine which FPGA to configure with each successive portion of the hardware configuration program, e.g., round robin, longest inactive, size-based, etc.
It should be noted that additional material regarding various embodiments of the invention are included in FIGS. 13 through 46.
Although the embodiments above have been described in considerable detail, numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.

## Claims

1. A method for receiving and executing a program, the method comprising:
storing a linker/loader program;
receiving a first part of a file from a remote device, wherein the file comprises a plurality of components of a program execution system and a program, wherein the plurality of components are operable to execute the program;
storing the first part of the file;
executing the linker/loader program to create a first portion of a combined program from the first part of the file;
storing the first portion of the combined program;
deleting the first part of the file;
receiving a second part of the file from the remote device;
storing the second part of the file;
executing the linker/loader program to create a second portion of the combined program from the second part of the file;
storing the second portion of the combined program;
deleting the second part of the file; and
executing the first portion and the second portion of the combined program to execute the plurality of components to execute the program.

2. The method of claim 1,
wherein the program comprises a graphical program, comprising a block diagram portion and a user interface portion;
wherein said receiving the program from the remote device comprises receiving the block diagram portion of the program from the remote device; and
wherein, during execution of the program, the block diagram executes using the program execution system and the graphical user interface is displayed on a display of the remote device.

3. The method of claim 1,
wherein the program comprises a graphical program; and
wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program.

4. The method of claim 1,
wherein the combined program comprises the plurality of components of the program execution system and the program.

5. The method of claim 1, further comprising:
wherein the plurality of components are selected out of a larger plurality of program execution components by programmatically analyzing the program to determine required components for execution of the program.

6. The method of claim 1,
wherein the plurality of components are determined based on functionality present in the program.

7. The method of claim 1,
wherein the file comprises a flat file, wherein the file is created by combining the plurality of components and the program into the file.

8. The method of claim 7,
wherein said combining comprises interspersing the plurality of components with the program according to an execution order of the program; and
wherein the first and the second parts of the file are arranged according to the execution order of the program.

9. The method of claim 1, wherein the program execution system comprises one or more of:
a minimal execution engine; or
a network manager.

10. The method of claim 1,
wherein said executing the first portion and the second portion of the combined program comprises executing each of the first and the second portions of the combined program after said storing each respective portion of the combined program.

11. A computer-implemented method for creating and executing a program, the method comprising:
generating a file based on a program and one or more execution modules, wherein the program is operable to execute on an embedded device, wherein the one or more execution modules are usable to execute the program, wherein the one or more execution modules comprise a minimal execution system;
transmitting the file to the embedded device, wherein the file is transmitted in two or more parts;
the embedded device receiving a first of the two or more parts of the file;
the embedded device constructing a combined program based on the first of the two or more parts of the file, wherein the combined program includes program code from the program and execution module code for executing the program code;
the embedded device deleting the first part of the file;
the embedded device receiving a second of the two or more parts of the file;
the embedded device constructing the combined program based on the second part of the file; and
the embedded device executing the program using the minimal program execution system.

12. The method of claim 11, further comprising:
the embedded device deleting the second of the two or more parts of the file.

13. The method of claim 11, further comprising:
programmatically analyzing the program to determine required execution modules for execution of the program; and
selecting the required execution modules in response to programmatically analyzing, wherein the required execution modules comprise the one or more execution modules.

14. The method of claim 11,
wherein said generating the file comprises interspersing the execution modules with the program according to an execution order of the program; and
wherein the first and the second parts of the file are arranged according to the execution order of the program.

15. The method of claim 11,
wherein the execution module code includes code from the one or more execution modules.

16. A method for receiving and executing a program, the method comprising:
receiving a first part of a file, wherein the file comprises a plurality of components of a program execution system and a program;
storing the first part of the file in a memory;
linking the first part of the file into a combined program;
deleting the first part of the file from the memory;
receiving a second part of the file;
storing the second part of the file in the memory;
linking the second part of the file into the combined program;
deleting the second part of the file from the memory;
executing the combined program to execute the plurality of components to execute the program.

17. The method of claim 16,
wherein the plurality of components is required for execution of the program; and
wherein the plurality of components is selected out of a larger plurality of program execution components by programmatically analyzing the program to determine required components for execution of the program.

18. The method of claim 16,
wherein the file comprises a flat file, wherein the file is created by combining the plurality of components and the program into the file.

19. A method for receiving and executing a program, the method comprising:
receiving a first part of a file from a remote device, wherein the file comprises a plurality of components of a program execution system and a program;
storing the first part of the file in a first memory;
creating a first portion of a combined program from the first part of the file;
storing the first portion of the combined program in a second memory;
deleting the first part of the file from the first memory;
receiving a second part of the file from the remote device;
storing the second part of the file in the first memory;
creating a second portion of the combined program from the second part of the file;
storing the second portion of the combined program in the second memory;
deleting the second part of the file from the second memory; and
executing the first portion and the second portion of the combined program to execute the plurality of components to execute the program.

20. The method of claim 19,
wherein the plurality of components is required for execution of the program; and
wherein the plurality of components is selected out of a larger plurality of components of the program execution system by programmatically analyzing the program to determine required components for execution of the program.

21. The method of claim 19,
wherein said executing the first portion and the second portion of the combined program comprises executing each of the first and the second portions of the combined program after said storing each respective portion of the combined program.

22. A method for receiving and executing a program, the method comprising:
storing a linker/loader program;
receiving a first part of a file from a remote device, wherein the file comprises a plurality of components of a program execution system and a program, wherein the plurality of components are operable to execute the program;
storing the first part of the file;
executing the linker/loader program to create a first portion of a combined program from the first part of the file;
executing the first portion of the combined program to execute one or more of the plurality of components to execute the program;
deleting the first part of the file;
receiving a second part of the file from the remote device;
storing the second part of the file;
executing the linker/loader program to create a second portion of the combined program from the second part of the file; and
executing the second portion of the combined program to execute one or more of the plurality of components to execute the program.

23. The method of claim 22,
wherein the file comprises a flat file, wherein the file is created by combining the plurality of components and the program into the file.

24. The method of claim 23,
wherein said combining comprises interspersing the plurality of components with the program according to an execution order of the program; and
wherein the first and the second parts of the file are arranged according to the execution order of the program.

25. The method of claim 22, further comprising:
deleting the second part of the file.