exv10w21



 





Exhibit 10.21



Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.









MASTER TECHNOLOGY LICENSE AGREEMENT

FOR MIPS ARCHITECTURE AND MIPS CORES





THIS MASTER TECHNOLOGY LICENSE AGREEMENT FOR MIPS ARCHITECTURE AND MIPS CORES including
Exhibits hereto (the “Agreement” or “Master Agreement”) is made to be effective as of December 30,
2003 (the “Effective Date”) by and between MIPS Technologies, Inc., a Delaware corporation with its
principal place of business at 1225 Charleston Road, Mountain View, California 94043, (“MIPS”) and
Cavium Networks, a California corporation with its principal place of business at 2610 Augustine
Drive, Santa Clara, CA 95054 (“Licensee”).




BACKGROUND




     MIPS designs, develops and licenses intellectual property based on a Reduced Instruction Set
Computer (“RISC”) technology known as the “MIPS Architecture,” including certain processor core
designs known as the “MIPS Cores.” Licensee desires to license certain MIPS Technology as described
in MIPS Technology Schedule(s) in the form attached hereto as Exhibit A (each a “Technology
Schedule”) to be executed by the parties pursuant to this Master Agreement from time to time and
MIPS is willing to license said MIPS Technology, all on the terms and conditions set forth herein.



     In consideration of the mutual promises contained herein, the parties agree as follows:



1. DEFINITIONS




     1.1 “Authorized Foundry” means with respect to a particular Licensed Technology, the
foundry(ies) identified in the applicable Technology Schedule.



     1.2 “Intellectual Property Rights” means the collective intellectual property rights
now held or hereafter created or acquired by a party, whether arising under the laws of the United
States or any jurisdiction worldwide, for (i) all classes or types of patents, including, without
limitation, utility models, utility patents and design patents, patent applications and
disclosures; (ii) all copyrights and moral rights in both published and unpublished works and all
registrations and applications therefor; (iii) all mask works and all registrations and
applications therefor; and (iv) all inventions, know-how, trade secrets, and confidential,
technical and non-technical information.



     1.3 “Licensee Application” means with respect to a particular Licensed Technology, the
application for which the Licensee Chips are targeted as identified on the applicable Technology
Schedule.






     1.4 “Licensee Chip” means a single die that is packaged and that incorporates at least
one instantiation of a Licensed Hard Core Implementation of a Licensed MIPS Core or a Licensed MIPS
Architecture Compatible Core, which chip (i) is designed by Licensee for the applicable Licensee
Application; and (ii) contains substantial functionality in addition to the functionality of the
Licensed Hard Core Implementation.



     1.5 “Licensed MIPS Architecture” means a MIPS Architecture licensed by MIPS to
Licensee pursuant to, and described in, a Technology Schedule entered into by the parties pursuant
to the terms of this Master Agreement.



     1.6 “Licensed MIPS Architecture Compatible Core” means a MIPS Core developed
by Licensee that implements Licensed MIPS Architecture(s) (i.e., either the MIPS32 architecture or
the MIPS64 architecture, whichever has been licensed hereunder, together with any application
specific extensions thereto licensed hereunder, when applicable), licensed by MIPS to Licensee
pursuant to, and described in, a Technology Schedule(s) entered into by the parties pursuant to
the terms of this Master Agreement.



     1.7 “Licensed MIPS Core” means a MIPS Core licensed by MIPS to Licensee pursuant
to, and described in, a Technology Schedule entered into by the parties pursuant to the terms of
this Master Agreement.



     1.8 “Licensed Hard Core Implementation” means an implementation of a Licensed MIPS
Core or Licensed MIPS Architecture Compatible Core, in non-synthesizable layout (GDSII or other
nonsynthesizable format), targeting a semiconductor manufacturing process technology used by an
Authorized Foundry, which implementation has passed the Compatibility Verification Process
identified in Exhibit B.



     1.9 “Licensed Technology” means the Licensed MIPS Core(s) and the Licensed MIPS
Architecture(s) licensed by MIPS to Licensee pursuant to, and described in, Technology Schedule(s)
entered into by the parties pursuant to the terms of this Master Agreement.



     1.10 “MIPS Core” means any functional block of integrated circuits that implement, in
whole or in part, MIPS Technology.



     1.11 “MIPS Deliverable” means any deliverable identified in a Technology Schedule to
be delivered by MIPS or that is otherwise delivered by MIPS to Licensee under the applicable
Technology Schedule. The MIPS Deliverables may be further divided into “Restricted Confidential
Deliverables,” including without limitation the Synthesizable Licensed MIPS








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





Core, “Internal Confidential Deliverables,” “External Confidential Deliverables” and
“Commercial Deliverables” as set forth in the applicable Technology Schedule.




     1.12 “MIPS Architecture” means any processor instruction set architecture (“ISA”) or
any application specific extension (“ASE”) to such architecture, and any associated privileged
resource architecture (“PRA”), developed by or for MIPS or its predecessor entities.



     1.13 “MIPS Technology” means MIPS Architecture, MIPS Cores, MIPS Deliverables, and any
Intellectual Property Rights associated with the foregoing.



     1.14 “Net Revenue” means the gross revenue received by Licensee from the sale of each
Licensee Chip accounted for in accordance with generally accepted accounting principles, and after
deduction for discounts, returns, freight, insurance, taxes, and duties, if any, which are
separately identified on the invoice. Such gross revenue shall include the fair market value of
all non-monetary consideration such as services or technology licenses received by Licensee, and
shall be no less than the amount which would be negotiated for such gross revenue in an
arm’s-length transaction.



     1.15 “Confidential Information” means (a) the MIPS Technology, (b) any and all other
information which is disclosed by MIPS to Licensee orally, electronically, visually, or in a
document or other tangible form and which is identified /as confidential and/or proprietary, (c)
any test results, error data, or other reports, including “Log Results” made by Licensee in
connection with the license rights granted under this Agreement or any Technology Schedule, (d) any
notes, extracts, analyses, or materials prepared by Licensee which are copies of the Confidential
Information or from which the substance of the Confidential Information can be reasonably inferred
or otherwise understood, and (e) the terms and conditions of this Agreement and any Technology
Schedules. “Confidential Information” shall not include information received from MIPS which
Licensee can clearly establish by written evidence (i) is or becomes rightfully known by Licensee
through disclosure from a third party without an obligation to maintain its confidentiality; (ii)
is or becomes generally known to the public through no fault of Licensee; or (iii) is independently
developed by Licensee without use of the Confidential Information. MIPS acknowledges and agrees
that in connection with the parties’ exercise of their rights granted under this Master Agreement,
Licensee will provide MIPS with certain proprietary information for the purposes set forth in a
Non-Disclosure Agreement entered into by the parties (attached hereto as Exhibit F which is
hereby incorporated by reference), for which proprietary information MIPS agrees to abide by the
confidentiality and non-use provisions set forth in such Non-Disclosure Agreement. Otherwise, MIPS
does not desire to receive Licensee’s confidential information under the terms of this Agreement or
any Technology Schedule. Therefore, unless covered by Exhibit F or otherwise agreed in a
separate written non-disclosure agreement executed between the parties, any





information which
Licensee supplies to MIPS shall not be subject to an obligation of confidence by MIPS and MIPS
shall not be liable for any use or disclosure thereof, except for liability that may arise out of
the infringement of valid patents, [*].




     1.16 “Synthesizable Licensed MIPS Core” means an RTL model of a Licensed MIPS Core or
a Licensed MIPS Architecture Compatible Core, which can be synthesized into a gate level netlist.



     1.17 A Licensee Chip is “Taped Out” and the “Tapeout” of such Licensee Chip
occurs when the GDSII or an equivalent format representation of such Licensee Chip is completed.



2. LICENSE GRANTS




     2.1 License to Licensed MIPS Architecture. Subject to the terms and conditions of
this Agreement and the applicable Technology Schedule, MIPS grants to Licensee a non-exclusive,
worldwide, non-transferable (except as set forth in Section 15.5) right and license under MIPS
Intellectual Property Rights in the MIPS Deliverables of each Licensed MIPS Architecture to:



          2.1.1 internally develop Synthesizable Licensed MIPS Cores that are Licensed MIPS Architecture
Compatible Cores that implement the Licensed MIPS Architecture, subject to the terms of the
Technology Schedule for each Licensed MIPS Architecture;




          2.1.2 internally develop or have developed by third parties approved in writing by MIPS, a
Licensed Hard Core Implementation from the Synthesizable Licensed MIPS Core developed by Licensee
pursuant to Subsection 2.1.1;




          2.1.3 internally design [*] the Licensed Hard Core Implementation developed pursuant to
Subsection 2.1.2 into Licensee Chips;




          2.1.4 have made the Licensed Hard Core Implementation as incorporated in Licensee Chips
developed pursuant to Subsection 2.1.3 at the Authorized Foundry to whose process the Licensed Hard
Core Implementation is targeted;




          2.1.5 use, import, offer for sale, and sell and otherwise distribute the Licensed Hard Core
Implementation as incorporated in Licensee Chips manufactured pursuant to Subsection 2.1.4, subject
to the terms and conditions of the applicable Technology Schedule.




     2.2 Rights to Modify Licensed MIPS Architecture. Except as expressly permitted in the
Technology Schedule for the applicable Licensed MIPS Architecture, Licensee may not subset,
superset or otherwise modify the functional behavior of the Licensed MIPS Architecture.



     2.3 License to Licensed MIPS Core. Subject to the terms and conditions of this
Agreement and the applicable Technology Schedule, MIPS grants to Licensee a non-exclusive,
worldwide, non-transferable (except as set forth in Section 15.5)








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





right and license under MIPS Intellectual Property Rights in the MIPS Deliverables of each
Licensed MIPS Core to:




          2.3.1 internally develop or have developed by third parties approved in writing by MIPS, a
Licensed Hard Core Implementation from the Synthesizable Licensed MIPS Core delivered by MIPS under
the applicable Technology Schedule, when applicable;




          2.3.2 internally design the Licensed Hard Core Implementation delivered by MIPS under the
applicable Technology Schedule, when applicable, or developed pursuant to Subsection 2.3.1 into
Licensee Chips;




          2.3.3 have made the Licensed Hard Core Implementation as incorporated in Licensee Chips
developed pursuant to Subsection 2.3.2 at the Authorized Foundry to whose process the Licensed Hard
Core Implementation is targeted;




          2.3.4 use, import, offer for sale, and sell and otherwise distribute the Licensed Hard Core
Implementation as incorporated in Licensee Chips manufactured pursuant to Subsection 2.3.3 only as
provided in the applicable Technology Schedule;




          2.3.5 use, copy, modify, reproduce and have reproduced, create derivative works from, and sell
and otherwise distribute the Commercial Deliverables identified in the applicable Technology
Schedule and derivative works thereof only in conjunction with distribution or sale of the
applicable Licensee Chips provided that all Commercial Deliverables and derivative works thereof
contain all copyright and other proprietary notices contained in the original Commercial
Deliverables provided by MIPS to Licensee and are complete and accurate.




          2.3.6 provide External Confidential Deliverables identified in the applicable Technology
Schedule under an appropriate nondisclosure agreement to Licensee’s customers only for the purposes
of developing and testing the customer’s systems which will incorporate a Licensee Chip and as
otherwise specifically permitted in the applicable Technology Schedule, subject to any restrictions
identified in the applicable Technology Schedule.




     2.4 Rights to Modify Licensed MIPS Core. No right is granted under Section 2.3 to
modify or create derivative works of the Licensed MIPS Core delivered by MIPS as either a
Synthesizable Licensed MIPS Core or a Licensed Hard Core Implementation as provided in the
applicable Technology Schedule, except as expressly set forth below in this Section 2.4:



          2.4.1 Licensee may configure a Synthesizable Licensed MIPS Core in accordance with the options
set forth in the Implementor’s Guide for the applicable Licensed MIPS Core (the “Configured
Synthesizable Licensed MIPS Core”) and as necessary to create Licensed Hard Core Implementations of
such Synthesizable Licensed MIPS Core, provided the sequential behavior of such Licensed Hard Core
Implementation is identical to the sequential behavior of the






Configured Synthesizable Licensed
MIPS Core on a cycle-by-cycle basis.




          2.4.2 Provided Licensee has licensed all of the MIPS Architecture available for license under
this Master Agreement that is implemented in a Licensed MIPS Core, Licensee may modify such
Licensed MIPS Core to develop Licensed MIPS Architecture Compatible Cores in accordance with
Sections 2.1 and 2.2 and the applicable Technology Schedules for the applicable Licensed MIPS
Architecture(s); provided, however, that all of the following shall apply:




               2.4.2.1 any such modifications to a Licensed MIPS Core shall not be supported under the
maintenance and support provisions for the Licensed MIPS Core, although where appropriate support
may be available under the maintenance and support provisions for the Licensed MIPS Architecture;



               2.4.2.2 the Licensed Hard Core Implementation of any such Licensed MIPS Architecture
Compatible Core must pass the compatibility verification process described in Exhibit B
using the applicable Architecture Verification Programs for the applicable Licensed MIPS
Architecture;



               2.4.2.3 any per use fees owed for use of the Licensed MIPS Core in a Licensee Chip shall
continue to be owed for use of the modified Licensed MIPS Core in a Licensee Chip.



               2.4.2.4 the royalties applicable to any resulting Licensee Chip shall be the greater of either
(a) royalties determined under the Technology Schedule for the applicable Licensed MIPS
Architecture or (b) the royalties determined under the Technology Schedule for the applicable
Licensed MIPS Core; and



               2.4.2.5 Licensee shall not use any Licensed Mark (as defined and described in Exhibit
D) corresponding to the Licensed MIPS Core that is modified under this Subsection 2.4.2 in
connection with any resulting Licensee Chips, but rather shall only use the Licensed Mark(s)
corresponding to the applicable Licensed MIPS Architecture(s).



     2.5 Third Parties. For purposes of Subsections 2.1.1 and 2.1.2, “internally” shall
include the use of individuals working at Licensee’s facilities who are not Licensee’s employees
provided that such individuals work under the direct supervision of a Licensee employee and that no
more than five (5) of such individuals are employees of the same third party unless approved in
writing by MIPS. Licensee’s rights to use third parties to “internally develop” and “internally
design” under Subsections 2.1.1 and 2.1.2 and to use authorized third parties to “have developed”
and to “have made” under Subsections 2.1.1 and 2.1.3 are conditioned upon each third party agreeing
in writing to be bound by obligations with respect to Confidential Information that are at least as
protective as those contained in this Agreement and each third party supplying the contracted work
solely to Licensee. Licensee’s deliverables








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





incorporating MIPS Confidential Information to each Authorized Foundry shall be limited to (i)
GDSII files of the entire Licensee Chip and (ii) production scan test vectors for the entire
Licensee Chip which have been generated by automatic test program generation (ATPG) tools. If
Licensee desires to provide deliverables to an Authorized Foundry other than those listed above
which incorporate MIPS Confidential Information, prior written approval from MIPS shall be
obtained. Any required written approval from MIPS to use a third party may be obtained either in a
Technology Schedule or in a separate document (the form attached as Exhibit C is to be used
for this purpose). If Licensee and/or any such third party, materially breaches its obligations
with respect to Confidential Information referred to in this Section 2 and/or in Section 10,
Licensee agrees that such breach shall be treated as a material breach of this Agreement and any
applicable Technology Schedule by Licensee, thus entitling MIPS to exercise its rights under this
Agreement and any applicable Technology Schedule in accordance with the provisions of Section 14
and MIPS may, at its election and in addition to any other remedies that it may have, undertake
enforcement directly against Licensee and/or the breaching third party. Licensee shall indemnify,
defend, and hold MIPS and MIPS’ affiliates harmless from and against any and all actual or
threatened losses, liabilities, costs, damages, and expenses (including reasonable attorneys’
fees), arising out of or in connection with any such breach.




     2.6 No Sublicenses. Licensee shall not have the right to sublicense the rights
granted hereunder to any third party. For purposes of clarification, this Section 6 shall not, and
is not intended by the parties to, derogate from the rights expressly granted to Licensee in
Sections 2.1-2.5.



     2.7 Limitation on License. All Intellectual Property Rights and other proprietary
rights of MIPS not expressly granted to Licensee in this Agreement or the applicable Technology
Schedule are expressly reserved by MIPS. Other than the licenses specifically granted to Licensee
in Sections 2.1 and 2.3 (and as permitted in Section 2.4) or in the applicable Technology Schedule,
Licensee may not use the MIPS Deliverables for any other purpose.



     2.8 No Reverse Engineering. Licensee may not reverse engineer any MIPS Deliverables
not delivered in source format (the “binary materials”) nor may Licensee decompile, disassemble, or
otherwise reduce the binary materials or any component thereof to human-readable or non-binary
form.



     2.9 Third Party IP. Licensee acknowledges that third party software, cells or other
intellectual property (“Third Party IP”) may be included in the MIPS Deliverables delivered
pursuant to a Technology Schedule to the extent identified in the Technology Schedule. To the
extent set forth in the applicable Technology Schedule, Licensee shall be responsible for obtaining
all permissions, licenses, and consents necessary for Licensee to use said Third Party IP and
Licensee may be required to provide MIPS with written evidence thereof before MIPS shall be
required to deliver the MIPS Deliverables





incorporating said Third Party IP, notwithstanding any
delivery schedule to the contrary.




3. DELIVERY




     3.1 Delivery. MIPS will deliver the MIPS Deliverables by electronic means to Licensee
in accordance with the delivery schedule set forth in the applicable Technology Schedule or by
other means as appropriate. For purposes of this Agreement, electronic delivery may be
accomplished by electronically transmitting deliverables or by making deliverables available for
download by Licensee from a protected download site.



     3.2 Use of Deliverables. Licensee shall use the most recent version of each MIPS
Deliverable available from MIPS [*] other than as set forth in the applicable Technology Schedule
prior to the commencement of the design of each Licensee Chip (which commencement shall be no
earlier than twenty-four (24) months prior to first commercial shipment of such Licensee Chip or if
commenced more than twenty-four (24) months prior to first commercial shipment of such Licensee
Chip, then Licensee will have updated its design to MIPS Deliverables available from MIPS [*] other
than as set forth in the applicable Technology Schedule within such twenty-four (24) month period
prior to first commercial shipment, except if the Licensee Chip is incorporating a Licensed MIPS
Architecture Compatible Core, the Licensee will have updated its design to MIPS Deliverables
available from MIPS [*] other than as set forth in the applicable Technology Schedule within
thirty-six (36) months prior to first commercial shipment of such Licensee Chip), or, [*] any
subsequently available version of such MIPS Deliverable, in the design and development of such
chip. Licensee shall notify MIPS (the form attached as Exhibit C is to be used for this purpose)
upon the commencement of the design of each Licensee Chip. Provided Licensee complies with this
Section 3.2 in the design of a Licensee Chip, the MIPS Deliverables shall be covered by MIPS
indemnification as set forth in Section 12.1 with respect to that Licensee Chip. In addition, if
Licensee does not comply with this section 3.2 in the design of a Licensed MIPS Architecture
Compatible Core incorporated in a Licensee Chip, the MIPS Deliverables shall also be covered by
MIPS indemnification as set forth in Section 12.1 with respect to that Licensee Chip, but only with
respect to [*] that would still have occurred if Licensee had used the correct version of such MIPS
Deliverables in conformance with this Section 3.2. Failure to comply with this Section 3.2 in the
design of a Licensee Chip shall not be construed as a breach of this Agreement.



4. COMPATIBILITY VERIFICATION PROCESS




     Except when already verified by MIPS, Licensee shall ensure that each Licensed Hard Core
Implementation passes the Compatibility Verification Process identified in Exhibit B
attached hereto before the commencement of commercial production of each Licensee Chip
incorporating such Licensed Hard Core Implementation.








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.






5. PAYMENTS




     5.1 License Fees. For the rights granted in Section 2 with respect to each Licensed
Technology, Licensee shall pay MIPS the license fees set forth in the applicable Technology
Schedule in accordance with the schedule provided therein and Licensee shall provide MIPS with the
requisite purchase order as soon as practicable after execution of each Technology Schedule.



     5.2 Royalties. For the rights granted in Section 2 with respect to each Licensed
Technology, Licensee shall pay MIPS the royalties set forth in the applicable Technology Schedule.
Royalties with respect to Licensee Chips shall accrue when Licensee ships the Licensee Chips to its
customers. Licensee shall pay all royalties within thirty (30) days after the end of the calendar
quarter in which they accrue, and the parties agree that no amounts shall be withheld from such
royalty payments by Licensee for bad debt.



     5.3 Support and Maintenance. For the services provided in Section 9.1 with respect to
each Licensed Technology, Licensee shall pay MIPS the support and maintenance fees set forth in the
applicable Technology Schedule and Licensee shall provide MIPS with the requisite purchase order as
soon as practicable after execution of each Technology Schedule and thereafter at least thirty (30)
days prior to each applicable payment due date.



     5.4 Late Payment Fees. All late payments shall be subject to a late payment penalty
calculated at the rate of one and one-half percent (1.5%) per month or the maximum allowable by
law, whichever is less.



     5.5 Wire Transfer Account: Taxes. All payments shall be made in U.S. dollars by wire
transfer to the Bank of America at Payment Services Operations, Dept. 5693, 1850 Gateway Boulevard,
Concord, California 94520, for MIPS Technologies, Inc.’s account number 12333-27846, and bank
routing number 121 000 358, or such other account as MIPS may identify in writing from time to
time. All payments by Licensee shall be made without reduction for any and all taxes, including,
without limitation, sales, use, value added, withholding or similar taxes, excluding taxes which
are imposed on the income of MIPS. The rate of conversion of royalties that accrue in currencies
other than U.S. dollars shall be the rate quoted by the largest foreign exchange bank in Licensee’s
country of incorporation as of the last business day of the calendar quarter during which such
royalties accrue. If necessary, Licensee shall withhold from amounts otherwise payable to MIPS,
and pay, on MIPS’ behalf, income taxes required by applicable law to be withheld by Licensee and
Licensee shall provide MIPS with tax receipts to establish that all such taxes have been paid and
are available to MIPS for credit for U.S. income tax purposes or as otherwise available to MIPS.



     5.6 Royalty Reports. Within thirty (30) days after the end of each calendar quarter,
Licensee shall furnish to MIPS





a statement for each Technology Schedule entered into under this
Agreement, in suitable form, which identifies the applicable Technology Schedule and provides the
names and part numbers of an Licensee Chips shipped during the quarter under that Technology
Schedule, the number of units of and the applicable Net Revenue and royalty for each Licensee Chip
shipped during the quarter under that Technology Schedule, the number of instantiations of each
Licensed Hard Core Implementation that are in each such Licensee Chip, whenever applicable, a
non-binding forecast detailing the number of Licensee Chips to be shipped under that Technology
Schedule in the next six (6) months, and the amount, method of calculation, and any other data
necessary for calculation of the royalty payable under that Technology Schedule for such calendar
quarter. All royalty reports should be sent to MIPS at the address first set forth above,
Attention: Controller. Fax: 650-567-5156.




     5.7 Books and Records. Licensee shall keep complete and accurate records which
support the license fees, royalties, other payments and reports provided to MIPS pursuant to
Sections 5.1, 5.2, 5.3 and 5.6, respectively. These records shall be retained for a period of at
least three (3) years from the date of the applicable payment or report, notwithstanding the
expiration or other termination of this Agreement or of any Technology Schedule. MIPS shall have
the right, at its expense (except as set forth below), to have an accounting firm (other than MIPS’
then-current auditors unless otherwise mutually agreed) examine and audit, not more than once a
year unless the preceding audit revealed a material discrepancy, and during normal business hours,
all such records and such other records and accounts as may contain, under recognized accounting
practices, information bearing upon the amount of license fees, royalties and other payments
payable to MIPS under this Agreement and any Technology Schedule; provided that, prior to any such
examination or audit, such accounting firm enters into a nondisclosure agreement with Licensee
prohibiting such firm from disclosing to MIPS any information of Licensee other than the amount of
any underpayment or overpayment of royalties by Licensee, the reasons for any errors or omissions,
and any corrective actions required. Prompt adjustments shall be made by Licensee or MIPS to
compensate for any errors and/or omissions disclosed by such examination or audit which result in
an underpayment or overpayment of license fees, royalties and/or other payments hereunder,
including payment of applicable late payment fees. Should the amount of any underpayment exceed
five percent (5%) of the total license fees, royalties and other payments due for the period under
audit, Licensee shall pay for the reasonable fees charged by the accounting firm for the audit.



6. MARKETING RIGHTS AND OBLIGATIONS




     6.1 Licensee Rights and Obligations. Licensee shall:



          6.1.1 have the right to participate in cooperative marketing activities in accordance with the
terms of the separate Trademark License Agreement entered into by the









 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





parties and attached as Exhibit D to this Master Agreement (the “Trademark License
Agreement”).




          6.1.2 consult with MIPS regarding any advertising or trade practice which Licensee is aware
would adversely affect the good name, trademarks, goodwill, or reputation of MIPS;




          6.1.3 obtain and maintain all necessary government licenses, permits and approvals when
necessary or advisable for implementation of this Agreement and any Technology Schedule, and comply
with all applicable laws and regulations; and




          6.1.4 report, at least quarterly, all material errors in the MIPS Deliverables experienced by
Licensee and, subject to, upon request by Licensee, execution by MIPS and Licensee of a mutually
agreed upon non-disclosure agreement, make good faith efforts to report in sufficient detail to
allow MIPS to identify and recreate such errors.




     6.2 Press Release(s). A press release announcing the existence of this Agreement and
each Technology Schedule shall be issued as described in each Technology Schedule. Thereafter,
each party may issue press releases or other promotional materials which (i) identify Licensee as a
MIPS licensee, (ii) identify the Licensed Architecture and/or Licensed MIPS Core(s) licensed to
Licensee, and/or (iii) identify the Licensee Chip(s) as incorporating such Licensed Architecture
and/or Licensed MIPS Core(s). As mutually agreed, Licensee will use commercially reasonable
efforts to promote its use of MIPS Technology in its products.



     6.3 Trademarks. All rights to use MIPS Trademarks shall be granted pursuant to the
separate Trademark License Agreement.



7. OWNERSHIP AND PROPRIETARY NOTICES




     7.1 MIPS Technology. Except as otherwise specifically provided in this Agreement,
MIPS reserves all right, title and interest in and to the MIPS Technology and other designs, data,
documentation, technology, and/or know-how developed by or for MIPS.



     7.2 Commercial Documentation. MIPS shall own all right, title and interest in and to
the Commercial Deliverables provided by MIPS to Licensee. Licensee shall own all right, title and
interest in and to the modifications and derivative works of the Commercial Deliverables created by
Licensee, subject to MIPS’ rights in the underlying original Commercial Deliverables.



     7.3 Proprietary Notices. To the extent required by law, Licensee agrees to place
MIPS’ respective copyright, mask work or patent notices on Licensee’s materials as specified by
MIPS from time to time in order for MIPS to protect its Intellectual Property Rights.



     7.4 Rights in Data. Licensee acknowledges that all software and software related
items licensed by MIPS to Licensee pursuant to this Agreement and any Technology





Schedule are
“Commercial Computer Software” or “Commercial Computer Software Documentation” as defined in FAR
12.212 for civilian agencies and DFARS 227.7202 for military agencies, and that in the event that
Licensee is permitted under this Agreement to provide such items to the U.S. government, such items
shall be provided under terms at least as restrictive as the terms of this Agreement and the
applicable Technology Schedule.




8. COVENANT TO FACILITATE DEVELOPMENT WITH MIPS TECHNOLOGY




     8.1 MIPS Architecture Licensee. To preserve MIPS’ ability to continue to update,
enhance, develop and commercialize the MIPS Products (as defined below), Licensee hereby
perpetually and irrevocably agrees that Licensee and its affiliates will not enforce or assert the
Licensee Potentially Blocking Patents (as defined below) in connection with, or in a manner which
in any way limits, hampers or prevents, the use, design, development, modification, enhancement,
testing, making, copying, offering to sell, selling, importing and licensing or other distribution,
by any MIPS Community Member (as defined below) of (a) MIPS Products, tools pertaining to the MIPS
Products, and any implementation of MIPS Products, and (b) MIPS Products or any implementation
thereof as components of, or incorporated in, products. For purposes of this Agreement, “License
Potentially Blocking Patents” means all claims contained in patents or patent applications owned
by, licensed to or assigned to Licensee or its affiliates, which cover (i) any modification of the
MIPS Architecture, MIPS Cores, and/or MIPS Deliverables (collectively, “MIPS Products”), or (ii)
any implementation of MIPS Products that would prevent a MIPS Community Member from utilizing,
licensing or otherwise distributing MIPS Products or any implementation thereof, or (iii) any
feature of MIPS Product(s); and “MIPS Community Member” means MIPS, its distributors, resellers,
OEMs, agents, customers, licensees (through multiple tiers of licensing and sublicensing) or end
users in any country.



     8.2 MIPS Core Licensee. The parties agree to negotiate terms and conditions to be set
forth in Exhibit E prior to licensing a MIPS Core.



9. SUPPORT, MAINTENANCE AND PROGRAM MANAGEMENT




     9.1 Maintenance and Support of Licensee. MIPS will provide the maintenance and
support services in connection with the MIPS Deliverables as set forth in the applicable Technology
Schedule. If Licensee requests additional support, MIPS shall use reasonable efforts to provide
additional support and assistance to Licensee with respect to the MIPS Deliverables in accordance
with the reasonable availability of MIPS employees at MIPS’ then-current standard fees, terms and
conditions. Licensee acknowledges that there may be periods when MIPS employees are not available
to provide support. MIPS shall have no responsibility or obligation to provide any maintenance or
support with respect to any MIPS Deliverables








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





that have been modified by Licensee except as permitted under and in accordance with Section
2.4 of this Agreement.




     9.2 Support of Licensee Customers. Licensee shall be responsible for all support to
customers of Licensee Chips. Licensee will not represent that MIPS is available to answer any
questions from such customers directly.



     9.3 Program Management. Each party shall identify individual employee(s) (its
“Program Manager(s)”) under each Technology Schedule who shall be responsible for interfacing with
the other party, especially in connection with the provision of MIPS Deliverables and support and
maintenance, under that Technology Schedule. The Program Manager(s) for each party shall be
knowledgeable about such party’s products and design and manufacturing activities and possess
adequate communication skills to keep the other party fully informed relative to such party’s
performance under this Agreement and the applicable Technology Schedule. Each party shall notify
the other in writing of any successor Program Manager(s).



10. CONFIDENTIAL INFORMATION




     10.1 Use of Confidential Information. Licensee agrees:



          10.1.1 to use the Confidential Information only in connection with the exercise its rights or
fulfillment of its obligations under this Agreement or any Technology Schedule and for no other
purpose;




          10.1.2 to implement reasonable procedures to prohibit the disclosure, unauthorized
duplication, misuse or removal of Confidential Information;




          10.1.3 not to disclose Confidential Information to employees not having a need to know or to
any third party (except that Licensee may, in appropriate circumstances and subject to a
nondisclosure agreement with terms and conditions at least as protective as the terms of this
Section 10, disclose Confidential Information to Licensee’s contractors and customers, solely as
permitted under Section 2 of this Agreement); and




          10.1.4 not to use Confidential Information (including without limitation all MIPS
Deliverables) for the development of any competing technology and not to use any Confidential
Information for the benefit of any such technology or implementation thereof.




     10.2 Standard of Care. Without limiting the foregoing, Licensee shall at all times
protect the Confidential Information with at least the same standard of care as it exercises to
protect its own confidential information of like importance, but in no event less than reasonable
care. Notwithstanding the foregoing, Licensee acknowledges and agrees that the Synthesizable
Licensed MIPS Core, Licensed Hard Core Implementation, Verification Test. Suite, Architecture
Verification Programs, and any MIPS Deliverables identified as Restricted Confidential Deliverables
on the applicable





Technology Schedule (collectively “Restricted Confidential Deliverables”) are
furnished to Licensee on an enhanced confidential and trade secret basis and Licensee agrees to
take additional steps to prevent unauthorized disclosure thereof, including but not limited to, the
following:




          10.2.1 Except as set forth in Subsection 10.2.2.5 below, Licensee will use the Restricted
Confidential Deliverables only in select buildings at a site approved by MIPS as set forth in the
applicable Technology Schedule, which buildings shall have restricted access twenty-four (24) hours
a day, and Licensee shall not use the Restricted Confidential Deliverables in any other buildings
or at any other site without MIPS’ prior written consent;




          10.2.2 For Restricted Confidential Deliverables that are capable of being stored on a
computer, the following restrictions apply:




               10.2.2.1 Restricted Confidential Deliverables may be placed on file server(s) only if access
to such server(s) (the “Systems”) is restricted to a known set of users. Except as necessary to
carry out Subsection 10.2.2.5 below, the Systems will be located exclusively in the select
buildings identified in Subsection 10.2.1 above;



               10.2.2.2 Restricted Confidential Deliverables shall be protected using, at a minimum, native
operating system permissions capabilities to restrict all access (including read access) to a known
and specific group of users, each of whom has a need to use as set out in Subsection 10.2.4 below.
Moreover, such users shall use commercially reasonable password security, and “log off” or “lock
access” to their Systems when not in use;



               10.2.2.3 Restricted Confidential Deliverables may be backed up only to a medium which is also
protected as required for Restricted Confidential Deliverables;



               10.2.2.4 Except as provided in this Subsection 10.2.2.4, the Systems will not allow access to
a privileged account (e.g., a “root,” “supervisor” or “administrative” account) that would allow
bypassing of access control mechanisms as set out in Subsection 10.2.2.2 above. If such privileged
accounts must exist for normal maintenance or administrative purposes, these accounts will be
restricted to a small set of Licensee’s employees who will be subject to the terms of Subsection
10.2.4 below; and



               10.2.2.5 Licensee may permit remote access to the Restricted Confidential Deliverables from
other locations only by Licensee’s employees that would otherwise have access or MIPS. Should
files move to another system, whether or not remote, the same access limitations shall apply.



          10.2.3 Licensee agrees to allow reasonable access for MIPS representatives to all buildings,
rooms and computers where the Restricted Confidential Deliverables are









 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





kept, during normal business hours, to ensure that Licensee is complying with its obligations
with respect to such information.




          10.2.4 Licensee agrees to restrict access to the Restricted Confidential Deliverables solely
to those of its employees who have a need to use the information for performing its duties and
exercising its rights under this Agreement. As used in this Agreement “access” means having the
capability to view, copy, display, print, transfer, or otherwise manipulate or have exposure to any
form of the information. Licensee agrees to maintain a log which contains a list of all
individuals who at any time actually have access to or have had access to the Restricted
Confidential Deliverables or any portion thereof, including those individuals having privileged
accounts as permitted under Subsection 10.2.2.4. Licensee agrees to comply with the requests of
MIPS, from time to time, to provide MIPS with information required to determine whether specified
individuals did or did not have access to the Restricted Confidential Deliverables or any portion
thereof. If requested by MIPS, Licensee agrees to require each employee, prior to the employee’s
access to this information, to sign a confidentiality agreement which in form And substance
contains obligations of confidentiality as strict as the obligations contained herein, unless
Licensee has confidentiality agreements with each of its employees in a form acceptable to MIPS.




     10.3 Confidentiality of Agreement. Except as expressly provided herein, each party
agrees that the terms and conditions of this Agreement and any Technology Schedule shall be treated
as confidential and that neither party will disclose the terms or conditions of this Agreement or
any Technology Schedule to any third party without the prior written consent of the other party,
provided, however, that each party may disclose the terms and conditions of this Agreement, to the
extent necessary: (a) as required by any court or other governmental body; (b) as otherwise
required by law; (c) in confidence to legal counsel of the parties, accountants, and other
professional advisors; (d) in confidence, to banks, investors and other financing sources and their
advisors; (e) in connection with the enforcement of this Agreement or rights under this Agreement;
or (f) in confidence, in connection with an actual or prospective merger or acquisition or similar
transaction. With respect to disclosure required by a court, governmental order or otherwise
required by law, the party required to disclose shall provide prior notification of such impending
disclosure to the other party and use all reasonable efforts to preserve the confidentiality of the
terms of this Agreement and any Technology Schedule in complying with such required disclosure,
including obtaining a protective order to the extent reasonably possible.



11. DISCLAIMER OF WARRANTIES



NEITHER PARTY MAKES ANY WARRANTIES AND EACH PARTY DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS,
STATUTORY, IMPLIED OR OTHERWISE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY,






FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS,
REGARDING THE LICENSED TECHNOLOGY, LICENSED HARD CORE IMPLEMENTATIONS, LICENSEE CHIPS, AND MIPS
TECHNOLOGY. IN ADDITION TO THE FOREGOING, MIPS DISCLAIMS ANY WARRANTY THAT A CORE THAT PASSES THE
COMPATIBILITY VERIFICATION PROCESS DESCRIBED IN SECTION 4 WILL BE COMPATIBLE IN ALL RESPECTS WITH
THE APPLICABLE MIPS ARCHITECTURE.




12. INDEMNIFICATION




     12.1 Indemnification by MIPS.



          12.1.1 Subject to the limitations set forth in this Agreement, MIPS shall defend, indemnify
and hold Licensee harmless against any action brought against Licensee as for a claim based on
infringement of an Intellectual Property Right of a third party in the United States [*] by the
MIPS Deliverables in the form provided by MIPS to Licensee hereunder [*] to the extent implemented
by Licensee in accordance with MIPS express instructions in the MIPS Deliverables for the Licensed
MIPS Architecture; provided that Licensee: (A) notifies MIPS in writing within fifteen (15) days of
any such claim, and (B) reasonably cooperates with MIPS, at MIPS’ expense, in defending or settling
such claim. MIPS shall have sole control of the defense and all related settlement negotiations,
provided, however, that [*], and further provided that Licensee shall have the right to be
represented by its own attorney at Licensee’s expense. This indemnity does not extend to:




          (a) a claim to the extent based upon an infringement or alleged infringement of any
Intellectual Property Right of a third party by: (i) the manufacturing process used to manufacture
Licensee Chips, (ii) any modification or enhancement to any MIPS Deliverable made by or for
Licensee or made by MIPS at Licensee’s request, if such infringement or alleged infringement would
not have occurred but for such modification or enhancement, (iii) the use of, any Third Party IP
identified in a Technology Schedule for which Licensee was responsible for obtaining all
permissions, licenses and consents necessary for Licensee to use the Third Party IP, (iv) the use
of a version of MIPS Deliverables in the design of a Licensee Chip that is not covered for
indemnification under Section 3.2 with respect to that Licensee Chip, or (v) the use of any
Licensed Hard Core Implementation, Licensee Chip or MIPS Deliverables outside the scope of the
licenses hereunder or in combination with other technology, equipment or software not provided by
MIPS, if such infringement or alleged infringement would not have occurred but for such
combination;




          (b) a claim to the extent arising from any false or misleading representation made by Licensee
or its agents regarding any MIPS Technology, Licensed MIPS Core, Licensed MIPS Architecture,
Licensed Hard Core Implementation, and/or Licensee Chip, or otherwise arising from









 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





the marketing or distribution practices adopted by Licensee or its agents in connection with
Licensee Chips.




          12.1.2 If in MIPS’ reasonable judgment, the use and/or licensing of any MIPS Deliverable, a
Licensed Hard Core Implementation, or any portion thereof, and/or the use, manufacture or sale of
any Licensed Hard Core implementation as incorporated into Licensee Chips, is likely to be found to
infringe the Intellectual Property Rights of a third party, MIPS shall, at its option, either (x)
procure the right to allow Licensee to continue the allegedly infringing activity; (y) replace or
modify the affected MIPS Deliverables so that they become non-infringing; or (z) if (x) or (y) is
not commercially practicable, or Licensee does not cease use of any MIPS Deliverable which was
modified or replaced or cease the use, manufacture or sale of any Licensee Chip which may be
infringing such Intellectual Property Rights, then MIPS may provide written notice to Licensee
identifying the allegedly infringing MIPS Deliverable or the allegedly infringing activity and
terminate Licensee’s license with respect thereto so long as such notice and termination is carried
out in a nondiscriminatory manner among similarly infringing licensees of MIPS for the MIPS
Deliverable(s) in question. In the event Licensee requests that the license with respect to any
allegedly infringing MIPS Deliverable or allegedly infringing activity remain in effect, such
license would remain in effect for so long as Licensee procures any necessary licenses from third
parties for such Intellectual Property Rights and indemnifies MIPS for all costs and damages
incurred by MIPS with respect to Licensee’s continued use of the allegedly infringing part of the
MIPS Deliverable or the allegedly infringing activity. Upon MIPS performance of (x), (y) or (z)
above, the liability of MIPS for such alleged infringement shall terminate with respect to all
damages arising from such alleged infringement after the date of MIPS’ performance.




          12.1.3 THIS SECTION 12.1 STATES MIPS’ ENTIRE LIABILITY FOR INFRINGEMENT.




     12.2 Indemnification by Licensee. Subject to the limitations set forth in this
Agreement, Licensee shall defend, indemnify and hold MIPS harmless against any action brought
against MIPS for:



          (a) a claim based upon an infringement or alleged infringement of any Intellectual Property
Right of a third party by: (i) the manufacturing process used to manufacture Licensee Chips, (ii)
any modification or enhancement to any MIPS Deliverable made by or for Licensee or made by MIPS at
Licensee’s request, if such infringement or alleged infringement would not have occurred but for
such modification or enhancement, (iii) the use of any Third Party IP identified in a Technology
Schedule for which Licensee was responsible for obtaining all permissions, licenses and consents
necessary for Licensee to use the Third Party IP, (iv) the use of a version of MIPS Deliverables in
the design of a Licensee Chip that is not covered for indemnification under Section 3.2 with
respect to that Licensee Chip, or (v) the use of any Licensed Hard Core






Implementation,
Licensee
Chip or MIPS Deliverables outside the scope of the licenses hereunder or in combination with other
technology, equipment or software not provided by MIPS, if such infringement or alleged
infringement would not have occurred but for such combination.




          (b) a claim arising from any false or misleading representation made by Licensee or its agents
regarding any MIPS Technology, Licensed MIPS Core, Licensed Hard Core Implementation, and/or
Licensee Chip; provided that MIPS: (A) promptly notifies Licensee in writing of any such claim, and
(B) reasonably cooperates with Licensee, at Licensee’s expense, in defending or settling such
claim. Licensee shall have sole control of the defense and all related settlement negotiations,
provided, however, that Licensee may not enter into any settlement providing for any restriction on
MIPS or any MIPS Technology without MIPS’ consent, and provided further that MIPS shall have the
right to be represented by its own attorney at MIPS’ expense. Except as otherwise expressly set
forth in section 12.1.2 above, THIS SECTION 12.2 STATES LICENSEES ENTIRE LIABILITY FOR
INFRINGEMENT.




13. LIMITATION OF LIABILITY



EXCEPT FOR BREACHES OF SECTION 2 (“LICENSE GRANTS”) AND/OR SECTION 10 (“CONFIDENTIAL INFORMATION”)
OR EXHIBIT F, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INCIDENTAL, INDIRECT,
CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF ANY KIND OR NATURE ARISING OUT OF THIS AGREEMENT,
WHETHER SUCH LIABILITY IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR STRICT
LIABILITY), OR OTHERWISE, EVEN IF THE PARTY HAS BEEN WARNED OF THE POSSIBILITY OF ANY SUCH LOSS OR
DAMAGE IN ADVANCE. EXCEPT FOR AMOUNTS DUE UNDER SECTION 5 AND ANY TECHNOLOGY SCHEDULE, OR FOR
BREACHES OF SECTIONS 2 AND/OR 10 OR EXHIBIT F, OR FOR LICENSEE’S INDEMNIFICATION OBLIGATIONS UNDER
SECTIONS 12.1.2 AND 12.2, IN NO EVENT SHALL EITHER PARTY’S TOTAL LIABILITY UNDER THIS AGREEMENT,
INCLUDING MIPS’ LIABILITY UNDER SECTION 12.1 (“INDEMNIFICATION BY MIPS”), EXCEED [*] FOR
THE LICENSED TECHNOLOGY THAT IS THE SUBJECT MATTER OF THE CLAIMS.. NOTWITHSTANDING ANYTHING TO THE
CONTRARY IN THIS AGREEMENT, IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES RELATING TO OR
RESULTING FROM THE USE OF MIPS TECHNOLOGY IN PRODUCTS USED FOR AVIATION, MEDICAL, NUCLEAR OR ULTRA
HAZARDOUS. PURPOSES OR FOR ANY DAMAGES OWED TO THIRD PARTIES RELATING TO TECHNOLOGY NOT PROVIDED
BY MIPS. LIABILITY FOR DAMAGES SHALL BE LIMITED AND EXCLUDED AS SET FORTH HEREIN, EVEN IF ANY
EXCLUSIVE









 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





REMEDY PROVIDED FOR IN THIS AGREEMENT FAILS OF ITS ESSENTIAL PURPOSE.




14. TERM AND TERMINATION




     14.1 Term. The term of this Agreement shall begin on the Effective Date and, unless
earlier terminated as provided below; shall continue until all Technology Schedules entered under
its terms have terminated or expired. The term of any Technology Schedule will be as set forth in
the Technology Schedule.



     14.2 Termination of the Master Agreement. Either party may terminate this Master
Agreement effective immediately upon written notice to the other party for any reason with or
without cause of any nature, thereby terminating the right to enter into any future Technology
Schedules under the terms of the Master Agreement. The terms of the Master Agreement shall remain
in effect with respect to any Technology Schedule that has not yet terminated or expired until said
Technology Schedule terminates or expires.



     14.3 Termination of a Technology Schedule. Either party may terminate a Technology
Schedule effective immediately and without liability upon written notice to the other party if the
other party:



          (a) voluntarily petitions in bankruptcy or otherwise seeks protection under any law for the
protection of debtors;




          (b) has a proceeding instituted against it under any provision of the United States (“US”)
Federal Bankruptcy Code or equivalent legislation of a foreign jurisdiction which is not dismissed
within ninety (90) days, or is adjudged a bankrupt, ceases or suspends business, or makes an
assignment of the majority of its assets for the benefit of its creditors;




          (c) materially breaches any obligation under Section 2 or 10 or Exhibit F of this
Agreement which breach is not capable of remedy; or




          (d) materially breaches any other obligation under this Agreement or a Technology Schedule
which is not remedied within thirty (30) days after the breaching party receives written notice
specifying the breach in detail (the “Default Notice”), unless the breach specified in the Default
Notice reasonably requires more than thirty (30) days to correct (specifically excluding any
failure to pay money or unauthorized disclosures of Confidential Information or breaches of
Exhibit F), and the party has begun substantial corrective action to remedy the default
within such thirty (30) days period and diligently pursues such action, in which event, termination
shall not be effective unless ninety (90) days has expired from the date of the Default Notice
without such corrective action being completed and the default remedied.




     14.4 Effect of Termination on Licenses. All licenses granted with respect to the
Licensed Technology





covered by a Technology Schedule shall terminate as of the effective date of
termination or expiration of that Technology Schedule, except that, provided that Licensee is not
in breach of the Agreement or of the Technology Schedule and continues to pay royalties as
specified in Section 5, Licensee shall have the right to continue having manufactured, distributing
and selling Licensee Chips which were commercially distributed prior to the effective date of
termination or expiration of that Technology Schedule.




     14.5 Return of Confidential Information and Payment. In the event of termination or
expiration of this Agreement or any Technology Schedule, Licensee shall promptly return to MIPS or
destroy (and certify to MIPS in a writing by an officer of Licensee that such destruction has
occurred) all Confidential Information not required for the exercise of any continuing rights under
14.4 and shall pay to MIPS any and all amounts due and owing under this Agreement or the Technology
Schedule prior to such termination or expiration.



     14.6 Survival of Remedies. Any termination hereunder shall be in addition to any
other remedy either party may have at law or in equity.



     14.7 Survival. The provisions of Sections 1, 2.5, 5 [*], 7, 8, 10, 11, 12, 13, 14.4,
14.5, 14.6, 14.7, and 15, and the provisions of Exhibit F, shall survive any termination or
expiration of this Agreement. The provisions of Sections 2.1 and 2.3 shall survive only to the
extent set forth in Section 14.4.



15. GENERAL TERMS AND CONDITIONS




     15.1 Notices. Any notice required or permitted by this Agreement shall be in writing
and shall be delivered to the party’s address first set forth above to the attention of President
with a copy to General Counsel and will be effective upon receipt. Each party may change its
address by notice given in accordance with this Section.



     15.2 Export. In recognition of U.S. and non-U.S. export control laws and regulations,
Licensee agrees that it will not export, or transfer for the purpose of reexport, any product,
technical data received hereunder or the product produced by use of such technical data, including
processes and services (the “Exported Product”), in violation of any U.S. or non-US regulation,
treaty, Executive Order, law, statute, amendment or supplement thereto. Further, Licensee will not
export the Exported Product to any prohibited or embargoed country or to any denied, blocked, or
designated person or entity as mentioned in any such U.S. or non-US regulation, treaty, Executive
Order, law, statute, amendment or supplement thereto. Unless an authorized representative of MIPS
has informed Licensee in writing to the contrary, it is the responsibility of the Licensee, at
Licensee’s expense, to obtain all approvals and consents from any governmental or
quasi-governmental entity prior to any export or reexport of the Exported Product for any reason.



     15.3 Governing Law and Forum Selection. This Agreement shall be governed by
California law excluding its








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





choice of law rules. With the exception of each party’s rights to enforce its intellectual
property rights and the confidentiality obligations under this Agreement or any Technology
Schedule, all disputes arising out of this Agreement shall be subject to the exclusive jurisdiction
and venue of the state and federal courts located in Santa Clara County, California, and the
parties consent to the personal and exclusive jurisdiction and venue of these courts. The parties
expressly disclaim the application of the United Nations Convention on the International Sale of
Goods to this Agreement.




     15.4 Waiver or Delay. Any express waiver or the failure to exercise promptly any
right under this Agreement will not create a continuing waiver or any expectation of
non-enforcement.



     15.5 Assignment. Licensee may not assign or transfer any of its rights or obligations
under this Agreement without MIPS’ prior written consent, and any attempt to do so will be null and
void. This prohibition against assignment (whether effected voluntarily or by operation of law)
without prior written consent shall apply even in the event of merger, reorganization or when a
third party purchases all or substantially all of Licensee’s assets, except that Licensee may, upon
written notice to MIPS, assign this Agreement to an acquiror in connection with a merger of
Licensee or an acquisition of all or substantially all of Licensee’s assets provided that (a) the
acquiror is not a competitor of MIPS (for purposes of this Agreement, a “competitor of MIPS” shall
be any entity that licenses out a processor architecture, licenses in or owns a general purpose
non-MIPS processor architecture, licenses out processor cores, or produces MIPS-based products not
under license from MIPS), (b) the acquiror is located in the United States, [*] as of the Effective
Date of this Agreement, (c) the acquiror has assumed in writing or by operation of law all of
Licensee’s obligations under this Agreement and the Technology Schedules entered into pursuant
hereto, (d) the acquiror agrees to continue royalty payments and rates per any prior MIPS-acquiror
agreements for acquiror products in production or development at the time of the acquisition, and
(e) Licensee pays MIPS the Transfer Fee set forth in each Technology Schedule for the Licensed
Architecture(s) and/or Licensed MIPS Core(s) and fulfills any other obligations with respect to
assignment set forth in each Technology Schedule entered into pursuant here. Subject to the
foregoing, this Agreement wilt be binding upon and will inure to the benefit of the parties and
their respective permitted successors and assigns. [*] to a non-affiliated third party that does
not have [*] to be able to continue to [*] or that is unable to perform the obligations set forth
herein, [*] that MIPS may assign its rights to receive payments from Licensee hereunder.



     15.6 Captions. All Section captions and headings are for reference only and shall not
be considered in interpreting or construing this Agreement.



     15.7 Construction. This Agreement has been negotiated by the parties, each of which
has been represented by





counsel. This Agreement will be fairly interpreted in accordance with its
terms, without any strict construction in favor of or against either party.




     15.8 English Language. The original of this Agreement has been written in English,
and such version shall be the governing version of the Agreement. Each party waives the right it
may have, if any, under any law or regulation to have this Agreement written in a language other
than English.



     15.9 Severability. If any provision of this Agreement is declared invalid, illegal,
or unenforceable by any tribunal, then such provision shall be deemed automatically adjusted to
conform to the requirements for validity as declared at such time and, as so adjusted, shall be
deemed a provision of this Agreement as though originally included herein. In the event that the
provision deemed invalid, illegal or unenforceable is of such a nature that it cannot be so
adjusted, the provision shall be deemed deleted from this Agreement as though the provision had
never been included herein. If any provision or portion of this Agreement is held to be
unenforceable or invalid, the parties agree to negotiate, in good faith, a substitute valid
provision which most nearly effects the parties’ intent in entering into this Agreement. In either
case, the remaining provisions of this Agreement shall remain in full force and effect. WITHOUT
LIMITING THE FOREGOING, IT IS EXPRESSLY UNDERSTOOD AND AGREED THAT EACH AND EVERY PROVISION OF THIS
AGREEMENT. WHICH PROVIDES FOR A LIMITATION OF LIABILITY, DISCLAIMER OF WARRANTY OR . EXCLUSION OF
DAMAGES IS INTENDED BY THE PARTIES TO BE SEVERABLE AND INDEPENDENT OF ANY OTHER SUCH PROVISION.
FURTHER, IN THE EVENT THAT ANY REMEDY HEREUNDER IS DETERMINED TO HAVE FAILED OF ITS ESSENTIAL
PURPOSE, ALL LIMITATIONS OF LIABILITY AND EXCLUSIONS OF DAMAGES SHALL REMAIN IN EFFECT.



     15.10 Independent Contractors. The parties are each independent contractors and
neither party shall be, nor represent itself to be, the franchiser, joint venturer, franchisee,
partner, broker, employee, servant, agent, or legal representative of the other party for any
purpose whatsoever.



     15.11 Injunctive Relief. The parties acknowledge that any breach of the provisions of
Sections 2 or 10 or Exhibit F of this Agreement may cause irreparable harm and significant injury
to an extent that may be extremely difficult to ascertain. Accordingly, each party agrees that the
other party will have, in addition to any other rights or remedies available to it at law or in
equity, the right to seek injunctive relief to enjoin any breach or violation of such sections.



     15.12 Force Majeure. A party is not liable under this Agreement for non-performance
(other than failure to make payments then owing) caused by events or conditions beyond that party’s
control, if the party makes reasonable efforts to perform.








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.






     15.13 Counterparts. This Agreement and each Technology Schedule may be executed in
one or more counterparts, each of which shall constitute an original, but taken together shall
constitute one and the same document. A facsimile signature shall have the same force and effect
as an original signature.



     15.14 Precedence. In the event of an inconsistency or conflict between the terms and
conditions of this Agreement and any term or condition of a Technology Schedule, the term or
condition of the Technology Schedule shall prevail and govern with respect to the MIPS Technology
licensed pursuant to that Technology Schedule.



     15.15 Entire Agreement. This Agreement (including its Exhibits, which are
incorporated herein by this reference) and any Technology Schedules executed from time to time by
both parties, contain and constitute the sole, complete and entire





agreement and understanding of
the parties concerning the matters contained herein and therein and may not be altered, modified or
changed in any manner except by a writing duly executed by the parties (and for the sake of
clarification, any terms and conditions of any purchase order issued under this Agreement and/or
any Technology Schedule thereunder shall be superseded in full by the terms and conditions of this
Agreement and applicable Technology Schedule(s)). No statements, promises or representations have
been made by any party to another, or are relied upon, and no consideration has been or is offered,
promised, expected or held out, other than as stated in this Agreement and any Technology Schedule,
and no party is relying on any representations other than those expressly set forth herein and
therein. All prior or contemporaneous discussions and negotiations, whether oral or written, have
been, and are, merged and integrated into, and superseded by, this Agreement.








IN WITNESS WHEREOF, each party has caused this Agreement to be executed by its duly authorized
representative:




	 	 	 	 	 	 	 	 	 	 	 
	MIPS TECHNOLOGIES, INC.	 	 	 	CAVIUM NETWORKS (“LICENSEE”)	 	 
	 
	 	 	 	 	 	 	 	 	 	 
	By:

	 	/s/ John Bourgoin
	 	 	 	By:
	 	/s/ Syed Ali	 	 
	 

	 	 
	 	 	 	 	 	 	 	 
	 
	Print Name: John Bourgoin	 	 	 	Print Name: Syed Ali	 	 
	 
	Title:President & CEO	 	 	 	Title:President & CEO	 	 






 









 





Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.




EXHIBIT A




TEMPLATE FOR

MIPS TECHNOLOGY SCHEDULES



Each MIPS Technology Schedule shall be in the following format:




MIPS TECHNOLOGY SCHEDULE

for the

[Insert MIPS Architecture or MIPS Core being licensed]



Licensee desires to license from MIPS and MIPS is willing to license to Licensee the intellectual
property associated with the Licensed Technology described below subject to the terms and
conditions of the Master Technology License Agreement for MIPS Architecture and MIPS Cores between
MIPS and Licensee made to be effective as of December 30, 2003 (the “Agreement” or “Master
Agreement”) and this MIPS Technology Schedule (the “Technology Schedule”) to be effective as of
                                        
200 ___ (the “Schedule Effective Date”). All of the terms and conditions of the Master Agreement are
incorporated herein and shall apply to this Technology Schedule. Unless otherwise indicated, all
capitalized terms shall have the meanings assigned in the Master Agreement.





	1	 	Licensed Technology:
	 
	2	 	MIPS Deliverables (including the confidentiality level and delivery schedule for each
MIPS Deliverable):
	 
	3	 	Third Party IP: 
	 
	4	 	Authorized Foundry: 
	 
	5	 	Licensee Application: 
	 
	6	 	 Distribution Rights: 
	 
	7	 	License Fees: 






	 	7.1	 	The Initial Fees: 
	 
	 	7.2	 	Additional Per Use Fees: 






	8	 	Royalties: 
	 
	9	 	Maintenance Fees: 
	 
	10	 	Maintenance Services: 
	 
	11	 	Term: 
	 
	12	 	Program Managers: 
	 
	 	 	For Licensee:






For MPS:


Notice of changes in the above addresses or contacts shall be given in writing in accordance with
Section 15.1 of the Master Agreement.





	13.	 	Licensed Marks: In accordance with the rights granted in the Trademark License Agreement, Licensee




 









 










Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.



may use the following Licensed Marks in connection with the Licensee Chips being developed in
accordance with the rights granted in the Master Agreement and this Technology Schedule:




	 	 	 	 	 	 	 
	 

	 	Licensed Mark
	 	Exclusive?
	 	Sublicensable? 







	14.	 	Press Announcement:
	 
	15.	 	Additional Terms:




IN WITNESS WHEREOF, each party has caused this Technology Schedule to be executed by its
duly authorized representative:




	 	 	 	 	 	 	 	 	 	 	 
	MIPS TECHNOLOGIES, INC.	 	 	 	CAVIUM NETWORKS (“LICENSEE”)	 	 
	 
	 	 	 	 	 	 	 	 	 	 
	By:

	 	 	 	 	 	By:	 	 	 	 
	 

	 	 
	 	 	 	 	 	 	 	 
	 
	Print Name:

	 	 	 	 	 	Print Name:	 	 	 	 
	 

	 	 
	 	 	 	 	 	 	 	 
	 
	Title:

	 	 	 	 	 	Title:	 	 	 	 
	 

	 	 
	 	 	 	 	 	 	 	 





 









 





Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.




EXHIBIT B




MIPS Compatibility Verification Process 





1. Verification Testing. Licensee must verify each Licensed Hard Core
Implementation developed by Licensee pursuant to the license described in Section 2.1 or 2.3 of the
Master Agreement on each process to be used for volume manufacture. For each such Licensed Hard
Core Implementation developed pursuant to the rights granted in Section 2.1, Licensee shall run the
latest architecture verification program (“AVP” or “Architecture Verification Program”) provided by
MIPS under the applicable Technology Schedule, without any modification to the AVP, in accordance
with the process set forth in either Section 2 or in Section 3 of this Exhibit B. For each
such Licensed Hard Core Implementation developed pursuant to the rights granted in Section 2.3,
Licensee shall run the latest verification test suite (“VTS” or “Verification Test Suite”) provided
by MIPS under the applicable Technology Schedule, without any modification to the VTS, in
accordance with the process set forth in either Section 2 or in Section 3 of this Exhibit
B.



2. Verification of Licensed Hard Core Implementation Using Final Netlist.




     (a) For each Licensed Hard Core Implementation developed pursuant to the rights granted in
Section 2.3 which Licensee desires to verify pursuant to this Section 2 of this Exhibit B,
Licensee shall run the VTS on the final production version of the layout netlist for such Licensed
Hard Core Implementation (“Final Netlist”), instantiated within a test bench provided by MIPS (the
“Verification Test Bench”). For each Licensed Hard Core Implementation developed pursuant to the
rights granted in Section 2.1 which Licensee desires to verify pursuant to this Section 2 of this
Exhibit B, Licensee shall run the AVP on the Final Netlist, instantiated within a test
bench developed by Licensee (the “Licensee Verification Test Bench”). The Final Netlist
instantiated within the Verification Test Bench or the Licensee Verification Test Bench, as
applicable, is referred to herein as the “Netlist Verification Environment.” Licensee shall deliver
to MIPS a copy of the log resulting from running the AVP or VTS, as applicable, on the Netlist
Verification Environment and any other resulting data (“Netlist Log Results”).



     (b) In addition to the Netlist Log Results delivered pursuant to Section 2(a), Licensee shall
provide MIPS with a copy of the Netlist Verification Environment and any other data required for
MIPS to recreate the running of the AVP or VTS, as applicable, on the Netlist Verification
Environment (collectively, the “Netlist Test Deliverables”).



     (c) Within thirty (30) days of MIPS’ receipt of the Netlist Test Deliverables, MIPS shall
review the Netlist Log Results, and, at its option, may run the applicable AVP or VTS, as
applicable, on the Netlist Verification Environment delivered by Licensee and may notify Licensee
in writing that the Licensed Hard Core Implementation has passed the compatibility verification
process, or that the Licensed Hard Core Implementation has not passed together with details of the
failure. In the event that MIPS does not provide such written notification to Licensee within such
thirty (30) day period, the Licensed Hard Core Implementation will be deemed to have passed the
compatibility verification process. MIPS will give notice that a Licensed Hard Core Implementation
has passed only when the Netlist Log Results and MIPS’ log results (if any) indicate that no errors
have been detected or MIPS agrees to waive any errors detected.



3. Verification of Licensed Hard Core Implementation Using a Test Chip.







     (a) For each Licensed Hard Core Implementation developed pursuant to the rights granted in
Section 2.3 which Licensee desires to verify pursuant to this Section 3 of this Exhibit B,
Licensee shall run the VTS on test chips of the Licensed Hard Core Implementation which comply with
specifications provided by MIPS under the applicable Technology Schedule (“Test Chips”) on a test
board approved by MIPS (“Test Board”). For each Licensed Hard Core Implementation developed
pursuant to the rights granted in Section 2.1 which Licensee desires to verify pursuant to this
Section 3 of this Exhibit B, Licensee shall run the AVP on test chips of the
Licensed Hard Core Implementation or of the Licensee Chip (“Licensee Test Chips”) on a test board
with sockets into which Licensee Test Chips can be inserted, and on which board PMON or another
mutually agreed upon PROM-based boot/debug monitor can be run, which would permit MIPS to run the
AVP applicable to such Licensee Test Chips (“Licensee Test Board”). A Test Chip or Licensee Test
Chip, as applicable, on a Test Board or Licensee Test Board, as applicable, is referred to herein
as the “Test Chip Verification Environment.” Licensee shall deliver to MIPS a copy of the log
resulting from running the AVP or VTS, as applicable, on the Test Chip Verification Environment and
any other resulting data (“Test Chip Log Results”) together with a mutually agreed upon number of
fully functional Test Chips (but, in any event, at least ten (10) Test Chips) which may be used by
MIPS without restriction.



     (b) In addition to the Test Chip Log Result’s and Test Chips delivered pursuant to Section
3(a), Licensee shall provide MIPS with a copy of the Test Chip Verification Environment and any
other data required for MIPS to recreate the running of the AVP or VTS, as applicable, on the Test
Chip Verification Environment (collectively, the “Test Chip Test Deliverables”).



     (c) Within thirty (30) days of MIPS’ receipt of the Test Chip Test Deliverables, MIPS shall
review the Test Chip Log Results, and, at its option, may run the applicable AVP or VTS, as
applicable, on the Test Chip Verification Environment delivered by Licensee and may notify Licensee
in writing that the Licensed Hard Core Implementation has passed the compatibility verification
process, or that the Licensed Hard Core Implementation has not passed together with details of the
failure. In the event that MIPS does not provide such written notification to Licensee within such
thirty (30) day period, the Licensed Hard Core Implementation will be deemed to have passed the
compatibility verification process. MIPS will give notice that a Licensed Hard Core Implementation
has passed only when the Test Chip Log Results and MIPS’ log results (if any) indicate that no
errors have been detected or MIPS agrees to waive any errors detected.


4. Tests on Licensee Chips. Licensee shall run the AVP or VTS, or shall perform Licensee’s
normal and reasonable test procedure for Licensee Chips (“Normal Licensee Test Procedure”), on each
unit of each Licensee Chip that is manufactured for Licensee. Licensee will notify MIPS of the
details of the Normal Licensee Test Procedure, and will reasonably consider comments from MIPS
about such procedure.



5. Prohibitions on Use of the AVP, VTS and Verification Environment. The AVP, VTS,
Netlist Verification Environment and Test Chip Verification Environment, or any portion or
derivative thereof, may not be used to test or verify core designs other than Licensed Hard Core
Implementations developed in accordance with this Agreement and the applicable Technology Schedule.










 










 





Certain confidential information contained in this document, marked by brackets, has been omitted and filed
separately with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




EXHIBIT C

Approval/Notice Form




	 	 	 	 	 	 	 
	TO:

	 	MIPS Technologies, Inc. (“MIPS”)
	 	FROM:	 	 
	 

	 	 	 	 	 	 
	ATTN:

	 	Program Manager
	 	AT:
	 	Cavium Networks (“Licensee”)
	FAX NO.:

	 	(650) 567-5150
	 	FAX NO.:	 	 
	 

	 	 	 	 	 	 
	 

	 	 	 	 	 	(Please provide fax number to which
	 

	 	 	 	 	 	MIPS should respond)





The Licensee identified above requests approval from MIPS in accordance with the terms and
conditions of the Master Technology License Agreement for MIPS Architecture and MIPS Cores
effective as of December 30, 2003 by and between MIPS and Licensee (the “Master Agreement”) to use
the third party identified below for the purpose identified below or hereby provides notice to
MIPS as set forth below:






__That the following foundry shall be approved as an Authorized Foundry for purposes of the
MIPS Technology Schedule for the ________________, effective as of
__________, 200 __ entered
into by MIPS and Licensee pursuant to the terms of the Master Agreement:




	 	 	 	 	 	 	 
	 	 	 	 	 
	Foundry Name	 	 	 	 
	 
	 	 	 	 	 	 
	Address:
	 	 	 	 	 	 
	 

	 	 	 	 	 	 
	 
	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 	 
	Country:
	 	 	 	 	 	 
	 

	 	 	 	 	 	 
	 
	 	 	 	 	 	 
	 	 	 	 	 
	Contract Name	 	 	 	 
	 

	 	 	 	 	 	 
	Tel./Fax.:
	 	 	 	 	 	 
	 

	 	 	 	 	 	 
	Email:
	 	 	 	 	 	 
	 

	 	 	 	 	 	 








__That the following third party shall be approved as a contractor to be
used by Licensee in exercising its




          ___“have developed” rights under Subsections 2.1.2, 2.1.4, 2.3.1 and 2.3.3 of the Master Agreement, or




          ___“internally develop” or “internally design” rights under Subsections 2.1.1, 2.1.2 2.1.3, 2.3.1 and 2.3.2



as permitted under Section 2.5 with respect to the Licensed Technology licensed to Licensee pursuant
to the MIPS Technology Schedule for the ___, effective as of ___, 200___, entered
into by MIPS and Licensee pursuant to the terms of the Master Agreement:




	 	 	 	 	 	 	 	 	 
	 	 	 	 	 
	Third Party Contractor	 	 	 	 
	 
	 	 	 	 	 	 	 	 
	Address:
	 	 	 	 	 	 	 	 
	 

	 	 	 	 	 	 	 	 
	 
	 	 	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 	 	 	 
	Country:
	 	 	 	 	 	 	 	 
	 

	 	 	 	 	 	 	 	 
	 
	 	 	 	 	 	 	 	 
	 	 	 	 	 
	Contact Name	 	 	 	 
	Tel./Fax.:
	 	 	 	 	 	 	 	 
	 

	 	 	 	 	 	 	 	 
	Email:
	 	 	 	 	 	 	 	 
	 

	 	 	 	 	 	 	 	 
	Nature of work to be performed:	 	 	 	 
	 

	 	 	 	 
	 	 
	 
	 	 	 	 	 	 	 	 
	 	 	 	 	 
	 
	 	 	 	 	 









That the
following Licensee Chip has been commenced as of ________, 200 __ using the version
of MIPS Deliverables as set forth below:




Licensee  Chip:                                         



___  Licensed  MIPS  Core:                       



Version of MIPS Deliverables:



Version                                                             




___
Licensed MIPS

Architecture:                                        



Version of NIPS Deliverables;



Version                                                             









	 	 	 	 	 	 	 
	 	 	APPROVED AND ACCEPTED	 	 
	 
	 	 	 	 	 	 
	 	 	MIPS Technologies, Inc.	 	 
	 
	 	 	 	 	 	 
	 

	 	By:	 	 	 	 
	 

	 	 	 	 	 	 
	 

	 	Name:	 	 	 	 
	 

	 	 	 	 	 	 
	 

	 	Title:	 	 	 	 
	 

	 	 	 	 	 	 
	 

	 	Date:	 	 	 	 
	 

	 	 	 	 	 	 
















 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.




EXHIBIT D

TRADEMARK LICENSE AGREEMENT





This Trademark License Agreement (“Agreement”) is entered into to be effective as of
December 30, 2003 (the “Effective Date”) by and between MIPS Technologies, Inc., a
Delaware corporation, with its principal place of business at 1225 Charleston Avenue, Mountain
View, California 94043-1353 (“MPS”) and Cavium Networks, a California corporation with its
principal place of business at 2610 Augustine Drive, Santa Clara, California 95054
(“Licensee”).




BACKGROUND




     MIPS and Licensee have entered into a Master Technology License Agreement for MIPS
Architecture and MIPS Cores effective on even date herewith (“Master Agreement”). This
Trademark License Agreement is incorporated into the Master Agreement as an exhibit thereto. MIPS
is the owner of various registered and unregistered trademarks, logos and brand names associated
with MIPS (“MIPS Marks”). Licensee would like to use, pursuant to the terms and
conditions of this Trademark License Agreement (including the Attachment hereto), certain MIPS
Marks in connection with Licensee Products (as defined below).



     In consideration of the premises and the mutual promises and covenants contained herein and
in the Master Agreement, the parties agree as follows:


1. Definitions.




All capitalized terms not separately defined in this Trademark License Agreement have the meanings
set forth in the Master Agreement.



     “Licensed Mark(s)” shall mean, subject to Section 6.2, the MIPS Marks set forth in the
applicable Technology Schedule entered into pursuant to the Master Agreement, which may be amended
from time to time by mutual written agreement.



     “Licensee Product” shall mean any Licensee Chip as defined in the Master Agreement,
when manufactured, marketed and distributed in accordance with the Master Agreement and the
applicable Technology Schedule.



     “Promotional Materials” shall mean promotional materials, including but not limited to
(i) labels on external packaging or otherwise, (ii) sales literature and other collateral material,
(iii) product data sheets and other technical documentation, and (iv) advertising, communications
and public relations materials.



     “Territory” shall mean worldwide, except as modified pursuant to Section 2.2.



     “Usage Guidelines” shall mean MIPS’ then-current Corporate Identity and Trademark
Usage Guidelines, which may be obtained by Licensee from MIPS’ marketing department or MIPS’ web
site.


2. Grant of License.




     2.1 Grant. Subject to the terms and conditions of this Trademark License Agreement,
MIPS hereby grants to





Licensee the right and license to use the Licensed Marks, solely within the
Territory, on Licensee Products and in Promotional Materials relating to Licensee Products solely
created in accordance with the Usage Guidelines.




     2.2 Territory. MIPS may eliminate any country from the Territory if MIPS determines
in its sole judgment that use of any Licensed Mark in such country may subject MIPS to legal
liability, or may put MIPS’ rights in the Licensed Mark(s) at risk in such country, [*]
granted to MIPS’ other licensees of such Licensed Mark, and Licensee shall promptly commence
actions to cease all use, and thereafter shall expeditiously cease all use, of the Licensed Marks
in such country upon written notice from MIPS.



     2.3 Exclusivity. The license set forth in Section 2.1 shall be exclusive with respect
to those Licensed Marks, if any, identified as exclusive in the applicable Technology Schedule, and
shall be nonexclusive with respect to all other Licensed Marks.



     2.4 Sublicenses. Licensee may sublicense, to its customers or to third party
manufacturers of Licensee Products that Licensee is permitted to use under the Master Agreement,
only those Licensed Marks which are expressly identified in the applicable Technology Schedule as
sublicensable. All such sublicenses shall require the sublicensee to fully comply with the terms
and conditions of this Agreement (excluding Section 3), and shall identify MIPS as a third party
beneficiary of the sublicense agreement.



     2.5 Limitations. Except as set forth in Section 2.4, Licensee shall have no right to
sublicense the Licensed Marks. Except as expressly set forth in this Trademark License Agreement,
MIPS reserves all rights in the MIPS Marks. Licensee’s license to use the Licensed Marks applies
only to the Licensed Marks exactly as set forth in the applicable Technology Schedule, and does not
extend to any modified or derived versions of the Licensed Marks, including but not limited to
sequentially larger or smaller, or otherwise related, numbers.



     2.6 Specimens. Licensee agrees to supply MIPS with specimens of Licensee’s uses of
the Licensed Marks,’ upon MIPS’ reasonable request in connection with MIPS’ maintenance and
protection of Licensed Marks.


3. Market Research and Joint or Cooperative Promotion.




     3.1 Market Research. During the term of this Trademark License Agreement, Licensee
[*] share with MIPS any information with respect to the Licensed Marks that it obtains
through market research or otherwise and reasonably
believes may affect MIPS’ business strategy with respect to the subject matter of the Master
Agreement or this Trademark License Agreement.



     3.2 Identification of Licensee Products. Licensee [*] identify each
Licensee Product as “MIPS-basedTM” in Licensee’s Promotional Materials for such Licensee Product








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





distributed in the Territory.




     3.3 Joint or Cooperative Promotion. Each party shall designate an employee as its
“Co-Marketing Program Manager.” The initial Co-Marketing Program Managers for each party are
identified in Attachment 1. Each party will notify the other party in writing of successors to its
initial Co-Marketing Program Manager. The Co-Marketing. Program Managers shall discuss, share
information regarding, and be responsible for coordinating, joint or cooperative promotional
activities, including without limitation:



     (i) the development and implementation of mutually beneficial co-branding and co-marketing
programs to promote the Licensed Marks and the Licensee Products; and



     (ii) the identification and exploitation of opportunities to undertake such joint or
cooperative promotional activities, including without limitation the discussion of pending
announcements for each Licensee Product, at each of the following phases of the worldwide market
introduction process for such Licensee Product: assessment of product positioning in the market,
readiness of product, development of an integrated communication strategy and plan, creation of an
introduction plan, and actual introduction of the Licensee Product.


To further the promotion of the Licensed Marks and the Licensee Products, Licensee may provide to
MIPS copies of Licensee’s Promotional Materials for the Licensee Products. MIPS will make a good
faith effort to review such materials.



4. Quality Control and Product Standards. Licensee agrees that the Licensee Products and
associated Promotional Materials shall conform to a high standard in the industry, and shall be of
such appearance and quality as to protect the prestige of the Licensed Marks and the goodwill
pertaining thereto; that Licensee Products will be manufactured and distributed in accordance with
all applicable laws and regulations and without violating the rights of any third parties; and that
Licensee Products will not reflect adversely on the good name of MIPS. Licensee shall use the
Licensed Marks in connection with Licensee Products only if the Licensee Products meet or exceed
the standards of performance and quality historically set by Licensee or its affiliates for similar
goods and services. In the event that at any time any Licensee Products provided under the
Licensed Marks, or any advertisements or promotions thereof, are not in accordance with standards
of quality set forth in this Section 4, are misleading or deceptive, or in any way reflect
negatively on the image of MIPS, then upon written notification by MIPS, senior management of MIPS
and Licensee shall meet and discuss the deficiencies identified by MIPS, and Licensee shall
thereafter rectify such deficiencies in a manner agreed upon by the senior management of both
parties.



5. Rights To MIPS Marks. Licensee acknowledges that, as between the parties, all rights
throughout the world associated with the MIPS Marks, including the Licensed Marks, and all goodwill
attached thereto, belong exclusively to MIPS. Licensee agrees that the MIPS Marks are the sole and
exclusive property of MIPS, and that any and all uses by Licensee of the Licensed Marks shall inure
to the benefit of MIPS. Upon MIPS’ reasonable request and at MIPS’ expense, Licensee agrees to






assist MIPS in recording this Trademark License Agreement with appropriate governmental
authorities. Licensee shall not, during or after the term of this Trademark License Agreement, act
in any manner which would impair MIPS’ ownership of the MIPS Marks.



6. Term and Termination.




     6.1 Term. The term of this Trademark License Agreement shall commence on the
Effective Date and shall terminate upon the later of the expiration or termination of the Master
Agreement or of the last to terminate of the Technology Schedules entered into pursuant to the
Master Agreement, unless this Trademark License Agreement is terminated sooner for material breach
or otherwise as provided herein.



     6.2 Termination. If either party fails to perform or violates any material obligation
under this Trademark License Agreement, then, upon thirty (30) days written notice to the breaching
party specifying such default (the “Default Notice”), the non-breaching party may terminate
this Trademark License Agreement with respect to all Licensed Marks, or with respect to the
specific Licensed Marks affected by the default, without liability, unless the breach specified in
the Default Notice has been cured within the thirty (30) day period.



     6.3 Survival. Sections 1, 5, 6.3, 8 and 9 shall survive the expiration or termination
of this Agreement. In addition, in the event that this Trademark License Agreement terminates upon
the later of the expiration or termination of the Master Agreement or of the last to terminate of
the Technology Schedules entered into pursuant to the Master Agreement, the provisions of this
Trademark License Agreement shall survive with respect to a Licensee Product if and to the extent
that the surviving terms of the Master Agreement permit Licensee to continue to market and
distribute such Licensee Product.


7. Trademark Enforcement. Licensee agrees to notify MIPS of any unauthorized use of any
Licensed Mark promptly after it comes to Licensee’s attention [*] , and to reasonably
assist MIPS, at MIPS’ reasonable request and expense, in prosecuting any claim against any third
party involving the. Licensed Marks. Licensee shall, at MIPS’ request and expense,
reasonably assist MIPS in MIPS’ efforts to secure registration and/or enforcement of any Licensed
Mark.



8. Disclaimer. MIPS DOES NOT MAKE ANY WARRANTIES UNDER THIS TRADEMARK LICENSE
AGREEMENT, AND EXPRESSLY DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, OR IMPLIED,
REGARDING THE MIPS MARKS OR THE LICENSED MARKS, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NONINFRINGEMENT OF THIRD PARTY
RIGHTS.



9. General Terms and Conditions.




     9.1 Incorporation by Reference. The provisions of Sections 15.1 through 15.13 of the
Master Agreement are hereby incorporated into, and made a part of, this Trademark License
Agreement.



     9.2 Entire Agreement. This Trademark License








 









 




Certain confidential information contained in this document, marked by brackets, has been
omitted and filed separately with the Securities and Exchange Commission pursuant to Rule 406 of
the Securities Act of 1933, as amended.





Agreement, including any Attachment
hereto, constitutes the entire agreement of the parties concerning its subject matter, and may not
be modified except by a writing duly executed by both parties. Alt prior discussions, drafts and
negotiations regarding such subject matter are merged and integrated into, and superseded by, this
Trademark License Agreement. In the






event of any inconsistency between the terms of the Master
Agreement (including all exhibits and attachments thereto) and the terms of this Trademark License
Agreement with regard to the subject matter of this Trademark License Agreement, the terms of this
Trademark License Agreement shall control.









     IN WITNESS WHEREOF, the parties hereto have caused this Trademark License Agreement to be
executed by their duly authorized representative:



	 	 	 	 	 	 	 	 	 
	MIPS TECHNOLOGIES, INC.	 	 	 	CAVIUM NETWORKS (“LICENSEE”)
	 
	 	 	 	 	 	 	 	 
	By:

	 	/s/ John Bourgoin
	 	 	 	By: /s/ Syed Ali	 	 
	 	 	 	 	 	 	 
	 	 
	 
	Print Name: John Bourgoin	 	 	 	Print Name: Syed Ali
	 
	Title: President & CEO	 	 	 	Title: President & CEO






 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately with the
Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




ATTACHMENT 1

To the Trademark License Agreement




Co-Marketing Program Managers




	 	 	 
	For MIPS:

	 	Lee Flanagin
	 

	 	Director of Corporate Communications
	 

	 	MIPS Technologies, Inc.
	 

	 	1225 Charleston Road
	 

	 	Mountain View, CA 94043
	 

	 	Phone: (650) 567-5180
	 

	 	Fax: (650) 567-5002
	 

	 	E-mail: flanagin@mips.com
	 
	 	 
	For Licensee:

	 	Amer Haider
	 

	 	Strategic Marketing
	 

	 	Cavium Networks
	 

	 	2610 Augustine Drive
	 

	 	Santa Clara, CA 95054


Phone: (408) 844-8420 x202
	 

	 	Fax: (408) 844-8418
	 

	 	Email: amer.haider@cavium.com






 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately with the
Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




EXHIBIT E



[Intentionally Left Blank. The parties agree to negotiate terms and conditions to be included as
Exhibit E prior to Licensee licensing a MIPS Core.]




 









 







Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately with the
Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




EXHIBIT F

Non-Disclosure Agreement for Information from Licensee




1. LICENSEE INFORMATION.



“Licensee Information” means (a) any reports (including royalty reports), test results, error data,
or other reports, including “Log Results” made by Licensee in connection with the license rights
granted under the Master Technology License Agreement or any Technology Schedule; (b) the identity
of and/or any information regarding potential or actual Licensee customers provided by Licensee to
MIPS under the Master Technology License Agreement; (c) [*] relating to Licensee Chips or
any of Licensee’s other actual and potential products and/or Licensee’s [*] described to
MIPS in advance, that are subsequently specifically disclosed in meetings between the parties under
the Agreement; (d) logs or lists of individuals with access to Restricted Confidential
Deliverables; (e) any other materials or information learned or otherwise obtained by MIPS from
Licensee in accordance with Sections 4, 5.6, 5.7, 10.2.3 or 10.2.4 or Exhibits B or C; or (f) the
existence of the Master Technology License Agreement and any Technology Schedule.



Notwithstanding the foregoing, “Licensee Information” shall not include information received from
Licensee which (i) is or becomes rightfully known by MIPS through disclosure from a third party
without an obligation to maintain its confidentiality; (ii) is or becomes generally available to
the public through no fault of MIPS; or (iii) is independently developed by MIPS without use of the
Licensee Information.




2. NON-DISCLOSURE AND LIMITED USE.



MIPS shall hold all Licensee Information in strict confidence and shall not disclose any Licensee
Information to any third party, except as provided herein. MIPS shall disclose the Licensee
Information only to its employees and agents who need to know such information and who are bound in
writing by restrictions regarding disclosure and use of such information comparable to And no less
restrictive than those set forth herein or by professional ethical obligations with respect to
non-technical information only. MIPS shall not use any Licensee Information for the purpose of
developing any competing technology except as expressly permitted in the Master Technology License
Agreement or any Technology Schedule or for any purpose other than to exercise its rights or
fulfill its obligations under the Master Technology License Agreement or any Technology Schedule.
MIPS shall take the same degree of care that it uses to protect its own confidential and
proprietary information of similar nature and importance (but in no event less than reasonable
care) to protect the confidentiality and avoid the unauthorized use, disclosure, publication or
dissemination of the Licensee Information.




3. OWNERSHIP.



All Licensee Information (including, without limitation, all copies, extracts and portions
thereof) is and shall remain the sole property of Licensee. MIPS does not acquire (by license or
otherwise, whether express or implied) any intellectual property rights or other rights under the
Master Technology License Agreement or any disclosure thereunder, except the limited right to use
such Licensee Information in accordance with the express provisions of the Master Technology
License Agreement.




4. RETURN OR DESTRUCTION OF MATERIALS.



Upon written request by Licensee, in the event of termination or expiration of the Master
Technology License Agreement or any Technology Schedule, MIPS shall promptly return to
Licensee or destroy all Licensee Information identified in Paragraph 1 (b) and (c) above,
and at Licensee’s request, MIPS shall certify such destruction in writing.




5. RELATIONSHIP TO MASTER AGREEMENT



For purposes of clarification, the terms of this Exhibit F are hereby incorporated into the
Master Technology License Agreement. MPS’s obligations under this Exhibit F shall be
deemed obligations under the Master Technology License Agreement, and any breach by MIPS of this
Exhibit F shall be deemed a breach by MIPS of the Master Technology License Agreement.




 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




MIPS TECHNOLOGY SCHEDULE

for the

MIPS64 Architecture



Licensee desires to license from MIPS and MIPS is willing to license to Licensee the
intellectual property associated with the MIPS Architecture described below subject to the
terms and conditions of the Master Technology License Agreement for MIPS Architecture and MIPS
Cores between MIPS and Licensee made to be effective as of December 30, 2003 (the “Agreement”
or “Master Agreement”) and this MIPS Technology Schedule (the “Technology Schedule”) to be
effective as of December 30, 2003 (the “Schedule Effective Date”). All of the terms and
conditions of the Master Agreement are incorporated herein and shall apply to this Technology
Schedule. Unless otherwise indicated, all capitalized terms shall have the meanings assigned
in the Master Agreement.



1. Licensed Technology: MIPS64 Architecture



2. MIPS Deliverables (including the confidentiality level and delivery schedule for
each MIPS Deliverable):



The MIPS Deliverables are delivered electronically as a bundle.




	 	 	 	 	 	 	 	 	 	 	 	 	 
	 	 	Document	 	 	 	 	 	 	 	 	 	 
	 	 	or Part	 	Restricted	 	Internal	 	External	 	 	 	 
	Deliverables	 	Number	 	Confidential	 	Confidential	 	Confidential	 	Commercial	 	Delivery Schedule
	 
	Specifications
	 	 	 	 	 	 	 	 	 	 	 	 
	 
	MIPS64TM Architecture Reference Manual
Volume I: Introduction to the MIPS64TM
Architecture
	 	MD00081	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
signing agreement
	 
	MIPS64ITM Architecture Reference Manual
Volume ll: The MIPS64TM Instruction Set
	 	MD00085	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
 signing agreement
	MIPS64TM Architecture Reference Manual
Volume HI: The MIPS64TM Privileged
Resource Architecture
	 	MD00089	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
 signing agreement
	 
	EJTAG Specification
	 	MD00047	 	 	 	 	 	 	 	ü	 	Within 2 weeks of
 signing agreement
	PDtraceTM Interface Specification
	 	MD00136	 	 	 	 	 	 	 	ü	 	Within 2 weeks of
      signing agreement
	EJTAG Trace Control Block Specification
	 	MD00148	 	 	 	 	 	 	 	ü	 	Within 2 weeks of
     signing agreement
	Verification Suite
	 	 	 	 	 	 	 	 	 	 	 	 
	 
	MIPS Architecture Verification Programs AVP
Environment
	 	PN00001	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
 signing agreement
	MIPS Architecture Verification Programs
MIPS32TM AVPs
	 	PN00002	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
 signing agreement
	MIPS Architecture Verification Programs
MIPS64TM AVPs
	 	PN00003	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
 signing agreement






 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.





	 	 	 	 	 	 	 	 	 	 	 	 	 
	 	 	Document	 	 	 	 	 	 	 	 	 	 
	 	 	or Part	 	Restricted	 	Internal	 	External	 	 	 	 
	Deliverables	 	Number	 	Confidential	 	Confidential	 	Confidential	 	Commercial	 	Delivery Schedule
	 
	MIPS Architecture Verification Programs
MIPS32TM Release 2 AVPs
	 	PN00077	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
signing agreement
	MIPS Architecture Verification Programs
MIPS64TM Release 2 AVPs
	 	PN00078	 	ü	 	 	 	 	 	 	 	Within 2 weeks of
signing agreement
	MIPS Architecture Verification Programs
Release Notes
	 	MD00120	 	 	 	ü	 	 	 	 	 	Within 2 weeks of
signing agreement
	Documentation
	 	 	 	 	 	 	 	 	 	 	 	 
	MIPS6TM Architecture for Programmers
Volume I: Introduction to the MIPS64TM
Architecture
	 	MD00083	 	 	 	 	 	 	 	ü	 	Within 2 weeks of
signing agreement
	MIPS64TM Architecture for Programmers
Volume II: The IVIIPS64TM Instruction Set
	 	MD00087	 	 	 	 	 	 	 	ü	 	Within 2 weeks of
signing agreement
	MIPS64TM Architecture for Programmers
Volume III: The MIPS64TM Privileged Resource
Architecture
Architecture
Resource Architecture
	 	MD00091	 	 	 	 	 	 	 	ü	 	Within 2 weeks of
 signing agreement





1 For the avoidance of doubt, and notwithstanding anything in the Master Agreement to the contrary
Commercial Deliverables do not constitute Confidential Information of MIPS.





3. Third Party lP: None.




4. Authorized Foundry: The following foundries are each an Authorized Foundry:




Taiwan Semiconductor Manufacturing Company (Taiwan)




United Microelectronics Corporation (Taiwan)




IBM Microelectronics (USA)




Upon written approval from MIPS (Exhibit C to the Master Agreement may be used for this
purpose), additional foundries may be added as an “Authorized Foundry” from time to time
during the term of this Technology Schedule.




5. Licensee Application: Licensee Chips may be designed for the following
applications: all applications. The reference to “the applicable Licensee Application” in
Section 1.4 of the Master Agreement is not intended as, and shall not be interpreted to be,
any limitation on the applications for which any Licensee Chips may be designed under this
Technology Schedule.




6. Distribution Rights: Notwithstanding anything in Section 1.4 of the Master
Agreement to the
contrary, Licensee may distribute Licensee Chips as packaged integrated circuits which
packaged integrated circuits may be distributed as packaged parts or as part of a board or
subsystem, and “Licensee Chips” may include [*], provided, however, that in the event
Licensee desires to distribute Licensee Chips in forms other than packaged integrated
circuits; the parties shall negotiate a royalty, in good faith on a case by case basis,
which royalty shall generally be based on the then current



 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.





royalty for the applicable
Licensee Chip shipping as packaged integrated circuits, when available. Notwithstanding
anything in Section 1.4 of the Master Agreement to the contrary, portions of a “Licensee
Chip” that do not consist of Licensed MIPS Core(s), Licensed MIPS Architecture Compatible
Core(s) or Licensed Hard Core Implementation(s) may be designed, in whole or part, for
Licensee by third parties, without restrictions of any kind, and no involvement of third
parties in the design of such portions of a chip will disqualify such chip from being a
“Licensee Chip,” provided, however, that the third parties do not receive any MIPS
Confidential Information, unless otherwise approved by MIPS in writing.




7. License Fees:



          7.1 The Initial Fees:




          7.1.1 Upon execution of this Technology Schedule, Licensee shall pay MIPS a nonrefundable
initial license fee of $[*] in consideration for acquiring the license rights set forth in Section
2.1 of the Master Agreement, subject to the provisions of this Paragraph 7, for the Licensee Chips
developed under this Technology Schedule, which fee is payable under the following nonrefundable,
payment schedule:




	 	 	 
	Event or Date

	 	Payment Amount






     [*]





 




			
	*	 	For purposes of clarification, the payments [*] shall accompanied
by the maintenance fee due as specified in Paragraph 9 below. After all payments
made in accordance with the above table, maintenance fees will still be due in
accordance Paragraph 9 below.




 









 









Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.



Licensee shall provide MIPS with the requisite purchase order in the amount of said initial
license fee as soon as practicable after execution of this Technology Schedule.



For the avoidance of doubt, and notwithstanding anything in Section 2.1 of the Master Agreement to
the contrary (including, without limitation, the use of the singular form of the terms “Licensed
Hard Core Implementation” and “Authorized Foundry”), the initial license fee covers, and the
licenses granted by MIPS to Licensee in Section 2.1 of the Master Agreement shall include, the
right to develop multiple Synthesizable Licensed MIPS Cores that are Licensed MIPS Architecture
Compatible Cores and to develop and have developed as permitted in Section 2.1 multiple Licensed
Hard Core Implementations from the same, and to design these into multiple Licensee Chips which may
be targeted at multiple applications during the term of this Technology Schedule, and to target
Licensed Hard Core Implementations for manufacture at multiple Authorized Foundries, and to have
Licensed Hard Core Implementations as incorporated into Licensee Chips manufactured at multiple
Authorized Foundries. Further, notwithstanding anything in Section 2.1 of the Master Agreement to
the contrary, the rights and licenses granted by MIPS under MIPS Intellectual Property Rights in
the MIPS Deliverables for the Licensed MIPS Architecture under this Technology Schedule shall
include any patent rights MIPS may have (whether now held or hereafter created or acquired) which
relate to Licensee’s permitted development of Synthesizable Licensed MIPS Cores but only to the
extent such Synthesizable Licensed MIPS Cores implement the Licensed MIPS Architecture, permitted
development of Licensed Hard Core Implementations from such Synthesizable Licensed MIPS Cores but
only to the extent such Licensed Hard Core Implementations implement the Licensed MIPS
Architecture, permitted design of such Licensed Hard Core Implementations into Licensee Chips,
permitted manufacture of such Licensed Hard Core Implementations as incorporated in such Licensee
Chips made at Authorized Foundries or permitted use, importation, offering for sale, sale or other
distribution of such Licensed Hard Core Implementations as incorporated in such Licensee Chips.




     7.1.2 Notwithstanding Paragraph 7.1.1 above, Licensee shall be entitled to [*] as set forth in
Paragraph 11 below, in which event the licenses granted under the Master Agreement and this
Technology Schedule, including the surviving license rights set forth in Section 14.4 and 14.7 of
the Master Agreement, [*]. In the event of [*], Licensee shall be liable to MIPS for any payments
under the above schedule in this Paragraph 7.1, Paragraph 9 and Paragraph 11 payable prior to [*],
but Licensee shall no longer be liable to MIPS for any payments under the above schedule in this
Paragraph 7.1, Paragraph 9 and Paragraph 11 payable after [*].



     7.1.3 Notwithstanding Paragraph 7.1.1 above, unless Licensee provides advance written notice
to MIPS of [*], in the event of a Change Event as described in subsection (ii) of Paragraph 15.3
below, all payments in the above schedule shall automatically become payable to MIPS within [*]
after such Change Event, and if not paid in full, together with the other payments identified in
Paragraph 15.3 (i.e. Licensee shall pay an additional $[*] for the automatic [*] extension of
the term of this Technology Schedule, if [*] has not yet been effected under Paragraph 11 below, or
if it has been effected, then the remaining payments of such additional $[*] fee to the extent it
has not yet been paid in full by Licensee, under Paragraph 11) within such [*] period, the licenses
granted under the Master Agreement and this Technology Schedule, including the surviving license
rights set forth in Section 14.4




 









 







Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




and 14.7 of the Master Agreement, shall immediately terminate at the end of such [*] period. In
the event of such a termination, Licensee shall be liable to MIPS for any payments under the above
schedule in this Paragraph 7.1, Paragraph 9, and Paragraph 11 payable prior to the date of
termination, but Licensee shall not be liable to MIPS for any payments under the above schedule in
this Paragraph 7.1, Paragraph 9, and Paragraph 11 payable after the date of such termination. For
purposes of clarification, if the [*] extension of the Technology Schedule described in the second
sentence of Paragraph 11 was not effected prior to the Change Event, and the licenses are
terminated for failure to pay as required above within ninety days after such Change Event,
Licensee shall not be liable to MIPS for the additional $[*] identified in Paragraph 15.3.



     7.1.4 Notwithstanding Paragraph 7.1.1 above, in the event of a Change Event as described in
subsection (i) of Paragraph 15.3 below (i.e., an initial public offering (IPO) of Licensee), the
payments in the above schedule shall not become automatically payable, but the remaining [*]
payments shall instead be modified to be the greater of either (a) the payment set forth in the
above schedule, or (b) [*] percent ([*]%) of Licensee’s [*] for the immediately preceding [*] as
determined in accordance with generally accepted accounting principles, and such [*] schedule shall
be extended with additional [*] payments of the greater of either (a) $[*], or (b) [*] percent
([*]%) of Licensee’s [*] for the immediately preceding [*] as determined in accordance with
generally accepted accounting principles, if necessary, until an aggregate license fee has been
paid in the amount of $[*], provided, however, that the full amount of such license fee shall be
paid in full no later than [*] after the Schedule Effective Date.



     7.1.5 In the event Licensee fails to pay in accordance with this Paragraph 7.1, Licensee
acknowledges that such failure shall constitute a material breach for which MIPS may terminate this
Technology Schedule in accordance with Section 14.3 of the Master Agreement. In the event of any
such termination, the licenses granted under the Master Agreement and this Technology Schedule,
including the surviving license rights set forth in Section 14.4 and 14.7 of the Master Agreement,
shall immediately terminate, and Licensee shall be liable to MIPS for any payments under the
applicable above schedule in this Paragraph 7.1, Paragraph 9, and Paragraph 11 payable prior to the
date of termination, but Licensee shall not be liable to MIPS for any payments under the applicable
above schedule in this Paragraph 7.1, Paragraph 9, and Paragraph 11 payable after the date of such
termination.



     7.2 Additional Per Use Fees: None.



8. Royalties: Licensee shall pay MIPS a nonrefundable royalty for each unit of a
Licensee Chip shipped for which royalty has accrued in accordance with the Master Agreement and
pursuant to this Technology Schedule equal to the percentage of Net Revenue shown in the chart
below, which percentage for each Licensee Chip varies depending upon the cumulative Net Revenues
for all Licensee Chips which have already been shipped by Licensee under this Technology Schedule
as shown in the chart below, provided, however, that the royalty paid for each Licensee Chip shall
in no event be less than [*] (US$[*]):



 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




	 	 	 
	Total [*] Licensee Chips	 	Royalty Rate
	[*]

	 	[*]%
	[*]

	 	[*]%
	[*]

	 	[*]%





If a Licensee Chip is shipped as a part of a board or sub-system, the royalty for such Licensee
Chip shall be calculated using the average Net Revenue for all units of such Licensee Chip shipped
during the same quarter that were not sold as part of a board or sub-system.



Notwithstanding anything in Sections 5.2 of the Master Agreement to the contrary, for so long as
Licensee is a private company, Licensee shall have forty-five (45) days after the end of each
calendar quarter in which to pay the royalties that accrued in that calendar quarter under this
Technology Schedule. Further, notwithstanding anything in Section 5.6 of the Master Agreement to
the contrary, failure to provide the non-binding forecast shall not constitute a breach of the
Master Agreement and this Technology Schedule. Notwithstanding anything in Section 5.7 of the
Master Agreement to the contrary, Licensee shall have no obligation to keep, and MIPS shall have no
right to examine or audit, records relating to support or maintenance fees or any license fees
(unless and until the occurrence of a Change Event as described in subsection (i) of Paragraph
15.3) payable under this Technology Schedule.



9. Maintenance Fees: Licensee shall pay MIPS a nonrefundable maintenance fee of $[*] for
each twelve (12) month period commencing on the Schedule Effective Date, which fee shall be due and
payable for the first year upon execution of this Technology Schedule and for each subsequent year
fifteen (15) days prior to each anniversary of the Schedule Effective Date. Licensee shall provide
MIPS with the requisite purchase order in the amount of said maintenance fee as soon as practicable
after execution of this Technology Schedule and thereafter at least thirty (30) days prior to each
applicable payment due date.



10. Maintenance Services: Provided that Licensee has paid each maintenance fee referred to
in Paragraph 9 above, MIPS will provide updates and bug fixes made generally available by MIPS to
licensees of the Licensed Technology in connection with the MIPS Deliverables during the applicable
twelve (12) month periods. At MIPS’ sole discretion, a limited number of updates and/or bug fixes
may be distributed prior to general availability in order to assure the quality and applicability
of the update and/or bug fix.



11. Term: The term of this Technology Schedule shall begin on the Schedule Effective Date
and, unless earlier terminated, shall continue for a period of five (5) years, unless automatically
extended for an additional two (2) years (to make a total of seven (7) years) in the event of a
Change Event as provided in Paragraph 15.3 below. If no Change Event occurs, Licensee may, but
will not be obligated to, extend the term of this Technology Schedule for an additional [*] (to
make a total of [*]) by providing MIPS written notice of the election to extend prior to the
expiration of the initial five (5) year term and by paying MIPS a nonrefundable license fee of [*]
dollars ($[*]) [*], provided, however, that Licensee has made all payments owed to MIPS under this
Technology Schedule and pays an annual maintenance fee of $[*] for each of the additional [*] in
accordance with the provisions of Paragraph 9 above.





 









 







Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.



Provided Licensee is not in breach of its obligations under this Technology Schedule and the Master
Agreement and this Technology Schedule has been extended to a [*] term, Licensee may, but will not
be obligated to, renew this Technology Schedule for an additional [*] term upon payment of the
then-current license fee, which fee shall not exceed [*] dollars ($[*]).



Notwithstanding anything to the contrary, Licensee may [*] upon [*] prior written notice to MIPS.
In the event of any [*] under the Master Agreement and this Technology Schedule, including the
surviving license rights set forth in Section 14.4 and 14.7 of the Master Agreement, shall [*]. In
the event of such a [*], Licensee shall be liable to MIPS for any payments under Paragraph 7.1,
Paragraph 9, and Paragraph 11 payable prior to the [*], but Licensee shall not be liable to MIPS
for any payments under Paragraph 7.1, Paragraph 9, and Paragraph 11 payable after the date of such
[*], or for any additional support or maintenance fees. Notwithstanding the above, in the event
Licensee [*] as a result of Licensee’s receipt of a notice of [*] under Section [*] of the Master
Agreement, then Licensee shall be liable to MIPS for any payments under Paragraph 7.1, Paragraph 9
and Paragraph 11 payable prior to the [*] rather than the [*]. Nothing herein shall be construed
to release Licensee of any of its other obligations in accordance with the Master Agreement or this
Technology Schedule, including without limitation, its obligation to pay MIPS late payment fees and
royalties for all Licensee Chips shipped by Licensee.



Notwithstanding anything to the contrary, if Licensee undergoes a Change Event, Licensee may [*]
effective upon such Change Event provided Licensee notifies MIPS in writing prior to such Change
Event (for purposes of clarification, the requirement in the foregoing paragraph that such notice
be provided [*] in advance shall not apply), and if the [*] extension to the term of this
Technology Schedule is not yet effected, the Change Event will not automatically trigger the
extension. Although the licenses granted under the Master Agreement and this Technology Schedule,
including the surviving license rights set forth in Section 14.4 and 14.7 of the Master Agreement,
shall immediately terminate effective upon the Change Event, Licensee shall be liable to MIPS for
any payments under Paragraph 7.1, Paragraph 9, and Paragraph 11 payable prior to the [*], but
Licensee shall not be liable to MIPS for any payments under Paragraph 7.1, Paragraph 9, and
Paragraph 11 payable after such [*].



For purposes of this Technology Schedule, the parties agree that notwithstanding anything in
Section 14.4 of the Master Agreement to the contrary, provided Licensee is not in breach of the
Agreement or of this Technology Schedule and continues to pay royalties as specified herein, and
provided further that the surviving license rights set forth in Section 14.4 and 14.7 of the Master
Agreement have not [*] as provided in this Technology Schedule, Licensee shall also have the rights
set forth in Section 2.1.1 through 2.1.4 of the Master Agreement with respect to any Licensee Chip
[*] at the time of expiration or termination of this Technology Schedule (a Licensee Chip shall be
[*] if Licensee has given MIPS notice at or before the time of expiration or termination of this
Technology Schedule that said Licensee Chip has [*]) for up to [*] the date of termination or
expiration of this Technology Schedule, and thereafter only if Licensee certifies in a writing by a
duly authorized officer within said [*] period that the Licensee Chip has been [*] and the [*] has
been delivered to an Authorized Foundry for silicon production. The [*] shall then continue with
respect to a Licensee Chip for an additional [*] period only if silicon production actually occurs, and
thereafter only if Licensee certifies in a writing by a duly authorized officer within said [*] period
that silicon production of the Licensee Chip has commenced using a mask set dedicated to Licensee
only. If Licensee commercializes a Licensee Chip for which rights survived as provided herein,
then provided Licensee is not in breach of the Agreement or of





 









 







Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.



this Technology Schedule and
continues to pay royalties as specified herein, Licensee shall have the right to
continue having manufactured, distributing and selling such Licensee Chip after the date of
termination or expiration of this Technology Schedule.





	12.	 	Program Managers:





	 	 	 
	For Licensee:

	 	Anil Jain
	 

	 	VP of IC Engineering Summit
	 

	 	Place, 2nd Floor 420 Lakeside
	 

	 	Avenue Marlboro, MA 01752
	 

	 	Telephone: 508-357-4111 x215
	 

	 	Facsimile: 508-357-4114
	 

	 	Email: aniljain @cavium.com
	 
	 	 
	For MPS:

	 	Brad Holtzinker
	 

	 	Director of Sales, The Americas
	 

	 	1225 Charleston Road
	 

	 	Mountain View, CA 94043
	 

	 	Telephone: 650-567-7069
	 

	 	Facsimile: 650-567-5158
	 

	 	Email: brad@mips.com





Notice of changes in the above addresses or contacts shall be given in writing in accordance with
Section 15.1 of the Master Agreement.



13. Licensed Marks: In accordance with the rights granted in the Trademark License
Agreement, Licensee may use the following Licensed Marks in connection with the Licensee Chips
being developed in accordance with the rights granted in the Master Agreement and this
Technology Schedule:




	 	 	 	 	 
	Licensed Mark	 	Exclusive?	 	Sublicensable?
	 
	MIPS

	 	No
	 	No
	 
	MIPS-Based

	 	No
	 	No
	 
	MIPS 64

	 	No
	 	No






 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.



14. Press Announcement: Licensee and MIPS agree to jointly announce the existence of the
license to the MIPS64 Architecture to the press. The timing of the announcement shall be mutually
agreed upon and is targeted to occur within three (3) months of the Schedule Effective Date.



15. Additional Terms:




     15.1 Export Information: As of the Schedule Effective Date, the Licensed MIPS Core
licensed under this Technology Schedule is classified as 3E002.(g) by the U.S. Bureau of Industry
and Security (BIS) and may require an export license to reexport this technology or products
derived therefrom to certain countries, individuals or entities or for certain prohibited or
restricted end uses. Licensee hereby acknowledges and agrees that without an export license or
license exception granted by the BIS, Licensee will not: (1) Reexport or otherwise redistribute or
release the technology licensed under this Technology Schedule to a national of a country in the
controlled or embargoed Country Groups (as defined under BIS regulations) applicable to this
classification; or (2) Export any derivative product or portions thereof (collectively, “Derivative
Product”) of the technology licensed under this Technology Schedule to a country in the controlled
or embargoed Country Groups applicable to this classification, if such Derivative Product is
subject to national security controls as identified on the Country Control List (“CCL”) (as defined
under BIS regulations); or (3) knowingly, directly or indirectly, transfer any technology licensed
under this Technology Schedule or any MIPS Confidential Information provided under this Technology
Schedule or any Licensee product derived from the MIPS Deliverable(s) or any MIPS Confidential
Information to any BIS prohibited individual or entity or to any party whose anticipated end use
for the information is a prohibited or restricted end use. Specific information may be found at
www.bis.doc.gov. Such website and regulations therein may change from time to time as determined
by the BIS and Licensee is responsible for complying with the most current regulations.



     15.2 Approved Licensee Sites: MIPS confirms that the following sites of Licensee are
approved sites in which Licensee may use the Restricted Confidential Deliverables as provided in
Section 102 of the Master Agreement:


Cavium Networks

2610 Augustine Drive

Santa Clara, CA 95054



Cavium Networks

Summit Place, 2nd floor

420 Lakeside Avenue

Marlboro, MA 01752




Upon Licensee’s notice to MIPS, Licensee may add any research and development site of Licensee
within the United States. Upon Licensee’s request and MIPS’ approval, Licensee may obtain
additional approved Licensee sites under this Paragraph 15.2. In the event that MIPS approves the
use of a third party under Section 2.1 of the Master Agreement, such third party’s site shall be an
additional approved site for purposes of Section 10.2 of the Master Agreement, subject to the
provisions of Section 2.5 of the Master Agreement.




 









 





Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.



     15.3 Change Event: The parties acknowledge that Licensee is a private company at the
time of the Schedule Effective Date. In the event Licensee undergoes (i) an initial public
offering (IPO) or (ii) the acquisition of all or substantially all of Licensee’s assets or greater
than 50% of the voting stock of Licensee by a party or parties that are not primarily in the
business of funding private entities and that are not financial institutions (subject to the
assignment provision in Section 15.5 of the Master Agreement) (each a “Change Event”), the term of
this Technology Schedule shall be automatically extended as provided in Paragraph 11 above and the
license fees under Paragraph 7.1 shall become payable as set forth therein with respect to the
applicable Change Event.



     15.4 Technical Support: Licensee may obtain technical support via telephone and/or
e-mail relating to the MIPS Deliverables at MIPS then-current prices. The current prices
(exclusive of applicable taxes, if any) are set forth below:



	 	 	 	 	 
	Services	 	Price	 
	 
	Technical Support
	 	 	 	 
	25 hours technical support
	 	$	[*]	 
	50 hours technical support
	 	$	[*]	 





Licensee shall provide MIPS with the requisite purchase order in the amount of the then-applicable
fees upon request for such technical support.




     15.5 Transfer Fee: $[*]; and in addition, notwithstanding any terms of the Master
Agreement to the contrary, this Technology Schedule may not be assigned to any third party unless
and until all royalties and other payments due and payable prior to the date of the assignment
under Paragraphs 7, 8, 9, and 11 above have been paid in full to MIPS.



     15.6 MIPS Approvals: MIPS agrees that any approvals or consents to be given by MIPS
under the terms of the Master Agreement and this Technology Schedule shall not be unreasonably
delayed or withheld. Licensee acknowledges and agrees that approval would not be unreasonably
delayed or withheld where consent is requested that involves a competitor of MIPS or MIPS has
legitimate concerns about the ability to protect the confidentiality of the Licensed Technology or
to enforce MIPS’ Intellectual Property Rights in the jurisdiction involved. MIPS agrees to work
with Licensee and any third party acquiror that is a competitor of MIPS that otherwise meets all
the requirements in Section 15.5 of the Master Agreement in good faith to mutually agree upon
adequate protection mechanisms, and if such agreed upon protection measures are implemented, then
MIPS will not deny consent because such party is a competitor of MIPS. MIPS agrees to respond
within 30 days of relevant notifications.



     15.7 Rights to Modify the Licensed MIPS Architecture: Licensee may not subset,
superset or otherwise modify the functional behavior of the Licensed MIPS Architecture except as
set forth in Exhibit A to this Technology Schedule.



 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




IN WITNESS WHEREOF, each party has caused this Technology Schedule to be executed by its duly
authorized representative:



	 	 	 	 	 	 	 	 	 	 	 
	MIPS TECHNOLOGIES, INC.	 	 	 	CAVIUM NETWORKS (“LICENSEE”)	 	 
	 
	 	 	 	 	 	 	 	 	 	 
	By:

	 	/s/ John Bourgoin
	 	 	 	By:
	 	/s/ Syed Ali	 	 
	 

	 	 
	 	 	 	 	 	 	 	 
	 
	Print Name: John Bourgoin	 	 	 	Print Name: Syed Ali	 	 
	 
	Title: President & CEO	 	 	 	Title: President & CEO	 	 






 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




EXHIBIT A




Compliance and Subsetting



To be compliant with the MIPS64 Architecture, designs must implement a set of required features,
as described in this section. To allow flexibility in implementations, the MIPS64 Architecture
does provide subsetting rules. An implementation that follows these rules is compliant with the
MIPS64 Architecture as long as it adheres strictly to the rules, and fully implements the
remaining instructions. Supersetting of the MIPS64 Architecture is only allowed by adding
functions to the SPECIAL2 major opcode, by adding control for co-processors via the COP2, LWC2,
SWC2, LDC2, and/or SDC2, opcodes, or via the addition of MIPS-approved Application Specific
Extensions.



[*] is explicitly prohibited by the Architecture unless [*] are approved by MIPS Technologies,
Inc., [*]. For example, modification of [*] is explicitly prohibited if that mode is intended to
be used for production use. Alternate modes intended for non-production use such as testing are
excluded from this restriction. This requirement is intended to avoid the creation of new de-facto
standards around the MIPS Architecture that are not approved extensions.



The instruction set subsetting rules are as follows:





	•	 	All CPU instructions must be implemented — no subsetting is allowed.






	 	•	 	The FPU and related support instructions, including the MOVF and MOVT CPU
instructions, may be omitted. Software may determine if an FPU is implemented by
checking the state of the FP bit in the Config1 CPO register. If the FPU is
implemented, it must include S, D, and W formats, operate instructions, and all
supporting instructions. If the FPU is implemented, the paired single (PS) format is
optional. Software may determine which FPU data types are implemented by checking the
appropriate bit in the FIR CP1 register. The following allowable FPU subsets are
compliant with the MIPS64 architecture:






	 	•	 	No FPU
	 
	 	•	 	FPU with S, D, and W, and L formats and all supporting instructions
	 
	 	•	 	FPU with S, D, PS, W, and L formats and all supporting instructions






	•	 	Coprocessor 2 is optional and may be omitted. Software may determine if Coprocessor 2 is implemented by checking the
state of the C2 bit in the Config1 CPO register. If Coprocessor 2 is implemented, the Coprocessor 2 interface
instructions (BC2, CFC2, COP2, CTC2, DMFC2, DMTC2, LDC2, LWC2, MFC2, MTC2, SDC2, and SWC2) may be omitted on an
instruction-by-instruction basis.





 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.





	•	 	Implementation of the full 64-bit address space is optional. The processor may
implement 64-bit data and operations with a 32-bit only address space. In this case, the
MMU acts as if 64-bit addressing is always disabled. Software may determine if the
processor implements a 32-bit or 64-bit address space by checking the AT field in the
Config CPO register.
	 
	•	 	Supervisor Mode is optional. If Supervisor Mode is not implemented, bit 3 of the Status
register must be ignored on write and read as zero.
	 
	•	 	The standard TIB-based memory management unit may be replaced with a simpler MMU (e.g., a
Fixed Mapping MMU). If this is done, the rest of the interface to the Privileged Resource
Architecture must be preserved. If a TLB-based memory management unit is implemented, it
must be the standard TLB-based MMU as described in the Privileged Resource Architecture.
Software may determine the type of the MMU by checking the MT field in the Config CPO
register.
	 
	•	 	The Privileged Resource Architecture includes several implementation options and may be
subsetted in accordance with those options.
	 
	•	 	Instruction, CPO Register, and CP1 Control Register fields that are marked “Reserved” or
shown as “0” in the description of that field are reserved for future use by the architecture
and are not available to implementations. Implementations may only use those fields that are
explicitly reserved for implementation dependent use.
	 
	•	 	MIPS approved ASEs are optional and may be subsetted out. If most cases, software may
determine if a supported ASE is implemented by checking the appropriate bit in the specified
CPO register(s). If they are implemented, they must implement the entire architecture
applicable to the component, or implement subsets that are approved by the ASE
specifications.
	 
	•	 	EJTAG is optional and may be subsetted out. If it is
implemented, it must implement only those subsets that are approved by the EJTAG specification.
	 
	•	 	If any instruction is subsetted out based on the rules above, an attempt to execute that
instruction must cause the appropriate exception (typically Reserved Instruction or
Coprocessor Unusable).






 









 







Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.




December 30, 2003




Syed Ali

President

Cavium Networks

2610 Augustine Drive

Santa Clara, California 95054




	 	 	 	 	 
	 

	 	Re:
	 	Section 8.1 of the Master Technology License Agreement for MIPS Architecture
and MIPS Cores effective as of December 30, 2003 by and between MIPS
Technologies, Inc. (“MIPS”) and Cavium Networks (“Licensee”) (the “Master
Agreement”) and Section 2.2 of the Master Agreement.





Dear Syed:



This letter is to confirm our mutual understanding that notwithstanding the provisions of Section
8.1 of the Master Agreement referenced above, the provisions shall read as follows:




     “8.1 MIPS Architecture Licensee. To preserve MIPS’ ability to continue to update,
enhance, develop and commercialize the MIPS Products (as defined below), Licensee hereby
perpetually and irrevocably agrees that Licensee and its affiliates will not enforce or assert the
Licensee Potentially Blocking Patents (as defined below) against MIPS or MIPS Community Members in
connection with, or in a manner which in any way limits, hampers or prevents, the use, design,
development, modification, enhancement, testing, making, copying, offering to sell, selling,
importing and licensing or other distribution, by any MIPS Community Member (as defined below) of
(a) MIPS Products, tools pertaining to the MIPS Products, and any implementation of MIPS Products,
and (b) MIPS Products or any implementation thereof as components of, or incorporated in,
products.



     For purposes of this Agreement,



     ‘Licensee Potentially Blocking Patents’ means all claims contained in patents or patent
applications owned by, or licensed to Licensee or its affiliates, which cover (i) functions (i.e.
instructions) in SPEC2 space, (ii) implementations of such instructions provided that there is
more than a 2 times performance implementation-based enhancement relative to the best existing
alternative implementation, and provided further that such implementations shall be subject to a 2
year period of exclusivity (i.e., MIPS will not commercialize products incorporating such
implementation for a period of 2 years from commercialization by Licensee), (iii) technology that
‘picket fences’ the base architecture, which means technology that depends in an integral fashion
on the MIPS architecture features and represents reasonable and logical extensions or updates of
the base architecture (e.g., shadow registers, multithreading, extended accumulators, out-of-order
issue, memory mapping techniques, and multiple instruction issue).



     For purposes of clarification, COP2 functions (in the 25-bit user definable
field) are external to MIPS base architecture and are not subject to this
Section 8.1.



     ‘MIPS Community Member’ means any of MIPS, its distributors, resellers,
OEMs, agents, customers, licensees (through multiple tiers of licensing and
sublicensing) or end users in any country.”



     Section 2.2 of the Master agreement provides that except as expressly
permitted in the Technology Schedule for the applicable Licensed MIPS
Architecture, Licensee may not subset, superset or otherwise modify the
functional behavior of the Licensed MIPS Architecture. Exhibit A of the MIPS
Technology Schedule for the MIPS64 Architecture sets forth Licensees rights to
modify the Licensed MIPS Architecture.



 









 




Certain confidential information contained in this document, marked by brackets, has been omitted and filed separately
with the Securities and Exchange Commission pursuant to Rule 406 of the Securities Act of 1933, as amended.





Based on discussions between the parties, we understand that Licensee may
desire to use the existing [*] . Notwithstanding anything in Exhibit A
of the Technology Schedule to the contrary, MIPS is willing to allow such use,
provided Licensee provides MIPS with notice of which Licensee Chips are being
developed [*] of the Licensee Chips and the Licensee Chips pass the
Compatibility Verification Process set forth in the Master Agreement. Licensee
is encouraged to disclose to MIPS and consult with MIPS regarding the
[*]. Licensee understands and acknowledges that the decision to use
[*] will require [*] of unknown scope, which changes are the
sole responsibility of the Licensee.




     All other terms and conditions of the Master Agreement shall remain in full
force and effect. To evidence your agreement with the foregoing, please sign
and return one original of this letter, which shall constitute our agreement
with respect to the subject matter hereof.



Very truly yours,




MIPS TECHNOLOGIES, INC.




/s/ John Bourgoin




John Bourgoin




President and CEO




Agreed and Accepted:




CAVIUM NETWORKS




	 	 	 	 	 
	By:

	 	/s/ Syed Ali	 	 
	

Name:

	 	 


Syed Ali
	 	 
	 
	Title:

	 	President