# Patent

## Title
Signal processing unit and wireless communication device

## Abstract

A signal processing unit and a wireless communication device are provided for making it possible to detect a frequency by means of a small scale operation circuit in a short time. The signal processing unit and the wireless communication device are comprised of a carrier data generating unit; a carrier demodulation unit; a matched filter unit that divides carrier demodulated data into a plurality of portions, carries out despread processing and accumulating operation processing as partial correlation processing, further carries out full addition processing for the partial correlation processing result, and outputs correlation detected data; a correlation peak detecting unit that detects a correlation peak from the correlation detected data and outputs correlation peak position information; a coarse frequency deviation detecting unit that outputs a frequency deviation amount with respect to the carrier demodulated data to the carrier data generating unit; and a fine frequency deviation detecting unit that outputs a fine frequency deviation amount from the correlation detected data and the correlation peak position information to the carrier data generating unit.

## Background
This is a Continuation of PCT/JP2007/074138 filed Dec. 14, 2007 and published in Japanese.


BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wireless communication device, which adopts the spread spectrum (it will be hereinafter abbreviated as “SS”) scheme in order to operate in weak radio waves and, more particularly, to a signal processing unit and a wireless communication device, which are able to detect a frequency in a short time by the use of a small-scale operation circuit when performing correlation detection.
2. Description of the Related Art
[Bidirectional Wireless System: FIG. 12]
A wireless communication device that has been conventionally used in a bidirectional wireless system adopts a spread spectrum scheme to operate in weak radio waves.
The conventional bidirectional wireless system will be described with reference to FIG. 12. FIG. 12 is a schematic diagram illustrating the conventional bidirectional wireless system.
The conventional bidirectional wireless system is provided with a wireless communication device as a base station 1 which has a transmitting unit 1a and a receiving unit 1b, and a wireless communication device as a portable equipment 2 which has a transmitting unit 2a and a receiving unit 2b. The conventional bidirectional wireless system transmits operation commands from the portable equipment 2 to the base station 1 by operating an input device of the portable equipment 2, so that the base station 1 is operated according to the commands.
The base station 1 is to transmit responses to transmission states of the commands or state information of the base station 1 to the portable equipment 2.
That is, the conventional bidirectional wireless system is a weak wireless system capable of performing bidirectional communication (half duplex) adopting the SS.
In the bidirectional wireless system, the portable equipment 2 plays a leading role in operation. The base station 1 receives the commands from the portable equipment 2 by intermittently receiving the transmission from the portable equipment 2, and the portable equipment 2 is put into an operation mode only when it is to be operated. Therefore, it is possible to significantly reduced power consumption.
[Configuration of Conventional Signal Processing Unit: FIG. 13]
A signal processing unit in the wireless communication device will be described with reference to FIG. 13. FIG. 13 is a block diagram illustrating a configuration of a conventional signal processing unit.
The conventional signal processing unit is provided with an ADC (Analog Digital Converter) control unit 11, an AGC (Auto Gain Control) unit 12, APC/AFC (Auto Power Control/Auto Frequency Control) control unit 13, a DAC (Digital Analog Converter) control unit 14, a carrier demodulating unit 15, a carrier data generating unit 16, a carrier modulating unit 17, a receiving data decoding unit 18′, a spread code generating unit 20′, a spread modulating unit 21′, a correlation peak detecting unit 22′, a coarse frequency deviation detecting unit 23′, and a fine frequency deviation detecting unit 24′.
Parts of the conventional signal processing unit will now be described in detail.
The ADC control unit 11 performs control to generate a control signal for the A/D converter (designated as “A/D”), and to receive a receiving IF (Intermediate Frequency) signal as an input signal from the A/D converter.
The AGC unit 12 controls a gain control signal which is outputted to the AGC amplifier in a wireless communication unit, so that the receiving IF signal output coming from the ADC control unit 11 may always be kept to have a predetermined amplitude.
The APC/AFC control unit 13 receives, as an input thereto, the control signal for monitoring temperature of the wireless communication unit from the A/D converter using a thermistor, and outputs an AFC correction value and an APC correction value to the carrier data generating unit 16 and the carrier modulating unit 17, respectively, with respect to the monitored value.
The DAC control unit 14 delivers data, which is modulated in carrier by the carrier modulating unit 17, to the D/A converter.
The carrier demodulating unit 15 performs a processing of removal of an IF carrier component with respect to the receiving IF signal which is outputted from the ADC control unit 11 and further a down sample processing on the afore-processed signal, and then outputs the eventual signal to the receiving data decoding unit 18′, the correlation peak detecting unit 22′, and the coarse frequency deviation detecting unit 23′, respectively.
The carrier data generating unit 16 performs a frequency correction processing according to a frequency deviation value or the like from the coarse frequency deviation detecting unit 23′ and the fine frequency deviation detecting unit 24′, and generates IF carrier data to be supplied to the carrier demodulating unit 15 and the carrier modulating unit 17.
The carrier modulating unit 17 performs an APC correction processing according to an APC correction request from the APC/AFC control unit 13, with respect to the IF carrier data which is supplied from the carrier data generating unit 16, and also performs the carrier modulation processing with the IF carrier data, with respect to spread modulation processing data which is input from the spread modulating unit 21′.
The receiving data decoding unit 18′ detects a synchronizing word after performing a fine frequency correction of a synchronized IF carrier frequency, and performs a demodulation processing of user data.
The spread code generating unit 20′ generates a spread code which is used in performance of a spread modulation and a despread processing. At this stage, two types of spread codes are necessary to be used for synchronizing word/REF (Reference) data and for the user data.
The spread modulating unit 21′ performs a differentially-encoding processing of the synchronizing word/REF data and the spread modulation processing of the transmission user data and the synchronizing word/REF data after being differentially encoded.
The correlation peak detecting unit 22′ performs a correlation processing on a carrier demodulated data which is outputted from the carrier demodulating unit 15 to perform a correlation peak detection.
The coarse frequency deviation detecting unit 23′ detects residual frequency components according to an IF carrier frequency deviation amount between the base station and the portable equipment on the carrier demodulated data which is outputted from the carrier demodulating unit 15, and outputs the frequency deviation amount to the carrier data generating unit 16.
The fine frequency deviation detecting unit 24′ performs frequency detection at a high accuracy on the correlation data of which a peak has been detected, in order to further decrease the frequency deviation amount, and outputs the fine frequency deviation amount to the carrier data generating unit 16.
In addition, as a relevant prior art, there is a JP-A-2004-214960 (Patent Document 1).
The Patent Document 1 discloses an OFDM demodulating apparatus in which a peak detection circuit accumulates guard correlation signals at a period of the predetermined number of symbols to generate an accumulation signal from which a peak timing is detected, and calculates a phase component of the guard correlation signal in the peak timing once as per one symbol, thereby correcting a deviation amount of a center frequency of OFDM signals.
Nevertheless, in the signal processing unit according to the conventional wireless communication device, when performing the correlation detection, it is requested that the detection accuracy of the coarse frequency deviation detecting unit should be 32 Hz.
In order to realize the detection accuracy of 32 Hz, it is necessary that either FFT (Fast Fourier Transform) operation processing points are set to 1,024 points from 32 points of the said signal processing unit or FFT operation sampling intervals are set to 1/1,024 sec from 1/32,768 sec of the said signal processing unit.
When the operation sampling interval is set to be longer, even frequency deviation components of equal to or more than 512 Hz (Nyquist frequency) must be also considered as frequency components of equal to or less than 512 Hz. Therefore, no normal frequency detection can be performed. That is to say, there occurs such a problem that the detectable range of frequencies must be restricted.
On the other hand, when the operation processing point is set to be 1,024 points, there is a problem such that an extensive increase in the operation processing time and the operation processing circuit must be brought about.
SUMMARY OF THE INVENTION
The present invention was made in consideration of the above-mentioned circumstances and, hence, an object of the present invention is to provide a signal processing unit and a wireless communication device, which are able to detect a frequency in a short time by the use of a small-scale operation circuit upon performing a correlation detection.
In order to solve the above-mentioned problems encountered by the conventional examples above, the present invention provides a signal processing unit that is adapted for use in a wireless communication device, which comprises: a carrier data generating unit configured to correct a frequency according to a frequency deviation amount to be received as an input and generating carrier data; a carrier demodulating unit configured to demodulate a carrier of a received signal based on the carrier data and outputting carrier demodulated data; a matched filter unit configured to calculate, for the carrier demodulated data, plural division correlation values by dividing said data and by further performing a despread processing and an accumulating operation processing as a partial correlation processing and to perform a full addition processing on the plural division correlation values, to thereby output correlation detected data while outputting the plural division correlation values as a partial correlation detected value due to detection of a correlation peak; a correlation peak detecting unit configured to detect a correlation peak from the correlation detected data and to output position information of the correlation peak; a coarse frequency deviation detecting unit configured to perform a FFT operation on the carrier demodulated data, and to detect a frequency component according to a carrier frequency deviation amount thereby outputting a frequency deviation amount to the carrier data generating unit; a fine frequency deviation detecting unit configured to perform the FFT operation on the partial correlation value and to output a fine frequency deviation amount for reducing the frequency deviation amount, to the carrier data generating unit; and a control unit configured to receive the position information of the correlation peak as an input and to adjust a processing clock as an operation timing in the correlation peak detecting unit and the coarse frequency deviation detecting unit. Therefore, it is possible to perform the frequency detection in a short time by a small-scale operation circuit by the use of the partial correlation processing upon performing the correlation detection.
In accordance with one aspect of the present invention, with the above-mentioned signal processing unit, the matched filter unit is comprised of a signal processing unit which includes: a first carrier demodulated data storing unit that stores carrier demodulated data of an in-phase component; a second carrier demodulated data storing unit that stores carrier demodulated data of an orthogonal component; a spread code dividing unit that divides and outputs a spread code; a first despread processing unit that despreads the carrier demodulated data outputted from the first carrier demodulated data storing unit by the divided spread code; a second despread processing unit that despreads the carrier demodulated data outputted from the second carrier demodulated data storing unit by the divided spread code; a first accumulation processing unit that performs an accumulating operation of an output from the first despread processing unit; a second accumulation processing unit that performs an accumulating operation of an output from the second despread processing unit; a partial correlation calculating processing unit that performs a partial correlation calculation of respective outputs from the first and second accumulation processing units; a full addition processing unit that performs full addition of every output from the partial correlation calculating processing unit; and a shift register that temporarily stores every output from the partial correlation calculating processing unit and outputs the stored outputs as partial correlation values to the fine frequency deviation detecting unit due to receipt of a symbol synchronizing signal which is inputted from the outside to indicate position information of the correlation peak. Therefore, it is possible to perform frequency detection in a short time by a small-scale operation circuit by the use of the partial correlation processing upon performing the correlation detection.
In accordance with another aspect of the present invention, with the above-mentioned signal processing unit, the first and second carrier demodulated data storing units perform a pipeline processing through a high-speed clock processing while using a dual-port RAM. Therefore, it is possible to perform frequency detection in a short time by a small-scale operation circuit upon performing the correlation detection.
In accordance with a further aspect of the present invention, with the above-mentioned signal processing unit, the matched filter unit performs a 32-divided partial correlation processing, and the coarse frequency deviation detecting unit performs noise removing processing on the carrier demodulated data thereby performing a 32-point FFT operation through down-sampling of the data. Further, the fine frequency deviation detecting unit performs a 32-point FFT operation with respect to the 32-divided correlation value when the correlation peak is detected in the correlation peak detecting unit. Therefore, both the coarse frequency deviation detecting unit and the fine frequency deviation detecting unit can be adapted for execution of the partial correlation processing.
In accordance with another aspect of the present invention, with the above-mentioned signal processing unit, an operation circuit which performs the FFT operation in the coarse frequency deviation detecting unit is commonly used as an operation circuit which performs the FFT operation in the fine frequency deviation detecting unit. Therefore, an arrangement of circuitry can be further reduced.
In accordance with the present invention, a wireless communication device is configured to comprise the above-described signal processing unit, so that it is possible to perform frequency detection in a short time with a small-scale operation circuit.



BRIEF DESCRIPTION OF THE DRAWING
FIG. 1 is a block diagram illustrating a general configuration of a signal processing unit according to an embodiment of the invention.
FIG. 2 is a block diagram illustrating a typical configuration of a carrier demodulating unit.
FIG. 3 is a block diagram illustrating a typical configuration of a carrier data generating unit.
FIG. 4 is a block diagram illustrating a configuration of a former part of a receiving data demodulating unit.
FIG. 5 is a block diagram illustrating a configuration of a latter part of a receiving data demodulating unit.
FIG. 6 is a block diagram illustrating a configuration of a matched filter unit.
FIG. 7 is a block diagram illustrating a typical configuration of a spread code generating unit.
FIG. 8 is a block diagram illustrating a typical configuration of a spread modulating unit.
FIG. 9 is a block diagram illustrating a typical configuration of a correlation peak detecting unit.
FIG. 10 is a block diagram illustrating a typical configuration of a coarse frequency deviation detecting unit.
FIG. 11 is a block diagram illustrating a configuration of a fine frequency deviation detecting unit.
FIG. 12 is a schematic diagram illustrating a conventional bidirectional wireless system.
FIG. 13 is a block diagram illustrating a general configuration of a conventional signal processing unit.
FIG. 14 is a diagram illustrating waves of carrier demodulated data without an IF carrier frequency deviation amount.
FIG. 15 is a diagram illustrating waves of correlation detected data without the IF carrier frequency deviation amount.
FIG. 16 is a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=16 Hz.
FIG. 17 is a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=16 Hz.
FIG. 18 is a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=32 Hz.
FIG. 19 is a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=32 Hz.
FIG. 20 is a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=48 Hz.
FIG. 21 is a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=48 Hz.
FIG. 22 is a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=64 Hz.
FIG. 23 is a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=64 Hz.
FIG. 24 is a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=512 Hz.
FIG. 25 is a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=512 Hz.



DESCRIPTION OF REFERENCE NUMERALS


    
    
        1: wireless communication device (base station)
        2: wireless communication device (portable equipment)
        11: ADC control unit
        12: AGC unit
        13: APC/AFC control unit
        14: DAC control unit
        15: carrier demodulating unit
        16: carrier data generating unit
        17: carrier modulating unit
        18, 18′: receiving data decoding unit
        19: matched filter unit
        20, 20′: spread code generating unit
        21, 21′: spread modulating unit
        22, 22′: correlation peak detecting unit
        23, 23′: coarse frequency deviation detecting unit
        24, 24′: fine frequency deviation detecting unit
        25: control unit
        151: IF carrier modulation processing unit
        152: harmonic component removing unit
        153: down sampling unit
        161: AFC adjusting unit
        162: index counter
        163: address decoder
        164: sine wave table
        181: decimation filter
        182: down sampling unit
        183: low-frequency component removing unit
        184: despread processing unit
        185: division accumulation processing unit
        186: partial correlation calculating processing unit
        187: accumulation processing unit
        188: delay detecting unit
        189: code bit extracting unit
        191: RAM read address generating unit
        192: carrier demodulated data storing unit
        193: spread code dividing unit
        194: despread processing unit
        195: accumulation processing unit
        196: partial correlation calculating processing unit
        197: full addition processing unit
        198: shift register
        201: control unit
        202: code generation parameter table
        203: code generating unit
        204: code storing unit
        205: SEL
        211: differentially-encoding processing unit
        212, 213, 214: spread modulation processing unit
        221: 1-bit interval maximum peak position detecting unit
        222: maximum peak position comparing unit
        223: symbol synchronizing signal generating unit
        224: free running counter
        231: noise removing unit
        232: down sampling unit
        233: FFT operation processing unit
        234: operation result accumulation processing unit
        235: maximum peak position detecting unit
        241: FFT operation processing unit
        242: maximum peak position detecting unit
    
    


DESCRIPTION OF THE PREFERRED EMBODIMENT
Outline of Embodiment
An Embodiment of the invention will be described with respect to the accompanying drawings.
In the signal processing unit according to an embodiment of the invention, a carrier data generating unit generates IF carrier data; a carrier demodulating unit demodulates a carrier of a received signal based on the carrier data; a matched filter unit divides the carrier demodulated data into plural pieces which are subjected to a despread processing and an accumulating operation processing as a partial correlation processing, and then performs a full addition processing with respect to the results of the partial correlation processing to output correlation detected data; a correlation peak detecting unit detects a correlation peak from the correlation detected data to output position information of the correlation peak; a coarse frequency deviation detecting unit detects a frequency component according to a carrier frequency deviation amount with respect to the carrier demodulated data and outputs the frequency deviation amount to the carrier data generating unit; a fine frequency detecting unit outputs a fine frequency deviation amount to the carrier data generating unit, which makes a frequency deviation amount to be small from the correlation detected data when detecting the correlation peak; and a control unit receives position information of the correlation peak to adjust a processing clock. Therefore, using the partial correlation processing, frequency detection is able be performed in a short time by the use of a small-scale operation circuit when performing correlation detection.
Further, in the signal processing unit according to the embodiment of the invention, a dual-port RAM is used in a carrier demodulated data storing unit which stores the carrier demodulated data in the matched filter unit, and a pipeline processing is performed as a high-speed clock processing. Therefore, the frequency detection is able be performed in a short time by the use of a small-scale operation circuit when performing the correlation detection.
In addition, a wireless communication device according to an embodiment of the invention is provided with the above signal processing unit. Therefore, the frequency detection is able to be performed in a short time by the use of a small-scale operation circuit when performing the correlation detection.
[Overall Configuration of Signal Processing Unit: FIG. 1]
The signal processing unit (the present signal processing unit) according to the embodiment of the invention will be described with reference to FIG. 1. FIG. 1 shows a block diagram illustrating a configuration of the signal processing unit according to the embodiment of the invention.
As shown in FIG. 1, the signal processing unit according to the embodiment of the invention includes an ADC (Analog Digital Converter) control unit 11, an AGC (Auto Gain Control) unit 12, an APC/AFC (Auto Power Control/Auto Frequency Control) control unit 13, a DAC (Digital Analog Converter) control unit 14, a carrier demodulating unit 15, a carrier data generating unit 16, a carrier modulating unit 17, a receiving data decoding unit 18, a matched filter unit 19, a spread code generating unit 20, a spread modulating unit 21, a correlation peak detecting unit 22, a coarse frequency deviation detecting unit 23, a fine frequency deviation detecting unit 24, and a control unit 25.
[Parts]
Next, each part of the present signal processing unit will be described with reference to the drawings.
[ADC Control Unit 11]
The ADC control unit 11 reads a receiving IF (Intermediate Frequency) signal from an A/D converter IC (Integrated Circuit) and outputs the received signal to the carrier demodulating unit 15.
Further, the ADC control unit 11 generates and output a control signal to the A/D converter IC.
[AGC Unit 12]
The AGC unit 12 outputs a control signal for controlling a gain of the AGC amplifier in order to always be in predetermined amplitude with respect to the received signal output from the ADC control unit 11.
[APC/AFC Control Unit 13]
The APC/AFC control unit 13 generates and outputs a control signal to the A/D converter IC in order to monitor a temperature of the wireless communication unit (RF [Radio Frequency] unit) using a thermistor.
Further, the APC/AFC control unit 13 supplies an AFC correction value and an APC correction value to the carrier data generating unit 16 and the carrier modulating unit 17, respectively, according to the monitored value from the A/D converter IC.
Here, the APC means an automatic-transmission power control, and the AFC means an automatic frequency control, respectively.
[DAC Control Unit 14]
The DAC control unit 14 sends out data, which is modulated in carrier by the carrier modulating unit 17, to the D/A converter IC.
Further, the DAC control unit 14 generates and outputs a control signal to the D/A converter IC.
[Carrier Demodulating Unit 15: FIG. 2]
The carrier demodulating unit 15 will be described with reference to FIG. 2. FIG. 2 shows a block diagram illustrating a configuration of the carrier demodulating unit.
The carrier demodulating unit 15 removes an IF carrier component with respect to the receiving IF signal based on the IF carrier data which is input from the carrier data generating unit 16, and further down-samples the receiving IF signal from 512 kHz sampling (strictly speaking, 524,288 Hz) to 256 kHz sampling (strictly speaking, 262,144 Hz).
As shown in FIG. 2, the carrier demodulating unit 15 includes: an IF carrier demodulating unit 151a for receiving a receiving data (RX data) and modulating the receiving data with an IF carrier with respect to an in-phase component (I component); an IF carrier demodulating unit 151b for modulating the receiving data with the IF carrier with respect to an orthogonal component (Q component); a high-harmonic component removing unit 152a for removing high-harmonic components using an FIR (Finite Impulse Response) filter with respect to the I component demodulated with the IF carrier; a high-harmonic component removing unit 152b for removing a high-harmonic component using an FIR filter with respect to the Q component demodulated with the IF carrier; a down sampling unit 153a for outputting I-component data demodulated with the carrier by down-sampling the I component without the harmonic components; and a down sampling unit 153b for outputting Q-component data demodulated with the carrier by down-sampling the Q component without the harmonic components.
[Carrier Data Generating Unit 16: FIG. 3]
The carrier data generating unit 16 will be described with reference to FIG. 3. FIG. 3 shows a block diagram illustrating a configuration of the carrier data generating unit.
The carrier data generating unit 16 generates carrier data to be supplied to the carrier modulating unit 17 and the carrier demodulating unit 15.
The two kinds of carrier data are generated with a 90° different phase with respect to transmission and reception.
Further, the carrier data generating unit 16 performs a frequency correction processing with respect to frequency deviation detection data from the coarse frequency deviation detecting unit 23 and the fine frequency deviation detecting unit 24, and AFC correction data from the APC/AFC control unit 13.
Specifically, as shown in FIG. 3, the carrier data generating unit 16 includes: an AFC adjusting unit 161a for performing an AFC adjustment with respect to an AFC correction value (coarse adjustment) input from the coarse frequency deviation detecting unit 23 and an AFC correction value (fine adjustment) input from the fine frequency deviation detecting unit 24 in the base on a base station/portable equipment flag input and a reference frequency parameter; an AFC adjusting unit 161b for performing the AFC adjustment with respect to the AFC correction value (temperature) input from the APC/AFC control unit 13 in the base on the base station/portable equipment flag input and the reference frequency parameter; an index counter (Rx) 162a for counting reception indexes with respect to data input from the AFC adjusting unit 161a; an index counter (Tx) 162b for counting transmission indexes with respect to data input from the AFC adjusting unit 161b; an address decoder 163a for decoding an address by the use of a count value of the index counter 162a based on a sine wave table 164 and outputting IF carrier data for Rx of the I component and IF carrier data for Rx of the Q component; and an address decoder 163b for decoding an address by the use of a count value of the index counter 162b based on the sine wave table 164 and outputting IF carrier data for Tx of the I component and IF carrier data for Tx of the Q component.
[Carrier Modulating Unit 17]
The carrier modulating unit 17 performs an APC correction processing according to an APC correction request from the APC/AFC control unit 13 with respect to the IF carrier data supplied from the carrier data generating unit 16.
Further, the carrier modulating unit 17 performs a carrier modulation by the IF carrier data with respect to spread modulating processing data (user data, synchronizing word/REF data) input from the spread modulating unit 21.
The data used as the IF carrier data is shifted in phase by 90° with respect to the user data and the synchronizing word/REF data.
Further, the carrier modulating unit 17 performs an addition processing in which each data subjected to the carrier modulation is added.
[Receiving Data Decoding Unit 18: FIG. 4, FIG. 5]
Next, the receiving data decoding unit 18 will be described with reference to FIGS. 4 and 5. FIG. 4 shows a block diagram illustrating a configuration of a former part of the receiving data decoding unit. FIG. 5 shows a block diagram illustrating a configuration of a latter part of the receiving data decoding unit. (a) to (d) in FIG. 4 are connected to (a) to (d) in FIG. 5, respectively.
The receiving data decoding unit 18 detects a synchronizing word and decodes the user data after performing fine correction of a synchronized IF carrier frequency.
Since the carrier demodulated data is data that is 8 times over-sampled (the carrier demodulated data is sampling data of 262,144 Hz with respect to a chip rate of 32,768 Hz), the carrier demodulated data is down-sampled to data of 32,768 Hz after a decimation filtering (moving average filter with 8 taps).
After down-sampling, the receiving data demodulating unit removes low-frequency components by an HPF (High Pass Filter=FIR filter).
Specifically, as shown in FIGS. 4 and 5, the receiving data decoding unit 18 includes: a decimation filter 181a for filtering I-component data modulated in carrier by the use of the moving average filter with 8 taps; a down sampling unit 182a for down-sampling the output of the decimation filter 181a; a low-frequency component removing unit 183a for removing low-frequency components with respect to the output from the down sampling unit 182a using the FIR filter; a decimation filter 181b for filtering Q-component data demodulated in carrier by the use of the moving average filter with 8 taps; a down sampling unit 182b for down-sampling the output from the decimation filter 181b; a low-frequency component removing unit 183b for removing low-frequency components with respect to the output of the down sampling unit 182b using the FIR filter; a despread processing unit 184a for despreading the output from the low-frequency component removing unit 183a by an RX spread code (serial forward code); a despread processing unit 184b for despreading the output from the low-frequency component removing unit 183a by an RX spread code (serial backward code); a despread processing unit 184c for despreading the output from the low-frequency component removing unit 183b by the RX spread code (serial forward code); a despread processing unit 184d for despreading the output from the low-frequency component removing unit 183b by the RX spread code (serial backward code); a division accumulation processing units 185a to 185d for dividing and accumulating the output from each of the despread processing units 184a to 184d; a partial correlation calculating processing unit 186 for calculating a partial correlation by adding the outputs from the division accumulation processing units 185a to 185d; an accumulation processing unit 187 for accumulating the output of the partial correlation calculating processing unit 186; a code bit extracting unit 189a for extracting a code bit from the output of the accumulation processing unit 187 and outputting the receiving data; a delay detecting unit 188 for receiving the outputs from the division accumulation processing units 185a and 185c and performing a delay detection; and a code bit extracting unit 189b for extracting the code bit from the output from the delay detecting unit 188 and outputting the synchronizing word.
The purpose of the receiving data decoding unit 18 performing the HPF processing with the low-frequency component removing units 183a and 183b is to remove interference components when continuous-wave (CW) interference waves are input in a signal bandwidth.
Such being the case in the signal bandwidth, signal components are also removed, but there is no degradation in sensitivity by setting a cutoff frequency of the HPF not to affect the signal bandwidth.
In the present signal processing unit, the cutoff frequency of the HPF is set to about 2.6 kHz with respect to the chip rate of 34,768 Hz (≈signal bandwidth).
After filtering in the receiving data decoding unit 18, the despread processing and the accumulation processing are performed by a sliding correlation processing.
An amount of the IF carrier frequency deviation is reduced to a level of accuracy within ±32 Hz by means of the fine frequency deviation detection and the correction. However, when a chip rate is 32,768 Hz and 512 chip/bit, a bit rate is 64 bps and an allowable value of residual frequency components after carrier demodulation becomes ±16 Hz. Therefore, the accuracy is not yet sufficient.
Therefore, a division correlation processing is performed in the correlation processing (sliding correlation processing). Although two divisions are enough in theory, the correlation processing is made of four divisions in the present signal processing unit in consideration of a margin.
As described above in connection with the spread modulating unit 21 in detail, decoding of the user data depends on a relative position relationship with the synchronizing word/REF data.
Further, the synchronizing word is detected from the synchronizing word/REF data component at the same time. The detection is performed by the delay detecting unit. However, since the division correlation processing is being performed, 2-stage delay detecting processing comes to be performed instead of normal delay detecting processing.
[Matched Filter Unit 19: FIG. 6]
Next, the matched filter unit 19 will be described with reference to FIG. 6. FIG. 6 shows a block diagram illustrating a configuration of the matched filter unit.
The matched filter unit 19 performs the despread processing and further the full addition processing as the correlation processing by matched-filtering with respect to the carrier demodulated data.
Specifically, as shown in FIG. 6, the matched filter unit 19 includes: a carrier demodulated data storing unit 192a formed of a dual-port RAM (Random Access Memory) for storing I-component data modulated in carrier according to the address output from the RAM read address generating unit 191; a carrier demodulated data storing unit 192b formed of a dual-port RAM for storing Q-component data modulated in carrier according to an address output from the RAM read address generating unit 191; a spread code dividing unit 193 for dividing and outputting a spread code; a despread processing unit 194a for despreading the carrier modulated data output from the carrier demodulated data storing unit 192a by the use of the divided spread code; a despread processing unit 194b for despreading the carrier modulated data output from the carrier demodulated data storing unit 192b by the use of the divided spread code; an accumulation processing unit 195a for performing the accumulating operation with respect to the output from the despread processing unit 194a; an accumulation processing unit 195b for performing the accumulating operation with respect to the output from the despread processing unit 194b; a partial correlation calculating processing unit 196 for calculating the output from the accumulation processing units 195a and 195b by being partially correlated; a full addition processing unit 197 for fully adding the output from the partial correlation calculating processing unit 196; and a shift register 198 for temporarily storing the output from the partial correlation calculating processing unit 196 and outputting as a partial correlation value by the symbol synchronizing signal.
Since the accuracy of the IF carrier frequency deviation which is detected by the coarse frequency deviation detecting unit 23 is 1,024 Hz, there remains an error of ±512 Hz also in the carrier demodulated data after correcting the carrier frequency. For this reason, even though the matched filtering at the full chip length (512 chips) is performed as it is, the correlation peak cannot be detected.
The frequency deviation amount begins to be degraded at ±1⁄4 bit-rates or more. In the present signal processing unit, which has the chip rate of 32,768 Hz and 512 chip length/bit, since the bit rate is 64 bps, the allowable deviation becomes ±16 Hz.
As a countermeasure, in the present signal processing unit, a correlation value is obtained for every 16 chip lengths by dividing 512 chips into 32 and then these 32 divided correlation values are fully added, so that the final correlation value is obtained. That is, the present signal processing unit is to detect the division correlation.
As a result, the detectable frequency deviation amount becomes ±512 Hz, so that it is possible to detect the peak.
In implementing the matched filtering, actually, dual-port RAMs are used for the carrier demodulated data storing units 192a and 192b so that the matched filter unit 19 performs the pipeline processing by a high-speed clock processing.
The correlation detected data (correlation detected value) processed in the correlation detection is supplied to the correlation peak detecting unit 22.
When detecting the peak, the correlation detecting unit 22 makes this detected signal (symbol synchronizing signal) to be used as a trigger and latches the correlation detected data by the shift register 198, which is supplied to the fine frequency deviation detecting unit 24.
[Spread Code Generating Unit 20: FIG. 7]
Next, the spread code generating unit 20 will be described with reference to FIG. 7. FIG. 7 shows a block diagram illustrating a configuration of the spread code generating unit.
The spread code generating unit 20 generates a spread code for the spread modulation and the despread processing.
Specifically, as shown in FIG. 7, the spread code generating unit 20 includes: a control unit 201 for receiving a spread code length designating signal, a state designating signal, and a base station/portable equipment flag and outputting a control signal; a code generating unit 203 for generating a spread signal by the control signal from the control unit 201 and a parameter from a code generation parameter table 202 and outputting the RX spread code (parallel forward code); a code storing unit 204 formed of a dual-port RAM for receiving and storing the spread signal from the code generating unit 203 by the control signal from the control unit 201 and further outputting the stored spread signal; a selector (SEL) 205a for outputting the code from the code storing unit 204 by selecting a TX spread code (serial forward code) or an RX spread code (serial forward code) according to the control signal from the control unit 201; and a selector (SEL) 205b for outputting the code from the code storing unit 204 by selecting the TX spread code (serial backward code) or the RX spread code (serial backward code) according to the control signal from the control unit 201.
The spread code generating unit 20 generates the spread code in a length of 512 chips at starting up the system, which is stored to the code storing unit 204.
The two kinds of spread signals to be used are necessary for the synchronizing word/REF data and for the user data. It is also possible for these two kinds of signals to be generated from each of the parameters, but in the present signal processing unit, a code generated by one kind of parameter is used, which is arranged forward and backward so as to be used in a quite different code.
That is, the SEL 205a receives the TX spread code (serial forward code) or the RX spread code (serial forward code) from the code storing unit 204, and the SEL 205b receives the TX spread code (serial backward code) or the RX spread code (serial backward code) by reversing the same data from the code storing unit 204, and selects and outputs any one of both according to the control signal from the control unit 201.
Specifically, when addresses for reading out the codes stored in the RAM are read out sequentially from 0 to 511 and when read out sequentially from 511 to 0, the different codes are utilized. Therefore, it is possible to reduce storage capacity of the RAM to 1⁄2 capacity.
[Spread Modulating Unit 21: FIG. 8]
Next, the spread modulating unit 21 will be described with reference to FIG. 8. FIG. 8 shows a block diagram illustrating a configuration of the spread modulating unit.
The spread modulating unit 21 performs a differentially-encoding processing with respect to the synchronizing word/REF data, performs a spread modulation processing with respect to the synchronizing word/REF data subjected to the differentially-encoding processing and the transmission user data.
Specifically, as shown in FIG. 8, the spread modulating unit 21 includes: a differentially-encoding processing unit 211 for receiving the synchronizing word/REF data and performing the differentially-encoding processing; a spread modulation processing unit 212 for receiving the transmitting data and the spread code (backward code) and performing the spread modulation processing; a spread modulation processing unit 213 for receiving the data encoded differentially from the differentially-encoding processing unit 211 and the spread code (forward code), performing the spread modulation processing, and outputting a synchronizing word/REF data spread modulating signal; and a spread modulation processing unit 214 for receiving a signal modulated diffusely from a spread modulation processing unit 212 and the data encoded differentially from the differentially-encoding processing unit 211, performing the spread modulation processing, and outputting a transmitting data spread modulating signal.
[Correlation Peak Detecting Unit 22: FIG. 9]
Next, the correlation peak detecting unit 22 will be described with reference to FIG. 9. FIG. 9 shows a block diagram illustrating a configuration of the correlation peak detecting unit.
As shown in FIG. 9, the correlation peak detecting unit 22 includes: a 1-bit interval maximum peak position detecting unit 221 for receiving the correlation detected value from the matched filter unit 19 and detecting a maximum bit position in a 1-bit interval as a counter value; a maximum peak position comparing unit 222 for comparing the counter value at the detected maximum peak position with a counter value at a previous maximum peak position and outputting the comparison result; a symbol synchronizing signal generating unit 223 for outputting a symbol synchronizing signal (correlation peak detection signal: synchronizing detection signal) to the outside and the control unit 25 if the correlation peak is detected from the received comparison result, and outputting a symbol phase deviation detecting signal with respect to the symbol phase deviation to the fine frequency deviation detecting unit 24; and a free running counter 224 for outputting a free running counter value.
The correlation peak detecting unit 22 performs correlation peak detection according to the following sequence with respect to the correlation detected data from the matched filter unit 19.
First, the free running counter 224 is started up from the start of a detection processing.
The free running counter 224 is a counter of 4,096=12 bit in 256 kHz/1 bit-length=512 chip/bit.
Second, the 1-bit interval maximum peak position detecting unit 221 detects the maximum correlation value for every 1-bit interval from the start of the detection processing, and stores a counter value in a memory whenever the maximum value is updated.
Third, when the detection of the maximum value is completed in 2-bit intervals from the start of the detection processing, the maximum peak position comparing unit 222 compares counter values of the correlation maximum value in the 2-bit intervals for every interval, and outputs the comparison result to the symbol synchronizing signal generating unit 223.
The symbol synchronizing signal generating unit 223 determines that the comparison result is a correlation peak in high reliability when the deviation is in a predetermined range (about ±3 to 4 counts), and sends out the symbol synchronizing signal (correlation peak detecting signal).
Further, the symbol synchronizing signal is also output to the shift register 198 of the matched filter unit 19.
[Coarse Frequency Deviation Detecting Unit 23: FIG. 10]
Next, the coarse frequency deviation detecting unit 23 will be described with reference to FIG. 10. FIG. 10 shows a block diagram illustrating a configuration of the coarse frequency deviation detecting unit.
The coarse frequency deviation detecting unit 23 removes noises with an LPF (Low Pass Filter) with respect to the carrier modulated data to be down-sampled, accumulates the data by performing the FFT operation, detects the maximum peak position, and outputs coarse frequency deviation detected data.
As shown in FIG. 10, the coarse frequency deviation detecting unit 23 includes: a noise removing unit 231a for receiving I-component data modulated in carrier and removing noises using the FIR filter as the LPF; a noise removing unit 231b for receiving Q-component data modulated in carrier and removing noises using the FIR filter as the LPF; a down sampling unit 232a for down-sampling the I component without noises; a down sampling unit 232b for down-sampling the Q component without noises; an FFT operation processing unit 233 for performing the FFT operation with respect to the down-sampled I component and the down-sampled Q component; an operation result accumulation processing unit 234 for accumulating results of the FFT operation; and a maximum peak position detecting unit 235 for detecting the maximum peak position from the accumulated results.
In the down sampling units 232a and 232b, the data after removing noises is down-sampled with 32,768 Hz.
Residual frequency components according to the IF carrier frequency deviation amount between the base station and the portable equipment is detected with respect to the data after down-sampling.
The detection of the residual frequency components is performed by a 32-point FFT operation. Therefore, the accuracy of the detection frequency becomes 1,024 Hz.
In the present signal processing unit, the peak detection is performed after the several detection results are accumulated in order to increase the detection accuracy.
One period of operation is 32/32,768≈1 msec, and the accumulation is able to be made up to 32 periods.
When the 32 periods of accumulation are performed, the detection sensitivity increases up to about 15 dB in theory.
The detected coarse frequency deviation amount is supplied to the carrier data generating unit 16.
[Fine Frequency Deviation Detecting Unit 24: FIG. 11]
Next, the fine frequency deviation detecting unit 24 will be described with reference to FIG. 11. FIG. 11 shows a block diagram illustrating a configuration of the coarse frequency deviation detecting unit.
The fine frequency deviation detecting unit 24 detects a frequency in high accuracy in order to reduce the frequency deviation amount for the purpose of reduction in degradation of division loss (sensitivity degradation due to division) by the division correlation processing before decoding the data in the receiving data decoding unit 18.
As shown in FIG. 11, the fine frequency deviation detecting unit 24 includes an FFT operation processing unit 241 which receives the partial correlation processing and performs the FFT operation and a maximum peak position detecting unit 242 which detects the maximum peak position from the FFT operation results and outputs fine frequency deviation detected data.
The FFT operation processing unit 241 performs the same 32-point FFT operation as that of the FFT operation processing unit 233 of the coarse frequency deviation detecting unit 23. However, in this case, 32-divided correlation processing data when the correlation peak is detected is used for performing operation.
After correcting the coarse frequency deviation, residual deviation components of 512 Hz at maximum also remains in the carrier demodulated data. The residual deviation components appear in the 32-divided correlation detected data when the peak is detected.
For this reason, it is possible to detect frequencies of the residual deviation amount by performing the FFT operation with respect to the corresponding correlation data (32 division*I, Q component=64 points) when the peak is detected.
The detection accuracy at that time becomes 64 Hz, since a sampling period of one division amount is 16/32,768≈0.5 msec, Δf=1/0.5 msec*32=64 Hz.
The obtained fine frequency deviation value is supplied to the carrier data generating unit 16.
Further, the fine frequency deviation detecting unit 24 is able to be used together thanks to having the same 32-point FFT operation as that of the coarse frequency deviation detecting unit 23.
[Control Unit 25]
The control unit 25 receives the synchronous detection signal from the correlation peak detecting unit 22, performs a symbol synchronizing processing, and controls operation timing of the correlation peak detecting unit 22 and the coarse frequency deviation detecting unit 23 by an external input.
[Flow of Reception Processing]
Hereinafter, a flow of the reception processing will be described briefly.
First, in the start of reception processing, a carrier demodulating processing is performed by the carrier demodulating unit 15 through the ADC control unit 11.
Second, carrier demodulating processing data is supplied to the coarse frequency deviation detecting unit 23 and the matched filter unit 19; the coarse frequency deviation detecting unit 23 detects the coarse frequency deviation amount; at the same time, the matched filter unit 19 and the correlation peak detecting unit 22 perform a correlation processing and a correlation peak detecting processing, respectively.
Third, when the coarse frequency deviation is detected, the carrier data generating unit 16 and the carrier demodulating unit 15 correct the deviation amount, and perform again the correlation peak detecting processing.
Fourth, when detecting the correlation peak, the correlation peak detecting unit 22 supplies each detected value (32 division amount, I,Q components; 64 points in total) of the division correlation, which corresponds to the peak value, to the fine frequency deviation detecting unit 24, and detects the fine frequency deviation amount.
Fifth, the carrier data generating unit 16 and the carrier demodulating unit 15 correct again the IF carrier frequency from the detection result of the fine frequency deviation amount, and then the receiving data decoding unit 18 detects the synchronizing word and further decodes the receiving data.
The above-mentioned flow is an outline of the reception processing in the present signal processing unit.
[Demodulation Waveforms in the Present Signal Processing Unit: FIGS. 14 to 25]
Next, waveforms of the correlation detected data and waveforms of the carrier demodulated data of the I component and the Q component according to the IF carrier frequency deviation amount will be described with reference to FIGS. 14 to 25, where the matched filter unit 19 performs the division correlation, and the coarse frequency deviation detecting unit 23 and the fine frequency deviation detecting unit 24 correct the frequency. FIG. 14 shows a diagram illustrating waves of carrier demodulated data without an IF carrier frequency deviation amount. FIG. 15 shows a diagram illustrating waves of correlation detected data without the IF carrier frequency deviation amount. FIG. 16 shows a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=16 Hz. FIG. 17 shows a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=16 Hz. FIG. 18 shows a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=32 Hz. FIG. 19 shows a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=32 Hz. FIG. 20 shows a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=48 Hz. FIG. 21 shows a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=48 Hz. FIG. 22 shows a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=64 Hz. FIG. 23 shows a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=64 Hz. FIG. 24 shows a diagram illustrating waves of carrier demodulated data at IF carrier frequency deviation=512 Hz. FIG. 25 shows a diagram illustrating waves of correlation detected data at IF carrier frequency deviation=512 Hz.
First of all, in FIGS. 14, 16, 18, 20, 22, and 24, waveforms of the carrier demodulated data of the I component and waveforms of the carrier demodulated data of the Q component according to the IF carrier frequency deviation amount are shown.
Further, in FIGS. 15, 17, 19, 21, 23, and 25, waveforms of the correlation detected data which is performed with a non-division correlation processing in order to compare with the waveforms of the correlation detected data which is performed with the 32-divided correlation processing according to the IF carrier frequency deviation amount.
As shown in FIGS. 14 to 25, as the IF carrier frequency deviation amount increases, it is impossible to detect the correlation peak in the non-division correlation processing, and in particularly, if the IF carrier frequency deviation=64 Hz becomes 512 Hz, the correlation peak cannot be detected in the non-division correlation processing.
In this regard, even though the IF carrier frequency deviation is 512 Hz in the 32-divided correlation processing in the present signal processing unit, it is possible to detect the correlation peak.
With the division correlation processing of the present signal processing unit, it is possible to detect the frequency, and further the operation is able to be performed in a short time and the circuit scale is able to be reduced in size compared with the configuration of the non-division correlation processing.
However, by performing the division correlation processing, sensitivity degradation of about 4 dB in the peak detection occurs in the case of the 32 division. As can be seen from the waveforms of the demodulation processing in the receiving unit, a degradation cause is due to the addition of noises in an uncorrelated region of the division amount. In this case, the peak value is not changed, but the S/N (Signal/Noise) is degraded because the amount of noises is large. However, besides the cause of degradation, the significant reduction in time of the operation processing and the significant miniaturization of the operation processing circuit is effectively achieved.
Advantage of Embodiment
According to the present signal processing unit and the wireless communication device, a matched filter unit divides the carrier demodulated data into plural pieces which are subjected to a despread processing and an accumulating operation processing as a partial correlation processing, and then performs a full addition processing with respect to the results of the partial correlation processing to output correlation detected data; a correlation peak detecting unit detects a correlation peak from the correlation detected data to output position information of the correlation peak; a coarse frequency deviation detecting unit detects a frequency component according to a carrier frequency deviation amount with respect to the carrier demodulated data and outputs the frequency deviation amount to the carrier data generating unit; a fine frequency detecting unit outputs a fine frequency deviation amount to the carrier data generating unit, which makes a frequency deviation amount to be small from the correlation detected data when detecting the correlation peak. Therefore, using the partial correlation processing, there is an effect that frequency detection is able to be performed in a short time by the use of a small-scale operation circuit when performing correlation detection.
Further, according to the present signal processing unit and the wireless communication device, a dual-port RAM is used in a carrier demodulated data storing unit which stores the carrier demodulated data in the matched filter unit, and the pipeline processing is performed as a high-speed clock processing. Therefore, there is an effect that the frequency detection is able to be performed in a short time by the use of a small-scale operation circuit when performing the correlation detection.
The invention is suited to a signal processing unit and a wireless communication device, in which frequency detection is able be performed in a short time by the use of a small-scale operation circuit when performing correlation detection.

## Claims

1. A signal processing unit adapted for use in a wireless communication device, comprising:
a carrier data generating unit configured to correct a frequency according to a frequency deviation amount to be received as an input and to generate carrier data;
a carrier demodulating unit configured to demodulate a carrier of a received signal based on the carrier data and outputting carrier demodulated data;
a matched filter unit configured to calculate, for the carrier demodulated data, a plurality of division correlation values by dividing said carrier demodulated data and by further performing a despread processing and an accumulating operation processing as a partial correlation processing and to perform a full addition processing on the plurality of division correlation, to thereby output correlation detected data while outputting the plurality of division correlation values as a partial correlation detected value due to detection of a correlation peak;
a correlation peak detecting unit configured to detect a correlation peak from the correlation detected data and to output position information of the correlation peak;
a coarse frequency deviation detecting unit configured to perform a FFT (Fast Fourier Transform) operation on the carrier demodulated data and to detect a frequency component according to a carrier frequency deviation amount thereby outputting the frequency deviation amount to the carrier data generating unit;
a fine frequency deviation detecting unit configured to perform the FFT operation on the partial correlation value to thereby output a fine frequency deviation amount for reducing the frequency deviation amount, to the carrier data generating unit; and
a control unit configured to receive the position information of the correlation peak as an input and to adjust a processing clock as an operation timing in the correlation peak detecting unit and the coarse frequency deviation detecting unit.

2. The signal processing unit as claimed in claim 1, wherein the matched filter unit comprises:
a first carrier demodulated data storing unit that stores carrier demodulated data of an in-phase component;
a second carrier demodulated data storing unit that stores carrier demodulated data of an orthogonal component;
a spread code dividing unit that divides and outputs a spread code;
a first despread processing unit that despreads the carrier demodulated data outputted from the first carrier demodulated data storing unit by the divided spread code;
a second despread processing unit that despreads the carrier demodulated data outputted from the second carrier demodulated data storing unit by the divided spread code;
a first accumulation processing unit that performs an accumulating operation of an output from the first despread processing unit;
a second accumulation processing unit that performs an accumulating operation of an output from the second despread processing unit;
a partial correlation calculating processing unit that performs a partial correlation calculation of respective outputs from the first and second accumulation processing units;
a full addition processing unit that performs full addition of every output from the partial correlation calculating processing unit; and
a shift register that temporarily stores said every output from the partial correlation calculating processing unit and outputs the stored outputs as partial correlation values to the fine frequency deviation detecting unit due to a symbol synchronizing signal which is input from outside to indicate position information of the correlation peak.

3. The signal processing unit as claimed in claim 2, wherein the first and second carrier demodulated data storing units perform a pipeline processing through a high-speed clock processing while using a dual-port RAM.

4. The signal processing unit as claimed in claim 1, wherein the matched filter unit performs a 32-divided partial correlation processing,
the coarse frequency deviation detecting unit performs noise removing processing with respect to the carrier demodulated data thereby performing a 32-point FFT operation by down-sampling the carrier demodulated data, and
the fine frequency deviation detecting unit performs a 32-point FFT operation with respect to the 32-divided correlation value when the correlation peak is detected in the correlation peak detecting unit.

5. The signal processing unit as claimed in claim 2, wherein the matched filter unit performs a 32-divided partial correlation processing,
the coarse frequency deviation detecting unit performs noise removing processing with respect to the carrier demodulated data thereby performing a 32-point FFT operation by down-sampling the carrier demodulated data, and
the fine frequency deviation detecting unit performs a 32-point FFT operation with respect to the 32-divided correlation value when the correlation peak is detected in the correlation peak detecting unit.

6. The signal processing unit as claimed in claim 3, wherein the matched filter unit performs a 32-divided partial correlation processing,
the coarse frequency deviation detecting unit performs noise removing processing with respect to the carrier demodulated data thereby performing a 32-point FFT operation by down-sampling the carrier demodulated data, and
the fine frequency deviation detecting unit performs a 32-point FFT operation with respect to the 32-divided correlation value when the correlation peak is detected in the correlation peak detecting unit.

7. The signal processing unit as claimed in claim 4, wherein an operation circuit which performs the FFT operation in the coarse frequency deviation detecting unit is commonly used as an operation circuit which performs the FFT operation in the fine frequency deviation detecting unit.

8. The signal processing unit as claimed in claim 5, wherein an operation circuit which performs the FFT operation in the coarse frequency deviation detecting unit is commonly used as an operation circuit which performs the FFT operation in the fine frequency deviation detecting unit.

9. The signal processing unit as claimed in claim 6, wherein an operation circuit which performs the FFT operation in the coarse frequency deviation detecting unit is commonly used as an operation circuit which performs the FFT operation in the fine frequency deviation detecting unit.

10. A wireless communication device which is configured to comprise the signal processing unit as claimed in claim 1.

11. A wireless communication device which is configured to comprise the signal processing unit as claimed in claim 2.

12. A wireless communication device which is configured to comprise the signal processing unit as claimed in claim 3.

13. A wireless communication device which is configured to comprise the signal processing unit as claimed in claim 4.

14. A wireless communication device which is configured to comprise the signal processing unit as claimed in claim 7.