# Patent

## Title
Motor driving apparatus

## Abstract

A motor driving apparatus drives a motor by means of an AC/AC direct converter such as a matrix converter. The motor driving apparatus is provided with a current detecting section for detecting motor currents, a comparing section for detecting whether motor current detection values have exceeded a restriction level, an induction voltage calculating section for calculating induction voltages of the motor, a switching section, and a PWM pattern generating section. When the comparing section detects that the motor current detection values have exceeded the restriction level, the switching section supplies the induction voltages calculated by the induction voltage calculating section to the converter as output voltage instruction values.

## Background
BACKGROUND OF THE INVENTION AND RELATED ART STATEMENT
The present invention relates to a motor driving apparatus which drives a motor by converting polyphase AC voltages into ones having a desired magnitude and frequency by means of an AC/AC direct converter such as a matrix converter. In particular, the invention relates to a motor driving apparatus which enables continuous operation of a power converter while preventing its overheat or damage of a motor or the power converter by restricting the amplitude of the motor currents.
In power converters for driving a motor as typified by inverters and matrix converters, to prevent overheat or damage of the motor or the power converter, a protection device is provided which monitors the amplitude of the motor currents and stops operation of the power converter by turning off all semiconductor switching devices constituting the protection device when the motor currents have exceeded a limit level.
However, a sudden stop of operation of the power converter causes sharp variations in the voltages applied to the motor and may damage the motor or driving devices connected thereto. Furthermore, this kind of control is not suitable for use in the power converter that the continuous operation is desired.
JP-A-2004-180390 (paragraphs 0015-0018, FIG. 1, etc.) discloses a conventional technique as a countermeasure against the above problems in which a restriction level lower than the limit level is set. When the motor currents have exceeded the restriction level, the power converter is kept in operation while further increase in the motor currents is prevented.
FIG. 5 is a block diagram of an important part of a conventional apparatus disclosed in JP-A-2004-180390. In FIG. 5, reference numerals 102-104 denote a power source, a power converter, and a motor, respectively. Output voltage instruction calculating means 100 calculates output voltage instruction values for the power converter 103. On the basis of the output voltage instruction values, PWM pattern generating means 101 calculates PWM patterns according to which the semiconductor switching devices of the power converter 103 are turned on/off.
On the other hand, current restricting means 108 receives power source voltages detected by the power source voltage detecting means 105 and motor currents detected by motor current detecting means 106, and calculates and outputs PWM patterns to be used for generating output voltage vectors which are opposite in directions to current vectors calculated from the motor current detection values.
Reference numeral 107 denotes comparing means in which a restriction level lower than a motor current limit level is set. The comparing means 107 compares the motor current detection values with the restriction level.
If the motor currents have exceeded the restriction level, switching means 109 is switched to the current restricting means 108 side in accordance with the output of the comparing means 107, whereby PWM patterns for generating output voltage vectors that are opposite in directions to current vectors are supplied to the power converter 103 via the switching means 109.
With the above measure, the motor currents decrease and their amplitude can be made lower than or equal to the restriction level. As a result, overcurrent can be prevented from flowing through the motor 104 while the power converter 103 is kept in operation.
In connection with the conventional technique of the above-mentioned JP-A-2004-180390, Japanese Patent Application No. 2005-238593, which was filed earlier than this application and was not laid open as of the filing date of this application, discloses an invention in which to reduce output current ripples by lowering the calculation load, a power converter is caused to output zero voltages.
FIG. 6 is a block diagram of an important part of an apparatus according to the above earlier-filed invention. In FIG. 6, components having the same functions as corresponding components shown in FIG. 5 are given the same reference numerals.
The apparatus of FIG. 6 is different from that of FIG. 5 in that zero voltage generating means 110 is provided in place of the current restricting means 108. The zero voltage generating means 110 selects and outputs, on the basis of the power source voltages, PWM patterns such that all the output phase voltages are made identical.
In the above configuration, when the motor currents have become higher than the restriction level, PWM patterns are supplied from the zero voltage generating means 110 to the power converter 103 via the switching means 109. For example, the power converter 103 outputs a maximum phase voltage of the power source 102 for all the output phases. The line voltages become zero when the voltages of all the output phases are the same. Therefore, the motor currents decrease and their amplitude does not exceed the restriction level.
The conventional technique of JP-A-2004-180390 shown in FIG. 5 provides a great current reducing effect because voltage vectors which are opposite in directions to motor current vectors are output. However, large ripples appear in the output currents because the output voltages of the power converter 103 are changed sharply.
Where the power converter 103 is an AC/AC direct converter such as a matrix converter, the input currents are also distorted if ripples exist in the output currents because the power source 102 is directly connected to the motor 104 by bidirectional semiconductor switches. Ripples in the output currents are not preferable because they may cause a torque ripple or noise in the motor 104. And ripples in the input currents are not preferable either because they may cause erroneous operations or the like in other apparatus which are connected to the power source 102.
On the other hand, in the earlier-filed invention shown in FIG. 6, the motor currents may increase rather than decrease under such operation conditions that the energy is returned from the motor 104 to the power converter 103 (regeneration) as in the case of a braking operation.
The reason why the motor currents increase if the power converter 103 output zero voltages during a regenerative operation will be described below.
FIG. 7 is a one-output-phase circuit diagram of a matrix converter in a case that a synchronous motor as the motor 104 is driven by a matrix converter as the power converter 103 of FIG. 6. The motor current during a driving operation is given by the following Equation (1):




  
    
      
        
          i
          o
        
        =
        
          
            1
            
              
                R
                1
              
              +
              
                jω
                ⁢
                
                  
                
                ⁢
                
                  L
                  σ
                
              
            
          
          ⁢
          
            (
            
              
                v
                o
              
              -
              
                e
                m
              
            
            )
          
        
      
    
    
      
        (
        1
        )
      
    
  




where vo is an output voltage of the matrix converter, em is an induction voltage generated by the motor, R1 is a primary winding resistance of the motor, Lσ is a primary synchronous inductance, and ω is a primary angular frequency.

On the other hand, the motor current during a regenerative braking operation is given by the following Equation (2):




  
    
      
        
          i
          o
        
        =
        
          
            1
            
              
                R
                1
              
              +
              
                jω
                ⁢
                
                  
                
                ⁢
                
                  L
                  σ
                
              
            
          
          ⁢
          
            (
            
              
                e
                m
              
              -
              
                v
                o
              
            
            )
          
        
      
    
    
      
        (
        2
        )
      
    
  




It is seen that the signs of the output voltage vo and the induction voltage em in Equation (2) are opposite to those in Equation (1). In the configuration of FIG. 6, suddenly changing the output voltage of the matrix converter (power converter 103) to zero means that vo is made equal to “0” in Equation (1) (driving operation). The motor current io is thereby decreased. However, if vo is made equal to “0” in Equation (2) (regenerative braking operation), the value (em−vo) on the right side becomes larger than that before vo is made equal to “0” and hence the motor current io increases contrary to the intention. Referring to the circuit diagram of FIG. 7, when vo is made equal to “0”, short-circuiting is caused for the induction voltage em in the matrix converter and the current io is thereby increased.
A current restriction method of a voltage-type inverter having an energy buffer is known in JP-A-3-74175 (Japanese Patent No. 2,745,691). This document discloses a technique that when the magnitude of a current vector has become larger than a restriction value, a voltage vector that is closest in position to a vector that is opposite in direction to the current vector is selected and the voltage-type inverter is caused to output.
However, in direct converters such as matrix converters, the PWM pulse generation method is different from the method in inverters. Therefore, it is difficult to apply the above conventional technique to direct converters as it is.
An object of the present invention is therefore to provide a motor driving apparatus which drives a motor by means of an AC/AC direct converter such as a matrix converter and which does not cause ripples even in the event of sharp variations in the motor currents, can reduce the motor currents in each of a driving operation and a braking (regenerative braking) operation, and can keep safe operation of the direct converter.
Further objects and advantages of the invention will be apparent from the following description of the invention.
SUMMARY OF THE INVENTION
To attain the above object, the invention provides a motor driving apparatus in which a motor is driven by an AC/AC direct converter for directly converting polyphase AC voltages to polyphase AC voltages having a desired magnitude and frequency and the converter is operated by supplying first output voltage instruction values when motor currents are lower than or equal to a restriction level. The motor driving apparatus comprises current detecting means for detecting motor currents; comparing means for detecting whether motor current detection values have exceeded the restriction level; induction voltage calculating means for calculating induction voltages of the motor; and means for supplying the induction voltages calculated by the induction voltage calculating means to the converter as second output voltage instruction values instead of the first output voltage instruction values when the comparing means detects that the motor current detection values have exceeded the restriction level.
In the above motor driving apparatus, the induction voltage calculating means may calculate induction voltages using the first output voltage instruction values, the motor current detection values, and motor electric constants.
In the above motor driving apparatus, the induction voltage calculating means may calculate induction voltages using output voltage detection values of the converter, the motor current detection values, and motor electric constants.
In the invention, to restrict the amplitude of the motor currents, induction voltages of the motor are calculated and supplied to the power converter as second output voltage instruction values instead of the first output voltage instruction values for an ordinary operation. The output voltages of the power converter are thus made equal to the induction voltages.
As a result, the motor currents can be made lower than or equal to the restriction level irrespective of the motor operation state such as a driving state and a braking state. No sharp variations occur in the output voltages of the power converter and its operation can be continued safely.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of a first embodiment of the present invention;
FIG. 2 is a block diagram showing the configuration of induction voltage calculating means shown in FIG. 1;
FIG. 3 is a block diagram of a second embodiment of the invention;
FIG. 4 is a block diagram showing the configuration of induction voltage calculating means shown in FIG. 3;
FIG. 5 is a block diagram of an important part of a conventional apparatus;
FIG. 6 is a block diagram of an important part of an apparatus according to an earlier-filed invention; and
FIG. 7 is a one-output-phase circuit diagram in a case that a synchronous motor is driven by a matrix converter in the earlier-filed invention.



DETAILED DESCRIPTION OF THE EMBODIMENTS
Embodiments of the present invention will be hereinafter described with reference to the drawings.
FIG. 1 is a block diagram of a first embodiment of the invention. Components in FIG. 1 having the same functions as those shown in FIG. 5 or 6 are given the same reference numerals and will not be described below. That is, components having no corresponding components in FIG. 5 or 6 will mainly be described below.
In FIG. 1, reference numeral 1 denotes a matrix converter which is an AC/AC direct converter and is composed of plural bidirectional switches which connect the power source 102 and the motor 104 directly. For example, where the power source 102 is a three-phase AC power source and the motor 104 is a three-phase synchronous motor, nine bidirectional switches in total are connected between the three-phase input and output terminals. For example, each of these bidirectional switches is an inverted parallel connection of two semiconductor switching devices such as IGBTs having a high reverse breakdown voltage.
Reference numeral 2 denotes an induction voltage calculating means which calculates induction voltages generated by the motor 104. The induction voltage calculating means 2 receives motor current detection values coming from the motor current detecting means 106, power source voltage detection values coming from the power source voltage detecting means 105, and first output voltage instruction values (for an ordinary state in which the motor currents are equal to or lower than the restriction level) coming from the output voltage instruction calculating means 100. The induction voltages calculated by the induction voltage calculating means 2 are input to one set of switching terminals of the switching means 109 as second output voltage instruction values (for a state that the motor currents are higher than the restriction level and hence current restriction is necessary) for the matrix converter 1. The first output voltage instruction values which are output from the output voltage instruction calculating means 100 are input to the other set of switching terminals.
As in the cases of FIGS. 5 and 6, the switching means 109 switches between the sets of switching terminals in accordance with the output of the comparing means 107. If the comparing means 107 detects that the amplitude of the motor currents has exceeded the restriction level, the switching means 109 is switched to the induction voltage calculating means 2 side and induction voltages calculated by the means 2 are supplied, as output voltage instruction values, to the PWM pattern generating means 101 via the switching means 109.
The principle of the restriction of motor currents according to this embodiment will be described below.
It is seen from the above Equations (1) and (2) that if the relationship vo=em is established, the voltage drops generated by the primary windings of the motor become zero irrespective of whether the current operation is driving or braking and hence the motor currents can be reduced. That is, satisfactory results can be obtained by a control of making the output voltages of the matrix converter 1 equal to the induction voltages of the motor 104.
The configuration and workings of the induction voltage calculating means 2 will be described below with reference to FIG. 2. It is assumed that the motor 104 is a synchronous motor.
Let vu*, vv*, and vw* represent the three-phase output voltage instruction values which are supplied from the output voltage instruction calculating means 100 to the PWM pattern generating means 101. Coordinate converting means 21 shown in FIG. 2 converts the output voltage instruction values vu*, vv*, and vw* into orthogonal AC two-axis components vα* and vβ* according to the following Equation (3):




  
    
      
        
          [
          
            
              
                
                  v
                  α
                  *
                
              
            
            
              
                
                  
                
              
            
            
              
                
                  v
                  β
                  *
                
              
            
          
          ]
        
        =
        
          
            
              
                2
                3
              
            
            ⁡
            
              [
              
                
                  
                    1
                  
                  
                    
                      -
                      
                        1
                        2
                      
                    
                  
                  
                    
                      -
                      
                        1
                        2
                      
                    
                  
                
                
                  
                    0
                  
                  
                    
                      
                        3
                      
                      2
                    
                  
                  
                    
                      -
                      
                        
                          3
                        
                        2
                      
                    
                  
                
              
              ]
            
          
          ⁡
          
            [
            
              
                
                  
                    v
                    u
                    *
                  
                
              
              
                
                  
                    v
                    v
                    *
                  
                
              
              
                
                  
                    v
                    w
                    *
                  
                
              
            
            ]
          
        
      
    
    
      
        (
        3
        )
      
    
  




Likewise, the coordinate converting means 21 converts the three-phase motor current detection values iu, iv, and iw into orthogonal AC two-axis components iα and iβ according to the following Equation (4):




  
    
      
        
          [
          
            
              
                
                  i
                  α
                
              
            
            
              
                
                  
                
              
            
            
              
                
                  i
                  β
                
              
            
          
          ]
        
        =
        
          
            
              
                2
                3
              
            
            ⁡
            
              [
              
                
                  
                    1
                  
                  
                    
                      -
                      
                        1
                        2
                      
                    
                  
                  
                    
                      -
                      
                        1
                        2
                      
                    
                  
                
                
                  
                    0
                  
                  
                    
                      
                        3
                      
                      2
                    
                  
                  
                    
                      -
                      
                        
                          3
                        
                        2
                      
                    
                  
                
              
              ]
            
          
          ⁡
          
            [
            
              
                
                  
                    i
                    u
                  
                
              
              
                
                  
                    i
                    v
                  
                
              
              
                
                  
                    i
                    w
                  
                
              
            
            ]
          
        
      
    
    
      
        (
        4
        )
      
    
  




Furthermore, the coordinate converting means 21 converts the set of vα* and vβ* and the set of iα and iβ into the coordinates (of the d-q coordinate system) that rotate at the primary angular frequency ω according to the following Equations (5) and (6), respectively, where θ=∫ωdt may be obtained from the speed detection value detected by a speed sensor, the speed instruction value, or the speed estimation value.




  
    
      
        
          [
          
            
              
                
                  v
                  d
                  *
                
              
            
            
              
                
                  v
                  q
                  *
                
              
            
          
          ]
        
        =
        
          
            [
            
              
                
                  
                    
                      cos
                      ⁢
                      
                        
                      
                      ⁢
                      θ
                    
                    ⁢
                    
                      
                    
                  
                
                
                  
                    sin
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
              
              
                
                  
                    
                      -
                      sin
                    
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
                
                  
                    cos
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
              
            
            ]
          
          ⁡
          
            [
            
              
                
                  
                    v
                    α
                    *
                  
                
              
              
                
                  
                    v
                    β
                    *
                  
                
              
            
            ]
          
        
      
    
    
      
        (
        5
        )
      
    
  
  
    
      
        
          [
          
            
              
                
                  i
                  d
                
              
            
            
              
                
                  i
                  q
                
              
            
          
          ]
        
        =
        
          
            [
            
              
                
                  
                    cos
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
                
                  
                    sin
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
              
              
                
                  
                    
                      -
                      sin
                    
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
                
                  
                    cos
                    ⁢
                    
                      
                    
                    ⁢
                    θ
                  
                
              
            
            ]
          
          ⁡
          
            [
            
              
                
                  
                    i
                    α
                  
                
              
              
                
                  
                    i
                    β
                  
                
              
            
            ]
          
        
      
    
    
      
        (
        6
        )
      
    
  




Driving/braking judging means 22 calculates the instantaneous effective power p from vd*, vq*, id, and iq according to the following Equation (7):

p=vd*id+vq*iq  (7)

If p≧0, the driving/braking judging means 22 judges that the current operation is driving and outputs a driving judgment signal. If p<0, the driving/braking judging means 22 judges that the current operation is braking (regenerative braking) and outputs a braking judgment signal. In the synchronous motor, the positions of the stator and the rotor are the same and hence the d-axis component ed of the induction voltages is equal to zero. On the other hand, the q-axis component eq of the induction voltages is calculated according to the following Equations (8) which is based on the voltage equations of the motor. The motor parameters (motor electric constants) R1 and Lσ in Equations (8) may be either measurement values or estimated values.




  
    
      
        
          
            e
            q
          
          =
          
            
              
                v
                q
                *
              
              -
              
                ω
                ⁢
                
                  
                
                ⁢
                
                  L
                  
                    σ
                    ⁢
                    
                      
                    
                  
                
                ⁢
                
                  i
                  d
                
              
              -
              
                
                  R
                  1
                
                ⁢
                
                  i
                  q
                
              
              -
              
                ω
                ⁢
                
                  
                
                ⁢
                
                  L
                  σ
                
                ⁢
                
                  
                    d
                    
                      i
                      q
                    
                  
                  
                    d
                    t
                  
                
              
            
            ⁢
            
              
            
            ∵
            
              p
              ≥
              0
            
          
        
        ⁢
        
          

        
        ⁢
        
          
            e
            q
          
          =
          
            
              
                v
                q
                *
              
              -
              
                ω
                ⁢
                
                  
                
                ⁢
                
                  L
                  
                    σ
                    ⁢
                    
                      
                    
                  
                
                ⁢
                
                  i
                  d
                
              
              -
              
                
                  R
                  1
                
                ⁢
                
                  i
                  q
                
              
              -
              
                ω
                ⁢
                
                  
                
                ⁢
                
                  L
                  σ
                
                ⁢
                
                  
                    d
                    
                      i
                      q
                    
                  
                  
                    d
                    t
                  
                
              
            
            ⁢
            
              
            
            ∵
            
              p
              <
              0
            
          
        
      
    
    
      
        (
        8
        )
      
    
  




A coordinate converting means 24 converts the d-axis component ed(=0) and the q-axis component eq of the induction voltages which are instruction values obtained by a calculation block 23 corresponding to Equations (8) into the three-phase AC voltage components eu*, ev*, and ew*.
Unlike an inverter, the matrix converter obtains voltages by directly PWM-controlling the power source voltages. Therefore, to produce desired induction voltages, amplitude information of the power source voltages is necessary. Therefore, matrix converter voltage instruction calculating means 25 calculates the output voltage instruction values λu*, λv*, and λw* by correcting eu*, ev*, and ew* by dividing those by the magnitude |Vi| of the power source voltages according to the following Equation (9) and outputs λu*, λv*, and λw* to the switching means 109 as the second output voltage instruction values.




  
    
      
        
          [
          
            
              
                
                  λ
                  u
                  *
                
              
            
            
              
                
                  λ
                  v
                  *
                
              
            
            
              
                
                  λ
                  w
                  *
                
              
            
          
          ]
        
        =
        
          
            [
            
              
                
                  
                    e
                    u
                    *
                  
                
              
              
                
                  
                    e
                    v
                    *
                  
                
              
              
                
                  
                    e
                    w
                    *
                  
                
              
            
            ]
          
          ⁢
          
            1
            
              
              
                V
                i
              
              
            
          
        
      
    
    
      
        (
        9
        )
      
    
  




where

|Vi|=√{square root over (viα2+viβ2)}

and viα and viβ are the AC two-axis components of the power source voltages.

Various methods are available as a method for thereafter calculating on/off periods of the semiconductor switching devices of the matrix converter 1, but it will not be described because it is not an essential part of the invention.
When the motor currents have exceeded the restriction level, the switching means 109 shown in FIG. 1 selects the second output voltage instruction values (see Equation (9)) in accordance with the output of the comparing means 107 and outputs those to the PWM pattern generating means 101. When the motor currents have decreased to become lower than the restriction level, the switching means 109 again selects the first output voltage instruction values (for an ordinary state) coming from the output voltage instruction calculating means 100 and gives those to the PWM pattern generating means 101 to drive in an ordinary operation.
As described above, according to this embodiment, when the motor currents have exceeded the restriction level, the motor currents are restricted by switching the output voltage instruction values to the values that are equal to the induction voltages of the motor instead of changing the PWM patterns themselves. This makes it possible to prevent increase of ripples in the output currents which would otherwise occur due to sharp variations of the pulse patterns, and to thereby reduce ripples in the input currents,
The above-described induction voltage calculation method according to the first embodiment, that is, the configuration shown in FIG. 2, is just an example. Calculations may be performed with the variables kept in AC component form (i.e., no coordinate conversion is done). And an induction voltage observer may be employed to estimate induction voltages according to a motor model. In addition, the motor 104 of this embodiment is not limited to a synchronous motor and may be an induction motor if Equations (8) are modified according to the voltage equations of the motor.
FIG. 3 is a block diagram of a second embodiment of the invention. This embodiment is different from the first embodiment in that the output voltage detection values of the matrix converter 1 are used for calculating induction voltages.
That is, output voltage detecting means 3 is added to the configuration of FIG. 1, and voltage detection values of the output voltage detecting means 3 are input to induction voltage calculating means 2A and used to calculate induction voltages.
In the first embodiment, if the induction voltages include calculation errors, the output voltage instruction values do not coincide with the true induction voltages while the motor currents are restricted and the relationship vo=em is not established in Equation (1) or (2), whereby the motor current restriction effect is lowered. The induction voltage calculation error includes various errors such as errors in the motor parameters and an error due to calculation delay, and its dominant parts are commutation errors of the semiconductor switching devices (i.e., voltage errors caused by the fact that halt periods are provided in switching patterns to prevent both of power source short-circuiting and load end opening in the matrix converter) and an output voltage error due to on-voltage drops across the semiconductor switching devices.
In view of the above, in the second embodiment, output voltages that are actually applied to the motor 104 by the matrix converter 1 are detected and induction voltages are calculated by using the voltage detection values so that the calculation errors are reduced and the relationship vo=em is always established in Equation (1) or (2) and that the motor current restriction effect is thereby enhanced.
FIG. 4 is a block diagram of the induction voltage calculating means 2A shown in FIG. 3. As shown in FIG. 4, voltage detection values detected by the output voltage detecting means 3 shown in FIG. 3 are input to coordinate converting means 21A, which calculates the two-axis components vd and vq of the rotary coordinate system through coordinate conversion in the same manner as in the first embodiment. That is, the two-axis components vα and vβ are calculated by using the voltage detection values vu, vv, and vw, instead of vu*, vv*, and vw* which are used in Equation (3). And the two-axis components vd and vq are calculated by using vα and vβ instead of vα* and vβ* which are used in Equation (5).
Then, the q-axis component eq of the induction voltages is calculated by the calculation block 23 by using vq instead of vq* which is used in Equations (8). And the thus-calculated q-axis component eq and the d-axis-component ed (instruction values), instead of eq* and ed* (=0), are converted into the three-phase AC voltage components eu*, ev*, and ew* by the coordinate converting means 24. The subsequent calculations will not be described because they are the same as shown in FIG. 2.
According to this embodiment, since the induction voltages calculated by using actual output voltages of the matrix converter 1 are output as output voltage instruction values for a current restricting operation, the induction voltage calculation errors are reduced and the relationship vo=em can always be established in Equation (1) or (2). As a result, the motor currents are restricted reliably and the power converter can be operated continuously.
In each of the above embodiments, the switching means 109 is provided between the induction voltage calculating means 2 or 2A and the PWM pattern generating means 101. However, an alternative configuration is possible in which PWM patterns are generated in advance on the basis of calculated induction voltages and stored in storage means, switching means is provided between the PWM pattern generating means 101 and the matrix converter 1, and PWM patterns for an ordinary operation which are supplied from the PWM pattern generating means 101 or the PWM patterns for a current restricting operation which are stored in the storage means are selected by the switching means and supplied to the matrix converter 1.
The disclosure of Japanese Patent Application No. 2005-266405 filed Sep. 14, 2005 is incorporated as a reference.
While the invention has been explained with reference to the specific embodiments of the invention, the explanation is illustrative and the invention is limited only by the appended claims.

## Claims

1. A motor driving apparatus for driving a motor by AC/AC direct converter for directly converting polyphase AC voltages to polyphase AC voltages having a desired magnitude and frequency, said motor driving apparatus comprising:
current detecting means for detecting motor currents;
comparing means for detecting whether detection values of the motor currents have exceeded a restriction level;
induction voltage calculating means for calculating induction voltages of the motor; and
means for supplying the induction voltages calculated by the induction voltage calculating means to the converter as second output voltage instruction values instead of first output voltage instruction values when the comparing means detects that the detection values of the motor currents have exceeded the restriction level.

2. A motor driving apparatus according to claim 1, wherein said motor driving apparatus supplies the first output voltage instruction values to the converter when the motor currents are lower than or equal to the restriction level.

3. A motor driving apparatus according to claim 1, wherein the induction voltage calculating means calculates induction voltages using the first output voltage instruction values, the motor current detection values, and motor electric constants.

4. A motor driving apparatus according to claim 1, wherein the induction voltage calculating means calculates induction voltages using output voltage detection values of the converter, the motor current detection values, and motor electric constants.

5. A motor driving apparatus according to claim 1, further comprising power source voltage detecting means for detecting voltages supplied to the converter, and output voltage instruction calculating means for calculating voltages of the converter to be operated, said induction voltage calculating means being connected to the power source voltage detecting means, the output voltage instruction calculating means and the motor current detecting means.

6. A motor driving apparatus according to claim 5, further comprising output voltage detecting means for detecting voltages between the converter and the motor, said output voltage detecting means being connected to the induction voltage calculating means.