Exhibit 4.20

 

ANNEX 1

 

RDA TECHNOLOGIES LIMITED

 

PIPD TECHNOLOGY — COMPILERS — FOR TSCM 40NM PROCESS

 

	
TLA Number
    	
LEC-TLA-547
    
	
Legal Counsel 
    	
AF
    
	
Annex Effective   Date
    	
9 February 2012
    


 

This Annex 1, when signed by both parties, shall form part of and be incorporated into the Technology Licence Agreement (“TLA”) between the parties (document reference as identified in the table above). Solely for the purposes of interpretation of the TLA with respect to this Annex 1, to the extent that the provisions contained in this Annex 1 conflict with any of the provisions of the TLA the provisions contained in this Annex 1 shall prevail over and shall supersede the conflicting provisions in the TLA.

 

1











 

SECTION 1 - ARM TECHNOLOGY 

 

	
***
    	
High Den SP SRAM RVt-SUL
    	
***
    


 

PART A - Documentation

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Release   Note
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
User   Guide
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 1
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 2
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   and EDA Validation Documents
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART B - Compiler

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Compiler
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   Tag Set-up
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART C - Generators

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Datasheet   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Datatable   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   RTL Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Liberty   NLM Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
TetraMAX   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working 
    


 

2











 

	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
days   of Annex Effective Date
    
	
***
    	
 
    	
CTL   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LVS   Netlist View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LEF   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Tessent   BIST View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART D - Physicals

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
GDSII   Layout Database
    	
 
    	
D,M
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LVS   Netlist Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PARTS E , F

 

Not Applicable

 

PART G - PVT Corner Dependent Views

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Liberty   NLM Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

	
Process Corner
    	
 
    	
Voltage
    	
 
    	
Temperature
    
	
TT
    	
 
    	
1,100V
    	
 
    	
25Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
-40Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
-40Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
125Â°C
    
	
FFG
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
0Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
0Â°C
    


 

3











 

	
***
    	
High Den 1 Port RF RVt-SUL
    	
***
    


 

PART A - Documentation

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Release   Note
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
User   Guide
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 1
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 2
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   and EDA Validation Documents
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART B - Compiler

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Compiler
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   Tag Set-up
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART C - Generators

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Datasheet   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Datatable   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   RTL Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Liberty   NLM Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
TetraMAX   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
CTL   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex 
    


 

4











 

	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
Effective   Date
    
	
***
    	
 
    	
LVS   Netlist View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LEF   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Tessent   BIST View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART D - Physicals

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
GDSII   Layout Database
    	
 
    	
D,M
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LVS   Netlist Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PARTS E , F

 

Not Applicable

 

PART G - PVT Corner Dependent Views

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Liberty   NLM Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

	
Process Corner
    	
 
    	
Voltage
    	
 
    	
Temperature
    
	
TT
    	
 
    	
1,100V
    	
 
    	
25Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
-40Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
-40Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
125Â°C
    
	
FFG
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
0Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
0Â°C
    


 

5












 

	
***
    	
High Den 2 Port RF RVt-SUL
    	
***
    


 

PART A - Documentation

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Release   Note
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
User   Guide
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 1
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 2
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   and EDA Validation Documents
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART B - Compiler

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Compiler
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   Tag Set-up
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART C - Generators

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Datasheet   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Datatable   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   RTL Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Liberty   NLM Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
TetraMAX   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
CTL   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex
    


 

6











 

	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
Effective   Date
    
	
***
    	
 
    	
LVS   Netlist View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LEF   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Tessent   BIST View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART D - Physicals

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
GDSII   Layout Database
    	
 
    	
D,M
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LVS   Netlist Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PARTS E , F

 

Not Applicable

 

PART G - PVT Corner Dependent Views

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Liberty   NLM Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

	
Process Corner
    	
 
    	
Voltage
    	
 
    	
Temperature
    
	
TT
    	
 
    	
1,100V
    	
 
    	
25Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
-40Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
-40Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
125Â°C
    
	
FFG
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
0Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
0Â°C
    



 

7













 

	
***
    	
High Den DP SRAM RVt-SUL
    	
***
    


 

PART A - Documentation

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Release   Note
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
User   Guide
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 1
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 2
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   and EDA Validation Documents
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART B - Compiler

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Compiler
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   Tag Set-up
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART C - Generators

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Datasheet   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Datatable   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   RTL Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Liberty   NLM Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
TetraMAX   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
CTL   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex
    


 

8











 

	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
Effective   Date
    
	
***
    	
 
    	
LVS   Netlist View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LEF   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Tessent   BIST View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART D - Physicals

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
GDSII   Layout Database
    	
 
    	
D,M
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LVS   Netlist Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PARTS E , F

 

Not Applicable

 

PART G - PVT Corner Dependent Views

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Liberty   NLM Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

	
Process Corner
    	
 
    	
Voltage
    	
 
    	
Temperature
    
	
TT
    	
 
    	
1,100V
    	
 
    	
25Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
-40Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
-40Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
125Â°C
    
	
FFG
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
0Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
0Â°C
    


 

9











 

	
***
    	
High Den Via Prog ROM RVt-SUL
    	
***
    


 

PART A - Documentation

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Release   Note
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
User   Guide
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 1
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
App   Note 2
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   and EDA Validation Documents
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART B - Compiler

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Compiler
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Process   Tag Set-up
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART C - Generators

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Datasheet   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Datatable   Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Verilog   RTL Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Liberty   NLM Model Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
TetraMAX   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
CTL   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex
    


 

10











 

	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
Effective   Date
    
	
***
    	
 
    	
LVS   Netlist View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LEF   View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
Tessent   BIST View Generator
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PART D - Physicals

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
GDSII   Layout Database
    	
 
    	
D,M
    	
 
    	
Within   ten working days of Annex Effective Date
    
	
***
    	
 
    	
LVS   Netlist Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

PARTS E , F

 

Not Applicable

 

PART G - PVT Corner Dependent Views

 

	
Part Number
    	
 
    	
Description
    	
 
    	
Disclosure Rights
    	
 
    	
Delivery Date
    
	
***
    	
 
    	
Liberty   NLM Database
    	
 
    	
D
    	
 
    	
Within   ten working days of Annex Effective Date
    


 

	
Process Corner
    	
 
    	
Voltage
    	
 
    	
Temperature
    
	
TT
    	
 
    	
1,100V
    	
 
    	
25Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
-40Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
-40Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
125Â°C
    
	
FFG
    	
 
    	
1,210V
    	
 
    	
125Â°C
    
	
FF
    	
 
    	
1,210V
    	
 
    	
0Â°C
    
	
SS
    	
 
    	
0,990V
    	
 
    	
0Â°C
    


 

11












 

SECTION 2 - LICENSE AND SPECIAL CONDITIONS

 

A.                                   Definitions

 

A.1                             “ARM Compliant Product” means an integrated circuit incorporating any of the ARM Physical IP Products.

 

A.2                            “Compiler” means the compiler identified in Section 1 Parts B of this Annex 1.

 

A.3                            “Documentation” means the documentation identified in Section 1 Parts A of this Annex 1.

 

A.4                            “Design Start” means the earlier of any of the following; (i) the date that LICENSEE first synthesises the Synthesisable RTL for an ARM Compliant Product; (ii) the date that LICENSEE enters into a contract with a third party for the design of an ARM Compliant Product; or (iii) the date that LICENSEE delivers any ARM Technology or derivatives thereof, to a Customer pursuant to the licenses granted in this Annex 1.

 

A.5                            “Download” means the removal or copying of any or all of the relevant ARM Technology in respect of each ARM Compliant Product from the secure area on www.connect.arm.com.

 

A.6                             “Enablement Kits” means the kits identified in Section 1 Parts E of this Annex 1.

 

A.7                             “Generators” means the generators identified in Section 1 Parts C of this Annex 1.

 

A.8                             “Manufacturer” means either or both; (i) Taiwan Semiconductor Manufacturing Co., Ltd. whose principal place of No. 25, Li-Hsin Rd. VI, Hsinchu Science Park, Hsinchu, Taiwan 300, Republic of China; and (ii)  any manufacturing facilities owned or controlled directly or indirectly by the company identified in A.6(i)

 

A.9                             “Manufacturer Competitor” means the entities identified in Section 10 of this Annex 1 as updated by ARM from time to time.

 

A.10                     “Memory Instances” means the output files generated by LICENSEE using the Compiler and Generators as described in the relevant Documentation.

 

A.11                     “Part Number” means the unique part number used by LICENSEE and the Manufacturer for ordering and tracking  each ARM Compliant Product through the Manufacturer’s manufacturing and delivery process and which includes, if applicable, any prefixes or suffixes that indicate the current revision or version of a particular ARM Compliant Product.

 

A.12                     “Physicals” means the deliverables identified in Section 1 Parts D of this Annex 1.

 

A.13                     “Physical IP Products” means each ARM product as described in the relevant Documentation.

 

A.14                     “Product Views” means the PVT Dependent Views and the PVT Independent Views.

 

A.15                     “PVT Corner Dependent Views” means the views identified in Section 1 Parts G of this Annex.

 

A.16                     “PVT Corner Independent Views” means the views identified in Section 1 Parts F of this Annex.

 

A.17                      Intentionally blank.

 

12











 

A.18                      “Unique ARM Compliant Product” means:

 

(i)                                     an unlimited number of units of a single design for a ARM Compliant Product which has been taped out and given a unique part number; and

 

(ii)                                  an unlimited number of units of any derivatives of the ARM Compliant Product referred to in Clause A.18(i), provided that such derivatives result only from any or all of the following modifications; (a) the implementation by LICENSEE of any Update delivered by ARM to some or all of the ARM Technology; and (b) the correction of errors in such ARM Compliant Product to achieve conformance with the Documentation for such ARM Compliant Product.

 

B.                                   Licence

 

B.1                            Subject to the provisions of Clause 3 (Confidentiality) of the TLA and the provisions of this Section 2, ARM hereby grants, to LICENSEE, a non-transferable (subject to Clause 16.3 of the TLA), non-exclusive, world-wide licence for the Term to;

 

Documentation

 

(i)                  use and copy the Documentation only for the purposes of designing and having designed (subject to the provisions of Clause 2.2 of the TLA) ARM Compliant Products;

 

ARM Technology

 

(ii)          use and copy the Compiler and Generators only for the purpose of designing Memory Instances;

 

(iii)       use and copy the Physicals and Enablement Kits and Product Views only for the purposes of designing and having designed (subject to the provisions of Clause 2.2 of the TLA) ARM Compliant Products;

 

(iv)      use and copy the Memory Instances solely to design and having designed (subject to the provisions of Clause 2.2 of the TLA and Clause C.1 of this Annex 1) ARM Compliant Products;

 

(v)             have manufactured (subject to the provisions of Clause 2.4 of the TLA) solely by the Manufacturer the Unique ARM Compliant Products created under the licences granted in Clauses B.1(iii) and B.1(iv);

 

(vi)          package and have packaged (subject to the provisions of Clause 2.6 of the TLA), the Unique ARM Compliant Products manufactured under the licence granted in Clauses B.1(v); and

 

(vii)       sell, supply and distribute the Unique ARM Compliant Products manufactured under the licence granted in Clause B.1(v).

 

C.                                   Special Conditions

 

Manufacturing Competitors

 

C.1                             Notwithstanding the provisions of Clauses 2.2 and 3.3 of the TLA, LICENSEE shall not be entitled to exercise the right to have designed ARM Compliant Products, or to disclose the ARM Technology or the Memory Instances to Designers who are Manufacturer Competitors.

 

Licence Restrictions

 

C.2                             LICENSEE shall ensure that the tags intended to indicate the presence of the ARM Technology will not be removed in the layout database of each ARM Compliant Product, and further agrees that it shall not alter, modify or obscure the tagging information.  LICENSEE shall notify the Manufacturer at the time of delivery of the ARM Compliant Products to the Manufacturer that the ARM Technology has been used in the ARM Compliant Product.  LICENSEE acknowledges that; (i) its receipt of the ARM Technology does not guarantee a business relationship with the Manufacturer; (ii) a separate agreement between the Manufacturer and LICENSEE may be required to cover foundry services; and (iii) it has entered, or shall enter into any such agreement with the Manufacturer based upon its own judgment and expressly disclaims that any such agreement has been or will be entered into based upon any reliance placed upon statements made by ARM to LICENSEE.  LICENSEE may not reverse engineer (except to the extent any prohibition on reverse engineering is not allowed in the jurisdiction in which LICENSEE is located) any of the ARM Technology.

 

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Permitted Disclosure by Manufacturer

 

C.3                             LICENSEE acknowledges that, pursuant to the Manufacturer’s contractual obligations with ARM, the Manufacturer will provide ARM with Part Number and wafer information relating to each ARM Compliant Product.  LICENSEE hereby expressly provides ARM with the authority to request that the Manufacturer discloses, with respect to each ARM Compliant Product, the information contained in the Usage Report to ARM, and LICENSE hereby agrees to waive any confidentiality obligations that the Manufacturer may have with the LICENSEE with respect to such information.

 

Confidentiality

 

C.4                             LICENSEE hereby agrees that the Memory Instances and any translation, modification, compilation, abridgement or other form in which the Memory Instances have been recast, transformed or adapted by LICENSEE in accordance with the licences granted in this Annex 1 are deemed ARM’s Confidential Information and shall be maintained in confidence in accordance with the provisions of Clause 3 of the TLA.

 

Permitted Disclosure to Designers

 

C.5                             In addition to the disclosure rights granted in Clause 3.3 of the TLA, LICENSEE may disclose the Memory Instances to a Designer pursuant to the exercise of the have designed rights granted in Section 2 of the this Annex 1 solely for the purposes of having ARM Compliant Products designed for LICENSEE by such third party and under a non-disclosure agreement containing substantially similar terms to this Clause 3, including the confidentiality period for each deliverable determined in accordance with the provisions of Clause 3.1.

 

D.            IP access model Provisions

 

Number of Unique ARM Compliant Products

 

D.1                             Under this Annex 1, LICENSEE shall have the right to exercise the licenses granted under Clause B.1 of this Annex 1 for an unlimited number of Unique ARM Compliant Products, provided that for each such Unique ARM Compliant Product LICENSEE pays to ARM the respective Use Fee as set out in, and in accordance with the provisions of Section 8 of this Annex 1.

 

Audit

 

D.2                            In addition to the audit requirements in Clause 6.6 of the TLA, the Auditors shall be entitled to review; (i) the ARM Technology which has been Downloaded by LICENSEE; (ii) Design Starts for any Unique ARM Compliant Products; and (iii) any information necessary to substantiate and verify the data submitted to ARM by LICENSEE in any Usage Report provided in accordance with Section 8. LICENSEE’s books and records relevant to verification of the information which LICENSEE is obliged to report pursuant to this Clause, shall be retained by LICENSEE for at least six (6) years after the end of the period to which the Download, Design Start or Usage Report relates.

 

E. LIMITATION OF LIABILITY

 

E.1         For the purposes of this Annex 1, delete Clause 13.2 of the TLA and replace with the following:

 

“13.2     NOTWITHSTANDING ANYTHING TO THE CONTRARY CONTAINED IN THIS TLA, THE MAXIMUM LIABILITY OF ARM TO LICENSEE IN AGGREGATE FOR ALL CLAIMS MADE AGAINST ARM IN CONTRACT TORT OR OTHERWISE UNDER OR IN CONNECTION WITH EACH ARM DELIVERABLE (AS DEFINED BELOW) LICENSED UNDER AN ANNEX 1 SHALL NOT EXCEED THE USE FEES PAID TO ARM IN RESPECT OF THAT ARM DELIVERABLE. THE EXISTENCE OF MORE THAN ONE CLAIM OR SUIT WILL NOT ENLARGE OR EXTEND THE LIMIT. LICENSEE RELEASES ARM FROM ALL OBLIGATIONS, LIABILITY, CLAIMS OR DEMANDS IN EXCESS OF THIS LIMITATION”

 

“ARM Deliverable” means an individual product being part of the ARM Technology delivered under an Annex 1 where such product has an associated Use Fee in Section 8 of the relevant Annex 1.

 

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SECTION 3 - VERIFICATION

 

Not applicable.

 

SECTION 4 - SUPPORT LIMITATION

 

4.1                               Except as provided below, the maximum number of man hours that ARM shall be obligated to expend on any individual support case submitted to ARM by LICENSEE shall be capped at sixteen (16).

 

4.2                               If ARM reasonably believes that any individual support case will exceed the support cap referred to above, ARM and LICENSEE will mutually agree a plan of action for resolution of the support case.

 

4.3                               If a support case results in a defect being identified, any time associated with correcting such defect will not be logged against such support case.

 

4.4                               If ARM, at ARM’s discretion, determines that LICENSEE has entered multiple cases which relate to the same support problem, ARM shall be entitled to compile these into a single case which in aggregate will be subject to the cap referred to above.

 

4.5                               If ARM agrees to provide support at LICENSEE’s premises in accordance with the provisions of Clause 7.3 of the TLA, any time spent at LICENSEE’s premises including travel shall not be included as part of the support cap.

 

SECTION 5 - TRAINING REQUIREMENT

 

Not applicable.

 

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SECTION 6 - TRADEMARKS

 

	
Trademark
    	
 
    	
Registered/ Unregistered
    
	
 
    	
 
    	
 
    
	
Part A
    	
 
    	
 
    
	
 
    	
 
    	
 
    
	
Not   applicable.
    	
 
    	
 
    
	
 
    	
 
    	
 
    
	
Part B
    	
 
    	
 
    
	
 
    	
 
    	
 
    
	
Not   applicable
    	
 
    	
 
    
	
 
    	
 
    	
 
    
	
Part C
    	
 
    	
 
    
	
 
    	
 
    	
 
    
	
ARM [logo]   Exhibit C
    	
 
    	
Registered
    
	
 
    	
 
    	
 
    
	
Part D
    	
 
    	
 
    
	
 
    	
 
    	
 
    
	
ARM Connect Community Partner [logo]   Exhibit D
    	
 
    	
Unregistered
    


 

SECTION 7 - TERM

 

Unless terminated earlier in accordance with the provisions of Clause 14 of the TLA, this Annex 1 shall continue in force for a period of three (3) years.

 

Upon expiration of this Annex 1, LICENSEE shall notify ARM of the details of all ARM Compliant Products that are in manufacture at the date of expiration and which LICENSEE intends to continue to have manufactured.

 

16












 

SECTION 8 - FEES AND ROYALTIES

 

FEES

 

“Product Annexes”, “Pre-Paid Licence Fees” and “Access Fees” shall have the meanings as defined in the MP Core annex (document number LES-ANX-20356)

 

Use Fees

 

Subject to the provisions of this Section 8, for each Unique ARM Compliant Product developed under this Annex 1, LICENSEE shall pay to ARM the relevant Use Fees set out below:

 

	
ARM Technology
    	
 
    	
Use Fee (US$)
    
	
Each   Unique ARM Compliant Product High Density Single-port SRAM Compiler
    	
 
    	
See Use Fee Table as set out in   Section 8 of the MP Core annex document LES-ANX-20356
    
	
Each   Unique ARM Compliant Product High Density Single-port RF Compiler
    	
 
    	
See Use Fee Table as set out in   Section 8 of the MP Core annex document LES-ANX-20356
    
	
Each   Unique ARM Compliant Product High Density Two Port register File Complier
    	
 
    	
See Use Fee Table as set out in   Section 8 of the MP Core annex document LES-ANX-20356
    
	
Each   Unique ARM Compliant Product High Density Dual Port SRAM Compiler
    	
 
    	
See Use Fee Table as set out in   Section 8 of the MP Core annex document LES-ANX-20356
    
	
Each   Unique ARM Compliant Product High Density Via Programmable ROM   Compiler
    	
 
    	
See Use Fee Table as set out in   Section 8 of the MP Core annex document LES-ANX-20356
    


 

The Use Fee payable to ARM by LICENSEE shall be due to ARM as follows:-

 

(i)                                    Upon first Download of the ARM Technology; and

(ii)                                 Upon Design Start of the second and each subsequent Unique ARM Compliant Product incorporating such ARM Technology.

 

All Use Fees shall be due at the end of the Quarter in which the Download or Design Start has occurred as applicable. Notwithstanding the foregoing, LICENSEE shall not be obligated to pay the whole or any part of any Use Fees, to ARM under the Product Annexes, until such time as the aggregate Use Fees  which LICENSEE is obligated to pay to ARM under the Product Annexes has exceeded the amount of the Pre-Paid License Fee that has become due to ARM.

 

Where any Pre-Paid Licence Fees have not become due, invoices raised by ARM for amounts that exceed the amount of the Pre-Paid Licence Fee that has become due to ARM will be set off against any subsequent milestone payments for the Pre-Paid Licence Fee that have not yet become due to ARM.

 

Access to ARM Technology in the Product Annexes

 

For the avoidance of doubt, LICENSEE will not be able to Download any ARM technology licensed under the Product Annexes during any year of Term unless LICENSEE has paid the Access Fees for the relevant period.

 

Entitlement to Support and Maintenance Services.

 

In respect of each of the ARM Technology licenced under the Product Annexes, in addition to paying the Access Fee for the relevant period, LICENSEE must pay the Support and Maintenance Fees for the relevant period to be entitled to request Support and Maintenance Services in respect of such ARM Technology licensed under the Product Annexes.

 

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Usage Report for IP Access Model

 

Within thirty (30) days of the end of each Quarter, LICENSEE shall submit a report to ARM substantially in the format set out below:

 

	
ARM
    Technology
    	
 
    	
Date of
   Download
    	
 
    	
Date of
   Design Start
    	
 
    	
Part
   Number of
   Unique
   ARM
   Compliant
   Product
    	
 
    	
Use Fee
    	
 
    	
Support and
   Maintenance
   Fee
    	
 
    	
Fees Due
    
	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    
	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    
	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    


 

USAGE REPORTS

 

8.1                               For the purposes of this Annex 1 the provisions of Clause 6.3 of the TLA shall be replaced with the following:

 

“Usage Report

 

6.3                               LICENSEE shall submit to ARM a report (each a “Usage Report”) within thirty (30) days after the end of every Quarter. Each Usage Report shall contain the following information relating to each ARM Compliant Product and which shall be substantially in the form set out below;

 

	
Part Number
    	
 
    	
Internal
   Project
   Name
    	
 
    	
Foundry and
   Process
    	
 
    	
ARM Technology
    	
 
    	
Project
   Status
    	
 
    	
Production
   Status
    	
 
    	
Tape Out
   Type
    	
 
    	
Last Tape
   Out Date
    	
 
    	
Wafer
   Quantity
    
	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    
	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    
	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    	
 
    


 

Each Usage report shall be submitted online at http://designstart.arm.com by a company designated Reporter.  Upon contract execution by both parties, have the Reporter contact PIPD-DS-Licensing@arm.com for DesignStart registration and online usage reporting instructions.

 

8.2          For the purposes of this Annex 1 the provisions of Clause 6.6 of the TLA shall be replaced with the following:

 

“Audit Rights

 

6.6                               Subject to the provision of at least (30) days prior written notice, ARM or its agent shall have the right to conduct up to one (1) audit in any twelve (12) month period of LICENSEE’s relevant books and records to verify the information which LICENSEE is obliged to report pursuant to Clause 6.3 of the TLA.  Audits performed under this Clause 6.6 shall be conducted; (i) during normal business hours; and (ii) at ARM’s sole expense.  LICENSEE’s books and records relevant to verification of the information which LICENSEE is obliged to report pursuant to Clause 6.3 of the TLA, shall be retained by LICENSEE for at least six (6) years after the end of the period to which the Usage Report relates.”

 

ROYALTIES

 

Not applicable.

 

18











 

SECTION 9 — MARKETING

 

Notwithstanding anything to the contrary contained in the TLA either party may disclose to third parties that LICENSEE is a licensee of the ARM Technology licensed under this Annex 1. Except as expressly provided in the TLA, no right is granted to either party to disclose the terms and conditions of the TLA or this Annex 1.

 

Within sixty days (60) days of the Annex Effective Date the parties shall mutually agree the terms and method of issuance of a written announcement, which may be a press release, relating to the technology licensed under this Annex 1 and the relationship of the parties.

 

All communications for the above marketing activities shall be sent to the following contacts

 

	
ARM Marketing Contact
    	
 
    	
LICENSEE Marketing Contact
    
	
 
    	
 
    	
 
    
	
Director of   Corporate Communications
    	
 
    	
 
    
	
CommsDirector@arm.com
    	
 
    	
 
    
	
110 Fulbourn Road
    	
 
    	
 
    
	
Cambridge
    	
 
    	
 
    
	
CB1 9NJ
    	
 
    	
 
    


 

SECTION 10 — MANUFACTURER COMPETITORS

 

	
Foundry
    	
 
    	
Headquarters Location
    
	
AMIC Tech
    	
 
    	
 
    
	
Amkor Wafer Fabrication Services   (ANAM)
    	
 
    	
Korea
    
	
ASMC
    	
 
    	
Shanghai, China
    
	
Communicant
    	
 
    	
Germany
    
	
Central Semiconductor Mfr Com.   (CSMC)
    	
 
    	
Wuxie, China
    
	
Davicom Semiconductor(UMC affiliate)
    	
 
    	
USA
    
	
Dongbu Electronics
    	
 
    	
Korea
    
	
ESM Limited
    	
 
    	
 
    
	
Faraday Technology (a UMC Company)
    	
 
    	
Taiwan, ROC
    
	
Grace Semiconductor Manufacturing
    	
 
    	
Shanghai, China
    
	
Global Foundries
    	
 
    	
USA
    
	
Hynix Semiconductor
    	
 
    	
Korea
    
	
Hyundai Electronics
    	
 
    	
Korea
    
	
IBM Microelectronics (IBM)
    	
 
    	
New York, U.S.A.
    
	
Integrated Technology Express
    	
 
    	
 
    
	
PixArt Imagine(UMC Affiliate)
    	
 
    	
Taiwan
    
	
Polar Fab
    	
 
    	
Minnesota, USA
    
	
Qimonda
    	
 
    	
Germany
    
	
Samsung Foundry
    	
 
    	
Korea
    
	
Seiko-Epson Foundry
    	
 
    	
Japan
    
	
SiGe Semiconductor
    	
 
    	
USA
    
	
Semiconductor   Manufacturing International Corporation (SMIC)
    	
 
    	
Shanghai, China
    


 

19











 

	
Silterra Malaysia
    	
 
    	
Malaysia
    
	
Swift Corporation
    	
 
    	
Taiwan
    
	
Tower Semiconductor
    	
 
    	
Israel
    
	
United Microelectronics Corporation   (UMC)
    	
 
    	
Taiwan, ROC
    
	
X-Fab Semiconductor Foundries
    	
 
    	
Germany
    


 

IN WITNESS WHEREOF the parties have caused this Annex 1 to be signed by their duly authorised representative:

 

	
ARM LIMITED
    	
RDA TECHNOLOGIES LTD
    
	
 
    	
 
    
	
BY:
    	
/s/ Mike Inglis
    	
 
    	
BY:
    	
/s/ Vincent Tai
    
	
 
    	
 
    	
 
    	
 
    	
 
    
	
NAME:
    	
Mike Inglis
    	
 
    	
NAME:
    	
Vincent Tai
    
	
 
    	
 
    	
 
    	
 
    	
 
    
	
TITLE:
    	
Chief Commercial Officer
    	
 
    	
TITLE:
    	
CEO
    
	
 
    	
 
    	
 
    	
 
    	
 
    
	
DATE:
    	
27-4-2012
    	
 
    	
DATE:
    	
2012.2.9
    


 

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