# Patent

## Title
Solid state impedance tuners

## Abstract

A solid state impedance tuner or impedance tuner system includes a control element array with a plurality of solid state control elements configured to be turned on simultaneously to achieve a desired impedance state. The control element array comprises N solid state control elements arranged along an RF transmission line. A controller selectively turns on or off each control element by application of a control signal to vary an impedance presented by the control element array, Another aspect is an impedance tuner module card configured in a standardized system architecture, with a chassis board, and at least one solid state tuner module integrated on the card A chassis electrical connector connected to the tuner module is configured for connection to a corresponding backplane connector. Methods for calibrating a solid state impedance tuner that includes at least two solid state tuner modules combined in one package are disclosed.

## Background
CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority from provisional application Ser. No. 61/829,997, filed May 31, 2013, the entire contents of which application is incorporated herein by this reference.


BACKGROUND
Impedance tuners are used to present impedances (also referred to as VSWR, gamma, reflection, return loss) to a device under test and measure its performance as a function of said impedance. Various forms of impedance tuners exist, including mechanical slide-screw tuners, which use a mechanical probe in conjunction with a slabline, and whose probe position dictates the resulting impedance. The probe's horizontal position in relation to the slabline usually affects the phase of the impedance presented to the Device under Test (DUT), whereas the probe's vertical position usually affects the magnitude of the impedance presented to the DUT. Because the probe can be moved in extremely small steps with high resolution, thousands, tens of thousands or even hundreds of thousands of impedance states can be generated at will. Advantages include high resolution, high point count, high power handling and wide frequency bandwidth. Disadvantages include tuning speed and size and weight.
Electronic impedance tuners utilize PIN diodes or switches, with fixed or swept bias voltages and currents, which result in a non-uniform low-density impedance grid. Examples of the electronic or solid state impedance tuners are described in U.S. Pat. Nos. 5,034,708 and 5,276,411, the entire contents of which patents are incorporated herein by this reference. Advantages of electronic or solid state tuners include high tuning speed and small size and weight. Disadvantages include low point density and low power handling.
It is important to note that high tuning speed and high point density are two of the primary requirements of an impedance tuner.
Passive load pull systems have been widely used to characterize microwave devices. Load pull systems measure a DUT under controlled conditions, including controlled impedances seen by the DUT. The controlled impedances may include the impedance on any port of the DUT, and a typical load pull measurement would measure the DUT performance at multiple impedances to show the effect of impedance on the DUT performance. Some other conditions that may be controlled and/or varied include frequency, power level, bias values, or temperature.
In this document, impedance, reflection, or reflection coefficient are all used as general terms to describe the RF termination seen at an RF port. They are functions of the signal coming out of an RF port and the signal at the same frequency coming into the port. Reflection coefficient is related to impedance by the expression




  
    Z
    =
    
      
        Z
        0
      
      ⁢
      
        
      
      ⁢
      
        
          (
          
            1
            +
            Γ
          
          )
        
        
          (
          
            1
            -
            Γ
          
          )
        
      
    
  
  ,




where Z is the impedance and r is reflection coefficient. Both terms contain the same information, so that if one is known, the other is also known. Therefore, in this document they will be used interchangeably.
Tuning resolution is a term that indicates how close the available impedances are to each other in the impedance or reflection plane. High resolution (or fine resolution) means that the gaps between available impedances are very small. Lower resolution means that the gaps between available impedances are larger.
Matching range is a term that indicates the maximum reflection that can be achieved by at tuner over a desired phase range. As an impedance tuner specification, this generally means for all or most reflection phase values (allowing for tuning resolution). However, this definition used for a tuner system can be modified to mean the maximum reflection over a limited phase range. For example, many power transistors require low impedances at the fundamental frequency, so a high matching range is only needed at the low impedance (left side) of the Smith chart.
Automated load pull systems have widely used mechanical tuners, although the size and slow speed is a limitation. Solid state tuners using PIN diodes as switching elements have also been used for load pull systems, and these may provide a big speed advantage, but they have limited tuning resolution.



BRIEF DESCRIPTION OF THE DRAWINGS
Features and advantages of the disclosure will readily be appreciated by persons skilled in the art from the following detailed description when read in conjunction with the drawing wherein:
FIG. 1 is a schematic diagram showing an exemplary embodiment of a solid state control element array.
FIG. 2 illustrates an exemplary embodiment of a tuner module, including two control element arrays connected to a combiner circuit.
FIG. 3 illustrates another exemplary embodiment of a solid state tuner system, which includes two tuner modules cascaded together and disposed within a housing or package. FIG. 3A illustrates an external configuration of an exemplary tuner system.
FIG. 4 is a Smith chart representation of the different impedance values provided by an exemplary embodiment of a tuner system including two cascaded tuner modules.
FIG. 5 illustrates an exemplary embodiment of a tuner system including three tuner modules cascaded together and disposed within a housing.
FIG. 6 illustrates an exemplary embodiment of a tuner system including four tuner modules cascaded together and disposed within a housing.
FIG. 7 illustrates an exemplary embodiment of a tuner system, in which a dual solid state tuner and a triple solid state tuner system are combined in one package or housing.
FIG. 8 illustrates an exemplary embodiment of a measurement system for measuring characteristics of a device under test (DUT), in which two solid state tuner modules are combined in a single package and used for source tuning, and three tuners are combined in a single package and used for load tuning.
FIG. 9 illustrates an exemplary embodiment of a measurement system for measuring characteristics of a DUT, in which two solid state tuner modules are combined in a single package and used for source tuning, and two dual tuner modules each combined in a housing, and cascaded together and used for load tuning.
FIG. 10 illustrates an exemplary embodiment of a measurement system for measuring characteristics of a DUT, in which two solid state tuner modules are combined in a single package and used for source tuning, and a mechanical tuner is used for load tuning.
FIG. 11 illustrates an exemplary measurement system for measuring characteristics of a DUT, employing a triple solid state tuner combined in a single package and used as the load tuner.
FIG. 12 illustrates another exemplary measurement system for measuring characteristics of a DUT, employing a triple solid state tuner combined in a single package and used as the load tuner, with a splitter/coupler network connected between the DUT, the load tuner and a signal analyzer.
FIG. 13 is a flow diagram illustrating an exemplary calibration method for multiple cascaded solid state tuners.
FIG. 14 is a flow diagram illustrating another exemplary calibration method for multiple cascaded solid state tuners.
FIG. 15 is a flow diagram illustrating an exemplary calibration method for multiple cascaded solid state tuner modules in which each tuner module has external connectors.
FIG. 16 depicts a front view of a PXI chassis in which multiple module cards have been installed, including an exemplary tuner module card.
FIG. 17 is a schematic side view of the tuner module card.
FIG. 18 is a front view of the tuner module card.



DETAILED DESCRIPTION
In the following detailed description and in the several figures of the drawing, like elements are identified with like reference numerals. The figures are not to scale, and relative feature sizes may be exaggerated for illustrative purposes.
The following nomenclature applies to the description set out herein. A control element is a solid state device with controllable RF properties useful for controlling impedance. Examples include PIN diodes, FETs or other types of transistors. Control elements may be used as switching devices with two states per element, or with more than two states. A control element array, such as shown in FIG. 1, is a circuit with multiple control elements. A tuner module is a solid state circuit that can tune impedance and normally comprises multiple control elements. For example, FIG. 2 shows a tuner module comprising two control element arrays and a combiner. The diagram of FIG. 2 will be used herein to represent a tuner module, but it is understood that different types of tuner modules may be used. A solid state tuner may contain one or more tuner modules in one package with an external connector for each tuner port. A solid state tuner system is one or more solid state tuners in one package. A measurement system comprises one or more solid state tuners, along with measurement instrumentation. A measurement system may also include other types of tuners such as mechanical tuners.
Embodiments of this invention include a new electronic automated solid state tuner or solid state tuner system employing multiple solid-state tuner modules which when activated in combinations can generate tens or hundreds of thousands of impedance states. Such a solid-state tuner may employ multiple tuner modules cascaded in series or parallel, where each tuner module may include multiple control element arrays combined together. A control element array may include a number N of control elements, such as switches, that are spaced at predetermined lengths as well as their biasing circuitry. Each control element can be turned on (i.e. to the conductive state) individually, or multiple control elements can be turned on at the same time, to create a specific impedance with fixed magnitude and phase. In other embodiments, the bias voltage to each control element may have one or more intermediate levels, between voltage levels which turn the control element on and off.
Assuming, for the sake of example, that each control element array has 24 individual control elements, and only one is activated at a time, there exists 25 individual impedance states for the array. Therefore a tuner module, in which two control element arrays are combined, would have 25*25=625 impedance combinations. Cascading two tuner modules in series would offer 625*625=390,625 impedance states.
Activating multiple control elements simultaneously in each array increases the magnitude of reflection thereby allowing for a greater tuning range to be achieved.
Embodiments of this invention include solid state tuners or tuner systems in which multiple tuner modules are combined into one package or housing. This will reduce losses, thereby improving the matching range. This eliminates external interconnections between the tuners, improving stability and repeatability. The reduced loss also improves the matching range.
This also makes it practical to combine more than two solid state tuners to give more complete impedance coverage.
In general, cascading multiple tuners allows one degree of freedom for each tuner in the combination. So if two tuners are cascaded, two frequencies may be independently controlled. If three tuners are cascaded, three frequencies may be independently controlled. And if four tuners are cascaded, four frequencies may be independently controlled, and so on for any number of tuners.
Combining more tuners than the number of frequencies with independent impedance control improves the tuning resolution and the tuning independence between the frequencies. For example, three combined tuners will improve the tuning resolution and independence at two frequencies. Four or five combined tuners will improve the tuning resolution and independence at three frequencies, and so on. This principle is independent of whether the tuners are all in one package or in multiple packages. However, the single package concept still offers improved performance because of lower losses, better matching range, and better stability.
Putting two or more tuners in one package to control two frequencies improves on the prior art because of the lower losses and better matching range, but the tuning resolution and tuning independence will still have some limitations.
Two solid state tuners combined in one package allows the impedance at two frequencies to be independently controlled with better matching range than the prior art. More than two solid state tuners combined will give better impedance resolution and better tuning independence when two frequencies are to be independently controlled.
FIG. 1 is a schematic diagram showing an exemplary embodiment of a solid state control element array 10, comprising N solid state control elements S1 . . . SN, arranged along transmission line 16, and separated from adjacent elements by transmission line segments 18. The control elements may be PIN diodes, or other solid state switching device, such as FETs or other transistors. Each control element is controlled by a control line L1 . . . LN. A controller 20 is configured to selectively turn on or off each control element by application of a control signal to the corresponding control line, so that only one control element is in the conductive state at any given time. A bias voltage is applied to the transmission line 16 by power supply 16. Such arrays, to the extent just described, are known in the art, e.g. as described in U.S. Pat. No. 5,034,708 and U.S. Pat. No. 5,276,411. Other types of arrays controlled by solid state elements can alternatively be employed, e.g. switched transmission lines of different lengths, wherein the line length is controlled by solid state switching elements.
The array 10 includes an RF input port 12, and an RF output port 14, which in this exemplary embodiment is connected to ground, although in other embodiments the output port may be open circuited or connected to a load. By turning on, i.e. setting to a conductive state, different ones of the control elements while maintaining the remaining ones of the control elements in non-conductive states, the impedance presented by the array 10 to the input port 12 can be changed.
In accordance with one feature, multiple control elements of the array 10 can be switched on simultaneously. For example, three contiguous control elements, say S1, S2, S3 may be switched on, while the remaining control elements are switched off. If S14 is on, S15 and S16 may also be turned on. Alternatively, a plurality of non-contiguous control elements may be switched on simultaneously, while the remaining control elements are set to the off state. Simultaneous activation of multiple control elements in the array increases the magnitude of reflection thereby allowing for a greater tuning range to be achieved.
Two or more control element arrays 10 can be combined to form a tuner module in a single housing, in accordance with another aspect. FIG. 2 illustrates an exemplary tuner module 30, comprising two control element arrays 10 connected to a combiner circuit 24. The circuit 24 may be a 3 dB hybrid coupler, or other type of combiner network or device. In this example, the RF input ports 12 of each array 10 are respectively connected to the coupled ports of the coupler network, and the input and transmitted ports of the hybrid combiner are the port 1 and port 2 RF connector ports 32 and 34 of the tuner module 30. The tuner module 30 includes a housing 36 which encloses the arrays 10 and combiner 34. An advantage of this construction is that the connections between the arrays and the combiner need not be removable, or removed and reconnected for each use.
In accordance with a further aspect, the two control arrays 10 and the combiner circuit 24 may be constructed or mounted on a common printed wiring board (PWB), indicated by dashed line 38. In an exemplary embodiment, the control element arrays may be fabricated by surface mount technology (SMT), in which discrete control element chips are mounted to the PWB. Of course, other embodiments may employ other construction technologies.
FIG. 3 illustrates another embodiment, in which a solid state tuner system 50 includes two tuner modules 30-1 and 30-2, cascaded together and disposed within a housing 52. The system 50 includes an RF port 1, labeled 54, and an RF port 2, labeled 56. The port 1 (32-1) of the first module 10-1 is connected to tuner system RF port 1 (54), and the port 2 (34-2) of the second module is connected to tuner system RF port 2 (56). The port 2 (34-1) of the first module is connected to the port 1 (32-2) of the second module. Thus, the solid state tuner system 50 includes two tuner modules 10, combined within one housing. The tuner system 50 may alternatively include external RF ports 54A, 56A, instead of an internal connection 35 between the tuner modules 30-1 and 30-2. In this case, the user is afforded the flexibility to cascade the two tuner modules together by use of an RF jumper cable connecting ports 54A and 56A, or to use the tuner modules in other ways, e.g. as separate tuners.
FIG. 3A illustrates an external configuration of an exemplary tuner system 50′, as described above, in which the circuitry of the tuner system is disposed within a housing 52. Separate RF connectors 54, 54A, 56 and 56A are mounted to the housing for connection in a measurement system. The tuner system 50′ has two tuner modules, each with external RF ports 1 and 2, respectively corresponding to connectors 54, 54A, 56, 56A. The system also includes control signal and dc power connectors (not shown in FIG. 3A).
FIG. 4 is a Smith chart representation of the different impedance values provided by an exemplary embodiment of a tuner system 50 comprising two cascaded tuner modules.
FIG. 5 illustrates another embodiment, in which a solid state tuner 60 includes three tuner modules 30-1, 30-2 and 30-3, cascaded together and disposed within a housing or package 62. The tuner 60 includes an RF port 1, labeled 64, and an RF port 2, labeled 66. The port 1 of the first module 30-1 is connected to tuner RF port 1 (64), and the port 2 of the third module 30-3 is connected to tuner RF port 2 (66). The port 2 of the first module is connected to the port 1 of the second module, and the port 2 of the second module is connected to the port 1 of the third module.
A solid state tuner or tuner system can be made up of N solid state tuner modules, arranged in a cascaded configuration. FIG. 5 shows the case in which N=3. FIG. 6 illustrates another embodiment, in which N=4, in a tuner system 70 including four tuner modules 30-1, 30-2, 30-3 and 30-4, cascaded together and disposed within a housing or package 72. The system 70 includes an RF port 1, labeled 74, and an RF port 2, labeled 76. The port 1 of the first module 30-1 is connected to tuner system RF port 1 (74), and the port 2 of the fourth module 30-4 is connected to tuner system RF port 2 (76). The port 2 of the first module is connected to the port 1 of the second module, and the port 2 of the second module is connected to the port 1 of the third module. The port 2 of the third module is connected to the port 1 of the fourth module. Of course, for particular applications, the number of cascaded solid state impedance tuner modules could be increased beyond 4.
FIG. 7 illustrates another exemplary embodiment of a solid state tuner system 80, in which a dual solid state tuner 50 (as in FIG. 3) is packaged with a triple solid state tuner 60 (as in FIG. 5), in a single housing or package 82. The RF ports (54, 56, 64, 66) of the respective dual and triple tuners are brought out for connection in a measurement system.
FIG. 8 illustrates an exemplary measurement system 100, for measuring characteristics of a DUT 102. In this embodiment, RF port 2 (56) of a dual solid state tuner 50 is connected to a first DUT port 102A, to function as a source tuner for an RF source 110, connected to RF port 1 (54) of the tuner 50. A triple solid state tuner 60 has RF port 2 (64) connected to a second DUT port 102B, to function as a load tuner. A power meter or other signal analyzer 112 is connected to RF port 2 (66). The system 100 may perform load pull measurements on the DUT, for example.
FIG. 9 illustrates another exemplary measurement system 120, for measuring characteristics of a DUT 122. In this embodiment (as with the system 100 of FIG. 8), RF port 2 (56) of a dual solid state tuner 50 is connected to a first DUT port 122A, to function as a source tuner for an RF source 130, connected to RF port 1 (54) of the tuner 50. Two dual solid state tuners 50-1 and 50-2 are cascaded together to function as load tuners for the DUT 122. RF port 1 (54-1) of tuner 50-1 is connected to a second DUT port 122B to cascade the two tuners. RF port 2 (56-1) of tuner 54-1 is connected to RF port 1 (54-2) of the second dual solid state tuner 50-2. RF port 2 (56-2) of tuner 50-2 is connected to a power meter or other signal analyzer 132. In an alternate embodiment, the two dual solid state tuners 50-1 and 50-2 could be combined into one package to make one solid state tuner system to function as a load tuner for the DUT. This system may be used to perform load pull measurements on the DUT 122.
FIG. 10 illustrates yet another measurement system 140 for measuring characteristics of a DUT 140. This system utilizes a dual solid state tuner system 50 as the source tuner, connected between the RF source 150 and a first DUT port 142A. A mechanical tuner 144 is employed as the load tuner in this embodiment, connected between a second DUT port 142B and a power meter or signal analyzer 152. Mechanical tuners are well known in the art; one type is electromechanical, which allow the tuner operation to be automated. Exemplary electromechanical tuners are commercially available, e.g. from Maury Microwave, Inc. The system 140 may be used to perform load pull measurements, for example.
FIG. 11 illustrates an exemplary measurement system 160 for measuring characteristics of a DUT 162. In this example, the load tuner is a triple solid state tuner 60, with its RF port 1 (64) connected to a first DUT port 162A, and its RF port 2 (66) connected to a power meter or other signal analyzer 164). The DUT 162 in this example may generate its own source signal, or be configured to wirelessly receive a source signal (for the case in which the DUT is a cell phone chip or device, for example).
FIG. 12 illustrates yet another exemplary measurement system 170 for measuring characteristics of a DUT 172. In this example, the load tuner is a triple solid state tuner 60. A splitter/coupler 176 has a port 176A connected to a first DUT port 172A. A second splitter/coupler port 176B is connected to a power meter or signal analyzer 174. The RF port 1 (64) of the tuner 60 is connected to a third splitter/coupler port 176C. A portion of the signal from the port 172A of DUT 172 is coupled to the power meter or signal analyzer, and another portion of the signal is coupled to RF port 1 of the load tuner 60. The second RF port 2 (66) may be connected to a load or other instruments that are part of the measurement system. The DUT 172 in this example may generate its own source signal, or be configured to wirelessly receive a source signal (for the case in which the DUT is a cell phone chip or device, for example).
The following nomenclature applies to the description set out herein. A state of a tuner module is one control setting that sets one particular impedance with that tuner module. A state of a solid state tuner or tuner system is one particular combination of states of all of the tuner modules in that solid state tuner or tuner system. The Z0 state of a tuner module is a designated state that ideally should have low reflection. The Z0 state of a solid state tuner or tuner system is the tuner state where all internal tuner modules are set to their respective Z0 states. The whole tuner body means the complete solid state tuner or tuner system in the Z0 state.
An exemplary calibration method 300 for a solid state tuner with multiple tuner modules includes the following steps, and is illustrated in FIG. 13:
At step 302: 1. Calibrate the network analyzer for a 2-port measurement at reference planes that will connect to the tuner connectors. Save this calibration and call it Calset1. 2. Connect port 2 of the solid state tuner to the port 2 of the Calset1 reference planes. 3. Calibrate the network analyzer again, where the reference plane of port 1 is the same reference plane as port 1 in Calset1, and the reference plane of port 2 is port 1 of the solid state tuner. Save this calibration, and call it Calset2. Connect port 1 of the tuner to reference plane 1, which is the same for both Calsets.
At step 304, determine whether all tuner modules have been calibrated. If so, the calibration is completed. If not, the next tuner module is selected at 306.
At 308, if the next tuner module to be calibrated is tuner module 1, select Calset1 (310). Otherwise, select Calset 2 (318). At 312, 314, measure the s-parameters of the whole tuner for every desired state of the selected tuner module, as follows.

    
    
        a) Leave all of the tuner modules in the Z0 state except for the tuner module being calibrated (tuner module N).
        b) Measure the s-parameters of the whole tuner for every desired state of tuner module N. This could be all of the available states of tuner module N or a subset of available states. Save all of the s-parameters of tuner module N in a file.
    
    


The s-parameters of the tuner module calibrated with Calset1 in the above procedure include the whole tuner body in the Z0 state. The s-parameters of the remaining tuner modules do not include the whole tuner body. This means that when the calibrated s-parameters of all the tuner modules in the solid state tuner are mathematically cascaded together, the whole tuner body will only be included once, so the resulting s-parameters will be correct. The state of each tuner module may be selected independently from all other tuner modules, and the cascading should use the s-parameters associated with the selected state of each tuner module.
The procedure can be varied and still get valid results. Some valid variations include the following:

    
    
        1) Any one of the tuner modules may calibrated with Calset1 (which includes the whole solid state tuner body), as long as all remaining tuner modules are calibrated with Calset2 (which excludes the whole solid state tuner body).
        2) The order of the procedure may also be varied. The two calibrations may be done in any order, and the calibration of all the tuner modules may be done in any order. In addition, tuner modules which are not needed for a particular application may be left in the Z0 state, and the calibration skipped for that tuner module.
        3) In the above procedure, the reference planes of Calset2 are both at port 1 of the solid state tuner. It would work just as well if the Calset2 is created with both reference planes at port 2 of the solid state tuner.
        4) Calset2 may be created with an entirely new calibration, or it may be created automatically as follows:
        
            a) Measure the s-parameters of the whole tuner body in the Z0 state using Calset1.
        
        
        B). Cascade the s-parameters of the whole tuner body with the error terms of either port 1 or port 2 of Calset1, and save the new error terms as Calset2. This approach should give the same results, but may be more convenient.
    
    


Another exemplary calibration method 350 for a solid state tuner with multiple tuner modules includes the following steps, and is illustrated in FIG. 14:
At step 352: 1. Calibrate the network analyzer for a 2-port measurement at reference planes that will connect to the tuner connectors. 2. Connect the tuner to the network analyzer at the calibrated reference planes. 3. Set the tuner to the Z0 state. 4. Measure the s-parameters of the whole tuner body in the Z0 state.
At step 354, determine whether all tuner modules have been calibrated. If so, the calibration is completed. If not, the next tuner module is selected at 356.
At steps 362-366, each tuner module is calibrated one at a time as follows:

    
    
        A) Leave all of the tuner modules in the Z0 state except for the tuner module being calibrated. Measure the s-parameters of the tuner for every desired state of the tuner module being calibrated. This could be all of the available states of this tuner module or a subset of available states (362).
        B) If the tuner module is not tuner module 1 (364), de-embed the Z0 state of the solid state tuner from the s-parameters of every calibrated state (366). The following equations may be used this de-embedding:
    
    





  
    
      S
      
        22
        ⁢
        a
      
    
    =
    
      
        
          S
          
            22
            ⁢
            c
          
        
        -
        
          S
          
            22
            ⁢
            b
          
        
      
      
        
          
            S
            
              11
              ⁢
              b
            
          
          ⁡
          
            (
            
              
                S
                
                  22
                  ⁢
                  c
                
              
              -
              
                S
                
                  22
                  ⁢
                  b
                
              
            
            )
          
        
        +
        
          
            S
            
              12
              ⁢
              b
            
          
          ⁢
          
            S
            
              21
              ⁢
              b
            
          
        
      
    
  




  
    
      S
      
        12
        ⁢
        a
      
    
    =
    
      
        
          S
          
            12
            ⁢
            c
          
        
        ⁡
        
          (
          
            1
            -
            
              
                S
                
                  22
                  ⁢
                  a
                
              
              ⁢
              
                S
                
                  11
                  ⁢
                  b
                
              
            
          
          )
        
      
      
        S
        
          12
          ⁢
          b
        
      
    
  




  
    
      S
      
        21
        ⁢
        a
      
    
    =
    
      
        
          S
          
            21
            ⁢
            c
          
        
        ⁡
        
          (
          
            1
            -
            
              
                S
                
                  22
                  ⁢
                  a
                
              
              ⁢
              
                S
                
                  11
                  ⁢
                  b
                
              
            
          
          )
        
      
      
        S
        
          12
          ⁢
          b
        
      
    
  




  
    
      S
      
        11
        ⁢
        a
      
    
    =
    
      
        S
        
          11
          ⁢
          c
        
      
      -
      
        
          
            S
            
              12
              ⁢
              a
            
          
          ⁢
          
            S
            
              21
              ⁢
              a
            
          
          ⁢
          
            S
            
              11
              ⁢
              b
            
          
        
        
          1
          -
          
            
              S
              
                22
                ⁢
                a
              
            
            ⁢
            
              S
              
                11
                ⁢
                b
              
            
          
        
      
    
  



Where Sa is the resulting 2-port s-parameter set, Sb is 2-port s-parameter set of the whole tuner body, and Sc is the original measured s-parameter set.

The procedure is repeated until all tuner modules have been calibrated (step 354). Save all of these measured s-parameters in a file (360).
The procedure can be varied and still get valid results. Some valid variations include:

    
    
        1) Any one of the tuner modules may left un-de-embedded (therefore including the s-parameters of the whole tuner body) as long as all remaining tuner modules are de-embedded.
        2) The de-embedding may be done by other mathematical approaches such as using matrices instead of the discrete equations listed.
        3) The measured s-parameters may be saved in multiple electronic files (for example, one file for each tuner module) or all combined into one file. This applies to all calibration methods, as the intent is to save the s-parameter data in a way that can be retrieved for later use.
    
    


Either of the above exemplary calibration procedures may also be used to calibrate separate cascaded tuners, as well as multiple tuner modules within a tuner.
Another exemplary calibration method for a solid state tuner with multiple tuner modules, where each tuner module has external connectors, includes the following steps, and is illustrated in FIG. 15:
At step 372, calibrate the network analyzer for a 2-port measurement at reference planes that will connect to the tuner connectors.
At 374-386, each tuner module is calibrated, one at a time as follows:

    
    
        A) At 376, connect the tuner module to the network analyzer using the external connectors of that tuner module. If adapters or other items will be connected in the later use of the tuner and its calibration data, they can be considered part of the tuner module.
        B) At 380, if all desired states of the module have not been measured, the s-parameters of the tuner module are calculated for every desired state. This could be all of the available states of this tuner module or a subset of available states.
        C) Optionally, step 382, if an interconnect item such as a jumper cable is to be used to connect this tuner module to another tuner module, do the following (384):
        
            i) Connect the interconnect item to the network analyzer and measure its s-parameters.
            ii) Mathematically cascade the measured s-parameters of the interconnect item with the s-parameters of the tuner module at every measured state of the tuner module. The result is that the interconnect item is included in the calibration of this tuner module
        
        
        D) Save the final s-parameters for every measured state of the tuner module in a file for later use (386).
    
    


In the above procedure, the tuner modules may be calibrated in any order. The intent is to have s-parameters that can be cascaded mathematically to correctly match the overall s-parameters of the tuner when it is later used in an application, for any combination of calibrated tuner module states. If a jumper cable is used to interconnect tuner modules, it must be included, for example.
The procedure can be varied to meet the requirements of the intended application. For example, instead of including an interconnect jumper cable in the calibration, anything that will be connected later in the use of the tuner could be included in a manner similar to that described for the interconnect item.
In accordance with a further aspect, a solid state tuner may be implemented on a printed circuit card, for use in a chassis providing control and power to cards installed in connector receptacles. For example, a modular instrumentation platform known as PXI (PCI extensions for instrumentation) is well known in the instrumentation industry, and promoted by the PXI Systems Alliance. Modules having a standardized form factor or which conform to a PXI architecture can be installed in a chassis by connection to a chassis connector. The PXI Systems Alliance has promulgated specifications for the PXI standards and architecture, and these are available at http://pxisa.org/Specifications/. Exemplary ones of the specification documents are “PXI-1 Hardware Specification Rev. 2.2,” Sep. 22, 2004 and PXI-4 Module Description Rev. 1.1,” Oct. 18, 2012; the entire contents of these documents are incorporated herein by this reference. The chassis includes a backplane, typically with multiple connectors, to provide power and control signals to the modules installed on the chassis. The chassis typically includes an embedded computer or controller module, which can be programmed to control the function and operation of the installed modules. A front panel of the chassis allows access to ports and connectors on each installed module.
FIG. 16 depicts a front view of a PXI chassis 400 in which multiple module cards have been installed, including exemplary tuner module card 450. The tuner module card has a standardized form factor or architecture for the PXI system, and at least one solid state tuner module integrated in the card. FIGS. 17 and 18 illustrate exemplary features of the card 450, with FIG. 17 a side view of the card and FIG. 18 a front view. This exemplary tuner module card includes a chassis board 452, on which are mounted the respective printed circuit boards 38 for two tuner modules 30 as described above regarding FIG. 3. Alternatively, the tuner modules can be fabricated on a common printed circuit board, e.g. the chassis board 452. The module card includes a face plate 456 attached at an end of the chassis board, which supports the external connectors for the tuner module card. For example, the external connectors may include coaxial RF connectors 54, 54A, 56, 56A for the exemplary tuner configuration illustrated in FIG. 3. The face plate can also support external connectors for externally supplied control signals, e.g. trigger signals for external triggering.
An edge connector 454 extends from the back edge of the chassis board 452 and is configured for connection to a corresponding connector on the PXI chassis backplane board, in a conventional manner. A backplane contains multiple PXI controller and peripheral slots, which provides triggers, clock signals, communication and control of each of the PXI modules.
The backplane board is configured to provide control signals and dc power to the module card 450, including power and control signals to operate the solid state tuner module(s) of the tuner module card. Communication with the tuner module card 450 can be carried out through the backplane.
The external RF connectors on each tuner module card allow for readily cascading multiple tuner modules or tuner module cards, by use of short RF jumper cables. A common timing clock can be used for multiple cards. The modular format illustrated in FIGS. 16-18 provides advantages in cost and speed, in relation to use of separate external solid state tuners.
Other standardized architectures for modules could alternatively be used, for example, VME, VXI, PCI, PCI Express and PXI Express.
Although the foregoing has been a description and illustration of specific embodiments of the subject matter, various modifications and changes thereto can be made by persons skilled in the art without departing from the scope and spirit of the invention.

## Claims

1. A solid state impedance tuner or tuner system operable at RF frequencies, comprising:
a first RF port and a second RF port:
a control element array configured to have a plurality of solid state control elements turned on simultaneously to achieve a desired impedance state;
the impedance tuner or tuner system configured to present impedances to a device under test (DUT) and enable measurement of the DUT's performance as a function of such impedances in a measurement system; and wherein:
the control element array comprises N solid state control elements S1 . . . SN, arranged along an RF transmission line and separated from adjacent control elements by transmission line segments; and
each control element is controlled by a control line L1 . . . LN; and further comprising:
a controller configured to selectively turn on or off each control element by application of a control signal to the corresponding control line to vary an impedance presented by the control element array at the first RF port;
the controller configured to selectively turn on a plurality of control elements simultaneously to achieve the desired impedance state.

2. The impedance tuner or tuner system of claim 1, wherein said plurality of control elements selectively turned on simultaneously are contiguous control elements.

3. A tuner module card configured in a standardized system architecture, the card comprising:
a chassis board;
at least one solid state tuner module integrated on the card and supported on or by the chassis board, each of the at least one solid state tuner module including at least one solid state control element array comprising a circuit with multiple solid state control elements;
a chassis electrical connector electrically connected to the at least one solid state tuner module and configured for connection to a corresponding backplane connector on a backplane chassis to supply electrical power and control signals to operate the at least one solid state tuner module; and
wherein the tuner module card has a standardized form factor or architecture conforming to the standardized system architecture.

4. The tuner module card of claim 3, further comprising:
a face plate secured to the chassis board;
a plurality of external electrical connectors supported by the face plate, said plurality including at least first and second coaxial RF connectors in electrical connection with the at least one solid state tuner module.

5. The tuner module card of claim 4, wherein the at least one solid state tuner module includes respective first and second solid state tuner modules, and the at least first and second coaxial RF connectors are configured to allow for cascading of said first and second solid state tuner modules by RF jumper cables.

6. The tuner module card of claim 3, wherein the standardized architecture conforms to a PXI architecture.

7. A method for calibrating a solid state impedance tuner that comprises at least two solid state tuner modules combined in one housing and having external RF ports 1 and 2, comprising the following steps:
1) calibrate a network analyzer for a 2-port measurement at reference planes that will connect to the tuner RF ports, and save the calibration data as a first network analyzer calibration set;
2) connect RF port 2 of the solid state tuner to the port 2 of the reference planes of the first network analyzer calibration set;
3) calibrate the network analyzer again, where the reference plane of port 1 is the same reference plane as port 1 in the first network analyzer calibration set, and the reference plane of port 2 is port 1 of the impedance tuner, and save the calibration data as a second network analyzer calibration set;
4) connect port 1 of the tuner to reference plane 1, which is the same for both the first and second network analyzer calibration sets;
5) place all of the tuner modules in a Z0 state except for a first tuner module, select the first network analyzer calibration set and measure the s-parameters of the whole tuner for every desired state of the first tuner module, and save all of these measured s-parameters as a first tuner data set;
6) calibrate each of the remaining tuner modules one at time as follows:
a) leave all of the tuner modules in the Z0 state except for the tuner module being calibrated (tuner module N);
b) select the second network analyzer calibration set and measure the s-parameters of the whole tuner for every desired state of tuner module N, and save all of the s-parameters of tuner module N as an Nth tuner data set.

8. The method of claim 7, further comprising:
mathematically cascading together the measured s-parameters of all the tuner modules in the solid state tuner, using the s-parameters associated with the selected state of each tuner module.

9. The method of claim 7, further comprising:
saving the measured s-parameters in steps 5 and 6 in one or more data files.

10. A method for calibrating a solid state impedance tuner that comprises at least two solid state tuner modules combined in one package and having external RF ports 1 and 2, comprising the following steps:
1. calibrate a network analyzer for a 2-port measurement at reference planes that will connect to the external RF ports;
2. connect the solid state tuner to the network analyzer at the calibrated reference planes;
3. set each of the at least two solid state tuner modules of the solid state tuner to the Z0 state;
4. measure the s-parameters of the entire solid state tuner in the Z0 state;
5. measure the s-parameters of a first one of the at least two solid state tuner modules, with all other tuner modules set to the Z0 state, measuring the s-parameters of the entire solid state tuner for every desired state of the tuner module being calibrated;
6. measure the s-parameters of a second one of the at least two solid state tuner modules, with all other tuner modules set to the Z0 state, measuring the s-parameters of the entire solid state tuner for every desired state of the tuner module being calibrated;
7. de-embed the s-parameters of the entire solid state tuner from the s-parameters of the second one of the at least two solid state tuner modules.

11. The method of claim 10, further comprising:
8. repeat steps 6 and 7 until all tuner modules of the at least two tuner modules have been calibrated.

12. The method of claim 10, further comprising:
saving the measured s-parameters in steps 4, 5, 6 and 7 in one or more data files.