# Patent

## Title
Controllers for controlling currents to predetermined current references

## Abstract

A high-side switch is coupled to a power supply terminal and selectively coupled to ground via a conduction path. During an on state duration, the high-side switch can be enabled and the conduction path can be disabled. During an off state duration, the high-side switch can be disabled and the conduction path can be enabled. During a skip state duration, the high-side switch and the conduction path both can be disabled. A controller coupled to the high-side switch can control the on state duration and the skip state duration based on a current reference. The controller can further generate a control signal for controlling the high-side switch and the conduction path according to the on state duration and the skip state duration, and adjust an output current to the current reference according to the control signal.

## Background
RELATED APPLICATION
This application is a Continuation Application of the commonly-owned U.S. patent application with Ser. No. 12/435,537, filed on May 5, 2009, now U.S. Pat. No. 8,179,105, which claims priority to U.S. Provisional Application No. 61/126,446, filed on May 5, 2008, both of which are fully incorporated by reference.


BACKGROUND
Some conventional chargers, e.g., switch mode battery chargers, control a charging current by monitoring a current through a current sensor. The charger can include an input current amplifier that is coupled to the current sensor and for monitoring the charging current. Such sensing method may be accurate when the voltage drop on the sense element is relatively big, e.g., greater than 50 mV. However, problems may occur when the charger controls a relatively small charging current, e.g., during wake-up charging, trickle charging, or end of charging.
One of the issues is caused by an offset of the input current amplifier, which can be in the range of 2 mV-3 mV. For example, when the charging current is relatively small, the sensing error may reach up to 100%.
SUMMARY
In one embodiment, a high-side switch is coupled to a power supply terminal and selectively coupled to ground via a conduction path. During an on state duration, the high-side switch is enabled and the conduction path is disabled. During an off state duration, the high-side switch is disabled and the conduction path is enabled. During a skip state duration, the high-side switch and the conduction path both are disabled. A controller coupled to the high-side switch is configured to control the on state duration and the skip state duration based on a current reference. The controller is further configured to generate a control signal for controlling the high-side switch and the conduction path according to the on state duration and the skip state duration, and adjust an output current to the current reference according to the control signal.



BRIEF DESCRIPTION OF THE DRAWINGS
Features and advantages of embodiments of the claimed subject matter will become apparent as the following detailed description proceeds, and upon reference to the drawings, wherein like numerals depict like parts, and in which:
FIG. 1 illustrates a block diagram example of a power converter, in accordance with one embodiment of the present invention.
FIG. 2 illustrates plot examples of an inductor voltage, an inductor current and an equivalent level of the inductor current, in accordance with one embodiment of the present invention.
FIG. 3 illustrates a block diagram example of a power converter, in accordance with one embodiment of the present invention.
FIG. 4 illustrates a block diagram example of part of a controller in a power converter, in accordance with one embodiment of the present invention.
FIG. 5 illustrates plot examples of a first control signal, a second control signal and an inductor current, in accordance with one embodiment of the present invention.
FIG. 6 illustrates a flowchart example of operations performed by a power converter, in accordance with one embodiment of the present invention.



DETAILED DESCRIPTION
Reference will now be made in detail to the embodiments of the present invention. While the invention will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims.
Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be recognized by one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present invention.
In one embodiment, the present invention provides a power converter that converts input power to output power at a different level. An output voltage/current of the power converter can be used to charge a battery or power a load. The power converter includes a high-side switch and a conduction path (or a low-side switch) coupled to the high-side switch. The high-side switch is coupled to a power source providing the input power and is selectively coupled to ground via the conduction path. During an on state duration, the high-side switch is enabled (turned on) and the conduction path is disabled (cut off). During an off state duration, the high-side switch is disabled (turned off) and the conduction path is enabled. During a skip state duration, the high-side switch and the conduction path both are disabled (cut off).
Advantageously, the output current of the power converter can be controlled in different ways depending on the level of the output current. When the output current is relatively large, e.g., greater than a threshold, or when the output current is to be adjusted to a relatively large current reference, the power converter can adjust the output current by sensing the output current using an amplifier and by comparing the sensed output current with the current reference. When the output current is relatively small, e.g., less than a threshold, or when the output current is to be adjusted to a relatively small current reference, the power converter can adjust the output current by controlling the on state duration and the skip state duration according to the current reference. For example, a controller can calculate or adjust the on state duration and the skip state duration according to the current reference and generate corresponding control signals to control the high-side switch and the conduction path. Consequently, the output current can be adjusted to the current reference in a relatively accurate way.
FIG. 1 illustrates a block diagram example of a power converter 100, in accordance with one embodiment of the present invention. In one embodiment, the power converter 100 is a DC to DC converter. However, the invention is not so limited. The invention can also be well suited in other types of converters. As shown in FIG. 1, the DC to DC converter 100 can receive an input voltage VIN at terminal 110 and generate an output voltage VOUT at terminal 112. The DC to DC converter 100 can include a controller 102, a driver 104, a pair of switches 106 (including a high-side switch Q1 and a low-side switch Q2) and a low pass filter 108. The low pass filter 108 can include an inductor L and a capacitor C. The output voltage VOUT at terminal 112 can be used to power a load or charge a battery.
In one embodiment, the high-side switch Q1 is coupled to a power supply terminal 110 and selectively coupled to ground via the low-side switch Q2. During an on state duration TON, the high-side switch Q1 can be enabled (turned on) and the low-side switch Q2 can be disabled (turned off). During an off state duration TOFF, the high-side switch Q1 can be disabled (turned off) and the low-side switch Q2 can be enabled (turned on). During a skip state duration TSKIP, the high-side switch Q1 and the low-side switch Q2 both can be disabled (turned off). The controller 102 that is coupled to the high-side switch Q1 via the driver 104 can control the durations TON, TOFF and TSKIP based on a current reference IREF. The controller 102 can also generate a first control signal, e.g., a pulse width modulation (PWM) signal from a terminal PWM of the controller 102, to control the high-side switch Q1 and the low-side switch Q2 according to the durations TON, TOFF and TSKIP. Additionally, the controller 102 can generate a second control signal, e.g., a low-side switch enable (LDR_EN) signal from a terminal LDR_EN of the controller 102, to control the low-side switch Q2 according to the durations TON, TOFF and TSKIP. As such, the controller 102 can adjust an output current IOUT of the power converter 100 to the current reference IREF according to the PWM signal and the LDR_EN signal.
Specifically, if the LDR_EN signal is logic high, the state of the PWM signal can control the switches Q1 and Q2. For instance, the switch Q1 can be turned on and the switch Q2 can be turned off if the PWM signal is logic high. The switch Q1 can be turned off and the switch Q2 can be turned on if the PWM signal is logic low. In addition, if the LDR_EN signal is logic low and the PWM signal is logic high, the switch Q1 can be turned on and the switch Q2 can be turned off. However, if the PWM signal is logic low in this instance, the switches Q1 and Q2 both can be turned off.
In other words, in one embodiment, during the on state duration TON, the PWM signal is logic high and the LDR_EN signal can be logic high or logic low. During the off state duration TOFF, the PWM signal is logic low and the LDR_EN signal is logic high. During the skip state duration TSKIP, the PWM signal and the LDR_EN signal both are logic low.
In one embodiment, the inductor L is coupled to the high-side switch Q1 and the low-side switch Q2, such that the switch end of the inductor L can be alternately coupled to the power supply terminal 110 and ground depending on the state of the switches Q2 and Q1.
More specifically, during the on state duration TON, the inductor L can be coupled to the power supply terminal 110. Neglecting the voltage drop on the sense resistor R1 which has relatively low resistance, the voltage difference between the terminals of the inductor L can be approximately equal to the input voltage VIN at the power supply terminal 110 less the output voltage VOUT at the output terminal 112. In one embodiment, the input voltage VIN is greater than the output voltage VOUT, so there is a net positive voltage across the inductor L. As such, the inductor current IL can ramp up (increase) according to equation (1) as shown below:

di/dt=(VIN−VOUT)/L=ΔI1/TON,  (1)

where ΔI1 is the change of the inductor current IL during the on state duration TON.

In addition, during the off state duration TOFF, the inductor L can be coupled to ground and there can be a net negative voltage −VOUT across the inductor L. As such, the inductor current IL can ramp down (decrease) according to equation (2) as shown below:

di/dt=VOUT/L=ΔI2/TOFF,  (2)

where ΔI2 is the change of the inductor current IL during the off state duration TOFF. Furthermore, during the skip state duration TSKIP, since both of the switches Q1 and Q2 are turned off, the switching side of the inductor L can be left floating. As such, the inductor current IL can be approximately zero. As used herein, “approximately zero” means that the current IL may be different from zero so long as a leakage current that may flow through the inductor L when switches Q1 and Q2 are off is relatively small and can be omitted.

In one embodiment, the controller 102 can adjust a limit, e.g., a peak current level IPK, of the inductor current IL according to the on state duration TON, the input voltage VIN and the output voltage VOUT. For example, according to equation (1), the current change ΔI1 during the on state duration TON can be given by:

ΔI1=TON*(VIN−VOUT)/L.  (3)

Assume that the level of the current change ΔI1 is the peak current level IPK, the peak current level IPK can be given by:

IPK=TON*(VIN−VOUT)/L.  (4)

In one such embodiment, during the on state duration TON, the inductor current IL can increase from zero to the peak current level IPK. If the input voltage VIN and the output voltage VOUT are determined, the peak current level IPK can increase as the on state duration TON increases, and can decrease as the on state duration TON decreases.

Similarly, according to equation (2), the current change ΔI2 during the off state duration TOFF can be given by:

ΔI2=TOFF*VOUT/L.  (5)

Advantageously, the controller 102 can control the off state duration TOFF according to the on state duration TON, the input voltage VIN and the output voltage VOUT, such that the inductor current IL can decrease from the peak current level IPK to zero during the off state duration TOFF. In one such embodiment, according to equation (5), the peak current level IPK can also be given by:

IPK=TOFF*VOUT/L.  (6)

Based on equations (4) and (6), the following equation can be obtained:

TOFF=TON*(VIN−VOUT)/VOUT.  (7)

In other words, the controller 102 can control the off state duration TOFF proportional to the on state duration TON based on equation (7).

FIG. 2 illustrates plot examples of the inductor voltage VL across the inductor L, the inductor current IL and an equivalent level IL—EQV of the inductor current IL, in accordance with one embodiment of the present invention. FIG. 2 is described in combination with FIG. 1.
Plots 202, 204 and 206 respectively show the waveforms of the inductor voltage VL, the inductor current IL and the equivalent level IL—EQV of the inductor current IL, in one embodiment. Specifically, during the on state duration TON, the inductor voltage VL can be equal to VIN−VOUT, and the inductor current IL can increase. During the off state duration TOFF, the inductor voltage VL can be equal to −VOUT, and the inductor current IL can decrease. The inductor current IL can have a current limit, e.g., the peak current level IPK, determined by the on state duration TON, the input voltage VIN and the output voltage VOUT. During the skip state duration TSKIP, the inductor current IL and inductor voltage VL can be approximately zero.
According to the waveform 204 for the inductor current IL, the equivalent level IL—EQV of the inductor current IL can be given by:

IL—EQV=(IPK/2)*(TON+TOFF)/(TON+TOFF+TSKIP).  (8)

When equations (4) and (7) are substituted into equation (8), the following equation can be obtained:





  
    
      
        
          
            
              
                I
                L_EQV
              
              =
              
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                  [
                  
                    
                      (
                      
                        
                          V
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                        -
                        
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                    /
                    
                      (
                      
                        2
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                        L
                      
                      )
                    
                  
                  ]
                
                *
                
                  
                    T
                    ON
                  
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                [
                
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                  +
                  
                    
                      (
                      
                        
                          V
                          OUT
                        
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                          V
                          IN
                        
                      
                      )
                    
                    *
                    
                      (
                      
                        
                          T
                          SKIP
                        
                        /
                        
                          T
                          ON
                        
                      
                      )
                    
                  
                
                ]
              
            
          
        
        
          
            
              
                =
                
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                    K
                    1
                  
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                      T
                      ON
                    
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                      [
                      
                        1
                        +
                        
                          
                            K
                            2
                          
                          *
                          
                            (
                            
                              
                                T
                                SKIP
                              
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                                T
                                ON
                              
                            
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              ,
            
          
        
      
    
    
      
        (
        9
        )
      
    
  




where K1 is a parameter that is equal to (VIN−VOUT)/(2*L), and K2 is a parameter that is equal to VOUT/VIN. As such, the equivalent current IL—EQV can be controlled by adjusting the on state duration TON and/or the skip state duration TSKIP. In one embodiment, the output current IOUT is equal to IL—EQV.

Referring back to FIG. 1, if the skip state duration TSKIP is determined or fixed, the controller 102 can increase the equivalent current IL—EQV by increasing the on state duration TON, and also can decrease the equivalent current IL—EQV by decreasing the on state duration TON. If the on state duration TON is determined or fixed, the equivalent current IL—EQV can decrease as the skip state duration TSKIP increases, and can increase as the skip state duration TSKIP decreases. In other words, based on equation (9), by setting the equivalent current IL—EQV to the current reference IREF, the controller 102 or a processor (not shown in FIG. 1) can calculate the on state duration TON and/or the skip state duration TSKIP. As such, the controller 102 can control the PWM signal and the LDR_EN signal based on the calculated durations TON and TSKIP, so as to adjust the equivalent current IL—EQV to the current reference IREF.
In one embodiment, the controller 102 can vary the peak current level IPK by varying the on state duration TON. In another embodiment, the controller 102 can be a constant-ripple-current (CRC) controller that controls the power converter 100 to generate a current IL having a constant peak current level IPK. Specifically, the controller 102 can control the on state duration TON inversely proportional to the input voltage VIN less the output voltage VOUT. For example, the on state duration TON can be given by:

TON=K/(VIN−VOUT),  (10a)

where K is a programmable constant parameter. The controller 102 can also control the off state duration TOFF inversely proportional to the output voltage VOUT. For example, the off state duration TOFF can be given by:

TOFF=K/VOUT.  (10b)

As such, according to equation (4) or equation (6), the following equation can be obtained:

IPK=K/L.  (11)

As a result, the inductor current IL can have a constant peak current level IPK.

When equations (10a), (10b) and (11) are substituted into equation (8), the following equation can be obtained:

IL—EQV=K2*VIN/[2*L*(K*VIN+TSKIP*VOUT*(VIN−VOUT))].  (12)

In one such embodiment, if the input voltage VIN and the output voltage VOUT are determined, e.g., the input voltage VIN is obtained via the VIN terminal of the controller 102 and the output voltage VOUT is obtained via the VFB terminal of the controller 102, the controller 102 can adjust the equivalent current IL—EQV by controlling the skip state duration TSKIP.

Moreover, the controller 102 can have a target input terminal SLEW where the desired output voltage VOUT is set. In one embodiment, the slew capacitor CSLEW coupled to the terminal SLEW charges based on the value of the resistors in the resistor divider R2/R3 and the value of the reference voltage at a VREF terminal of the controller 102. Various ways can be used to charge the slew capacitor CSLEW and create a target voltage signal VTARGET at the terminal SLEW. In addition, the terminal VFB of the controller 102 can receive a feedback signal representative of the output voltage level VOUT. The controller 102 can include a comparator for comparing the output voltage level VOUT with the target voltage level VTARGET, so as to adjust the output voltage level VOUT to the target voltage level VTARGET. Furthermore, an optional sense resistor R1 or an inductor DCR (direct current resistance) current sensing circuit (not shown in FIG. 1) can be utilized to provide feedback voltage levels to terminals CSN and CSP of the controller 102, so as to represent the inductor current level IL. For example, the difference between the voltage levels at the terminals CSN and CSP is proportional to the inductor current level IL.
In one embodiment, the output terminal 112 is coupled to a load to power the load. In another embodiment, the output terminal 112 is coupled to a battery to charge the battery. In one such embodiment, the output current IOUT, e.g., IL—EQV, can be used to charge the battery. In one embodiment, the power converter 100 can charge the battery in different charging modes, e.g., a normal current charging mode and a small current charging mode, etc.
In the normal current charging mode, the output current IOUT for charging the battery is greater than a predetermined threshold (e.g., when a voltage drop on the sense resistor R1 is higher than a predetermined level (e.g., 50 mV)). In the example of FIG. 1, the sense resistor R1 is coupled between the inductor L and the capacitor C, so as to provide a current feedback indicating the inductor current IL. In another embodiment, the sense resistor R1 can be coupled between the capacitor C and the output terminal 112, so as to provide a current feedback indicating the output current IOUT. The controller 102 can sense the inductor current IL or the output current IOUT via the terminals CSN and CSP by an amplifier in the controller 102 and compare the sensed current with a current reference I′REF. The current reference I′REF can be greater than the current reference IREF. A duty cycle of the PWM signal controlling the switches Q1 and Q2 can be adjusted according to a result of the current comparison so as to adjust the output current IOUT to the current reference I′REF. In addition, the controller 102 can compare a feedback voltage VFB at the terminal VFB with a target voltage VTARGET at the terminal SLEW. The duty cycle of the PWM signal can also be adjusted according to a result of the voltage comparison so as to adjust the output voltage VOUT to the target voltage VTARGET.
In the small current charging mode (e.g., during wake-up charging, trickle charging, and end of charging, etc.), the output current IOUT for charging the battery is relatively small, e.g., less than a predetermined threshold. Advantageously, instead of sensing the current via the sense resistor R1, the controller 102 can calculate or adjust durations TON, TOFF, and TSKIP based on the current reference IREF. Thus, the controller 102 can adjust the output current IOUT to the current reference IREF. For example, according to equation (9), if the on state duration TON is determined or fixed, by controlling the skip state duration TSKIP to a certain value, e.g., by controlling an input signal at a terminal SKIP of the controller 102 or calculating/adjusting the TSKIP by a timer delay circuit in the controller 102, the output current IOUT can be controlled to the current reference level IREF.
FIG. 3 illustrates a block diagram example of a power converter 300, in accordance with another embodiment of the present invention. Elements that are labeled the same as in FIG. 1 have similar functions. As shown in FIG. 3, the high-side switch Q1 is coupled to ground via a conduction path. The conduction path can include a diode D1 having a P terminal coupled to the high-side switch Q1 and having an N terminal coupled to ground. In one such embodiment, the low-side switch Q2 in the example of FIG. 1 can be omitted.
In the example of FIG. 3, during the on state duration TON, the PWM signal can be logic high so as to turn on the high-side switch Q1, and the diode D1 can be cut off. Meanwhile, the inductor current IL can increase from zero to the peak current level IPK. During the off state duration TOFF, the PWM signal can be logic low so as to turn off the high-side switch Q1. The diode D1 can be in conduction, and the inductor current IL can flow through the diode D1 from ground to the inductor L. Meanwhile, the inductor current IL can decrease from the peak current level IPK to zero. During the skip state duration TSKIP, the PWM signal can still be logic low. As such, the high-side switch Q1 and the diode D1 both can be cut off, and the inductor current IL can be approximately zero. Similarly, according to equation (9), the output current IOUT can be adjusted properly by controlling the on state duration TON and the skip state duration TSKIP.
FIG. 4 illustrates a block diagram example of part of the controller 102, in accordance with one embodiment of the present invention. FIG. 4 is described in combination with FIG. 1 and FIG. 3. As shown in FIG. 4, the controller 102 can provide a PWM control signal and an LDR_EN signal to the driver 104 (in FIG. 1), so as to control the high-side switch Q1 and the low-side switch Q2. In one embodiment, the controller 102 can count blocks of time and provide the appropriate PWM control signal and the LDR_EN signal based on such counts.
For instance, the controller 102 can include a one-shot circuit 402, a one-shot circuit 404, a comparator 406, a time delay circuit 408, and a NOR gate 410. The one-shot circuit 402 can provide the PWM control signal and the one-shot circuit 404 can provide the LDR_EN signal. The one-shot circuits 402 and 404 can be triggered by falling edges of the input signals. For example, if the input signal at the terminal TRIG of the one-shot circuit 402 changes from logic high to logic low, the one-shot circuit 402 can output a PWM signal that is logic high for a time interval, e.g., an on state duration TON. When the time interval TON expires, the PWM signal can change to logic low. Similarly, if the input signal at the terminal TRIG of the one-shot circuit 404 changes from logic high to logic low, the one-shot circuit 404 can output an LDR_EN signal that is logic high for a time interval, e.g., an off state duration TOFF. When the time interval TOFF expires, the LDR_EN signal can change to logic low.
The time delay circuit 408 can be a blanking circuit for generating retriggering of the one-shot circuit 402. For example, the time delay circuit 408 can receive the PWM signal from the one-shot circuit 402, and can be reset by a falling edge of the PWM signal. If the PWM signal changes from logic high to logic low, a timer in the time delay circuit 408 can start to run. The time delay circuit 408 can output logic high to the NOR gate 410 when a time interval, e.g., an off state duration TOFF plus a skip state duration TSKIP (TOFF+TSKIP), expires. As such, the NOR gate 410 can output logic low to trigger the one-shot circuit 402. Moreover, the terminal TRIG of the one-shot circuit 404 can receive the PWM signal from the one-shot circuit 402. Thus, if the PWM signal changes from logic high to logic low, the one-shot circuit 404 can be triggered.
The comparator 406 can compare a feedback voltage VFB at the terminal VFB of the controller 102 and a target voltage VTARGET at the terminal SLEW of the controller 102, so as to generate an output signal to the NOR gate 410. In one embodiment, if the feedback voltage VFB is no less than the target voltage VTARGET, the output signal can be logic low. If the feedback voltage VFB is less than the target voltage VTARGET, the output signal can be logic high, such that the NOR gate 410 can output logic low to trigger the one-shot circuit 402. At this moment, the PWM signal can be logic high so as to turn on the high-side switch Q1 (in FIG. 1 and FIG. 3), and the output voltage VOUT can increase. Thus, the output voltage VOUT can be adjusted to the target voltage VTARGET, in one embodiment.
In one embodiment, during the normal current charging mode as mentioned above, the controller 102 can enable the comparator 406 so as to adjust the output voltage VOUT to the target voltage VTARGET. During the small current charging mode, the controller 102 can disable the comparator 406, and adjust the output current IOUT by controlling the on state duration TON, the off state duration TOFF and the skip state duration TSKIP.
In one embodiment, the controller 102 in FIG. 4 can be implemented in the power converter 100 in FIG. 1, so as to control the high-side switch Q1 and the low-side switch Q2. In another embodiment, the controller 102 in FIG. 4 can also be implemented in the power converter 300 in FIG. 3, so as to control the high-side switch Q1 and the diode D1. In one such embodiment, the output terminal Q of the one-shot circuit 404 can be left floating.
FIG. 5 illustrates plot examples of a first control signal (the PWM signal), a second control signal (the LDR_EN signal) and the inductor current IL, in accordance with one embodiment of the present invention. FIG. 5 is described in combination with FIG. 4.
As shown in FIG. 5, plots 502 and 504 respectively show the waveforms of the PWM signal and the LDR_EN signal. When the one-shot circuit 402 is triggered, the PWM signal can be logic high for a time interval TON. During the time interval TON, the inductor current IL can increase. When the PWM signal changes from logic high to logic low, the one-shot circuit 404 can be triggered and the time delay circuit 408 can be reset. For example, the LDR_EN signal can change from logic low to logic high and last for a time interval TOFF, and then change to logic low when the time interval TOFF expires. During the time interval TOFF, the inductor current IL can decrease. The time delay circuit 408 can be reset and start to count the time. When a time interval TOFF+TSKIP expires, the time delay circuit 408 can output logic high to trigger the one-shot circuit 402, so as to change the PWM signal to logic high. During the time interval TSKIP, the inductor current IL can be approximately zero.
FIG. 6 illustrates a flowchart 600 of examples of operations performed by a power converter 100/300, in accordance with one embodiment of the present invention. FIG. 6 is described in combination with FIG. 1, FIG. 2 and FIG. 3.
In blocks 602 and 604, the controller 102 can enable (turn on) the high-side switch Q1 and disable (cut off) a conduction path, e.g., the low-side switch Q2 or the diode D1, that is coupled to the high-side switch Q1 during the on state duration TON. In blocks 606 and 608, the controller 102 can enable the conduction path D1/Q2, and disable the high-side switch Q1 during the off state duration TOFF. In block 610, the controller 102 can disable the high-side switch Q1 and the conduction path D1/Q2 during the skip state duration TSKIP.
In block 612, the controller 102 can control the on state duration TON and the skip state duration TSKIP based on the current reference IREF. For example, based on equation (9), the controller 102 can calculate the on state duration TON and/or the skip state duration TSKIP based on the current reference level IREF.
In block 614, the controller 102 can generate a first control signal, e.g., the PWM signal, to control the high-side switch Q1 and the conduction path D1/Q2 according to the on state duration TON and the skip state duration TSKIP. As such, as described in block 616, the controller 102 can adjust the output current IOUT of the power converter 100/300, e.g., the equivalent current IL—EQV, to the current reference IREF according to the first control signal.
Accordingly, embodiments according to the present invention provide a power converter that can adjust an output current in differently ways depending on the level of the output current. The power converter can be used in many applications, e.g., a battery charging system and a power supply system, etc. For example, the power converter can provide a supply current to a load, or a charging current to a battery. Advantageously, such power converter can control the supply/charging current to a relatively low level in a relatively accurate way.
While the foregoing description and drawings represent embodiments of the present invention, it will be understood that various additions, modifications and substitutions may be made therein without departing from the spirit and scope of the principles of the present invention as defined in the accompanying claims. One skilled in the art will appreciate that the invention may be used with many modifications of form, structure, arrangement, proportions, materials, elements, and components and otherwise, used in the practice of the invention, which are particularly adapted to specific environments and operative requirements without departing from the principles of the present invention. The presently disclosed embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims and their legal equivalents, and not limited to the foregoing description.

## Claims

1. A device comprising:
a node selectively connected to a power supply terminal and ground via a plurality of switches; and
a controller, coupled to said node via said switches, that connects said node to said power supply terminal and disconnects said node from said ground using said switches in an on state duration, that disconnects said node from said power supply terminal and connects said node to said ground using said switches in an off state duration, that disconnects said node from said power supply terminal and said ground in a skip state duration, that calculates a value for said skip state duration based on a predetermined current reference and a plurality of parameters, and that adjusts an output current to said predetermined current reference by adjusting said skip state duration to the calculated value and by controlling said switches according to said on state duration and said skip state duration, wherein said plurality of parameters comprise said predetermined current reference, an input voltage of said device, an output voltage of said device, and said skip state duration.

2. The device as claimed in claim 1, wherein said node is coupled to said power supply terminal via a high-side switch and said node is coupled to said ground via a low-side switch, wherein said high-side switch is on and said low-side switch is off during said on state duration, wherein said high-side switch is off and said low-side switch is on during said off state duration, and wherein said high-side and low-side switches are off during said skip state duration.

3. The device as claimed in claim 1, further comprising:
an inductor coupled to said node, wherein an inductor current through said inductor increases during said on state duration, decreases during said off state duration, and is approximately zero during said skip state duration.

4. The device as claimed in claim 3, wherein said controller adjusts a limit of said inductor current according to said on state duration and also according to said input voltage of said device and said output voltage of said device.

5. The device as claimed in claim 3, wherein said controller controls said inductor current to have a constant peak current level by controlling said on state duration inversely proportional to said input voltage of said device less said output voltage of said device.

6. The device as claimed in claim 3, wherein said controller controls said inductor current to have a constant peak current level by controlling said off state duration inversely proportional to said output voltage of said device.

7. The device as claimed in claim 1, wherein said output current decreases as said skip state duration increases.

8. The device as claimed in claim 1, wherein said controller calculates said value for said skip state duration based on said predetermined current reference and based on an equation that is given by:


IL—EQV=[(VIN−VOUT)/(2*L)]/*TON/[1+(VOUT/VIN)*(TSKIP/TON)],

where IL—EQV represents a level of said predetermined current reference, VIN represents said input voltage of said device, VOUT represents said output voltage of said device, L represents inductance of an inductor coupled to said node, TON represents said on state duration, and TSKIP represents said skip state duration.

9. A method comprising:
connecting a node to a power supply terminal and disconnecting said node from ground during an on state duration;
disconnecting said node from said power supply terminal and connecting said node to said ground during an off state duration;
disconnecting said node from said power supply terminal and said ground during a skip state duration;
calculating a value for said skip state duration based on a predetermined current reference and a plurality of parameters; and
adjusting an output current to said predetermined current reference by adjusting said skip state duration to the calculated value and by controlling the connection between said node, said power supply terminal, and said ground according to said on state duration and said skip state duration, wherein said plurality of parameters comprise said predetermined current reference, an input voltage of a device, an output voltage of said device, and said skip state duration.

10. The method as claimed in claim 9, further comprising:
controlling said on state duration inversely proportional to said input voltage of said device less said output voltage of said device.

11. The method as claimed in claim 9, wherein said calculating comprises calculating said value for said skip state duration based on said predetermined current reference and based on an equation that is given by:


IL—EQV=[(VIN−VOUT)/(2*L)]*TON/[1+(VOUT/VIN)*(TSKIP/TON)],

where IL—EQV represents a level of said predetermined current reference, VIN represents said input voltage of said device, VOUT represents said output voltage of said device, L represents inductance of an inductor coupled to said node, TON represents said on state duration, and TSKIP represents said skip state duration.

12. A controller comprising:
a control circuit that controls an input current to flow through a high-side switch during an on state duration, that controls said input current to flow through a low-side switch coupled to said high-side switch during an off state duration, that cuts off said input current during a skip state duration, and that adjusts an output current to a predetermined current reference by adjusting said skip state duration to a value; and
a time delay circuit, coupled to said control circuit, that calculates said value for said skip state duration based on said predetermined current reference and a plurality of parameters, wherein said plurality of parameters comprise said predetermined current reference, an input voltage of a device, an output voltage of said device, and said skip state duration.

13. The controller as claimed in claim 12, wherein said input current flows through an inductor that is coupled to said high-side switch and said low-side switch.

14. The controller as claimed in claim 13, wherein said input current flows from a power supply terminal to said inductor during said on state duration, wherein said input current flows from ground to said inductor during said off state duration, and wherein said input current is cut off during said skip duration.

15. The controller as claimed in claim 12, wherein a said output current is equal to an average level of said input current.

16. The controller as claimed in claim 12, wherein said control circuit controls said on state duration inversely proportional to said input voltage of said device less said output voltage of said device.

17. The controller as claimed in claim 12, wherein said output current decreases as said skip state duration increases.

18. The controller as claimed in claim 12, wherein said time delay circuit calculates said value for said skip state duration based on said predetermined current reference and based on an equation that is given by:


IL—EQV=[(VIN−VOUT)/(2*L)]*TON/[1+(VOUT/VIN)*(TSKIP/TON)],

where IL—EQV represents a level of said predetermined current reference, VIN represents said input voltage of said device, VOUT represents said output voltage of said device, L represents inductance of an inductor coupled to said high-side and low-side switches, TON represents said on state duration, and TSKIP represents said skip state duration.

19. The device as claimed in claim 3, wherein said output current indicates an average level of said inductor current.

20. The device as claimed in claim 1, wherein said controller calculates said value for said skip state duration based on said predetermined current reference and based on an equation that is given by:


IL—EQV=K2*VIN/[2*L*(K*VIN+TSKIP*VOUT*(VIN−VOUT))],

where IL—EQV represents a level of said predetermined current reference, VIN represents said input voltage of said device, VOUT represents said output voltage of said device, L represents inductance of an inductor coupled to said node, TSKIP represents said skip state duration, and K represents the product of said input voltage less said output voltage and said on state duration.