A STRATEGY FOR THE 

CHIPS FOR AMERICA FUND

CHIPSfor AMERICA
for AMERICA

CHIPS.gov
for AMERICA

CHIPS.g

CHIPSfor AMERICA

CHIPS.gov

A STRATEGY FOR 

THE CHIPS FOR 

AMERICA FUND

The U.S. Department of Commerce

September 6, 2022

TABLE OF CONTENTS

INTRODUCTION. 

Statutory Background. 

Industry and Stakeholder Input. 

PART I: GUIDING PRINCIPLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

PART II. BACKGROUND ON THE U.S. SEMICONDUCTOR INDUSTRY. 

PART III. IMPLEMENTING THE CHIPS PROGRAM. 

Organization. 

Eligibility. 

Key Initiatives. 

PART IV: CONSIDERATIONS FOR APPLICANTS FOR CHIPS INCENTIVES. .

CONCLUSION. .

ENDNOTES. .
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INTRODUCTION

This document describes the U.S. Department of 

Commerce’s implementation strategy for the Creating 

Helpful Incentives to Produce Semiconductors 

(CHIPS) for America Fund, a $50 billion investment 

to catalyze long-term growth in the domestic semiconductor industry in support of our national and 

economic security. 

The Department of Commerce (the “Department”) 

has identified four strategic goals for the CHIPS for 

America Fund:

• Invest in U.S. production of strategically important semiconductor chips, particularly those using 

leading-edge technologies.1

• Assure a sufficient, sustainable, and secure supply 

of older and current generation chips for national 

security purposes and for critical manufacturing 

industries.

• Strengthen U.S. semiconductor research and development (R&D) leadership to catalyze and capture 

the next set of critical technologies, applications, 

and industries. 

• Grow a diverse semiconductor workforce and build 

strong communities that participate in the prosperity of the semiconductor industry.

These objectives go beyond supporting the construction of a few semiconductor manufacturing facilities, 

or “fabs.” Over the long term, the CHIPS for America 

Fund must enable and sustain a vibrant domestic 

industry that supports quality jobs, a diverse workforce, and a robust supplier base of large and small 

firms, while revitalizing high-volume semiconductor 

manufacturing, renewing U.S. strengths in design, 

materials, and process innovation, and benefiting the 

broader economy. Achieving these goals will require 

new thinking and partnerships from policymakers and 

the private sector to unlock the productive capacity 

of industry, workers, and communities. This document describes the principles that will guide the 

Department’s program design, the industry context in 

which the CHIPS for America Fund will operate, the 

distinct initiatives within the Fund, and some considerations for future applicants for CHIPS funding that 

require long-term preparation.

Statutory Background

Sections 9902 and 9906 of the William M. (Mac) 

Thornberry National Defense Authorization Act for 

Fiscal Year 2021 (referenced herein as “the 2021 

NDAA”2) authorized semiconductor manufacturing 

and R&D activities, collectively called the “CHIPS 

program” in this document. The CHIPS Act of 2022 

enhanced the CHIPS program with new authorities 

and appropriated $50 billion to the Department to 

implement it.3

Section 9902 of the 2021 NDAA authorizes the 

Department to provide funding to eligible applicants 

to incentivize investment in facilities and equipment in 

the United States for the fabrication, assembly, testing, advanced packaging, production, or research and 

development of semiconductors, materials used to 

manufacture semiconductors, or semiconductor manufacturing equipment.4 The Department may provide 

funding in various forms, including grants, cooperative 

agreements, loans, and loan guarantees.5 The CHIPS 

Act of 2022 appropriates $39 billion for these purposes.6 With these funds, the Department will establish an incentives program to support the expansion 

of manufacturing capacity for mature nodes and to 

attract large-scale investments in advanced technologies such as leading-edge logic and memory.

Section 9906 of the 2021 NDAA authorizes the 

Department to establish a National Semiconductor 

Technology Center (NSTC) to conduct research and 

prototyping of advanced semiconductor technology and to establish a National Advanced Packaging 

Manufacturing Program (the “Advanced Packaging” 

program or “NAPMP”) led by the director of the 

Department’s National Institute of Standards and 

Technology (NIST). Section 9906 also authorizes NIST 

to establish up to three Manufacturing USA institutes 

to advance research and commercialization of semiconductor manufacturing technologies, and to carry 

out an R&D program to advance measurement science, standards, material characterization, instrumentation, testing, and manufacturing capabilities.7 The 

CHIPS Act of 2022 appropriates $11 billion for these 

purposes.8

Both Sections 9902 and 9906 authorize and direct 

investments in the semiconductor workforce. Under 
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Section 9902, incentives recipients must make workforce development commitments and must secure 

“commitments from regional educational and training 

entities and institutions of higher education to provide workforce training, including programming for 

training and job placement of economically disadvantaged individuals.”9 The Advanced Packaging and 

Manufacturing USA institute programs established by 

Section 9906 will have elements of workforce development. Finally, the NSTC is tasked with incentivizing 

and expanding workforce development activities.10 The 

Department will coordinate workforce development 

activities across these programs and with other agencies funded in this topic area, notably the National 

Science Foundation (NSF), and with interagency 

efforts through the CHIPS Implementation Steering 

Council established by President Biden in Executive 

Order 14080, “Implementation of the CHIPS Act of 

2022,”11 and the Subcommittee for Microelectronics 

Leadership established by Section 9906(a) of the 2021 

NDAA.12

Section 107 of the CHIPS Act of 2022 creates a new 

advanced manufacturing investment tax credit (ITC) 

to be administered by the Internal Revenue Service 

of the Department of the Treasury. The ITC is equal 

to 25 percent of the value of qualified investments 

in buildings and other eligible depreciable tangible 

property for advanced manufacturing facilities that 

have a primary purpose of manufacturing semiconductors or semiconductor manufacturing equipment.13 The Department expects that the ITC will serve 

as an important tool to close the cost gap between 

investment in the United States and other countries. 

CHIPS program funding will be a significant, additional 

source of funding to enhance strategic and critical 

capabilities in the United States. The ITC is available 

for projects that start construction between January 1, 

2023, and December 31, 2026.14

Industry and Stakeholder Input

Engagement with stakeholders throughout the implementation of the CHIPS program is a Department of 

Commerce imperative. This strategy paper is informed 

by extensive engagement with semiconductor industry leaders and experts in academia, nonprofits, local, 

state and federal government, public-private entities, 

national security entities, labor leaders, and international partners and allies.

The Department, pursuant to Executive Order 14017, 

“America’s Supply Chains,”15 engaged broadly with 

stakeholders to inform a 100-day review of the supply chains for semiconductor manufacturing and 

advanced packaging. That review identified vulnerabilities and fragilities and made recommendations for 

building more resilient supply chains.16 This strategy 

document reflects the lessons and recommendations 

in that review and builds on work the Biden-Harris 

Administration and the Department have undertaken 

over the last 18 months to mitigate acute disruptions 

in semiconductor supply chains and build long-term 

resilience in the industry, with a focus on rebuilding 

domestic manufacturing capacity. 

The Department also issued a Request for Information 

(RFI)17 that closed at the end of March 2022 and 

sought information to inform the planning and design 

of CHIPS programs. The Department received over 

250 responses from a wide range of companies 

representing multiple sectors of the semiconductor 

supply chain, including design software developers, 

integrated device manufacturers, materials suppliers, equipment vendors, fabless companies, automotive and industrials consumer companies, along with 

academics, labor unions, investors, and civil society 

stakeholders. The Department has hosted workshops 

and listening sessions with different parts of the 

semiconductor value chain, and has received extensive input from industry participants, state economic 

development officials, and other interested parties.

Industry and community input has highlighted specific 

risks to mitigate, and specific strengths and opportunities to exploit. Key themes—including ideas to attract 

private capital, commercialize new R&D and technology, improve supply chain and demand transparency, 

attract and train talented workers, and work with 

states and localities to expand economic clusters—

are captured in this document. A complete report on 

feedback from the RFI is available here.

PART I: GUIDING PRINCIPLES

The Department of Commerce will balance urgent 

needs in the semiconductor industry with long-term 

strategic goals. The Department encourages participants to view CHIPS as a long-term program and a 

sustained collaboration between the public and private sectors. 
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As the Department embarks on program design, 

it will follow the implementation principles set 

forth by President Biden in Executive Order 14080, 

“Implementation of the CHIPS Act of 2022”:

• Protect taxpayer dollars. The CHIPS program will 

include rigorous review of applications along with 

robust compliance and accountability requirements 

to ensure taxpayer funds are protected and spent 

wisely.

• Meet economic and national security needs. 

The CHIPS program must address economic and 

national security risks by building domestic capacity that reduces U.S. reliance on vulnerable or overly 

concentrated foreign production for both leading 

edge and mature microelectronics, and increasing 

U.S. economic productivity and competitiveness. 

U.S. long-term economic and national security interests require a sustainable, competitive domestic 

industry. 

• Ensure long-term leadership in the sector. The 

CHIPS program will establish a dynamic, collaborative network for semiconductor research and innovation to enable long-term U.S. leadership in the 

industries of the future. The program will support 

a diversity of technologies and applications along 

many stages of product and process development.

• Strengthen and expand regional manufacturing 

and innovation clusters. Long-term competitiveness requires large economies of scale and investments across the supply chain. Regional clusters 

containing manufacturing facilities, suppliers, basic 

and translational research, and workforce programs, 

along with supporting infrastructure, will be the 

foundation for a competitive industry. The CHIPS 

program will facilitate the expansion, creation, and 

coordination of semiconductor manufacturing and 

innovation clusters that benefit many companies. 

• Catalyze private sector investment. A successful 

CHIPS program will respond to market signals, fill 

market gaps, and reduce investment risk to attract 

significant private capital. The role of government 

in the CHIPS program is to shift financial incentives to maximize large-scale, private investment 

in production, break-through technologies, and 

workers. The CHIPS program will encourage new 

ecosystem collaborations that reduce risk, build on 

U.S. strengths, and facilitate such investments. 

• Generate benefits for a broad range of stakeholders and communities. A successful CHIPS 

program will create benefits for startups, workers, 

small businesses, minority-owned, veteran-owned, 

women-owned and rural businesses, universities 

and colleges, and state and local economies, in 

addition to supporting semiconductor companies. The CHIPS program will encourage linkages 

to underserved regions and populations to draw in 

new participants to the semiconductor ecosystem. 

PART II. BACKGROUND ON THE 

U.S. SEMICONDUCTOR INDUSTRY

The Semiconductor Industry and Wider Ecosystem 

of Software, Design, Tools, Materials, Equipment, 

Customers, Workers, and Investors Are a Unique 

National Asset, Critical to Economic and National 

Security. 

Chips are an integral part of a consumer’s everyday 

life. They are found in household items, such as coffee makers, garage door openers, and refrigerators, 

as well as in more complex products such as mobile 

phones, pacemakers, and automobiles. They are fundamental to the operation of virtually every military 

system, including communications and navigations 

systems, and complex weapons systems such as those 

found in sophisticated fighter jets. Semiconductors are 

key to the technologies of the future, including artificial intelligence and 5G. 

The semiconductor industry creates high-wage jobs, 

including in construction, design, and manufacturing, 

and involves significant amounts of R&D spending. 

Economic activity in this ecosystem encompasses 

basic science, technology development, and capitalintensive manufacturing over an extraordinary variety 

of new products and niche applications. Moore’s Law—

the prediction that the performance of chips doubles 

every 2 years or so—has shaped the industry for 

more than 50 years, with a new generation of semiconductor devices emerging at a predictable pace. 

This pace of innovation and the resulting variety of 

chips and devices has revolutionized entire industries 

and unleashed new types of information processing 

and communications capabilities. 
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The Industry Structure for the Manufacturing of 

Semiconductors Has Changed Dramatically Over the 

Past 30 Years. 

The United States no longer produces the world’s most 

advanced semiconductors and has lost the ability to 

produce key supply chain inputs such as lithography 

tools, substrates, and some specialty chemicals.18 The 

United States fabricates only 10 percent of global chip 

capacity today, and provides only 3 percent of global 

packaging, assembly, and test capacity.19 Over twothirds of the most advanced semiconductors are made 

in Taiwan, and since 2020, nearly 75 percent of new 

capacity for certain mature nodes has been added 

in the People’s Republic of China (PRC).20 The risks 

to national and economic security created by these 

changes are aggravated by the PRC’s commitment of 

extensive resources to invest in semiconductor technologies critical to U.S. military superiority and economic competitiveness.21

The semiconductor industry is experiencing heightened demand across a range of end-use industries. 

Total revenues could exceed $1 trillion over the next 

decade.22 As new capacity is built to meet long-term 

demand, the CHIPS program goal is to have much of 

that new capacity constructed in the United States by 

addressing some of the main challenges to increasing 

domestic semiconductor production including: 

• The significant cost gap between building and operating a manufacturing facility in the United States, 

and building and operating the same facility elsewhere, which results from the differences in government subsidies, construction timelines, and ongoing 

operating costs.23

• The decline in U.S. capital investments in manufacturing capacity and technology upgrades, which 

makes it harder to master the next learning curve of 

process innovations and build the next generation 

of chips.

• The extremely high cost of building a leading-edge 

fab, and the resulting “fabless” business model that 

separates the activity of designing a new chip from 

the process to manufacture it, which has created 

dependence on a few, very large foundries.

• Lack of visibility into demand forecasts has long 

driven a boom and bust cycle in the global semiconductor manufacturing industry, creating headwinds for domestic investment.

• A mismatch and loss of worker skills in the construction and operation of manufacturing facilities 

because U.S. construction of large-scale fabs and 

packaging facilities has been limited in the last 

decade.

At the Same Time, the United States Remains Strong, 

but Vulnerable, in Semiconductor Design, Research, 

and Development.

The United States is the world’s leader in chip design 

and design automation tools, capturing roughly half 

the value of chips manufactured from these designs; 

it is critical that we capitalize on these strengths. 

However, the United States is at risk of losing this 

leadership position due to the erosion of the manufacturing base. As the manufacturing process becomes 

more complex, new chip designs require tight coordination with fabrication processes to ensure manufacturability. The challenge of moving designs and R&D to 

commercial production, sometimes called the “lab to 

fab” problem, threatens to shut out smaller firms and 

startups, deterring innovation.24 The challenge is due 

to the following factors:

• At the design phase, chips need to be manufactured in small quantities to debug and validate the 

design, yet foundries and advanced packaging 

facilities are not set up to enable small runs. This 

prototyping process requires improved access to 

shared infrastructure such as multiproject wafer 

runs and design libraries.

• The costs of prototyping and proving designs has 

gone up worldwide. Venture capital and other 

investors are reluctant to invest in projects at the 

early stage given the high cost, the long time to 

validation, and the resulting risk. 

• The industry lacks agreement on roadmaps to 

guide the concurrent development of tools, materials, and manufacturing processes.

• The industry faces difficulty in attracting and retaining domestic and international research scientists in 

the highly competitive broader market for technology talent. 

• For innovations beyond design, such as new 

devices and materials, high development costs and 

long payoff times pose additional risks. 
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Future Trends

The United States cannot look back and simply try to 

recreate what has been lost. Instead, the success of 

the CHIPS program relies on recognizing and facilitating the continued evolution of the industry in a way 

that builds U.S. strength. The CHIPS program will 

consider these trends in its review and prioritization of 

projects to fund.

• Technology improvement must come from new 

sources. After decades of steady gains following 

the prediction of Moore’s Law, the industry now 

exhibits diminishing returns as reflected in rising 

cost per transistor, slowing performance gains, and 

challenges with energy efficiency.25 New hardware 

breakthroughs are needed from advanced packaging, new architectures, novel tools, and alternate 

materials. 

• Mature nodes are critical to key sectors. As chip 

technology advances have slowed, many commercial customers (including in critical-sector industries) have delayed their migration to newer chips. 

These important applications rely on chips that 

are often built in overseas fabs and are vulnerable 

to the risks of concentrated offshore fabrication. 

Moreover, the shortage of even one simple, low-cost 

part from a mature node can halt the manufacturing line for a complex product. 

• Risks are created by increased industry and geographic consolidation. The cost of semiconductor 

manufacturing has grown exponentially, with new 

leading-edge fabs now costing over $10 billion 

each, with the most advanced technology nodes 

requiring well above this amount. The cost of creating advanced chip designs is growing as well, sometimes exceeding $100 million to prove out a design 

for a leading-edge chip.26 Rising development and 

production costs are continuing to drive business 

consolidation and raise barriers to entry for these 

activities, contributing to geographic and corporate consolidation. Geographic consolidation brings 

with it significant risk, including vulnerabilities to 

shutdowns caused by pandemics, severe weather 

events, cyber breaches, and social and geopolitical 

disruptions.

• Environmental sustainability will be increasingly 

important. The chip fabrication process has grown 

in its demand for electricity, water, and hazardous 

chemicals, requiring industry to respond to those 

customers, investors, and members of the public 

who are focused on ambitious net zero goals for 

energy, water, and waste.27 Recently, major semiconductor customers have shown leadership by 

adopting renewable energy pledges, often not just 

for their own operations but also for their suppliers. 

The United States has a deeper and more costeffective renewable energy market than many semiconductor competitor countries, which can enable 

fabs to contract for long-term, stable, renewable 

power.

• Resilient supply chains are a focus of business and 

government. The semiconductor supply chain has 

become fragile and susceptible to disruptions. 

Creating a more resilient domestic and global supply chain is important to protect U.S. economic 

growth and control costs for businesses and consumers alike. A resilient supply chain is one that 

recovers quickly from an unexpected event. In manufacturing, firms often use visibility, buffering, and 

agility to improve their resiliency.28 For high-tech 

industries, like semiconductors, long-term competitiveness requires a strong ecosystem that supports 

both research and production.29 This ecosystem, 

which includes production, innovation, skilled workers, and diverse small- and medium-sized suppliers, 

often requires co-location of resources in particular 

geographic regions to achieve economies of scale 

and spillover benefits that support R&D, production 

innovation, and capital formation.30

These trends will inform the implementation of the 

Department’s semiconductor incentives and R&D 

programs.

PART III. IMPLEMENTING THE CHIPS PROGRAM

Organization

The Department intends to implement the CHIPS 

program with the creation of two new offices housed 

at NIST, the CHIPS Program Office (CPO) and the 

CHIPS R&D office. The CPO will be a new operating unit established to implement the Section 9902 

semiconductor incentives program and provide policy 

and stakeholder engagement support across CHIPS 

programs. The CPO, working closely with the Office of 

the Secretary and the Under Secretary of Commerce 

for Standards and Technology, will work to ensure 
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coordination of all CHIPS-related activities across 

the Department. The CPO will actively participate in 

White House-led coordination efforts, including the 

CHIPS Implementation Steering Council, to ensure a 

tightly connected implementation of CHIPS throughout the government, including the Departments 

of Defense, State, Energy, and Homeland Security, 

the Office of the Director of National Intelligence, 

the NSF, and the Office of the United States Trade 

Representative. The CPO will draw on the technical 

expertise of these agencies. 

The CHIPS R&D office will incubate the NSTC, and 

manage the Industrial Advisory Committee, Advanced 

Packaging, Manufacturing USA, and R&D activities, in 

collaboration with existing NIST laboratories and the 

NIST Office of Advanced Manufacturing. 

NIST was selected as the bureau to house these new 

units because of its deep technical expertise, industry 

focus, experience with public-private partnerships, and 

strong administrative functions.

In concert with other agencies and bureaus of the 

Department of Commerce, as appropriate, the CPO 

and the CHIPS R&D office will engage with comparable entities in allied and partner economies to advance 

shared goals on supply chain resiliency and technology protection.

Eligibility

An eligible applicant for funding under the Section 

9902 incentives program must be a “covered entity,” 

which can be a private entity, a nonprofit entity, a 

consortium of private entities, or a consortium of nonprofit, public, and private entities with a demonstrated 

ability to substantially finance, construct, expand, or 

modernize a facility relating to fabrication, assembly, 

testing, advanced packaging, production, or research 

and development of semiconductors, materials used 

to manufacture semiconductors, or semiconductor 

manufacturing equipment.31

CHIPS funds must be used for facilities built in the 

United States32 and cannot support facilities being 

constructed or operated abroad.33 Domestic companies and foreign companies (except those that are a 

“foreign entity of concern”34) that seek to use CHIPS 

funds for qualifying investments in the United States 

can be eligible. The Department encourages potential 

applicants to consider forming collaborations with 

suppliers, customers, investors, state, local, or tribal 

governments, or other relevant entities as appropriate. 

Key Initiatives

The Department’s CHIPS program will consist of three 

distinct initiatives. Each initiative addresses a set of 

strategic challenges, has a different time horizon and 

speed of implementation, and involves a partially overlapping set of stakeholders and incentives. 

1. Large-scale investments in leading-edge logic 

and memory manufacturing clusters

The CHIPS program aims to establish domestic 

production of leading-edge logic and memory 

chips that require the most sophisticated processes available today. The Department will seek 

proposals for the construction or expansion of 

manufacturing facilities to fabricate, package, 

assemble, and test these critical components, particularly focusing on projects that involve multiple 

high-cost, production lines and associated supplier ecosystems. 

The Department expects this initiative to account 

for approximately three quarters of the CHIPS 

incentives funding under Section 9902, or approximately $28 billion.35 The CHIPS funding may be 

available for grants or cooperative agreements, 

or to subsidize loans or loan guarantees—the 

Department expects to use loan and/or loan 

guarantee authority to increase the program’s 

economic impact. The Department is still assessing the impact of the ITC on capital expenditure, 

which will generate significant additional project 

investment from participants and will reduce the 

required share of federal CHIPS incentive funding 

allocated for leading edge projects. Overall, CHIPS 

funding is only a small part of the total expected 

investment in the semiconductor industry. When 

combined with the ITC, private investment, loans, 

and state and local funding, total investment in 

the industry will be many multiples of the amounts 

available for CHIPS incentive funding. 

As part of this initiative, the CPO will work with 

the Department of Defense, the Office of the 

Director of National Intelligence, and other relevant agencies to define and meet requirements 
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for “secure and assured” microelectronics (secure 

design, production, and material handling processes mitigate against the risks of tampering with 

or counterfeiting microchips). 

The CPO’s solicitation for applications will include 

extensive information on the required components 

of the application and how proposals will be evaluated. To enable potential applicants to prepare 

in advance, this document includes some details 

on those program elements that require long-term 

planning in Part IV of this paper (“Considerations 

for Applicants”).

The Department’s goal is to begin soliciting applications within six months of enactment of the 

CHIPS Act of 2022. The CPO’s process will include 

a preliminary application stage that will enable 

applicants to get feedback from the CPO before 

submitting a complete application.

2. Expanding manufacturing capacity for mature 

and current-generation chips, new and specialty 

technologies, and for suppliers to the industry.

The CHIPS program will increase domestic production of semiconductors across a range of 

nodes including chips used in defense and in 

critical commercial sectors such as automobiles, 

information and communications technology, 

and medical devices. This initiative is broad and 

flexible, encouraging industry participants to 

craft creative proposals. Examples of the types of 

proposals covered in this initiative include but are 

not limited to:

◦ Construction or expansion of facilities for the 

fabrication, packaging, assembly, and testing of 

legacy and current-generation semiconductors, 

including all types of logic, memory, discrete, 

analog, and optoelectronic chips.

◦ Facilities to produce new or specialty technologies such as advanced analog chips, radiationhardened chips, compound semiconductors, or 

emerging technologies.

◦ Facilities that manufacture equipment and 

materials for semiconductor manufacturing, 

potentially co-located in regional clusters. 

◦ Equipment upgrades that provide near-term 

efficiency improvements in fabs.

Funding will be provided only after a rigorous 

merit review and may include a mix of instruments, for example grants, loans, and loan guarantees. The value of the total financial assistance 

may vary considerably, depending on the specifics 

of each project. 

For this initiative, the Department expects dozens 

of awards with the total value expected to be at 

least one quarter of the available CHIPS incentives 

funding under Section 9902, or approximately 

$10 billion. Those amounts may be available for 

grants or cooperative agreements, or to subsidize 

loans or loan guarantees. As is the case for leading 

edge facilities, the ITC will generate significant 

additional project investment for participants and 

the Department is assessing the ITC impact on 

allocations between programs. The Department 

will also use loan and/or loan guarantee authority. The Department expects the total investment 

in the industry from all sources to be substantially 

greater than the amounts available for CHIPS 

financial assistance. 

The CPO’s solicitation for applications will include 

extensive information on the required components 

of the application and how the applications will 

be evaluated. To enable companies to prepare in 

advance, this document includes detail on those 

program elements that require long-term planning in Part IV of this paper (“Considerations for 

Applicants”).

The Department’s goal is to begin soliciting applications within six months of enactment of the 

CHIPS Act of 2022. The CPO’s process will include 

a preliminary application stage that will enable 

applicants to get feedback from the CPO before 

submitting a complete application. 

3. Initiatives to strengthen and advance U.S. leadership in R&D

The R&D initiatives include the NSTC, the NAPMP, 

the Manufacturing USA Institute(s), and the NIST 

metrology investments that together received $11 

billion in funding under the CHIPS Act of 2022. 

These R&D initiatives are expected to operate in 

coordination with each other, with the semiconductor incentives program under Section 9902 of 

the 2021 NDAA, and with microelectronics R&D 
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programs supported by other U.S. federal agencies. Such coordination may include the sharing of 

infrastructure, participants, and projects. 

This constellation of programs is intended to create a dynamic, new network of innovation for the 

semiconductor ecosystem in the United States. 

This vision will take sustained investment over 

many years and require collaboration with other 

stakeholders engaged in semiconductor research. 

The long-term payoff will be reestablishing this 

sector as the engine of innovation for the U.S. 

domestic economy. 

National Semiconductor Technology Center (NSTC)

The NSTC will be a public-private entity that 

includes participation from industry, universities, the 

Department of Defense, the Department of Energy, 

and the NSF to conduct research, provide prototyping 

capabilities, establish an investment fund, and expand 

workforce development programs. 

The funding provided by the CHIPS Act of 2022 

for the NSTC should be viewed as seed capital. The 

Department envisions an organization that grows over 

time to be a significant force for advancing innovation 

in semiconductors and microelectronics, with substantial financial and programmatic support from companies, universities, investors, and other government 

agencies, including those at the state and local levels. 

Industry programs will be built to ensure that the 

NSTC is responding to long-term market needs while 

meeting the national security and commercial objectives of the program, including building a plan for 

long-term financial sustainability. The NSTC will attract 

collaborators and research partners from around the 

world, including from partners in allied countries, to 

participate in compelling opportunities to advance 

future technologies. In brief, the Department envisions 

the NSTC as the center for excellence for the country 

in the semiconductor industry. 

As the Department develops a governance structure 

for the NSTC, it will consider the following:

• Access rules that enable broad participation, 

including from startups, small firms, fabless semiconductor companies, in-house semiconductor 

designers, allied international entities, and universities, rather than being tuned to the needs of 

specific companies, technologies, or steps in the 

supply chain.

• Technical competence on par with the best engineering and scientific talent in the industry.

• Ability to attract leaders with in-depth understanding of the semiconductor ecosystem from materials 

to applications.

• Ability to attract leaders who understand the complexities of managing government and commercial 

interests in an R&D enterprise, including the responsible stewardship of public funds and protection of 

intellectual property.

• Responsiveness to government and industry advisors tasked with coordinating national and international R&D strategy for microelectronics. 

• Ability to work across U.S. government agencies, 

including with microelectronics R&D programs 

supported by the Department of Defense, the 

Department of Energy, and NSF.

• A complementary and collaborative role relative to 

comparable organizations in allied countries.

The Department expects the NSTC to focus on 

advancing semiconductor design, scaling new manufacturing processes, developing new tools and materials, and improving the lab-to-fab product flow. 

The NSTC may support a range of programs including grand challenges identified by industry and the 

research community, the operation and provision of 

prototyping facilities, investment and technical support to new and emerging companies in partnership 

with the venture community, and potentially creating 

a shared physical and virtual infrastructure of enabling 

technologies such as design automation software. In 

addition, the NSTC is expected to support the development of standards and technical roadmaps to guide 

simultaneous development of materials, tools, software, and end-use applications. 

Another critical role for the NSTC will be workforce 

development. This role will require a collaborative 

and well-funded nationwide effort to build the pipeline of workers needed to expand the semiconductor 

industry. There is a severe shortage of workers who 

are trained and ready to fill new roles in specialized 

construction, fab operations, and semiconductor 

design. At the same time, workers around the country 

are seeking quality jobs, even in a tight labor market. 
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The need to reimagine and scale education, training, and recruitment is one of the industry’s greatest 

challenges. Employment in the U.S. semiconductor 

manufacturing industry has remained around 185,000 

workers since 2009, with new hiring mainly to replace 

attrition.36 The industry will need to significantly 

increase the intake of new workers annually to keep 

pace with new capacity. It is possible that up to $8 

billion of investment may be needed over the next five 

years to substantially address the industry’s workforce 

needs. The NSTC will play a key role in coordinating 

and scaling up the ongoing workforce development 

and recruitment efforts such as those currently led by 

industry associations, individual companies, state and 

local governments, and other federal agencies, including the Department of Labor, Department of Defense, 

NSF, and the Department’s Economic Development 

Administration, to maximize their overall effectiveness. 

The CHIPS R&D office will incubate the NSTC and 

continue to work closely with the NSTC to ensure 

accountability and stewardship in the use of public 

funds. In consultation with stakeholders, the CHIPS 

R&D office will work to ensure that the NSTC has 

a clear vision, an effective governance structure, 

and a 10-year financial plan that ensures long-term 

sustainability. 

National Advanced Packaging Manufacturing Program 

(NAPMP) 

After semiconductors are fabricated, they are “packaged” in a container that is adhered to a printed circuit board, ultimately ending up in the products that 

we use. Packaging is labor intensive and principally 

located in Asia. Many older devices and applications, 

including defense equipment, rely on conventional 

packaging. It is economically challenging to bring conventional packaging back to the United States. But the 

United States can compete in advanced packaging, 

which is anticipated to generate 50 percent of packaging revenue by 2024.37

To expand U.S. capabilities in advanced packaging, 

NIST will establish the National Advanced Packaging 

Manufacturing Program. The Department envisions 

forming a network of entities to create a robust 

domestic advanced packaging capacity including 

substrate production, heterogeneous integration, and 

the ability to work with and incorporate diverse new 

material systems. NIST will work with network participants to establish a pilot packaging facility to enable 

the testing and integration of new approaches and 

processes. This capability will be closely aligned with 

the NSTC and accessible to the broader community.

Manufacturing USA Institute

Manufacturing USA, a national network of 16 institutes 

engaging manufacturing, government, and academic 

organizations provides members with access to 

state-of-the-art facilities and equipment to promote 

research, propel new products to market, and train the 

workforce. NIST will launch a process to establish up 

to three new Manufacturing USA Institutes, bringing 

together a consortium of industry and university partners focused on addressing semiconductor manufacturing challenges. 

The new Manufacturing USA institutes are expected 

to emphasize virtualization and automation, among 

other topics. Significant productivity and cost savings 

can be derived from more widespread adoption of 

virtualization and simulation of wafer production, and 

improved automation of manufacturing processes and 

materials handling and logistics. These techniques can 

bring down the cost of new designs and create more 

“tape-out” opportunities for more startups.38 Such 

efforts can reduce barriers to innovation and improve 

connections and communications between product 

and process design and execution, which is particularly vital for advanced packaging. The institutes also 

will provide opportunities for workforce training on 

technologies critical across the industry.

Metrology Research

The ability to measure semiconductors throughout the 

fabrication process is an essential part of enabling the 

high-yield and high-quality fabrication that is required 

for economic viability. Advances in the industry are 

driving ever more exacting requirements for materials purity, defect tolerances, materials properties, 

and in-line processes. Measurement capabilities must 

improve quickly for the CHIPS investments to yield full 

value. NIST will expand ongoing metrology research 

programs to enable breakthroughs in measurement, 

standards, and process capabilities for the fabrication 

of next-generation semiconductors. Specific expansion efforts will include:
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• Physical metrology for next-generation microelectronics, including 3D devices for logic and memory 

and 3D heterogeneous integration/advanced 

packaging. 

• Computational metrology for computationally 

intensive and data-driven aspects of semiconductor 

metrology. 

• Virtualization and automation for computationally 

intensive and data-driven aspects of semiconductor 

manufacturing. 

• Measurement services such as standard reference 

materials, calibration services, and standard reference data. 

• Measurement and documentary standards in areas 

of industry priority to include cybersecurity measures, metrics, and solutions.

Accountability, Reporting, and Oversight for Section 

9902 

The Department will maintain the highest ethical standards in the operation of the CHIPS program, working 

to uphold the public’s trust by ensuring compliance 

with ethics laws and regulations and making all decisions in the best interest of the United States. The 

Department will seek to maximize the public benefits 

of federal investments, protect national security interests, and ensure funds produce broadly shared benefits. This effort is essential across all CHIPS initiatives, 

but especially in the incentives program under Section 

9902. Accountability will begin at the application 

stage, with a rigorous review of proposals to ensure 

projects are economically viable and compatible with 

the overall CHIPS strategy. Proposals that satisfy this 

robust review will be subject to a variety of performance, reporting, audit, and oversight conditions 

established and overseen by the CPO. These conditions will enable the CPO to meet statutory requirements, protect taxpayer funds, and ensure compliance 

with agreed proposal goals. 

Federal funding will be contingent on the necessity, 

appropriateness, and long-term economic viability 

of a project. The application process will verify the 

technical and financial merit of the project, rationale 

for public funding, and organizational structure and 

operational capabilities of the applicant. The review 

also will include an assessment of economic impact. 

The Department may recover funds if recipients fail 

to start or complete projects on time or fail to meet 

certain commitments, and the CPO expects that projects will be funded in increments over time as milestones are achieved. 

The CPO also will implement congressionallymandated guardrails to ensure recipients of CHIPS 

funds cannot compromise national security by sending 

the latest technology abroad. In addition, any company that receives funding will be prohibited for 10 

years from engaging in significant transactions involving the material expansion of semiconductor manufacturing capacity in PRC or other countries of concern, 

subject to limited exceptions authorized in law. 

The CPO will ensure that taxpayer investments maximize public benefits. Eligible applicants must provide 

evidence of significant worker and community investments along with commitments from educational 

institutions for worker training, including programs to 

expand opportunity for economically disadvantaged 

individuals. The Department expects to prioritize proposals that include significant worker and community 

investments. Davis-Bacon requirements will apply to 

CHIPS-funded construction projects, which ensures 

workers earn local prevailing wages. The CPO also 

will prioritize applicants with well-developed proposals designed to increase participation of and outreach 

to economically disadvantaged individuals, minority-owned businesses, veteran-owned businesses, 

women-owned businesses, and rural businesses in the 

geographic area of each project. 

Finally, the private sector recipients cannot use any 

public funds on stock buybacks or dividend payments 

to shareholders. Further, the CPO will give preference 

in awards to applicants who commit to make future 

investments that grow the domestic semiconductor 

industry (such as through research and development, 

workforce training, or manufacturing investments) and 

not engage in stock buybacks.39

The CPO will strictly monitor the use of funds to 

ensure recipients are delivering on their commitments. 

This includes enforcing many important guardrails 

in the CHIPS Act, which cover appropriate uses of 

government funds, project delays, IP transactions that 

raise national security concerns, and investments in 

foreign countries of concern. The CPO may develop 

other guardrails, as needed and consistent with the 

law, to maximize the public purposes of federal investments and prevent recipients from seeking to evade 
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14

statutory requirements. The CPO will not hesitate to 

claw back funds or pursue other remedies if recipients 

misuse taxpayer dollars.

International Coordination 

The CPO, in partnership with the relevant Department 

bureaus and other agencies, will engage with allies 

that are providing funding for semiconductor production or developing critical R&D, workforce, and supply 

chain capability.

This engagement will advance the overall resilience of 

the American and allied semiconductor supply chains. 

International engagement will focus on improving 

transparency of market conditions, including sharing 

information on public investments and supply chain 

disruptions. Coordination will aim to mitigate risk of 

oversupply and ensure that U.S investments in manufacturing and R&D are strategic. Coordination will 

include efforts to reduce geographic concentration in 

upstream materials and downstream industries. The 

CPO, relevant Department bureaus and other agencies, will work with allies and partners to promote 

investment guardrails and national security commitments. Finally, coordination will seek to limit escalation 

of subsidies for the industry, promoting government 

funding that is necessary and appropriate.

The CPO and relevant Department bureaus will coordinate with the Department of State as it implements the 

CHIPS for America International Technology Security 

and Innovation Fund. The CPO and relevant Department 

bureaus will coordinate with the U.S. Agency for 

International Development, the Export-Import Bank, and 

the U.S. International Development Finance Corporation 

in their efforts to support international semiconductor 

supply chain activities and projects.

PART IV: CONSIDERATIONS FOR APPLICANTS 

FOR CHIPS INCENTIVES

The CPO will articulate clear eligibility, evaluation, and 

selection criteria for proposals for CHIPS incentives 

under the Section 9902 program. This section identifies some evaluation factors the CPO will consider that 

require long-term planning in order to give early guidance to potential applicants as they prepare to submit 

projects for consideration.

Increase Scale and Attract Private Capital.

The CHIPS program seeks to improve U.S. manufacturing capacity by increasing the number and scale 

of U.S. fabs and associated assembly, packaging, 

and testing facilities. When it comes to semiconductor fabrication, economies of scale matter. Largescale fabs are more competitive, more attractive for 

suppliers to co-locate, and more likely to see continued investments to extend their productive life. 

Yet, U.S. fabs average only about one-half the scale 

of an Asian fab.40 The CPO will encourage largescale investments that attract associated suppliers 

and workforce investments, thus catalyzing future 

upgrades and expansions, ensuring long-term economic viability.

Although $39 billion in federal funds and the ITC are 

crucial and significant investments, they will not be 

enough on their own to create the capacity needed 

for our national and economic security needs. Funding 

awards will be calibrated to provide the minimum federal investment required to attract significant private 

investment to create economically viable projects at 

sufficient scale. The Department encourages proposals that leverage private capital, both investments 

from the fab companies themselves as well as outside 

sources of capital. In addition to committing their own 

significant resources, semiconductor companies are 

encouraged to explore creative financing structures to 

tap a variety of sources of capital at different places 

on the risk-reward spectrum to reduce the overall cost 

of capital. Infrastructure funds and asset managers 

may find new investment opportunities in the sector 

due to the following factors: 

• The industry has seen reduced cyclicality and high

levels of utilization over the last decade, and

despite some near-term uncertainty of demand,

is expected to see robust long-term demand

growth for semiconductors across multiple end-use

industries.

• A fab project’s significant industrial infrastructure

needs (such as upgraded power grids, gas lines,

and water treatment facilities) and other local

infrastructure needs, such as housing and community amenities, may present familiar investment

opportunities.
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The Department plans to use loans and loan guarantees to leverage the impact of government grants. 

The Department can allocate up to $6 billion out of 

the $39 billion of total incentives to support loans and 

loan guarantees to covered entities. This $6 billion has 

a significant multiplier effect: the principal amount of 

financing available through loans and loan guarantees 

could be leveraged to support a $75 billion credit 

program. Applicants will be encouraged to consider 

loans or loan guarantees as part of their federal assistance application package. In addition to increasing 

the amount of available capital, government loans 

and guarantees may enable more flexible repayment 

terms, extend CHIPS benefits to a wider set of small 

manufacturers, and attract other lenders to step in 

with private debt financing. 

Leverage Collaborations to Build Out Semiconductor 

Ecosystems.

The CPO will encourage collaboration between industry stakeholders, investors, customers, designers, and 

suppliers; and international firms to attract investors, 

foster innovation, reduce risk, increase transparency, 

and ensure that investments are consistent with future 

market demand.

Such collaborations could include, but not be limited 

to:

• Purchase commitments and other initiatives to 

improve demand transparency: The Department 

encourages projects where a manufacturer secures 

commitments from one or more customers to 

purchase a share of the project’s output. Such 

commitments to purchase from an onshore project 

can help de-risk the project, attract more capital, 

and induce larger-scale, domestic investments. The 

Department encourages purchase commitments 

and collaborations across the supply chain to clarify 

future demand, improve transparency and trust, 

and mitigate the risk of future chip shortages or 

oversupply. These benefits are particularly valuable 

for mature logic, analog, and discrete technology 

projects that may be exposed to demand fragmentation and lower prices and margins.

• Enabling fabless design firms: Although much of 

the CHIPS program is focused on building fabs, the 

Department also encourages projects that enable 

fabless design firms to succeed. Projects that provide better access to design tools and IP, more flexible access to fab resources, and better portability 

of designs between fabs are encouraged. 

• Collaboration between producers and suppliers: 

The Department encourages collaboration, including consortium-like proposals, by semiconductor 

fabricators and their upstream suppliers (e.g., of 

substrates or specialty chemicals), equipment providers, and downstream partners (e.g., of assembly, 

test, and packaging). Such downstream activities 

will improve the resiliency of the entire supply chain 

but may be financially viable only when combined 

with U.S. fabrication investments. 

Secure Additional Financial Incentives and Support 

to Build Regional and Local Industry Clusters and 

Corridors That Strengthen Communities.

The 2021 NDAA requires that applicants demonstrate they have secured incentives from state or 

local government. Those incentives can take multiple 

forms, and can include workforce-related incentives, 

concessions with respect to real property, funding for 

R&D, and others to be specified in the future.41 The 

Department expects to prioritize support for projects 

that include state and local incentive packages with 

the potential for large spill-over benefits, are based on 

performance, and maximize regional and local competitiveness as well as economic gains, including supporting a robust semiconductor ecosystem rather than 

a single company. Examples of encouraged incentives 

include:

• Investments in industrial infrastructure that specifically support the proposed project, but that also 

could support broader development of a supplier 

ecosystem such as shared utility, logistics, and production capacity.

• Workforce investment to ensure broad talent 

pipelines.

• Long-term tax credits to ensure that firms continually invest in upgrading and expanding facilities to 

maintain competitiveness.
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Along with these incentives, the Department expects 

to prioritize funding for proposals that can move 

quickly, reduce project risk, demonstrate ample local 

support and/or regional cooperation, and provide 

broad-based benefits. State and localities could show 

this commitment in various ways, including:

• Expedited processes for environmental, health, and 

safety reviews and permits.

• Liaisons to assist with site selection, supplier discovery, and compliance with local laws. 

• A systems integrator that works with ecosystem 

companies to address shared issues like navigating 

permits, building infrastructure, finding workers, 

and coordinating incentive applications.

• Planning and support for other ancillary 

investments such as housing and community 

development.

• Where relevant, partnership with other states and 

localities to develop regional ecosystems and corridors that encompass multiple jurisdictions.

Establish a Secure and Resilient Semiconductor 

Supply Chain. 

In addition to providing direct financial assistance to 

produce secure and assured current generation and 

leading-edge chips from mature nodes for national 

security uses, the Department also seeks to improve 

the security of commercial semiconductor supply 

chains. The Department expects to prioritize projects 

that adhere to standards and guidelines on information security, data tracking and verification, and that 

collaborate on further development and adoption of 

such standards. 

U.S. national and economic security relies on access to 

semiconductors in the face of supply shocks. Recent 

government reports highlight a wide range of supply 

chain risks that can disrupt the operation of CHIPSfunded manufacturing facilities.42 The Department 

expects to prioritize investments that address these 

supply chain risks including, but not limited to, poor 

demand visibility, single sourcing and geographic 

chokepoints, transport and logistical bottlenecks, 

weather-related disruptions, counterfeiting and tampering, IP theft, and cybersecurity vulnerability.

Expand the Workforce Pipeline to Match Increased 

Domestic Capacity Workforce Needs.

The Department expects to encourage projects that 

include effective and creative workforce development 

solutions at the scale required to meet demand. A 

wide range of roles need to be filled, including process 

engineers, material scientists, industrial operations 

specialists, engineering technicians, equipment operators and installers, and specialty construction workers 

such as cleanroom architects, high-purity welders, and 

pipefitters. Meeting these goals will require creative 

recruitment and training efforts that provide opportunities for many people. Project proposals should 

include investments to scale proven models as well 

as ideas for pilot programs that are driven by market 

needs and are inclusive of populations that have traditionally been underrepresented in the industry. 

The Department also encourages programs that 

enable employers, training providers, workforce development organizations, labor unions, and other key 

stakeholders to work in partnership to create more 

paid training and experiential apprenticeship programs, and to hire based on skills, not just degrees. 

Proposals should consider recruitment strategies that 

include targeted outreach to economically disadvantaged individuals and to populations that may 

be underrepresented in the industry such as women, 

people of color, workers in rural areas, and veterans. To enable this outreach, the CPO will encourage 

proposals that include comprehensive wraparound 

supports like child care, transportation, language 

supports, high-speed internet, mentoring, and career 

counseling. Creating quality jobs will be key to 

attracting and developing talent. The Department 

expects to prioritize investments in projects that connect workforce training dollars to quality jobs that 

exceed the local prevailing wage for an industry in 

the region, including basic benefits (e.g., paid leave, 

health insurance, retirement/savings plan) and/or are 

unionized.

The potential of well-crafted workforce programs 

funded through the CHIPS program is to offer lifechanging opportunities for many individuals. The 

industry employs 277,000 people in semiconductor 

design, manufacturing, and related fields across 49 
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states, and those numbers will grow significantly due 

to the CHIPS program. More than one-third of the 

workers in the industry overall, and more than 60 

percent in semiconductor manufacturing, do not have 

a college degree. The average wage in the industry is 

$170,000 and nearly $100,000 in production occupations—both well above the average wage in the 

economy.43 While some occupations require years 

of specialized training, many do not; for a candidate 

with a technical associate degree or military experience, for instance, it could take just a few weeks to be 

trained as a technician and begin a career in the semiconductor industry. Applicants should consider how 

their workforce investments can create these exciting 

opportunities.

Create Inclusive and Broadly Shared Opportunities 

for Businesses. 

The Department seeks to ensure that CHIPS investments result in measurable benefits to small and 

underrepresented businesses, including minorityowned, veteran-owned and women-owned businesses, 

and businesses in rural areas. The Department expects 

to prioritize projects that proactively work to ensure 

that such businesses are included in construction contracts, the production supply chain, R&D, and investment opportunities generated by the CHIPS programs. 

Such efforts may include but are not limited to:

• Submit robust plans for outreach to small and 

minority-owned, veteran-owned, women-owned, 

and rural businesses for construction contracts, 

supplier contracts, or capital investments. 

• Establishing contracting, subcontracting, and 

payment processes where the requirement permits, which encourage participation by small- and 

minority-owned, veteran-owned, women-owned, 

and rural businesses.

• Using the services and assistance, as appropriate, of such organizations as the Minority Business 

Development Agency.

Financial Considerations

Applicants will be required to provide detailed 

project-specific and company-level financial data 

to ensure that CHIPS funds are meeting the economic and national security goals of the program. 

Forthcoming programmatic materials will detail 

financial considerations for CHIPS funding, addressing 

sponsor or other private sector contributions to project costs, project debt and equity ratios, repayment 

terms for loans and loan guarantees, fees and costs, 

and more. 

Financial assistance will be structured based on robust 

and transparent financial analysis of each project. The 

Department expects proposed projects to vary significantly; however, certain principles will govern the 

CPO’s approach to financial considerations.

• An executable plan to sustain the facility without further Section 9902 funding that covers the 

expected useful life of the facility receiving support. 

• The plan should make provisions for necessary 

investments and upgrades to ensure that the facility 

remains competitive and commercially viable for its 

useful life.

• The plan should rely on commercially reasonable 

assumptions for revenue, operating costs, cash 

flows, and other drivers of financial sustainability.

• The plan should not result in an outsized rate 

of return relative to commercially reasonable 

expectations.

• The plan should include an analysis of how the ITC 

will impact the financial results of the project.

CONCLUSION

The Department will conduct robust stakeholder 

engagement in implementing the CHIPS program, 

including requesting feedback on specific questions 

through RFIs, publishing an e-mail newsletter and frequently asked questions, and offering webinars. Stay 

informed about progress in implementing CHIPS for 

America by signing up for the CHIPS newsletter at 

<www.chips.gov>.

The CHIPS for America Fund represents a substantial commitment by the Biden-Harris Administration 

and Congress to extend the leadership of the United 

States in the semiconductor ecosystem, a key driver 

of national and economic security, and the foundation 

upon which next-generation innovations and industries are built. The Department of Commerce strives to 

put together a set of initiatives that reflect the goals 

of Congress and the Administration, address the challenges of industry, and provide an opportunity to build 

together a stronger and more secure future. 
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18

ENDNOTES

1

 The word “chips” in this document broadly refers to packaged 

microelectronic systems, devices, and components that involve the use 

of semiconducting materials. Different audiences tend to use different terms to refer to these items. For instance, technical and national 

security audiences often prefer the term “microelectronics”; economic 

literature often uses the term “semiconductors”; nontechnical and 

broader media audiences use the word “chips.” The CHIPS program 

statutes use all these terms. These terms are used colloquially and 

interchangeably in this document. The document does not contain an 

official definition of the term “semiconductor” or any of these other 

terms for statutory purposes. The Department will provide official 

definitions in future programmatic guidance. 2 Pub. L. No. 116-283, tit. XCIX, §§ 9902, 9906 (2021) (codified at 15 

U.S.C. §§ 4652, 4656). 3 CHIPS Act of 2022, Pub. L. No. 117-167, Div. A (2022) (“CHIPS Act 

of 2022”). 4 15 U.S.C. § 4652(a)(1).

5 15 U.S.C. §§ 4652; 4659(a)(1).

6 CHIPS Act of 2022, § 102(a)(2). 

7 Refer to Refer to 15 U.S.C. § 4656.

8 CHIPS Act of 2022, § 102(a)(2).

9 15 U.S.C. § 4652(a)(2)(B)(ii).

10 15 U.S.C. § 4656(c)(2)(C).

11 Executive Order Number 14,080, 87 Federal Register 52,847 (Aug. 

25, 2022). 12 15 U.S.C. § 4656(a).

13 26 U.S.C. § 48D.

14 Id.

15 Executive Order Number 14,017, 86 Federal Register 11,849 

(Mar. 1, 2021). 16 “Building Resilient Supply Chains, Revitalizing American 

Manufacturing, and Fostering Broad-based Growth,” The White House, 

June 2021. 17 “Notice of Request for Public Comments on Risks in the 

Semiconductor Supply Chain,” 86 Federal Register 53,031 (Sept. 24, 

2021), <www.federalregister.gov/d/2021-20348>. 18 “Semiconductors: US industry, global competition, and federal 

policy,” Congressional Research Service, October 2020. 19 Various reports by Semiconductor Industry Association 

and Boston Consulting Group including “2021 State of the US 

Semiconductor Industry,” September 2021; “Strengthening the Global 

Semiconductor Supply Chain in an Uncertain Era,” April 2021; and 

“Government Incentives and US Competitiveness in Semiconductor 

Manufacturing,” September 2020. 20 Department of Commerce analysis of data from SEMI World Fab 

Forecast dataset. 21 Various reports by Center for Security and Emerging Technology 

including “Sustaining US Competitiveness in Semiconductor 

Manufacturing: Priorities for CHIPS Act Incentives,” January 

2022 and “The Semiconductor Supply Chain: Assessing National 

Competitiveness,” January 2021. 22 “The Semiconductor Decade: A Trillion-Dollar Industry,” McKinsey 

& Company, April 2022. 23 “Government Incentives and U.S. Competitiveness in 

Semiconductor Manufacturing,” Semiconductor Industry Association, 

September 2020. 24 For an example, refer to “American innovation, American growth,” 

The Semiconductor Alliance, November 2021; also see “Accelerating 

Semiconductor Research, Accelerating America,” American 

Semiconductor Innovation Coalition, March 2022.

25 For an example, refer to “After Moore’s Law,” The Economist’s 

Technology Quarterly, March 2016. The topic is covered in various 

other ways in both technical and nontechnical literature. For instance, 

technical literature points to the end of both Dennard Scaling and 

Moore’s Law (John L. Hennessy and David A. Patterson, “A New Golden 

Age for Computer Architecture,” Turing Lecture, June 2018). Nature 

magazine calls attention to the International Technology Roadmap for 

Semiconductors and its shift in focus from Moore’s Law to the More 

than Moore strategy (“The Chips Are Down for Moore’s Law,” Nature, 

February 2016). And economists who monitor the quality-adjusted 

price of IT equipment, and underlying semiconductor device prices, 

point to a significant deceleration in the historical decline of qualityadjusted prices after 2005. 26 “Semiconductor Design and Manufacturing: Achieving LeadingEdge Capabilities,” McKinsey & Company, August 2020. 27 Refer to Udit Gupta, et al., “Chasing Carbon: The Elusive 

Environmental Impact of Computing,” Proceedings of the 2021 IEEE 

International Symposium on High-Performance Computer Architecture, 

February 2021. 28 “When the Chips Are Down: Preventing and Addressing Supply 

Chain Disruptions,” The White House, September 23, 2021. 29 “Economic Report of the President,” (Chapter 6). The White 

House, April 2022. 30 “Economic Report of the President,” (Chapter 6&7). The White 

House, April 2022. 31 15 U.S.C. § 4651(2).

32 15 U.S.C. § 4652(a)(1).

33 15 U.S.C. § 4652(i).

34 15 U.S.C. § 4657.

35 The CHIPS Act of 2022 makes available 2 percent of program 

funds for salaries and expenses, administration, and oversight purposes to carry out the semiconductor incentives program. CHIPS Act 

of 2022, § 102(a)(2)(B)(ii). 36 United States Bureau of Labor Statistics, Current Employment 

Statistics dataset. This 185,000 employment figure covers semiconductor manufacturing jobs only. 277,000 people are employed in the 

broader semiconductor industry, including manufacturing, design, and 

related fields. 37 “Reshoring Advanced Semiconductor Packaging: Innovation, 

Supply Chain Security, and US Leadership in the Semiconductor 

Industry,” Center for Security and Emerging Technology, June 2022. 38 “Tape-out” refers to the end of the design process, when the 

electronic design file for a new integrated circuit is used to create a 

photomask that is then used in the fabrication process. 39 “Taxpayer Protections,” CHIPS.gov, <www.nist.gov/chips/

taxpayer-protections>. 40 “Government Incentives and US Competitiveness in 

Semiconductor Manufacturing,” Semiconductor Industry Association, 

September 2020. 41 Refer to 15 U.S.C. § 4651(3).

42 Refer to “Building Resilient Supply Chains, Revitalizing American 

Manufacturing, and Fostering Broad-Based Growth: 100-Day Reviews 

Under Executive Order 14017,” report by White House, June 2021, 

including a review of semiconductor manufacturing and advanced 

packaging. Also refer to “Assessment of the Critical Supply Chains 

Supporting the US Information and Communication Technology 

Industry,” prepared by U.S. Department of Commerce and U.S. 

Department of Homeland Security, February 2022. 43 “Chipping In,” report by Semiconductor Industry Association on 

the impact of the semiconductor industry on the American workforce, 

May 2021.
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