# Patent

## Title
VA metering in delta-wired electrical service

## Abstract

An arrangement includes an A/D converter and a processing circuit. The A/D converter is configured to generate digital samples of voltage and current waveforms in a polyphase electrical system. The processing circuit is operably coupled to receive the digital samples from the A/D converter. The processing circuit configured is to obtain contemporaneous phase current and voltage samples IA, IB, IC and/or IN, and VA, VB, VC. The processing circuit is further configured to determine at least ICB sample values based on three of the current samples of IA, IB, IC, and IN, and determine a VA value based at least in part on ICB. The processing circuit is further configured to provide information representative of the VA calculation to one of a group consisting of a display, a communication circuit, a memory and a billing calculation unit.

## Background
FIELD OF THE INVENTION
The present invention relates generally to electricity measurements, and more particularly, to apparent power (VA) and apparent energy (VAh) measurements.
BACKGROUND
One of the goals of electricity metering is to accurately measure the use or consumption of electrical energy resources. With such measurements, the cost of generating and delivering electricity may be allocated among consumers in relatively logical manner. Another goal of electricity metering is help identify electrical energy generation and delivery needs. For example, cumulative electricity consumption measurements for a service area can help determine the appropriate sizing of transformers and other equipment.
Electricity metering often involves the measurement of consumed power or energy in the form of watts or watt-hours. Real energy or active energy measurements (expressed in watt-hours or wh) relate directly to the actual energy that the load requires. However, the amount of watts supplied to a load does not necessarily reflect the amount of power that must be produced by the source. In particular, the amount of load watts, or load watt-hours, does not necessarily accurately relate to the size of the service (transformers size, size of power lines, etc.) needed to supply the load. This is due in part to loads that have significant capacitive and/or inductive components. In such loads, the actual energy consumption in watt-hours can be significantly less than the apparent energy (expressed as “VA-hours” or “VAh”) that must be produced by the energy source.
For example, consider two loads: a first load consuming 240 watts at 120 volts and which is completely resistive, and a second load consuming 240 watts at 120 volts and having a phase difference between voltage and current of 30°. Using the basic AC power consumption equation

Watts=VrmsIrms cos θ,  (1)

, where θ is the phase angle between voltage and current, it can be seen that the first load requires 2 amps of current because I=240/(120*cos 0°), while the second load requires 2.31 amps of current because I=240/(120*cos 30°). While the actual watt-hour consumption of the second load is the same as the first load, the second load requires more current, which can affect sizing of power lines, transformers, etc. Consequently, it can be desirable to measure VA or VAh to help in determining the size of the source, i.e. transformers size, size of the power lines, etc., needed to supply the load.

Moreover, in a case of a customer that consumes significantly more VA than watts, the metering of only watt-hours will not accurately identify the customer's proportional cost of the power delivery equipment. For this reason a more complex rate structure involving VA or VA-hours is often used to recover the investment costs for such items as transformers and power lines etc. providing energy to the load. As a consequence, many electricity meters, particularly for larger non-residential loads, have at least some capability to measure VA or VA-hours.
The calculation of VA or VA-hours in single phase systems is relatively straight forward when the signals are pure sine waves. However, if harmonics are present in the power line signal, then the calculations of VA and the practical significance of the calculated VA becomes more complex.
One common method of calculating VA involves multiplying the RMS voltage by the RMS current, or in other words VA=VRMS*IRMS. Converting VA to VA-hours, as is well known in the art, merely involves integrating the VA values over time. For example, the VA value may be calculated at 0.333 second intervals, with each calculation considered to be the VA consumption over that 0.333 second, or approximately 1/10,800th of an hour. These values are then accumulated to provide a running meter of consumed VA-hours. Because such calculations are routine, the terms VA and VA-hours may be used somewhat interchangeably herein, with the understanding that VA-hours may always be calculated from VA values.
In any event, a second common method of calculating VA involves first determining the value of the reactive power, also known as VAR (Volt Amp Reactive), and the real or active power in watts. The VAR value may be calculated using the equation VAR=VRMS*IRMS*sin θ, or by sampling voltage and current and multiplying samples of voltage and current that are 90° phase separated in the AC line cycle. The method then involves deriving VA using the formula VA=√{square root over (Watt2+VAR2)}. If harmonics are present in the power line signal, then the use of the formula VA=√{square root over (Watt2+VAR2)} to calculate VA will yield a result that is less than that calculated from the RMS values of voltage and current, VA=VRMS*IRMS. Because of this inaccuracy, sometimes a 3rd quantity, distortion power (DP) is sometimes added as follows:

VA=√{square root over (Watt2+VAR2+DP2)}.  (2)

The above equations relate generally to single phase systems. In a polyphase system, the calculation of VA is more complex and the practical significance of what is calculated goes beyond that of single phase systems. In particular, the two methods of calculating VA (or VAh) described above for single phase systems do not necessarily yield the same results if applied to polyphase systems even under conditions of pure sine wave signals.
In one method, VA is calculated from the RMS values of the individual phase voltages and currents for each of a polyphase system, and then the VA value for the different phases is totaled. In other words, the VA of each phase is determined using VA=VRMS*IRMS and then the total VA is calculated by simply adding the individual VA of each phase. This method of calculating VA is sometimes referred to as “RMS VA” (VARMS) or “arithmetic VA”. Arithmetic VA is identified as being most accurate with respect to the source or service side of the electrical system, and not the load side.
In another method, the VA is calculated using watts and VAR. In this method, the total amount of watts for all three phases is determined, and the amount of VAR for all three phases is determined. The total VA is then calculated using the formula VA=√{square root over (Watt2+VAR2)} where Watt and VAR represent the total load watt and VAR respectively. This method of calculating VA is sometimes referred to as “vector VA” (VAV). Vector VA is considered to be more accurate with the load side of the electrical system.
Further detail regarding the calculation of arithmetic or source VA and the calculation of vector or load VA for many types of electrical service is provided in U.S. Pat. No. 7,747,400, which is incorporated herein by reference in its entirety. In U.S. Pat. No. 7,747,400, a meter is disclosed that includes various methods of calculating that can be selected by a technician.
While the meter disclosed in U.S. Pat. No. 7,747,400 provides many useful metered VA values, it does not provide a source or arithmetic VA calculation for four-wire delta electrical services. Accordingly, there is a need for a meter that can calculate, among other things, VA in four-wire delta electrical services. Other known methods are inaccurate, particularly for unbalanced loads.
A particular need is for a method of measuring VA that accurately estimates or represents the VA at the source, which can provide better information for the sizing of transformers and other equipment.
SUMMARY OF THE INVENTION
A first aspect of the invention is a meter that is operable to implement an appropriate VA calculation within an electricity meter in a four-wire service based on values normally measurable and available within the meter.
At least one embodiment of the invention is an arrangement that includes an A/D converter and a processing circuit. The A/D converter is configured to generate digital samples of voltage and current waveforms in a polyphase electrical system. The processing circuit is operably coupled to receive the digital samples from the A/D converter. The processing circuit configured is to obtain contemporaneous phase current and voltage samples IA, IB, IC and/or IN, and VA, VB, VC. The processing circuit is further configured to determine at least ICB sample values based on three of the current samples of IA, IB, IC, and IN, and determine a VA value based at least in part on ICB. The processing circuit is further configured to provide information representative of the VA calculation to one of a group consisting of a display, a communication circuit, a memory and a billing calculation unit.
In another embodiment, the processing circuit is further configured to generate the ICB sample value based on the equation 1⁄6IB−1⁄6IA+1⁄2IC. In still other embodiments, the processing circuit is further configured to generate a plurality of the ICB sample values, and generate a magnitude value of the plurality of the ICB sample values.
In another embodiment, the processing circuit is further configured to determine the VA value further using a magnitude of the voltage from phase C to phase B, and is configured to obtain the voltage magnitude by generating a plurality of the VCB sample values, each CCB sample value comprising a difference between a phase C sample and a contemporaneous phase B sample, and generating a VCB magnitude value using the plurality of the VCB sample values.
In yet another embodiment, the processing circuit then determines the VA value based at least in part on the product of the generated magnitude value of the current from phase C to phase B on the source side, and a magnitude of a voltage from phase C to phase B.
In another embodiment, the processing circuit is further configured to generate an ICA sample value based on the equation 1⁄6IB−1⁄6IA+1⁄2Ic. In still other embodiments, the processing circuit is further configured to generate a plurality of the ICA sample values, and generate a magnitude value of the plurality of the ICA sample values.
In another embodiment, the processing circuit is further configured to determine the magnitude of the voltage from phase C to phase A by generating a plurality of the VCA sample values, each VCA sample value comprising a difference between a phase C sample and a contemporaneous phase A sample, and generating a VCA magnitude value using the plurality of the VCA sample values.
In yet another embodiment, the processing circuit then determines the VA value based at least in part on the product of the generated magnitude value of the current from phase C to phase A on the source side, and a magnitude of a voltage from phase C to phase A.
In another embodiment, the processing circuit is further configured to generate the IBN sample value based on the equation 5⁄6IB+1⁄6IA+1⁄2IC. In still other embodiments, the processing circuit is further configured to generate a plurality of the IBN sample values, and generate a magnitude value of the plurality of the IBN sample values.
In yet another embodiment, the processing circuit then determines the VA value based at least in part on the product of the generated magnitude value of the current from phase B to neutral on the source side, and a magnitude of a voltage on phase B.
In another embodiment, the processing circuit is further configured to generate the IAN sample value based on the equation 5⁄6IA+1⁄6IB+1⁄2IC. In still other embodiments, the processing circuit is further configured to generate a plurality of the IAN sample values, and generate a magnitude value of the plurality of the IAN sample values.
In yet another embodiment, the processing circuit then determines the VA value based at least in part on the product of the generated magnitude value of the current from phase A to neutral on the source side, and a magnitude of a voltage on phase A.
In some embodiments, the processing circuit is further configured to generate the VA value based on the equation:




  
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wherein {right arrow over (VCB)} is a vector value of the voltage from phase C to phase B, {right arrow over (ICB)} is vector value representative of the current from phase C to phase B at the source, {right arrow over (VCA)} is a vector value of the voltage from phase C to phase A, {right arrow over (ICA)} is a vector value representative of the current from phase C to phase A at the source, {right arrow over (VB)} is a vector value of the voltage from phase B to neutral, {right arrow over (IBN)} is a vector value representative of the current from phase B to neutral at the source, {right arrow over (VA)} is a vector value of the voltage from phase A to neutral, and {right arrow over (IAN)} is a vector value representative of the current from phase A to neutral at the source.

The above described features and advantages, as well as others, will become more readily apparent to those of ordinary skill in the art by reference to the following detailed description and accompanying drawings.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows an exemplary meter that may be used in one or more embodiments of the present invention;
FIG. 2 shows a measurement arrangement in which an embodiment of the invention may be employed; and
FIGS. 3A-3C show a flow diagram of the operation of a processing circuit of an arrangement for calculating VA in accordance with at least one embodiment of the present invention.



DETAILED DESCRIPTION
FIG. 1 shows an exemplary embodiment of a polyphase electricity meter 10 in which an arrangement according the invention is implemented. Referring to FIG. 1 specifically, the meter 10 is an apparatus for measuring energy consumption that includes a scaling circuit 110, an analog-to-digital conversion (“ADC”) circuit 114, a processing circuit 116, a communication circuit 118, an optional display 120 and a data store 112. All of the above listed elements are preferably supported by a meter housing 113, which may take a plurality of known forms. The communication circuit 118 may be disposed within an interior of the meter housing 113 like the other devices, or may be affixed to the outside of the meter housing 113.
In the embodiment described herein, the scaling circuit 110 and the ADC circuit 114 are arranged to generate digital signals representative of line voltage waveforms VA, VB, VC for each of three phases A, B, C of a four-wire delta electrical system and other digital signals representative of at least three of the four line current waveforms IA, IB, Ic and IN of the four-wire delta electrical system. As will be discussed below, however, the meter 10 may readily be configured for a three-wire delta electrical service, as well as other types of electrical service. The digital signals are typically sequences of digital samples representative of an instantaneous voltage or current measurement on one phase with respect to either neutral or another phase. Circuits capable of generating such signals are known in the art.
The processing circuit 116 is configured to calculate one or more energy consumption values based on the digital signals. The energy consumption values may be communicated to a remote device using the communication circuit 118, displayed using the display 120, stored in the data store 112, or preferably some combination of the foregoing. In accordance with the embodiments described herein, the processing circuit 116 is further operable to perform any or all of the VA calculations described herein.
In a further detailed description of the meter 10 of FIG. 1, the scaling circuit 110 may suitably comprise current and voltage sensors, not shown. The voltage sensors, which may, for example, include voltage dividers, generate a scaled down version of the voltage present on phases of the power lines 12. The current sensors, which may suitably include current transformers, shunts, embedded coil devices and the like, generate a voltage or current signal that is a scaled down version of the current present on the phases of the power lines 12. Various voltage and current sensors are known in the art.
The ADC circuit 114 includes one or more analog-to-digital converters that convert the scaled measurement signals into digital voltage and current measurement signals. Many circuits capable of generating digital voltage and circuit waveform signals are well known in the art. Suitable examples of analog to digital conversion circuits having such capabilities are described in U.S. Pat. Nos. 6,374,188; 6,564,159; 6,121,158 and U.S. Pat. No. No. 5,933,004, all of which are incorporated herein by reference. Moreover, the ADC circuit 114 may readily be a part of an integrated metering chip package, as will be discussed below.
The processing circuit 116 is a device that employs one or more processing devices such as microprocessors, microcontrollers, digital signal processors, discrete digital circuits and/or combinations thereof. As mentioned above, the processing circuit 116 is operable to generate energy consumption data based on the digital signals. In one example, the processing circuit 116 generates watt-hour information based on an accumulation of products of contemporaneous voltage and current samples. For example, true watt-hours for a particular phase may be calculated as the vector product of the current waveform and the voltage waveform. This vector product may be carried out with sampled voltage (Vn) and sampled current (In) by the formula:

Whrs=ΣVn*In.  (3)

where Whrs is an accumulated energy value (i.e. watt-hours) for a time frame from a starting time no to a time corresponding to n.

In addition, the processing circuit 116 preferably calculates VA and/or VAh using one or more of the methods described herein. Thus, the processing circuit 116 may generate VA, VAh, watt-hours, VAR-hrs, power factor, root-mean-square voltage and/or current, or combinations of any of the foregoing. Various processing circuits operable to generate energy consumption data from digital voltage and digital current measurement signals are well known in the art. Suitable examples of such circuits are described in U.S. Pat. Nos. 6,374,188; 6,564,159; 6,121,158 and U.S. Pat. No. 5,933,004. However, in one preferred embodiment, the processing circuit is (or includes) a processing element of a metering integrated circuit chip such as the Teridian 71M6533 measurement chip (available from Maxim). In that embodiment, both the ADC circuit 114 and the processing circuit 116 are disposed within the same semiconductor package.
More specifically, the processing circuit 116 in one embodiment is configured (i.e. programmed and/or arranged) to generate a first VA calculation if configuration data identifies that a source VA calculation is selected, the first VA calculation providing a determination of a VA quantity that more accurately represents a source VA than a corresponding determination of a second VA calculation. The processing circuit 116 is also configured to generate a second VA calculation if the configuration data identifies that load VA is selected, the second VA calculation providing a determination of a VA quantity that more accurately represents a load VA than a corresponding determination of the first VA calculation. The configuration data identifying whether a source VA or load VA is to be calculated may suitably be stored in the data store 112 or other memory, or merely be stored in a buffer or register that receives user input or a communication input. The processing circuit 116 is further operable to provide the VA calculation to one of a group consisting of the display 120, the communication circuit 118, and a billing calculation unit within the processing circuit 116 or elsewhere.
To this end, the processing circuit 116 is configured to prompt the user to select either “source VA” or “load VA”, or some other indication that VA is to be calculated from the perspective of the electricity source, or from the perspective of the load. The prompting may occur via interactive display using the display 120 and the communication circuit 118, or by other means. For example, the meter 10 may be configured in a configuration facility, not shown, but which are known in the art, where configuration information (e.g. types of measurements to be taken, display features and/or calibration information) is programmed to a memory (i.e. data store 112). In accordance with some embodiments of the invention, the configuration operation would further include selection of “source VA” or “load VA”. To this end, the meter display 120 (or an external configuration device display, not shown) would provide the user with a selection of whether a VA calculation should be one that is representative of “source VA”, or whether the VA calculation should be one that is representative of “load VA”. The user would then program the meter with a selection based on whether source VA or load VA is desired.
When the meter 10 is subsequently installed for use, the meter 10 performs a VA determination based on the stored configuration information of the user selection. If the user had selected source VA, then the processing circuit 116 automatically configures its metering operation to perform an arithmetic VA calculation. If, however, the user had selected load VA, then the processing circuit 116 automatically configures its metering operation to perform a vector VA calculation.
The processing circuit 116 is further operable to store the plurality of energy consumption values in the data store 112. In some embodiments, the processing circuit 116 may store energy consumption values for each of plurality of time periods, in order to allow analysis of energy usage at different times of day, days of the week or month, or even seasonally. The storage of consumption indexed to time periods is often referred to in the industry as “load profiling”. The data store 112 may suitably be a random access memory, EEPROM, other memory, or a combination of several types of memory. In still other embodiments, the data store 112 may include a circular buffer, FIFO device, or other memory that stores data in the order in which it is received. Other known methods may be used. In at least some embodiments, the data store 112 includes memory located within the integrated package that houses the processing circuit 116. The data store 112 also includes a software program that is executed by the processing circuit 116 to perform the operations of the processing circuit 116 described herein, including those of FIGS. 3A-3C.
The communication circuit 118 is a device that is in some embodiments configured to communicate data between the metering unit 12 and one or more remote devices. In a system such as that shown in FIG. 1, the communication circuit 118 would be operable to communicate directly or indirectly with a data collection system of a utility service provider. Several of such systems are known. The utility service provider then uses the collected data to generate billing information and/or data forecasting information as is known in the art. To this end, the communication circuit 118 may suitably include a radio, a telephone modem, a power line carrier modem, or other known communication device configured for use with utility meters. Radios may be used that operate in the 100 MHz to 1 GHz range. However, other devices may operate in the kHz or low MHZ range. In addition or in the alternative, the communication circuit 118 is configured to communicate with a locally coupled device, such as a reed switch, portable computing device, or other device. The communication circuit 118 may include an optical or electrical data port, not shown, for this purpose.
The meter display 120, which is optional, may be a digital display such as a liquid crystal display. It will be appreciated that the exact nature of the display is not particularly important to the implementation of the invention. Nevertheless, there is an advantage of including at least some display capabilities. LCD displays, moreover, have been found to have a particularly advantageous set of qualities for use in electronic meters.
As discussed above, the processing circuit 116 in one embodiment is configured to generate a selected one of a source VA value or a load VA value. This value may be used for billing purposes, for planning purposes and/or other analysis purposes. The VA value may be blended with other values, such as watt-hours or watts, or even reactive power.
As also discussed above, if a source VA is to be implemented, then the processing circuit 116 performs an arithmetic VA calculation. If a load VA is to be implemented, then the processing circuit 116 performs a vector VA calculation. As discussed above, as well as in U.S. Pat. No. 7,747,400, the vector VA is a fundamentally different calculation compared to arithmetic VA and sometimes yields different results. In general, the processing circuit 116 may be configured to determine vector or arithmetic VA for single phase, four-wire wye, and three-wire delta systems as discussed in the U.S. Pat. No. 7,747,400. Moreover, the processing circuit 116 may determine the vector VA or load VA as discussed further above and as is known in the prior art. The VA values may suitable be accumulated over time to provide VAh as is known.
However, in contrast to the prior art, at least some embodiments of the invention determine source VA (i.e. and/or VAh) as discussed below in connection with FIGS. 2 and 3A-3C.
FIG. 2 show a schematic representation of the meter 10 coupled between a source 200 and a load 201 in a four-wire delta electrical service. The four-wire delta electrical source 200 includes a delta power source (transformer) as is known in the art. The electrical source 200 is operably coupled to provide three-phase delta-wired electrical service to the load 201 via a phase A line 212, a phase B line 214, a phase C line 216 and a neutral line 218 defined between the phase A line 212 and the phase B line 214. As is known in the art, the meter 10 generally meters the energy (and related values) delivered to the load 201 from the source 200. The load 201 includes elements of a customer load, and may include resistive, inductive and/or capacitive loads. The load 201 may be balanced, or may be imbalanced, meaning that different loads may be connected from phase A to phase B, from phase B to phase C, from phase C to phase A, and/or additional loads may be connected from phase A to neutral, phase B to neutral and/or phase C to neutral.
In general, the meter 10 is operably connected to obtain the voltage measurements VA, VB, and VC, and the current measurements IA, IB, IC and IN. More specifically, the scaling unit 110 is operably coupled to generate voltage measurement signals VA, VB, VC, IA, IB, IC and IN, and provide those signals to the ADC circuit 114. In several embodiments described herein, only three of the four current values IA, IB, IC and IN need be digitized and stored. Typically IN is not digitized.
The signal VA represents a scaled version of the voltage from the phase A line 212 to neutral 218. The signal VB represents a scaled version of the voltage from the phase B line 214 to neutral 218, and the signal VC represents a scaled version of the voltage from the phase C line 216 to neutral 218. The signal IA represents a scaled version of the current on the phase A line 212, signal IB represents a scaled version of the current on the phase B line signal 214, and IC represents a scaled version of the current on the phase C line 216. The signal IN represents a scaled version of the current on the neutral line 218.
The ADC circuit 114, in turn, samples each of the waveforms VA, VB, VC, IA, IB, IC and IN, and generates corresponding digital sample streams VA(s), VB(s), VC(s), IA(s), IB(s), Ic(s), and IN(s). The value s represents a sample index, which corresponds directly to a time increment. The sample rate s/sec is typically many times the cycle frequency of the AC waveform, such that the samples collective provide an accurate sampled representation of the corresponding analog waveform. The operations of the scaling unit 110 and the ADC circuit 114 as discussed above are conventional.
The processing circuit 116 then calculates load watt-hrs by multiplying the voltage vector of each phase with the current vector of each phase, and accumulating the resulting products. Using sampling, the processing circuit 116 may suitably perform the following calculations:

Watt-hrA=Σ(VA(s)*IA(s))  (5)

Watt-hrB=Σ(VB(s)*IB(s))  (6)

Watt-hrC=Σ(VC(s)*IC(s))  (7)

Watt-h=Watt-hrA+Watt-hrB+Watt-hrC  (8)

wherein Vx(s) is the sampled voltage at a time s on phase x at the meter 10, and Ix(s) is the sampled current at a time s on phase x at the meter 10. In the above equations, the term Watt-hr is actually an energy measurement in terms of watt-hrs.

The processing circuit 116 may suitably calculate vector (or load) VARs using the equation using 90 phase degree delayed current measurements, as is known.

VARA=Σ(VA(s)*IA(s−90°))  (9)

VARB=Σ(VB(s)*IB(s−90°))  (10)

VARC=Σ(VC(s)*IC(s−90°))  (11)

VAR=VARA+VARB+VARC  (12)

With these two values Watt-hr and VAR, the vector Vector_VA may be calculated as:

Vector—VA=√{square root over (Watt2+VAR2)}  (13)

On the other hand, the processing circuit 116 calculates source VA or arithmetic VA using the following vector equation:




  
    
      
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wherein {right arrow over (VCB)} is a vector value of the voltage from phase C to phase B, {right arrow over (ICB)} is representative of the current from phase C to phase A at the source 200, {right arrow over (VCA)} is a vector value of the voltage from phase C to phase A, {right arrow over (ICA)} is a vector value representative of the current from phase C to phase A at the source 200, {right arrow over (VB)} is a vector value of the voltage from phase B to neutral, {right arrow over (IBN)} is a vector value representative of the current from phase B to neutral at the source 200, {right arrow over (VA)} is a vector value of the voltage from phase A to neutral, and {right arrow over (IAN)} is a vector value representative of the current from phase A to neutral at the source 200.

The voltage vectors




  
    
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may readily be determined in any suitable manner based on the digital measurement signals VA(s), VB(s), and VC(s) received from the ADC circuit 114. The current vectors





  
    
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are determined as described below:





  
    
      
        
          
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              .
            
          
        
      
    
    
      
        (
        16
        )
      
    
  
  
    
      
        
          
            I
            BN
          
          →
        
        =
        
          
            
              5
              6
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          +
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          +
          
            
              1
              2
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        17
        )
      
    
  
  
    
      
        
          
            I
            AN
          
          →
        
        =
        
          
            
              5
              6
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          +
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          +
          
            
              1
              2
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        18
        )
      
    
  




It can be seen that source or arithmetic SVA does not equal load or vector vector_VA in this case. The vector equations for determining SVA are based on the assumption that the internal resistance on each leg of the source 200 is relatively similar. It will further be appreciated that the calculation of source VA or SVA as described above does not require a neutral current measurement.
It will be appreciated that if the current measurement IN is readily available, then alternative versions of the above referenced equations may be used. In fact, so long as vector values for any three of the currents IA, IB, IC, IN are available at the load 201 (or anywhere), values representative of the vector currents




  
    
      I
      CB
    
    →
  
  ,
  
    
      I
      CA
    
    →
  
  ,
  
    
      I
      BN
    
    →
  
  ,
  
    and
    ⁢
    
      
    
    ⁢
    
      
        I
        AN
      
      →
    
  




at the source can be generated. In particular, the current vectors,





  
    
      I
      CB
    
    →
  
  ,
  
    
      I
      CA
    
    →
  
  ,
  
    
      I
      BN
    
    →
  
  ,
  
    and
    ⁢
    
      
    
    ⁢
    
      
        I
        AN
      
      →
    
  




may alternatively be determined implementing the following vector equations:





  
    
      
        
          
            I
            CB
          
          →
        
        =
        
          
            
              1
              3
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          +
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              2
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        19
        )
      
    
  
  
    
      
        
          
            I
            CA
          
          →
        
        =
        
          
            
              1
              3
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          +
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              2
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        20
        )
      
    
  
  
    
      
        
          
            I
            BN
          
          →
        
        =
        
          
            
              2
              3
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          -
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        21
        )
      
    
  
  
    
      
        
          
            I
            AN
          
          →
        
        =
        
          
            
              2
              3
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          -
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        22
        )
      
    
  




In another alternative, using only IA, IC and IN, the current vectors,





  
    
      I
      CB
    
    →
  
  ,
  
    
      I
      CA
    
    →
  
  ,
  
    
      I
      BN
    
    →
  
  ,
  
    and
    ⁢
    
      
    
    ⁢
    
      
        I
        AN
      
      →
    
  




may also be determined:





  
    
      
        
          
            I
            CB
          
          →
        
        =
        
          
            
              1
              3
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          +
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              2
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        23
        )
      
    
  
  
    
      
        
          
            I
            CA
          
          →
        
        =
        
          
            
              -
              
                1
                3
              
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          -
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        24
        )
      
    
  
  
    
      
        
          
            I
            BN
          
          →
        
        =
        
          
            
              -
              
                2
                3
              
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          -
          
            
              5
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          -
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        25
        )
      
    
  
  
    
      
        
          
            I
            AN
          
          →
        
        =
        
          
            
              2
              3
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          -
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        26
        )
      
    
  




In yet another alternative, using only IB, IC and IN, the current vectors,





  
    
      I
      CB
    
    →
  
  ,
  
    
      I
      CA
    
    →
  
  ,
  
    
      I
      BN
    
    →
  
  ,
  
    and
    ⁢
    
      
    
    ⁢
    
      
        I
        AN
      
      →
    
  




may also be determined:





  
    
      
        
          
            I
            CB
          
          →
        
        =
        
          
            
              -
              
                1
                3
              
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          -
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        27
        )
      
    
  
  
    
      
        
          
            I
            CA
          
          →
        
        =
        
          
            
              1
              3
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          +
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              2
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        28
        )
      
    
  
  
    
      
        
          
            I
            BN
          
          →
        
        =
        
          
            
              2
              3
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          -
          
            
              1
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          +
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        29
        )
      
    
  
  
    
      
        
          
            I
            AN
          
          →
        
        =
        
          
            
              -
              
                2
                3
              
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          -
          
            
              5
              
                6
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          -
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  C
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        30
        )
      
    
  




In still another embodiment using only IA, IB and IN, the current vectors,





  
    
      I
      CB
    
    →
  
  ,
  
    
      I
      CA
    
    →
  
  ,
  
    
      I
      BN
    
    →
  
  ,
  
    and
    ⁢
    
      
    
    ⁢
    
      
        I
        AN
      
      →
    
  




may also be determined:





  
    
      
        
          
            I
            CB
          
          →
        
        =
        
          
            
              -
              
                1
                3
              
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          -
          
            
              1
              
                2
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          -
          
            
              2
              3
            
            ⁢
            
              
                
                  I
                  B
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        31
        )
      
    
  
  
    
      
        
          
            I
            CA
          
          →
        
        =
        
          
            
              -
              
                1
                3
              
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          -
          
            
              1
              
                2
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          -
          
            
              2
              3
            
            ⁢
            
              
                
                  I
                  A
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        32
        )
      
    
  
  
    
      
        
          
            I
            BN
          
          →
        
        =
        
          
            
              1
              3
            
            ⁢
            
              
                I
                B
              
              ⇀
            
          
          -
          
            
              1
              
                2
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          -
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  A
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        33
        )
      
    
  
  
    
      
        
          
            I
            AN
          
          →
        
        =
        
          
            
              1
              3
            
            ⁢
            
              
                I
                A
              
              ⇀
            
          
          -
          
            
              1
              
                2
                ⁢
                
                  
                
              
            
            ⁢
            
              
                I
                N
              
              ⇀
            
          
          -
          
            
              1
              3
            
            ⁢
            
              
                
                  I
                  B
                
                ⇀
              
              .
            
          
        
      
    
    
      
        (
        34
        )
      
    
  




It will be appreciated that equation (14) employs the magnitudes of the various vector values discussed above. The processing circuit 116 actually generates the magnitudes of the vector values




  
    
      I
      CB
    
    →
  
  ,
  
    
      I
      CA
    
    →
  
  ,
  
    
      I
      BN
    
    →
  
  ,
  
    and
    ⁢
    
      
    
    ⁢
    
      
        I
        AN
      
      →
    
  
  ,




such as those used in equation (14), using the following steps: obtaining contemporaneous samples of the relevant three or four of IA, IB, IC, IN, adding the contemporaneous samples in accordance with the relevant four equations of the equations (15) to (34), squaring the sum, repeating the above and accumulating the squared sum values over several sample times, and then taking the square-root.

For example, FIGS. 3A-3C show an exemplary set of operations of the processing circuit 116 of the meter 10 including those that determine SVA per equation (14), using the values of equations (15)-(18) for generating the magnitude of the source currents current values {right arrow over (ICB)}, {right arrow over (ICA)}, {right arrow over (IBN)}, and {right arrow over (IAN)}. It will be appreciated that the operations of FIGS. 3A-3C may readily by modified to implement any of the equations (19)-(34) in obtaining a solution for equation (14). The operations of FIG. 3A-3C further show, at least in context the processing of samples to generate other metering values. As noted above, the processing circuit 116 preferably generates multiple metering values, such as watt-hr, VAR-hr, RMS voltage, RMS current, as well as the VA calculations.
Referring now to FIG. 3A, in step 302, the processing circuit 116 obtains contemporaneous samples VA(s), VB(s), VC(s), IA(s), IB(s), IC(s) for a sample time s. To this end, the processing circuit 116 obtains samples of the VA(s), VB(s), VC(s), IA(s), IB(s) and IC(s) from the ADC circuit 114. The processing circuit 116 then proceeds to step 304. In step 304, the processing circuit 116 generates source current samples ICB(s), ICA(s), IBN(s) and IAN(s) for the sample time s based on the equations (15)-(18). Specifically, the processing circuit 116 performs the following calculations:

ICB(s)=1⁄6IA(s)−1⁄6IB(s)+1⁄2IC(s)  (35)

ICA(s)=1⁄6IB(s)−1⁄6IA(s)+1⁄2IC(s)  (36)

IBN(s)=5⁄6IB(s)+1⁄6IA(s)+1⁄2IC(s)  (37)

IAN(s)=5⁄6IA(s)+1⁄6IB(s)+1⁄2IC(s)  (38)

In step 306, the processing circuit 116 further generates the contemporaneous samples of the VCB and VCA using the equations:

VCB(s)=VC(s)−VB(s)  (39)

VCA(s)=VC(s)−VA(s)  (40)

Thereafter, the processing circuit 116 proceeds to step 308. In step 308, the processing circuit 116 squares each of the values generated in steps 304 and 306, as well as VB(s) and VA(s), and adds the resulting squared value of to an ongoing accumulation of corresponding values, ICBT, ICAT, IBNT, IANT, VCBT, VCAT, VBT, VAT. In other words, the processing circuit performs the following operations:

ICBT=ICBT+[ICB(s)]2  (40)

ICAT=ICAT+[ICA(s)]2  (41)

IBNT=IBNT+[IBN(s)]2  (42)

IANT=IANT+[IAN(s)]2  (43)

VCBT=VCBT+[VCB(s)]2  (44)

VCAT=VCAT+[VCA(s)]2  (45)

VBT=VBT+[VB(s)]2  (46)

VAT=VAT+[VA(s)]2  (47)

Thereafter, in step 310, the processing circuit 116 makes further calculations for the purposes of generating (i.e. updating) other energy consumption values, such as those representative of watts, watt-hours, RMS current, RMS voltage and the like. The calculation of such values based on the ongoing sample stream of VA(s), VB(s), VC(s), IA(s), IB(s), IC(s) is known in the art and may take different formats. The processing circuit 116 may also calculate load VA or vector VA as discussed further above.
Thereafter, in step 312, the processing circuit 116 increments a counter x. The counter x is used to determine whether to actually perform the next SVA calculation, as will be discussed below. In particular, it is useful to have samples from multiple cycles of the AC waveform before calculating the SVA value. After step 312, the processing circuit 116 proceeds to step 314.
In step 314, the processing circuit 116 determines whether x is greater than a sample threshold sp. If not, then the processing circuit 116 returns to step 302 and awaits the next set of samples VA(s), VB(s), VC(s), IA(s), IB(s), IC(s), wherein s has been incremented for the next sampling period of the ADC 114. In this embodiment, the value of sp is 504, and the sampling rate (ssec) is 2520, which produces a measurement period of 200 ms.
If, however, the processing circuit 116 determines that x is greater than a sample threshold sp, then the processing circuit 116 proceeds to step 316 to begin the source VA calculation. Specifically, in step 316, the processing circuit 116 generates the following vector magnitude values:




  
    
      
        
          
          
            
              I
              CB
            
            ⇀
          
          
        
        =
        
          
            
              I
              CBT
            
            sp
          
        
      
    
    
      
        (
        48
        )
      
    
  
  
    
      
        
          
          
            
              I
              CA
            
            ⇀
          
          
        
        =
        
          
            
              I
              CAT
            
            sp
          
        
      
    
    
      
        (
        49
        )
      
    
  
  
    
      
        
          
          
            
              I
              BN
            
            ⇀
          
          
        
        =
        
          
            
              I
              BNT
            
            sp
          
        
      
    
    
      
        (
        50
        )
      
    
  
  
    
      
        
          
          
            
              I
              AN
            
            ⇀
          
          
        
        =
        
          
            
              I
              ANT
            
            sp
          
        
      
    
    
      
        (
        51
        )
      
    
  
  
    
      
        
          
          
            
              V
              CB
            
            ⇀
          
          
        
        =
        
          
            
              V
              CBT
            
            sp
          
        
      
    
    
      
        (
        52
        )
      
    
  
  
    
      
        
          
          
            
              V
              CA
            
            ⇀
          
          
        
        =
        
          
            
              V
              CAT
            
            sp
          
        
      
    
    
      
        (
        53
        )
      
    
  
  
    
      
        
          
          
            
              V
              B
            
            ⇀
          
          
        
        =
        
          
            
              V
              BT
            
            sp
          
        
      
    
    
      
        (
        54
        )
      
    
  
  
    
      
        
          
          
            
              V
              A
            
            ⇀
          
          
        
        =
        
          
            
              V
              AT
            
            sp
          
        
      
    
    
      
        (
        55
        )
      
    
  




After step 316, the processing circuit 116 proceeds to step 318.

In step 318, the processing circuit 116 resets the counter x to zero, and also resets the values ICBT, ICAT, IBNT, IANT, VCBT, VCAT, VBT, VAT to zero. The processing circuit 116 thereafter proceeds to step 320. In step 320, the processing circuit 116 performs the calculation of equation (14) based on the values generated in step 316. In other words the processing circuit 116 generates SVA as follows:




  
    
      
        SVA
        =
        
          
            V
            ⁢
            
              
            
            ⁢
            A
          
          =
          
            
              
                
                
                  
                    V
                    CB
                  
                  →
                
                
              
              *
              
                
                
                  
                    I
                    CB
                  
                  →
                
                
              
            
            +
            
              
                
                
                  
                    V
                    CA
                  
                  →
                
                
              
              *
              
                
                
                  
                    I
                    CA
                  
                  →
                
                
              
            
            +
            
              
                
                
                  
                    V
                    B
                  
                  →
                
                
              
              *
              
                
                
                  
                    I
                    BN
                  
                  →
                
                
              
            
            +
            
              
                
                
                  
                    V
                    A
                  
                  →
                
                
              
              *
              
                
                
                  
                    I
                    AN
                  
                  →
                
                
              
            
          
        
      
    
    
      
        (
        14
        )
      
    
  




Thereafter, in step 322, the processing circuit 116 stores, displays or otherwise communicates the determined SVA value. In particular, the processing circuit 116 may suitably store the SVA value in the data store 112, display the SVA value using the display 120, and/or communicate the SVA value to a remote device, such as a utility computer, not shown, using the communication circuit 118.

The processing circuit 116 may employ the stored SVA value for further calculations. For example, the processing circuit 116 may further filter the SVA value by averaging several consecutive SVA values, such as five or ten of such values. In some embodiments, it is the average SVA value that is displayed or communicated.
The processing circuit 116 may also accumulate the stored SVA values calculated over time, multiplied by the corresponding time periods, to generate a source VA-hr value. The processing circuit 116 may also store in the memory 116 an SVA value for each of a plurality of time periods in conjunction with a time-of-use metering function. In such a case, the processing circuit 116 stores either an average SVA (VA), or an accumulated SVA (VAh), for each time period of a set of time periods for each day.
In any event, after step 322, the processing circuit 116 returns to step 302 and proceeds accordingly.
It will be appreciated that the embodiment described above may readily be adapted to calculate source VA for a three-wire delta electrical service. A three-wire delta service is similar to a four-wire delta service except that no separate neutral line is provided. Instead, the phase B line 214 is used as the neutral line.
To adapt the calculations discussed above for three-wire delta, the processing circuit 116 can use equation (14) set forth above, and any of the sets of equations discussed above, wherein IB is set to −IA−IC (e.g. IB(s)=IA(s)−IC(s)) and IN=0. While a suitable method for calculating source VA in a three-wire delta system is disclosed in U.S. Pat. No. 7,747,400, the embodiment described herein allows for the same general sets of equations to be used for both three-wire delta and four-wire delta systems, with only two extra (and simple) operations added. As a result, the meter 10 can be readily made adaptable to both systems with effectively one set of equations.
It will be appreciated that the processing circuit 116 of the meter 10 may also provide load VA as well as any other energy consumption-related values to the display 120 or to the communication circuit 118 for transmission to an external device. In some cases, the processing circuit 116 provides the VA information to a billing calculation unit (such as a billing formula implemented by the processing circuit itself) so that billing calculations may be made, for example, in a conventional manner.
It will be appreciated that the above describe embodiments are merely illustrative, and that those of ordinary skill in the art may readily devise their own modifications and implementations that incorporate the principles of the present invention and fall within the spirit and scope thereof.

## Claims

1. An arrangement in a meter connected between a source and a load, comprising:
a) an A/D converter configured to generate digital samples of voltage and current waveforms in a polyphase electrical system;
b) a processing circuit operably coupled to receive the digital samples from the A/D converter, the processing circuit configured to:
i) obtain contemporaneous samples of VA, VB, VC, and at least three of IA, IB, IC, and IN, where IA is a current measurement signal of phase A, IB is a current measurement signal of phase B, IC is a current measurement signal of phase C, IN is a current measurement signal of a neutral connection, VA is a voltage measurement signal from phase A to neutral, VB is a voltage measurement signal from phase B to neutral, and VC is a voltage measurement signal from phase C to neutral;
ii) determine an ICB sample value based on contemporaneous samples of at least three of IA, IB, IC, and IN;
iii) determine an ICA sample value based on contemporaneous samples of at least three of IA, IB, IC, and IN;
iv) determine an IBN sample value based on contemporaneous samples of at least three of IA, IB, IC, and IN;
v) determine an IAN sample value based on contemporaneous samples of at least three of IA, IB, IC, and IN;
vi) determine a VA value based at least in part on ICB, ICA, IBN and IAN; and
vii) provide information representative of the VA calculation to one of a group consisting of a display, a communication circuit, a memory and a billing calculation unit.

2. The arrangement of claim 1, wherein the processing circuit is further configured to generate:
a) The ICB sample value based on the equation 1⁄6IA−1⁄6IB+1⁄2IC;
b) The ICA sample value based on the equation 1⁄6IB−1⁄6IA+1⁄2IC;
c) The IBN sample value based on the equation 5⁄6IB+1⁄6IA+1⁄2IC; and
d) The IAN sample value based on the equation 5⁄6IA+1⁄6IB+1⁄2IC.

3. The arrangement of claim 1, wherein the processing circuit is further configured to:
a) generate a plurality of each of the ICB, ICA, IBN and IAN sample values; and
b) generate a magnitude value for each of the plurality of the ICB, ICA, IBN and IAN sample values.

4. The arrangement of claim 3, wherein the processing circuit is further configured to determine the VA value further based at least in part on the ICB magnitude value, the ICA magnitude value, the IBN magnitude value, and the IAN magnitude value.

5. The arrangement of claim 4, wherein the processing circuit is further configured to determine the VA value further based in part on a magnitude of a voltage difference from phase C to phase B and a magnitude of a voltage difference from phase C to phase A.

6. The arrangement of claim 5, wherein the processing circuit is further configured to determine the magnitude of the voltage from phase C to phase B and determine the magnitude of the voltage from phase C to phase A by:
a) generating a plurality of the VCB sample values, each VCB sample value comprising a difference between a phase C sample and a contemporaneous phase B sample; and
b) generating a VCB magnitude value using the plurality of the VCB sample values;
c) generating a plurality of the VCA sample values, each VCA sample value comprising a difference between a phase C sample and a contemporaneous phase A sample;
d) generating a VCA magnitude value using the plurality of the VCA sample values.

7. The arrangement of claim 5, wherein the processing circuit is further configured to generate the VA value based on the equation:




  
    V
    ⁢
    
      
    
    ⁢
    A
  
  =
  
    
      
        
        
          
            V
            CB
          
          →
        
        
      
      *
      
        
        
          
            I
            CB
          
          →
        
        
      
    
    +
    
      
        
        
          
            V
            CA
          
          →
        
        
      
      *
      
        
        
          
            I
            CA
          
          →
        
        
      
    
    +
    
      
        
        
          
            V
            B
          
          →
        
        
      
      *
      
        
        
          
            I
            BN
          
          →
        
        
      
    
    +
    
      
        
        
          
            V
            A
          
          →
        
        
      
      *
      
        
        
          
            I
            AN
          
          →
        
        
      
    
  




wherein |{right arrow over (VCB)}| is the VCB magnitude value, |{right arrow over (ICB)}| is the ICB magnitude value, |{right arrow over (VCA)}| is the VCA magnitude value, |{right arrow over (ICA)}| is the ICA magnitude value, |{right arrow over (VB)}| is a magnitude of the voltage from phase B to neutral, |{right arrow over (IBN)}| is the IBN magnitude value, |{right arrow over (VA)}| is a magnitude of the voltage from phase A to neutral, and |{right arrow over (IAN)}| is a vector value representative of the current from phase A to neutral.

8. The arrangement of claim 1, further comprising the display, and wherein the display is configured to display the information representative of the VA calculation.

9. An arrangement in a meter connected between a source and a load, comprising:
a) an A/D converter configured to generate digital samples of voltage and current waveforms in a polyphase electrical system;
b) a processing circuit operably coupled to receive the digital samples from the A/D converter, the processing circuit configured to:
i) obtain samples of VA, VB, VC, and at least three of IA, IB, IC, and IN, where IA is a current measurement signal of phase A, IB is a current measurement signal of phase B, IC is a current measurement signal of phase C, IN is a current measurement signal of a neutral connection, VA is a voltage measurement signal from phase A to neutral, VB is a voltage measurement signal from phase B to neutral, and VC is a voltage measurement signal from phase C to neutral;
ii) determine, based on the obtained samples, a magnitude value |{right arrow over (VCB)}| of a voltage from phase C to phase B, a magnitude value |{right arrow over (ICB)}| of a source current from phase C to phase B, a magnitude value |{right arrow over (VCA)}| of a voltage from phase C to phase A, a magnitude value |{right arrow over (ICA)}| of a source current from phase C to phase A, a magnitude value |{right arrow over (VB)}| of a voltage from phase B to neutral, a magnitude value |{right arrow over (IBN)}| of a source current from phase B to neutral, a magnitude value |{right arrow over (VA)}| of a voltage from phase A to neutral, and a magnitude value |{right arrow over (IAN)}| of a source current from phase A neutral;
iii) generate the VA value based on the equation






  
    
      V
      ⁢
      
        
      
      ⁢
      A
    
    =
    
      
        
          
          
            
              V
              CB
            
            →
          
          
        
        *
        
          
          
            
              I
              CB
            
            →
          
          
        
      
      +
      
        
          
          
            
              V
              CA
            
            →
          
          
        
        *
        
          
          
            
              I
              CA
            
            →
          
          
        
      
      +
      
        
          
          
            
              V
              B
            
            →
          
          
        
        *
        
          
          
            
              I
              BN
            
            →
          
          
        
      
      +
      
        
          
          
            
              V
              A
            
            →
          
          
        
        *
        
          
          
            
              I
              AN
            
            →
          
          
        
      
    
  
  ;




and

iv) provide information representative of the VA calculation to one of a group consisting of a display, a communication circuit, a memory and a billing calculation unit.

10. The arrangement of claim 9, wherein the processing circuit is further configured to determine the value |{right arrow over (ICB)}| based on samples of at least three of IA, IB, IC, and IN.

11. The arrangement of claim 10, wherein the processing circuit is further configured to determine the value |{right arrow over (ICA)}| based on samples of at least three of IA, IB, IC, and IN.

12. The arrangement of claim 9, wherein the processing circuit is further configured to determine the value |{right arrow over (IBN)}| based on samples of at least three of IA, IB, IC, and IN.

13. The arrangement of claim 12, wherein the processing circuit is further configured to determine the value |{right arrow over (IAN)}| based on samples of at least three of IA, IB, IC, and IN.

14. An arrangement in a meter connected between a source and a load, comprising:
a) an A/D converter configured to generate digital samples of voltage and current waveforms in a polyphase electrical system;
b) a processing circuit operably coupled to receive the digital samples from the A/D converter, the processing circuit configured to:
i) obtain contemporaneous samples of VA, VB, VC, and at least three of IA, IB, IC, and IN, where IA is a current measurement signal of phase A, IB is a current measurement signal of phase B, IC is a current measurement signal of phase C, IN is a current measurement signal of a neutral connection, VA is a voltage measurement signal from phase A to neutral, VB is a voltage measurement signal from phase B to neutral, and VC is a voltage measurement signal from phase C to neutral;
ii) determine a ICB sample value based on contemporaneous samples of the at least three of IA, IB, IC, and IN;
iii) determine a VA value based at least in part on ICB; and
iv) provide information representative of the VA calculation to one of a group consisting of a display, a communication circuit, a memory and a billing calculation unit.

15. The arrangement of claim 14, wherein the processing circuit is further configured to generate the ICB sample value based on the equation 1⁄6IA−1⁄6IB+1⁄2IC.

16. The arrangement of claim 15, wherein the processing circuit is further configured to:
generate a plurality of the ICB sample values;
generate a magnitude value of the plurality of the ICB sample values; and
determine the VA value based at least in part on the produce of the generated magnitude value and a magnitude of a voltage from phase C to phase B.