# Patent

## Title
Unidirectional MOSFET and applications thereof

## Abstract

Owing to the property of bidirectional conduction under the saturation mode, synchronous rectifiers in conventional power converters usually suffer from a reverse current under light loads or a shoot-through current under heavy loads. The reverse current may degrade the converter efficiency and the shoot-through current may damage synchronous rectifiers. The present invention discloses a unidirectional metal oxide semiconductor field effect transistor (UMOS), which comprises a metal oxide semiconductor field effect transistor (MOS), a current detection circuit and a fast turn-off circuit. The current detection circuit detects the direction of the current flowing through the MOS. When a forward current is detected, the fast turn-off circuit is disabled and the channel of the MOS can be formed. When a reverse current is detected, the fast turn-off circuit is enabled and the channel of the MOS cannot be formed. This UMOS can be applied, but not limited, to synchronous rectifiers to detect the occurrence of a reverse current or a shoot-through current and fast turn off the channel of the MOSFET.

## Background
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention discloses a unidirectional MOSFET and applications thereof.
2. Description of the Related Art
The N-channel MOSFET (NMOS) is often used as self-driven synchronous rectifiers to realize power converters with low cost and high efficiency. When used as a power switch, an NMOS has two operation modes: (1) cutoff mode: when vGS(t)<VGS(th), the channel cannot be formed; iD(t) cannot flow through the channel; (2) saturation mode: when vGS(t)≧VGS(th), the channel can be formed; iD(t) can flow from drain to source or from source to drain through the channel, where vGS(t) is the gate-source voltage; VGS(th) is the gate-source threshold voltage; and iD(t) is the drain current.
Due to the property of bidirectional conduction under the saturation mode, a synchronous rectifier realized with an NMOS usually suffers from a reverse current under light loads or a shoot-through current under heavy loads. The reverse current may degrade the converter efficiency and the shoot-through current may damage the synchronous rectifier. To illustrate the cause and effect of the shoot-through current, a flyback converter with a self-driven synchronous rectifier is taken as an example. If the flyback converter operates under the continuous conduction mode (CCM), and a cross conduction exists between the primary power switch and the secondary self-driven synchronous rectifier, the drain-source voltage divided by the small channel resistance will lead to a huge shoot-through current, which may damage the synchronous rectifier.
To solve the above problems, the present invention discloses a unidirectional MOSFET and its applications in synchronous rectifiers to detect the occurrence of a reverse current or a shoot-through current and fast turn off the channel of the MOSFET.
SUMMARY OF THE INVENTION
A unidirectional MOSFET includes a MOSFET, a current detection circuit and a fast turn-off circuit. The MOSFET may be an N-channel MOSFET or a P-channel MOSFET. The current detection circuit detects the direction of the current flowing through the MOSFET. When a forward current is detected, the fast turn-off circuit is disabled so that the channel of the MOSFET can be formed. When a reverse current is detected, the fast turn-off circuit is enabled so that the channel of the MOSFET cannot be formed. Such a unidirectional MOSFET may be but not limited to applications in synchronous rectifiers to detect the occurrence of a reverse current or a shoot-through current and fast turn off the channel of the MOSFET.



BRIEF DESCRIPTION OF THE DRAWINGS
The objectives, technical contents and characteristics of the present invention can be more fully understood by reading the detailed description of the preferred embodiments in company with the attached drawings, wherein:
FIG. 1A and FIG. 1B are the functional block diagrams of unidirectional MOSFETs.
FIG. 2A and FIG. 2B are respectively the actual circuit diagrams corresponding to FIG. 1A and FIG. 1B.
FIG. 3 is the equivalent circuit symbol of the unidirectional MOSFET.
FIG. 4A and FIG. 4B are circuit diagrams of flyback converters with a self-driven synchronous rectifier realized with a unidirectional MOSFET.
FIG. 5A and FIG. 5B are respectively circuit diagrams of a forward converter with a self-driven forward synchronous rectifier and a self-driven freewheeling synchronous rectifier, each of which is realized with a unidirectional MOSFET.
FIG. 6 is the circuit diagram of a half-bridge LLC resonant converter with self-driven synchronous rectifiers, each of which is realized with a unidirectional MOSFET.
FIG. 7 and FIG. 8 are respectively the timing diagrams of the gate-source voltage of the primary switch transistor, the primary current, the secondary current and the gate-source voltage of the secondary self-driven synchronous rectifier under the discontinuous conduction mode and under the continuous conduction mode.



DETAILED DESCRIPTION OF THE INVENTION
As shown in FIG. 1A and FIG. 1B, a unidirectional MOSFET (UMOS) includes a pan-gate G, a pan-drain D, a pan-source S, a MOSFET M, a current detection circuit 200, and a fast turn-off circuit 100. The MOSFET M includes a gate, a drain and a source. The current detection circuit 200 includes a first input, a second input and an output. The fast turn-off circuit 100 includes a first input, a second input, a first output and a second output.
The MOSFET M may be an N-channel MOSFET (NMOS) or a P-channel MOSFET (PMOS). For the convenience of illustration, the MOSEFT M is assumed to be an NMOS herein. However, it is emphatically noted that the MOSFET M in the present invention can be but not limited to an NMOS.
The current detection circuit 200 is used for detecting the direction of the current flowing through the MOSFET M. The detection method may be a pan-source detection (FIG. 1A) or a pan-drain detection (FIG. 1B). In FIG. 1A, the first input and the second input of the current detection circuit 200 are respectively connected to the pan-source S and the source of the MOSFET M. In FIG. 1B, the first input and the second input of the current detection circuit 200 are respectively connected to the drain of the MOSFET M and the pan-drain D.
The fast turn-off circuit 100 receives an output signal from the current detection circuit 200 and a control signal from an external driving circuit to turn on or turn off the channel of the MOSFET M. The first input, the second input, the first output and the second output of the fast turn-off circuit 100 are respectively connected to the output of the current detection circuit 200, the pan-gate G, the gate and the source of the MOSFET M.
The channel between the drain and the source of the MOSFET M is controlled by the voltage difference between the pan-gate G and the pan-source S, the output signal of the current detection circuit 200 and the output signal of the fast turn-off circuit 100. When a forward current (from the pan-source S to the pan-drain D) is detected, the fast turn-off circuit 100 is disabled; the channel of the MOSFET M can be formed. When a reverse current (from the pan-drain D to the pan-source S) is detected, the fast turn-off circuit 100 is enabled; the channel of the MOSFET M cannot be formed.
Moreover, an enhanced UMOS (e-UMOS), which includes a UMOS and an extra diode D*U with a lower forward voltage drop, whose anode and cathode are respectively connected to the pan-source S and the pan-drain D (NMOS) or the pan-drain D and the pan-source S (PMOS), can further reduce the body diode conduction loss of the MOSFET M in specific applications.
FIG. 2A and FIG. 2B, where an NMOS is used for the MOSFET M, are two embodiments respectively corresponding to FIG. 1A and FIG. 1B. The current detection circuit 200 is realized by a current transformer CT and a diode DCT. The current transformer CT includes a primary winding NP and a secondary winding NS; black dots denote that the dotted terminals are of the same polarity. For the convenience of illustration, the black-dotted terminal and the other terminal are respectively called a positive pole and a negative pole. The first input, the second input and the output of the current detection circuit 200 are respectively the positive pole of the primary winding NP, the negative pole of the primary winding NP and the negative pole of the secondary winding NS. The primary winding NP and the MOSFET M are connected in series to detect the direction of the current flowing through the MOSFET M. In FIG. 2A, the positive and negative poles of the primary winding NP are respectively connected to the pan-source S and the source of the MOSFET M. In FIG. 2B, the positive and negative poles of the primary winding NP are respectively connected to the drain of the MOSFET M and the pan-drain D. The secondary winding NS and the diode DCT are connected in parallel to disable or enable the fast turn-off circuit 100. The positive and negative poles of the secondary winding NS are respectively connected to the anode and cathode of the diode DCT.
The fast turn-off circuit 100 includes a Darlington transistor DL, a resistor RB and a resistor RC. The Darlington transistor DL is equivalent to two NPN bipolar junction transistors in cascade. The base B of the Darlington transistor DL is connected to one terminal of the base resistor RB. The collector C of the Darlington transistor DL is connected to one terminal of the collector resistor RC and the gate of the MOSFET M. The emitter E of the Darlington transistor DL is connected to the anode of the diode DCT, the positive pole of the secondary winding NS and the source of the MOSFET M. The other terminal of the base resistor RB is connected to the cathode of the diode DCT and the negative pole of the secondary winding NS. The other terminal of the collector resistor RC is connected to the pan-gate G. The first input, the second input, the first output, and the second output of the fast turn-off circuit 100 are respectively the other terminal of the base resistor RB, the other terminal of the collector resistor RC, the collector C of the Darlington transistor DL and the emitter E of the Darlington transistor DL.
If the current detected by the current transformer CT is iD(t), the discharging current of the Darlington transistor DL is




  
    
      
        h
        FE
      
      ⁢
      
        
          i
          D
        
        ⁡
        
          (
          t
          )
        
      
    
    n
  
  ,




where hFE=β2, with β being the current gain of an individual NPN bipolar junction transistor, is the current gain of the Darlington transistor DL, and





  n
  =
  
    
      N
      S
    
    
      N
      P
    
  




is the secondary-to-primary turns ratio of the current transformer CT. Assuming that n=50, iB(sat)=0.1 mA and hFE=10000, the maximum allowable reverse current or shoot-through current is iD(st),max=0.5 μA. In other words, a very small reverse current is enough to saturate the Darlington transistor DL and cut off the channel of the MOSFET M.

When a forward current iD(t) flows into the positive pole of the primary winding NP, a current




  
    
      i
      D
    
    ⁡
    
      (
      t
      )
    
  
  n




induced by the secondary winding NS flows out of the positive pole of the secondary winding NS and conducts the diode DCT; the Darlington transistor DL is reverse-biased and turned off; the channel of the MOSFET M can be formed by vGS(t)≧VGS(th); iD(t) can flow from source to drain through the channel of the MOSFET M.

When a reverse current iD(t) flows out of the positive pole of the primary winding NP, a current




  
    
      i
      D
    
    ⁡
    
      (
      t
      )
    
  
  n




induced by the secondary winding NS flows into the positive pole of the secondary winding NS and saturates the Darlington transistor DL; the diode DCT is reverse-biased and turned off; the gate-source voltage of the MOSFET M is equal to the collector-emitter saturation voltage of the Darlington transistor DL and is less than the gate-source threshold voltage of the MOSFET M, i.e. vGS=VCE(sat)<VGS(th); the channel of the MOSFET M cannot be formed; iD(t) cannot flow from drain to source through the channel of the MOSFET M.

To simplify the following circuit diagrams, the UMOS is denoted by an equivalent circuit symbol shown in FIG. 3. The equivalent circuit symbol includes the symbols of a MOSFET M and a virtual diode VD. The symbol of the MOSFET M represents that the channel of the UMOS is controlled by a voltage difference between the pan-gate G and the pan-source S; the symbol of the virtual diode VD symbolizes that the direction of the drain current is limited by the polarity of the virtual diode VD. In other words, the UMOS has the property of unidirectional conduction and may be but not limited to applications in synchronous rectifiers to detect the occurrence of a reverse current or a shoot-through current and fast turn off the channel of the MOSFET M.
Below, some conventional power converters are taken as examples to illustrate the applications of a UMOS in synchronous rectifiers. FIG. 4A and FIG. 4B are the circuit diagrams of flyback converters with a self-driven synchronous rectifier UR realized with a UMOS. FIG. 5A and FIG. 5B are respectively the circuit diagrams of a forward converter with a self-driven forward synchronous rectifier Uf and a self-driven freewheeling synchronous rectifier Uw, each of which is realized with a UMOS.
FIG. 6 is the circuit diagram of a half-bridge LLC resonant converter with self-driven synchronous rectifiers Uu and Ud, each of which is realized with a UMOS. Because the UMOS can detect the occurrence of a reverse current or a shoot-through current and fast turn off the channel of the MOSFET, the half-bridge LLC resonant converter with self-driven synchronous rectifiers realized with a UMOS does not need the constraint of the switching frequency being higher than the resonant frequency. In other words, the switching frequency may be lower than, equal to or higher than the resonant frequency.
For simplification, the virtue of a UMOS on self-driven synchronous rectifiers is illustrated in detail with FIG. 4B, where the flyback converter may operate under Discontinuous Conduction Mode (DCM) or Continuous Conduction Mode (CCM).
Discontinuous Conduction Mode (DCM)
A timing diagram is shown in FIG. 7, where a switching period can be divided into three intervals: on-interval 0≦t<Ton, reset-interval Ton≦t<Ton+Treset and dead-interval Ton+Treset≦t<Ts; vGSMp(t) and vGSUR(t) are respectively the gate-source voltage of the primary switch transistor and the secondary synchronous rectifier; ip(t) and is(t) are respectively the primary and the secondary currents.
Table I lists the on and off states of the primary switch transistor MP, diodes D1 and D2, PNP bipolar transistor Q1 as well as the secondary synchronous rectifier UR.












TABLE I





Interval
Mp
D1
D2
Q1
UR







0 ≦ t < Ton
off→on
off
off
off
off


Ton ≦ t < Ton + Treset
on→off
on
on
off
off→on


Ton + Treset ≦ t < Ts
off
off
off
on→off
on→off









The second row in Table I shows that at t=Ton a cross conduction may exist between the primary switch transistor Mp and the secondary synchronous rectifier UR, a possibility to be discussed further. When the primary switch transistor Mp transits from on to off, the secondary synchronous rectifier UR is still off. After the secondary current is(t) flows through the body diode of the secondary synchronous rectifier UR, the diodes D1 and D2, and the secondary synchronous rectifier UR begin to conduct. Because the secondary synchronous rectifier UR transits from off to on after the primary switch transistor Mp turns off, at t=Ton no cross conduction exists between the primary switch transistor Mp and the secondary synchronous rectifier UR.
Continuous Conduction Mode (CCM)
A timing diagram is shown in FIG. 8, where a switching period can be divided into two intervals: on-interval 0≦t<Ton and off-interval Ton≦t<Ton+Ts.
Table II lists the on and off states of the primary switch transistor Mp, the diodes D1 and D2, the PNP bipolar junction transistor Q1 as well as the secondary synchronous rectifier UR.












TABLE II





Interval
Mp
D1
D2
Q1
UR







0 ≦ t < Ton
off→on
off
off
on→off
on→off


Ton ≦ t < Ton + Ts
on→off
on
on
off
off→on









Because the second row in Table II is similar to the second row in Table I, at t=Ton no cross conduction exists between the primary switch transistor Mp and the secondary synchronous rectifier UR. However, the first row in Table II shows that at t=0 a cross conduction may exist between the primary switch transistor Mp and the secondary synchronous rectifier UR, a possibility to be discussed further. When the primary switch transistor Mp transits from off to on, the secondary synchronous rectifier UR is still on. After the diodes D1 and D2 turn off, the secondary synchronous rectifier UR transits from on to off. Because the secondary synchronous rectifier UR transits from on to off after the primary switch transistor Mp turns on, at t=0 a cross conduction exists between the primary switch transistor Mp and the secondary synchronous rectifier UR. If a common NMOS is used as the self-driven synchronous rectifier, a huge shoot-through current




  
    i
    
      D
      ⁡
      
        (
        st
        )
      
    
  
  =
  
    
      
        
          
            V
            i
          
          ⁢
          
            N
            s
          
        
        
          N
          p
        
      
      +
      
        V
        o
      
    
    
      R
      
        DS
        ⁡
        
          (
          on
          )
        
      
    
  




will flow from drain to source through the channel, where Vi is the input voltage; Np is the number of turns of the primary winding; Ns is the number of turns of the secondary winding; Vo is the output voltage; and RDS(on) is the small channel resistance. As a result, a shoot-through power dissipation





  
    P
    
      d
      ⁡
      
        (
        st
        )
      
    
  
  =
  
    
      
        i
        
          D
          ⁡
          
            (
            st
            )
          
        
        2
      
      ⁢
      
        R
        
          DS
          ⁡
          
            (
            on
            )
          
        
      
      ⁢
      
        T
        CC
      
    
    
      T
      s
    
  




may damage the NMOS, where TCC is the cross conduction interval and TS is the switching period. In view of this, the present invention proposes a UMOS to be used as the self-driven synchronous rectifier. Since the current detection circuit of a UMOS can immediately detect the occurrence of a tiny shoot-through current and turn off the channel to stop the shoot-through current, the UMOS can exempt itself from being damaged by a large shoot-through current.

During the delay interval Tdelay when the primary switch transistor Mp transits from on to off and the secondary synchronous rectifier UR transits from off to on, the secondary current is(t) flows through the body diode of the MOSFET M. Since the body diode has a higher forward voltage drop and the secondary current is(t) approaches its peak value, the UMOS has a larger body diode conduction loss in this specific application. If the UMOS is replaced with an e-UMOS, the diode D*U can bypass the body diode to further reduce the body diode conduction loss.
It is emphatically noted that applications of a UMOS/e-UMOS in synchronous rectifiers can be but not limited to flyback converters, forward converters and half-bridge LLC resonant converters.
While the invention has been described in terms of what are presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.

## Claims

1. A unidirectional metal oxide field effect transistor comprising:
a pan-gate, a pan-drain and a pan-source;
a MOSFET with a gate, a drain and a source;
a current detection circuit with a first input, a second input and an output; and
a fast turn-off circuit with a first input, a second input, a first output and a second output, wherein
said MOSFET and said current detection circuit are connected in series between said pan-drain and said pan-source and provides a pan-source detection or a pan-drain detection;
for said pan-source detection, said MOSFET is connected between said pan-drain and said second input of said current detection circuit, and said first input of said current detection circuit is connected to said pan-source;
for said pan-drain detection, said pan-drain is connected to said second input of said current detection circuit, and said MOSFET is connected between said first input of said current detection circuit and said pan-source; and

said first input, said second input, said first output and said second output of said fast turn-off circuit are respectively connected to said output of said current detection circuit, said pan-gate, said gate of said MOSFET and said source of said MOSFET.

2. The unidirectional metal oxide field effect transistor according to claim 1 further comprising a diode, wherein an anode and a cathode of said diode are respectively connected between said pan-source and said pan-drain, and is referred to as an enhanced unidirectional metal oxide field effect transistor.

3. The unidirectional metal oxide field effect transistor according to claim 1, wherein said MOSFET is an N-channel MOSFET.

4. The unidirectional metal oxide field effect transistor according to claim 1, wherein said MOSFET is a P-channel MOSFET.

5. The unidirectional metal oxide field effect transistor according to claim 1, wherein said current detection circuit comprises a current transformer and a diode, a positive pole and a negative pole of a primary winding of said current transformer are respectively used as said first input and said second input of said current detection circuit; a positive pole and a negative pole of a secondary winding of said current transformer are respectively connected to an anode and a cathode of said diode, the cathode of said diode is used as said output of said current detection circuit, and the anode of said diode is connected to said source of said MOSFET.

6. The unidirectional metal oxide field effect transistor according to claim 1, wherein said fast turn-off circuit comprises a Darlington transistor, a base resistor and a collector resistor; a base of said Darlington transistor is connected to a terminal of said base resistor, the other terminal of said base resistor is connected to said first input of said fast turn-off circuit, a collector of said Darlington transistor is connected to a terminal of said collector resistor, the other terminal of said collector resistor is connected to said second input of said fast turn-off circuit, and said collector and an emitter of said Darlington transistor are used as said first output and said second output of said fast turn-off circuit to be respectively connected to said gate and said source of said MOSFET.

7. A flyback converter with a self-driven synchronous rectifier, wherein said self-driven synchronous rectifier is a unidirectional metal oxide field effect transistor according to claim 1 or an enhanced unidirectional metal oxide field effect transistor according to claim 2.

8. A forward converter with a self-driven forward synchronous rectifier and a self-driven freewheeling synchronous rectifier, wherein each of said self-driven forward synchronous rectifier and said self-driven freewheeling synchronous rectifier is a unidirectional metal oxide field effect transistor according to claim 1 or an enhanced unidirectional metal oxide field effect transistor according to claim 2.

9. A half-bridge LLC resonant converter with self-driven synchronous rectifiers, wherein each of said self-driven synchronous rectifiers is a unidirectional metal oxide field effect transistor according to claim 1 or an enhanced unidirectional metal oxide field effect transistor according to claim 2.