#### Else KOOI, Appellant, v. David DeWITT, Appellee.

Patent Appeal No. 76-612.

United States Court of Customs and Patent Appeals.

Dec. 23, 1976.

*404Jack Oisher, U. S. Philips Corp., Briarcliff Manor, N. Y., attorney of record for appellant.

Julius B. Kraft IBM Corp., Hopewell Junction, N. Y., and J. Frank Osha, Washington, D. C., Sughrue, Rothwell, Mion, Zinn & MacPeak, Washington, D. C., attys. of record for appellee.

Before MARKEY, Chief Judge, and RICH, BALDWIN, LANE and MILLER, Judges.

LANE, Judge.

This is an appeal from the decision of the Patent and Trademark Office Board of Patent Interferences (board), awarding priority of invention to the senior party DeWitt after finding that DeWitt had a right to make all counts involved iti the interference. We affirm.

*405*Background*

This is a two-party interference proceeding (No. 98,572) between senior party DeWitt’s application serial No. 298,3111 for “Method for Forming a Transistor Comprising Layers of Silicon Dioxide and Silicon Nitride” and junior party Kooi’s patent No. 3,676,9212 for “Semiconductor Device Comprising an Insulated Gate Field Effect Transistor and Method of Manufacturing the Same.” DeWitt copied all eight of the involved counts from the Kooi patent.

*The Subject Matter of the Counts*

The subject matter in issue is a method of manufacturing an insulated-gate field-effect transistor (IGFET). Counts 1 and 6 are self-explanatory and are illustrative of the involved method. The significance of the underscoring, which is the board’s, will shortly become apparent.

> 1. A method of manufacturing an insulated gate field effect transistor comprising providing a silicon semiconductive body portion of one-type conductivity, providing on a surface of said body portion an impurity masking layer having at least two adjacent apertures with at least the portion of said masking layer between said apertures and at least over part of its thickness being of masking material other than silicon oxide and also capable of masking the silicon against oxidation, providing by impurity introduction through said apertures spaced surface regions of the opposite type conductivity in said body portion, subjecting at least surface portions of the body portion overlying the opposite type surface regions and adjacent the oxidation masking material to an oxidation treatment causing thereon the growth of a silicon oxide that penetrates into the body portion except where masked by oxidation masking material forming a silicon mesa under said oxidation masking material, applying a gate electrode insulated from and over the surface portion extending between the opposite type surface regions, and applying source and drain connections to the opposite type surface regions.

> 6. A method of manufacturing an insulated gate field effect transistor comprising providing a silicon semiconductive body portion of one-type conductivity, providing on a surface of the body portion a layer of diffusion masking material which at least over part of its thickness is of a material other than silicon oxide and also capable of masking the underlying silicon against oxidation, providing spaced apertures in said masking layer, diffusing impurities into the body portion through said apertures to form opposite type source and drain regions, removing the masking layer except for a portion overlying the body surface between the source and drain regions, subjecting the body portion to an oxidation treatment to cause the growth of an oxide on the non-masked surface that penetrates into the body portion, applying a gate electrode insulated from and over the surface portion extending between the opposite type surface regions, and applying source and drain connections to the opposite type surface regions.

*The Board*

The board stated the issue before it as follows:

> The sole issue before the Board at final hearing is whether DeWitt has a right to *406make the counts for purposes of priority. More specifically, does the DeWitt application disclose the underscored limitations in the counts reproduced above.

The method and corresponding structure disclosed in DeWitt involved in the above issue is illustrated in his Fig. 1. DeWitt discloses two alternative methods for making his IGFET. Only alternative A is relevant to this appeal, and DeWitt’s description of this alternative with respect to his Fig. 1 is as follows:

> 

> *407Referring to FIG. 1, step 1 depicts preferably a P-type substrate 10 * * *. It is obvious to those skilled in the art that an N-type substrate could be used as the starting material and hence, the remaining steps of the process would be modified to conform to the various conductivity regions that are formed.

> * * * In step 2A, a thin silicon nitride coating 12A, preferably between 800-2400 Angstrom units thick, is deposited by an RF sputtering method * *.

> Following this operation, holes 14A (step 3A) are selectively opened up in the silicon nitride layer 12A * * *.

> In step 4A, an N-type diffusion operation is performed using conventional diffusion techniques to form N-type regions 16 and 18 in the semiconductor body 10. * * *

> Referring to step 5A, silicon nitride region 20, located on the semiconductor surface between diffused regions 16 and 18, is left intact on the surface of the semiconductor body 10 while the remaining silicon nitride surface regions are removed by etching or reverse sputtering techniques, after proper masking of silicon nitride region 20. * * * ******

> Referring to step 6, * * * a silicon dioxide layer 22, about 5000 to 10,000 Angstrom units thick, is either thermally grown, formed by pyrolytic deposition or by RF sputtering techniques on the semiconductor surface about the silicon nitride region 20. Where the silicon dioxide layer 22 is thermally grown, the silicon nitride region 20 acts as a mask to prevent the formation of SÍO2 beneath region 20. However, if the silicon dioxide layer is pyrolytically deposited or RF sputtered, then the region 20 is masked to prevent the oxide from being deposited thereon. As is shown in the drawing, the silicon dioxide layer 22 is substantially thicker than the silicon nitride portion 20. The ratio of thickness of silicon dioxide to silicon nitride is preferably on the order of about 8 to 1.

> In step 7, holes 24 are opened up in the oxide layer 22 using standard photolithographic masking and etching techniques * * *

The board discussed the first “at least” limitation, stating:

> DeWitt correctly notes that element 20 shown in step 5A of his Figure 1 is a masking material which is not silicon oxide (the particular masking material disclosed being silicon nitride). The masking material clearly prevents the formation of silicon dioxide beneath region 20 when silicon oxide is thermally grown. The masking material lies between the two N-type regions 16, 18. Accordingly, the masking material disclosed in step 5A of Figure 1, when taken in conjunction with the description in the application, constitutes a masking material which covers “at least” that portion of semiconductive body 10 which lies between N-type regions 16, 18.

> In view of the above, we hold that DeWitt has established that he discloses the first underscored “at least” limitation in the counts reproduced above.

It then went on to discuss the “oxide treatment” limitations of the counts, which require that there be a growth of a silicon oxide (DeWitt’s layer 22) that *penetrates*into the semi-conductor body (DeWitt’s body 10). After reviewing the DeWitt argument that his specification language “thermally grown” inherently discloses this penetration, it concluded that the language “thermally grown,” in and of itself, covers processes in which penetration may or may not occur. However, it went on to state:

> [W]e believe that further language in the DeWitt specification limits his particular “thermally grown” language to a process in which penetration must inevitably occur. As pointed out above, DeWitt specifically teaches that the use of a “ther*408mally grown” process within the meaning of his application will not result in the formation of silicon dioxide beneath masking region 20. The necessary and only reasonable construction to be given this specific disclosure is that if the masking region were not present, silicon dioxide — and hence penetration — would occur. Since there is no masking region 20 above DeWitt’s N-type regions 16,18, we hold that when silicon dioxide is “thermally grown,” as disclosed in DeWitt’s application, penetration inherently will occur.

The board, notwithstanding its earlier statement that it had a “sole” issue before it, then proceeded to discuss the additional issue of whether DeWitt is barred by laches 3 from contesting priority because he did not copy the claims from the Kooi patent until after the DeWitt applications had been pending in the Patent and Trademark Office for more than seventy-three (73) months. After noting that DeWitt did copy the claims in issue within one year from the date the Kooi patent issued, as required by 35 U.S.C. § 135(b), it concluded that DeWitt could not be barred by laches from contesting priority. Priority was therefore awarded to DeWitt. No mention was made in the original board opinion of the second “at least” limitation.

Following the board’s decision, Kooi petitioned for reconsideration and clarification thereof pointing out that there were two occurrences of the “at least” language emphasized by the board, and that the board decision more properly addressed the second occurrence of “at least,” but not the first. Kooi also contended that the board did not address all the “additional issues” (other than the late claiming or laches issues) raised by Kooi, such as that DeWitt does not teach the “gist of the invention” of the counts and that the counts were unpatentable to DeWitt for failing to satisfy the requirements of 35 U.S.C. § 112.

> It is pointed out that the Kooi patent 3,676,921 from which the counts were copied is a division of an earlier Kooi application which issued on December 1, 1970 as patent 3,544,858, referenced in the Interference declaration. The date when DeWitt first presented the claims copied from the divisional Kooi patent was in his preliminary amendment filed July 10, 1973. This was more than two years after the issue date of the Kooi parent patent on December 1, 1970. There is ample authority holding that an applicant is estopped from presenting a claim, even though allegedly disclosed, for the first time more than two years after the subject matter of the claim has been patented or otherwise disclosed to the public. *Muncie Gear Works v. Outboard Marine,*[315 U.S. 759, 62 S.Ct. 865, 86 L.Ed. 1171] 53 USPQ 1 (Sup.Ct.-1942); *Crown Cork v. Ferdinand Guttmann [Gutmann],*[304 U.S. 159, 58 S.Ct. 842, 82 L.Ed. 1523] 37 USPQ 351 (Sup.Ct.-1938).

DeWitt opposed reconsideration, stating that the board’s decision with respect to the “at least” language was equally applicable to both occurrences of that phrase. DeWitt also asserted that Kooi’s contentions on the “gist of the invention” were erroneous and that DeWitt’s specification either expressly or inherently disclosed all elements of the counts. DeWitt also contended that his compliance with 35 U.S.C. § 112 with respect to the sufficiency of his disclosure, as it goes to the right-to-make issue, was clearly established. He also asserted that other aspects of 35 U.S.C. § 112, which go to the issue of the patentability of the claims to DeWitt, are not ancillary to priority and, therefore, are not reviewable by the board at final hearing.

Upon reconsideration, the board stated that reconsideration was denied on the merits for the reasons given by DeWitt in his opposition.

OPINION

We will first address the disputed “at least” limitations. Count 1 requires an im*409purity masking layer with “at least” the portion of said masking layer between two apertures being of material other than silicon oxide and capable of masking the silicon body against oxidation. We agree with the board that DeWitt discloses this feature of the count as silicon nitride layer 20, which overlies silicon body 10 between regions 16 and 18 as shown in step 4A of DeWitt. Count 1 also requires the subjection of “at least” surface portions of the silicon body portion overlying the opposite type surface regions and adjacent the oxidation masking material to an oxidation treatment. We also agree with the board that this feature of the count is disclosed by DeWitt. DeWitt, in step 6 of his method, subjects regions 16 and 18 to an oxidation treatment.

Kooi argues that both of the “at least” limitations are ambiguous, that resort to the Kooi patent is therefore necessary to interpret them, that Kooi’s patent shows in each instance two alternative process steps which are covered by each occurrence of “at least,” and that since DeWitt fails to disclose both alternatives he cannot support the counts involved in this issue. It is settled interference law that in right-to-make situations an interference count will be broadly construed. The exception to this rule of broad count construction occurs if the count is ambiguous. If an ambiguity exists, then resort to the specification from which the count originated is proper to resolve it. *Fontijn v. Okamoto,*518 F.2d 610, 186 USPQ 97 (Cust. & Pat.App.1975); *Stansbury v. Bond,*482 F.2d 968, 179 USPQ 88 (Cust. & Pat.App.1973); *Carlson v. Nagata,*480 F.2d 1372,178 USPQ 402 (Cust. & Pat.App.1973). However, this does not allow a wholesale rewriting of the count by having limitations read into it from the source specification. We find nothing ambiguous in the “at least” language of the counts before us. Therefore, we have no need to resort to the Kooi patent to interpret that language.

We now turn to Kooi’s major contention in this appeal, namely, that DeWitt has no disclosure of an oxidation treatment which causes the growth of a silicon oxide that *penetrates*into the silicon body. DeWitt’s specification never expressly discloses the penetration of silicon dioxide layer 22 into his silicon body 10. Therefore, if this limitation of the counts is disclosed by DeWitt at all, it is only by way of inherency. Whenever an interference party copies a claim from his opponent’s patent and relies on the doctrine of inherency for supporting disclosure, he has the burden of proof by clear and convincing evidence. If any doubt exists concerning whether limitations of that copied claim are inherent in his disclosure, that doubt must be resolved against him. *Tummers v. Kleimaek,*455 F.2d 566, 59 CCPA 846, 172 USPQ 592 (1972); *Gubelmann*v. *Gang,*408 F.2d 758, 56 CCPA 1013, 161 USPQ 216 (1969). For the doctrine of inherency to provide support for DeWitt in this case he has the burden of showing that penetration of his silicon oxide layer 22 into silicon body 10 inevitably occurs when the process steps for creating his IGFET are followed. *Pingree v. Hull,*518 F.2d 624, 186 USPQ 248 (Cust. & Pat.App.1975).

There is no dispute between the parties that two of the three techniques disclosed by DeWitt for forming layer 22, RF sputtering and pyrolytic deposition, will not produce the claimed penetration. The dispute centers around DeWitt’s “thermal growth” technique.

DeWitt argues that a silicon oxide layer formed by “thermal growth” will inherently produce oxide penetration, because that phrase is a term of art which is used interchangeably with the phrase “thermal oxidation.” Kooi agrees that a “thermal oxidation” treatment would produce penetration into the semiconductor body, as shown in his patent.4 However, he disagrees with *410DeWitt’s contention that “thermal growth” is synonymous with “thermal oxidation.” Kooi alleges that “thermal growth” encompasses other growth processes wherein oxide penetration would not occur.

In order to carry his burden of proof DeWitt has cited two technical publications by Atalla et al.5 which use the terms “thermal oxidation” and “thermal growth” interchangeably, and a section of a book by Warner.6 The Warner text discusses a process of growing an oxide film by exposing a silicon wafer, heated to 1000 °C., to an oxygen atmosphere. This appears to be the same technique disclosed by Kooi for producing his oxide layer, which Kooi argues is a thermal oxidation technique. Warner, however, consistent with the Atalla et al. articles, uses the term “thermal growth” to describe this technique. In view of DeWitt’s evidence, which shows that those skilled in the art use the term “thermal growth” when describing an oxidation technique, we conclude that he has carried his burden of proof, thereby shifting the burden to Kooi for rebuttal.

Kooi, in support of his contention that thermal growth can refer to the depositing of silicon dioxide on the silicon surface without penetration therein, cites a patent to Driver7 which uses the term “thermal” to describe a process step which the patentee states *deposits*a silicon oxide layer over a silicon nitride layer. However, as correctly noted by DeWitt, this patent never uses the term “thermal growth” to describe the discussed technique. Kooi also cites a patent to Steinmaier8 and an article9 by Steinmaier et al. which discuss the depositing of a silicon dioxide layer on a silicon body. In this process a silicon body is heated while at least two gases are passed thereover at elevated temperatures. The gases react together to form a deposited layer of silicon dioxide. Steinmaier alternatively terms this a growing process or a depositing process by means of thermal reactions. Again, Steinmaier nowhere refers to his process by the term “thermal grown.” Because of this deficiency, this evidence does not effectively rebut DeWitt’s evidence establishing a case of inherency. That is, Kooi’s evidence fails to raise any doubts concerning inherent oxide penetration.

Kooi also contends that DeWitt’s drawings fail to show oxide penetration. Thus, he argues that penetration is not inherent. If DeWitt’s drawings did disclose oxide penetration we would not have an issue of inherency in this proceeding, because there would be an express disclosure of the disputed limitation. Inherency presupposes that no express disclosure is present. Moreover, DeWitt’s drawings are used to describe three alternative methods for forming his oxide layer 22, only one of which is alleged to produce penetration of the oxide into the silicon body. Therefore, it is not unreasonable that his drawings would be more of a rough diagram than a precise schematic of the actual structures produced by the described processes.

From the above it is evident that we differ with the board to the extent that we find the evidence of record sufficient to carry DeWitt’s burden of showing that the term “thermal growth,” in and of itself, describes a process for forming oxide layer 22 which will inherently produce oxide penetration. However, even if the evidence of record did not establish this fact, we would *411completely agree with the board’s reasoning that the further language in the DeWitt specification

> Where the silicon dioxide layer 22 is thermally grown, the silicon nitride region 20 acts as a mask to prevent the formation of Si02 *beneath*region 20. [Emphasis supplied.]

indicates clearly that an oxide penetration step is inherently described by DeWitt.

Kooi further contends that DeWitt fails to disclose the “gist of the invention” embodied in the copied patent claims, which he asserts is the sinking of the silicon oxide layer into the silicon body to produce a “flatter” surface contour on the IGFET. A “flatter” surface, argues Kooi, has advantages when a metallization layer must cross from a relatively lower thin oxide layer (see DeWitt’s layer 20) to a higher thick oxide layer (DeWitt’s layer 22). This so-called “step,” when metallized, causes frequent malfunctions in the final circuit due to cracking of the metallization as it climbs the “step.” Therefore, the smaller the “step” the less chance there is for malfunction. Kooi argues that DeWitt nowhere discloses this inventive concept. DeWitt counters by arguing that Kooi, by an improper application of the “gist of the invention” test, is attempting to read limitations into the counts which are not there. He also contends that only where the counts are ambiguous does the gist of the invention test apply.

If we find the subject matter of the counts defined without ambiguity, either express or latent *(Stansbury v. Bond,*supra,) we have no need to resort to the source specification, but look only to the copier’s disclosure for a written description and enabling disclosure of this subject matter to determine whether the copier has a “right to make” a claim to this subject matter. *Fields v. Conover,*443 F.2d 1386, 58 CCPA 1366, 170 USPQ 276 (1971).

> A claim which is the same as, or for the same or substantially the same subject matter as, a claim of an issued patent may not be made in any application unless such a claim is made prior to one year from the date on which the patent was granted.

In this case there is no ambiguity in the counts. The subject matter, defined by the various counts, is a method of making an IGFET. This subject matter, as we previously noted, is taught by DeWitt. The “metallization” problem which Kooi argues is part of the “gist of the invention” may be a *reason*for which Kooi devised the subject matter of the counts, but that reason is not itself part of that subject matter of the counts. DeWitt, for whatever reason, discloses the subject matter of the counts, and he is therefore entitled to proceed in an interference based on that common subject matter. Kooi would have this court rewrite the counts by reading limitations into them which are simply not there. This we will not do. *Wetmore v. Quick,*536 F.2d 937, 190 USPQ 223 (Cust. & Pat.App.1976).

Kooi also contends that notwithstanding the fact that DeWitt copied the claims from Kooi’s patent within the one year prescribed by 35 U.S.C. § 135(b),10 DeWitt should be barred by laches from asserting claims corresponding to the counts because of his long delay in claiming the same. He also asserts:

> There is ample authority holding that an applicant is estopped from presenting a claim, even though allegedly disclosed, for the first time more than two years after the subject matter of the claim has been patented or otherwise disclosed to the public. *Muncie Gear Works v. Outboard Marine,*315 U.S. 759, [62 S.Ct. 865, 86 L.Ed. 1171] 53 USPQ 1 (Sup.Ct.-1942); *Crown Cork v. Ferdinard [sic] Gutmann,*304 U.S. 159, [58 S.Ct. 842, 82 L.Ed. 1523] 37 USPQ 351 (Sup.Ct.-1938).

Kooi’s laches and estoppel arguments more appropriately relate to the issue of whether or not the copied claims are *412patentable to DeWitt, rather than to any issues which are considered ancillary to priority. Cf. *Anderson v. Scinta,*372 F.2d 523, 54 CCPA 1269, 152 USPQ 584 (1967).11 Therefore, the board was without jurisdiction to consider the merits of these contentions.

Accordingly, for the reasons presented above, the decision of the board is *affirmed. AFFIRMED.*

1

. Filed October 13, 1972. DeWitt has been accorded, without objection at final hearing, the benefit of serial No. 117,077 filed February 19, 1971 (now U.S. patent No. 3,707,656) and serial No. 572,119 filed August 12, 1966 (now abandoned). The present application is a division of the 117,077 application, which was in turn a continuation of the 572,119 application. DeWitt’s application is assigned to International Business Machines Corp.

2

. Issued on application serial No. 19,894 filed March 16, 1970. Kooi has been accorded, without objection at final hearing, the filing date of application serial No. 727,563 filed May 8, 1968 (now U.S. patent No. 3,544,858) and Dutch application serial No. 67-07956 filed June 8, 1967. The Kooi patent in issue is a division of the 727,563 application, which in turn claimed priority based on the Dutch application. Kooi’s patent is assigned to U.S. Philips Corp.

3

. This issue was first presented in a Kooi motion to dissolve the interference, filed June 3, 1974. Therein Kooi argued, inter alia, that the counts were unpatentable to DeWitt because of his delay in claiming the subject matter defined by the counts. The relevant portion of Kooi’s motion to dissolve is as follows:

4

. The *Kooi*patent discusses the formation of a silicon oxide layer by the oxidation of a silicon body. The layer is formed by passing steam over the silicon body which is at a temperature of approximately 1000°C.

5

. Atalla et al., *Impurity Redistribution and Junction Formation in Silicon by Thermal Oxidation,*- The Bell Sys. Technical J. 933 (1960); Atalla et al., *Stabilization of Silicon Surfaces by Thermally Grown Oxides,*38 The Bell Sys. Technical J. 749 (1959).

6

. Integrated Circuits Design Principles and Fabrication, 132-143, 288-291, & 382-383 (R. Warner ed. 1965).

7

. Patent No. 3,675,313.

8

. Patent No. 3,386,857.

9

. Steinmaier et al., *Successive Growth of Si and Si02 in Epitaxial Apparatus,*111 J. Electrochemical Soc’y 206 (1964).

10

. 35 U.S.C. § 135(b) provides:

11

. But see *Myers v. Feigelman,*190 USPQ 198 (Bd. of Pat. Int’f.1973) where the board discussed late claiming in the context of a suppression and concealment contention.