Intellectual Property Security Agreement



 Exhibit 10.8 
  
 INTELLECTUAL PROPERTY SECURITY AGREEMENT 
  
 This Intellectual Property Security Agreement is entered into as of March 30, 2004, by and between SILICON VALLEY BANK
(“Bank”) and NETLOGIC MICROSYSTEMS, INC. (“Grantor”). 
  
 RECITALS 
  
 A. Bank has
agreed to make certain advances of money and to extend certain financial accommodation to Grantor (the “Loans”) in the amounts and manner set forth in the Amended and Restated Loan and Security Agreement by and between Bank and
Grantor, dated March 30, 2004 (as the same may be amended, modified or supplemented from time to time, the “Loan Agreement”; capitalized terms used herein are used as defined in the Loan Agreement), and the AR Financing Loan
Agreement by and between Bank and Grantor, dated March 30, 2004 (as the same may be amended, modified or supplemented from time to time, the “Formula Revolver Loan Agreement”). Bank is willing to make the Loans to Grantor, but only
upon the condition, among others, that Grantor shall grant to Bank a security interest in certain Copyrights, Trademarks, Patents, and Mask Works to secure the obligations of Grantor under the Loan Agreement, the other Loan Documents and the Formula
Revolver Loan Agreement. 
  
 B. Pursuant to the terms of the Loan
Agreement, Grantor has granted to Bank a security interest in all of Grantor’s right, title and interest, whether presently existing or hereafter acquired, in, to and under all of the Collateral. 
  
 NOW, THEREFORE, for good and valuable consideration, receipt of which is
hereby acknowledged, and intending to be legally bound, as collateral security for the prompt and complete payment when due of its obligations under the Loan Agreement, Grantor hereby represents, warrants, covenants and agrees as follows:

  
 AGREEMENT 
  
 To secure its obligations under the Loan Agreement, the other Loan Documents
and the Formula Revolver Loan Agreement, Grantor grants and pledges to Bank a security interest in all of Grantor’s right, title and interest in, to and under its Intellectual Property Collateral (including without limitation those Copyrights,
Patents, Trademarks and Mask Works listed on Schedules A, B, C, and D hereto), and including without limitation all proceeds thereof (such as, by way of example but not by way of limitation, license royalties and proceeds of
infringement suits), the right to sue for past, present and future infringements, all rights corresponding thereto throughout the world and all re-issues, divisions continuations, renewals, extensions and continuations-in-part thereof. 

 
 This security interest is granted in conjunction with the security
interest granted to Bank under the Loan Agreement. The rights and remedies of Bank with respect to the security interest granted hereby are in addition to those set forth in the Loan Agreement and the other Loan Documents, and those which are now or
hereafter available to Bank as a matter of law or equity. Each right, power and remedy of Bank provided for herein or in the Loan Agreement or any of the Loan Documents, or now or hereafter existing at law or in equity shall be cumulative and








 concurrent and shall be in addition to every right, power or remedy provided for herein and the exercise by Bank of any
one or more of the rights, powers or remedies provided for in this Intellectual Property Security Agreement, the Loan Agreement or any of the other Loan Documents, or now or hereafter existing at law or in equity, shall not preclude the simultaneous
or later exercise by any person, including Bank, of any or all other rights, powers or remedies. 
  
 Upon the earlier of (1) the IPO, and (2) Bank’s determination that Grantor has had two (2) consecutive fiscal quarters with a net profit, as
determined in accordance with GAAP, Bank’s security interest in the Intellectual Property Collateral shall terminate and Bank shall take all actions reasonably required to give effect to, and evidence of, the release of the Intellectual
Property from the Collateral. The foregoing notwithstanding, the Collateral shall include at all times all accounts and general intangibles that consist of rights to payment and proceeds from the sale, licensing or disposition of all or any part, or
rights in, the Intellectual Property (the “Rights to Payment”). Moreover, if a judicial authority (including a U.S. Bankruptcy Court) holds that a security interest in the underlying Intellectual Property is necessary to have a
security interest in the Rights to Payment, then the Collateral shall automatically and at all times include the Intellectual Property to the extent necessary to permit perfection of Bank’s security interest in the Rights to Payment.

  

 2 








 IN WITNESS WHEREOF, the parties have cause this Intellectual Property Security Agreement to be duly
executed by its officers thereunto duly authorized as of the first date written above. 
  

											
	 	 	 	 	 	 	 GRANTOR:

				
	Address of Grantor:	 	 	 	 	 	NETLOGIC MICROSYSTEMS, INC.
					
	 450 National Avenue
 Mountain View, CA 94043
	 	 	 	 	 	 By:
	 	 /s/ Ronald S. Jankov


						
	 	 	 	 	 	 	 	 	 Title:
	 	 President and CEO


	 Attn:
	 	 Don Witmer

	 	 	 	 	 	 	 	 
	 	 	 	 	 	 	 	 	 BANK:
	 	 
				
	 Address of Bank:
	 	 	 	 	 	 SILICON VALLEY BANK

					
	 3003 Tasman Drive
 Santa Clara, CA 95054-1191
	 	 	 	 	 	 By:
	 	 Teresa Li


	 	 	 	 	 	 	 Title:
	 	 Vice President


	 Attn: Loan Services
	 	 	 	 	 	 	 	 

  

 3 








 EXHIBIT A 
  

Copyrights 
  

					
	 Description

	  	 Registration/
 Application
 Number

	  	 Registration/
 Application
 Date


			
	NONE REGISTERED	  	 	  	 

  

 4 








 ***** CONFIDENTIAL TREATMENT REQUESTED 
  
 EXHIBIT B 
  
 NetLogic Microsystems, inc. – Confidential 
 22 Mar-04 
  

									
	 Title

	  	Filing Date

	  	Application No.

	  	Status

	  	Issue Date


	 Synchronous Content Addressable Memory with Single Cycle Operation
	  	30-Oct-97	  	08/967,314	  	Patent No. 6,199,140	  	06-Mar-01
	 Method and Apparatus for Cascading Content Addressable Memory Devices
	  	30-Dec-97	  	09/001,110	  	Patent No. 6,148,364	  	14-Nov-00
	 Method and Apparatus for Implementing a LEARN Instruction in a Content Addressable Memory Device
	  	11-May-98	  	09/076,337	  	Patent No. 6,219,748	  	17-Apr-01
	 Method and Apparatus for Implementing a LEARN Instruction in a Depth Cascaded Content Addressable Memory System
	  	11-May-98	  	09/076,336	  	Patent No. 6,240,485	  	29-May-01
	 Method and Apparatus for Performing a Read Next Highest Priority Match Instruction in a Content Addressable Memory Device
	  	06-Jul-98	  	09/111,364	  	Patent No. 6,381,673	  	30-Apr-02
	 Ternary Content Addressable Memory With Compare Operand Selected According to Mask Value
	  	09-Sep-98	  	09/150,517	  	Patent No. 6,418,042	  	09-Jul-02
	 Method for Longest Prefix Matching in a Content Addressable Memory
	  	05-Jan-99	  	09/225,918	  	Patent No. 6,237,061	  	22-May-01
	 Match Line Control Circuit for Content Addressable Memory
	  	05-Jan-99	  	09/225,919	  	Patent No. 6,125,049	  	26-Sep-00
	 Method and Apparatus For Simultaneously Performing a Plurality of Compare Operations in Content Addressable Memory Device
	  	26-Mar-99	  	09/276,885	  	Patent No. 6,137,707	  	24-Oct-00
	 Method and Apparatus for Determining a Longest Prefix Match in a Content Addressable Memory Device
	  	22-Jun-99	  	09/338,452	  	Patent No. 6,460,112	  	01-Oct-02
	 Method for Apparatus For Detecting Multiple Matches In A Content Addressable Memory
	  	12-Jul-99	  	09/351,962	  	Patent No. 6,175,513	  	16-Jan-01
	 Method Of Generating an Almost Full Flag and a Full Flag in a Content Addressble Memory
	  	12-Jul-99	  	09/351,545	  	Patent No. 6,393,514	  	21-May-02
	 Method and Apparatus for Selective Match Line Pre-charging in a Content Addressable Memory
	  	12-Jul-99	  	09/351,541	  	Patent No. 6,166,939	  	26-Dec-00
	 Selective Match Line Pre-Charging in a Partitioned Content Addressable Memory Array
	  	09-Sep-99	  	09/391,989	  	Patent No. 6,243,280	  	05-Jun-01
	 Selective Match Line Discharging In A Partitioned Content Addressable Memory Array
	  	09-Sep-99	  	09/392,972	  	Patent No. 6,191,969	  	20-Feb-01
	 [*****]
	  	 	  	 	  	 	  	 
	 Row Redundancy For Content Addressable Memory
	  	18-Oct-99	  	09/420,516	  	Patent No. 6,275,426	  	14-Aug-01
	 Method and Apparatus for Determining a Longest Prefix Match in a Segmented Content Addressable Memory Device
	  	12-Nov-99	  	09/439,834	  	Patent No. 6,499,081	  	24-Dec-02
	 Method and Apparatus for Determining an Exact Match in a Ternary Content Addressable Memory Device
	  	12-Nov-99	  	09/442,042	  	Patent No. 6,539,455	  	25-Mar-03
	 Ternary Content Addressable Memory Cell
	  	12-Nov-99	  	09/439,317	  	Patent No. 6,154,384	  	28-Nov-00
	 Method and Apparatus for Determiming the Address of the Highest Priority Matching Entry in a Segmented Content Addressable Memory
Device
	  	06-Dec-99	  	09/455,726	  	Patent No. 6,591,331	  	08-Jul-03
	 Match Line Control Circuit for Content Addressable Memory
	  	21-Dec-99	  	09/471,103	  	Patent No. 6,147,891	  	14-Nov-00
	 Method and Apparatus for Preventing Match Line Discharging in a CAM
	  	12-May-00	  	09/570,746	  	Patent No. 6,191,970	  	20-Feb-01
	 Spare Address Decoder
	  	08-Jun-00	  	09/590,792	  	Patent No. 6,229,742	  	08-May-01
	 Method and Apparatus for Partitioning a Content Addressable Memory Device
	  	08-Jun-00	  	09/590,642	  	Patent No. 6,324,087	  	27-Nov-01
	 [*****]
	  	 	  	 	  	 	  	 

  

 5 









									
	 Title

	  	Filing Date

	  	Application No.

	  	Status

	  	Issue Date


	 Method and Apparatus for Re-Assigning Priority in a Partitioned Content Addressable Memory Device
	  	08-Jun-00	  	09/590,775	  	Patent No. 6,687,785	  	03-Feb-04
	 Row Redundancy in a Content Addressable Memory
	  	08-Jun-00	  	09/590,779	  	Patent No. 6,249,467	  	19-Jun-01
	 Inter-row configurability of Content Addressable Memory
	  	14-Jun-00	  	09/594,203	  	Patent No. 6,252,789	  	26-Jun-01
	 Method and Apparatus For Using an Inter-Row Configurable Content Addressable Memory
	  	14-Jun-00	  	09/594,199	  	Patent No. 6,246,601	  	12-Jun-01
	 	  	 	  	 	  	 	  	[*****]
	 Method and Apparatus for Accessing a Segment of CAM Cells in an Intra-Row Configurable CAM System
	  	14-Jun-00	  	09/594,420	  	Patent No. 6,243,281	  	05-Jun-01
	 	  	 	  	 	  	 	  	[*****]
	 Inter-row Configurability of Content Addressable Memory
	  	14-Jun-00	  	09/594,195	  	Patent No. 6,560,670	  	06-May-03
	 Hierarchical Depth Cascading of Content Addressable Memory Devices
	  	16-Jun-00	  	09/595,850	  	Patent No. 6,317,350	  	13-Nov-01
	 Content Addressable Memory Device Having Selective Cascade Logic And Method for Selectively Comining Match Information in a CAM
Device
	  	16-Jun-00	  	09/595,773	  	Patent No. 6,493,793	  	10-Dec-02
	 	  	 	  	 	  	 	  	[*****]
	 Method and Apparatus for Generating a Device Index in a Content Addressable Memory
	  	08-Dec-00	  	09/733,819	  	Patent No. 6,490,650	  	03-Dec-02
	 Synchronous Content Addressable Memory
	  	06-Feb-01	  	09/778,170	  	Patent No. 6,697,911	  	24-Feb-04
	 Selective Look-Ahead Match Line Pre-charging in a Partitioned Content Addressable Memory Array
	  	20-Mar-01	  	09/813,900	  	Patent No. 6,430,074	  	06-Aug-02
	 Multi-chip Module Having Content Addressable Memory
	  	22-Mar-01	  	09/815,232	  	Patent No. 6,521,994	  	18-Feb-03
	 	  	 	  	 	  	 	  	[*****]
	 Memory Storage Cell Based Array of Counters
	  	30-Apr-01	  	09/846,513	  	Patent No. 6,567,340	  	20-May-03
	 Row Redundancy in a Content Addressable Memory
	  	18-Jun-01	  	09/866,235	  	Patent No. 6,445,628	  	03-Sep-02
	 	  	 	  	 	  	 	  	[*****]
	 Content Addressable Memory with Configurable Class-Based Storage Partitions
	  	27-Aug-01	  	09/940,832	  	Patent No. 6,542,391	  	01-Apr-03
	 Content Addressable Memory with Error Detection Signalling
	  	18-Sep-01	  	09/954,827	  	Patent No. 6,597,595	  	22-Jul-03
	 	  	 	  	 	  	 	  	[*****]

  
 ***** CONFIDENTIAL
TREATMENT REQUESTED 
  

 6 









									
	 Title

	  	Filing Date

	  	Application No.

	  	 Status

	  	Issue Date


					
	 	  	 	  	 	  	 	  	[*****]
					
	 Method and Apparatus for Performing a Read Next Highest Priority Match Instruction in a Content Addressable Memory Device
	  	18-Dec-01	  	10/025,661	  	Patent No. 6,564,289	  	13-May-03
					
	 Programmable Delay Circuit Within a Content Addressable Memory
	  	28-Dec-01	  	10/040,714	  	Patent No. 6,650,575	  	18-Nov-03
					
	 	  	 	  	 	  	 	  	[*****]
					
	 Content Addressable Memory Device
	  	01-Feb-02	  	10/062,307	  	Patent No. 6,697,276	  	24-Feb-04
					
	 	  	 	  	 	  	 	  	[*****]
					
	 Content Addressable Memory Having Dynamic Match Resolution
	  	30-Mar-02	  	10/112,630	  	Patent No. 6,661,686	  	09-Dec-03
					
	 Content Addressable Memory With Selective Error Logging
	  	12-Apr-02	  	10/121,344	  	Patent No. 6,690,595	  	10-Feb-04
					
	 	  	 	  	 	  	 	  	[*****]
					
	 Method and Apparatus for Determining an Exact Match in a Content Addressable Memory Device
	  	09-May-02	  	10/142,855	  	Patent No. 6,574,702	  	03-Jun-03
					
	 Content Addressable Memory Having Column Redundancy
	  	10-May-02	  	10/143,051	  	Patent No. 6,714,430	  	30-Mar-04
					
	 	  	 	  	 	  	 	  	[*****]
					
	 Content Addressable Memory With Simultaneous Write and Compare Function
	  	05-Jun-02	  	10/163,263	  	Patent No. 6,707,693	  	16-Mar-04
					
	 	  	 	  	 	  	 	  	[*****]
					
	 Entry Relocation In A Content Addressable Memory Device
	  	19-Nov-02	  	10/300,652	  	Patent No. 6,700,809	  	02-Mar-04
					
	 Timing Execution of Compare Instructions in a Synchronous Content Addressable Memory
	  	11-Dec-02	  	10/318,251	  	Patent No. 6,678,786	  	13-Jan-04
					
	 	  	 	  	 	  	 	  	[*****]

  
 ***** CONFIDENTIAL TREATMENT REQUESTED

  

 7 









									
	 Content Addressable Memory with Configurable Class-Based Storage Partitions
	  	11-Feb-03	  	10/364,147	  	Patent No. 6,711,049	  	23-Mar-04
	 	  	 	  	 	  	 	  	[*****]
	 Content Addressable Memory with Error Detection Signalling
	  	03-Jun-03	  	10/453,276	  	Patent No. 6,700,810	  	02-Mar-04
	 	  	 	  	 	  	 	  	[*****]

  

	*****	CONFIDENTIAL TREATMENT REQUESTED 

  

 8 









									
	 Title

	  	Filing
Date

	  	Application No.

	  	 Status

	  	Issue Date


					
	 	  	 	  	 	  	[*****]	  	 

  
 ***** CONFIDENTIAL TREATMENT REQUESTED

  

 9 








 NetLogic Microsystems, Inc. – Confidential 
 22-Mar-04 
  

																																	
	 Title

	 	PCT

	 	Taiwan

	 	EPO

	 	JPO


	 	 	Filing
Date

	 	App. No.

	 	Filing
Date

	 	Status

	 	Patent
No.

	 	Issue
Date

	 	Filing
Date

	 	Application
Number

	 	Status

	 	Patent
No.

	 	Issue
Date

	 	Filing
Date

	 	Application
Number

	 	Status

	 	Patent
No.

	 	Issue
Date


	 Synchronous Content Addressable Memory with Single Cycle Operation
	 	15-Oct-98	 	PCT/
US98/22000	 	30-Oct-98	 	Issued	 	NI-160299	 	01-Aug-02	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 Method and Apparatus for Cascading Content Addressable Memory Devices
	 	14-Oct-98	 	PCT/
US98/21805	 	30-Oct-98	 	Issued	 	NI-142510	 	01-Oct-01	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 Method and Apparatus for Performing a Read Next Highest Priority Match Instruction in a Content Addressable Memory Device
	 	N/A	 	N/A	 	06-Jul-99	 	Issued	 	NI-136967	 	01-Jul-01	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 Method and Apparatus for Implementing a LEARN Instruction in a CAM Device
	 	21-Apr-99	 	PCT/
US99/08767	 	28-Apr-99	 	Issued	 	NI-141972	 	01-Oct-01	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 Ternary Synchronous Content Addressable Memory with Single Cycle Operation
	 	14-Oct-98	 	PCT/
US98/21853	 	30-Oct-98	 	Issued	 	NI-123270	 	01-Dec-00	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 [*****]
	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 
																	
	 Redundancy Scheme for a Content Addressable Memory Device
	 	N/A	 	N/A	 	17-Oct-00	 	Issued	 	NI-152850	 	01-Apr-02	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 Highest Priority Longest Prefix Match in a Segmented CAM
	 	23-Feb-00	 	PCT/
US00/04782	 	22-Feb-00	 	Issued	 	NI-173983	 	21-Mar-03	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A	 	N/A
																	
	 [*****]
	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 	 

  

	*****	    CONFIDENTIAL TREATMENT REQUESTED 

  

 10 








 Attachment to 
  
 EXHIBIT C – TRADEMARKS 
 IP Security Agreement 
  

													
	 Trademark

	  	Filing Date

	  	Serial No.

	  	Status

	  	Publ Date

	  	Reg Date

	  	Reg No.


	 SyncCAM
	  	7/9/1996	  	75/131,758	  	Registered	  	3/4/1997	  	3/17/1998	  	2,145,371
	 IPCAM
	  	5/18/1998	  	75/487,281	  	Registered	  	4/13/1999	  	12/21/1999	  	2,302,875
	 Enabling the Silicon Backbone
 for the Internet
	  	7/6/1999	  	75/743,461	  	Registered	  	10/24/2000	  	7/17/2001	  	2,470,393
	 Zero Table Management
	  	7/14/2000	  	76/089,374	  	Registered	  	4/9/2002	  	2/3/2004	  	2,810,999
	 ZTM
	  	7/14/2000	  	76/089,394	  	Registered	  	3/12/2002	  	3/6/2004	  	2,714,043








 EXHIBIT D 
  

Mask Works 
  

					
	 Description

	  	 Registration/
 Application
 Number

	  	 Registration/
 Application
 Date


	 NONE REGISTERED
	  	 	  	 

  

 12