# Patent

## Title
System and method for driving LED

## Abstract

A system drives one or a plurality of LEDs, regulating their brightness by controlling the LEDs' average current or voltage. The system includes a switching power converter and an integrated digital regulator with at least one of electrical, thermal, and optical feedbacks. The regulator is constructed as a hysteretic peak current mode controller for continuous mode of operation of the power converter. For a discontinuous mode of operation of the power converter, a pulse averaging sliding mode control is used. Average LED current is measured by integrating LED pulse current at off time and hysteretically adjusting on time of the power switch. An input battery is protected from discharging at abnormally low impedance of the output.

## Background
CROSS-REFERENCES TO RELATED APPLICATIONS
This application is a division of U.S. patent application Ser. No. 12/497,682, filed Jul. 5, 2009 (now U.S. Pat. No. 8,232,735), which is a division of U.S. patent application Ser. No. 11/838,186, filed Aug. 13, 2007 (now U.S. Pat. No. 7,583,035), which is a division of U.S. patent application Ser. No. 11/142,859, filed May 31, 2005 (now U.S. Pat. No. 7,276,861), which claims the benefit of U.S. Provisional Patent Application No. 60/611,539, filed Sep. 21, 2004. U.S. patent application Ser. No. 12/497,682, filed Jul. 5, 2009, is also a division of U.S. patent application Ser. No. 11/838,208, filed Aug. 13, 2007 (now U.S. Pat. No. 7,710,047), which is a continuation of U.S. patent application Ser. No. 11/142,859, filed May 31, 2005 (now U.S. Pat. No. 7,276,861), which claims the benefit of U.S. Provisional Patent Application No. 60/611,539, filed Sep. 21, 2004. Each of the disclosures of said applications are incorporated by reference herein in their entirety.


BACKGROUND
Known in the industry are a few drivers for light emitting diodes (“LEDs”), like charge pumps with the multi-output current mirror from National Semiconductor. These drivers cannot economically boost input voltage more than 1.5 to 2 times and therefore call for parallel circuits for identical driving of multiple LEDs. That makes these drivers large and expensive. Also desired in this case is a linear current regulator in each channel which compromises the efficiency of an LED driver.
Also known is an inductor based boost converter, like LT 1932 from Linear TechnologyTM or NTC5006 from On—SemiconductorTM. The most frequently used topology is a current mode regulator with the ramp compensation of PWM circuit. Such a current mode regulator needs relatively many functional circuits and still exhibit stability problems when it is used in the continuous current mode with the duty ratio over 50%. As an attempt to solve these problems, the designers introduced constant off time boost converter or hysteric pulse train booster. While they addressed the problem of stability, hysteretic pulse train converters exhibit difficulties with meeting EMC and high efficiency requirements.
U.S. Pat. Nos. 6,515,434 and 6,747,420 provide some solutions outside original power converter stages, focusing on additional feedbacks and circuits, which eventually make the driver even larger.
To overcome the problems listed above, a process and system is disclosed for controlling a switching power converter, constructed and arranged for supplying power to one or a plurality of LEDs to reduce the size and cost of LED driver. Also disclosed is a controller which is stable regardless of the current through the LED. Further disclosed is a high efficiency LED driver with a reliable protection of driver components and input battery from discharging at the damaged output.
SUMMARY
An LED, having a diode-type volt amp characteristic, presents a very difficult load for voltage type regulators. That is why all up to date LED drivers are constructed as a regulated current source, including the referenced prior art in FIG. 1. The current regulator in FIG. 1 includes a feedback signal, which is created as a voltage signal proportional to the average LED current. In practically all switching LED drivers, current through an LED is a stream of high frequency pulses, and the above-described feedback introduces phase delays, makes for poor dynamic response, and prevents a regulator from acting within one switching cycle.



DESCRIPTION OF THE DRAWINGS
The teachings of the present disclosure can be readily understood by considering the following detailed description in conjunction with the accompanying drawings.
FIG. 1 is a prior art current regulator according to U.S. Pat. No. 6,747,420 B2;
FIG. 2 is a system for driving one or a plurality of LEDs;
FIG. 3 is a step up converter for driving one or a plurality of LEDs;
FIG. 4 is a diagram illustrating current waveforms of a switching converter according to one embodiment of the present disclosure;
FIG. 5 is a block diagram of a regulator with an integrator according to an embodiment of the invention at constant switching frequency;
FIG. 5A is a block diagram of a regulator with an integrator according to an embodiment of the invention at a variable switching frequency;
FIG. 6 is a diagram illustrating signal waveforms in a regulator with an integrator;
FIG. 7 is a diagram of a nonlinear control voltage dependent on the current error Iset−Is;
FIG. 8 is a block diagram of a regulator with an integrator according to another embodiment of the invention;
FIG. 9 is a block diagram of a regulator according to the sliding mode control of the invention;
FIG. 9A is a diagram illustrating an algorithm of the sliding mode control of the disclosure;
FIG. 9B is a block diagram of a regulator according to a sliding mode control with a passive LED current filter;
FIG. 10 is a block diagram of a sliding mode control regulator according to another embodiment of the disclosure;
FIG. 11 is a block diagram of a PI regulator with Ipset output according to the disclosure;
FIG. 11A is a block diagram of a PI regulator with Ton output according to the disclosure;
FIG. 12 is a diagram illustrating signal waveforms of an error generator
FIG. 13 is a block diagram of a power converter with protection against a short circuit FIG. 14 is a block diagram of a power converter with protection against a short circuit and overvoltage; and
FIG. 15 is a block diagram of a power converter driving strings of R-G-B LEDs with current regulators.



DETAILED DESCRIPTION
The embodiments of the present disclosure will be described below with reference to the accompanying drawings. Like reference numerals are used for like elements in the accompanying drawings.
FIG. 2 is a system 1 for driving one or a plurality of LEDs, according to one embodiment of the disclosure. The system 1 includes an energy source 2 and a switching power converter 3 driving a string of LEDs 4. The performance of the LEDs is measured by electrical and thermal sensors (not shown separately from LED unit 4) and a photosensor 5. These sensors generate electrical, thermal, and optical feedback channels coupled with a regulator 6 controlling the output of the power converter 3. The regulator 6, according to one embodiment of the disclosure, can have as a minimum a single electrical feedback. Yet, it may use additional thermal and optical feedback channels for enhanced performance, according to another embodiment of the disclosure. The energy source 2 is an AC/DC converter, connected to the AC utility line (not shown) in one embodiment of the disclosure. The energy source 2 is a DC/DC converter connected to any DC voltage source (not shown) according to another embodiment of the disclosure. Yet in another embodiment of the disclosure the energy source 2 is a battery, which may be of a variety of technologies (like solar panels or electrical rechargeable or non-rechargeable batteries of varieties of chemistries). The regulator 6 is constructed as analog, mixed signal, or digital functional block according to embodiments of the disclosure. A fixed high frequency oscillator (not shown) is supplying clock signal to the regulator 6.
The power converter in FIG. 2 is a step up (if the source voltage should be boosted) or a step down (if the source voltage should be decreased) switching converter, such as inductor-based boost, or buck boost topology according to the embodiments of the disclosure. FIG. 3 is a system 1 with a boost power converter 3 comprising a battery 2, inductor 7, a semiconductor power switch 8, a rectifier 9, regulator 6, an Ip peak current sensor 13, an LEDs current sensor 10, a voltage sensor 11 and 12, a string of LEDs 4, and an oscillator 30, according to one embodiment of the disclosure. The performance of the boost converter 3 is illustrated by FIG. 4. The power switch 8 is turned on and off by the regulator 6, storing energy in the inductor 7 at on time and discharging it into the LEDs 4 at off time. Current in the inductor 7 is shown in FIG. 4 as continuous. However it may also be discontinuous, depending on the mode of operations (not shown). The current through LEDs 4 is marked as Is and represents a stream of high frequency pulses, shaped during off time of the converter 3. When the power switch 8 is closed, energy is stored in the inductor 7. The inductor current increases to a value of IP1, that is determined by the on time of the power switch, the inductor value and battery voltage. When the power switch 8 is open, the energy in the inductor 7 is delivered to the load. The inductor current during this time decreases to a value of IP2, which is dependent on the off time of the power switch. Assuming ideal components, the relationship between input voltage and other parameters can be defined by the following equation:

VIN=L(IP1−IP2)/TON,  (1)

Where

    
    
        VIN=DC input voltage,
        IP1=peak current in the inductor at the end of charging,
        IP2=peak current in the inductor at the beginning of the inductor charging,
        TON=on time,
        L=inductance.
    
    


When the power switch 8 is open, the inductor 7 discharges energy into the output load. The output voltage is defined by the following equation:

−VIN+VOUT=L(IP1−IP2)/TOFF,  (2)

Where

    
    
        VOUT=DC output voltage
        TOFF=off time

Assuming average LEDs current:

IAVG−VOUT/RD  (3)

    
    


RD=equivalent DC resistance of the LEDs is assumed to be known.

IAVG=(IP1+IP2)TOFF/2(TON+TOFF)  (4)

and assuming a steady process,

VIN*TON=(−VIN+IAVG*RD)*TOFF  (5)

The on time can be determined by the following equation:

TON=(−VIN+IAVG*RD)  (6)

The frequency of the output is equivalent to:

f=1/(TON+TOFF)  (7)

Solving equations (1) through (6),

IP1=(VOUT−VIN)TOFF/2L+IAVG(VOUT/VIN)  (8)

IP2=(VOUT−VIN)TOFF/2L−IAVG(VOUT/VIN)  (9)

FIG. 5 is a regulator 6, according to one embodiment of the disclosure, and comprising input to LEDs current feedback Is (or voltage Vs), an integrator 14 with a reset switch 15, an LEDs current comparator 16, digital logic 17, an A/D converter 18, an Ip peak current comparator 19, and a buffer 20 driving the power switch 8. The following theoretical analysis represents a synthesis of the process of driving of a nonlinear load (like a single or multiple strings of LEDs) from a current source, regulating averaged current or voltage at the load. FIG. 6 illustrates the LEDs 4 current and the inductor 7 current. The integrator 14 integrates LED 4 current signal, shown as a waveform for integrator 14 in FIG. 6. The integral of the LEDs 4 current during the off time:




  
    
      
        
          
            
              
                
                  ∫
                  0
                  Toff
                
                ⁢
                
                  Is
                  ⁢
                  
                    d
                    t
                  
                
              
              =
              
                
                  ∫
                  0
                  Toff
                
                ⁢
                
                  
                    (
                    
                      
                        Ip
                        ⁢
                        
                          
                        
                        ⁢
                        1
                      
                      -
                      
                        
                          (
                          
                            
                              Ip
                              ⁢
                              
                                
                              
                              ⁢
                              1
                            
                            -
                            
                              Ip
                              ⁢
                              
                                
                              
                              ⁢
                              2
                            
                          
                          )
                        
                        ⁢
                        
                          t
                          Toff
                        
                      
                    
                    )
                  
                  ⁢
                  
                    
                  
                  ⁢
                  
                    d
                    t
                  
                
              
            
          
        
        
          
            
              =
              
                
                  (
                  
                    
                      Ip
                      ⁢
                      
                        
                      
                      ⁢
                      1
                    
                    -
                    
                      Ip
                      ⁢
                      
                        
                      
                      ⁢
                      2
                    
                  
                  )
                
                ⁢
                
                  Toff
                  2
                
              
            
          
        
      
    
    
      
        (
        10
        )
      
    
  




According to the waveform for LEDs 4 in FIG. 6 the average LEDs current is equal to




  
    
      
        Iavg
        =
        
          
            (
            
              
                Ip
                ⁢
                
                  
                
                ⁢
                1
              
              +
              
                Ip
                ⁢
                
                  
                
                ⁢
                2
              
            
            )
          
          ⁢
          
            Toff
            
              2
              ⁢
              T
            
          
        
      
    
    
      
        (
        11
        )
      
    
  




T-cycle time
Comparing Iavg in equation (11) and integral (10) we can make a conclusion that the integral (10) would be (a) proportional to the average LEDs current if cycle time T is constant and (b) equal to the average LEDs current if the integrated value is divided by cycle time T. In one embodiment of the disclosure the process of driving LEDs with the constant switching frequency is based on steps of storing energy in the inductor during on time of the power switch, discharging it into LEDs during off-time of the power switch, measuring ampseconds of said inductive element at off time and adjusting peak current through the said switch to keep said off time ampseconds in the inductor during off time constant and proportional to the set average current through LEDs. Thus, the disclosure is using generation of the off time ampseconds signal in the inductor as one switching cycle feedback. The ampseconds are measured by integrating discharging inductor 7 current during off time, sampling the integrator 14 at the end of off time, and resetting the integrator 14 during on time.
Expression (10) is a theoretical interpretation of the method: to keep LED brightness constant at constant frequency, the input voltage changes are compensated in such a manner that the inductor off time ampseconds and average current of the LED remains constant (or regulated). The method is illustrated on FIG. 5 and FIG. 6. The integrator 14 starts integrating the LED current at the beginning of off time. At the end of the cycle the digital logic 17 samples the output of the integrator 14. At the same time the power switch 8 is turned on. Sampled voltage (V14) from integrator 14 is compared with the Iset signal. If V14<Iset then logic adds a ΔVc signal to the switch comparator 19 reference voltage Vc=Vc+ΔVc. When Ip reaches its set value by Vc the comparator 19 turns off the power switch. If V14>Iset then Vc=Vc−ΔVc and new peak current will be reduced. During on time the output of the integrator 14 is shorted by the reset switch 15. In one embodiment of the disclosure, updating of the control voltage Vc is linear:
















Iset = V14
Vc(n + 1) = Vcn



Iset > V14
Vc(n + 1) = Vcn − ΔVc



Iset < V14
Vc(n + 1) = VcnT + ΔVc










Thus regulator 6 in FIG. 5 provides hysteretic current mode control of LED current with a dynamic response within one switching cycle. In normal conditions, the output current will be hysteretically adjusted at the set level. That makes the controller inherently stable and does not require compensation. At transient (change of Vin, temperature or LED performance, including shorted or open device) the controller will adjust primary peak current to have LED current equal to Iset.
In yet another embodiment of the disclosure, the control voltage ΔVc is adjusted based on function presented in FIG. 7, inversely proportional to a difference between set and measured signals.
In yet another embodiment of the disclosure, shown in FIG. 5A, the off time is kept constant by digital logic 17 and cycle time is variable, defined by the controller (regulator) 6. In this embodiment, a divider by cycle time 14A is added to the output of integrator 14, and the output of the divider 14A is connected to the positive terminal of LED comparator 16.
Different combinations of the circuits may be used to drive one or multiple of LEDs according to said method. A digital implementation of the same regulator 6 is shown on FIG. 8, where 21 is a digital logic, combining various functional blocks of FIG. 5.
Traditionally, in peak current mode control regulation, a user specifies a reference current, and then the power switch switches off when the inductor current rises to this reference current (minus an appropriate slope compensation to maintain global stability). However, in pulsed current averaging, we propose to regulate differently: we propose to directly regulate the length of power switch on time (Ton) in order to create the desired peak value Ip. We then relate this peak value to the load output current's average value. Hence, load current regulation becomes possible. Since LEDs call for current regulation instead of voltage regulation, this makes pulsed current averaging a prime candidate for its application. Our goal is now to relate the control variable Ton to the output current through the load. Peak current in the inductor, assuming discontinuous operation:




  
    
      
        Ip
        =
        
          VinTon
          L
        
      
    
    
      
        (
        12
        )
      
    
  




Ip—Peak current in the inductor 7
Vin—Input voltage
Average current in the load:




  
    
      
        Iav
        =
        
          IpToff
          
            2
            ⁢
            T
          
        
      
    
    
      
        (
        13
        )
      
    
  




Volt second balance of the inductor

Vin*Ton=(Vout−Vin)Toff,  (14)

where

Vout—Output average voltage
Combining equations (12) to (14) and solving it to Ton we'll get dependence of average current from the variable Ton:




  
    
      
        Iav
        =
        
          Ton
          ⁢
          
            
              V
              
                i
                ⁢
                
                  
                
                ⁢
                n
              
              2
            
            
              2
              ⁢
              LVout
            
          
        
      
    
    
      
        (
        15
        )
      
    
  




The conclusion of this simplified analysis is that the on time of the power switch is proportional to the output current. Thus, by adjusting Ton, the output current through the load will be changed in a linear relation. Notice, also, that the output current is inversely proportional to the output voltage in this relation. Therefore, in systems in which output voltage may quickly deviate from a desired value, this method may need to utilize advanced nonlinear controllers for regulation. This has compelled researchers to utilize multiplications in controllers to adjust Ton. That is, an inner current loop in power factor correction circuits often makes Ton∝kVOUT(IRef−IL). This is obviously a more complicated and nonlinear controller because it uses digital multiplication, as well as an additional outer voltage loop (usually PI controller) to help regulate the voltage.
Instead of a complicated approach to control, we propose to use the relation of Ton to Iav in a hysteretic/sliding mode scheme that simplifies implementations and may not use external A/D converters. The idea is to increase or decrease Ton by discrete pulses in order to control the average current being delivered to a load: hence, the terminology pulse average current control. Conventional methods for controlling the current output of commercially available integrated circuits for LEDs drivers uses a combination of analog operational amplifiers and compensation ramp generators. We have come up with a digital control approach to controlling output currents that does not use these additional parts. This is not a DSP engine with software overhead; this is an optimized digital core that uses a sliding control algorithm to determine the amount of power to transfer to the output using a boundary/sliding mode control criteria.
To demonstrate the proposed regulation approach according to one embodiment of the disclosure and show its potential, we describe the pulsed average current regulation using a simple hysteretic controller. The pulse average current regulation comprises the following steps, see FIG. 3 and FIG. 9: oscillator turns on switch 8, and current starts building in the inductor 7; at the same time Time register Ton+/−Δton is set with the count of time Ton, when t=Ton switch 8 is turned off,
Inductor 7 starts to discharge (it is assumed that the conversion process is discontinuous);
LED current is sensed and integrated by integrator 14 for a period of off time Toff;
the integrated value is sampled by digital logic 25 at the end of cycle time and integrator 14 is reset by switch 15;
sampled integrated value is divided in divider 14A by cycle time T and it is compared with the set value of the LED current Iset

    
    
        If Is <Iset The controller selects to change Ton by +Δton,
        If Is >Iset The controller selects to change Ton by −Δton, on time in the Time register 25A is adjusted by +Δton or −Δton; and
    
    


new cycle starts.
If the system detects more than two consecutive cycles with the same sign of Δton increment, the system may use look up tables to adjust these increments to accelerate convergence of measured Is signal and reference Iset.
A simplified sliding mode regulator is presented in FIG. 9B. Instead of an active integrator 14 with reset, a passive R-C filter (resistor) 22 and (capacitor) 23 are used. That simplifies the implementation at the expense of reduced speed of dynamic response of the regulator. The digital logic 25 combines the functions described above.
In another embodiment of the disclosure (FIG. 9, FIG. 9A) the LEDs comparator 16, as soon as it detects the transition of the Is current over reference Iset, sends the signal (high) to the digital logic 25;
the digital logic 25 starts Iset timer (not shown separately from digital logic 25) and keeps power switch 8 off;
power switch 8 is off and Iset timer is counting time Tt until LED current comparator 16 detects Is transition below I set level by sending a signal (low) to the digital logic 25; and
the digital logic stops Iset timer, reads its content and divides it by off time to define new Ton time as Toni+1=Toni−Δton((Tt/Toff)−1).
We call the described process as asymmetrical hysteretic algorithm of adjusting on time Ton, the purpose of which is to improve the dynamic response of the regulator and limit the ripple of LED current. Asymmetrical hysteretic algorithms include two LED comparators (not shown) each set slightly apart to form a window for current ripple and otherwise working independently and similar to the above described process.
FIG. 10 is a sliding mode regulator 6 with the limited maximum on time Ton max or maximum peak current in the inductor. This limit is achieved by adding an Ip peak current comparator 19 to the regulator 6, described in FIG. 9B. Ip comparator is connected with its negative terminal to Ip current sense and it positive terminal to the Ipset reference. The output of comparator 19 is sampled by the digital logic 25 each switching cycle.
The above presented sliding mode regulator 6 will be stable in the discontinuous mode of operation. Another embodiment of the disclosure in FIG. 11 is a digital PI or PID regulator capable to drive one or a plurality of LEDS with the continuous current in the switching converter FIG. 3. In the embodiment of FIG. 11, average LED current Is is filtered by a passive R-C network 22, 23. An LED current comparator 24 is connected with its negative terminal to 24a (Is current filter 22, 23), and with its positive terminal to the output of a ramp generator 28. A current set comparator 31 is connected to said ramp generator 28 by its positive terminal. The negative terminal of the comparator 31 is connected to a set current reference signal Iset 31a. Outputs of both comparators 24 and 31 are connected to the digital logic 26. The digital logic 26 controls a ramp generator 28, which generates a periodical ramp signal 28b (as shown in FIG. 12) with the minimum ramp signal selected to meet requirements of a maximum negative error and maximum ramp signal to meet the requirements of a maximum positive error. For example, assuming that at the nominal LEDs current Is signal 24a (as shown in FIG. 12) is 200 mV and maximum negative and positive errors are 25%, then the ramp signal 28b can be at least 150 mV to 250 mV. The time base of this ramp signal is defined by a desired resolution. Selecting, for example, a +/−6 bit resolution will give us at clock frequency 100 MHZ of the oscillator 30 the base time 10×2×64=1280 nS or frequency of 78 kHZ, which is about the frequency of typical LED drivers, meaning that the error generation may have at most one cycle delay. The accuracy of the error generation per given example will be 50×100/200×64=0.39%. Those skilled in the art may design the ramp generator per their specific requirements, using fundamental guidelines of this specification.
As ramp generator 28 starts the ramp, both comparators 24 and 31 are in the same state, low or high. Example of FIG. 12 assumes low. At some moment of the ramp both comparators 24 and 31 will change the state, going high. We call signals generated by the comparator 24 first and by the comparator 31 second. Digital logic 26 samples the comparators 24 and 31 at every clock of oscillator 30 and reads both first and second signals. Whichever signal comes first starts a time counter of an error generator 29. Whichever signal comes last stops the time counter. The digital logic 26 assigns a sign to generated error positive if said first signal comes last and negative if said second signal comes last. The digital logic 26 controls the frequency of the ramp generator 28 and generates an error signal once per cycle of ramp generator frequency. The implementation of digital error estimation was illustrated using relatively simple functional blocks without A/D converters. This implementation does not necessarily need to have the functional blocks described above. Different architectures may be used to make a non DSP digital error estimation by using the following steps according to the provided embodiment of the disclosure:
(a) measuring off time ampseconds of said inductor or directly average LEDs current;
(b) generating a periodical ramp signal at a constant frequency, generally smaller than switching frequency of said power converter, wherein said ramp signal is equal, generally at the middle of the ramp to LEDs current set reference signal;
(c) comparing once per a cycle of said ramp frequency said ampseconds signal with said ramp signal and generating a first signal at the instance when said ramp signal starts exceeding said ampseconds signal;
(d) comparing once per a cycle of said ramp frequency said set reference signal with said ramp signal and generating a second signal at the instance when said ramp signal starts exceeding said set reference signal;
(e) starting an error time counter by said first signal or by said second signal whichever comes first;
(f) stopping said error time counter by said first signal or by said second signal whichever comes last;
(g) reading said error time counter as a digital error and assigning a sign to said error positive if said first signal comes last and negative if said second signal comes last; and
(h) resetting all registers and start new cycle of error estimation.
Digital logic 26 is using the generated error to process it in a digital PI or PID regulator (not shown separately) with desired stability gains of proportional and integrated/differential parts. The output of the PI/PID regulator may generate in digital form either on time Ton for keeping the switch 8 closed (FIG. 11A), or an Ipset level, which is shown in FIG. 11. A D/A converter 27 translates digital form of Ipset into analog which is used by comparator 19 and buffer 20 to drive the switch 8 by regulating its peak current. A PI/PID regulator inside digital logic can be designed with compensation to comply with continuous current performance at any duty cycle with practical limits from 0 to 1.
The design of such compensation can be a routine task. The PID controller has the transfer function:




  
    Gc
    ⁡
    
      (
      s
      )
    
  
  =
  
    
      K
      1
    
    +
    
      
        K
        2
      
      s
    
    +
    
      
        K
        3
      
      ⁢
      s
    
  




where: s=complex variable of Laplace transform,

    
    
        Gc(s)=compensator,
        K1=proportional gain coefficient,
        K2=differential coefficient,
        K3=Integral coefficient.

The PID controller has a robust performance and a simplicity that allows for digital implementation to be very straight forward.

The Z domain transfer function of a PID controller is:

    
    






  
    Gc
    ⁡
    
      (
      z
      )
    
  
  =
  
    
      K
      1
    
    +
    
      
        
          K
          2
        
        ⁢
        Tz
      
      
        (
        
          z
          -
          1
        
        )
      
    
    +
    
      
        K
        3
      
      ⁢
      
        
          (
          
            z
            -
            1
          
          )
        
        Tz
      
    
  




where: z=complex variable of Z transform,

    
    
        Gc(z)=compensator,
        K1=proportional gain coefficient,
        K2=differential coefficient,
        K3=integral coefficient.

The differential equation algorithm that provides a PID controller is obtained by adding three terms

u(k)=[K1+K2T+(K3/T)]x(k)+K3Tx(k−1)+K2u(k−1)

where:

        u(k)=the control variable, this signal is used to add or subtract to control pulse,
        x(k)=current error sample,
        x(k−1)=previous error sample,
        T=sampling period,
        K1=proportional Gain coefficient.
        K2=differential coefficient, and
        K3=integral coefficient.

This is a useful control function to create a PI or PID controller simply by setting the appropriate gain to zero. The ramp function will determine a digital value that will serve as the x(k) value in a given control loop. By adjusting gain and delay, precise digital control can be obtained over a variety of systems.

    
    


The system 1 for driving LED in FIG. 13 includes a protection circuit against a short circuit of a single or multiple LEDs, according to another embodiment of the disclosure. The protection circuit comprises a comparator 32, connected to the input 37 and output 38 voltages of the system 1, an AND gate 33, having signals from the regulator 6 and comparator 32, a buffer 34 and a switch 35. At the start of the system 1, input voltage 37 is higher than the output 38, and comparator 32 is low, keeping switch 35 open. When the output capacitor 36 is charged above the input voltage 37, the comparator 32 changes its output to high. Assuming that the enable signal from the regulator 6 is also high, the buffer 34 will keep the switch 35 closed until a short circuit on the output discharges the output voltage 38 below the input voltage 37. The comparator 32 output goes low, opens the switch 35 and disconnects battery 2 from discharging into low impedance.
The protection circuit 32-38 provides adequate current protection to the input battery of the system, however it may overstress the isolation switch 35 at the time capacitor 36 is discharging into low impedance. The circuit in FIG. 14 has an additional comparator 39 to detect the overload or short circuit. At short circuit or overload the comparator 39 instantly goes high (a small filter against noise is not shown). The output signal of the comparator 39 goes to the regulator 6 which in turn shuts down the converter 3 and switches its enable signal at the AND gate 33 from high to low, opening the switch 35. The regulator 6 may be designed with a few options:

    
    
        to latch off the system until it is recycled by input voltage;
        automatically restart the system after a specific delay of time; and
        toggle the switch 35 off and on until the output capacitor 36 is discharged (in this case the comparator 32 will prevent the discharging the battery into a small impedance if abnormal situations at the output persists).
    
    


Open circuits are one of the common failures of an LED. At this failure an overvoltage is developing very quickly, potentially dangerous to all components of the system. FIG. 14 illustrates another embodiment of the disclosure related to overvoltage protection. If output voltage goes higher than breakdown voltage of a zener diode 41, the excessive voltage appears on the sense terminal of the comparator 39, changing its state to high and triggering protection functions described above.
If regulator 6 gets a signal from the application system to shut down the system 1, it is an advantage of such a system to isolate the battery 2 from driving circuits to save its power. It is a function of another embodiment of the disclosure implemented by a signal of regulator 6 at the AND gate 33. When the signal from the regulator 6 goes low, the switch 35 is open and the battery 2 is disconnected from driving circuits and load.
FIG. 15 illustrates a block diagram of R-G-B LEDs connected in three strings 43, 44, 47 with each string having an independent current regulator 45, 46, 48. Such connections of LEDs are typical practice in modem color mixing systems. In this case it is desirable that the power converter 3 is configured to drive one or multiple strings of LEDs with the regulated voltage source with a feedback signal Vs from voltage sensor 11, 12. We described above the method and system for driving a single or a plurality of LEDs, regulating average current through LEDs. All referenced embodiments of the disclosure were illustrated by using current as a variable system parameter to regulate. By a principle of duality of electrical circuits controlling current through components, connected in series and voltage across components connected in parallel, we can use similar systems and methods to drive one or multiple strings of LEDs by controlling voltage across strings of LEDs with some specifics of voltage regulation. For example, in case of voltage regulation, the integrator 14 (FIG. 5) will measure LEDs 43, 44, 47 voltseconds (FIG. 15) by integrating the output voltage for a length of the cycle T and the comparator 16 will have voltage set signal at the negative terminal. All other arrangements of the system will remain the same as described above. Thus, in another embodiment of the disclosure the proposed system will work as a voltage boost or buck-boost converter if input of the regulator 6 is switched to the voltage feedback Vs. Vs is connected to a resistive divider 11, 12. Signal Vs may also represent an output of a light sensing device, then the driver will control light brightness rather than the LED average voltage.
Although the present disclosure has been described above with respect to several embodiments, various modifications can be made within the scope of disclosure. The various circuits described in FIGS. 5, 8, 9, 9B, 10, 11, 13, and 14 are merely representative, and the circuitry and modules may be implemented in various manners using various technologies, digital or analog. Accordingly, the disclosure of the present disclosure is intended to be illustrative, but not limiting, of the scope of the claimed subject matter.

## Claims

1. A method of controlling a switching power converter configured to supply power to one or more light emitting diodes (“LEDs”), the switching power converter having an on time phase when the power switch is closed and an off time phase when the power switch is open, the method comprising:
turning a power switch on to provide current through an inductor and the power switch;
measuring ampseconds of the inductor at an off time;
comparing the measured ampseconds to a reference signal proportional to an average LED current or brightness;
generating a signed discrete logical signal based on a difference between an ampseconds signal and the reference signal;
generating a control signal using the signed discrete logical signal to regulate a peak current through the power switch by keeping the off time ampseconds substantially constant; and
turning the power switch off.

2. The method of claim 1, further comprising:
when the power switch is off, providing a conductive path from the inductor to the LED to effectively discharge the inductor and provide energy to the LEDs.

3. The method of claim 1, further comprising:
turning the power switch on and off at a fixed frequency,
wherein said measuring ampseconds of the inductor at an off time includes:
sensing of an LED current;
using an integrator, integrating the sensed LED current during the off time;
sampling an integrated LED current at the end of the off time; and
resetting the integrator during the on time phase.

4. The method of claim 1, further comprising:
incrementing or decrementing the control signal by an amount defined in a look-up table, wherein the amount is greater than or equal to a fixed minimum amount and less than or equal to a fixed maximum amount.

5. The method of claim 1, further comprising:
incrementing or decrementing the control signal, from one cycle to another, by an amount inversely proportional to a difference between the measured ampseconds and the reference signal.

6. The method of claim 1, further comprising:
turning the power switch on and off at a variable frequency,
wherein said measuring ampseconds of the inductor at an off time includes:
sensing of an LED current;
using an integrator, integrating the sensed LED current during the off time to provide an integrated signal;
measuring a last cycle time;
dividing the integrated signal by the last cycle time;
sampling the divided integrated signal at the end of the off time; and
resetting the integrator during the on time phase.

7. The method of claim 1, further comprising:
regulating an inductor peak current using a hysteretic peak current mode control, wherein said regulating includes:
generating the control signal as an analog control signal;
sensing a current through the power switch;
using the peak current comparator, comparing the sensed power switch current to the analog control signal as a set reference value; and
turning the power switch off when the sensed power switch current reaches the set reference value.

8. The method of claim 1, further comprising:
operating the switching power converter in a discontinuous current mode; and
regulating an inductor peak current using a pulse average sliding mode control by generating the control signal as a digital signal controlling the on time of the power switch.

9. The method of claim 1, wherein said measuring ampseconds of the inductor at an off time comprises sensing and averaging an LED current.

10. The method of claim 1, further comprising:
regulating LED brightness by sensing an optical output of the LED;
generating an optical output signal; and
adjusting the set reference signal to maintain the optical output signal substantially constant.

11. The method of claim 1, further comprising:
regulating contrast of an illuminated area by sensing optical ambient;
generating an optical ambient signal; and
adjusting the set reference signal proportionally to the optical ambient signal.

12. The method of claim 6, further comprising:
regulating LED brightness over thermal effects by sensing an LED junction temperature;
generating a temperature signal; and
adjusting the reference signal using a look-up table comprising emission versus LED temperature performance.

13. The method of claim 1, further comprising:
operating the switching power converter in a discontinuous current mode; and
regulating an inductor peak current using a hysteretic pulse frequency modulation by generating the control signal as a digital signal configured to control the on time of the power switch, wherein said generating the control signal includes:
using the signed discrete logical signal to enable a first mode of an on time adjustment when the LED current is lower than a set reference signal and counting a number of cycles;
measuring and storing a last cycle time; and
setting a new cycle time as a sum of the last cycle time and a product of a time increment by the number of cycles minus one.

14. The method of claim 13, further comprising, using the signed discrete logical signal to enable a second mode of an on time adjustment when the LED current is greater than the set reference signal.