# Patent

## Title
Solid-state imaging device

## Abstract

For a solid-state image pickup device 1, a plurality of pixels are two dimensionally arranged in an imaging region 10, and two photodiodes PD1 and PD2 are included in each pixel Pm,n. An electric charge generated in the respective photodiodes PD1 and PD2 is input to a signal readout section 20, and a voltage according to an electric charge amount thereof is output from the signal output section 20. The voltage output from the signal readout section 20 is input to an A/D converting section 40, and a digital value according to the input voltage is output from the A/D converting section 40. In an adding section 50, a sum of digital values to be output from the A/D converting section 40 according to the amount of electric charge generated, for each pixel Pm,n of the imaging region 10, in the two respective photodiodes PD1 and PD2 included in the pixel is operated, and a digital value being a sum value thereof is output.

## Background
TECHNICAL FIELD
The present invention relates to a solid-state image pickup device having an imaging region in which a plurality of pixels respectively including photodiodes are arranged two dimensionally.
BACKGROUND ART
Recently, in the field of radiography for dental treatment, there has been a transition from conventional photography using X-ray sensitive films to imaging by image pickup devices using camera tubes such as X-ray image intensifiers that do not use films, solid-state image pickup devices for which scintillates and CCDs are combined, and the like (see Patent Document 1, for example). However, the image intensifiers are camera tubes, and thus have problems such that the size is large, and an image distortion occurs in the periphery of an imaging region. Moreover, the CCDs, since it is technically difficult to form imaging regions with large areas, have restrictions such as performing imaging by a line scanner system.
As an image pickup device for solving these problems, a CMOS-X-ray flat panel sensor can be mentioned. The X-ray flat panel sensor uses a CMOS solid-state image pickup device having an imaging region in which a plurality of pixels respectively including photodiodes are arranged two dimensionally, and thus has no distortion in a peripheral portion, and it is easy to provide the imaging region with a large two-dimensional area (for example, about 12 cm×12 cm). Unlike visible light, since X-rays cannot be condensed by a lens, the solid-state image pickup device requires an imaging region with a large area when imaging a large area at one time, such as when being applied to dental use (particularly, dental 3D-CT).
Moreover, for such a solid-state image pickup device for medical use, the imaging subject is, for example, a living body, and thus the required resolution is low, and moreover, it is necessary to improve sensitivity while suppressing the amount of X-ray exposure as much as possible. Based thereon, in the solid-state image pickup device for medical use, the area of a photosensitive region (region to generate an electric charge in response to incidence of light) of each pixel included in the imaging region is no less than about 10 times to 100 times larger than that of another solid-state image pickup device for general imaging.
In, for example, a solid-state image pickup device for dental 3D-CT, VOXELs to be used for reconstruction of a CT image have square shapes, and it thus becomes indispensable that the shape of a photosensitive region of each pixel is a square one side of which has a length of, for example, 150 μm to 200 μm. Since the photosensitive region of each pixel thus having a large area means that the number of pixels included in the imaging region is small, this becomes advantageous in respect to performing drive at a video rate of 30 frames/second.

    Patent Document 1: Japanese Published Unexamined Patent Application No. 2005-333250


DISCLOSURE OF THE INVENTION
Problem to be Solved by the Invention
However, when the photosensitive region of each pixel is large, the photodiode also has a large junction capacitance value, and for this reason, noise is also large. On the other hand, for securing a necessary S/N ratio, it becomes necessary to increase the amount of X-rays to be made incident into the solid-state image pickup device. For a dental application, however, since X-rays are irradiated onto a human body, it is an absolute proposition to reduce the amount of X-ray exposure to the human body by reducing the amount of X-rays, and an increase in the amount of X-rays must be suppressed.
The present invention has been made in order to solve the above problems, and an object thereof is to provide a solid-state image pickup device that is capable of performing imaging with an excellent S/N ratio and is also suitable for a dental application.
Means for Solving the Problem
A solid-state image pickup device according to the present invention includes: (1) an imaging region in which a plurality of pixels each including a plurality of photodiodes are arranged two dimensionally; (2) a signal readout section for outputting a voltage according to an amount of electric charge generated in the plurality of respective photodiodes included in each pixel of the imaging region; (3) an A/D converting section for being input with and A/D-converting a voltage output from the signal readout section, and outputting a digital value according to the input voltage; and (4) an adding section for operating, for each pixel of the imaging region, a sum of digital values to be output from the A/D converting section according to an amount of electric charge generated in the plurality of respective photodiodes included in the pixel, and outputting a digital value being a sum value thereof. Furthermore, photosensitive regions of the plurality of respective photodiodes included in each pixel of the imaging region have a square shape as a whole. Moreover, photosensitive regions of the plurality of respective photodiodes included in each pixel of the imaging region preferably have mutually equal areas. Also, these areas may have an error within 5%.
In the solid-state image pickup device, a plurality of pixels are arranged two dimensionally in the imaging region, and each pixel includes a plurality of photodiodes. An electric charge generated in the plurality of respective photodiodes included in each pixel of the imaging region is input to the signal readout section, a voltage according to the amount of electric charge is output from the signal readout section. The voltage output from the signal readout section is input to the A/D converting section, and a digital value according to the input voltage is output from the A/D converting section. Then, in the adding section, for each pixel of the imaging region, a sum of digital values to be output from the A/D converting section according to an amount of electric charge generated in the plurality of respective photodiodes included in the pixel is operated, and a digital value being a sum value thereof is output.
Effects of the Invention
A solid-state image pickup device according to the present invention is capable of performing imaging with an excellent S/N ratio and can also be suitably used for a dental application.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of a solid-state image pickup device 1 according to the present embodiment.
FIG. 2 is a circuit diagram of each of the pixel Pm,n, integrating circuit 21n,k, and holding circuit 22n,k of the solid-state image pickup device 1 according to the present embodiment.
FIG. 3 are plan views showing the shapes of respective photosensitive regions of two respective photodiodes PD1 and PD2 included in the pixel Pm,n of the solid-state image pickup device 1 according to the present embodiment, wherein FIG. 3(a) shows a pair of rectangular photodiodes adjacent in the transverse direction, FIG. 3(b) shows a pair of rectangular photodiodes adjacent in the longitudinal direction, FIG. 3(c) shows a pair of triangular photodiodes adjacent to each other, and FIG. 3(d) shows a pair of trapezoidal photodiodes adjacent to each other.
FIG. 4 is a timing chart explaining operation of the solid-state image pickup device 1 according to the present embodiment, wherein FIG. 4(a) shows timing of the switch SW21 of each integrating circuit 21n,k, FIG. 4(b) shows timing of the switch SW1, SW2 of each pixel Pm,n on the m-th row, FIG. 4(c) shows timing of a switch SW221 of each holding circuit 22n,k, FIG. 4(d1) shows timing of a switch SW222 of a holding circuit 221,1, FIG. 4(d2) shows timing of the switch SW222 of a holding circuit 221,2, FIG. 4(d3) shows timing of the switch SW222 of a holding circuit 222,1, FIG. 4(d4) shows timing of the switch SW222 of a holding circuit 222,2, FIG. 4(d5) shows timing of the switch SW222 of a holding circuit 223,1, FIG. 4(d6) shows timing of the switch SW222 of a holding circuit 223,2, and FIG. 4(e) shows timing of output of the A/D converting section 40, and FIG. 4(f) shows timing of output of the adding section 50.



DESCRIPTION OF NUMERALS AND SYMBOLS


    
    
        1 Solid-state image pickup device
        10 Imaging region
        20 Signal readout section
        21 Integrating circuit
        22 Holding Circuit
        30 Buffer circuit
        40 A/D converting section
        50 Adding section
        60 Row selecting section
        70 Column selecting section
        A Amplifier
        C Capacitor
        PD Photodiode
        SW Switch
    
    


BEST MODES FOR CARRYING OUT THE INVENTION
Hereinafter, a best mode for carrying out the present invention will be described in detail with reference to the accompanying drawings. Here, in the description of the drawings, identical elements are denoted by identical reference numerals and symbols so as to avoid overlapping descriptions.
FIG. 1 is a block diagram of a solid-state image pickup device 1 according to the present embodiment. The solid-state image pickup device 1 shown in this figure includes an imaging region 10, a signal readout section 20, a buffer circuit 30, an A/D converting section 40, an adding section 50, a row selecting section 60, and a column selecting section 70.
The imaging region 10 is a region where M×N pixels P1,1 to PM,N are arranged two dimensionally in M rows and N columns. A pixel Pm,n is located at the m-th row and the n-th column. Here, each of M and N is an integer not less than 2, m is an integer not less than 1 and not more than M, and n is an integer not less than 1 and not more than N. Each of the M×N pixels P1,1 to PM,N has a common configuration, and includes two photodiodes PD1 and PD2 and two switches SW1 and SW2.
The switch SW1, SW2 included in each pixel Pm,n is controlled in a switching operation by an m-th row selecting signal Vsel(m) to be output from the row selecting section 60. The photodiode PD1 included in each pixel Pm,n is grounded at its anode terminal and connected at its cathode terminal to a wiring Ln,1 via the switch SW1, and outputs an electric charge of an amount according to the amount of incident light when the switch SW1 is closed to a wiring Ln,1. The photodiode PD2 included in each pixel Pm,n is also grounded at its anode terminal and connected at its cathode terminal to a wiring Ln,2 via the switch SW2, and outputs an electric charge of an amount according to the amount of incident light when the switch SW2 is closed to a wiring Ln,2.
The signal readout section 20 outputs a voltage according to the amount of an electric charge generated in the two respective photodiodes PD1 and PD2 included in each pixel Pm,n of the imaging region 10, and includes 2N integrating circuits 211,1 to 21N,2 and 2N holding circuits 221,1 to 22N,2. The 2N respective integrating circuits 211,1 to 21N,2 have a common configuration. The 2N respective holding circuits 221,1 to 22N,2 also have a common configuration.
Each integrating circuit 21n,k accumulates an electric charge input through a wiring Ln,k, and outputs a voltage according to the amount of the accumulated electric charge. Each holding circuit 22n,k is input with and holds a voltage output from the integrating circuit 21n,k, and outputs the holding voltage Vn,k based on an instruction from the column selecting section 70. Here, k is 1 or 2. At this time, the signal readout section 20 outputs voltages V1,1, V1,2, V2,1, V2,2, V3,1, V3,2, . . . , Vn,1, Vn,2, . . . , VN,1, and VN,2, in order.
An A/D converting section 40 is input with and A/D-converts the voltage Vn,k output from the signal readout section 20 and passed through the buffering circuit 30, and outputs a digital value Dn,k according to the input voltage Vn,k. The adding section 50 operates, for each pixel Pm,n of the imaging region 10, a sum of digital values Dn,1 and Dn,2 to be output from the A/D converting section 40 according to the amount of an electric charge generated in the two respective photodiodes PD1 and PD2 included in the pixel Pm,n, and outputs a digital value Dn (=Dn,1+Dn,2) being a sum value thereof.
The row selecting section 60 outputs the m-th row selecting signal Vsel(m) to control a switching operation of the switch SW1, SW2 included in each of the N pixels Pm,1 to Pm,N existing on the m-th row of the imaging region 10. These M row selecting signals Vsel(1) to Vsel(M) sequentially become high level. The row selecting section 60 makes, when the m-th row selecting signal Vsel(m) is high level, an electric charge generated in the photodiode PD1, PD2 included in each of the N pixels Pm,1 to Pm,N existing on the m-th row be output to the wiring Ln,1, Ln,2 through the switch SW1, SW2 of the same pixel.
The column selecting section 70 controls output of a holding voltage for each of the 2N holding circuits 221,1 to 22N,2 included in the signal readout section 20 to make the signal readout section 20 output voltages V1,1, V1,2, V2,1, V2,2, V3,1, V3,2, . . . , Vn,1, Vn,2, . . . , VN,1, and VN,2, in order.
FIG. 2 is a circuit diagram of each of the pixel Pm,n, integrating circuit 21n,k, and holding circuit 22n,k of the solid-state image pickup device 1 according to the present embodiment. Here, the figure shows these as representatives. As described above, m is an integer not less than 1 and not more than M, n is an integer not less than 1 and not more than N, and k is 1 or 2.
Each integrating circuit 21n,k has an amplifier A21, a capacitor C21, and a switch SW21. An input terminal of the amplifier A21 included in the integrating circuit 21n,k is connected, via a wiring Ln,k, to a switch SWk included in the pixel Pm,n. The capacitor C21 and the switch SW21 are provided in parallel between the input terminal and output terminal of the amplifier A21. For the integrating circuit 21n,k, as a result of the switch SW21 being closed, the capacitor C21 is discharged, and a voltage to be output from the integrating circuit 21n,k, is initialized. Moreover, the integrating circuit 21n,k accumulates, when the switch SW21 is open, an electric charge input through the wiring Ln,k in the capacitor C21, and outputs a voltage according to the amount of the accumulated electric charge to the holding circuit 22n,k.
Each holding circuit 22n,k has a capacitor C22 and switches SW22, and SW222. One end of the capacitor C22 is connected with the output terminal of the amplifier A21 of the integrating circuit 21n,k via the switch SW221, and is also connected with the buffer circuit 30 via the switch SW222. The other end of the capacitor C22 is connected to a ground potential. The holding circuit 22n,k holds, as a result of the switch SW221 being turned from a closed state to an opened state, a voltage Vn,k being output at that point in time from the integrating circuit 21n,k in the capacitor C22. Then, the holding circuit 22n,k outputs, when the switch SW222 is closed, the voltage Vn,k being held in the capacitor C22 to the buffer circuit 30.
FIG. 3 are plan views showing the shapes of photosensitive regions of two respective photodiodes PD1 and PD2 included in the pixel Pm,n of the solid-state image pickup device 1 according to the present embodiment. As shown in the same figures, respective photosensitive regions of the two photodiodes PD1 and PD2 included in each pixel Pm,n have a square shape as a whole. Two adjacent sides of the square may have an error of not more than 5%. Moreover, the respective photosensitive regions of the two photodiodes PD1 and PD2 included in each pixel Pm,n preferably have mutually equal areas. Also, these areas may have an error of not more than 5%. The respective photosensitive regions of the two photodiodes PD1 and PD2 included in each pixel Pm,n may have rectangular shapes as shown in FIG. 3(a) and FIG. 3(b), may have triangular shapes as shown in FIG. 3(c), and may have trapezoidal shapes as shown in FIG. 3(d).
Next, description will be given of operation of the solid-state image pickup device 1 according to the present embodiment. The solid-state image pickup device 1 operates while being controlled by the row selecting section 60 and the column selecting section 70 and a control section that controls operation of the entire solid-state image pickup device 1. FIG. 4 is a timing chart explaining operation of the solid-state image pickup device 1 according to the present embodiment.
FIG. 4(a) shows timing of the switch SW21 of each integrating circuit 21n,k, FIG. 4(b) shows timing of the switch SW1, SW2 of each pixel Pm,n on the m-th row, FIG. 4(c) shows timing of the switch SW221 of each holding circuit 22n,k, FIG. 4(d1) shows timing of the switch SW222 of the holding circuit 221,1, FIG. 4(d2) shows timing of the switch SW222 of the holding circuit 221,2, FIG. 4(d3) shows timing of the switch SW222 of the holding circuit 222,1, FIG. 4(d4) shows timing of the switch SW222 of the holding circuit 222,2, FIG. 4(d5) shows timing of the switch SW222 of the holding circuit 223,1, FIG. 4(d6) shows timing of the switch SW222 of the holding circuit 223,2, and FIG. 4(e) shows timing of output of the A/D converting section 40, and FIG. 4(f) shows timing of output of the adding section 50.
More specifically, the figure shows (a) a switching operation of the switch SW21 of each integrating circuit 21n,k, (b) a switching operation of the switch SW1, SW2 of each pixel Pm,n on the m-th row, (c) a switching operation of the switch SW221 of each holding circuit 22n,k, (d1) to (d6) switching operations of the switch SW222 of each holding circuit 22n,k, (e) an A/D converting operation in the A/D converting section 40, and (f) an adding operation in the adding section 50.
When determining digital values D1 to DN according to the amount of incident light in the N respective pixels Pm,1 to Pm,N existing on the m-th row, first, in each of the 2N integrating circuits 211,1 to 21N,2, the switch SW21 is closed for only a fixed period, whereby the capacitor C21 is discharged, and output voltage is initialized.
Thereafter, in each of the N pixels Pm,1 to Pm,N existing on the m-th row, the m-th row selecting signal Vsel(m) to be input becomes high level for only a fixed period, the switches SW1 and SW2 are closed for only a fixed period, and in the period where these are closed, an electric charge that has been accumulated until then in a junction capacitance section in response to incidence of light in the photodiode PD1, PD2 is output to the wiring Ln,1, Ln,2 through the switch SW1, SW2. At this time, in each integrating circuit 21n,k, the switch SW21 is open, so that an electric charge input from the pixel Pm,n through the wiring Ln,k is accumulated in the capacitor C21, and a voltage according to the amount of the accumulated electric charge is output to the holding circuit 22n,k.
Moreover, in the period where the m-th row selecting signal Vsel(m) is high level, the switch221 is closed for only a fixed period in each holding circuit 22n,k, and the voltage Vn,k being output from the integrating circuit 21n,k at this time where the switch221 is turned from a closed state to an opened state is held by the capacitor C22.
Thereafter, as a result of control by the column selecting section 70, the switch SW222 of each holding circuit 22n,k is sequentially closed for only a fixed period. Thereby, the voltages V1,1, V1,2, V2,1, V2,2, V3,1, V3,2, . . . , Vn,1, Vn,2, . . . , VN,1, and VN,2 are output in order from the signal readout section 20 to the buffer circuit 30.
Then, in the A/D converting section 40, the voltage Vn,k output from the signal readout section 20 and passed through the buffer circuit 30 is A/D-converted, and the digital value Dn,k according to the input voltage Vn,k is output to the adding section 50. At this time, the digital values D1,1, D1,2, D2,1, D2,2, D3,1, D3,2, . . . , Dn,1, Dn,2, . . . , DN,1, and DN,2 are output in order from the A/D converting section 40 to the adding section 50.
Further, in the adding section 50, a sum of digital values Dn,1 and Dn,2 to be output from the A/D converting section 40 is operated, and a digital value Dn (=Dn,1+Dn,2) being a sum value thereof is output. At this time, the digital values D1, D2, D3, . . . , Dn, . . . , DN are output in order from the adding section 50.
Here, the digital value Dn,k is a value according to the amount of an electric charge generated in a photodiode PDk of the pixel Pm,n located on the m-th row and the n-th column, that is, a value according to the amount of incident light into the photodiode PDk of the pixel Pm,n. Moreover, the digital value Dn is a value according to the total amount of electric charges generated in the two respective photodiodes PD1 and PD2 included in the pixel Pm,n, that is, a value according to the amount of incident light into the pixel Pm,n.
When the digital values D1 to DN according to the amount of incident light into the N respective pixels Pm,1 to Pm,N existing on the m-th row are thus obtained, subsequently, the digital values D1 to DN according to the amount of incident light into the N respective pixels Pm+1,1 to Pm+1,N existing on the next (m+1)-th row are obtained in the same manner. As a result of such an operation being performed for all rows, the digital values according to the amount of incident light into the M×N respective pixels P1,1 to PM,N of the imaging region 10 are obtained, so that image pickup data is obtained.
As above, in the solid-state image pickup device 1 according to the present embodiment, two photodiodes PD1 and PD2 are included in each pixel Pm,n of the imaging region 10, voltages Vn,1, and Vn,2 and digital values Dn,1 and Dn,2 according the amount of electric charge generated in the photodiodes PD1 and PD2 are obtained, and then a digital value Dn (=Dn,1+Dn,2) according to the amount of incident light into the pixel Pm,n is obtained. This allows performing imaging with an excellent S/N ratio even when, for example, it is necessary that the photosensitive region of each pixel Pm,n has a large area when the solid-state image pickup device 1 is used for a dental application.
That is, it is supposed, as a comparative example, that each pixel includes one photodiode, and the photodiode has a junction capacitance value of C. In this case, the size of a noise component included in the digital value to be output from the A/D converting section is expressed as “A×C.” Here, A is a constant determined by the amplifier included in the integrating circuit.
On the other hand, in the present embodiment, if each pixel includes two photodiodes, and the area of the entire photosensitive region of each pixel is the same as that of the above-mentioned comparative example, the junction capacitance value of the individual photodiodes becomes C/2. Therefore, the size of a noise component included in the digital value Dn,k to be output from the A/D converting section 40 is expressed as “A×C/2,” and the size of a noise component included in the digital value Dn to be output from the adding section 50 is expressed as “A×C/20.5.” As above, in the present embodiment, the size of a noise component included in the digital value Dn according to the amount of incident light into each pixel Pm,n becomes 1⁄20.5 times as compared with that of the above-mentioned comparative example.
Moreover, the upper limit of a dynamic range of light detection is determined by the upper limit of the amount of an electric charge that can be accumulated in the junction capacitance section of a photodiode or the saturation level of output voltage of the integrating circuit to read out the electric charge, whichever is lower. As in the case of a dental application, when the area of the photosensitive region of the photodiode is large, the amount of an electric charge that can be accumulated in the junction capacitance section of the photodiode is also large, so that the dynamic range is limited by saturation of output voltage of the integrating circuit. Moreover, with a reduction in supply voltage for lowering power consumption in recent years, drive voltage of the amplifier also tends to be lowered, and thus the saturation voltage level of the amplifier tends to further drop. Under such circumstances, an electric charge in excess of saturation of the amplifier included in the integrating circuit is wasted even if a large amount of electric charge can be accumulated in the junction capacitance section of the photodiode.
On the other hand, in the present embodiment, the amount of an electric charge to be accumulated in the individual integrating circuits is halved as compared with that in the above-mentioned comparative example, so that the individual pixels can handle electric charge up to double the amount as signals. Based thereon, when, for example, an output digital value from the A/D converting section 40 is 12 bits, an output digital value from the adding section 50 is extended to 13 bits. Moreover, as described above, the size of a noise component has become 1⁄20.5 times, so that the S/N ratio at the upper limit of the dynamic range becomes 2√2 times.
The present invention is by no means limited to the above-mentioned embodiment and various modifications can be made. For example, the number of photodiodes included in each pixel may be 3 or more although this has been provided as 2 in the above-mentioned embodiment. Moreover, the present invention, in respect to irradiating X-rays onto a human body, relates to X-ray solid-state image pickup devices for medical use in general, without limitation to dental treatment applications.

## Claims

1. A solid-state image pickup device comprising:
an imaging region in which a plurality of pixels are arranged two dimensionally,
each of the pixels including a plurality of photodiodes,
the photodiodes of each of the pixels including
a first photodiode, and
a second photodiode;
a signal readout section for outputting a voltage according to an amount of electric charge generated in the plurality of respective photodiodes included in each pixel of the imaging region,
the signal readout section including a plurality of integrating circuits,
the first photodiode being connected to a first integrating circuit of the integrating circuits via a first switch,
the second photodiode being connected to a second integrating circuit of the integrating circuits via a second switch,
each of the first and second integrating circuits comprising:
an amplifier having input and output terminals;
a capacitor provided between the input and output terminals of the first amplifier,
a switch provided between the input and output terminals of the first amplifier;


an A/D converting section for being input with and A/D-converting a voltage output from the signal readout section, and outputting a digital value according to the input voltage; and
an adding section for operating, for each pixel of the imaging region, a sum of digital values to be output from the A/D converting section according to an amount of electric charge generated in the plurality of respective photodiodes included in the pixel, and outputting a digital value being a sum value thereof, wherein
photosensitive regions of the plurality of respective photodiodes included in each pixel of the imaging region have a square shape as a whole,
the pixels are arranged two dimensionally in M rows and N columns, where each of M and N is an integer no less than 2, and
a total number of the first and second integrating circuits is equal to 2N.

2. The solid-state image pickup device according to claim 1, wherein photosensitive regions of the plurality of respective photodiodes included in each pixel of the imaging region have mutually equal areas.

3. The solid-state image pickup device according to claim 1, wherein a length of one side of said square shape is not less than 150 μm.

4. The solid-state image pickup device according to claim 3, wherein said length is not more than 200 μm.

5. The solid-state image pickup device according to claim 3, wherein the first integrating circuit and the second integrating circuit have common configuration.