INTEL CORPORATION’S NOTICE OF SUPPLEMENTAL EVIDENCE REGARDING 

CLAIM CONSTRUCTION 

Renée E. Rothauge, OSB #903712 

ReneeRothauge@markowitzherbold.com 

MARKOWITZ HERBOLD PC 

Suite 3000, Pacwest Center 

1211 SW Fifth Avenue 

Portland, OR 97204-3730 

Telephone: (503) 295-3085 

Fax: (503) 323-9105 

Michael J. Summersgill (pro hac vice) 

Jordan L. Hirsch (pro hac vice) 

Sean K. Thompson (pro hac vice) 

WILMERHALE LLP 

60 State Street 

Boston, MA 02109 

(617) 526-6000 

Grant K. Rowan (pro hac vice) 

WILMERHALE LLP 

1875 Pennsylvania Avenue, NW 

Washington, DC 20006 

(202) 663-6000 

Arthur W. Coviello (pro hac vice) 

WILMERHALE LLP 

950 Page Mill Road 

Palo Alto, CA 94304 

(650) 858-6000 

Attorneys for Defendant Intel Corporation 

IN THE UNITED STATES DISTRICT COURT 

FOR THE DISTRICT OF OREGON 

PORTLAND DIVISION 

MEMORY INTEGRITY, LLC, 

Plaintiff,

v. 

INTEL CORPORATION, 

Defendant.

 Case No. 3:15-cv-00262-SI 

DEFENDANT INTEL CORPORATION’S 

NOTICE OF SUPPLEMENTAL 

EVIDENCE REGARDING CLAIM 

CONSTRUCTION 

Case 3:15-cv-00262-SI Document 161 Filed 12/09/15 Page 1 of 6
 

PAGE i – INTEL CORPORATION’S NOTICE OF SUPPLEMENTAL EVIDENCE 

REGARDING CLAIM CONSTRUCTION 

TABLE OF CONTENTS 

Page 

LR 7-1 COMPLIANCE ...................................................................................................................1

I. INTRODUCTION ...............................................................................................................1

III. DISCUSSION ......................................................................................................................1

A. “A Cache Access Request” (’409 Patent and ’636 Patent) ......................................2

B. “Remote Protocol Engine” / “Local Protocol Engine” / “One of” (’206 Patent and 

’254 Patent) ..............................................................................................................2

Case 3:15-cv-00262-SI Document 161 Filed 12/09/15 Page 2 of 6
PAGE 1 – INTEL CORPORATION’S NOTICE OF SUPPLEMENTAL EVIDENCE 

REGARDING CLAIM CONSTRUCTION 

LR 7-1 COMPLIANCE 

Pursuant to LR 7-1, the parties have met and conferred regarding this Notice of 

Supplemental Evidence. During the meet and confer, Intel proposed that both sides have the 

opportunity to file short notices of supplemental evidence without argument in light of the 

October 30, 2015 deposition of Mr. David Glasco, a named inventor on all five asserted patents. 

MI opposes this submission and has refused Intel’s offer to allow MI to file a similar notice of 

supplemental evidence without argument. MI instead has indicated that it will seek to file an 

additional claim construction brief with additional argument, which Intel opposes. 

I. INTRODUCTION 

Claim construction briefing in this case was completed on October 28, 2015. (See Dkt. 

87 [Scheduling Order].) However, David Glasco, one of the named inventors on all five of the 

asserted patents, was not available for deposition until two days later, on October 30. Intel took 

Mr. Glasco’s deposition on October 30, and Mr. Glasco gave testimony that is relevant to several 

claim construction disputes between the parties. Intel respectfully submits this notice of 

supplemental evidence to bring this testimony to the Court’s attention. 

III. DISCUSSION 

Mr. Glasco’s deposition testimony is relevant to the parties’ disputes with respect to 

several claim terms, including: (A) “a cache access request” and (B) the “remote protocol 

engine” / “local protocol engine” / “one of” terms.1

 

1

 As discussed in Intel’s opening and reply claim construction briefs (Dkt. 134 [Intel 

Opening Br.] at 20-21; Dkt. 151 [Intel Corr. Reply Br.] at 14), inventor testimony can be relevant 

to claim construction. 

Case 3:15-cv-00262-SI Document 161 Filed 12/09/15 Page 3 of 6
PAGE 2 – INTEL CORPORATION’S NOTICE OF SUPPLEMENTAL EVIDENCE 

REGARDING CLAIM CONSTRUCTION 

A. “A Cache Access Request” (’409 Patent and ’636 Patent) 

Consistent with Intel’s proposed construction of “a cache access request,” and Intel’s 

briefing on this claim term (see Dkt. 134 [Intel Opening Br.] at 24-26; Dkt. 151 [Intel Corr. 

Reply Br.] at 19-20), Mr. Glasco testified that a “cache access request” is different from a 

“probe”: 

Q. Now, the patents describe the timing of sending and receiving probes and 

cache access request right? 

A. Right. 

[Objection] 

Q. Is a probe the same as or different from a cache access request? 

[Objection] 

A. It’s different. 

* * * 

Q. Okay. They’re not the same, correct? 

A. Correct. 

(Ex. 1 [Glasco Dep. Tr.] at 93:23-94:20.2) 

B. “Remote Protocol Engine” / “Local Protocol Engine” / “One of” (’206 Patent 

and ’254 Patent) 

Consistent with Intel’s proposed construction of the “remote protocol engine” / “local 

protocol engine” / “one of” terms (see Dkt. 134, at 52-65; Dkt. 151, at 45-56), Mr. Glasco 

testified that the protocol engines of his invention process transactions targeting local or remote 

memory, but not both: 

 

2

 “Ex. 1” refers to the exhibit attached to the Declaration of Arthur W. Coviello in Support 

of Intel Corporation’s Notice of Supplemental Evidence Regarding Claim Construction. 

Case 3:15-cv-00262-SI Document 161 Filed 12/09/15 Page 4 of 6
PAGE 3 – INTEL CORPORATION’S NOTICE OF SUPPLEMENTAL EVIDENCE 

REGARDING CLAIM CONSTRUCTION 

Q. Would you agree that the remote protocol engines of the your 206 and 254 

inventions handled transactions which targeted remote, as opposed to 

local, memory? 

[Objection] 

A. Yes, given the definition of our remote protocol engines. 

Q. So the remote protocol engines that you came up with handled only 

remote memory transactions, right? 

A. Correct. 

[Objection] 

Q. And would you agree that the [local] protocol engines of your 206 and 254 

inventions handled transactions which targeted local, as opposed to 

remote, memory? 

A. Yes. 

 * * * 

Q. So the local protocol engines of your idea handled only local memory 

transactions, correct? 

A. That was the design, yes. 

* * * 

Q. And so we could agree that in the system that is described in your 206, 

254 patents, one protocol engine does not handle both remote and local 

memory transactions, right? 

A. Right. The remote protocol engines and the local protocol engines do not 

process both protocol flows. 

(Ex. 1 at 76:19-78:22.) 

 

Case 3:15-cv-00262-SI Document 161 Filed 12/09/15 Page 5 of 6
PAGE 4 – INTEL CORPORATION’S NOTICE OF SUPPLEMENTAL EVIDENCE 

REGARDING CLAIM CONSTRUCTION 

DATED this 9th day of December 2015. 

 By: 

/s/ Renée E. Rothauge 

Grant K. Rowan (admitted pro hac vice) 

WILMERHALE LLP 

1875 Pennsylvania Avenue NW 

Washington, DC 20006 

(202) 663-6011 

grant.rowan@wilmerhale.com 

Arthur W. Coviello (admitted pro hac vice) 

WILMERHALE LLP 

950 Page Mill Road 

Palo Alto, CA 94304 

(650) 858-6000 

arthur.coviello@wilmerhale.com 

Renée E. Rothauge (OSB #903712) 

MARKOWITZ HERBOLD PC 

1211 SW Fifth Avenue, Suite 3000 

Portland, OR 97204-3730 

(503) 295-3085 

Michael J. Summersgill (admitted pro hac vice)

Jordan L. Hirsch (admitted pro hac vice) 

Sean K. Thompson (admitted pro hac vice) 

WILMERHALE LLP 

60 State Street 

Boston, MA 02109 

(617) 526-6000 

michael.summersgill@wilmerhale.com 

jordan.hirsch@wilmerhale.com 

sean.thompson@wilmerhale.com 

Attorneys for Intel Corporation

Case 3:15-cv-00262-SI Document 161 Filed 12/09/15 Page 6 of 6