## United States Court of Appeals for the Federal Circuit

04-1101

NAZOMI COMMUNICATIONS, INC., Plaintiff-Appellant,

v.
ARM HOLDINGS, PLC, ARM LIMITED, and ARM, INC., Defendants-Appellees.

Thomas J. Friel, Jr. , Cooley Godward LLP, of Palo Alto, California, argued for plaintiff-appellant. With him on the brief were Brandon D. Baum , Lori R.E. Ploeger , and Bernard C. Shek

. Robert P. Taylor , Howrey Simon Arnold & White, LLP, of Menlo Park, California, argued for defendants-appellees. With him on the brief were Andrew Y. Piatnicia and Ethan B. Andelman

. Appealed from: United States District Cour t for the Northern District of California Judge Jeremy Fogel

## United States Court of Appeals for the Federal Circuit
04-1101 NAZOMI COMMUNICATIONS, INC., Plaintiff-Appellant,

v. ARM HOLDINGS, PLC, ARM LIMITED, and ARM, INC., Defendants-Appellees.

__________________ _________ DECIDED: April 11, 2005

__________________ _________
Before MICHEL *
, Chief Judge , RADER, and PROST, Circuit Judges

. RADER, Circuit Judge

. The United States District Court for the Northern District of California granted partial summary judgment in favor of ARM Holdings, PLC, ARM Limited, and ARM, Inc. (collectively ARM), findi ng that ARM’s accused product did not infringe Nazomi Communications, Inc.’s (Nazomi’s) U.S. Patent No. 6,332,215 (the ’215 patent). Nazomi Communications, Inc. v. Arm Holdings, PLC , No. C 02-02521 (N.D. Cal. Sept. 30, 2003). Because the district court did not construe the disputed claim term in sufficient deta il for appellate review, this court vacates and remands.

* Paul R. Michel assumed the positi on of Chief Judge on December 25, 2004.I. The ’215 patent generally claims “a Java hardware accelerator which can be used to quickly translate Jav a bytecodes into nativ e instructions for a central processing unit (CPU).” ’215 patent, col. 2, ll. 3-6. In com puter programming, a series of translations occurs between wh at is written by a human programmer, and the pr ogram that is actually execut ed by the computer hardware. T h is appeal focuses on one of these translations, described below. Sun Microsystems developed a progra mming language called Jav a . ’215 patent, col. 1, ll. 5-10. In the Java environment, a p r ogrammer writes so urce code in the Java language. This source code is then compile d into Jav a bytecodes, “instructions that look like ma chine code, but aren’t specific to any processor.” Id. , col. 1, ll. 26-28. All types of processors can recognize Jav a bytecodes if appropriate bytecode interpreters are provi ded. Two types of memory organization ar e used to store information in computers. Stack-based memories store in formation on a last-in, first-out basis. This approach is analogous to a stack of papers in an inbox. To access a paper at the bottom of the stack, a reader must first remove all of the papers ab ove it. Register-based memories, on the other h and, store and retrieve data acc o rding to the exac t location of each data item, much like an arrangement of post office boxes. Under the analogy, the reader simply identifies and finds the “box” that contains the desired data, whic h can be instantly retrieved. Java bytecodes are written for computers that use a “stack-based” approa ch, whereas most modern processors use a “register-based” approach. Translation of Jav a bytecodes into

04-1101 2a form usable by register-based proce ssors requires translation of Java bytecodes into the “native instructions ” of a register-based processor. In a given machine, either hardware, software, or a combination of the two may perform the translation from stack-based to register-based ins t ructions. One prior art solution for this problem used only software, a Java Virtual Machine (JVM), to perform th e translation. JVMs, however, add processing steps and reduce overall exec ution spee d. Seeking to minimize these dis adv antages in the prior art, the ’215 patent disclos es a har dware Java accelerator that translates stack-based Java byt e code instructions into register-based “native” instructions that are usable by a register-based processor. Of the asserted claims, claim 1 is representative: A system comprising: a central processing unit having a register file, the central processing unit adapted to execute register-based instructions; and a hardwar e unit ass o ciated with the cent ral proces sing unit, the hardware unit adapted to convert st ack-based inst ructions into register-based instruc t ions , wher ein a portion of the operand stack is stored in the register file of the central processing unit and wherein the hardware unit is adapted to produce at least one of overflow or underflow indication s for the portion of the operand stack stored in the register file , wherein the hardware unit is adapted to swap parts of the oper and stack in and out of the register file from a memory, t he system including an indication o f the depth of the portion of operand stack, wherei n a[ n] overflow or underflow produces an operand transfer between the register file in the central processing unit and memory. Id. , col. 7, ll . 24-41 (emphasis added). In the proceedings below, the parties disputed the meaning of the term “instruction.” Nazomi proposed a broad def inition of “instruction” as a command that specifies or caus es performance of an operation or function. ARM m o re

04-1101 3narrowly proposed, int e r alia , that an “instruction” is “provided to the processor at its input and thus must be recognizable to the dec oder.” ARM further ma de a distinction between “instructions” and “contr ol signa ls ” which, it asserted, are the signals generated by the proc essor’s decoder that control downstream hardware. Although not fully persuaded by ARM’s narrow proposal for “instruction,” the district court nevertheless construed “t he terms of the patent claims as calling for a hardware unit or subunit that conver ts stack-based instructions into the register-based instruc t ions prior to the processing of t hose instructions by the processor in the so-called ‘decode stage .’” Nazomi , slip op. at 6 (emphasis added). Without analyzing the accused product in the light of this construction, the district court reached the conclus i on that ARM’s accused device did not infringe the ’215 patent either literally or under the doctri ne of equivalents. 1 Id. , slip op. at 7. II. Here, the district court found that, bas ed upon its claim construction, there could be no genuine issue that ARM’s pr oduct did not infringe the ’215 patent, and granted summary judgment. This c our t reviews grants of summary judgment without deference. Conroy v. Reebok Int’l Ltd. , 14 F.3d 1570, 1575 (Fed. Cir

. 1994). A summary judgment motion is prop er if there are no genuine iss ues of material fact, while viewing the facts in a light most favorable to the non-moving party. Se e Fed. R. Civ. P. 56(c); Celote x Corp. v. Catrett , 477 U.S. 317, 322

1 Nazomi accused both Revision 2 and Revis i on 3 ARM processors of infringement. The parties’ summary judgment motions addressed only Revis i on 3. Thus, Revision 3, or “Jaz elle,” is the only device implicated o n appeal.

04-1101 4(1986). A f i nding of infringem ent, whether lit eral or by equivalents , is a quest ion of fact. Bai v. L&L Wings, Inc. , 160 F.3d 1350, 1353 (F ed. Cir. 1998). The district court’s claim construction, a matter of law on appeal, receives no deference f r om this court. Cybor Corp. v. FAS Techs., I n c. , 138 F. 3d 1448, 1454 (Fed. Cir. 1998) (en banc). Infringement is a two-step inquiry, in which a court must first construe disputed claim terms, and then compare t he properly construed claims to the accused device. Cyb o r Corp. , 138 F.3d at 1454. The patent’s intrinsic record is the primary tool to supply the context for interpretation of disputed claim terms. Vitronics Corp. v. Conceptronic, Inc. , 90 F.3d 1576, 1582 (Fed. Cir. 1996). This tool usually provides the technological and te mporal context to enable the c ourt to ascertain the meaning of the claim to one of ordinary skill in the art at the time of invention. Moba v. Diamond Automation, Inc. , 325 F.3d 1306, 1315 (Fed. Cir. 2003) (“Moreover, as this court has repeat edly counseled, the best indicator of claim mea n ing is its usage in c ontext as u nderstood by one of skill in the art at the time of invention.”). In most cases, the best source for discerning this proper context is the patent spec ification, wherein the pat ent applic ant describes the invention. Metabolite Labs., Inc. v. Lab. Cor p . of Am. Holdings , 370 F.3d 1354, 1360 (Fed. Cir. 2004). If necessary, courts may also look to extrinsic evidence, often presented in the form of expert testimony. Pitney Bowes, Inc. v. HewlettPackard Co. , 182 F.3d 1298, 1309 (F ed. Cir. 1999) (“[C]onsul tation of extrinsic evidenc e is particularly appropriate to ens ure that [the court’ s] understanding of the technical aspects of the patent is not entirel y at varia n ce with the

04-1101 5understanding of one sk illed in the art.”); Vitronics , 90 F

. 3d at 1582. Dictionaries may also help interp ret claim language. Se e , e.g. , Tex. Digit a l Sys., Inc. v. Telegenix, Inc. , 308 F.3d 1193, 1202 (Fed. Cir. 2002).
III. The distric t court, as noted earlier, construed “the terms of the patent claims as calling for a hardware unit or subunit that converts stack-based instructions into the register-based instru ctions prior to the processing of thos e instructions by the pr ocessor in the so -called ‘decod e stage.’” The trial court explained this construction in one paragraph of a terse seven-page order: In so [construing], th e Court is not reading into the claims a limitation fr om the specification. Rather, the court is construing the patent, as it must, in light of the s pecification. Both the specification and the prosecution history reveal that the prior art – picoJava and other specialized Java processors – implement a hardware solution for processing J a va bytecodes. It follows nec ess a rily that t he claims of the patent, to be valid, must reach a different type of hardware solution, and that the so lution of the prior art does not infringe. Nazomi , slip op. at 6 (emphasis in original). In thus focusing on v a lid ity, this limit ed approach glosses over, if it does not ignore entirely, the in trinsic evidenc e -- the clai ms, specification, and prosecution history -- that must i n form t he court’s claim construction. It is an old axiom that patents “are to receive a liberal construction, and under the fair application of the rule, ut res magis valeat quam pereat , are, if practicable , to be so interpreted as to uphold and not to des troy the right of the inventor,” Turrill v. Mich. S. & N. Ind. R.R. , 68 U.S. 491, 510 ( 1863) (em phasis added). However, the phrase “if practicable” cannot be ignored, and courts should not rewrite

04-1101 6claims to preserve validity. See , e.g., Rh ine v. Cas i o, Inc. , 183 F.3d 1342, 1345 (Fed. Cir. 1999). (“ [I]f the only claim c onstruction that is consistent with the claim’s language and the wr itten description renders the claim invalid, then the axiom does not apply and the c l aim is s i mply inv a lid.”). In sum, it is esse ntia l to understand the claims before their breadth is limited fo r purposes of preserv i ng validity. Otherwise the constr uing court has put the val i dity cart before the cl aim construction horse. As briefed by the parti es, the only claim ter m di sputed both be lo w and on appeal is “instruction.” Nazomi’s definit ion of this term, “a command that specifies or causes an operation or func tion to be performed,” is broad. This proposed construction does not constrai n the format of the command, the location of the command withi n a program sequence, or the type of unit, subunit, or component of hardware that uses the “instruction.” ARM’s proposed definition, “a pattern of bits . . . in binary c ode . . . an element of instruction set architecture

. . . that the particular proc essor can recognize at it s external input and decode,” specifies the type of code, the context of the instruction within a full set of instructions (“architecture”), t he need to input the instruction into a processor at an “external input,” and a re quirement for processor decodin g . To ARM, the instructions are input to a decoder and the output of the decoder is “control signals,” which “actually c aus e the phy sical exec ution of each instruction.” To reach a proper construction, the dist rict court must look first to the claims, the specific ation, and the prosecut ion history, and if further guidance is

04-1101 7needed, to extrinsic ev idence, suc h as dict ionaries and expert opinions. The trial court should use the term’s “ordinary and accustomed” meaning to on e of ordinary sk ill in the art as a touch s tone for meanin g . Th us, the district court must determine what “instruction” means to one of ordinary skill in th e art, and then must determine whet her the specificati on indic a tes that the patentee meant a different definition. See, e.g. , Moba , 325 F.3d at 1315 (“[T]he best indic a tor of claim mea n ing is its usage in c ontext as u nderstood by one of skill in the art at the time of invention.”); Te x. Digit al , 308 F.3d at 1204. In this patent, it appears that the in vento r defined “instructions” in an indirect m anner. Specifically, the specif ication refers primarily to what the instructions do and where t hey may do it. The cour t may search for either a specific definition by the inventor or a di sc laimer of a definitio n wit hin the intrinsic evidenc e, but the closest it may be able to come is t hat “generic instruc t ions, such as by tecodes, [] indic a te the operati on of a v i rtual machine.” ’215 patent, col. 7, ll. 11-13. The trial court’s inte rpretation at least needs to account for this
statement. The trial court may also wish to refer to the prior art refer ences by Krall, et al

. and Dic kol, et a l. discussed by both the examiner and the inventor during prosecution. These important prior art references may enlighten the meaning of “instructions.” After all, the prior art is often a reliable source of the understand ing of one of ordi nary skill in the art. The trial c ourt should also consider that possib l e embodiments of the invention may throw light on the meaning of “instructions.” In so doing, however,

04-1101 8the court may conclude that the scope of the various claims may differ, some embracing different subject matter than is illustrated in the specific embodiments in the spec ification. See, e.g. , Va. Panel Corp. v. MAC Panel Co. , 133 F.3d 860, 866 (Fed. Cir. 1997) (“[D]evice claims ar e not limited to devices which oper ate precisely as the embodiments described in detail in the patent.”). For exam ple, independent claim 1 describes a central processing unit having a register file adapted to exec ute register-bas ed instructions and a hardware unit that converts stack-based instructions into r egiste r-based instructions. Claim 1 does not specify the physical relations hip of t he hardware unit to the CPU. Dependent claim 3, on the other hand, narrows cl aim 1 by describing a version of the invention in which the hardw are unit is “outside of th e central processing unit.” The concept of claim differentiation “ normally means that limitations stated in dependent claims are not to be read into the independent claim from which they depend.” Karlin Tech., Inc. v. Surgical Dynamics, Inc. , 177 F.3d 968, 971- 72 (Fed. Cir. 1999); see a lso Innov a/Pure Water, Inc

. v. Safari Water Filtration Sys. Inc. , 381 F.3d 1111, 1123 (Fed. Cir. 2004). This guideline for claim construction also suggests that the bounds of claim 3 differ from those of claim 1. Claim 3 describes an embodime nt that may correspond to Figures 1 and 3 of the patent specification. Claim differentiation s uggests that different embodime n ts, reflecting the broader wording of claim 1, are also per missible. The court must consider not only that different embodim ents are possible, but also that the meaning of “instruction” in the claims must be the same in all of them. Dayco Prods., Inc. v. Total Containment , Inc. , 329 F.3d 1358, 1371 (Fed. Cir. 2003) (“[I]f

04-1101 9a claim term appears in more than one claim it should be construed the same in each.”). Many of the claims, and the specif ication, describe the instruction conversion unit as included in the CPU and perhaps sharing some of its functions with the CPU. The specificat io n, at col. 3, ll. 35-41 , permits incorporating the hardware accelerator into a CPU. Co rrespondingly, claims 2, 30, and 37, and related dependent claims, liter ally include the hardware unit in the CPU. Claims 39-70 state that the CPU “comprises” the ha rdware unit. “Comprising” is often synonymous with “inc luding.” Mars, Inc. v. H.J. Heinz Co. , 377 F.3d 1369, 1375 (Fed. Cir. 2004). The s pecification, at col. 3, ll. 54-60, describes an embodiment in whic h some bytecodes (ins t r uctions) are “process ed” not by the hardware accelerator, but by the CP U its e lf. In that case, both the hardware accelerator and the CPU share the instruction conversion function. The inv e ntion thus appears to enable many variations in the location and f unctions of the hardware accelerator vis-à-vis the CPU. The meaning of “instruction” in the claims must accommodate all of these s pecif ied variations, at a minimum. The meaning of “instruction” must also be broad enough to encompass the reasons for allowance of the ‘215 pat ent. In his reasons for allowance, the examiner c onceded that the prior art did not teach t hat the hardware unit “is adapted to swap parts of the op erand stack in and out of t he register file from a memory,” and “a[n] overflow or under flow pr oduces an operand transfer between the register file in t he central proc essing unit and memory recited in the independent claims,” and the performance of these functions in the context of

04-1101 10the invention was es s ential for patentability. Therefore, it is es pecially important that any construction of “instructi on” must be consistent with these functions. Finally, although bot h parties pres ented testimony on the meaning of “instructions,” the district court provided n o analys is of the leve l of ordinary skill in this art nor the likely understanding of “i nstruction” to the artisan who had such skill at the time of the patent application. Th is court, in this instanc e, simply h a s very little to review without some reasoning on these points as well. ARM, the appellee here, appears to re cognize the s hortcomings of the district court’s analysis, but goes too far in arguing that “[ b]ecause this Court reviews both claim c o nstruction and summary judgment rulings de novo, it does not matter for this appeal how the district court might have articulated the issues of claim construction and noninfringement.” Appellee’s Brief at 26. Although this court indeed reviews a district court’s claim construction without deference, Cybor Cor p

. , 138 F.3d at 1456, ARM cannot baldly a ssert that the district court’s articulation of its claim construction reas oning “does not matter. ” In reviewing a district court’s claim c onstruction, this court takes into account t he views of the trial judge, as well as t he record of the trial, wh ich helped that judge to understand the terms of the claim. T hough we review those views and that record “de novo,” “common sense dictates that the trial judge’s view will carry weig ht.” Id. at 1462 (Plager, J., concurring). This court’s review of a district c ourt’s claim construction, albeit without deference, nonetheless is not an independent ana lysis in the first instance. Moreover, in order t o perform such a review, this court must be furnished

04-1101 11“sufficient findings and reasoning to permit meaningful appellate scrutiny.” Gechter v. Davidson , 116 F.3d 1454, 1458 ( F ed. Cir. 1997) . This requirement for sufficient reasoning applies wit h equal force to issues of law, such as claim construction, and issues of fact, such as infringement. Id. This court rarely remands the issue of claim construction. See Gechter , 116 F.3d at 1459 (in an interference, remandi ng to the Board of Patent Appeals and Interferences for lack of a claim constr uction analysis as well as conc lusory anticipation findings); Graco, Inc. v. Binks Mfg. , 60 F.3d 785, 791 ( F ed. Cir. 1995) (“The entire omission of a claim construc tion analys is from the opinion, and the conclusory factual findings on infri ngement, each provide an independent basis for remand. Becaus e ins u fficient finding s preclude meaningful review by this court, we remand.”). But see Optical Disc Corp. v. Del Mar Avionics , 208 F.3d 1324, 1334 (Fed. Cir. 2000) (declining to remand where the district court had “inferentially set forth its view of the scope of the claims of the . . . patent”). Unlike Gechter and Graco , where the records were devoid of any c l aim construction analys is , the district court in this cas e provided some claim construction analysis. Nonetheless this analysis is inadequate because it does not supply the basis for its reasoning su fficient for a meani ngful review. This court must therefore remand fo r further claim construction and, as indic a ted below, subsequent infringement anal ysis. In so doing, this court cautions against the nonviable “practicing t he prior art” defense t h at the dis t rict court may have found appealing in reaching its result. See Baxter Healthcar e Corp. v. Spectramed, Inc ., 49 F.3d 1575, 1583 (Fed. Cir.1995) (“Literal

04-1101 12infringement exists if each of the limitati ons of the asserted cl aim(s) read on, that is, are found in, the accused device. Questi ons of obviousness [or anticipation] in light of the prior art go to validity of the claims, not to whether an accused device infringes.”)

. IV. In its infringement analysis the district court was, if anything, more curt than in its claim construction: Plaintiff has articulated arguments as to why Jazelle c ould be seen to infringe the claims of the ’215 patent in the sense t hat Plaintiff believes those claims should be understood. Plaintiff has not shown, however, how picoJ a va or other specialized Java processors would not also infringe under such an interpretation of the claims. The Court therefore conclud e s that Revis i on 3 does not infringe the ’215 pat ent either lit erally or under the doctrine of equivalents , and that no reasonable trier of fact could find to the contrary. Nazomi , slip op. at 6-7. This “infringement analysis” is circul ar, based upon an interpretation that strives to preserve validity. The scope of the claim invariably affects its relationship to prior art, but courts are not i n a posture to alter the claim scope and thus those relationships. Thus, this court struggles to grasp the trial court’s analys is. Moreover, under this court’s holdings in Graco and Gechter , supra , the absence of findings of fact on the nature of the accused devic e m a kes appellate review of infringement fruitless. Ev en under the trial c ourt’s underdeveloped claim cons truction, thi s court has no bas is to determine that Jazelle conv erts stack-based instructions into register-based instructions “prior to the processor in the so-called ‘decode stage.’” Understan ding the accused device is ess ential

04-1101 13because once the claims are construed, infringement is assessed by comparing the accused device to the cl aims, and the accused devic e infringes if it incorporates every limitation of a claim , either literally or under the doctrine of equivalents

. Se e , e.g

. , Deer ing Precision Instruments, L.L.C. v. Vector Distrib. Sys., Inc

. , 347 F.3d 1314, 1324 (Fed. Cir. 2003). Because the court construed the claims differently than both Nazomi and ARM, the record on appeal c ontains no testimony by any expert or ot her indic a tions that ARM’s product includes ea ch feature of the construed claims. Without such record evidence, this court cannot tell whether a dispute of materia l fact bars a finding of in fringement on s u mmary ju dgment. A proper claim construction in this case might benefit from testimony or other evidenc e to disclos e the subtleties of the many claime d variations of the invention. This testimony should assis t the court in resolv ing the relationship that ARM alleg e s to exist between “instructions” and what ARM calls “control signals.” The trial court on remand will also have the opportunity to examine the way the ARM produc t performs the proces s of instruc t ion translation, including a specific comparison of that product with the process in the claims. Then, on
appea l, this court will have the benefit of a complete analys is o f the accused product, an analysis not evident in the current record. This court notes that Mr. Patel, one of the inventors named on the ‘215 patent asserts that he “largely agree[s]” with Mr. S t eele, who is ARM’s Java program manager, as to how the ARM product operates. Mr. Steel e, for his part, presents only a very high-lev e l block di agram of the ARM product and asserts

04-1101 14that the product does not infringe, primarily bec ause it translates Java instructions into “control signals,” not AR M instructions. Becaus e the ‘215 patent claims the invention in diverse ways, the trial court on remand will hav e the opportunity to require more than this superfi c i al description of t he operation of the accused product. The trial court may find v a lue, for example, in requesting a set of competing infringement charts, not evident in the record before this court, rather than the thousands of lines of unhelpful com put er code. Such charts would assist the court in its comparison of every elem ent in the asserted claims with the accused device. Accordingly, this court vacates and re mands to the district court for a detailed analysis of the dis puted claim construction, an d for factual findings in support of i t s noninfringement opinion. COSTS Each party shall bear its own costs. VACATED and REMANDED

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