# Patent

## Title
Scaled signal processing elements for reduced filter tap noise

## Abstract

An adaptive transversal filter having tap weights Wj which are products of corresponding tap coefficients Cj and tap gains Mj is provided. A filter control loop controls all of the tap coefficients Cj such that an error signal derived from the filter output is minimized. One or more tap control loops controls a tap gain Mk such that the corresponding tap coefficient Ck satisfies a predetermined control condition. For example, |Ck| can be maximized subject to a constraint |Ck|≦Cmax, where Cmax is a predetermined maximum coefficient value. In this manner, the effect of quantization noise on the coefficients Cj can be reduced. Multiple tap control loops can be employed, one for each tap. Alternatively, a single tap control loop can be used to control multiple taps by time interleaving.

## Background
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation of U.S. patent application Ser. No. 10/944,168, filed Sep. 16, 2004, and issued as U.S. Pat. No. 7,483,479 on Jan. 27, 2009, which application and patent are incorporated by reference herein.


FIELD OF THE INVENTION
This invention relates to adaptive filters for signal processing.
BACKGROUND
Present day communication systems typically perform various signal processing functions in order to provide communication. One common signal processing element in communication systems is a filter, which generally provides an output signal y(t) that depends on an input signal x(t). Such filters can be designed to perform various useful functions in a communication system, such as attenuating interfering signals and/or out of band noise. Filtering is well known, and accordingly many filter implementations have been developed. Here we are concerned with transversal filters.
FIG. 1 is a block diagram of a typical prior art transversal filter. In the filter of FIG. 1, the input x(t) is provided to a delay line including time delay elements 104, 106, 108, . . . in succession. If the time delays provided by delay elements 104, 106, 108, . . . are all equal to Td, then the outputs of delay elements 104, 106, . . . are x(t−Td), x(t−2Td), etc. The filter output y(t) is a weighted sum of the values provided by the delay line. This sum is provided by multiple filter taps, one of which is labeled as 110 on FIG. 1. In tap 110, a weight 114 having a value W2 and the output of delay element 104 are provided to a multiplier 120. The output of multiplier 120 is received by a summing junction (or summer) 124 which provides y(t) as an output. Thus, tap 110 provides a term equal to W2x(t−Td) in the output y(t). Similarly, weight 112 and multiplier 118 provide a term W1x(t) in y(t), and weight 116 and multiplier 122 provide a term W3x(t−2Td) in y(t). Transversal filters can have any number of taps. The input-output response of the filter (i.e., the relation between y(t) and x(t)) is determined by the tap weights Wj and the delays provided by the delay line.
FIG. 2 shows a typical prior art adaptive transversal filter. On FIG. 2, a transversal filter 202 receives an input x(t) and provides an output y(t). In the example of FIG. 2, filter 202 is a three tap filter having tap weights W1, W2, and W3. The filter output y(t) is also provided to an error estimator 204, which derives an error signal in part from the filter output y(t). Typically, other signals (not shown) are also input to error estimator 204. These other signals, along with y(t), are used to derive the error signal. This error signal is received by a weight generator 206, which controls the weights in filter 202 to minimize the error signal. Thus the arrangement of FIG. 2 functions as a filter control loop that controls the weights Wj in order to minimize the error signal. Transversal filters are particularly suitable for such adaptive filtering, since the output y(t) depends on the weights Wj in a simple manner that facilitates closed loop control.
Such adaptive filtering has found many applications, which primarily differ in the signal that is regarded as the “error signal” to be minimized. For example, in decision feedback equalization, the error signal is an error estimate provided by a slicer that quantizes the filter output y(t) to a set of digital signal levels. In interference cancellation, the error signal to be minimized is the contribution to the output y(t) from an interfering signal z(t). These various alternatives for the error signal to be minimized correspond to delivery of different signals (not shown) to error estimator 204 in addition to filter output y(t).
Adaptive filtering as shown in FIG. 2 is well known, and various modifications of the basic scheme are typically directed toward reducing the computations required for filtering. The multiplication of tap weight and delayed input is of particular interest in the art. For example, U.S. Pat. No. 4,782,458 considers the restriction of tap weights to powers of two, which allows multiplication to be performed by shifting. Similarly, U.S. Pat. No. 4,691,293 considers encoding the filter input in powers of two, which also allows multiplication to be performed by shifting. U.S. Pat. No. 3,959,637 uses delta coding for the tap weights in order to obviate the need for digital multiplication circuits. U.S. Pat. No. 4,031,377 considers multiplication where a floating point factor is approximately expressed as a sum of two terms, the two terms selected to facilitate rapid multiplication by shifting.
However, the conventional arrangement of FIG. 2 has drawbacks that provide room for improvements other than reducing computation time. Consider an example where the tap weights Wj are digital and can vary from −511u to 512u, where u is a unit weight. A relatively large tap weight having W on the order of 500u has a precision of about 0.2%, while a relatively small tap weight having W on the order of 10u only has a precision of about 10%. Thus, smaller tap weights tend to be less precise than large tap weights. An alternative point of view is to regard +/−1u as a “quantization noise” which is additive to the tap weights. Such quantization noise has a larger relative impact on small tap weights than on large tap weights in the conventional arrangement of FIG. 2.
Accordingly, it would be an advance in the art to provide adaptive transversal filtering that provides improved precision for relatively low tap weights. It would also be an advance in the art to reduce the impact of quantization noise for relatively small tap weights.
SUMMARY
The present invention provides an adaptive transversal filter having tap weights Wj which are products of corresponding tap coefficients Cj and tap gains Mj. A filter control loop controls all of the tap coefficients Cj such that an error signal derived from the filter output is minimized. One or more tap control loops controls a tap gain Mk such that the corresponding tap coefficient Ck satisfies a predetermined control condition. For example, |Ck| can be maximized subject to a constraint |Ck|≦Cmax, where Cmax is a predetermined maximum coefficient value. In this manner, the effect of quantization noise on the coefficients Cj can be reduced. Multiple tap control loops can be employed, one for each tap. Alternatively, a single tap control loop can be used to control multiple taps by time interleaving.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram of a typical prior art transversal filter.
FIG. 2 is a block diagram of a typical prior art adaptive transversal filter.
FIG. 3 is a block diagram of an adaptive transversal filter according to an embodiment of the invention.
FIG. 4 is a block diagram of a three tap decision feedback equalizer according to an embodiment of the invention.
FIG. 5 is a block diagram of a three tap decision feedback equalizer according to another embodiment of the invention.
FIG. 6 is a block diagram of a three tap decision feedback equalizer according to yet another embodiment of the invention.



DETAILED DESCRIPTION
FIG. 3 shows an adaptive transversal filter according to an embodiment of the invention. On FIG. 3, a transversal filter 302 receives an input x(t) and provides an output y(t). In the example of FIG. 3, transversal filter 302 has N=3 taps having weights Wj, where 1≦j≦N. Weight W1 is expressed as a product of a coefficient C1 and a gain M1. Weights W2 and W3 are equal to coefficients C2 and C3 respectively. Thus the corresponding gains M2 and M3 can be regarded as being set to unity in this example. The filter output y(t) is received by error estimator 204 (as on FIG. 2), which provides an error signal to coefficient generator 306. Coefficient generator 306 provides coefficients C1, C2 and C3 to transversal filter 302. Coefficient C1 is received by dynamic gain logic 308, which provides gain M1 to transversal filter 302.
The operation of the embodiment of FIG. 3 can be regarded as a double control loop. A filter control loop including filter 302, error estimator 204 and coefficient generator 306 controls all tap coefficients (i.e., C1, C2, and C3 in this example) to minimize the error signal provided by estimator 204. As indicated above, one or more other signals (not shown) are typically input to error estimator 204 in addition to y(t) to provide the error signal. Thus the error signal is derived in part from y(t). In addition to this filter control loop, a tap control loop acts on tap 1 and controls gain M1 such that coefficient C1 (as controlled by the filter control loop) satisfies a predetermined control condition. For example, |C1| can be maximized subject to the constraint |C1≦Cmax, where Cmax is a predetermined maximum coefficient value.
Consideration of a simple example will show how the configuration of FIG. 3 achieves the objective of reduced quantization noise in adaptive filtering. Suppose the coefficient generator is digital and can provide integer coefficients in the range from −511 to 512. We also take M2=M3=1u, and assume M1 can take on a value selected from the set {1u, u/2, u/4, u/8, u/16, u/32, u/64}. This set of gains can also be regarded as integer multiples of a unit gain G0: {G0, 2G0, 4G0, 8G0, 16G0, 32G0, 64G0}, where G0=u/64. These multiples are powers of two in this example. We also assume the action of the filter control loop causes the filter weights to stabilize at about the following values: W1=20u, W2=20u, W3=500u.
The precision of W3 is about 0.2%, while the precision of W2 is about 5%, which is much worse. Equivalently, it is clear that W2 is much more affected by quantization noise than W3. Even though W1 and W2 have the same numerical values in this example, the precision of W1 can be much better than the precision of W2. Suppose the predetermined control condition on C1 is to maximize its magnitude subject to the constraint |C1|≦450 (to provide some dynamic range margin). In this example, the dynamic gain logic 308 can perform a few simple calculations to determine that setting M1=u/16 satisfies the assumed control condition on C1. The resulting value of C1 is 320, which has a precision of about 0.3%. Thus the dynamic gain scaling provided by the tap control loop acting on tap 1 provides greatly improved precision for the W1 tap weight compared to the conventional approach used to provide the W2 tap weight. Note that C1 is controlled by the filter control loop, and automatically assumes its higher value as a result of the inclusion of tap gain M1=u/16 into the filter control loop path pertaining to C1 (and W1).
Such provision of dynamic tap gain is applicable in a wide variety of ways to adaptive transversal filters. For example, only one tap control loop is shown on FIG. 3 for simplicity, but the invention can be practiced with any number of tap control loops. More specifically, if a tap control loop acts on a tap k where 1≦k≦N, (N being the number of taps) then one or more additional tap control loops can be added, each indexed with a distinct integer n where 1≦n≦N and n≠k. Each of these additional loops controls its corresponding tap gain Mn such that its corresponding tap coefficient Cn satisfies a predetermined control condition.
Another variation is the use of a single tap control loop to control multiple tap gains. In many cases, it is reasonable to assume that suitable tap gains do not change greatly from one tap to the next. For example, a tap control loop acting on tap 15 controls tap gain M15, and in many cases, it would be more reasonable to set M16=M14=M15 directly than to provide separate tap control loops for taps 14 and 16. The range could be extended further (e.g., from M12 through M18 inclusive), depending on the application. More generally, a tap control loop acting on a tap k can also act on one or more taps m where m≠k by setting Mm=Mk. In such cases, the control condition to apply to Ck is preferably maximization of |Ck| subject to the constraint that |Ck| and all of the |Cm| remain below a predetermined maximum value.
Other variations relate to operation modes of the tap control loops. In some cases, the tap control loops will act on their respective taps to control the corresponding tap gains at substantially all times the filter is operating. In other cases, the tap control loops will only be active during an initialization phase of filter operation, the tap gains Mj being held constant during non-initialization operation. Another alternative is automatically disabling taps having a weight Wj≦Wmin, where Wmin is a predetermined minimum weight. Such disabling of taps having small weights can reduce power consumption, decrease noise and/or improve linearity.
Another variant operating mode is based on the expectation that in many cases, the tap gains Mj will not change rapidly in closed loop operation. Therefore, it is possible to use a single tap control loop to individually control multiple taps by time interleaving. More specifically, in a filter having a single tap control loop, the index k designating which tap the tap control loop acts upon can be varied during filter operation. For example, k can cycle repeatedly through all values 1 . . . N where N is the number of taps. When the tap control loop is not acting on a tap, the corresponding tap gain is held constant. If the time interval between updates to the tap gains is smaller than the time scale for significant changes to the tap gains, such time interleaving does not incur a significant performance penalty.
In the example of FIG. 3, it was assumed that the tap control loop forms a difference between |Ck| and Cmax in order to determine what adjustment to make to Mk. In some cases this difference is available, and in other cases this difference is not available. However, a tap control loop having a comparator that provides a two-level output indicating which of |Ck| and Cmax is larger can also be used in a tap control loop according to the invention, although loop settling is generally faster if the difference between |Ck| and Cmax is available. In the example of FIG. 3, if we assume Mk has an initial value of 1u and that the tap control loop has only a comparator, we see that the loop will set Mk to u/2, u/4, u/8, and u/16 in succession, and then Mk will alternate between u/16 and u/32 thereafter. In this example, it is preferable to set Cmax low enough such that |Ck|≦2*Cmax is still within the operating range of the circuit, such that this alternation does not cause Ck to go out of bounds. Furthermore, in cases where the loops for controlling Mk are only active during initialization, it is preferable to select the higher Mk of such an alternation as the value to hold fixed once initialization ceases, in order to keep Ck well within the operating range of the circuit.
Examples of decision feedback equalizers (DFE) in accordance with embodiments of the invention are shown on FIGS. 4-6. Lines that cross on FIGS. 4-6 are not electrically connected unless there is a dot or a circle at the intersection. A circle is used to indicate a connection to a bus having multiple signals, and buses are shown with heavy lines. FIG. 4 shows a DFE according to an embodiment of the invention. An analog summer 402 receives an external input x(t) and receives inputs from multipliers 422, 424, and 426, and provides an output y(t) (equal to the sum of all inputs) to a slicer 404. Slicer 404 provides a data output “d”, or d(t), and an error output “e”. The input x(t) is preferably buffered with a buffer (not shown) before summer 402 in order to isolate the DFE from upstream circuitry.
The data signal d(t) is input to an adaptive transversal filter formed by delays 416, 418, and 420, and by multipliers 422, 424, and 426. Note that y(t)=x(t)+f(t), where f(t) is the output of this transversal filter responsive to d(t). Delay elements 416, 418 and 420 provide inputs to multipliers 422, 424, and 426 respectively. Multipliers 422, 424 and 426 receive coefficients C1, C2, and C3 respectively from a coefficient generator 408, and receive tap gains M1, M2 and M3 respectively from a dynamic gain logic 412.
The data and error signals from slicer 404 are received by a digital filter/correlator 406 which filters the data signal and correlates the result to the error signal to provide signals to coefficient generator 408. Coefficient generator 408 provides coefficients C1, C2, and C3 to multipliers 422, 424, and 426 respectively. Digital filter/correlator 406 and coefficient generator 408 are well known in the art. For example, a typical algorithm for this sort of closed loop adaptive filter is called Least-Mean Squared (LMS) filtering.
Coefficients C1, C2, and C3 are also received by a comparator 410, which compares their magnitudes to a predetermined value Cmax input to comparator 410. The output of comparator 410 is received by dynamic gain logic 412 which controls the tap gains M1, M2, and M3 such that the magnitudes of the corresponding coefficients C1, C2, and C3 are maximized subject to the constraint |Cj|≦Cmax. Thus the example of FIG. 4 can be regarded as including an adaptive transversal filter of the kind shown on FIG. 3, except that all three taps have dynamically controlled gains on FIG. 4 as opposed to only one tap having a dynamically controlled gain on FIG. 3.
Delay elements 416, 418, and 420 are preferably shift registers. Multipliers 422, 424, and 426 are shown as three-input multipliers, each providing an output proportional to the product of its three inputs. Such three-input multipliers can be implemented in various ways. A single three-input multiplier can be used in cases where a suitable single component is commercially available. A more flexible alternative is the use of two two-input multipliers. For example, a first two-input multiplier can receive Mk and Ck as inputs and provide Wk as an output, and a second two-input multiplier can receive Wk and d(t−Tk) as inputs, and provide Wk×d(t−Tk) as an output. In this approach, the first multiplier need not be a four quadrant multiplier, since Mk is preferably positive. Generally, inputs and outputs of a multiplier can be either analog or digital in any combination. Two-input multipliers having any combination of analog and/or digital inputs and outputs are known. Thus, provision of three-input multiplication having any combination of analog and/or digital inputs and outputs can be accomplished by appropriately combining two two-input multipliers. For example, a two-input Gilbert cell multiplier can have a digital input and an analog input.
FIG. 5 shows a DFE similar to the DFE of FIG. 4 except for two differences: 1) on FIG. 5 a single time-interleaved control loop is used to control the tap gains; and 2) the tap control loop of FIG. 5 forms a difference between |Ck| and Cmax. More specifically, on FIG. 5 a tap selector 502 selects which of the taps the tap control loop is currently acting on. In typical operation, tap selector 502 will repeatedly cycle through all taps (e.g., 1,2,3,1,2,3, etc.) so that each tap has its gain under active control some of the time. Tap selector 502 provides the selected tap coefficient Ck (as an analog signal) to an analog to digital converter (ADC) 504, which provides a corresponding digital output. The digital output is received by dynamic gain logic 506, which also receives the maximum coefficient value Cmax as an input. Dynamic gain logic 506 forms the difference between Cmax and the selected coefficient |Ck| in order to control the corresponding tap gain Mk. Tap selector 502 provides an input to gain logic 506 indicating which tap the loop is acting on. Tap gains Mm with m≠k are held constant while the tap control loop is acting on tap k. In typical operation, the tap gains will change slowly, which allows time interleaving as described without excessive error.
FIG. 6 shows a DFE similar to the DFE of FIG. 4 except that most of the analog circuitry shown on FIG. 4 is replaced with equivalent digital circuitry. Generally, the invention can be practiced with any combination of analog and/or digital circuitry, so the embodiments shown on FIGS. 4 and 6 are by way of example as opposed to limitation. More specifically, on FIG. 6 the output of analog summer 402 is provided to an ADC 602. The digital output of ADC 602 is provided to a digital slicer 604, which provides a quantized digital version of its input to the delay line formed by delay elements 416, 418, and 420.
As on FIG. 4, digital filter/correlator 406 receives data and error signals from slicer 604, and provides signals to a coefficient generator 606. Slicer 604, filter/correlator 406 and coefficient generator 606 can be integrated into a single digital signal processing (DSP) unit, and such integration is preferred for this embodiment. Coefficient generator 606 provides coefficients C1, C2, and C3 as digital values to multipliers 610, 612, and 614, and to dynamic gain logic 608. Gain logic 608 relates the magnitudes of coefficients C1, C2, and C3 to a maximum coefficient value Cmax (either by simple comparison or by forming a difference) in order to control corresponding tap gains M1, M2, and M3. Note that since Mk tends to have discrete values (u/2, u/4, etc), Ck is not generally set to Cmax but rather |Ck| ends up having a value near Cmax due to closed-loop operation. Multipliers 610, 612 and 614 are implemented in digital hardware. The outputs of multipliers 610, 612, and 614 are received by a digital summer 616, which provides its digital output to a DAC 618. DAC 618 provides its analog output to analog summer 402.
In digital embodiments, it is preferable to restrict the tap gains such that they are integer multiples of a unit gain G0, to simplify implementation of multiplication. It is especially advantageous for these integer multiples to be powers of two, such that digital multiplication by the tap gains can be performed with a simple bit shifting operation.
The preceding description provides several examples of embodiments of the invention. Many variations of these examples can also be used to practice the invention. In particular, functions shown in distinct blocks on block diagrams can generally be combined into a single block, and functions shown in a single block can be distributed over multiple blocks, while still practicing the invention. The input to an adaptive filter according to the invention can be analog or digital. In signal processing applications, filters according to the invention are applicable to input signals having any modulation format (e.g., pulse amplitude modulation). The tap gains, tap coefficients and tap delay outputs can each be either analog or digital signals. Mixed mode implementations are also possible, where analog and digital circuitry are both used in different parts of the filter.
For example, in some cases the tap gains are implemented digitally and the tap coefficients are implemented as analog signals, while the tap delays are implemented as digital gates. In this case, multiplication of tap coefficient and tap gain to obtain the tap weight can be performed using relatively slow analog circuitry (e.g., by inputting Ck to a segmented DAC having an output scaled by the gain Mk). The resulting analog tap weight Wk can be multiplied by the delayed data with fast analog circuitry (e.g., a Gilbert cell multiplier).
The preceding examples have shown filters with several taps. However, the invention is applicable to transversal filters having any number of taps, including single-tap transversal filters.

## Claims

1. A filter system comprising:
a filter configured to receive an input signal at an input terminal, wherein the input signal includes a plurality of temporal input samples, wherein the filter is further configured to weight and delay the input samples and combine a plurality of weighted delayed input samples to produce an output signal, wherein each of the weighted delayed input samples are weighted in accordance with a respective weight value, and wherein at least one of the respective weight values is calculated using a coefficient value and a multiplier value; and
a controller configured to receive the output signal from the filter and to couple a first control signal to the filter to update the coefficient value and a second control signal to the filter to update the multiplier value based on a property of the output signal, wherein the controller comprises:
an error estimator having an input coupled to an output of the filter and configured to generate an error estimate of the output signal;
a coefficient generator having an input configured to receive the error estimate and to generate the first control signal based, at least in part, on the error estimate; and
dynamic gain logic having an input configured to receive the first control signal and to generate the second control signal based, at least in part, on the first control signal.

2. The filter system of claim 1, wherein the controller is further configured to couple the second control signal to the filter based on a control condition for the coefficient value.

3. The filter system of claim 2, wherein the controller is further configured to generate the second control signal to maximize the coefficient value to be equal to or less than a maximum value.

4. The filter system of claim 1, wherein the controller is further configured to generate the first control signal to correspond to an integer coefficient value and the second control signal to correspond to a fractional multiplier value.

5. The filter system of claim 1, wherein a plurality of the respective weight values are calculated using a respective coefficient value and a respective multiplier value, the filter system further comprising:
a respective plurality of controllers, each controller configured to generate a first control signal to update the respective coefficient value and a second control signal to update the respective multiplier value based on the property of the output signal.

6. The filter system of claim 1, wherein a plurality of the respective weight values are each calculated using a respective coefficient value and a respective multiplier value, and wherein the first and second control signals are configured to control the respective coefficient values and the respective multiplier values.

7. The filter system of claim 1, wherein a plurality of the respective weight values are each calculated using a respective coefficient value and a respective multiplier value, and wherein the controller is further configured to control the plurality of respective weight values in a time interleaved manner such that each respective weight value is controlled at a different time.

8. The filter system of claim 1, wherein the controller is further configured to compute a difference between a maximum tap coefficient value and a tap coefficient, and wherein the second control signal is based, at least in part, on the difference.

9. The filter system of claim 1, wherein the second control signal corresponds to an indication of the larger of a maximum tap coefficient value or the tap coefficient.

10. A decision feedback equalizer comprising:
a summer configured to receive an input signal and a plurality of multiplier signals and to generate an output signal based on a sum of the input signal and the plurality of multiplier signals;
a slicer coupled to the summer and configured to receive the output signal and to generate, based on the output signal, a data output signal and an error output signal;
a correlator coupled to the slicer and configured to receive the data output signal and the error output signal and to generate a correlation signal based on a correlation of the data output signal and the error output signal;
a coefficient generator coupled to the correlator and configured to receive the correlation signal and to generate a plurality of coefficients based on the correlation signal;
dynamic gain logic configured to receive the plurality of coefficients and to generate a plurality of tap gain values based on a control condition;
a transversal filter coupled to the slicer and configured to receive the data output signal, the transversal filter including:
a plurality of delay elements coupled in series; and
a plurality of multipliers, each multiplier coupled to a respective delay element, the coefficient generator, and the dynamic gain logic, and wherein each multiplier is configured to receive a respective one of the plurality of coefficients generated by the coefficient generator and a respective one of the tap gain values generated by the dynamic gain logic and further configured to generate a respective one of the plurality of multiplier signals based on a product of the respective coefficient and the respective tap gain value.

11. The decision feedback equalizer of claim 10, wherein the correlator and the coefficient generator are further configured to implement least-mean squared filtering.

12. The decision feedback equalizer of claim 10, wherein the control condition comprises maximizing each of the plurality of coefficients to a value equal to or less than a maximum coefficient value.

13. The decision feedback equalizer of claim 10, wherein each of the respective multipliers includes three inputs and one output configured to provide the multiplier signal proportional to a product of the three inputs.

14. The decision feedback equalizer of claim 13, wherein at least one of the respective multipliers comprises:
a first two-input multiplier configured to receive one of the tap gain values and a corresponding coefficient; and
a second two-input multiplier configured to receive an output signal of the first two-input multiplier and the data output signal.

15. The decision feedback equalizer of claim 10, further comprising:
a comparator coupled to the coefficient generator and configured to receive the plurality of coefficients and to compare each of the plurality of coefficients to a maximum coefficient value to generate a comparison signal, wherein the dynamic gain logic is further configured to receive the comparison signal and to generate the tap gain values based on the comparison signal.

16. The decision feedback equalizer of claim 10, further comprising:
a tap selector configured to receive the plurality of coefficients and to output a selected coefficient, wherein the dynamic gain logic is further configured to generate the plurality of tap gain values at different times based on the selected coefficient.

17. The decision feedback equalizer of claim 10, wherein the dynamic gain logic is further configured to compute a difference between a maximum coefficient value and at least one of the plurality of coefficients and to generate at least one of the tap gain values based on the difference.

18. A method for generating a filtered output signal, the method comprising:
providing first and second control signals from a controller to a filter, wherein said providing comprises:
generating, with an error estimator, an error estimate based on the filtered output signal;
generating, with a coefficient generator, a first control signal for a filter based, at least in part, on the error estimate; and
generating, with dynamic gain logic, a second control signal for the filter based, at least in part, on the first control signal;

updating, at the filter, a coefficient value based, at least in part, on the first control signal;
updating, at the filter, a multiplier value based on the second control signal;
multiplying the multiplier value by the coefficient value to yield a tap weight;
multiplying the tap weight by a delayed input signal to generate a weighted delayed input signal; and
summing an input signal and the weighted delayed input signal to yield the filtered output signal.

19. The method of claim 18, wherein said generating a second control signal comprises selecting the second control signal to maximize the coefficient value to a value less than or equal to a maximum coefficient value.

20. The method of claim 18, wherein said generating a second control signal comprises generating a plurality of second control signals, and wherein said updating the multiplier value comprises updating a corresponding plurality of multiplier values.

21. The method of claim 20, wherein said plurality of multiplier values are generated sequentially.

22. The method of claim 18, wherein said generating a second control signal is based on a difference between a corresponding coefficient and a maximum coefficient value.

23. The method of claim 18, wherein said generating a second control signal is based on a comparison of a corresponding coefficient and a maximum coefficient value.