# Patent

## Title
Printed circuit board

## Abstract

A printed circuit board includes a signal layer and a voltage source layer. The signal layer includes a connecting area. The voltage source layer includes an isolation area corresponding to the connecting area. The isolation area is used for preventing interference caused by a pulsing current in the connecting area from affecting the voltage source layer.

## Background
BACKGROUND
1. Technical Field
The present invention relates to a printed circuit board having an isolation area for reducing signal interference between two layers.
2. Description of Related Art
A typical printed circuit board (hereinafter referred to as PCB) 10 includes a signal layer 11, a voltage source layer 12, and a ground layer 13, as shown in FIG. 3. The signal layer 11 is used as a layout for signal lines. A connecting area 112 is provided on the signal layer 11. A switch element 111 is positioned in the connecting area 112. The voltage source layer 12 is divided into a plurality of voltage areas 121, 122, 123 according to different voltage values. The connecting area 112 is positioned entirely in the voltage area 122.
The switch element 111 turns on and off periodically when receiving pulse signals, enabling current flowing through the connecting area 112 to be a pulsing current. However, the voltage in the area 122 of the voltage source layer 12 becomes unstable because of an interference caused by the pulsing current flow in the connecting area 112.
Therefore, a PCB having an isolation area for reducing signal interference is desired to overcome the above described deficiency.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is an exploded, isometric view of an embodiment of a PCB;
FIG. 2 is a plan view of the PCB of FIG. 2; and
FIG. 3 is an exploded, isometric view of a typical PCB.



DETAILED DESCRIPTION OF THE EMBODIMENTS
Referring to FIG. 1, a PCB 20 includes a signal layer 21, a ground layer 23, and a voltage source layer 22 positioned between the signal layer 21 and the ground layer 23.
The signal layer 21 is used as a layout for signal lines. A connecting area 212 is provided on the signal layer 21. A switch element 211 is positioned in the connecting area 212 of the signal layer 21. The switch element 211 is an electronic component, such as a metal-oxide-semiconductor (MOS) transistor, capable of receiving pulse signals. The voltage source layer 22 is divided into a plurality of voltage areas 221, 222, 223 by isolation lines according to different voltage values.
Referring also to FIG. 2, an isolation area 224 corresponding to the connecting area 212 is provided on the voltage area 222. The connecting area 212 is positioned entirely in the isolation area 224. An isolation line 225 is provided along a periphery of the isolation area 224 such that there is no electrical connection between the isolation area 224 and the area 222. In another embodiment, an isolation area 224 can be provided on the ground layer 23 corresponding to the connecting area 212.
The connecting area 212 is positioned in the isolation area 224. The switch element 211 is configured to turn on and off periodically when receiving pulse signals, enabling current flowing through the connecting area 212 to be a pulse current. Interference generated on the signal layer 21 from the connecting area 212 due to the pulse current cannot affect the voltage area 222 because there is no electrical connection between the isolation area 224 and the voltage area 222, thereby reducing interference to the PCB 20.
It is to be understood, however, that even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.

## Claims

1. A printed circuit board, comprising:
a signal layer comprising a connecting area; and
a voltage source layer comprising a first isolation area corresponding to the connecting area, the first isolation area configured for preventing interference caused by a pulsing current in the connecting area from affecting the voltage source layer;
wherein the voltage source layer further comprises a first isolation line separating the first isolation area from a rest area of the voltage source layer, and there is no electrical connection between the first isolation area and the rest area of the voltage source layer; the voltage source layer is divided into a plurality of voltage areas by a plurality of second isolation lines according to different voltages for the signal layer, the first isolation area is defined in one of the plurality of voltage areas.

2. The printed circuit board of claim 1, wherein the connecting area is positioned to be confined within the first isolation area.

3. The printed circuit board of claim 1, further comprising an electronic component capable of receiving pulse signals, the electronic component is positioned in the connecting area of the signal layer.

4. The printed circuit board of claim 3, wherein the electronic component is a switch element.

5. A printed circuit board, comprising:
a signal layer comprising a connecting area and an electronic component positioned in the connecting area, the electronic component capable of receiving pulse signals; and
a voltage source layer comprising a first isolation area corresponding to the connecting area;
wherein the connecting area is positioned to be confined within the first isolation area;
the voltage source layer is divided into a plurality of voltage areas by a plurality of first isolation lines according to different voltages for the signal layer; the first isolation area is defined in one of the plurality of voltage areas.

6. The printed circuit board of claim 5, wherein the voltage source layer further comprises a second isolation line separating the first isolation area from a rest area of the voltage source, there is no electrical connection between the first isolation area and the rest area of the voltage source layer.

7. The printed circuit board of claim 5, wherein the electronic component is a switch element.