Semiconductor

Semiconductor Technology

Copper Interconnect Metallization and

Wafer Level Packaging Chemistries

Technology for Tomorrow’s Solutions
02 | 03

Semiconductor Technology 

Total Chemistry Solutions for Wafer Metallization

Atotech’s Semiconductor Technology product portfolio offers chemistry and process solutions for 

advanced wafer metallization, from the chip interconnects to wafer level packaging technologies. 

Electrochemical deposition and electroless deposition techniques are used to plate copper, 

nickel, gold, palladium and tin for a variety of applications ranging from Damascene plating, pad 

surface treatment and metallization to through silicon via (TSV) for 3D integration.

Products for Electrochemical Metal Deposition

▪ Everplate copper for Damascene interconnects

▪ Spherolyte copper for pillar, redistribution layer (RDL), and TSV

▪ Spherolyte nickel and tin for pillar protection and solder joint technology

Products for Electroless Metal Deposition

▪ Xenolyte nickel, palladium, and gold for pad metallization

▪ Xenolyte copper and gold for wire bonding and soldering

▪ Stannolyte immersion tin for copper pillar sidewall protection

Leading 

Technology

Best Local 

Service

Quality

Assurance
Semiconductor

Semiconductor Technology Approach

Focus on Quality Assurance

From the point of raw material selection and qualification, to chemistry production in our 

state-of-the-art manufacturing facility, and finally to finished product quality testing, Atotech’s goal 

is to provide the semiconductor industry with highest quality products. 

Leading Technology and R&D Programs

Atotech is committed to developing and implementing innovative and sustainable technologies that 

allow our customers to minimize production costs, reduce their environmental footprint, and improve

process efficiency. As market leaders in the PCB and IC substrate industries, Atotech continuously 

expands its product portfolio and develops technology for tomorrow’s solutions. Atotech’s total 

solution concept for wafer metallization demonstrates the company’s commitment to provide the 

semiconductor industry with cutting-edge products, while delivering superior quality and service.

Best Local Service – Think Global / Act Local

Being close to its customers is a top priority for Atotech. With Berlin as the international headquarters

for R&D and administration, Atotech has established regional headquarters in Rock Hill and 

Yokohama, supported by 40 application centers worldwide. Atotech’s regional TechCenters for 

Semiconductor Technology development are equipped to provide the industry with customized 

products and top-of-the-line plating support during all phases of sampling, process optimization, 

qualification and scale-up at the customer site.

Rock Hill, USA

Yokohama, Japan

Guanyin, Taiwan

Shanghai, China

Neuruppin, Germany Berlin, Germany

Guangzhou, China

Hong Kong, China

Singapore

JangAn, Korea Albany, USA

Semiconductor Facilities

Sales Office

Berlin Albany Yokohama Guanyin Neuruppin
04 | 05

Semiconductor Technology Facilities

Advanced Packaging TechCenter, Berlin

Equipment for Electroless Deposition of Nickel, Palladium, Gold

▪ RAMGRABER wet bench, batch tool, 150/200/300 mm

▪ SEMITOOL Cintillio spray design, batch tool, 200/300mm

▪ SEMITOOL Raider fountain platform, single wafer tool, 200/300 mm

Equipment for Electroless Deposition of Immersion Tin

▪ SEMITOOL Raider fountain platform, single wafer tool, 200/300 mm

Equipment for Electrochemical Deposition of Copper, Nickel, Tin

▪ SEMITOOL fountain platform, Raptor & CFD3 chambers, 200/300 mm

▪ RENA fountain plating platform, 3 chambers, 200 mm

▪ NEXX shear plater, manual tool, 200 mm

Atotech headquarters in Berlin, 

Germany

The TechCenter for advanced packaging technologies is located in 

Berlin, Germany, at the company’s headquarters. The TechCenter 

has specialized semiconductor labs (3,230 ft2) which collectively 

contain a variety of electroless and electrochemical deposition 

equipment for advanced wafer level packaging (WLP) applications.

The plating equipment ranges from wet bench and single wafer tools,

to innovative spray plating tools, all of which are 200 and 300 mm 

compatible. In order to ensure process repeatability and stability, 

on-line monitoring instruments and replenishment systems are 

utilized for a total process-solution approach.

Atotech’s headquarters also houses Berlin’s Material Science and 

Analytics departments. Their respective labs include a wide range of 

analytical equipment which are used to examine plated results and 

analyze bath samples. 

The Semiconductor TechCenter together with the Material Science 

and Analytics facilities provide the foundation for Atotech to conduct

R&D activities which are essential to supply the semiconductor 

industry with innovative technologies. With these facilities, Atotech is 

fully equipped to support the complete process lifecycle from R&D, 

best known method (BKM) development, sampling and finally during 

process qualification and ramp-up.
Semiconductor

Material Science and Analytical Capabilities*

▪ Focused Ion Beam (FIB) Microscope / Energy Dispersive X-Ray Analysis (EDX)

▪ Scanning Electron Microscope (SEM) / EDX

▪ Field Emission Scanning Electron Microscope (FE-SEM) / EDX

▪ X-Ray Fluorescence Thickness Measurement Tool (XRF)

▪ Scanning Force Microscope (SFM)

▪ Analyzers for measuring Total Organic Carbon (TOC), Total Carbon (TC)

▪ Graphic Furnace Atomic Absorption Spectroscopy (GF-AAS)

▪ Inductive Coupled Plasma using Optical Emission Spectroscopy (ICP-OES)

▪ High Performance Liquid Chromotography using Mass Spectrometry (HPLC-MS)

▪ Electrospray Ionisation Time-of-Flight Mass Spectrometry (ESI-TOF-MS)

▪ Inductive Coupled Plasma Mass Spectrometry (ICP-MS)

▪ EAGLE III XRF Thickness Measuring Tool

▪ Veeco Dektak 8 Profilometer

▪ Metrohm CVS Electrochemical Analysis

▪ Disco Wafer Dicing Saw

* Please refer to Atotech’s Worldwide TechCenter brochure for a full list of our Material Science and Analytical capabilities

ancosys On-line Monitoring and Dosing System SEMITOOL Single Wafer Tool

RAMGRABER Wet Bench 

Manual Tool

SEMITOOL Cintillio SEMITOOL Raider
06 | 07

Semiconductor Technology Facilities

Copper Interconnect R&D Center, Albany

Atotech Electrochemistry Lab

▪ HPLC-TOF-MS for plating bath analysis, additive research

▪ Autolab Galvonostat / Potentiostat with RDE, controller

▪ ECI QL-10E CVS / CPVS analysis

▪ Microfluidic cell for additive analysis

▪ Beaker plating set up

▪ Sartorius CP microbalances

▪ Heraeus annealing oven

▪ Four point resistance prober

Infrastructure for Copper Electroplating

▪ Applied Materials SlimCell fountain plater, 300 mm

▪ Novellus Sabre Extreme fountain plater, 300 mm

▪ NEXX Stratus vertical plater, 300 mm

Atotech’s research and development center for Damascene and 

Dual Damascene development used for copper interconnect 

technology is located at the College of Nanoscale Science and 

Engineering (CNSE) in Albany, New York. The partnership with 

CNSE provides Atotech’s R&D team access to CNSE’s state-ofthe-art wafer processing facility which contains over 85,000 ft2 

of clean rooms and analytical labs, and houses a complete line 

of cutting-edge 300 mm semiconductor manufacturing and R&D 

equipment. 

Atotech’s copper additive R&D and Damascene process development is conducted in an on-site electrochemistry lab in collaboration

with CNSE’s metrology department. Collectively the clean room 

and lab capabilities provide the infrastructure needed for Atotech to 

perform plating and additive R&D, bath sample analysis, qualification

runs and customer sampling.

CNSE NanoTech Complex
Semiconductor

Material Science and Analytical Capabilities

▪ Complete in-line 300 mm metrology equipment

▪ Hitachi S-4800 Scanning Electron Microscope (SEM)

▪ FEI Nova Nano Environmental SEM (ESEM)

▪ FEI Focused Ion Beam (FIB) 200 Microscope

▪ FEI Nova NanoLab 600 Dual Beam FIB SEM

▪ FEI Titan3 S Transmission Electron Microscope (TEM)

▪ JEOL JEM 2010F TEM

▪ Digital Instruments Nanoscope III Atomic Force Microscope (AFM)

▪ JEOL 4200 AFM

▪ Bruker D8 X-Ray Diffraction (XRD) and X-Ray Reflectivity (XRR)

▪ Perkin-Elmer PHI 600 Auger Electron Spectroscopy (AES)

▪ Thermo VG Scientific Theta Probe X-Ray Photoelectron Spectroscopy (XPS)

▪ IONTOF Time-of-Flight Secondary Ion Mass Spectrometry (TOF.SIMS 5)

▪ Physical Electronics 6650 Quadruple Dynamic SIMS System

▪ Dynamitron Linear Accelerator 4 MeV System

▪ Beam time on the BESSY and Brookhaven National Lab Synchrotron

Nikon 80i Fluorescence Microscope

CNSE’s 300 mm Class 1 Cleanroom AMAT SlimCell 300 mm Plating System

Novellus Sabre 300 mm Plating System
Semiconductor TechCenter, Yokohama

Electroplating and Lab Capabilities

▪ Dainippon Screen Damascene Plating System with automatic cleaning unit, 

200 and 300 mm tools

▪ Plating System for Pad Metallization, vertical platform, 200 mm

▪ S One Wet Bench with clean unit for testing and beaker plating

▪ Millipore Ultrapure Water System for chemical mixing

▪ Nomura Micro Science DI Water System for rinsing

▪ Techno Rise Semi-automatic Wafer Spin Dry, 200/300 mm

▪ Cleaning Booths for sample preparation and Damascene plating, 200 mm

▪ Atotech Fe Redox Mediator System for on-line monitoring of Fe, Cu concentrations

08 | 09

The Semiconductor TechCenter in Yokohama, Japan is Atotech’s 

facility to serve the semiconductor industry in Japan and other regions

in Asia. The local semiconductor team consists of experts with 

international experience and know-how specializing in chemistry, 

electroplating and semiconductor processing. 

The TechCenter is fully equipped to support electrolytic copper 

R&D activities and customer sampling for 200 and 300 mm wafer 

substrates. The TechCenter contains plating equipment which enable

the semiconductor team to conduct R&D for applications ranging from 

copper Damascene plating for chip interconnects to advanced packaging technologies such as copper pillar, RDL, and pad metallization.

The Material Science and Analytical equipment enable the team to 

perform physical analysis of visual inspections and cross sections, 

as well as chemical analysis of inorganic and organic components. 

Collectively, the equipment and lab capabilities provide the infrastructure to test new chemistries, perform additive and plating R&D, 

conduct mini qualification runs, as well as demonstrate our products 

during customer sampling and demos. 

Semiconductor TechCenter in 

Yokohama, Japan
Material Science and Analytical Capabilities

▪ ECI and Metrohm CVS / CPVS analysis

▪ Seiko Analyzers for measuring TOC & TN

▪ Leica INM300 DUV Microscope

▪ Olympus Optical Microscopes (6)

▪ Struers Polisher for wafer cross sections

▪ SEIKO XRF Thickness Measuring Tool, 300 mm

▪ JEOL SEM / EDX Scanning Electron Microscope / Energy Dispersive X-Ray Analysis

▪ Keyence Laser Microscope for measuring surface roughness and depth

▪ Metrohm Titration Equipment for titration of cations and anions, automatic and manual

Semiconductor

Damascene Plating System, 300 mm

Atotech Fe Redox Mediator System Wet Clean Bench

Plating System for Pad Metallization, 200 mm
Semiconductor TechCenter, Guanyin

Production Equipment

▪ Double Side Plating (DSP) Tool

▪ SEMITOOL Spin Rinse Dry (SRD) Equipment

Materials Science and Analytical Capabilities

▪ Struers LaboPol-5 Polisher for cross sections

▪ Struers TegraPol-15 Grinding and Polishing Machine

▪ Buehler Metaserv 2000 Polisher for cross sections

▪ Buehler MiniMet 1000 Polisher for cross sections

▪ FEI Nova NanoLab 600 Dual Beam FIB SEM

▪ Oxford EDS7636 Energy Dispersive X-Ray (EDX) Analysis

▪ Zeiss EV50 SEM

▪ Fischer XDVM-μ X-Ray Fluorescence Thickness Measuring Tool

▪ Olympus Optical Microscopes

▪ Confocal Microscopes for Optical Roughness Profilometry (ORP)

▪ ECI and Metrohm CVS / CPVS Analysis

▪ Metrohm Titration Equipment for titration of cations and anions

▪ Shimadzu Analyzers for measuring Total Organic Carbon (TOC)

10 | 11

The newest addition of Atotech’s global semiconductor facilities 

is the Guanyin TechCenter in Taiwan. The Guanyin TechCenter is 

already equipped for R&D and sampling in order to fulfill the 

local demands of the semiconductor industry. In addition, the location 

has a wide range of Materials Science and Analytical equipment for 

conducting specialized testing as well as developing innovative new 

solutions for future customer needs.

The first phase of equipment and lab installation was completed 

in 2009 and expansions of the current capabilities are planned for 

2010 and 2011. This will include the installation of additional plating 

and production equipment, as well as Materials Science and Analytical

equipment and methods, which collectively will enable the R&D and

application teams to conduct experiments, qualification runs and 

in-house customer sampling.

The completed Guanyin TechCenter will strengthen Atotech’s position

in Asia to provide best local customer service and fast reaction to our

customers’ requirements. The enhanced TechCenter will also support 

Atotech’s cooperation with the Industrial Technology Research 

Institute (ITRI) for the next generation of semiconductor technology 

development.

Semiconductor TechCenter in 

Guanyin, Taiwan
Semiconductor

Xenolyte Solder Ball Array

200 mm Wafer plated with Atotech’s Xenolyte Nickel, Palladium, and Gold

Olympus Optical Microscope
12 | 13

High Purity Chemistry Production, Neuruppin

The Neuruppin production facility for semiconductor plating chemistry

is designed to satisfy the quality and purity chemistry demands of 

the semiconductor industry of today and tomorrow. The facility uses 

highly automated manufacturing practices and class 1000 minienvironment enclosures. The latest engineering design techniques 

are utilized to ensure efficient and safe production, optimized product

quality, reduced batch to batch variations, and minimized waste 

water to provide cost-effective production solutions. State-of-the-art 

production and quality control ensure reduced ionic and particle concentration in the final product. The quality is verified with controlled 

sampling at various points throughout the manufacturing process.

Semiconductor Chemistry Production 

in Neuruppin, Germany

Features and Benefits

▪ Advanced filtration and mini environment for high purity products

▪ Sustainable production methods for green manufacturing solutions

▪ Highly automated production systems for consistency, efficiency, and safety

Filling Station Chemistry Distribution System
Semiconductor

Manufacturing Concept

Production begins with the filtration and dosing of pre-qualified raw materials via the Chemistry 

Distribution System (1). Each raw material container uses a separate, isolated dosing system for 

transfer to the mixing vessel. In the mixing vessel, liquid raw materials are combined with Ultra 

Pure Water and are sent through the filtration loop (2), where samples are extracted. After filtration, 

the chemistry is transferred to the filling stations for bottling of final products (3).

1. Chemistry Distribution System (CDS)

▪ Separate and isolated distribution for each liquid raw material

▪ Automated dosing and circulation loop for filtration of each raw material

2. Mixing Vessel

▪ Ultra Pure Water using reverse osmosis, EDI units and in-line TOC

▪ Inside spray device for in-place vessel cleaning, gas exhaust apparatus, overflow safety device

▪ Filtration of final product ≤ 0.2 μm, monitored by Optical Liquid Particle Counter (OLC)

3. Filling Station

▪ Class ≤ 1000 clean room environment for container filling

▪ Filling apparatus and piping with automatic valve

▪ Weighing unit for precise and consistent filling
14 | 15

Semiconductor Technology 

Product Portfolio for Copper Interconnect Metallization 

and Wafer Level Packaging

Electrochemical Deposition for Advanced Packaging Technology

▪ Copper for pillar, RDL and TSV

▪ Nickel and tin for pillar protection layer and solder joint technology

Spherolyte

Electrochemical Deposition for Chip Interconnects

▪ Copper Damascene plating from M1 to Mx

Everplate

Atotech’s Semiconductor Technology product portfolio offers chemistry and process solutions for 

wafer metallization, from the chip interconnects to advanced wafer level packaging technologies.

Products for Electrochemical Metal Deposition

▪ Everplate copper for Damascene interconnects

▪ Spherolyte copper for pillar, redistribution layer (RDL), and through silicon via (TSV)

▪ Spherolyte nickel and tin for pillar protection layer and solder joint technology

Sn

Ni

Cu
Semiconductor

Electroless Deposition for Advanced Packaging Technology

▪ Immersion tin for pillar sidewall protection

Stannolyte

Sn

Cu 

Pillar

Sn

Ni

Si Wafer

Si Oxide

Electroless Deposition for Pad Metallization

▪ Nickel, palladium, gold for pad metallization

▪ Copper and gold for wire bonding and soldering

Xenolyte

Products for Electroless Metal Deposition

▪ Xenolyte nickel, palladium, and gold for pad metallization

▪ Xenolyte copper and gold for wire bonding and soldering

▪ Stannolyte immersion tin for pillar sidewall protection

Cu Sn
16 | 17

Semiconductor Plating Solutions

Everplate

The Everplate portfolio consists of medium and high purity base electrolytes and technology node 

specific additive systems used for the electrochemical deposition of copper for Damascene interconnects. Everplate process solutions are compatible with 200 and 300 mm wafers and are available 

for 45 nm node technologies and beyond. Next generation Everplate products are currently being 

developed at CNSE for 32 and 22 nm node technologies.

Electrodeposition of High Purity Copper

Everplate base electrolytes are available in various acid and copper concentrations for optimum 

tool and process control and can be customized according to the application requirements. 

Medium and high purity specifications of less than 10 ppm and 100 ppb for cations, with particle 

count less than 100,000 / ml and 10 / ml respectively, are controlled by Inductively Coupled Plasma Mass Spectroscopy (ICPMS). Advanced filtration using 0.2 μm membrane technology and 

Optical Liquid Particle Counter (OLC) control the particle level in the chemistry.

Reliable and Void-Free Filling of Trenches and Vias

Everplate’s three component organic additive systems consist of accelerators, suppressors and 

levelers for superior filling performance of high aspect ratio (AR) structures. The additive systems 

are designed to enhance the bottom-up fill and provide a uniform copper thickness distribution with 

minimal overburden for Chemical Mechanical Planarization (CMP).

Features and Benefits

Everplate chemistries and process solutions are designed to satisfy the stringent requirements for 

the Damascene plating process and the deposited copper. In order to maximize yield and throughput, 

a reliable and stable process with the following features is needed.

▪ Reliable gap-fill properties and void-free filling of high AR vias and trenches

▪ Uniform copper thickness distribution

▪ Low post CMP defect density

▪ Low resistance and post anneal internal stress

▪ Low resistivity and contact resistance

▪ Superior electromigration (EM) and stress migration (SM) properties

Post anneal cross section 

of M1, 3:1 AR, 32 nm node

Post anneal cross section 

of M1-V1-M2, 45 nm node

Top down view of M1, 

22 nm node
Semiconductor

Spherolyte

The Spherolyte portfolio consists of pre-treatment solutions, base electrolytes, and three 

component additive systems used for the electrochemical deposition of copper in advanced 

packaging applications. Spherolyte copper chemistries include a variety of base electrolytes, 

as well as brightener, carrier, and leveler additives to enhance the filling peformance of copper 

pillar, redistribution layer (RDL) and through sillicon via (TSV) structures. Spherolyte nickel and tin 

chemistries are used for diffusion barrier and solder joint technologies.

Features and Benefits

Spherolyte products are designed to fulfill the industry requirements for the deposited copper in 

packaging technologies. The process requirements vary depending on the application however

there are certain characteristics of the deposited copper that are essential regardless of the 

technology. Spherolyte products satisfy these requirements and have demonstrated exceptional 

results for plating of RDL and pillar structures, and bottom-up filling of TSVs.

Reliable Metal Deposition for Pillar and Redistribution Layer

Copper

▪ Optimal copper thickness distribution and within-wafer (WIW) uniformity

▪ High current density plating for high throughput

▪ Reliable gap-fill properties for superior and stable pattern plating

▪ Low warpage and internal stress

▪ Low copper surface roughness

Nickel

▪ Uniform nickel distribution for diffusion barrier

▪ Low porosity, high ductility

▪ Enhanced deposition rate

Tin

▪ Fine grain structure

▪ Low organic impurities

▪ Inhibited whisker formation

Fast and Void-Free Filling of Through Silicon Vias (TSV)

▪ Efficient bottom-up filling of high aspect ratio TSVs

▪ Minimal overburden with uniform copper thickness distribution

▪ Void-free copper deposition of smallest features

▪ Low post CMP defect density

Spherolyte Copper Pillar with 

CuNiSn

RDL Contact Pad and rerouting 

Structure

TSV (20 μm x 80 μm)
The Xenolyte portfolio includes cleaning and activation pre-treatment solutions and plating 

chemistries for the electroless deposition of nickel, palladium and gold in pad metallization 

technologies. Xenolyte products are used as the under bump metallization (UBM) for the connection 

to solder balls, wire bonds, and wedge bonds. 

The Xenolyte nickel, palladium and gold process provides a corrosion protection layer for the 

underlaying interconnects and solder joint connection to the IC substrate. The nickel layer serves 

as the diffusion barrier and provides protection against the formation of Kirkendall voids. The 

palladium and gold depositions provide adhesion for the soldering and bonding, as well as protection against oxidation. The Xenolyte electroless UBM process is compatible with aluminum and 

copper pads, with specialized pre-treatments for each. Xenolyte has demonstrated compatibility 

with standard aluminum and gold bonding, as well as emerging copper wire bonding technology.

Features and Benefits

The industry requirements for UBM include a robust and stable connection, with low resistance, 

to the IC substrate. With Xenolyte’s proven technologies, the following process and deposition 

requirements are satisfied at significantly lower costs compared to traditional sputtering technology.

▪ Enhanced adhesion between UBM and IC substrate

▪ Robust bond pad for wire bonding

▪ Stress minimized metal stack

▪ Improved reliability with pure palladium for wire bonding technology

▪ Process flexibility for use with aluminum, gold, and copper wire bonding technologies

To address the semiconductor industry’s requirements for green technology solutions, Atotech has 

developed innovative products for UBM applications. Xenolyte lead-free nickel and cyanide-free 

gold enable customers to implement environmentally responsible production solutions.

18 | 19

Xenolyte

Xenolyte for Wire Bonding Xenolyte NiPdAu Pad 

Metallization

Xenolyte for Soldering
Semiconductor

Stannolyte

The Stannolyte portfolio consists of pre-treatment solutions, wetting agents for oxide removal, 

and immersion tin plating chemistries used for the electroless deposition of tin for pillar sidewall 

protection.

The latest trends in flip chip technology are moving towards smaller pitch sizes and increased 

density of integrated circuits. Standard solder packaging technology will soon reach its technical 

limitation and consequently new solutions are needed to meet the future challenges for advanced 

packaging. Atotech has developed a process to address the requirements for flip chip technology 

using through mask plating. The plating process begins with the electrochemical depositions of 

Spherolyte copper for pillar formation, followed by Spherolyte nickel and Spherolyte tin for solder 

capping. After removal of the plating mask and seed layer, the sidewall of the copper pillar is 

exposed. Following the flip chip solder process, the exposed copper sidewalls are directly 

connected to the underfill material. Stannolyte immersion tin is used to protect the pillar sidewalls 

from oxidation and enhance the adhesion of the pillar to the underfill material.

Features and Benefits

In copper pillar applications, superior adhesion of the pillar sidewall to the underfill material is

the main requirement. Stannolyte was developed to support the adhesion performance and

successfully delivers the following process advantages.

▪ Defect-free tin deposition

▪ Superior adhesion to the underfill material

▪ Highest thickness uniformity

▪ Whisker and dendrite inhibited process

0.2 - 0.3 μm Tin Layer to protect

Copper from Corrosion

Copper Pillar covered with 

0.2 μm of Tin

FIB Cut / Tin plating on Copper 

Pillar / Side Wall

Sn

Cu 

Pillar

Sn

Ni

Si Wafer

Si Oxide

Cu Sn
20 | 21

Strategic Partnerships

The College of Nanoscale Science and Engineering

Atotech’s partnership with CNSE focuses on the development and optimization of copper 

deposition technologies for use in advanced device structures. The partnership provides Atotech

engineers exclusive access to R&D activities with the College and its 250 global corporate 

partners. Together with these partners, Atotech supports the development towards sub-22 nm node 

technologies with contributions of engineering know-how and advanced, cost-competitive plating 

chemistries. Through this partnership, Atotech and CNSE engineers work closely together to develop 

and deliver functional and technical process solutions for smaller and more efficient devices.

The joint R&D focuses on the optimization of the processing steps and analytical methods which 

impact the copper wiring technologies in semiconductor applications. Nano size defect densities, 

stability of low resistance, and the robustness of electrical and stress migration define the quality 

of the deposited copper during reliability testing conditions. The R&D conducted at CNSE focuses 

on the understanding of these interactions and the exploration of solutions needed for the scaling 

to smaller structures.

About CNSE

The College of Nanoscale Science and Engineering is the first college in the world dedicated to 

education, research, development and deployment in the emerging disciplines of nanoscience, 

nanoengineering, nanobioscience, and nanoeconomics. With over $5.5 billion in high-tech 

investments, the 800,000-square-foot Albany NanoTech Complex attracts corporate partners 

from around the world and offers students a one-of-a-kind academic experience. More than 2,500 

scientists, researchers, engineers, students, and faculty work on site at CNSE’s Albany NanoTech 

Complex, from companies including IBM, AMD, GlobalFoundries, SEMATECH, Toshiba, Applied 

Materials, Tokyo Electron, ASML, Novellus Systems, Vistec Lithography and Atotech. For more 

information, visit www.cnse.albany.edu.

Time-of-Flight Secondary Ion 

Mass Spectrometer (TOF-SIMS)

Tokyo Electron Clean Track 

LITHIUS

CNSE’s 300 mm Class 1 

Cleanroom
Semiconductor

SEMATECH International

Atotech’s partnership with SEMATECH International focuses on the development of advanced 

copper plating process technologies for the 3D stacking of integrated circuit (IC) devices in order 

to fulfill the semiconductor industry’s needs for the increased performance and efficiency of smaller 

devices, at significantly lower costs. Atotech joined SEMATECH’s 3D Integration Program as the 

only materials supplier to develop high aspect ratio (AR) through silicon via (TSV) technology.

As a member of SEMATECH, Atotech participates in leading edge research towards the development

and implementation of cost effective copper electroplating solutions for TSV technology for waferto-wafer, die-to-die and die-to-wafer 3D integration applications. Atotech contributes to the R&D 

with cost-competitive, innovative chemistries and plating know-how. Atotech benefits from the 

collaborations and expertise of SEMATECH’s global partners, and has access to joint results 

including electrical characterization data, early reliability test data, and module developments.

The 3D Program has its own clean room at CNSE which houses a variety of 3D equipment including

a 300 mm NEXX Stratus ECD plating tool which is used by Atotech for TSV plating process 

development. The initial focus of the R&D is on high aspect ratio (AR) TSV structures, with 

target geometries of 5 x 25 μm and 5 x 50 μm. The electrical characterization data and early 

reliability data generated for the experiments enable the R&D teams to analyze results and 

improve the process for best TSV performance.

About SEMATECH:

For 20 years, SEMATECH® (www.sematech.org) has set global direction, enabled flexible 

collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the 

next technology revolution with our nanoelectronics and emerging technology partners. For more 

information, please visit the company’s website at www.sematech.org.

NEXX Stratus 300 mm ECD Plating Tool Bottom-up Filling Sequence (5 x 25 μm)
22 | 23

SEMITOOL

The partnership with Semitool is for the co-development of plating chemistry, process of record,

and equipment, in order to provide the semiconductor industry with a complete solution for 

advanced packaging technologies. The primary focus is for the optimization of the plating process 

using the Semitool Cintillio and Atotech’s XENOLYTE chemistries and process.

About SEMITOOL

Semitool designs, manufactures, and supports highly engineered, multi-chamber, single wafer and 

batch wet chemical processing equipment used in the fabrication of semiconductor devices. The 

company’s primary suites of equipment include electrochemical deposition systems for electroplating

copper, gold, tin, and other metals; surface preparation systems for cleaning, stripping and 

etching silicon wafers; and wafer transport container cleaning systems. The company’s equipment

is used in semiconductor fabrication front-end and back-end processes, including wafer-level 

packaging. Headquartered in Kalispell, Montana, Semitool maintains sales and support centers in 

the United States, Europe and Asia. For more information, please visit the company’s website at 

www.semitool.com.

The Cintillio is perfectly designed for the UBM of 

products which require high throughput, such as 

DRAM devices. The system is designed for optimized precision, maximized throughput, with a significantly reduced footprint compared to a standard 

wet bench.

The closed process chamber is connected to 

different chemistry tanks which dispense and clean 

the chambers in a fully automated manner.

Atotech has developed the process of record 

(POR) for UBM processing on the Cintillio, with our 

semiconductor products for the electroless deposition of nickel, palladium, and gold on copper or 

aluminum structures.

The Raider Single Wafer Tool is a platform which 

is designed for high performance electrochemical 

metal deposition and electroless plating. The design includes a rotating, faced-down wafer, which 

is immersed in the electrolyte using fountain spray 

technology.

The Raider may be used for metal deposition in 

various devices. The application parameters are 

chosen based on the specific plating and device 

requirements.

Within Atotech’s development work, the Raider 

equipment is used for nickel, palladium, and gold 

UBM processing, immersion tin deposition, and 

ECD copper plating.
Semiconductor

ancosys GmbH

Ancosys contributes to our total solution concept for wafer metallization with their ancolyzer on-line

monitoring and dosing system. The combination of Semitool equipment (Equinox, Raider, Cintillio),

Atotech plating chemistries (Xenolyte, Spherolyte, Stannolyte) and the ancosys ancolyzer, 

provides optimized performance and stability for the plating process.

The ancolyzer is an on-line PC based control unit for the monitoring and dosing of the plating bath 

compounds. The system offers high transparency with low complexity of use, and has demonstrated stability and reproducibility at highest accuracy.

ancolyzer, on-line control and monitoring system Close-up of ancolyzer measuring unit

Stabilizer Controller E-less Nickel Controller

Kulicke & Soffa

Kulicke & Soffa (K&S) manufactures and supplies advanced packaging equipment to the semiconductor industry for wire and wedge bonding technologies. As a global leader in design and 

manufacture of semiconductor assembly equipment, K&S has extensive experience and expertise 

in ball and wedge bonding technologies. Through our partnership, Atotech and K&S exchange 

product and process information, in order to collaboratively optimize the packaging process and 

provide a complete solution to the semiconductor industry. Specifically, Xenolyte nickel, palladium, 

and gold products are the focus for the joint R&D, which includes reliability data generation, 

specialized experiments, and technical papers.
Atotech Main Office

Erasmusstr. 20

D-10553 Berlin

Phone +49 (0)30 349 85 0

Fax +49 (0)30 349 85 777

www.atotech.com 

09/10_ JR

Additional Research and Development Programs

Corporate R&D Collaborations

▪ The College of Nanoscale Science and Engineering in Albany, New York

▪ SEMATECH International in Albany, New York

▪ International Business Machines (IBM) in Albany and East Fishkill, New York; Burlington, Vermont

▪ Tokyo Electron Limited (TEL) in Albany, New York

▪ Micron Technologies, Inc. in Boise, Idaho

▪ ancosys GmbH in Tuebingen, Germany

▪ Kulicke & Soffa in Willow Grove, Pennsylvania

▪ SEMITOOL in Kalispell, Montana

Research Institutes

▪ Fraunhofer IZM in Berlin, Germany

▪ Industrial Technology Research Institute (ITRI) in Taipei, Taiwan

Universities

▪ Columbia University in New York, New York

▪ Case Western Reserve University in Cleveland, Ohio

▪ University of Ulm in Ulm, Germany

▪ University at Albany in Albany, New York

Boise, Idaho

Taipei, Taiwan

Berlin, Germany Tubingen, Germany

Albany, New York

Corporate R&D Collaborations Research Institutes Universities

Willow Grove, Pennsylvania

Kalispell, Montana

Cleveland, Ohio New York, New York

Ulm, Germany