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                  UNITED STATES SECURITIES AND EXCHANGE COMMISSION
                              Washington, D. C. 20549
                                          
                                          
                                     FORM 10-K


  X  ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(D) OF THE SECURITIES EXCHANGE
---- ACT OF 1934

                 FOR THE FISCAL YEAR ENDED DECEMBER 31, 1997

___  TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(D) OF THE SECURITIES
     EXCHANGE ACT OF 1934

       FOR THE TRANSITION PERIOD FROM _______________ TO _______________.

                           Commission file number 0-13244
                                          
                               GATEFIELD CORPORATION
                           (Formerly Zycad Corporation)
               (Exact name of registrant as specified in its charter)

DELAWARE                                                              41-1404495
(State of incorporation)                    (I.R.S. Employer Identification No.)

47100 BAYSIDE PARKWAY, FREMONT, CALIFORNIA                                 94538
(Address of principal executive offices)                             ( Zip Code)

Registrant's telephone number, including area code:              (510) 623-4400 

Securities registered pursuant to Section 12 (b) of the Act:     NONE

Securities registered pursuant to Section 12 (g) of the Act:     COMMON STOCK,
                                                                 $0.10 PAR VALUE
                                                                 PER SHARE

     Indicate by check mark whether the Registrant (1) has filed all reports
required to be filed by Section 13 or 15(d) of the Securities Exchange Act of
1934 during the preceding 12 months (or for such shorter period that the
Registrant was required to file such reports), and (2) has been subject to such
filing requirements for the past 90 days. Yes   X     No 
                                               ----      ----

     Indicate by check mark if disclosure of delinquent filers pursuant to Item
405 of Regulation S-K is not contained herein, and will not be contained, to the
best of Registrant's knowledge, in definitive proxy or information statements
incorporated by reference in Part III of this Form 10-K or any amendment to this
Form 10-K. [ X ]

The aggregate market value of voting stock held by non-affiliates of the 
registrant on March 16, 1998, based upon the closing price of the Common 
Stock on the Nasdaq National Market on such date and assuming a market value 
of $4.5825 per share for the Series B Convertible Preferred Stock was 
approximately $44,931,943.

Registrant had 40,798,143 shares of Common Stock and 1,000,000 shares of Series
B Convertible Preferred Stock outstanding as of March 16, 1998.

                        DOCUMENTS INCORPORATED BY REFERENCE

     Portions of the registrant's 1997 Annual Report to Stockholders are
incorporated by reference into Parts II and IV hereof.  The Annual Report shall
be deemed "filed" with the Commission only with respect to those portions
specifically incorporated by reference herein.  Portions of the registrant's
definitive Proxy Statement for its Annual Meeting of Stockholders for 1997,
which will be filed with the Securities and Exchange Commission within 120 days
after the end of the Company's fiscal year, are incorporated by reference into
Part III hereof.



                                       PART I

THE DISCUSSION IN THIS REPORT CONTAINS FORWARD-LOOKING STATEMENTS THAT INVOLVE
RISKS AND UNCERTAINTIES.  THE STATEMENTS CONTAINED IN THIS REPORT THAT ARE NOT
PURELY HISTORICAL ARE FORWARD-LOOKING STATEMENTS WITHIN THE MEANING OF SECTION
27A OF THE SECURITIES ACT OF 1933, AS AMENDED, AND SECTION 21E OF THE SECURITIES
EXCHANGE ACT OF 1934, AS AMENDED INCLUDING STATEMENTS REGARDING THE COMPANY'S 
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EXPECTATIONS, BELIEFS, INTENTIONS OR STRATEGIES REGARDING THE FUTURE.  ALL
FORWARD-LOOKING STATEMENTS INCLUDED IN THIS DOCUMENT ARE BASED ON INFORMATION
AVAILABLE TO THE COMPANY ON THE DATE HEREOF, AND THE COMPANY ASSUMES NO
OBLIGATION TO UPDATE ANY SUCH FORWARD-LOOKING STATEMENTS.  THE COMPANY'S ACTUAL
RESULTS COULD DIFFER MATERIALLY FROM THOSE DISCUSSED HEREIN.  FACTORS THAT COULD
CAUSE OR CONTRIBUTE TO SUCH DIFFERENCES INCLUDE, BUT ARE NOT LIMITED TO, THOSE
DISCUSSED IN "FACTORS AFFECTING FUTURE RESULTS", INCORPORATED BY REFERENCE INTO
ITEM 7 OF THIS ANNUAL REPORT, AS WELL AS THOSE DISCUSSED IN THIS SECTION AND
ELSEWHERE IN THIS REPORT, AND THE RISKS DISCUSSED IN THE COMPANY'S SECURITIES
AND EXCHANGE COMMISSION FILINGS.

ITEM 1. DESCRIPTION OF BUSINESS

OVERVIEW

GateField Corporation (formerly Zycad Corporation), a Delaware corporation 
incorporated in 1984 ("GateField" or the "Company"), designs, develops and 
markets high density, high performance programmable logic solutions and 
related development system software. GateField is a supplier of flash 
technology Field Programmable Gate Arrays ("FPGAs"), trademarked as 
programmable ASICs ("ProASIC-TM-"), that are based on two proprietary 
technologies: the GateField flash-based switching element and the very 
fine-grained, gate array like, Sea-of-Tiles-TM- ProASIC-TM- architecture. The 
Company also offers design services including rapid system prototyping and 
system design with emphasis on applications using GateField's programmable 
logic devices. 

Programmable logic devices are standard semiconductor components that can be
configured by the end customer thus providing shorter design cycle times and
reduced development costs. The Company's products provide fast time-to-market
for electronic equipment manufacturers in the networking, telecommunications,
computer, peripheral, industrial control, instrumentation and  consumer 
markets.  GateField's distribution channels include direct sales, manufacturing
representatives, distributors, and authorized design centers throughout the
world. 

During 1997, the Company completed its transition from a provider of high 
performance verification products to a provider of products based on its 
ProASIC-TM- technology.  This transition resulted in the sale of several of 
its assets including: its ownership in QSS Inc., a joint venture established 
with QSS Ltd. to distribute the DOORS technology and other related products 
in the North American market; the technology related to its LightSpeed 
software product family which consisted of a logic simulation accelerator and 
a logic simulation engine; all the assets relating to its verification 
business including its rights, title and interest in its hardware fault 
simulation products known as XP and PXP product lines and its software fault 
simulation and test business.  Finally, the Company transferred its 
maintenance business on the above mentioned products to Zycad TSS, Inc., a 
company formed by former employees of the Company.  GateField has therefore 
changed its focus from high performance verification products to flash 
technology FGPAs and related development system software, and design services.

INDUSTRY BACKGROUND

Three principal types of digital integrated circuits are used in most digital
electronic systems: microprocessors, memory and logic.  Microprocessors are used
for control and computing tasks, memory is used to store programming
instructions and data, and logic devices are needed to adapt these processing
and storage capabilities to a specific application. Logic contains
interconnected groupings of simple logical "AND" and logical "OR" functions as
well as sequential elements ("Flipflops"), commonly represented as "gates".
Typically, complex combinations of individual gates are required to implement
the specialized logic functions required for systems applications. While system
designers use a relatively small number of standard architectures to meet their
microprocessor and memory needs, they require a wide variety of logic circuits
in order to achieve end product differentiation. 

The stratified logic market includes, among many other segments, low-density 
standard transistor-transistor logic circuits ("TTLs") and custom-designed
application specific integrated  circuits  ("ASICs").  TTLs are standard logic
circuits that can be purchased "off the shelf" and interconnected on a printed
circuit board.  ASICs are customized circuits that offer electronic system
manufacturers the benefits of higher levels of circuit integration: improved
system performance, reduced system size, and lower system cost.

ASICs include conventional gate arrays and programmable logic circuits.
Conventional gate arrays are customized to perform desired logical functions at
the time the device is manufactured.  Since they are "hard wired," conventional
gate arrays are subject to the risks associated with long development cycles,
inventory obsolescence and an inherent inability to change the logic design. 
Programmable logic circuits, on the other hand, are manufactured as standard
devices customized at the designer's desktop or at the end of the customer's
manufacturing line using the supplier's programming systems.  Design changes can
typically be implemented in as little as a few hours, as compared to several
weeks for conventional gate arrays.  In addition, significant savings can result
from the elimination of non-recurring engineering costs and expenses associated
with the redesign and testing. Thus programmable logic circuits are being used
by a growing number of electronic system 

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manufacturers in response to increased demand for product differentiation, time
to market pressures, and desired manufacturing flexibility. 

Electronic system manufacturers customize programmable logic devices to 
perform the desired logical functions by using EDA systems.  The principal 
limitation on the wider use of more complex programmable logic has been price 
and performance factors approaching those of conventional gate arrays.  On 
current architectures, programming elements based on SRAM technology occupy 
relatively large amounts of area within a circuit, which tends to increase 
the overall size and cost of each circuit. In addition, on current 
architectures the size of SRAM programming elements tends to limit the number 
of interconnect points in a circuit, which tends to limit flexibility and 
performance. 

Before programmable logic devices can be programmed there are various steps 
that must be accomplished by a designer using EDA design software. These 
steps include defining the function, verifying the design, and laying out the 
circuit. Traditionally, logic functions have been defined using schematic 
capture tools, which essentially permit the designer to construct a circuit 
diagram on the computer.  As programmable logic designers have begun to 
design higher capacity circuits, the time required to create schematic 
diagrams using schematic capture tools has become prohibitive. To address 
this problem, designers are increasingly turning to hardware description 
languages ("HDLs), also known as high-level description ("HLD"), which permit 
the designer to describe the circuit functions at an abstract level and to 
verify the performance of logic functions at that level. The HDL can then be 
fed into logic synthesis software that automatically converts the abstract or 
high-level description to a gate-level representation equivalent to that 
produced by schematic capture tools. After a gate-level representation of the 
logic function has been created and  verified, it must be translated or "laid 
out" onto the generic logic elements of the programmable device. This is 
achieved by placing the logic gates and routing their interconnections, a 
process referred to as "place and route".  As designers have begun to design 
higher capacity circuits, the need for automatic (instead of manual) place 
and route capability has become increasingly important. This transition to 
the use of HDLs presents a challenge to the designer to learn new design 
methods and to use new design tools. In addition, not all programmable logic 
circuit architectures are equally well suited for use with logic synthesis 
and place and route tools.

Customer requirements for improved functionality, performance, reliability and
lower cost are often addressed through the use of components that integrate ever
larger numbers of logic gates onto a single integrated circuit. However, while
global competition is increasing the demand for more complex products, it is
also shortening product life cycles and requiring more frequent product
enhancements. GateField provides programmable logic solutions, which combine the
high logic density typically associated with custom gate arrays with the time to
market advantages of programmable logic and the availability of a standard
product.

COMPANY STRATEGY

GateField's strategy is to become a leading supplier of flash programmable ASIC
and related software development tools which enable its customers to reduce
their own product's time-to-market and to significantly reduce the time required
to ramp up to volume production.  This strategy includes the following elements:

MARKETING PENETRATION.  The Company is focusing its marketing efforts on gate
array designers within established electronic system companies who are already
familiar with high level design methodologies as well as an emerging group of
programmable logic designers who are starting to use higher density programmable
logic devices.  A key element of GateField's strategy is to provide development
software products that integrate seamlessly with the users' choice of EDA
environment.  In support of this strategy, the Company engages in joint
marketing efforts with EDA companies like Exemplar Logic and Auspy Incorporated,
with the goal of providing a complete solution to the end user.  GateField's
distribution channels include direct sales, manufacturing representatives,
distributors, and authorized design centers in the major markets of North
America, Japan, Europe and Asia.

PROPRIETARY PROGRAMMING ELEMENT AND DEVICE ARCHITECTURE.  GateField holds
patents on various aspects of the underlying programming switch technology and
the gate array like architecture (ProASIC). The Company believes its proprietary
technology will allow its products to easily integrate into industry standard
ASIC design flow.  The Company is focused on providing products which emphasizes
design portability and reuse, predictable system performance, device utilization
and, ultimately, increased designer productivity. 

PROGRAMMABLE ASIC PRODUCTS.  GateField's programmable ASIC devices utilize 
flash technology to provide a unique combination of reprogrammability, high 
density and non-volatility.  The Company's ProASIC technology eliminates the 
need for external configuration storage devices releasing the system designer 
from special design considerations related to board design and system 
initialization procedures.  In addition, programmable ASIC devices tend to be 
much smaller than circuits of comparable performance and capacity made under 
comparable design rules.  The Company believes end user benefits include: 
standard ASIC design flow, seamless migration to an ASIC for high volume, 
increased designer productivity, faster time-to-market, smaller device sizes, 
higher performance and reduced inventories. 

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SOFTWARE TOOLS.  GateField's software development efforts are focused on
value-add and ease-of-use.  In addition, the Company intends to embrace industry
standards and develop seamless interfaces with industry standard EDA tools. 
The Company believes the industry's acceptance of its ProASIC devices will
increase if it facilitates the customer's use of his preferred design
methodology and his "best of breed" open EDA tools with GateField's software
solutions.  As an example, the Company has developed a highly automated "place
and route" tool for its ProASIC technology and offers it at moderate prices to
accelerate the adoption of its programmable ASIC solution.

DESIGN SERVICES.  GateField believes its design services group is a key success
factor in the adoption and proliferation of the Company's ProASIC technology. 
Customers benefit by drawing on the group's core competencies in rapid system
prototyping, reconfigurable computing, and design conversions.  The group
strives to build important relationships with electronic system manufacturers by
helping them meet their important time-to-market challenge. 

CONDUIT FOR INTELLECTUAL PROPERTY (IP) PROLIFERATION.  Standard ASIC design 
flow and a unique combination of high capacity, reprogrammability and 
non-volatility make ProASIC devices an effective vehicle for efficient and 
secure intellectual property (IP) distribution, implementation, verification 
and evaluation.  Each ProASIC device holds its own electronic signature and 
can be configured to make copying and reverse engineering prohibitive. The 
Company believes these key features provide a secure silicon medium for IP 
delivery by IP suppliers and intends to target these companies in its direct 
marketing efforts.

TECHNOLOGY LICENSING AND PRODUCTION RELATIONSHIPS.  The Company's objective is
to sell non-exclusive licenses to its ProASIC technology to major semiconductor
companies as their preferred solution for embedded, re-programmable 
system-level-integration (SLI) integrated circuits (ICs).  In turn GateField
believes it will be able to gain access to leading edge flash technology and
adequate manufacturing capacity to fulfill customer product demand.  The Company
believes it can avoid the capital and overhead required to establish its own
wafer fabrication facility and maintain its flexibility to utilize new process
technologies as they become available.

TECHNOLOGY

PROCESS.  GateField's current products utilizes an established high-density 
0.6 micron FLASH memory process with some enhancements. Two layers of metal 
interconnect and two layers of polysilicon are crafted into programmable ASIC 
devices with minimal customization.  The process uses a LOCOS (LOCal 
Oxidation of Silicon) well isolation structure starting from low-cost P-type 
bulk silicon wafers.  This etch and oxide growth process provides a more 
effective isolation barrier between P-type and N-type well regions than 
common oxide isolation.  In addition, LOCOS well isolation results in higher 
latch-up resistance, smaller device spacing and a more planar surface for 
building metal interconnect layers upon. This characteristic becomes 
increasingly important as larger gate-count devices are designed and 
manufactured.  GateField believes its technology will migrate with the ever 
shrinking geometry characteristic of the semiconductor industry.

ARCHITECTURE.  The design of the ProASIC product architecture is critical to 
achieving high density, meeting performance goals, and obtaining of high-gate 
count programmable ASICs (i.e. gate array compatibility).  The architecture 
consists of switches that program the chip's personality, the associated 
routing, clocking and power grids and the underlying logic cell that provides 
the programmable gates.  Improvements in the architecture continue to drive 
performance increases with each subsequent product generation. The switch is 
re-programmable and non-volatile.  It is comprised of an NMOS transistor 
directly coupled to a flash memory cell.  For GateField's present products, 
an EPROM performs the programming function while Fowler-Nordheim tunneling 
provides a global erase mechanism.  The flash memory cell combined with the 
small NMOS transistor is used for programming the logic function and 
interconnect routing.  

BASIC LOGIC UNIT AND PROGRAMMABLE IOS. The basic logic unit is comprised of a
programmable 3-input, 1-output cell.  Each input may be programmed for signal
inversion eliminating the wasteful usage of cells as inverters only.  Virtually
any logic function can be programmed including a flip-flop.  This extraordinary
flexibility allows a programming range from 100% combinatorial to 100%
flip-flops and any combination of combinatorial and sequential elements. 
Through the programming of the local switch matrix, the cell is configured and
combined with adjacent cells to form larger logic functions. Just as in a
sea-of-gates gate array architecture, the basic logic cell is stepped and
repeated in the horizontal and vertical directions to create a sea of
programmable logic cells.  The I/O cell is also highly programmable.  I/Os may
be programmed as input, output or bi-directional.  In addition, the cells are
programmed for TTL, CMOS or PCI interface specifications. Slew-rate and output
drive/impedance programming enable close matching to a wide variety of bus
interface conditions.  Additional programming options include pull-ups and open
drain/source configurations.

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EMBEDDED SRAM MEMORY.  In the GF260F Embedded ProASIC product family, the
embedded memory is located across the top of the device.  Depending upon the
family member, 6 to 20 blocks, each containing 256x9 bits of memory, are
available to support a variety of possible memory configurations.  Each block
may be programmed as an independent memory or may be combined using dedicated
memory routing resources to form larger, more complex memories and FIFO
structures.  In addition, GateField's unique architecture allows memory
paralleling to form memories of up to 11 independent memory ports (10 read, 1
write port).

INTERCONNECT ROUTING RESOURCES.  Interconnect routing resources are available in
numerous levels of hierarchy providing the place and route tool (ASICmaster-TM-)
with optimal solutions for varying design styles and application types. 
Although actual levels of hierarchy extend into the mid-teens, it is easiest to
describe the chip routing matrix as having four major hierarchical routing
levels; local, long, very-long, and global.  In addition, robust power and
ground grids ensure minimal supply drops and ground rises regardless of chip
programming.  One of the most powerful components of the ProASIC product
interconnect capability is the global hierarchical level which contains highly
flexible, chip-wide, high-performance resources.  These resources begin with
four chip inputs dedicated to high-performance input signals.  Each input pin
has a distribution interconnect scheme that ends at every basic logic cell.  The
maximum skew between any two cells driven by these input nets is 1ns.  Each
input may be programmed to cover the entire chip or any specific area for a
localized signal.  These inputs may serve as clocks, global clears/resets, or
any other user defined function.  When programmed as clocks, clock domains may
be assigned specific regions or may be dispersed throughout the entire core. 
Any unused segments or areas of a clock net may be re-allocated to serve
additional local clocks or re-assigned for signal routing.  The flexibility of
each net allows the programming of four clocks with complete chip coverage or
many more clocks with localized coverage.  

PRODUCTS

GateField offers a range of flash-based programmable logic integrated circuits
and associated development software and hardware.  The Company's integrated
circuits include products aimed at general logic replacement as an alternative
to ASICs. Programmable ASICs are available in a wide variety of plastic and
ceramic package types, including pin-grid array, surface mount like enhanced
super ball grid arrays and quad flat pack configurations.  Pin counts range from
160 to 560 pins.  External configuration storage devices are not needed due to
the non-volatility of flash-based ProASIC devices.  Devices can be programmed
either by plugging them into the ASICmaker-TM- console that is sold by GateField
or on the system board through the In-System-Programming (ISP) interface.  The
Company's development software products facilitate the design process for these
products.

Over the past 12 months, the Company has introduced two new product families
based on a 0.6-micron Flash technology. The Company believes the commercial
success of these products will depend upon the achievement of targeted yield,
product cost, and performance levels and the development of manufacturing,
marketing, and support capabilities. Even if such goals are accomplished, there
can be no assurance that these products will achieve significant market
acceptance. 

      PROGRAMMABLE ASIC PRODUCTS

GF100K PROASIC PRODUCT FAMILY.   The first programmable ASIC product family
introduced by GateField consists of two devices with densities of 9,000 and
51,000 available gates.  This product family served as the Company's "proof of
concept" demonstrating the feasibility of high complex, flash-based programmable
ASIC devices and seamless integration into a standard ASIC design environment. 
This product is no longer recommended for new designs.

GF250F PROASIC PRODUCT FAMILY.  This product family, introduced in March 1997,
features a new architecture and electrically PCI compliant input/output
structures.  Individual devices range from 25,000 to 150,000 logic gates. In
contrast to SRAM based and antifuse solutions, these devices provide a high
number of sequential elements (Flipflops), facilitating the implementation of
pipelined structures which are often needed to operate systems at higher speeds.
Due to its gate array like Sea-of-Tiles architecture, the GF250F family delivers
high routability and predictability in terms of device performance and
gate utilization.

GF260F PROASIC EMBEDDED PRODUCT FAMILY.  Introduced in October 1997 and based on
the Company's GF250F technology, this product family features embedded memory
blocks that can efficiently implement a variety of single port and dual port
memories as well as FIFO (First-In, First-Out) structures.  The largest device
currently available can hold up to 92,000 logic gates and up to 23k bits of dual
port memory / FIFO.
 
      DEVELOPMENT SOFTWARE PRODUCTS

ASICMASTER-TM-.  GateField's ASICmaster product performs the placement and
routing of a standard gate level netlist into a GateField ProASIC device. After
successful completion of the layout task and verification of a device's
function, a programming bit stream is generated and loaded into a ProASIC device
via GateField's ASICmaker programming console.  GateField's ASICmaster software
runs on PC platforms under Microsoft Windows NT as well as under the UNIX
operating system on Sun and Hewlett-Packard engineering workstations. The
software is typically delivered to the customer on CD-ROM along with
documentation manuals. The Company attempts to work closely with its customers
and potential new customers who are evaluating the GateField ProASIC technology,
tracking the progress of logic chip designs, providing 

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applications design support, and for those customers who have purchased 
maintenance agreements, upgrading the customers' software. Management 
believes that close contact with its development software customers is a key 
element in customer satisfaction and can also provide insight into new 
product development areas.

ASIC MAKER-TM- DEVICE PROGRAMMER.  The Company's ASICmaker device programmer is
used to configure GateField ProASIC devices.  The ASICmaker accepts data from
the ASICmaster software, converts the data to the proper protocol and applies
the appropriate electrical signals to the device for storage.  Customized
programming modules allow devices in different packages to be programmed by just
exchanging modules. ASICmaker also provides an ISP (In-System-Programming) mode,
allowing to program or re-program devices which are already residing on a system
board. Several devices on one board can be programmed using one programming
sequence.

PRODUCT DEVELOPMENT

The Company believes that its future business and operating results depend in 
part on its ability to continue to enhance its existing products, develop new 
products and improve price and performance of it products in a timely manner. 
The Company continuously evaluates the emerging needs, developing standards 
and emerging technologies of its target markets to identify new market or 
product opportunities.  GateField's product development activities are 
primarily directed towards the design of new programmable ASIC solutions, the 
utilization of advanced semiconductor manufacturing processes, the 
development of new software tools and ongoing cost reductions and performance 
improvements in existing products. The Company's recent  research  and  
product development efforts have been directed principally towards new 
product families based on an advanced 0.25-micron flash process, towards 
enhanced place and route tools and towards other proprietary new 
architectures.  The Company's research and development expenses in 1997, 
1996, and 1995 were $7.9 million, $15.8 million, and $11.3 million, 
respectively.  The Company intends to continue to spend substantial amounts 
on research and development in order to continue to develop new products and 
achieve market acceptance for such products.  The Company believes that its 
future success will depend in part upon its ability to attract and retain 
highly-skilled engineering personnel and there can be no assurance that the 
Company will be successful in attracting and retaining such personnel. 

The Company has in the past and may in the future experience delays in new
product development.  There can be no assurance that the Company will be
successful in developing and marketing product enhancements or new products that
respond to technological change, evolving industry standards and changing
customer requirements, that the Company will not experience difficulties that
could delay or prevent the successful development, introduction and marketing of
these products or product enhancements, or that its new products or product
enhancements will adequately meet the requirements of the marketplace and
achieve any significant degree of market acceptance.  Failure of the Company,
for technological or other reasons, to develop and introduce new products and
product enhancements in a timely and cost-effective manner would have a material
adverse effect on the Company's business, operating results and financial
conditions.  Complex products such as those offered by the Company may contain
undetected or unresolved defects when first introduced or as new versions are
released.  There can be no assurance that, despite testing by the Company,
defects will not be found in new products or new versions of products following
commercial release, resulting in loss of market share, delay in or loss of
market acceptance or product recall.. Any such occurrence could have a material
adverse effect upon the Company's business, operating results and financial
condition.

MANUFACTURING

The Company's outsources the manufacture of its products to independent
contractors on a contract basis.  The Company also relies upon a limited number
of suppliers who can produce its products to its specifications and in the
quantities and quality it desires.  There can be no assurance that these
independent contractors and suppliers will be able to timely meet the Company's
future requirements for manufactured products, components and subassemblies. 
The Company generally purchases limited source components pursuant to purchase
orders and has no guaranteed supply arrangements with these suppliers.  Any
interruption in the supply of any of the key components currently obtained from
a limited source would disrupt its operations and have a materiel adverse effect
on the Company's business, operating results and financial condition.  

GateField's ProASIC product wafers are currently manufactured by Rohm Co. LTD.
(Rohm), located in Kyoto, Japan under a manufacturing and development
partnership agreement.  GateField and Rohm have built a strong working alliance
that dates back to October 1993.  Rohm is widely recognized for its expertise in
large-scale integration (LSI) manufacturing and is one of the pioneers in flash
technology.  The Company's products are currently manufactured on a 0.72-micron
EEPROM process fabricated by Rohm. Rohm has made a major thrust in EE/Flash
nonvolatile process technology and the Company believes Rohm will drive the
technology from 0.72 to 0.5 and 0.35.  Assembly of ceramic pin grid array (CPGA)
packages was initially done at the Kyocera facility in San Diego.  As volume
built, assembly of both CPGA and plastic quad flat pack (PQFP) was shifted to
ANAM and Hyundai in Korea and AAPI in the Philippines. ANAM is also assembling
GateField ProASIC devices in 352 pin and 560 pin enhanced Super Ball Grid Array
(eSBGA) packages.  All wafer final quality assurance and reliability assurance
testing is done at GateField.

<PAGE>

MARKETING, SALES AND CUSTOMERS

GateField distributes its products through a direct sales force organization,
independent sales and manufacturer's representatives, distributors and
authorized design center in order to reach a broad base of potential customers.
The Company's direct sales personnel and independent sales representatives
generally focus on major target accounts.  During 1997, 1996 and 1995, one
customer, Intel Corporation, accounted for 16%, 10% and 17% of consolidated
revenues, respectively.

GateField has international sales offices in Japan and Germany and a network of
technical distributors and authorized design centers throughout Japan, Europe,
Israel and the Far East which supports its international business. The Company
engaged in a non-exclusive sales and marketing agreement with its strategic
manufacturing partner Rohm Co. Ltd. in Kyoto, Japan. Rohm markets and sells
GateField's ProASIC products to Japanese customers in Japan and worldwide. From
time-to-time the Company expects that it may add or delete manufacturing
representative companies and distributors from its selling organization as it
deems appropriate for the level of business.  Net revenues to unaffiliated
customers by foreign subsidiaries amounted to $5.9 million, $8.2 million, and
$9.0 million in 1997, 1996 and 1995 respectively.  Included in the domestic
revenue figures are sales made directly to Japan and other Asian countries,
which amounted to $1.6 million in 1997, $2.1 million in 1996 and $6.1 million in
1995.  When combined, export sales comprised approximately 38%, 31%, and 30% of
consolidated revenues in 1997, 1996 and 1995, respectively.

Customer service and support are important aspects of the programmable ASIC
business.  To address customer needs, GateField provides several levels of user
support, including field applications assistance and design services. The
corporate applications engineering staff publishes data sheets and application
notes, conducts technical seminars, and provides design assistance via modem
links to the customer's design station.  Customer service is supported with
inventory maintained both at the factory and at distributors' locations to
provide short-term delivery of chips.

COMPETITION

The semiconductor industry overall is intensely competitive and is characterized
by rapid technological change, rapid rates of product obsolescence, and price
erosion resulting from both product obsolescence and price competition.
GateField, as a new entry in the high end programmable logic market, competes
directly with a number of fast-growing domestic companies that devote a
significant portion of their resources to new product development and existing
product enhancement. The semiconductor industry also includes many large
domestic and foreign companies that have substantially greater financial,
technical, and marketing resources than GateField.  The Company currently
experiences direct competition from market leaders Xilinx and Altera, as well as
Actel, Lucent and other large companies.  The Company also experiences
competition from other companies who offer products that are indirectly
competitive with the Company's products or have announced their intention to
enter the market.
 
The principal factors of competition in the CMOS programmable logic marketplace
include product performance and features, the integration capacity and
flexibility of the individual circuits, the capability of software development
tools, quality and reliability, pricing, technical service and support, and the
ability to respond quickly to technical innovation.  GateField believes it
competes favorably with respect to these factors, although it may be at a
disadvantage in comparison to larger companies with broader product lines,
greater technical service and support capabilities, and internal wafer
fabrication capabilities. GateField believes, however, that its proprietary
flash-based configuration switch and proprietary gate array like, homogeneous
Sea-of-Tiles architecture will lead to products with the unique feature
combination of ASIC design flow, high performance, high density, non-volatility
and reprogrammability. By further capitalizing on the installed base of ASIC and
programmable logic designers, who deploy the industry standard high level design
flow, the Company believes that it will be able to provide a competitive
programmable ASIC solution to the electronic system industry.

A number of very large, well-financed companies compete with GateField in its
core business. Some of these companies, including Lucent, Motorola, Philips,
and others, have proprietary wafer manufacturing ability, preferred vendor
status with many of the Company's customers, extensive marketing power and name
recognition, much greater financial resources than those of the Company, and
other significant advantages over the Company. The Company expects that as the
dollar volume of the programmable logic market grows, the attractiveness of this
market to larger, more powerful competitors will continue to increase and others
will enter the market.

LICENSES AND AGREEMENTS

On October 22, 1997 Siemens AG ("Siemens") and GateField entered into a
license agreement.  Siemens licensed the Company's non-volatile and
reprogrammable ProASIC technology to be embedded into their system level
integration (SLI) products and GateField gains access to Siemens' advanced 0.25
micron (u) FLASH technology.  The Company believes that the combination of this
process technology and the innovative ProASIC architecture will allow the
creation of reprogrammable and reconfigurable system-on-a-chip solutions that
will improve time-to-market and time-to-volume standards. 

On March 18, 1998 Rohm Co., Ltd. ("Rohm") and GateField entered into a
Technology License Agreement under which Rohm licensed GateField's ProASIC
technology for use in nonembedded applications and in multi-chip applications
having process 

<PAGE>

technology down to 0.5 micron and having an approximate raw gate capacity of a
total of 10,240 gates.  In addition Rohm paid a one time fee to obtain a master
license for GateField's ASICmaster-TM- software.

PROPRIETARY RIGHTS

The Company's ability to compete is dependent in part on its proprietary rights
and technology.  The Company relies on a combination of patent, copyright and
trademark laws, trade secrets, confidentiality procedures and contractual
provisions to protect its proprietary rights.  The Company generally enters into
confidentiality or license agreements with its employees, resellers,
distributors, customers and potential customers and limits access to its
software, hardware designs, documentation and other proprietary information. 
There can be no assurance that the steps taken by the Company in this regard
will be adequate to prevent misappropriation of its technology.  The Company
currently has 5 issued United States patents.  There can be no assurance that
the Company's patents will not be invalidated, circumvented or challenged, that
the rights granted thereunder will provide competitive advantages to the Company
or that any of the company's pending or future patent applications, whether or
not being currently challenged by applicable governmental patent examiners, will
be issued with the scope of the claims sought by the Company, if at all. 
Furthermore, there can be no assurance that others will not develop technologies
that are similar or superior to the Company's technology or design around the
patents owned by the Company. 

On October 10, 1995, United States Patent No. 5,457,653 was issued to the
Company for a "Technique to Prevent Deprogramming a Floating Gate Transistor
used to Directly Switch a Large Electrical Signal"; on January 14, 1997, United
States Patent No. 5,594,363 was issued to the Company for a "Logic Cell and
Routing Architecture in a Field Programmable Gate Array"; on January 14, 1997,
United States Patent No. 5,594,698 was issued to the Company for "Random Access
Memory (RAM) Based Configurable Arrays"; on February 18, 1997 United States
Patent No. 5,604,888 was issued to the Company for "Emulation System Employing
Motherboard and Flexible Daughterboards" and on May 27, 1997 United States
Patent No. 5,633,518 was issued to the Company for "Nonvolatile Reprogrammable
Interconnect Cell with FN Tunneling and Programming Method Thereof". These
patents are effective for a period of 20 years from the filing date and the
Company believes that these patents are an important factor in the protection of
its proprietary information.  These are the first patents issued for the
GateField ProASIC technology and five more patent applications are pending at
this time.

The Company has common law trademark protection for its trademark "GateField"
(TM) Corporation, "ProASIC", (TM), "ProCore", (TM), "ProReady", (TM), "GF100K",
(TM), "GF200F", (TM), "GF250F, (TM), "GF260F", (TM), "GF360F", (TM), "GF460F",
(TM), "ASICmaker", (TM), "ASICmaster", (TM), "MEMORYmaster", (TM),
"Sea-of-Tiles", (TM), "ProIP", (TM), "ProSLI", (TM), "FlashLink", (TM).

EMPLOYEES

At December 31, 1997, the Company had 72 employees, including 15 in sales and
marketing, 26 in research and development, 19 in customer service and support
and 12 in general and administrative functions.  The Company also contracts with
consultants who provide short-term services to the Company in various areas. 
None of the Company's employees are represented by a labor organization and the
Company considers its relations with its employees to be good.  The Company
believes its business depends to a significant extent on the contributions of
its senior management and other key personnel and on GateField's ability to
attract and retain highly qualified personnel.  Competition to hire such
personnel in GateField's industry and location is intense.  There can be no
assurance that the Company will be successful in attracting and retaining such
personnel. 

ITEM 2.  PROPERTIES

The Company leases approximately 30,769 square feet of office space in 
Fremont, California for its headquarters, test and engineering operations 
pursuant to a lease that expires in August of 1999.  The Company also 
subleases approximately 30,231 square feet of such office space at its 
headquarters facility to Mattson Technology pursuant to a sublease agreement 
that expires in August of 1999.  The Company's Service Division occupies 
approximately 6,633 square feet of office space in New Jersey pursuant to a 
lease that expires on January 31, 2003. The Company also leases sales and 
support office spaces in two domestic locations in Massachusetts and Texas, 
and two international locations in Munich, Germany and in Yokohama, Japan on 
a short-term or intermediate-term basis.  Approximate future minimum lease 
payments under all the leases are $1.9 million.

ITEM 3.  LEGAL PROCEEDINGS

As of March 1, 1998 the Company was not involved in any pending legal 
proceedings which the Company believes could have a material adverse effect 
on the Company. 

<PAGE>

ITEM 4.  SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS

On December 15, 1997, the following items were voted on at the Annual Meeting of
Stockholders:

<TABLE>
<CAPTION>
--------------------------------------------------------------------------------
          PROPOSAL                   FOR          AGAINST/            BROKER
                                                  WITHHELD  ABSTAIN   NON-VOTES
--------------------------------------------------------------------------------
<S>                                <C>          <C>         <C>       <C>
1.  Election of Directors:
      James R. Fiebiger            36,964,896     270,622
      David J. Dunn                36,969,012     266,506
      Horst G. Sandfort            36,972,712     262,806
      Jonathan S. Huberman         36,971,446     264,072
--------------------------------------------------------------------------------
2.  Approval of Classified
    Board of Directors             20,259,644   1,136,579   159,270   15,680,025
--------------------------------------------------------------------------------
3.  Approval of Authorized
    Share Increase to              23,234,334     698,125   135,708   13,167,351
    65,000,000
--------------------------------------------------------------------------------
4.  Approval of Issuance of
    Securities Exceeding           20,592,017     738,578   224,898   15,680,025
    Twenty Percent of
    Outstanding Shares
--------------------------------------------------------------------------------
5.  Ratification of Deloitte
    & Touche LLP as                36,912,120     172,241   151,157
    Independent Auditors
--------------------------------------------------------------------------------
</TABLE>


EXECUTIVE OFFICERS OF THE REGISTRANT

The executive officers of the Company as of March 16, 1998 are as follows:


     Name                Age  Position
     ----                ---  --------
     James R. Fiebiger   56   President, Chief Executive Officer and Director

     Stephen A. Flory    43   Vice President, Chief Financial Officer and
                              Treasurer

     Douglas E. Klint    47   Vice President, General Counsel and Corporate
                              Secretary

     Peter G. Feist      43   Vice President, Marketing

     Charles S. Parr     42   Vice President, Worldwide Sales

     Timothy Saxe        42   Vice President, Engineering

     
JAMES R. FIEBIGER, has been a director of the Company since 1994.  Dr. Fiebiger
has been President and Chief Executive Officer of the Company since October
1997, and was President of the GateField division of the Company from June 1997
to October 1997.  Dr. Fiebiger had been a Consultant for the semiconductor
industry since serving as President and Chief Operating Officer of VLSI
Technology, Inc., a manufacturer of semiconductors, from February 1988 to August
1993.  Previous positions include President and CEO of Thomson-Mostek and Senior
Vice President and Assistant General Manager of Motorola's Worldwide
Semiconductor Sector.  Dr. Fiebiger is currently a member of the Board of
Directors of Mentor Graphics Corporation and Thunderbird Technology, Inc.

<PAGE>

     STEPHEN A. FLORY joined the Company as European Corporate Controller in
August 1988.  From 1995 to 1997, he has been its corporate controller and was
promoted to Chief Financial Officer, Vice President and Treasurer in February
1997.  Before joining GateField, Mr. Flory held various financial positions for
Motorola Corporation's European operations. 

     DOUGLAS E. KLINT joined the Company in December 1984 as Director of
Contracts, was named Corporate Secretary in June 1986, and was promoted to Vice
President, General Counsel and Corporate Secretary in November 1987.  

     PETER G. FEIST joined the Company in October 1996 as Vice President,
Marketing.  From January 1995 to September 1996 he was Regional Manager Europe
for Hyundai Electronics, Digital Media Division.  From April 1985 to December
1994 he was Director of Marketing in the USA for LSI Logic GmbH.

     CHARLES S. PARR joined the Company in August 1996 as Vice President,
Worldwide Sales.  From March 1996 to July 1996 he was Vice President of Sales
for MMC Networks, Inc.  From August 1994 to March  1996 he was Vice President
North American Sales and Technology Centers for VLSI Technology, Inc.  From
August 1990 to August 1994, he was Vice President Asia Pacific Operations for
VLSI Technology, Inc.

     TIMOTHY SAXE joined the Company in September 1993 as Vice President,
Engineering.  Prior to that he was Vice President Engineering at Crosscheck.


                                      PART II

ITEM 5.   MARKET FOR REGISTRANT'S COMMON EQUITY AND RELATED STOCKHOLDER MATTERS

The Common Stock is quoted on the Nasdaq National Market under the symbol
"GATE."

The following table sets forth the range of high and low trading prices during
each quarter for the two years ended December 31, 1997:

<TABLE>
<CAPTION>
                                             High                Low
          ------------------------------------------------------------
          <S>                            <C>                 <C>     
          1997
          First Quarter                  $   3.13            $   1.56
          Second Quarter                 $   1.72            $   0.56
          Third Quarter                  $   1.59            $   0.47
          Fourth Quarter                 $   3.00            $   1.06
          ------------------------------------------------------------
          1996
          First Quarter                  $   9.13            $   4.88
          Second Quarter                 $   8.88            $   4.63
          Third Quarter                  $   6.13            $   3.44
          Fourth Quarter                 $   3.63            $   1.56
          ------------------------------------------------------------
</TABLE>

At March 16, 1998, there were 1,267 stockholders of record.

The Company has never paid any cash dividends on the Common Stock.  The Company
currently intends to retain any earnings for future growth, and, therefore, does
not anticipate paying any cash dividends on the Common Stock in the foreseeable
future.  Moreover, the Company's credit facility with Coast Business Credit and
the terms of the Company's Series B Convertible Preferred Stock prohibit the
payment of cash dividends other than to the holders of the Company's Series B
Convertible Preferred Stock. 

On November 10, 1997, the Company issued 1,000,000 shares of Series B 
Convertible Preferred Stock (the "Series B Stock") and warrants to purchase 
(for a purchase price of $1.00 per share) an aggregate of 997,751 shares of 
Common Stock to Idanta Partners Ltd., Dunn Family Trust and Perscilla Faily 
Trust.  The warrants will terminate upon the approval by the stockholders of 
an increase in the Company's authorized common stock and the closing of the 
common stock financing contemplated by the agreement.  Both these 
conditions were satisfied on January 14, 1998, accordingly these warrants 
terminated at that date.  The Series B Stock and the warrants were issued in 
reliance upon the exemption from registration set forth in Section 4(2) of 
the Securities Act of 1933, as amended (the "Securities Act").  Each share of 
outstanding Series B Stock is convertible into the number of shares of Common 
Stock equal to 4.5825 plus the amount of accrued and unpaid dividends on the 
Series B Stock, provided that upon the occurrence of certain events, each 
share of Series B Stock shall be convertible into the number of shares 
obtained by dividing the sum of 4.5825 plus accrued and unpaid dividends by 
0.75.  

In February 1997, the Company completed a $3,500,000 private placement with
investors whereby the Company issued 6% Subordinated Convertible Debenture (the
"Debentures") and warrants to purchase an aggregate of 500,000 shares of Common
Stock.  The Debentures accrued interest at an annual rate of 6%, beginning on
the date of issue, with principal due and payable 

<PAGE>

three years from the date of issue, if and to the extent that the Debentures
were not previously converted.  The Debentures were convertible at the option of
the holder into the Company's Common Stock.  The warrants have a term of 60
months and are exercisable into Common Stock at an exercise price of $2.25 per
share.  The Debentures and warrants were issued in reliance upon the exemption
from the registration set forth in Section 4(2) of the Securities Act.  

On May 15, 1997, the Debentures were converted into 100,000 shares of the
Company's Series A Convertible Preferred Stock (the "Series A Stock") having an
aggregate stated value of $3,500,000. In addition, Preferred Stock purchase
warrants were issued to the holders of the Debentures for a total of 42,858
shares of Series A Stock for a term of 60 months at a purchase price of $35.00
per share (provided such warrants could only be exercisable when the last
reported sales price of the Common Stock on the most recent trading day is equal
to or greater than $1.50 per share). The Series A Stock and warrants to purchase
Series A Stock were issued in reliance upon the exemption from the registration
set forth in Section 4(2) of the Securities Act.  During 1997, 51,972 shares of
the Series A Stock were converted into 4,546,928 shares of the Company's Common
Stock at prices ranging from $0.367 to $0.606 per share. The shares of Common
Stock issued upon the conversion of the Series A Stock were issued in reliance
upon the exemption from the registration set forth in Section 3(a)(9) of the
Securities Act.  In August 1997, the Company redeemed all of the outstanding
shares of the Series A Stock and warrants to purchase Series A Stock for
$1,827,000. Also in August 1997, all of the outstanding warrants for 500,000
shares of Common Stock were exchanged for warrants to purchase 350,000 shares of
the Company's Common Stock at an exercise price of $0.53125 per share. The
warrants to purchase Common Stock issued upon the exchange of warrants were
issued in reliance upon the exemption from the registration set forth in Section
4(2) of the Securities Act.  In September 1997, Common Stock warrants to
purchase an aggregate of 105,000 shares of Common Stock were exercised for an
aggregate price of $56,000. The shares of Common Stock issued upon exercise of
the warrants were issued in reliance upon the exemption from the registration
set forth in Section 3(a)(9) of the Securities Act.

In May 1996, the Company sold a total of $10,000,000 of subordinated convertible
debenture notes (the "Notes") to institutional investors as part of a private
placement.  The Notes accrued interest at an annual rate of 6%, beginning on the
date of issue, with the principal due and payable three years from the date of
issue if and to the extent that the Notes are not previously converted. The
Notes are convertible at the option of the noteholders into Common Stock at a
price equal to 80% to 85% of the average closing bid price for the Common Stock
on the Nasdaq National Market for the five trading days prior to the date of
conversion.  During 1996, an aggregate of $5,431,000 ($4,300,000 of the original
principal of the Notes and $1,131,000 of accrued interest) had been converted
into 2,691,000 shares of Common Stock.  During 1997, an aggregate of $7,414,000
($5,700,000 of the original principal of the Notes and $1,714,000 of accrued
interest) had been converted into 7,418,000 shares of Common Stock. The shares
of Common Stock issued upon the conversion of the Notes were issued in reliance
upon the exemption from the registration set forth in Section 3(a)(9) of the
Securities Act.  In addition, the investors received 2 1/2-year warrants to
purchase 59,500 shares of Common Stock at an exercise price of $10 per share.
The warrants were issued in reliance upon the exemption from the registration
set forth in Section 4(2) of the Securities Act.  At December 31, 1997 there was
no outstanding balance on the Notes and a total of 10,109,000 shares of Common
Stock had been issued upon conversion of the Notes.

ITEM 6.   SELECTED FINANCIAL DATA

The information required by this Item is incorporated herein by reference from
the section entitled "Selected Financial Data" in the Company's Annual Report to
Stockholders for the fiscal year ended December 31, 1997 ("Annual Report").

ITEM 7.   MANAGEMENT'S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND
          RESULTS OF OPERATIONS

The information required by this Item is incorporated herein by reference from
the section entitled "Management's Discussion and Analysis of Financial
Condition and Results of Operations" in the Annual Report.

ITEM 7A.  QUANTITATIVE AND QUALITATIVE DISCLOSURE ABOUT MARKET RISK

The information required by this Item is not applicable.  

ITEM 8.   FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA

The information required by this Item is incorporated herein by reference from
the financial statements contained in the Annual Report.

ITEM 9.   CHANGES IN AND DISAGREEMENTS WITH ACCOUNTANTS ON ACCOUNTING AND
          FINANCIAL DISCLOSURE

The information required by this Item is not applicable.

<PAGE>

                                      PART III

ITEM 10. DIRECTORS AND EXECUTIVE OFFICERS OF THE REGISTRANT

The information required by this Item concerning directors of the Company is
incorporated herein by reference from the section entitled "Election of
Directors" included in the Company's definitive Proxy Statement for the Annual
Meeting of Stockholders for the fiscal year ended December 31, 1997, which will
be filed with the Securities and Exchange Commission within 120 days of the
Company's fiscal year end (the "1997 Proxy Statement").  The information
required by this Item concerning executive officers of the Company is included
in Part I of this Annual Report on Form 10-K under the section captioned
"Executive Officers of the Registrant".  The information required by this Item
concerning compliance with Section 16(a) of the Securities Exchange Act of 1934,
as amended, is incorporated herein by reference from the section entitled
"Section 16(a) Beneficial Ownership Reporting Compliance" included in the 1997
Proxy Statement.

ITEM 11.  EXECUTIVE COMPENSATION

The information required by this Item is incorporated herein by reference from
the sections entitled "Election of Directors" "Compensation of Directors",
"Compensation Committee Interlocks and Insider Participation", "Executive
Compensation", "Employment and Severance Agreements" included in the 1997 Proxy
Statement.

ITEM 12.  SECURITY OWNERSHIP OF CERTAIN BENEFICIAL OWNERS AND MANAGEMENT 

The information required by this Item is incorporated herein by reference from
the section entitled "Beneficial Ownership of Voting Stock" included in the 1997
Proxy Statement.

ITEM 13.  CERTAIN RELATIONSHIPS AND RELATED TRANSACTIONS

The information required by this Item is incorporated herein by reference from
the section entitled "Election of Directors" "Compensation of Directors",
"Compensation Committee Interlocks and Insider Participation", "Executive
Compensation", "Employment and Severance Agreements" included in the 1997 Proxy
Statement.
 


                                      PART IV

ITEM 14.  EXHIBITS, FINANCIAL STATEMENT SCHEDULES AND REPORTS ON FORM 8-K

     (a)  The following financial information is incorporated by reference into
Part II hereof from the Annual Report

     1.   Financial Statements:

          Independent Auditors' Report

          Consolidated Balance Sheets at December 31, 1997 and 1996

          Consolidated Statements of Operations for the three years ended
          December 31, 1997

          Consolidated Statements of Stockholders' Equity for the three years
          ended December 31, 1997

          Consolidated Statements of Cash Flows for the three years ended
          December 31, 1997

          Notes to Consolidated Financial Statements

     2.   Financial Statement Schedules:

          Report of Independent Auditors on Financial Statement Schedule

          Schedule II:   Valuation and Qualifying Accounts

          All other schedules have been omitted because they are not applicable,
          not required, or the information required is included in the financial
          statements or notes thereto.

     3.   Exhibits:

          The exhibits are listed in the accompanying Index to Exhibits
          immediately following the signature page.

<PAGE>


     (b)  Reports on Form 8-K

          The Company filed a Current Report on Form 8-K dated November 14, 1997
          to report the execution of a license agreement with Siemens
          Aktiengesellschaft and to report the execution of a stock purchase
          agreement with Idanta Partners Ltd.


                                     SIGNATURES

Pursuant to the requirements of Section 13 or 15(d) of the Securities Exchange
Act of 1934, the Company has duly caused this report to be signed on its behalf
by the undersigned, thereunto duly authorized.

                                   GATEFIELD CORPORATION


                                   --------------------------------
                                   Registrant




Date: April 15, 1998              By:  /s/ Stephen A. Flory 
                                   --------------------------------
                                   Stephen A. Flory
                                   Vice President, Chief Financial Officer and
                                   Treasurer

Pursuant to the requirements of the Securities Exchange Act of 1934, this report
has been signed below as of April 15, 1998 by the following persons on behalf
of the registrant and in the capacities indicated.


/s/James R. Fiebiger       President, Chief Executive Officer and Director
------------------------   (Principal Executive Officer)
James R. Fiebiger   

/s/Stephen A. Flory        Vice President, Chief Financial Officer and Treasurer
------------------------   (Principal Financial and Accounting Officer)
Stephen A. Flory    


/s/ Horst G. Sandfort      Director
------------------------
Horst G. Sandfort          

/s/ David J. Dunn          Director
------------------------
David J. Dunn              

/s/ Jonathan S. Huberman   Director
------------------------
Jonathan S. Huberman          

<PAGE>


                           INDEPENDENT AUDITOR'S REPORT


To the Board of Directors and Stockholders of GateField Corporation:


We have audited the consolidated financial statements of GateField 
Corporation (formerly Zycad Corporation) at December 31, 1997 and 1996, and 
for each of the three years in the period ended December 31, 1997, and have 
issued our report thereon dated April 8, 1998.  Our audits also included the 
consolidated financial statement schedule of GateField Corporation, listed at 
Item 14(a)(2).  This consolidated financial statement schedule is the 
responsibility of the Company's management.  Our responsibility is to express 
an opinion based on our audits.  In our opinion, such consolidated financial 
statement schedule, when considered in relation to the basic consolidated 
financial statements taken as a whole, presents fairly in all material 
respects the information set forth therein.


DELOITTE & TOUCHE LLP

San Jose, California
April 8, 1998

<PAGE>

                  SCHEDULE II - VALUATION AND QUALIFYING ACCOUNTS
                                          
                for the years ended December 31, 1997, 1996 and 1995
                                          
                               (amounts in thousands)
                                          
                                          
                                          
                       GATEFIELD CORPORATION AND SUBSIDIARIES
                            (Formerly Zycad Corporation)

<TABLE>
<CAPTION>
                                   Balance at           Additions                              Balance at
                                    Beginning        charged to cost                               End of
Descriptions                        of Period          and expense           Deductions            Period
----------------------------------------------------------------------------------------------------------
<S>                               <C>                <C>                   <C>                 <C>
Deducted from assets:
Allowance for doubtful accounts
(accounts receivable):

Years ended December 31,

1997                              $     1,337          $      169          $      978(1)      $      528
                                  -----------          ----------          ----------          ----------
                                  -----------          ----------          ----------          ----------

1996                              $       296          $    1,386          $      345(1)       $    1.337
                                  -----------          ----------          ----------          ----------
                                  -----------          ----------          ----------          ----------

1995                              $       381          $      ---          $       85(1)       $      296
                                  -----------          ----------          ----------          ----------
                                  -----------          ----------          ----------          ----------
</TABLE>


(1)  Write-off of accounts and notes determined to be uncollectable.

<PAGE>
                                 INDEX TO EXHIBITS

<TABLE>
<CAPTION>
Exhibit
Number    Description
------    -----------
<S>       <C>
3.1       Certificate of Incorporation of the Company, as amended.

3.2       Bylaws of the Company, as amended.

3.3       Certificate of Designation of Series B Convertible Preferred Stock of
          the Company.

10.1**    1984 Stock Option Plan, as amended (incorporated by reference to
          Exhibit 4.5 to the Company's Registration Statement on Form S-8 (File
          No. 333-42363) filed on December 16, 1997).  

10.2**    1993 Stock Option Plan (incorporated by reference to Exhibit 4.1 to
          the Company's Registration Statement on Form S-8 (File No. 333-42363)
          filed on December 16, 1997).  

10.3**    1996 Stock Option Plan (incorporated by reference to Exhibit 4.2 to
          the Company's Registration Statement on Form S-8 (File No. 333-42363)
          filed on December 16, 1997).

10.4**    1995 Stock Option Directors Plan for Non-Employee Directors
          (incorporated by reference to Exhibit 4.3 to the Company's
          Registration Statement on Form S-8 (File No. 333-42363) filed on
          December 16, 1997).

10.5**    Employee Stock Purchase Plan (incorporated by reference to Exhibit 4.4
          to the Company's Registration Statement on Form S-8 (File No.
          333-42363) filed on December 16, 1997).

10.6**    Employment, Confidential Information and Invention and Assignment
          Agreement, between the Company and Douglas E. Klint, as amended on
          June 5, 1997.

10.7**    Employment, Confidential Information and Invention and Assignment
          Agreement, between the Company and Stephen A. Flory, as amended on
          June 5, 1997.

10.8**    Warrant Certificate for the purchase of 50,000 shares of Common Stock,
          dated July 28, 1997, issued to James R. Fiebiger.

10.9**    Warrant Certificate for the purchase of 7,500 shares of Common Stock,
          dated November 25, 1997, issued to Benjamin Huberman.

10.10     Common Stock Purchase Warrant, dated August 21, 1997, issued to
          Halifax Fund L.P. 

10.11     Common Stock Purchase Warrant, dated August 21, 1997, issued to
          Capital Ventures International.

10.12     Form of Registration Rights Agreement, dated February 13, 1997,
          between the Company and each of Halifax Fund L.P., Capital Ventures
          International, Heracles Fund, Joseph A. Umbach and Lewis A. Fraser
          (incorporated by reference to Exhibit 4.19 to the Company's Quarterly
          Report on Form 10-Q for the quarter ended March 31, 1997).

10.13     Stock Purchase Agreement, dated November 10, 1997, between the
          Company, Idanta Partners Ltd., Dunn Family Trust and Perscilla Faily
          Trust.

10.14     Registration Rights Agreement, dated November 10, 1997, between the
          Company, Idanta Partners Ltd., Dunn Family Trust and Perscilla Faily
          Trust.

10.15     Credit Loan and Security Agreement, entered into at January 6, 1997,
          between the Company and Coast Business Credit, a division of Southern
          Pacific Thrift and Loan Association (incorporated by reference to
          Exhibit 10.25 to the Company's Annual Report on Form 10-K for the year
          ended December 31, 1996).

10.16     Lease, dated March 6, 1992, between the Company and Renco Equities IV,
          relating to premises at 47100 Bayside Parkway, Fremont, California. 

10.17     Sub-Lease Agreement, dated October 27, 1997, between the Company and
          Mattson Technology, relating to premises at 47100 Bayside Parkway,
          Fremont, California.

<PAGE>

10.18     SICAN/GateField Technology Agreement, dated September 23, 1993,
          between SICAN G.m.b.H. and the Company (incorporated by reference to
          Exhibit 10.18 to the Company's Annual Report on Form 10-K for the year
          ended December 31, 1993).

10.19     License Agreement, dated October 22, 1997, between the Company and
          Siemens Aktiengesellschaft (incorporated by reference to Exhibit 10.29
          to the Company's Current Report on Form 8-K dated November 14, 1997).

10.20     Asset Purchase Agreement, dated April 14, 1997, between the Company
          and IKOS Systems, Inc., regarding the purchase of the Company's
          LightSpeed product family by IKOS Systems, Inc. (incorporated by
          reference to Exhibit 10.26 to the Company's Current Report on Form 8-K
          dated April 15, 1997).

10.21     Stock Purchase Agreement, dated April 14, 1997, between the Company
          and Edison Venture Fund III, L.P. for the purchase of 2,420,000 shares
          of QSS, Inc. (incorporated by reference to Exhibit 10.26 to the
          Company's Current Report on Form 8-K dated May 15, 1997).

10.22     Asset Purchase Agreement, dated August 18, 1997, between the Company
          and IKOS Systems, Inc., regarding the purchase of the Company's XP and
          PXP hardware fault simulation product business by IKOS Systems, Inc.
          (incorporated by reference to Exhibit 10.27 to the Company's Current
          Report on Form 8-K, dated September 5, 1997).

10.23     Asset Purchase Agreement, dated August 20, 1997, between the Company
          and Test Systems Strategies, Inc., regarding the purchase of the
          Company's TDX software fault simulation and test business
          (incorporated by reference to Exhibit 10.28 to the Company's Current
          Report on Form 8-K dated September 5, 1997).

10.24     Purchase Agreement, dated October 31, 1997, between the Company, Zycad
          Japan (GateField) KK and Zycad TSS Inc., regarding the purchase of the
          maintenance business.

10.25     Severance Agreement and General Release of All Claims, dated September
          30, 1997, between the Company and Phillips W. Smith.

13.1      Portions of the Annual Report to Stockholders for the year ended 
          December 31, 1997 (only those portions specifically incorporated by
          reference herein are filed herewith).

21.1      Subsidiaries of the Registrant.

23.1      Consent of Independent Auditors,  Deloitte & Touche LLP.

27.1      Financial Data Schedule (Fiscal year-ended December 31, 1997).

27.2      Financial Data Schedule (Fiscal year-ended December 31, 1996 and 
          1995).

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**        Management contract or compensation plan or arrangement required to be
          filed as an exhibit pursuant to Item 14(c) of Form 10-K.
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