# Patent

## Title
RF microwave circuit and pulse shaping method

## Abstract

A multi-port circuit and corresponding method for simultaneous shaping of sub-nanosecond pulses (MCS3P). The MCS3P includes a coupled-line coupler, a Schottky detector diode, and circuitry for compressing the rising and falling edges of a waveform. The MCS3P simultaneously produces square wave, Gaussian, and monocycle waveforms by differentiating a sinusoidal source. The method includes the steps of compressing the rising edge of a sinusoidal source waveform, differentiating the resulting waveform to form a square waveform and a Gaussian waveform, filtering out the positive going Gaussian to produce a negative going Gaussian, differentiating the Gaussian waveform to form a monocycle waveform, and compressing the falling edge of the square waveform to produce a square wave form with both edges compressed.

## Background
CROSS REFERENCE TO RELATED APPLICATION
This divisional application claims priority to pending U.S. Non-Provisional patent application Ser. No. 12/406,681, filed on Mar. 18, 2009 and U.S. Provisional Application No. 61/037,484 filed on Mar. 18, 2008, entitled “RF Microwave Circuit and Pulse Shaping Method”, the contents of which are herein incorporated by reference.


STATEMENT OF GOVERNMENT SUPPORT
This invention was made with Government support under Grant No. DGE-0221681 awarded by the National Science Foundation. The Government has certain rights in the invention.


FIELD OF INVENTION
This invention relates to ultra-wideband waveform pulse formation; more specifically, the simultaneous shaping of sub-nanosecond ultra-wideband waveform pulses.
BACKGROUND OF THE INVENTION
Ultra-Wideband (UWB) is a technology for transmitting information spread over a large bandwidth. UWB microwave systems are finding application in the form of impulse radio, as well as respiratory, cardiovascular and other sensing/monitoring applications. The Federal Communication Commission (FCC) defines UWB as an intentional radiator with an instantaneous 10 dB-fractional and total bandwidth of at least 0.2 and 500 MHz, respectively. This bandwidth is achieved primarily by radiating ultra short pulses that are derived from a basic Gaussian pulse shape. The FCC requires a magnitude response that varies between 0 dBm and −23 dBm within a 0.5 GHz to 3.5 GHz band. To maximize the energy within this band, pulse shaping is required. This shaping is achieved by differentiating or shaping the Gaussian pulse.
Solid-state UWB pulse shaping has been achieved using Gallium Arsenide (GaAs) Metal-Semiconductor Field-Effect Transistors (MESFETs), non-linear transmission lines, short-circuit stubs, and resistive-reactive circuits. In these applications, the waveform response to circuit reactance is fundamental to pulse formation. As such, the reactive elements form a simple resistor-capacitor (RC) or resistor-inductor (RL) network. In an RC network, waveform differentiation occurs in a process of charging and discharging the circuit capacitance. The capacitor builds up charge in accordance with the RC time constant (τrc where τrc=RC), which defines the time required for a signal to rise to 63.2% of its full value. When used in conjunction with a 50Ω load, the RC time constant requires less than a 20 pF capacitance (C) for shaping sub-nanosecond pulses.
Accordingly, what is needed in the art is a system and method for improved simultaneous shaping of sub-nanosecond UWB waveform pulses.
SUMMARY OF THE INVENTION
The present invention provides a novel technique for the simultaneous shaping of sub-nanosecond ultra-wideband (UWB) waveform pulses.
A multi-port UWB pulse shaping circuit is provided. In an embodiment of the present invention, the pulse shaping circuit comprises an input port to receive a periodic input pulse, a first transmission line coupled to the input port to form and transmit a square wave pulse with sub-nanosecond edge rates from the periodic input pulse, a second and third transmission line positioned in a parallel coupled-line structure to the first transmission line to differentiate the square wave pulse to form bipolar Gaussian pulses, and a first output port to output the square wave pulse. The pulse shaping circuit further comprises a clamping and filter circuit coupled to the second transmission line to clamp the positive amplitude portion of the bipolar Gaussian pulse and pass the negative amplitude portion of the bipolar Gaussian pulse, a second output port for outputting the negative amplitude Gaussian pulse, a Schottky detector differentiator coupled to the third transmission line to differentiate the Gaussian pulse to form a monocycle pulse, and a third output port to output the monocycle pulse. The input pulse may be a sinusoidal pulse.
In an additional embodiment, the pulse shaping circuit further comprises two step-recovery diodes, one coupled to the input port and the first transmission line to compress the rising edge of the input pulse and another coupled to the first transmission line and the first output port to compress the falling edge of the square pulse.
In an embodiment of the present invention, the pulse shaping circuit comprises circuitry for compressing the rising edge of an input pulse, a coupled-line differentiator coupled to the rising edge compressing circuitry to differentiate the input pulse to form a square wave pulse and a Gaussian pulse, circuitry for compressing the falling edge of the square wave pulse coupled to the coupled-line differentiator, and a Schottky detector differentiator coupled to the coupled-line differentiator to differentiate the Gaussian wave pulse to form a monocycle pulse. The input pulse may be a sinusoidal pulse.
In another embodiment, the pulse shaping circuit further comprises a clamping and filter circuit coupled to the coupled line differentiator to filter out the positive portion of the Gaussian wave pulse.
A method for simultaneously shaping sub-nanosecond pulses is provided. In an embodiment of the present invention, the method comprises receiving an input pulse, differentiating the input pulse to form a square wave pulse and a Gaussian pulse, and then differentiating the Gaussian pulse to form a monocycle pulse. The input pulse may be a sinusoidal pulse.
In an additional embodiment, the method further comprises compressing the rising and falling edges of the pulse.
In another embodiment, the method further comprises filtering out the positive amplitude portion of the Gaussian pulse.
In a further embodiment, the method further comprises outputting the square wave pulse, the negative amplitude portion of the Gaussian pulse, and the monocycle pulse.



BRIEF DESCRIPTION OF THE DRAWINGS
For a fuller understanding of the invention, reference should be made to the following detailed description, taken in connection with the accompanying drawings, in which:
FIG. 1 is a simplified block diagram of the Multi-Port Circuit for Simultaneous Shaping of Sub-Nanosecond Pulses (MCS3P) in accordance with an embodiment of the present invention.
FIG. 2A is a schematic of a single section microstrip coupled-line coupler in accordance with an embodiment of the present invention.
FIG. 2B is a lumped element equivalent circuit of a lossy transmission line coupler in accordance with an embodiment of the present invention.
FIG. 3A is an Advanced Design System (ADS) schematic block of a single section microstrip coupled-line coupler in accordance with an embodiment of the present invention.
FIG. 3B is a graph of the variable rise time input at Vin of the coupled-line coupler of FIG. 3A.
FIG. 3C is a graph of the output waveform at Vout of the coupled-line coupler of FIG. 3A.
FIG. 4A is a schematic of a Schottky detector diode differentiator in accordance with an embodiment of the present invention.
FIG. 4B is a lumped element equivalent circuit of a Schottky detector diode differentiator in accordance with an embodiment of the present invention.
FIG. 5A is an Advanced Design System (ADS) schematic block of a Schottky detector diode differentiator in accordance with an embodiment of the present invention.
FIG. 5B is graph of the Vx square wave response of the Schottky detector diode differentiator of FIG. 5A.
FIG. 5C is a graph of the Vout output waveform of the Schottky detector diode differentiator of FIG. 5B.
FIG. 6 is a schematic block of the designed MCS3P in accordance with an embodiment of the present invention.
FIG. 7A is a graph of the time-domain response of the square wave at output port 1 of the MCS3P.
FIG. 7B is a graph of the frequency-domain response of the square wave at output port 1 of the MCS3P.
FIG. 7C is a graph of the time-domain response of the step response associated with the square wave at output port 1 of the MCS3P.
FIG. 7D is a graph of the frequency-domain response of the step response associated with the square wave at output port 1 of the MCS3P.
FIG. 7E is a graph of the time-domain response of the Gaussian wave at output port 2 of the MCS3P.
FIG. 7F is a graph of the frequency-domain response of the Gaussian wave at output port 2 of the MCS3P.
FIG. 7G is a graph of the time-domain response of the monocycle wave at output port 3 of the MCS3P.
FIG. 7H is a graph of the frequency-domain response of the monocycle wave at output port 3 of the MCS3P.
FIG. 8 is a component layout for the multi-port circuit for simultaneous shaping of sun-nanosecond pulses (MCS3P) with SMA connectors attached in accordance with an embodiment of the present invention.
FIG. 9A is a graph showing the measured and simulated waveform response for the edge compression sub-circuit.
FIG. 9B is a graph showing the measure and simulated waveform response for the coupled-line coupler differentiator sub-circuit.
FIG. 9C is a graph showing the measure and simulated waveform response for the Schottky detector differentiator sub-circuit.
FIG. 10 is a flowchart of the method of simultaneously shaping sub-nanosecond pulses.



DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings, which form a part hereof, and within which are shown by way of illustration specific embodiments by which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the invention.
Ultra-wideband (UWB) waveform pulse shaping circuits have been implemented with Gallium Arsenide (GaAs) Metal-Semiconductor Field-Effect Transistors (MESFETs), non-linear transmission lines, short-circuit stubs, and resistive-reactive circuits. In an embodiment of the present invention, a coupled-line coupler and Schottky detector diode are utilized for UWB signal differentiation because their mutual and junction capacitances are small enough to accommodate shaping of sub-nanosecond pulses within a resistor-capacitor (RC) configuration. Through an application of Kirchhoff's current law, the mutual and junction capacitances in the coupler and diode, respectively, are shown to form an RC differentiator that promotes sub-nanosecond pulse shaping. These differentiators were implemented in a circuit which simultaneously produces square wave, Gaussian, and monocycle waveforms by using step recovery diodes to compress the edges of a 14 MHz sinusoidal source. The resulting pulse generator is called a multi-port circuit for simultaneous shaping of sub-nanosecond pulses (MCS3P). A general diagram of the MCS3P is shown in FIG. 1 and will be described in greater detail below. Also disclosed herein is a method of shaping sub-nanosecond pulses simultaneously. First, separate descriptions of each of the coupled-line coupler differentiator and the Schottky detector differentiator and their use and application for UWB signal differentiation are disclosed.
UWB Coupled-Line Coupler Differentiator
The basis for UWB coupled-line differentiation originates from a combination of theories for analyzing crosstalk in multi-conductor transmission lines and transients in resistor-capacitor (RC) networks. Typically, crosstalk is treated as unwanted distortion or switching noise that result from lossy multi-conductor transmission lines. It is often discouraged in time-domain applications by increasing the distance between conductors, adding capacitance (decoupling capacitance) at the end of transmission lines, and limiting the number and length of parallel traces. However, controlled-transients are desirable in UWB coupled-line differentiation.
A microstrip parallel coupled-line (or edge coupled) structure may be applied as a UWB differentiator by using the mutual capacitance that exists between the two conductors in an RC network. A schematic of a single section microstrip coupled-line coupler is shown in FIG. 2A. The amount of capacitance is a function of the distance between the conductors, which can be adjusted to be small enough to support sub-nanosecond transients. Application of Kirchhoff's current law (KCL) to a lumped element equivalent circuit of a coupled-line coupler, as shown in FIG. 2B, yields




  
    
      
        
          
            V
            out
          
          
            R
            
              L
              ⁢
              
                
              
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              2
            
          
        
        =
        
          
            
              [
              
                
                  C
                  M
                
                -
                
                  
                    C
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                      K
                      -
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              ]
            
            ⁢
            
              
                d
                
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                (
                
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                  -
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                )
              
            
            
              
                R
                
                  S
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              
                }
                
                  Not
                  ⁢
                  
                    
                  
                  ⁢
                  differentiated
                
              
            
          
        
      
    
    
      
        (
        1
        )
      
    
  




A detailed proof of Equation (1) is provided below. Equation (1) demonstrates that the output voltage Vout is formed by differentiating the voltage at the input of the coupled-line coupler. In addition, this equation shows a second term that is not differentiated, which conditionally dominates the expression. This condition is illuminated in the consideration that parasitic capacitance in the line is very small, the term CM−C2·(K−1) of Equation (1) is less than the (K−1)/RS2 term. As a result, the derivative term only dominates under the condition that the rate of change in the input signal follows the relationship:




  
    
      
        
          
            d
            
              V
              in
            
          
          
            d
            t
          
        
        >>
        
          V
          in
        
      
    
    
      
        (
        2
        )
      
    
  




This relation is true for signals with a very sharp rise time, which is one of the characteristics of a UWB signal. Thus, the coupled-line coupler may act as a UWB differentiator.
The above conditional derivative was verified by capturing a coupled-line circuit in Agilent Advanced Design System (ADS) 2004A and performing a transient/convolution simulation. The ADS schematic block of the single section microstrip coupled-line coupler is shown in FIG. 3A. Input port 301 to this line was excited with a square wave with a variable rise time, as shown in the graph of FIG. 3B. Coupled-line coupler 302 responded to this stimulus by producing positive and negative amplitude Gaussian pulses from the falling and rising edges of the square wave. The positive amplitude Gaussian was filtered using Schottky detector diode 303 and the negative pulse was measured across load 304 at the circuit output.
After simulating over a 140-144 nsec time period, the circuit output showed waveform differentiation for fast rise square waves. As the rise time of the input signal increased, the circuit response became less like a derivative and more like a square wave, as shown in FIG. 3C. Therefore, the simulation provided confirmation of the differentiated waveform in Equation (2) for fast rise signals as well as the dominance of the non-differentiated part of the equation as rise time increased. Moreover, coupled-line coupler differentiation is rooted in the construction of an RC network using the junction and parasitic capacitances in the coupled-line structure.
UWB Schottky Detector Differentiator
Because capacitance contributes to waveform differentiation in coupled-line structures, a Schottky detector diode was also considered for differentiation. A Schottky diode is advantageous for its low forward voltage (typically 0.3 volts) and very fast switching action. These diodes are used in switch-mode power converters, discharge protection circuits, and other applications requiring fast picosecond switching. Moreover, Schottky diodes are used in the development of UWB circuits. The fast switching time in the Schottky diode is made possible by the metal-semiconductor junction that comprises its physical structure, which promotes fast injection of majority carriers into the conduction band. Schottky diodes are the fundamental component of detector circuits, which recover baseband information from a modulated wave. As a result, the diode is applied in this work as a Schottky detector differentiator as well as an envelope detector for smoothing high frequency oscillations in the UWB waveforms.
A Schottky detector differentiator is based on configuring an RC network from the capacitance that exists at the diode junction. In classical device physics, a steady state diode is viewed as a short or open circuit, as a function of whether it is in forward or reverse bias. In reality, a junction capacitance (depletion capacitance) is formed as the voltage across the semiconductor junction changes to the reverse direction; a forward-biased Schottky diode behaves essentially as a small series resistance.
The depletion capacitance (Cj) relates to charge storage in the diode and is expressed as




  
    
      
        
          
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              m
            
          
        
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        (
        3
        )
      
    
  




where Cj0, the zero biased junction capacitance is equal to





  
    
      
        (
        
          
            
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          2
        
        )
      
      ⁢
      
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where VR is the reverse voltage, V0 is the depletion-layer voltage, m is the grading coefficient, εS is the material's electrical permittivity, q is the stored charge, A is the area, and ND is the doping concentration in the semiconductor (n-side) of the junction.

In the circuit of FIG. 4A, two diodes were used, first diode (D1) for RC differentiation and second diode (D2) for filtering.
The differentiator is compatible with UWB waveforms because the capacitance that exists at the diode junction is very small when placed in an RC configuration. A lumped element equivalent circuit of a series diode, as shown in FIG. 4B, demonstrates that differentiation occurs as the input (Vin) energizes the Schottky diode (D1 and D2) and appears across the (RL1) load. Application of KCL to this equivalent circuit provides a means to relate the output (Vout) to this input (Vin). An analysis of the output in loop 1 (i1) gives rise to the following relationship:




  
    
      
        
          
            V
            out
          
          =
          
            
              
                R
                
                  L
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
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                }
              
              
                Second
                ⁢
                
                  
                
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                Differential
              
            
          
        
        ,
      
    
    
      
        (
        5
        )
      
    
  




where CD1 is the junction capacitance for diode D1, CD2 is the junction capacitance for diode D2, VCD2 is the voltage across diode D2, and RT2 is the load at the diode output. In Equation (5) a second order differential is observed. However, this term may be eliminated by requiring RT2<<RL1, which can be accomplished by grounding the D2 diode.

The derivative in Equation (5) was verified in simulation by capturing a Schottky detector differentiator circuit using Agilent ADS 2004A. The ADS schematic block of Schottky detector diode differentiator 503 is shown in FIG. 5A. In this circuit, a HSMS-286x series Schottky detector diode was used. This diode has a typical capacitance of 0.25 pF, voltage sensitivity of 35 mV/W at 2.45 GHz, and 915 MHz to 5.8 GHz operational range. The circuit in FIG. 5A applies forward and reverse step recovery diodes 506, 507 to transform a 14 MHz sinusoidal waveform input at input port 508 to a square wave by compressing its rising and falling edges, as shown in the graph of FIG. 5B.
20 dB attenuator 501 is used in this circuit to isolate source (VS) 502 from the waveforms generated by Schottky detector differentiator 503. When Schottky diode D2 504 is not installed, a second derivative appears in the output (Vout) 505, as shown in the graph shown in FIG. 5C and as indicated by Equation (5). A Gaussian waveform results when this diode is installed. These results demonstrate the capacity for a Schottky diode to differentiate a time-domain waveform.
Multi-Port Circuit for Simultaneous Shaping of Sub-Nanosecond Pulses (MCS3P)
As shown in the simplified block diagram of FIG. 1, the coupled-line coupler and Schottky detector diode differentiators were combined to implement a multi-port circuit for simultaneous shaping of sub-nanosecond pulses (MCS3P). This circuit produces different UWB waveforms that are aligned to the same reference. The MCS3P comprises input port 101, circuitry to compress the rising edge of a waveform 102, coupled line differentiator 103, circuitry to compress the falling edge of a waveform 104, first output port 105, clamping and filter circuit 106, second output port 107, Schottky detector differentiator 108, and third output port 109. A sinusoidal waveform is taken as input at input port 101, and the rising edge of the input waveform are compressed using circuitry to compress the rising edge of a waveform 102, such as a step recovery diode. Then the waveform with rising edge compressed is differentiated by coupled line differentiator 103 to form a square waveform and a Gaussian waveform. The falling edge of the square waveform is compressed by circuitry to compress the falling edge of a waveform 104, such as a step-recovery diode, resulting in a square waveform, which is output at first output port 105. Clamping and filter circuit 106 receives the Gaussian waveform and then clamps the positive going Gaussian and passes the negative going Gaussian waveform. The negative going Gaussian waveform is then output at second output port 107. Alternatively, clamping and filter circuit 106 clamps the negative going Gaussian and passes the positive going Gaussian, which is then output at second output port 107. Schottky detector differentiator 108 also receives the Gaussian waveform. It differentiates the Gaussian waveform to form a monocycle waveform, which is output at third output port 109.
A detailed schematic block diagram of an exemplary embodiment of the MCS3P is shown in FIG. 6. In this circuit, forward and reverse biased step recovery diode 601, 602, such as Metelics SMMD-0841, modifies the rising (601) and falling (602) edges of a 14 MHz, 10 Vpp sinusoidal input, which is input at input port 603. Three-line directional coupled-line coupler 604 differentiates the square wave and provides a means to isolate Schottky detector differentiator 605 (in lieu of a 20 dB attenuator). A microstrip, asymmetric three-line coupled-line coupler (model MACLIN3) was used in simulation. The differentiated square wave with rising and falling edges compressed is output at first output port 609.
On one side of coupler 604, the positive going Gaussian was clamped and the negative going Gaussian supplied to second output port 606 through Schottky detector diode 607. A HSMS-2862 Schottky detector diode was used for simulation.
Schottky detector differentiator circuit 605 was placed on the adjacent side of coupler 604, from which a monocycle was formed from the Gaussian input. The monocycle was then output at third output port 608.
The MCS3P circuit was simulated in ADS 2004A, using a transient/convolution simulator. The waveforms supplied to and generated by the MCS3P are shown in FIG. 7. FIGS. 7A and 7B show the square waveform at first output port 609. FIGS. 7C and 7D show the step response associated with the square-wave. FIGS. 7E and 7F show the Gaussian at second output port 606, and FIGS. 7G and 7H show the monocycle at third output port 608. The multi-port circuit generated a square-wave with a 20-80% rise time of 720 psec, from which a Gaussian with a full-width pulse duration of 290 psec and monocycle with a duration of 590 psec were produced. A Fourier transform of the step response associated with the square wave has a 529.4 MHz bandwidth that meets the FCC UWB specification results (see FIG. 7D). However, the same edge rate applied to a square wave response does not meet the FCC specification due to the nulls that are introduced at harmonics of the cycle frequency (see FIG. 7B). This suggests that a fast rise time step-function may be UWB but not its square wave response. However, the square wave response was used to produce Gaussian and monocycle pulses with a 3.97 GHz and 3.15 GHz bandwidths, respectively. The signals at second output port 606 and third output port 608 were terminated with 3 dB attenuators 610, 611 to control line reflections and first output port 609 was terminated with 20 dB attenuator 612 to meet the signal level requirement for measurement.
Following simulation, the MCS3P was fabricated on a Rogers Corporation RO4003 substrate (εr=3.38, tan d=0.022, and thickness h=0.51 mm). FIG. 8 shows the layout of the implemented MCS3P, which has Schottky detector differentiator 801 and coupled-line coupler differentiator 802 as discussed previously. The circuit has a dimension of 41.9 mm×31.8 mm. Dimensions for the transmission lines are given in the schematic of FIG. 6. The printed circuit board (PCB) was populated with surface mount components, including 0805 chip capacitors and resistors. Johnson SMA edge mount connectors (142-0761-871) were used to interface with the PCB.
A 20 GHz digitizing oscilloscope (HP 54750A)—configured for 128-bit averaging—was used to measure the response of the MCS3P. As predicted in simulation, waveforms measured at first output port 803, second output port 804, and third output port 805 followed the expected morphology of a square wave, Gaussian, and monocycle shape, respectively. The 20-80% rise time measured for the square wave was 850 psec where as the simulated rise time was 720 psec. A good fit was achieved for the amplitude and morphology of simulated and measured square wave, as shown in FIG. 9A. The Gaussian waveform measured at third output port 805 demonstrated a pulse-duration that was 100 psec greater than simulated, as shown in FIG. 9B. Finally, the monocycle pulse measured at second output port 804, as shown in FIG. 9C, showed less agreement between simulated and measured data. Because the monocycle was constructed by differentiating the response of a coupled-line derivative, differences in the simulated and measured Gaussian were compounded as the square wave was subjected to the coupled-line followed by Schottky detector differentiation. Nonetheless, a monocycle pulse was distinguishable in the morphology of the measurement. As such, practical implementation of a coupled-line coupler differentiator and Schottky detector differentiator is possible. These differentiators provide alternative approaches to UWB pulse differentiation and support the possibility of using other microwave structures for achieving passive RC networks.
Proof of Coupled-Line Coupler Differentiator Equation—Equation (1)
Application KCL and KVL to a lumped element equivalent circuit of a coupled-line coupler, demonstrates its potential as a differentiator (see FIG. 2). This potential is seen by relating the output voltage (Vout) to the input voltage (Vin). This relationship can be determined by applying KCL to the output in loop 3 (i3), which produces the following relationship:

V0=i3RL2,  (6)

where RL2 is the resistive load over which the output is measured. The above equation can be expanded by relating i3 to i2 of loop 2 in an evaluation of the current through the C2 capacitor. This relationship is represented by the following equation:





  
    
      
        
          
            i
            3
          
          =
          
            
              
                i
                2
              
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                  C
                  ⁢
                  
                    
                  
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            =
            
              
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        ,
      
    
    
      
        (
        7
        )
      
    
  




where iC2 is the current through capacitor C2 and VC2 is the voltage across that capacitor. Similarly, i2 relates to i1 of loop 1 by evaluating the current through resistor RS2 and capacitor CM, which yields the following relations:





  
    
      
        
          i
          2
        
        =
        
          
            
              i
              1
            
            -
            
              i
              
                R
                
                  S
                  ⁢
                  
                    
                  
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          =
          
            
              i
              1
            
            -
            
              
                
                  V
                  X
                
                
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              and
            
          
        
      
    
    
      
        (
        8
        )
      
    
  
  
    
      
        
          
            i
            1
          
          =
          
            
              C
              M
            
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                    M
                  
                
              
              
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                t
              
            
          
        
        ,
      
    
    
      
        (
        9
        )
      
    
  




where iRS2, VCM, and VX are the current through the resistor RS2, voltage across the capacitor CM, and nodal voltage, respectively. Application of Equations (7) through (9) to Equation (6) gives rise to a relationship for the output voltage that includes the coupling capacitance, which takes the following form:





  
    
      
        
          
            V
            out
          
          
            R
            
              L
              ⁢
              
                
              
              ⁢
              2
            
          
        
        =
        
          
            
              C
              M
            
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        (
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The nodal voltage Vx and capacitor voltage VC2 may be related to the input voltage by recognizing that VC2 and VX=Vin−VCM, so that Equation (10) may be represented in terms of the input voltage, as shown by the following expression:




  
    
      
        
          
            V
            out
          
          
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              L
              ⁢
              
                
              
              ⁢
              2
            
          
        
        =
        
          
            
              C
              M
            
            ⁢
            
              
                d
                
                  V
                  
                    C
                    M
                  
                
              
              
                d
                t
              
            
          
          -
          
            
              
                V
                in
              
              -
              
                V
                
                  C
                  M
                
              
            
            
              R
              S2
            
          
          -
          
            
              C
              2
            
            ⁢
            
              
                
                  d
                  
                    (
                    
                      
                        V
                        in
                      
                      -
                      
                        V
                        
                          C
                          M
                        
                      
                    
                    )
                  
                
                
                  d
                  t
                
              
              .
            
          
        
      
    
    
      
        (
        11
        )
      
    
  




If proportionality is assumed for the input and coupled voltages so that VCM=KVin where K is a constant, then the output may be related primarily in terms of the voltage across the mutual capacitance. As a result, Equation (6) takes on the form:




  
    
      
        
          
            V
            out
          
          
            R
            
              L
              ⁢
              
                
              
              ⁢
              2
            
          
        
        =
        
          
            
              [
              
                
                  C
                  M
                
                -
                
                  
                    C
                    2
                  
                  ⁡
                  
                    (
                    
                      K
                      -
                      1
                    
                    )
                  
                
              
              ]
            
            ⁢
            
              
                d
                
                  V
                  in
                
              
              
                d
                t
              
            
          
          -
          
            
              
                
                  
                    V
                    in
                  
                  ⁡
                  
                    (
                    
                      K
                      -
                      1
                    
                    )
                  
                
                
                  R
                  
                    S
                    ⁢
                    
                      
                    
                    ⁢
                    2
                  
                
              
              
                }
                
                  Non
                  ⁢
                  
                    -
                  
                  ⁢
                  Differentiated
                
              
            
            .
          
        
      
    
    
      
        (
        12
        )
      
    
  




Proof of Schottky Detector Differentiator Equation—Equation (5)

Application of KCL to the equivalent circuit in FIG. 4B provides a means to relate the output (Vout) to this input (Vin). An analysis of the output in loop 1 (i1) gives rise to the following relationship:




  
    
      
        
          
            V
            out
          
          =
          
            
              
                i
                1
              
              ·
              
                R
                
                  L
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
            
            =
            
              
                R
                
                  L
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
              ⁢
              
                C
                
                  D
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
              ⁢
              
                
                  d
                  
                    V
                    
                      C
                      
                        D
                        ⁢
                        
                          
                        
                        ⁢
                        1
                      
                    
                  
                
                
                  d
                  t
                
              
            
          
        
        ,
      
    
    
      
        (
        13
        )
      
    
  




where RL1 is the load, CM is the junction capacitance for diode D1, and VCD1 is the voltage across that diode. This relationship may be expressed in terms of the input by considering that VCD1=Vin−Vout which produces the following expression when substituted into Equation (13) above:





  
    
      
        
          V
          out
        
        =
        
          
            
              R
              
                L
                ⁢
                
                  
                
                ⁢
                1
              
            
            ⁢
            
              C
              
                D
                ⁢
                
                  
                
                ⁢
                1
              
            
            ⁢
            
              
                d
                
                  V
                  in
                
              
              
                d
                t
              
            
          
          -
          
            
              
                
                  R
                  
                    L
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
                ⁢
                
                  C
                  
                    D
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
                ⁢
                
                  
                    d
                    
                      V
                      out
                    
                  
                  
                    d
                    t
                  
                
              
              
                }
                
                  First
                  ⁢
                  
                    
                  
                  ⁢
                  Order
                  ⁢
                  
                    
                  
                  ⁢
                  Differential
                
              
            
            .
          
        
      
    
    
      
        (
        14
        )
      
    
  




As a result, a first order differential in Equation (14) distorts the waveform. The effects of this term may be minimized by adding a path through Schottky diode D2, as shown in FIG. 4A. This path provides a means to describe the input voltage using the following equation:




  
    
      
        
          
            V
            in
          
          =
          
            
              
                V
                
                  C
                  
                    D
                    ⁢
                    
                      
                    
                    ⁢
                    2
                  
                
              
              +
              
                
                  (
                  
                    
                      i
                      2
                    
                    -
                    
                      i
                      1
                    
                  
                  )
                
                ⁢
                
                  R
                  
                    T
                    ⁢
                    
                      
                    
                    ⁢
                    2
                  
                
              
            
            =
            
              
                R
                
                  T
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              ⁢
              
                C
                
                  D
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              ⁢
              
                
                  d
                  
                    V
                    
                      C
                      
                        D
                        ⁢
                        
                          
                        
                        ⁢
                        2
                      
                    
                  
                
                
                  d
                  t
                
              
            
          
        
        ,
      
    
    
      
        (
        15
        )
      
    
  




where i2 is the loop 2 current, VCD2 is the voltage across diode D2 and CD2 is the junction capacitance. This input may be expressed in terms of the output, as shown by:





  
    
      
        
          V
          out
        
        =
        
          
            
              V
              in
            
            -
            
              V
              
                C
                
                  D
                  ⁢
                  
                    
                  
                  ⁢
                  1
                
              
            
          
          =
          
            
              V
              
                C
                
                  D
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
            
            +
            
              
                R
                
                  T
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              ⁢
              
                C
                
                  D
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              ⁢
              
                
                  d
                  
                    V
                    
                      C
                      
                        D
                        ⁢
                        
                          
                        
                        ⁢
                        2
                      
                    
                  
                
                
                  d
                  t
                
              
            
            -
            
              
                V
                
                  C
                  
                    D
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
              
              .
            
          
        
      
    
    
      
        (
        16
        )
      
    
  




If (16) is differentiated, the following expression results:




  
    
      
        
          
            
              V
              out
            
            
              d
              t
            
          
          =
          
            
              
                d
                
                  V
                  
                    C
                    
                      D
                      ⁢
                      
                        
                      
                      ⁢
                      2
                    
                  
                
              
              
                d
                t
              
            
            +
            
              
                R
                
                  T
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              ⁢
              
                C
                
                  D
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              ⁢
              
                
                  
                    d
                    2
                  
                  ⁢
                  
                    V
                    
                      C
                      
                        D
                        ⁢
                        
                          
                        
                        ⁢
                        2
                      
                    
                  
                
                
                  d
                  
                    t
                    2
                  
                
              
            
            -
            
              
                d
                
                  V
                  
                    C
                    
                      D
                      ⁢
                      
                        
                      
                      ⁢
                      1
                    
                  
                
              
              
                d
                t
              
            
          
        
        ,
      
    
    
      
        (
        17
        )
      
    
  




which may be reduced by considering that CD1=CD2 and VCD1=VCD2, which yields:





  
    
      
        
          
            d
            
              V
              out
            
          
          
            d
            t
          
        
        =
        
          
            R
            
              T
              ⁢
              
                
              
              ⁢
              2
            
          
          ⁢
          
            C
            
              D
              ⁢
              
                
              
              ⁢
              2
            
          
          ⁢
          
            
              
                
                  d
                  2
                
                ⁢
                
                  V
                  
                    C
                    
                      D
                      ⁢
                      
                        
                      
                      ⁢
                      2
                    
                  
                
              
              
                d
                
                  t
                  2
                
              
            
            .
          
        
      
    
    
      
        (
        18
        )
      
    
  




If the expression in Equation (18) is substituted for on the right side of Equation (14) and the expression Cx=CD1 and CD2 is considered, the final output takes the form:




  
    
      
        
          V
          out
        
        =
        
          
            
              R
              
                L
                ⁢
                
                  
                
                ⁢
                2
              
            
            ⁢
            
              C
              X
            
            ⁢
            
              
                d
                
                  V
                  in
                
              
              
                d
                t
              
            
          
          -
          
            
              
                
                  R
                  
                    L
                    ⁢
                    
                      
                    
                    ⁢
                    1
                  
                
                ⁢
                
                  C
                  X
                  2
                
                ⁢
                
                  R
                  
                    T
                    ⁢
                    
                      
                    
                    ⁢
                    2
                  
                
                ⁢
                
                  
                    
                      d
                      2
                    
                    ⁢
                    
                      V
                      
                        C
                        
                          D
                          ⁢
                          
                            
                          
                          ⁢
                          2
                        
                      
                    
                  
                  
                    d
                    
                      t
                      2
                    
                  
                
              
              
                }
                
                  Second
                  ⁢
                  
                    
                      
                    
                    ⁢
                    
                      
                    
                  
                  ⁢
                  Order
                  ⁢
                  
                    
                      
                    
                    ⁢
                    
                      
                    
                  
                  ⁢
                  Differential
                
              
            
            .
          
        
      
    
    
      
        (
        19
        )
      
    
  




In Equation (19) the second order differential is also notable. However, a solution to a first order derivative can be seen more clearly. The second order term may be eliminated by requiring that RT2<<RL1, which can be accomplished by grounding the diode, so that




  
    
      
        
          V
          out
        
        =
        
          
            R
            
              L
              ⁢
              
                
              
              ⁢
              2
            
          
          ⁢
          
            C
            X
          
          ⁢
          
            
              
                d
                
                  V
                  in
                
              
              
                d
                t
              
            
            .
          
        
      
    
    
      
        (
        20
        )
      
    
  




UWB waveform differentiation was made possible by mitigating the effects of parasitics in the transmission line. Application of KCL to the equivalent circuit reveals the presence of a derivative as well as other parasitics that contribute to the waveform morphology. For coupled-line coupler differentiators the effect of parasitics in the transmission line is minimized by ensuring that the rate of change in the input signal is very large. The Schottky detector diode differentiator requires introduction of another shunt diode to attenuate the second order derivative, which would otherwise dominate the circuit response. These structures offer alternatives to UWB pulse shaping, which may solve problems with signal isolation and circuit complexity at the expense of a smaller signal levels.
Method of Simultaneously Shaping UWB Pulses
A flowchart of the method of simultaneously shaping UWB pulses is provided in FIG. 10. In operation 901, an input pulse is received. The input pulse is preferably a sinusoidal pulse. Then, in operation 902, the rising edge of the input pulse is compressed and, in operation 903, the input pulse is differentiated to form a square wave pulse and a Gaussian pulse. The falling edge of the square wave pulse is compressed, in operation 904, and then the square wave is outputted, in operation 905. The Gaussian pulse, created in operation 903, is then used to create a monocycle pulse and a negative amplitude Gaussian pulse. The Gaussian pulse is differentiated, in operation 906, to form a monocycle pulse, which is then outputted, in operation 907. The Gaussian pulse is also filtered to remove the positive amplitude portion of the Gaussian pulse to form a negative amplitude Gaussian pulse, in operation 908, which is then outputted, in operation 909.
It will be seen that the advantages set forth above, and those made apparent from the foregoing description, are efficiently attained and since certain changes may be made in the above construction without departing from the scope of the invention, it is intended that all matters contained in the foregoing description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.
It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall there between.

## Claims

1. A multi-port pulse shaping circuit, comprising:
an input port adapted to receive an input periodic waveform pulse;
a first transmission line connected to the input port to form and transmit a square wave pulse from the input pulse;
a second transmission line and a third transmission line positioned in a parallel coupled-line structure to the first transmission line to differentiate the square wave pulse to form bipolar Gaussian pulses;
a first output port connected to the first transmission line to output the square wave pulse;
a clamping and filter circuit coupled to the second transmission line to clamp a positive amplitude bipolar Gaussian pulse and pass a negative amplitude bipolar Gaussian pulse;
a second output port connected to the clamping and filter circuit to selectively output the negative amplitude bipolar Gaussian pulse;
a Schottky detector differentiator connected to the third transmission line to differentiate the Gaussian pulse to form a monocycle pulse; and
a third output port connected to the Schottky detector differentiator to output the monocycle pulse.

2. The multi-port pulse shaping circuit of claim 1, further comprising:
a circuitry connected to the input port and the first transmission line to compress a rising edge of an input pulse; and
a circuitry connected to the first transmission line and the first output port to compress the falling edge of the square wave pulse.

3. The multi-port pulse shaping circuit of claim 1, wherein the circuitry to compress the rising edge of an input pulse is a step-recovery diode.

4. The multi-port pulse shaping circuit of claim 1, wherein the circuitry to compress the falling edge of the square wave pulse is a step-recovery diode.

5. The multi-port pulse shaping circuit of claim 1, wherein the input pulse is a sinusoidal pulse.

6. The multi-port pulse shaping circuit of claim 1, wherein the second output port selectively outputs the negative amplitude bipolar Gaussian pulse.