# Patent

## Title
Systems and methods for balancing battery cells

## Abstract

In a power converter, a primary winding receives an input power. In addition, multiple secondary windings transform the input power into multiple charging currents to charge a set of cells via a set of paths. The multiple secondary windings further balance the set of cells based on the charging currents. A ratio between a first turn number of a first secondary winding of the secondary windings and a second turn number of a second secondary winding of the secondary windings is determined by a nominal voltage ratio between two corresponding cells of the set of cells.

## Background
RELATED UNITED STATES PATENT APPLICATIONS
This application is a Continuation Application of the commonly-owned U.S. patent application Ser. No. 13/278,555, filed on Oct. 21, 2011, which is a Continuation Application of the commonly-owned U.S. Pat. No. 8,148,942, filed on Nov. 5, 2009, which are hereby incorporated by reference in their entirety.


BACKGROUND
In a conventional charging system that is used to charge a battery pack, multiple bypasses may be coupled to the cells in the battery pack, so as to balance the cells. For example, if one of the cells has a voltage that is greater than the voltages of all the other cells, a corresponding bypass can be turned on so as to discharge the cell that has the highest voltage. By selectively turning on the bypasses according to the voltages of the cells, the cells can be balanced. However, power losses through the bypasses may be relatively high. In addition, a bypass controller is needed to control the bypasses according to feedback signals indicative of the voltages of the cells, which may increase the time needed to balance the cells, and may further increase power losses.
SUMMARY
In one embodiment, a power converter includes a primary winding and multiple secondary windings. The primary winding receives an input power. The multiple secondary windings transform the input power into multiple charging currents to charge a set of cells via a set of paths. The multiple secondary windings further balance the set of cells based on the charging currents. A ratio between a first turn number of a first secondary winding of the secondary windings and a second turn number of a second secondary winding of the secondary windings is determined by a nominal voltage ratio between two corresponding cells of the set of cells.



BRIEF DESCRIPTION OF THE DRAWINGS
Features and advantages of embodiments of the subject matter will become apparent as the following detailed description proceeds, and upon reference to the drawings, wherein like numerals depict like parts, and in which:
FIG. 1A illustrates a block diagram of an example of a power converter, in accordance with one embodiment of the present invention.
FIG. 1B illustrates an example of a plot for an input current, an output current and a charging current, in accordance with one embodiment of the present invention.
FIG. 2 illustrates a block diagram of an example of a charging system, in accordance with one embodiment of the present invention.
FIG. 3 illustrates a block diagram of an example of a charging system, in accordance with one embodiment of the present invention.
FIG. 4 illustrates a block diagram of an example of a charging system, in accordance with one embodiment of the present invention.
FIG. 5 illustrates a block diagram of an example of a charging system, in accordance with one embodiment of the present invention.
FIG. 6 illustrates a flowchart of examples of operations performed by a charging system, in accordance with one embodiment of the present invention.



DETAILED DESCRIPTION
Reference will now be made in detail to the embodiments of the present invention. While the invention will be described in conjunction with these embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims.
Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be recognized by one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the present invention.
In one embodiment, the present invention provides a charging system for charging a set of battery cells. During the charging, the set of cells can be balanced automatically. More specifically, the charging system includes a power converter, e.g., a transformer, to transform an input power into multiple charging currents. Meanwhile, each of the charging currents varies according to a voltage across a corresponding cell, such that the cells can be balanced relative to one another. After the cells are balanced, the charging system further adjusts the sum of the charging currents by controlling the input power according to the voltage across each cell.
FIG. 1A illustrates a block diagram of an example of a power converter 100, in accordance with one embodiment of the present invention. The power converter 100 can be, but is not limited to, a flyback converter. Specifically, the power converter 100 includes a transformer 102. The transformer 102 has a primary winding 104 coupled between a supply terminal 120 and ground via a switch 108. In addition, the transformer 102 has a secondary winding 106 coupled in parallel with a capacitor 124 and a load 110 via a diode 112. The load 110 can be, but is not limited to, a rechargeable battery.
In one embodiment, a current sensor, e.g., a resistor 114, is coupled in series to the primary winding 104, such that a voltage V114 across the resistor 114 indicates an input current IP flowing through the primary winding 104, e.g., V114=IP*R114, where R114 represents the resistance of the resistor 114. A comparator 116 compares the voltage V114 with a reference voltage VREF and generates a comparison result signal 118 to a controller 130. The controller 130 generates a control signal 122 to control the switch 108 according to the comparison.
The supply terminal 120 can be coupled to a power source (not shown in FIG. 1A) having a voltage VIN. When the switch 108 is turned on by the control signal 122, an input current IP can flow through the primary winding 104 from the supply terminal 120 to ground. Meanwhile, the diode 112 is reverse biased (cut off), and the secondary winding 106 receives energy from the primary winding 104. When the switch 108 is turned off, the input current IP becomes zero. Meanwhile, the diode 112 is forward biased (turned on). Thus, the energy received by the secondary winding 106 is transformed into an output current IS, and the battery 110 can be charged by a charging current IO. The charging current IO can be equal to an equivalent current ISEQV of the output current IS.
FIG. 1B illustrates an example of a plot 100′ for the input current IP, the output current IS, and the charging current IO, in accordance with one embodiment of the present invention. FIG. 1B is described in combination with FIG. 1A.
As shown in FIG. 1B, the switch 108 is turned on at a time point t0 so that the input current IP increases from zero to a peak current level IPP during a first duration T1. In one embodiment, compared with the voltage VIN at the supply terminal 120, the voltage V114 on the resistor 114 is relatively small and can be neglected. Thus, the peak current level IPP can be given by:




  
    
      
        
          
            I
            PP
          
          ≈
          
            
              
                V
                IN
              
              ×
              
                T
                1
              
            
            
              L
              P
            
          
        
        ,
      
    
    
      
        (
        1
        )
      
    
  




where LP represents the inductance of the primary winding 104. During the first duration T1, the input energy EIN of the transformer 102 is given by:





  
    
      
        
          E
          IN
        
        =
        
          
            
              
                I
                PP
                2
              
              ×
              
                L
                P
              
            
            2
          
          .
        
      
    
    
      
        (
        2
        )
      
    
  




When the first duration T1 expires (e.g., at a time point t1), the switch 108 is turned off. During a second duration T2, the output current IS flowing through the secondary winding 106 can decrease from a peak current level ISP to zero. If nP is the turn number of the primary winding 104, and nS is the turn number of the secondary winding 106, the peak current level ISP can be given by:





  
    
      
        
          I
          SP
        
        =
        
          
            I
            PP
          
          ×
          
            
              
                n
                P
              
              
                n
                S
              
            
            .
          
        
      
    
    
      
        (
        3
        )
      
    
  




Furthermore, when the output current IS decreases to zero (e.g., at a time point t2), the switch 108 is still off for a third duration T3. During the third duration T3, the diode 112 is cut off and the output current IS is zero.

TTOT is the total duration of the durations T1, T2 and T3, e.g., TTOT=T1+T2+T3. In one embodiment, the input current IP increases from zero to the peak current level IPP during the first duration T1, and is zero during the second duration T2 and the third duration T3. Thus, an equivalent current IPEQV of the input current IP during the total duration TTOT is given by:




  
    
      
        
          I
          PEQV
        
        =
        
          
            (
            
              
                I
                PP
              
              2
            
            )
          
          ×
          
            
              (
              
                
                  T
                  1
                
                
                  T
                  TOT
                
              
              )
            
            .
          
        
      
    
    
      
        (
        4
        )
      
    
  




Similarly, the output current IS is zero during the first duration T1, decreases from the peak current ISP level to zero during the second duration T2, and is zero during the third duration T3. Thus, the equivalent current ISEQV of the output current IS during the total duration TTOT is given by:





  
    
      
        
          I
          SEQV
        
        =
        
          
            (
            
              
                I
                SP
              
              2
            
            )
          
          ×
          
            
              (
              
                
                  T
                  2
                
                
                  T
                  TOT
                
              
              )
            
            .
          
        
      
    
    
      
        (
        5
        )
      
    
  




The charging current IO flowing to the battery 110 can be equal to the equivalent current ISEQV of the output current IS, e.g., IO=ISEQV. Thus, based on equations (3) and (5), the charging current IO is given by:





  
    
      
        
          I
          O
        
        =
        
          
            (
            
              
                n
                P
              
              
                n
                S
              
            
            )
          
          ×
          
            (
            
              
                I
                PP
              
              2
            
            )
          
          ×
          
            
              (
              
                
                  T
                  2
                
                
                  T
                  TOT
                
              
              )
            
            .
          
        
      
    
    
      
        (
        6
        )
      
    
  




Returning to FIG. 1A, VO is the voltage across the battery 110 and VD is the forward bias voltage of the diode 112. If EOUT is the output energy transferred to the diode 112 and the battery 110 in the total duration TTOT, the output energy EOUT is given by:

EOUT=(VO+VD)×ISEQV×TTOT=(VO+VD)×IO×TTOT.  (7)

Assume that η is the energy transformation efficiency of the input energy EIN into the output energy EOUT, e.g., EOUT=η×EIN. In one embodiment, the dissipation for the energy transformation can be relatively small and can be neglected. Thus, the energy transformation efficiency η can be considered to be equal to 1, e.g., η=1. The output energy EOUT can be considered to be equal to the input energy EIN, e.g., EOUT=EIN. According to equations (2) and (7), the following equation is obtained:





  
    
      
        
          
            I
            O
          
          =
          
            
              
                I
                PP
                2
              
              ×
              
                L
                P
              
              ×
              
                f
                SW
              
            
            
              2
              ×
              
                (
                
                  
                    V
                    O
                  
                  +
                  
                    V
                    D
                  
                
                )
              
            
          
        
        ,
      
    
    
      
        (
        8
        )
      
    
  




where fSW represents the switching frequency of the switch 108 and is equal to 1/TTOT. Based on equations (1) and (4), equation (8) is rewritten as:





  
    
      
        
          I
          O
        
        =
        
          
            
              
                I
                PEQV
              
              ×
              
                V
                IN
              
            
            
              
                V
                O
              
              +
              
                V
                D
              
            
          
          .
        
      
    
    
      
        (
        9
        )
      
    
  




The controller 130 can adjust or maintain the charging current IO to a specified level by adjusting the input current IP according to the variation of the battery voltage VO. Specifically, the voltage VO across the battery 110 may vary during charging and discharging operations. A battery monitor (not shown in FIG. 1A) monitors the battery voltage VO and generates a feedback signal indicative of the battery voltage VO to the controller 130. Based on equation (8), the controller 130 increases the peak current level IPP as the battery voltage VO increases, and decreases the peak current level IPP as the battery voltage VO decreases.
More specifically, the controller 130 generates an internal clock signal (not shown in FIG. 1A) having a predetermined frequency, e.g., fSW. In one embodiment, the switch 108 is an n-channel metal-oxide-semiconductor field-effect transistor (NMOSFET). The control signal 122 is set logically high in response to each pulse, e.g., each rising edge, of the internal clock signal. In addition, the control signal 122 is set logically low in response to each pulse, e.g., each rising edge, of the comparison result signal 118. For example, when a rising edge of a pulse of the internal clock signal occurs at the time point t0 (shown in FIG. 1B), the switch 108 is turned on by a logically high control signal 122, and the input current IP starts to increase, e.g., from zero. At the time point t1, the input current IP increases to a level VREF/R114, e.g., the voltage V114 across the resistor 114 increases to the reference voltage VREF, therefore the comparator 116 outputs a logically high comparison result signal 118. Accordingly, the switch 108 is turned off by a logically low control signal 122, and the input current IP becomes zero. At the time point t2, a clock cycle TTOT of the internal clock signal expires, therefore a rising edge of another pulse of the internal clock signal occurs. Accordingly, the switch 108 is turned on again. Thus, during each clock cycle TTOT, the peak current level IPP is adjusted to the level VREF/R114, e.g., IPP=VREF/R114. Assume IPRE is a predefined/desirable current level of the charging current IO. Based on equation (8), the following equation is obtained:




  
    
      
        
          I
          PRE
        
        =
        
          
            
              
                
                  (
                  
                    
                      V
                      REF
                    
                    /
                    
                      R
                      114
                    
                  
                  )
                
                2
              
              ×
              
                L
                P
              
              ×
              
                f
                SW
              
            
            
              2
              ×
              
                (
                
                  
                    V
                    O
                  
                  +
                  
                    V
                    D
                  
                
                )
              
            
          
          .
        
      
    
    
      
        (
        10
        )
      
    
  




Equation (10) is rewritten as:





  
    
      
        
          V
          REF
          2
        
        =
        
          
            
              2
              ×
              
                R
                114
                2
              
              ×
              
                I
                PRE
              
              ×
              
                (
                
                  
                    V
                    O
                  
                  +
                  
                    V
                    D
                  
                
                )
              
            
            
              
                L
                P
              
              ×
              
                f
                SW
              
            
          
          .
        
      
    
    
      
        (
        11
        )
      
    
  




The controller 130 sets the reference voltage VREF based on equation (11), such that the charging current IO is adjusted to the level IPRE, e.g., IO=IPRE. Based on equation (9), the controller 130 can also increase the equivalent current IPEQV as the battery voltage VO increases, and decrease the equivalent current IPEQV as the battery voltage VO decreases, such that the charging current IO is adjusted to or maintained at the level IPRE.

In the example of FIG. 1A, the primary winding 104 is coupled to ground via the switch 108 that is an NMOSFET. However, in another embodiment, the primary winding 104 is coupled to the supply terminal 120 via a switch (not shown in FIG. 1A) that is a p-channel MOSFET (PMOSFET), and the NMOSFET 108 is omitted. The PMOSFET can be controlled by the control signal 122. In one such embodiment, the control signal 122 is set logically low in response to each pulse of the internal clock signal, and is set logically high in response to each pulse of the comparison result signal 118.
FIG. 2 illustrates a block diagram of an example of a charging system 200 for charging a battery pack 210, in accordance with one embodiment of the present invention. The battery pack 210 includes a set of series-coupled cells 210_1, 210_2, . . . 210_N. The charging system 200 includes a controller 230 and a power converter 202, e.g., a transformer. The power converter 202 can provide multiple charging currents IO1, IO2, . . . ION to charge the set of cells 210_1-210_N respectively via a set of paths 212_1, 212_2, . . . 212_N, e.g., a set of diodes.
The power converter 202 includes a primary winding 204 and multiple secondary windings 206_1, 206_2, . . . 206_N. The primary winding 204 is coupled between a supply terminal 220 and ground via an input switch 208 and receives an input power from the supply terminal 220. The secondary windings 206_1-206_N are respectively coupled in parallel with the cells 210_1-210_N and are used to transform the input power into the charging currents IO1-ION to charge the cells 210_1-210_N respectively via the paths 212_1-212_N. Furthermore, the secondary windings 206_1-206_N can balance cell voltages VO1, VO2, . . . VON of the cells 210_1-210_N based on the charging currents IO1-ION.
Specifically, the turn ratio between a first turn number of a first secondary winding (that is, the number of turns in the first secondary winding) of the secondary windings 206_1-206_N and a second turn number of a second secondary winding (that is, the number of turns in the second secondary winding) of the secondary windings 206_1-206_N is determined by, e.g., is approximately equal to, a nominal voltage ratio between two corresponding cells of the cells 210_1-210_N. As used herein, “approximately equal to” means that a difference between a turn ratio and a corresponding nominal voltage ratio is permissible so long as the difference is relatively small and can be ignored. For example, if n206—A is the turn number of the secondary winding 206_A and n206—B is the turn number of the secondary winding 206_B (A=1, 2, . . . N; B=1, 2, . . . N; and A≠B), the ratio between the turn number n206—A and the turn number n206—B is equal to n206—A/n206—B. If VNOM—A is the nominal voltage of the cell 210_A and VNOM—B is the nominal voltage of the cell 210_B, the nominal voltage ratio between the cells 210_A and 210_B is equal to VNOM—A/VNOM—B. The turn ratio n206—A/n206—B is equal to the nominal voltage ratio VNOM—A/VNOM—B, e.g., n206—A/n206—B=VNOM—A/VNOM—B. As used herein, “a nominal voltage” of a cell is a voltage across the cell when the cell is fully charged. In other words, “a nominal voltage” of a cell is equal to a voltage across the cell when the cell is being charged in a constant-voltage charging mode and the charging current is less than a predetermined threshold.
As shown in FIG. 2, each path 212_1-212-N includes a diode coupled in series to a corresponding secondary winding 206_1-206_N and a corresponding cell 210_1-210_N. In one embodiment, the cells 210_1-210_N have the same nominal voltage, e.g., VNOM. For example, each cell 210_1-210_N is made of the same material in the same way. In one such embodiment, the secondary windings 206_1-206_N have the same turn number, e.g., n206. When the switch 208 that is coupled in series to the primary winding 204 is turned on, the diode in each path 212_1-212_N is reverse biased (cut off), therefore each path 212_1-212_N is disabled. Meanwhile, each secondary winding 206_1-206_N receives energy from the primary winding 204 due to the input current IP flowing through the primary winding 204. Each of the energies received by the secondary windings 206_1-206_N can be the same due to the same turn number n206. When the switch 208 is turned off, the diode in each path 212_1-212_N is forward biased (turned on), therefore each path 212_1-212_N is enabled. Meanwhile, each secondary winding 206_1-206_N transforms the energy into a corresponding charging current IO1, or IO2, . . . or ION.
Advantageously, in one such embodiment, if a first voltage across a first cell (e.g., the voltage VO1 across the cell 210_1) is greater than a second voltage across a second cell (e.g., the cell voltage VO2 across the cell 210_2), the first charging current for charging the first cell (e.g., the charging current IO1) is less than the second charging current for charging the second cell (e.g., the charging current IO2). Thus, the first cell voltage VO1 increases slower than the second cell voltage VO2. Contrarily, if the first cell voltage VO1 is less than the second cell voltage VO2, the first charging current IO1 is greater than the second charging current IO2, therefore the first cell voltage VO1 increases faster than the second cell voltage VO2. In other words, the charging currents IO1-ION can be automatically adjusted according to the cell voltages VO1-VON of the cells 210_1-210_N. As a result, the cell voltages VO1-VON can be adjusted to the same voltage level. The cell voltages VO1-VON as well as the charging currents IO1-ION can be balanced. In one such embodiment, the conventional bypasses and the conventional bypass controller are omitted, which reduces the power consumption of the charging system 200. In addition, the time needed for cell balancing can be reduced.
More specifically, in one such embodiment, since the secondary windings 206_1-206_N have the same turn number n206, voltages VS1, VS2, . . . VSN respectively across the secondary windings 206_1-206_N have the same peak voltage level, e.g., VSP. T′2 is the time (duration) needed for the output current IS1 of the secondary winding 206_1 to decrease from the peak current level ISP to zero, and T′′2 is the time (duration) needed for the output current IS2 of the secondary winding 206_2 to decrease from the peak current level ISP to zero. If the cell voltage VO1 is greater than the cell voltage VO2, the difference between VO1 and VSP is less than the difference between VO2 and VSP. Thus, the cell voltage VO1 and the voltage VS1 across the secondary winding 206_1 can be balanced faster than the cell voltage VO2 and the voltage VS2 across the secondary winding 206_2 do. In other words, the duration T′2 is shorter than the duration T′′2. Similarly, the duration T′2 is longer than the duration T′′2 if the cell voltage VO1 is less than the cell voltage VO2. According to equation (6), the charging current IO is directly proportional to the second duration T2. Similarly, the charging current IO1 is directly proportional to the duration T′2, and the charging current IO2 is directly proportional to the duration T′′2. Thus, the charging current IO1 is less than the charging current IO2 if the cell voltage VO1 is greater than the cell voltage VO2, and is greater than the charging current IO2 if the cell voltage VO1 is less than the cell voltage VO2 
The controller 230 is coupled to the input switch 208, and controls the secondary windings 206_1-206_N to transform the input power into the charging currents IO1-ION by controlling the switch 208. As shown in FIG. 2, the controller 230 includes a current monitor 234 coupled to a current sensor, e.g., a sense resistor 214, to monitor the input current IP. The controller 230 also includes a voltage monitor 236 coupled to the cells 210_1-210_N to monitor the cell voltages VO1-VON. The controller 230 further includes a stage controller 232 that samples/receives current information indicative of the input current IP from the current monitor 234 and voltage information indicative of the cell voltages VO1-VON from the voltage monitor 236. The stage controller 232 can generate a pulse width modulation (PWM) signal 222 to control the switch 208 according to the current information and the voltage information. An oscillator 238 can provide a clock signal to the stage controller 232 for operations of the stage controller 232. For example, the stage controller 232 can sample the current information and the voltage information at each rising/falling edge of the clock signal. In addition, the stage controller 232 can set the control signal 222 logically high in response to each pulse of the clock signal. The stage controller 232 can also set the control signal 222 logically low in response to a feedback signal, e.g., from the current monitor 234, that indicates the input current IP is equal to or greater than a predetermined level.
POi is the power transferred to the cell 210—i (i=1, 2, . . . N), e.g., POi=VOi*IOi, and ISUM is the sum of the charging currents IO1-ION, e.g.,




  
    I
    SUM
  
  =
  
    
      ∑
      
        i
        =
        1
      
      N
    
    ⁢
    
      
    
    ⁢
    
      
        I
        Oi
      
      .
    
  




The sum ISUM can be given by:

ISUM=IO1+IO2 . . . +ION=(PO1/VO1)+(PO2/VO2) . . . +(PON/VON).  (12)

When the cell voltages VO1-VON are balanced relative to one another, each cell voltage VO1-VON is approximately equal to an average voltage VOAVE of the cell voltages VO1-VON, e.g., VO1=VO2 . . . =VON=VOAVE=(VO1+VO2 . . . +VON)/N. Thus, equation (12) can be rewritten as:





  
    
      
        
          
            
              
                I
                SUM
              
              =
              
              ⁢
              
                
                  (
                  
                    
                      P
                      
                        O
                        ⁢
                        
                          
                        
                        ⁢
                        1
                      
                    
                    +
                    
                      
                        P
                        
                          O
                          ⁢
                          
                            
                          
                          ⁢
                          2
                        
                      
                      ⁢
                      
                        
                      
                      ⁢
                      ...
                    
                    +
                    
                      P
                      ON
                    
                  
                  )
                
                ⁢
                
                  /
                
                ⁢
                
                  V
                  OAVE
                
              
            
          
        
        
          
            
              =
              
              ⁢
              
                
                  ∑
                  
                    i
                    =
                    1
                  
                  N
                
                ⁢
                
                  
                
                ⁢
                
                  
                    (
                    
                      
                        V
                        Oi
                      
                      ×
                      
                        I
                        Oi
                      
                    
                    )
                  
                  ⁢
                  
                    /
                  
                  ⁢
                  
                    
                      V
                      OAVE
                    
                    .
                  
                
              
            
          
        
      
    
    
      
        (
        13
        )
      
    
  




As used herein, “approximately equal to” means that a difference between each cell voltage VO1-VON and the average voltage VOAVE is permissible so long as the difference is relatively small and can be ignored.

If E′OUT is the output energy transferred to the diodes 212_1-212_N and the cells 210_1-210_N in the duration TTOT, the output energy E′OUT is given by:




  
    
      
        
          
            
              
                E
                OUT
                ′
              
              =
              
              ⁢
              
                [
                
                  
                    
                      (
                      
                        
                          V
                          
                            O
                            ⁢
                            
                              
                            
                            ⁢
                            1
                          
                        
                        +
                        
                          V
                          D
                        
                      
                      )
                    
                    ×
                    
                      I
                      
                        O
                        ⁢
                        
                          
                        
                        ⁢
                        1
                      
                    
                  
                  +
                  
                    
                      (
                      
                        
                          V
                          
                            O
                            ⁢
                            
                              
                            
                            ⁢
                            2
                          
                        
                        +
                        
                          V
                          D
                        
                      
                      )
                    
                    ×
                    
                      I
                      
                        O
                        ⁢
                        
                          
                        
                        ⁢
                        2
                      
                    
                  
                  +
                  ...
                
                ⁢
                
                  
                
              
            
          
        
        
          
            
              
                
                ⁢
                
                  
                    (
                    
                      
                        V
                        ON
                      
                      +
                      
                        V
                        D
                      
                    
                    )
                  
                  ×
                  
                    I
                    ON
                  
                
                ]
              
              ×
              
                T
                TOT
              
            
          
        
        
          
            
              =
              
              ⁢
              
                
                  [
                  
                    
                      
                        ∑
                        
                          i
                          =
                          1
                        
                        N
                      
                      ⁢
                      
                        
                      
                      ⁢
                      
                        (
                        
                          
                            V
                            Oi
                          
                          ×
                          
                            I
                            Oi
                          
                        
                        )
                      
                    
                    +
                    
                      
                        V
                        D
                      
                      ×
                      
                        
                          ∑
                          
                            i
                            =
                            1
                          
                          N
                        
                        ⁢
                        
                          
                        
                        ⁢
                        
                          I
                          Oi
                        
                      
                    
                  
                  ]
                
                ×
                
                  T
                  TOT
                
              
            
          
        
        
          
            
              =
              
              ⁢
              
                
                  (
                  
                    
                      V
                      OAVE
                    
                    +
                    
                      V
                      D
                    
                  
                  )
                
                ×
                
                  I
                  SUM
                
                ×
                
                  
                    T
                    TOT
                  
                  .
                
              
            
          
        
      
    
    
      
        (
        14
        )
      
    
  




Since the output energy E′OUT of the power converter 202 can be considered to be equal to the input energy EIN of the power converter 202, e.g., E′OUT=EIN, based on equations (2) and (14), the following equation can be obtained:





  
    
      
        
          I
          SUM
        
        =
        
          
            
              
                I
                PP
                2
              
              ×
              
                L
                P
              
              ×
              
                f
                SW
              
            
            
              2
              ×
              
                (
                
                  
                    V
                    OAVE
                  
                  +
                  
                    V
                    D
                  
                
                )
              
            
          
          .
        
      
    
    
      
        (
        15
        )
      
    
  




The current monitor 234 can include a current sense comparator (similar to the comparator 116 shown in FIG. 1A) for comparing a sensing signal, e.g., a voltage V214 across the sense resistor 214, indicative of the input current IP with a reference voltage VREF. As such, the controller 230 can adjust the peak current level IPP to a level VREF/R214, e.g., IPP=VREF/R214, where R214 represents the resistance of the sense resistor 214. IPRE is a predefined/desirable current level of the sum ISUM. Based on equation (15), the controller 230 can calculate the reference voltage VREF and set the reference voltage VREF according to the following equation:




  
    
      
        
          V
          REF
          2
        
        =
        
          
            
              2
              ×
              
                R
                114
                2
              
              ×
              
                I
                PRE
              
              ×
              
                (
                
                  
                    V
                    OAVE
                  
                  +
                  
                    V
                    D
                  
                
                )
              
            
            
              
                L
                P
              
              ×
              
                f
                SW
              
            
          
          .
        
      
    
    
      
        (
        16
        )
      
    
  




In other words, the controller 230 can adjust the input current IP, e.g., adjust the reference voltage VREF, according to the voltage (VO1, or VO2, . . . or VON) of each cell 210_1-210_N, such that the sum ISUM is adjusted to or maintained at the desirable level IPRE, e.g., ISUM=IPRE. In one such embodiment, since the charging currents IO1-ION are balanced relative to one another, all of the charging currents IO1-ION are adjusted to a level IPRE/N.

Similar to the discussion in relation to FIG. 1A, according to equations (1) and (4), equation (15) is rewritten as:




  
    
      
        
          I
          SUM
        
        =
        
          
            
              
                I
                PEQV
              
              ×
              
                V
                IN
              
            
            
              
                V
                OAVE
              
              +
              
                V
                D
              
            
          
          .
        
      
    
    
      
        (
        17
        )
      
    
  




The controller 230 can also increase the equivalent current IPEQV as the average voltage VOAVE increases, and decrease the equivalent current IPEQV as the average voltage VOAVE decreases, such that the sum ISUM is adjusted to or maintained at the desirable level IPRE.

In one embodiment, according to the cell voltages VO1-VON and the input current IP, the charging system 200 operates in a selected mode, e.g., a precondition/pre-charge mode, a constant-current charging mode, a constant-voltage charging mode, a charging termination mode, etc.
For example, if any of the cell voltages VO1-VON is less than a first predetermined reference VPRE1, the charging system 200 operates in a pre-charge mode. In the pre-charge mode, the controller 230 adjusts the peak current level IPP (or the equivalent current IPEQV) of the input current IP to a relatively low level, such that the charging currents IO1-ION can be relatively small. In the example of FIG. 2, the switch 208 is an NMOSFET. Thus, the stage controller 232 adjusts the peak current level IPP (or the equivalent current IPEQV) to a relatively low level by setting a duty cycle of the PWM signal 222 to be relatively low. In an alternate embodiment, a PMOSFET is coupled between the supply terminal 220 and the primary winding 204 and is controlled by the PWM signal 222. In one such embodiment, the NMOSFET 208 is omitted, and the primary winding 204 can be coupled to the sense resistor 214 directly. The stage controller 232 can set the duty cycle of the PWM signal 222 to be relatively high, so as to adjust the peak current level IPP (or the equivalent current IPEQV) to a relatively low level. In yet another embodiment, the controller 230 adjusts the peak current level IPP to a relatively low level by setting the reference voltage VREF to a relatively low level.
If each cell voltage VO1-VON is greater than the first predetermined reference VPRE1, and the average cell voltage VOAVE is less than a second predetermined reference VPRE2 (VPRE1<VPRE2), the charging system 200 operates in a constant-current charging mode. In the constant-current charging mode, the stage controller 232 adjusts the input current IP according to the cell voltages VO1-VON, so as to maintain the sum ISUM at a predefined current level IPRE. For example, the reference voltage VREF is adjusted according to the cell voltages VO1-VON based on equation (16).
If the average cell voltage VOAVE is equal to or greater than the second predetermined reference VPRE2, the charging system 200 operates in a constant-voltage charging mode. In the constant-voltage charging mode, the average cell voltage VOAVE remains substantially constant, e.g., equal to the second predetermined reference VPRE2. Meanwhile, the stage controller 232 reduces the sum ISUM gradually (e.g., at a predetermined rate). For example, for the NMOSFET 208, the stage controller 232 reduces the duty cycle of the PWM signal 222 gradually. For the PMOSFET mentioned above, the stage controller 232 increases the duty cycle of the PWM signal 222 gradually. The stage controller 232 can also reduce the sum ISUM gradually by reducing the reference voltage VREF at a predetermined rate. Advantageously, the cell voltages VO1-VON can be balanced automatically during the pre-charge mode, the constant-current charging mode and the constant-voltage charging mode. As a result, each cell voltage VO1-VON can be approximately equal to the second predetermined reference VPRE2. In one embodiment, the second predetermined reference VPRE2 is equal to the nominal voltage VNOM of the cells 210_1-210_N.
Additionally, during the constant-voltage charging mode, if the sum ISUM decreases to a current threshold IOTH (IOTH<IPRE), the battery pack 210 can be considered to be fully charged, and the charging system 200 operates in a charging termination mode. In the charging termination mode, the stage controller 232 terminates the charging of the battery pack 210 by disabling the switch 208, in one embodiment. In another embodiment, the state controller 232 terminates the charging of the battery pack 210 by disconnecting the supply terminal 220 from the power source VIN.
The charging system 200 can also operate in the charging termination mode if any undesirable condition (e.g., over-voltage condition, over-temperature condition) occurs. For example, if a cell of the cells 210_1-210_N has a cell voltage greater than a predetermined voltage threshold VOTH (VPRE1<VPRE2<VOTH), then an over-voltage condition has occurred, and the controller 230 terminates the battery charging. For another example, a temperature sensor (not shown in FIG. 2) is used to sense the temperature of the battery pack 210. If the temperature of the battery pack 210 is greater than a predetermined temperature threshold, then an over-temperature condition has occurred, and the battery charging is terminated.
As discussed above, in one embodiment, the cells 210_1-210_N have the same nominal voltage VNOM, and the secondary windings 206_1-206_N have the same turn number n206. However, in another embodiment, the secondary windings 206_1-206_N may have different turn numbers.
In the example of FIG. 2, the cell 210_1 is a single cell. In another embodiment, the cell 210_1 can be a cell group that includes two sub-cells coupled in series (not shown in FIG. 2). Similarly, the cell 210_2 can be a cell group that includes three sub-cells coupled in series. Each of the sub-cells in the cell group 210_1 is the same as each of the sub-cells in the cell group 210_2. As such, the nominal voltage ratio between the nominal voltage VNOM—1 of the cell group 210_1 and the nominal voltage VNOM—2 of the pack cell 210_2 is equal to 2⁄3 (e.g., VNOM—1/VNOM—2=2⁄3). Compared with the nominal voltages VNOM—1 and VNOM—2, voltages on the diodes 212_1 and 212_2 are relatively small and can be neglected. The turn ratio n206—1/n206—2 between the secondary windings 206_1 and 206_2 is equal to VNOM—1/VNOM—2 (e.g., n206—1/n206—2=2⁄3). In one such embodiment, the sub-cells in the cell group 210_1 and the sub-cells in the cell group 210_2 can be balanced during a charging/balancing operation. Similarly, in one embodiment, each cell 210_1-210_N can be a cell group that includes a different number NCELL of identical sub-cells. The turn number of each secondary winding 206_1-206_N is chosen according to the cell number NCELL of sub-cells in a corresponding cell group 210_1-210_N. In one such embodiment, the sub-cells in the cell groups 210_1-210_N can be balanced relative to one another during the charging/balancing operation.
FIG. 3 illustrates another block diagram of an example of a charging system 300, in accordance with one embodiment of the present invention. Elements that are labeled the same as in FIG. 2 have similar functions. As shown in FIG. 3, the secondary windings 206_1-206_N are coupled to the cells 210_1-210_N respectively via a set of paths 312_1-312_N. Each path of the set of paths 312_1-312_N includes an output switch. Each output switch 312_1-312_N can be a MOSFET having a body diode. In one such embodiment, the body diodes in the MOSFETs 312_1-312_N have functions similar to those of the diodes 212_1-212_N in FIG. 2, and the diodes 212_1-212_N are omitted in FIG. 3. The controller 230 can further include a switch controller 340 for generating the control signal 222 to control the switch 208, and for generating control signals 322_1-322_N to control the switches 312_1-312_N.
In one embodiment, since the body diodes in the switches 312_1-312_N have functions similar to those of the diodes 212_1-212_N in FIG. 2, the switches 312_1-312_N can be turned off during a charging/balancing operation. More specifically, the switches 312_1-312_N are turned off whether the switch 208 is turned on or turned off.
In another embodiment, the switch controller 340 controls the output switches 312_1-312_N based on the state of the input switch 208. Specifically, the switches 312_1-312_N can be selectively turned on so as to reduce the time needed for cell balancing. For example, as mentioned above, during each clock cycle TTOT, the switch 208 is turned on for a first duration T1 and is turned off for a second duration T2 and a third duration T3. During the first duration T1, the output switches 312_1-312_N are turned off. During the second duration T2, if a cell 210—m (m=1, 2, . . . or N) has the lowest voltage among the cells 210_1-210_N, the switch controller 340 turns on the switch 312—m that is coupled to the cell 210—m. Thus, a voltage loss on the switch 312—m is reduced. The charging current IOm for charging the cell 210—m can increase. The switch controller 340 turns on the switch 312—m for a relatively short time, e.g., shorter than the second duration T2, so as to prevent the cell 210—m from discharging to the secondary winding 206—m via the switch 312—m. For another example, if a cell 210—n (n=1, 2, . . . or N) has a voltage VLOWER that is lower than a predetermined voltage, e.g., an average cell voltage VOAVE of the cells 210_1-210_N, and the difference between the voltage VLOWER and the predetermined voltage VOAVE is greater than a voltage threshold VDIF—TH, the switch controller 340 turns on the switch 312—n that is coupled to the cell 210—n. Thus, the charging current IOn for charging the cell 210—n can increase. Similarly, the switch controller 340 turns on the switch 312—n for a relatively short time to prevent the cell 210—n from discharging to the secondary winding 206—n via the switch 312—n. Consequently, the time needed for cell balancing can be reduced.
Furthermore, in another embodiment, when the switch 208 is turned on, the switches 312_1-312_N are turned off. When the switch 208 is turned off, the switches 312_1-312_N are turned on. Thus, voltage losses on the body diodes in the switches 312_1-312_N are reduced, and the time needed for cell balancing may also be reduced. In one such embodiment, when the switch 208 is turned off, the switches 312_1-312_N are turned on for a relatively short time to prevent the cells 210_1-210_N from discharging to the secondary windings 206_1-206_N via the switches 312_1-312_N.
FIG. 4 illustrates another block diagram of an example of a charging system 400, in accordance with one embodiment of the present invention. Elements that are labeled the same as in FIG. 2 have similar functions. As shown in FIG. 4, the charging system 400 includes the power converter 202 and the battery pack 210. The charging system 400 also includes a battery monitor 436 for monitoring the cell voltages VO1-VON of the cells 210_1-210_N. Based on the cell voltages VO1-VON, the battery monitor 436 calculates the reference voltage VREF and generates a reference signal indicative of the reference voltage VREF to a bus 448, e.g., a serial communication bus. The battery monitor 436 can further generate a control signal for enabling/disabling a battery charging process based on the cell voltages VO1-VON to the bus 448. The charging system 400 further includes a controller 430 for controlling the switch 208 based on the reference signal from the battery monitor 436 and the current information from the sense resistor 214.
More specifically, the controller 430 includes a serial communication circuit 432, a digital-to-analog converter (DAC) 434, a comparator 446, a reset-set (RS) flip flop 440, an oscillator 438, an AND gate 442, and a driver 444. The serial communication circuit 432 receives the reference signal via the bus 448 and outputs a digital signal indicative of the calculated reference voltage VREF to the DAC 434. The DAC 434 generates the reference voltage signal VREF to the comparator 446.
The comparator 446 compares the reference voltage VREF with the voltage V214 across the sensor resistor 214, and generates a comparison result signal RIN to a reset terminal R of the RS flip flop 440. Additionally, the oscillator 438 generates a clock signal SIN to a set terminal S of the RS flip flop 440. The clock signal SIN has a predetermined frequency fSW. In one embodiment, the RS flip flop 440 is triggered by rising edges of the signals SIN and RIN. For example, the output signal QOUT of the RS flip flop 440 is set logically high if a rising edge of a pulse of the signal SIN Occurs, and is set logically low if a rising edge of a pulse of the signal RIN occurs. The AND gate 442 receives the output signal QOUT, the clock signal SIN, and an enable signal ENS from the serial communication circuit 432. Thus, when the OSC 438 generates a pulse SIN to the RS flip flop 440 and the enable signal ENS is logically high, the AND gate 442 generates a logically high signal to the driver 444, turning on the switch 208. When the input current IP increases to the level VREF/R214, the comparator 446 generates a pulse RIN to the RS flip flop 440, therefore the AND gate 442 generates a logically low signal to the driver 444, turning off the switch 208. When a clock cycle TTOT of the clock signal SIN expires, the output signal QOUT is set logically high again by another pulse SIN.
In the example of FIG. 4, the input signals of the AND gate 442 include the clock signal SIN. Thus, the duty cycle of the clock signal SIN is selected, e.g., to be relatively high (e.g., 50%, 60%), such that, during each clock cycle, the clock signal SIN will not become logically low before the comparator 446 generates a pulse RIN to the RS flip flop 440, e.g., before the input current IP increases to the level VREF/R214. As a result, the switch 208 is turned on when a rising edge of the clock signal SIN Occurs and is kept on until a rising edge of the comparison result signal RIN occurs. Advantageously, if the comparator 446 is disabled or an undesirable condition (e.g., the comparator 446 is broken, or the DAC 434 is broken, etc.) occurs, the AND gate 442 can generate the output signal in accordance with the clock signal SIN. The switch 208 is turned on periodically by the clock signal SIN such that the charging system 400 still operates properly.
Furthermore, if the cells 210_1-210_N are fully-charged, or if any undesirable condition (e.g., over-voltage condition, over-current condition, over-temperature condition) occurs, the battery monitor 436 generates a control signal to the serial communication circuit 432 via the bus 448, such that the enable signal ENS is set logically low to disable the switch 208.
The supply terminal 220 can receive power from different power sources. For example, the supply terminal 220 is coupled to a power source 410. The power source 410 can be, but is not limited to, an auxiliary power supply, a solar panel, etc. For another example, the supply terminal 220 is coupled to the battery pack 210. In this example, the power converter 202 receives energy from the plurality of cells 210_1-210_N and distributes the energy to the cells 210_1-210_N. The cells 210_1-210_N are balanced relative to one another based on the energy from the cells 210_1-210_N. As a result, cell voltages V′O1-V′ON of the cells 210_1-210_N (after the balancing process) are substantially equal to the average voltage VOAVE of the cell voltages VO1-VON (before the balancing process), e.g., V′O1=V′O2 . . . =V′ON=VOAVE.
FIG. 5 illustrates another block diagram of an example of a charging system 500, in accordance with one embodiment of the present invention. Elements that are labeled the same as in FIG. 2 and FIG. 4 have similar functions. As shown in FIG. 5, the charging system 500 can charge/balance cells in multiple battery packs 510_1, 510_2, . . . 510_N.
More specifically, the secondary windings 206_1-206_N are coupled to the battery packs 510_1-510_N respectively via multiple switch matrixes 550_1, 550_2, . . . 550_N. Each battery pack 510_1-510_N includes multiple cells. Accordingly, each switch matrix 550_1-550_N includes multiple pairs of switches, and each pair of switches is used to connect/disconnect a corresponding cell to/from a corresponding secondary winding 206_1-206_N. Multiple switch controllers 552_1, 552_2, . . . 552_N, e.g., serial communication and power switch decoders, are used respectively to control switches in the switch matrixes 550_1-550_N based on a control signal 554 from the serial communication bus 448. The control signal 554 can be from a battery monitor 536 that monitors cells in the battery packs 510_1-510_N. Advantageously, by controlling the switch matrixes 550_1-550_N properly, cells in the battery packs 510_1-510_N can be balanced relative to one another.
For example, each switch controller 552_1-552_N can turn on the switch pairs sequentially in a corresponding switch matrixes 550_1-550_N, such that energies are transferred to cells sequentially in a corresponding battery pack 510_1-510_N, Each switch controller 552_1-552_N can also selectively turn on a pair of switches based on the statuses, e.g., cell voltages, of cells in a corresponding battery pack 510_1-510_N. For example, if a cell in a battery pack 510—k (k=1, 2, . . . N) has the lowest cell voltage among the cells in the battery pack 510—k, the switch controller 550—k turns on a corresponding pair of switches to transfer energy to the cell that has the lowest voltage. As a result, by selectively turning on the switches in the switch matrixes 550_1-550_N for multiple times, the cells in the battery packs 510_1-510_N can be balanced relative to one another.
In the example of FIG. 5, multiple separated switch controllers 552_1-552_N are used to control the switch matrixes 550_1-550_N. However, in another embodiment, a single switch controller (not shown in FIG. 5) can be used, instead of the separated switch controllers 552_1-552_N, to control all of the switch matrixes 550_1-550_N. In the example of FIG. 5, a single battery monitor 536 monitors all of the cells in the battery packs 510_1-510_N. However, in another embodiment, multiple separated battery monitors (not shown in FIG. 5) can be used instead, to monitor the cells in the battery packs 510_1-510_N respectively.
FIG. 6 illustrates a flowchart 600 of examples of operations performed by a charging system (200, or 300, or 400, or 500), in accordance with one embodiment of the present invention. FIG. 6 is described in combination with FIG. 2, FIG. 3, FIG. 4 and FIG. 5.
In block 602, the primary winding 204 receives an input power from the supply terminal 220.
In block 604, multiple secondary windings 206_1-206_N transform the input power into multiple charging currents IO1-ION. In one such embodiment, the ratio between a first turn number (e.g., n206—A) of a first secondary winding (e.g., 206_A) and a second turn number (e.g., n206—B) of a second secondary winding (e.g., 206_B) is determined by the nominal voltage ratio between two corresponding cells of the set of cells 210_1-210_N (A=1, 2, . . . N; B=1, 2, . . . N; and A≠B).
In block 606, the charging currents IO1-ION charge the set of cells 210_1-210_N respectively via the set of paths 212_1-212_N, e.g., a set of diodes.
In addition, as described in block 608, the set of cells 210_1-210_N are balanced based on the charging currents IO1-ION.
In summary, embodiments according to the present invention provide a power converter and a charging system that uses the power converter. The power converter includes a primary winding coupled to a supply terminal and ground via an input switch. The power converter further includes multiple secondary windings coupled to a set of cells via a set of paths, e.g., including a set of diodes. By using the power converter, the charging system can charge the set of cells and at the same time balance the set of cells. Furthermore, the charging system can adjust the charging currents for the set of cells to a desirable level by controlling the input switch according to the voltages across the cells.
While the foregoing description and drawings represent embodiments of the present invention, it will be understood that various additions, modifications and substitutions may be made therein without departing from the spirit and scope of the principles of the present invention as defined in the accompanying claims. One skilled in the art will appreciate that the invention may be used with many modifications of form, structure, arrangement, proportions, materials, elements, and components and otherwise, used in the practice of the invention, which are particularly adapted to specific environments and operative requirements without departing from the principles of the present invention. The presently disclosed embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims and their legal equivalents, and not limited to the foregoing description.

## Claims

1. A system comprising:
a transformer circuit that includes a primary winding and a plurality of secondary windings coupled to a battery pack having a plurality of cells, and that is operable for transforming an input power of said system into a plurality of output currents from said secondary windings to said cells, wherein an input current through said primary winding corresponds to said input power; and
a control circuit, coupled to said transformer circuit, that is operable for controlling a level of said input current to increase if a voltage of said battery pack increases, and operable for controlling a level of said input current to decrease if said voltage of said battery pack decreases, so as to maintain a summation of said output currents at a predetermined value.

2. The system as claimed in claim 1, wherein said plurality of cells are charged by said output currents, and wherein said control circuit balances cell voltages of said plurality of cells according to said output currents.

3. The system as claimed in claim 1, wherein a ratio between a first turn number of a first secondary winding of said secondary windings and a second turn number of a second secondary winding of said secondary windings is determined by a nominal voltage ratio between two corresponding cells in said battery pack.

4. The system as claimed in claim 1, further comprising:
a current sensor, coupled to said transformer circuit, that provides a sensing voltage representing said input current to said control circuit; and
an input switch, coupled to said transformer circuit and said control circuit, wherein said control circuit controls a state of said input switch to control said input current.

5. The system as claimed in claim 4, wherein said control circuit controls a peak current level of said input current by controlling said state of said input switch according to a comparison between said sensing voltage and a reference voltage, and adjusts said reference voltage according to said voltage of said battery pack to adjust said peak current level.

6. The system as claimed in claim 4, further comprising a plurality of output paths, coupled to said secondary windings of said transformer circuit, that transfer said output currents to said plurality of cells respectively, wherein said control circuit enables and disables said output paths based on said state of said input switch.

7. The system as claimed in claim 6, wherein a path of said output paths is disabled when said input switch is turned on, and is enabled when said input switch is turned off.

8. The system as claimed in claim 6, wherein each of said output paths comprises an element selected from the group consisting of a diode and an output switch.

9. The system as claimed in claim 8, wherein said control circuit further comprises a switch controller that controls said output switch in said output paths according to a voltage of a corresponding cell in said battery pack that is coupled to said output switch.

10. A method comprising:
receiving an input current at a primary winding of a transformer circuit, said input current corresponding to an input power;
transforming said input power into a plurality of output currents from a plurality of secondary windings of said transformer circuit; and
controlling said input current based on a voltage of said battery pack to maintain a summation of said output currents at a predetermined value, wherein a level of said input current is controlled to increase if said voltage of said battery pack increases, and said level of said input current is controlled to decrease if said voltage of said battery pack decreases.

11. The method as claimed in claim 10, further comprising:
charging said plurality of cells with said output currents; and
balancing cell voltages of said plurality of cells according to said output currents.

12. The method as claimed in claim 10, further comprising:
controlling a state of an input switch coupled to said primary winding to control said input current; and
enabling and disabling a path of a plurality of output paths for said output currents from said secondary windings to said plurality of cells, based on said state of said input switch.

13. The method as claimed in claim 10, further comprising:
comparing a sensing voltage representing said input current with a reference voltage;
controlling a peak current level of said input current by controlling a state of an input switch coupled to said primary winding, according to said comparing; and
adjusting said reference voltage according to said voltage of said battery pack to adjust said peak current level.

14. A system comprising:
a battery pack comprising a plurality of cells;
a transformer circuit, coupled to said battery pack, comprising a primary winding configured to receive an input power of said system to generate an input current flowing through said primary winding, and comprising a plurality of secondary windings configured to transform said input power into a plurality of output currents and charge said plurality of cells, respectively; and
a control circuit, coupled to said transformer circuit, that is operable for controlling a level of said input current to increase if a voltage of said battery pack increases, and operable for controlling a level of said input current to decrease if said voltage of said battery pack decreases, so as to maintain a summation of said output currents at a predetermined value.

15. The system as claimed in claim 14, wherein said control circuit balances cell voltages of said plurality of cells according to said output currents.

16. The system as claimed in claim 14, wherein a current of said output currents for charging a first cell of said plurality of cells is less than a current of said output currents for charging a second cell of said plurality of cells if a voltage across said first cell is greater than a voltage across said second cell.

17. The system as claimed in claim 14, wherein a ratio between a first turn number of a first secondary winding of said secondary windings and a second turn number of a second secondary winding of said secondary windings is determined by a nominal voltage ratio between two corresponding cells in said battery pack.

18. The system as claimed in claim 14, wherein a secondary winding of said secondary windings receives energy, associated with said input power, from said primary winding if an input switch coupled to said primary winding is turned on, and wherein said secondary winding transforms said energy into a corresponding current of said output currents if said input switch is turned off.

19. The system as claimed in claim 14, further comprising:
a current sensor, coupled to said transformer circuit, that provides a sensing voltage corresponding to said input current to said control circuit; and
an input switch, coupled to said transformer circuit and said control circuit, wherein said control circuit controls a state of said input switch to control said input current.

20. The system as claimed in claim 19, wherein said control circuit controls a peak current level of said input current by controlling said state of said input switch according to a comparison between said sensing voltage and a reference voltage, and adjusts said reference voltage according to said voltage of said battery pack to adjust said peak current level.