# Patent

## Title
Apparatus and method for bypassing failed LEDs in lighting arrays

## Abstract

An apparatus, method and system for controlling one or multiple lighting sources such as those powered by driver circuits or voltage splitting methods, to provide an alternative current path around a failed lighting source when one or more individual lighting sources fail.

## Background
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims priority under 35 U.S.C. §119 to provisional application Ser. No. 61/218,320 filed Jun. 18, 2009, herein incorporated by reference in its entirety.


I. BACKGROUND OF INVENTION
A. Field of Invention
The present invention relates to methods of controlling multiple lighting sources such as those powered by driver circuits and voltage splitting methods, which provides alternative failure modes when one or more individual lighting sources fail.
B. Problems in the Art
LED lighting often consists of an array of LEDs comprising a number of LEDs connected in series to form a string of LEDs, and a number of strings of LEDs connected in parallel. The array may be conveniently comprised in a single fixture, such as found in overhead lighting, or may be spread out among two or more fixtures such as found in pathway lighting.
The electro-optic properties of LEDs are such that the LED functions best when current through the LED rather than voltage applied across the LED is controlled. Connecting a large number of LEDs in a series string results in a relatively low amperage and relatively high total voltage drop across the string. This is beneficial for lighting circuits using multiple LEDs. However, this has the disadvantage that a single LED open circuit failure will prevent current from flowing through all other LEDs connected in series, resulting in the elimination of the illumination provided by all remaining functional LEDs in that series string. This severely reduces the illumination produced by the LED array.
Therefore, many opportunities exist for improving the current state of lighting using multiple LEDs or other solid state sources. It is the intention of this invention to solve or improve over such problems and deficiencies in the art.
II. SUMMARY OF THE INVENTION
It is therefore a principle object, feature, advantage, or aspect of the present invention to improve over the state of the art or address problems, issues, or deficiencies in the art.
Further objects, features, advantages, or aspects of the present invention include an apparatus, method, or system which provides a relatively inexpensive electronic circuit to be placed in parallel with a single LED or with one or more strings of LEDs that will detect an open LED failure and provide an alternate current path around the LED or string(s) of LEDs.
These and other objects, features, advantages, or aspects of the present invention will become more apparent with reference to the accompanying specification and claims.
A method according to one aspect of the invention comprises automatically detecting an open LED failure and providing an alternate current path around the LED or a string or strings of LEDs including the open LED failure. Optionally, the LED or string(s) can be in a fixture or fixtures each containing multiple LEDs.
Another method according to one aspect of the invention comprises automatically detecting an open LED failure and providing an alternate current path. Said current path may be around the LED or around a string or strings of LEDs (including the open LED failure) which are used in a series of individual fixtures. Said individual fixtures may be part of a distributed array of LEDs within a plurality of fixtures which may include one or more LEDs in each fixture.
An apparatus according to one aspect of the invention comprises an alternative current path circuit placed in parallel with an LED or a string of LEDs, the alternative current path circuit being substantially inactive, and including components which are substantially inactive except for small leakage and bias current in absence of a condition indicative of an open LED failure, but becoming automatically active to pass at least substantially most of the operating current if a condition indicative of an open LED failure is sensed by the circuit. The components can include a transistor to switch between inactive and active states. The components can function to latch the circuit into an active state until automatic sensing of a condition pre-designed to unlatch.
Another aspect of the invention comprises a method of designing an alternative current path circuit, adapted for placement in parallel with an LED or string of LEDs, to be essentially inactive until a condition indicative of an open LED failure is sensed, and then automatically becoming active to bypass that LED or the string of LEDs including that LED, with substantially all the operating current. The method includes techniques for determining and setting a triggering voltage for automatic triggering of an active state for the circuit.



III. BRIEF SUMMARY OF THE DRAWINGS
FIG. 1 shows an open LED protection circuit according to one exemplary embodiment of the invention.
FIGS. 2A-B show open LED protection circuits using two transistors and resistors R1-R3 according to other exemplary embodiments of the invention.
FIGS. 3A-B show open LED protection circuits using two transistors, resistors R1-R3, and zener diode D1 according to other exemplary embodiments of the invention.
FIGS. 4A-B show open LED protection circuits using two transistors and zener diode D1.
FIGS. 5A-B show an ideal LED and its voltage/current relationship.
FIG. 6 is a graph of VToff, αVToff, of equation (17) and equation (25) described later with p=1.
FIG. 7 is a graph showing Vtrig, VSS, and Vlatch with p=1.
FIG. 8 is a graph of LED required power source voltage when m=10, p=1, and 0≦q≦5.
FIG. 9 is a graph of power source overhead voltage for number of LEDs in a sub-string with q=1.
FIGS. 10A-C show three alternative circuit arrangements according to exemplary embodiments of the present invention.
FIG. 10A shows a circuit using a zener diode.
FIG. 10B is a circuit that functions similarly to FIG. 2A using a PNP transistor and an NMOS FET.
FIG. 10C is a circuit that functions similarly to FIG. 2A using a PNP transistor and an NPN transistor.
FIG. 11A shows a single semiconductor device known as an SCR connected in parallel with an LED according to another exemplary embodiment of the present invention.
FIG. 11B is a transistorized circuit that functions similarly to FIG. 11A with the addition of the ability to modify trigger and sustain current through use of resistive components according to another exemplary embodiment of the present invention.
FIG. 11C shows a circuit similar to FIG. 11B without the series resistors according to another exemplary embodiment of the present invention.
FIG. 11D shows a circuit similar to FIG. 11B with a Darlington transistor configuration which increases the transistor gain according to another exemplary embodiment of the present invention.
FIG. 12 shows an array of LEDs within a single circuit with bypass circuits included according to another exemplary embodiment of the present invention.
FIG. 13 shows an embodiment wherein the series connected LEDs can be broken into groups such that one circuit protects a number of LEDs according to another exemplary embodiment of the present invention.
FIG. 14 shows an embodiment where several strings of LEDs are included in a single fixture or system of fixtures having OLPC (Open LED Protection Circuit) protection for each substring and a current driver for each substring according to another exemplary embodiment of the present invention.
FIG. 15 shows alternative circuit configurations that can be used to provide OLPC operation according to another exemplary embodiment of the present invention.
FIGS. 16A-D show alternative circuit configurations that can be used to provide OLPC operation according to another exemplary embodiment of the present invention.
FIGS. 17A-D show an alternative circuit configuration that can be used to provide OLPC operation according to another exemplary embodiment of the present invention.
FIG. 18 shows a graph of the operating voltages versus current for an LED, OLPC, and a single transistor and two-transistor ZOLPC for a protected single LED sub-string.
FIG. 19 shows a graph of the power dissipation of an LED, OLPC, and a single transistor and two-transistor ZOLPC for a protected single LED sub-string.
FIG. 20 shows a graph of operating voltage when a protected 3-LED sub-string is implemented.
FIG. 21 shows a graph of power dissipation when a protected 3-LED sub-string is implemented.
FIG. 22 illustrates a view of an embodiment similar to FIG. 13 wherein an array of LEDs is distributed over several fixtures according to another exemplary embodiment of the present invention.
FIG. 23 shows a plan/schematic view of a similar installation as FIG. 22.
FIG. 24 shows a view of a similar installation as FIGS. 22 and 23 having more than one LED circuit according to another exemplary embodiment of the present invention.



IV. DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS
A. Overview
To assist in a better understanding of the invention, examples of several exemplary forms it can take will now be described in detail. It is to be understood that these are but a few forms the invention could take. The invention could take many forms and embodiments. The scope of the invention is not limited by the few examples given herein. Also, variations and options obvious to those skilled in the art will be included within the scope of the invention.
B. Figures
From time to time in this description, reference will be made to the appended figures. Reference numbers or letters will be used to indicate certain parts or locations in the figures. The same reference numbers or letters will indicate the same or similar parts or locations throughout the figures unless otherwise indicated.
C. Application
This invention is intended to provide a relatively inexpensive electronic circuit 10, FIG. 1, to be placed in parallel with a single LED 20 or with one or more strings of LEDs that will provide an alternate current path around the LED or string(s) of LEDs in response to an open LED failure. When the LED is operational, the alternate circuit path current is significantly less than the LED current. When an LED open failure occurs, the alternate circuit path passes 100% of the LED current and produces a voltage drop that may be less than the LED operating voltage. The circuit components could be adjusted or trimmed so that both the LED operating voltage and current could be maintained when an LED open failure occurs. Embodiments can include fixtures with a single string of LEDs such as illustrated in FIGS. 10B-C, 11B-D, 12 and 13. Other embodiments can include fixtures with more than one string of LEDs in parallel, which use an individual driving circuit or scheme for each parallel string, such as illustrated in FIG. 14. Still other embodiments can include individual fixtures that include one or more LEDs that are controlled in accordance with the principles described herein, but which may include individual LEDs or strings of LEDs which are physically separated from each other such as in FIG. 22-24. Still other embodiments may combine these elements in other ways.
D. Methods and Embodiments
The circuit in FIG. 3A shows one way to build what is sometimes called herein an Open LED Protection Circuit (OLPC). The LEDs numbered LED1-LEDP, represent a sub-string of series connected LEDs in an array comprising a number of series connected sub-strings. The OLPC allows the current that would normally be conducted by the sub-string to have an alternate path available through, transistors Q1 and Q2, if an open circuit occurs in the sub-string of LED1-P. Conduction of the current through Q1 and Q2 will permit the remaining series connection of similar sub-strings of LEDs to remain in operation. The OLPC comprises components Zener diode D1, resistors R1-3, capacitors C1-2, and transistors Q1-2. While the LEDs, LED1-P, are operating normally, the OLPC will be inactive, conducting only small leakage and bias currents. If any of the LEDs, LED1-P, fail open circuited, the OLPC will activate providing a current path around LED1-P. Capacitors C1 and C2 filter transients to prevent false triggering of the protective circuit when the sub-string LEDs, LED1-P, are functional.
During normal operation LEDs, LED1-P, conduct the majority of the current Isource. The small reverse leakage current IlZ, of Zener diode D1, the small leakage currents, ICE, of Q1 and Q2, and the small current Ibias can be used to set the upper boundary for the value of R2. The voltage value equal to R2 multiplied by the sum of (Ibias+IlZ+ICE2), must be much less than the forward voltage Vbe1, to prevent Q1 from conducting during normal operation of the sub-string, LED1-P. Thus, R2 must be small enough to prevent Q1 from turning on due to leakage currents.
Under an open circuit failure condition of the sub-string, the voltage R2Ibias or R2Iz, must be greater than the forward voltage Vbe1, by a sufficient amount to cause both Q1 and Q2 to turn on and conduct the current Isource. Once both Q1 and Q2 start conducting, the shunt circuit operation will latch itself on to conduct the total current Isource. Once the shunt circuit is latched on, Q1 and Q2 will continue to conduct Isource until the magnitude of Isource is reduced to a value such that the voltage, 1⁄2(R2Isource), is less than the forward voltage Vbe1. The minimum value of the Isource then sets lower boundary for R2. Therefore, the voltage 1⁄2(R2Isource), must be greater than Vbe1, the turn-on voltage. The magnitude of Isource may vary when linear dimming is applied to the system and the value of R2 must be sufficient to maintain latched operation at the lowest dimming values of Isource.
The operation of the latch formed by Q1 and Q2 is explained as follows. Q1 conducts collector current IC1, when the magnitude of R2(Ibias+Iz) exceeds the junction voltage value of Vbe1. Q2 conducts collector current IC2 when the magnitude of R3IC1 exceeds the junction voltage value of Vbe2. The voltage produced at R2 provides positive feedback to the base of Q1 to keep Q1 conducting; creating a latching circuit comprising transistors Q1 and Q2. When the latch circuit turns on, Q1 and Q2 will be in saturation and the voltage magnitude that appears across the OLPC active voltage Vlatch, will have a magnitude of Vbe1+Vbe2, and the sum of each of the collector currents, Ic1+Ic2, will equal Isource. The latching operation will cease when the product of R2Isource/2 becomes less than Vbe1. Then the positive feedback is no longer sufficient to sustain the latched operation of Q1 and Q2. The current gain of transistors Q1 and Q2, the magnitude of the resistors R1 and R2, and the values of Vbe1 and Vbe2, will determine the minimum value required for the current Isource, which will maintain the latch condition. The values of Vbe1, Vbe2, D1, R1, and R2 also determine the conditions necessary to turn-on (trigger) the latch circuit in the event an open circuit of any of the LEDs, LED1-P, in the sub-string occurs.
The latch is set, or triggered, whenever any one or all of the sub-string LEDs become open circuited. The trigger must be present under three operating conditions: first, latch triggering must occur if the LED becomes open circuited while the LED circuit has power applied. Second, the trigger must occur if the LED is already open circuited and power is applied. Third, the latch must release and then re-trigger when current is pulsed while using Pulse Width Modulation (PWM) dimming or other dimming methods using variably switched current while an open-circuited LED sub-string exists. Furthermore, the trigger must be able to latch Q1 and Q2 at any value for Isource between a specified minimum and maximum value, for all the three conditions. The latch trigger voltage must not occur in any one of the three operating conditions if there are no open-circuited LEDs in the sub-circuit.
The operation of the latch trigger assumes the following two power source conditions: First, the LED current is set and controlled by the LED power source. Second, the unloaded output voltage of the power source is greater than the forward voltage (ON voltage) of the LED plus the trigger voltage needed over the system operating temperature range. The circuit shown in FIG. 5A is a piece-wise model of a typical high brightness LED used to represent the current versus voltage operation of the non-linear LED. Note that the diode D used in this model is an ideal diode, which allows current to flow in one direction and blocks current flow in the other direction but does not have any offset voltage or any forward resistance to current flow. The battery is used to represent the offset voltage needed before conduction begins and the resistance models the low dynamic resistance of the LED when it is conducting. The capacitor models the junction capacitance along with the LED stray package capacitance. This capacitance becomes significant when transients exist. FIG. 5B shows the electrical DC current voltage relationship of the piece-wise model of FIG. 5A.
The typical high brightness LED electrical characteristics modeled in FIGS. 5A-B shows that the voltage VLED, ranges from approximately 3 to 3.5 volts depending on the value of the LED operating current. Also in FIG. 3A, it is well known that the value of Vbe1 and Vbe2 for full conduction of transistors Q1 and Q2 is approximately 0.7 Volts at 25° C. In FIG. 3A, components R1 and R2 provide a voltage divider across the LED sub-string LED1-P, and produce a voltage Vbe1 that is less than 0.6 volts when the LED is operating properly. The components comprising Zener diode D1 and resistor R2, provide a trigger voltage greater than or equal to 0.7 volts when the LED is open circuited. The use of resistor R1, Zener diode D1, or both R1 and D1, is optional in the circuit, as shown in the circuits of FIGS. 2A-4B. The primary purpose of R1 and/or D1 is to establish the trigger voltage for the latch when an open circuit is present in the LED sub-string. Because the dynamic resistance of the Zener diode is much less than the value of R1, using the Zener diode will produce a much smaller trigger voltage than would be present with using R1. However, the Zener diode voltage varies with temperature more dramatically than does the resistance of R1. The choice of using R1, D1, or both R1 and D1, will depend on the application requirements.
Once transistors Q1 and Q2 are triggered on, the voltage across the sub-string will drop to Vlatch which is approximately 1.4 Volts. Once conduction starts, Q2 will hold the voltage Vbe1 to a value greater than 0.7 volts. For the circuit of FIG. 3A, the sub-string voltage is Vlatch during conduction which will be less than the Zener diode conduction voltage, so D1 will not conduct current. Also, because the magnitude of Vlatch is small, the voltage divider comprising R1 and R2 will have a negligible effect on the voltage Vbe1.
The trigger voltage that initiates conduction of Q1 and Q2 when the LED is open circuited is generated automatically by the application of the LED power source only if the power source open circuit voltage is sufficiently greater than the LED operating voltage. When any open circuit exists, the voltage developed across the open circuited sub-string will rise toward the power source unloaded voltage until the sub-string voltage equals Vtrig, the voltage necessary to turn on Q1 and Q2. The voltage rise is not instantaneous because of the capacitance of the LED as represented in FIG. 5A, and other stray circuit capacitance. The circuit components, Zener diode D1 and resistors R1, R2, will use this rise in voltage across the open sub-string to cause the voltage Vbe1 to rise until it exceeds 0.7 volts, thus turning on Q1 and Q2. Once Q1 and Q2 conduct, the positive feedback from Q2 will latch the circuit on and the voltage will drop from the Vtrig value it attained down to the value Vlatch of the latched voltages of Q1 and Q2 of approximately 1.4 Volts, thereby turning off conduction of Zener diode D1.
The preceding operational discussion indicates the necessity of the two conditions imposed on the LED driver or power source in these embodiments: i.e., the power source must be a current controlled source capable of sufficient voltage to attain trigger voltage Vtrig for the number of OLPCs in operation. When a single LED sub-string in the array is open, having sufficient voltage will not be a problem. However, if a number of LED sub-strings fail open circuited, the voltage that appears across each open circuit can only attain the power source open circuit voltage divided by the number q, of open LED sub-string circuits. In such a situation, the open circuit power source voltage must exceed q times Vtrig. Consequently, there is a limit to the number q of open LED sub-strings that can be accommodated by the power source. The number of open circuited LED sub-strings in a given series string which can be bypassed by OLPCs is determined by the ratio of the power source open circuit Voltage (unloaded voltage) and the magnitude of Vtrig.
The equations describing the operation of the LED Shunt circuit can be determined by referring to FIG. 3A and by applying the operation principles described above. The triggering characteristics are dependent on the high brightness LED forward voltage VLED, as well as the turn on or forward voltage Vbe of the transistors Q1, Q2, and the reverse voltage of Zener diode D1. These three voltages are temperature dependent, and each device has its own magnitude of temperature coefficient. The transistors Q1 and Q2, and the LEDs, LED1-P, all have negative temperature coefficients. The Zener diode D1, has a temperature coefficient which depends on the Zener voltage magnitude and which may be either negative or positive. In lighting applications that include outdoor environments, it is necessary to consider the extremes of the ambient temperatures as well as the operating device junction temperatures.
FIGS. 2A-4B illustrate several alternative circuits. The differences in the operation of the circuits between the ‘A’ and ‘B’ versions (i.e. FIG. 2A vs. 2B, FIG. 3A vs. 3B, and FIGS. 4A vs. 4B) only involve the voltage reference point of Ve1 or Ve2 in the equations and the change of references of Q1 to Q2. The performance and operation are described by the same equations as presented in the following analysis. The equations include the temperature effects needed to design and describe the operation for the OLPC configuration shown in FIG. 3A. The different options using D1, R1, or both D1 and R1 will be included when needed.
The variables used in the equations are defined as follows:

    
    
        VSS=the voltage across an LED sub-string=p times VLED.
        Vtrig=the VSS open circuit voltage at which Q1 turns on
        VthL=the threshold voltage of the LED or the voltage where current conduction through the LED starts at the temperature of TREF. It is the same as the battery voltage shown in FIG. 5A.
        VtcL=the LED voltage temperature coefficient.
        VLmax=the maximum LED sub-string forward voltage at rated current.
        Vtrig=the voltage across the LED sub-string necessary to cause Q1 and Q2 to turn on.
        Vbeth=the transistor base-emitter cut-on voltage at junction temperature of TREF.
        VZth=the cut-on reverse voltage of the Zener diode at junction temperature of TREF.
        Vz=the Zener diode reverse voltage.
        Vbeon=the transistor base-emitter voltage at full conduction at junction temperature of TREF.
        VTon=the transistor base-emitter voltage at full conduction as a function of Temperature.
        Vbe1=Vbe2=Vbe=the base-emitter voltage of Q1 and Q2.
        VToff=the voltage at Vbe to keep Q1 or Q2 from turning on.
        VtcT=the transistor Vbe voltage temperature coefficient.
        VtcZ=the temperature coefficient of the Zener diode reverse voltage.
        Vlatch=the latched voltage of Q1 and Q2 when the OLPC is activated.
        Ibias=the current through R1 and R2.
        ICE=the DC leakage current of Q1 or Q2.
        Ilz=the Zener diode leakage current.
        Iz=the forward current magnitude of the Zener diode
        Is=the source current from the power source or LED Driver.
        Ib1=the base current for transistor Q1 needed to initiate the Q1 and Q2 latch.
        Rd=the LED dynamic resistance.
        Rz=the reverse voltage Zener diode “ON” dynamic resistance.
        RLj-c=thermal resistance for LED junction-to-case.
        RZj-c=thermal resistance for Zener diode junction-to-case.
        RTj-c=thermal resistance for transistor junction-to-case.
        Rc-a=thermal resistance of the array heat sink case to ambient.
        k=ratio of R1/R2.
        m=total integer number of LEDs connected in series and mounted on an array heat sink.
        n=total integer number of LED sub-strings in an array.
        p=integer number of series connected LEDs in a sub-string.
        q=integer number of LED sub-strings that have failed open.
        TjL=LED junction temperature in ° C.
        TjT=transistor junction temperature in ° C.
        TC=temperature of the Case or Heat Sink in ° C.
        TA=ambient temperature in ° C.
        TREF=reference temperature of 25° C.
        TjZ=the temperature of the Zener diode junction in ° C.
    
    


Analysis for Holding Q1 OFF With an LED:
From FIGS. 2A-B and 3A-B, when the LED is conducting, the following conditions apply. The equations are generalized to account for some number q of protected open LED sub-strings to exist on the array fixture containing a total number m of series connected LEDs.

0≦pq≦m; p, q and n are integers satisfying 1≦p≦m/n;  (1)

Is=Ibias+ILED+Ilz+ICE  (2)

For FIGS. 2A-B, Ilz=0, For FIGS. 4A-B, Ibias=0.

Ib1=Ib2=0  (3)

VLED=VthL+RdILED+VtcL(TjL−TREF)  (4)

VSS=pVLED=p└VthL+RdILED+VtcL(TjL−TA)┘  (5)

TjL=└RLj-c+(m−pq)Rc-a┘VLEDILED+2qRc-aVTonILED+TA  (6)

VTon=Vbeon+VtcT(TjT−TREF)  (7)

TjT=└RTj-c+2qRc-a┘VTonILED+(m−pq)Rc-aVLEDILED+TA  (8)

Combining equations (3), (4), (5), (6), (7), and (8) leads to the relationship VTon and LED sub-string voltage. VSS temperature relationship given below.




  
    
      
        
          V
          SS
        
        =
        
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          ⁢
          
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                  thL
                
                +
                
                  
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                    LED
                  
                
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                    tcL
                  
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                            a
                          
                        
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                          Ton
                        
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        (
        10
        )
      
    
  
  
    
      
        
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          LED
        
        =
        
          
            
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              thL
            
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                LED
              
            
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                      Ton
                    
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                tcL
              
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        (
        11
        )
      
    
  




While the LED is operating normally, the voltage divider formed by resistors R1 and R2 (and/or the Zener diode D1 leakage current) must not allow transistor Q1 to conduct. Q1 conduction is determined by the magnitude of Vbe and this magnitude is also dependent on Q1's junction temperature. Since Q1 is not conducting, the Q1 and Q2 junction temperature will be determined by the case or heat sink temperature. Assuming that the case of Q1 is at the same temperature as the LED array heat sink case, the following temperature relationship for Q1 is determined.

VToff<Vbeth+VtcT(TjT−Tref)  (12)

TjT=TC=(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA  (13)

Combining equations (12) and (13) leads to the below equation for VToff as a function of Temperature:

VToff=Vbeth+VtcT[(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA−TREF]  (14)

Equation (9) gives the temperature variation that will be applied to the voltage divider comprising R1 and R2. Equation (14) shows the boundary conditions needed to be met by the voltage divider to prevent unwanted conduction of Q1. These two equations are used to determine ratio, R1/R2, which will assure Q1 stays off when the LED is functioning properly. The following analysis develops the conditions that can lead to the desired ratio of R1 to R2.




  
    
      
        
          V
          off
        
        =
        
          
            
              
                
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                  1
                
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                  2
                
              
            
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                    lZ
                  
                  +
                  
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                    CE
                  
                
                )
              
              ⁢
              
                
                  
                    R
                    1
                  
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                    2
                  
                
                
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                      R
                      1
                    
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            V
            Toff
          
        
      
    
    
      
        (
        15
        )
      
    
  




Because there will be some variation in the value of the cut-on voltage Vbeth from transistor to transistor, some additional protection should be allocated to the inequality of equation (15). Selecting a multiplier, α, to give a safety factor, leads to the following equation for the ratio R1/R2.




  
    
      
        
          
        
        ⁢
        
          0
          <
          α
          <
          1
        
      
    
    
      
        (
        16
        )
      
    
  
  
    
      
        
          
        
        ⁢
        
          
            
              
                
                  V
                  SS
                
                ⁢
                
                  R
                  2
                
              
              
                
                  R
                  1
                
                +
                
                  R
                  2
                
              
            
            +
            
              
                (
                
                  
                    I
                    lZ
                  
                  +
                  
                    I
                    CE
                  
                
                )
              
              ⁢
              
                
                  
                    R
                    1
                  
                  ⁢
                  
                    R
                    2
                  
                
                
                  
                    R
                    1
                  
                  +
                  
                    R
                    2
                  
                
              
            
          
          ≤
          
            α
            ⁢
            
              
            
            ⁢
            
              V
              Toff
            
          
        
      
    
    
      
        (
        17
        )
      
    
  
  
    
      
        
          
        
        ⁢
        
          k
          =
          
            
              
                R
                1
              
              
                R
                2
              
            
            ⇒
            
              
                
                  
                    V
                    SS
                  
                  
                    1
                    +
                    k
                  
                
                +
                
                  
                    (
                    
                      
                        I
                        lZ
                      
                      +
                      
                        I
                        CE
                      
                    
                    )
                  
                  ⁢
                  
                    
                      kR
                      2
                    
                    
                      1
                      +
                      k
                    
                  
                
              
              ≤
              
                α
                ⁢
                
                  
                
                ⁢
                
                  V
                  Toff
                
              
            
          
        
      
    
    
      
        (
        18
        )
      
    
  
  
    
      
        
          
        
        ⁢
        
          
            
              k
              >
              
                
                  
                    V
                    SS
                  
                  -
                  
                    α
                    ⁢
                    
                      
                    
                    ⁢
                    
                      V
                      Toff
                    
                  
                
                
                  
                    α
                    ⁢
                    
                      
                    
                    ⁢
                    
                      V
                      Toff
                    
                  
                  -
                  
                    
                      (
                      
                        
                          I
                          lZ
                        
                        +
                        
                          I
                          CE
                        
                      
                      )
                    
                    ⁢
                    
                      R
                      2
                    
                  
                
              
              ≈
              
                
                  
                    V
                    SS
                  
                  
                    α
                    ⁢
                    
                      
                    
                    ⁢
                    
                      V
                      Toff
                    
                  
                
                -
                1
              
            
            ;
          
          ⁢
          
            

          
          ⁢
          
            
          
          ⁢
          
            
              for
              ⁢
              
                
              
              ⁢
              α
              ⁢
              
                
              
              ⁢
              
                V
                Toff
              
            
            >>
            
              
                (
                
                  
                    I
                    lZ
                  
                  +
                  
                    I
                    CE
                  
                
                )
              
              ⁢
              
                R
                2
              
            
          
        
      
    
    
      
        (
        19
        )
      
    
  
  
    
      
        
          
            α
            ⁢
            
              
            
            ⁢
            
              V
              Toff
            
          
          <
          
            V
            Toff
          
        
        =
        
          
            V
            beth
          
          +
          
            
              V
              tcT
            
            [
            
              
            
            ⁢
            
              
                
                  (
                  
                    m
                    -
                    pq
                  
                  )
                
                ⁢
                
                  R
                  
                    c
                    -
                    a
                  
                
                ⁢
                
                  V
                  LED
                
                ⁢
                
                  I
                  LED
                
              
              +
              
                2
                ⁢
                
                  
                
                ⁢
                
                  qR
                  
                    c
                    -
                    a
                  
                
                ⁢
                
                  V
                  Ton
                
                ⁢
                
                  I
                  LED
                
              
              +
              
                T
                A
              
              -
              
                T
                REF
              
            
            ]
          
        
      
    
    
      
        (
        20
        )
      
    
  




A second requirement of certain exemplary embodiments is that the Zener diode D1 does not conduct while the LED is operating normally. The Zener diode is required to conduct current only during the short interval when QI is triggered on. Therefore, the temperature of the Zener diode junction will be the same temperature as the case or heat sink. The Zener diode voltage must satisfy the following:

VSS<Vz; IZ≈0  (21)

VZ=VZth+VtcZ(TjZ−TREF)  (22)

TjZ=TC=(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA  (23)

VSS<VZ=VZth+VtcZ[(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA−TREF]  (24)

For FIG. 4A-B:

(IlZ+ICE)R2≦αVToff  (25)

The previous equations show temperature dependence of VLED, Vz and Vbe. Resistors R1 and R2 are selected to be 1% resistors with ±100 ppm/° C. temperature coefficient. The value of k and α must be selected to insure the voltage Vbe for Q1 meets the boundary requirements. Graphing the VToff, αVToff, and VSS/(l+k) versus temperature will aid in selecting suitable parameter values for α and k. The parameter values used to produce the graph of FIG. 6 are: for TA ranging from −60° C. to +150° C., Vbeth=0.6V, Vbeon=0.7 Volts, VtcT=−2.2 mV/° C., VthL=2.95V, Rd=0.67Ω, VtcL=−4 mV/° C., RLj-c=8° C./W, ICE=50 μA, IlZ=3 μA, m=84, RTj-c=8.3° C./W, p=1, and Rc-a=0.2° C./W, and ILED=0.75 A.
The graph in FIG. 6 shows that the slope of the line representing Equation (17) is much less than the slopes of the lines representing VToff or αVToff. Also, the lowest margin for keeping Q1 off occurs at the highest temperature. A comfortable margin at high temperatures results when R2=1000 ohms, α=0.8 and k=18. FIGS. 4A-B removes parameters R1 and k leaving only the leakage currents IlZ and ICE to determine the value of R2 that can be used. FIG. 6 shows the results for a value of R2=3600 ohms. Resistor R2 should as large as possible to allow Q1 Q2 to remain in latched conduction when the low currents result with light dimming operations.
Analysis for Triggering Q1 ON When LED is Open:
When an open LED sub-string is encountered, Q1 in FIG. 3A must turn on, and then turn on Q2 to provide a current path around the open LED sub-string. As stated before, once both Q1 and Q2 turn on, a latch is formed that provides a bypass around the LED sub-string. This current path will be maintained until the current in that path is forced to go near zero. When the LED sub-string is open, the voltage across the open sub-string will go toward the magnitude allowed by the power source. The power source open circuit magnitude must be sufficient to cause the base voltage of Q1 in FIG. 3A to exceed Vbe by a margin sufficient to cause collector current IC1, to be sufficient to turn on Q2. The voltage Vbe, must be substantially greater than 0.7 volts at 25° C. to insure full conduction of Q1. The VSS open circuit voltage at which Q1 turns on is called Vtrig. Once Q2 is on, the positive feedback of IC2 latches Q1 on, and causes the voltage VSS to drop to the value of Vbe1+Vbe2. The following equations relate to the turn on of Q1 to latch the shunt circuit bypassing the open LED. The cut-on voltage Vbeth, is replaced with Vbeon. Note that the Zener diode current will not be zero during triggering. The duty cycle for the Zener current will be approximately 0.5% during PWM operation. Initially, IZ will peak at nearly ILED until Q1 and Q2 start conducting current.




  
    
      
        
          
        
        ⁢
        
          
            
              
                
                  
                    (
                    
                      
                        V
                        trig
                      
                      -
                      
                        V
                        Z
                      
                    
                    )
                  
                  ⁢
                  
                    R
                    2
                  
                
                
                  
                    R
                    z
                  
                  +
                  
                    R
                    2
                  
                
              
              ≥
              
                V
                Ton
              
            
            ⇒
            
              
                V
                trig
              
              ≈
              
                
                  V
                  Ton
                
                +
                
                  V
                  Z
                
              
            
          
          ;
          
            
              for
              ⁢
              
                
              
              ⁢
              
                R
                2
              
            
            >>
            
              R
              z
            
          
        
      
    
    
      
        (
        26
        )
      
    
  
  
    
      
        
          
        
        ⁢
        
          
            V
            z
          
          =
          
            
              V
              Zth
            
            +
            
              
                I
                Z
              
              ⁢
              
                R
                z
              
            
            +
            
              
                V
                tcZ
              
              ⁡
              
                (
                
                  
                    T
                    jZ
                  
                  -
                  
                    T
                    ref
                  
                
                )
              
            
          
        
      
    
    
      
        (
        27
        )
      
    
  
  
    
      
        
          
        
        ⁢
        
          
            I
            Z
          
          =
          
            
              
                I
                LED
              
              -
              
                I
                
                  b
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              -
              
                I
                
                  C
                  ⁢
                  
                    
                  
                  ⁢
                  2
                
              
              -
              
                
                  V
                  z
                
                
                  (
                  
                    
                      R
                      3
                    
                    +
                    
                      R
                      2
                    
                  
                  )
                
              
            
            ≈
            
              I
              LED
            
          
        
      
    
    
      
        (
        28
        )
      
    
  
  
    
      
        
          T
          jZ
        
        =
        
          
            
              
                R
                
                  Zj
                  -
                  c
                
              
              ⁡
              
                (
                
                  
                    
                      R
                      z
                    
                    ⁢
                    
                      I
                      LED
                    
                  
                  +
                  
                    V
                    Zth
                  
                
                )
              
            
            ⁢
            
              I
              LED
            
            ⁢
            0.005
          
          +
          
            
              (
              
                m
                -
                pq
              
              )
            
            ⁢
            
              R
              
                c
                -
                a
              
            
            ⁢
            
              V
              LED
            
            ⁢
            
              I
              LED
            
          
          +
          
            2
            ⁢
            
              
            
            ⁢
            
              qR
              
                c
                -
                a
              
            
            ⁢
            
              V
              Ton
            
            ⁢
            
              I
              LED
            
          
          +
          
            T
            A
          
        
      
    
    
      
        (
        29
        )
      
    
  
  
    
      
        
          V
          trig
        
        ≥
        
          
            V
            beon
          
          +
          
            V
            Zth
          
          +
          
            0.005
            ⁢
            
              
            
            ⁢
            
              R
              
                Zj
                -
                c
              
            
            ⁢
            
              
                V
                tcZ
              
              ⁡
              
                (
                
                  
                    
                      R
                      z
                    
                    ⁢
                    
                      I
                      LED
                    
                  
                  +
                  
                    V
                    Zth
                  
                
                )
              
            
            ⁢
            
              I
              LED
            
          
          +
          
            
              (
              
                
                  V
                  tcT
                
                +
                
                  V
                  tcZ
                
              
              )
            
            ⁢
            
               
              
                [
                
                  
                    
                      (
                      
                        m
                        -
                        pq
                      
                      )
                    
                    ⁢
                    
                      R
                      
                        c
                        -
                        a
                      
                    
                    ⁢
                    
                      V
                      LED
                    
                    ⁢
                    
                      I
                      LED
                    
                  
                  +
                  
                    2
                    ⁢
                    
                      qR
                      
                        c
                        -
                        a
                      
                    
                    ⁢
                    
                      V
                      Ton
                    
                    ⁢
                    
                      I
                      LED
                    
                  
                  +
                  
                    T
                    A
                  
                  -
                  
                    T
                    REF
                  
                
                ]
              
            
          
        
      
    
    
      
        (
        30
        )
      
    
  




Equations (26) through (30) apply for the circuits shown FIGS. 3A-B and 4A-B.




  
    
      
        
          
        
        ⁢
        
          
            
              
                (
                
                  V
                  trig
                
                )
              
              
                1
                +
                k
              
            
            ≥
            
              V
              Ton
            
          
          =
          
            
              V
              beon
            
            +
            
              
                V
                tcT
              
              ⁡
              
                (
                
                  
                    T
                    jT
                  
                  -
                  
                    T
                    REF
                  
                
                )
              
            
          
        
      
    
    
      
        (
        31
        )
      
    
  
  
    
      
        
          V
          trig
        
        >
        
          
            (
            
              1
              +
              k
            
            )
          
          ⁢
          
            
          
          ⁢
          
            {
            
              
                V
                beon
              
              +
              
                
                  V
                  tcT
                
                [
                
                  
                    
                      (
                      
                        m
                        -
                        pq
                      
                      )
                    
                    ⁢
                    
                      R
                      
                        c
                        -
                        a
                      
                    
                    ⁢
                    
                      V
                      LED
                    
                    ⁢
                    
                      I
                      LED
                    
                  
                  +
                  
                     
                    
                      
                        2
                        ⁢
                        
                          
                        
                        ⁢
                        
                          qR
                          
                            c
                            -
                            a
                          
                        
                        ⁢
                        
                          V
                          Ton
                        
                        ⁢
                        
                          I
                          LED
                        
                      
                      +
                      
                        T
                        A
                      
                      -
                      
                        T
                        REF
                      
                    
                    ]
                  
                
                }
              
            
          
        
      
    
    
      
        (
        32
        )
      
    
  




Equations (31) and (32) apply for the circuits shown in FIG. 2A-B.
FIG. 7 shows a graph of the Vtrig boundary for the circuits of FIGS. 2A-4B as a function of the ambient temperature. The graph of FIG. 7 use the same parameter values used to determine the α and k values which were used for the graph of FIG. 6, with the exception of a change in the cut-on voltage Vbeth, value to 0.7 volts at 25° C. The added parameter values (at 25° C.) used for the Zener diode are: Vzth=3.79 V and Rz=80Ω. FIG. 7 also shows a plot of VSS as temperature varies for comparison with Vtrig. As shown in the graph of FIG. 7, it is important when using FIG. 2A-B in the application, that a minimum value for k be used to minimize the magnitude of Vtrig. Conflicting requirements for the value of k include the need to maximize k to hold off the conduction of Q1 when the LED sub-string is functioning normally, and the need to minimize the value for k to keep the value of Vtrig low. For the circuits of FIGS. 3A-B and 4A-B, the value of Vz needs to be large enough to keep Q1 from turn-on when the LED sub-string is functioning, but small enough to keep Vtrig low.
If more than one LED sub-string should fail open, a greater power source voltage must be available to cause the increased number of OLPCs to trigger. For example, if there are 10 LEDs in series with each LED having an OLPC, the power source would be required to provide approximately 40 Volts to operate the LEDs at the lowest temperature. If one open LED occurs, the required power source voltage would become 38.4 volts plus the largest trigger voltage. The greatest trigger voltage will be found at the lowest operating temperature for negative coefficient devices or the highest operating temperature for positive temperature coefficient devices. From FIG. 7, the power source would need to furnish an additional 8.5 Volts (Vtrig−pVLED). Therefore, for each additional LED sub-circuit n failure allowed, the power source must be able to provide an additional n times 8.5 volts in order to activate the OLPC.
Once the latches have been triggered on, the voltage VSS drops to Vlatch, the sum of the voltages Vbe1 and Vbe2 of FIG. 5. As a result, the power dissipation of the LED sub-string is reduced to approximately half the power of one LED. Transistors Q1 and Q2 are now dissipating half of the power previously being dissipated by one LED in the LED sub-circuit. The two voltages, Vbe1 and Vbe2 are both temperature dependent and each have approximately the same magnitude. The temperature characteristics are now given by the following equations:

Vlatch=Vbe1+Vbe2≈2Vbe  (33)

Vbe=Vbeon+VtcT[(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA−TREF]  (34)

Vlatch=2Vbe=2{Vbeon+VtcT[(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA−TREF]}  (35)

FIG. 7 shows the magnitude of the voltage Vlatch, is approximately half the value of VLED. The power source voltage must adjust to the new output voltage required for the total series string but maintain the same output current. In addition, the power source voltage must provide sufficient voltage VSupply(min) to trigger the protection circuit on.
Equations (36) through (38) describe the power source voltage required to trigger and sustain operation of one or more OLPCs in a series string of LED substrings protected by OLPCs: A total number m of LEDs connected in series that has some number q, of open LED sub-circuits, will require a power source voltage that is determined by the following equations. In the following equations the resistor RW, accounts for any wiring losses in connecting the LED sub-circuits together and/or to the power source. For any array, this would be the wiring between the power source and the array. For applications having isolated LEDs connected in series, RW accounts for the wiring voltage drops between individual LEDs. Equation (36) indicates power source voltage Vsupply(Trig min) needed to trigger the OLPC. Once the OLPC circuit triggers, the required power source voltage drops to the value necessary to sustain LED operation. Equation (37) indicates that the power source sustaining voltage VSupply(sustain min) is significantly lower than the voltage needed to trigger the OLPC. Equation (38) indicates that the voltage overhead Voverhead which is the difference between the power source trigger voltage and the power source sustaining voltage. This voltage is a determined by the number of sub-string failures accepted q and the number of series connected LEDs p in a sub-string.

VSupply(Trig min)=q(Vtrig(max)+Vlatch)+(m−pq)VLED+RWILED  (36)

VSupply(Sustain min)=qVlatch+(m−pq)VLED+RWILED  (37)

Voverhead≧qVbeon+qVZth+0.005qRZj-cVtcZ (RzILED+VZth)ILED+q(VtcT+VtcZ)[(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA−TREF]  (38)

As the number p, of LEDs used in the sub-string increases, the value of Vz will increase. As a result, the temperature coefficient of Vz becomes more positive and will cause the value of VSupply(min) to be determined by the highest operating temperature requirements of the system, where Vtrig(max) occurs. Equation (36) indicates that value needed for Vtrig(max) and the number of LED sub-strings allowed to fail, will define the LED driver or power source maximum output voltage requirements. A graph of equation (36) showing values for VSupply(Trig min) vs. temperature is shown in FIG. 8, with m=10, p=1, and q ranges from 0 to 5.
The value of VZth increases asp increases. Modifying Equation (38) for VZth to be scaled by the value of p produces a graph of Voverhead as a function of p with q=1 and at a fixed ambient temperature. The maximum voltage overhead will occur at the minimum ambient temperature provided VZth has a negative temperature coefficient. The Voltage overhead graph shown in FIG. 9 assumes a minimum ambient temperature of −40° C., and a 4.7 Volt Zener diode as the model in scaling Equation (38) to produce Equation (39) for use in plotting FIG. 9.




  
    
      
        
          
            
              
                V
                overhead
              
              =
              
                qV
                Trig
              
            
          
        
        
          
            
              =
              
                q
                ⁢
                
                  {
                  
                    
                      
                        
                          
                            V
                            beon
                          
                          +
                          
                            pV
                            
                              Zth
                              ⁡
                              
                                (
                                4.7
                                )
                              
                            
                          
                          +
                          
                            0.005
                            ⁢
                            
                              
                            
                            ⁢
                            
                              pR
                              
                                Zj
                                -
                                
                                  c
                                  ⁡
                                  
                                    (
                                    4.7
                                    )
                                  
                                
                              
                            
                            ⁢
                            
                              V
                              tcZ
                            
                          
                        
                      
                    
                    
                      
                        
                          
                            
                              (
                              
                                
                                  
                                    R
                                    
                                      z
                                      ⁡
                                      
                                        (
                                        4.7
                                        )
                                      
                                    
                                  
                                  ⁢
                                  
                                    I
                                    LED
                                  
                                
                                +
                                
                                  V
                                  
                                    Zth
                                    ⁡
                                    
                                      (
                                      4.7
                                      )
                                    
                                  
                                
                              
                              )
                            
                            ⁢
                            
                              I
                              LED
                            
                          
                          +
                        
                      
                    
                    
                      
                        
                          (
                          
                            
                              V
                              tcT
                            
                            +
                            
                              pV
                              
                                tcZ
                                ⁡
                                
                                  (
                                  4.7
                                  )
                                
                              
                            
                          
                          )
                        
                      
                    
                    
                      
                        
                          [
                          
                            
                              
                                (
                                
                                  m
                                  -
                                  pq
                                
                                )
                              
                              ⁢
                              
                                R
                                
                                  c
                                  -
                                  a
                                
                              
                              ⁢
                              
                                V
                                LED
                              
                              ⁢
                              
                                I
                                LED
                              
                            
                            +
                          
                        
                      
                    
                    
                      
                        
                          
                            
                              2
                              ⁢
                              
                                qR
                                
                                  c
                                  -
                                  a
                                
                              
                              ⁢
                              
                                V
                                Ton
                              
                              ⁢
                              
                                I
                                LED
                              
                            
                            +
                            
                              T
                              A
                            
                            -
                            
                              T
                              REF
                            
                          
                          ]
                        
                      
                    
                  
                  }
                
              
            
          
        
      
    
    
      
        (
        39
        )
      
    
  




Summary:
The previous analysis has led to the generalized set of equations that take into account temperature effects in designing an LED array that include OLPC. Graphs showing the relationship between the various parameters used are easily constructed from these equations. An important objective in using these equations is to produce a design that minimizes Vtrig and determines the value of Vsupply(min). The component values for R1 and R2 determine the current magnitude where Q1 and Q2 will stop conducting ILED once the OLPC becomes latched. These resistors also must be selected to assure false triggering does not occur due to the leakage currents from Q1 and Q2. Capacitors C1 and C2 provide filtering for transients and prevent Q1 and Q2 from false triggering. The values of C1 and C2 are influenced by the value of CCE of transistors Q1 and Q2 because these components form a capacitor divider across VSS.




  
    
      
        
          
            
              V
              Ton
            
            
              I
              
                LED
                ⁡
                
                  (
                  min
                  )
                
              
            
          
          <
          
            R
            1
          
        
        =
        
          
            R
            2
          
          <
          
            
              V
              off
            
            
              (
              
                
                  I
                  bias
                
                +
                
                  I
                  CEO
                
                +
                
                  I
                  lZ
                
              
              )
            
          
        
      
    
    
      
        (
        40
        )
      
    
  
  
    
      
        
          C
          1
        
        =
        
          
            C
            2
          
          >
          
            kC
            CE
          
        
      
    
    
      
        (
        41
        )
      
    
  




For FIGS. 2A-B and 3A-B;

R1≦kR2  (42)

For FIGS. 3A-B and 4A-B;

Vz>VSS+VTon  (43)

Transistors Q1 and Q2 will share the current ILED, when the OLPC is active. The sum of IC1 and IC2 must be equal to ILED. If complementary transistors are used for Q1 and Q2, then each collector current will be approximately equal to ILED/2. As shown by the following equations, the base current specification for Q1 and Q2 must be capable of magnitudes approaching the value of ILED.

IB1≈IC2  (44)

IB2≈IC1  (45)

IE1=IE2≅ILED  (46)

IC1+IC2=ILED  (47)

The power source must satisfy two criteria. First, it must be large enough to supply Vtrig to activate the OLPC at the specified maximum number of open LED sub-circuits. Secondly, it must adjust to the needed voltage for the number of active OLPC and the remaining active LEDs without modifying the set current magnitude. The power source voltage requirements as the temperature varies are given in the following equations:
For FIG. 2A-B:




  
    
      
        
          V
          trig
        
        >
        
          
            (
            
              1
              +
              k
            
            )
          
          ⁢
          
            
          
          ⁢
          
            {
            
              
                V
                be
              
              +
              
                
                  V
                  tcT
                
                [
                
                  
                    
                      (
                      
                        m
                        -
                        pq
                      
                      )
                    
                    ⁢
                    
                      R
                      
                        c
                        -
                        a
                      
                    
                    ⁢
                    
                      V
                      LED
                    
                    ⁢
                    
                      I
                      LED
                    
                  
                  +
                  
                     
                    
                      
                        2
                        ⁢
                        
                          
                        
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For FIGS. 3A-B and 4A-B:

Vtrig≧Vbeon+VZth+0.005RZj-cVtcZ(RzILED+VZth)ILED+(VtcT+VtcZ)[(m−pq)Rc-aVLEDILED+2qRc-aVTonILED+TA−TREF]  (50)

For the power source voltage:

VSupply(Trig min)=q(Vtrig(max)+Vlatch)+(m−pq)VLED+RWILED  (51)

E. Additional Exemplary Method and Embodiment
The three circuits of FIGS. 10A-C are similar ways of providing an alternate path for the total current of an open LED.
FIG. 10A shows an electronic circuit according to an exemplary embodiment placed in parallel with each series connected LED or group of series connected LEDs. When an open circuit failure of an LED or series group occurs, an alternate conduction path around the open LED or series group is formed and only the illumination provided by the single LED or protected group is eliminated, rather than that provided by the entire string of series connected LEDs. Alternatively, when a short circuit failure of an LED occurs, the illumination of the failed LED is not present, the bypass circuit is not activated, and the remaining LEDs remain lit since they continue to be supplied series current through the shorted LED. Consequently, with the added electronic circuit, the operation of the series connected LED string is essentially the same for either a short circuited or open circuited LED failure.
FIG. 10B shows an electronic circuit that functions similarly to FIG. 10A using a PNP transistor and an NMOS FET. The advantage of FIG. 10B over FIG. 10A is that the threshold voltage of activation can be adjusted easily without having to change semiconductor devices.
FIG. 10C shows a circuit that functions similarly to FIG. 10A using a PNP transistor and an NPN transistor. The advantage of FIG. 10C over FIGS. 10A and 10B, is that a lower threshold voltage can be obtained when high currents must be bypassed.
All three circuits of FIGS. 10A-C will provide an alternate path for the total current of an open LED. The voltage drop across the shunt path must be slightly higher than the operating LED was at maximum current. Consequently, the power dissipation of the alternative circuit path when active will be slightly greater than the operating LED. It should be noted that while FIG. 10A shows a single LED and FIGS. 10B and 10C show a string of LEDs, any of the circuits may be used with either a single LED or string of LEDs as desired.
FIG. 11A shows a single semiconductor device known as an SCR connected in parallel with an LED. Resistors R9 and R10 form a voltage divider to develop a trigger voltage to the SCR when the LED fails open. Because the open circuit voltage across the LED will try to reach the voltage applied to the series LED string, the trigger voltage is sufficient to trigger the SCR on. The impedance of the voltage divider must be low enough to provide the SCR specified gate current. Once the SCR is triggered, the voltage across the LED will decrease to approximately 1.4 volts in this example. Conduction of the SCR will continue as long as the current is greater than the sustaining current, and the voltage dropped across the SCR is above the sustaining voltage. Conduction will cease when either the voltage or the current drops below the respective sustaining magnitudes. Once triggered, the voltage applied to the gate does not need to maintain any threshold.
The circuit of FIG. 11B is a transistorized circuit that functions similarly to FIG. 11A. The electronic bypass circuit comprises transistors Q35, Q36, R20, and R21. Additional components, such as diodes or resistors, may be added in order to produce a voltage match to the operating LED if necessary. When activated, the total power dissipation of the bypass circuit is less than or equal to the power dissipation of the functioning LED or LEDs that it replaces. The advantage of FIG. 11B is that the trigger current and the sustaining current can be modified and determined by the gain of the transistor and by the resistive components. In addition, R20 and R21 provide values that can be used to adjust the conduction voltage to match or track the operational LED forward voltage. The circuit of FIG. 11B can be preferred in many situations. The circuit of FIG. 11C is another transistorized circuit that functions similarly to FIG. 11A. The circuit of FIG. 11D is a circuit similar to FIG. 11B with a Darlington transistor configuration which increases the transistor gain which maybe desirable in some circumstances.
The purpose of these circuits is to provide an alternate current path around an open LED failure in a series connected string of LEDs in order to maintain the original current magnitude in the remaining operational LEDs. The circuit provides a path that has the same magnitude of current as the functioning LED and has a voltage drop that is less than or equal to the voltage drop of the functioning LED. Once the alternate current path is established, the alternate path remains operational until power is removed (and is reestablished once power is again applied. In addition, the alternate conducting path is able to operate over the entire LED operating current range.
FIG. 12 shows an array of LEDs within a single circuit with bypass circuits such as described above included. When an LED fails and becomes an open circuit, the voltage applied to the entire series LED string will appear across the open LED, which will trigger the alternate circuit ON causing a low impedance shunt to appear across the open LED. Once the circuit is triggered ON, the circuit is latched ON and the current will continue in the alternate path until the string current falls below a sustaining current value, or the voltage applied to the string falls below a sustaining voltage. The sustaining current is determined by the values of the resistors and current gain of the transistor. The sustaining voltage is established by the transistor base emitter junction voltage.
F. Additional Method and Embodiment
FIG. 13 shows an alternate embodiment wherein the series connected LEDs can be broken into groups such that one circuit protects a number of LEDs. For example, one open LED bypass circuit would protect a group of, e.g., 10 LEDs. So if one LED failed as an open circuit in a series circuit of, e.g., 100 LEDs, a bypass circuit would bypass a group of 10 LEDs including the failed LED, leaving 90 out of the hundred LEDs operational. Since the LED string is driven by a current source, the voltage across the string will adjust to the correct value for the reduced number of active LEDs. The fixtures can be connected as an array of lights which may include a bypass circuit for each light, or for several lights as part of a string. If the configuration is set to bypass several fixtures if one light fails, the fixtures can potentially be wired so that alternating lights will be out, rather than several lights in a row.
FIG. 14 shows an additional embodiment where several strings of LEDs are included in a single fixture or system of fixtures having OLPC protection for each substring. Each string has a separate current driver.
G. Additional Method and Embodiment
The circuits shown in FIGS. 15-17D provide an alternative circuit configuration that can be used to provide OLPC operation. The circuits of FIGS. 16A-D and 17A-D are functionally similar to the simpler circuit shown in FIG. 15.
The OLPC circuit of FIG. 15 is a Zener diode D1, that conducts the current of the LED series sub-string when any one of the diodes, LED1-LEDP, becomes open circuited. When an open circuit occurs, the voltage across the sub-string containing the open LED will try to attain the LED power source (or driver) open-circuit voltage, but the sub-string voltage will be clamped to the reverse breakdown voltage of the Zener diode D1, and all of the current that was going through the sub-string will now be conducted by the Zener diode. To prevent the Zener diode from conducting current when the LED sub-string is functioning properly, the magnitude of the Zener reverse breakdown voltage must be greater than the LED sub-string maximum forward voltage. As a result of the larger operating voltage for an activated Zener diode OPLC, the power dissipation of the activated OLPC will be greater than the power dissipation of the functioning LED sub-string it protected. The Zener diode form of the OLPC will be designated ZOLPC for the remainder of the discussion.
The ZOLPC does not form a latching circuit so a triggering voltage is not required. Conduction is determined only by the magnitude of the voltage applied to the ZOLPC, and as a result, any false conduction would quickly be extinguished by the lower conduction voltage of a parallel operating LED sub-string. Therefore, the maximum power source open-circuit voltage needed to assure operation of the ZOLPC will be determined by total number of series LEDs plus the number of operating LED sub-strings plus the maximum voltage of the ZOLPC times the number of allowed active ZOLPCs.
Since the ZOLPC does not form a latching circuit and the implementation requires the ZOLPC to have a slightly greater conduction threshold voltage than the parallel LED substring, the power dissipated by the ZOLPC will be significantly greater than the power dissipated by the protected LED sub-string, should an LED in the sub-string become open circuited. The power dissipation for LED sub-strings containing more than 1 or 2 LEDs may become prohibitive for the ZOPLC arrangement. For this reason, this shunt circuit configuration is not the preferred circuit configuration for the OLPC.
The simple circuit shown in FIG. 15 only requires a Zener diode to construct the ZOLPC. When used to protect a high power LED, 1 Watt or more, it requires a power Zener diode. Power Zener diodes are not readily available in the market place and are expensive devices. FIGS. 16A-D show various ways to shift the power dissipation of the zener diode to a power transistor or power FET. For all the circuits shown in FIG. 16A-D, the Zener diode is used only to hold the power device off until an open LED in the sub-string occurs. Once an open circuit in the LED sub-string exists, the voltage across the ZOLPC will automatically rise towards the open circuit voltage of the power source. When the voltage exceeds the Zener diode reverse breakdown voltage, a current flows through the diode and will turn on the power transistor. The current gain of the power transistor is used to produce negative current feedback to the positive terminal of ZOLPC clamping the voltage across the LED sub-string to a value slightly greater than the Zener voltage. The power transistor now conducts the current that originally was conducted by the LED, minus the current needed to bias the power transistor on. The power dissipation in the clamping transistor is approximately the voltage across ZOLPC time the current ILED. All the circuits in FIG. 16A-D provide the same function and can be implemented with power transistor types NPN, PNP, NMOS FETs, or PMOS FETs.
The gain of the power transistor will influence the voltage across the ZOLPC. If the gain of the power transistor is low, there will be an increase in the voltage across the ZOLP as the series current applied to the LED Lighting System is increased. FIGS. 17A-D show a two transistor ZOLP configuration which can be implemented to increase the gain of the system and reduce the change in voltage across the ZOLPC as the LED Lighting System current increases. Transistors Q1 in FIGS. 17A-D provide additional current gain to bias the power transistors Q2 on. Because of the added gain, any increase in voltage across ZOLPC gets amplified and causes the current through the power device to increase, producing a tighter clamp on the voltage magnitude across ZOLP.
The temperature characteristics of the LED and the ZOLPC devices are important parameters that must be considered in the design. In order to minimize the power dissipation of the active ZOLPC, all components should have negative temperature coefficients to match the negative temperature coefficient of the LEDs. The ZOLPC is not a preferred embodiment of the invention, so the temperature analysis is not included here.
FIG. 18 shows a graph of the operating voltages for LED, the OLPC, and a single transistor and two-transistor ZOLPC for a protected single LED sub-string. FIG. 19 shows a graph of the power dissipation of the LED, the OLPC, and a single transistor and two-transistor ZOLPC for a protected single LED sub-string. For a protected sub-string with multiple LEDs, the OLPC trigger voltage will increase but not the active voltage of the OLPC. Consequently, the power dissipated by the active OLPC does not increase with the number of LEDs in the substring. For the ZOLPC, the active voltage must increase to accommodate the increased voltage of the sub-string when the LEDs are active. Since the ZOLPC active voltage is higher, the power dissipated by active ZOLPC will also increase as the number of LEDs protected in the sub-string increases. FIG. 20 shows a graph of operating voltage when a protected 3-LED sub-string is implemented. FIG. 21 shows a graph of power dissipation when a protected 3-LED sub-string is implemented.
These graphs are valid representations for operation at 25° C. and show the performance difference one can expect from the various circuit arrangements described. The value of the voltage where the ZOLPC circuit becomes active must be adjusted to insure the ZOLPC circuit is not active at the LED Sub-string operating voltage at the lowest temperature. Similarly, the trigger voltage of the OLPC circuit must be greater than the LED Sub-string operating voltage at the lowest temperature.
H. Additional Method and Embodiment
FIG. 22 illustrates a view of an embodiment similar to FIG. 13 wherein an array of LEDs is distributed over several fixtures. A grouping of bollard type pathway light fixtures 100 are arranged along and provide illumination 40 for pathway 42. These fixtures enclose one or more LEDs within each housing.
FIG. 23 illustrates a plan view of this type of installation. Fixtures 100 are connected by means of circuit 740. Driver 710 provides power to circuit 740 and could be located remotely or within one of the fixtures. Fixtures 100 include one or more LEDs and a bypass circuit. If the LED or LEDs in one fixture fail, the rest of the fixtures remain illuminated.
FIG. 24 illustrates a similar installation having two series circuits 840 and 850 which power alternate lamps 100 and 200. Control 810 can contain separate bypass circuits for groups of fixtures 100 and 200. If a single lamp 100 fails open, the bypass circuit will bypass circuit 840. The remaining lamps 100 will not be illuminated, but circuit 850 will still be receiving power. Lamps 200 will remain illuminated. Note that many circuits could be provided, with each circuit having two or more fixtures or LEDs per circuit. Depending on the application and wiring costs (including burial, conduit use, terrain, etc.) it could be advantageous to configure this system with various types of bypass systems. These systems could allow a bypass circuit for each LED or single-LED fixture, a bypass circuit for multiple LEDs within a fixture, or for multiple fixtures. For instance, these groups of LEDs or fixtures could be distributed such that in the event of a single bypass, no two lights in close proximity would be disabled which could still allow use of the pathway. Alternatively, several LEDs or fixtures in a row might be wired as part of a single string, all of which would be bypassed in the event of an open LED. This might be more appropriate where generalized lighting is more available in addition to the pathway lighting.

## Claims

1. A method for controlling a string of multiple light sources operatively connected in series and powered by a driver circuit having an unloaded power source voltage by providing an alternative current path around each of one or more substrings having one or more of the multiple light sources, each substring having an operating voltage comprising:
(a) allowing significantly less than operating current through the alternative current path until an open circuit condition in the substring indicative of a failure of a lighting source of the substring; and
(b) triggering substantially all operating current to pass through the alternative current path of the substring by a triggering voltage which is effective over a range of ambient temperatures and operating conditions by the unloaded power source voltage of the driver circuit being greater than the operating voltage of the substring and the trigger voltage needed over the temperature range;
(c) to allow operating current to automatically bypass the substring of light sources including the light source or sources sensed to have failed so it is available for other light sources in the string over the range of ambient temperatures and operating conditions.

2. The method of claim 1 further comprising passing essentially 100% of the operating current around the failed lighting source.

3. The method of claim 1 further comprising multiple strings of light sources in operative connection.

4. The method of claim 1 further comprising adjusting or trimming voltage and/or current so that operating voltage and current to the other light sources can be maintained when a single light source open failure occurs.

5. The method of claim 1 further comprising detecting an open failure by monitoring voltage relative to a pre-set triggering voltage.

6. The method of claim 1 wherein the alternative current pathway is not activated on a short circuit of a single light source.

7. The method of claim 1 wherein the alternative current pathway is operated until power drops below a certain level or is removed from the circuit.

8. The method of claim 1 wherein the light source comprises a solid state source.

9. The method of claim 1 wherein the bypass occurs at a predesigned triggering voltage and the alternative current path is latched to active for any of the following conditions;
(a) the sensed failure occurs while operating power is through the multiple light sources; or
(b) the failure occurs before operating power is applied to the multiple light sources.

10. An apparatus for controlling multiple light sources powered by a driver circuit to provide alternative failure mode when one or more individual light source fails, comprising:
(a) an alternative current path circuit in parallel with a subset of the multiple lighting sources, the alternative current path circuit having at least one component having a temperature characteristic related to ambient temperature or operating conditions;
(b) the alternate circuit path current being significantly less than the single lighting source current such that when the single light source open failure occurs, the alternative circuit triggers and passes on the order of 100% of the single lighting source current to maintain current to the other lighting sources, the temperature characteristic of the component and the driver circuit correlated to provide sufficient power to the alternative current path for effective triggering over a selected range of ambient temperatures or operating conditions.

11. The apparatus of claim 10 further comprising producing voltage drop that is less than the light source operating voltage.

12. The apparatus of claim 10 further comprising a component to adjust or trim operating voltage and/or current that can he maintained when a light source open failure occurs.

13. The apparatus of claim 10 wherein the circuit is electronic or primarily electronic.

14. The apparatus of claim 10 wherein the light source comprises a solid state lighting source.

15. The apparatus claim 10 wherein the circuit comprises a zener diode, a PNP transistor and an NMOS FET, a PNP transistor and an NPN transistor, an SCR, or a transistorized circuit.

16. The method of claim 1 wherein the triggering voltage is calibrated by selection of components of an alternate current path circuit according to anticipated system operating temperature range where under the entire temperature range the triggering voltage allows a plurality of open LED strings without exceeding the available open circuit voltage of the power source.

17. The method of claim 16 where the anticipated system operating temperature is 32° F. (0° C.) to 300° F. (150° C.).

18. The method of claim 16 where the anticipated system operating temperature range is 0° F. (−18° C.) to 300° F. (150° C.).

19. The method of claim 16 where the anticipated system operating temperature is −40° F. (−40° C.) to 300° F. (150° C.).

20. The method of claim 16 where the anticipated system operating temperature is −75° F. (−59° C.) to 300° F. (150° C.).

21. The method of claim 1 wherein the triggering voltage (Vtrig) is no more than four times the substring voltage (Vss) for an LED substring containing a single LED at −60° C. and is no more than 2.5 times the voltage Vss at 150° C.

22. The method of claim 21 wherein the predesigned triggering voltage Vtrig is no more than 135% of the voltage Vss for an LED substring containing a single LED at −60° C. and is no more than twice the voltage Vss at 150° C.

23. The method of claim 21 wherein the LED substring contains a plurality of the value (p) LEDs and the values for the triggering voltage Vtrig and substring voltage Vss are substantially equal to (p) times the values for the single LED values.

24. The method of claim 22 wherein the LED substring contains a plurality of the value (p) LEDs and the values for the triggering voltage Vtrig and the substring voltage Vss are substantially equal to (p) times the values for the single LED values.

25. The method of claim 9 wherein the latched operation is maintained during dimming operations for lowest dimming values of operating current.

26. The method of claim 25 wherein the lowest dimming values of operating current are 50% or less than the full value of operating current.

27. The method of claim 25 wherein the lowest dimming values of operating current are 20% or less than the full value of operating current.

28. The method of claim 25 wherein the lowest dimming values of operating current are 10% less than the full value of operating current.

29. The method of claim 9 wherein latch triggering occurs under one or more of the following operating conditions:
a. when the light source becomes open circuited while the LED circuit has power applied;
b. when the light source open circuited and power is applied.

30. The method of claim 29 wherein latch must release and then re-trigger when current is pulsed while using pulse width modulation (PWM) dimming or other dimming methods using variably switched current while an open-circuited LED substring exists.

31. The method of claim 30 such that the voltage that appears across each open circuit can attain the power source open circuit voltage divided by the number q, of open LED substring circuits and the open circuit power source voltage can exceed q times Vtrig.

32. The method of claim 31 wherein the potential power source open circuit voltage is no more than two times the normal operating circuit voltage.

33. The method of claim 31 wherein when q>=3, there is a limit to the number q of open LED substrings that can be accommodated by the power source.