High Efficiency c-Silicon Solar Cells Based on 

Micro-nanoscale Structure

by Fred Semendy, Priyalal Wijewarnasuriya, and Nibir K. Dhar

ARL-TR-5576 June 2011

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Army Research Laboratory

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ARL-TR-5576 June 2011

High Efficiency c-Silicon Solar Cells Based on 

Micro-nanoscale Structure

Fred Semendy and Priyalal Wijewarnasuriya

Sensors and Electron Devices Directorate, ARL

Nibir K. Dhar

DARPA Microsystems Technology Office (MTO)

3701 North Fairfax Drive, Arlington, VA 22203-1714

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High Efficiency c-Silicon Solar Cells Based on Micro-nanoscale Structure

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14. ABSTRACT

This report describes our aim to develop high-efficiency crystalline silicon (c-Si) solar cells with increased power conversion 

efficiency (>30%) in order to reduce solar array mass, stowed volume, and cost. Our approach is based upon increasing the 

electrical junction area per unit volume using microblock design and fabrication. Current thin-film and c-Si solar cells have a 

limited conversion efficiency of 10–20% and cost $3–$5/W-peak and state-of-the-art crystalline multijunction solar cells have 

a ~30% efficiency and cost $30–$40/W-peak. Increasing the conversion efficiency to >30% enables a reduction in cost to 

<$1/W-peak, making the cells viable as power platforms supporting mobile wireless, laptops, residential, and commercial

applications. To do this, we are moving from a two-dimensional standard flat cell to three-dimensional blocks of cells. 

Incorporating nanoscaled blocks in solar cell structures enhances the performances by (1) increasing the surface area-tovolume ratio; (2) bringing the junction closer to the carrier generation region, which eliminates carrier recombination;

(3) increasing absorption of all incident photon flux; and (4) broadening the absorption spectrum. We have achieved a >20

times greater short-circuit current than conventional structures. We have also modeled the proposed structure to simulate key 

performance parameters so that they can be incorporated into the design and fabrication of the device.

15. SUBJECT TERMS

C-silicon, dry etching, microstructure, ICP-DRIE, solar cells

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Fred Semendy

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iii

Contents

List of Figures iv

1. Introduction 1

2. Solar Cell Technology 3

2.1 Current Solar Cell Technology........................................................................................3

2.2 Our Approach and Goal ..................................................................................................6

3. Experimental 9

4. Results 11

3. Conclusion 13

4. References 14

List of Symbols, Abbreviations, and Acronyms 15

Distribution List 16
iv

List of Figures

Figure 1. PV efficiency solar cells of different materials. ..............................................................1

Figure 2. Conventional solar cell. ...................................................................................................3

Figure 3. Solar radiation spectrum..................................................................................................4

Figure 4. I-V characteristics of a solar cell. ....................................................................................5

Figure 5. (a) A conventional solar cell and (b) the proposed solar cell in this study. ....................7

Figure 6. Schematics showing the various pillar structures used in simulation. ............................8

Figure 7. Conversion efficiency comparison as parameter of pillar inclinations with structure 

1: x=D/2, structure 2: x=D/4, and structure 3: x=D/16.............................................................8

Figure 8. Mask design: (a) pillar size and (b) for a 4-in Si wafer..................................................9

Figure 9. Mask design: (a) 1-cm die and (b) micro-pillars.............................................................9

Figure 10. SIMS analysis of the n+Si after phosphorus implantation..........................................10

Figure 11. Fabrication process flow..............................................................................................10

Figure 12. Thickness calculation of thermally grown SiO2..........................................................11

Figure 13. Dry etch of c-Si and variations in etch profile by changing the amount of O2 ...........12

Figure 14. Preliminary I-V results of fabricated solar cells under a 20-W white lamp light 

and room light illumination. The lamp was at a vertical distance of 18 in away from the 

target cells. ...............................................................................................................................12
1

1. Introduction

In the current energy crisis, the search for a viable alternative to hydrocarbons has taken many 

paths: nuclear, wind, solar, etc. Solar cells provide an attractive form of limitless alternative 

energy. The placement of solar cells can be unobtrusive and provide not only a source of thermal 

energy, but electricity. However, the development and implementation of effective photovoltaic 

(PV) cells is hindered by two primary components: cost and efficiency. Research into cheaper 

and more efficient solar cells has been underway for several decades, from the development of 

thin-film solar cells with efficiencies greater than 10% in the 1970s to the most recent 

developments in new PV materials achieving greater than 24% efficiency, as shown in figure 1. 

Figure 1. PV efficiency solar cells of different materials.

In general solar energy and its many applications are not widely accepted compared to 

conventional electrical energy solutions. The main reason for the low acceptance of solar energy 

is the high manufacturing costs involved. Especially in Japan and Germany, many efforts have 

been made to reduce manufacturing costs and expand the usability of solar energy in numerous 

industrial, residential, and commercial applications. In the United States, research and 

development (R&D) and applications are far behind other developed countries like Japan and 

Germany. In order to cope with the current energy crisis, it is highly desirable to build solar 

 24.7 %
2

energy infrastructures inside the United States alongside other energy solutions so that the 

United States can leapfrog other countries in the field of solar energy (1, 2).

Crystalline silicon (c-Si) and thin films (with multijunction approaches) are two major pathways 

to achieving solar energy goals. Each of these consists of multiple options (e.g., c-Si approaches 

include Si wafer and several types of sheet Si). This multiple-path characteristic makes solar cell 

technology robust and offers high potential for future advances in both performance 

improvement and cost reduction. For more demanding applications such as residential, industrial, 

and even, commercial solar generation systems, either polycrystalline or single-crystalline Si is 

the best choice due to stringent requirements for better reliability and higher efficiency than 

applications in consumer electronics. c-Si has a well-established technology base and the c-Si 

industry supplies nearly 90% of solar cell demands. c-Si will continue to dominate the market for 

at least five years. The technical progress will evolve, but advances will be integrated quickly 

into the marketplace. This will help to build the infrastructure required for continued rapid 

growth of solar cell technology. Cell conversion efficiencies for current c-Si approaches vary 

from 12% to 17% (3). Module efficiencies tend to be 0.5% to 2% lower, based on total area. 

However, due to the high cost of solar energy solutions ($3 to $5/W-peak) compared to other

conventional electrical energy solutions, this Si-based solar cell is not yet widely accepted as an 

alternative to energy solution. As many concerns associated with a steep increase in the amount 

of the worldwide energy consumption are raised, further developments in c-Si solar cell 

technology for industrial systems applications are required and have been a primary focus.

Other leading candidates for very low-cost solar cell solutions are the following thin-film

materials: (1) amorphous Si (a-Si) (4), cadmium telluride (CdTe) (5), and copper indium 

diselenide (CIS) (6), which are the most mature thin-film technologies; and (2) thin-film Si, 

which may encompass both c-Si and/or a-Si. The key metrics of thin-film progress are the same 

as those for any PV module technology—efficiency at the commercial module level, 

manufacturing cost, and outdoor module reliability. Many challenges must be overcome before 

these factors can be optimized. For thin films, the monolithic process blurs the distinction 

between cells and modules. However, commercial module efficiencies vary between 5% and 

11%. The cost of these thin-film solar cells ($3 to $5/W-peak) is almost same as that of c-Si. 

However, due to the toxic natures of these materials and concerns for the environment, thin-filmbased solar cells are not widely accepted.

To achieve a higher conversion efficiency (20% and higher), conventional multijunction

combinations of III-V semiconductors are usually used (7, 8). The materials and manufacturing 

cost of the multijunction solar cell costs more than 10 times that of Si solar cells. It is highly 

desirable to have an alternative solution of a solar cell made of Si, which could offer a higher 

efficiency (20% and higher) and have a comparable or lower cost than today’s Si solar cell.

We propose a solar cell structure that would be environmentally friendly, highly efficient, and 

cost effective. In this report, we provide an overview of a high-efficiency Si solar cell based on 
3

micro-nanostructures, which can be fabricated using standard Si integrated circuit (IC) 

technology and is amenable to mass-scale production. Details of simulation and fabrication 

technology are also provided. We believe the proposed high-efficiency Si solar cell could 

eliminate the energy crisis and greatly benefit the United States in many ways.

2. Solar Cell Technology

Before providing the technical approach for significantly increasing the conversion efficiency 

(>20%) of c-Si solar cells using less Si material (0.6 g/W, final target), we present an overview 

of current solar cell solutions and their limitations with regard to making high-efficiency solar 

cells. 

2.1 Current Solar Cell Technology

Solar cell structures have been studied extensively over the last decade for various applications. 

Figure 2 is a conventional solar cell comprising a thick p-type semiconductor layer and a thin 

n-type semiconductor layer formed on an electrically conductive substrate. 

 p-n junction

 electron

 hole

 Metal contacts

Figure 2. Conventional solar cell.

A p-n-junction is formed at the interface between the p- and n-type semiconductor layers. 

Incident sunlight entering in the cell generates electron-hole pairs after being absorbed by the pand n-type semiconductor layers. The incident light generates electrons and holes in the region 

near the p-n-junction and far from the p-n junction. The photogenerated electrons diffusing 

toward the p-n junction and entering the p-n junction region contribute to the PV effect. The two 

key factors that substantially impact the conversion efficiency of solar cell are photocarrier 

generation efficiency (PCGE) and photocarrier collection efficiency (PCCE). For 

monochromatic light, a PCGE of ~100% can be achieved by simply making the p-type layer 

thicker. However, electrons generated at the region far from the p-n junction cannot be collected 

efficiently due to many adverse recombination processes. These processes prevent 

photogenerated carriers from diffusing into the p-n junction, thus the basic structure of current 

PV cells has its own limitation on increasing the conversion efficiency.

 substrate
4

The light intensity p at certain depth x can be expressed by p(x)=Poexp(–αx), where Po is the 

peak intensity at the surface and α is the absorption co-efficient of the semiconductor into which 

light enters. The light intensity behavior inside a bulk semiconductor is approximately 

exponential in behavior. Carriers (not shown in figure 2) generated due to light flux absorbed by 

the p-n junction are only drifted by the junction field and can be collected efficiently. 

Conversely, carriers generated due to absorption of light flux by the semiconductor region are 

diffused in all directions. Only those which are generated closer (a separation distance equal to or 

less than the diffusion-length of the semiconductor) to the p-n junction can be collected. Carriers

that are generated far away (a separation distance longer than the diffusion-length of the

semiconductor) from the p-n junction are recombined and lost. The light flux is usually lost

either by escaping or being absorbed by the substrate. For these reasons, it is difficult to increase 

the conversion efficiency of the cell if the standard structure is used. Apart from these, one has to 

consider the bulk recombination process, which reduces the minority carrier lifetime. To 

alleviate this, we need defect-free materials. In addition, the nature of the surface plays an 

important role. High reflection at the illuminated surface can be avoided by antireflection coating 

and other light-trapping effects. Because of the bandgap limitations, long wavelength light 

escapes in Si, which can be avoided by having multiple passes, optimizing the reflection from 

front to back and front surfaces, and optimizing the substrate thickness. 

The solar spectrum is shown in figure 3. The spectrum, as seen from a satellite, is referred to as 

the AM0 spectrum (where AM stands for air mass) and closely fits the spectrum of a black body 

at 5800 K. The total power density is 1353 W/m2.

Figure 3. Solar radiation spectrum.
5

The solar spectrum, as observed on Earth, is modified due to absorption in the atmosphere. For

AM1 (normal incidence), the power density is reduced to 925 W/cm2; whereas, for AM1.5 (45

above the horizon), the power density is 844 W/m2. The irregularities in the spectrum are due to

absorption at specific photon energies. Figure 4 gives the current-voltage (I-V) graph for a solar 

cell. 

Figure 4. I-V characteristics of a solar cell.

The important parameters for calculating power conversion are the following:

• The short-circuit current (ISC) is the point at which the I-V curve crosses the x-axis at 0 V.

When a solar cell is operated at short circuit (that is, when a low-resistance connection is

established by accident or intention between two points in an electric circuit so the current

tends to flow through the area of low resistance bypassing the rest of the circuit), V = 0 and

the current (I) through the terminals is defined as the short-circuit current. 

• The open-circuit voltage (VOC) is the voltage at which there is zero current flow. When a

cell is operated at open circuit (that is, an incomplete electrical circuit in which no current

flows, I = 0), the voltage across the output terminals is defined as the open-circuit voltage.

• The maximum power output (PMAX) is the voltage and current points where the cell is 

generating its maximum power. The PMAX point on an I-V curve is often referred to as the 

maximum power point (MPP).

• The current at maximum power (Im) is the cell’s current level at PMAX.

• The voltage at maximum power (Vm) is the cell’s voltage level at PMAX. 

• Fill factor (FF) is PMAX divided by VOC multiplied by ISC. FF is a popular measurement 

because it indicates the cell’s efficiency under a specific spectrum and intensity of light. In 
6

essence, it calculates the percentage of performance of the real cell versus an ideal cell with 

no internal losses. Thus, by using the diode equation and VOC, and manipulating a number 

of equations, one can arrive at the power conversion efficiency,

m m

in

V I

P

  , (1)

which can be further modified by substituting for Im

( ) ( )

( )

m a

t

V qA QE d

hc A d

   

 

  







, (2)

where Aa is the active area and At is the total area. Thus, by increasing the junction area, one can 

maximize the power conversion efficiency. Therefore, our goal is to increase the volume-tosurface area ratio using microblock design masks. Using this technique, large junction areas can 

be made using microstructural fabrication, in which the junction is closer to the carrier 

generation region, thus reducing carrier recombination. The design is easy to implement and is 

independent of the material system. 

2.2 Our Approach and Goal

The proposed solar cell structure consists of a number of micro-nanoscaled blocks (micronanorods/wires) around and on which the p-n junction is formed, thereby increasing surface 

(junction) area, as shown in figure 5. The p-n junction is formed very close to the region where 

the carriers are generated; thus, all photogenerated carriers can be collected before 

recombination. Furthermore, incorporation of these nanoscaled blocks into the solar cell 

structure can create quantum confinement and intermediate states within the bandgap to harvest 

photons with energy less than that of the bandgap of the host material. In this way, nanoscaled 

block structures in the proposed solar cells can be optimized to absorb a large portion of the solar 

spectrum. The front-side contact is transparent so that light can pass through the semiconductor, 

and the back-side contact is formed on the substrate. Differences in the proposed solar cell over 

conventional solar cells include a larger junction area due to use of nano (or micro) structures

and the creation of a junction closer to the carrier generation region, which eliminates carrier 

recombination. In addition, most of the incident photons flux is absorbed due to the angular 

nature of the microstructure. Furthermore, there is less usage of Si, which, in turn, makes the 

device more cost effective, enabling it to be used as the universal structure for significantly highefficiency solar cells. Precise control of the nano (or micro) cylindrical blocks’ (a.k.a., pillars) 

length, density per unit area, reliability, and mechanical robustness will be ensured. The 

proposed unique and novel structure approaches will open doors to the incorporation of 

nano/microscaled cylindrical blocks for designing significantly high-conversion-efficiency solar 

cells.
7

 

(a) Conventional structure (b) proposed structure 

Figure 5. (a) A conventional solar cell and (b) the proposed solar cell in this study.

The proposed solar cell can be made from any kind of system material. For example, the

substrate material can be any semiconductor, such as Si, gallium arsenide (GaAs), indium 

phosphide (InP), etc., glass, metal, or polymer. If the substrate is a semiconductor such as Si, 

micro-nanopillars can be formed using the etching approach, and if the substrate base material is 

InP, similar micro-nanopillars can also be made on the substrate. The proposed structure can also 

be fashioned from polymer to make the solar cells flexible. In this case, nanorods can be 

incorporated into the polymer materials to make a flexible solar cell using the proposed structure. 

We propose to fabricate the solar cell based on micro-nanocylindrical blocks, having a high 

conversion efficiency and high Si intensity.

We have carried out the simulation and also fabricated test structures on the proposed solar cell 

incorporating cylindrical structures. Initial experimental results demonstrated that the proposed 

solar cell showed significant conversion efficiency (>20 times greater compared to conventional 

cells). Theoretical estimated results showed that the conversion efficiency can be increased to 

>30% for a c-Si solar cell. Simulation and experimental results are explained in sections 3 and 4.

The proposed structure was calculated for a Si-based solar cell to see the benefits of the 

structure, varying the side tilting angle at fixed height of 5 μm. Noted here that the thickness of 

the c-Si wafer (5 x 1017cm–3) considered in the simulation was 350 μm, which is frequently used 

in solar cell fabrication. A shallow p-n junction of 0.1 μm was considered in the simulation. A 

vertical trapezoidal structure was assumed to be formed using the Si wafer. In simulation, it was 

also assumed that the carrier movement was mainly dominated by diffusion, rather than drift, as 

the estimation of the depletion region due to built-in-potential was 120 nm. We used standard 

solar irradiance and the absorption coefficient for Si in simulation. 

Figures 6 and 7 show the simulation results of conversion efficiencies at various tilting angles. 

Pillar structure 1 shows less angle and structure 3 shows a 86° angle, nanopillar (conventional), 

without the pillar case. Decreasing the tilting angle offers higher conversion efficiencies over

35%, which are thought to be due to (1) increasing the junction area, (2) increasing the
8

absorption spectra, and (3) increasing the light intensity due to the self-concentrating effect of 

the cylinder (pillar). More simulation and optimization are necessary to accurately access the

conversion efficiency for the proposed structure.

 Conversion efficiency estimation 

 

 D D D

 h X X X 

 D/2 D/2 D/2

Figure 6. Schematics showing the various pillar structures used in simulation.

Figure 7. Conversion efficiency comparison as parameter of pillar inclinations with 

structure 1: x=D/2, structure 2: x=D/4, and structure 3: x=D/16.

h

 Structure 1

h

 Structure 2 

h

Structure 3
9

3. Experimental 

The proposed solar cell structure based on micro-nanopillars was fabricated using a c-Si solar 

cell. Figure 8 shows the mask design part of the work with (a) the pillar size in consideration and 

(b) for a 4-in Si wafer. Figure 9 shows (a) a 1-cm die and (b) the micro-pillar etching area 

showing the size of the pillar (2 μm). 

 

 

 

(a) (b)

Figure 8. Mask design: (a) pillar size and (b) for a 4-in Si wafer.

 

(a) (b)

Figure 9. Mask design: (a) 1-cm die and (b) micro-pillars.

Boron-doped, 4-in crystalline Si wafers with a conductivity of 10 Ωcm and a thickness of 

500 μm were used for the fabrication. The wafer was p-type doped at ~1015 cm–3. For the 

junction formation, phosphorus was ion implanted at an energy level of 100 keV with a dosage 

of 3 x 1013 cm–2to enhance the layer to n+. Secondary ion mass spectrometry (SIMS) analysis 

was performed to verify the doping level and the results are shown in figure 10.

 m = D = 2 mm to 10 mm

 1 cm Micro - pillars
10

Figure 10. SIMS analysis of the n+Si after phosphorus implantation.

The fabrication process flow for the c-Si solar cell with micro-nanopillars is shown in figure 11.

To form vertically arranged and well-defined microblocks in the c-Si (<100>) substrate, the 

standard dry-etching technique was used. After cleaning the wafer using the standard cleaning 

procedures, photolithographic techniques were used to define the micro-pillar structure. This was 

followed by etching using the inductively coupled plasma (ICP) deep reactive ion etching

(DRIE) technique. 

 Simulation Mask Design Obtain Si c-wafers

- Microblock design Conventional p-type

- Material parameters micro-block design

 Lithography Junction 

 Develop Formation Passivation

 ICP dry etch

 Characterization Data Analysis

Figure 11. Fabrication process flow.

A mixed gas system of sulfur hexafluoride (SF6) and oxygen (O2) was used for the dry etching 

with varying pressures, gas ratios, times, and temperatures. Cleaned wafers were n+ ion 

implanted, followed by passivation using thermal growth of silicon dioxide (SiO2). The thickness 

of the thermally grown SiO2 is calculated as shown in figure 12.
11

Figure 12. Thickness calculation of thermally grown SiO2.

After passivation and metallization, devices were characterized and data were analyzed.

4. Results

The dry-etch process to create the micro-pillars was found to be complicated and difficult to

optimize. Parameters such as pressure, amount of gas, radio frequency (RF), ICP power, time,

and gas ratio had to be varied to obtain the right recipe to etch down and create the micro-pillars. 

Figure 13 shows some of the micro-pillars obtained by ICP-DRIE process. As shown in the 

image, the walls are vertical in the etch process. The actual case (as shown in figure 13)

demonstrates how not enough O2, the right amount of O2, and excess amount of O2 can provide 

the best possible etch required by the modeling. In the actual experiment, along with the 

variations in the amount of O2 used, changes in other parameters were also made to fine-tune to 

optimize the etch process. 
12

Figure 13. Dry etch of c-Si and variations in etch profile by changing the amount of O2.

For the fabrication of the devices, we used conventional cells of 1 x 1 cm

2

from a 4-in silicon 

wafer. After the fabrication process, each cell was diced out and wire bonded for

characterization. A 20-W white lamp light was used for the initial I-V characterization. During 

the measurement, the lamp was kept at a vertical height of 18 in, directly above the sample. 

Figure 14 shows the preliminary I-V characteristics of the solar cells and the conventional (flat,

without pillar) cell. 

Figure 14. Preliminary I-V results of fabricated solar cells under a 20-W white lamp light and room 

light illumination. The lamp was at a vertical distance of 18 in away from the target cells.
13

Conversion power for the micro-pillar and conventional cells was found to be 200 and 

20 μW, respectively, showing a more than ~180 μW power difference. Further optimization of

fabrication process and structural designs are necessary to further enhance the conversion

efficiency performance. Initial experimental results indicate that the proposed solar cell 

structure promises to improve the conversion efficiency using thinned substrates of any material 

system. The proposed solar cell structure is expected to offer higher efficiency for all 

semiconductor materials as compared with the standard solar cell. Even though the final power 

conversion efficiency was not as expected, we intend to optimize the process by (1) dry etching 

specially on smaller scale pillars, (2) optimizing the lithography, (3) improving the P and n+

contacts, (4) implanting conditions for the P dopant, (5) diffusing P into silicon, (6) solving the 

passivation issues, and (7) exploring the possibility of boron doping in Si. These optimizing 

processes can be tried on c-Si as well as in thin solar cell materials.

3. Conclusion

In this report, we present a high-efficiency Si solar cell that consists of micro-nanoblocks with an 

increased surface area-to-volume ratio and a p-n junction over the 3-D blocks for the top and 

bottom contacts. Simulation results indicate that (1) the absorption efficiency was increased due 

to self concentrating or photon trapping and (2) the absorption spectra increased in comparison 

with the flat device. Simulation from first principles indicates that the short-circuit current 

increased due to brining the junction closer to the carrier generation sites. These phenomena

increased the conversion efficiency of the Si solar cell. Experimental results of the solar cell 

fabricated using conventional photolithographic techniques showed that the short-circuit current 

of the solar cell based on the micro-nanoscale structures was 18 times greater than the standard 

solar cell fabricated on the same Si substrate. 

In order to develop this high-efficiency solar cell, we will need to further optimize the design and 

iterate the parameters to accurately model the proposed solar cell, and then evaluate and 

demonstrate our ability to fabricate the optimized solar cell.

We believe that proposed solar cell technology will enable a high-conversion-efficiency, costeffective solar cell technology that can be mass-produced and customized for commercial and 

defense systems.
14

4. References

1. The U.S. Photovoltaic Industry Roadmap. National Renewable Energy Laboratory: Golden, 

CO, January 2003.

2. World Energy Outlook 2001, published by the Energy Information Administration (EIA).

3. Zhao, J.; Wang, A.; Green, M.; Ferrazza, F. Novel 19.8% Efficient ‘Honeycomb’ Textured

Multicrystalline and 24.4% Monocrystalline Silicon Solar Cell. Applied Physics Letters 

1998, 73, 1991–1993.

4. Yamamoto, K.; Yoshimi, M.; Suzuki, T.; Tawada, Y.; Okamoto, T.; Nakajima, A. Thin Film 

Poly-Si Solar Cell on Glass Substrate Fabricated at Low Temperature. Presented at MRS

Spring Meeting, San Francisco, CA, April 1998.

5. Wu, X.; Keane, J. C.; Dhere, R. G.; DeHart, C.; Duda, A.; Gessert, T. A.; Asher, S.; Levi, D. 

H.; Sheldon, P. 16.5%-efficient CdS/CdTe Polycrystalline Thin-film Solar Cell. 

Proceedings of the 17th European Photovoltaic Solar Energy Conference, Munich,

Germany, 22–26 October 2001, 995–1000.

6. Contreras, M. A.; Egaas, B.; Ramanathan, K.; Hiltner, J.; Swartzlander, A.; Hasoon, F.;

Noufi, R. Progress Toward 20% Efficiency in Cu(In,Ga)Se Polycrystalline Thin-film Solar 

Cell. Progress in Photovoltaics: Research and Applications 1999, 7, 311–316.

7. King, R. R.; Fetzer, C. M.; Colter, P. C.; Edmondson, K. M.; Law, D. C.; Stavrides, A. P.;

Yoon, H.; Kinsey, G. S.; Cotal, H. L.; Ermer, J. H.; Sherif, R. A.; Karam, N. H. Latticematched Proc. of SPIE Vol. 7683 76830O-13 Downloaded from SPIE Digital Library on 02 

Mar 2011 to 158.12.36.175. Terms of Use: http://spiedl.org/terms and metamorphic 

GaInP/GaInAs/Ge concentrator solar cells. Proceedings of the World Conference on 

Photovoltaic Energy Conversion (WCPEC-3), Osaka, Japan, May 2005.

8. Multijunction Solar Cell, DOE Research Report, 2004.

9. Taguchi, K. Ch. 2, WDM Technologies: Active Optical Components; Achyut Dutta, et Al., 

eds., Academic Press: San Diego, CA, 2002.
15

List of Symbols, Abbreviations, and Acronyms

a-Si amorphous SI

CdTe cadmium telluride

c-Si crystalline silicon

CIS copper indium diselenide

DRIE deep reactive ion etching

FF fill factor

GaAs gallium arsenide

I current

IC integrated circuit

ICP inductively coupled plasma

InP indium phosphide

ISC short-circuit current

I-V current-voltage

MPP maximum power point

O2 oxygen

PMAX maximum power output

PCCE photocarrier collection efficiency

PCGE photocarrier generation efficiency

PV photovoltaic

R&D research and development

RF radio frequency

SF6 sulfur hexafluoride

SiO2 silicon dioxide

SIMS secondary ion mass spectrometry

VOC open-circuit voltage
16

NO. OF

COPIES ORGANIZATION

1 ADMNSTR

ELECT DEFNS TECHL INFO CTR

ATTN DTIC OCP

8725 JOHN J KINGMAN RD STE 0944

FT BELVOIR VA 22060-6218

1 DARPA MTO

ATTN N DHAR

3701 NORTH FAIRFAX DR

ARLINGTON VA 22203-1714

1 CD OFC OF THE SECY OF DEFNS

ATTN ODDRE (R&AT) 

THE PENTAGON

WASHINGTON DC 20301-3080

1 US ARMY RSRCH DEV AND ENGRG 

CMND

ARMAMENT RSRCH DEV & ENGRG 

CTR 

ARMAMENT ENGRG & TECHNLGY 

CTR

ATTN AMSRD AAR AEF T J MATTS

BLDG 305

ABERDEEN PROVING GROUND MD 

21005-5001

3 CECOM NVESD

ATTN AMSEL RD NV

ATTN AMSEL RD NV A SCHOLTZ

ATTN AMSEL RD NV D BENSON

10221 BURBECK RD STE 430

FT BELVOIR VA 22060-5806

1 PM TIMS, PROFILER (MMS-P) 

AN/TMQ-52

ATTN B GRIFFIES 

BUILDING 563

FT MONMOUTH NJ 07703

1 US ARMY INFO SYS ENGRG CMND

ATTN AMSEL IE TD A RIVERA

FT HUACHUCA AZ 85613-5300

1 COMMANDER

US ARMY RDECOM

ATTN AMSRD AMR 

W C MCCORKLE

5400 FOWLER RD

REDSTONE ARSENAL AL 35898-5000

NO. OF

COPIES ORGANIZATION

1 US GOVERNMENT PRINT OFF

DEPOSITORY RECEIVING SECTION

ATTN MAIL STOP IDAD J TATE

732 NORTH CAPITOL ST NW

WASHINGTON DC 20402

1 GENERAL TECHNICAL SERVICES

ATTN G P MEISSNER

3100 ROUTE 138

WALL NJ 07719

1 DIRECTOR

US ARMY RSRCH LAB

ATTN RDRL ROE L W CLARK

PO BOX 12211

RESEARCH TRIANGLE PARK NC 

27709

62 U.S. ARMY RSRCH LAB

ATTN IMNE ALC HRR MAIL & 

RECORDS MGMT

ATTN RDRL CIO LL TECHL LIB

ATTN RDRL CIO MT TECHL PUB

ATTN RDRL SE T BOWER

ATTN RDRL SE J PELLEGRINO

ATTN RDRL SED E B MORGAN

ATTN RDRL SED E K A JONES

ATTN RDRL SED E M LITZ

ATTN RDRL SED P A LELIS

ATTN RDRL SEE E K ALIBERTI

ATTN RDRL SEE E N GUPTA 

ATTN RDRL SEE E R TOBER

ATTN RDRL SEE E T ALEXANDER

ATTN RDRL SEE G WOOD

ATTN RDRL SEE I S TRIVEDI

ATTN RDRL SEE I B ZANDI

ATTN RDRL SEE I D BEEKMAN

ATTN RDRL SEE I F SEMENDY 

(5 COPIES)

ATTN RDRL SEE I G BRILL

ATTN RDRL SEE I J LITTLE

ATTN RDRL SEE I K K CHOI

ATTN RDRL SEE I K OLVER

ATTN RDRL SEE I P FOLKES

ATTN RDRL SEE I P TAYLOR

ATTN RDRL SEE I P UPPAL

ATTN RDRL SEE I S FARRELL 

(3 COPIES)

ATTN RDRL SEE I S SVENSSON 

ATTN RDRL SEE I W BECK
17

NO. OF

COPIES ORGANIZATION

ATTN RDRL SEE I W SARNEY

ATTN RDRL SEE I Y CHEN

ATTN RDRL SEE L BLISS

ATTN RDRL SEE M G DANG

ATTN RDRL SEE M G GARRETT

ATTN RDRL SEE M M REED

ATTN RDRL SEE M 

M TAYSING-LARA

ATTN RDRL SEE M M WRABACK

ATTN RDRL SEE M N BAMBHA

ATTN RDRL SEE M N DAS

ATTN RDRL SEE M P SHEN

ATTN RDRL SEE M W CHANG

ATTN RDRL SEE O N FELL 

ATTN RDRL SEE O P PELLEGRINO

ATTN RDRL SEE P GILLESPIE

ATTN RDRL SEG N MARK 

(3 COPIES)

ATTN RDRL SER E A DARWISH

ATTN RDRL SER E P SHAH

ATTN RDRL SER L A WICKENDEN

ATTN RDRL SER L B NICHOLS

ATTN RDRL SER L E ZAKAR

ATTN RDRL SER L M DUBEY

ATTN RDRL SER L M ERVIN

ATTN RDRL SER L S KILPATRICK

ATTN RDRL SER P AMIRTHARAJ

ATTN RDRL SER U C FAZI

ADELPHI MD 20783-1197

TOTAL: 75 (73 HCS, 1 CD, 1 ELECT)
18

INTENTIONALLY LEFT BLANK.