# Patent

## Title
Manufacturing method of semiconductor device comprising steps of forming oxide semiconductor film, performing heat treatment on the oxide semiconductor film, and performing oxygen doping treatment on the oxide semiconductor film after the heat treatment

## Abstract

A semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability. In a process for manufacturing a bottom-gate transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed. The transistor including the oxide semiconductor film subjected to the dehydration or dehydrogenation by the heat treatment and the oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.

## Background
TECHNICAL FIELD
The present invention relates to a semiconductor device and a manufacturing method thereof.
In this specification, a semiconductor device generally means any device which can function by utilizing semiconductor characteristics, and an electrooptic device, a semiconductor circuit, and electronic equipment are all semiconductor devices.
BACKGROUND ART
A technique by which transistors are formed using semiconductor thin films formed over a substrate having an insulating surface has been attracting attention. The transistor is applied to a wide range of electronic devices such as an integrated circuit (IC) or an image display device (display device). A silicon-based semiconductor material is widely known as a material for a semiconductor thin film applicable to the transistor; in addition, an oxide semiconductor has been attracting attention as another material.
For example, a transistor whose active layer includes an amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) and having an electron carrier concentration of less than 1018/cm3 is disclosed (see Patent Document 1).
REFERENCE


    Patent Document 1: Japanese Published Patent Application No. 2006-165528


DISCLOSURE OF INVENTION
However, when hydrogen or moisture, which forms an electron donor, is mixed into the oxide semiconductor in a process for manufacturing a device, the electrical conductivity of the oxide semiconductor may change. Such a phenomenon causes variation in the electric characteristics of a transistor using the oxide semiconductor.
In view of such a problem, one object of one embodiment of the present invention is to provide a semiconductor device using an oxide semiconductor, with stable electric characteristics and high reliability.
In a process for manufacturing a transistor including an oxide semiconductor film, dehydration or dehydrogenation is performed by heat treatment and oxygen doping treatment is performed.
One embodiment of the present invention is a method for manufacturing a semiconductor device, in which a gate electrode layer is formed, a gate insulating film is formed over the gate electrode layer, an oxide semiconductor film is formed over the gate insulating film so as to overlap with the gate electrode layer, heat treatment is performed on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film after the hydrogen atom is removed, to supply an oxygen atom to the oxide semiconductor film, a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film are formed, and an insulating film is formed over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film.
One embodiment of the present invention is a method for manufacturing a semiconductor device, in which a gate electrode layer is formed, a gate insulating film containing an oxygen atom as a component is formed over the gate electrode layer, oxygen doping treatment is performed on the gate insulating film to supply an oxygen atom to the gate insulating film, an oxide semiconductor film is formed over the gate insulating film so as to overlap with the gate electrode layer, heat treatment is performed on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film after the hydrogen atom is removed, to supply an oxygen atom into the oxide semiconductor film, a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film are formed, an insulating film is formed over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film and contain an oxygen atom as a component, and oxygen doping treatment is performed on the insulating film to supply an oxygen atom to the insulating film.
One embodiment of the present invention is a semiconductor device comprising a gate electrode layer, a gate insulating film over the gate electrode layer, an oxide semiconductor film over the gate insulating film, a source electrode layer and a drain electrode layer over the oxide semiconductor film, an insulating film provided over the source electrode layer and the drain electrode layer so as to be in contact with the oxide semiconductor film, and a wiring layer provided over the insulating film so as to be electrically connected to the source electrode layer or the drain electrode layer. According to the embodiment, the wiring layer is provided in an opening formed by removing part of the insulating film and part of the source electrode layer and an opening formed by removing part of the insulating film and part of the drain electrode layer; the part of the source electrode layer and the part of the drain electrode layer are removed in the openings, so that depressions are formed in the source electrode layer and the drain electrode layer; the wiring layer is provided so as to be in contact with inner wall surfaces and bottom surfaces having smaller film thicknesses of the depressions of the source electrode layer and the drain electrode layer in the openings; and oxygen concentrations of the bottom surfaces of the depressions of the source electrode layer and the drain electrode layer are lower than those of top surfaces of the source electrode layer and the drain electrode layer.
One embodiment of the present invention is a semiconductor device in which the oxide semiconductor film in the above structure includes a region where the oxygen content is greater than that based on a stoichiometric composition ratio of a crystalline state of an oxide semiconductor of the oxide semiconductor film.
One embodiment of the present invention is a semiconductor device in which the oxide semiconductor film in the above structure includes a region where the oxygen content is greater than that based on a stoichiometric composition ratio of a crystalline state of an oxide semiconductor of the oxide semiconductor film, at least in an interface with the insulating film or a vicinity thereof.
Note that the above-described “oxygen doping” means that oxygen (which includes at least one of an oxygen radical, an oxygen atom, and an oxygen ion) is added to a bulk. Note that the term “bulk” is used in order to clarify that oxygen is added not only to a top surface of a thin film but also to the inside of the thin film. In addition, “oxygen doping” includes “oxygen plasma doping” in which oxygen in the form of plasma is added to a bulk.
By the oxygen doping treatment in the manufacturing process of the transistor including the oxide semiconductor film, an oxygen-excessive region where the amount of oxygen is greater than the stoichiometric proportion can be provided in at least one of the gate insulating film (bulk thereof), the oxide semiconductor film (bulk thereof), the insulating film (bulk thereof), an interface between the gate insulating film and the oxide semiconductor film, and an interface between the oxide semiconductor film and the insulating film. The amount of oxygen is preferably greater than the stoichiometric proportion and less than four times of the stoichiometric proportion, far preferably greater than the stoichiometric proportion and less than double of the stoichiometric proportion. Such an oxide including excessive oxygen whose amount is greater than the stoichiometric proportion refers to, for example, an oxide which satisfies 2g>3a+3b+2c+4d+3e+2f (g is greater than the sum of 1.5a+1.5b+c+2d+1.5e+f), where the oxide is represented as InaGabZncSidAleMgfOg (a, b, c, d, e, f, g≧0: a, b, c, d, e, f, g is greater than or equal to zero). Note that oxygen which is added by the oxygen doping treatment may exist between lattices of the oxide semiconductor.
The above-described oxygen-excessive region may be provided in two or more of the gate insulating film, the oxide semiconductor film, and the insulating film. For example, oxygen-excessive regions can be provided in the interface between the gate insulating film and the oxide semiconductor film, the oxide semiconductor film (bulk thereof), and the interface between the oxide semiconductor film and the insulating film by oxygen doping treatment in the manufacturing process.
Note that while it is acceptable that the amount of oxygen is equal to the stoichiometric proportion in a defect-(oxygen deficiency-)free oxide semiconductor, in order to secure reliability, for example, to suppress variation in the threshold voltage of a transistor, it is preferable that an oxide semiconductor include oxygen whose amount be greater than the stoichiometric proportion. Similarly, while the base film is not necessarily an insulating film containing excessive oxygen in the case of a defect-(oxygen deficiency-)free oxide semiconductor, in order to secure reliability, for example, to suppress variation in the threshold voltage of a transistor, it is preferable that the base film be an insulating film containing excessive oxygen, considering the possibility of occurrence of oxygen deficiency in the oxide semiconductor layer.
With the dehydration or dehydrogenation by the heat treatment subjected to the oxide semiconductor film, a hydrogen atom or an impurity containing a hydrogen atom such as water in the oxide semiconductor film is removed, so that the oxide semiconductor film is highly purified. The amount of oxygen added by the oxygen doping treatment is set to greater than the amount of hydrogen in the highly-purified oxide semiconductor film which has been subjected to the dehydration or dehydrogenation. Excessive oxygen in at least one of the stacked gate insulating film, oxide semiconductor film, and insulating film diffuses and reacts with hydrogen that causes instability, thereby fixing hydrogen (making hydrogen an immovable ion). That is, instability in the reliability can be reduced (or sufficiently decreased). In addition, with excessive oxygen, variation in the threshold voltage Vth due to oxygen deficiency can be reduced and the amount of shift ΔVth of the threshold voltage can be reduced.
Here, a state in which oxygen is added to the bulk by the above-described “oxygen plasma doping” treatment is described. Note that when oxygen doping treatment is performed on an oxide semiconductor film containing oxygen as one component, it is generally difficult to check an increase or a decrease of the oxygen concentration. Therefore, here, an effect of the oxygen doping treatment was confirmed with a silicon wafer.
Oxygen doping treatment was performed with the use of an inductively coupled plasma (ICP) method. Conditions thereof were as follows: the ICP power is 800 W; the RF bias power 300 W or 0 W; the pressure 1.5 Pa; the gas flow rate 75 sccm; and the substrate temperature 70° C. FIG. 15 shows an oxygen concentration profile in the depth direction of the silicon wafer according to secondary ion mass spectrometry (SIMS) measurement. In FIG. 15, the vertical axis indicates an oxygen concentration; the horizontal axis indicates a depth from a top surface of the silicon wafer.
It can be confirmed from FIG. 15 that oxygen is added in either of cases where the RF bias power is 0 W or the RF bias power is 300 W. In addition, in the case where the RF bias power is 300 W, oxygen is added more deeply than the case of the RF bias power of 0 W.
Next, FIGS. 16A and 16B show results of observation of a cross section of the silicon wafer before and after the oxygen doping treatment according to scanning transmission electron microscopy (STEM). FIG. 16A is a STEM image of the silicon wafer before the oxygen doping treatment. FIG. 16B is a STEM image of the silicon wafer after the oxygen doping treatment at the RF bias power of 300 W. Referring to FIG. 16B, it can be confirmed that an oxygen-highly-doped region is formed in the silicon wafer by the oxygen doping.
As described above, it is shown that oxygen is added to the silicon wafer by oxygen doping on the silicon wafer. This result leads to an understanding that oxygen can also be added to an oxide semiconductor film by oxygen doping to the oxide semiconductor film.
The effect of the structure which is an embodiment of the invention can be easily understood by considering as below. The description below is just one exemplary consideration.
When a positive voltage is applied to the gate electrode, an electric field is generated from a gate electrode side of the oxide semiconductor film to a back channel side (the opposite side to the gate insulating film), and accordingly, hydrogen ions having positive charge which exist in the oxide semiconductor film are transferred to the back channel side, and accumulated in an oxide semiconductor film side of an interface between the oxide semiconductor film and the insulating film. The positive charge is transferred from the accumulated hydrogen ion to a charge trapping center (such as a hydrogen atom, water, or contamination) in the insulating film, whereby negative charge is accumulated in the back channel side of the oxide semiconductor film. In other words, a parasitic channel is generated on the back channel side of the transistor, and the threshold voltage is shifted to the negative side, so that the transistor tends to be normally-on.
In this manner, the charge trapping center such as hydrogen or water in the insulating film traps the positive charge and is transferred into the insulating film, which varies electric characteristics of the transistor. Therefore, in order to suppress variation of the electrical characteristics of the transistor, it is important that there is no charge trapping center or the number of charge trapping centers is small in the insulating film. Therefore, a sputtering method by which less hydrogen is contained in film deposition is preferably used for formation of the insulating film. In an insulating film deposited by the sputtering method, there is no charge trapping center or the number of which is small, and the transfer of positive charge less occurs as compared to that in the case of using a CVD method or the like. Accordingly, the shift of the threshold voltage of the transistor can be suppressed and the transistor can be normally off.
On the other hand, when a negative voltage is applied to the gate electrode, an electric field is generated from the back channel side to the gate electrode side, and accordingly, hydrogen ions which exist in the oxide semiconductor film are transferred to the gate insulating film side and are accumulated in the oxide semiconductor film side of the interface between the oxide semiconductor film and the gate insulating film. As a result, the threshold voltage of the transistor is shifted to the negative side.
In a state being applied with a voltage of 0, the positive charge is released from the charge trapping center, so that the threshold voltage of the transistor is shifted to the positive side, thereby returning to the initial state, or the threshold voltage is shifted to the positive side beyond the initial state in some cases. These phenomena indicate the existence of easy-to-transfer ions in the oxide semiconductor film. It can be considered that an ion that is transferred most easily is a hydrogen ion that is the smallest atom.
Note that in a bottom-gate transistor, when an oxide semiconductor film is formed over a gate insulating film and then heat treatment is performed thereon, not only water or hydrogen contained in the oxide semiconductor film but also water or hydrogen contained in the gate insulating film can be removed. Thus, in the gate insulating film, the number of charge trapping centers for trapping positive charge which is transferred through the oxide semiconductor film is small. In this manner, the heat treatment for dehydration or dehydrogenation is performed not only on the oxide semiconductor film but also on the gate insulating film below the oxide semiconductor film. Therefore, in the bottom-gate transistor, the gate insulating film may be formed by a CVD method such as a plasma CVD method.
In addition, the oxide semiconductor film absorbs light, whereby a bond of a metal element (M) and a hydrogen atom (H) (the bond also referred to as an M—H bond) in the oxide semiconductor film is cut by optical energy. Note that the optical energy having a wavelength of about 400 nm is equal to or substantially equal to the bond energy of a metal element and a hydrogen atom. When a negative gate bias is applied to a transistor in which the bond of a metal element and a hydrogen atom in the oxide semiconductor film is cut, a hydrogen ion detached from the metal element is attracted to a gate electrode side, so that distribution of electrical charge is changed, the threshold voltage of the transistor is shifted to the negative side, and the transistor tends to be normally on.
Note that the hydrogen ions which have been transferred to the interface with the gate insulating film by light irradiation and application of the negative gate bias to the transistor are returned to the initial state by stopping application of the voltage. This can be regarded as a typical example of the ion transfer in the oxide semiconductor film.
In order to prevent such a change of the electrical characteristics by voltage application (BT deterioration) or a change of the electrical characteristics by light irradiation (light deterioration), it is important to remove a hydrogen atom or an impurity containing a hydrogen atom such as water thoroughly from the oxide semiconductor film to highly purify the oxide semiconductor film. The charge density as small as 1015 cm−3, or the charge per unit area as small as 1010 cm−2 does not affect the transistor characteristics or very slightly affects them. Therefore, it is preferable that the charge density be less than or equal to 1015 cm−3. Assuming that 10% of hydrogen contained in the oxide semiconductor film is transferred within the oxide semiconductor film, it is preferable that the hydrogen concentration be less than or equal to 1016 cm−3. Further, in order to prevent entrance of hydrogen from the outside after a device is completed, it is preferable that a silicon nitride film formed by a sputtering method be used as a passivation film to cover the transistor.
Hydrogen or water can also be removed from the oxide semiconductor film by doping with excessive oxygen as compared to hydrogen contained in the oxide semiconductor film (such that (number of hydrogen atoms)<<(number of oxygen radicals) or (number of oxygen ions)). Specifically, oxygen is made to be plasma by a radio-frequency wave (RF), the bias of the substrate is increased, and an oxygen radical and/or an oxygen ion are/is doped or added into the oxide semiconductor film over the substrate such that the amount of oxygen is greater than that of hydrogen in the oxide semiconductor film. The electronegativity of oxygen is 3.0 which is larger than about 2.0, the electronegativity of a metal (Zn, Ga, In) in the oxide semiconductor film, and thus, excessive oxygen contained as compared to hydrogen deprives the M—H bond of a hydrogen atom, so that an OH group is formed. This OH group may form an M—O—H group with a bond to M.
The oxygen doping is preferably performed such that the amount of oxygen in the oxide semiconductor film is greater than the stoichiometric proportion. For example, in the case where an In—Ga—Zn—O-based oxide semiconductor film is used as the oxide semiconductor film, an ideal single-crystal ratio is 1:1:1:4 (InGaZnO4), and therefore, it is far preferable that the amount of oxygen be made to greater than the stoichiometric proportion and less than double of the stoichiometric proportion by oxygen doping or the like. Accordingly, the amount of oxygen is greater than that of hydrogen in the oxide semiconductor film.
Optical energy or BT stress detaches a hydrogen ion from the M—H bond, which causes deterioration; however, in the case where oxygen is added by the above-described doping, added oxygen is bonded with a hydrogen ion, so that an OH group is formed. The OH group does not discharge a hydrogen ion even by light irradiation or application of BT stress on the transistor because of its high bond energy, and is not easily transferred into the oxide semiconductor film because of its greater mass than the mass of a hydrogen ion. Accordingly, an OH group formed by oxygen doping does not cause deterioration of the transistor or can suppress the deterioration.
In addition, it has been confirmed that as the thickness of the oxide semiconductor film is increased, the variation in the threshold voltage of a transistor tends to increase. It can be guessed that this is because an oxygen defect in the oxide semiconductor film is one cause of the change of the threshold voltage and increases as the thickness of the oxide semiconductor film is increased. A step of doping an oxide semiconductor film with oxygen in a transistor according to one embodiment of the present invention is effective not only for removal of hydrogen or water from the oxide semiconductor film but also for compensation of an oxygen defect in the film. Accordingly, the variation in the threshold voltage can also be controlled in the transistor according to one embodiment of the present invention.
Metal oxide films each formed of a component/components similar to the oxide semiconductor film may be provided with the oxide semiconductor film provided therebetween, which is also effective for prevention of change of the electrical characteristics. As the metal oxide film formed of a component/components similar to the oxide semiconductor film, specifically, a film containing at least one selected from the constituent elements of the oxide semiconductor film is preferably used. Such a material can be fit well to the oxide semiconductor film, and therefore, provision of the metal oxide films with the oxide semiconductor film provided therebetween enables an interface between the metal oxide film and the oxide semiconductor film to be kept well. That is, by providing the metal oxide film using the above-described material(s) as an insulating film which is in contact with the oxide semiconductor film, accumulation of hydrogen ions in the interface between the metal oxide film and the oxide semiconductor film and in the vicinity thereof can be suppressed or prevented. Accordingly, as compared to the case where insulating films each formed of a different component/different components from the oxide semiconductor film, such as silicon oxide films are provided with the oxide semiconductor film provided therebetween, the hydrogen concentration in the interface with the oxide semiconductor film, which affects the threshold voltage of the transistor, can be sufficiently decreased.
A gallium oxide film is preferably used as the metal oxide film. Since gallium oxide has a wide bandgap (Eg), by providing gallium oxide films with the oxide semiconductor film provided therebetween, an energy barrier is formed in the interface between the oxide semiconductor film and the metal oxide film to prevent carrier transfer in the interface. Consequently, carriers are not transferred from the oxide semiconductor to the metal oxide, but are transferred within the oxide semiconductor film. On the other hand, a hydrogen ion passes through the interface between the oxide semiconductor and the metal oxide and is accumulated in the vicinity of an interface between the metal oxide and the insulating film. Even when the hydrogen ion is accumulated in the vicinity of the interface with the insulating film, a parasitic channel through which carriers can flow is not formed in the metal oxide film such as a gallium oxide film, which results in no effect or a very slight effect on the threshold voltage of the transistor. The energy barrier in the case where gallium oxide is in contact with a In—Ga—Zn—O-based material is about 0.8 eV on the conduction band side and is about 0.9 eV on the valence band side.
One technological idea of a transistor according to one embodiment of the present invention is to increase the amount of oxygen contained in at least one of an insulating film in contact with an oxide semiconductor film, the oxide semiconductor film, and the vicinity of an interface between them by oxygen doping treatment.
In the case where an oxide semiconductor material which contains indium whose bonding strength to oxygen is relatively weak is used for the oxide semiconductor film, when the insulating film in contact with the oxide semiconductor film contains a material which has a stronger bonding strength to oxygen, such as silicon, oxygen in the oxide semiconductor film may be deprived by heat treatment, which may cause formation of oxygen deficiency in the vicinity of the interface with the oxide semiconductor film. However, in a transistor according to one embodiment of the present invention, the formation of oxygen deficiency can be suppressed by supplying excessive oxygen to the oxide semiconductor film.
Here, after the oxygen doping treatment is performed in the manufacturing process of a transistor, the amount of oxygen which is greater than the stoichiometric proportion, contained in the oxide semiconductor film or the insulating film in contact with the oxide semiconductor film may be different between layers. It can be considered that chemical potential of oxygen is different between the layers where the amount of excessive oxygen is different between them, and the difference in the chemical potential comes to equilibrium or substantial equilibrium by heat treatment or the like in the manufacturing process of the transistor. Distribution of oxygen in the equilibrium state is considered below.
The equilibrium state at a temperature T at a pressure P refers to the state in which a Gibbs free energy of the whole of the systems, G is the minimum, which is represented by the following formula (1).

[FORMULA 1]

G(Na,Nb,Nc, . . . , T,P)=G(1)(Na,Nb,Nc, . . . , T,P)+G(2)(Na,Nb,Nc, . . . , T,P)+G(3)(Na,Nb,Nc, . . . , T,P)  (1)

In the formula (1), reference symbols G(1), G(2), and G(3) denote Gibbs free energies of layers. Reference symbols a, b, and c denote particle kinds. The Gibbs free energy changes as represented by the following formula (2) when the particle a is transferred from an i layer to a j layer by δNa(j).




  
    
      
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When δG is 0 in the formula (2), or when the following formula (3) is satisfied, the systems are in the equilibrium state.




  
    
      
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The differential of the Gibbs free energy with respect to the number of particles corresponds to the chemical potential, and thus the chemical potentials of particles are uniform in the layers in the equilibrium state.
In other words, specifically, when the amount of oxygen contained in the oxide semiconductor film is excessive as compared to the insulating film, the chemical potential of oxygen is relatively small in the insulating film and is relatively large in the oxide semiconductor film.
Then, when the temperature of the whole of the systems (e.g., the oxide semiconductor film and the insulating film in contact with the oxide semiconductor film, here) becomes high enough to cause atom diffusion in the layer(s) and between the layers by heat treatment in the manufacturing process of the transistor, oxygen is transferred so as to make the chemical potentials uniform. That is, oxygen in the oxide semiconductor film is transferred to the insulating film, whereby the chemical potential of the oxide semiconductor film is decreased and the chemical potential of the insulating film is increased.
In this manner, oxygen supplied excessively to the oxide semiconductor film by the oxygen doping treatment is diffused to be supplied to the insulating film (including its interface) by the following heat treatment to make the whole of the systems to be in the equilibrium state. Therefore, in the case where excessive oxygen exists enough in the oxide semiconductor film, the insulating film (including its interface) in contact with the oxide semiconductor film can be made to contain excessive oxygen.
Therefore, it is beneficial to supply oxygen the amount of which is enough to (or greater than that to) compensate an oxygen deficiency defect in the insulating film or the interface with the insulting film, to the oxide semiconductor film.
A transistor including an oxide semiconductor film subjected to dehydration or dehydrogenation by heat treatment and oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress (BT test) can be reduced.
Accordingly, a transistor having stable electric characteristics can be manufactured.
According to one embodiment of the present invention, a semiconductor device having a transistor with high electric characteristics and reliability can be manufactured.



BRIEF DESCRIPTION OF DRAWINGS
FIGS. 1A to 1C illustrate one embodiment of a semiconductor device.
FIGS. 2A to 2D illustrate one embodiment of a method for manufacturing a semiconductor device.
FIGS. 3A to 3D illustrate embodiments of a semiconductor device.
FIGS. 4A to 4F illustrate one embodiment of a method for manufacturing a semiconductor device.
FIGS. 5A to 5C illustrate one embodiment of a method for manufacturing a semiconductor device.
FIG. 6 illustrates one embodiment of a semiconductor device.
FIG. 7 illustrates one embodiment of a semiconductor device.
FIG. 8 illustrates one embodiment of a semiconductor device.
FIGS. 9A and 9B illustrate one embodiment of a semiconductor device.
FIGS. 10A and 10B illustrate electronic equipment.
FIGS. 11A to 11F illustrate electronic equipment.
FIGS. 12A to 12C illustrate embodiments of a semiconductor device.
FIGS. 13A to 13D illustrate one embodiment of a semiconductor device.
FIG. 14A is a top view of a plasma apparatus illustrating one embodiment of the present invention; FIG. 14B is a cross-sectional view thereof.
FIG. 15 is a graph showing measurement results with SIMS.
FIGS. 16A and 16B are cross-sectional STEM images.
FIGS. 17A and 17B are graphs each showing evaluation results of electrical characteristics of a transistor.
FIGS. 18A and 18B are graphs each showing evaluation results of electrical characteristics of a transistor.



BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments and an example of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details of the present invention can be modified in various ways without departing from the purpose and scope of the present invention. Accordingly, the present invention is not construed as being limited to the description of the embodiments and example included herein. The ordinal numbers such as “first” and “second” in this specification are used for convenience and do not denote the order of steps or the stacking order of layers. In addition, the ordinal numbers in this specification do not denote particular names which specify the present invention.
Embodiment 1
In Embodiment 1, one embodiment of a semiconductor device and one embodiment of a method for manufacturing the semiconductor device will be described using FIGS. 1A to 1C, FIGS. 2A to 2D, and FIGS. 3A to 3D. In this embodiment, a transistor including an oxide semiconductor film is described as an example of the semiconductor device.
FIGS. 1A to 1C are a plan view and cross-sectional views of a bottom-gate transistor described as an example of a semiconductor device. FIG. 1A is the plan view; FIGS. 1B and 1C are the cross-sectional views along line A-B and line C-D in FIG. 1A, respectively. A gate insulating film 402 is omitted in FIG. 1A.
A transistor 410 shown in FIGS. 1A to 1C includes, over a substrate 400 having an insulating surface, a gate electrode layer 401, the gate insulating film 402, an oxide semiconductor film 403, a source electrode layer 405a, and a drain electrode layer 405b. 
In a process for manufacturing the oxide semiconductor film 403, heat treatment for dehydration or dehydrogenation and oxygen doping treatment are performed.
The oxygen doping treatment is addition of an oxygen radical or an oxygen atom or an oxygen ion to a top surface and the bulk of the oxide semiconductor film. In particular, addition of an oxygen radical or an oxygen atom or an oxygen ion to the top surface and the bulk of the oxide semiconductor film, with oxygen plasma is also called oxygen plasma doping treatment. The substrate over which the oxide semiconductor film is formed is preferably biased.
An insulator may be provided over the transistor 410. In order to electrically connect the source electrode layer 405a or the drain electrode layer 405b to a wiring, an opening may be formed in the gate insulating film 402 or the like. A second gate electrode may be provided above the oxide semiconductor film 403. The oxide semiconductor film 403 is preferably processed into an island shape but is not necessarily processed into the shape.
FIGS. 2A to 2D illustrate an example of a method for manufacturing the transistor 410.
First, a conductive film is formed over the substrate 400 having an insulating surface, and then, subjected to a first photolithography step, so that the gate electrode layer 401 is formed. Note that a resist mask may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.
There is no particular limitation on a substrate that can be used as the substrate 400 having an insulating surface as long as it has heat resistance enough to withstand heat treatment performed later. For example, a glass substrate of barium borosilicate glass, aluminoborosilicate glass, or the like, a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. A single crystal semiconductor substrate or a polycrystalline semiconductor substrate of silicon, carbon silicon, or the like; a compound semiconductor substrate of silicon germanium or the like; an SOI substrate; or the like can be used as the substrate 400, or the substrate provided with a semiconductor element can be used as the substrate 400.
Further, a flexible substrate may be used as the substrate 400. In the case where a flexible substrate is used, a transistor including an oxide semiconductor film may be directly formed over the flexible substrate, or alternatively, a transistor including an oxide semiconductor film may be formed over another substrate and separated from another substrate to be transferred to the flexible substrate. In order to separate the transistor from another substrate and transfer the transistor to the flexible substrate, a separation layer may be provided between the substrate and the transistor including the oxide semiconductor film.
An insulating film serving as a base film may be provided between the substrate 400 and the gate electrode layer 401. The base film prevents diffusion of an impurity element from the substrate 400, and can be formed with a single-layer structure or a multi-layer structure using one or more of a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, and a silicon oxynitride film.
The gate electrode layer 401 can be formed with a single-layer structure or a multi-layer structure using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, and/or an alloy material which contains any of these materials as a main component by a plasma CVD method, a sputtering method, or the like.
Next, the gate insulating film 402 is formed over the gate electrode layer 401. The gate insulating film 402 can be formed with a single-layer structure or a multi-layer structure using silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, hafnium oxide, and/or gallium oxide, and/or a combination thereof by a plasma CVD method, a sputtering method, or the like.
It is far preferable that an insulating material containing a component/components similar to the oxide semiconductor film formed later be used for the gate insulating film 402. This is because such a material can be fit well to the oxide semiconductor film, and therefore, this use for the gate insulating film 402 enables a state of an interface between the gate insulating film 402 and the oxide semiconductor film to be kept well. To contain the component(s) similar to the oxide semiconductor film means to contain at least one selected from a constituent element or constituent elements of the oxide semiconductor film. For example, in the case where the oxide semiconductor film is formed using an In—Ga—Zn-based oxide semiconductor material, gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film.
As a far preferable example of a multi-layer structure for the gate insulating film 402, a multi-layer structure of a film (hereinafter referred to as a film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film and a film (hereinafter referred to as a film b) containing a material/materials different from the component material(s) of the film a can be given. This is because with a structure in which the film a and the film b are stacked on the oxide semiconductor film side in order, electrical charge is preferentially trapped by a charge trapping center in an interface between the films a and b (as compared to an interface between the oxide semiconductor film and the film a), so that charge trapping in the interface with the oxide semiconductor film can be sufficiently suppressed, leading to improvement in the reliability of a semiconductor device.
A transistor 460 in which a gate insulating film has a multi-layer structure is shown in FIG. 3B. In the transistor 460, a first gate insulating film 402a and a second gate insulating film 402b are stacked on the gate electrode layer 401, and the oxide semiconductor film 403 is formed over the second gate insulating film 402b. In the transistor 460, the second gate insulating film 402b which is in contact with the oxide semiconductor film 403 is the film (film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film 403, the first gate insulating film 402a below the second gate insulating film 402b is the film (film b) containing a material/materials different from the component material(s) of the second gate insulating film 402b. 
For example, in the case where an In—Ga—Zn-based oxide semiconductor film is used as the oxide semiconductor film 403, a gallium oxide film can be used as the second gate insulating film 402b and a silicon oxide film can be used as the first gate insulating film 402a. Further, it is preferable that a film containing an insulating material containing a component/components similar to the oxide semiconductor film be used as an insulating film 407 on and in contact with the oxide semiconductor film 403. With the films containing the insulating materials containing the components similar to the oxide semiconductor film, which are provided above and below and in contact with the oxide semiconductor film 403, the oxide semiconductor film 403 can be surrounded. With a structure in which the films (films a) containing the insulating materials containing the components similar to the oxide semiconductor film are provided above and below and in contact with the oxide semiconductor film 403 and the film (film b) containing the material/materials different from the component material(s) of the films a is provided outside of the films a, electrical charge can be preferentially trapped by a charge trapping center in an interface between the film a and the film b above and/or below the oxide semiconductor film 403, so that charge trapping in an interface with the oxide semiconductor film can be sufficiently suppressed more effectively, leading to improvement in the reliability of a semiconductor device.
For the method for manufacturing the gate insulating film 402, a high-density plasma CVD method using microwaves (e.g., with a frequency of 2.45 GHz) is preferably employed because an insulating layer which is dense and can have high breakdown voltage and high quality. This is because when the highly purified oxide semiconductor is closely in contact with the high-quality gate insulating film, the interface state density can be reduced and interface properties can be favorable.
Further, an insulating layer may be formed, whose film quality and interface characteristics with the oxide semiconductor are improved by heat treatment which is performed after film formation. In either case, any film can be used as long as film quality as a gate insulating film is high, interface state density with an oxide semiconductor is decreased, and a favorable interface can be formed.
In order that hydrogen, a hydroxyl group, and moisture are contained as little as possible in the gate insulating film 402 and the oxide semiconductor film over the gate insulating film 402, it is preferable that the substrate 400 over which the gate electrode layer 401 is formed or the substrate 400 which has been subjected to the manufacturing process up to and including the step of forming the gate insulating film 402 be preheated in a preheating chamber of a sputtering apparatus as pretreatment for the formation of the oxide semiconductor film so that an impurity such as hydrogen and moisture adsorbed to the substrate 400 is eliminated and removed. As an exhaustion unit provided in the preheating chamber, a cryopump is preferable. This preheating treatment can be omitted. Further, this preheating may be performed on the substrate 400 subjected to the manufacturing method up to and including the step of forming the source electrode layer 405a and the drain electrode layer 405b, before the formation of the insulating film 407.
Next, over the gate insulating film 402, an oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 200 nm, preferably greater than or equal to 5 nm and less than or equal to 30 nm is formed.
As an oxide semiconductor used for the oxide semiconductor film, any of the following oxide semiconductors can be used: a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor; a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor; a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Mg—O-based oxide semiconductor, or an In—Ga—O-based oxide semiconductor; a an In—O-based oxide semiconductor; a Sn—O-based oxide semiconductor; a Zn—O-based oxide semiconductor; and the like. Further, SiO2 may be contained in the above oxide semiconductor. Note that here, for example, the In—Ga—Zn—O-based oxide semiconductor means an oxide film containing indium (In), gallium (Ga), and zinc (Zn) and there is no particular limitation on the stoichiometric proportion. The In—Ga—Zn—O-based oxide semiconductor may contain an element other than In, Ga, and Zn.
As the oxide semiconductor film, a thin film of a material represented by the chemical formula, InMO3(ZnO)m (m>0), can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, M may be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.
For the oxide semiconductor film, an oxide semiconductor containing indium, an oxide semiconductor containing indium and gallium, or the like can be preferably used.
In this embodiment, the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target. The oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
A target used for formation of the oxide semiconductor film by a sputtering method is, for example, an oxide target containing In2O3, Ga2O3, and ZnO at a composition ratio of 1:1:1 [molar ratio], so that an In—Ga—Zn—O film is formed. Without limitation on the material and the composition of the target, for example, an oxide target having a composition ratio of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] may be used.
Furthermore, the filling rate of the oxide target is 90% to 100%, preferably 95% to 99.9%. With use of the metal oxide target with such a high filling rate, a dense oxide semiconductor film can be formed.
It is preferable that a high-purity gas with an impurity such as hydrogen, water, hydroxyl, or hydride removed be used as a sputtering gas for forming the oxide semiconductor film.
The substrate is held in a deposition chamber kept under reduced pressure, and the substrate temperature is set to temperatures higher than or equal to 100° C. and lower than or equal to 600° C., preferably higher than or equal to 200° C. and lower than or equal to 400° C. By forming the oxide semiconductor film while heating the substrate, the concentration of the impurity included in the oxide semiconductor film can be reduced. In addition, damage by sputtering can be suppressed. Then, residual moisture in the deposition chamber is removed, a sputtering gas from which hydrogen and moisture are removed is introduced, and the above-described target is used, so that the oxide semiconductor film is formed over the substrate 400. In order to remove moisture remaining in the deposition chamber, an entrapment vacuum pump such as a cryopump, an ion pump, or a titanium sublimation pump is preferably used. As an exhaustion unit, a turbo molecular pump to which a cold trap is added may be used. In the deposition chamber which is evacuated with the cryopump, for example, a hydrogen atom, a compound containing a hydrogen atom, such as water, (more preferably, also a compound containing a carbon atom), and the like are removed, whereby the concentration of an impurity in the oxide semiconductor film formed in the deposition chamber can be reduced.
As one example of the film formation condition, the following is employed: the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%). A pulsed direct-current power source is preferably used since powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness comes to be uniform.
Next, the oxide semiconductor film is processed into an island-shaped oxide semiconductor film 441 by a second photolithography step (see FIG. 2A). A resist mask used for forming the island-shaped oxide semiconductor film 441 may be formed by an inkjet method. Formation of the resist mask by an inkjet method needs no photomask; thus, manufacturing cost can be reduced.
In the case where a contact hole is formed in the gate insulating film 402, a step of forming the contact hole can be performed at the same time as processing of the oxide semiconductor film.
Note that the etching of the oxide semiconductor film may be dry etching, wet etching, or both dry etching and wet etching. As an etchant used for wet etching of the oxide semiconductor film, for example, a mixed solution of phosphoric acid, acetic acid, and nitric acid, or the like can be used. As the etchant, ITO07N (produced by KANTO CHEMICAL CO., INC.) may be used as well.
Next, the oxide semiconductor film 441 is subjected to heat treatment. With this heat treatment, excessive hydrogen (including water and a hydroxyl group) can be removed (dehydration or dehydrogenation), the structure of the oxide semiconductor film can be improved, and defect levels in an energy gap can be reduced. The temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C., or higher than or equal to 400° C. and less than the strain point of the substrate. In this embodiment, the substrate is put in an electric furnace which is a kind of heat treatment apparatus and the oxide semiconductor film is subjected to heat treatment at 450° C. for one hour in a nitrogen atmosphere, and then, water and hydrogen are prevented from being mixed into the oxide semiconductor film by preventing the substrate from being exposed to the air; thus, the oxide semiconductor film 403 is obtained (see FIG. 2B).
Note that the heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object by heat conduction or heat radiation from a heater such as a resistance heater may be used. For example, an RTA (rapid thermal anneal) apparatus such as a GRTA (gas rapid thermal anneal) apparatus or an LRTA (lamp rapid thermal anneal) apparatus can be used. An LRTA apparatus is an apparatus for heating an object by radiation of light (an electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus for performing heat treatment using a high-temperature gas. As the high temperature gas, an inert gas which does not react with an object by heat treatment, such as nitrogen or a rare gas like argon, is used.
For example, as the heat treatment, GRTA may be performed, in which the substrate is moved into an inert gas heated at a high temperature of 650° C. to 700° C., and heated for several minutes, and then the substrate is moved out of the inert gas.
In the heat treatment, it is preferable that an impurity such as water, hydrogen, and the like be not contained in nitrogen or the rare gas such as helium, neon, or argon. The purity of nitrogen or the rare gas such as helium, neon, or argon which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
In addition, after the oxide semiconductor film is heated by the heat treatment, a high-purity oxygen gas, a high-purity N2O gas, or ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system) may be introduced into the same furnace. It is preferable that water, hydrogen, or the like be not contained in the oxygen gas or the N2O gas. The purity of the oxygen gas or the N2O gas which is introduced into the heat treatment apparatus is preferably 6N or more, far preferably 7N or more (i.e., the impurity concentration in the oxygen gas or the N2O gas is preferably 1 ppm or lower, far preferably 0.1 ppm or lower). The oxygen gas or the N2O gas acts to supply oxygen that is a main component of the oxide semiconductor and that is reduced by the step for removing an impurity for the dehydration or dehydrogenation, so that the oxide semiconductor film can be a high-purified, electrically i-type (intrinsic) oxide semiconductor film.
The heat treatment can also be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film. In that case, after the heat treatment, the substrate is taken out of the heating apparatus and a photolithography step is performed on the oxide semiconductor film. The heat treatment may be performed after a source electrode layer and a drain electrode layer are formed over the island-shaped oxide semiconductor film as long as the oxide semiconductor film is formed before that heat treatment.
Next, oxygen doping treatment is performed on the dehydrated or dehydrogenated oxide semiconductor film 403. By the oxygen doping treatment on the oxide semiconductor film 403, oxygen 421 is supplied to the oxide semiconductor film 403, so that oxygen is contained in the oxide semiconductor film 403 and/or the vicinity of the interface (see FIG. 2C). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of the oxide semiconductor film 403, preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a single crystalline oxide semiconductor film is denoted by Y, preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an oxide semiconductor film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 2Z. Too much of oxygen content may lead to absorption of hydrogen into the oxide semiconductor film 403, like a hydrogen storing alloy (hydrogen storage alloy). The oxygen 421 for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion. In this manner, the amount of oxygen is made to greater than that of hydrogen in the oxide semiconductor film.
For example, in the case of using a material a single crystal structure of which is represented by InGaO3(ZnO)m (m>0), the composition of the oxide semiconductor film 403 is represented by InGaZnOx; therefore, in the case where m is 1 (InGaZnO4), the acceptable x is greater than 4 and less than 8, and in the case where m is 2 (InGaZn2O5), the acceptable x is greater than 5 and less than 10. Such an oxygen-excessive region may exist in a part of the oxide semiconductor film (including its interface).
In the oxide semiconductor film, oxygen is one of main component materials. Therefore, it is difficult to estimate the oxygen concentration of the oxide semiconductor film accurately with Secondary Ion Mass Spectroscopy (SIMS) or the like. That is, it is difficult to judge whether oxygen is intentionally added to the oxide semiconductor film or not.
Isotopes such as O17 or O18 exist in oxygen, and it is know that the existence proportions of them in nature are about 0.037% and about 0.204% of the whole oxygen atoms. Therefore, the concentration of such an isotope in the oxide semiconductor film can be estimated by SIMS or the like, and the measurement of such a concentration enables the oxygen concentration in the oxide semiconductor film to be estimated accurately. Thus, by measuring the concentration, whether oxygen is intentionally added to the oxide semiconductor film or not may be judged.
For example, with respect to the concentration of O18, a concentration of the isotope of oxygen D1(O18) in an oxygen-added region and a concentration of the isotope of oxygen D2(O18) in a no-oxygen-added region have a relationship represented by D1(O18)>D2(O18).
The oxygen 421 added to (contained in) the oxide semiconductor film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
Oxygen for the doping (an oxygen radical, an oxygen atom, and/or an oxygen ion) may be supplied from a plasma generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421 can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the oxide semiconductor film 403.
In addition, heat treatment (at 150° C. to 470° C.) may be performed on the oxide semiconductor film 403 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between the oxygen 421 and the oxide semiconductor film 403 can be removed from the oxide semiconductor film 403. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
Through the above steps, the oxide semiconductor film 403 is highly purified and is made electrically i-type (intrinsic).
The oxygen doping treatment on the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film or after a source electrode layer and a drain electrode layer are stacked on the island-shaped oxide semiconductor film as long as the heat treatment is performed before that oxygen doping treatment.
Next, a conductive film for forming a source electrode layer and a drain electrode layer (including a wiring formed of the same layer as the source electrode layer and the drain electrode layer) is formed over the gate insulating film 402 and the oxide semiconductor film 403. As the conductive film serving as the source electrode layer and the drain electrode layer, for example, a metal film including an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film including any of the above elements as its component (e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) can be used. A film of a high-melting-point metal such as Ti, Mo, or W or a metal nitride film thereof (e.g., a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) may be provided over or/and below the metal film such as an Al film or a Cu film to form the conductive film serving as the source electrode layer and the drain electrode layer. Alternatively, the conductive film used for the source electrode layer and the drain electrode layer may be formed using a conductive metal oxide. As the conductive metal oxide, indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium oxide-tin oxide alloy (In2O3—SnO2; abbreviated to ITO), indium oxide-zinc oxide alloy (In2O3—ZnO), or any of these metal oxide materials in which silicon or silicon oxide is contained can be used.
A resist mask is formed over the conductive film by a third photolithography step, and is selectively etched, so that the source electrode layer 405a and the drain electrode layer 405b are formed. Then, the resist mask is removed.
In order to reduce the number of photomasks used in a photolithography step and reduce the number of photolithography steps, an etching step may be performed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted to have a plurality of intensities. A resist mask formed with the use of a multi-tone mask has a plurality of thicknesses and further can be changed in shape by etching; therefore, the resist mask can be used in a plurality of etching steps for processing into different patterns. Therefore, a resist mask corresponding to at least two kinds of different patterns can be formed with one multi-tone mask. Thus, the number of photomasks can be reduced and the number of photolithography steps can be also reduced accordingly, whereby simplification of a manufacturing process can be realized.
It is preferable that etching conditions be optimized so as not to etch and cut the oxide semiconductor film 403 when the conductive film is etched. However, it is difficult to obtain etching conditions in which only the conductive film is etched and the oxide semiconductor film 403 is not etched at all. In some cases, part of the oxide semiconductor film 441 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove portion (a depressed portion) is formed.
In this embodiment, a Ti film is used as the conductive film and an In—Ga—Zn—O-based oxide semiconductor is used as the oxide semiconductor film 403, and therefore, ammonium hydrogen peroxide (a mixture of ammonia, water, and hydrogen peroxide) is used as an etchant.
The number of carriers in the highly purified oxide semiconductor film 403 is significantly small (close to zero).
Through the above process, the transistor 410 is formed (see FIG. 2D). The transistor 410 is a transistor including the oxide semiconductor film 403 which is highly purified and from which an impurity such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) is removed. Therefore, variation in the electric characteristics of the transistor 410 is suppressed and the transistor 410 is electrically stable.
Further, as shown in FIG. 3A, a transistor 440 in which an insulating film 407 and an insulating film 409 are provided over the oxide semiconductor film 403 and the source electrode layer 405a and the drain electrode layer 405b can be formed.
The insulating film 407 can be formed to a thickness of at least 1 nm by a method by which an impurity such as water and hydrogen does not enter the insulating film 407, such as a sputtering method, as appropriate. When hydrogen is contained in the insulating film 407, entry of hydrogen into the oxide semiconductor film or extraction of oxygen from the oxide semiconductor film by hydrogen is caused; thus, the resistance of a back channel of the oxide semiconductor film might become low (the conductivity of the same might be n-type) and a parasitic channel might be formed. Therefore, it is important that a film formation method in which hydrogen is not used is employed in order to form the insulating film 407 containing as little hydrogen as possible.
As the insulating film 407, an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be typically used.
In this embodiment, a 200-nm-thick gallium oxide film is deposited as the insulating film 407 by a sputtering method.
It is far preferable that an insulating material containing a component/components similar to the oxide semiconductor film 403 be used for the insulating film 407, like the gate insulating film 402. This is because such a material can be fit well to the oxide semiconductor film, and therefore, this use for the insulating film 407 enables a state of an interface between the insulating film and the oxide semiconductor film to be kept well. For example, in the case where the oxide semiconductor film is formed using an In—Ga—Zn-based oxide semiconductor material, gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film 403.
As a far preferable example of a multi-layer structure for the insulating film 407, a multi-layer structure of a film (hereinafter referred to as a film a) containing the insulating material containing the component(s) similar to the oxide semiconductor film and a film (hereinafter referred to as a film b) containing a material/materials different from the component material(s) of the film a can be given. This is because with a structure in which the film a and the film b are stacked on the oxide semiconductor film side in order, electrical charge is preferentially trapped by a charge trapping center in an interface between the films a and b (as compared to an interface between the oxide semiconductor film and the film a), so that charge trapping in the interface with the oxide semiconductor film can be sufficiently suppressed, leading to improvement in the reliability of a semiconductor device.
For example, a multi-layer in which a gallium oxide film and a silicon oxide film are stacked on the oxide semiconductor film 403 side, or a multi-layer in which a gallium oxide film and a silicon nitride film are stacked on the oxide semiconductor film 403 side can be preferably used as the insulating film 407.
The substrate temperature at the time of the formation of the silicon oxide film may be higher than or equal to room temperature and lower than or equal to 300° C.; in this embodiment, the substrate temperature is 100° C. as an example. The silicon oxide film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen. As a target, a silicon oxide target or a silicon target can be used. For example, the silicon oxide film can be formed using a silicon target by a sputtering method in an atmosphere containing oxygen.
In order to remove residual moisture from the deposition chamber of the insulating film 407 in a manner similar to that of the formation of the oxide semiconductor film, an entrapment vacuum pump (such as a cryopump) is preferably used. When the insulating film 407 is deposited in the deposition chamber evacuated using a cryopump, the impurity concentration of the insulating film 407 can be reduced. As an evacuation unit for removing moisture remaining in the deposition chamber of the insulating film 407, a turbo molecular pump provided with a cold trap may be used.
It is preferable that a high-purity gas from which an impurity such as hydrogen, water, hydroxyl group, or hydride be removed be used as a sputtering gas used for formation of the insulating film 407.
It is preferable to perform heat treatment after the formation of the insulating film 407. The heat treatment is performed at a temperature higher than or equal to 250° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 600° C. or less than a strain point of the substrate.
The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas preferably contains water, hydrogen, or the like as less as possible. The purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
In the case where the insulating film 407 contains oxygen and the heat treatment is performed on the state where the oxide semiconductor film is in contact with the insulating film 407, oxygen can be further supplied to the oxide semiconductor film from the insulating film 407 containing oxygen.
It is preferable to form the insulating film 409 over the insulating film 407, as a protective insulating film for blocking to prevent entrance of an impurity such as moisture or hydrogen into the oxide semiconductor film 403 and to prevent discharge of oxygen from the gate insulating film 402, the oxide semiconductor film 403, the insulating film 407, and an interface thereof. As the insulating film 409, it is preferable to use an inorganic insulating film such as a silicon nitride film, an aluminum oxide film, or the like. For example, a silicon nitride film is formed by an RF sputtering method. An RF sputtering method is preferable as a method for forming the insulating film 409 because of its high productivity.
Heat treatment may be performed after the insulating film is formed. For example, the heat treatment may be performed at a temperature higher than or equal to 100° C. and lower than or equal to 200° C. in the air for 1 hour to 30 hours. This heat treatment may be performed at a fixed heating temperature; alternatively, the following change in the heating temperature may be conducted plural times: the heating temperature is increased from room temperature to a temperature higher than or equal to 100° C. and lower than or equal to 200° C. and then decreased to room temperature.
Other structures of transistors including the oxide semiconductor film 403 including an oxygen-excessive region subjected to oxygen doping treatment are shown in FIGS. 3C and 3D.
A transistor 420 illustrated in FIG. 3C is one of bottom-gate transistors referred to as a channel-protective (channel-stop) transistor and is also referred to as an inverted-staggered transistor.
The transistor 420 includes, over the substrate 400 having an insulating surface, the gate electrode layer 401, the gate insulating film 402, the oxide semiconductor film 403, an insulating film 427 functioning as a channel protective layer covering a channel formation region of the oxide semiconductor film 403, the source electrode layer 405a, and the drain electrode layer 405b. The insulating film 409 is formed so as to cover the transistor 420.
A transistor 430 shown in FIG. 3D is a bottom-gate transistor and includes, over the substrate 400 having an insulating surface, the gate electrode layer 401, the gate insulating film 402, the source electrode layer 405a, the drain electrode layer 405b, and the oxide semiconductor film 403. The insulating film 407 which covers the transistor 430 and is in contact with the oxide semiconductor film 403 is provided. The insulating film 409 is provided over the insulating film 407.
In the transistor 430, the gate insulating film 402 is provided on and in contact with the substrate 400 and the gate electrode 401, and the source electrode 405a and the drain electrode 405b are provided on and in contact with the gate insulating film 402. Further, the oxide semiconductor film 403 is provided over the gate insulating film 402, the source electrode layer 405a, and the drain electrode layer 405b. 
In each of the transistors 410, 420, 430, and 440 including the highly-purified oxide semiconductor film 403 according to this embodiment, the current in an off state (the off-state current) can be small.
Such a transistor including an oxide semiconductor film subjected to oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
Further, in the transistors 410, 420, 430, and 440 each including the oxide semiconductor film 403, relatively high field-effect mobility can be obtained, which enables high-speed operation. Consequently, with the above transistor provided in a pixel portion of a semiconductor device having a display function, high-quality images can be displayed. In addition, by using the transistor including the highly purified oxide semiconductor film, a driver circuit portion and a pixel portion can be formed over one substrate, whereby the number of components of the semiconductor device can be reduced.
In this manner, a semiconductor device including an oxide semiconductor, which has stable electric characteristics, can be provided. Accordingly, a semiconductor device with high reliability can be provided.
Embodiment 2
In Embodiment 2, another embodiment of a semiconductor device and one embodiment of a method for manufacturing the semiconductor device will be described using FIGS. 4A to 4F and 5A to 5C. In this embodiment, a transistor including an oxide semiconductor film will be described as an example of a semiconductor device. The same portions as and portions having functions similar to those described in Embodiment 1 can be formed in a manner similar to that described in Embodiment 1; therefore, description thereof is omitted. In addition, detailed description of the same portions is omitted.
An example of a method for manufacturing a transistor 450 is shown in FIGS. 4A to 4F and 5A to 5C. In this embodiment, oxygen doping treatment is performed plural times in a manufacturing process of the transistor 450.
First, a conductive film is formed over the substrate 400 having an insulating surface and is subjected to a first photolithography step to form the gate electrode layer 401.
Next, the gate insulating film 402 is formed over the gate electrode layer 401 (see FIG. 4A).
Next, oxygen doping treatment is performed on the gate insulating film 402. By the oxygen doping treatment on the gate insulating film 402, oxygen 421a is supplied to the gate insulating film 402, so that oxygen is contained in the gate insulating film 402 and/or the vicinity of the interface (see FIG. 4B). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of the gate insulating film 402, preferably to greater than the stoichiometric proportion and less than four times as much as the stoichiometric proportion thereof, far preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a material of the gate insulating film in the case where the material is a single crystal is denoted by Y, preferably to greater than Y and less than 4Y, far preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in a gate insulating film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 4Z, far preferably to greater than Z and less than 2Z. The oxygen 421a for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion.
For example, in the case of using an oxide insulating film the composition of which is represented by GaOx (x>0), since the stoichiometric proportion of gallium oxide is Ga:O=1:1.5, an oxide insulating film including an oxygen-excessive region where x is greater than 1.5 and less than 6 is formed. For example, in the case of using an oxide insulating film the composition of which is represented by SiOx (x>0), since the stoichiometric proportion of silicon oxide is Si:O=1:2, an oxide insulating film including an oxygen-excessive region where x is greater than 2 and less than 8 is formed. Such an oxygen-excessive region may exist in a part of the gate insulating film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the gate insulating film.
The oxygen 421a added to (contained in) the gate insulating film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
Oxygen for the doping may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421a can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the gate insulating film 402.
In addition, heat treatment (at 150° C. to 470° C.) may be performed on the gate insulating film 402 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between the oxygen 421a and the gate insulating film 402 can be removed from the gate insulating film 402. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
In order that hydrogen, a hydroxyl group, and moisture are contained as little as possible in the gate insulating film 402 and the oxide semiconductor film provided over the gate insulating film 402, it is preferable that the substrate 400 over which the gate electrode layer 401 is formed or the substrate 400 which has been subjected to the manufacturing process up to and including the step for forming the gate insulating film 402 be preheated in a preheating chamber of a sputtering apparatus as pretreatment for the formation of the oxide semiconductor film, so that impurities such as hydrogen and moisture adsorbed to the substrate 400 are eliminated and removed. As an exhaustion unit provided in the preheating chamber, a cryopump is preferable. This preheating treatment is not necessarily performed. Further, this preheating may be performed on the substrate 400 which has been subjected to the manufacturing process up to and including the step for forming the source electrode layer 405a and the drain electrode layer 405b, before the formation of the insulating film 407.
Next, over the gate insulating film 402, an oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 200 nm, preferably greater than or equal to 5 nm and less than or equal to 30 nm is formed.
In this embodiment, the oxide semiconductor film is formed by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target. The oxide semiconductor film can be formed by a sputtering method in a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.
The target used for formation of the oxide semiconductor film by a sputtering method is, for example, an oxide target containing In2O3, Ga2O3, and ZnO at a composition ratio of 1:1:1 [molar ratio], so that an In—Ga—Zn—O film can be formed.
It is preferable that a high-purity gas from which an impurity such as hydrogen, water, a hydroxyl group, or hydride is removed be used as a sputtering gas used for forming the oxide semiconductor film.
As one example of the film formation condition, the following is employed: the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere (the proportion of the oxygen flow rate is 100%). Note that a pulsed direct-current power source is preferably used, in which case powder substances (also referred to as particles or dust) that are generated in deposition can be reduced and the film thickness can be uniform.
Next, the oxide semiconductor film is processed into the island-shaped oxide semiconductor film 441 through a second photolithography step (see FIG. 4C).
Next, the oxide semiconductor film 441 is subjected to heat treatment. With this heat treatment, excessive hydrogen (including water and a hydroxyl group) can be removed (dehydration or dehydrogenation), the structure of the oxide semiconductor film can be improved, and defect levels in an energy gap can be reduced. The temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C., or higher than or equal to 400° C. and lower than the strain point of the substrate. In this embodiment, the substrate is put in an electric furnace which is a kind of heat treatment apparatus and the oxide semiconductor film is subjected to heat treatment at 450° C. for one hour in a nitrogen atmosphere, and then, water and hydrogen are prevented from being mixed into the oxide semiconductor film by preventing the substrate from being exposed to the air; thus, the oxide semiconductor film 403 is obtained (see FIG. 4D).
The heat treatment apparatus is not limited to the electric furnace, and an apparatus for heating an object by heat conduction or heat radiation from a heater such as a resistance heater may be used.
For example, as the heat treatment, GRTA may be performed, in which the substrate is moved into an inert gas heated at a high temperature of 650° C. to 700° C., and heated for several minutes, and then the substrate is moved out of the inert gas.
The heat treatment can also be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film. In that case, after the heat treatment, the substrate is taken out of the heating apparatus and a photolithography step is performed on the oxide semiconductor film. The heat treatment may be performed after a source electrode layer and a drain electrode layer are formed over the island-shaped oxide semiconductor film as long as the oxide semiconductor film is formed before that heat treatment.
Next, oxygen doping treatment is performed on the dehydrated or dehydrogenated oxide semiconductor film 403. By the oxygen doping treatment on the oxide semiconductor film 403, oxygen 421b is supplied to the oxide semiconductor film 403, so that oxygen is contained in the oxide semiconductor film 403 and/or the vicinity of the interface (see FIG. 4E). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of the oxide semiconductor film 403, preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a single crystalline oxide semiconductor film is denoted by Y, preferably to greater than Y and less than 2Y. It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an oxide semiconductor film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 2Z. Too much of oxygen content may lead to absorption of hydrogen into the oxide semiconductor film 403, like a hydrogen storing alloy (hydrogen storage alloy). The oxygen 421b for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion.
For example, in the case of using a material a single crystal structure of which is represented by InGaO3(ZnO)m (m>0), the composition of the oxide semiconductor film 403 is represented by InGaZnOx; therefore, in the case where m is 1 (InGaZnO4), the acceptable x is greater than 4 and less than 8, and in the case where m is 2 (InGaZn2O5), the acceptable x is greater than 5 and less than 10. Such an oxygen-excessive region may exist in a part of the oxide semiconductor film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the oxide semiconductor film.
The oxygen 421b added to (contained in) the oxide semiconductor film preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
Oxygen for the doping (an oxygen radical, an oxygen atom, and/or an oxygen ion) may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421b can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the oxide semiconductor film 403.
It is preferable to electrically bias the substrate in order to add oxygen more preferably.
In addition, heat treatment (at 150° C. to 470° C.) may be performed on the oxide semiconductor film 403 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between the oxygen 421b and the oxide semiconductor film 403 can be removed from the oxide semiconductor film 403. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
Through the above steps, the oxide semiconductor film 403 is highly purified and is made electrically i-type (intrinsic).
The oxygen doping treatment on the oxide semiconductor film may be performed on the oxide semiconductor film before the oxide semiconductor film is processed into the island-shaped oxide semiconductor film or after a source electrode layer and a drain electrode layer are stacked on the island-shaped oxide semiconductor film as long as the heat treatment is performed before that oxygen doping treatment.
Next, a conductive film for forming a source electrode layer and a drain electrode layer (including a wiring formed of the same layer as the source electrode layer and the drain electrode layer) is formed over the gate insulating film 402 and the oxide semiconductor film 403.
A resist mask is formed over the conductive film by a third photolithography step, and is selectively etched, so that the source electrode layer 405a and the drain electrode layer 405b are formed. Then, the resist mask is removed (see FIG. 4F).
It is preferable that etching conditions be optimized so as not to etch and cut the oxide semiconductor film 403 when the conductive film is etched. However, it is difficult to obtain etching conditions in which only the conductive film is etched and the oxide semiconductor film 403 is not etched at all. In some cases, part of the oxide semiconductor film 441 is etched off through the etching of the conductive film, so that an oxide semiconductor film having a groove portion (a depressed portion) is formed.
In this embodiment, a Ti film is used as the conductive film and an In—Ga—Zn—O-based oxide semiconductor is used as the oxide semiconductor film 403, and therefore, ammonium hydrogen peroxide (a mixture of ammonia, water, and hydrogen peroxide) is used as an etchant.
The number of carriers in the highly purified oxide semiconductor film 403 is significantly small (close to zero).
Next, the insulating film 407 is formed over the oxide semiconductor film 403, the source electrode layer 405a, and the drain electrode layer 405b (see FIG. 5A).
The insulating film 407 can be formed to a thickness of at least 1 nm by a method by which an impurity such as water and hydrogen does not enter the insulating film 407, such as a sputtering method, as appropriate.
As the insulating film 407, an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or a gallium oxide film can be typically used.
It is far preferable that an insulating material containing a component/components similar to the oxide semiconductor film 403 be used for the insulating film 407, like the gate insulating film 402. This is because such a material can be fit well to the oxide semiconductor film, and therefore, this use for the insulating film 407 enables a state of an interface between the insulating film and the oxide semiconductor film to be kept well. For example, in the case where the oxide semiconductor film is formed using an In—Ga—Zn-based oxide semiconductor material, gallium oxide can be given as an example of the insulating material containing the component(s) similar to the oxide semiconductor film 403.
It is preferable to perform heat treatment after the formation of the insulating film 407. The heat treatment is performed at a temperature higher than or equal to 250° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 600° C. or less than a strain point of the substrate.
The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas preferably contains water, hydrogen, or the like as less as possible. The purity of nitrogen, oxygen, or the rare gas which is introduced into the heat treatment apparatus is set to preferably 6N (99.9999%) or higher, far preferably 7N (99.99999%) or higher (that is, the impurity concentration is preferably 1 ppm or lower, far preferably 0.1 ppm or lower).
In the case where the insulating film 407 contains oxygen and the heat treatment is performed on the state where the oxide semiconductor film is in contact with the insulating film 407, oxygen can be further supplied to the oxide semiconductor film from the insulating film 407 containing oxygen.
Next, oxygen doping treatment is performed on the insulating film 407. By the oxygen doping treatment on the insulating film 407, oxygen 421c is supplied to the insulating film 407, so that oxygen is contained in the oxide semiconductor film 403, the gate insulating film 402, and/or the vicinity of the interface(s) of the oxide semiconductor film 403 and/or the gate insulating film 402 (see FIG. 5B). In that case, the amount of oxygen contained is made to greater than the stoichiometric proportion of the insulating film 407, preferably to greater than the stoichiometric proportion and less than four times as much as the stoichiometric proportion thereof, far preferably to greater than the stoichiometric proportion and less than double of the stoichiometric proportion thereof. It can be alternatively said that the amount of oxygen contained is made to greater than Y, where the amount of oxygen contained in a material of the insulating film in the case where the material is a single crystal is denoted by Y, preferably to greater than Y and less than 4Y, far preferably to greater than Y and less than 2Y It can be further alternatively said that the amount of oxygen contained is made to greater than Z, where the amount of oxygen contained in an insulating film which is subjected to no oxygen doping treatment is denoted by Z, preferably to greater than Z and less than 4Z, far preferably to greater than Z and less than 2Z. The oxygen 421c for doping contains an oxygen radical, an oxygen atom, and/or an oxygen ion.
For example, in the case of using an oxide insulating film the composition of which is represented by GaOx (x>0), since the stoichiometric proportion of gallium oxide is Ga:O=1:1.5, an insulating film including an oxygen-excessive region where x is greater than 1.5 and less than 6 is formed. For example, in the case of using an oxide insulating film the composition of which is represented by SiOx (x>0), since the stoichiometric proportion of silicon oxide is Si:O=1:2, an insulating film including an oxygen-excessive region where x is greater than 2 and less than 8 is formed. Such an oxygen-excessive region may exist in a part of the insulating film (including its interface). In this manner, the amount of oxygen is made to greater than that of hydrogen in the insulating film.
The oxygen 421c added to (contained in) the insulating film 407 preferably has at least partly a dangling bond of oxygen in the oxide semiconductor. This is because the dangling bond can be bonded with hydrogen left in the film to immobilize hydrogen (make hydrogen an immovable ion).
Oxygen for the doping (an oxygen radical, an oxygen atom, and/or an oxygen ion) may be supplied from a radical generating apparatus with use of a gas including oxygen or from an ozone generating apparatus. More specifically, for example, the oxygen 421c can be generated with an apparatus for etching treatment on a semiconductor device, an apparatus for ashing on a mask, or the like to process the insulating film 407.
In addition, heat treatment (at 150° C. to 470° C.) may be performed on the insulating film 407 which has been subjected to the oxygen doping treatment. By the heat treatment, water or hydroxide generated by reaction between the oxygen 421c and the insulating film 407 can be removed from the insulating film 407. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the moisture amount is less than or equal to 20 ppm (−55° C. by conversion into a dew point), preferably less than or equal to 1 ppm, far preferably less than or equal to 10 ppb, in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
It is preferable to form the insulating film 409 over the insulating film 407, as a protective insulating film for blocking to prevent entrance of an impurity such as moisture or hydrogen into the oxide semiconductor film 403. As the insulating film 409, it is preferable to use an inorganic insulating film such as a silicon nitride film, an aluminum oxide film, or the like. For example, a silicon nitride film is formed by an RF sputtering method. An RF sputtering method is preferable as a method for forming the insulating film 409 because of its high productivity.
Heat treatment may be performed after the insulating film is formed. For example, the heat treatment may be performed at a temperature higher than or equal to 100° C. and lower than or equal to 200° C. in the air for 1 hour to 30 hours. This heat treatment may be performed at a fixed heating temperature; alternatively, the following change in the heating temperature may be conducted plural times: the heating temperature is increased from room temperature to a temperature higher than or equal to 100° C. and lower than or equal to 200° C. and then decreased to room temperature.
Through the above process, the transistor 450 is formed (see FIG. 5C). The transistor 450 is a transistor including the oxide semiconductor film 403 which is highly purified and from which an impurity such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) is removed. Therefore, variation in the electric characteristics of the transistor 450 is suppressed and the transistor 450 is electrically stable.
In the transistor 450 including the highly-purified oxide semiconductor film 403 in accordance with this embodiment, the current value in an off-state (off-current value) thereof can be low.
As described above, the oxygen doping treatment can be performed not only on the oxide semiconductor film 403 but also on the gate insulating film 402 and/or the insulating film 407. The oxygen doping treatment may be performed on either one or both of the gate insulating film 402 and the insulating film 407.
In addition, heat treatment (at 150° C. to 470° C.) may be performed after the oxygen doping treatment is performed. The heat treatment may be performed under an atmosphere of nitrogen, oxygen, an ultra dry air (the dew point is less than or equal to −60° C., preferably less than or equal to −80° C. in the measurement with the use of a dew point meter of a cavity ring down laser spectroscopy (CRDS) system), or a rare gas (argon, helium, or the like). The atmosphere of nitrogen, oxygen, the ultra dry air, or the rare gas is preferably highly purified without containing water, hydrogen, or the like.
Such a transistor including an oxide semiconductor film subjected to oxygen doping treatment is a transistor having high reliability in which the amount of change in threshold voltage of the transistor by the bias-temperature stress test (BT test) can be reduced.
Further, in the transistor 450 including the oxide semiconductor film 403, relatively high field-effect mobility can be obtained, which enables high-speed operation. Consequently, with the above transistor provided in a pixel portion of a semiconductor device having a display function, high-quality images can be displayed. In addition, by using the transistor including the highly purified oxide semiconductor film, a driver circuit portion and a pixel portion can be formed over one substrate, whereby the number of components of the semiconductor device can be reduced.
In this manner, a semiconductor device including an oxide semiconductor, which has stable electric characteristics, can be provided. Accordingly, a semiconductor device with high reliability can be provided.
Embodiment 3
In Embodiment 3, another embodiment of a semiconductor device will be described using FIGS. 13A to 13D. The same portions as and portions having functions similar to those described in Embodiment 1 or 2 can be formed in a manner similar to that described in Embodiment 1 or 2; therefore, description thereof is omitted. In addition, detailed description of the same portions is omitted.
In this embodiment, an example of a structure will be described in which a source electrode layer and/or a drain electrode layer of a transistor are/is connected to a conductive layer (such as a wiring layer or a pixel electrode layer). Note that this embodiment can also be applied to any of the transistors described in Embodiments 1 and 2.
As shown in FIG. 13A, a transistor 470 includes, over the substrate 400 having an insulating surface, the gate electrode layer 401, the gate insulating film 402, the oxide semiconductor film 403, the source electrode layer 405a, and the drain electrode layer 405b. 
As is described in Embodiment 1, oxygen doping is performed on the oxide semiconductor film 403 which has been subjected to the heat treatment for dehydration or dehydrogenation also in a manufacturing process of the transistor 470. The transistor 470 in this embodiment is an example in which the source electrode layer 405a and the drain electrode layer 405b are formed over the oxide semiconductor film 403 which has been subjected to heat treatment for dehydration or dehydrogenation, and then oxygen doping is performed thereon.
With this oxygen doping, an oxygen radical, an oxygen atom, or an oxygen ion reaches and is delivered to (is introduced to the vicinity of top surfaces of) the source electrode layer 405a and the drain electrode layer 405b in addition to the oxide semiconductor film 403. Consequently, as shown in FIG. 13A, the top surfaces of the source electrode layer 405a and the drain electrode layer 405b irradiated with the oxygen radical, the oxygen atom, or the oxygen ion may be oxidized to form metal oxide regions 404a and 404b between the insulating film 407 and the source electrode layer 405a and the drain electrode layer 405b. The metal oxide regions 404a and 404b may each be in the form of a film.
Next, the insulating film 407 and the insulating film 409 are sequentially stacked over the transistor 470 (see FIG. 13B).
In the case of FIG. 13B, openings 455a and 455b where, over the insulating film 409, conductive layers connected to the source electrode layer 405a and the drain electrode layer 405b are formed are preferably formed so that parts of the metal oxide regions 404a and 404b having high resistance are removed to expose parts of the source electrode layer 405a and the drain electrode layer 405b having low resistance (see FIG. 13C). Parts of the insulating film 409, the insulating film 407, and the metal oxide regions 404a and 404b are removed to form the openings 455a and 455b. The source electrode layer 405a and the drain electrode layer 405b are partly removed to have depressions. The oxygen concentrations of regions of the source electrode layer 405a and the drain electrode layer 405b, which are exposed on the bottom surfaces of the depressions, are lower than those of regions of the metal oxide regions 404a and 404b, which are in the top surfaces of the source electrode layer 405a and the drain electrode layer 405b. 
For example, the parts of the source electrode layer 405a and the drain electrode layer 405b may be removed from the top surfaces by a thickness one half or less than (preferably one third or less than) the thickness of the source electrode layer 405a, the drain electrode layer 405b in the openings 455a and 455b to remove parts of the metal oxide regions 404a and 404b formed in the surfaces of the source electrode layer 405a and the drain electrode layer 405b. 
Next, conductive layers 456a and 456b are formed in contact with the source electrode layer 405a and the drain electrode layer 405b exposed in the openings 455a and 455b (see FIG. 13D). The conductive layers 456a and 456b are formed directly in contact with the source electrode layer 405a and the drain electrode layer 405b having low resistance without the metal oxide regions 404a and 404b having high resistance provided therebetween; thus, favorable electrical connection (contact) can be made.
An insulating film may be formed over the conductive layers 456a and 456b, as a protective layer to cover the transistor 470. Moreover, by covering the insulating film, it is possible to prevent impurities such as hydrogen and moisture from entering the oxide semiconductor film 403 from the openings 455a and 455b. 
In this manner, favorable electrical connection of a transistor can be obtained and a semiconductor device including an oxide semiconductor with stable electrical characteristics can be provided. Therefore, a semiconductor device with high reliability can be provided.
Embodiment 4
In Embodiment 4, an example of a plasma apparatus (also referred to as an ashing apparatus) which can be used for oxygen doping treatment will be described. This apparatus is industrially suitable as compared to an ion implantation apparatus or the like because the apparatus can be applicable for a large-sized substrate of the fifth generation or later, for example.
FIG. 14A illustrates an example of a top view of a single wafer multi-chamber equipment. FIG. 14B illustrates an example of a cross-sectional view of a plasma apparatus (also referred to as an ashing apparatus) used for oxygen doping.
The single wafer multi-chamber equipment illustrated in FIG. 14A includes three plasma apparatuses 10 each of which is shown in FIG. 14B, a substrate supply chamber 11 including three cassette ports 14 for holding a process substrate, a load lock chamber 12, a transfer chamber 13, and the like. A substrate supplied to the substrate supply chamber is transferred through the load lock chamber 12 and the transfer chamber 13 to a vacuum chamber 15 in the plasma apparatus and is subjected to oxygen doping. The substrate which has been subjected to oxygen doping is transferred from the plasma apparatus, through the load lock chamber and the transfer chamber, to the substrate supply chamber. A transfer robot for transferring a process substrate is provided in each of the substrate supply chamber 11 and the transfer chamber 13.
Referring to FIG. 14B, the plasma apparatus 10 includes the vacuum chamber 15. A plurality of gas outlets and an ICP coil (an inductively coupled plasma coil) 16 which is a generation source of plasma are provided on a top portion of the vacuum chamber 15.
The number of gas outlets arranged in a center portion, seen from the top of the plasma apparatus 10 is 12. Each of the gas outlets is connected to a gas supply source for supplying an oxygen gas, via a gas flow path 17. The gas supply source includes a mass flow controller and the like and can supply an oxygen gas to the gas flow pass 17 at a desired flow rate (which is greater than 0 sccm and less than or equal to 1000 sccm). The oxygen gas supplied from the gas supply source is supplied from the gate flow pass 17, through the 12 gas outlets, into the vacuum chamber 15.
The ICP coil 16 includes a plurality of strip-like conductors each of which has a spiral form. One end of each of the conductors is electrically connected to a first high-frequency power source 18 (13.56 MHz) via a matching circuit for controlling impedance, and the other end thereof is grounded.
A substrate stage 19 functioning as a bottom electrode is provided in a lower portion of the vacuum chamber. By an electrostatic chuck or the like provided for the substrate stage 19, a process substrate 20 is held on the substrate stage so as to be detachable. The substrate stage 19 is provided with a heater as a heating system and a He gas flow pass as a cooling system. The substrate stage is connected to a second high-frequency power source 21 (3.2 MHz) for applying a substrate bias voltage.
In addition, the vacuum chamber 15 is provided with an exhaust port and an automatic pressure control valve (also referred to as an APC) 22. The APC is connected to a turbo molecular pump 23 and connected to a dry pump 24 via the turbo molecular pump 23. The APC controls the inside pressure of the vacuum chamber. The turbo molecular pump 23 and the dry pump 24 reduce the inside pressure of the vacuum chamber 15.
Next, described is an example in which plasma is generated in the vacuum chamber 15 illustrated in FIG. 14B, and oxygen doping is performed on an oxide semiconductor film or a gate insulating film provided for the process substrate 20.
First, the inside pressure of the vacuum chamber 15 is held at a desired pressure by operating the turbo molecular pump 23, the dry pump 24, and the like, and then, the process substrate 20 is installed on the substrate stage in the vacuum chamber 15. The process substrate 20 held on the substrate stage has at least an oxide semiconductor film or a gate insulating film. In this embodiment, the inside pressure of the vacuum chamber 15 is held at 1.33 Pa. The flow rate of the oxygen gas supplied through the gas outlets into the vacuum chamber 15 is set at 250 sccm.
Next, a high-frequency power is applied from the first high-frequency power source 18 to the ICP coil 16, thereby generating plasma. Then, a state in which plasma is being generated is kept for a certain period (longer than or equal to 30 seconds and shorter than or equal to 600 seconds). The high-frequency power applied to the ICP coil 16 is greater than or equal to 1 kW and less than or equal to 10 kW. In this embodiment, the high-frequency power is set at 6000 W. At that time, a substrate bias voltage may be applied from the second high-frequency power source 21 to the substrate stage. In this embodiment, the power used for applying the substrate bias voltage is set at 1000 W.
In this embodiment, the state in which plasma is being generated is kept for 60 seconds and then, the process substrate 20 is transferred from the vacuum chamber 15. In this manner, oxygen doping can be performed on the oxide semiconductor film or the gate insulating film provided for the process substrate 20.
Embodiment 5 can be implemented in appropriate combination with any of the structures described in the other embodiments.
Embodiment 5
A semiconductor device having a display function (also referred to as a display device) can be manufactured using the transistor exemplified in any of Embodiments 1 to 3. Moreover, part or all of driver circuitry which include the transistor can be formed over a substrate where a pixel portion is formed, whereby a system-on-panel can be obtained.
In FIG. 12A, a sealant 4005 is provided so as to surround a pixel portion 4002 provided over a first substrate 4001, and the pixel portion 4002 is sealed with a second substrate 4006. In FIG. 12A, a signal line driver circuit 4003 and a scan line driver circuit 4004 which are formed using a single crystal semiconductor film or a polycrystalline semiconductor film over another substrate are mounted in a region that is different from the region surrounded by the sealant 4005 over the first substrate 4001. Various signals and potentials are supplied to the signal line driver circuit 4003, the scan line driver circuit 4004, and the pixel portion 4002 from flexible printed circuits (FPCs) 4018a and 4018b. 
In FIGS. 12B and 12C, the sealant 4005 is provided so as to surround the pixel portion 4002 and the scan line driver circuit 4004 which are provided over the first substrate 4001. The second substrate 4006 is provided over the pixel portion 4002 and the scan line driver circuit 4004. Accordingly, the pixel portion 4002 and the scan line driver circuit 4004 are sealed together with the display element, by the first substrate 4001, the sealant 4005, and the second substrate 4006. In FIGS. 12B and 12C, the signal line driver circuit 4003 which is formed using a single crystal semiconductor film or a polycrystalline semiconductor film over another substrate is mounted in a region that is different from the region surrounded by the sealant 4005 over the first substrate 4001. In FIGS. 12B and 12C, various signals and potential are supplied to the signal line driver circuit 4003, the scan line driver circuit 4004, and the pixel portion 4002 from an FPC 4018.
Although FIGS. 12B and 12C each illustrate an example in which the signal line driver circuit 4003 is separately formed and mounted on the first substrate 4001, an embodiment of the present invention is not limited to this structure. The scan line driver circuit may be separately formed and then mounted, or only part of the signal line driver circuit or part of the scan line driver circuit may be separately formed and then mounted.
A connection method of a separately formed driver circuit is not particularly limited; a chip on glass (COG) method, a wire bonding method, a tape automated bonding (TAB) method, or the like can be used. FIG. 12A illustrates an example in which the signal line driver circuit 4003 and the scan line driver circuit 4004 are mounted by a COG method. FIG. 12B illustrates an example in which the signal line driver circuit 4003 is mounted by a COG method. FIG. 12C illustrates an example in which the signal line driver circuit 4003 is mounted by a TAB method.
In addition, the display device includes a panel in which the display element is sealed, and a module in which an IC or the like including a controller is mounted on the panel.
Note that the display device in this specification means an image display device, a display device, or a light source (including a lighting device). Furthermore, the display device also includes the following in its category: a module to which a connector such as an FPC, a TAB tape, or a TCP is attached; a module having a TAB tape or a TCP at the tip of which a printed wiring board is provided; and a module in which an integrated circuit (IC) is directly mounted on a display element by a COG method.
The pixel portion and the scan line driver circuit provided over the first substrate include a plurality of transistors; any of the transistors which are described in Embodiments 1 to 3 can be applied thereto.
As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element) or a light-emitting element (also referred to as a light-emitting display element) can be used. The light-emitting element includes, in its category, an element whose luminance is controlled by a current or a voltage, and specifically includes, in its category, an inorganic electroluminescent (EL) element, an organic EL element, and the like. Furthermore, a display medium whose contrast is changed by an electric effect, such as electronic ink, can be used.
An embodiment of the semiconductor device is described with reference to FIGS. 6 to 8. FIGS. 6 to 8 correspond to cross-sectional views along line M-N in FIG. 12B.
As illustrated in FIGS. 6 to 8, the semiconductor device includes a connection terminal electrode 4015 and a terminal electrode 4016. The connection terminal electrode 4015 and the terminal electrode 4016 are electrically connected to a terminal included in the FPC 4018 via an anisotropic conductive film 4019.
The connection terminal electrode 4015 is formed using the same conductive film as a first electrode layer 4030, and the terminal electrode 4016 is formed using the same conductive film as source and drain electrodes of a transistor 4010 and a transistor 4011.
The pixel portion 4002 and the scan line driver circuit 4004 which are provided over the first substrate 4001 include a plurality of transistors. In FIGS. 6 to 8, the transistor 4010 included in the pixel portion 4002 and the transistor 4011 included in the scan line driver circuit 4004 are illustrated as an example. In FIG. 6, insulating films 4020 and 4024 are provided over the transistor 4010 and the transistor 4011. In FIGS. 7 and 8, an insulating layer 4021 is further provided. An insulating film 4023 is an insulating film functioning as a base film.
In this embodiment, any transistors described in Embodiments 1 to 3 can be applied to the transistor 4010 and the transistor 4011. Variation in electric characteristics of the transistor 4010 and the transistor 4011 is suppressed and the transistor 4010 and the transistor 4011 are electrically stable. Accordingly, highly reliable semiconductor devices can be provided as the semiconductor devices illustrated in FIGS. 6 to 8.
In addition, in this embodiment, a conductive layer is provided over the insulating layer so as to overlap with a channel formation region of an oxide semiconductor film in the transistor 4011 for the driver circuit. By providing the conductive layer so as to overlap with the channel formation region of the oxide semiconductor film, the amount of change in the threshold voltage of the transistor 4011 by the BT test can be further reduced. The potential of the conductive layer may be the same as or different from that of a gate electrode of the transistor 4011, and the conductive layer can be functioned as a second gate electrode. The potential of the conductive layer may be GND, 0V, or in a floating state.
The conductive layer also functions to block an external electric field, that is, to prevent an external electric field (particularly, to prevent static electricity) from effecting the inside (a circuit portion including a transistor). The blocking function of the conductive layer enables the variation in electrical characteristics of the transistor due to the effect of external electric field such as static electricity to be prevented.
The transistor 4010 provided in the pixel portion 4002 is electrically connected to the display element in a display panel. A variety of display elements can be used as the display element as long as display can be performed.
An example of a liquid crystal display device using a liquid crystal element as the display element is described in FIG. 6. In FIG. 6, a liquid crystal element 4013 which is a display element includes the first electrode layer 4030, the second electrode layer 4031, and a liquid crystal layer 4008. An insulating film 4032 and an insulating film 4033 which serve as alignment films are provided so that the liquid crystal layer 4008 is provided therebetween. The second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 are stacked with the liquid crystal layer 4008 provided therebetween.
A spacer 4035 is a columnar spacer obtained by selective etching of an insulating film and is provided in order to control the thickness (a cell gap) of the liquid crystal layer 4008. Note the spacer is not limited to a columnar spacer, and, for example, a spherical spacer may be used.
In the case where a liquid crystal element is used as the display element, a thermotropic liquid crystal, a low-molecular liquid crystal, a high-molecular liquid crystal, a polymer dispersed liquid crystal, a ferroelectric liquid crystal, an anti-ferroelectric liquid crystal, or the like can be used. Such a liquid crystal material exhibits a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, or the like depending on a condition.
Alternatively, a liquid crystal exhibiting a blue phase for which an alignment film is unnecessary may be used. A blue phase is one of liquid crystal phases, which is generated just before a cholesteric phase changes into an isotropic phase while temperature of cholesteric liquid crystal is increased. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which 5 weight percent or more of a chiral material is mixed is used for the liquid crystal layer in order to improve the temperature range. The liquid crystal composition which includes a liquid crystal exhibiting a blue phase and a chiral agent has a short response time of 1 msec or less, has optical isotropy, which makes the alignment process unneeded, and has a small viewing angle dependence. In addition, since an alignment film does not need to be provided and rubbing treatment is unnecessary, electrostatic discharge damage caused by the rubbing treatment can be prevented and defects and damage of the liquid crystal display device can be reduced in the manufacturing process. Thus, productivity of the liquid crystal display device can be increased.
The specific resistivity of the liquid crystal material is 1×109 Ω·cm or more, preferably 1×1011 Ω·cm or more, far preferably 1×1012 Ω·cm or more. The value of the specific resistivity in this specification is measured at 20° C.
The size of a storage capacitor formed in the liquid crystal display device is set considering the leakage current of the transistor provided in the pixel portion or the like so that electrical charge can be held for a predetermined period. By using the transistor including the highly purified oxide semiconductor film, it is enough to provide a storage capacitor having a capacitance that is 1⁄3 or less, preferably 1⁄5 or less of a liquid crystal capacitance of each pixel.
In the transistor used in this embodiment, which includes the highly purified oxide semiconductor film, the current in an off state (the off-state current) can be made small. Accordingly, an electrical signal such as an image signal can be held for a long period, and a writing interval can be set long in a state where power is being supplied. Accordingly, the frequency of refresh operation can be reduced, which leads to an effect of suppressing power consumption.
In addition, the transistor including the highly purified oxide semiconductor film used in this embodiment can have relatively high field-effect mobility and thus is capable of high speed operation. Therefore, by using the transistor in the pixel portion of the liquid crystal display device, a high-quality image can be displayed. In addition, since the transistors can be separately provided in a driver circuit portion and a pixel portion over one substrate, the number of components of the liquid crystal display device can be reduced.
For the liquid crystal display device, a twisted nematic (TN) mode, an in-plane-switching (IPS) mode, a fringe field switching (FFS) mode, an axially symmetric aligned micro-cell (ASM) mode, an optical compensated birefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, an antiferroelectric liquid crystal (AFLC) mode, or the like can be used.
A normally black liquid crystal display device such as a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be used. The vertical alignment mode is a method of controlling alignment of liquid crystal molecules of a liquid crystal display panel, in which liquid crystal molecules are aligned vertically to a panel surface when no voltage is applied. Some examples are given as the vertical alignment mode. For example, a multi-domain vertical alignment (MVA) mode, a patterned vertical alignment (PVA) mode, an advanced super view (ASV) mode, or the like can be used. Moreover, it is possible to use a method called domain multiplication or multi-domain design, in which a pixel is divided into some regions (subpixels) and molecules are aligned in different directions in their respective regions.
In the display device, a black matrix (a light-blocking layer), an optical member (an optical substrate) such as a polarizing member, a retardation member, or an anti-reflection member, and the like are provided as appropriate. For example, circular polarization may be provided with a polarizing substrate and a retardation substrate. In addition, a backlight, a side light, or the like may be used as the light source.
In addition, it is possible to employ a time-division display method (a field-sequential driving method) with the use of a plurality of light-emitting diodes (LEDs) as a backlight. A field-sequential driving method enables color display without using a color filter.
As a display method in the pixel portion, a progressive method, an interlace method or the like can be employed. Further, color elements controlled in a pixel for color display are not limited to three colors of R, G, and B (R, G, and B correspond to red, green, and blue, respectively). For example, the following can be used: R, G, B, and W (W corresponds to white); or R, G, B, and one or more of yellow, cyan, magenta, and the like. The sizes of display regions may be different between respective dots of the color elements. The present invention is not limited to the application to a display device for color display but can also be applied to a display device for monochrome display.
Alternatively, as the display element included in the display device, a light-emitting element utilizing electroluminescence can be used. Light-emitting elements utilizing electroluminescence are classified depending on whether a light-emitting material is an organic compound or an inorganic compound. In general, the former is referred to as an organic EL element, and the latter is referred to as an inorganic EL element.
In an organic EL element, by application of voltage to a light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and current flows. The carriers (electrons and holes) are recombined, and thus, the light-emitting organic compound is excited. The light-emitting organic compound returns to a ground state from the excited state, thereby emitting light. Owing to such a mechanism, this light-emitting element is referred to as a current-excitation light-emitting element.
The inorganic EL elements are classified depending on the element structure into a dispersion-type inorganic EL element and a thin-film inorganic EL element. A dispersion-type inorganic EL element has a light-emitting layer where particles of a light-emitting material are dispersed in a binder, and its light emission mechanism is donor-acceptor recombination type light emission that utilizes a donor level and an acceptor level. A thin-film inorganic EL element has a structure where a light-emitting layer is sandwiched between dielectric layers, which are further sandwiched between electrodes, and its light emission mechanism is localized type light emission that utilizes inner-shell electron transition of metal ions. An example using an organic EL element as a light-emitting element is described here.
In order to extract light emitted from the light-emitting element, at least one of a pair of electrodes is transparent. The transistor and the light-emitting element are provided over the substrate. The light-emitting element have the following emission structure: a top emission structure in which light emission is extracted through the surface opposite to the substrate; a bottom emission structure in which light emission is extracted through the surface on the substrate side; or a dual emission structure in which light emission is extracted through the surface opposite to the substrate and the surface on the substrate side.
An example of a light-emitting device in which a light-emitting element is used as the display element is illustrated in FIG. 7. A light-emitting element 4513 which is a display element is electrically connected to the transistor 4010 provided in the pixel portion 4002. A structure of the light-emitting element 4513 is not limited to the stacked-layer structure including the first electrode layer 4030, an electroluminescent layer 4511, and the second electrode layer 4031, which is shown in FIG. 7. The structure of the light-emitting element 4513 can be changed as appropriate depending on a direction in which light is extracted from the light-emitting element 4513, or the like.
A partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. It is particularly preferable that the partition wall 4510 be formed using a photosensitive resin material to have an opening over the first electrode layer 4030 so that the sidewall of the opening has a tilted surface with continuous curvature.
The electroluminescent layer 4511 may be formed using a single layer or a plurality of layers stacked.
A protective film may be formed over the second electrode layer 4031 and the partition wall 4510 in order to prevent entry of oxygen, hydrogen, moisture, carbon dioxide, or the like into the light-emitting element 4513. As the protective film, a silicon nitride film, a silicon nitride oxide film, a diamond like carbon (DLC) film, or the like can be formed. In addition, in a space which is formed with the first substrate 4001, the second substrate 4006, and the sealant 4005, a filler 4514 is provided for sealing. It is preferable that a panel be packaged (sealed) with a protective film (such as a laminate film or an ultraviolet curable resin film) or a cover material with high air-tightness and little degasification so that the panel is not exposed to the outside air, in this manner.
As the filler 4514, an ultraviolet curable resin or a thermosetting resin can be used as well as an inert gas such as nitrogen or argon. For example, PVC (polyvinyl chloride), acrylic, polyimide, an epoxy resin, a silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. For example, nitrogen is used for the filler.
In addition, if needed, an optical film, such as a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate (a quarter-wave plate or a half-wave plate), or a color filter, may be provided as appropriate for a light-emitting surface of the light-emitting element. Further, the polarizing plate or the circularly polarizing plate may be provided with an anti-reflection film. For example, anti-glare treatment by which reflected light can be diffused by surface roughness so as to reduce the glare can be performed.
Further, an electronic paper in which electronic ink is driven can be provided as the display device. The electronic paper is also called an electrophoretic display device (electrophoretic display) and has advantages in that it exhibits the same level of readability as regular paper, it exhibits less power consumption than other display devices, and it can be in a thin and light form.
An electrophoretic display device can have various modes. An electrophoretic display device contains a plurality of microcapsules dispersed in a solvent or a solute, each microcapsule containing first particles which are positively charged and second particles which are negatively charged. By applying an electric field to the microcapsules, the particles in the microcapsules move in opposite directions to each other and only the color of the particles gathering on one side is displayed. Note that the first particles and the second particles each contain pigment and do not move without an electric field. Moreover, the first particles and the second particles have different colors (one of which may be colorless).
Thus, an electrophoretic display device is a display device that utilizes a so-called dielectrophoretic effect by which a substance having a high dielectric constant moves to a high-electric field region.
A solution in which the above microcapsules are dispersed in a solvent is referred to as electronic ink. This electronic ink can be printed on a surface of glass, plastic, cloth, paper, or the like. Furthermore, by using a color filter or particles containing a pigment, color display can also be achieved.
The first particles and the second particles in the microcapsules may be formed of one kind of material selected from a conductive material, an insulating material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electrochromic material, and a magnetophoretic material, or a composite material of any of these.
As the electronic paper, a display device using a twisting ball display system can be used. The twisting ball display system refers to a method in which spherical particles each colored in black and white are arranged between a first electrode layer and a second electrode layer which are electrode layers used for a display element, and a potential difference is generated between the first electrode layer and the second electrode layer to control orientation of the spherical particles, so that display is performed.
FIG. 8 illustrates active matrix electronic paper as an embodiment of a semiconductor device. The electronic paper shown in FIG. 8 is an example of a display device using the twisting ball display system.
Between the first electrode layer 4030 connected to the transistor 4010 and the second electrode layer 4031 provided for the second substrate 4006, spherical particles 4613 each of which includes a black region 4615a, a white region 4615b, and a cavity 4612 which is filled with liquid around the black region 4615a and the white region 4615b, are provided. A space around the spherical particles 4613 is filled with a filler 4614 such as a resin. The second electrode layer 4031 corresponds to a common electrode (counter electrode). The second electrode layer 4031 is electrically connected to a common potential line.
In FIGS. 6 to 8, a flexible substrate as well as a glass substrate can be used as any of the first substrate 4001 and the second substrate 4006. For example, a plastic substrate having light-transmitting properties can be used. As plastic, a fiberglass-reinforced plastics (FRP) plate, a polyvinyl fluoride (PVF) film, a polyester film, or an acrylic resin film can be used. In addition, a sheet with a structure in which an aluminum foil is sandwiched between PVF films or polyester films can be used.
The insulating film 4020 can be formed using an inorganic insulating material such as silicon oxide, silicon oxynitride, hafnium oxide, aluminum oxide, or gallium oxide. A manufacturing method of the insulating film 4020 is particularly limited; for example, a film formation method such as a plasma CVD method or a sputtering method can be used. The sputtering method is preferable in that hydrogen, water, and the like are unlikely to enter a film to be formed.
The insulating film 4024 can be formed with a single-layer structure or a multi-layer structure using one or more of a silicon nitride film, a silicon nitride oxide film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and an aluminum nitride oxide film by a sputtering method. The insulating film 4024 functions as a protective film of the transistor(s).
The insulating layer 4021 can be formed using an inorganic insulating material or an organic insulating material. The insulating layer 4021 may be formed using a heat-resistant organic insulating material such as an acrylic resin, polyimide, a benzocyclobutene-based resin, polyamide, or an epoxy resin, which is preferable as a planarizing insulating film. As well as such an organic insulating material, it is possible to use a low-dielectric constant material (a low-k material), a siloxane based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like. The insulating layer may be formed by stacking a plurality of insulating films formed of these materials.
There is no particular limitation on the method for forming the insulating layer 4021; the insulating layer 4021 can be formed, depending on the material, by a sputtering method, a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like.
The display device displays an image by transmitting light from the light source or the display element. Therefore, the substrate and the thin films such as the insulating film and the conductive film provided for the pixel portion where light is transmitted have light-transmitting properties with respect to light in the visible-light wavelength range.
The first electrode layer and the second electrode layer (each of which may be called a pixel electrode layer, a common electrode layer, a counter electrode layer, or the like) for applying voltage to the display element may have light-transmitting properties or light-reflecting properties, which depends on the direction in which light is extracted, the position where the electrode layer is provided, the pattern structure of the electrode layer, and the like.
Any of the first electrode layer 4030 and the second electrode layer 4031 can be formed using a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, or indium tin oxide to which silicon oxide is added.
Any of the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more kinds of materials selected from metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag); alloys of these metals; and nitrides of these metals.
Since the transistor is easily broken owing to static electricity or the like, a protective circuit for protecting the driver circuit is preferably provided. The protective circuit is preferably formed using a non-linear element.
In this manner, by using any of the transistors described in Embodiments 1 to 3, a highly reliable semiconductor device can be provided.
Embodiment 5 can be implemented in appropriate combination with any of the structures described in the other embodiments.
Embodiment 6
A semiconductor device having an image sensor function for reading data of an object can be manufactured with the use of any transistor exemplified in Embodiments 1 to 3.
An example of a semiconductor device having an image sensor function is illustrated in FIG. 9A. FIG. 9A illustrates an equivalent circuit of a photo sensor, and FIG. 9B is a cross-sectional view illustrating part of the photo sensor.
One electrode of a photodiode 602 is electrically connected to a photodiode reset signal line 658, and the other electrode thereof is electrically connected to a gate of a transistor 640. One of a source and a drain of the transistor 640 is electrically connected to a photo sensor reference signal line 672, and the other of the source and the drain thereof is electrically connected to one of a source and a drain of a transistor 656. A gate of the transistor 656 is electrically connected to a gate signal line 659, and the other of the source and the drain thereof is electrically connected to a photo sensor output signal line 671.
Note that in circuit diagrams in this specification, a transistor including an oxide semiconductor film is denoted with a symbol “OS” so that it can be identified as a transistor including an oxide semiconductor film. The transistor 640 and the transistor 656 in FIG. 9A are transistors each including an oxide semiconductor film.
FIG. 9B is a cross-sectional view of the photodiode 602 and the transistor 640 in the photo sensor. The photodiode 602 functioning as a sensor and the transistor 640 are provided over a substrate 601 (a TFT substrate) having an insulating surface. A substrate 613 is provided over the photodiode 602 and the transistor 640 with the use of an adhesion layer 608.
An insulating film 631, a protective insulating film 632, a first interlayer insulating layer 633, and a second interlayer insulating layer 634 are provided over the transistor 640. The photodiode 602 is provided over the first interlayer insulating layer 633. In the photodiode 602, a first semiconductor layer 606a, a second semiconductor layer 606b, and a third semiconductor layer 606c are stacked in this order over the first interlayer insulating layer 633 between an electrode layer 641 provided over the first interlayer insulating layer 633 and an electrode layer 642 provided over the second interlayer insulating layer 634.
In this embodiment, any of the transistors described in Embodiments 1 to 3 can be applied to the transistor 640. In the transistor 640 and the transistor 656, variation in electrical characteristics is suppressed, and the transistor 640 and the transistor 656 are electrically stable. Accordingly, a highly reliable semiconductor device can be provided as the semiconductor device of this embodiment described in FIGS. 9A and 9B.
The electrode layer 641 is electrically connected to a conductive layer 643 formed in the second interlayer insulating layer 634, and the electrode layer 642 is electrically connected to a gate electrode 645 through the electrode layer 641. The gate electrode 645 is electrically connected to the gate electrode of the transistor 640, and the photodiode 602 is electrically connected to the transistor 640. The photodiode 602 is electrically connected to the transistor 640.
Here, a pin photodiode in which a semiconductor layer having a p-type conductivity as the first semiconductor layer 606a, a high-resistance semiconductor layer (i-type semiconductor layer) as the second semiconductor layer 606b, and a semiconductor layer having an n-type conductivity as the third semiconductor layer 606c are stacked is illustrated as an example.
The first semiconductor layer 606a is a p-type semiconductor layer and can be formed using an amorphous silicon film containing an impurity element imparting the p-type conductivity. The first semiconductor layer 606a is formed by a plasma CVD method with use of a semiconductor source gas containing an impurity element belonging to Group 13 (such as boron (B)). As the semiconductor source gas, silane (SiH4) may be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, or the like may be used. Further alternatively, an amorphous silicon film which does not contain an impurity element may be formed, and then, an impurity element may be introduced to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like may be conducted after introducing the impurity element by an ion implantation method or the like in order to diffuse the impurity element. In that case, as a method of forming the amorphous silicon film, an LPCVD method, a chemical vapor deposition method, a sputtering method, or the like may be used. The first semiconductor layer 606a is preferably formed to have a thickness greater than or equal to 10 nm and less than or equal to 50 nm.
The second semiconductor layer 606b is an i-type semiconductor layer (intrinsic semiconductor layer) and is formed using an amorphous silicon film. As for formation of the second semiconductor layer 606b, an amorphous silicon film is formed with use of a semiconductor source gas by a plasma CVD method. As the semiconductor source gas, silane (SiH4) may be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, or the like may be used. The second semiconductor layer 606b may be formed by an LPCVD method, a vapor deposition method, a sputtering method, or the like. The second semiconductor layer 606b is preferably formed to have a thickness greater than or equal to 200 nm and less than or equal to 1000 nm.
The third semiconductor layer 606c is an n-type semiconductor layer and is formed using an amorphous silicon film containing an impurity element imparting the n-type conductivity. The third semiconductor layer 606c is formed by a plasma CVD method with use of a semiconductor source gas containing an impurity element belonging to Group 15 (e.g., phosphorus (P)). As the semiconductor source gas, silane (SiH4) may be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, or the like may be used. Further alternatively, an amorphous silicon film which does not contain an impurity element may be formed, and then, an impurity element may be introduced to the amorphous silicon film by a diffusion method or an ion implantation method. Heating or the like may be conducted after introducing the impurity element by an ion injecting method or the like in order to diffuse the impurity element. In that case, as a method of forming the amorphous silicon film, an LPCVD method, a chemical vapor deposition method, a sputtering method, or the like may be used. The third semiconductor layer 606c is preferably formed to have a thickness greater than or equal to 20 nm and less than or equal to 200 nm.
Any of the first semiconductor layer 606a, the second semiconductor layer 606b, and the third semiconductor layer 606c is not necessarily formed using an amorphous semiconductor, and may be formed using a polycrystalline semiconductor, or a micro crystalline semiconductor (a semi-amorphous semiconductor: SAS).
The microcrystalline semiconductor belongs to a metastable state of an intermediate between amorphous and single crystalline, considering Gibbs free energy. That is, the microcrystalline semiconductor is a semiconductor having a third state which is stable in terms of free energy and has a short range order and lattice distortion. Columnar-like or needle-like crystals grow in a normal direction with respect to a substrate surface. The Raman spectrum of microcrystalline silicon, that is a typical example of a microcrystalline semiconductor, is located in lower wave numbers than 520 cm−1, which represents a peak of the Raman spectrum of single crystal silicon. That is, the peak of the Raman spectrum of the microcrystalline silicon exists between 520 cm−1 which represents single crystal silicon and 480 cm−1 which represents amorphous silicon. The semiconductor contains hydrogen or halogen of at least 1 at. % to terminate a dangling bond. Moreover, microcrystalline silicon is made to contain a rare gas element such as helium, neon, argon, or krypton to further enhance lattice distortion, whereby stability is increased and a favorable microcrystalline semiconductor film can be obtained.
The microcrystalline semiconductor film can be formed by a high-frequency plasma CVD method with a frequency of several tens of megahertz to several hundreds of megahertz or using a microwave plasma CVD apparatus with a frequency of 1 GHz or more. Typically, the microcrystalline semiconductor film can be formed by using a gas obtained by diluting SiH4, Si2H6, SiH2Cl2, SiHCl3, SiCl4, or SiF4, with hydrogen. Further, with a dilution with one or plural kinds of rare gas elements selected from helium, neon, argon, and krypton in addition to silicon hydride and hydrogen, the microcrystalline semiconductor film can be formed. In that case, the flow ratio of hydrogen to silicon hydride is 5:1 to 200:1, preferably 50:1 to 150:1, far preferably 100:1. Further, a carbide gas such as CH4 or C2H6, a germanium gas such as GeH4 or GeF4, F2, or the like may be mixed into the gas containing silicon.
In addition, since the mobility of holes generated by a photoelectric effect is lower than that of electrons, a pin photodiode exhibits better characteristics when a surface on the p-type semiconductor layer side is used as a light-receiving plane. Here, an example in which light received by the photodiode 602 from a surface of the substrate 601, over which the pin photodiode is formed, is converted into electric signals is described. Further, light from the semiconductor layer having a conductivity type opposite from that of the semiconductor layer on the light-receiving plane is disturbance light; therefore, the electrode layer on the semiconductor layer having the opposite conductivity type is preferably formed from a light-blocking conductive film. Note that a surface on the n-type semiconductor layer side can alternatively be used as the light-receiving plane.
For reduction of the surface roughness, an insulating layer functioning as a planarizing insulating film is preferably used as any of the first interlayer insulating layer 633 and the second interlayer insulating layer 634. Any of the first interlayer insulating layer 633 and the second interlayer insulating layer 634 can be formed using, for example, an organic insulating material such as polyimide, an acrylic resin, a benzocyclobutene-based resin, polyamide, or an epoxy resin. As well as such an organic insulating material, it is possible to use a single layer or multi layers of a low-dielectric constant material (a low-k material), a siloxane-based resin, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or the like.
Any of the insulating film 631, the protective insulating film 632, the first interlayer insulating layer 633, and the second interlayer insulating layer 634 can be formed using an insulating material by a sputtering method, a spin coating method, a dipping method, spray coating, a droplet discharge method (e.g., an inkjet method, screen printing, or offset printing), roll coating, curtain coating, knife coating, or the like depending on the material.
With detection of light that enters the photodiode 602, data on an object to be detected can be read. A light source such as a backlight can be used for the data reading on the object.
Any of the transistors exemplified in Embodiments 1 to 3 can be used as the transistor 640. The transistor including the oxide semiconductor film which is highly purified by removing impurities such as hydrogen, moisture, a hydroxyl group, or hydride (also referred to as a hydrogen compound) and contains excessive oxygen supplied by oxygen doping or the like whose variation in the electric characteristics is suppressed is electrically stable. Accordingly, a highly reliable semiconductor device can be provided.
Embodiment 6 can be implemented in appropriate combination with any of the structures described in the other embodiments.
Embodiment 7
A semiconductor device disclosed in this specification can be applied to a variety of electronic appliances (including game machines). Examples of electronic appliances are a television set (also referred to as a television or a television receiver), a monitor of a computer or the like, a camera such as a digital camera or a digital video camera, a digital photo frame, a mobile phone handset (also referred to as a mobile phone or a mobile phone device), a portable game machine, a portable information terminal, an audio reproducing device, a large-sized game machine such as a pachinko machine, and the like. Examples of electronic appliances each including the liquid crystal display device described in the above embodiment will be described below.
FIG. 10A illustrates an electronic book reader (also referred to as an e-book reader) which can include housings 9630, a display portion 9631, operation keys 9632, a solar cell 9633, and a charge and discharge control circuit 9634. The electronic book reader illustrated in FIG. 10A has a function of displaying various kinds of information (e.g., a still image, a moving image, and a text image) on the display portion, a function of displaying a calendar, a date, the time, or the like on the display portion, a function of operating or editing the information displayed on the display portion, a function of controlling processing by various kinds of software (programs), and the like. In FIG. 10A, the charge and discharge control circuit 9634 has a battery 9635 and a DCDC converter (hereinafter, abbreviated as a converter) 9636. Any of the semiconductor devices described in the above embodiments can be applied to the display portion 9631, whereby a highly reliable electronic book reader can be provided.
In the case where a transflective liquid crystal display device or a reflective liquid crystal display device is used as the display portion 9631, use under a relatively bright condition is assumed; therefore, the structure illustrated in FIG. 10A is preferable because power generation by the solar cell 9633 and charge with the battery 9635 are effectively performed. Since the solar cell 9633 can be provided in a space (a surface or a rear surface) of the housing 9630 as appropriate, the battery 9635 can be efficiently charged, which is preferable. A lithium ion battery may be used as the battery 9635, which provides an advantage of downsizing or the like.
The structure and the operation of the charge and discharge control circuit 9634 illustrated in FIG. 10A are described with reference to a block diagram of FIG. 10B. The solar cell 9633, the battery 9635, the converter 9636, a converter 9637, switches SW1 to SW3, and the display portion 9631 are shown in FIG. 10B, and the battery 9635, the converter 9636, the converter 9637, and the switches SW1 to SW3 are included in the charge and discharge control circuit 9634.
First, an example of operation in the case where power is generated by the solar cell 9633 using external light is described. The voltage of power generated by the solar cell is raised or lowered by the converter 9636 to a voltage for charging the battery 9635. Then, when the power from the solar cell 9633 is used for the operation of the display portion 9631, the switch SW1 is turned on and the voltage of the power is raised or lowered by the converter 9637 to a voltage needed for the display portion 9631. In addition, when display on the display portion 9631 is not performed, for example, the switch SW1 is turned off and the switch SW2 is turned on so that charge of the battery 9635 is performed.
Next, operation in the case where power is not generated by the solar cell 9633 using external light is described. The voltage of power accumulated in the battery 9635 is raised or lowered by the converter 9637 with the switch SW3 turned on. Then, power from the battery 9635 is used for the operation of the display portion 9631.
Although the solar cell 9633 is described as an example of a means for charging, the battery 9635 may be charged with another means. The solar cell 9633 may be combined with another means for charging.
FIG. 11A illustrates a laptop personal computer, which includes a main body 3001, a housing 3002, a display portion 3003, a keyboard 3004, and the like. By applying any of the semiconductor devices described in the above embodiments to the display portion 3003, a highly reliable laptop personal computer can be provided.
FIG. 11B is a personal digital assistant (PDA), which includes a main body 3021 provided with a display portion 3023, an external interface 3025, operation buttons 3024, and the like. A stylus 3022 is included as an accessory for operation. By applying any of the semiconductor devices described in the above embodiments to the display portion 3023, a highly reliable personal digital assistant (PDA) can be provided.
FIG. 11C illustrates an example of an electronic book reader. For example, an electronic book reader 2700 includes two housings, i.e., a housing 2701 and a housing 2703. The housing 2701 and the housing 2703 are combined with a hinge 2711 so that the electronic book reader 2700 can be opened and closed with the hinge 2711 as an axis. With such a structure, the electronic book reader 2700 can operate like a paper book.
A display portion 2705 and a display portion 2707 are incorporated in the housing 2701 and the housing 2703, respectively. The display portion 2705 and the display portion 2707 may display one image or different images. In the structure where different images are displayed on different display portions, for example, the right display portion (the display portion 2705 in FIG. 11C) displays text and the left display portion (the display portion 2707 in FIG. 11C) displays images. By applying any of the semiconductor devices described in the above embodiments to the display portion 2705, 2707, a highly reliable electronic book reader can be provided as the electronic book reader 2700.
FIG. 11C illustrates an example in which the housing 2701 is provided with an operation portion and the like. For example, the housing 2701 is provided with a power switch 2721, operation keys 2723, a speaker 2725, and the like. With the operation keys 2723, pages can be turned. A keyboard, a pointing device, or the like may also be provided on the surface of the housing, on which the display portion is provided. Furthermore, an external connection terminal (an earphone terminal, a USB terminal, or the like), a recording medium insertion portion, and the like may be provided on the back surface or the side surface of the housing. Moreover, the electronic book reader 2700 may be equipped with a function of an electronic dictionary.
The electronic book reader 2700 may have a structure capable of wirelessly transmitting and receiving data. Through wireless communication, book data or the like can be purchased and downloaded from an electronic book server.
FIG. 11D illustrates a mobile phone, which includes two housings, i.e., a housing 2800 and a housing 2801. The housing 2801 includes a display panel 2802, a speaker 2803, a microphone 2804, a pointing device 2806, a camera lens 2807, an external connection terminal 2808, and the like. In addition, the housing 2800 includes a solar cell 2810 having a function of charging the mobile phone, an external memory slot 2811, and the like. An antenna is incorporated in the housing 2801. By applying any of the semiconductor devices described in the above embodiments to the display panel 2802, a highly reliable mobile phone can be provided.
Further, the display panel 2802 is provided with a touch panel. A plurality of operation keys 2805 which is displayed as images is illustrated by dashed lines in FIG. 11D. A boosting circuit by which a voltage output from the solar cell 2810 is increased to be sufficiently high for each circuit is also provided.
On the display panel 2802, the display direction can be appropriately changed depending on a usage pattern. Further, the mobile phone is provided with the camera lens 2807 on the same surface as the display panel 2802, and thus it can be used as a video phone. The speaker 2803 and the microphone 2804 can be used for videophone calls, recording and playing sound, and the like as well as voice calls. Furthermore, the housings 2800 and 2801 which are developed as illustrated in FIG. 11D can overlap with each other by sliding; thus, the size of the mobile phone can be decreased, which makes the mobile phone suitable for being carried.
The external connection terminal 2808 can be connected to an AC adapter and various types of cables such as a USB cable, and charging and data communication with a personal computer are possible. Moreover, a large amount of data can be stored and moved with a storage medium inserted into the external memory slot 2811.
Further, in addition to the above functions, an infrared communication function, a television reception function, or the like may be equipped.
FIG. 11E illustrates a digital video camera which includes a main body 3051, a display portion A 3057, an eyepiece portion 3053, an operation switch 3054, a display portion B 3055, a battery 3056, and the like. By applying any of the semiconductor devices described in the above embodiments to the display portion A 3057, the display portion B 3055, a highly reliable digital video camera can be provided.
FIG. 11F illustrates an example of a television device. In a television set 9600, a display portion 9603 is incorporated in a housing 9601. The display portion 9603 can display images. In FIG. 11F, the housing 9601 is supported by a stand 9605. By applying any of the semiconductor devices described in the above embodiments to the display portion 9603, a high reliable television set can be provided as the television set 9600.
The television set 9600 can be operated by an operation switch of the housing 9601 or a separate remote controller. Further, the remote controller may be provided with a display portion for displaying data output from the remote controller.
The television set 9600 is provided with a receiver, a modem, and the like. With the receiver, general television broadcasting can be received. Moreover, when the display device is connected to a communication network with or without wires via the modem, one-way (from sender to receiver) or two-way (between sender and receiver or between receivers) data communication can be performed.
Embodiment 7 can be implemented in appropriate combination with any of the structures described in the other embodiments.
Example 1
In Example 1, a transistor of one embodiment of the present invention is manufactured and the evaluation results of the electrical characteristics are shown.
A method for manufacturing a transistor of this example is described below.
A 100-nm-thick silicon nitride film was formed by a plasma CVD method and a 150-nm-thick silicon oxynitride film was formed consecutively over a glass substrate to form a base film, and a 100-nm-thick tungsten film was formed as a gate electrode layer over the silicon oxynitride film by a sputtering method. The tungsten film was etched selectively to form the gate electrode layer.
Then, a 100-nm-thick silicon oxynitride film was formed as a gate insulating film over the gate electrode layer by a plasma CVD method.
Next, a 40-nm-thick oxide semiconductor film was formed over the gate insulating film by sputtering using an In—Ga—Zn—O-based oxide semiconductor target (In2O3:Ga2O3:ZnO=1:1:1) under an atmosphere containing argon and oxygen (argon:oxygen=50 sccm:50 sccm) at 200° C. under the following conditions: the distance between the substrate and the target was 80 mm, the pressure was 0.4 Pa, and the direct current (DC) power was 5 kW. Here, the oxide semiconductor film was selectively etched to form an island-shaped oxide semiconductor film.
Next, heat treatment was performed on the oxide semiconductor film at 650° C. in a nitrogen atmosphere for 6 minutes.
Next, oxygen doping treatment was performed on the oxide semiconductor film with an ICP (Inductively Coupled Plasma) plasma apparatus as shown in FIG. 14B under an oxygen (250 sccm) atmosphere for one minute under the following conditions: the upper electrode bias was 6000 W, the lower electrode bias was 1000 W, and the pressure was 1.33 Pa.
Next, heat treatment was performed on the oxide semiconductor film at 450° C. for 1 hour in an air atmosphere. After that, the silicon oxynitride film that was the gate insulating film was selectively etched, so that an opening was formed over the gate electrode layer.
Next, as a source and drain electrode layers, a titanium film (with a thickness of 100 nm), an aluminum film (with a thickness of 400 nm), and a titanium film (with a thickness of 100 nm) were stacked over the oxide semiconductor film by a sputtering method at 100° C. The source and drain electrode layers were selectively etched so that the channel length L and the channel width W of the transistor were 3 μm and 50 μm, respectively.
Next, heat treatment was performed under a nitrogen atmosphere at 300° C. for one hour.
Next, a 300-nm-thick silicon oxide film was formed as a first insulating film by a sputtering method, so as to be in contact with the oxide semiconductor film. The silicon oxide film that was the first insulating film was etched selectively, so that openings were formed over the gate electrode layer and the source and drain electrode layers.
Next, over the silicon oxide film that was the first insulating film, a 1.5-μm-thick photosensitive acrylic resin was formed as a second insulating film by a spin coating method. The photosensitive acrylic resin that was the second insulating film was selectively exposed to light and developed, so that openings were formed over the gate electrode layer and the source and drain electrode layers. Next, in order to harden the photosensitive acrylic resin, heat treatment was performed under a nitrogen atmosphere at 250° C. for one hour.
Through the above process, a plurality of transistors each having the channel length L of 3 μm and the channel width W of 50 μm was manufactured over the glass substrate.
One of methods for examining reliability of transistors is a bias-temperature stress test (hereinafter, referred to as a BT test). The BT test is one kind of accelerated test and can evaluate change in characteristics, caused by long-term usage, of transistors in a short time. In particular, the amount of shift in threshold voltage of the transistor by the BT test is an important indicator for examining reliability. The smaller the shift in the threshold voltage by the BT test is, the higher the reliability of the transistor is.
Specifically, the temperature of a substrate provided with the transistor (the temperature is also called the substrate temperature) is set at a fixed temperature, a source and a drain of the transistor are set at the same potential, and a gate is supplied with a potential different from those of the source and the drain for a certain period. The substrate temperature may be determined as appropriate in accordance with the test purpose. A BT test where the potential applied to the gate is higher than the potential of the source and drain is referred to as +BT test and a BT test where the potential applied to the gate is lower than the potential of the source and drain is referred to as −BT test.
The test intensity of the BT test can be determined in accordance with the substrate temperature, the intensity of electric field intensity applied to the gate insulating film, and a time of applying the electric field. The intensity of the electric field applied to the gate insulating film is determined in accordance with a value obtained by dividing the potential difference between the gate and the source/drain by the thickness of the gate insulating film. For example, the intensity of the electric field applied to the gate insulating film with a thickness of 100 nm can be adjusted to 2 MV/cm by setting the potential difference to 20 V.
Results of a BT test of the transistor of this example are described below.
Note that a voltage refers to the difference between potentials of two points, and a potential refers to electrostatic energy (electric potential energy) of a unit charge at a given point in an electrostatic field. However, in general, a difference between a potential of one point and a reference potential (e.g., ground potential) is merely called a potential or a voltage, and the potential and the voltage are used as synonymous words in many cases. Thus, in this specification, a potential may be rephrased as a voltage and vice versa unless otherwise specified.
Both a +BT test and a −BT test were carried out under the following conditions: the substrate temperature was 150° C.; the intensity of the electric field applied to the gate insulating film was 2 MV/cm; and the time of application was one hour.
First, the +BT test is described below. In order to measure initial characteristics of the transistor subjected to the BT test, a change in characteristics of the source-drain current (hereinafter, referred to as the drain current), that is, Vg-Id characteristics were measured under the conditions where the substrate temperature was set to 40° C., the source-drain voltage (hereinafter, the drain voltage) was set to 1 V, and the source-gate voltage (hereinafter, the gate voltage) was changed from −20 V to +20 V. Here, as a countermeasure against moisture-absorption onto surfaces of the samples, the substrate temperature was set to 40° C.; however, the measurement may be performed at room temperature (25° C.) if there is no particular problem.
Next, the substrate temperature was increased to 150° C., and then, the potentials of the source and the drain of the transistor were set to 0 V. Then, voltage was applied to the gate of the transistor so that the intensity of the electric field applied to the gate insulating film was 2 MV/cm. In this example, since the thickness of the gate insulating film of the transistor was 100 nm, the gate was supplied with +20 V and was kept for one hour. The time of voltage application was one hour in this example; however, the time may be determined as appropriate in accordance with the purpose.
Next, the substrate temperature was decreased to 40° C. while the voltage was applied to the gate and the source and the drain. If application of the voltage is stopped before the substrate temperature was decreased to 40° C., the transistor which has been damaged during the BT test is repaired by the influence of residual heat. Thus, the substrate temperature needs to be decreased while the voltage is applied. After the substrate temperature was reached to 40° C., the application of voltage was stopped. Strictly, the time of decreasing temperature needs to be added to the time of the voltage application; however, since the temperature was able to be decreased to 40° C. in several minutes actually, this was considered to be an error range and the time of decreasing temperature was not added to the time of voltage application.
Next, Vg-Id characteristics were measured under the same conditions as those of the measurement of the initial characteristics, and Vg-Id characteristics after the +BT test were obtained.
Next, the −BT test is described below. The −BT test was performed in a manner similar to that of the +BT test, except in that the voltage applied to the gate of the transistor after the substrate temperature was increased to 150° C. was −20 V.
In the BT test, it is important to use a transistor which has been never subjected to a BT test. For example, if a −BT test is performed with use of a transistor which has been once subjected to a +BT test, the results of the −BT test cannot be evaluated correctly due to influence of the +BT test which has been performed previously. Further, the same applies to the case where a +BT test is performed on a transistor which has been once subjected to a +BT test. Note that the same does not apply to the case where a BT test is intentionally repeated in consideration of these influences.
Vg-Id characteristics of the transistor before and after the BT test are shown in FIGS. 17A and 17B and FIGS. 18A and 18B. In each of FIGS. 17A and 17B and FIGS. 18A and 18B, the horizontal axis indicates a gate voltage (Vg) and the vertical axis indicates a drain current (Id) with respect to the gate voltage. FIGS. 18A and 18B are enlarged graphs of FIGS. 17A and 17B, where the gate voltage (Vg) indicated in the horizontal axis is enlarged.
FIG. 18A show the Vg-Id characteristics of the transistor before and after the +BT test. Solid line 900 indicates the Vg-Id characteristics before the +BT test, that is, initial characteristics, and dotted line 901 indicates the Vg-Id characteristics after the +BT test.
FIG. 18B shows the Vg-Id characteristics of the transistor before and after the −BT test. Solid line 902 indicates the Vg-Id characteristics before the −BT test, that is, initial characteristics, and dotted line 903 indicates the Vg-Id characteristics after the −BT test.
In those measurements of the Vg-Id characteristics of the transistor of this example, the Id became less than or equal to the detection limit of the measurement device in an off region (a region where Vg is from about 0 V to a negative value in most n-channel transistors). Therefore, FIGS. 17A and 17B and FIGS. 18A and 18B do not show a part in which the Id was less than or equal to the detection limit of the measurement device.
Referring to FIG. 18A, the characteristics after the +BT test indicated by the line 901 shifted by 0.12 V in the threshold voltage as compared to the initial characteristics indicated by the line 900; referring to FIG. 18B, the characteristics after the −BT test indicated by the line 903 shifted by 0.07 V in the threshold voltage as compared to the initial characteristics indicated by the line 902. Accordingly, from the results that the amount of shift of the threshold voltage is as small as several volts by either of the BT tests, it could be confirmed that the transistor of this example was a transistor with high reliability in the BT test.
This application is based on Japanese Patent Application serial No. 2010-100343 filed with Japan Patent Office on Apr. 23, 2010, the entire contents of which are hereby incorporated by reference.

## Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a gate electrode layer;
forming a first gate insulating film over the gate electrode layer;
forming an oxide semiconductor film by sputtering method over the first gate insulating film so as to overlap with the gate electrode layer, wherein a substrate temperature is set to temperatures higher than or equal to 100° C. and lower than or equal to 600° C. during forming the oxide semiconductor film;
performing heat treatment on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film;
performing oxygen doping treatment on the oxide semiconductor film to supply an oxygen atom into the oxide semiconductor film after the heat treatment;
forming a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film; and
forming a second insulating film over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film.

2. The method for manufacturing a semiconductor device, according to claim 1, wherein the oxygen doping treatment is performed on the oxide semiconductor film so as to contain an oxygen atom at a ratio greater than a stoichiometric proportion and less than double of the stoichiometric proportion.

3. The method for manufacturing a semiconductor device, according to claim 1, wherein at least one of the first gate insulating film and the second insulating film is an insulating film containing a component element of the oxide semiconductor film.

4. The method for manufacturing a semiconductor device, according to claim 1, wherein one of the first gate insulating film and the second insulating film is an insulating film containing a component element of the oxide semiconductor film, and the other is a film containing an element which is different from the component element of the insulating film.

5. The method for manufacturing a semiconductor device, according to claim 1, wherein at least one of the first gate insulating film and the second insulating film is an insulating film containing gallium oxide.

6. The method for manufacturing a semiconductor device, according to claim 1, wherein one of the first gate insulating film and the second insulating film is an insulating film containing gallium oxide, and the other is a film containing a material other than gallium oxide.

7. The method for manufacturing a semiconductor device, according to claim 1, wherein a third insulating film containing nitrogen is formed to cover the second insulating film.

8. A method for manufacturing a semiconductor device, comprising the steps of:
forming a gate electrode layer;
forming a first gate insulating film containing an oxygen atom as a component over the gate electrode layer;
performing oxygen doping treatment on the first gate insulating film to supply an oxygen atom into the first gate insulating film;
forming an oxide semiconductor film by sputtering method over the first gate insulating film on which the oxygen doping treatment is performed so as to overlap with the gate electrode layer;
performing heat treatment on the oxide semiconductor film to remove a hydrogen atom in the oxide semiconductor film;
performing oxygen doping treatment on the oxide semiconductor film to supply an oxygen atom into the oxide semiconductor film after the heat treatment;
forming a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor film;
forming a second insulating film containing an oxygen atom as a component over the oxide semiconductor film, the source electrode layer, and the drain electrode layer so as to be in contact with the oxide semiconductor film; and
performing oxygen doping treatment on the second insulating film to supply an oxygen atom into the second insulating film.

9. The method for manufacturing a semiconductor device, according to claim 8, wherein the oxygen doping treatment is performed on the oxide semiconductor film so as to contain an oxygen atom at a ratio greater than a stoichiometric proportion and less than double of the stoichiometric proportion.

10. The method for manufacturing a semiconductor device, according to claim 8, wherein at least one of the first gate insulating film and the second insulating film is an insulating film containing a component element of the oxide semiconductor film.

11. The method for manufacturing a semiconductor device, according to claim 8, wherein one of the first gate insulating film and the second insulating film is an insulating film containing a component element of the oxide semiconductor film, and the other is a film containing an element which is different from the component element of the insulating film.

12. The method for manufacturing a semiconductor device, according to claim 8, wherein at least one of the first gate insulating film and the second insulating film is an insulating film containing gallium oxide.

13. The method for manufacturing a semiconductor device, according to claim 8, wherein one of the first gate insulating film and the second insulating film is an insulating film containing gallium oxide, and the other is a film containing a material other than gallium oxide.

14. The method for manufacturing a semiconductor device, according to claim 8, wherein a third insulating film containing nitrogen is formed to cover the second insulating film.

15. The method for manufacturing a semiconductor device, according to claim 1, wherein a gas containing oxygen is used for the sputtering method.

16. The method for manufacturing a semiconductor device, according to claim 1, wherein a temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C.

17. The method for manufacturing a semiconductor device, according to claim 8, wherein a substrate temperature is set to temperatures higher than or equal to 100° C. and lower than or equal to 600° C. during forming the oxide semiconductor film.

18. The method for manufacturing a semiconductor device, according to claim 8, wherein a gas containing oxygen is used for the sputtering method.

19. The method for manufacturing a semiconductor device, according to claim 8, wherein a temperature of the heat treatment is higher than or equal to 250° C. and lower than or equal to 750° C.