# Patent

## Title
Crosstalk reduction

## Abstract

An apparatus includes a backplane having a ground plane. Conductor through holes extend through the backplane in rows and columns for conductors to project through the backplane in orthogonal arrays. Each row and column of the conductor through holes includes ground holes, each of which is sized to receive only a single ground conductor, with the single ground conductor in connection with the ground plane. Each row and column of the conductor through holes also includes signal holes, each of which is sized to receive only a single signal conductor, with the single signal conductor free of a connection with the ground plane. The backplane further has a plurality of nonconductor through holes at locations between and offset from the rows and columns of conductor through holes, with each of the plurality of nonconductor through holes having plating electrically connected to the ground plane.

## Background
RELATED APPLICATIONS
This application claims the priority benefit of Provisional U.S. Patent Application 61/513,962, filed Aug. 1, 2011, which is incorporated by reference.


TECHNICAL FIELD
This technology relates to electrical connections between printed circuit boards installed against a backplane.
BACKGROUND
Printed circuit boards are typically interconnected through a backplane. The backplane may be located at the rear of a cabinet or other housing. The circuit boards are installed in the housing by sliding them into positions that are parallel to each other and perpendicular to the backplane, with their inner edges adjoining the backplane. Electrical connections for routing signals between the boards are formed in part by connectors that attach them to the backplane, and in part by circuitry within the backplane itself. The configuration of that circuitry is constrained by the area and thickness of the backplane. As a result, close proximity of interconnecting traces within the backplane can cause problems such as signal attenuation, signal reflection, crosstalk, impedance discontinuities and noise.
SUMMARY
An apparatus includes a backplane having a front side, a rear side, and a ground plane. Conductor through holes extend through the backplane in rows and columns for conductors to project through the backplane in orthogonal arrays corresponding to circuit boards arranged along the front side of the backplane.
Each row and column of the conductor through holes includes ground holes, each of which is sized to receive only a single ground conductor, with the single ground conductor in connection with the ground plane. Each row and column of the conductor through holes also includes signal holes, each of which is sized to receive only a single signal conductor, with the single signal conductor free of a connection with the ground plane.
The backplane further has a plurality of nonconductor through holes at locations between and offset from the rows and columns of conductor through holes, with each of the plurality of nonconductor through holes having plating electrically connected to the ground plane.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a rear perspective view of parts of a backplane assembly.
FIG. 2 is a front perspective view of parts shown in FIG. 1.
FIG. 3 is a rear perspective view of a part of the backplane assembly.
FIG. 4 is a front perspective view of a part of the backplane assembly.
FIG. 5 is a rear perspective view of the part shown in FIG. 4.
FIG. 6 is a rear view of a part of the backplane assembly.
FIG. 7 is a top view of a part of the backplane assembly.
FIG. 8 is a perspective view of a part of the backplane assembly.
FIG. 9 is a top view of the part shown in FIG. 8.
FIG. 10 is a view taken on line 10-10 of FIG. 9.
FIG. 11 is a view taken on line 11-11 of FIG. 9.
FIG. 12 is an enlarged partial view of parts of the backplane assembly.
FIG. 13 is a view similar to FIG. 12, showing another part of the backplane assembly.
FIG. 14 is a rear perspective view of the backplane assembly, taken from above.
FIG. 15 is a front perspective view of the parts shown in FIG. 14, taken from below.
FIG. 16 is a rear perspective view showing additional parts of the backplane assembly.
FIG. 17 is an enlarged partial view of a part of the backplane assembly.
FIG. 18 is a partial sectional view of the part shown in FIG. 17.
FIG. 19 is a partial sectional view of another part of a backplane assembly.
FIG. 20 is a view similar to FIG. 19, showing a different part of a backplane assembly.
FIG. 21 is a view similar to FIG. 6.
FIGS. 22 and 23 are views similar to FIGS. 6 and 17, respectively, and show interstitial ground holes for reducing crosstalk.



DETAILED DESCRIPTION
The apparatus shown in the drawings has parts that are examples of the elements recited in the claims. The following description thus includes examples of how a person of ordinary skill in the art can make and use the claimed invention. It is presented here to meet the statutory requirements of written description, enablement, and best mode without imposing limitations that are not recited in the claims.
FIGS. 1 and 2 show parts of a backplane assembly 10, including a board configured as a backplane 12, and printed circuit boards configured as cards 14 arranged along the front side 16 of the backplane 12. Each card 14 has connectors 20 engaged with corresponding headers 22 that are mounted on the backplane 12. Each header 22 has an array 24 of conductors 26. The conductors 26 at each header 22 extend from the corresponding connector 20 through the backplane 12 to project from the rear side 28 of the backplane 12. A plurality of connector board assemblies 30, one of which is shown in FIG. 1, extend across the rear side 28 of the backplane 12 between separate arrays 24 of conductors 26. The connector board assemblies 30 have circuitry that interconnects the separate arrays 24 of conductors 26. This enables cards 14 at the front side 16 of the backplane 12 to be electrically interconnected independently of the backplane 12.
As shown in FIG. 3, each connector 20 has a rear end 32 with receptacles 34. As shown in FIG. 4, each header 22 has a front side 36 from which the conductors 26 project into the receptacles 34 in the corresponding connector 20. The conductors 26 at the front side 36 of the header 22 include signal pins 38 and ground blades 40. The signal pins 38 are arranged in rows of eight. The ground blades 40 are arranged in rows of four. Each ground blade 40 at the front side 36 of the header 22 has an integral ground pin 42 at the rear side 44 (FIG. 5) of the header 22. The ground pins 42 are arranged within the rows of signal pins 38. In this arrangement, each row of conductors 26 at the rear side 44 of the header 22 includes eight signal pins 38 and four ground pins 42. The array 24 as a whole is orthogonal with ten rows of twelve conductors 26.
The cards 14 in this example include a pair of hub cards 50 and a larger series of daughter cards 52. Each hub card 50 has multiple connectors 20 engaging corresponding headers 22 on the backplane 12. The arrays 24 of conductors 26 projecting from those headers 22 form two vertical columns at the rear side 28 of the backplane 12. Each daughter card 52 has only a single connector 20, and the backplane assembly 10 includes a single header 22 for each connector 20 on the daughter cards 52. The arrays 24 of conductors 26 projecting from those headers 22 form a single horizontal row across the rear side 28 of the backplane 12. As shown in FIG. 6, the backplane 12 in this example is configured for that particular arrangement, with two columns 54 and one row 56 of holes 57 for receiving the conductors 26.
More specifically, the holes 57 in each column 54 are arranged in an orthogonal array that encompasses the multiple arrays 24 of conductors 26 on the headers 22 for the corresponding hub card 50. The holes 57 in the horizontal row 56 are likewise arranged in orthogonal arrays, each of which matches the orthogonal array 24 of conductors 26 on the header 22 at the corresponding daughter card 52. Accordingly, each array of holes 57 in the horizontal row 56 includes ten rows of twelve holes 57. Columns of peg holes 59 for the connector board assemblies 30 (FIG. 1) are arranged in pairs that flank the arrays of conductor holes 57. The backplane 12 preferably does not include signal traces that interconnect any conductor hole 57 with any other conductor hole 57.
The individual connector board assembly 30 of FIG. 1 includes a connector board and two pairs of adapters. As shown separately in FIG. 7, the connector board 80 is an elongated rectangular panel with four sets of electrical contacts 84 arranged along one long edge. Each set includes twelve contacts 84, with six of those contacts 84 on one side of the board 80 and the other six on the opposite side of the board 80. The structure of the board 80 includes signal traces 86 that interconnect the two sets of contacts 84 at the opposite ends of the board 80, as well as signal traces 88 that interconnect the two intermediate sets of contacts 84.
The adapters 82 are alike. As shown in FIGS. 8-11, each adapter 82 in the given example includes twelve electrical terminals 90 and a housing 92 for the terminals 90. The housing 92 is an elongated structure with front and rear sides 94 and 96. Passages 97 extend through the housing 92, and are arranged in a row along the length of the housing 92. The terminals 90 are installed in the passages 97, with their inner end portions 98 accessible at the front side 94 of the housing 92, and their outer end portions 100 accessible at the rear side 96. The inner end portions 98 of the terminals are arranged along a first straight line 101 (FIG. 10). The outer end portions 100 are arranged in parallel rows of six that are equally spaced laterally across a second straight line 103 (FIG. 11). The second straight line 103 lies in a plane parallel to the plane of the first straight line 101, but is skewed at an acute angle to the first straight line 101.
Pegs 104 project from the housing 92 at opposite ends of the front side 94. The pegs 104 are receivable in peg holes 59 in the backplane 12 to support the adapter 82 in an installed position at the rear side 28 of the backplane 12. When in the installed position, the inner end portions 98 of the terminals 90 engage a row of pins 26 projecting from a row of pin holes 57 in the backplane 12. Accordingly, as shown in FIG. 12, the four adapters 82 can be installed on the rear side of the backplane 12 separately from each other, but with their skewed lines 103 extending together across multiple arrays 24 of pins 26. The inner end portions 98 of the terminals 90 then engage four diagonally offset rows of conductors 26 corresponding to four different cards 14 at the front side 16 of the backplane 12.
Each adapter 82 also has a pair of pillars 110 which project from the housing 92 at opposite ends of the rear side 96. The pillars 110 face oppositely across the skewed line 103 to define a slot 111 for receiving the connector board 80 along the skewed line 103, as shown in FIG. 13. When the connector board 80 is received in the slot 111, the outer end portions 100 of the terminals 90 engage a set of contacts 84 on the connector board 80. As best seen from above and below in FIGS. 14 and 15, the outer end portions 100 of the terminals 90 on one side of the skewed line 103 engage contacts 84 on one side of the connector board 80, and the outer end portions 100 on the other side of the skewed line 103 engage contacts 84 on the other side of the connector board 80. The four adapters 82 are thus configured to receive the connector board 80 in an installed position extending diagonally across the rear side 28 of the backplane 12 to bridge the adapters 82, and thereby to electrically interconnect the four corresponding cards 14 at the front side 16, as shown in FIG. 13.
Multiple connector board assemblies can be added as needed. For example, FIG. 16 shows the two hub cards 50 connected with the adjacent pair of daughter cards 52 by two of the connector board assemblies 30 described above. The hub cards 50 are connected to more remote pairs of daughter cards 52 by connector board assemblies 120 that differ only by having appropriately longer connector boards 122. Although each of these boards 80 and 122 has four sets of contacts 84 that are interconnected in two pairs for four corresponding arrays 24 of conductors 26, the number and interconnected arrangement of contact sets can differ as required by any particular specification or standard of backplane routing assignments. The arrangement of conductor holes in the backplane can differ accordingly. In each case, the connector board is preferably perpendicular to the backplane, as in the embodiments shown in the drawings.
Further regarding the structure of the backplane 12, FIG. 17 shows that a typical row of conductor holes 57 includes both ground holes 130 and signal holes 132. The row of conductors 26 received in those holes 130 and 132 includes ground pins 42, one of which is shown in FIG. 18, and signal pins 38, one of which also is shown in FIG. 18.
The backplane 12 includes a ground plane 138 (FIG. 18). Each ground hole 130 has plating 140 that connects the respective ground pin 42 with the ground plane 138 in a known manner. The ground plane 138 could be at the surface of the backplane 12 or within the backplane 12 as shown, and the structure of the backplane 12 could include a solder mask and solder for completing the installation of the ground pins 134 in any suitable configuration known in the art. Those structural features of the backplane 12 are omitted from the drawings for clarity of illustration.
As described above, the signal connections between the cards 14 are routed through the connector board assemblies 30 and 120 instead of through the backplane 12. The structure of the backplane 12 is thus simplified by the absence of circuitry that interconnects the signal holes 132. This is illustrated in part in FIG. 18, which shows that each signal hole 132 in the preferred embodiment is not plated. FIG. 18 also shows that each signal hole 132 is preferably wide enough to provide clearance for the installed signal pin 38 to extend fully through the hole 132 free of contact with the backplane 12. With the signal pins 38 passing freely through the backplane 12 in this manner, the ground pins 42 engage the backplane 12 sufficiently to support the headers 22 (FIGS. 1 and 5) on the backplane 12.
More specifically, in the illustrated embodiment each signal hole 132 is a cylindrical passage with a uniform diameter. The section of the signal pin 38 that extends through the hole 132 has a square cross-section that is narrower than the hole 132. The pin 38 is centered within the hole 132 so that the entire peripheral surface 142 of the pin 38 is spaced radially from the surrounding inner surface 144 of the backplane 12 inside the hole 132. The space 145 between the pin 38 and the backplane 12 contains air that serves as a dielectric for increasing the impedance between this pin 38 and a pin in an adjacent signal hole 132. The level of impedance provided in this manner can be controlled by the dimensions of the space 145. Therefore, for any given material of which the backplane 12 is formed, predetermined levels of impedance can be provided by predetermined sizes of the signal holes 132 and signal pins 38.
Another impedance control feature is shown in FIGS. 17 and 18. This feature, which may be used either with the air spaces 145 or as an alternative to the air spaces 145, includes additional through holes 150. The additional through holes 150 could have other locations, but each is preferably located within a row of conductor holes 57 between a pair of adjacent holes 57 in the row. The absence of signal traces between the conductor holes 57 provides space for the additional through holes 150 at those locations. Like the signal holes 132, the additional through holes 150 are preferably not plated. They can be smaller than the signal holes 132 because they do not receive conductors, but their presence between adjacent conductor holes 57 interposes additional air spaces to provide predetermined levels of impedance in the same manner as the air spaces 145 in the signal holes 132.
In addition to their use in the backplane 12, the unplated through holes 150 could be included in any circuit board that would benefit from the addition of impedance control that results. For example, FIG. 19 shows one of the cards 14 of FIG. 1 with unplated through holes 152. The unplated through holes 152 are arranged along a row of plated ground holes 154 and plated signal holes 156 for receiving the pins 158 on the connectors 20 (FIGS. 1 and 3). Like the unplated through holes 150 in the backplane 12, the unplated through holes 152 in the card 14 are configured to provide predetermined levels of impedance based on their size.
Yet another impedance control feature is shown in FIG. 20. In this embodiment of the invention, a card 14 has unplated through holes 150 like those of FIG. 19, but these unplated through holes 150 are filled with Teflon, an epoxy filled with microspheres, or some other material that has the effect of altering the impedance by changing the dielectric constant. Any one or more of the unplated through holes 150 of FIGS. 17 and 18 could likewise be filled with such a dielectric material.
Crosstalk in high speed interconnection systems, notably backplane is a critical consideration. Crosstalk (XT) is any phenomenon by which a signal transmitted on one circuit or channel of a transmission system creates an undesired effect in another circuit or channel. Crosstalk is usually caused by undesired capacitive, inductive, or conductive coupling from one circuit, part of a circuit, or channel, to another.
In backplanes crosstalk can be caused by circuits that are close to one another which result in inductive and capacitive coupling. Because of the requirements for high signal density in backplanes and low noise in high speed circuits crosstalk control is an important consideration in the design of backplanes. Crosstalk is controlled between some of the major circuit pattern by the use of ground planes, which provide both electromagnetic shielding between the layers of the printed circuit boards and a reference ground for impedance control as well.
However, there is an area in the design of many backplane designs where the shielding breaks down, and in some cases allows significant amounts of crosstalk to occur. This area is the via termination field, the portion of the backplane in which there is a regular pattern of plated through holes (PTH) which are designed to accept termination, which are usually compliant pins, which are designed to terminate the connectors to the backplane. The conductive plating of the via also provides a means for interconnecting the various layers of the multilayer printed circuit board. The hole density, hole size and spacing are critical since ultimately they determine the system throughput, since they are directly related to the number of circuits that can be employed in a given system. The hole size is typically defined by the termination pin of the connector and the capability of the board manufacturer. The hole spacing is determined, in part, by the connector design and the need to have conductive traces pass from the vias though to pin fields and across the backplane to be terminated at another location. This circuit routing is important in defining the ultimate connector termination density.
In some advanced connector and backplane designs the spacing between the rows and columns are not equal. The space between the rows of contacts may be greater than the space between the columns of contacts. The rows of vias may have an alternating signal/signal ground pattern to prevent crosstalk within the row of vias. The columns, since they are spaced further apart, may not have grounds between them, since the space between the columns of vias is used for signal circuit routing and the spacing results in less crosstalk. In addition the ground/signal pattern in the connector may be opposite in the connector, where there is a ground shield between the columns of contacts in the connector and spaces between the contacts of the rows. This allows the crosstalk of the rows and columns to be balanced against one another and allowing for more space between the rows of contacts in the connector and more space between the columns in the via field, where the spacing is mutually beneficial.
However, very high speed systems this arrangement is not sufficient to minimize crosstalk. In this case ground structures are required between both the connector contacts and vias to minimize crosstalk sufficiently.
It is possible to add ground contacts between the signal contacts in the connector. It is more difficult to add ground between the columns of vias, since there is typically not enough space for both the signal routing and additional ground vias.
In the case of the Z-Plane system of FIGS. 1-20, the high speed circuits are routed externally to the inner layers of the multilayer backplane and consequently there is sufficient space for additional ground vias between the columns of vias. Such additional space is illustrated, for example, in FIG. 21, with an example of the additional ground vias being illustrated in FIG. 22. These additional ground vias will significantly reduce the crosstalk between the columns of circuits. The best embodiment of this would be interstitial ground, where the ground conductor is equidistant from the signal conductor pairs of adjacent columns.
FIG. 23 shows an embodiment of the backplane 12 with interstitial ground holes 200 centered between the rows and columns of ground holes 130 and signal holes 132. As described above, the ground holes 130 and signal holes 132 extend through the backplane 12 as orthogonal arrays of conductor through holes 57 matching the orthogonal arrays 24 of ground pins 42 and signal pins 38 on the headers 22. The interstitial ground holes 200 preferably extend through the backplane 12 with the same structural configuration as the ground holes 130, as shown in FIG. 18, but are not aligned with conductors 26 on the headers 22 and do not serve as conductor through holes. Instead, the interstitial ground holes 200 extend through the backplane 12 in one or more arrays that are entirely offset from the arrays 24 of conductors 26 on the headers 22 that are mounted on the backplane 12. The interstitial ground holes 200 are thus located to reduce crosstalk between the conductors 26 extending through the backplane 12. As with the additional through holes 150 of FIGS. 17 and 18, the absence of signal traces between the conductor through holes 57 in the backplane 12 provides space for the interstitial ground holes 200 at those locations.
The patentable scope of the invention is defined by the claims, and may include other examples of how the invention can be made and used. Such other examples, which may be available either before or after the application filing date, are intended to be within the scope of the claims if they have structural or method elements that do not differ from the literal language of the claims, or if they have equivalent structural or method elements with insubstantial differences from the literal language of the claims.

## Claims

1. An apparatus comprising:
a backplane having a ground plane and conductor through holes arranged in rows and columns for conductors to project through the backplane in orthogonal arrays;
each row and column of conductor through holes including ground holes, each of which is sized to receive only a single ground conductor, with the single ground conductor in connection with the ground plane, and also including signal holes, each of which is sized to receive only a single signal conductor, with the single signal conductor free of a connection with the ground plane;
the backplane further having a plurality of nonconductor through holes at locations between and offset from the rows and columns of conductor through holes, with each of the plurality of nonconductor through holes having plating electrically connected to the ground plane.

2. An apparatus as defined in claim 1 wherein the backplane is free of circuitry that interconnects signal conductors in the signal holes.

3. An apparatus as defined in claim 1 wherein each of the plurality of nonconductor through holes is equidistant from the nearest pairs of conductor through holes.