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Efficiency & Renewable Energy, operated by the Alliance for Sustainable Energy, LLC.

Contract No. DE-AC36-08GO28308

System Voltage PotentialInduced Degradation 

Mechanisms in PV Modules 

and Methods for Test

Preprint

Peter Hacke, Kent Terwilliger, Ryan Smith, 

Stephen Glick, Joel Pankow, Michael Kempe, 

and Sarah Kurtz 

National Renewable Energy Laboratory

Ian Bennett and Mario Kloos 

Energy Research Centre of the Netherlands

Presented at the 37th IEEE Photovoltaic Specialists Conference 

(PVSC 37)

Seattle, Washington

June 19-24, 2011

Conference Paper

NREL/CP-5200-50716

July 2011
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1 

SYSTEM VOLTAGE POTENTIAL-INDUCED DEGRADATION MECHANISMS IN PV 

MODULES AND METHODS FOR TEST

Peter Hacke, Kent Terwilliger, Ryan Smith, Stephen Glick, Joel Pankow, Michael Kempe, Sarah Kurtz

Ian Bennett

1

, Mario Kloos1, 

National Renewable Energy Laboratory (NREL), Golden, CO, United States 1

Energy Research Centre of the Netherlands (ECN), Petten, Netherlands

ABSTRACT

Over the past decade, degradation and power loss have 

been observed in PV modules resulting from the stress 

exerted by system voltage bias. This is due in part to 

qualification tests and standards that do not adequately 

evaluate for the durability of modules to the long-term 

effects of high voltage bias experienced in fielded arrays. 

High voltage can lead to module degradation by multiple 

mechanisms. The extent of the voltage bias degradation is 

linked to the leakage current or coulombs passed from the 

silicon active layer through the encapsulant and glass to 

the grounded module frame, which can be experimentally 

determined; however, competing processes make the 

effect non-linear and history-dependent. Appropriate 

testing methods and stress levels are described that 

demonstrate module durability to system voltage potentialinduced degradation (PID) mechanisms. This information, 

along with outdoor testing that is in progress, is used to 

estimate the acceleration factors needed to evaluate the 

durability of modules to system voltage stress. Na-rich 

precipitates are observed on the cell surface after 

stressing the module to induce PID in damp heat with 

negative bias applied to the active layer. 

INTRODUCTION

Module qualification tests such as IEC 61215 and IEC 

61646 for c-Si and thin-film modules, respectively, have 

shortcomings in their ability to evaluate some degradation 

mechanisms that modules experience. For example, 

voltage bias was identified as a stress factor in 1978 for 

inclusion into the qualification testing by the Jet Propulsion 

Laboratory (JPL) [1], and the need was called out again in 

2005 by Swanson [2] for both high efficiency SunPower 

modules and conventional multicrystalline Si modules; 

however, a test to measure for durability to continuous 

system bias was not included in the present module 

qualification standards as it was deemed too stressful [3]. 

This unfortunate omission has cost the industry significant 

trouble and expense based on the numerous published 

and unpublished reports of degradation modes found 

under certain conditions in every common module 

technology related to the stress that the modules 

experience when mounted in arrays with increasingly high 

system voltage. Publications highlighting outdoor power 

degradation, mechanisms, or requirements for testing for 

high-voltage degradation include BP Solar [4] for 

amorphous-silicon (a-Si) modules, Florida Solar Energy 

Center (FSEC) [5] for a-Si and multicrystalline-silicon (mcSi) modules, and SOLON [6] and NREL for mc-Si modules

[7]. Sensitivities to elevated voltage for CdTe modules 

have also been indicated [8]. NREL [9] and FSEC [10] 

have reported activation energies for leakage paths 

through modules mounted outdoors, and information 

about the mitigation of system bias degradation on the 

module level has also been discussed in an NREL 

publication [11].

One mechanism of degradation associated with system 

bias is polarization, whereby current through the front 

glass leads to accumulation of trapped charge over the 

active layer. This charge can influence the surface field of 

the semiconductor active layer [2]. In severe cases, 

accumulation of mobile ions, such as Na, leads to 

delamination when the active layer is biased negatively 

[4,12]. In mc-Si modules, PID associated with a negatively

biased active layer also leads to positive ions such as Na

moving from the glass toward the active layer, but the 

observed cell shunting that results speculatively suggests

incorporation of deleterious ions in the active layer [7]. 

Modules made of packaging materials that leak almost no 

current to ground, such as quartz front window layers and 

resistive thermoplastic encapsulants, do not degrade 

under system bias stress tests [13]. Material properties on 

the cell level that modulate the extent of PID have also 

been previously analyzed [6]. Usually in the presence of 

elevated humidity within the module, degradation by 

electrolytic corrosion occurs and macroscopic transport of 

ionized conductor metal may be observed [13-16]. In all 

these cases, current flow involving ionic motion in some 

part of the circuit between the high-voltage active layer of 

the module to ground is involved. There are publications

showing how module leakage current to ground increases 

with environmental chamber temperature and relative 

humidity (RH) for samples designed to test for electrolytic 

corrosion [14-16] and with commercial modules [13]. 

Relationships between the accumulated leakage current 

and module power degradation were also shown.

We need to determine stress factors and levels for a test 

of modules’ durability to system voltage that will serve the 

needs of materials and component makers, module 

makers, and PV customers. To do so, we must 

understand further the active degradation mechanisms 

and how they vary according to stress factors such as 

temperature, humidity, and bias. With this understanding, 

we can ensure that the stress levels for each factor are 

representative and reasonable to carry out in 
2 

consideration of cost, time, and effectiveness to evaluate 

modules’ resistance to system voltage degradation.

In this paper, we evaluate the environmental conditions 

that factor into system voltage-induced degradation 

mechanisms. Considering these, we discuss the 

accelerated stress tests and suitable levels that reproduce 

the field-observed PID. We report on chamber step stress 

tests performed on mc-Si mini-modules to evaluate the 

relationship between level of stress and PID. This is 

followed by an analysis of acceleration factors as a 

function of temperature using leakage current measured in 

fielded modules as a basis and a discussion of the 

strategies and limitations for accelerated lifetime testing 

for PID. Finally, an evolving model for PID degradation is 

discussed.

RESULTS AND DISCUSSION

Accelerated stress factors and levels to test module 

durability to system voltage should be chosen in view of

actual stresses incurred in the field, and the level of

acceleration chosen such that the same mechanisms seen 

in the field are activated. With this, short-duration and 

cost-effective tests are sought. The stress factors 

examined here are system voltage, humidity, and 

temperature.

Outdoor Tests for Stress Factor Identification

JPL has shown how conductivity of encapsulant and 

leakage current increases with increased RH and 

temperature [14]; however, in fielded modules, humidity 

within the module packaging changes relatively slowly 

unless the packaging is compromised. In contrast, it 

changes rapidly over the module exterior surface 

according to the weather. Figure 1 shows leakage current 

of a module in Florida, USA, with –600 V applied to the 

active layer scaled logarithmically with the solar irradiance

over the course of a day. It can be seen that the wet 

module associated with the morning dew or rains leads to

an elevated leakage current as the system voltage rises 

with the sun. The leakage current decreases significantly 

when the module dries and the surface resistance 

increases (Figure 1, inset). Despite that conductivity of 

glass and encapsulant increases with temperature, the 

leakage current remains controlled by humidity, as can be 

seen by the correspondence between the calculated 

module surface RH and leakage-current curves when the 

irradiance and module temperature are higher in the 

middle of the day. It is therefore concluded that a wet 

environment will activate system voltage degradation 

mechanisms more than a hot, dry environment, based on 

the elevated leakage current.

Methods and Stress Levels for Accelerated Testing

The combination of voltage, humidity, and temperature 

must be applied at appropriate levels to test for systemvoltage degradation mechanisms. Here, we examine 

levels based on the results in the literature, the outdoor 

test results (above), and further experimentation.

Voltage Bias

Application of nameplate system voltage has been shown 

to reveal sensitivity to polarization and PID mechanisms

[6,13] within about 100 h. Increasing voltage beyond the 

module’s nameplate rating may lead to alternate 

catastrophic breakdown mechanisms such as partial 

discharge, which is already evaluated in other tests such 

as IEC 61730-2. 

In chamber stress testing, voltage to replicate system 

voltage bias may be applied to the shorted module leads

(a Stanford PS 350 was used in our tests). The external 

module components are connected to ground through a 

resistor over which voltage is measured to determine 

leakage current. A voltage divider may be used to prevent 

a short circuit through the module packaging from applying 

a voltage that exceeds the specifications of the voltmeter 

(see Fig. 2). It must be ensured that the module mounting 

hardware is of sufficient resistance even in a humid test 

environment such that leakage current to ground flows 

through the measurement circuit. The module may be 

Figure 1. Leakage current to ground, irradiance, 

calculated module surface relative humidity (RH), and 

module temperature over a one-day period in Florida. 

The module is horizontally mounted, the active layer 

is biased to scale logarithmically with irradiance to a 

maximum voltage of –600 V with the module leads 

connected to a load resistor to maintain 

approximately Pmax. The leakage current is highest 

when morning dew is on the module face and the 

surface resistance (SR) is low (inset). When the 

module is dry, the current most closely follows the 

calculated module surface RH.
3 

intermittently disconnected to evaluate its dark IV 

characteristics in situ. Common among the test methods 

used to evaluate the system-bias voltage degradation is 

the application of a medium on the module that creates an 

efficient path to ground. Testing has been carried out in 

an accelerated manner in environmental test chambers 

[7,14] and saline water baths [2]. Variants to achieve 

grounding to the module face include placing it on a wet 

towel and application of a conductive paste; however, 

leakage path may be unrepresentatively constrained with 

such methods and miss detection of degradation 

mechanisms associated with leakage current through the 

edges and rear should the conductive medium be applied 

only to the module face. A comparison of the favorable 

traits of three configurations to test modules for system

voltage durability is shown in Table 1. In this work, testing 

was carried out in an environmental chamber, with either 

uniform humidity or conductive paste applied specifically 

to the glass to drive current through the glass.

Table 1. A comparison of the traits of three mediums 

to test modules for system voltage durability. 

Humidity

Humidity is seen to be a key factor in the circuit that

enables a leakage current (see Fig. 1). Conductivity of 

glass increases with RH up to 100% [17]. Because

modules regularly see surfaces at 100% RH (dew, rain, 

wet snow), it is reasonable to test with 100% RH applied

to the module. This is readily achievable by applying 

water, wet towels, or conductive paste to the module. In 

the case of an environmental chamber, approaching 100% 

RH leads to the concern that small temperature variations 

will cause uneven condensation and excess stress on the 

tool if specialized testing equipment is not used. We 

therefore select a conventional level of 85% RH for 

chamber tests.

Temperature

Although choices for test levels for humidity and voltage 

are relatively straightforward, there are several 

considerations for choosing temperature. A frequently 

heard criticism is that the 85°C/85% RH 1000 h damp heat 

test represents an unrealistically high activity of water for 

module materials, causing accelerated hydrolytic 

degradation of the polymeric materials [18] and extensive 

electrolytic corrosion that is not seen in fielded modules 

stressed by system voltage [7]. Raising the test 

temperature would lead to increased diffusion rate of 

water into the module, a higher saturation limit, and higher

ultimate water content. The encapsulant of a mc-Si 

module that experiences heating in the sun is dried 

regularly such that the equilibrium humidity contained in

the encapsulant is lowered. We see that leakage current 

is not increased over the course of a day as the 

temperature rises (Fig. 1), so excessively increasing the 

temperature to activate leakage current-related 

degradation mechanisms would not support what we 

observe in the field. On the other hand, some level of 

humidity is required to test for susceptibility to electrolytic 

corrosion over the lifetime of a module in an accelerated 

manner. Considering these factors, the optimum test 

temperature is not deduced a priori. 

To test the effect of temperature under constant RH, two 

modules were placed in an environmental chamber and 

connected to a circuit as shown in Fig. 2 with –600 V bias 

applied to the active layer. The chamber was held at 

85% RH, and the temperature was ramped in stages from 

25° to 85°C with 4-h holds. The temperature ramps were

done quickly to avoid saturating the module’s interior with 

humidity over the course of the test. Figure 3 shows the 

Arrhenius behavior of the two modules, a new one and 

one that was pre-stressed and soiled. The fit of the data 

for the new module displays Arrhenius behavior over the 

temperature range tested with activation energy Ea=0.94 

eV (90.7 kJ/mol). This suggests a range of temperatures 

that the module can be exposed to achieve a single, 

thermally activated current flow mechanism for the

presumably constant humidity within the module. The 

data for the soiled and pre-stressed module indicate that 

an additional conduction mechanism is active at low 

temperature, which may be associated with the conductivity

Figure 2. Application of voltage to the active layer of a 

PV module via the shorted leads. The leakage current 

is monitored by a voltmeter across a resistor R1 

connected to ground. The voltmeter may be 

protected from overvoltage by a second resistor R2.
4 

of the soil or the existence of alternate leakage paths, 

before the dominant damp heat-controlled current flows at 

higher temperature. In addition to water, materials such 

as clay soil, volcanic soil, and salt deposit would be 

expected to significantly reduce resistance across the 

glass face to the module frame.

The choice of testing time revolves around the question of

how long it will take for modules in the field under system 

voltage stress to show signs of degradation. Field tests to 

determine this answer are being undertaken by a number 

of groups, but results are just beginning to be obtained. 

The precedent indicator of the extent of degradation is the 

coulombs leaked by the module at system voltage. 

Coulombs normalized to length (cm) of frame edge have

been used as a metric. JPL [14] found that 1–10 C/cm was 

the onset for severe degradation, although some modules 

exhibited degradation greater that 20% when reaching the 

10-4 C/cm range. Some of the samples were specifically 

designed to test electrolytic corrosion with mass transport 

of ions between the simulated frame edge and the cell. 

Using modern commercial silicon modules, we found in 

chamber tests that severe degradation could occur around

0.02 C/cm when the active layer was negatively biased at 

–600 V rated system voltage, but our findings generally

agreed with the JPL results for positive bias. As pointed 

out by DelCueto and McMahon [9], in higher humidity 

environments, it is expected that the main transport path 

of ions will be normal to the active layer, encapsulant, and 

glass, and then lateral on the damp glass surface to the 

frame. When the wet glass surface is not the limiting 

resistance in the circuit, it makes more sense to normalize 

leakage current to module active area (i.e., current 

density).

Testing Mini-Modules for PID

A relationship between coulombs leaked by the module 

and degradation is useful, but this is expected to be an 

oversimplification. The path of current flow, through the 

glass versus through the packaging interfaces, will affect 

the mechanism; high humidity and mobile ion 

concentration in the encapsulant will promote ionic current 

through the encapsulant toward the frame and lead to 

electrolytic corrosion. For PID, it was shown that simple 

annealing of the module at 100°C leads to a partial

reversal of the degradation [6]. This thermally activated 

process will most certainly be active in fielded modules on 

hot sunny days, so after a wet period characterized by 

high leakage current and PID, sufficient heating of the 

module is expected to lead to a degree of recovery of 

module power. Level of stress also matters with respect 

to the active degradation mechanism. Modules exposed 

to the NREL Test-to-Failure protocol (–600 V, 85°C/

85% RH, 1000 h) recovered only marginally with 

application of reverse bias [13], whereas PID induced at 

lower temperature (48°C) recovered almost completely on 

reversal of the bias in about 100 h [6]. 

To explore further the effect of module packaging, level of 

stress, and reversibility, a group of one-cell mc-Si minimodules was exposed to increasing levels of temperature 

and humidity. The sample construction was described 

previously [13]. Negative 1000 V bias was first applied to 

the active layer, followed by a recovery with positive 

1000 V bias. This sequence was repeated incrementally at 

higher temperature and RH combinations. Carboncontaining paste was applied over the glass face to induce 

through-glass current flow and associated degradation 

mechanisms. The samples were given one week in the 

chamber at the step-level temperature and humidity before 

voltage was applied to the shorted module leads for 130-h 

periods. Changes in pseudo fill factor (pFF) determined 

by Suns-Voc after each segment of the test are shown in 

Fig. 4. The change in pFF represents losses associated 

with shunt resistance and carrier recombination, but is 

void of series resistance. Junction shunting is the main 

loss mechanism associated with PID [6,7].

The following observations are drawn based on this step

stress test: pFF is not completely recovered after the first 

application of positive bias at 45°C, 30% RH. The pFF is 

further degraded after each subsequent +1000 V recovery 

cycle. On the other hand, there is significantly less 

change in the median pFF with subsequent –1000 V 

degradation cycles at higher temperature and humidity, 

although several samples degraded extensively at 60°C, 

60% RH, and –1000 V. An increase in leakage current at 

higher temperature/voltage levels was confirmed (Fig. 4b). 

Modules encapsulated with high electrical resistance 

thermoplastic or using quartz did not exhibit any 

degradation.

Figure 3. Arrhenius behavior of leakage current 

normalized to active area of modules in 85% RH as a 

function of temperature. A new module displays such 

behavior over the range 25° to 85°C, whereas a preaccelerated lifetime test (ALT)-stressed and soiled 

module displays greater leakage current at lower 

temperature.
5 

 a 

b 

Figure 4. (a) Loss of pseudo fill factor (pFF) after 130-h 

RH segments of alternating –/+1000 V bias applied to 

the active layer for three mini-module constructions, 

stepped through increasingly higher temperature and 

RH levels. Data are fit with quartile box plots and 

group medians are connected. Different point 

styles/colors are to track the samples. (b) Leakagecurrent density for the three constructions showing 

the current to be higher by three orders of magnitude

for the EVA/soda-lime glass construction that exhibits 

PID. They however show reduced PID at higher stress 

levels despite the increased leakage current.

At issue is the appearance that PID degradation is historydependent, and the observation that subsequent higher 

temperature, RH, and leakage current combinations do

not lead to greater degradation. Also, considering that 

partial PID recovery with thermal annealing is observed

[6], it cannot be assumed that a module that is subjected 

to an extent of charge transported continuously will exhibit 

the same power degradation as one that experiences that 

same leaked charge accumulated intermittently over highhumidity days and days of bright sunshine. Based on Fig. 

4, it would appear that a continuously applied stress would 

lead to the most severe degradation per coulomb leaked.

Acceleration Factors

We compared the electric charge leaked (in coulombs) of 

chamber-stressed modules described in Fig. 3 to similar 

modules fielded at the same system voltage (–600 V, 

scaled logarithmically with irradiance) in Florida, over a 3-

month period (from February to April) as a basis to 

determine the acceleration factor (Fig. 5). We note that 

the acceleration factor at 25°C in chamber is near unity—a 

day in chamber at 85% RH has the same leakage current 

as a day in the field. It appears that fielded modules see 

periods of wetness where leakage current is significantly 

higher than that at 85% RH in chamber in addition to 

periods of dryness, which balances out to the equivalent of 

a 24 h period at 25°C, 85% RH in chamber. Because we 

know that modules can recover from PID degradation to 

some extent by thermal treatment [6], and we observe

non-linear relationships between stress level, leakage 

current, and PID, we speculate and must yet verify that the 

module degradation in the field could be less than that of a 

continuous chamber stress test done at a given 

acceleration factor using coulombs as a basis. A more

accurate understanding of the acceleration factor for PID 

is anticipated with more extensive field data. 

Figure 5. Acceleration factor for leakage current in a 

chamber as a function of temperature at 85% RH 

compared to a similar module fielded in Florida with 

simulated –600 V system voltage, measured for a 3 

month period. Time to achieve the equivalent 

coulombs leaked is used as the metric for the ratio.
6 

Ionic Transport

Sodium migrated from the glass has been seen to 

accumulate at the transparent conductive oxide layer of aSi modules in negative bias [12]. We have previously 

shown high Na concentration and increasing Cu levels in 

the surface and sub-surface area of the cell after negative 

bias is applied to the mc-Si active layer of modules in 

85°C/85%RH by secondary ion mass spectroscopy

(SIMS) [13]. Auger electron spectroscopy indicates 

precipitation of sodium at the surface of the cell, on the 

silicon nitride, and at locations such as defects in the 

silicon nitride (see Fig. 6). It is believed that various metal 

ions in addition to Na from the large holding volume of 

impurities, the soda lime glass, are electrostatically 

attracted to the surface. The active layer at –600 V can

act as a source of electrons such that the ions are 

chemically reduced and electrodeposited. It is however not 

yet clear which species causes the p/n junction, typically 

0.2 -0.3 μm below the silicon surface, to exhibit shunting 

by the PID mechanism.

Figure 6. A sodium-rich precipitate (confirmed by 

Auger electron spectroscopy) deposited on a mc-Si

cell in a module subjected to 1000 h of 85°C/85% RH 

damp heat with –600 V applied to the active layer.

SUMMARY AND CONCLUSIONS

As standardized module performance tests do not 

adequately evaluate for the durability of modules to 

system bias, we suggested stress factors, levels, and 

methods for testing based on the stresses that fielded 

modules see. Module leakage current is highest in the 

morning associated with dew and remnant precipitation 

from the night. Over the course of a day, the magnitude of 

the leakage current moves opposite to module 

temperature, despite the higher conductivity of glass and 

the encapsulant, because the module dries out and leaves 

no surface humidity to complete the circuit to ground. 

Modules in continuously wet climates are expected to 

show the greatest system voltage-related degradation 

considering the observation that wetness is the most 

important environmental factor for elevated leakage 

current and the relationship between module leakage 

current and power degradation. For a new module with 

surface maintained at 85% RH, the leakage current was 

found to be Arrhenius with temperature in the range of 25° 

to 85°C, suggesting a constant mechanism for leakage 

current-related degradation throughout this range; 

however, as humidity is allowed to permeate the 

encapsulant with time, it is expected that additional 

electrolytic corrosion mechanisms will become active. A 

number of methods to ground the module surface were

considered, each with their particular advantages 

depending on the situation and experimental needs; 

however, conventional environmental chamber testing at 

85% RH with nameplate-rated system bias applied to the 

active layer has the benefit of being able to measure 

multiple modules with uniform humidity and safety. Initial 

estimates of acceleration factors in chamber tests were 

calculated as a function of temperature based on leakage 

current observed in similar modules mounted in Florida. 

This must, however, be moderated by the fact that module 

power degradation was measured to not be strictly a 

function of net coulombs leaked to ground. These results, 

in combination with those in the literature, suggest that a 

constant stress with humidity and system voltage will be 

more damaging than that stress applied intermittently or 

with periods of recovery comprising hot and dry conditions

or alternating bias in between. Further, observations of 

Na migration leading to electrodeposition on the cell 

surface in a negatively biased module were made. 

ACKNOWLEDGEMENT

This work was supported by the U.S. Department of 

energy under Contract No. DE-AC36-08-GO28308 with 

the National Renewable Energy Laboratory. The authors 

thank Bill Sekulic, Michael Quintana, and Stephen 

Barkaszi for facilitating outdoor tests; David Trudell and Ed 

Gelak for facilitating the indoor testing equipment; and

Steve Rummel, Allan Anderberg, and Keith Emery for 

module power testing. 

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