# Patent

## Title
Semiconductor wafer inspection system

## Abstract

A method and system for identifying a defect or contamination on a surface of a material. The method and system involves providing a material, such as a semiconductor wafer, using a non-vibrating contact potential difference sensor to scan the wafer, generate contact potential difference data and processing that data to identify a pattern characteristic of the defect or contamination.

## Background
CROSS-REFERENCE OF PRIOR APPLICATION
This application is a continuation of U.S. application Ser. No. 11/156,088, filed Jun. 17, 2005, now U.S. Pat. No. 7,092,826 which is a continuation of U.S. application Ser. No. 10/631,469, filed Jul. 29, 2003, now U.S. Pat. No. 6,957,154 which claims priority to U.S. application Ser. No. 60/444,504, filed on Feb. 3, 2003 all three of which are incorporated herein by reference.


FIELD OF THE INVENTION
The present invention is directed to a method and system for inspection of semiconductor wafers and other materials. More particularly, the invention is directed to a method and system for characterization of microscopic and macroscopic defects through imaging and visualization of contact potential difference topology on a wafer or material surface through use of a non-vibrating contact potential difference (hereinafter NVCPD) sensor.
BACKGROUND OF THE INVENTION
The multi-billion dollar global market for semiconductor defect management is growing both in absolute terms and as a percentage of semiconductor capital equipment investment. In general, there are two factors that determine the economics of a semiconductor fabrication facility at a given utilization level, namely throughput and yield. As complex new technologies such as 300 mm wafers, copper interconnects, and reduced feature (circuit) sizes drive the margin of error in fabrication ever lower, new inspection technologies are critical to keep yields high and bottom-line economics attractive. Detection and elimination of chemical contamination and other types of defects is a constant concern for semiconductor manufacturers and equipment suppliers. Contamination can arise from use of processing chemicals, processing equipment and poor handling techniques. Contaminants can include for example metals, carbon and organic compounds. Other types of defects can result from a wide range of causes, including flaws in the semiconductor crystal, improper processing, improper handling, and defective materials. In addition, many cleaning steps are required in semiconductor wafer fabrication. Each step is time consuming and requires expensive chemicals that may require special disposal procedures. Existing methods for monitoring or controlling these processes are expensive and time consuming. As a result, wafers are often cleaned for a longer period of time and using more chemicals than are required.
Defect detection and characterization systems can be divided into in-line and off-line systems. “In-line” refers to inspection and measurement that takes place inside the clean room where wafers are processed. “Off-line” refers to analysis that takes place outside of the wafer processing clean room, often in a laboratory or separate clean room that is located some distance from the manufacturing area. In addition, many of these analytical techniques are destructive, which requires either the sacrifice of a production wafer or the use of expensive “monitor” wafers for analysis. In-line inspection and measurement is crucial for rapidly identifying and correcting problems that may occur periodically in the manufacturing process. A typical wafer can undergo over 500 individual process steps and require weeks to complete. Each wafer can have a finished product value of up to $100,000. Because the number of steps, and period of time, involved in wafer fabrication are so large, a lot of work in process can exist at any point in time. It is critical that process-related defects be found and corrected immediately before a large number (and dollar value) of wafers are affected.
Many types of defects and contamination are not detectable using existing in-line tools, and these are typically detected and analyzed using expensive and time-consuming “off line” techniques (described below) such as Total Reflectance X-ray Fluorescence (TXRF), Vapor Phase Decomposition Inductively Coupled Plasma-Mass Spectrometry (VPD ICP-MS) or Secondary Ion Mass Spectrometry (SIMS). Since these techniques are used off-line (outside of the clean room used to process wafers) and usually occur hours, or even days, after the process step that has caused the contamination, their value is significantly limited.
A brief description of some well known techniques for wafer inspection and chemical contamination detection are presented in Table 1. This list is not in any sense exhaustive as there are a very large number of techniques that are used for some type of semiconductor analysis or characterization.









TABLE 1





Analytical

In-line/


Technique
Description
Off-line







Total Reflection
X-rays irradiate the wafer within
Off-line


X-Ray Fluorescence
the critical angle for total


(TXRF)
external reflectance, causing



surface atoms to fluoresce.


Automated
Optical images are acquired and
In-line


Optical
automatically analyzed for


Microscopy
detection of large defects.


Laser
Wafer surface is illuminated
In-line


Backscattering
with laser spots and the angle



and/or polarization of reflected



light is analyzed to detect and



classify particles.


Vapor Phase
Wafers “scanned” with a
Off-line


Decomposition
drop of HF that is analyzed using


Inductively
mass spectrometry.


Coupled-Mass


Spectrometry


(VPD ICP-MS)


Secondary Ion
Ion beam sputters the wafer
Off-line


Mass Spectroscopy
surface creating secondary ions


(SIMS)
that are analyzed in a mass



spectrometer.









Table 2 summarizes some major advantages and disadvantages of each technique. In general, off-line detection techniques are extremely sensitive to tiny amounts of contamination; but are slow, expensive and complex to operate. Some have limited, or no, imaging or surface mapping capability, or are destructive in nature. In-line techniques are much faster, non-destructive and provide defect mapping, but have limited chemical contamination detection or analysis capability.









TABLE 2





Analytical




Technique
Advantages
Disadvantages







Total Reflection
Very sensitive
Slow (>1 hour/wafer)


X-Ray Fluorescence
Some mapping
Limited coverage


(TXRF)
capability
Unpatterned wafers



Nondestructive
only


Automated
Fast
Very limited


Optical
Relatively
chemical and


Microscopy
low cost
particle detection



Detects a wide range of



macro defects



(>50 microns)



Imaging of wafer surface



Non-contact/non-



destructive


Laser
Fast
Only detects particles -


Backscattering
Relatively low cost
no chemistry



Detects very small



particles



Imaging of water surface



Non-contact/non-



destructive


Vapor Phase
Very sensitive
Destructive


Decomposition
Able to identify wide
Slow


Inductively
range of contaminants
Expensive


Coupled-Mass
Only works on bare
Complex


Spectrometry
silicon
Cannot image


(VPD ICP-MS)


Secondary Ion
Very sensitive
Expensive


Mass
Detects a wide range
Slow


Spectroscopy
of contaminants
Destructive


(SIMS)
Detects



sub-surface









In general, existing in-line wafer inspection tools operate at production speeds and generate images of the wafer surface that are processed to identify and locate defects. These techniques, however, are as mentioned above very limited in their ability to detect chemical contamination. Laser backscattering systems are limited to detecting particles down to sub-micron sizes, and optical microscopy systems can only detect chemical contamination that results in a visible stain or residue. Both techniques lack the ability to identify or classify the chemical composition of the particle or contamination. Off-line laboratory techniques are used to qualify the cleanliness of new processes and equipment, or to analyze defects detected by in-line equipment or as part of failure analysis. A critical need therefore exists for a fast, inexpensive and effective means of detecting, locating and classifying relatively small quantities of chemical contamination on production wafers.
It is therefore an object of the invention to provide an improved method and system for inspection of surfaces of materials, such as semiconductor wafers.
It is an additional object of the invention to provide an improved method and system for providing images of surface defects on an semiconductor wafer.
It is yet another object of the invention to provide an improved method and system for identifying different classes of semiconductor wafer surface defects by pattern recognition.
It is still a further object of the invention to provide an improved method and system for classifying categories of surface defects on semiconductor wafers, including without limitation surface defect states, electrostatic field variations, oxide states and chemical contamination.
It is also an additional object of the invention to provide an improved method and system for sensing electrostatic fields arising from semiconductor wafer surface defects.
It is yet another object of the invention to provide an improved method and system for detecting the presence of thin dielectric films on surfaces of semiconductor wafers and to detect film defects such as pinholes, bubbles, delaminations, or contamination under the film.
It is a further object of the invention to provide an improved method and system to sense variations in oxide states on semiconductor wafer surfaces.
It is also a further object of the invention to provide an improved method and system to classify particulate contaminants on semiconductor wafers identified initially by optical inspection systems.
It is yet a further object of the invention to provide an improved method and system for detecting variations in dopant concentration of semiconductor wafers.
It is another object of the invention to provide an improved method and system for use of an NVCPD sensor to inspect the surface quality of semiconductor wafers.
It is still another object of the invention to provide an improved method and system of NVCPD sensors in combination with other inspection systems for evaluating semiconductor wafer surface properties.
It is a further object of the invention to provide an improved method and system for producing topological images of differing contact potential characteristic of defects on a semiconductor wafer.
It is also an object of the invention to provide an improved method and system for rapidly scanning the surface of a semiconductor wafer to identify sub-microscopic, microscopic and macroscopic surface defects characterized by potential field disturbances on the wafer surface.
It is also an object of the invention to provide an improved method and system for detecting the cleanliness of a semiconductor wafer to determine if a cleaning process has eliminated all contaminants and to avoid the time and expense of cleaning wafers for longer than is necessary to remove contaminants.
In each case described above, wafer surface can refer to the front-side (patterned side) of the wafer, back-side (unpatterned side) of the wafer, or the edge of the wafer.
Other objects, features and advantages of the present invention will be readily apparent from the following description of the preferred embodiment thereof, taken in conjunction with the accompanying drawings described below.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 illustrates one embodiment of the NVCPD scanning method and system;
FIG. 2 illustrates the concept of the contact potential difference methodology;
FIG. 3 illustrates an NVCPD scanning method;
FIG. 4 illustrates the current output of an NVCPD probe as it passes over a positive and negative work function transition;
FIG. 5 illustrates axial orientation of the NVCPD system;
FIG. 6 illustrates standard deviation of signals within a scan area;
FIG. 7 illustrates steps for creating test wafers which are partially coated with known concentrations of contaminants;
FIG. 8A illustrates one form of scanning NVCPD system with a three axis linear positioning system with the NVCPD sensor and a wafer mounted on a high speed spindle; and FIG. 8B illustrates another form of scanning NVCPD system;
FIG. 9 illustrates a flow diagram for the image acquisition process of a radially scanned NVCPD imaging system;
FIG. 10A illustrates an optical image of a 100 mm diameter silicon wafer after application of a vacuum pick-up device and FIG. 10B illustrates an NVCPD image of the wafer of FIG. 10A;
FIG. 11A illustrates an optical image of a second silicon wafer after applying alcohol while spinning the wafer and allowing the alcohol to dry and FIG. 11B is an NVCPD image of the same wafer of FIG. 11A;
FIG. 12A illustrates an optical image of a silicon wafer after application of a latex glove mark and FIG. 12B is an NVCPD image of the same wafer of FIG. 12A;
FIG. 13A illustrates an optical image of a silicon wafer having human fingerprints on the wafer and FIG. 13B illustrates an NVCPD image of the wafer of FIG. 13A;
FIG. 14 illustrates an NVCPD image of a silicon wafer after brushing the wafer surface with a stainless steel tool; and
FIG. 15 illustrates an NVCPD image of a silicon wafer after pressing an aluminum fixture onto the wafer surface.



DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The preferred embodiment of the invention is directed to an improved use of an NVCPD sensor. In particular, FIG. 1 illustrates a functional block flow diagram of components and operation of one preferred form of an NVCPD scanning system 10. NVCPD sensor 12 (see FIG. 2) is based on the phenomena of contact potential difference which is a voltage generated between two dissimilar materials brought in close proximity to each other. An illustration of this concept can be seen in FIG. 2. In the case of the wafer scanning system 10, the sensor tip 13 forms plate 14 and wafer 15 having a wafer surface 16 forms plate 18 (see FIG. 2.) Probe tip surface 20 of the plate 14 is made of a conducting material with a fixed work function. The wafer surface 16 of the plate 18 has a work function which can vary due to irregularities in the semiconductor wafer surface 16 or contaminants or other materials deposited on the wafer surface 16. When the two plates 14 and 18 are electrically connected, the Fermi levels of the respective surface equilibrate and form an electric field between them. If the work function of the sensor tip 13 is fixed, the magnitude of the electric field is then related to the distance between the two plates 14 and 18, the relative dielectric between the plates 14 and 18 and the work function of the wafer surface 16. In practice the plates 14 and 18 equilibrate rapidly providing little to measure. To provide a current flow that can be measured, some relative motion of the sensor tip 12 to the wafer surface 16 must be realized. The NVCPD sensor 12 is moved over the surface at a substantially fixed distance and variations in the wafer surface 16 cause a current to flow. An illustration of this concept can be seen in FIG. 3. The current flow from this NVCPD sensor 12 can be modeled by the following equation.




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where ∈o is the permittivity of free space, ∈r, is the relative dielectric constant, A is the area of the probe tip, d is the distance between the sensor tip 13 and the wafer 15, Φ is the work function of the respective surface, and e is the charge on an electron. The V term can also be described as a difference in surface potentials between the NVCPD sensor 12 and the wafer 15. In addition the surface potentials on the wafer surface 16 can vary due to defects. The overall surface potential is related to the underlying materials work function but it can also be affected by adsorbed layers of material on the wafer surface 16. Even sub mono-layers of materials are known to significantly affect the surface potential.
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term is related to changes in work function on the wafer surface 16. It can be seen that the magnitude of this term is related to the relative changes in work function on the wafer surface 16 and relative speed at which the NVCPD sensor 12 is moved over the wafer surface 16. An illustration of the signal generated from this can be seen in FIG. 4.

Many defects can present themselves as variations in the wafer work function or the overall surface potential. For instance variation in semiconductor dopant concentrations in the wafer 15 will cause varying characteristic work functions. In addition other materials that could diffuse into the wafer 15 such as copper will cause variations in work function. Within the semiconductor material itself, mechanical phenomena such as dislocation pile-ups, cracks, and scratches generate local stresses which will change the local work function. In addition, adsorbed layers of atomic or molecular contaminants even at the sub monolayer level will generate appreciable surface potential variations. Particles deposited on the wafer 16 with a surface potential different than the surrounding wafer material will also create a signal. Layers of chemicals commonly used in the wafer fabrication process will affect the surface potential of the wafer. For instance residual CMP slurry or photo-resist would cause local variations in surface potential detectable by the NVCPD sensor 12.
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term is related to changes in gap between the NVCPD sensor 12 and the wafer 15 or variations in the relative dielectric constant. Geometrical imperfections in the wafer surface 16 or particles on the wafer surface 16 would manifest themselves in this component. Also because of its differential nature the magnitude of this component would also increase as the relative speed of the NVCPD sensor 12 is increased.

Many classes of wafer defects would appear as geometrical changes in the wafer surface 16. In the wafer 15 itself surface cracks, scratches, etched trenches, etc. would be examples of this. In addition particles deposited on the wafer 15 would also present themselves as a local change in the distance to the probe sensor tip 13.
Variations of dielectric films on the wafer 15 can also be detected. An example would be detecting variations in the oxide state grown on the silicon substrate (i.e. SiO, SiO2, SiO3, SiO4). In addition variations in dielectric of other non-conducting materials commonly deposited on the wafer could be detected.
It should also be noted that many features could present themselves as combinations of geometrical changes and chemical changes. For instance a particle deposited on the wafer 15 of differing material than the underlying wafer 15. Also a crack in the surface would also induce stresses that would cause variations in local work function.
In FIG. 5 is schematically shown one form of the system 10 for application of the NVCPD sensor 12 to scan the wafer 15 for defects and contamination. FIGS. 8A and 8B also illustrate more detailed drawings of two alternative operating embodiments of the system 10. The system 10 in FIG. 5 includes an X-Y-Z positioning system 26, a rotating wafer stage 28, a high speed data acquisition system 30 with a personal computer PC 32 and control software executed by the PC 32.
As shown in more detail in FIG. 8A, the wafer 15 is affixed to a rotating spindle 54 (see FIG. 1) using clamping fixture 56 on the wafer edges. A sensor positioning system 50 includes an NVCPD sensor 52 positioned a fixed distance from the wafer 15 is mounted to the spindle 54. The wafer 15 (not seen in this view) is then rotated at high speed, and the NVCPD sensor 52 is translated radially to collect data in circumferential tracks. The scanning procedure as shown schematically in FIG. 9 lasts between a few seconds and several minutes, depending on the number of scanned tracks, the speed of the spindle 54, and the speed of the sensor positioning system 52. The tracks of data are then put together to form a CPD image. These CPD images allow the visualization of chemical and geometrical defects and thereby enable classification of the type of defect present on the wafer surface. Some examples of these CPD images can be seen in FIG. 10A-15 and are taken from a 100 mm wafer compared with optical images of the same wafer (see Example hereinafter).
The images generated were subsequently processed to automatically locate defects. The idea behind this process was to locate areas of high variability. An ideal surface would exhibit a flat signal but a wafer surface with defects would exhibit some variability in the signal. To locate areas with defects the data was broken up in to small areas of known location. The standard deviation of the signal within these areas was determined. Areas with defects showed a higher standard deviation, and these results can be seen in FIG. 6. Areas with defects appear brighter than lower variability areas of the wafer 15. This is one of many possible methods to process the NVCPD data.
More generally, a defect can be identified by one or more of the following:
1. Process the data to look for a voltage or change in voltage (or pattern of voltages or changes in voltages) that exceeds some user-defined value (threshold).
2. Compare the data to a known pattern that represents a defect via some form of correlation or template matching.
3. Convert the spatial data to the frequency domain and then identify peaks in the frequency domain that represent defects with unique spatial characteristics.
These techniques can also be combined with other techniques to yield analytical results. The signal may also be preprocessed to facilitate defect detection, such as, for example:
1. Since the signal is differential, it can be integrated over some distance to produce voltages that represent relative CPD's over the surface of the wafer 15.
2. If the wafer 15 is “patterned”, then this known pattern can be removed from the data prior to processing. This would likely be accomplished through some variation of image or signal subtraction in either the space or frequency domains.
3. The signal would likely be processed with some form of frequency filtering to remove high or low frequencies depending on the size, shape and other characteristics of the expected defects.
4. The signal could be processed to remove features of a certain size by doing what is called “morphological processing.”
The following non-limiting example describes methods of preparation of test wafers and sensing characteristic images for identifying certain defect states, chemical states, electrostatic states and mechanical features present on a semiconductor wafer surface.
EXAMPLE
Sample wafers can be created by dip coating the wafer 15 in solutions that contain known concentrations of contaminants. Part of this example describes metal contaminants such as Cu and Fe, although any manner of chemical contaminants can be applied in this way. The wafer 15 described is either a 100 mm or 150 mm wafer, although these examples apply to any size wafer. The wafer surface 16 is prepared by dipping in HF to remove oxides. The wafer 15 is then cleaned and partially dipped in the metal contaminant solution. The amount of solution remaining on the wafer 15, and the resulting concentration of contaminant on the wafer surface 16, is controlled by selecting dip coating parameters such as the extraction rate.
Partial dipping of the test wafer 15 is preferred to create a transition from clean to contaminated areas. Because the NVCPD signal is differential, the NVCPD sensor 12 detects changes on the wafer surface 16, as opposed to an absolute value relating to surface condition. This aspect of NVCPD sensors 12 is offset by the ability to rapidly image and detect localized contamination anywhere on the surface of the wafer 15.
After preparation, each test wafer 15 can be, if necessary, analyzed using an appropriate combination of XPS, Auger and RBS (or other well known surface analysis methods) techniques to determine actual contaminant concentrations in the dipped areas of the wafer 15. Each step involved in the sample wafer preparation process is shown in FIG. 7.
After each sample wafer 15 is created, it can be imaged using a radially scanning NVCPD imaging system 10 constructed in accordance with the invention. As described before, FIGS. 8A and 8B show basic forms of the NVCPD imaging system 10, and FIG. 9 shows another flow diagram illustration of wafer processing. The system 10 employs the NVCPD sensor 12 mounted on the previously described three-axis positioning system 26. This positioning system 26 is used to position the NVCPD sensor 12 above the wafer surface 16 to be imaged, and to scan the NVCPD sensor 12 radially across the wafer surface. The wafer 15 is mounted on a spindle that rotates at high speed (1800 rpm) beneath the NVCPD sensor 12. The system 10 operates by acquiring multiple consecutive tracks of data as the NVCPD sensor 12 is stepped along the radius of rotation of the wafer 15.
The imaging system 10 has been used for a variety of surface analysis experiments. FIGS. 10A, 10B, 11A and 11B show sample wafer images that were generated using the NVCPD sensor 12 imaging for wafer inspection. The images show optical images in FIGS. 10A and 11A and NVCPD images in FIGS. 10B and 11B of a 100 mm form of the wafers 15. The first wafer 15 was cleaned, and then a small vacuum pick-up device was attached to the surface of the wafer 15 in three locations. The optical image of FIG. 10A shows no evidence of any change on the surface 16 of the wafer 15. The NVCPD image of FIG. 10B shows a very large signal at the locations where the pick-up device was applied. The NVCPD signal is believed to be the result of a small amount of residue left on the surface 16 by the pick-up device.
The second set of images in FIGS. 11A and 11B show a wafer 15 that has had alcohol spun-on and then dried. The resulting residue is not visible in the optical image FIG. 11A, but is clearly visible in the NVCPD image FIG. 11B. These images provide a clear demonstration of the usefulness of NVCPD sensor 12 for wafer inspection.
FIGS. 12A and 12B show, respectively, an optical image of latex glove marks and a NVCPD image of latex glove marks. FIGS. 13A and 13B show, respectively, an optical image of human fingerprints and an NVCPD image of the fingerprints. FIG. 14 shows a NVCPD image of a wafer 15 after brushing the wafer 15 with a stainless steel tool, and FIG. 15 shows a NVCPD image of the wafer 15 after pressing an aluminum fixture onto the wafer surface 16. All these example images were acquired using the NVCPD sensor 12 with the probe sensor tip 14 having a diameter of approximately 60 microns measured over a period of approximately 30 seconds.
While preferred embodiments of the invention have been shown and described, it will be clear to those skilled in the art that various changes and modifications can be made without departing from the invention in its broader aspects as set forth in the claims provided hereinafter.

## Claims

1. A method for identifying a defect present on a surface of a semiconductor wafer being processed for production, comprising the steps of:
providing a semiconductor wafer processing system including a semiconductor wafer scanning system for analyzing defects;
providing a semiconductor wafer having a surface;
fixing the semiconductor wafer upon a wafer stage of the semiconductor wafer scanning system;
providing a contact potential difference sensor;
engaging a positioning mechanism in communication with the contact potential sensor whereby the contact potential difference sensor is positionable in relation to the wafer stage via the positioning mechanism and the contact potential difference sensor is positioned in the in-line semiconductor wafer processing system;
continuously scanning the contact potential difference sensor relative to the wafer;
generating contact potential difference data from the contact potential difference sensor during at least the scanning of the semiconductor wafer relative to the sensor with the data being representative of changes of contact potential difference of the semiconductor wafer surface relative to the contact potential difference sensor;
processing the contact potential difference data to form representative contact potential difference data representative of the semiconductor wafer surface; and
processing the contact potential difference data to identify the defect.

2. The method as defined in claim 1 further including the step of identifying the defect on the wafer disposed on the wafer surface, the defect on the wafer selected from the group consisting of a metal, an organic residue, carbon, an organic compound, an atomic level contaminant and a molecular contaminant.

3. The method as defined in claim 1 further including the step of identifying variations in chemical oxide state of an oxide material disposed on at least part of the wafer.

4. The method as defined in claim 3 wherein the oxide material comprises a silicon based material.

5. The method as defined in claim 1 wherein the surface of the semiconductor wafer being inspected comprises at least one of a front side of the wafer, a back side of the wafer and an edge of the wafer.

6. The method as defined in claim 1 wherein the defect on the semiconductor wafer comprises a geometrical change in the wafer surface.

7. The method as defined in claim 6 wherein the geometrical change is selected from the group of a surface scratch, a surface crack, an etched trench, a pinhole, a particle, a bubble, and a delaminated portion of the wafer.

8. The method as defined in claim 1 wherein the defect comprises defects which give rise to electrostatic fields.

9. The method as defined in claim 1 wherein the defect comprises at least one of a thin dielectric film disposed on the wafer and a nonconducting material disposed on the wafer.

10. The method as defined in claim 1 wherein the defect comprises at least one of defect states, chemical states, electrostatic states and mechanical features.

11. The method as defined in claim 1 wherein the defect comprises a feature associated with a change of relative contact potential difference over the surface of the wafer.

12. The method as defined in claim 1 further including another inspection system for evaluating properties of the semiconductor wafer.

13. In a method for identifying a defect present on a surface of a semiconductor wafer being processed for production, the semiconductor wafer having undergone at least one preprocessing step of: applying processing chemicals, subjecting the semiconductor wafer to another processing step, cleaning the semiconductor wafer, and handling the semiconductor wafer, the improvement comprising the steps of:
providing a semiconductor wafer processing system including a semiconductor wafer scanning system for analyzing defects of the semiconductor wafer;
providing a semiconductor wafer having a surface, the semiconductor wafer having undergone the at least one preprocessing step;
fixing the semiconductor wafer upon a wafer stage of the semiconductor wafer scanning system;
providing a contact potential difference sensor;
engaging a positioning mechanism in communication with the contact potential sensor whereby the contact potential difference sensor is positionable in relation to the wafer stage via the positioning mechanism and the contact potential difference sensor is positioned in the in-line semiconductor wafer processing system;
continuously scanning the contact potential difference sensor relative to the wafer;
generating contact potential difference data from the contact potential difference sensor during at least the scanning of the semiconductor wafer relative to the sensor with the data being representative of changes of contact potential difference of the semiconductor wafer surface relative to the contact potential difference sensor;
processing the contact potential difference data to form representative contact potential difference data representative of the semiconductor wafer surface; and
processing the contact potential difference data to identify the defect.

14. The improvement of claim 13 wherein the processing of the contact potential difference data comprises sensing a variation in an insulating layer disposed on at least part of the semiconductor wafer.

15. The improvement of claim 14 wherein the defect includes an anomalous electrostatic field.

16. The improvement of claim 14 wherein the insulating material consists essentially of a silicon oxide.

17. The improvement of claim 13 the defect comprises at least one of a residue, a chemical contaminant, a metal, carbon, an organic compound, an atomic level contaminant and a molecular contaminant arising from the one preprocessing step of the semiconductor wafer.

18. The improvement of claim 13 further including the step of classifying the defect in terms of the change of the relative contact potential difference over the surface of the semiconductor wafer.

19. The improvement of claim 13 wherein the defect is selected from the group of a chemical defect, an electrical defect and a geometrical change.

20. The improvement of claim 13 wherein the step of generating contact potential difference data includes collecting data from a semiconductor wafer surface selected from the group consisting of a front side of the wafer, a back side of the wafer and an edge of the wafer.