# Patent

## Title
Active resistance summer for a transformer hybrid

## Abstract

A transmit canceller comprises an operational amplifier having a first polarity input terminal, a second polarity input terminal, and an output terminal. A feedback element communicates with the second polarity input terminal and the output terminal. A first input resistor communicates with the second polarity input terminal and the measured signal input. A second input resistor communicates with the second polarity input terminal and the replica signal input. A predetermined voltage source communicates with the first polarity input terminal of the operational amplifier. The received signal is an output at the output terminal of the operational amplifier.

## Background
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a divisional of U.S. patent application Ser. No. 10/786,010 filed on Feb. 26, 2004, which is a Continuation of U.S. patent application Ser. No. 09/629,092 filed Jul. 31, 2000 now U.S. Pat. No. 6,775,529. The disclosures of the above applications are incorporated herein by reference.


BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to transmitting and receiving electrical signals through communication channels, such as a gigabit channel. In particular, the present invention relates to a transmit canceller that removes transmit signals from receive signals in such communication channels.
2. Background and Related Art
A gigabit channel is a communications channel with a total data throughput of one gigabit per second. A gigabit channel typically includes four (4) unshielded twisted pairs (hereinafter “UTP”) of cables (e.g., category 5 cables) to achieve this data rate. IEEE Standard 802.3ab, herein incorporated by reference, specifies the physical layer parameters for a 1000BASE-T channel (e.g., a gigabit channel).
As will be appreciated by those skilled in the art, a UTP becomes a transmission line when transmitting high frequency signals. A transmission line can be modeled as a network of inductors, capacitors and resistors, as shown in FIG. 1. With reference to FIG. 1, G is normally zero and R(T) is complex due to skin effect. R(T) can be defined by:

R(ω)=kR(1+j)√{square root over (ω)}  (1)

where kR is a function of the conductor diameter, permeability, and conductivity. The characteristic impedance of the line is defined by:





  
    
      
        
          
            Z
            0
          
          =
          
            
              
                
                  R
                  ⁡
                  
                    (
                    ω
                    )
                  
                
                +
                
                  jω
                  ⁢
                  
                    
                  
                  ⁢
                  L
                
              
              
                G
                +
                
                  jω
                  ⁢
                  
                    
                  
                  ⁢
                  C
                
              
            
          
        
        ,
      
    
    
      
        (
        2
        )
      
    
  




and at high frequencies, Z0 becomes approximately √{square root over (L/C)} or approximately 100 ohms in a typical configuration. When properly terminated, a UTP of length d has a transfer function H that is a function of both length (d) and frequency (ω):

H(d,ω)=edγ(ω),  (3)

where

γω=√{square root over ((R(ω)+jωL)(G+jωC))}{square root over ((R(ω)+jωL)(G+jωC))},  (4)

and substituting Equations 1 and 4 into Equation 3, and simplifying, approximately yields:




  
    
      
        
          H
          ⁡
          
            (
            
              d
              ,
              ω
            
            )
          
        
        ≈
        
          
            {
            
              d
              ⁡
              
                [
                
                  
                    
                      
                        k
                        R
                      
                      2
                    
                    ⁢
                    
                      
                        
                          ω
                          ⁢
                          
                            
                          
                          ⁢
                          L
                        
                        C
                      
                    
                  
                  +
                  
                    j
                    ⁡
                    
                      (
                      
                        
                          ω
                          ⁢
                          
                            
                              L
                              ⁢
                              
                                
                              
                              ⁢
                              C
                            
                          
                        
                        +
                        
                          
                            
                              k
                              R
                            
                            2
                          
                          ⁢
                          
                            
                              
                                ω
                                ⁢
                                
                                  
                                
                                ⁢
                                L
                              
                              C
                            
                          
                        
                      
                      )
                    
                  
                
                ]
              
            
            }
          
          .
        
      
    
    
      
        (
        5
        )
      
    
  




Equation 5 shows that attenuation and delay are a function of the cable length d.

A transmission path for a UTP typically includes a twisted pair of cables that are coupled to transformers at both a near and far end, as shown in FIG. 2. A transceiver at each end of the transmission path transmits and receives via the same twisted pair. A cable typically includes two patch cords totaling less than 10 m, and a main section of 100 m or even longer. The transmitters shown in FIG. 2 are modeled as current sources. The near end current source supplies a current Itx. The near end transmit voltage (e.g., ItxRtx) is detected and measured across resistor Rtx. A receive signal Vrcv (e.g., a signal transmitted from the far-end transceiver) is also detected and measured across resistor Rtx. Hence, Vtx includes both transmit (ItxRtx) and receive (Vrcv) signals. Accordingly, the signal Vrcv (e.g., the signal from Transceiver B) received at Transceiver A can be obtained by taking the difference between the transmit voltage and the measured voltage Vtx, as follows:

i.Vrcv=Vtx−ItxRtx.  (6)

Conventional solutions for removing transmit signals from receive signals often employ known transconductor (“Gm”) summing stages or other current based methods. As will be appreciated, these methods often introduce signal distortion into the receive signal. Also, some transconductors have a limited signal dynamic range. Accordingly, conventional methods are often inadequate for applications requiring signal recovery. Additionally, known summing circuits, such as weighted summers using operational amplifiers, have not heretofore been modified to accommodate the intricacies associated with canceling transmit signals or regulating baseline wander (described below). A known weighted summer is discussed in Chapter 2 of “Microelectronic Circuits, Third Edition,” by A. S. Sedra and K. C. Smith, 1991, incorporated herein by reference.
As will be appreciated by those skilled in the art, the receive signal Vrcv typically contains additional components, due to baseline wander, echoes and crosstalk, for example.
Baseline wander is preferably corrected for when transmitting and receiving signals over transmission lines. Removing DC components from a receive signal using transformer coupling can cause baseline wander. As will be appreciated by those skilled in the art, baseline wander represents a deviation from an initial DC potential of a signal.
“Echoes” typically represent a residual transmit signal caused by reflections that appear in the receive signal. Echoes can cause undue interference depending on the size of the reflection.
Capacitive coupling between the channels, as shown in FIG. 3, causes crosstalk. Four channels TX1–TX4 are shown in FIG. 3. The capacitive coupling between TX1 and each of TX2, TX3 and TX4 are modeled by capacitors C1-2, C1-3, C1-4, respectively. The capacitive coupling forms a high-pass filter between channels and therefore crosstalk contains mostly high frequency components. As will be appreciated by those skilled in the art, normally only the near-end crosstalk (NEXT) needs to be considered, since crosstalk is usually small and the transmission line provides further attenuation of the far-end crosstalk (FEXT).
Accordingly, there are many signal-to-noise problems to be solved in the art. Hence, an efficient transmission canceller is needed to remove a transmit signal from a receive signal without introducing excess signal distortion. An electrical circuit is also needed to subtract a transmit signal from a receive signal. There is a further need of an electrical circuit to correct baseline wander.
SUMMARY OF THE INVENTION
The present invention relates to a transmit signal canceller for use in a transformer hybrid. Such a hybrid includes a junction for transmitting and receiving signals. In the present invention, an active resistive summer can be used to cancel a transmit signal from a receive signal.
According to the invention, an electrical circuit in a communications channel is provided. The electrical circuit includes an active resistive summer having: (i) an input for a composite signal, the composite signal including a transmission signal component and a receive signal component, (ii) an input for a replica transmission signal, and (iii) an output for a receive signal which includes the composite signal minus the replica signal.
According to an another aspect of the present invention, a transmit signal canceller in a communication channel is provided. The channel includes a first transceiver for transmitting and receiving signals and a replica transmitter for generating a replica transmission signal input. A composite signal at a rear end includes a transmission signal of the first transceiver and a received signal of a second transceiver. The transmit canceller includes: (i) an operational amplifier having a positive input terminal, a negative input terminal, and an output terminal; (ii) a feedback element in communication with the negative input terminal and the output terminal; (iii) a first input resistor in communication with the negative input terminal and the measured signal input; (iv) a second input resistor in communication with the negative input terminal and the replica signal input; and (v) a predetermined voltage source in communication with the positive terminal of the operational amplifier. The receive signal is an output at the output terminal of the operational amplifier.
According to still another aspect of the present invention, a communication system including a first transmission channel with a first end and a second end is provided. The first end couples to a first transformer and the second end couples to a second transformer. A first transceiver transmits and receives signals via the first transformer and a second transceiver transmits and receives signals via the second transformer. A first signal is supplied at the near end. The first signal includes a transmission signal component of the first transceiver and a receive signal component of the second transceiver. The communications system includes: (i) a replica transmitter that generates a replica of the transmission signal component of the first transceiver; (ii) a filter to filter the replica signal; (iii) an active resistive summer receiving the first signal, and the filtered replica signal as inputs to reduce the transmission signal component at an output of the active resistive summer.
According to still another aspect of the present invention, a method of correcting baseline wander in a receive signal in a communications channel having a near and far end is provided. The channel includes a first transceiver at the near end and a second transceiver at the far end, each to transmit and receive signals. The method includes the steps of: (i) providing a composite signal, the composite signal including a transmission signal of the first transceiver and a receive signal of the second transceiver; (ii) generating a replica of the transmission signal; (iii) subtracting the replica signal from the composite signal through an active resistive summer; and (iv) providing a baseline correction current into the active resistive summer.
These and other objects, features, and advantages of the present invention will be apparent from the following description of the preferred embodiments of the present invention.



BRIEF DESCRIPTION OF THE DRAWINGS
The details of the present invention will be more readily understood from a detailed description of the preferred embodiments taken in conjunction with the following figures.
FIG. 1 is a circuit diagram illustrating a transmission line model.
FIG. 2 is a circuit diagram illustrating a transmission path across a twisted pair of cables, the cables being coupled to transformers at each end.
FIG. 3 is a diagram-illustrating crosswalk between channels in a gigabit channel.
FIG. 4 is a block diagram illustrating a system overview of a communications channel.
FIG. 5 is a circuit diagram illustrating a transmitter.
FIG. 6 is a graph illustrating a transmit signal.
FIG. 7 is a graph illustrating a composite signal with echoes.
FIG. 8 is a circuit diagram illustrating a replica transmitter.
FIG. 9 is a graph illustrating a receive signal.
FIG. 10 is block diagram illustrating a low-pass filter.
FIG. 11 is a circuit diagram illustrating an active resistive summer.
FIG. 12 is a circuit diagram illustrating an error detection circuit.
FIG. 13 is a circuit diagram illustrating a low-pass filter.
FIG. 14 is a circuit diagram illustrating a conventional voltage controlled current source.



DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENTS
The preferred embodiments will be described with respect to a gigabit channel, as used, for example, in an Ethernet network; and to electrical circuits associated with separating transmit and receive signals in such a gigabit channel. The preferred embodiments will also be described with respect to baseline wander correction in such a gigabit channel. However, as will be appreciated by those skilled in the art, the present invention is also applicable to other transmission channels, and to other electrical circuits having applications requiring cancellation of transmit signals, for example.
FIG. 4 is a block diagram illustrating principle components for one of the four channels in a preferred gigabit channel configuration for use in an Ethernet network. As illustrated in FIG. 4, a vertical dashed line divides analog and digital processing components. The analog components preferably include a transmitter (“XMTR”) 1, replica transmitter (“Replica XMTR”) 2, transmit canceller 3, baseline correction module 4, low pass filter (“LPF”) 5, analog-to-digital converter (“ADC”) 6, and phase-lock loop (“PLL”) 7. A known PLL can be used with the present invention.
Digital processing components preferably include a transmitter encoder 10, echo module 11, NEXT cancellers 12–14 to assist in removing echoes, synchronization module 15, FIR (Finite Impulse Response) equalizer 16 and a DFE (Decision Feedback Equalizer) 17 to equalize a receive signal, and a Viterbi module 18. The digital processing components also include baseline correction modules 19 and 20 to correct residual baseline wander. A timing recovery module 21, an error correction detector 22 (described in further detail below), and summing junction 23 are also shown. The individual digital components designated by blocks in FIG. 3 are all well known in the communication arts, and their specific construction and operation are not critical to the operation or best mode for carrying out the present invention.
The analog “front-end” components shown in FIG. 4 will now be described in even further detail. The front-end analog components are preferably designed and constructed via customized integrated circuits. However, as will be appreciated by those skilled in the art, the inventive circuits and corresponding configuration could also be realized using discrete components as well.
As illustrated in FIG. 5, transmitter 1 preferably includes a current-source Itx that generates a transmit signal over a resistor Rtx. An appropriated value for resistor Rtx can be selected to match the line impedance, for example. In one preferred embodiment, a resistor center tap is set to 2.5 volts so the transmitter 1 effectively sees a differential impedance of 25 ohms. Preferred performance specifications for the transmitter 1 are further detailed in Table 1, below.
An impulse transmit signal can be generated from a unit square pulse of 1T width filtered by a one-pole, low-pass filter (not shown) with a cutoff frequency between 85 MHz and 125 MHz. Slew-rate control can also be used to limit the rise and fall times and thus reduce the high frequency components of a transmit signal. Of course, any transmit signal preferably fits into the transmit template provided by the IEEE 802.3ab Standard. An ideal transmit pulse is shown in FIG. 6.
A measured voltage Vtx across Rtx (FIG. 5) is shown in FIG. 7. The measured signal Vtx contains interference caused by line reflections (e.g., echoes). The reflections are caused by impedance discontinuity due to impedance mismatch between different cables. For example, a large reflection pulse at 60 ns as shown in FIG. 7 corresponds to a reflection from the impedance discontinuity at an adapter connecting a 5 m patch cord to a 100 m cable. The magnitude of the echoes can be significant when compared to the magnitude of the receive signal at a long line length, and therefore, echo cancellation, as provided by the NEXT cancellers 12–14 shown in FIG. 4, is employed.
A receive signal Vrcv (e.g., a signal received from a far-end transceiver) is also measured across resistor Rtx, as shown in FIG. 5. Accordingly, the near end transmit signal (ItxRtx) is preferably canceled or reduced from the composite signal Vtx in order to effectively recover the far-end received signal Vrcv. This type of active cancellation can be accomplished with a replica transmit signal Vtxr. Accordingly, a replica transmitter 2 (to be described below) is provided to generate a signal Vtxr to be subtracted from the measured signal Vtx, thus, effectively reducing the transmit signal (ItxRtx).
A receive signal x(t) transmitted with pulse amplitude modulation (“PAM”) is define by:




  
    
      
        
          
            x
            ⁡
            
              (
              t
              )
            
          
          =
          
            
              ∑
              
                n
                =
                1
              
              ∞
            
            ⁢
            
              
            
            ⁢
            
              
                a
                n
              
              ⁢
              
                p
                ⁡
                
                  (
                  
                    t
                    -
                    
                      n
                      ⁢
                      
                        
                      
                      ⁢
                      T
                    
                  
                  )
                
              
            
          
        
        ,
      
    
    
      
        (
        7
        )
      
    
  




where an is the transmit symbols and p(t) is the channel pulse derived by convoluting an impulse transmit pulse with a channel response defined by Equation 5. The receive signal for a 100 m cable is heavily attenuated by the transmission line and the pulse width is dispersed, as shown in FIG. 9. A 100 m UTP delays the signal by about 550 ns. Signal equalization preferably uses high frequency boosting via the FIR 16 to remove precursor intersymbol interference (“ISI”) and to insert a zero crossing for timing recovery 21. The DFE 17 is used to remove postcursor ISI.
The receive signal's elongated tail results from transformer coupling (e.g., a high-pass filter) with a time constant (e.g., L/R) typically on the order of micro-seconds. Since the receive signal contains little or no average DC energy, the negative tail has the same amount of energy as the positive pulse. In this regard, the signal's area integral is zero. In a typical example, a tail can last over 10 μs with a magnitude of no more than 0.5 mV. The long tail causes any DC bias to drift back toward zero, which can lead to baseline wander. As will be appreciated, this response time is too long to be practically removed by a digital equalizer, but the response is slow enough to be cancelled using a slow integrator, for example. The baseline wander canceller 4 is preferably decision directed to minimize the error defined by the difference between the equalized value and it's sliced value, as discussed below.
As illustrated in FIG. 8, the replica transmitter 2 includes a current source Itxr. Itxr is coupled to a voltage V through resistors R, as shown in FIG. 8. In a preferred embodiment, R is 100 ohms and V is about 2.5 volts. The replica signal Vtxr is preferably filtered through a known low-pass filter to obtain a low-pass replica signal (“Vtxrl”), as shown in FIG. 10. Replica signal Vtxr can also be inverted in a known manner to produce −Vtxr. The preferred performance specifications for the transmitter 1 and replica transmitter 2 are shown in Table 1.







TABLE 1







Transmitter and Replica Performance Specifications










Parameters
Specifications







Transmit Current
+/−40 mA



Replica Transmit
1⁄4 of transmit current



Current



Number of levels
16 (not including 0)



Number of sub-
8 (sequentially delayed)



units



Transmit Profile
[1 1 2 2 1 1], w/~1 ns delay



Replica Transmit
[1 1 3 3], w/~1 ns delay



Profile



Rtx
100Ω










A transmit signal canceller 4 is illustrated in FIG. 11. The transmit canceller 4 removes the transmission signal (ItxRtx) from the measured (or detected) transmit Vtx signal. In particular, the transmit canceller includes an active resistive summer that provides a large input dynamic range and stable linearity characteristics, while removing (e.g., reducing or canceling) the unwanted transmit signal component.
As illustrated in FIG. 11, the active summer includes an operational amplifier (“op-amp”) with inverting feedback. The op-amp is preferably constructed using integrated circuits in a known manner. The summer receives Vtxrl, Vtx, −Vtxr, Icms, and Ibl, as input signals. Ibl is a baseline wander control current, and Icms is a common-mode shift current, each as further discussed below.
As will be appreciated by those skilled in the art, a transformer typically has high-pass characteristics. Accordingly, replica signal −Vtxr is combined (e.g., subtracted via the active resistive summer) with the low pass replica signal Vtxrl to produce a high-pass replica signal. As an alternative configuration, Vtxr could be filtered through a known high-pass filter prior to the transmit canceller 3 stage.
Returning to FIG. 11, receive signal Vrcv is determined from the following relationships.
Let:
Vi=voltage for the op-amp's positive terminal;
V1=Vtxrl;
V2=Vtx;
−V3=−Vtxr;
i4=Icms; and
i5=Ibl.
Then:




  
    
      
        
          
            
              
                
                  
                    
                      (
                      i
                      )
                    
                    ⁢
                       
                    ⁢
                    
                      i
                      1
                    
                  
                  +
                  
                    i
                    2
                  
                  -
                  
                    i
                    3
                  
                  -
                  
                    i
                    4
                  
                  -
                  
                    i
                    5
                  
                
                =
                
                  i
                  0
                
              
              ;
              and
            
          
        
        
          
            
              
                
                  
                    (
                    
                      i
                      ⁢
                      
                        
                      
                      ⁢
                      i
                    
                    )
                  
                  ⁢
                     
                  ⁢
                  
                    
                      
                        V
                        1
                      
                      -
                      
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        i
                      
                    
                    
                      R
                      1
                    
                  
                
                =
                
                  i
                  1
                
              
              ;
              
                
                  
                    
                      V
                      2
                    
                    -
                    
                      V
                      ⁢
                      
                        
                      
                      ⁢
                      i
                    
                  
                  
                    R
                    1
                  
                
                =
                
                  i
                  2
                
              
              ;
              
                
                  
                    V
                    ⁢
                    
                      
                    
                    ⁢
                    
                      i
                      --
                    
                    ⁢
                    
                      V
                      3
                    
                  
                  
                    R
                    1
                  
                
                =
                
                  i
                  3
                
              
              ;
              
                
                  
                    
                      
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        i
                      
                      -
                      
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        r
                        ⁢
                        
                          
                        
                        ⁢
                        c
                        ⁢
                        
                          
                        
                        ⁢
                        v
                      
                    
                    ⁢
                    
                      
                    
                  
                  
                    R
                    F
                  
                
                =
                
                  
                    
                      i
                      0
                    
                    .
                  
                  ⇒
                
              
            
          
        
        
          
            
              
              ⁢
              
                
                  
                    
                      
                        V
                        1
                      
                      -
                      
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        i
                      
                    
                    
                      R
                      1
                    
                  
                  +
                  
                    
                      
                        V
                        2
                      
                      -
                      
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        i
                      
                    
                    
                      R
                      1
                    
                  
                  -
                  
                    
                      
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        i
                      
                      -
                      
                        V
                        3
                      
                    
                    
                      R
                      1
                    
                  
                  -
                  
                    i
                    4
                  
                  -
                  
                    i
                    5
                  
                
                =
                
                  
                    
                      
                        
                          V
                          ⁢
                          
                            
                          
                          ⁢
                          i
                        
                        -
                        
                          V
                          ⁢
                          
                            
                          
                          ⁢
                          r
                          ⁢
                          
                            
                          
                          ⁢
                          c
                          ⁢
                          
                            
                          
                          ⁢
                          v
                        
                      
                      ⁢
                      
                        
                      
                    
                    
                      R
                      F
                    
                  
                  ⇒
                
              
            
          
        
        
          
            
              
              ⁢
              
                
                  
                    
                      
                        V
                        1
                      
                      +
                      
                        V
                        2
                      
                      -
                      
                        V
                        3
                      
                      -
                      
                        3
                        ⁢
                        
                          
                        
                        ⁢
                        V
                        ⁢
                        
                          
                        
                        ⁢
                        i
                      
                    
                    
                      R
                      1
                    
                  
                  -
                  
                    i
                    4
                  
                  -
                  
                    i
                    5
                  
                
                =
                
                  
                    
                      
                        
                          V
                          ⁢
                          
                            
                          
                          ⁢
                          i
                        
                        -
                        
                          V
                          ⁢
                          
                            
                          
                          ⁢
                          r
                          ⁢
                          
                            
                          
                          ⁢
                          c
                          ⁢
                          
                            
                          
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                      ⁢
                      
                        
                      
                    
                    
                      R
                      F
                    
                  
                  ⇒
                
              
            
          
        
        
          
            
              
              ⁢
              
                
                  
                    
                      
                        R
                        F
                      
                      
                        R
                        1
                      
                    
                    ⁢
                    
                      (
                      
                        
                          V
                          1
                        
                        +
                        
                          V
                          2
                        
                        -
                        
                          
                            V
                            3
                          
                          ⁢
                          3
                          ⁢
                          
                            
                          
                          ⁢
                          V
                          ⁢
                          
                            
                          
                          ⁢
                          i
                        
                      
                      )
                    
                  
                  -
                  
                    
                      i
                      4
                    
                    ·
                    
                      R
                      F
                    
                  
                  -
                  
                    
                      i
                      5
                    
                    ·
                    
                      R
                      F
                    
                  
                
                =
                
                  
                    
                      V
                      ⁢
                      
                        
                      
                      ⁢
                      i
                    
                    -
                    
                      V
                      ⁢
                      
                        
                      
                      ⁢
                      r
                      ⁢
                      
                        
                      
                      ⁢
                      c
                      ⁢
                      
                        
                      
                      ⁢
                      v
                    
                  
                  ⇒
                
              
            
          
        
        
          
            
              
              ⁢
              
                
                  
                    
                      
                        R
                        F
                      
                      
                        R
                        1
                      
                    
                    ⁢
                    
                      (
                      
                        
                          V
                          1
                        
                        +
                        
                          V
                          2
                        
                        -
                        
                          V
                          3
                        
                        -
                        
                          3
                          ⁢
                          
                            
                          
                          ⁢
                          v
                          ⁢
                          
                            
                          
                          ⁢
                          i
                        
                      
                      )
                    
                  
                  -
                  
                    
                      R
                      F
                    
                    ⁢
                    
                      i
                      4
                    
                  
                  -
                  
                    
                      R
                      F
                    
                    ⁢
                    
                      i
                      5
                    
                  
                  -
                  
                    V
                    ⁢
                    
                      
                    
                    ⁢
                    i
                  
                
                =
                -
              
            
          
        
        
          
            
              
              ⁢
              
                
                  V
                  ⁢
                  
                    
                  
                  ⁢
                  r
                  ⁢
                  
                    
                  
                  ⁢
                  c
                  ⁢
                  
                    
                  
                  ⁢
                  v
                  ⁢
                  
                    
                  
                  ⁢
                  
                    V
                    
                      r
                      ⁢
                      
                        
                      
                      ⁢
                      c
                      ⁢
                      
                        
                      
                      ⁢
                      v
                    
                  
                
                =
                
                  
                    V
                    i
                  
                  -
                  
                    
                      
                        R
                        F
                      
                      
                        R
                        1
                      
                    
                    ⁢
                    
                      (
                      
                        
                          V
                          1
                        
                        +
                        
                          V
                          2
                        
                        -
                        
                          V
                          3
                        
                        -
                        
                          3
                          ⁢
                          
                            
                          
                          ⁢
                          V
                          ⁢
                          
                            
                          
                          ⁢
                          i
                        
                      
                      )
                    
                  
                  +
                  
                    
                      R
                      F
                    
                    ⁡
                    
                      (
                      
                        
                          i
                          4
                        
                        +
                        
                          i
                          5
                        
                      
                      )
                    
                  
                
              
            
          
        
      
    
    
      
        (
        8
        )
      
    
  




Substituting the input signals for their placeholders yields the definition for Vrcv, as follows:




  
    
      
        
          V
          
            r
            ⁢
            
              
            
            ⁢
            c
            ⁢
            
              
            
            ⁢
            v
          
        
        =
        
          
            V
            ⁢
            
              
            
            ⁢
            i
          
          -
          
            
              
                R
                F
              
              
                R
                1
              
            
            ⁢
            
              (
              
                
                  V
                  ⁢
                  
                    
                  
                  ⁢
                  t
                  ⁢
                  
                    
                  
                  ⁢
                  x
                  ⁢
                  
                    
                  
                  ⁢
                  r
                  ⁢
                  
                    
                  
                  ⁢
                  l
                
                +
                
                  V
                  ⁢
                  
                    
                  
                  ⁢
                  t
                  ⁢
                  
                    
                  
                  ⁢
                  x
                
                -
                
                  V
                  ⁢
                  
                    
                  
                  ⁢
                  t
                  ⁢
                  
                    
                  
                  ⁢
                  x
                  ⁢
                  
                    
                  
                  ⁢
                  r
                
                -
                
                  3
                  ⁢
                  
                    
                  
                  ⁢
                  V
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The gain is preferably set between 0.75 and 1 (e.g., RF/R1 equals 0.75 to 1). For a small signal analysis, Vi can be set to zero (0). Also, as will be appreciated by those skilled in the art, in a fully differential circuit, Vi effectively drops out of the equations since Vrcv=Vrcv(+)−Vrcv(−). As discussed, Vtxrl and −Vtxr are combined through the active summer to provide a high-pass replica signal (“Vtxrh”). The receive signal Vrcv can then be recovered as shown by Equation 9.
Preferred transmit canceller specifications are detailed in Table 2, below.







TABLE 2







Transmit Canceller Performance Specifications










Parameters
Specifications







Input Dynamic
+/−2.5 V(diff.) for transmit signal



Range



Output Dynamic
+/−1 V(diff.)



Range



Input impedance
High, ~10 k.



Output impedance
Low



Cutoff frequency
Greater than 31.5 Mhz



DC Gain
0.85 -dependent on the LPF 5 and ADC




6 characteristics (FIG. 4)



Power
25 mw, including LPF 5 (FIG. 4)



Rf
8.5 KΩ; or 7.5 KΩ for increased




attenuation



Vi
2.0 volts



R1
10 KΩ










A known current mode circuit, e.g., a voltage controlled current source (VCCS) as shown in FIG. 14, with feedback preferably sets the summer input current-mode voltage (Vcm). Of course, other known current mode circuits could be employed with the present invention. This current-mode circuit shifts the common-mode of both the transmit and replica transmit signals. The input to the op amp (Vaip, Vain) is compared against the desired op amp output common-mode voltage (Vd):

Vd=(Vaip−Vcm)+(Vain−Vcm).  (10)

Then, the common-mode shift current can be determined from:

Icms=Vdgm+I0,  (11)

where gm is a transconductance and Io is an offset current. An appropriate transconductance and offset current can be selected by setting Vcm=IcmsRF=VdgmRF+I0RF, to ensure a proper common-mode voltage seen by the op amp inputs. In this manner, the common mode shift current Icms can be regulated to pull down the common mode voltage of the operational amplifier as needed.

Baseline wander current Ibl is also “summed” by the active resistive summer, as shown in FIG. 11, to correct baseline wander. Approximately ninety percent (90%) of all system baseline correction can be obtained through the active summer. The remaining baseline residual can be digitally corrected through an equalizer, for example. As will be appreciated, the FIG. 11 topology allows the current sources (Ibl and Icms) to each have a fixed output voltage, thus, minimizing current deviation due to finite output resistance.
The baseline wander correction module 4 preferably corrects for baseline wander using a decision-directed method, such as a discrete integrator. The decision-directed method can be implemented with a known charge pump, where the pump sign (e.g., +1/−1) is determined digitally using an error between the equalized baseline signal (yk) and a sliced baseline signal (y^k), as shown in FIG. 12. As will be appreciated by those skilled in the art, the expected error value (e.g., E[ek]) is ideally driven to zero. The charge pump is preferably pumped up or down based on the error value. For example, a positive error implies that a negative value should be input into the charge pump. For a negative error, a positive value should be input into the charge pump. The charge pump preferably has at least two current settings to regulate Ibl. Of course, a charge pump with many current settings could be used to obtain finer baseline correction control.
The preferred baseline wander correction performance specifications are further detailed in Table 3, below.







TABLE 3







Baseline Wander Correction Specification








Parameters
Specifications





Output Dynamic
+/−100 uA (diff.), (+/−1 V/R1, R1 = 10 kΩ)


Range


Output impedance
High


Integration Factors
2 mV/T, 4 mV/T


Bandwidth
>100 MHz









A second-order low-pass filter, as shown in FIG. 13, is cascaded after the summer to preferably flatten the frequency response out to about 31.25 MHz (<1 dB). A minimum overall attenuation of 20 dB at 125 MHz is desirable for the low pass filter. In a sampled system, some aliasing beyond Nyquist frequency (or excess bandwidth) is acceptable, but minimum aliasing is allowed at the sampling frequency. The transmitted data is preferably band-limited to the Nyquist rate.
Preferred performance characteristics of the low pass filter 5 are further detailed in Table 4, below.







TABLE 4







LPF Performance Specification










Parameters
Specifications







Input Dynamic
+/−1 V(diff.)



Range



Output Dynamic
+/−1 V(diff.)



Range



Input impedance
High, ~10 k.



Output impedance
Low



Cutoff frequency
50–60 Mhz.



Q (2nd order)
~1



Input impedance
High, ~10 k.



Output impedance
Low, <100



DC gain
1










As an alternative arrangement, a third-order Sallen and Key low pass filter as disclosed in a co-pending application by the same inventor of this application, titled “CALIBRATION CIRCUIT,” filed concurrently herewith, and hereby incorporated by reference, could be used as filter 5. Similarly, the calibration circuit disclosed therein could also be used to calibrate the low pass filter 5.
Analog-to-digital converters are well know in the art. As will be appreciated, the ADC 6 resolution is often determined by system digital processing requirements. In a preferred embodiment, the Viterbi detector 18 requires an effective 7-bit resolution. Residual baseline wander, echoes, and crosstalk increase the dynamic range by about 200–300 mV, which increases the required resolution. The reduction in dynamic range due to insertion loss for a 100 m cable is approximately 40%. Accordingly, an 8-bit resolution is preferred.
The preferred ADC performance specifications are further detailed in Table 5, below.







TABLE 5







ADC Performance Specification










Parameters
Specifications







Resolution
8-bits minimum.



Sampling frequency
125 MS/s



Source Output
Low, ~200–400Ω



Impedance










Thus, a transmit canceller including an active resistive summer has been described. Such an active resistive summer has not heretofore been developed for applications such as canceling signals in gigabit channels. Correcting baseline wander through such an active resistive summer has also been described herein.
While the present invention has been described with respect to what is presently considered to be the preferred embodiments, it will be understood that the invention is not limited to the disclosed embodiments. To the contrary, the invention covers various modifications and equivalent arrangements included within the spirit and scope of the appended claims. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
For example, while preferred circuit configurations and component values have been described, it will be understood that modifications could be made without deviating from the inventive structures. For example, values for the feedback and input resistors Rf and R1 could be changed to obtain higher or lower gains. Also, an active resistive summer could be constructed to sum only the measured signal Vtx and the replica signal Vtxr (or a high-pass version of the replica), for example. Additionally, while the communication channel has been described with respect to a twisted pair of cables, the invention may also be practiced with other communication channels such as optical and wireless channels. Moreover, this invention should not be limited to gigabit transmission rates and can be practiced at any transmission rate requiring the signal processing characteristics of the invention. Of course, these and other such modifications are covered by the present invention.

## Claims

1. A transmit canceller in a communication channel, the channel including a first transceiver for transmitting and receiving signals and a replica transmitter for generating an input replica transmission signal, a composite signal at a near end comprising a transmission signal of the first transceiver and a signal received from a second transceiver, said transmit canceller comprising:
an operational amplifier having a first polarity input terminal, a second polarity input terminal, and an output terminal;
a feedback element in communication with the second polarity input terminal and the output terminal;
a first input resistor in communication with the second polarity input terminal and the measured signal input;
a second input resistor in communication with the second polarity input terminal and the replica signal input; and
a predetermined voltage source in communication with the first polarity input terminal of the operational amplifier,
wherein the received signal is an output at the output terminal of the operational amplifier.

2. The transmit canceller according to claim 1, further comprising a connection between a baseline correction current source and the second polarity input terminal.

3. The transmit canceller according to claim 2, further comprising a charge pump to control the baseline correction current source.

4. The transmit canceller according to claim 3, wherein the charge pump controls the baseline correction current source based on an error between an equalized baseline signal and a sliced baseline signal.

5. The transmit canceller according to claim 2, further comprising a connection between a common-mode shift current source and the second polarity input terminal.

6. The transmit canceller according to claim 1, wherein the replica signal comprises a high pass signal.

7. The transmit canceller according to claim 1, wherein the replica signal comprises a negative signal and the transmit canceller further includes a third resistor in communication with the second polarity input terminal and a low pass positive replica signal input.

8. The transmit canceller according to claim 1, wherein the communication channel comprises a gigabit channel.

9. A transmit canceller in a communication channel, the channel including a first transceiver for transmitting and receiving signals and a replica transmitter for generating an input replica transmission signal, a composite signal at a near end comprising a transmission signal of the first transceiver and a signal received from a second transceiver, said transmit canceller comprising:
means for amplifying including a first polarity input terminal, a second polarity input terminal, and an output terminal;
feedback means for communicating with the second polarity input terminal and the output terminal;
first means for communicating with the second polarity input terminal and the measured signal input;
second means for communicating with the second polarity input terminal and the replica signal input; and
means for supplying a predetermined voltage to the first polarity input terminal of the amplifying means,
wherein the received signal is an output at the output terminal of the amplifying means.

10. The transmit canceller according to claim 9, further comprising means for correcting baseline wander.

11. The transmit canceller according to claim 10, further comprising means for pumping to control the baseline correcting means.

12. The transmit canceller according to claim 11, wherein the means for pumping controls the baseline correction means based on an error between an equalized baseline signal and a sliced baseline signal.

13. The transmit canceller according to claim 10, further comprising means for connecting a common-mode shift current source and the second polarity input terminal.

14. The transmit canceller according to claim 9, wherein the replica signal comprises a high pass signal.

15. The transmit canceller according to claim 9, wherein the replica signal comprises a negative signal and the transmit canceller further includes a third means for communicating with the second polarity input terminal and a low pass positive replica signal input.

16. The transmit canceller according to claim 9, wherein the communication channel comprises a gigabit channel.

17. A method of reducing a transmission signal from a composite signal in a communication channel, the channel including a first transceiver for transmitting and receiving signals and a replica transmitter for generating an input replica transmission signal, the composite signal at a near end comprising a transmission signal of the first transceiver and a signal received from a second transceiver, said method comprising the steps of:
providing an operational amplifier having a first polarity input terminal, a second polarity input terminal, and an output terminal;
arranging a feedback element to be in communication with the second polarity input terminal and the output terminal;
arranging a first resistive element to be in communication with the second polarity input terminal and the measured signal input;
arranging a second resistive element to be in communication with the e second polarity input terminal and the replica signal input;
arranging a predetermined voltage source to be in communication with the first polarity input terminal of the operational amplifier; and
outputting a signal at the output terminal that reduces the transmission signal.

18. The method according to claim 17, further comprising a step of connecting a baseline correction current source to the second polarity input terminal of the operational amplifier.

19. The method according to claim 18, further comprising a step of controlling the baseline correction current source with a charge pump.

20. The method according to claim 19, wherein the charge pump controls the baseline correction current source based on an error between an equalized baseline signal and a sliced baseline signal.

21. The method according to claim 18, further comprising a step of connecting a common-mode shift current source to the second polarity input terminal to control a common-mode voltage of the operational amplifier.

22. The method according to claim 17, wherein the replica signal comprises a high pass signal.

23. The method according to claim 17, wherein the replica signal comprises a negative signal and the transmit canceller further includes a third resistive element in communication with the second polarity input terminal and a low pass positive replica signal input.

24. The method according to claim 17, wherein the communication channel comprises a gigabit channel.

25. An electrical circuit for reducing a transmission signal comprising:
an active resistive summer having an operational amplifier that includes a first polarity input terminal, a second polarity input terminal, and an output terminal, said active resistive summer further comprising:
a feedback element in communication with the output terminal and the second polarity input terminal;
a first resistor in communication with the second polarity input terminal and a composite signal, the composite signal having a transit signal component and a receive signal component; and
a second resistor in communication with the second polarity input terminal and a replica of the transmit signal.