# Patent

## Title
Discharge lamp lighting apparatus

## Abstract

A discharge lamp lighting apparatus for lighting a discharge lamp having two electrodes includes a first drive circuit, a second drive circuit, and a control circuit. The first drive circuit is connectable to one of the two electrodes to supply a first alternating current to the discharge lamp. The first alternating current has a frequency. The second drive circuit is connectable to the other of the two electrodes to supply a second alternating current to the discharge lamp. The second alternating current has the same frequency as the first alternating current. The control circuit generates first and second drive pulses to drive the first and second drive circuits, respectively. The control circuit has a current detecting circuit and a phase difference adjuster. The current detecting circuit detects the first and second alternating currents separately. The phase difference adjuster adjusts a phase difference between the first and second drive pulses so that an amount of the first alternating current is identical to an amount of the second alternating current.

## Background
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a discharge lamp lighting device that controls a discharge lamp having two electrodes. In particular, the present invention relates to a discharge lamp lighting device that controls a discharge lamp used as a backlight for various display panels such as big screen television sets.
2. Related Art
Recently, a cold-cathode fluorescent lamp (designated as “CCFL” hereinafter) used as a backlight for a liquid crystal panel is prone to be long, since the liquid crystal panel is becoming larger in size. When a high voltage is applied across the CCFL through one electrode thereof to light up the CCFL, the CCFL may have non-uniform brightness along the longitudinal direction thereof.
Japanese Patent Application Publication 2004-241136 discloses a discharge lamp lighting device including a pair of inverter circuits, in which one of the inverter circuits as a master inverter circuit is connected to one of two electrodes of the lamp, and the other inverter circuit as a slave inverter circuit is connected to the other electrode of the lamp. The lamp is lighted up by applying a high voltage across the lamp through each of the electrodes. This method of lighting the lamp is designated as “a differential drive method”.
However, characteristics of the master inverter circuit and the slave inverter circuit do not always coincide with each other. Therefore, currents supplied from the inverter circuits may become unbalanced even if the same voltage is applied across the respective inverter circuits to light up the CCFL by the differential drive method.
Accordingly, a method is suggested to adjust duties of output voltages supplied from the two inverter circuits, respectively, to equalize the amounts of currents from the two inverter circuits. However, when this method is employed, the duties of the inverters are generally different from each other. Therefore, the inverter circuit which generates a larger duty pulse is required to have a larger derating, which raises a problem against downsizing of the discharge lamp lighting device.
To overcome the above-mentioned drawbacks, an object of the present invention is to provide a discharge lamp lighting device that can easily equalize amounts of currents flowing into a discharge lamp through each of two inverter circuits.
SUMMARY
The present invention provides a discharge lamp lighting apparatus for lighting a discharge lamp having two electrodes, having a first drive circuit, a second drive circuit, and a control circuit. The first drive circuit is connectable to one of the two electrodes to supply a first alternating current to the discharge lamp. The first alternating current has a frequency. The second drive circuit is connectable to the other of the two electrodes to supply a second alternating current to the discharge lamp. The second alternating current has the same frequency as the first alternating current. The control circuit generates first and second drive pulses to drive the first and second drive circuits, respectively. The control circuit has a current detecting circuit and a phase difference adjuster. The current detecting circuit detects the first and second alternating currents separately. The phase difference adjuster adjusts a phase difference between the first and second drive pulses so that an amount of the first alternating current is identical to an amount of the second alternating current.



BRIEF DESCRIPTION OF THE DRAWINGS
The particular features and advantages of the invention as well as other objects will become apparent from the following description taken in connection with the accompanying drawings, in which:
FIG. 1 shows a block diagram of a discharge lamp lighting device of one embodiment according to the present invention;
FIG. 2 is a circuit diagram showing a controller in detail;
FIGS. 3A-3N show wave forms of each control signal for driving the discharge lamp lighting device, first and second AC current, and an output signal for a phase difference adjuster 250;
FIG. 4 is a circuit diagram showing another structure of the controller;
FIG. 5 is a circuit diagram showing an operational amplifier 220 and a current difference detector 240 in detail; and
FIGS. 6A and 6B are wave charts showing a relationship between an output of an oscillator and detecting periods for each current.



DESCRIPTION OF THE EMBODIMENT
An embodiment according to the present invention will be described below with reference to the accompanying drawings.
FIG. 1 shows a discharge lamp lighting device 10 according to an embodiment of the present invention. The discharge lamp lighting device 10 feeds electric power from a power supply to a discharge lamp L to light the discharge lamp L. The discharge lamp lighting device 10 includes a master circuit 20A, a slave circuit 20B, and a controller 30. The discharge lamp L controlled by the discharge lamp lighting device 10 is a CCFL that has electrodes E1, E2 at both ends thereof, respectively.
The master circuit 20A includes a first inverter circuit 22A, a first transformer 24A, and a first resonant capacitor C1. A direct-current (DC) power supply 26A is connected to input terminals A1, B1 of the first inverter circuit 22A, so that a DC voltage Vin from the DC power supply 26A is applied across the first inverter circuit 22A. The terminal B1 is positioned at a lower potential than the terminal A1.
The first inverter circuit 22A is a full-bridge type of inverter having four switching elements SH1m, SL1m, SH2m, and SL2m. The switching elements SH1m, SL1m are connected in series between input terminals A1, B1. The switching elements SH1m is positioned at a higher potential than the switching elements SL1m. The switching elements SH2m, SL2m are connected in series between the input terminals A1, B1. The switching elements SH2m is positioned at a higher potential than the switching elements SL2m. The connecting point N11 between the switching elements SH1m, SL1m and the connecting point N12 between the switching elements SH2m, SL2m are a pair of output terminals of the first inverter circuit 22A. In this embodiment, the switching elements SH1m, SL1m, SH2m, and SL2m are configured by semiconductor switching elements such as field-effect transistors. The switching operations of the switching elements SH1m, SL1m, SH2m, and SL2m are controlled by control signals H1m, H2m, L1m, and L2m supplied from the controller 30, respectively. When supplied with the control signal having a high level, the switching element turns on. When supplied with the control signal having a low level, the switching element turns off.
The first transformer 24A includes a primary coil L11 and a secondary coil L12 which are wound in the manner that the polarity of the primary coil L11 is oriented in the opposite direction to the polarity of the secondary coil L12. The primary coil L11 has two connecting ends connected to the output terminals N11, N12 of the first inverter circuit 22A, respectively. The secondary coil L12 is connected to a reference potential G through one connecting end thereof, a diode D11, a node N13, and a resistor R. The diode D11 and the resistor R are connected in series. The diode D11 has an anode connected to the one connecting end of the secondary coil L12, and a cathode connected to the node N13. A current passes from the connecting end of the secondary coil L12 to the reference potential G through the diode D11 and the resistor R. The resistor R has a higher potential terminal connected to a current detecting terminal D0 of the controller 30. A diode D12 is connected between the secondary coil L12 and the reference potential G. The diode D12 has an anode connected to the reference potential G and a cathode connected to the one connecting end of the secondary coil L12.
The first resonant capacitor C1 is connected in parallel to the secondary coil L12. One end of the first resonant capacitor C1 is connected to the reference potential G. The first resonant capacitor C1 has another end connected to another connecting end of the secondary coil L12. A node between the first resonant capacitor C1 and the secondary coil L12 is an output terminal F1 of the master circuit 20A. The output terminal F1 is electrically connected to the discharge lamp L through a ballast capacitor C1B and the electrode E1. The master circuit 20A supplies a first alternating current IM through the output terminal F1 to the discharge lamp L.
The slave circuit 20B includes a second inverter circuit 22B, a second transformer 24B, and a second resonant capacitor C2. A DC power supply 26B is connected to input terminals A2, B2 of the second inverter circuit 22B, so that a DC voltage Vin from the DC power supply 26B is applied across the second inverter circuit 22B. The terminal B2 is positioned at a lower potential than the terminal A2.
The second inverter circuit 22B is a full-bridge type of inverter having four switching elements SH1s, SL1s, SH2s, and SL2s. The switching elements SH1s, SL1s are connected in series between input terminals A2, B2. The switching elements SH1s is positioned at a higher potential than the switching elements SL1s. The switching elements SH2s, SL2s are connected in series between the input terminals A2, B2. The switching elements SH2s is positioned at a higher potential than the switching elements SL2s. The connecting point N21 between the switching elements SH1s, SL1s and the connecting point N22 between the switching elements SH2s, SL2s are a pair of output terminals of the second inverter circuit 22B. In this embodiment, the switching elements SH1s, SL1s, SH2s, and SL2s are configured by semiconductor switching elements such as field-effect transistors. The switching operations of the switching elements SH1s, SL1s, SH2s, and SL2s are controlled by control signals H1s, H2s, L1s, and L2s supplied from the controller 30, respectively. When supplied with the control signal having a high level, the switching element turns on. When supplied with the control signal having a low level, the switching element turns off.
The second transformer 24B includes a primary coil L21 and a secondary coil L22 which are wound in the manner that the polarity of the primary coil L21 is oriented in the same direction to the polarity of the secondary coil L22. The primary coil L21 has two connecting ends which are connected to the output terminals N21, N22 of the second inverter circuit 22B, respectively. The secondary coil L22 is connected to the reference potential G through one connecting end thereof, a diode D21, a node N23, and a resistor R. The diode D21 and the resistor R are connected in series. The diode D21 has an anode connected to the one connecting end of the secondary coil L22, and a cathode connected to the node N23. A current passes from the connecting end of the secondary coil L22 to the reference potential G through the diode D21 and the resistor R. The resistor R has a higher potential end connected to the current detecting terminal D0 of the controller 30. A diode D22 is connected between the secondary coil L22 and the reference potential G. The diode D22 has an anode connected to the reference potential G and a cathode connected to the one connecting end of the secondary coil L22. In this embodiment, the resistor R of the master circuit 20A has the same resistance value as that of the slave circuit 20B.
The second resonant capacitor C2 is connected in parallel to the secondary coil L22. One end of the second resonant capacitor C2 is connected to the reference potential. The second resonant capacitor C2 has another end connected to another connecting end of the secondary coil L22. A node between the second resonant capacitor C2 and the secondary coil L22 is an output terminal F2 of the slave circuit 20B. The output terminal F2 is electrically connected to the discharge lamp L through a ballast capacitor C2B and the electrode E2. The slave circuit 20B supplies a second alternating current IS through the output terminal F2 to the discharge lamp L.
The controller 30 is configured with a digital circuit. The controller 30 detects the first and second currents IM, IS through the current detecting terminal D0, and controls an amount of the current supplied from each of the master circuit 20A and the slave circuit 20B.
FIG. 2 shows a circuit diagram of the controller 30. Referring to FIG. 2, the controller 30 includes an oscillator 100, a subtractor 110, a digital filter 120, a comparator 130, a current difference detector 140, a phase difference adjuster 150, and an analog-digital (A/D) converter 160.
The oscillator 100 generates a chopping wave having a period T0 to supply the chopping wave to the comparator 130 and the current difference detector 140.
The A/D converter 160 is connected to the detecting terminal D0. The A/D converter 160 converts a detected level of each of the first and second currents IM, IS to a digital signal having the corresponding level. The A/D converter 160 then supplies the digital signal to the subtractor 110.
The subtractor 110 is connected to the A/D converter 160 to subtract an output of the A/D converter 160 from a reference value REF. In this embodiment, the reference value REF corresponds to a target AC current value to be flowed into the discharge lamp L.
The digital filter 120 is connected to the output side of the subtractor 110 to perform digital processing on the output of the subtractor 110. The digital filter 120 then supplies the output to a non-inverted terminal 130a of the comparator 130.
The comparator 130 receives the output of digital filter 120 through the non-inverted terminal 130a. The comparator 130 also receives the chopping wave generated by the subtractor 110 through an inverted terminal 130b thereof. The comparator 130 has an output terminal connected to the phase difference adjuster 150.
The current difference detector 140 detects a signal having the corresponding level to the amount of each of the first and second currents IM, IS. The current difference detector 140 then calculates a difference between the first and second currents IM, IS to generate an output signal VD having a level corresponding to the difference to the phase difference adjuster 150.
The phase difference adjuster 150 receives outputs of the comparator 130 and the current difference detector 140. based on these received outputs, the phase difference adjuster 150 sets a duration and time-intervals for the switching operation for the switching elements in the master and slave circuits 22A, 22B to generates the control signals H1m, H2m, L1m, L2m, H1s, H2s, L1s, and L2s based on the above set duration and time-intervals. Accordingly, the phase difference adjuster 150 causes the switching elements in the master and slave circuits 22A, 22B to perform the switching operation.
The next description will be made for explaining an operation of the discharge lamp lighting device 10, referring to FIGS. 1-3. The operation of the discharge lamp lighting device 10 is based on reference clocks having a high frequency of a cycle T generated in the controller 30 (See FIG. 3A). In the controller 30, the oscillator 100 generates chopping waves having a longer cycle of T0 than the cycle T to supply the chopping waves to the inverted-terminal 130b of the comparator 130 (See FIG. 3B). The current passing through the discharge lamp lighting device 10 is converted to a current signal having a corresponding level by the resistor R, thereby entering into the controller 30 through the current detecting terminal D0. The current signal is processed by the subtractor 110 and the digital filter 120 (See FIG. 3C) to be supplied to the comparator 130 through the non-inverted terminal 130a. The comparator 130 generates a LOW signal if the instantaneous level of the chopping wave is more than the output of the digital filter 120. The comparator 130 generates a HIGH signal when the instantaneous level of the chopping wave is less than the output of the digital filter 120 (See FIG. 3D). The phase difference adjuster 150 generates the control signals H1m, H2m, L1m, and L2m for the master circuit 20A, and the control signals H1s, H2s, L1s, and L2s for the slave circuit 20B in accordance with the output level of the comparator 130 (See FIGS. 3E-3L).
When the master circuit 20A receives the control signals H1m, H2m, L1m, and L2m for the switching elements SH1m, SL1m, SH2m, and SL2m from the controller 30, the first inverter circuit 22A converts the input DC voltage Vin to a higher-frequency AC voltage to supply the converted AC voltage to the first transformer 24A. The first transformer 24A converts a voltage level of the input to generate the first AC current IM through the terminal F1. The first AC current IM passes into the discharge lamp L through the electrode E1. The first AC current IM is converted to a current signal having a corresponding level of the first AC current IM by the resistor R of the slave circuit 20B.
Similarly, when the slave circuit 20B receives the control signals H1s, H2S, L1S, and L2S for the switching elements SH1s, SL1S, SH2S, and SL2S from the controller 30, the second inverter circuit 22B converts the input DC voltage Vin to a higher-frequency AC voltage to supply the AC voltage to the second transformer 24B. The second transformer 24B converts a voltage level of the input to generate the second AC current IS through the terminal F2. The second AC current IS passes into the discharge lamp L through the electrode E2. The second AC current IS is converted to a current signal having a corresponding level of the second AC current IS by the resistor R of the master circuit 20A.
In the first transformer 24A, the primary coil and the secondary coil are wound so that the polarity of the primary coil is opposite to that of the secondary coil. In the second transformer 24B, the primary coil and the secondary coil are wound so that the polarities of the primary and secondary coils are oriented in the same direction. Accordingly, when the switching operation of the master circuit 20A is substantially synchronized with the switching operation of the slave circuit 20B, the first and second AC currents IM, IS alternately flows in the discharge lamp lighting device 10 to light the discharge lamp L (See FIG. 3M).
The next description will be made for explaining a method to detect the first and second AC currents IM, IS. During a period K1 from a time t10 to a time t20 having a duration corresponding to one cycle T0 of the chopping wave, when the switching elements SH1m, SL2m turn on, and at least one of the switching elements SL1m, SH2m turns off in response to the control signals H1m, H2m, L1m, and L2m, the current flows to the discharge lamp L through the output terminal F1. In the same period, when the switching elements SH1S, SL2S turn on, and at least one of the switching elements SL1S, SH2S turns off in response to the control signals H1S, H2S, L1S, and L2S in the slave circuit 20B, the current flows in the slave circuit 20B from the discharge lamp L through the output terminal F2. Accordingly, during the period K1, the current flows from the master circuit 20A to the slave circuit 20B through the discharge lamp L, so that the controller 30 determines the current entering the current detecting terminal D0 as the first AC current IM.
During the period K1, the current difference detector 140 compares the first AC current IM entering the current detecting terminal D0 with the threshold Vth having a predetermined level at every reference clock. Then, the period in which IM is more than Vth, i.e., the time period from the time TD1 to the time TD2 is referred as the first period. During the first period, the current difference detector 140 calculates a difference between the instantaneous level of the first AC current IM and the threshold Vth; (IM−Vth) and sums the difference at every reference clock, thereby sending the sum of the differences as an output signal VD of the current difference detector 140 to the phase difference adjuster 150 (See FIG. 3N).
During the period K2 following the period K1 from a time t20 to a time t30 and having a duration corresponding to one cycle T0 of the chopping wave, when the switching elements SL1m, SH2m turn on, and at least one of the switching elements SH1m, SL2m turns off in response to the control signals H1m, H2m, L1m, and L2m in the master circuit 20A, the current flows in the master circuit 20A from the discharge lamp L through the output terminal F1. In the same period, when the switching elements SH2S, SL1S turn on, and at least one of the switching elements SL2S, SH1S turns off in response to the control signals H1S, H2S, L1S, and L2S in the slave circuit 20B, the current flows out to the discharge lamp L through the output terminal F2. Accordingly, during the period K2, the current flows from the slave circuit 20B to the master circuit 20A through the discharge lamp L, so that the controller 30 determines the current entering the current detecting terminal D0 as the second AC current IS.
During the period K2, the current difference detector 140 compares the second AC current IS entering the current detecting terminal D0 with the threshold Vth having the predetermined level at every reference clock. Then, the period in which IS is more than Vth, i.e., the time period from the time TD3 to the time TD4 is referred as the second period. During the second period, the current difference detector 140 calculates a difference between the instantaneous level of the second AC current IS and the threshold Vth; (IS−Vth), and subtracts the corresponding level to the difference from the output signal VD at every reference clock, thereby sending the resultant output signal VD to the phase difference adjuster 150 (See FIG. 3N).
When the discharge lamp lighting device 10 lights the discharge lamp L in the above described manner, the period K1 in which the first AC current IM flows in the discharge lamp L from master circuit 20A, and the period K2 in which the second AC current IS flows in the discharge lamp L from the slave circuit 20B alternatively appears periodically, as time passes. The controller 30 determines based on the control signals to each inverter circuits 22A, 22B which the master circuit 20A or the slave circuit 20B supplies the current passing through the discharge lamp L.
The output signal VD of the current difference detector 140 has a level which is substantially identical to the actual accumulated difference between the first AC current IM and the second AC current IS during the period from the starting time of the differential drive method for the discharge lamp L by the discharge lamp lighting device 10 to any given time tx.
Accordingly, at the time tx, if the output signal VD has a positive level, the phase difference adjuster 150 determines that the amount of the first AC current IM is more than the amount of the second AC current IS. Then, The phase difference adjuster 150 adjusts a phase difference θ between the control signals H1m, H2m, L1m, and L2m and the control signals H1s, H2S, L1S, and L2S to a value proportional to the level of the output signal VD in order to decrease the level of the output signal VD to zero. Therefore, a leading edge and a trailing edge of each of the control signals H1S, H2S, L1S, and L2S for the slave circuit 20B are delayed by the time corresponding to the phase difference θ (See FIGS. 3I-3L). When the phase difference θ is adjusted in the above manner, the amount of the first AC current IM is decreasing, while the amount of the second AC current IS is increasing. Accordingly, the amount of the first AC current IM becomes equal to the amount of the second AC current IS.
On the other hand, if the output signal VD has a negative level, the phase difference adjuster 150 determines that the amount of the first AC current IM is less than the amount of the second AC current IS. Then, The phase difference adjuster 150 adjusts a phase difference θ between the control signals H1m, H2m, L1m, and L2m and the control signals H1S, H2S, L1S, and L2S to a value proportional to the level of the output signal VD in order to increase the level of the output signal VD to zero. Therefore, a leading edge and a trailing edge of each of the control signals H1m, H2m, L1m, and L2m for the master circuit 20A are advanced by the time corresponding to the phase difference θ. When the phase difference θ is adjusted in the above manner, the amount of the first AC current IM is increasing, while the amount of the second AC current IS is decreasing. Accordingly, the amount of the first AC current IM becomes equal to the amount of the second AC current IS.
The output signal VD increases when the amount of the first AC current IM is more than the amount of the second AC current IS. The output signal VD decreases when the amount of the second AC current IS is more than the amount of the first AC current IM. Based on the current level of the output signal VD, the level of the output signal VD is converged to a constant value, for example zero, by adjusting the phase differences between the control signals H1m, H2m, L1m, and L2m and the control signals H1s, H2s, L1s, and L2s. In other words, the root-mean-square (rms) value of the first AC current IM can be adjusted to become equal to the rms of the second AC current IS.
As described above, the controller 30 detects the first AC current IM and the second AC current IS separately to perform the phase control for the master circuit 20A and the slave circuit 20B, thereby eliminating the difference between the first AC current IM and the second AC current Is Therefore, the first AC current IM can become identical to the second AC current IS.
In this embodiment, in the period K1, the first AC current IM has accumulated from the time tD1 at which the first AC current IM exceeds the threshold Vth to the time tD2 at which the first AC current IM drops down from the threshold Vth to obtain the accumulated amount of the current as the first accumulated amount of current (see FIG. 3M, region M1). In the next period K2, the second AC current IS has accumulated from the time tD3 at which the second AC current IS exceeds the threshold Vth to the time tD4 at which the second AC current IS drops down from the threshold Vth to obtain the accumulated amount of the current as the second accumulated amount of current (see FIG. 3M, region U1). The difference between the first accumulated amount of current and the second accumulated amount of current is generated as the output signal VD. Based on the level of the output signal VD, the controller 30 performs the phase control for the master circuit 20A and the slave circuit 20B.
As described above, the current supplied from the master circuit 20A to the discharge lamp L can be balanced with the current supplied from the slave circuit 20B to the discharge lamp L.
The discharge lamp lighting device 10 of FIG. 1 includes four diodes D11, D12, D21, and D22 so that the controller 30 can distinguish the first AC current IM from the second AC current IS at the current detecting terminal D0 by using the control signals for inverter circuits and the chopping waves for generating the control signals. Therefore, there is no need to provide two separate current detecting terminals for the first and second AC currents, respectively. Accordingly, the discharge lamp lighting device 10 can be made compact. The discharge lamp lighting device 10 can accomplish a downsize of the internal circuits when the controller 30 is configured by ICs, power-saving effect, and cost-down for the manufacturing.
In this embodiment, the first AC current IM and the second AC current IS may overlap at a given time because the controller 30 performs a phase-control for the master circuit 20A and the slave circuit 20B. If the threshold is set to zero, the controller 30 cannot sometimes distinguish the first AC current IM and the second AC current IS. Therefore, it is preferable that the threshold Vth has any level other than zero to ensure the distinction between the first AC current IM and the second AC current IS.
The amount of first current is compared with the amount of second currents when the instantaneous value of the current exceeds the threshold. This comparison is equal to another case in which the first AC current IM is compared with the second AC current IS without the threshold assuming that the first AC current IM can be completely distinguishable with the second AC current IS. However, the first AC current IM and the second AC current IS may overlap depending on the phase difference θ. Accordingly, the usage of the threshold contributes to more precise distinction between the first AC current IM and the second AC current IS.
As described above, when the AC currents entering into the discharge lamp L through two electrodes respectively become substantially equal, the AC electric power supplied into the discharge lamp L from two electrodes become substantially equal. Accordingly, the discharge lamp L can emit light uniformly along the longitudinal direction thereof.
FIG. 4 shows anther structure of the controller 30 constituted by an analog circuit. The controller 30A of FIG. 4 includes an oscillator 210, an operational amplifier 220, a comparator 230, a current difference detector 240, and a phase difference adjuster 250.
The oscillator 210 generates chopping waves RAMP having a predetermined period T0 to supply the chopping waves RAMP to the comparator 230. The oscillator 210 generates a rectangular wave signal T synchronized with the chopping waves RAMP to the current difference detector 240.
The operational amplifier 220 has an inverted input terminal connected to the current detecting terminal D0 through a resistor R0 and a non-inverted input terminal connected to the reference potential REF. The operational amplifier 220 has an output terminal EAOUT connected to one of the input terminals of the comparator 230 and an NGATE terminal connected to the current difference detector 240. A capacitor C1 is connected between the inverted input terminal and the output terminal of the operational amplifier 220. Series-connected resistor R1 and capacitor C2 are connected in parallel to the capacitor C1. Accordingly, the operational amplifier 220 amplifies the difference between the input voltage supplied from the current detecting terminal D0 and the reference voltage REF to generate the amplified signal to the comparator 230.
The comparator 230 has one input terminal connected to the operational amplifier 220, the other input terminal connected to the oscillator 210, and an output terminal connected to the phase difference adjuster 250.
The current difference detector 240 has an input terminal connected to the operational amplifier 220 to receive the proportional voltage to a sink current of the output voltage of the operational amplifier 220 through the NGATE terminal. The current difference detector 240 processes the input voltage with the rectangular wave signal T supplied from the oscillator to generate a phase difference setting signal PHASE which is proportional to the difference between the first AC current IM and the second AC current IS to the phase difference adjuster 250.
The phase difference adjuster 250 receives the output from the comparator 230 and the current difference detector 240. Based on these input signals, the phase difference adjuster 250 adjusts the durations and timings of the switching operation for the switching elements in each inverter circuits 22A, 22B to transfer these adjusted matters to the respective switching element as the corresponding control signals H1m, H2m, L1m, L2m, H1s, H2s, L1s, and L2s. Accordingly, the phase difference adjuster 250 causes each inverter circuit 22A, 22B to perform a desired switching operation.
Referring to FIG. 5, the operational amplifier 220 and the current difference detector 240 will described in detail. In the operational amplifier 220, the inverted and non-inverted terminals of are connected to gates of transistors 303, 302, respectively. At the output terminal EAOUT, a current is sourced from a power supply 306, and the current is sank by a transistor 308. A gate of the transistor 308 is connected to the output terminal NGATE.
In the current difference detector 240, the NGATE terminal is connected to gates of transistors 310, 314. Referring to FIG. 6, when the rectangular wave signal T has a low level, the detecting period is for detecting the first AC current IM, and referred as a period K1. When the rectangular wave signal T has a high level, the detecting period is for detecting the second AC current IS, and referred as a period K2. In the period in which T shows a low level and the transistor 308 is sinking, the capacitor 315 is charged with a current which is proportional to the sink current of the transistor 308 and passes through a transistor 312.
While the transistor 308 is sinking at the high level of T, the capacitor 315 is discharged through a transistor 313 by the amount of current which is proportional to the sink current of the transistor 308. In a period in which the transistor 308 does not sink, the voltage level at the current detecting terminal D0 is lower than the reference voltage REF. Accordingly, the capacitor 315 is neither charged nor discharged. The voltage across the capacitor 315 is equal to the voltage appearing at the PHASE terminal. When IM>IS, the voltage across the capacitor 315 increases. When IM<IS, the voltage across the capacitor 315 decreases. Accordingly, when the phase difference adjuster 250 adjusts the phase difference θ, the current difference between the first AC current IM and the second AC current IS is adjusted to obtain that IM=IS.
Instead of the AC power supply described above, the discharge lamp lighting device 10 may include an AC power supply. In this case, an AC voltage supplied from the AC power supply can be applied to each inverter circuits 20A, 20B through rectifier circuit. The ballast capacitors may eliminated depending on the application of the discharge lamp lighting device 10.
In the above described embodiments, it is preferable that the difference between the first AC current and the second AC current is within 2% of each of the first and second currents.
Further, in the above embodiments, the first AC current becomes substantially the same as the second AC current. Accordingly, the discharge lamp L can emit light uniformly along the longitudinal direction thereof. In addition, derating of each of the master and slave circuits can be identical to each other.
Further, power control for lighting the discharge lamp by the differential drive method can be performed more precisely, because the first AC current is compared with the second AC current by using the integral amount of each current during a predetermined period.
It is understood that the foregoing description and accompanying drawings set forth the preferred embodiments of the invention at the present time. Various modifications, additions and alternative designs will, of course, become apparent to those skilled in the art in light of the foregoing teachings without departing from the spirit and scope of the disclosed invention. Thus, it should be appreciated that the invention is not limited to the disclosed embodiments but may be practiced within the full scope of the appended claims.

## Claims

1. A discharge lamp lighting apparatus for lighting a discharge lamp having two electrodes, comprising:
a first drive circuit connectable to one of the two electrodes to supply a first alternating current to the discharge lamp, the first alternating current having a frequency;
a second drive circuit connectable to the other of the two electrodes to supply a second alternating current to the discharge lamp, the second alternating current having the same frequency as the first alternating current; and
a control circuit for generating first and second drive pulses to drive the first and second drive circuits, respectively, wherein the control circuit comprises:
a current detecting circuit that detects the first and second alternating currents separately; and
a phase difference adjuster that adjusts a phase difference between the first and second drive pulses so that an amount of the first alternating current is identical to an amount of the second alternating current.

2. The discharge lamp lighting apparatus according to claim 1, wherein
the current detecting circuit calculates a first integral of current exceeding a threshold during a first period and a second integral of current exceeding the threshold during a second period, the first period being defined as a period from a first moment at which the first alternating current exceeds the threshold to a next second moment at which the first alternating current falls down from the threshold, the second period being defined as another period from a third moment at which the second alternating current exceeds the threshold to a next fourth moment at which the second alternating current falls down from the threshold,
the phase difference adjuster adjusts the phase difference so that the first integral of current becomes identical to the second integral of current.