# Patent

## Title
Spinel boules, wafers, and methods for fabricating same

## Abstract

A single crystal spinel wafer is disclosed, including a front face and a back face; and an outer periphery having first and second flats. In certain embodiments, the single crystal wafer has a specific crystallographic orientation, and the flats are provided to extend along desired plane sets. The flats may advantageously identify orientation of cleavage planes, and direction of cleavage of cleavage planes.

## Background
CROSS-REFERENCE TO RELATED APPLICATION(S)
BACKGROUND
1. Field of the Invention
The present invention is generally directed to articles having a spinet crystal structure, and includes articles such as boules, wafers, substrates, and active devices incorporating same. In addition, the present invention relates generally to methods for forming such articles.
2. Description of the Related Art
Active optoelectronic devices, such as light-emitting diodes (LEDs) and lasers, oftentimes will utilize nitride-based semiconductor layers for the active layer of the device. In this regard, the family of gallium nitride (GaN) materials, which broadly includes Ga(Al, In)N materials, have been utilized as a direct transition-type semiconductor material having a band gap that may be manipulated over a fairly wide range, on the order of about 2 to 6 eV.
In order to take advantage of the optoelectronic characteristics of such nitride-based semiconductor materials, they generally are formed as a single crystal. In this regard, it is generally not pragmatic to form bulk monocrystalline boules of nitride-based semiconductor material. Accordingly, the industry typically has sought to deposit such materials as a monocrystalline layer, such as by epitaxial growth, on an appropriate substrate. It is desired that the substrate on which the nitride-based semiconductor layer is deposited has a compatible crystal structure, to manifest the desired crystal structure in the as-deposited active layer. While such nitride-based materials, such as GaN and AlN can exist in several different crystal states, typically the desired crystal structure is wurtzite rather than zinc blende. In an effort to closely match the desired wurtzite crystal structure, the art has utilized monocrystalline alumina in the form of sapphire (corundum), and specifically oriented the sapphire substrate so as to provide an appropriate crystallographic surface on which the active layer is deposited. However, sapphire suffers from numerous drawbacks. For example, sapphire does not exhibit a cleavage plane that can be used to fabricate active devices. In this regard, it is generally desirable to dice the wafer into individual die (forming active devices, each having a device substrate) by cleavage rather than by slicing or sawing, as cleavage may reduce manufacturing costs and may simplify the manufacturing process.
In contrast, spinel materials, if oriented properly, demonstrate a cleavage plane, the projection of which in the surface of the wafer is generally parallel to a cleavage plane of the nitride active layer, which permits predictable and reliable device fabrication. Proper crystallographic orientation of boules and wafers, as well as physical orientation of wafers during wafer processing (to form active devices), have been a challenge in the art. Imprecise orientation generally leads to decreased throughput and low yields.
In view of the foregoing, it is generally desirable to provide improved spinel boules, wafers, substrates, and optoelectronic devices incorporating same, as well as improved methods for forming same.
SUMMARY
According to one embodiment, single crystal spinel wafer is provided, including a front face and a back face, and an outer periphery having first and second flats. In certain embodiments, the single crystal wafer has a specific crystallographic orientation, and the flats are provided to extend along specific plane sets.
According to another embodiment, a method of forming active devices includes providing a single crystal spinel wafer having a front face, a back face, and an outer periphery having first and second flats, orienting the wafer based on the orientation of the first and second flats, forming at least one active layer to overlie the wafer, and cleaving the wafer to form active devices.
According to another embodiment, a method of forming wafers includes forming a single crystal boule having a <111> orientation, forming first and second flats in the boule, and slicing the boule into wafers, wherein the first and second flats indicate an orientation of a cleavage plane of the wafers, and identify the front and back faces of the wafers



BRIEF DESCRIPTION OF THE DRAWINGS
Features, aspects and advantages of embodiments of the present invention will become apparent from the following description, appended claims and the drawings, which are briefly described below. It should be noted that unless otherwise specified like elements have the same reference numbers.
FIG. 1a illustrates an as-grown spinel <111> boule, FIG. 1b a boule with the neck and tail removed, and a wafer sliced therefrom, and FIG. 1c a schematic cross-section of the wafer.
FIG. 2 is a perspective view of a wafer according to an embodiment of the invention.
FIG. 3 is a top view of a wafer according to an embodiment of the invention.
FIGS. 4a and 4b are backscattered images of a spinet <111> in opposite orientations, FIG. 4c a <011> oriented boule, and FIG. 4d a <100> orientated boule.
FIGS. 5a-5c illustrate orientation of a spinet boule according to an embodiment of the invention, FIG. 5a illustrating a cross-section of a <111> spinet boule showing the major and minor flat, FIG. 5b a backscattered image of a <111> orientation, and FIG. 5c a boule with the front side identified.



DESCRIPTION OF THE PREFERRED EMBODIMENT(S)
According to one aspect of the present invention, a single crystal spinel boule and single crystal spinet wafers formed therefrom are provided. Typically, processing of a single crystal spinel boule begins with the formation of a batch melt in a crucible, generally illustrated as step 210 in FIG. 11. The batch melt is generally provided to manifest a non-stoichiometric composition in the as-formed boule. According to one embodiment, the boule has a general formula of aAD.bE2D3, wherein A is selected from the group consisting of Mg, Ca, Zn, Mn, Ba, Sr, Cd, Fe, and combinations thereof, E is selected from the group consisting Al, In, Cr, Sc, Lu, Fe, and combinations thereof, and D is selected from the group consisting O, S, Se, and combinations thereof, wherein a ratio b:a>1:1 such that the spinet is rich in E2D3. For clarification, a stoichiometric composition is one in which the ratio of b:a=1:1, while non-stoichiometric compositions have a b:a ratio≠1:1.
As used herein, the term ‘boule’ refers to a single crystal mass formed by melt processing, and includes ingots, cylinders, or the like structures.
According to certain embodiments, A is Mg, D is O and E is Al, such that the single crystal spinet has the formula aMgO.bAl2O3. While some of the disclosure contained herein makes reference to the MgO—Al2O3 spinet based-compositions, it is understood that the present disclosure more generally relates to a broader group of spinel compositions, having the generalized formula aAD.bE2D3, as described above.
While E2D3-rich spinels are generally represented by a ratio b:a greater than 1:1, certain embodiments have a b:a ratio not less than about 1.2:1, such as not less than about 1.5:1. Other embodiments have even higher proportions of E2D3 relative to AD, such as not less than about 2.0:1, or even not less than about 2.5:1. According to certain embodiments, the relative content of E2D3 is limited, so as to have a b:a ratio not greater than about 4:1. Specific embodiments may have a b:a ratio of about 3:1 (e.g., 2.9:1).
Following formation of a batch melt in a crucible, typically, the spinel single crystal boule is formed by one of various techniques such as the Czochralski pulling technique. While the Czochralski pulling technique has been utilized for formation of certain embodiments herein, it is understood that any one of a number of melt-based techniques, as distinct from flame-fusion techniques, may be utilized. Such melt-based techniques also include the Bridgman method, the liquefied encapsulated Bridgman method, the horizontal gradient freeze method, an edge-defined growth method, the Stockberger method, or the Kryopolus method. These melt-based techniques fundamentally differ from flame fusion techniques in that melt-based techniques grow a boule from a melt. In contrast, flame fusion does not create a batch melt from which a boule is grown, but rather, provides a constant flow of solid raw material (such as in powder form) in a fluid, to a hot flame, and the molten product is then projected against a receiving surface on which the molten product solidifies.
Generally, the single seed crystal is contacted with the melt, while rotating the batch melt and the seed crystal relative to each other. Typically, the seed crystal is formed of stoichiometric spinel and has sufficiently high purity and crystallographic homogeneity to provide a suitable template for boule growth. The seed crystal may be rotated relative to a fixed crucible, the crucible may be rotated relative to a fixed seed crystal, or both the crucible and the seed crystal may be rotated. During rotation, the seed crystal and the actively forming boule are drawn out of the melt.
According to one embodiment of a present invention, average boule diameter and interior crucible diameter of the crucible containing the batch melt are controlled to be within certain parameters. Most typically, the single crystal boule is grown at a process aspect ratio of not less than about 0.39. Here, process aspect ratio is defined as a ratio of average boule diameter to crucible diameter. Average boule diameter is the average diameter of the boule along its nominal length, nominal length representing that portion of the boule that is utilized for formation of wafers according to downstream processing steps, generally not including the neck and tail (conical-shaped end caps at opposite ends of the boule). Typically, boule diameter is relatively constant along the nominal length of the boule. Formation at the minimum process aspect ratio helps ensure against unwanted or undesirable crystallographic orientation or re-orientation of the boule, also known as ‘flipping’. More specifically, it is desired that the boule have the <111> orientation (triangular morphology), rather than the <110> orientation (square or hexagonal morphology), and sufficiently high aspect ratios may ensure against flipping from the <111> crystallographic orientation to the <110> crystallographic orientation.
With respect to the MgO—Al2O3 system, multiple samples were created based upon a 3:1 (2.9:1) b:a ratio, and a summary of the relevant process conditions is provided below in the table. Certain embodiments of the present invention have somewhat higher minimum process aspect ratios, such as not less than about 0.40, not less than about 0.42, or even not less than about 0.43. Other embodiments have even higher process aspect ratios such as not less than about 0.44, or even greater.












TABLE





Pull rate
Crucible ID
Crucible lid ID
Crystal dia.
Result,
Aspect


(mm/hr)
(inches)
(inches)
(inches)
<111>
Ratio




















1
4
2.5
2.2
yes
0.55


1
5
3.5
2.2
no
0.44


1
6
4.5
2.2
no
0.37


1
7
5.25
2.2
no
0.31


1
7
5.25
4.1
yes
0.59


1
6
4.5
3.1
yes
0.52


2.5
5
3.5
2.2
yes
0.44


2.5
6
4.5
2.2
no
0.37


2.5
7
4
3.1
yes
0.44


2.5
6
2.75
2.2
partly
0.37









Typically, the boule and wafers therefrom consist essentially of a single spinel phase, with no secondary phases. According to another feature, the boule and the wafers processed therefrom are free of impurities and dopants. According to one embodiment, the wafers processed into device substrates for optoelectronic applications, the wafer and device substrates having a composition consisting essentially of aMgO.bAl2O3, wherein a ratio of b:a is greater than 1:1. In this regard, impurities and dopants are generally precluded. For example, Co is restricted from inclusion in the foregoing embodiment, which otherwise is a dopant for Q-switch applications. In contrast to Q-switch applications, it is generally desired that a relatively pure spinet is utilized substantially free of dopants that affect the basic and novel properties of the device substrate.
According to embodiments of the present invention, a single crystal spinet boule is formed having desirable properties. In addition to the desired <111> orientation described above, the boules, wafers, and device substrates formed therefrom also generally have reduced mechanical stress and/or strain, as compared to a stoichiometric articles having a b:a ratio of 1:1. In this regard, embodiments of the present invention provide desirably high yield rates in connection with formation of single crystal wafers that form substrates of active devices, and also provide improved processing features, discussed in more detail hereinbelow.
With respect to improved processing features, the boule may be cooled at relatively high cooling rates such as not less than about 50° C./hour. Even higher cooling rates may be utilized according to embodiments of the present invention, such as not less than about 100° C./hour, 200° C./hour and even at a rate of greater than about 300° C./hour. The increased cooling rates desirably improve throughput of the fabrication process for forming single crystal boules and further reduce the thermal budget of the entire fabrication, and accordingly reduce costs. Boules formed according to conventional processing generally are cooled at relatively low cooling rates, in an attempt to prevent fracture during the cooling process. However, according to embodiments of the present invention, the cooling rates may be substantially higher yet still provide intact boules in the as-cooled form. Generally, conventional cooling rates are on the order of 40° C./hour or less, requiring cooling periods on the order of days.
Still further, according to another embodiment of the present invention, annealing of the boule, conventionally carried out subsequent to cooling, is restricted to a relatively short time period. Typically, the time period is not greater than about 50 hours, such as not greater than about 30 hours, or even 20 hours. According to certain embodiments, the annealing is restricted to a time period not greater than about 10 hours. Indeed, annealing may be substantially completely eliminated, thereby obviating post-forming heat treatment. In contrast, conventional boule forming technology generally requires use of substantial anneal periods in an attempt to mitigate residual internal stress and strain, responsible for low wafer yield rates as well as boule fracture. Without wishing to be tied to any particular theory, it is believed that the reduction and internal stress and strain in the boule according to embodiments herein permits such flexible processing conditions, including decreased or complete elimination of annealing periods, as well as increased cooling rates as noted above.
According to another feature, the reduction in internal mechanical stress and strain are quantified by yield rate, the number of intact wafers formed by slicing the boule. Typically, slicing is carried out by any one of several slicing techniques, most notably wire sawing. As used herein, yield rate may be quantified by the formula wi/(wi+wf)×100%, wherein wi=the number of intact wafers processed from the boule, and wf=the number of fractured wafers from the boule due to internal mechanical stress or strain in the boule. Conventionally, this yield rate is very low, such as on the order 10%. The unacceptably low yield rate is a manifestation of excessive internal stresses and strain in the boule. In contrast, yield rates according to embodiments of the present invention are typically not less than about 25%, 30% or even 40%. Other embodiments show increasingly high yield rates, such as not less than about 50, 60 or even 70%. Indeed, certain embodiments have demonstrated near 100% yield. This reduce internal mechanical stress and/or strain as quantified above is not only present within the as-formed (raw) boules, but also the processed boules, the wafers sliced from boules, and the device substrates cleaved from the wafers. In this regard, the foregoing description of processed boules generally denotes boules that have been subjected to post-cooling machining steps, such as grinding, lapping, polishing and cleaning.
The wafers sliced from the boule have a generally sufficient diameter and associated surface area to provide reduced processing costs for the active device manufacturer, in a manner similar that increased wafer size reduces semiconductor die cost in the semiconductor fabrication field. Accordingly, it is generally desired that the wafers have a nominal diameter of not less than about 1.75 inches, generally not less than about 2.0 inches and in certain embodiments, 2.5 inches or greater. Current state-of-the art processing tools for handling wafers in active device fabrication are geared to handle two inch wafers, and processing equipment for handling three inch wafers are presently coming on-line. In this regard, due to processing features and wafer features described herein, next-generation wafers may be supported according to embodiments of the present invention.
An as-grown <111> single crystal spinel boule and its facet structure is illustrated in FIG. 1. Specifically, FIG. 1(a) is a photograph of a Czochralski grown boule 100, while FIG. 1(b) is a photograph of a Czochralski grown boule with the neck and tail removed 110. FIG. 1(b) also includes a wafer 120 that has been sliced from the boule, clearly showing facets on the outer surface. FIG. 1(c) is a schematic cross-section 130 of the <111> grown boule illustrating the facets 133, 136, 139.
As shown in FIG. 1(c), a <111> single crystal spinet boule is generally triangular shaped with twelve facets 133, 136, 139. The boule includes three large facets 133 which are {22-4} plane family. The six intermediate size facets 136 extend along the {02-2} plane family while the three small facets 139 extend along {-2-24} plane family.
In one embodiment, a flat (generally planar surface) is formed, typically by a machining operation) along one of the {22-4} facets 133. In the spinel structure of the boule, a plane of the {22-4} plane family is parallel to the locus of points (forming a line) that a plane of the {001} cleavage plane family makes with the front face or surface of the wafer. Thus, the flat is substantially (within approximately 5 degrees) parallel to the lines that the {001} cleavage plane family makes with the surface of the wafer. Therefore, a flat in a plane of the {22-4} plane family identifies an orientation of a cleavage plane of the wafer.
A relationship between the {22-4} plane family and the {001} cleavage plane family in single crystal spinel wafer is illustrated in FIG. 2. A<111> oriented substrate wafer 200 has a front face 210, a back face 220 and an outer peripheral edge 230 between the faces 210, 220. In one embodiment, a major flat 240 is ground into the edge 230 along a plane of the {22-4} plane family. The major flat 240 is generally ground into the boule before the wafer 200 is sliced from the boule, but may be done after slicing if desired.
As shown in FIG. 2, the locus of points formed by the intersection of the cleavage plane 260 and the front face 210 forms a line that is parallel to the flat 240. While in the embodiment shown, the projected lines along the front face and the major flat are parallel to each other, a different orientation may be used, such as a predetermined non-zero angle between the major flat and the projected lines. Cleavage initiated in the wafer 200 along a {001} cleavage plane 260 will intersect the front face 210 of the wafer 200 parallel to the major flat 240. This is particularly advantageous because the (10-10) cleavage plane of an epitaxial layer of (0001) AlxGA1-x-yInyN grown on a <111> spinel wafer 200 is aligned with a {001} cleavage plane 260 in the wafer 200. That is, an edge of the (10-10) cleavage plane in the AlxGa1-x-yInyN epitaxial layer is substantially parallel to locus of points formed at the wafer cleavage plane-front face intersection.
As shown in FIGS. 2 and 3, a second, minor flat 250 is ground into the outer peripheral edge 230, generally extending along a plane non-parallel to the plane of the first flat, such as along a plane in the {02-2} and {01-1} plane families, and also including a plane of the {22-4} and {11-2}families that is non parallel to the plane of the major flat. Preferably the minor flat 250 is ground into the boule before the wafer 200 is sliced from the boule. However, the minor flat 250 may be ground into the wafer 200 after being sliced, if desired.
As also shown in FIG. 2, the wafer is oriented such that the cleavage planes slope away from the major flat. Stated more precisely, each cleavage plane intersects the back face along a locus of points forming a line, the line along the back face being spaced from the major flat a greater distance than the spacing between the line along the front face and the major flat. This orientation, the downward slope relative to the major flat from the front face, is considered herein a ‘negative’ slope. Each plane makes an angle with the front face within a range of about 40 to 60 degrees, typically about 55 degrees as measured, as shown in FIG. 2.
In the spinel structure, a normal (perpendicular line) to the major flat and a normal to the second flat lie in the same plane such that the normals intersect each other, and the normals make an angle of, for example, 60, 90, 120, or 150 degrees with each other. For example normal to the minor flat extending along a (02-2)/(01-1) plane makes a 30, 90 and 150 degree angle to a normal of the major flat extending along a plane of the {22-4}/{1′-2} plane families. A normal to the minor flat extending along a (22-4)/(11-2) plane may make a 60 degree angle, for example, to a normal of the major flat extending along a plane of the {11-2}/{22-4} plane families. By use of the major and minor flats oriented as described herein, the wafer 200, the wafer 200 may be oriented precisely.
Orientation of the boule 110 is accomplished with the aid of electron imaging, such as through backscattered electron imaging with Laue camera. This method can be explained with the assistance of FIGS. 4(a)-4(d) and 5(a)-5(c). FIGS. 4(a) to 4(d) are back-scattered photos of various orientations of single crystal spinel. FIGS. 4(a) and 5(b) illustrate the pattern of a <111> oriented spinel single crystal formed when the triangular cross-section 130 has an apex is pointing up, the major flat 240 is the base of the triangle opposite the apex, and the face opposite the camera is the front face 210.
In carrying out imaging, first the neck and the tail are removed from the as-grown boule 100, leaving behind first and second flat surfaces at opposite ends of the cylindrical boule oriented such that the central axis of the boule is perpendicular to the flat end surfaces, and the central axis is generally parallel to a <111> direction. By generally parallel, typically the axis is within 5 degrees, generally within 3 degrees, and desirably within 2 degrees of a <111> direction. Certain embodiments are within 1 degree (zero representing strictly parallel). Then the boule 110 is imaged in back-scattered mode. FIG. 4(b) represents the back face as the face opposite the camera. Once the front face 210 and the back face 220 are identified, the major flat 240 and the minor flat 250 are ground into the boule 110. According to one embodiment, the wafers 200 cut from the boule 110 and oriented with the front face facing up, have the minor flat 250 being spaced from the major flat 240 such that the normals make and angle less than approximately 180 degrees counter clockwise. According to this configuration, the wafer may be properly oriented during manufacture for processing operations, such as proper orientation for finishing operations that typically are carried out on the substrate surface intended for epilayer deposition. In addition, the manufacturer of electronic or optoelectronic devices may properly identify the surface for epilayer grown, and orient the wafer for epitaxial growth.
According to an embodiment, optoelectronic devices are formed utilizing wafers in accordance with the teachings herein. According to the process, AlxGa1-x-yInyN epilayer is generally grown on the wafer. The values of x and y can both vary from 0 to 1. Preferably, 0≦x≦0.25 and 0≦y≦0.5. An edge of a cleavage plane of the AlxGa1-x-yInyN epilayer is generally parallel to the projection of a (001) cleavage plane in the front face of the wafer. Additional layers of varying concentration may then be grown as necessary, depending on the particular device to be fabricated. Further, several additional steps such as patterning and contact forming may also be conducted in order to fabricate LEDs and lasers. The details of actual device fabrication are known to one of ordinary skill in the fabrication art and are beyond the scope of this disclosure.
EXAMPLE
A boule (ingot) grown by the Czochralski technique had the top and tail removed to produce two flat surfaces. The boule ends (the two flat surfaces) were x-rayed using a Laue backscattered technique to verify orientation and to identify 1) the front-side for future wafers to ensure the (100) cleavage plane will cleave from the bottom face of the future wafers to the top face with the intersection line on the bottom being further from the to-be formed major flat than the intersection line on the top and 2) the approximate position of the major (1-1-2) (or (2-2-4)) and minor (01-1) (or (02-2)) flats. The boule ends were then x-rayed to measure the orientation and to align the axis of the boule to the <111> direction.
The boule was then turned to a diameter of approximately 2′′ to form a cylinder exactly parallel to the 111 direction (that is, the central axis was parallel to the <111> orientation). At this point the major and minor flat directions were marked on the top face by scribing. The major and minor flats were then added to the cylinder by grinding into the outer periphery of the boule to remove material along a direction that is perpendicular to the <111> direction, the flats formed thereby extending parallel to a <111> direction. The turned boule was then sliced into individual wafer blanks. The individual blanks were then lapped, given a bevel with grinding, had serial numbers written into them using a laser, and finally were polished along the front face, to provide a suitable surface for epitaxial layer growth.
The foregoing description has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the scope to the precise form or embodiments disclosed, and modifications and variations are possible in light of the above teachings, or may be acquired from practice of embodiments of the invention.

## Claims

1. A single crystal spinal wafer, comprising:
a front face and a back face; and
an outer periphery having first and second flats, wherein the first flat indicates an orientation of the cleavage plane of the wafer, a cleavage plane of the wafer intersects the front face at a locus of points extending along a line, the line being parallel to the first flat, and the second flat indicates a direction of cleavage propagation of the cleavage plane.

2. The single crystal spinel wafer of claim 1, wherein the wafer has a <111> crystallographic orientation.

3. The single crystal spinel wafer of claim 1, wherein the front and back faces of the wafer extend along a {111} crystal plane.

4. The single crystal spinel wafer of claim 1, wherein the first flat extends along a plane in the {22-4} and {11-2} plane families.

5. The single crystal spinel wafer of claim 1, wherein the second flat identifies the front and back surfaces of the wafer.

6. The single crystal spinel wafer of claim 1, wherein the cleavage plane makes an angle of about 55 degrees with respect to the front face.

7. The single crystal spinel wafer of claim 1,
wherein the second flat extends along a plane in the {02-2}, {01-1}, {22-4} and {11-2} plane families, which is non-parallel to the plane of the first flat.

8. The single crystal spinel wafer of claim 1, wherein a normal to the first flat and a normal to the second flat lie in the same plane such that the normals intersect each other, and the normals make an angle of 60, 90, 120, or 150 degrees.

9. The single crystal spinel wafer of claim 1, wherein the wafer comprises non-stoichiometric spinel.

10. The single crystal spinel wafer of claim 9, wherein the wafer has a composition is represented by the general formula aAD.bE2D3, wherein A is selected from the group consisting of Mg, Ca, Zn, Mn, Ba, Sr, Cd, Fe, and combinations thereof, E is selected from the group consisting Al, In, Cr, Sc, Lu, Fe, and combinations thereof, and D is selected from the group consisting O, S, Se, and combinations thereof, wherein a ratio b:a>1:1 such that the spinel is rich in E2D3.

11. The single crystal spinel wafer of claim 10, wherein A is Mg, D is O, and E is Al, such tat the single crystal spinel has the formula aMgO.bAl2O3.

12. The single crystal spinel wafer of claim 10, wherein the ratio b:a is not less than about 1.2:1.

13. The single crystal spinel wafer of claim 10, wherein the ratio b:a is not less than about 1.5:1.

14. The single crystal spinel wafer of claim 10, wherein the ratio b:a is not less than about 2.0:1.

15. The single crystal spinel wafer of claim 10, wherein the ratio b:a is not less than about 2.5:1.

16. The single crystal spinel wafer of claim 10, wherein the ratio b:a is not greater than about 4:1.

17. The single crystal spinel wafer of claim 10, wherein the wafer has a lower mechanical stress and strain compared to stoichiometrie spinel.

18. The single crystal spinel wafer of claim 1, further comprising an active layer, the active layer comprising a nitride semiconductor layer.

19. The singe crystal spinel wafer of claim 18, wherein the nitride semiconductor layer comprises AlxGa1-x-yInyN, where 0≦x≦0.25 and 0≦y≦0.5.

20. The single crystal spinel wafer of claim 1, wherein first flat is a major flat, and the second flat is a minor flat.

21. An active device provided on the wafer of claim 1.

22. The device of claim 21, wherein the device is an optoelectronic device selected from the group consisting of a laser and LED.

23. The wafer of claim 1, wherein the cleavage plane intersects the bottom face along a locus of points forming a second line, wherein the cleavage plane is oriented such that the cleavage plane slopes away from the first flat and that the second line is located a distance from the first flat that is greater than a distance between the first line and the first flat.

24. The wafer of claim 23, wherein the first flat is a major flat, the second flat is a minor flat.

25. The wafer of claim 23, wherein the second flat is positioned to indicate the direction of a slope of the cleavage plane.

26. A single crystal spinel wafer, comprising:
a front face and a back face; and
an outer periphery having first and second flats, wherein the first flat indicates an orientation of a cleavage plane of the wafer and extends along a plane in the {22-4} and {11-2} plane families, the cleavage plane of the wafer intersects the front face at a locus of points extending along a line, the line being parallel to the first flat, and the second flat indicates a direction of cleavage propagation of the cleavage plane and extends along a plane in the {02-2}, {01-1}, {22-4} and {11-2} plane families.