# Patent

## Title
Bi-directional MOS current sense circuit

## Abstract

A current sensing circuit comprises a power device adapted to conduct a bidirectional current between first and second terminals thereof, first and second sensing devices operatively coupled to the power device, a sense amplifier providing first and second voltages to the first and second sensing devices, and a gate drive device providing activating signals to the power switching device and the first and second sensing devices. The first and second sensing devices each has an active area that is substantially identical and significantly smaller than a corresponding active area of the power switching device. The sense amplifier measures the voltage of the first sensing device and maintains the voltage on the second sensing device at the same level as the first sensing device by injecting an additional current into the second sensing device. The sense amplifier further provides an output signal proportional to the bidirectional current. The first and second sensing devices have k times higher resistance than a corresponding resistance of the power device when in an active state.

## Background
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to voltage regulator circuits, and more particularly to circuits for measuring the bidirectional current through a switching device of a switched mode voltage regulator circuit.
2. Description of Related Art
Switched mode voltage regulators (also known as switched mode power converters) are known in the art to convert an available direct current (DC) level voltage to another DC level voltage. A switched mode voltage regulator provides a regulated DC output voltage to a load by selectively storing energy in an output inductor coupled to the load by switching the flow of current into the output inductor. A buck converter is one particular type of switched mode voltage regulator that includes two power switches that are typically provided by MOSFET transistors. The power switches are referred to individually as the high side switch and the low side switch, corresponding to their placement within the buck converter as referenced to the voltage source and ground, respectively. A filter capacitor coupled in parallel with the load reduces ripple of the output current. A pulse width modulation (PWM) control circuit is used to control the gating of the power switches in an alternating manner to control the flow of current in the output inductor. The PWM control circuit uses feedback signals reflecting the output voltage and/or current level to adjust the duty cycle applied to the power switches in response to changing load conditions.
It is known to measure the output current level by sensing the current passing through a resistor coupled to the load. The voltage across the sense resistor is detected using a sense amplifier to produce a signal corresponding to the output current. This type of current sense circuit has the drawback of reducing the efficiency of the voltage regulator by the voltage drop across the sense resistor. Alternatively, it is known to use one of the power switches as a sense resistor and detect the voltage drop across the internal resistance between drain and source of the MOS device (RDSON). This alternative approach overcomes the efficiency reduction caused by a sense resistor. Nevertheless, since the current through the power device is bidirectional, it is often difficult or impractical to measure the bi-directional current.
FIG. 1 shows an exemplary circuit 10 to measure the current IP through an MOS power device 12 having an active area A. A second MOS device 14 having an active area A/k is used to split the load current. Gate driver 16 provides the pulse modulated signal to activate the power device 12 and the second device 14. An operational amplifier 20 has a non-inverting terminal coupled to the source of the power device 12 and an inverting terminal coupled to the source of the second device 14. The operational amplifier 20 includes a feedback resistor 18 coupled between the inverting terminal and output terminal. The operational amplifier 20 maintains the source voltage of the second device 14 at the same level as the power device 12, such that the current through the second device 14 is IP/k. The output terminal of the operational amplifier 20 provides sense voltage Vsense that is proportional to the load current IP. Both directions of current IP can be measured with the circuit, but it should be appreciated that the sense voltage VSense will be negative with respect to the source terminal of the power device 12 for positive load currents IP. This requires an auxiliary negative power supply for the operational amplifier 20, which is in many cases unavailable or costly.
Other known current sense circuits are capable of measuring a bi-directional current through a high side shunt resistor without the need for auxiliary power supplies. But, these known circuits are not suited to measure the current of a MOS power device that is continuously turned on and off. Still other known current sense circuits can measure the current through a power switch, while also suffering from limited linear operating range. These circuits are also undesirable because they require sensing devices that are scaled much larger than necessary to avoid measuring errors.
Thus, it would be advantageous to provide a bidirectional current sensing circuit for a power device that has wide linear operating range, minimal matching requirements, and fast response.
SUMMARY OF THE INVENTION
The present invention overcomes the deficiencies of the prior art by providing a current sensing circuit that measures bidirectional current through a power switching device without the need for an auxiliary negative power source.
More particularly, the current sensing circuit comprises a power device adapted to conduct a bidirectional current between first and second terminals thereof, first and second sensing devices operatively coupled to the power device, a sense amplifier providing first and second voltages to the first and second sensing devices, and a gate drive device providing activating signals to the power switching device and the first and second sensing devices. The first and second sensing devices each has an active area that is substantially identical and significantly smaller than a corresponding active area of the power switching device. The sense amplifier measures the voltage of the first sensing device and maintains the voltage on the second sensing device at the same level as the first sensing device by injecting an additional current into the second sensing device. The sense amplifier further provides an output signal proportional to the bidirectional current. The first and second sensing devices have k times higher resistance than a corresponding resistance of the power device when in an active state.
In an embodiment of the invention, the sense amplifier comprises an operational amplifier having a first input terminal coupled to the first sensing device and a second input terminal coupled to the second sensing device, a feedback transistor coupled between the first input terminal and an output of the operational amplifier, and first and second resistors coupled to the first and second input terminals, respectively. The first and second resistors may be provided by first and second matched CMOS transistors. In another embodiment of the invention, the sense amplifier comprises plural CMOS transistors.
A more complete understanding of the bidirectional current sensing circuit for a power device will be afforded to those skilled in the art, as well as a realization of additional advantages and objects thereof, by a consideration of the following detailed description of the preferred embodiment. Reference will be made to the appended sheets of drawings, which will first be described briefly.



BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 depicts a prior are current sensing circuit;
FIG. 2 depicts an exemplary bidirectional current sensing circuit in accordance with an embodiment of the invention;
FIG. 3 depicts an exemplary bidirectional current sensing circuit for a low side power device of a switched mode voltage regulator; and
FIG. 4 depicts an exemplary bidirectional current sensing circuit for a high side power device of a switched mode voltage regulator.



DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
The present invention provides a bidirectional current sensing circuit for a power device that has wide linear operating range, minimal matching requirements, and fast response. In the detailed description that follows, like element numerals are used to describe like elements illustrated in one or more figures.
FIG. 2 depicts a current sensing circuit 40 in accordance with an embodiment of the invention. The current sensing circuit 40 is divided into four parts, including: (1) the power device 42 having an active area A through which current is to be measured; (2) a pair of MOS sensing devices 44, 46 of the same type as the power device 42, but with each having a much smaller active area A/k; (3) a sense amplifier including operational amplifier 48, MOS device 52, and loading resistors 54, 56; and (4) a gate drive device 58. The gate drive device 58 applies a gate voltage to the gate terminals of power device 42 and sensing devices 44, 46 in accordance with a determined duty cycle to control their on/off states. The sensing devices 44, 46 have their drain terminals coupled respectively to the drain and source of the power device 42. The power device 42 is assumed to operate in the triode region, i.e., the device characteristic can be approximated by a low resistor with value RQP when in the on state. The sensing devices 44, 46 are also operated in the triode region and therefore can be assumed to have k times higher resistance (RQ1, RQ2) than power device 42 when turned on. In the embodiment of FIG. 2, the power device 42 corresponds to the low side switch of a switched mode power converter.
The operational amplifier 48 has a non-inverting terminal coupled to a first voltage node (Vp) and an inverting terminal coupled to a second voltage node (Vn). The first voltage node Vp is coupled to the source terminal of sensing device 44 and to the drain terminal of power device 42 through resistor 56. The second voltage node Vn is coupled to the source terminal of sensing device 46 and to the drain terminal of power device 42 through resistor 54. MOS device 52 provides a feedback path for operational amplifier 48, with the operational amplifier output driving the gate terminal of the MOS device 52 and the drain terminal of MOS device 52 coupled to the second voltage node Vn. A first current source I1 is defined between supply voltage VDD and first voltage node Vp, and a second current source I2 is defined between supply voltage VDD and source terminal of MOS device 52.
In operation, the operational amplifier 48 maintains the first voltage node Vp at the same level as the second voltage node Vn by injecting current In into the node Vn. The second node voltage is determined as follows:




  
    V
    n
  
  =
  
    
      
        
          R
          2
        
        ·
        
          R
          
            Q
            ⁢
            
              
            
            ⁢
            2
          
        
      
      
        
          R
          2
        
        +
        
          R
          
            Q
            ⁢
            
              
            
            ⁢
            2
          
        
      
    
    ·
    
      (
      
        
          I
          offset
        
        +
        
          I
          out
        
      
      )
    
  




in which R2 is the resistance of resistor 54 and RQ2 is the drain-source resistance of sensing device 46. If the drain-source resistance of the power device 42 (RQP) is much less than the drain-source resistance of sensing device 44 (RQ1), then the positive node voltage is determined as follows:





  
    V
    p
  
  ≈
  
    
      
        
          
            R
            QP
          
          ·
          
            R
            1
          
        
        
          
            R
            1
          
          +
          
            R
            
              Q
              ⁢
              
                
              
              ⁢
              1
            
          
        
      
      ·
      
        I
        P
      
    
    +
    
      
        
          
            R
            1
          
          ·
          
            R
            
              Q
              ⁢
              
                
              
              ⁢
              1
            
          
        
        
          
            R
            1
          
          +
          
            R
            
              Q
              ⁢
              
                
              
              ⁢
              1
            
          
        
      
      ·
      
        I
        offset
      
    
  




Accordingly, the feedback loop of operational amplifier 48 through MOS device 52 maintains Vn equal to Vp, and with resistors 54, 56 equal and the drain-source resistances of sensing devices 44, 46 equal, the foregoing two equations will be equal and can be simplified to:

Iout·RQ2≈IP·RQP

and with

RQ2=k·RQP

the equation further simplifies to:





  
    I
    out
  
  ≈
  
    
      I
      p
    
    k
  




In other words, the current Iout is proportional to the current IP through the power device 42. This equation is valid for positive and negative currents of Ip as long as the current In remains positive. In the case in which Ioffset is chosen to be larger than the maximum absolute value of Ip/k, the voltages Vp and Vn will also remain positive. It should be appreciated that this simplifies the design of the operational amplifier 48 and eliminates the need for a negative auxiliary supply for the operational amplifier. When the power device 42 is off, Iout will be equal to zero since R1 equals R2 and the feedback loop maintains Vp equal to Vn.

In an embodiment of the invention, the gate drive device 58 applies a gate voltage simultaneously to the gate terminals of power device 42 and sensing devices 44, 46. Alternatively, the gate drive device 58 may apply the gate voltage to the sensing devices 44, 46 after a certain amount of delay following application of the gate voltage to the power device 42. This delay period would ensure that the power device 42 is on before activating the sensing devices 44, 46, and thereby serve to avoid any initial voltage spikes in the measuring current.
FIG. 3 depicts an alternative current sensing circuit 60 that provides bi-directional current sensing within a CMOS process. As in the preceding embodiment, the circuit includes power device 62 having an active area A through which current is to be measured, and a pair of MOS sensing devices 64, 66 of the same type as the power device 62, but with each having a much smaller active area A/k. The resistors 54 (R2), 56 (R1) are replaced by CMOS transistors 70, 68 operated in the triode region. The operational amplifier 48 is replaced by CMOS transistors 74, 72 forming a simple amplifier circuit, with transistor 78 providing a feedback loop. Gate drive device 76 applies a gate voltage to the gate terminals of power device 62 and sensing devices 64, 66 in the same manner as described above. In the embodiment of FIG. 3, the power device 62 corresponds to the low side switch of a switched mode power converter.
As in the preceding embodiment, a first voltage node (Vp) is coupled to the source terminal of sensing device 64 and to the drain terminal of power device 42 through the drain-source resistance of transistor 68. A second voltage node Vn is coupled to the source terminal of sensing device 66 and to the drain terminal of power device 62 through the drain-source resistance of transistor 70. CMOS transistors 74, 72 have respective current sources providing a bias current to source terminals thereof and to the gate of feedback transistor 78. Current source I1 provides offset current to the first voltage node Vp, and current source I2 provides offset current to the drain terminal of MOS device 78, which is in turn connected to the second voltage node Vn. The operation of the current sensing circuit 60 is generally the same as the embodiment of the FIG. 2.
From the equations derived above, it should be appreciated that R1 needs to only match R2, and that RQ1 needs to match RQ2 and RQP. Therefore, transistors 68, 70 do not have to be the same type of devices MOS as sensing devices 64, 66 or power device 62. For example, transistors 68, 70 may be low voltage devices (e.g., sustaining only 5 volts), and MOS sensing devices 64, 66 and power device 62 may be devices that sustain higher voltage (e.g., 20 volts). Since power device 62 may in some applications be formed of an array of transistors connected in parallel, it would be advantageous to use two of the transistors of the array to form MOS sensing devices 64, 66 in order to achieve optimal matching. Since the active area of the MOS sensing devices 64, 66 is k times smaller (e.g., k equal to 100,000), the impact on the resistivity of the power device 62 would be minimal. It may also be advantageous to replace CMOS transistors 72, 74 with bipolar devices to minimize the offset voltage of the amplifier. This would further improve the measuring accuracy of the overall circuit.
FIG. 4 depicts an alternative current sensing circuit 80 that provides bi-directional current sensing within a CMOS process. In the embodiment of FIG. 4, the power device 82 corresponds to the high side switch of a switched mode power converter, with the current sensing circuit 80 providing a floating ground. As in the preceding embodiment, power device 82 has an active area A and MOS sensing devices 84, 86 each have a much smaller active area A/k. CMOS transistors 90, 88 operate in the triode region to provide the resistors R1, R2. CMOS transistors 94, 92 provide the amplifier circuit, with transistor 96 providing a feedback loop. Gate drive device 98 applies a gate voltage to the gate terminals of power device 92 and sensing devices 94, 96 in the same manner as described above.
Unlike the preceding embodiments, the orientation of the MOS sensing devices 84, 86 is reversed such that their source terminals are coupled to the drain and source of power device 82, respectively. Likewise, the orientations of CMOS transistors 90, 88, and 94, 92 are reversed in contrast to the preceding embodiment. Accordingly, a first voltage node (Vp) is coupled to the drain terminal of sensing device 86 and to the source terminal of power device 82 through the drain-source resistance of transistor 88, and a second voltage node (V,nis coupled to the drain terminal of sensing device 84 and to the drain terminal of power device 82 through the drain-source resistance of transistor 90. The current sources I1, I2, IB1, IB2 are each referenced to ground. Otherwise, the circuit operates substantially as in the preceding embodiments. It should be appreciated that exemplary power device 82 is illustrated in this and the preceding embodiments as being an NMOS power device, although it should be appreciated that the circuit could be readily adapted by persons having ordinary skill in the art for use with a PMOS power device.
Having thus described a preferred embodiment of a circuit for measuring the bi-directional current through a switching device of a switched mode voltage regulator circuit, it should be apparent to those skilled in the art that certain advantages of the system have been achieved. It should also be appreciated that various modifications, adaptations, and alternative embodiments thereof may be made within the scope and spirit of the present invention. The invention is solely defined by the following claims.

## Claims

1. A current sensing circuit comprising:
a power device adapted to conduct a bidirectional current between first and second terminals thereof;
a first sensing device operatively coupled to the first terminal of the power device and a second sensing device operatively coupled to the second terminal of the power device, the first and second sensing devices each having an active area that is substantially identical and significantly smaller than a corresponding active area of the power device, the first and second sensing devices providing respective first and second voltages;
a sense amplifier operatively coupled to the first and second sensing devices, the sense amplifier measuring the first and second voltages and injecting current to the second sensing device in order to maintain the first and second voltages equal to each other, the sense amplifier further providing an output current proportional to the bidirectional current; and
a gate drive device operatively coupled to activation terminals of the power device and the first and second sensing devices, the gate drive device providing activation signals to the power device and the first and second sensing devices.

2. The current sensing circuit of claim 1, wherein the sense amplifier comprises an operational amplifier having a first input terminal coupled to the first sensing device and a second input terminal coupled to the second sensing device, a feedback transistor coupled between the first input terminal and an output of the operational amplifier, and first and second resistors coupled to the first and second input terminals, respectively.

3. The current sensing circuit of claim 2, further comprising an offset current source adapted to inject offset current into at least one of the first and second input terminals.

4. The current sensing circuit of claim 2, wherein the first and second resistors comprise first and second matched CMOS transistors.

5. The current sensing circuit of claim 1, wherein the first and second sensing devices have k times higher resistance than a corresponding resistance of the power device when in an active state.

6. The current sensing circuit of claim 2, wherein the sense amplifier comprises plural CMOS transistors.

7. The current sensing circuit of claim 1, wherein the power device further comprises a low side switch of a switched mode voltage converter.

8. The current sensing circuit of claim 1, wherein the power device further comprises a high side switch of a switched mode voltage converter.

9. The current sensing circuit of claim 1, wherein the gate drive device provides the activation signals to the power device and the first and second sensing devices simultaneously.

10. The current sensing circuit of claim 1, wherein the gate drive device provides the activation signals to the first and second sensing devices a delay period after providing the activation signal to the power device.

11. A switched mode power converter having a power switching device and a current sensing circuit adapted to sense bidirectional current through the power switching device, the current sensing circuit further comprising:
a first sensing device operatively coupled to the first terminal of the power device and a second sensing device operatively coupled to the second terminal of the power device, the first and second sensing devices each having an active area that is substantially identical and significantly smaller than a corresponding active area of the power switching device, the first and second sensing devices providing respective first and second voltages; and
a sense amplifier operatively coupled to the first and second sensing devices, the sense amplifier measuring the first and second voltages and injecting current to the second sensing device in order to maintain the first and second voltages equal to each other, the sense amplifier further providing an output current proportional to the bidirectional current.

12. The switched mode power converter of claim 11, wherein the sense amplifier comprises an operational amplifier having a first input terminal coupled to the first sensing device and a second input terminal coupled to the second sensing device, a feed back transistor coupled between the first input terminal and an output of the operational amplifier, and first and second resistors coupled to the first and second input terminals, respectively.

13. The switched mode power converter of claim 12, wherein the first and second resistors comprise first and second matched CMOS transistors.

14. The switched mode power converter of claim 11, wherein the first and second sensing devices have k times higher resistance than a corresponding resistance of the power switching device when in an active state.

15. The switched mode power converter of claim 11, wherein the sense amplifier injects current into one of the first and second sensing devices.

16. The switched mode power converter of claim 11, wherein the sense amplifier comprises plural CMOS transistors.

17. The switched mode power converter of claim 11, wherein the power switching device further comprises a low side switch of the switched mode power converter.

18. The switched mode power converter of claim 11, wherein the power switching device further comprises a high side switch of the switched mode power converter.