# Patent

## Title
Buck converter with multiple outputs and method of operation thereof

## Abstract

A multiple output converter, and related method of operation thereof, that includes a primary output and at least one auxiliary output. In one embodiment, the multiple output converter includes a transformer having a primary winding and at least one secondary winding. The multiple output converter also includes a switch, coupled to the primary winding, that impresses an input voltage across the transformer. A first output voltage of the multiple output converter is produced at the primary output via a magnetizing inductance associated with the transformer. The multiple output converter still further includes an output inductor coupled to the at least one secondary winding. A second output voltage of the multiple output converter is produced at the auxiliary output via the output inductor.

## Background
TECHNICAL FIELD OF THE INVENTION
This invention relates to the field of power electronics and, more particularly, to a multiple output converter and method of operation thereof.
BACKGROUND OF THE INVENTION
A converter is a processing circuit that converts an input voltage or current source waveform into a specified output voltage or current waveform. A buck-derived switching converter (also referred to as a “buck converter”) is a frequently employed converter that converts a direct current (DC) input waveform to a specified DC output waveform. A characteristic of buck converters, in general, is that the DC output waveform is less than the DC input waveform. A buck converter that does not employ a transformer as an isolation stage is referred to as a non-isolated buck converter. The non-isolated buck converter typically includes switching circuitry coupled to an input source of electrical power. The switching circuitry includes at least one active switch. The switching circuitry is coupled to an output inductor and output capacitor which provides the DC output waveform (i.e., an output voltage) at an output of the non-isolated buck converter.
Multiple output switching converters are often employed to provide multiple output voltage levels driving independent loads at varying current levels. In some cases, the output voltage levels may be reversed in polarity (e.g., +12 volts and −12 volts) and referenced to a common return. With regard to switching converters that include an isolation stage, the multiple output voltages may be provided via multiple windings on the secondary side of a transformer. In non-isolated switching converters (e.g., non-isolated buck converters), however, deriving multiple output voltages, irrespective of the level and polarity of the voltages, is more complex to implement and may impact the overall efficiency of the switching converters.
Presently, a second output voltage may be derived from a multiple output non-isolated buck converter via an inductor. Under such circumstances, the second output voltage is rectified through a rectifier (e.g., a diode rectifier or synchronous rectifier) and post regulated to deliver the second output voltage at an auxiliary output of the multiple output non-isolated buck converter. While employing yet another technique, a second output voltage may be derived from a multiple output non-isolated buck converter by employing a charge pump therein.
While the aforementioned techniques have proven beneficial, the approaches suffer from the foregoing limitations. The technique of using the inductor for the purpose of providing multiple output voltages in the multiple output non-isolated buck converter typically employs either a peak charge rectified or forward rectified outputs that may suffer from significant ripple currents associated with the primary and auxiliary outputs of the converter. Even for smaller currents, series damping is generally a prerequisite, along with a large inductor to account for the peak currents and ripple condition associated with the primary and auxiliary outputs of the converter. Thus, the design generally calls for larger magnetic components within the multiple output non-isolated buck converter. Charge pumps, on the other hand, have restrictions on current outputs relative to the respective footprints. Therefore, the present techniques and methods of generating the second output voltage still call for larger surface area magnetic devices.
Accordingly, what is needed in the art is a circuit and method that maintains regulation of the output voltages for a multiple output converter such as a multiple output non-isolated buck converter, while preserving the overall efficiency of the converter.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a multiple output converter that includes a primary output and at least one auxiliary output. In one embodiment, the multiple output converter includes a transformer having a primary winding and at least one secondary winding. The multiple output converter also includes a switch, coupled to the primary winding, that impresses an input voltage across the transformer. A first output voltage of the multiple output converter is produced at the primary output via a magnetizing inductance associated with the transformer. The multiple output converter still further includes an output inductor coupled to the at least one secondary winding. A second output voltage of the multiple output converter is produced at the auxiliary output coupled via the output inductor.
In another aspect, the present invention provides a method of operating a multiple output converter including a primary output and at least one auxiliary output. In one embodiment, the method includes providing a transformer having a primary winding and at least one secondary winding. The method also includes impressing an input voltage across the transformer with a switch coupled to the primary winding. The method further includes producing a first output voltage at the primary output via a magnetizing inductance associated with the transformer. The method still further includes producing a second output voltage at the auxiliary output via an output inductor coupled to the at least one secondary winding.
The foregoing has outlined, rather broadly, preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.



BRIEF DESCRIPTION OF THE DRAWINGS
For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
FIG. 1 illustrates a schematic diagram of an embodiment of a multiple output converter constructed according to the principles of the present invention;
FIGS. 2A–2F illustrate waveform diagrams of an exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIGS. 3A–3F illustrate waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIGS. 4A–4F illustrate waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIGS. 5A–5F illustrate waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIGS. 6A–6F illustrate waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIGS. 7A–7F illustrate waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIG. 8 illustrates a diagram demonstrating a series of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIG. 9 illustrates a diagram demonstrating a series of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention;
FIG. 10 illustrates a diagram demonstrating a relationship between a primary duty cycle and output voltages of the multiple output converter according to the principles of the present invention;
FIG. 11 illustrates a waveform diagram of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention; and
FIG. 12 illustrates a waveform diagram of another series of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention.



DETAILED DESCRIPTION
Referring initially to FIG. 1, illustrated is a schematic diagram of an embodiment of a multiple output converter (e.g., multiple output buck converter) constructed according to the principles of the invention. The multiple output converter is coupled to a source of electrical power that provides an input voltage Vin and includes first and second switches Q1, Q2 coupled to a primary winding PR of a transformer T1. The transformer T1 has a magnetizing inductance Lmag and serves as an inductor associated with a primary output of the multiple output converter. The primary winding PR preferably has a gapped core to generate a requisite inductance value and a number of turns represented by NP.
The transformer T1 also includes first and second secondary windings SEC1, SEC2 coupled to a rectifier (e.g., a synchronous rectifier formed by first and second synchronous rectifier switches SR1, SR2) and having a number of turns represented by NS1, NS2, respectively. The primary winding PR is coupled, via the magnetizing inductance Lmag to a first output capacitor Cout1, that provides a first output current Iout1, at a first output voltage Vout, at the primary output of the multiple output converter. The first and second synchronous rectifier switches SR1, SR2 are coupled to an output inductor Lout and a second output capacitor Cout2 that provides a second output current Iout2 at a second output voltage Vout2 at an auxiliary output of the multiple output converter.
The multiple output converter generally operates as set forth below. During a primary interval, a controller (e.g., a pulse width modulation controller) CLPWM monitors the first output voltage Vout1 and causes the first switch Q1 to conduct for a primary duty cycle (D) to apply a voltage equal to a difference between the input voltage Vin of the first output voltage Vout1 across the primary winding PR. The controller CLPWM, then, transitions the first switch Q1 to a non-conducting state and, during a complementary interval, causes the second switch Q2 to conduct for a complementary duty cycle (1-D). During the complementary interval, an opposite polarity of the input voltage Vin is applied across the primary winding PR. The controller CLPWM, therein, monitors the first output voltage Vout1 and controls a duty cycle of the first and second switches Q1, Q2 to maintain the first output voltage Vout1 and, ultimately, the second output voltage Vout2, at the desired values.
Thus, the switching action of the first and second switches Q1, Q2 converts a DC input voltage Vin into an AC voltage necessary to operate the transformer T1. Additionally, a first output current Iout1 at a first output voltage Vout1 is provided via the magnetizing inductance Lmag of the transformer T1 at the primary output of the multiple output converter. The first output capacitor Cout1 filters the first output voltage Vout1 at the primary output. The first and second secondary windings SEC1, SEC2 of the transformer T1 scale the AC voltage to an appropriate value. The scaled AC voltage is then rectified by the synchronous rectifier and filtered by the second output capacitor Cout2. A second output current Iout2 at a second output voltage Vout2 is provided via the output inductor Lout at the auxiliary output of the multiple output converter. Regarding the operation of the controllable switches of the multiple output converter, the first switch Q1 and the second synchronous rectifier switch SR2 primarily conduct during the primary interval of the multiple output converter. Conversely, the second switch Q2 and the first synchronous rectifier switch SR1 primarily conduct during the complementary interval of the multiple output converter.
For a better understanding of the multiple output converter, a more detailed analysis thereof will hereinafter be described. Prior to analyzing the multiple output converter, an objective in designing the converter is to provide multiple regulated output voltages, while at the same time, maintaining a ripple condition within the multiple output converter and a net DC bias across the transformer T1 within acceptable limitations. If the ripple condition and net DC bias are not adequately maintained, the magnetic devices (i.e., the transformer T1 and output inductor Lout) may become prohibitively larger (including a potential for a core with a large gap) or dampening circuits (such as snubber circuits) may be required in the multiple output converter. As the real estate for the converters continues to shrink and the efficiency targets increase, the aforementioned mitigatory options are becoming less viable. Thus, the multiple output converter is designed, among other things, to manage both the ripple and net DC bias conditions.
Turning now to the operation of the multiple output converter, the first output voltage Vout1 may be described as follows:

Vout1=D*Vin,

wherein D represents the duty cycle (also referred to as the primary duty cycle) of the first switch Q1. The second output voltage Vout2 may be described as follows:

Vout2=Vout1*(1-D)[(NS1+NS2)/NP],

wherein (1-D) represents the duty cycle (also referred to as the complementary duty cycle) of the second switch Q2. Thus, as the primary duty cycle D of the first switch Q1 increases, the first output voltage Vout1 also increases.

Also, as the primary duty cycle D increases between zero and 50 percent, the complementary duty cycle (1-D) of the second switch Q2 decreases from 100 to 50 percent and the second output voltage Vout2 increases. Conversely, as the primary duty cycle D increases from 50 to 100 percent, the complementary duty cycle (1-D) of the second switch Q2 decreases from 50 to zero percent and the second output voltage Vout2 also decreases. This parabolic response of the second output voltage Vout2 to the primary duty cycle D is due, in part, to the functional dependence on the primary and complementary duty cycles D, (1-D).
Additionally, regulating the first output voltage Vout1 leads to a proper regulation of the second output voltage Vout2 in accordance with selecting the primary and complementary duty cycles D, (1-D) of the first and second switches Q1, Q2, respectively, as hereinafter described. From the relationships above, the primary duty cycle D of the first switch Q1 may be described as follows:

D=1⁄2±1⁄2*SQR{1–4Vout2/Vin*NP/(NS1+NS2)}.

To achieve substantial ripple cancellation on a secondary side of the multiple output converter and within the converter in general, the following relationship:

(1-D)*Vin(NS2/NP)=D*Vin(NS1/NP),

is solved for the primary duty cycle D of the first switch Q1, yielding:

D=NS2/(NS1+NS2).

Moreover, under such conditions, the second output voltage Vout2 may be described by the following relationship:

Vout2=Vin{(NS1*NS2)/[NP*(NS1+NS2)]}.

Thus, the second output voltage Vout2 is a function of the input voltage Vin and the number of turns NP, NS1, NS2 of the primary winding PR and the first and second secondary windings SEC1, SEC2, respectively, of the transformer T1.

A magnetizing current Imag of the transformer T1 may be represented by:

Imag=ImagDC+ImagAC,

wherein ImagDC is the DC component of the magnetizing current Imag and ImagAC is the AC component of the magnetizing current Imag. All components of the magnetizing current Imag herein are referenced to a primary side of the transformer T1. The DC component ImagDC of the magnetizing current Imag may be represented by:

ImagDC=ImagDC1+ImagDC2,

wherein ImagDC1 is a DC bias current associated with a primary side of the multiple output converter (which is equal to the first output current Iout1 in the illustrated embodiment), and ImagDC2 is a DC bias current associated with a secondary side of the multiple output converter.

Another set of relationships are evaluated to analyze the net DC bias across the transformer T1. The analysis begins with the DC bias current ImagDC2 associated with the secondary side of the multiple output converter as set forth below:

ImagDC2=[NS1/NP*Iout2]−[D*(NS1+NS2)/NP*Iout2].

It should be understood that the DC bias current ImagDC2 associated with the secondary side of the multiple output converter across the transformer T1 may be either a positive or negative value. The DC bias current ImagDc2 associated with the secondary side of the multiple output converter is added to the DC bias current ImagDC1 associated with the primary side of the multiple output converter (which, again, is the first output current Iout1) to yield the DC component ImagDC (also referred to as a net DC bias current) of the magnetizing current Imag represented by:

ImagDC=Iout1+[NS1/NP*Iout2]−[D*(NS1+NS2)/NP*Iout2].

Employing the above relationship to ascertain the primary duty cycle D of the first switch Q1 for a substantially zero DC bias current ImagDC2 associated with the secondary side of the multiple output converter provides the following relationship:

D=NS1/(NS1+NS2).

Thus, if the primary duty cycle D of the first switch Q1 is greater than the value of the turns ratio as described above, the DC bias current ImagDC2 associated with the secondary side of the multiple output converter across the transformer T1 is negative.

It is also possible to select the primary duty cycle D of the first switch Q1 to achieve both substantial ripple cancellation and a substantially zero net DC bias current ImagDC across the transformer T1. More specifically, by selecting the primary duty cycle D of the first switch Q1 according to:

D=NS2/(NS1+NS2),

a substantial ripple cancellation in the secondary side of the multiple output converter and the converter in general can be achieved. The DC bias current ImagDC2 associated with the secondary side of the multiple output converter may be negative. The negative value of the DC bias current ImagDC2 associated with the secondary side of the multiple output converter may be offset by a positive DC bias current ImagDC1 associated with the primary side of the multiple output converter thereby providing a substantially zero net DC bias current ImagDC across the transformer T1 of the multiple output converter.

The advantages of designing the multiple output converter under such conditions provides an overall reduction in the size of the magnetic components thereof. More specifically, the output inductor Lout may be downsized because the magnetic device does not have to accommodate a substantial ripple current in the secondary side of the multiple output converter. Additionally, the transformer T1 may not need a substantial gap, if any at all, in the magnetic core thereof to accommodate a large net DC bias thereacross. Mitigating the need for a substantial gap in the core of the transformer T1 allows for several advantages such as a substantially larger magnetizing inductance Lmag for a given size of a magnetic device. Additionally, a larger magnetizing inductance Lmag could be applied to filter the first output voltage Vout1 of the multiple output converter.
An exemplary design will hereinafter be described to demonstrate the principles as stated above. The following values are submitted in Table I below for selected components of the multiple output converter:











TABLE I







Parameter/Component
Reference
Value









Input Voltage
Vin
 18 volts



Number of turns of the primary winding
NP
 3



PR



Number of turns of the first secondary
NS1
 3



winding SEC1



Number of turns of the second
NS2
 6



secondary winding SEC2



Switching frequency of the first and
f
300 kHz



second switches Q1, Q2



First output voltage
Vout1
 12 volts



First output current
Iout1
 5 amps



Second output voltage
Vout2
 12 volts



Second output current
Iout2
 1 amp



Primary duty cycle of the first
D
 0.67



switch Q1



Complementary duty cycle of the
1-D
 0.33



second switch Q2










Employing the values as stated above for selected components yields substantial ripple cancellation in the secondary side of the multiple output converter thereby allowing the output inductor Lout to be relatively small (e.g., 1 μH). Additionally, the DC bias current ImagDC2 associated with the secondary side of the multiple output converter is about a negative one amp resulting in a DC component ImagDC of the magnetizing current Imag of a positive four amps thereby allowing for a larger inductance (e.g., 4 μH) in a smaller core than would have been possible with an unbiased DC component ImagDC of the magnetizing current Imag of a positive five amps. As a result, the size of the transformer T1 and the output inductor Lout are relatively small in comparison to other converters attempting to provide analogous power under like conditions. Taking the design a step further, if the first output current Iout1 at the primary output is limited to one amp, it is possible to achieve a substantially zero DC component ImagDC of the magnetizing current Imag across the transformer T1 thereby further reducing the gap, or removing it altogether, in the core thereof.
The following FIGUREs and associated discussions provide waveform diagrams of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions. Unless otherwise noted, the parameters/component values are as submitted above in Table I.
Turning now to FIGS. 2A–2F, illustrated are waveform diagrams of an exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the primary output provides a first output current Iout1 of five amps at a first output voltage Vout1 of 12 volts and the auxiliary output provides a second output current Iout2 of one amp at a second output voltage Vout2 of 12 volts.
As illustrated by FIG. 2A, a DC component ImagDC of the magnetizing current Imag associated with the transformer T1 is a positive four amps which is less than an unbiased DC component ImagDC of the magnetizing current Imag of a positive five amps. Furthermore, as illustrated by FIGS. 2C and 2D, the output inductor Lout demonstrates a small inductor ripple current ILout and small inductor ripple voltage VLout. Additionally, as illustrated by FIGS. 2E and 2F, the first output current Iout1 and first output voltage Vout1 at the primary output also exhibit a small ripple condition.
Turning now to FIGS. 3A–3F, illustrated are waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the primary output provides a first output current Iout1 of five amps at a first output voltage Vout1 of 12 volts and the auxiliary output provides a second output current Iout2 of zero amps at a second output voltage Vout2 of 12 volts.
As illustrated by FIG. 3A, a DC component ImagDC of the magnetizing current Imag associated with the transformer T1 is a positive five amps. Furthermore, as illustrated by FIGS. 3C and 3D, the output inductor Lout demonstrates a small inductor ripple current ILout and small inductor ripple voltage VLout. Additionally, as illustrated by FIGS. 3E and 3F, the first output current Iout1 and first output voltage Vout1 at the primary output also exhibit a small ripple condition.
In comparison to the operating conditions illustrated and described with respect to FIGS. 2E and 2F, the waveform diagrams of FIGS. 3E and 3F demonstrate a reduced ripple condition for the first output current Iout1 and first output voltage Vout1. The relatively larger ripple condition for the first output current Iout1 and first output voltage Vout1 illustrated in FIGS. 2E and 2F may be attributed to a switching of a substantially non-zero current on the secondary side of transformer T1.
Turning now to FIGS. 4A–4F, illustrated are waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the primary output provides a first output current Iout1 of zero amps at a first output voltage Vout1 of 12 volts and the auxiliary output provides a second output current Iout2 of zero amps at a second output voltage Vout2 of 12 volts.
As illustrated by FIG. 4A, a DC component ImagDC of the magnetizing current Imag associated with the transformer T1 is zero amps thereby providing a substantially zero net DC bias across the transformer T1. Furthermore, as illustrated by FIGS. 4C and 4D, the output inductor Lout demonstrates a small inductor ripple current Iout and small inductor ripple voltage VLout. Additionally, as illustrated by FIGS. 4E and 4F, while the first output current Iout1 demonstrates a zero ripple current, the first output voltage Vout1 at the primary output exhibits a small ripple voltage.
Turning now to FIGS. 5A–5F, illustrated are waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the primary output provides a first output current Iout1 of zero amps at a first output voltage Vout1 of 12 volts and the auxiliary output provides a second output current Iout2 of one amp at a second output voltage Vout2 of 12 volts.
As illustrated by FIG. 5A, a DC component ImagDC of the magnetizing current Imag associated with the transformer T1 is a negative one amp. Furthermore, as illustrated by FIGS. 5C and 5D, the output inductor Lout demonstrates a small inductor ripple current ILout and small inductor ripple voltage VLout. Additionally, as illustrated by FIGS. 5E and 5F, while the first output current Iout1 demonstrates a zero ripple current, the first output voltage Vout1 at the primary output exhibits a small ripple voltage.
In comparison to the operating conditions illustrated and described with respect to FIG. 2C, the waveform diagram of FIG. 5C demonstrates a reduced inductor ripple current ILout. The relatively larger inductor ripple current ILout illustrated in FIG. 2C may be attributed to switching of a substantially non-zero current on the primary side of transformer T1.
Turning now to FIGS. 6A–6F, illustrated are waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the primary output provides a first output current Iout1 of one amp at a first output voltage Vout1 of 12 volts and the auxiliary output provides a second output current Iout2 of zero amps at a second output voltage Vout2 of 12 volts.
As illustrated by FIG. 6A, a DC component ImagDC of the magnetizing current Imag associated with the transformer T1 is a positive one amp. Furthermore, as illustrated by FIGS. 6C and 6D, the output inductor Lout demonstrates a small inductor ripple current ILout and small inductor ripple voltage VLout. Additionally, as illustrated by FIGS. 6E and 6F, the first output current Iout1 and first output voltage Vout1 at the primary output also exhibit a small ripple condition.
Turning now to FIGS. 7A–7F, illustrated are waveform diagrams of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the primary output provides a first output current Iout1 of one amp at a first output voltage Vout1 of 12 volts and the auxiliary output provides a second output current Iout2 of one amp at a second output voltage Vout2 of 12 volts.
As illustrated by FIG. 7A, a DC component ImagDC of the magnetizing current Imag associated with the transformer T1 is zero amps (which is less than an unbiased DC component ImagDC of the magnetizing current Imag of a positive one amp) thereby providing a substantially zero net DC bias across the transformer T1. Furthermore, as illustrated by FIGS. 7C and 7D, the output inductor Lout demonstrates a small inductor ripple current ILout and small inductor ripple voltage VLout. Additionally, as illustrated by FIGS. 7E and 7F, the first output current Iout1 and first output voltage Vout1 at the primary output also exhibit a small ripple condition.
Turning now to FIG. 8, illustrated is a diagram demonstrating a series of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the diagram of FIG. 8 illustrates a net DC bias flux density of the transformer T1 as a function of a first output current Iout1 associated with the primary output when the auxiliary output provides a second output current Iout2 of one amp at a second output voltage Vout2 of 12 volts. As illustrated, a net DC bias flux density of the transformer T1 is substantially zero when the first output current Iout1 is one amp. At that operating condition, a substantially zero net DC bias flux associated with a substantially zero net DC bias current ImagDC is demonstrated across the transformer T1.
Turning now to FIG. 9, illustrated is a diagram demonstrating a series of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the diagram of FIG. 9 illustrates a net DC bias flux density of the transformer T1 as a function of a second output current Iout2 associated with the auxiliary output when the primary output provides a first output current Iout1 of one amp at a first output voltage Vout1 of 12 volts. As illustrated, a net DC bias flux density of the transformer T1 is substantially zero when the second output current Iout2 is one amp. At that operating condition, a substantially zero net DC bias flux associated with a substantially zero net DC bias current ImagDC is demonstrated across the transformer T1.
Turning now to FIG. 10, illustrated is a diagram demonstrating a relationship between a primary duty cycle and output voltages of the multiple output converter according to the principles of the present invention. More specifically, the diagram of FIG. 10 illustrates output voltages associated with the primary and auxiliary outputs as a function of a primary duty cycle (D) of the first switch Q1 of the multiple output converter employing the values submitted in Table I above. As illustrated, a primary duty cycle D of 0.67 for the first switch Q1 provides substantial ripple cancellation when the first and second output voltages Vout1, Vout2 are 12 volts, the input voltage Vin is 18 volts, and the number of turns NP, NS1, NS2 for the primary winding PR, first secondary winding SEC1 and second secondary winding SEC2 of transformer T1 are 3, 3, 6, respectively.
Turning now to FIG. 11, illustrated is a waveform diagram of another exemplary operation of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the waveform diagram of FIG. 11 illustrates a first output voltage Vout1 associated with the primary output as a function of time with the second output current Iout2 of the auxiliary output providing one amp and zero amps, respectively. As illustrated, a change in the second output current Iout2 affects a ripple condition associated with the first output voltage Vout1.
Turning now to FIG. 12, illustrated is a waveform diagram of another series of exemplary operations of the multiple output converter of FIG. 1 at selected operating conditions according to the principles of the present invention. More specifically, the waveform diagram of FIG. 12 illustrates a magnetizing current Imag of the transformer T1 as a function of time over several operating conditions of the multiple output converter. As illustrated, different operating conditions, namely, a change in the first and second output currents Iout1, Iout2 affect the magnetizing current Imag of the transformer T1. In accordance therewith, the different operating conditions affect a DC component ImagDC of the magnetizing current Imag associated with the transformer T1.
Thus, a multiple output converter, and related method of operation thereof, with readily attainable and quantifiable advantages has been introduced. Those skilled in the art should understand that the previously described embodiments of the multiple output converter and exemplary operating conditions are submitted for illustrative purposes only and that other converter embodiments capable of providing multiple outputs while addressing a ripple condition in the converter and a net DC bias associated with a transformer are well within the broad scope of the present invention.
Exemplary embodiments of the present invention have been illustrated above with reference to specific electronic and magnetic components. Those skilled in the art are aware, however, that components may be substituted (not necessarily with components of the same type) to create desired conditions or accomplish desired results. For instance, multiple components may be substituted for a single component and vice-versa. Additionally, the multiple output converter illustrated and described herein includes two outputs, namely, the primary output and the auxiliary output. It should be understood by those skilled in the art, however, that the multiple output converter may have more than two outputs (e.g., a primary output and multiple auxiliary outputs) and still fall within the broad scope of the present invention. In such a case, a magnetizing current may be derived from a primary winding and multiple secondary windings associated with the transformer.
For a better understanding of power electronics control systems, see Erickson, R. W., Fundamentals of Power Electronics, Chapman and Hall (1997). For a better understanding of power electronics and power converter topologies, see Kassakian, et al., Principles of Power Electronics, Addison-Wesley Publishing Company (1991). The aforementioned references are incorporated herein by reference in their entirety.
Although the present invention has been described in detail, those skilled in the art should understand that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the invention in its broadest form.

## Claims

1. A buck converter with multiple outputs including a primary output and at least one auxiliary output, comprising:
a transformer having a primary winding and at least one secondary winding;
a switch, coupled to said primary winding, configured to impress an input voltage across said transformer, a first DC output voltage configured to be provided at said primary output employing a magnetizing inductance associated with said transformer as an inductor; and
an output inductor coupled to said at least one secondary winding, a second DC output voltage configured to be provided at said auxiliary output via said output inductor.

2. The multiple output converter as recited in claim 1 further comprising a rectifier coupled to said at least one secondary winding.

3. The multiple output converter as recited in claim 1 wherein said transformer comprises first and second secondary windings.

4. The multiple output converter as recited in claim 3 further comprising a synchronous rectifier having first and second synchronous rectifier switches coupled to one of said first and second secondary windings.

5. The multiple output converter as recited in claim 4 wherein said first and second synchronous rectifier switches are cross-coupled.

6. The multiple output converter as recited in claim 1 further comprising another switch coupled to said primary winding.

7. The multiple output converter as recited in claim 6 wherein said switch is configured to conduct for a primary duty cycle (D) and said another switch is configured to conduct for a complementary duty cycle (1-D).

8. The multiple output converter as recited in claim 7 wherein said primary duty cycle (D) of said switch is selected to provide at least one of substantial ripple cancellation associated with said multiple output converter and a substantially zero net DC bias across said transformer.

9. The multiple output converter as recited in claim 1 further comprising an output capacitor coupled to said primary winding.

10. The multiple output converter as recited in claim 1 further comprising an output capacitor coupled to said output inductor.

11. A method of operating a buck converter with multiple outputs including a primary output and at least one auxiliary output, comprising:
providing a transformer having a primary winding and at least one secondary winding;
impressing an input voltage across said transformer with a switch coupled to said primary winding;
producing a first DC output voltage at said primary output employing a magnetizing inductance associated with said transformer as an inductor; and
further producing a second DC output voltage at said auxiliary output via an output inductor coupled to said at least one secondary winding.

12. The method as recited in claim 11 further comprising providing a rectifier coupled to said at least one secondary winding.

13. The method as recited in claim 11 wherein said transformer comprises first and second secondary windings.

14. The method as recited in claim 13 further comprising providing a synchronous rectifier having first and second synchronous rectifier switches coupled to one of said first and second secondary windings.

15. The method as recited in claim 14 further comprising cross-coupling said first and second synchronous rectifier switches.

16. The method as recited in claim 11 wherein said impressing is performed in cooperation with another switch coupled to said primary winding.

17. The method as recited in claim 16 further comprising causing said switch to conduct for a primary duty cycle (D) and said another switch to conduct for a complementary duty cycle (1-D).

18. The method as recited in claim 17 wherein said primary duty cycle (D) of said switch is selected to provide at least one of substantial ripple cancellation associated with said multiple output converter and a substantially zero net DC bias across said transformer.

19. The method as recited in claim 11 further comprising filtering said first output voltage with an output capacitor coupled to said primary winding.

20. The method as recited in claim 11 further comprising filtering said second output voltage with an output capacitor coupled to said at least one secondary winding.